A
COMPAL CONFIDENTIAL
B
C
D
E
1 1
PCB NO :
BOM P/N :
GPIO MAP:
2 2
LA-7741P(DAB00000800)
4619EO31L01 TPM ;4519EO31L02 TPM/TAA
Rev0.9
MODEL NAME :
QAL70
Dalmore 13 UMA
Ivy Bridge + Panther POINT
@
2011-06-23
REV : 0.1 (X00)
@ : Nopop Component
3 3
CONN@ : Connector Component
MB Type
TPM EN/ TCM DIS
TPM DIS/ TCM EN
TPM DIS/ TCM DIS 2@3@3@
TAA @TAA
SPI ON BOARD @SPI
4 4
MB PCB
MB PCB
Part Number Description
Part Number Description
PCB 0FH LA-6562P REV0 M/B UMA
PCB 0FH LA-6562P REV0 M/B UMA
DA80000I700
DA80000I700
A
B
BOM P/N
1@
2@
4@
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-7741
LA-7741
LA-7741
1 56Thursday, June 23, 2011
1 56Thursday, June 23, 2011
1 56Thursday, June 23, 2011
E
0.1
0.1
0.1
Block Diagram
A
B
C
Memory BUS (DDR3)
1333/1600 MHz
D
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
E
1 1
On IO board
CRT CONN
DOCKING PORT
2 2
DAI
USB2.0 [3,8]
SATA5
DOCK LAN
USB3.0 [4]
VGA
VGA
For MB/DOCK
Video Switch
PI3V713-AZLEX
HDMI CONN
LVDS CONN
SDXC/MMC
Card Reader
VGA
DPB
DPC
DPD
LVDS
PCIE x1
OZ600FJ0LN
PCI Express BUS
PCIE5
EXPRESS
Card
USB10
3 3
1/2 Mini Card
PP
USB6
Smart Card
PCIE2
1/2 Mini Card
WLAN/WiFi
Full Mini Card
TDA8034HN
PCIE1PCIE3
WWAN
USB5USB4
CPU XDP Port
PCH XDP Port
RFID
Fingerprint
CONN
WiFi ON/OFF
DC/DC Interface
LED
4 4
PWM FAN
SMSC SIO
ECE5048
BC BUS
SMSC
100MHz
Option
China TCM1.2
SSX44B
BCM5882
FP_USB
BC BUS
USH
USB7
USH Module
SMSC KBC
MEC5055
LPC BUS
33MHz
4021
TP CONN
A
B
KB CONN
Ivy Bridge
BGA 2C 1023P
FDI
Lane x 8
INTEL
Panther POINT-M
BGA 989P
SPI
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
W25Q64BVSSIG
64M 4K sector
W25Q32BVSSIG
16M 4K sector
Discrete TPM
AT97SC3204
C
DMI2
Lane x 4
PCIE4
USB
PCI Express BUS
HD Audio I/F
SATA Repeater
Parade PS8520B
E-Module
SATA
PI5USB1457A USB
Power Share
100MHz
SATA
HDD
FFS LNG3DM
BT 4.0
Camera
SATA Repeater
PS8511B
USB3.0
HDA Codec
92HD90B3
D
Trough Cable
E-SATA
USB 2.0 Port
USB3.0
USB3.0/2.0
PS8710B USB3.0
Repeater
USB3.0
USB3.0/2.0+PS
Intel Lewisville
82579LM
INT.Speaker
Combo Jack
on IO board
DAI
To Docking side
DOCK LAN
LAN SWITCH
PI3L720
RJ45
Dig.
MIC
Trough LVDS Cable
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
UMA Block Diagram
UMA Block Diagram
UMA Block Diagram
LA-7741
LA-7741
LA-7741
2 56Thursday, June 23, 2011
2 56Thursday, June 23, 2011
2 56Thursday, June 23, 2011
E
0.1
0.1
0.1
5
4
3
2
1
POWER STATES
RUN
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFL
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
Signal
SLP
S3#
HIGH
LOW HIGH HIGH ON ON ON OFF
LOW HIGH HIGH
OW HIGHLOW
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
SLP
A#
HIGH
HIGH
ALWAYS
PLANE
ON
M
P
SUS
LANE
LANE
P
ON ON ON
ON
OFF
OFF
PLANE
CLOCKS
OFF
OFF
OFF
PCH
USB PORT#
0
1
2
3
4
5
6
7
JUSB1 (Right side )
JUSB2 (Rear Left side)
NA
MLK DOCK
WLAN
WWAN
JMINI3(PP)
USH->BIO
DESTINATION
DOCKING8
PM TABLE
C C
power
p
lane
State
S0
S3
+15V_ALW
+5V_ALW
+3.3V_ALW_PCH
3.3V_RTC_LDO
+
ON
+3.3V_SUS
+1.5V_MEM
ON ON
ON
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
DESTINATION
HDD
ODD/ E3 Module Bay
NA
NA
ESATA
Dock
USH
9
10 Express card
11
12
13
0
1
JESATA1 ( right side)
Bluetooth
Camera
NA
BIO
NA
S5 S4/AC
S5 S4/AC don't exist
B B
A A
N
O
OFF
OFFOFF
OFF
O
FF
ON
OFF
OFFOFF
need to update Power Status and PM
Table
UMA DP/HDMI Port
Port B
Port C
Port D
Connetion
MB HDMI Conn
Dock DP port 2
Dock DP port 1
PCI EXPRESS
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
Lane 8 None
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Express card
E3 Module Bay (USB3)
1/2vMINI CARD-3 PCIE
MMI
10/100/1G LOM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-7741
LA-7741
LA-7741
3 56Thursday, June 23, 2011
3 56Thursday, June 23, 2011
3 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
4
3
2
1
EN_INVPWR
D D
FDC654P
Q21
+BL_PWR_SRC
HDDC_EN
MODC_EN
ADAPTER
SI3456BDVSI3456BDV
(Q30)(Q27)
BATTERY
+PWR_SRC
1.05V_VTTPWRGD
TPS51461RGER
+VCC_SA
+5V_HDD
+5V_MOD
(PU13)
ALWON
+15V_ALW
C C
CHARGER
RT8205LZQW
(PU2)
+5V_ALW
RUN_ON
TPS22966DPUR
+3.3V_ALW
(U78)
+5V_RUN
MAX17511
(PU9)
B B
RT8207MZQW
(PU16)
RT8207MZQW
(PU16)
SY8033BDBC
(PU15)
SN1003055
(PU7)
TPS51212DSCR
(PU17)
AUX_EN_WOWL
SI3456
(Q38)
PCH_ALW_ON
SI3456
(Q49)
SUS_ON
S13456
(Q54)
AUX_ON
SI3456
(Q34)
RUN_ON
TPS22966DPUR
(U78)
M_ON
SI3456
(Q58)
DDR_ON
1.05V_0.8V_PWROK
+VCC_CORE
CPU1.5V_S3_GATE
A A
+1.5V_MEM +0.75V_DDR_VTT
RUN_ON
AO4728
NTGS4141N
(QC3)
0.75V_DDR_VTT_ON
(Q59)
RUN_ON
+1.8V_RUN
CPU_VTT_ON
SIO_SLP_A#
+1.05V_RUN_VTT +1.05V_M
RUN_ON
SI4164
(Q63)
Pop option
+3.3V_WLAN
+1.0V_LAN
+3.3V_ALW_PCH
+3.3V_M
Pop option
+3.3V_LAN+3.3V_SUS
+3.3V_RUN
+3.3V_M
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-7741
LA-7741
LA-7741
4 56Thursday, June 23, 2011
4 56Thursday, June 23, 2011
4 56Thursday, June 23, 2011
1
0.1
0.1
0.1
+1.5V_CPU_VDDQ
5
+1.5V_RUN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
+1.05V_RUN
4
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
SMBUS Address [0x9a]
H14
C9
MEM_SMBCLK
MEM_SMBDATA
PCH
D D
B4
A3
B5
A4
LAN_SMBCLK
LAN_SMBDATA
2.2K
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMBDAT
+3.3V_ALW_PCH
C8
G12
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
3A
1A
1A
C C
1B
1B
@
@
2.2K
2.2K
2.2K
2.2K
4
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_LAN
28
31
LOM
+3.3V_ALW
+3.3V_ALW
2N7002
2N7002
SMBUS Address [C8]
127
129
DOCKING
3
SMBUS Address
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
202
200
202
200
2
DIMMA
DIMMB
53
51
53
51
XDP1
XDP2
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
1
2.2K
G Sensor
WWAN
+3.3V_RUN
SMBUS Address [3B]
SMBUS Address [TBD]
2.2K
14
13
30
32
2.2K
4
+3.3V_ALW
100 ohm
100 ohm
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
10
9
7
6
M9
L9
7
8
Charger
BATTERY
CONN
SMBUS Address [0x16]
USH
SMBUS Address [0xa4]
Express card
SMBUS Address [0x12]
SMBUS Address [TBD]
29
E3 Module Bay
30
3
SMBUS Address [0xd2]
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SMBUS TOPOLOGY
SMBUS TOPOLOGY
SMBUS TOPOLOGY
LA-7741
LA-7741
LA-7741
5 56Thursday, June 23, 2011
5 56Thursday, June 23, 2011
5 56Thursday, June 23, 2011
1
0.1
0.1
0.1
KBC
A56
1C1CB59
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
2.2K
A50
B53
A49
B52
USH_SMBCLK
USH_SMBDAT
2.2K
2.2K
CARD_SMBCLK
CARD_SMBDAT
1E
B B
1E
MEC 5065
2B
2B
2.2K
B50
A47
CHARGER_SMBCLK
CHARGER_SMBDAT
1G
1G
2.2K
2.2K
2.2K
B7
A7
BAY_SMBDAT
BAY_SMBCLK
2D
A A
2D
5
5
4
3
2
1
(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
+1.05V_RUN_VTT
12
RC2
RC2
24.9_0402_1%~D
D D
DMI_CRX_PTX_N0<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_P3<16>
DMI_CTX_PRX_N0<16>
DMI_CTX_PRX_N1<16>
DMI_CTX_PRX_N2<16>
DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>
DMI_CTX_PRX_P1<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N3<16>
C C
B B
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P3<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P6<16>
FDI_CTX_PRX_P7<16>
FDI_FSYNC0< 16>
FDI_FSYNC1< 16>
FDI_INT<16>
FDI_LSYNC0<16>
FDI_LSYNC1<16>
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
U1A
U1A
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2]
P10
DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2]
P11
DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0]
W11
FDI0_TX#[1]
W1
FDI0_TX#[2]
AA6
FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2]
AC9
FDI1_TX#[3]
U6
FDI0_TX[0]
W10
FDI0_TX[1]
W3
FDI0_TX[2]
AA7
FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1]
AA3
FDI1_TX[2]
AC8
FDI1_TX[3]
AA11
FDI0_FSYNC
AC12
FDI1_FSYNC
U11
FDI_INT
AA10
FDI0_LSYNC
AG8
FDI1_LSYNC
AF3
eDP_COMPIO
AD2
eDP_ICOMPO
AG11
eDP_HPD#
AG4
eDP_AUX#
AF4
eDP_AUX
AC3
eDP_TX#[0]
AC4
eDP_TX#[1]
AE11
eDP_TX#[2]
AE7
eDP_TX#[3]
AC1
eDP_TX[0]
AA4
eDP_TX[1]
AE10
eDP_TX[2]
AE6
eDP_TX[3]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
G3
G1
G4
H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6
G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4
F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI Intel(R) FDI
DMI Intel(R) FDI
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
eDP
eDP
24.9_0402_1%~D
PEG_COMP
PEG Compensation
PEG_ICOMPI and RCOMPO signals should be shor ted and routed
with - max leng th = 500 mils - typical imped ance = 43 mohm s
PEG_ICOMPO sign als should be routed with - m ax length = 50 0 mils
- typical imped ance = 14.5 mo hms
U1I
U1I
BG17
VSS[181]
BG21
VSS[182]
BG24
VSS[183]
BG28
VSS[184]
BG37
VSS[185]
BG41
VSS[186]
BG45
VSS[187]
BG49
VSS[188]
BG53
VSS[189]
BG9
VSS[190]
C29
VSS[191]
C35
VSS[192]
C40
VSS[193]
D10
VSS[194]
D14
VSS[195]
D18
VSS[196]
D22
VSS[197]
D26
VSS[198]
D29
VSS[199]
D35
VSS[200]
D4
VSS[201]
D40
VSS[202]
D43
VSS[203]
D46
VSS[204]
D50
VSS[205]
D54
VSS[206]
D58
VSS[207]
D6
VSS[208]
E25
VSS[209]
E29
VSS[210]
E3
VSS[211]
E35
VSS[212]
E40
VSS[213]
F13
VSS[214]
F15
VSS[215]
F19
VSS[216]
F29
VSS[217]
F35
VSS[218]
F40
VSS[219]
F55
VSS[220]
G51
VSS[221]
G6
VSS[222]
G61
VSS[223]
H10
VSS[224]
H14
VSS[225]
H17
VSS[226]
H21
VSS[227]
H4
VSS[228]
H53
VSS[229]
H58
VSS[230]
J1
VSS[231]
J49
VSS[232]
J55
VSS[233]
K11
VSS[234]
K21
VSS[235]
K51
VSS[236]
K8
VSS[237]
L16
VSS[238]
L20
VSS[239]
L22
VSS[240]
L26
VSS[241]
L30
VSS[242]
L34
VSS[243]
L38
VSS[244]
L43
VSS[245]
L48
VSS[246]
L61
VSS[247]
M11
VSS[248]
M15
VSS[249]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
VSS
VSS
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
NCTF
NCTF
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
G48
A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61
TP_G48
T23
T23
PAD~D
PAD~D
@
@
eDP Compensation
+1.05V_RUN_VTT
12
RC1
RC1
24.9_0402_1%~D
A A
eDP_COMPIO and ICOMPO signals should be shor ted near
balls and route d with typical impedance <25 mohms
5
24.9_0402_1%~D
EDP_COMP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (1/6)
Sandy Bridge (1/6)
Sandy Bridge (1/6)
LA-7741
LA-7741
LA-7741
6 56Thursday, June 23, 2011
6 56Thursday, June 23, 2011
6 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
+3.3V_ALW_PCH
CC156 0.1U_0402_25V6K~DCC156 0.1U_0402_25V6K~D
1 2
5
UC2
UC2
1
RUNPWROK<39,40>
+3.3V_ALW_PCH
D D
+1.05V_RUN_VTT
RC126 56_0402_5%~D@RC126 56_0402_5%~D@
RC128 49.9_0402_1%~D@RC 128 49.9_0402_1%~D@
RC44 62_0402_5%~DRC44 62_0402_5%~D
C C
1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D
PM_DRAM_PWR GD<16>
1 2
1 2
1 2
Follow check list 0.5
H_PROCHOT#<40,51,53>
H_THERMTRIP#<22>
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
H_SNB_IVB#<18>
CPU_DETECT#<39>
PECI_EC<40>
1 2
place RC57 near CPU 300mils ~1530mils
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC129 0_0402_5%~DRC129 0_0402_5%~D
P
B
O
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,42>
H_CATERR#
VR1 TOPOLOGY
H_PROCHOT#_R
H_THERMTRIP#_R
RUNPWROK_AND PM_DRAM_PWR GD_CPU
4
+1.5V_CPU_VDDQ
RC64
39_0402_5%~D
39_0402_5%~D
1 2
13
D
D
QC1
QC1
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
S
S
INTEL suggest RC64 and QC1 NO stuff by default
U1B
U1B
F49
PROC_SELECT#
C57
PROC_DETECT#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
place RC129 nea r CPU 250mils ~2530 mils
H_PM_SYNC< 16>
B B
H_CPUPWRGD<18>
RC25 0_0402_5%~DRC 25 0_0402_5%~D
Buffered reset to CPU
A A
PCH_PLTRST#<14,17>
5
H_PM_SYNC
VCCPWRGOOD_0_R
1 2
PM_DRAM_PWR GD_CPU
PCH_PLTRST#_R
UC1
UC1
1
NC
VCC
2
A
GND3Y
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Open drain buffer
+3.3V_RUN
5
4
C48
B46
BE45
D44
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC140
CC140
2
PCH_PLTRST#_BUF
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPWR OK
RESET#
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
4
12
RC12
RC12
200_0402_1%~D
200_0402_1%~D
1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D
@RC64
@
@
@
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
PCH_PLTRST#_R
4
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
BCLK_ITP
MISC
MISC
BCLK_ITP#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TDI
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
3
+1.05V_RUN_VTT
Place near JXDP1
CLK_CPU_DMI <15>
CLK_CPU_DMI# <15>
RC50
RC50
DDR_HVREF_RST_PCH<15>
DDR_HVREF_RST_GATE<40>
XDP_DBRESET#XDP_DBRESET#_R
T134 PAD~D@ T134 PAD~D@
CPU_DMI
J3
CPU_DMI#
H2
CPU_DPLL
AG3
CPU_DPLL#
AG1
CLK_XDP_ITP
N59
CLK_XDP_ITP#
N58
DDR3_DRAMRST#_CP U
AT30
SM_RCOMP0
BF44
SM_RCOMP1
BE43
SM_RCOMP2
BG43
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
XDP_PRDY#
N53
XDP_PREQ#
N55
XDP_TCLK
L56
XDP_TMS
L55
XDP_TRST#
J58
XDP_TDI_R
M60
XDP_TDO_R
L59
K58
G58
E55
E59
G55
G59
H60
BPM#6
J59
BPM#7
J61
+3.3V_ALW_PCH
12
RC124
@RC124
@
1K_0402_1%~D
1K_0402_1%~D
SYS_PWROK_XDP
1 2
RC13 0_0402_5%~DRC13 0_0402_5%~D
1 2
RC15 0_0402_5%~DRC15 0_0402_5%~D
1 2
RC16 1K_0402_5%~DRC16 1K_0402_5%~D
1 2
RC17 1K_0402_5%~DRC17 1K_0402_5%~D
+1.05V_RUN_VTT
Max 500mils
12
RC26 0_0402_5%~DRC26 0_0402_5%~D
T128 PAD~D@ T128 PAD~D@
T131 PAD~D@ T131 PAD~D@
T129 PAD~D@ T129 PAD~D@
T130 PAD~D@ T130 PAD~D@ T133 PAD~D@ T133 PAD~D@
T125 PAD~D@ T125 PAD~D@
T126 PAD~D@ T126 PAD~D@
T107 PAD~D@ T107 PAD~D@
T127 PAD~D@ T127 PAD~D@
4.99K_0402_1%~D
4.99K_0402_1%~D
T133 place near T107;T134 pleace near T127
For ESD concern, please put near CPU
VCCPWRGOOD_0_R
12
RC130
RC130
10K_0402_5%~D
10K_0402_5%~D
Avoid stub in t he PWRGD path
while placing r esistors RC25 & RC130
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
1
2
12
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CC65
CC65
SIO_PWRBTN#_R<14,16>
CFG0<9>
SYS_PWROK<16,39>
PLTRST_XDP#<17>
1 2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@
D
S
D
S
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
1
CC177
CC177
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
RC46 0_0402_5%~DR C46 0_0402_5%~D
RC47 0_0402_5%~D@RC47 0_0402_5%~D@
XDP_DBRESET# <14,16>
RC42
RC42
2
1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D
1 2
RC6 0_0402_5%~DRC6 0_0402_5%~D
1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D
1 2
RC9 0_0402_5%~D@ RC9 0_0402_5%~D@
RC8 1K_0402_5%~DRC8 1K_0402_5%~D
1 2
CLK_XDP
CLK_XDP#
DDR3_DRAMRST# <12>
DDR_HVREF_RST
1 2
1 2
1 2
RC23 0_0402_5%~DRC23 0_0402_5%~D
XDP_TDO_R XDP_TDO
140_0402_1%~D
140_0402_1%~D
1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D
12
12
RC45
RC45
RC43
RC43
25.5_0402_1%~D
25.5_0402_1%~D
2
12
200_0402_1%~D
200_0402_1%~D
XDP_TDIXDP_TDI_R
1
+1.05V_RUN_VTT
JXDP1
@JXDP1
XDP_PREQ#
XDP_PRDY#
H_CPUPWRGD_XDPH_CPUPWRGD
CFD_PWRBTN#_X DP
XDP_HOOK2
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCLK
1 2
RH107 0_0402 _5%~DRH107 0_0402_5%~D
1 2
RH106 0_0402 _5%~DRH106 0_0402_5%~D
CLK_XDP_ITP
CLK_XDP_ITP#
DDR_HVREF_RST <12>
M3 control
RH109 0_0402_5%~D@RH109 0_0402_5%~D@
RH108 0_0402_5%~D@RH108 0_0402_5%~D@
1 2
1 2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
MOLEX_52435-2671
MOLEX_52435-2671
OBSFN_A0
OBSFN_A1
GND
OBSDATA_A[0]
OBSDATA_A[1]
GND
OBSDATA_A[2]
OBSDATA_A[3]
GND
HOOK0
HOOK1
HOOK2
HOOK3
HOOK4
HOOK5
VCCOBS_AB
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK124GND
GND
GND
TCK0
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
@
27
28
PU/PD for JTAG signals
+3.3V_RUN
XDP_DBRESET#
XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
RC27 51_0402_1%~DRC27 51_0402_1%~D
RC29 51_0402_1%~DRC29 51_0402_1%~D
RC32 51_0402_1%~D@RC32 51_0402_1%~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D
RC40
RC40
RC41
RC41
12
12
12
12
12
12
51_0402_1%~D
51_0402_1%~D
12
51_0402_1%~D
51_0402_1%~D
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (2/6)
Sandy Bridge (2/6)
Sandy Bridge (2/6)
LA-7741
LA-7741
LA-7741
7 56Thursday, June 23, 2011
7 56Thursday, June 23, 2011
7 56Thursday, June 23, 2011
1
of
0.1
0.1
0.1
5
U1C
D D
C C
B B
DDR_A_D[0..63]<12>
DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>
DDR_A_CAS#<12>
DDR_A_RAS#<12>
DDR_A_WE#< 12>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
U1C
AG6
SA_DQ[0]
AJ6
SA_DQ[1]
AP11
SA_DQ[2]
AL6
SA_DQ[3]
AJ10
SA_DQ[4]
AJ8
SA_DQ[5]
AL8
SA_DQ[6]
AL7
SA_DQ[7]
AR11
SA_DQ[8]
AP6
SA_DQ[9]
AU6
SA_DQ[10]
AV9
SA_DQ[11]
AR6
SA_DQ[12]
AP8
SA_DQ[13]
AT13
SA_DQ[14]
AU13
SA_DQ[15]
BC7
SA_DQ[16]
BB7
SA_DQ[17]
BA13
SA_DQ[18]
BB11
SA_DQ[19]
BA7
SA_DQ[20]
BA9
SA_DQ[21]
BB9
SA_DQ[22]
AY13
SA_DQ[23]
AV14
SA_DQ[24]
AR14
SA_DQ[25]
AY17
SA_DQ[26]
AR19
SA_DQ[27]
BA14
SA_DQ[28]
AU14
SA_DQ[29]
BB14
SA_DQ[30]
BB17
SA_DQ[31]
BA45
SA_DQ[32]
AR43
SA_DQ[33]
AW48
SA_DQ[34]
BC48
SA_DQ[35]
BC45
SA_DQ[36]
AR45
SA_DQ[37]
AT48
SA_DQ[38]
AY48
SA_DQ[39]
BA49
SA_DQ[40]
AV49
SA_DQ[41]
BB51
SA_DQ[42]
AY53
SA_DQ[43]
BB49
SA_DQ[44]
AU49
SA_DQ[45]
BA53
SA_DQ[46]
BB55
SA_DQ[47]
BA55
SA_DQ[48]
AV56
SA_DQ[49]
AP50
SA_DQ[50]
AP53
SA_DQ[51]
AV54
SA_DQ[52]
AT54
SA_DQ[53]
AP56
SA_DQ[54]
AP52
SA_DQ[55]
AN57
SA_DQ[56]
AN53
SA_DQ[57]
AG56
SA_DQ[58]
AG53
SA_DQ[59]
AN55
SA_DQ[60]
AN52
SA_DQ[61]
AG55
SA_DQ[62]
AK56
SA_DQ[63]
BD37
SA_BS[0]
BF36
SA_BS[1]
BA28
SA_BS[2]
BE39
SA_CAS#
BD39
SA_RAS#
AT41
SA_WE#
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AU36
AV36
AY26
AT40
AU40
BB26
BB40
BC41
AY40
BA41
AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55
AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54
BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
M_ODT0
M_ODT1
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <12>
M_CLK_DDR#0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
M_CLK_DDR#1 <12>
DDR_CKE1_DIMMA <12>
DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>
M_ODT0 <12>
M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_A_MA[0..15] <12>
3
DDR_B_D[0..63]<13>
DDR_B_BS0<13>
DDR_B_BS1<13>
DDR_B_BS2<13>
DDR_B_CAS#<13>
DDR_B_RAS#<13>
DDR_B_WE#< 13>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
2
U1D
U1D
AL4
SB_DQ[0]
AL1
SB_DQ[1]
AN3
SB_DQ[2]
AR4
SB_DQ[3]
AK4
SB_DQ[4]
AK3
SB_DQ[5]
AN4
SB_DQ[6]
AR1
SB_DQ[7]
AU4
SB_DQ[8]
AT2
SB_DQ[9]
AV4
SB_DQ[10]
BA4
SB_DQ[11]
AU3
SB_DQ[12]
AR3
SB_DQ[13]
AY2
SB_DQ[14]
BA3
SB_DQ[15]
BE9
SB_DQ[16]
BD9
SB_DQ[17]
BD13
SB_DQ[18]
BF12
SB_DQ[19]
BF8
SB_DQ[20]
BD10
SB_DQ[21]
BD14
SB_DQ[22]
BE13
SB_DQ[23]
BF16
SB_DQ[24]
BE17
SB_DQ[25]
BE18
SB_DQ[26]
BE21
SB_DQ[27]
BE14
SB_DQ[28]
BG14
SB_DQ[29]
BG18
SB_DQ[30]
BF19
SB_DQ[31]
BD50
SB_DQ[32]
BF48
SB_DQ[33]
BD53
SB_DQ[34]
BF52
SB_DQ[35]
BD49
SB_DQ[36]
BE49
SB_DQ[37]
BD54
SB_DQ[38]
BE53
SB_DQ[39]
BF56
SB_DQ[40]
BE57
SB_DQ[41]
BC59
SB_DQ[42]
AY60
SB_DQ[43]
BE54
SB_DQ[44]
BG54
SB_DQ[45]
BA58
SB_DQ[46]
AW59
SB_DQ[47]
AW58
SB_DQ[48]
AU58
SB_DQ[49]
AN61
SB_DQ[50]
AN59
SB_DQ[51]
AU59
SB_DQ[52]
AU61
SB_DQ[53]
AN58
SB_DQ[54]
AR58
SB_DQ[55]
AK58
SB_DQ[56]
AL58
SB_DQ[57]
AG58
SB_DQ[58]
AG59
SB_DQ[59]
AM60
SB_DQ[60]
AL59
SB_DQ[61]
AF61
SB_DQ[62]
AH60
SB_DQ[63]
BG39
SB_BS[0]
BD42
SB_BS[1]
AT22
SB_BS[2]
AV43
SB_CAS#
BF40
SB_RAS#
BD45
SB_WE#
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AY34
AR22
BA36
BB36
BF27
BE41
BE47
AT43
BG47
AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59
AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61
BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22
M_CLK_DDR#2
DDR_CKE2_DIMMB
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
M_CLK_DDR2
BA34
1
M_CLK_DDR2 <13>
M_CLK_DDR#2 <13>
DDR_CKE2_DIMMB <13>
M_CLK_DDR3 <13>
M_CLK_DDR#3 <13>
DDR_CKE3_DIMMB <13>
DDR_CS2_DIMMB# <13>
DDR_CS3_DIMMB# <13>
M_ODT2 <13>
M_ODT3 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_B_MA[0..15] <13>
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (3/6)
Sandy Bridge (3/6)
Sandy Bridge (3/6)
LA-7741
LA-7741
LA-7741
8 56Thursday, June 23, 2011
8 56Thursday, June 23, 2011
8 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
4
3
2
1
CFG Straps for Processor
CFG2
D D
+VCC_GFXCORE
1 2
RC122 49.9_0402_1 %~D@ RC122 49.9_0402_1%~D@
VSSAXG_VAL_SENSE
1 2
RC123 49.9_0402_1 %~D@ RC123 49.9_0402_1%~D@
+VCC_CORE
1 2
C C
B B
RC120 49.9_0402_1 %~D@ RC120 49.9_0402_1%~D@
RC121 49.9_0402_1 %~D@ RC121 49.9_0402_1%~D@
1 2
12
VCC_VAL_SNESE
VSS_VAL_SNESE
1 2
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@
1 2
RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@
RC69
@RC69
@
100_0402_1%~D
100_0402_1%~D
12
RC71
@RC71
@
100_0402_1%~D
100_0402_1%~D
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
CFG0<7>
T11 PAD~D@T11 PAD~D@
T13 PAD~D@T13 PAD~D@
T17 PAD~D@T17 PAD~D@
T18 PAD~D@T18 PAD~D@
T15 PAD~D@T15 PAD~D@
T16 PAD~D@T16 PAD~D@
T9 PAD~D@T9 PAD~D@
T10 PAD~D@T10 PAD~D@
T12 PAD~D@T12 PAD~D@
T14 PAD~D@T14 PAD~D@
T20 PAD~D@T20 PAD~D@
T19 PAD~D@T19 PAD~D@
EDS 1.0 RSVD_12 -> VCC_DIE_SENSE
T22PAD~D @T22PAD~D @
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
VCC_VAL_SNESE
VSS_VAL_SNESE
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
TP_VCC_DIESENSE
U1E
U1E
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
RESERVED
RESERVED
DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
+DIMM0_1_VREF_CPUVAXG_VAL_SENSE
BE7
+DIMM0_1_CA_CPU
BG7
N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50
TP_DC_TEST_A4
A4
C4
DC_TEST_C4_D3
D3
TP_DC_TEST_D1
D1
TP_DC_TEST_A58
A58
A59
DC_TEST_A59_C59
C59
A61
DC_TEST_A61_C61
C61
TP_DC_TEST_D61
D61
TP_DC_TEST_BD61
BD61
BE61
DC_TEST_BE59_BE61
BE59
BG61
DC_TEST_BG59_BG61
BG59
TP_DC_TEST_BG58
BG58
TP_DC_TEST_BG4
BG4
BG3
DC_TEST_BE3_BG3
BE3
BG1
DC_TEST_BE1_BG1
BE1
TP_DC_TEST_BD1
BD1
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
T121 PAD~D@ T121 PAD~D@
T118 PAD~D@ T118 PAD~D@
T119 PAD~D@ T119 PAD~D@
T120 PAD~D@ T120 PAD~D@
T122 PAD~D@ T122 PAD~D@
T132 PAD~D@ T132 PAD~D@
T123 PAD~D@ T123 PAD~D@
T124 PAD~D@ T124 PAD~D@
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2
definition matches socket pin map definition
0:Lane Reversed
Display Port Presence Strap
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG4
CFG6
CFG5
RC54
@ RC54
@
1K_0402_1%~D
1K_0402_1%~D
12
@ R C51
@
1K_0402_1%~D
1K_0402_1%~D
12
@ R C52
@
1K_0402_1%~D
1K_0402_1%~D
12
12
RC51
RC52
RC53
@ RC53
@
1K_0402_1%~D
1K_0402_1%~D
CFG7
12
@ R C56
@
1K_0402_1%~D
1K_0402_1%~D
RC56
PEG DEFER TRAINING
1: (Default) PEG Train immediately
CFG7
following xxRESETB de assertion
A A
0: PEG Wait for BIOS for training
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (4/6)
Sandy Bridge (4/6)
Sandy Bridge (4/6)
LA-7741
LA-7741
LA-7741
9 56Thursday, June 23, 2011
9 56Thursday, June 23, 2011
9 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
4
3
2
1
AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48
AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15
W16
W17
BC22
AM25
AN22
A44
B43
C44
F43
G43
AN16
AN17
8
+1.05V_RUN_VTT
.5A
+1.05V_RUN_VTT
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VCCSENSE_R
VSSSENSE_R
+1.05V_RUN_VTT
12
RC60
Note: Place the PU resistors close to CPU
RC61 close to C PU 300 - 1500m ils
H_CPU_SVIDALRT#
+3.3V_RUN
1 2
1 2
RC140 0_0402_5%~DRC140 0_0402_5%~D
+1.05V_RUN_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC573
CC573
2
VIDSCLK <51>
Place RC66, RC70 ,RC133near CPU
1 2
RC67 0_0402_5%~DRC67 0_0402_5%~D
1 2
RC68 0_0402_5%~DRC68 0_0402_5%~D
RC98 10_0402_1%~DRC98 10_0402_1%~D
RC133 10_040 2_1%~DRC133 10 _0402_1%~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
12
1 2
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D
@
@
RC141
RC141
10K_0402_5%~D
10K_0402_5%~D
VCCP_PWRCTR L <50>
H_CPU_SVIDALRT# must be routed between the
VIDSOUT and VIDSCLK lines to reduce cross
talk. 18 mils spacing to others.
+1.05V_RUN_VTT
12
RC63
RC63
130_0402_1%~D
130_0402_1%~D
+1.05V_RUN_VTT
CAD Note: Place the PU
resistors close to CPU
RC63 close to C PU 300 - 1500m ils
VIDSOUT <51>
RC75
@RC75
@
100_0402_1%~D
100_0402_1%~D
1 2
VTT_SENSE <50>
VTT_GND <50>
RC60
75_0402_1%~D
75_0402_1%~D
+VCC_CORE
12
12
2
RC66
RC66
100_0402_1%~D
100_0402_1%~D
RC70
RC70
100_0402_1%~D
100_0402_1%~D
VIDALERT_N <51>
VCCSENSE <51>
VSSSENSE <51>
Iccmax current changed for PD DG Rev0.7
CPU Power Rail Table
Voltage Rail
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
+1.5V_MEM 1.5
Description
*
5A to Mem contr oller(+1.5V_CP U_VDDQ)
5-6A to 2 DIMMs /channel
2-5A to +1.5V_R UN & +0.75V_DD R_VTT
Voltage
0.65-1.3
1.05/1
0.0-1.1
1.8
1.5
0.65-0.9
S0 Iccmax
Current (A)
53
8.5
33
1.2
5
6
12-16
*
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (5/6)
Sandy Bridge (5/6)
Sandy Bridge (5/6)
LA-7741
LA-7741
LA-7741
10 56Thursday, June 23, 2011
10 56Thursday, June 23, 2011
10 56Thursday, June 23, 2011
1
of
0.1
0.1
0.1
POWER
U1F
53A
U1F
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
4
+VCC_CORE
D D
C C
B B
A A
5
POWER
CORE SUPPLY
CORE SUPPLY
VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
PEG IO AND DDR IO
PEG IO AND DDR IO
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE[1]
VCCPQE[2]
RAILS
RAILS
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID QUIET
SENSE LINES SVID QUIET
5
12
RC74
RC74
100K_0402_5%~D
QC4A
QC4A
2
+VCC_GFXCORE
12
12
RC100
RC100
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC264
CC264
1
1
2
2
100K_0402_5%~D
61
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
RC99
RC99
100_0402_1%~D
100_0402_1%~D
+1.8V_RUN
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
1
+
+
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC263
CC263
1
2
5
RUN_ON_CPU1.5VS3# <7,42>
100_0402_1%~D
100_0402_1%~D
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC176
CC176
1
CC174
CC174
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC262
CC262
1
1
2
2
+1.5V_CPU_VDDQ Source
VCC_AXG_SENSE<51>
VSS_AXG_SENSE<51>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC170
CC170
2
2
5
1 2
RC82 0_0402_5%~DRC 82 0_0402_5%~D
1 2
RC79 0_0402_5%~D@ RC79 0_0402_5%~D@
100_0402_1%~D
100_0402_1%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC183
CC183
CC168
CC168
CC169
CC169
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CPU1.5V_S3_GATE<40>
SIO_SLP_S3#<16,27,35,39,42,48>
+VCC_SA
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
CC172
CC172
+
+
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC171
CC171
2
D D
C C
B B
A A
12
RC72
RC72
100K_0402_5%~D
100K_0402_5%~D
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
QC4B
QC4B
4
RC76
@RC76
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC261
CC261
1
2
4
+1.5V_MEM +1.5V_CPU_VDDQ+3.3V_ALW2 +PWR_SRC_S
8
7
6
5
RUN_ON_CPU1.5VS3
330K_0402_1%~D
330K_0402_1%~D
12
RC143
RC143
33A
+VCC_GFXCORE
1.2A
CC175
CC175
6A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC260
CC260
4
QC3
QC3
AO4728L_SO8~D
AO4728L_SO8~D
4
1
2
U1G
U1G
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
CC136
CC136
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
3
1
2
POWER
POWER
SENSE
SENSE
20K_0402_5%~D
20K_0402_5%~D
12
@
@
CC135
CC135
RC73
RC73
VREF
VREF
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GRAPHICS
GRAPHICS
LINES
LINES
QUIET RAILS
QUIET RAILS
1.8V RAIL
1.8V RAIL
SA RAIL
SA RAIL
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
SENSE LINES
VCCSA_VID[0]
VCCSA_VID[1]
VCCSA VID
lines
VCCSA VID
lines
SM_VREF
VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]
VDDQ[9]
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]
VCCDQ[1]
VCCDQ[2]
3
+V_SM_VREF_CNT
+V_SM_VREF_CNT
AY43
+V_SM_VREF should
have 20 mil trace width
5A
+1.5V_CPU_VDDQ
AJ28
AJ33
AJ36
AJ40
AL30
3
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33
AM28
AN26
BC43
BA43
U10
D48
D49
+1.5V_CPU_VDDQ
1
2
1
2
+1.5V_CPU_VDDQ
1
2
RC139 0_0402_5%~DRC139 0_0402_5%~D
1 2
1 2
RC138 0_0402_5%~DRC138 0_0402_5%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC180
CC180
CC181
CC181
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC250
CC250
CC251
CC251
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC574
CC574
+VCCSA_SENSE <54>
+1.5V_CPU_VDDQ
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC161
CC161
CC162
CC162
CC163
CC163
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC252
CC252
1
2
CC254
CC254
CC253
CC253
1
1
2
2
VCCSA_VID_0 <54>
VCCSA_VID_1 <54>
2
U1H
U1H
1K_0402_1%~D
1K_0402_1%~D
12
RC84
RC84
1K_0402_1%~D
1K_0402_1%~D
12
RC78
RC78
12
12
12
12
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC164
CC164
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
10U_0603_6.3V6M~D
1
1
CC165
CC165
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC255
CC255
CC256
CC256
1
2
+1.5V_MEM
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
CC166
CC166
CC167
CC167
+
+
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC257
CC257
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC258
CC258
CC259
CC259
1
1
2
2
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
A37
VSS[7]
A40
VSS[8]
A45
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13]
AA13
VSS[14]
AA50
VSS[15]
AA51
VSS[16]
AA52
VSS[17]
AA53
VSS[18]
AA55
VSS[19]
AA56
VSS[20]
AA8
VSS[21]
AB16
VSS[22]
AB18
VSS[23]
AB21
VSS[24]
AB48
VSS[25]
AB61
VSS[26]
AC10
VSS[27]
AC14
VSS[28]
AC46
VSS[29]
AC6
VSS[30]
AD17
VSS[31]
AD20
VSS[32]
AD4
VSS[33]
AD61
VSS[34]
AE13
VSS[35]
AE8
VSS[36]
AF1
VSS[37]
AF17
VSS[38]
AF21
VSS[39]
AF47
VSS[40]
AF48
VSS[41]
AF50
VSS[42]
AF51
VSS[43]
AF52
VSS[44]
AF53
VSS[45]
AF55
VSS[46]
AF56
VSS[47]
AF58
VSS[48]
AF59
VSS[49]
AG10
VSS[50]
AG14
VSS[51]
AG18
VSS[52]
AG47
VSS[53]
AG52
VSS[54]
AG61
VSS[55]
AG7
VSS[56]
AH4
VSS[57]
AH58
VSS[58]
AJ13
VSS[59]
AJ16
VSS[60]
AJ20
VSS[61]
AJ22
VSS[62]
AJ26
VSS[63]
AJ30
VSS[64]
AJ34
VSS[65]
AJ38
VSS[66]
AJ42
VSS[67]
AJ45
VSS[68]
AJ48
VSS[69]
AJ7
VSS[70]
AK1
VSS[71]
AK52
VSS[72]
AL10
VSS[73]
AL13
VSS[74]
AL17
VSS[75]
AL21
VSS[76]
AL25
VSS[77]
AL28
VSS[78]
AL33
VSS[79]
AL36
VSS[80]
AL40
VSS[81]
AL43
VSS[82]
AL47
VSS[83]
AL61
VSS[84]
AM13
VSS[85]
AM20
VSS[86]
AM22
VSS[87]
AM26
VSS[88]
AM30
VSS[89]
AM34
VSS[90]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
VSS
VSS
1
AM38
VSS[91]
AM4
VSS[92]
AM42
VSS[93]
AM45
VSS[94]
AM48
VSS[95]
AM58
VSS[96]
AN1
VSS[97]
AN21
VSS[98]
AN25
VSS[99]
AN28
VSS[100]
AN33
VSS[101]
AN36
VSS[102]
AN40
VSS[103]
AN43
VSS[104]
AN47
VSS[105]
AN50
VSS[106]
AN54
VSS[107]
AP10
VSS[108]
AP51
VSS[109]
AP55
VSS[110]
AP7
VSS[111]
AR13
VSS[112]
AR17
VSS[113]
AR21
VSS[114]
AR41
VSS[115]
AR48
VSS[116]
AR61
VSS[117]
AR7
VSS[118]
AT14
VSS[119]
AT19
VSS[120]
AT36
VSS[121]
AT4
VSS[122]
AT45
VSS[123]
AT52
VSS[124]
AT58
VSS[125]
AU1
VSS[126]
AU11
VSS[127]
AU28
VSS[128]
AU32
VSS[129]
AU51
VSS[130]
AU7
VSS[131]
AV17
VSS[132]
AV21
VSS[133]
AV22
VSS[134]
AV34
VSS[135]
AV40
VSS[136]
AV48
VSS[137]
AV55
VSS[138]
AW13
VSS[139]
AW43
VSS[140]
AW61
VSS[141]
AW7
VSS[142]
AY14
VSS[143]
AY19
VSS[144]
AY30
VSS[145]
AY36
VSS[146]
AY4
VSS[147]
AY41
VSS[148]
AY45
VSS[149]
AY49
VSS[150]
AY55
VSS[151]
AY58
VSS[152]
AY9
VSS[153]
BA1
VSS[154]
BA11
VSS[155]
BA17
VSS[156]
BA21
VSS[157]
BA26
VSS[158]
BA32
VSS[159]
BA48
VSS[160]
BA51
VSS[161]
BB53
VSS[162]
BC13
VSS[163]
BC5
VSS[164]
BC57
VSS[165]
BD12
VSS[166]
BD16
VSS[167]
BD19
VSS[168]
BD23
VSS[169]
BD27
VSS[170]
BD32
VSS[171]
BD36
VSS[172]
BD40
VSS[173]
BD44
VSS[174]
BD48
VSS[175]
BD52
VSS[176]
BD56
VSS[177]
BD8
VSS[178]
BE5
VSS[179]
BG13
VSS[180]
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
S
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (6/6)
Sandy Bridge (6/6)
Sandy Bridge (6/6)
LA-7741
LA-7741
LA-7741
11 56Thursday, June 23, 2011
11 56Thursday, June 23, 2011
11 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
+V_DDR_REFA_M3
+V_DDR_REF
D D
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
All VREF traces should
have 10 mil trace width
DDR_A_DQS#[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
C C
Layout Note:
Place near JDIMM1
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD3
CD3
2
+1.5V_MEM
B B
A A
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD7
CD7
1
1
2
2
Layout Note:
Place near JDIMM1.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD17
CD17
2
1U_0402_6.3V6K~D
1
1
CD4
CD4
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD8
CD8
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD18
CD18
2
1
CD5
CD5
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD9
CD9
CD10
CD10
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD19
CD19
2
2
5
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD6
CD6
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CD13
@
1
CD13
CD51
CD51
CD11
CD11
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD20
CD20
1
1
2
+
+
2
2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
1 2
1 2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
330U_SX_2VY~D
330U_SX_2VY~D
CD14
CD14
1 2
RD7 0_0402_5%~DRD7 0_0402_5%~D
1 2
RD1 0_0402_5%~DRD1 0_0402_5%~D
+3.3V_RUN
4
+DIMM1_VREF_DQ
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DDR_A_D0
DDR_A_D1
CD2
1
2
DDR_CKE0_DIMMA<8>
DDR_CS1_DIMMA#<8>
4
CD2
1
CD1
CD1
2
DDR_A_BS2<8>
M_CLK_DDR0<8>
DDR_A_BS0<8>
DDR_A_WE#<8>
DDR_A_CAS#<8>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
CD21
CD21
2
2
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9 DDR_A_D13
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_BS2
DDR_A_MA3
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD22
CD22
+0.75V_DDR_VTT
JDIMM1 H=4
JDIMM1
JDIMM1
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
TYCO_2-2013022-2~D
TYCO_2-2013022-2~D
3
2-3A to 1 DIMMs/channel
+1.5V_MEM+1.5V_MEM
2
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
3
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
DDR_A_D20DDR_A_D16
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11DDR_A_MA12
DDR_A_MA7DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA4DDR_A_MA5
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
+0.75V_DDR_VTT
DDR_CKE1_DIMMA <8>
M_CLK_DDR1 < 8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
DDR_A_BS1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <8>
M_ODT0 <8>
M_ODT1 <8>
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD15
CD15
1
2
DDR_XDP_WAN_ SMBDAT <13,15,27,34>
DDR_XDP_WAN_ SMBCLK <13,15,27,34>
+DIMM1_VREF_CA
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD16
CD16
1
2
2
DDR_HVREF_RST<7>
2
1
+1.5V_MEM
12
RD27
RD27
1K_0402_1%~D
1K_0402_1%~D
DDR3_DRAMRST#_R
+DIMM0_1_VREF_CPU
DDR_HVREF_RST
+DIMM0_1_CA_CPU
DDR_HVREF_RST
1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D
RD29 0_0402_5%~D@ RD29 0_0402_5%~D@
1 2
QD1
QD1
D
S
D
S
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
13
G
G
2
RD30 0_0402_5%~D@ RD30 0_0402_5%~D@
1 2
QD2
QD2
D
S
D
S
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
13
G
G
2
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
RD11 0_0402_5%~DR D11 0_0402_5%~D
12
+V_DDR_REF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-7741
LA-7741
LA-7741
1
+V_DDR_REFA_M3
+V_DDR_REFB_M3
12 56Thursday, June 23, 2011
12 56Thursday, June 23, 2011
12 56Thursday, June 23, 2011
of
0.1
0.1
0.1
5
D D
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
DDR_B_DQS#[0..7]<8>
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
C C
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD25
CD25
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
B B
A A
10U_0603_6.3V6M~D
CD29
CD29
CD30
CD30
1
1
2
2
Layout Note:
Place near JDIMM2.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD39
CD39
2
Layout Note:
Place near JDIMM2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD26
CD26
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD31
CD31
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD40
CD40
2
2
5
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD27
CD27
CD28
CD28
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD32
CD32
CD33
CD33
CD34
CD34
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD42
CD42
CD41
CD41
2
All VREF traces should
have 10 mil trace width
330U_SX_2VY~D
330U_SX_2VY~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CD35
@
1
CD36
CD36
CD35
1
+
+
2
2
4
+V_DDR_REFB_M3
+V_DDR_REF
4
+DIMM2_VREF_DQ
1 2
RD8 0_0402_5%~DRD8 0_0402_5%~D
1 2
RD4 0_0402_5%~DRD4 0_0402_5%~D
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
+3.3V_RUN
RD5 10K_04 02_5%~DRD5 10K_0402_5%~D
12
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
CD23
CD23
2
+3.3V_RUN
3
+1.5V_MEM
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD24
CD24
1
2
DDR_CKE2_DIMMB<8>
DDR_B_BS2<8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_BS0<8>
DDR_B_WE#<8>
DDR_B_CAS#<8>
DDR_CS3_DIMMB#<8>
10K_0402_5%~D
10K_0402_5%~D
12
RD6
RD6
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+0.75V_DDR_VTT
CD43
CD43
1
1
2
2
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD44
CD44
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
TYCO_2-2013297-2~D
TYCO_2-2013297-2~D
CONN@JDIMM2
CONN@
VREF_CA
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
ODT0
VDD
ODT1
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND1
+1.5V_MEM
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
A11
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
110
112
114
S0#
116
118
120
122
NC
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
2
2-3A to 1 DIMMs/channel
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR3_DRAMRST#_R
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
+0.75V_DDR_VTT
JDIMMB H=8
DDR3_DRAMRST#_R <12>
DDR_CKE3_DIMMB <8>
M_CLK_DDR3 < 8>
M_CLK_DDR#3 <8>
DDR_B_BS1 <8>
DDR_B_RAS# <8>
DDR_CS2_DIMMB# <8>
M_ODT2 <8>
M_ODT3 <8>
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
2
DDR_XDP_WAN_ SMBDAT <12,15,27,34>
DDR_XDP_WAN_ SMBCLK <12,15,27,34>
+DIMM2_VREF_CA
1
CD37
CD37
2
RD15 0_0402_5%~DR D15 0_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD38
CD38
1
12
+V_DDR_REF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-7741
LA-7741
LA-7741
13 56Thursday, June 23, 2011
13 56Thursday, June 23, 2011
13 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
CMOS settingCMOS_CLR1
TPM setting
Clear ME RTC Registers
Keep ME RTC Registers
12
RH38
RH38
330K_0402_1%~D
330K_0402_1%~D
PCH_INTVRMEN
12
RH39
@RH39
@
330K_0402_1%~D
330K_0402_1%~D
1
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
PCH_AZ_CODEC_SDOUT<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_RST#<29>
PCH_AZ_CODEC_BITCLK<29>
27P_0402_50V8J~D
27P_0402_50V8J~D
Clear CMOSShunt
Keep CMOS
CH101
@CH101
@
Open
ME_CLR1
Shunt
Open
+RTC_CELL
D D
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
*
Low - Enable External VRs
C C
B B
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
+3.3V_ALW_PCH
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
+RTC_CELL
2
2
PCH_AZ_SDOUT
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D
PCH_AZ_SYNC_Q
1 2
RH26 33_0402_5%~DRH26 33_0402_5%~D
PCH_AZ_RST#
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
PCH_AZ_BITCLK
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
1
+3.3V_ALW_PCH
2
12
0_0603_5%~D
0_0603_5%~D
+3.3V_ALW_PCH_JTAG
12
RH66
RH66
1K_0402_1%~D
1K_0402_1%~D
PCH_AZ_SYNC
12
RH282
@RH282
@
100K_0402_5%~D
100K_0402_5%~D
1 2
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
CH4
CH4
CMOS place near DIMM
RH288
RH288
2
2
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
ME_FWP<39>
12
12
12
12
15P_0402_50V8J~D
15P_0402_50V8J~D
15P_0402_50V8J~D
15P_0402_50V8J~D
4
PCH_AZ_SYNC_Q
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
INTEL HDA_SYNC
isolation circuit
CH2
CH2
12
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
CH3
CH3
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R
12
+3.3V_ALW_PCH
12
12
RH48
RH48
100_0402_1%~D
100_0402_1%~D
+5V_RUN
1 2
RH286 0_0402_5%~DRH286 0_0402_5%~D
PCH_AZ_CODEC_SDIN0<29>
1 2
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
12
RH49
RH49
RH47
RH47
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
USB30_SMI#<28>
S
S
G
G
PCH_RTCX1
SPKR<29>
D
D
13
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
12
RH2
RH2
10M_0402_5%~D
10M_0402_5%~D
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_GPIO33
USB30_SMI#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
3
PCH_AZ_SYNC
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CH6
PXDP@
CH6
PXDP@
CH6 clsoe to JXDP2
SIO_PWRBTN#_R
PCH_RSMRST#_Q<16,41>
UH4A
UH4A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_ EN# / GPIO3 3
N32
HDA_DOCK_ RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
JTAG
JTAG
BBS_BIT0 - BIOS BOOT STRAP BIT 0
RH41 10K_0402_5%~DPXDP@ RH41 10K_0402_5%~DPXDP@
1
2
RTCIHDA
RTCIHDA
SPI
SPI
+3.3V_ALW_PCH
12
FWH0 / L AD0
FWH1 / L AD1
FWH2 / L AD2
FWH3 / L AD3
LPC
LPC
FWH4 / L FRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA
SATA
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMP O
SATA3COMPI
SATA3RBIA S
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
2
+3.3V_ALW_PCH+1.05V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
CH1
PXDP@
CH1
PXDP@
1
2
CH1 clsoe to JXDP2
1 2
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@
LPC_LAD0
C38
LPC_LAD1
A38
LPC_LAD2
B37
LPC_LAD3
C37
LPC_LFRAME#
D36
LPC_LDRQ0#
E36
LPC_LDRQ1#
K36
IRQ_SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
RBIAS_SATA3
AH1
SATA_ACT#
P3
HDD_DET#_R
V14
BBS_BIT0_R
P1
PCH_PLTRST#< 7,17>
RSMRST#_XDP
1.05V_0.8V_PWROK<40,51>
SIO_PWRBTN#_R<7,16>
+3.3V_ALW_PCH
XDP_DBRESET#<7,16>
RSMRST#_XDP
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSPCH_RSMRST#_Q RSMRST#_XDP
PCH_JTAG_TCK
LPC_LAD0 <32,34,39,40>
LPC_LAD1 <32,34,39,40>
LPC_LAD2 <32,34,39,40>
LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34,39,40>
LPC_LDRQ0# <39>
LPC_LDRQ1# <39>
IRQ_SERIRQ <32,39,40>
PSATA_PRX_DTX_N0_C <27>
PSATA_PRX_DTX_P0_C <27>
PSATA_PTX_DRX_N0_C <27>
PSATA_PTX_DRX_P0_C <27>
SATA_ODD_PRX_DTX_N1_C <28>
SATA_ODD_PRX_DTX_P1_C <28>
SATA_ODD_PTX_DRX_N1_C <28>
SATA_ODD_PTX_DRX_P1_C <28>
ESATA_PRX_DTX_N4_C <37>
ESATA_PRX_DTX_P4_C <37>
ESATA_PTX_DRX_N4_C <37>
ESATA_PTX_DRX_P4_C <37>
SATA_PRX_DKTX_N5_C <38>
SATA_PRX_DKTX_P5_C <38>
SATA_PTX_DKRX_N5_C <38>
SATA_PTX_DKRX_P5_C <38>
1 2
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
1 2
RH46 750_0402_1%~DRH46 750_0402_1%~D
SATA_ACT# <43>
1 2
RH290 0_0402_5%~DRH290 0_0402_5%~D
D
S
D
S
1 3
QH1 BSS138W-7-F_SOT323-3~D
QH1 BSS138W-7-F_SOT323-3~D
G
G
2
PXDP@
PXDP@
RH284 0_0402_5%~D
RH284 0_0402_5%~D
1 2
RH283 1K_0402_5%~D@ RH283 1K_0402_5%~D@
1.05V_0.8V_PWROK_R
1 2
PCH_PWRBTN#_XDP
1 2
RH21 0_0402_5%~D
RH21 0_0402_5%~D
PXDP@
PXDP@
+1.05V_RUN
+1.05V_RUN
1
+1.05V_RUN
PCH_GPIO33
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
IRQ_SERIRQ
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
BBS_BIT0_R
HDD
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
INTEL feedback 0302
ODD/ E Module Bay
SPKR
No Reboot Strap
SPKR
E-SATA
DOCK
+3.3V_RUN
12
RH30
RH30
10K_0402_5%~D
10K_0402_5%~D
PCH_SATA_MOD_EN# <40>
JXDP2
@JXDP2
@
1
OBSFN_A0
2
OBSFN_A1
3
GND
4
OBSDATA_A [0]
5
OBSDATA_A [1]
6
GND
7
OBSDATA_A [2]
8
OBSDATA_A [3]
9
GND
10
HOOK0
11
HOOK1
12
HOOK2
13
HOOK3
14
HOOK4
15
HOOK5
16
VCCOBS_A B
17
HOOK6
18
HOOK7
19
GND
20
TDO
21
TRSTn
22
TDI
23
TMS
TCK124GND
25
GND
26
TCK0
MOLEX_52435-2671
MOLEX_52435-2671
12
12
1 2
RH35 10K_0402_5%~D@ RH35 10K_0402_5%~D@
Low = Default
High = No Reboot
HDD_DET# <27>
GND
12
27
28
+3.3V_RUN
+3.3V_RUN
+3.3V_M +3.3V_M
12
200 MIL SO8
R890
@SPI R890
@SPI
3.3K_0402_5%~D
3.3K_0402_5%~D
PCH_SPI_CS0# PCH_SPI_CS0_R# PCH_SPI_CS1# PCH_SPI_CS1_R#
1 2
R935 0_0402_5%~D@SPI R935 0_0402_5%~D@SPI
PCH_SPI_DIN SPI_DIN64
1 2
R894 33_0402_5%~D@SPI R894 33_0402_5%~D@SPI
SPI_WP#_SEL SPI_WP#_SEL_R
SPI_WP#_SEL<39>
A A
R898 0_0402_5%~D@R898 0_0402_5%~D@
1 2
RF team request
5
64Mb Flash ROM 32Mb Flash ROM
U52
@SPIU52
@SPI
12P_0402_50V8J~D
12P_0402_50V8J~D
1
2
@
@
VCC
/HOLD
CLK
PCH_SPI_CLK
C1204
C1204
8
7
6
5
1
/CS
2
DO
3
/WP
GND4DIO
W25Q64CVSSIG_SO8~D
W25Q64CVSSIG_SO8~D
SPI_CLK64
SPI_DO64
C746
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
12
R891
@SPIR891
@SPI
3.3K_0402_5%~D
3.3K_0402_5%~D
1 2
R899 33_0402_5%~D@SPI R899 33_0402_5%~D@SPI
1 2
R901 33_0402_5%~D@SPI R901 33_0402_5%~D@SPI
4
@SPIC746
@SPI
PCH_SPI_CS0#
+3.3V_M
PCH_SPI_CLK
PCH_SPI_DO
SPI_DO32
SPI_CLK32
JTAA1
CONN@JTAA1
CONN@
112
334
556
778
9910
111112
G113G2
G315G4
G517G6
TYCO_5-1775013-4~D
TYCO_5-1775013-4~D
Link Done
1 2
R936 0_0402_5%~DR936 0_0402_5%~D
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
2
4
SPI_DIN32
6
8
PCH_SPI_CS1_R#
10
12
14
16
18
C745
C745
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
200 MIL SO8
U53
@SPIU53
@SPI
1
SPI_DIN32PCH_SPI_DINSPI_HOLD#
SPI_WP#_SEL_R
2
3
4
W25Q32BVSSIG_SO8~D
W25Q32BVSSIG_SO8~D
TAA config R895,R897,R900 need change to 0 ohm SD02800008L
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
8
CS#
VCC
SPI_HOLD#
7
DO
HOLD#
SPI_CLK32
6
WP#
CLK
SPI_DO32
5
GND
DI
R897 33_0402_5%~DR897 33_0402_5%~D
R900 33_0402_5%~DR900 33_0402_5%~D
1 2
1 2
2
PCH_SPI_CLK
PCH_SPI_DO
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-7741
LA-7741
LA-7741
14 56Thursday, June 23, 2011
14 56Thursday, June 23, 2011
14 56Thursday, June 23, 2011
1
of
0.1
0.1
0.1
5
Follow DG0.9 Device
D D
down & Express/Mini
card topology
PCIE_PRX_WANTX_N 1<34>
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
EXPRESS Card--->
E3 Module Bay--->
1/2vMINI CARD-3 PCIE
(Mini Card 3)--->
C C
MMI --->
10/100/1G LAN --->
MiniWWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI Card--->
B B
MiniWPAN (Mini Card 3)--->
Express card--->
MiniWLAN (Mini Card 2)--->
eModule Bay--->
A A
PCIE_PRX_WANTX_P 1<34>
PCIE_PTX_WANRX_N 1<34>
PCIE_PTX_WANRX_P 1<34>
PCIE_PRX_WLANTX_ N2<34>
PCIE_PRX_WLANTX_ P2<34>
PCIE_PTX_WLANRX_ N2<34>
PCIE_PTX_WLANRX_ P2<34>
PCIE_PRX_EXPTX_N3<35>
PCIE_PRX_EXPTX_P3<35>
PCIE_PTX_EXPRX_N3<35>
PCIE_PTX_EXPRX_P3<35>
PCIE_PRX_EMBTX_N4<28>
PCIE_PRX_EMBTX_P4<28>
PCIE_PTX_EMBRX_N4<28>
PCIE_PTX_EMBRX_P4<28>
PCIE_PRX_WPANTX _N5<34>
PCIE_PRX_WPANTX _P5<34>
PCIE_PTX_WPANRX _N5<34>
PCIE_PTX_WPANRX _P5<34>
PCIE_PRX_MMITX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_N6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_GLANTX_N7<31>
PCIE_PRX_GLANTX_P7<31>
PCIE_PTX_GLANRX_N7<31>
PCIE_PTX_GLANRX_P7<31>
CLK_PCIE_MINI1#<34>
CLK_PCIE_MINI1<34>
+3.3V_ALW_PCH
MINI1CLK_REQ#<34>
CLK_PCIE_LAN#<31>
CLK_PCIE_LAN<31>
LANCLK_REQ#<31>
CLK_PCIE_MMI#<33>
CLK_PCIE_MMI<33>
+3.3V_RUN
MMICLK_REQ#<33>
CLK_PCIE_MINI3#<34>
CLK_PCIE_MINI3<34>
+3.3V_ALW_PCH
MINI3CLK_REQ#<34>
CLK_PCIE_EXP#< 35>
CLK_PCIE_EXP<35>
+3.3V_ALW_PCH
EXPCLK_REQ#<35>
CLK_PCIE_MINI2#<34>
CLK_PCIE_MINI2<34>
+3.3V_ALW_PCH
MINI2CLK_REQ#<34>
+3.3V_ALW_PCH
CLK_PCIE_EMB#<28>
CLK_PCIE_EMB<28>
+3.3V_ALW_PCH
EMBCLK_REQ#<28>
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH87 10K_0402_5%~DRH87 10K_0402_5%~D
RH152 10K_0402_5%~DRH152 10K_0402_5%~D
RH94 10K_0402_5%~DRH94 10K_0402_5%~D
RH97 10K_0402_5%~DRH97 10K_0402_5%~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
RH104 10K_0402_5%~DRH104 10K_0402_5%~D
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
5
1 2
1 2
4
12
12
12
12
12
4
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
PCIE_PTX_WANRX_N 1
PCIE_PTX_WANRX_P 1
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2
PCIE_PTX_WLANRX_ P2
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
PCIE_PRX_EMBTX_N4
PCIE_PRX_EMBTX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_EMBRX_P4
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
PCIE_PTX_WPANRX _N5
PCIE_PTX_WPANRX _P5
PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
MINI1CLK_REQ#
LANCLK_REQ#
MMICLK_REQ#
MINI3CLK_REQ#
EXPCLK_REQ#
MINI2CLK_REQ#
PEG_B_CLKRQ#
EMBCLK_REQ#
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
3
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
PCI_TPM_TCM
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
LAN_SMBCLK
LAN_SMBDATA
PCH_GPIO74
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
PEG_A_CLKRQ#
CLK_CPU_DMI#
CLK_CPU_DMI
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN
XTAL25_OUT
+XCLK_RCOMP
SIO_14M
CLK_80H
JETWAY_14M
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
2
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH <7>
LAN_SMBCLK <31>
LAN_SMBDATA <31>
SML1_SMBCLK <40>
SML1_SMBDATA <40>
PCH_CL_CLK1 <34>
PCH_CL_DATA1 <34>
PCH_CL_RST1# < 34>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
1 2
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH311 22_0402_5%~DRH311 22_0402_5%~D
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH314 22_0402_5%~DRH314 22_0402_5%~D
RH315 22_0402_5%~D@RH315 22_0402_5%~D@
12
12
12
12
2
+3.3V_RUN
QH5A
QH5A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
6 1
5
3
4
QH5B
QH5B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
PCH_GPIO74
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
PEG_A_CLKRQ#
LAN_SMBCLK
LAN_SMBDATA
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
DDR_XDP_WAN_ SMBCLK <12,13,27,34>
DDR_XDP_WAN_ SMBDAT <12,13,27,34>
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
RH300 1K_0402_1%~DRH300 1K_0402_1%~D
RH301 10K_0402_5%~DRH301 10K_0402_5%~D
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
RH304 10K_0402_5%~DRH304 10K_0402_5%~D
RH80 10K_0402_5%~DRH80 10K_0402_5%~D
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
RH74 10K_0402_5%~DRH74 10K_0402_5%~D
RH75 10K_0402_5%~DRH75 10K_0402_5%~D
RH91 10K_0402_5%~DRH91 10K_0402_5%~D
RH76 10K_0402_5%~DRH76 10K_0402_5%~D
RH77 10K_0402_5%~DRH77 10K_0402_5%~D
RH78 10K_0402_5%~DRH78 10K_0402_5%~D
RH79 10K_0402_5%~DRH79 10K_0402_5%~D
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
CLOCK TERMINATION for FCIM and need close to PCH
CLK_PCI_TPM_TCM
CLK_SIO_14M
PCLK_80H
+1.05V_RUN
CLK_PCI_TPM_TCM <32>
CLK_SIO_14M <39>
PCLK_80H <34>
JETWAY_CLK14M <32>
1
1
@CH113
@
@CH111
@
2
2
CH113
CH111
27P_0402_50V8J~D
27P_0402_50V8J~D
27P_0402_50V8J~D
27P_0402_50V8J~D
RH309 0_0402_5%~DRH309 0_0402_5%~D
12
RH99
RH99
1M_0402_5%~D
1M_0402_5%~D
2
CH18
CH18
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-7741
LA-7741
LA-7741
1
+3.3V_ALW_PCH
1 2
1 2
+3.3V_ALW_PCH
12
12
12
12
12
12
+3.3V_LAN
12
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1
RF request
@CH112
@
2
CH112
27P_0402_50V8J~D
27P_0402_50V8J~D
12
YH2
YH2
3
IN
OUT
4
GND
GND
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
12P_0402_50V8J~D
12P_0402_50V8J~D
15 56Thursday, June 23, 2011
15 56Thursday, June 23, 2011
15 56Thursday, June 23, 2011
1
1
2
2
CH19
CH19
1
12P_0402_50V8J~D
12P_0402_50V8J~D
0.1
0.1
0.1
5
+3.3V_ALW_PCH
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_COMP_R
RBIAS_CPY
SUSACK#_R
XDP_DBRESET#
SYS_PWROK_R
PCH_PWROK
PM_APWROK_R
PM_DRAM_PWRGD_R
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SIO_PWRBTN#_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
SUS_STAT#/LPCPD#
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
PCH_RI#
CLKRUN#
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_ACK_R SUSACK#_R
PCH_RSMRST#_Q
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
1 2
RH318 10K_0402_5%~D@ RH318 10K_0402_5%~D@
1 2
RH144 10K_0402_5%~DRH1 44 10K_0402_5%~D
D D
+3.3V_RUN
C C
+1.05V_RUN
1 2
RH111 49.9_0402_1%~DRH 111 49.9_0402_1%~D
1 2
RH112 750_0402_1%~DRH112 750_0 402_1%~D
SUSACK#<39> PCH_DPWROK <39>
B B
SYS_PWROK<7,39>
RESET_OUT#<4 0>
PM_APWROK<40>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q<14, 41>
ME_SUS_PWR_ACK<40 >
SIO_PWRBTN#_R<7,14>
SIO_PWRBTN#<40>
AC_PRESENT<40>
+3.3V_ALW_PCH
A A
1 2
RH142 10K_0402_5%~DRH1 42 10K_0402_5%~D
1 2
RH319 10K_0402_5%~D@ RH319 10K_0402_5%~D@
1 2
RH140 10K_0402_5%~DRH1 40 10K_0402_5%~D
1 2
RH137 8 .2K_0402_5%~DRH137 8.2K_0402_5 %~D
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_P2<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CRX_PTX_P1<6>
DMI_CRX_PTX_P2<6>
DMI_CRX_PTX_P3<6>
1 2
RH114 0_0402_5%~D@ RH114 0_0402_5%~D@
XDP_DBRESET#<7,14>
1 2
RH116 0_0402_5%~DRH116 0_0402_5%~D
1 2
RH117 0_0402_5%~DRH117 0_0402_5%~D
1 2
RH118 0_0402_5%~DRH118 0_0402_5%~D
1 2
RH320 0_0402_5%~DRH320 0_0402_5%~D
1 2
RH120 0_0402_5%~DRH120 0_0402_5%~D
1 2
RH121 0_0402_5%~DRH121 0_0402_5%~D
1 2
RH122 0_0402_5%~DRH122 0_0402_5%~D
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~ D
4
1 2
RH113 0_0402_5%~DRH113 0_0402_5%~D
SYS_PWROKRESET_OUT#
1 2
RH321 0_0402_5%~D@ RH321 0_0402_5%~D@
1 2
RH323 0_0402_5%~DRH323 0_0402_5%~D
1 2
RH322 10K_0402_5%~D@ RH322 10K_0402_5 %~D@
FDI_CTX_PRX_N0
BJ14
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
DMI
DMI
System Power Management
System Power Management
FDI_RXP7
FDI
FDI
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
SIO_SLP_LAN#
3
PCH_CRT_BLU
1 2
RH131 150 _0402_1%~DRH131 150_0402_ 1%~D
RH132 150 _0402_1%~DRH132 150_0402_ 1%~D
RH133 150 _0402_1%~DRH133 150_0402_ 1%~D
RH134 100 K_0402_5%~DRH134 100 K_0402_5%~D
1 2
1 2
1 2
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
DSWODVREN - On Die DSW VR Enable
Enabled (DEFAULT)
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
RH127 3 30K_0402_1%~DRH127 330K_0402_1%~ D
1 2
RH129 3 30K_0402_1%~D@RH12 9 330K_0402_1%~D@
1 2
PCH_PCIE_WAKE# <40>
CLKRUN# <32,39,40>
T56 PAD~DT56 PAD~D
T57 PAD~DT57 PAD~D
T58 PAD~DT58 PAD~D
SIO_SLP_S5# <40>
T59 PAD~DT59 PAD~D
SIO_SLP_S4# <39>
T60 PAD~DT60 PAD~D
SIO_SLP_S3# <11,27,35,3 9,42,48>
T61 PAD~DT61 PAD~D
SIO_SLP_A# <39,42,49>
T62 PAD~DT62 PAD~D
SIO_SLP_SUS# <39>
T63 PAD~DT63 PAD~D
H_PM_SYNC <7>
SIO_SLP_LAN# < 31,39>
+RTC_CELL
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
PANEL_BKEN_PCH< 23>
ENVDD_PCH<23,39>
BIA_PWM_PCH<23>
LDDC_CLK_PCH<23>
LDDC_DATA_PCH<23>
1 2
Minimum speacing of 20mils for LVD_IBG
PCH_CRT_HSYNC<24 >
PCH_CRT_VSYNC<24>
RH344 2.3 7K_0402_1%~DRH344 2.3 7K_0402_1%~D
LCD_ACLK-_PCH<23 >
LCD_ACLK+_PCH<23>
LCD_A0-_PCH<23>
LCD_A1-_PCH<23>
LCD_A2-_PCH<23>
LCD_A0+_PCH<23>
LCD_A1+_PCH<23>
LCD_A2+_PCH<23>
PCH_CRT_BLU<24 >
PCH_CRT_GRN<24>
PCH_CRT_RED<2 4>
RH123 20_0402_1%~DRH123 20_0 402_1%~D
1 2
1 2
RH124 20_0402_1%~DRH124 20_0 402_1%~D
1K_0402_0.5%~D
1K_0402_0.5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
RH316
RH316
PANEL_BKEN_PCH
ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH
LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
HSYNC
VSYNC
CRT_IREF
12
RH126
RH126
RH317
RH317
2
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
J47
M45
P45
T40
K47
T45
P39
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
N48
P49
T49
T39
M40
M47
M49
T43
T42
RH351 2.2K_0402_5%~DRH351 2.2K_0402_5%~D
RH352 2.2K_0402_5%~DRH352 2.2K_0402_5%~D
UH4D
UH4D
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
PCH_CRT_DDC_CLK <24>
PCH_CRT_DDC_DAT <24>
+3.3V_RUN
12
12
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
CRT
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
HDMIB_PCH_HPD <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_P0 <25>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_CLK <25>
PCH_DDPC_CTRLCLK <26>
PCH_DDPC_CTRLDATA <26>
DPC_PCH_DOCK_AUX# <26>
DPC_PCH_DOCK_AUX <26>
DPC_PCH_DOCK_HPD <3 8>
DPC_PCH_LANE_N0 <38>
DPC_PCH_LANE_P0 <38>
DPC_PCH_LANE_N1 <38>
DPC_PCH_LANE_P1 <38>
DPC_PCH_LANE_N2 <38>
DPC_PCH_LANE_P2 <38>
DPC_PCH_LANE_N3 <38>
DPC_PCH_LANE_P3 <38>
PCH_DDPD_CTRLCLK <26>
PCH_DDPD_CTRLDATA <26>
DPD_PCH_DOCK_AUX# <26>
DPD_PCH_DOCK_AUX <26>
DPD_PCH_DOCK_HPD <3 8>
DPD_PCH_LANE_N0 <38>
DPD_PCH_LANE_P0 <38>
DPD_PCH_LANE_N1 <38>
DPD_PCH_LANE_P1 <38>
DPD_PCH_LANE_N2 <38>
DPD_PCH_LANE_P2 <38>
DPD_PCH_LANE_N3 <38>
DPD_PCH_LANE_P3 <38>
1
PCH_SDVO_CTRLCLK <25>
PCH_SDVO_CTRLDATA <25>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-7741
LA-7741
LA-7741
1
16 56Thursday, June 23, 2011
16 56Thursday, June 23, 2011
16 56Thursday, June 23, 2011
0.1
0.1
0.1
of
+3.3V_RUN
5
4
3
2
1
@CH108
@
CH108
1
2
27P_0402_50V8J~D
27P_0402_50V8J~D
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
CAM_MIC_CBL_DET#
BT_DET#
PCH_GPIO3
1
1
@CH109
@
@CH110
@
2
2
CH109
CH110
27P_0402_50V8J~D
27P_0402_50V8J~D
PLTRST_USH#<32>
PLTRST_MMI#<33>
PLTRST_XDP#<7>
PLTRST_LAN#<31>
PLTRST_EMB#<28>
CLK_PCI_5048
CLK_PCI_MEC
CLK_PCI_DOCK
CLK_PCI_LOOPBACK
RF request
RH335 0_0402_5%~DRH335 0_0402_5%~D
RH336 0_0402_5%~DRH336 0_0402_5%~D
RH337 0_0402_5%~DRH337 0_0402_5%~D
RH338 0_0402_5%~DRH338 0_0402_5%~D
RH340 0_0402_5%~DRH340 0_0402_5%~D
CLK_PCI_5048<39>
CLK_PCI_MEC<40>
CLK_PCI_DOCK<38>
CLK_PCI_LOOPBACK<15>
HDD_FALL_INT< 27>
1 2
1 2
1 2
1 2
1 2
USB3RN1<36>
USB3RN2<36>
USB3RN4<38>
USB3RP1<36>
USB3RP2<36>
USB3RP4<38>
USB3TN1<36>
USB3TN2<36>
USB3TN4<38>
USB3TP1<36>
USB3TP2<36>
USB3TP4<38>
PCIE_MCARD2_DET#<34>
BT_DET#<41>
LCD_CBL_DET#<23>
CAM_MIC_CBL_DET#<23>
1 2
RH334 0_0402_5%~DRH334 0_0402_5%~D
1 2
12
12
12
RH160 22_0402_5%~DRH160 22_0402_5%~D
RH102 22_0402_5%~DRH102 22_0402_5%~D
RH103 22_0402_5%~DRH103 22_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
BT_DET#
BBS_BIT1
PCI_GNT3#
LCD_CBL_DET#
PCH_GPIO3
CAM_MIC_CBL_DET#
FFS_PCH_INT
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048
PCI_MEC
PCI_DOCK
PCI_LOOPBACKOUT
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
RSVD
RSVD
USB30
USB30
PCI
PCI
USB
USB
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USBP0USBP0+
USBP1USBP1+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
USBP12USBP12+
USBRBIAS
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
USBP0- <36>
USBP0+ <36>
USBP1- <36>
USBP1+ <36>
USBP3- <38>
USBP3+ <38>
USBP4- <34>
USBP4+ <34>
USBP5- <34>
USBP5+ <34>
USBP6- <34>
USBP6+ <34>
USBP7- <32>
USBP7+ <32>
USBP8- <38>
USBP8+ <38>
USBP9- <37>
USBP9+ <37>
USBP10- <35>
USBP10+ <35>
USBP11- <41>
USBP11+ <41>
USBP12- <23>
USBP12+ <23>
Within 500 mils
1 2
RH151
RH151
22.6_0402_1%~D
22.6_0402_1%~D
1 2
RH339 0_0402_5%~DRH339 0_0402_5%~D
USB_OC4#
1 2
RH356 0_0402_5%~DRH356 0_0402_5%~D
SIO_EXT_SMI#
----->Right Side
----->Rear Left side
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->PP
----->USH
----->DOCK
----->Right side E-SATA
----->Express Card
----->Blue Tooth
----->Camera
USB_OC0# <36>
USB_OC4# <36>
SIO_EXT_SMI# <40>
INTEL feedback 0307
USB_OC0#_R
USB_OC1#_R
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
USB_OC2#
+3.3V_ALW_PCH
RPH1
RPH1
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
RPH2
RPH2
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
1 2
D D
C C
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH332 10K_0402_5%~D@RH332 10K_0402_5%~D@
PCI_GNT3#
12
RH333
@RH333
@
1K_0402_1%~D
1K_0402_1%~D
A16 swap overri de Strap/Top-B lock
Swap Override jumper
1
@CH107
@
2
CH107
27P_0402_50V8J~D
27P_0402_50V8J~D
27P_0402_50V8J~D
27P_0402_50V8J~D
Low = A16 swap
High = Default
PCI_GNT#3
B B
+3.3V_RUN
CH102
CH102
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
A A
PCH_PLTRST#<7,14>
PCH_PLTRST#
5
5
1
P
B
2
A
G
3
UH3
UH3
PCH_PLTRST#_EC
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
PCH_PLTRST#_EC <32,34,35,39,40>
4
Boot BIOS Strap
BBS_BIT1 Boot BIOS Location
*
SATA_SLPD
(BBS_BIT0)
0 0
0 1
1 0
1 1
LPC
Reserved (NAND)
PCI
SPI
3
BBS_BIT1
12
@RH342
@
1K_0402_1%~D
1K_0402_1%~D
RH342
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-7741
LA-7741
LA-7741
17 56Thursday, June 23, 2011
17 56Thursday, June 23, 2011
17 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
4
3
2
1
+3.3V_ALW_PCH
RH53
RH53
4.7K_0402_5%~D
D D
C C
B B
A A
4.7K_0402_5%~D
1 2
SLP_ME_CSW_DE V#
12
RH353
RH353
1K_0402_1%~D
1K_0402_1%~D
@
@
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
+3.3V_ALW_PCH
SIO_EXT_WAKE# USH_DET#
RH177 10K_0402_5%~DRH177 10K_0402_5%~D
RH354 1K_0402_1%~DRH354 1K_0402_1%~D
+3.3V_ALW_PCH
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
+3.3V_RUN
RH171 10K_0402_5%~D@RH171 10K_0402_5%~D@
RH173 1K_0402_1%~D@RH173 1K_0402_1%~D@
1 2
RH272 10K_0402_5%~DRH272 10K_0402_5%~D
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
1 2
RH178 10K_0402_5%~DRH178 10K_0402_5%~D
1 2
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D
1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D
12
12
12
12
12
12
PCH_GPIO15
PCH_GPIO36
12
PCH_GPIO37
12
PCH_GPIO17
12
PCH_GPIO16
12
KB_DET#
PCH_GPIO36
PCH_GPIO37
PCH_GPIO16
TEMP_ALERT#
MEDIA_DET#
PCH_GPIO7
PCH_GPIO17
IO_LOOP#
5
1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D
RH172 10K_0402_5%~DRH172 10K_0402_5%~D
RH273 1K_0402_1%~D@RH273 1K_0402_1%~D@
RH265 10K_0402_5%~D@RH265 10K_0402_5%~D@
SIO_EXT_SCI#<40>
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
SIO_EXT_SCI#
USH_DET#<32>
IO_LOOP#<30 >
SIO_EXT_WAKE#<39>
PM_LANPHY_ENABLE<31>
MEDIA_DET#<30>
PCIE_MCARD1_DET#<34>
EXPRCRD_DET#<35>
SLP_ME_CSW_DE V#<39>
USB_MCARD1_DET#<34>
TEMP_ALERT#<39>
TPM_ID0
RH259 0_0402_5%~DRH259 0_0402_5%~D
FFS_INT2<27>
KB_DET#<41>
+3.3V_RUN
RH267
1@ RH267
1@
10K_0402_5%~D
10K_0402_5%~D
1 2
RH270
2@ RH270
2@
10K_0402_5%~D
10K_0402_5%~D
1 2
1 2
SIO_EXT_SCI#_R
USH_DET#
IO_LOOP#
PCH_GPIO7
PM_LANPHY_ENABLE
PCH_GPIO15
PCH_GPIO16
PCH_GPIO17
MEDIA_DET#
EXPRCRD_DET#
SLP_ME_CSW_DE V#
USB_MCARD1_DET#
PCH_GPIO36
PCH_GPIO37
TPM_ID0
TPM_ID1
FFS_INT2
TEMP_ALERT#
KB_DET#
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
+3.3V_RUN
TPM_ID1
4
12
RH268
3@ RH 268
3@
20K_0402_5%~D
20K_0402_5%~D
12
RH271
4@ RH 271
4@
2.2K_0402_5%~D
2.2K_0402_5%~D
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49 / TEMP_ALERT#
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
China TPM
No TPM, No China TPM
USH1.0 (For SSI)
USH2.0
GPIO
GPIO
NCTF
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
0
0
1 1
3
TPM_ID1TPM_ID0
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
0
1
01
CONTACTLESS_DET#
PCH_GPIO69
PCIE_MCARD3_DET#
SIO_A20GATE
SIO_RCIN#
H_CPUPWRGD
PCH_THRMTRIP#_R
INIT3_3V#
DF_TVS
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
CONTACTLESS_DET# <32>
PCIE_MCARD3_DET# <34>
USB_MCARD2_DET# <34>
SIO_A20GATE <40>
SIO_RCIN# <40>
H_CPUPWRGD <7>
T106PAD~D@T106PAD~D
@
T108PAD~D @T108PAD~D @
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
1
2
H_SNB_IVB#<7>
2
+1.05V_RUN_VTT
12
RH262 56_0402_5%~DRH262 56_0402_5%~D
CH97
CH97
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
RH150 0_0402_5%~DR H150 0_0402_5%~D
CONTACTLESS_DET#
PCH_GPIO69
RH256 10K _0402_5%~DRH256 10K_0402_5%~D
RH260 1.5K_0402 _1%~DRH260 1.5K_0402_1%~D
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
PLACE RH150 CLO SE TO THE BRAN CHING POINT
( TO CPU and NV RAM CONNECTOR)
+VCCDFTERM
12
RH149
RH149
2.2K_0402_5%~D
2.2K_0402_5%~D
12
1 2
RH158 10K_0402_5%~DRH158 10K_0402_5%~D
RH203 10K_0402_5%~DRH203 10K_0402_5%~D
1 2
RH263 10K_0402_5%~DRH263 10K_0402_5%~D
1 2
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
RH149 need to close to CPU
1 2
RH358 1K_0402_1%~DRH358 1K_0402_1%~D
DMI & FDI Termination Voltage
DF_TVS
Set to Vss when LOW
Set to Vcc when HIGH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-7741
LA-7741
LA-7741
+3.3V_RUN
+3.3V_RUN
12
12
DF_TVSDF_TVS_R
0.1
0.1
18 56Thursday, June 23, 2011
18 56Thursday, June 23, 2011
18 56Thursday, June 23, 2011
1
0.1
of
5
4
3
2
1
LH1
POWER
+1.05V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH30
CH30
CH32
CH32
2
D D
+1.05V_RUN
+1.05V_RUN
C C
+3.3V_RUN
B B
@ RH247
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
1 2
RH247
CH51
CH51
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
2
+1.05V_RUN
1UH_LB2012T1R0M_20%~D
1UH_LB2012T1R0M_20%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH44
CH44
2
+1.05V_RUN_VTT
1
CH46
CH46
CH45
CH45
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN
1
2
1U_0402_6.3V6K~D
1
1
CH33
CH33
CH31
CH31
2
2
+VCCAPLLEXP
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
@
@
CH40
CH40
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH47
CH47
CH48
CH48
2
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
DMI
DMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+VCCADAC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
CH34
CH34
2
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH103
CH103
2
1
CH43
CH43
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCCLKDMI
1
CH50
CH50
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+VCCDFTERM
1
CH52
CH52
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+VCCSPI
1
CH54
CH54
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
CH35
CH35
LH1
BLM18PG181SN1_0603~D
BLM18PG181SN1_0603~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH36
CH36
2
+1.8V_RUN_LVDS
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH104
CH104
2
+3.3V_RUN
CH49
CH49
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
RH205 0_0603_5%~DRH205 0_0603_5%~D
1
CH106
CH106
2
PJP66
PJP66
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
RH202 0_0603_5%~DRH202 0_0603_5%~D
RH204 0_0603_5%~D@ RH204 0_0603_5%~D@
12
+3.3V_RUN
100NH_HK1608R10J-T_5%_0603~D
100NH_HK1608R10J-T_5%_0603~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH105
CH105
1
2
+1.05V_RUN_VTT
12
INTEL feedback 0302
12
12
INTEL feedback 0307
LH8
LH8
12
0.1uH inductor, 200mA
CPN: SHI0110BJ0L
+1.05V_RUN
+1.8V_RUN
+3.3V_M
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.1
S0 Iccmax
Current (A)
0.001
5
5
0.001
0.001
0.228
0.063
0.08
0.08
1.7
0.047
1.05VccIO 3.711
VccASW
VccSPI
VccDSW3_3 0.001
1.05
3.3
3.3
0.903
0.01
1.8 0.002VCCDFTERM
3.3VccRTC 2 (mA)
3.3VccSus3_3
3.3VccSusHDA
0.095
0.01
VccVRM 1.5 0. 167
1.05VccClkDMI 0.07
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8VccTX_LVDS 0.04
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
RH197 0_0603_5%~DRH197 0_0603_5%~D
A A
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/8)
PCH (6/8)
PCH (6/8)
LA-7741
LA-7741
LA-7741
19 56Thursday, June 23, 2011
19 56Thursday, June 23, 2011
19 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
4
3
2
1
+5V_ALW_PCH+5V_ALW
+3.3V_ALW_PCH
+3.3V_ALW2
D D
+1.05V_RUN
C C
+3.3V_RUN
1 2
RH215 0.022_0805_ 1%RH215 0.022_0805_1%
Note: If EMI concern, pop
1 2
RH201 0_0402_5%~DRH201 0_0402_5%~D
1 2
RH253 0_0402_5%~D@ RH253 0_0402_5%~D@
LH3
@ LH 3
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
+1.05V_M
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
@
@
CH58
CH58
2
1
CH55
CH55
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_RUN
+3.3V_RUN_VCC_CLKF33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH74
CH74
@
@
CH73
CH73
2
2
+VCCAPLL_CPY_PCH
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH64
CH64
CH65
1
2
1
2
CH65
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH68
CH68
CH67
CH67
2
+VCCDSW3_3
+3.3V_RUN_VCC_CLKF33
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH69
CH69
2
with SHI00008S0L, 10UH +-20%
Note: Place VCCDIFFCLKN with a trace
specially for XCLK_RCOMP (RH100.2)
B B
+1.05V_RUN_VTT
A A
+1.05V_RUN
+1.05V_RUN
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
5
1
CH85
CH85
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
LH6
LH6
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
1 2
LH7
LH7
1
CH96
CH96
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1
CH94
CH94
+
+
2
1
CH78
CH78
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH79
CH79
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1 2
CH84
CH84
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
CH86
CH86
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH92
CH92
CH95
CH95
1
2
1
+
+
2
2
CH81
CH81
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
+RTC_CELL
CH87
CH87
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH93
CH93
4
+VCCRTCEXT
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+VCCSST
1
1
CH89
CH89
CH88
CH88
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
UH4J
UH4J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
1
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
CH90
CH90
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
POWER
POWER
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
VCCAPLLSATA
SATA USB
SATA USB
VCCASW[22]
VCCASW[23]
HDA
HDA
VCCASW[21]
VCCSUSHDA
3
CPURTC
CPURTC
1
CH56
CH56
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH59
CH59
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+PCH_V5REF_SUS
+PCH_V5REF_RUN
1
2
1
CH91
CH91
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
2
CH70
CH70
1U_0603_10V7K~D
1U_0603_10V7K~D
+3.3V_RUN
1
CH76
CH76
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+VCCSATAPLL
+1.05V_+1.5V_1.8V_RUN
1
CH82
CH82
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
CH60
CH60
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH66
CH66
2
1
CH72
CH72
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
2
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
CH75
CH75
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH77
CH77
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
@CH80
@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
+1.05V_M
+3.3V_ALW_PCH
+3.3V_ALW_PCH
CRB 0.7 RH208,RH213 trace width 20mil.
+3.3V_RUN
+1.05V_RUN
LH5
@LH5
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
CH80
+3.3V_ALW_PCH
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
ize Document Number R ev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet
Date: Sheet of
Date: Sheet of
D
S
D
S
1 3
QH4
RH208
RH208
RH213
RH213
PCH (7/8)
PCH (7/8)
PCH (7/8)
LA-7741
LA-7741
LA-7741
QH4
+3.3V_ALW_PCH+5V_ALW_PC H
12
+3.3V_RUN+5V_RUN
12
+1.05V_RUN
1
G
G
2
21
DH2
DH2
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_SUS
1
CH63
CH63
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
21
DH3
DH3
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_RUN
1
CH71
CH71
1U_0603_10V7K~D
1U_0603_10V7K~D
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
ALW_ENABLE< 42>
10_0402_1%~D
10_0402_1%~D
10_0402_1%~D
10_0402_1%~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
12
1
RH278
RH278
CH98
CH98
2
20 56Thursday, June 23, 2011
20 56Thursday, June 23, 2011
20 56Thursday, June 23, 2011
20K_0402_5%~D
20K_0402_5%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1
0.1
0.1
of
5
D D
C C
B B
A A
UH4H
UH4H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
2
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8)
PCH (8/8)
PCH (8/8)
LA-7741
LA-7741
LA-7741
21 56Thursday, June 23, 2011
21 56Thursday, June 23, 2011
21 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
4
3
2
1
+FAN1_VOUT
Place under CPU
Place C266 close to the Q12 as possible
C
@
@
D D
100P_0402_50V8J~D
100P_0402_50V8J~D
C C
100P_0402_50V8J~D
100P_0402_50V8J~D
B B
2
C266
C266
1
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP5/DN5 for Skin on Q13, place Q13 close to Vcore VR choke.
1
C272
@C272
@
2
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
2
B
B
E
E
Q12
Q12
3 1
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1
E
E
31
@
2
+1.05V_RUN_VTT
H_THERMTRIP#<7>
@
C277
C277
B
B
2
Q13
Q13
C
C
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
1 2
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
C
C
2
B
B
E
E
3 1
Q14
Q14
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE2_P_4022
REM_DIODE2_N_4022
R399
R399
2.2K_0402_5%~D
2.2K_0402_5%~D
2
B
B
Q16
Q16
+3.3V_M
12
C
C
E
E
3 1
R395
R395
8.2K_0402_5%~D
8.2K_0402_5%~D
THERMATRIP2#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C278
C278
1
2
+5V_RUN
1
2
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C276
C276
C275
C275
1
+3.3V_RUN
2
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C305
C305
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C738
C738
1
2
+3.3V_M
1 2
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7 K~D
C271 2200P_0402_50V7K~DC271 2200P_0402_50V7 K~D
MAX8731_IINP<53>
12
R404
R404
10K_0402_5%~D
10K_0402_5%~D
SMSC request
PCH_PWRGD#<40>
1 2
R389 10K_040 2_5%~DR389 10K_0402_5%~D
12
RB751S40T1_SOD523-2~DD2RB751S40T1_SOD523-2~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C219
C219
D2
1
2
2 1
VDD_PWRGD
REM_DIODE1_N_4022
REM_DIODE1_P_4022
REM_DIODE2_N_4022
REM_DIODE2_P_4022
VCP2
12
R3874.7K_0402_ 5%~D R3874.7K_0402_5%~D
VSET_4022
FAN1_TACH_FB
FAN1_DET#
3V_PWROK#
1 2
R391 1K_0402_1%~DR391 1K_0402_1%~D
+RTC_CELL
FAN1_DET#
+FAN1_VOUT
FAN1_TACH_FB
Change to EMC4021 for cost saving
U6
U6
2
VDDH
3
VDDH
6
VDDL
13
VDD_PWRGD
23
DN1/THERM
24
DP1/VREF_T
26
DN2/DP4
27
DP2/DN4
30
DP3/DN5
29
DN3/DP5
31
VCP
25
VIN
28
VSET
10
TACH/GPIO1
11
GPIO2
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
16
RTC_PWR3V
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
EMC4022-1-EZK-TR_QFN32_5X5~D
EMC4022-1-EZK-TR_QFN32_5X5~D
1
C274
C274
2
JFAN1
1
1
2
2
3
3
4
4
5
GND
6
GND
TYCO_2-1775293-4~D
TYCO_2-1775293-4~D
Link Done
THERMTRIP2#
THERMTRIP3#
SYS_SHDN#
POWER_SW#
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
FAN_OUT
FAN_OUT
SMCLK/BC_CLK
SMDATA/BC_DATA
VDD
ADDR_MODE/XEN
TEST1
TEST2
VSS
CONN@JFAN1
CONN@
17
18
19
20
21
9
5
4
8
7
1
32
14
22
33
+VCC_4022
THERMATRIP2#
THERMATRIP3#
POWER_SW#
BC_INT#_EMC4022
+FAN1_VOUT
+ADDR_XEN
1 2
12
R403
R403
10K_0402_5%~D
10K_0402_5%~D
SMSC request
BC_INT#_EMC4022
FAN1_TACH_FB
FAN1_DET#
1 2
R390 47K_0402_1%~D@ R390 47K_0402_1%~D@
ACAV_IN <40,53,55>
BC_INT#_EMC4022 <40>
BC_CLK_EMC4022 <40>
BC_DAT_EMC4022 <40>
+VCC_4022
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
THERM_STP# <46>
+RTC_CELL
R388
R388
22_0402_5%~D
22_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C273
C273
2
12
12
12
C1179
C1179
+3.3V_M
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
R385 10K_040 2_5%~DR385 10K_0402_5%~D
R426 10K_040 2_5%~DR426 10K_0402_5%~D
R402 10K_040 2_5%~DR402 10K_0402_5%~D
+3.3V_M
U10
U10
4
+RTC_CELL
5
O
3
P
B
A
G
1 2
C281 0.1U_0402_25V6K~DC281 0.1U_0402_25V6K~D
1
2
DOCK_PWR_SW # <40>
POWER_SW_IN# <40>
+3.3V_M
12
R405
R405
8.2K_0402_5%~D
8.2K_0402_5%~D
THERMATRIP3#
1
C280
C280
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
A A
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C282
C282
2
VSET_4022
12
R406
R406
1.4K_0402_1%~D
1.4K_0402_1%~D
Rest=1400 Tp=94degree
POWER_SW#
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Thermal Sensor
FAN & Thermal Sensor
FAN & Thermal Sensor
LA-7741
LA-7741
LA-7741
22 56Thursday, June 23, 2011
22 56Thursday, June 23, 2011
22 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
JLVDS1
JLVDS1
45
44
43
42
41
D D
C C
AMPHE_G47D4022101EU~D
AMPHE_G47D4022101EU~D
CONN@
CONN@
40
40
G5
39
39
G4
38
38
G3
37
37
G2
36
36
G1
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
BIA_PWM_LVDS DISP_ON
CAM_MIC_CBL_DET#
DISP_ON
BIA_PWM_LVDS_L
12
R1137
R1137
10K_0402_5%~D
10K_0402_5%~D
DMIC0
DMIC_CLK
USBP12_DUSBP12_D+
LCD_CBL_DET# <17>
LCD_ACLK+_PCH
LCD_ACLK-_PCH
LCD_A2+_PCH
LCD_A2-_PCH
LCD_A1+_PCH
LCD_A1-_PCH
LCD_A0+_PCH
LCD_A0-_PCH
LDDC_DATA_PCH
LDDC_CLK_PCH
BREATH_WHITE_LED
BATT_YELLOW_LED
BATT_WHITE_LED
D66
D66
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
D68
D68
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
CAM_MIC_CBL_DET# <17>
+BL_PWR_SRC
1 2
LE92 BLM18B B221SN1D_2P~DLE92 BLM18BB221SN1D _2P~D
21
21
BIA_PWM_LVDS
4
LCD_ACLK+_PCH <16>
LCD_ACLK-_PCH <16>
LCD_A2+_PCH <16>
LCD_A2-_PCH <16>
LCD_A1+_PCH <16>
LCD_A1-_PCH <16>
LCD_A0+_PCH <16>
LCD_A0-_PCH <16>
LDDC_DATA_PCH <16>
LDDC_CLK_PCH <16>
LCD_TST <39>
+3.3V_RUN
+LCDVDD
+5V_ALW
PANEL_HDD_LED <43>
BREATH_WHITE_LED <43>
BATT_YELLOW_LED <43>
BATT_WHITE_LED <43>
DMIC0 <29>
DMIC_CLK <29>
2
3
1
+3.3V_RUN
PESD5V0U2BT_SOT23-3~DD8PESD5V0U2BT_SOT23-3~D
D8
1 2
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
1 2
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
+CAMERA_VDD
LDDC_CLK_PCH
LDDC_DATA_PCH
Place near to JLVDS1
+LCDVDD +3.3V_RU N
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C298
C298
1
2
Close to JLVDS1.7,8
D67
D67
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
12
R1138
R1138
100K_0402_5%~D
100K_0402_5%~D
D69
D69
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C243
C243
1
2
Close to JLVD1.9
21
21
PANEL_BKEN_PCH <16>BIA_PWM_PCH <16>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
LCD_VCC_TEST_EN<39>
ENVDD_PCH<16,39>
+BL_PWR_SRC
1
C246
C246
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
2
+5V_ALW
Close to JLVDS1.6
LCD Power
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C302
C302
1
2
D6
D6
2
1
3
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
2
+LCDVDD
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q19A
Q19A
EN_LCDPWR
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
130_0402_1%~D
130_0402_1%~D
12
R413
R413
61
2
2
Q20
Q20
40mil
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C297
C297
2
EN_INVPWR<40>
+PWR_SRC_S +3.3V_ALW
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R414
R414
5
13
+PWR_SRC
12
R422
R422
100K_0402_5%~D
100K_0402_5%~D
1 2
R423 47K_0402_5%~DR423 47K_0402_5%~D
12
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q19B
Q19B
4
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
4 5
PWR_SRC_ON
EN_INVPWR
+LCDVDD
R412
R412
S
S
Panel backlight power control by EC
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
4 5
3
1M_0402_5%~D
1M_0402_5%~D
1
12
R1632
R1632
2
Q21
Q21
D
D
6
2
1
G
G
3
Q22
Q22
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
S
D
S
1 3
G
G
2
1
Q18
Q18
D
D
6
2
1
G
G
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C293
C293
40mil
1
C296
C296
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
2
FDC654P: P CHANNAL
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C292
C292
1
2
+BL_PWR_SRC
B B
A A
LCD_ACLK+_PCH
LCD_ACLK-_PCH
LDDC_CLK_PCH
For Webcam
1
1
2
@
@
12P_0402_50V8J~D
12P_0402_50V8J~D
1
2
2
C1202
C1202
C1203
C1201
C1201
12P_0402_50V8J~D
12P_0402_50V8J~D
C1203
@
@
@
@
12P_0402_50V8J~D
12P_0402_50V8J~D
+CAMERA_VDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
10U_0805_10V6K~D
10U_0805_10V6K~D
C299
C299
C300
C300
1
2
CCD_OFF<39>
CCD_OFF
Q23
Q23
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
S
D
S
1 3
G
G
2
L10 DLW21SN121 SQ2L_4P~D@L10 DLW 21SN121SQ2L_4P~D@
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C301
C301
1
2
USBP12+<17>
USBP12-<17>
USBP12- USBP12_D-
4
4
1
1
1 2
R427 0_0402_5%~DR427 0_0402_5%~D
1 2
R428 0_0402_5%~DR428 0_0402_5%~D
3
3
2
2
USBP12_D+USBP12+
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
RF TEAM request
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LVDS
LVDS
LVDS
LA-7741
LA-7741
LA-7741
23 56Thursday, June 23, 2011
23 56Thursday, June 23, 2011
23 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
2
1
B B
PCH_CRT_RED
PCH_CRT_GRN
PCH_CRT_BLU
PCH_CRT_HSYNC
PCH_CRT_VSYNC
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
CRT_SWITCH
+3.3V_RUN
12
R556
R556
4.7K_0402_5%~D
4.7K_0402_5%~D
PCH_CRT_RED<16>
PCH_CRT_GRN<16>
PCH_CRT_BLU<16>
PCH_CRT_HSYNC<16>
PCH_CRT_VSYNC<16>
PCH_CRT_DDC_DAT<16>
PCH_CRT_DDC_CLK<16>
CRT_SWITCH<39>
0
1
SW for MB/DOCK
U18
U18
1
2
5
6
7
9
10
30
29
8
3
11
28
31
33
PI3V713-AZLEX_TQFN32_6X3~D
PI3V713-AZLEX_TQFN32_6X3~D
Source
ChanelSEL1/SEL2
MBA=B1
APR/SPR
A=B2
R
G
B
H_SOURCE
V_HOURCE
SDA_SOURCE
SCL_SOURCE
SEL
TEST
Reserved
GND
GND
GND
GND
GPAD
5V VDD
VDD
VDD
VDD
H1_OUT
V1_OUT
SDA1
SCL1
H2_OUT
V2_OUT
SDA2
SCL2
R1
G1
B1
R2
G2
B2
+5V_RUN +3.3V_RUN
16
4
23
32
RED_CRT
27
GREEN_CRT
25
BLUE_CRT
22
HSYNC_BUF
20
VSYNC_BUF
18
DAT_DDC2_CRT
12
CLK_DDC2_CRT
14
RED_DOCK
26
GREEN_DOCK
24
BLUE_DOCK
21
HSYNC_DOCK
19
VSYNC_DOCK
17
DAT_DDC2_DOCK
13
CLK_DDC2_DOCK
15
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C332
C332
2
2
@
@
RED_CRT <30>
GREEN_CRT <30>
BLUE_CRT <30>
HSYNC_BUF <30>
VSYNC_BUF <30>
DAT_DDC2_CRT <30>
CLK_DDC2_CRT <30>
RED_DOCK <38>
GREEN_DOCK <38>
BLUE_DOCK <38>
HSYNC_DOCK <38>
VSYNC_DOCK <38>
DAT_DDC2_DOCK <38>
CLK_DDC2_DOCK <38>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C334
C334
C333
C333
2
2
@
@
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C335
C335
2
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C336
C336
0.1U_0402_25V6K~D
1
C339
C339
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
1
Date: Sheet of
Compal Electronics, Inc.
CRT/Video switch
CRT/Video switch
CRT/Video switch
LA-7741
LA-7741
LA-7741
24 56Thursday, June 23, 2011
24 56Thursday, June 23, 2011
24 56Thursday, June 23, 2011
0.1
0.1
0.1
of
2
+5V_RUN
21
+5V_RUN_HDMI
21
1
fuse P/N ok only, symbol not ready
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
3
D4
D4
NC
NC
+VDISPLAY_VCC
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C338
1
F2
2
C338
1
C337
C337
2
B B
+3.3V_RUN
HDMI_CEC
R1165 10K_0402_5%~DR1165 10K_0402_5%~D
TMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N2_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P0_C
TMDSB_PCH_N0_C
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
A A
R452 680_0402_ 5%~DR452 680_0402_5%~D
R450 680_0402_ 5%~DR450 680_0402_5%~D
R448 680_0402_ 5%~DR448 680_0402_5%~D
R449 680_0402_ 5%~DR449 680_0402_5%~D
R454 680_0402_ 5%~DR454 680_0402_5%~D
R453 680_0402_ 5%~DR453 680_0402_5%~D
R456 680_0402_ 5%~DR456 680_0402_5%~D
R455 680_0402_ 5%~DR455 680_0402_5%~D
+3.3V_RUN
PCH_SDVO_CTRLCLK<16>
PCH_SDVO_CTRLDATA<16>
HDMIB_PCH_HPD<16>
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R458 10K_04 02_5%~DR458 10K_04 02_5%~D
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_RUN
2
5
3
4
Q120B
Q120B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1M_0402_5%~D
1M_0402_5%~D
R1168
R1168
1 2
13
D
D
2
G
G
Q26
Q26
S
S
RB751V-40GTE-17_SOD323-2~D
Q120A
Q120A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC_CLK
61
PCH_SDVO_CTRLDATA_R
+3.3V_RUN
G
G
2
HDMI_HPD_SINK
13
D
S
D
S
Q121
Q121
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
RB751V-40GTE-17_SOD323-2~D
1 2
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D
1 2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D
1 2
R1128 20K_04 02_5%~DR1128 20K_0402_5%~D
D65
@D65
@
+5V_HDMI_DDC_DAT
+5V_RUN
21
TMDSB_PCH_CLK<16>
TMDSB_PCH_CLK#<16>
+5V_RUN
12
R1163
R1163
0_0402_5%~D
0_0402_5%~D
21
@D70
@
D70
12
R1164
R1164
0_0402_5%~D
0_0402_5%~D
RB751V-40GTE-17_SOD323-2~D
RB751V-40GTE-17_SOD323-2~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.5A_15V_SMD1812P050TFF20.5A_15V_SMD1812P050TF
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~D
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~D
TMDSB_PCH_P0< 16>
TMDSB_PCH_N0<16>
TMDSB_PCH_P1< 16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P2< 16>
TMDSB_PCH_N2<16>
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V7K~D
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V7K~D
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D
HDMI_HPD_SINK
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
HDMI_CEC
TMDSB_CON_CLK#
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_P0
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
TMDSB_PCH_CLK_C
12
TMDSB_PCH_CLK#_C
12
TMDSB_PCH_P0_C
12
TMDSB_PCH_N0_C
12
TMDSB_PCH_P1_C
12
TMDSB_PCH_N1_C
12
TMDSB_PCH_P2_C
12
TMDSB_PCH_N2_C
12
JHDMI1
CONN@JHDMI1
CONN@
19
HP_DET
18
+5V
17
Reserved
16
SDA
15
SCL
14
CEC
13
DDC/CEC_GND
12
CK-
11
CK+
10
CK_shield
9
D0-
8
D0+
7
D0_shield
6
D1-
5
D1+
4
D1_shield
3
D2-
2
D2+
1
D2_shield
BELLW_80079-1021
BELLW_80079-1021
1 2
R451 0_0402_5%~D@ R451 0_0402_5%~D@
L19
L19
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R459 0_0402_5%~D@ R459 0_0402_5%~D@
1 2
R462 0_0402_5%~D@ R462 0_0402_5%~D@
L20
L20
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R466 0_0402_5%~D@ R466 0_0402_5%~D@
1 2
R468 0_0402_5%~D@ R468 0_0402_5%~D@
L21
L21
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R469 0_0402_5%~D@ R469 0_0402_5%~D@
1 2
R470 0_0402_5%~D@ R470 0_0402_5%~D@
L22
L22
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R471 0_0402_5%~D@ R471 0_0402_5%~D@
GND1
GND2
GND3
GND4
20
21
22
23
2
2
3
3
2
2
3
3
2
2
3
3
2
2
3
3
TMDSB_CON_CLK
TMDSB_CON_CLK#
TMDSB_CON_P0
TMDSB_CON_N0
TMDSB_CON_P1
TMDSB_CON_N1
TMDSB_CON_P2
TMDSB_CON_N2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
Compal Electronics, Inc.
HDMI port
HDMI port
HDMI port
LA-7741
LA-7741
LA-7741
25 56Thursday, June 23, 2011
25 56Thursday, June 23, 2011
25 56Thursday, June 23, 2011
0.1
0.1
0.1
5
4
3
2
1
AUX/DDC SW for DPC to E-DOCK
C357
D D
DPC_PCH_DOCK_AUX< 16>
DPC_DOCK_AUX<38>
DPC_PCH_DOCK_AUX#<16>
DPC_DOCK_AUX#<38>
DPC_CA_DET<38>
C C
C357
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~ D
DPC_AUX_C
12
DPC_DOCK_AUX
DPC_AUX#_C
12
DPC_DOCK_AUX#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
U20
U20
1
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
12
C365
C365
5
P
A2Y
G
3
1
14
VCC
13
BE3
12
A3
11
B3
10
BE2
9
A2
8
B2
U21
U21
DPC_CA_DET#DPC_CA_DET
NC
4
NC7SZ04P5X-G_SC70-5~D
NC7SZ04P5X-G_SC70-5~D
+3.3V_RUN
1 2
C356
C356
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPC_CTRLCLK <16>
PCH_DDPC_CTRLDATA <16>
There is a new die for PI3C3125. Sample availabe on May.
AUX/DDC SW for DPD to E-DOCK
C367
C367
0.1U_0402_10V7K~D
DPD_PCH_DOCK_AUX< 16>
DPD_PCH_DOCK_AUX#<16>
B B
0.1U_0402_10V7K~D
DPD_DOCK_AUX<38>
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~ D
DPD_DOCK_AUX#<38>
DPD_AUX_C
12
DPD_DOCK_AUX
DPD_AUX#_C
12
DPD_DOCK_AUX#
U23
U23
1
2
3
4
5
6
7
VCC
BE0
BE3
A0
B0
BE1
A1
BE2
B1
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
14
13
12
A3
11
B3
10
9
A2
8
B2
+3.3V_RUN
1 2
C366
C366
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPD_CTRLCLK <16>
PCH_DDPD_CTRLDATA <16>
+5V_RUN
12
C369
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DPD_CA_DET<38>
+3.3V_RUN
1 2
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D
1 2
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D
A A
1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D
1 2
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D
1 2
R491 1M_0 402_5%~DR49 1 1M_0402_5%~D
1 2
R492 1M_0 402_5%~DR49 2 1M_0402_5%~D
5
PCH_DDPC_CTRLCLK
PCH_DDPC_CTRLDATA
PCH_DDPD_CTRLCLK
PCH_DDPD_CTRLDATA
DPD_CA_DET
DPC_CA_DET
C369
1
5
U24
U24
P
A2Y
G
3
DPD_CA_DET#DPD_CA_DET
NC
4
NC7SZ04P5X-G_SC70-5~D
NC7SZ04P5X-G_SC70-5~D
Intel WW18 Strapping option
Intel WW18 Strapping option
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DP125
DP125
DP125
LA-7741
LA-7741
LA-7741
1
26 56Thursday, June 23, 2011
26 56Thursday, June 23, 2011
26 56Thursday, June 23, 2011
of
0.1
0.1
0.1
5
D D
+3.3V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C387
C C
C387
2
2
DDR_XDP_WAN_ SMBDAT<12,13,15,34>
DDR_XDP_WAN_ SMBCLK<12,13,15,34>
Free Fall Sensor
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C388
C388
HDD_FALL_INT< 17>
HDD_FALL_INT
FFS_INT2
4
U88
U88
LNG3DM
LNG3DM
VDD_IO
VDD
INT 1
INT 2
SDO/SA0
SDA / SDI / SDO
SCL/SPC
CS
GND
GND
RES
RES
RES
RES
NC
NC
1
14
11
9
7
6
4
8
LNG3DMTR_LGA16_3X3~D
LNG3DMTR_LGA16_3X3~D
3
+5V_HDD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
2
C396
C396
C395
C395
2
PSATA_PTX_DRX_P0_C<14>
PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_N0_C<14>
PSATA_PRX_DTX_P0_C<14>
Pleace near HDD CONN
+3.3V_RUN_HDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C402
C402
C399
C399
2
2
Pleace near HDD CONN
10
13
15
16
5
12
2
3
+3.3V_RUN
2
C389 0.01U_0402_16V7K~DC389 0.01U_0402_16V7K~D
C390 0.01U_0402_16V7K~DC390 0.01U_0402_16V7K~D
C391 0.01U_0402_16V7K~DC391 0.01U_0402_16V7K~D
C392 0.01U_0402_16V7K~DC392 0.01U_0402_16V7K~D
1 2
12
12
12
12
PJP64
PJP64
PAD-OPEN1x1m
PAD-OPEN1x1m
HDD_DET#<14>
+3.3V_RUN_HDD
+5V_HDD
FFS_INT2_Q
For HDD Temp.
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
HDD_DET#
1
JSATA1
CONN@JSATA1
CONN@
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
Reserved
19
GND
20
12V
21
12V
22
12V
TYCO_1775770-3~D
TYCO_1775770-3~D
GND1
GND2
23
24
Main SATA +5V Default
+3.3V_RUN
DDR_XDP_WAN_ SMBDAT
1 2
R501 10K_0402_5%~DR501 10K_0402_5%~D
R502 10K_0402_5%~DR502 10K_0402_5%~D
R503 100K_0402_5%~DR503 100K_0402_5%~D
B B
A A
1 2
1 2
FFS_INT2<18>
DDR_XDP_WAN_ SMBCLK
HDD_FALL_INT
FFS_INT2
2
+3.3V_RUN
12
R508
R508
100K_0402_5%~D
100K_0402_5%~D
61
+3.3V_ALW2
12
R500
R500
100K_0402_5%~D
100K_0402_5%~D
+5V_HDD
12
R506
@R506
@
100K_0402_5%~D
100K_0402_5%~D
FFS_INT2_Q
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q29B
Q29B
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q29A
Q29A
4
RUN_ON<35,39,42,48>
SIO_SLP_S3#<11,16,35,39,42,48>
1 2
R1621 0_0402_5%~D@R1621 0_0402_5%~D@
1 2
R1624 0_0402_5%~DR16 24 0_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
R505
R505
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q28A
Q28A
2
12
+PWR_SRC_S
12
100K_0402_5%~D
100K_0402_5%~D
HDD_EN_5V
3
5
4
HDD PWR
R499
R499
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q28B
Q28B
+5V_ALW
6
2
1
D
D
G
G
SI3456DDV-T1-GE3_TSOP6~D
S
S
4 5
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
C393
C393
1
C394
C394
2
SI3456DDV-T1-GE3_TSOP6~D
+5V_HDD
3
1
2
+5V_HDD Source
@
@
Q27
Q27
12
SHORT DEFAULT
R504
R504
100K_0402_5%~D
100K_0402_5%~D
PJP3
PJP3
112
JUMP_43X79
JUMP_43X79
+5V_RUN
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDD CONNECTOR
HDD CONNECTOR
HDD CONNECTOR
LA-7741
LA-7741
LA-7741
27 56Thursday, June 23, 2011
27 56Thursday, June 23, 2011
27 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
+3.3V_ALW
ZODD_WAKE#
1 2
R510 10K_0402_5%~DR510 10K_0402_5%~D
R513 10K_0402_5%~DR513 10K_0402_5%~D
+3.3V_ALW_PCH
D D
R514 100K_0402_5%~DR514 100K_0402_5%~D
1 2
1 2
MOD_MD
USB30_SMI#
4
3
2
1
For ODD
JSATA2
CONN@JSATA2
CONN@
1
SATA_ODD_PTX_DRX_P1_RP
SATA_ODD_PTX_DRX_N1_RP
SATA_ODD_PRX_DTX_N1_RP
SATA_ODD_PRX_DTX_P1_RP
PCIE_PRX_EMBTX_P4<15>
PCIE_PRX_EMBTX_N4<15>
PCIE_PTX_EMBRX_P4<15>
PCIE_PTX_EMBRX_N4<15>
MOD_SATA_PCIE#_DET<39>
DEVICE_DET#<40>
CLK_PCIE_EMB<15>
CLK_PCIE_EMB#<15>
EMBCLK_REQ#<15>
PCIE_WAKE#<34,35,40>
PLTRST_EMB#<17>
BAY_SMBDAT<40,45>
BAY_SMBCLK<40,45>
ZODD_WAKE# <39>
USB30_SMI# <14>
+3.3V_ALW
+5V_MOD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C398
C398
C397
C397
2
2
C C
Pleace near ODD CONN
Q76
Q76
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
S
D
MOD_MD
B B
MOD_SATA_PCIE#_DET
A A
S
13
G
G
2
Q123B
Q123B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
5
+3.3V_ALW
2
ZODD_WAKE#
MODC_EN#
3
USB30_EN
12
R515
R515
100K_0402_5%~D
100K_0402_5%~D
USB30_EN
61
Q123A
Q123A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
USB30_SMI#
12
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16V7K~D
12
C406 0.01U_0402_16V7K~DC406 0.01U_0402_16V7K~D
12
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16V7K~D
12
C404 0.01U_0402_16V7K~DC404 0.01U_0402_16V7K~D
EMBCLK_REQ#
PCIE_WAKE#
PLTRST_EMB#
BAY_SMBDAT
BAY_SMBCLK
1 2
R1183 10K_040 2_5%~DR1183 10K_0402_5%~D
+5V_MOD
12
12
C4090.1U_0402_10V7K~D C4090.1U_0402_10V7K~D
C4080.1U_0402_10V7K~D C4080.1U_0402_10V7K~D
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
MOD_MD
PCIE_PTX_EMBRX_P4_C
PCIE_PTX_EMBRX_N4_C
+5V_MOD
SATA_ODD_PTX_DRX_P1_C<14>
SATA_ODD_PTX_DRX_N1_C<14>
SATA_ODD_PRX_DTX_N1_C<14>
SATA_ODD_PRX_DTX_P1_C<14>
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
DP
9
+5V
10
+5V
11
MD
12
GND
13
GND
14
GND
15
REFCLK+
16
REFCLK-
17
GND
18
PETX+
19
PETX-
20
GND
21
GND
22
PERX+
23
PERX-
24
GND
25
+5V
26
CLKREQ#
27
WAKE#
28
PERST#
29
SMB_DATA
SMB_CLK
HPD
TYCO_2-2129116-1
TYCO_2-2129116-1
12
12
12
12
10K_0402_5%~D
10K_0402_5%~D
@ R1175
@
12
R1175
0_0402_5%~D
0_0402_5%~D
12
R1176
R1176
GND1
GND2
+ODD_EQ1
+ODD_EQ2
30
31
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16V7K~D
C384 0.01U_0402_16V7K~DC384 0.01U_0402_16V7K~D
C386 0.01U_0402_16V7K~DC386 0.01U_0402_16V7K~D
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16V7K~D
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
@ R1173
@
12
R1173
0_0402_5%~D
0_0402_5%~D
12
R1174
R1174
32
33
SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1
SATA_ODD_PRX_DTX_N1
SATA_ODD_PRX_DTX_P1
+ODD_EQ2
+ODD_EQ1
+5VMOD Source
MODC_EN<39>
R512
R512
100K_0402_5%~D
100K_0402_5%~D
U25
U25
7
EN
18
DD
19
OL
1
HAP
2
HAM
4
HBM
5
HBP
3
GND
GND13DBP
17
GND
21
EP
MAX4951CCTPLFT_TQFN20_4X4~D
MAX4951CCTPLFT_TQFN20_4X4~D
+PWR_SRC_S
5
1
2
+ODD_DEW2
+ODD_DEW1
12
R507
R507
100K_0402_5%~D
100K_0402_5%~D
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q31B
Q31B
4
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
C381
C381
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+3.3V_ALW2
12
R509
R509
100K_0402_5%~D
100K_0402_5%~D
MODC_EN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q31A
Q31A
2
12
+3.3V_RUN
6
VCC
10
VCC
16
VCC
20
VCC
DAP
DAM
DBM
PA
PB
+ODD_PE1
9
+ODD_PE2
8
SATA_ODD_PTX_DRX_P1_RP
15
SATA_ODD_PTX_DRX_N1_RP
14
SATA_ODD_PRX_DTX_P1_RP
11
SATA_ODD_PRX_DTX_N1_RP
12
MOD_EN
C382
C382
+5V_ALW
3
1
2
12
12
6
2
1
G
G
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
4 5
C400
C400
1
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
12
R1181
R1181
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
@R1172
@
12
R1172
D
D
Q30
Q30
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_MOD
10U_0805_10V6K~D
10U_0805_10V6K~D
12
R511
R511
C401
C401
100K_0402_5%~D
100K_0402_5%~D
+3.3V_RUN
0_0402_5%~D
@R493
0_0402_5%~D
@
0_0402_5%~D
@R494
0_0402_5%~D
@
R493
R1177
R1177
@R1178
@
R1178
R494
1 2
1 2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
12
12
R495
R495
R496
R496
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ODD CONNECTOR
ODD CONNECTOR
ODD CONNECTOR
LA-7741
LA-7741
LA-7741
28 56Thursday, June 23, 2011
28 56Thursday, June 23, 2011
28 56Thursday, June 23, 2011
1
0.1
0.1
0.1
2
Internal Speakers Header
12
R1076
@R1076
@
10_0402_1%~D
10_0402_1%~D
1
C977
@C977
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
12
3
4
12
12
3
61
4
DVDD_IO should match
with HDA Bus level
R1086
R1086
20K_0402_1%~D
20K_0402_1%~D
5
Q107B
Q107B
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
R1080
R1080
20K_0402_1%~D
20K_0402_1%~D
5
Q106B
Q106B
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
INT_SPKL_L+
INT_SPKL_L-
INT_SPKR_R+
INT_SPKR_R-
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
@DE2
@
DE2
1
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C980
C980
2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C979
C979
2
CONN@
CONN@
JSPK1
JSPK1
1
1
2
2
3
3
4
4
5
GND
6
GND
TYCO_2-1775765-4~D
TYCO_2-1775765-4~D
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_SDOUT<14>
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
1
BCLK: Audio serial data bus bi t clock input/output
LRCK: Audio serial data bus word clock input/output
AUD_NB_MUTE#<39>
+3.3V_RUN
R1083
R1083
2.49K_0402_1%~D
2.49K_0402_1%~D
+3.3V_RUN
R1078
R1078
2.49K_0402_1%~D
2.49K_0402_1%~D
+3.3V_RUN
PCH_AZ_CODEC_SYNC<14>
@DE1
@
DE1
PCH_AZ_CODEC_SDIN0<14 >
PCH_AZ_CODEC_RST#<14>
1 2
10K_0402_5%~DR1099 10K_0402_5 %~DR1099
+VDDA_AVDD
12
12
R1087
R1087
100K_0402_5%~D
100K_0402_5%~D
AUD_HP_NB_SENSE <30,39>
+VDDA_AVDD
12
12
R1082
R1082
100K_0402_5%~D
100K_0402_5%~D
DOCK_MIC_DET <39>DOCK_HP_DET<39>
I2S_MCLK I2S_MCLK_R
I2S_BCLK I2 S_BCLK_R
I2S_DO
I2S_LRCLK
I2S_DI#
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C952
C952
2
Place R1096 close to codec
1 2
33_0402_5%~D
33_0402_5%~D
R1096
R1096
1 2
RE9 0_0402_5%~DRE9 0_0402_5%~D
1 2
RE10 0_0402_5%~DRE10 0_0402_ 5%~D
1 2
Place R1097 close to codec
place at AGND and DGND plane
1 2
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT B
PORT C
PORT D
2
15 mils trace
INT_SPK_L+
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
C973 680 P_0402_50V7K~D@C97 3 680P_0402_50V7K~D@
1
B B
2
Close to U72 pin5 Close to U72 pin6
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
12
R1077
@R10 77
@
47_0402_5%~D
47_0402_5%~D
1
C978
@C978
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
L91 BLM18BD121SN1D_2P~DL91 BLM18BD121SN1D_2P~D
1 2
L92 BLM18BD121SN1D_2P~DL92 BLM18BD121SN1D_2P~D
1 2
L93 BLM18BD121SN1D_2P~DL93 BLM18BD121SN1D_2P~D
1 2
L94 BLM18BD121SN1D_2P~DL94 BLM18BD121SN1D_2P~D
1 2
C975 680 P_0402_50V7K~D@C97 5 680P_0402_50V7K~D@
C974 680 P_0402_50V7K~D@C97 4 680P_0402_50V7K~D@
C976 680 P_0402_50V7K~D@C97 6 680P_0402_50V7K~D@
1
1
1
2
2
2
Place closely to Pin 13.
AUD_SENSE_A
61
2
Q107A
Q107A
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
@
@
A A
Place closely to Pin 14
AUD_SENSE_B
+3.3V_RUN
12
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
R1079
R1079
39.2K_0402_1%~D
39.2K_0402_1%~D
R1081
R1081
100K_0402_5%~D
100K_0402_5%~D
2
Q106A
Q106A
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C953
C953
2
C994
C994
12
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
33_0402_5%~DR1097 33_0402_5%~ DR 1097
C981
C981
C982
C982
C983
C983
PORT A
PORT B
NA
SPDIFOUT0
+3.3V_RUN
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C954
C954
2
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
PCH_AZ_CODEC_RST#
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC1)
Pull-up to AVDD
External MICPORT A
HeadPhone Out
Dock Audio
Internal SPK
Place C994, C952~C957 close to Codec
U72
U72
1
DVDD_CORE
3
DVDD_IO
9
DVDD
6
BITCLK
5
SDATA_OUT
10
SYNC
8
SDATA_IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
7
DVSS
42
PVSS
49
GND
92HD90B2X5NLGXYAX8_QFN48_7 X7~D
92HD90B2X5NLGXYAX8_QFN48_7 X7~D
place at Codec bottom side
PJP62
PJP62
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
R162, R163, R164, R165,R166 CO-lay with U73
DAI_DI
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
EN_I2S_NB_CODEC#<39>
DAI_DI <38>
AVDD1
AVDD2
PVDD
PVDD
SENSE_A
SENSE_B
PORTA_L
PORTA_R
VrefOut_A
PORTB_L
PORTB_R
PORTD_+L
PORTD_-L
PORTD_+R
PORTD_-R
MONO_OUT
PC_BEEP
CAP+
CAP-
VREFFILT
CAP2
Vreg
AVSS1
AVSS
AVSS
1 2
R162 22_040 2_5%~D@R162 22_0402_5%~D@
1 2
R163 0 _0402_5%~D@ R163 0_0402 _5%~D@
1 2
R164 0 _0402_5%~D@ R164 0_0402 _5%~D@
1 2
R165 22_040 2_5%~D@R165 22_0402_5%~D@
27
38
45
39
13
14
28
29
23
31
32
40
41
44
43
25
12
DMIC_CLK_L
2
4
46
48
36
35
21
22
34
V-
37
26
30
33
EN_I2S_NB_CODEC#
place close to pin27 place close to pin38
+VDDA_AVDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1U_0603_10V7K~D
1U_0603_10V7K~D
1
1
C957
C957
2
2
+VDDA_PVDD
AUD_SENSE_A
AUD_SENSE_B
MIC_IN_L
MIC_IN_R
+VREFOUT
AUD_HP_OUT_L
AUD_HP_OUT_R
INT_SPK_L+
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
AUD_PC_BEEP
1
C962
C962
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
Place C962 close to Codec
2
+3.3V_RUN
2
1
I2S_BCLK DAI_BCLK#
I2S_LRCLK
I2S_DO
R1540
R1540
1K_0402_1%~D
1K_0402_1%~D
C1105 0.1U_0402_2 5V6K~DC11 05 0.1U_0402_25V6K~D
C1106 0.1U_0402_2 5V6K~DC11 06 0.1U_0402_25V6K~D
1 2
LE3 BLM18 BB221SN1D_2P~DLE3 BLM18BB221SN1D_2P~ D
Place LE3 close to codec
1 2
R169 0 _0402_5%~D@ R169 0_0402 _5%~D@
T90 PAD~D@ T90 PAD~D@
Place C963~C966 close to Codec
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1103
C1103
U73
U73
16
VCC
2
1A
4
2A
6
3A
10
4A
12
5A
14
6A
1
OE1#
15
12
OE2#
CD74HC366M96_SO16~D
CD74HC366M96_SO16~D
1
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C956
C956
C955
C955
2
1 2
2.2U_0603_6.3V6K~DC1163 2.2U_0603 _6.3V6K~DC1163
+VREFOUT
1 2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D
12
12
3
1Y#
5
2Y#
7
3Y#
9
4Y#
11
5Y#
13
6Y#
8
GND
1
DMIC_CLK <23>
DMIC0 <23>
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C963
C963
2
I2S_DI#
1 2
R166 0 _0402_5%~D@ R166 0_0402 _5%~D@
L77
L77
BLM21PG600SN1D_0805~ D
BLM21PG600SN1D_0805~ D
1 2
MIC_IN_R <30>
AUD_HP_OUT_L <30>
AUD_HP_OUT_R <30>
1U_0603_10V7K~D
1U_0603_10V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C965
C965
C964
C964
2
2
+5V_RUN
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C958
C958
2
1 2
R1119 100K_0402_5%~DR1119 100K_0402_5 %~D
1 2
R1120 100K_0402_5%~DR1120 100K_0402_5 %~D
1 2
R1141 10K_ 0402_5%~D@R11 41 10K_0402_5%~D@
1 2
R1142 10K_ 0402_5%~D@R11 42 10K_0402_5%~D@
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C966
C966
2
DAI_DI
+5V_RUN
0_0805_5%~D
0_0805_5%~D
R1095
R1095
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C959
C959
2
1
2
10U_0805_10V6K~D
10U_0805_10V6K~D
C960
C960
DAI_LRCK#
DAI_DO#
DAI_12MHZ#I2S_MCLK
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C961
C961
2
SPKR <14>
BEEP <40>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Azalia (HD) Codec
Azalia (HD) Codec
Azalia (HD) Codec
LA-7741
LA-7741
LA-7741
+VREFOUT
DAI_BCLK# <38>
DAI_LRCK# <38>
DAI_DO# <38>
DAI_12MHZ# <38 >
29 56Thursday, June 23, 2011
29 56Thursday, June 23, 2011
29 56Thursday, June 23, 2011
of
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C1180
C1180
2
0.1
0.1
0.1
5
SW1
POWER_SW#_M B<40,41>
D D
POWER_SW#_M B
D23
@D23
@
3
1
2
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
SW1
3
4
NTC033-XJ1J-X260CM_4P
NTC033-XJ1J-X260CM_4P
POWER & INSTANT ON SWITCH
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
MEDIA_DET#<18>
WIRELESS_ON#/OFF<39>
VOL_MUTE< 40>
VOL_DOWN<40>
VOL_UP<40>
C C
MEDIA_DET#
WIRELESS_ON#/OFF
VOL_MUTE
VOL_DOWN
VOL_UP
Media Board
LS-6613P
JMEDIA1
CONN@JMEDIA1
CONN@
1
1
2
2
3
3
4
4
5
5
6
11
6
G1
7
12
7
G2
8
8
9
9
10
10
TYCO_1-2041070-0~D
TYCO_1-2041070-0~D
LinK Done
4
1
2
VSYNC_BUF<24>
HSYNC_BUF<24>
RED_CRT<24>
GREEN_CRT<24>
BLUE_CRT<24>
DAT_DDC2_CRT<24>
CLK_DDC2_CRT<24>
3
VSYNC_BUF
HSYNC_BUF
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT
DETECT_GND
I/O board CONN.
Link Done
JIO1
CONN@JIO1
CONN@
2
112
4
334
6
556
8
778
10
9910
12
14
16
18
20
22
24
26
28
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
G1
G2
25
G3
G4
27
G5
G6
TYCO_2041300-1~D
TYCO_2041300-1~D
2
IO_LOOP# <18>
+5V_RUN
AUD_HP_OUT_R <29>
AUD_HP_OUT_L <29>
MIC_IN_R <29>
AUD_HP_NB_SENSE <29,39>
+5V_RUN
1
2
Place close
to JIO1.3,5
1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1000
C1000
LED Board with Lid
+5V_ALW
1
2
C1002
C1002
+3.3V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
SATA_LED<43>
BATT_WHITE<43>
BATT_YELLOW< 43>
WLAN_LED< 43>
LID_CL#<39,43>
C457
C457
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
SATA_LED
BATT_WHITE
BATT_YELLOW
WLAN_LED
LID_CL#
1
2
LS-6612P
JLED1
CONN@JLED1
CONN@
1
1
2
2
3
3
4
4
5
5
6
9
6
G1
7
10
7
G2
8
8
TYCO_2041322-8~D
TYCO_2041322-8~D
Link Done
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
LA-7741
LA-7741
LA-7741
30 56Thursday, June 23, 2011
30 56Thursday, June 23, 2011
30 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
+3.3V_LAN
1 2
R545 10K_040 2_5%~D@R 545 10K_0402_5%~D@
1 2
R546 10K_040 2_5%~D@R 546 10K_0402_5%~D@
D D
PM_LANPHY_ENABLE<18>
C C
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
+3.3V_LAN
R549
R549
10K_0402_5%~D
10K_0402_5%~D
1 2
R555 0_0402_5%~DR555 0_0402_5%~D
R557
@R557
@
10K_0402_5%~D
10K_0402_5%~D
25MHZ_18PF_X3G025000DI1H-H~D
25MHZ_18PF_X3G025000DI1H-H~D
Y3
Y3
1
IN
33P_0402_50V8J~D
33P_0402_50V8J~D
2
2
1
GND
C470
C470
OUT
GND
12
12
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PCIE_PTX_GLANRX_N7< 15>
R1144
R1144
0_0402_5%~D
0_0402_5%~D
1 2
3
4
LANCLK_REQ#<15>
PLTRST_LAN#<17>
CLK_PCIE_LAN<15>
CLK_PCIE_LAN#<15>
PCIE_PTX_GLANRX_P7<15>
LAN_SMBCLK<15>
LAN_SMBDATA<15>
33P_0402_50V8J~D
33P_0402_50V8J~D
2
C471
C471
1
1 2
R1187 0_0402_5%~DR 1187 0_0402_5%~D
12
C458 0.1U_0402_10V7K~DC458 0 .1U_0402_10V7K~D
12
C459 0.1U_0402_10V7K~DC459 0 .1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0 .1U_0402_10V7K~D
1 2
C461 0.1U_0402_10V7K~DC461 0 .1U_0402_10V7K~D
R551 0_0402_5%~DR551 0_0402_5%~D
1 2
1 2
R552 0_0402_5%~DR552 0_0402_5%~D
SMBus Device Address 0xC8
LAN_DISABLE#_R<39>
T142 PAD~DT142 PAD~D
T143 PAD~DT143 PAD~D
1K_0402_1%~D
1K_0402_1%~D
12
R561
R561
4
+3.3V_RUN
12
R547
R547
10K_0402_5%~D
10K_0402_5%~D
LANCLK_REQ#_R
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
PCIE_PTX_GLANRX_P7_C
PCIE_PTX_GLANRX_N7_C
LAN_SMBCLK_R
LAN_SMBDATA_R
LAN_DISABLE#_R
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
XTALO
XTALI
LAN_TEST_EN
RES_BIAS
3.01K_0402_1%~D
3.01K_0402_1%~D
12
R562
R562
U31
U31
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
MDI
MDI
PCIE
PCIE
RSVD_VCC3P3_1
RSVD_VCC3P3_2
SMBUS
SMBUS
VDD3P3_OUT
JTAG LED
JTAG LED
82579_QFN48_6X6~D
82579_QFN48_6X6~D
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI_PLUS2
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
RSVD_NC
VDD3P3_IN
VDD3P3_15
VDD3P3_19
VDD3P3_29
VDD1P0_47
VDD1P0_46
VDD1P0_37
VDD1P0_43
VDD1P0_11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
13
14
17
18
20
21
23
24
6
+RSVD_VCC3P3_1
1
+RSVD_VCC3P3_2
2
5
4
15
19
29
47
46
37
43
11
40
22
16
8
REGCTL_PNP10
7
49
3
LAN_TX0+
LAN_TX0-
LAN_TX1+
LAN_TX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
+3.3V_LAN_OUT
+1.0V_LAN
12
12
1
C464
C464
1U_0603_10V7K~D
1U_0603_10V7K~D
2
2
REGCTL_PNP10
+3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C466
C466
2
2
Note:
+1.0V_LAN will work at 0.95V to 1.15V
L29
L29
1 2
4.7UH_CBC2012T4R7M_20%~D
4.7UH_CBC2012T4R7M_20%~D
Idc max=330mA
+1.0V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C467
C467
C468
C468
2
1
+1.0V_LAN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C462
C462
C463
C463
1
1
2
2
Place C462, C46 3 and L29 clos e to U31
+3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1177
C1177
1
1
C469
C469
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1178
C1178
1
2
Place C1178 clo se to pin5
Q34
Q34
SI3456DDV-T1-GE3_TSOP6~D
+PWR_SRC_S
+3.3V_LAN
B B
1 2
L30 12NH_06 03CS-120EJTS_5%~DL 30 12NH_0603CS-120EJTS_5%~D
1 2
L31 12NH_06 03CS-120EJTS_5%~DL 31 12NH_0603CS-120EJTS_5%~D
LAN_TX1+
1 2
L33 12NH_06 03CS-120EJTS_5%~DL 33 12NH_0603CS-120EJTS_5%~D
LAN_TX1-
1 2
L32 12NH_06 03CS-120EJTS_5%~DL 32 12NH_0603CS-120EJTS_5%~D
1 2
L34 12NH_06 03CS-120EJTS_5%~DL 34 12NH_0603CS-120EJTS_5%~D
LAN_TX2-
1 2
L35 12NH_06 03CS-120EJTS_5%~DL 35 12NH_0603CS-120EJTS_5%~D
1 2
L36 12NH_06 03CS-120EJTS_5%~DL 36 12NH_0603CS-120EJTS_5%~D
LAN_TX3-
1 2
L37 12NH_06 03CS-120EJTS_5%~DL 37 12NH_0603CS-120EJTS_5%~D
DOCKED
DOCKED<39>
A A
Layout Notice : Place bead as
close PI3L500 as possible
FROM NIC DOCKED
5
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C473
C473
C472
C472
2
2
LAN_TX0+RLAN_TX0+
LAN_TX0-RLAN _TX0-
LAN_TX1+R
LAN_TX1-R
LAN_TX2+RLAN_TX2+
LAN_TX2-R
LAN_TX3+RLAN_TX3+
LAN_TX3-R
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
1: TO DOCK
0: TO RJ45
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C474
C474
2
39
U32
U32
2
A0+
3
A0-
6
A1+
7
A1-
9
A2+
10
A2-
11
A3+
12
A3-
13
SEL
15
LEDA0
16
LEDA1
42
LEDA2
5
PD
43
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
PI3L720ZHEX_TQFN42_9X3P5~D
VDD1VDD4VDD8VDD14VDD21VDD30VDD
4
LAN ANALOG
SWITCH
38
B0+
37
B0-
34
B1+
33
B1-
29
B2+
28
B2-
25
B3+
24
B3-
17
LEDB0
18
LEDB1
41
LEDB2
36
C0+
35
C0-
32
C1+
31
C1-
27
C2+
26
C2-
23
C3+
22
C3-
19
LEDC0
20
LEDC1
40
LEDC2
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
SW_LAN_TX0+ <44>
SW_LAN_TX0- <44>
SW_LAN_TX1+ <44>
SW_LAN_TX1- <44>
SW_LAN_TX2+ <44>
SW_LAN_TX2- <44>
SW_LAN_TX3+ <44>
SW_LAN_TX3- <44>
LAN_ACTLED_YEL# <44>
LED_100_ORG# <44>
LED_10_GRN# <44>
DOCK_LOM_TRD0+ <38>
DOCK_LOM_TRD0- <38>
DOCK_LOM_TRD1+ <38>
DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2+ <38>
DOCK_LOM_TRD2- <38>
DOCK_LOM_TRD3+ <38>
DOCK_LOM_TRD3- <38>
DOCK_LOM_ACTLED_YEL# <38>
DOCK_LOM_SPD100LED_ORG# <38>
DOCK_LOM_SPD10LED_GRN# <38>
TO
DOCK
3
SIO_SLP_LAN#<16,39>
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
+3.3V_ALW2
12
R565
R565
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q35A
Q35A
2
+3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
5
1
P
B
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
U15
U15
2
12
R564
R564
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q35B
Q35B
5
4
C478
C478
1 2
4
WLAN_LAN_DISB# <39>
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
ENAB_3VLAN
470K_0402_5%~D
470K_0402_5%~D
R1638
R1638
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LA-7741
LA-7741
LA-7741
3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C477
C477
2
1
+3.3V_LAN+3.3V_ALW
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
2
31 56Thursday, June 23, 2011
31 56Thursday, June 23, 2011
31 56Thursday, June 23, 2011
C476
C476
C475
C475
2
0.1
0.1
0.1
of
5
4
3
2
1
USBP7-<17>
USBP7+<17>
USH board conn
JUSH1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
GND1
22
GND2
TYCO_2-2041070-0
TYCO_2-2041070-0
CONN@JUSH1
CONN@
+3.3V_SUS
+3.3V_RUN
1 2
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@
D D
C C
CLK_PCI_TPM_TCM
12
RE5
@ RE5
@
33_0402_5%~D
33_0402_5%~D
1
@
@
CE3
CE3
27P_0402_50V8J~D
27P_0402_50V8J~D
2
+3.3V_SB3V
SP_TPM_LPC_EN<39>
CLK_PCI_TPM_TCM< 15>
PCH_PLTRST#_EC<17,34,35,39,40>
LPC_LFRAME#<14,34,39,40>
IRQ_SERIRQ<14,39,40>
+3.3V_SB3V
LPC_LAD0<14,34,39,40>
LPC_LAD1<14,34,39,40>
LPC_LAD2<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLKRUN#<16,39,40>
1 2
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D
1 2
4700P_0402_25V7K~D
4700P_0402_25V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1@
1@
C44
C44
1
1@
1@
2
C45
C45
2
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_TPM_TCM
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
TCM_BA1
ATMEL TPM for E4
U39
1@U39
1@
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A14-AB_TSSOP28
AT97SC3204-X2A14-AB_TSSOP28
VCC_0
VCC_1
VCC_2
V_BAT
NBO_13
NBO_14
GPIO6
TESTBI
TESTI
NC_7
GND_4
GND_11
GND_18
GND_25
10
19
24
12
13
14
6
9
8
7
4
11
18
25
+3.3V_RUN
JETWAY_CLK14M
NC_P
1 2
C554 1U_0402_6.3V6K~DC554 1U_0402_6.3V6K~D
TCM_BA0
PP
R656 4.7K_0402_5%~D@R 656 4.7K_0402_5%~D@
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
C550
C550
2
2
JETWAY_CLK14M <15 >
1 2
C551
C551
+3.3V_RUN
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C553
C553
1
1
C552
C552
2
2
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D
USH_SMBCLK
USH_SMBDAT
+3.3V_SUS
+3.3V_RUN
USH_SMBCLK<40>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C53
C53
1
2
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C51
C51
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C52
C52
1
2
USH_SMBDAT<40>
BCM5882_ALERT#<39>
BT_COEX_STATUS2<41>
BT_PRI_STATUS<41>
PLTRST_USH#<17>
USH_PWR_STATE #<39>
CONTACTLESS_DET#<18>
USH_DET#<18>
Co-lay U37 and U39
LPC layout: Place TCM first and then end LPC with TPM.
China TCM: NationZ & Jetway co-lay
VDD_0
VDD_1
VDD_2
NC_5
NC_12
NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
10
19
24
11
18
25
4
5
12
13
1
2
6
8
14
+3.3V_RUN
JETWAY_CLK14M
NC_P
+3.3V_SB3V
JETWAY_CLK14MCLK_PCI_TPM_TCM
12
@
@
RE6
RE6
33_0402_5%~D
33_0402_5%~D
1
@
@
CE4
CE4
27P_0402_50V8J~D
27P_0402_50V8J~D
2
LOW:Power Down Mode
High:Working Mode
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
PP
TCM_BA1
TCM_BA0
R657
@R657
@
10K_0402_5%~D
10K_0402_5%~D
R659
R659
10K_0402_5%~D
10K_0402_5%~D
+3.3V_RUN
12
12
12
R658
@R658
@
10K_0402_5%~D
10K_0402_5%~D
12
R660
R660
10K_0402_5%~D
10K_0402_5%~D
TCM_BA0
TCM_BA1
B B
U37
4@ U3 7
4@
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
GND_11
GND_18
GND_25
GND_4
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
TPM/TCM
TPM/TCM
TPM/TCM
LA-7741
LA-7741
LA-7741
32 56Thursday, June 23, 2011
32 56Thursday, June 23, 2011
32 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
D D
+1.5V_RUN
+PE_VDDH
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
C578
C578
2
C C
place close to pin U38.32
1
1
C574
C574
2
2
L47
L47
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
C579
C579
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C561
C561
2
CLK_PCIE_MMI<15>
CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>
PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_P6<15>
PCIE_PTX_MMIRX_N6<15>
PLTRST_MMI#<17>
MMICLK_REQ#<15>
4
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C562
C562
2
L45
L45
BLM18PG471SN1D_2P~D
BLM18PG471SN1D_2P~D
1 2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D
1 2
C573 0.1U_0402_10V7K~DC573 0.1U_0402_10V7K~D
1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D
1 2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C577
C577
2
2
1 2
L44 BLM18BD 601SN1D_0603~DL44 BLM18BD 601SN1D_0603~D
R677 191_0402_1%~DR677 191_0402_1%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C575
C575
C576
C576
2
+3.3VDDH
+VDDH_SD
+PE_VDDH
PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
1 2
U38
U38
16
3.3VDDH
9
VDDH
32
PE_VDDH
2
PE_REFCLKP
1
PE_REFCLKM
6
PE_TXP
7
PE_TXM
5
PE_RXP
4
PE_RXM
3
PE_REXT
33
GPAD
13
PE_RST#
14
MULTI-IO1
31
MULTI-IO2
OZ600FJ0LN_QFN32_5X5~D
OZ600FJ0LN_QFN32_5X5~D
3
DVDD
AVDD
SKT_VCC
MMI_VCC_OUT
SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7
MS_CD#
SD_CMD/MS_BS
MMI_CLK
SD_CD#
SD_WPI
+OZ_DVDD
10
+OZ_AVDD
8
+SKT_VCC
17
15
SD/MMCDAT1_R
28
SD/MMCDAT2_R
26
29
27
25
SD/MMCDAT3_R
24
SD/MMCDAT4_R
23
SD/MMCDAT5_R
22
SD/MMCDAT6_R
21
20
11
SD/MMCCMD_R
19
18
SD/MMCCD#
12
SDWP
30
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C563
C563
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C566
C566
C565
C565
2
2
R663 33_0402_5%~DR663 33_0402_5%~D
1 2
R664 33_0402_5%~DR664 33_0402_5%~D
1 2
R665 33_0402_5%~DR665 33_0402_5%~D
1 2
R668 33_0402_5%~DR668 33_0402_5%~D
1 2
R669 33_0402_5%~DR669 33_0402_5%~D
1 2
R670 33_0402_5%~DR670 33_0402_5%~D
1 2
R672 33_0402_5%~DR672 33_0402_5%~D
1 2
R673 33_0402_5%~DR673 33_0402_5%~D
1 2
R674 33_0402_5%~DR674 33_0402_5%~D
1 2
1 2
R676 33_0402_5%~DR676 33_0402_5%~D
2
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C564
C564
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0S D/MMCDAT0_R
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7S D/MMCDAT7_R
SD/MMCCMD
SD/MMCCLKSD/MMCCLK_R
1
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C560
C560
C559
C559
2
2
+3.3V_RUN_CARD
EMI request
SD/MMCCLK
@
@
RE678
B B
A A
RE678
33_0402_5%~D
33_0402_5%~D
1 2
1
CE757
@CE757
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
+3.3V_RUN_CARD
JSD1
CONN@JSD1
SD/MMCDAT3
SD/MMCCMD
SD/MMCCLK
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
12
1
C571
C571
C572
C572
2
SD/MMCDAT0
SD/MMCDAT1
10K_0402_5%~D
10K_0402_5%~D
SD/MMCDAT2
R826
R826
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
SD/MMCCD#
SDWP
SD/MMCCD#
SDWP
CONN@
14
DAT3/SD1
12
CMD/SD2
10
VSS1/SD3
9
VCC/SD4
8
CLK/SD5
6
GND/VSSS2/SD6
4
DAT0/SD7
3
DAT1/SD8
15
DAT2/SD9
13
DAT4/MMC10
11
DAT5/MMC11
7
DAT6/MMC12
5
DAT7/MMC13
19
CD_WP_SW /GND
20
CD_WP_SW /GND
17
CD_SW/SD
18
WP_SW/SD
2
CD_SW_TAISOL/SD
1
WP/SW_TAISOL/SD
16
GND_SW
T-SOL_156-4000000901_NR~D
T-SOL_156-4000000901_NR~D
Link Done
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Card Reader
Card Reader
Card Reader
LA-7741
LA-7741
LA-7741
33 56Thursday, June 23, 2011
33 56Thursday, June 23, 2011
33 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
USB_MCARD2_DET#
PCIE_MCARD2_DET#_R
D D
R694 100K_0402_5%~DR694 100K_0402_5%~D
1 2
R695 100K_0402_5%~DR695 100K_0402_5%~D
+3.3V_RUN
12
+3.3V_PCIE_WWAN
DDR_XDP_WAN_ SMBCLK<12,13,15,27>
DDR_XDP_WAN_ SMBDAT<12,13,15,27>
Mini WWAN/GPS/LTE/UWB H=5.2
PCIE_WAKE#<28,35,40>
MINI1CLK_REQ#<15>
CLK_PCIE_MINI1#<15>
CLK_PCIE_MINI1<15>
PCIE_PRX_WANTX_N 1<15>
PCIE_PRX_WANTX_P 1<15>
PCIE_PTX_WANRX_N 1<15>
PCIE_PTX_WANRX_P 1<15>
PCIE_MCARD2_DET#<17>
+1.5V_RUN
C C
33P_0402_50V8J~D
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C593
C593
C594
C594
2
2
+3.3V_PCIE_WWAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C610
C610
2
B B
33P_0402_50V8J~D
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C611
C611
2
2
PCIE_WAKE#
MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
PCIE_PTX_WANRX_N 1_C
1 2
PCIE_PTX_WANRX_P 1_C
1 2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
R725 0_0402_5%~DR725 0_0402_5%~D
C612
C612
1 2
HW_GPS_DISABLE2#<39>
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
C613
C613
2
PCIE_MCARD2_DET#_R
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
+
+
C615
C615
C614
C614
2
2
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
1
@
@
+
+
C1176
C1176
2
JMINI1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
MOLEX_48338-1088~D
MOLEX_48338-1088~D
SIM Card Push-Push
+SIM_PWR
UIM_RESET
UIM_CLK
1
C616
C616
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
A A
JSIM1
CONN@JSIM1
CONN@
1
VCC
2
3
4
GND
RST
VPP
CLK
NC
SUYIN_254070FB008S205ZL
SUYIN_254070FB008S205ZL
GND
GND
I/O
NC
5
UIM_VPP
6
UIM_DATA
7
8
9
10
+3.3V_PCIE_WWAN+3.3V_PCIE_W WAN
CONN@JMINI1
CONN@
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND2
LED_WWAN _OUT#
PWR
Rail
+3.3V
+3.3Vaux
+1.5V
4
R1157 0_0402_5%~DR1157 0_0402_5%~D
R1158 0_0402_5%~DR1158 0_0402_5%~D
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
1 2
WWAN_SM BCLK
WWAN_SM BDAT
USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN _OUT#L ED_WWAN_OUT#
+3.3V_PCIE_WWAN
R719
R719
G
G
2
1 2
100K_0402_5%~D
100K_0402_5%~D
S
S
Q77
Q77
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Voltage
Tolerance
+-9%
+-9%
+-5%
+3.3V_PCIE_WWAN
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
@R1160
@
@R1159
@
12
12
R1160
R1159
12
12
R704
R704
0_0402_5%~D
0_0402_5%~D
R697 0_0402_5%~D@ R697 0_0402_5%~D@
13
D
D
WWAN_SM BCLK
WWAN_SM BDAT
+1.5V_RUN
+SIM_PWR
WWAN_RA DIO_DIS# < 39>
PCH_PLTRST#_EC <17,32,35,39,40>
USBP5- <17>
USBP5+ <17>
USB_MCARD2_DET# <18>
PCIE_MCARD2_DET#USB_MCARD2_DET#
1 2
WIRELESS_LED# <39,43>
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250 (Wake enable)
250
5 (Not wake enable)
375
NA
3
WLAN_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<41>
COEX1_BT_ACTIVE<41>
COEX2_WLAN_ACTIVE
C600
@C600
@
33P_0402_50V8J~D
33P_0402_50V8J~D
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C601
C601
2
2
PCIE_PTX_WPANRX _N5<15>
PCIE_PTX_WPANRX _P5<15>
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C619
C619
2
2
PCIE_PTX_WLANRX_ N2<15>
PCIE_PTX_WLANRX_ P2<15>
1
PCH_CL_RST1#<15>
2
+3.3V_WLAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@ C603
@
1
C603
C602
C602
2
COEX2_WLAN_ACTIVE
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15>
CLK_PCIE_MINI3<15>
PCIE_PRX_WPANTX _N5<15>
PCIE_PRX_WPANTX _P5<15>
PCIE_MCARD3_DET#<18>
+3.3V_RUN
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@ C621
@
1
C621
C620
C620
2
1 2
R693 0_0402_5%~D@ R693 0_0402_5%~D@
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
1
2
21
D31
D31
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
PCIE_WAKE#<28,35,40>
MINI2CLK_REQ#<15>
CLK_PCIE_MINI2#<15>
CLK_PCIE_MINI2<15>
HOST_DEBUG_RX<40>
MSCLK<40>
PCIE_PRX_WLANTX_ N2<15>
PCIE_PRX_WLANTX_ P2<15>
PCIE_MCARD1_DET#<18>
PCH_CL_CLK1<15>
PCH_CL_DATA1<15>
R707 0_0402_5%~DR707 0_0402_5%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1
C605
C605
C604
C604
1
2
C596 0.1U_0402_10V7K~DC596 0 .1U_0402_10V7K~D
1 2
1 2
C598 0.1U_0402_10V7K~DC598 0 .1U_0402_10V7K~D
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1/2 Minicard Flash Card H=4
MINI3CLK_REQ#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
PCH_PLTRST#_EC
PCLK_80H<15>
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
2
PCLK_80H
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D
C622
C622
PCIE_PTX_WPANRX _N5_C
1 2
PCIE_PTX_WPANRX _P5_C
1 2
1 2
R711 100K_0402_5%~DR711 100K_0402_5%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C623
C623
2
1
WLAN_RADIO_DIS#_R
Mini WLAN/WIMAX H=6.7
PCIE_WAKE#
1 2
R700 0_0402_5%~DR700 0_0402_5%~D
1 2
R702 0_0402_5%~DR702 0_0402_5%~D
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2_C
PCIE_PTX_WLANRX_ P2_C
check
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
1
C607
C607
C606
C606
PCIE_WAKE#
1 2
R709 0_0402_5%~DR709 0_0402_5%~D
PCIE_MCARD3_DET#
C624
C624
C608
C608
1
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C626
C626
C625
C625
2
1
2
+3.3V_WLAN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
JMINI3
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
LOTES_AAA-PCI-073-P02-A
LOTES_AAA-PCI-073-P02-A
JMINI2
CONN@JMINI2
CONN@
GND2
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND2
R718
R718
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
MOLEX_48338-1088~D
MOLEX_48338-1088~D
WIMAX_LED#
WLAN_LED#
CONN@JMINI3
CONN@
+3.3V_WLAN
+1.5V_RUN
R705
R705
1 2
1 2
100K_0402_5%~D
100K_0402_5%~D
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
R710 0_0402_5%~DR710 0_0402_5%~D
USBP6USBP6+
USB_MCARD3_DET#
1
PCIE_MCARD1_DET#
1 2
R698 0_0402_5%~D@ R698 0_0402_5%~D@
PCIE_MCARD1_DET#
USB_MCARD1_DET#
MSDATA
WLAN_RADIO_DIS#_R
R703 0_0402_5%~DR703 0_0402_5%~D
USBP4USBP4+PCIE_MCARD1_DET#
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#
1 2
R706 0_0402_5%~D@R706 0_0402_5%~D@
WIMAX_LED# STUDY FOR DEBUG
100K_0402_5%~D
100K_0402_5%~D
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q124A
Q124A
USB_MCARD3_DET# PCIE_MCARD3_DET#
+1.5V_RUN
PCH_PLTRST#_EC
12
R712 100K_0402_5%~D@R712 100K_0402_5%~D@
WPAN Noise
USB_MCARD3_DET#
1
@C627
@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1 2
R692 100K_0402_5%~DR692 100K_0402_5%~D
PCIE_MCARD1_DET#USB_MCARD1_DET#
1 2
R699 100K_0402_5%~D@R699 100K_0402_5%~D@
1 2
R701 100K_0402_5%~DR701 100K_0402_5%~D
1 2
C595 4700P_0402_25V7K~DC595 4700P_ 0402_25V7K~D
PCH_PLTRST#_EC
12
MSDATA
+3.3V_WLAN
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
Q124B
Q124B
1 2
R708 0_0402_5%~D@R708 0_0402_5%~D@
LPC_LFRAME# <14,32,39,40>
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
LPC_LAD1 <14,32,39,40>
LPC_LAD0 <14,32,39,40>
USBP6- <17>
USBP6+ <17>
12
C627
+3.3V_ALW_PCH
+3.3V_RUN
HOST_DEBUG_TX <40>
USBP4- <17>
USBP4+ <17>
USB_MCARD1_DET# <18>
MSDATA <40>
WIRELESS_LED#WIRELESS_LED#
just reserve
+3.3V_ALW_PCH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Mini Card
Mini Card
Mini Card
LA-7741
LA-7741
LA-7741
34 56Thursday, June 23, 2011
34 56Thursday, June 23, 2011
34 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
4
3
2
1
Power Control for Mini card2
D D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
AUX_EN_WOW L<39>
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_WW AN_PWREN<39>
B B
+3.3V_ALW
Q39A
Q39A
2
12
R716
R716
100K_0402_5%~D
100K_0402_5%~D
Q41A
Q41A
12
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R713
R713
5
61
6
12
R714
R714
2
1
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q39B
Q39B
4
Q38
Q38
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
45
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
1
R1620
R1620
2
Power Control for Mini card1
+PWR_SRC_S
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R721
R721
MCARD_WW AN_PWREN#
61
2
R726
R726
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R722
R722
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q41B
Q41B
5
4
+3.3V_WLAN+3.3V_ALW
12
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C632
C632
+3.3V_PCIE_WWAN
Q40
Q40
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1M_0402_5%~D
1M_0402_5%~D
1
12
C644
C644
R1625
R1625
2
R715
R715
20K_0402_5%~D
20K_0402_5%~D
12
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q73
Q73
S
S
R723
R723
1K_0402_1%~D
1K_0402_1%~D
MCARD_WW AN_PWREN#
2
G
G
+1.5V_RUN
+3.3V_RUN +3.3V_CARD
0.1U_0402_25V6K~D
+3.3V_RUN
+3.3V_CARD
+1.5V_CARD
+1.5V_RUN
USBP10-<17>
USBP10+<17>
0.1U_0402_25V6K~D
1
2
1
C634
C634
2
EXPRCRD_STBY_R#
Note: Add connection on pin4, pin5, pin 13
and pin14 to support GMT 2nd source part
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C635
C635
2
SIO_SLP_S3#<11,16,27,39,42,48>
RUN_ON<27,39,42,48>
PCH_PLTRST#_EC<17,32,34,39,40>
1 2
R734 0_0402_5%~DR734 0_0402_5%~D
1 2
R717 0_0402_5%~D@ R717 0_0402_5%~D@
Power Control for Mini card3
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R728
R728
61
Q43A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_MISC_PW REN<39>
A A
Q43A
2
12
R733
R733
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW +3.3V_PC IE_FLASH
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
R729
R729
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q43B
Q43B
5
4
Q42
Q42
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1628
R1628
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C650
C650
2
12
20K_0402_5%~D
20K_0402_5%~D
R730
R730
+3.3V_CARDAUX
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
+3.3V_CARD
C646
C646
Express Card PWR S/W
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C633
C633
U41
U41
17
12
20
1
6
19
4
5
13
14
16
TPS2231MRGPR-2_QFN20_4X4~D
TPS2231MRGPR-2_QFN20_4X4~D
AUXOUT
AUXIN
3.3VIN23.3VOUT
1.5VOUT
1.5VIN
SHDN#
STBY#
SYSRST#
OC#
NC
NC
NC
NC
NC
PERST#
CPPE#
CPUSB#
RCLKEN
GND
PAD
Express Card Conn.
1 2
R724 0_0402_5%~D@R724 0_0402_5%~D@
1 2
R727 0_0402_5%~D@R727 0_0402_5%~D@
1
1
4
4
L49 D LW21SN900SQ2L_0805_4P~DL49 DLW21SN900SQ2L_0805_4P~D
2
2
3
3
CARD_SMBCLK<40>
CARD_SMBDAT<40>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C649
C649
2
CLK_PCIE_EXP#<15>
CLK_PCIE_EXP<15>
PCIE_PRX_EXPTX_N3<15>
PCIE_PRX_EXPTX_P3<15>
PCIE_PTX_EXPRX_N3<15>
PCIE_PTX_EXPRX_P3<15>
+3.3V_CARDAUX
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C643
C643
C642
C642
2
2
15
3
11
CARD_RESET#
8
EXPRCRD_CPPE#
10
CPUSB#
9
18
7
21
+3.3V_SUS
EXPRCRD_DET#<18>
USBP10_DUSBP10_D+
CPUSB#
CARD_SMBCLK
CARD_SMBDAT
PCIE_WAKE#<28,34,40>
EXPCLK_REQ#<15>
CARD_RESET#
EXPRCRD_CPPE#
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
1 2
1 2
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D
+1.5V_CARD
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
R731
R731
PCIE_PTX_EXPRX_N3_C
PCIE_PTX_EXPRX_P3_C
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C641
C641
C640
C640
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
R732
R732
C645
C645
2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
+1.5V_CARD+3.3V_SUS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
JEXP1
CONN@JEXP1
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
GND
TYCO_2-2041070-6~D
TYCO_2-2041070-6~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C637
C637
C638
C638
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
LA-7741
LA-7741
LA-7741
35 56Thursday, June 23, 2011
35 56Thursday, June 23, 2011
35 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
4
3
2
1
D79
L97
USB3RN2<17>
USB3RP2<17>
+5V_ALW
D D
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C678
C678
2
C C
USB_PWR_SHR_E N#<39>
B B
+3.3V_RUN
A A
USB_SIDE_EN#<39>
1
C677
C677
2
R1626 0_0402_ 5%~DR1626 0_0402_5%~D
+3.3V_RUN +3.3V_RUN
USB3TP1_C
USB3TP1<17>
USB3TN1<17>
USB3RP1<17>
USB3RN1<17>
12
C414 0.01U_0402_16V7K~DC414 0.01U_0402_16V7K~D
C415 0.01U_0402_16V7K~DC415 0.01U_0402_16V7K~D
C416 0.01U_0402_16V7K~DC416 0.01U_0402_16V7K~D
C417 0.01U_0402_16V7K~DC417 0.01U_0402_16V7K~D
1 2
R783 4.7K_0402_5%~D@ R783 4.7K_0402_5%~D@
1 2
R781 4.7K_0402_5%~D@ R781 4.7K_0402_5%~D@
1 2
R779 4.7K_0402_5%~D@ R779 4.7K_0402_5%~D@
1 2
R773 4.7K_0402_5%~D@ R773 4.7K_0402_5%~D@
12
12
12
USB3TN1_C
USB3RP1_C
USB3RN1_C
U49
U49
1
GND
2
IN
3
IN
4
EN1#
EN2#5FAULT#2
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
12
USBP0-<17>
USBP0+<17>
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C669
C669
2
2
PS8710BTQFN24GTR-A0_TQFN24_4X4
PS8710BTQFN24GTR-A0_TQFN24_4X4
+B_DE0
+B_EQ1
+A_DE0
+A_EQ1
+5V_USB_PWR
10
FAULT1#
9
OUT1
8
OUT2
7
ILIM
6
11
T-PAD
SB#
+5V_ALW +5V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C715
C715
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C670
C670
U90
U90
1
VDD
A_DE1
13
B_DE1
VDD
5
PD#
A_EQ0
B_EQ0
19
A_OUTp
A_INp
20
A_OUTn
A_INn
22
B_OUTp
23
B_OUTn
3
I2C_R0
12C_EN
4
I2C_R1
16
SCL_CTL
15
SDA_CTL
USB_OC0# <17>
USB_PWR_SHR_V BUS_EN<39>
8
SB
7
Y-
6
Y+
5
VDD
PI5USB1457AZAEX_TDFN8_2X2~ D
PI5USB1457AZAEX_TDFN8_2X2~ D
@
@
+A_DE1
18
+B_DE1
6
+A_EQ0
17
+B_EQ0
2
USB3TP1_RP
12
USB3TN1_RP
11
USB3RP1_RP
9
B_INp
USB3RN1_RP
8
B_INn
7
REXT
14
TEST
24
21
GND
10
GND
25
EPAD
USB3RN2
USB3RP2 USB3RP2_D+
12
R750
R750
24.9K_0402_1%~D
24.9K_0402_1%~D
1 2
R784 0_0402_5%~DR 784 0_0402_5%~D
U2
U2
INT
D-
D+
SEL
GND
12
R753
R753
R752
R752
@
@
4.7K_0402_5%~D
4.7K_0402_5%~D
12
1
2
3
4
9
12
12
R754
R754
@
@
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
R751
R751
3.3K_0402_1%~D
3.3K_0402_1%~D
PWRSHARE_EN
USBP0_DUSBP0_D+
SEL
@
@
4
1
R1608 0_0402_5%~D@ R1608 0_0402_5%~D@
R1609 0_0402_5%~D@ R1609 0_0402_5%~D@
USB3TN2<17>
USB3TP2<17>
1 2
1 2
12
R771
R771
4.7K_0402_5%~D
4.7K_0402_5%~D
L97
4
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
1 2
R1614
R1614
10K_0402_5%~D
10K_0402_5%~D
@ R 1613
@
10K_0402_5%~D
10K_0402_5%~D
3
3
2
2
C410 0.01U_0402_16V7K~DC410 0.01U_0402_16V7K~D
C411 0.01U_0402_16V7K~DC411 0.01U_0402_16V7K~D
+5V_ALW
2
G
G
R1613
USB3TN1_RP
USB3TP1_RP
12
12
1 2
13
D
D
S
S
C412 0.01U_0402_16V7K~DC412 0.01U_0402_16V7K~D
C413 0.01U_0402_16V7K~DC413 0.01U_0402_16V7K~D
USB3RN2_D- USB3RN2_D-
USB3TP2_C USB3TP2_D+
R816
R816
100K_0402_5%~D
100K_0402_5%~D
PWRSHARE_EN #
Q48
Q48
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
USB3RN1_RP
USB3RP1_RP USB3RP1_D+
12
USB3TP1_RP_C USB3TP1_D+
12
USB3RN2_D-
USB3RP2_D+
USB3TN2_D-
USB3TP2_D+
L98
L98
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1612 0_0402_5%~D@ R1612 0_0402_5%~D@
1 2
R1607 0_0402_5%~D@ R1607 0_0402_5%~D@
L95
L95
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1605 0_0402_5%~D@ R1605 0_0402_5%~D@
1 2
R1604 0_0402_5%~D@ R1604 0_0402_5%~D@
L96
L96
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1606 0_0402_5%~D@ R1606 0_0402_5%~D@
1 2
R1603 0_0402_5%~D@ R1603 0_0402_5%~D@
D79
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
3
3
2
2
+5V_ALW
3
3
2
2
3
3
2
2
10
9
7
6
USB3TN2_D-USB3TN2_C
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C676
C676
2
USB3RN1_D-
USB3TN1_D-USB3TN1_RP_C
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
USB3RP2_D+
USB3TN2_D-
USB3TP2_D+
C675
C675
ESATA_USB_PWR _EN#<39>
+5V_USB_PWR
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
+
+
2
USBP1+<17>
PWRSHARE_EN #
+5V_USB_CHG_PWR
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
+
+
C651
C651
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C652
C652
2
USBP1-<17>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C654
C654
2
USB3RN1_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+
USBP0_D+ USBP0_R_D+
USBP0_D-
USBP1_DUSBP1_D+
2
3
D73
PESD5V0U2BT_SOT23-3~D
D73
C655
C655
PESD5V0U2BT_SOT23-3~D
1
U48
U48
1
GND
FAULT1#
2
IN
OUT1
3
OUT2
IN
4
3
ILIM
EN1#
EN2#5FAULT#2
T-PAD
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
USBP0_R_DUSBP0_R_D+
2
USB3RN1_D-
D72
PESD5V0U2BT_SOT23-3~D
D72
PESD5V0U2BT_SOT23-3~D
USB3RP1_D+
USB3TN1_DUSB3TP1_D+
1
D78
D78
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
L51
L51
4
4
1
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R736 0_0402_5%~D@ R736 0_0402_5%~D@
1 2
R740 0_0402_5%~D@ R740 0_0402_5%~D@
USB3RN2_DUSB3RP2_D+
USB3TN2_DUSB3TP2_D+
L52
L52
4
4
1
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R737 0_0402_5%~D@ R737 0_0402_5%~D@
1 2
R739 0_0402_5%~D@ R739 0_0402_5%~D@
+SATA_SIDE_PWR
10
9
8
7
6
11
10
9
7
6
3
3
2
2
JUSB2
JUSB2
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
7
GND-DRAIN
8
StdA-SSTX-
9
StdA-SSTX+
SANTA_373130-1
SANTA_373130-1
USBP1_D+
3
3
USBP1_D-
2
2
USB_OC4# <17>
USB_OC0# <17>
JUSB1
JUSB1
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
7
GND-DRAIN
8
StdA-SSTX-
9
StdA-SSTX+
SANTA_373280-1
SANTA_373280-1
new conn
USB3RN1_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+
USBP0_R_D-
new conn
10
GND
11
GND
12
GND
13
GND
+5V_USB_CHG_PWR
12
R748
R748
24.9K_0402_1%~D
24.9K_0402_1%~D
10
GND
11
GND
12
GND
13
GND
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB 3.0 x2
USB 3.0 x2
USB 3.0 x2
LA-7741
LA-7741
LA-7741
36 56Thursday, June 23, 2011
36 56Thursday, June 23, 2011
36 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
4
3
2
1
ESATA Repeater
D D
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PRX_DTX_P4_C<14>
C C
ESATA_PTX_DRX_P4_C
ESATA_PTX_DRX_N4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
+3.3V_RUN
1 2
R741 0_0402_5%~DR741 0_0402_5%~D
ESATA_PTX_DRX_P4
12
C663 0.01U_0402_ 16V7K~DC663 0.01U_0402_16V7K~D
C664 0.01U_0402_ 16V7K~DC664 0.01U_0402_16V7K~D
C665 0.01U_0402_ 16V7K~DC665 0.01U_0402_16V7K~D
C666 0.01U_0402_ 16V7K~DC666 0.01U_0402_16V7K~D
ESATA_PTX_DRX_N4
12
ESATA_PRX_DTX_N4
12
12
U44
U44
7
EN
17
NC_GND_VDD
19
18
1
2
4
5
3
13
21
PS8513BTQFN20GTR-A0_TQFN20_4X4
PS8513BTQFN20GTR-A0_TQFN20_4X4
NC_GND_VDD
NC_GND_VDD
A_INp
A_INn
B_OUTn
B_OUTp
GND
GND
GND
PREXT/NC/VDD
NC/GND/VDD
VCC
VCC
A_PRE
B_PRE
A_OUTp
A_OUTn
B_INp
B_INn
+SATA_SIDE_PWR
+3.3V_RUN
6
16
20
10
9
8
15
14
11
12
1
2
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
C667
C667
+
+
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
C662
C662
C661
C661
2
REXT
ESATA_PE1
ESATA_PE2
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_RP
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C668
C668
1
2
0_0402_5%~D
0_0402_5%~D
12
R1595
R1595
0_0402_5%~D
@
0_0402_5%~D
@
0_0402_5%~D
0_0402_5%~D
12
R1594
R1594
0_0402_5%~D
0_0402_5%~D
12
12
R742
R742
R743
R743
JESA1
CONN@
JESA1
CONN@
1
USBP9_DUSBP9_D+
B B
L90
L90
USBP9+<17>
USBP9-<17>
1
1
4
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R1150 0_0402_5%~D@ R1150 0_0402_5%~D@
1 2
R1151 0_0402_5%~D@ R1151 0_0402_5%~D@
USBP9_D+
2
2
USBP9_D-
3
3
2
3
D74
D74
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP SATA_PRX_D TX_P4
SATA_PTX_DRX_P4
1 2
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
SATA_PTX_DRX_N4
1 2
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
SATA_PRX_DTX_N4
1 2
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
1 2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
VBUS
2
D-
3
D+
4
GND
5
GND
6
A+
ESATA
ESATA
7
A-
8
GND
9
B-
10
B+
11
GND
12
GND
13
GND
14
GND
15
GND
TYCO_2129160-2~D
TYCO_2129160-2~D
USB
USB
Place D74 close to JESATA1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
LA-7741
LA-7741
LA-7741
37 56Thursday, June 23, 2011
37 56Thursday, June 23, 2011
37 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
DOCK_LOM_SPD10LED_GRN#<31>
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D
D D
DPD_PCH_DOCK_HPD<16>
Close to DOCK
Its for Enhance ESD on dock issue.
C C
B B
DPD_PCH_DOCK_HPD
DPD_PCH_LANE_P0< 16>
DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1< 16>
DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2< 16>
DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3< 16>
DPD_PCH_LANE_N3<16>
12
R757
R757
100K_0402_5%~D
100K_0402_5%~D
1
2
+DOCK_PWR_BAR
12
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D
12
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D
12
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D
12
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D
12
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D
12
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D
12
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D
12
DPD_DOCK_AUX<26>
DPD_DOCK_AUX#<26>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
C695
C695
DPD_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
GREEN_DOCK<24>
HSYNC_DOCK<24>
VSYNC_DOCK<24>
CLK_MSE<40>
DAT_MSE<40>
D_LFRAME#<39>
D_CLKRUN#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>
DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,55>
DOCK_PWR_BTN#<40>
SLICE_BAT_PRES#<39,55> DOCK_DET# <39>
BLUE_DOCK<24>
RED_DOCK<24>
DAI_BCLK#<29>
DAI_LRCK#<29>
DAI_DI<29>
DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD0<39>
D_LAD1<39>
D_LAD2<39>
D_LAD3<39>
D_SERIRQ<39>
D_DLDRQ1#<39>
DOCK_PSID<45>
1
2
4
SLICE_BAT_PRES#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
@
@
1
CE6
CE6
2
DOCK_DET_1
DPD_CA_DET
DPD_DOCK_LANE_P0
DPD_DOCK_LANE_N0
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_AUX
DPD_DOCK_AUX#
BLUE_DOCK
RED_DOCK
GREEN_DOCK
2
3
C702
C702
@
@
1
3
JDOCK1
CONN@JDOCK1
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
GND1
146
PWR1
147
PWR1
148
D33
D33
SM24.TCT_SOT23-3~D
SM24.TCT_SOT23-3~D
PWR1
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
Shield_G
JAE_WD2F144W B3R300~D
JAE_WD2F144W B3R300~D
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
149
150
151
152
159
160
161
162
163
164
DOCK_AC_OFF
DPC_CA_DET
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
DOCK_DET_R#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
C703
C703
1
2
DOCK_AC_OFF <39,55>
DOCK_LOM_SPD100LED_ORG# <31>
DPC_CA_DET < 26>DPD_CA_DET<26>
C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D
12
C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D
12
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D
12
C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D
12
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D
12
C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D
12
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D
12
C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D
12
DPC_DOCK_AUX <26>
DPC_DOCK_AUX# <26>
ACAV_DOCK_SRC# <55>
DAT_DDC2_DOCK <24>
CLK_DDC2_DOCK <24>
12
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D
12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D
1 2
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D
1 2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D
USBP8+ <17>
USBP8- <17>
USBP3+ <17>
USBP3- <17>
CLK_KBD <40>
DAT_KBD <40>
USB3RN4 < 17>
USB3RP4 <17>
USB3TN4 <17>
USB3TP4 <1 7>
BREATH_LED# <39,43>
DOCK_LOM_ACTLED_YEL# <31>
DOCK_LOM_TRD0+ <31>
DOCK_LOM_TRD0- <31>
DOCK_LOM_TRD1+ <31>
DOCK_LOM_TRD1- <31>
+LOM_VCT
DOCK_LOM_TRD2+ <31>
DOCK_LOM_TRD2- <31>
DOCK_LOM_TRD3+ <31>
DOCK_LOM_TRD3- <31>
DOCK_DCIN_IS+ <5 3>
DOCK_DCIN_IS- <53>
DOCK_POR_RST# <40>
+DOCK_PWR_BAR
DAI_12MHZ# DAI_BCLK#
12
RE11
@RE11
@
10_0402_1%~D
10_0402_1%~D
1
CE8
@CE8
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
+LOM_VCT
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
2
DPC_PCH_LANE_P0 <16>
DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P1 <16>
DPC_PCH_LANE_N1 <16>
DPC_PCH_LANE_P2 <16>
DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P3 <16>
DPC_PCH_LANE_N3 <16>
SATA_PRX_DKTX_P5_C <14>
SATA_PRX_DKTX_N5_C <14>
SATA_PTX_DKRX_P5_C <14>
SATA_PTX_DKRX_N5_C <14>
1
@
@
C701
C701
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
D32
D32
21
12
@RE12
@
10_0402_1%~D
10_0402_1%~D
1
@CE9
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
RE12
CE9
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1
2
DPC_PCH_DOCK_HPD
DPC_PCH_DOCK_HPD <16>
C696
C696
Close to DOCK
Its for Enhance ESD on dock issue.
12
R758
R758
100K_0402_5%~D
100K_0402_5%~D
DOCK_DET#
1 2
R755 100K_0402_5%~DR755 100K_0402_5%~D
CLK_PCI_DOCK
12
R756
R756
33_0402_5%~D
33_0402_5%~D
1
C704
C704
12P_0402_50V8J~D
12P_0402_50V8J~D
2
1
+3.3V_ALW
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DOCKING CONN
DOCKING CONN
DOCKING CONN
LA-7741
LA-7741
LA-7741
38 56Thursday, June 23, 2011
38 56Thursday, June 23, 2011
38 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
+3.3V_ALW
1 2
R796 10K_040 2_5%~DR796 10K_0402_5%~D
1 2
R798 100K_04 02_5%~DR798 100K_0402_5%~D
1 2
R761 100K_04 02_5%~DR761 100K_0402_5%~D
1 2
D D
C C
B B
R763 100K_04 02_5%~DR763 100K_0402_5%~D
1 2
R760 100K_04 02_5%~DR760 100K_0402_5%~D
1 2
R774 100K_04 02_5%~DR774 100K_0402_5%~D
1 2
R776 100K_04 02_5%~DR776 100K_0402_5%~D
1 2
R768 10K_040 2_5%~DR768 10K_0402_5%~D
1 2
R769 100K_04 02_5%~DR769 100K_0402_5%~D
1 2
R778 100K_04 02_5%~DR778 100K_0402_5%~D
1 2
R785 10K_040 2_5%~DR785 10K_0402_5%~D
+3.3V_RUN
1 2
R457 100K_04 02_5%~DR457 100K_0402_5%~D
1 2
R766 100K_04 02_5%~DR766 100K_0402_5%~D
1 2
R772 10K_040 2_5%~D@R 772 10K_0402_5%~D@
1 2
R767 100K_04 02_5%~DR767 100K_0402_5%~D
1 2
R775 10K_040 2_5%~DR775 10K_0402_5%~D
1 2
R3 100K_0402 _5%~DR3 100K_0402_5%~D
+3.3V_ALW
VGA_ID
1 2
R800 100K_0402_5%~DR800 100K_0402_5%~D
5
DYN_TURB_PWR_ALRT#
HW_GPS_DISABLE2#
PROCHOT_GATE
CPU_DETECT#
SLICE_BAT_PRES#
WWAN_RA DIO_DIS#
USB_PWR_SHR_E N#
USB_SIDE_EN#
ESATA_USB_PWR _EN#
USB_PWR_SHR_V BUS_EN
DOCK_SMB_ALERT#
MCARD_PCIE_SATA#
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
LCD_TST
SYS_LED_MASK#
CHARGE_EN
VGA_ID
1 2
R803 100K_0402_5%~D@R803 100K_0402_5%~D@
CRT_SWITCH<24>
MCARD_MISC_PW REN<35>
PROCHOT_GATE<53>
DOCK_SMB_ALERT#<38,55>
USB_SIDE_EN#<36>
EN_I2S_NB_CODEC#<29>
USH_PWR_STATE #<32>
EN_DOCK_PWR_BAR<55>
PANEL_BKEN_EC<23>
ENVDD_PCH<16,23>
LCD_TST<23>
PSID_DISABLE#<45>
PBAT_PRES#<45,55>
DOCKED<31>
DOCK_DET#<38>
AUD_NB_MUTE#<29>
MCARD_WW AN_PWREN<35>
LCD_VCC_TEST_EN<23>
CCD_OFF<23>
AUD_HP_NB_SENSE<29,30>
ESATA_USB_PWR _EN#<36>
MODULE_ON<55>
SLICE_BAT_ON<55>
SLICE_BAT_PRES#<38,55>
MODULE_BATT_PRES#<45,55>
CHARGE_MODULE_BATT<55>
CHARGE_PBATT<55>
DEFAULT_OVRDE<55>
USB_PWR_SHR_E N#<36>
CPU_DETECT#<7>
MOD_SATA_PCIE#_DET<28>
ZODD_WAKE#<28>
BCM5882_ALERT#<32>
SUSACK#<16>
SLP_ME_CSW_DE V#<18>
LAN_DISABLE#_R<31>
SYS_LED_MASK#<43>
SIO_EXT_WAKE#<18>
WIRELESS_LED#<34,43>
USB_PWR_SHR_V BUS_EN<36>
WLAN_RADIO_DIS#<34>
WIRELESS_ON#/OFF<30>
BT_RADIO_DIS#<41>
WWAN_RA DIO_DIS#<34>
SYS_PWROK<7,16>
CPU_VTT_ON<50>
PCH_DPWROK<16>
R797 0_0402_5%~DR797 0_0402_5%~D
1 2
VGA_ID0
Discrete
0
UMA 1
A A
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP
12
R793
@ R 793
@
1K_0402_1%~D
1K_0402_1%~D
5
4
CRT_SWITCH
MCARD_MISC_PW REN
PROCHOT_GATE
LID_CL_SIO#
USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE #
EN_DOCK_PWR_BAR
PANEL_BKEN_EC
ENVDD_PCH
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
AUD_NB_MUTE#
MCARD_WW AN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR _EN#
MODULE_ON
SLICE_BAT_ON
SLICE_BAT_PRES#
MODULE_BATT_PRES#
CHARGE_MODULE_BATT
CHARGE_PBATT
DEFAULT_OVRDE
USB_PWR_SHR_E N#
MCARD_PCIE_SATA#
CPU_DETECT#
MOD_SATA_PCIE#_DET
ZODD_WAKE#
BCM5882_ALERT#
VGA_ID
SLP_ME_CSW_DE V#
LAN_DISABLE#_R
CHARGE_EN
SYS_LED_MASK#
DYN_TURB_PWR_ALRT#
WIRELESS_LED#
USB_PWR_SHR_V BUS_EN
WLAN_RADIO_DIS#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
WWAN_RA DIO_DIS#
SYS_PWROK
CPU_VTT_ON
1 2
R802 0_0402_5%~D@R802 0_0402_5%~D@
4
U46
U46
B52
GPIOA0
A49
GPIOA1
B53
GPIOA2
A50
GPIOA3
B54
GPIOA4
A51
GPIOA5
B55
GPIOA6
A52
GPIOA7
A33
GPIOB0
B36
GPIOB1
A34
GPOC2
B37
GPOC3
A35
GPOC4
B38
GPOC5
A36
GPOC6/TACH4
A37
GPIOC7
B40
GPIOD0
A38
GPIOC1
B41
GPIOC0
A39
GPIOB7
B42
GPIOB6
A40
GPIOB5
B43
GPIOB4
A41
GPIOB3
B44
GPIOB2
B32
GPIOD1
A31
GPIOD2
B33
GPIOD3
B15
GPIOD4
A15
GPIOD5
B16
GPIOD6
A16
GPIOD7
A1
GPIOE0/RXD
B2
GPIOE1/TXD
A2
GPIOE2/RTS#
B3
GPIOE3/DSR#
A3
GPIOE4/CTS#
B45
GPIOE5/DTR#
A42
GPIOE6/RI#
B4
GPIOE7/DCD#
A59
GPIOF0
B62
GPIOF1
A58
GPIOF2
B61
GPIOF3/TACH8
A56
GPIOF4/TACH7
B59
GPIOF5
A55
GPIOF6
B58
GPIOF7
B47
GPIOG0/TACH5
A45
GPIOG1
B48
GPIOG2
A46
GPIOG3
B49
GPIOG4
A47
GPIOG5
B50
GPIOG6
A48
GPIOG7/TACH6
B13
GPIOH0
A13
GPIOH1
A53
SYSOPT1/GPIOH2
B57
SYSOPT0/GPIOH3
B14
GPIOH4
A14
GPIOH5
B17
GPIOH6
B18
GPIOH7
+3.3V_ALW
1
2
B5
A17
B30
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOK1/TACH3
GPIOM3/PWM4
GPIOM4/PWM6
14.318MHZ/GPIOM0
CLK32/GPIOM2
DB Version 0.4
ECE5048-LZY_DQFN132_11X11~D
ECE5048-LZY_DQFN132_11X11~D
DB Version 0.4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
C705
C705
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
GPIOJ0
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
EP
3
2
1 2
1
2
1
C707
C707
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
SIO_SLP_A# <16,42,49>
0.75V_DDR_VTT_ON <47>
AUX_EN_WOW L <35>
WLAN_LAN_DISB# <31>
SIO_SLP_LAN# <16,31>
SIO_SLP_SUS# <16>
GPIO_PSID_SELECT <45>
DOCK_HP_DET <29>
DOCK_MIC_DET <29>
ME_FWP <14>
MASK_SATA_LED# <43>
LED_SATA_DIAG_OUT# <43>
RUN_ON <27,35,42,48>
SPI_WP#_SEL <14>
SUS_ON <42>
HW_GPS_DISABLE2# <34>
LPC_LFRAME# <14,32,34,40>
RUNPWROK <7,40>
SP_TPM_LPC_EN <32>
C714
C714
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C706
C706
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
SIO_SLP_A#
B63
0.75V_DDR_VTT_ON
A60
A61
B65
A62
1 2
B66
R765 0_0402_5%~DR 765 0_0402_5%~D
A63
B67
A64
SIO_SLP_LAN#
A5
SIO_SLP_SUS#
B6
A6
MODC_EN
B7
DOCK_HP_DET
A7
DOCK_MIC_DET
B8
ME_FWP
A8
MASK_SATA_LED#
B9
B10
LED_SATA_DIAG_OUT#
A10
TEMP_ALERT#_R TEMP_ALERT#
B11
RUN_ON
A11
B12
A12
SUS_ON
B60
A57
BAT1_LED#
B64
B68
BAT2_LED#
A9
B1
USH_PWR_ON
A18
A44
HW_GPS_DISABLE2#
B34
BREATH_LED#
B39
B51
LPC_LAD0
A27
LPC_LAD1
A26
LPC_LAD2
B26
LPC_LAD3
B25
LPC_LFRAME#
A21
PCH_PLTRST#_EC
B22
CLK_PCI_5048
A28
CLKRUN#
B20
LPC_LDRQ0#
A23
LPC_LDRQ1#
A22
IRQ_SERIRQ
B21
CLK_SIO_14M
A32
B35
D_LAD0
B29
D_LAD1
B28
D_LAD2
A25
D_LAD3
A24
D_LFRAME#
B23
D_CLKRUN#
A19
D_DLDRQ1#
B24
D_SERIRQ
A20
BC_INT#_ECE5048
A29
BC_DAT_ECE5048
B31
BC_CLK_ECE5048
A30
RUNPWROK
A4
SP_TPM_LPC_EN
B56
B19
R804 1K_0402_1%~DR804 1K_0402_1%~D
+CAP_LDO
B46
B27
C1
1
C708
C708
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
ACAV_IN_NB <40,53,55>
SIO_SLP_S4# <16>
SIO_SLP_S3# <11,16,27,35,42,48>
IMVP_PWRGD <51>
IMVP_VR_ON <51>
DOCK_AC_OFF_EC
MODC_EN <28>
1.8V_RUN_PWRGD <48>
BAT1_LED# <43>
BAT2_LED# <43>
T117PAD~D @T117PAD~D @
BREATH_LED# <38,43>
LPC_LAD0 <14,32,34,40>
LPC_LAD1 <14,32,34,40>
LPC_LAD2 <14,32,34,40>
LPC_LAD3 <14,32,34,40>
PCH_PLTRST#_EC <17,32,34,35,40>
CLK_PCI_5048 <17>
CLKRUN# <16,32,40>
LPC_LDRQ0# <14>
LPC_LDRQ1# <14>
IRQ_SERIRQ <14,32,40>
CLK_SIO_14M <15>
EC_32KHZ_ECE5048 <40>
D_LAD0 <38>
D_LAD1 <38>
D_LAD2 <38>
D_LAD3 <38>
D_LFRAME# <38>
D_CLKRUN# <38>
D_DLDRQ1# <38>
D_SERIRQ <38>
BC_INT#_ECE5048 <40>
BC_DAT_ECE5048 <40>
BC_CLK_ECE5048 <40>
+CAP_LDO trace width 20 mils
10_0402_1%~D
10_0402_1%~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
DOCK_AC_OFF_EC <55>
R738 0_0402_5%~DR738 0_0402_5%~D
trace width 20 mils
trace width 20 mils
12
R794
@R794
@
1
C712
@C712
@
2
2
1
C709
C709
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
1 2
CLK_PCI_5048CLK_SIO_14M
R795
@R795
@
10_0402_1%~D
10_0402_1%~D
C713
@C713
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
1
1
C710
C710
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
+3.3V_ALW
C711 0.1U_0402_25V6K~D@C711 0.1U_0402_25V6K~D@
1 2
5
1
P
B
4
2 1
2
A
G
3
12
1
2
O
D34
@D34
@
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
U47
@U 47
@
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
TEMP_ALERT# <18>
+3.3V_ALW
12
LID_CL_SIO#
1
C716
C716
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
R805
R805
100K_0402_5%~D
100K_0402_5%~D
DOCK_AC_OFF <38,55>
12
R770
@R770
@
33K_0402_5%~D
33K_0402_5%~D
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
RUN_ON
CPU_VTT_ON
0.75V_DDR_VTT_ON
SLICE_BAT_ON
SUS_ON
R807 10_0402_1 %~DR807 10_0402_1 %~D
R777 100K_04 02_5%~DR777 100K_0402_5%~D
R780 100K_04 02_5%~DR780 100K_0402_5%~D
R782 100K_04 02_5%~DR782 100K_0402_5%~D
R786 100K_04 02_5%~DR786 100K_0402_5%~D
R789 100K_04 02_5%~DR789 100K_0402_5%~D
R790 100K_04 02_5%~DR790 100K_0402_5%~D
R791 100K_04 02_5%~DR791 100K_0402_5%~D
R878 100K_04 02_5%~DR878 100K_0402_5%~D
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ECE5048
ECE5048
ECE5048
LA-7741
LA-7741
LA-7741
1
+3.3V_RUN
12
12
12
12
12
12
12
12
LID_CL# <30,43>
39 56Thursday, June 23, 2011
39 56Thursday, June 23, 2011
39 56Thursday, June 23, 2011
of
0.1
0.1
0.1
5
+3.3V_ALW
C720
C720
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
5
U50
1.05V_VTTPWRGD<50,54>
VCCSAPWROK<54>
Modify name net
+3.3V_ALW
D D
C C
R814 100K_0402_5%~DR814 100K_0402_5%~D
R817 100K_0402_5%~DR817 100K_0402_5%~D
R821 100K_0402_5%~DR821 100K_0402_5%~D
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
R823 100K_0402_5%~D@R823 100K_0402_5%~D@
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D
EC firmware can configure those un-used SMBUS pins as GPO (Output),
then it's OK to leave these un-used pins No-Connect.
JTAG_RST#
1.05V_VTTPWRGD
VCCSAPWROK
PCIE_WAKE#
1 2
R759 10K_0402_5%~DR7 59 10K_0402_5%~D
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+3.3V_ALW
12
12
12
10K_0402_5%~D
10K_0402_5%~D
12
100_0402_1%~D
100_0402_1%~D
12
BC_DAT_ECE5048
BC_DAT_ECE1117
BC_DAT_EMC4022
PBAT_SMBDAT
PBAT_SMBCLK
LPC_LDRQ#_MEC
CHARGER_SMBDAT
CHARGER_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
R824
R824
@
@
R836
R836
JTAG_RST# citcu it
c
lose to U51.B57
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C735
C735
2
32 KHz Clock
C741
C741
1 2
22P_0402_50V8J~D
22P_0402_50V8J~D
MEC_XTAL2
Y6
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
C743
C743
22P_0402_50V8J~D
22P_0402_50V8J~D
11
12
13
14
R885
@R885
@
C747
@ C747
@
1 2
1 2
+3.3V_ALW
CONN@
CONN@
JDEG2
JDEG2
1
1
2
2 2
3
3
4
4 4
5
5
6
6 6
7
7
8
8 8
9
9
10
10 10
G1
G2
G3
G4
ACES_87153-10411
ACES_87153-10411
12
1
2
49.9_0402_1%~D
49.9_0402_1%~D
12
R864
R864
MSCLK
MSDATA
HOST_DEB_RX
MEC_XTAL1
B B
A A
Place closely pin A29
CLK_PCI_MEC
10_0402_1%~D
10_0402_1%~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
U50
1
P
B
2
A
3
1
1
2
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R858
R858
R859
R859
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
JTAG1
@SHORT PADS~D
@SHORT PADS~D
CONN@JTAG1
CONN@
10K_0402_5%~D
10K_0402_5%~D
R861
R861
R860
R860
1 2
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
R853 0_0402_5%~DR8 53 0_0402_5%~D
R855 0_0402_5%~DR8 55 0_0402_5%~D
1.05V_0.8V_PWROK
C736 0.1U_0402_25V6K~ DC736 0.1U_0402_25V6K~D
12
DOCK_POR_RST#<38>
EC_32KHZ_ECE5048<39>
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R848
R848
R847
R847
1 2
1 2
1.05V_0.8V_PWROK <14,51>
SML1_SMBDATA<15>
SML1_SMBCLK<15>
CLK_TP_SIO<41>
DAT_TP_SIO<41>
CLK_KBD<38>
DAT_KBD<38>
CLK_MSE< 38>
DAT_MSE<38>
PBAT_SMBDAT<45>
PBAT_SMBCLK<45>
DOCK_POR_RST#
PCH_ALW_ON<42>
BIA_PWM_EC<23>
BC_CLK_ECE5048<39>
BC_DAT_ECE5048<39>
BC_INT#_ECE5048<39>
BC_CLK_EMC4022<22>
BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
PCH_PCIE_WAKE#<16>
PCIE_WAKE#<28,34,35>
BC_CLK_ECE1117<41>
BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
BEEP<29>
SIO_SLP_S5#<16>
ACAV_IN_NB< 39,53,55>
SIO_EXT_SMI#<17>
SIO_RCIN#<18>
IRQ_SERIRQ<14,32,39>
PCH_PLTRST#_EC<17 ,32,34,35,39>
CLK_PCI_MEC<17>
LPC_LFRAME#<14,32,34,39>
LPC_LAD0<14,32,34,39>
LPC_LAD1<14,32,34,39>
LPC_LAD2<14,32,34,39>
LPC_LAD3<14,32,34,39>
CLKRUN#<16,32,3 9>
SIO_EXT_SCI#<18>
MEC_XTAL2 MEC_XTAL2_R
R1068 0_0402_5%~DR106 8 0_0402_5%~D
1 2
R867 0_0402_5%~DR867 0_0402_ 5%~D
100K_0402_5%~D
@R850
100K_0402_5%~D
@
12
R850
R849
R849
HOST_DEBUG_TXHOST_DEB_TX
HOST_DEBUG_RX
R875 C744
240K 4700p
*
130K 4700p
4700p
62K
33K
4700p
4700p
8.2K
4.3K
4700p
4700p
2K
1K
4700p
BOARD_ID rise time is measured from 5%~68%.
5
12
REV
X00
X01
X02
A00
4
SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
PCH_ALW_ON
BIA_PWM_EC
BC_CLK_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_EMC4022
BC_DAT_EMC4022
BC_INT#_EMC4022
PCH_PCIE_WAKE#
PCIE_WAKE#
BC_CLK_ECE1117
BC_DAT_ECE1117
BC_INT#_ECE1117
BEEP
SIO_SLP_S5#
ACAV_IN_NB
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
MEC_XTAL1
BOARD_ID
4
+RTC_CELL
R815
R815
0_0402_5%~D
0_0402_5%~D
+RTC_CELL_VBAT
1 2
U51
U51
PS/2 INTERFACE
PS/2 INTERFACE
A5
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
B6
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
A37
GPIO110/PS2_CLK2/GPTP-IN6
B40
GPIO111/PS2_DAT2/GPTP-OUT6
A38
GPIO112/PS2_CLK1A
B41
GPIO113/PS2_DAT1A
A39
GPIO114/PS2_CLK0A
B42
GPIO115/PS2_DAT0A
B59
GPIO154/I2C1C_DATA/PS2_CLK1B
A56
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
A51
GPIO145/I2C1K_DATA/JTAG_TDI
B55
GPIO146/I2C1K_CLK/JTAG_TDO
B56
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
A53
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
B57
JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
B22
GPIO050/FAN_TACH1
A21
GPIO051/FAN_TACH2
B23
GPIO052/FAN_TACH3
B24
GPIO053/PWM0
A23
GPIO054/PWM1
B25
GPIO055/PWM2
A24
GPIO056/PWM3
BC-LINK
BC-LINK
A43
GPIO123/BCM_A_CLK
B45
GPIO122/BCM_A_DAT
A42
GPIO121/BCM_A_INT#
A12
GPIO022/BCM_B_CLK
B13
GPIO023/BCM_B_DAT
A13
GPIO024/BCM_B_INT#
B20
GPIO044/BCM_C_CLK
A18
GPIO043/BCM_C_DAT
B19
GPIO042/BCM_C_INT#
A20
GPIO047/LSBCM_D_CLK
B21
GPIO046/LSBCM_D_DAT
A19
GPIO045/LSBCM_D_INT#
A16
GPIO032/GPTP-IN3/BCM_E_CLK
B16
GPIO31/GPTP-OUT2/BCM_E_DAT
A15
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
A6
GPIO011/nSMI
A27
GPIO061/LPCPD#
B29
LDRQ#
A28
SER_IRQ
B30
LRESET#
A29
PCI_CLK
B31
LFRAME#
A30
LAD0
B32
LAD1
A31
LAD2
B33
LAD3
A32
CLKRUN#
A33
GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
A61
XTAL1
A62
XTAL2
B62
GPIO160/32KHZ_OUT
B34
NC1
A64
NC2
B68
NC3
15mil
C740 close to U51.B12
+3.3V_ALW
R875
R875
240K_0402_5%~D
240K_0402_5%~D
1 2
1
C744
C744
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C723
C723
AGND
B66
SYSTEM_ID
+3.3V_ALW
B64
A11
VBAT
VTR[1]
DB Version 0.12
DB Version 0.12
VSS[1]
VSS[4]
B11
B60
+3.3V_ALW
A22
B35
VTR[2]
least
15mil
1 2
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C725
C725
2
A41
A58
A52
A26
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]B3VTR[8]
MISC INTERFACE
MISC INTERFACE
GPIO025/UART_CLK
GPIO120/UART_TX
GPIO124/GPTP-OUT5/UART_RX
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
PROCHOT#/PWM4
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
SMBUS INTERFACE
SMBUS INTERFACE
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
DELL PWR SW INF
DELL PWR SW INF
PECI
PECI
I2S
I2S
VR_CAP
VSS_RO
EP
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
C1
B12
B54
+VR_CAP
1
C740
C740
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
R871
R871
1K_0402_1%~D
1K_0402_1%~D
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C742
C742
RESET_OUT#
CHIPSET_ID for BID
function
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C727
C727
2
2
GPIO021/RC_ID1
GPIO020/RC_ID2
VCC_PRWGD
GPIO060/KBRST
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
nFWP
GPIO041
GPIO126
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
PECI_VREF
I2S_DAT
I2S_CLK
I2S_WS
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C729
C729
2
PECI
+3.3V_M
2
G
G
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C731
C731
C726
C726
2
SYSTEM_ID
A10
BOARD_ID
B10
DDR_ON
B14
HOST_DEBUG_TX
B44
HOST_DEBUG_RX
B46
RUNPWROK
B26
EN_INVPWR
A25
B36
B37
B38
DDR_HVREF_RST_GATE
A34
DYN_TUR_CURRNT_SET#
A35
CPU1.5V_S3_GATE
A36
MSDATA
A40
MSCLK
B43
SIO_A20GATE
A45
PS_ID
A55
A57
B61
FWP#
B65
PROCHOT#_EC
A46
B2
A2
B8
B18
ME_SUS_PWR_ACK
A8
1.5V_SUS_PWRGD
B9
PM_APWROK
A9
1.05V_A_PWRGD
A14
ALW_PW RGD_3V_5V
B15
DEVICE_DET#
A17
RESET_OUT#
B39
A44
PCH_RSMRST#
B47
AC_PRESENT
A54
SIO_PWRBTN#
B58
DOCK_SMB_DAT
A3
DOCK_SMB_CLK
B4
LCD_SMBDAT
A4
LCD_SMBCLK
B5
BAY_SMBDAT
B7
BAY_SMBCLK
A7
GPU_SMBDAT
B48
GPU_SMBCLK
B49
CHARGER_SMBDAT
A47
CHARGER_SMBCLK
B50
CARD_SMBDAT
B52
CARD_SMBCLK
A49
USH_SMBDAT
B53
USH_SMBCLK
A50
A59
LAT_ON_SW#
B63
ALWON
A60
VCI_IN1#
A63
POWER_SW _IN#
B67
ACAV_IN
B1
DOCK_PWR_SW #
A1
+PECI_VREF
B51
PECI_EC_R
A48
B17
B27
B28
12
R893
R893
100K_0402_5%~D
100K_0402_5%~D
PCH_PWRGD# <22>
13
D
D
Q50
Q50
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
R884 1K_0402_1%~DR884 1K_0402_1%~D
R886 1K_0402_1%~DR886 1K_0402_1%~D
R887 1K_0402_1%~DR887 1K_0402_1%~D
0.1U_0402_25V6K~D
1
1
1
C728
C728
C739
C739
C732
C732
2
2
2
DDR_ON <47>
HOST_DEBUG_TX <34>
HOST_DEBUG_RX <3 4>
RUNPWROK <7,39>
EN_INVPWR <23>
PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7>
DYN_TUR_CURRNT_SET# <53 >
CPU1.5V_S3_GATE <11>
MSDATA <34>
MSCLK <34>
SIO_A20GATE <18>
PS_ID <45>
1 2
1 2
12
ME_SUS_PWR_ACK <16>
1.5V_SUS_PWRGD <47>
PM_APWROK <16>
1.05V_A_PWRGD <49>
ALW_PW RGD_3V_5V <46>
DEVICE_DET# <28>
RESET_OUT# <16>
PCH_RSMRST# <41>
AC_PRESENT <16>
SIO_PWRBTN# <16>
DOCK_SMB_DAT <38>
DOCK_SMB_CLK <38>
BAY_SMBDAT <28,45>
BAY_SMBCLK <28,45>
CHARGER_SMBDAT <53>
CHARGER_SMBCLK <53>
CARD_SMBDAT <35 >
CARD_SMBCLK <35>
USH_SMBDAT <32>
USH_SMBCLK <32>
ALWON <46>
ACAV_IN <22,53,55>
1 2
R863 43_0402_5%~DR863 43_0402_5%~D
FWP#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_ALW
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C730
C730
VOL_MUTE <30>
VOL_UP <30>
VOL_DOWN <30>
R863 close to
U51& least 250mils
PECI_EC <7>
GPIO024/THSEL_STRAP note
i.THSEL_STRAP =1 (selects thermistor on diode channel 1)
ii.THSEL_STRAP = 0 (selects remote diode on diode channel 1)
R872
R872
10K_0402_5%~D
10K_0402_5%~D
1 2
R879
@R879
@
10K_0402_5%~D
10K_0402_5%~D
1 2
1
2
VCI_IN1#
R869 10K_0402_5%~DR869 10K_0402_5%~D
1 2
R876 100K_0402_5%~DR876 100K_0402_5%~D
1 2
R880 100K_0402_5%~DR880 100K_0402_5%~D
1 2
R881 100K_0402_5%~DR881 100K_0402_5%~D
1 2
R882 100K_0402_5%~DR882 100K_0402_5%~D
1 2
R883 10K_0402_5%~DR883 10K_0402_5%~D
1 2
R843 8.2K_0402_5%~D@R84 3 8.2K_0402_5%~D@
1 2
R889 100K_0402_5%~DR889 100K_0402_5%~D
1 2
R892 10K_0402_5%~DR892 10K_0402_5%~D
R862 0_0402_5%~DR862 0_0402_5%~D
C737
C737
2
Bat2 = Amber LE D
Bat1 = Blue LED
20mA drive pins
+1.05V_RUN_VTT
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+RTC_CELL
12
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
MSDATA
12
DDR_ON
PCH_ALW_ON
DOCK_POR_RST#
EN_INVPWR
1.05V_0.8V_PWROK
RESET_OUT#
CPU1.5V_S3_GATE
PCH_RSMRST#
POWER_SW _IN#<22>
DOCK_PWR_SW #<22>
+1.05V_RUN_VTT
PROCHOT#_EC
1 2
R1179 10K_0402_5%~D@R1179 10K_0402_5%~D@
1 2
R812 100K_0402_5%~D@R812 100K_0402_5%~D@
1
+RTC_CELL
POWER_SW _IN#
DOCK_PWR_SW #
LAT_ON_SW#
DYN_TUR_CURRNT_SET#
12
1
2
+RTC_CELL
12
R825 10K_0402_5%~DR8 25 10K_0402_5%~D
1
2
+RTC_CELL
12
13
D
D
2
G
G
S
S
R1180 0_0402_5%~DR118 0 0_040 2_5%~D
RUNPWROK
RUN_ON_ENABLE#<42>
AC_PRESENT
LCD_SMBCLK
LCD_SMBDAT
DOCK_SMB_DAT
DOCK_SMB_CLK
BAY_SMBDAT
BAY_SMBCLK
DEVICE_DET#
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
VOL_MUTE
VOL_DOWN
VOL_UP
R810
R810
100K_0402_5%~D
100K_0402_5%~D
R811 10K_0402_5%~DR8 11 10K_0402_5%~D
C722
C722
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R819
R819
100K_0402_5%~D
100K_0402_5%~D
1 2
C734
C734
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R870
R870
100K_0402_5%~D
100K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
R1169 100K_0402_5%~DR1169 100K_0402_5%~D
R1197 100K_0402_5%~DR1197 100K_0402_5%~D
R1118 100K_0402_5%~DR1118 100K_0402_5%~D
C721
@C721
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
1 2
C733
@C733
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
Q47
@
Q47
@
+3.3V_RUN
12
R799
R799
10K_0402_5%~D
10K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
1 2
R835 10K_0402_5%~DR835 10K_0402_5%~D
12
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D
12
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D
12
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D
12
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D
12
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D
12
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D
12
R1171 100K_0402_5%~DR1171 100K_0402_5%~D
12
R1125 100K_0402_5%~DR1125 100K _0402_5%~D
12
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D
12
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D
12
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D
12
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D
12
12
12
POWER_SW #_MB < 30,41>
DOCK_PWR_BTN# <38>
Q45
Q45
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MEC5055
MEC5055
MEC5055
ize Document Number Rev
LA-7741
LA-7741
LA-7741
1
H_PROCHOT# <7,51,53>
+3.3V_ALW_PCH
+3.3V_ALW
+5V_RUN
+3.3V_RUN
40 55Thursday, June 23, 2011
40 55Thursday, June 23, 2011
40 55Thursday, June 23, 2011
0.1
0.1
0.1
of
5
+3.3V_TP
1
C755
C755
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
D D
TP_CLK
TP_DATA
2
3
D37
PESD5V0U2BT_SOT23-3~D
D37
PESD5V0U2BT_SOT23-3~D
DAT_TP_SIO< 40>
1
CLK_TP_SIO<40>
Place close to JTP1
+5V_RUN+3.3V_ALW
1
C756
C756
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
C C
1
C758
C758
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
4
+3.3V_TP
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
12
R903
R903
10P_0402_50V8J~D
10P_0402_50V8J~D
C752
C752
1
2
+3.3V_ALW +3.3V_RUN +3.3V_TP
Touch Pad
R902
R902
L54 BLM18A G601SN1D_0603~DL54 BLM18A G601SN1D_0603~D
L55 BLM18A G601SN1D_0603~DL55 BLM18A G601SN1D_0603~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C751
C751
2
R1161
R1161
0_0603_5%~D
0_0603_5%~D
1 2
R1162
@R1162
@
0_0603_5%~D
0_0603_5%~D
1 2
3
BlueTooth
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C749
C749
2
+3.3V_TP
TP_DATA
TP_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
1
2
PS2_CLK_TS
PS2_DAT_TS
TP_DATA
TP_CLK
JTP1
CONN@JTP1
CONN@
1
1
2
2
3
3
4
4
5
5
6
9
6
G1
7
10
7
G2
8
8
TYCO_2041070-8~D
TYCO_2041070-8~D
+3.3V_RUN
12
12
C750
C750
2
COEX2_WLAN_ACTIVE<34>
R1133
R1133
1K_0402_5%~D
1K_0402_5%~D
1 2
R1134
R1134
1K_0402_5%~D
1K_0402_5%~D
1 2
BT_DET#<17>
COEX1_BT_ACTIVE<34>
BT_COEX_STATUS2< 32>
BT_PRI_STATUS<32>
BT_ACTIVE<43>
BT_RADIO_DIS#< 39>
USBP11-<17>
USBP11+<17>
BT_COEX_STATUS2
BT_PRI_STATUS
1
+3.3V_RUN
1 2
C748
C748
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
JBT1
CONN@JBT1
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
12
100P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
C753
C753
1
2
100P_0402_50V8J~D
10K_0402_5%~D
10K_0402_5%~D
@C754
@
12
C754
R904
R904
1
2
Link Done
13
11
GND
14
12
GND
ACES_50228-0127N-001
ACES_50228-0127N-001
Link Done
Place close to JKB1
KB Conn. Pitch=1.0mm
+3.3V_ALW
+5V_RUN
KB_DET#
PS2_CLK_TS
PS2_DAT_TS
KB_DET#<18>
BC_INT#_ECE1117<40>
BC_DAT_ECE1117<40>
BC_CLK_ECE1117<40>
JKB1
CONN@JKB1
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
TYCO_1-2041084-0~D
TYCO_1-2041084-0~D
Power Switch for debug
POWER_SW#_M B<30,40>
100P_0402_50V8J~D
100P_0402_50V8J~D
C759
@C759
@
1
2
112
PWRSW1
@PW RSW1
@
@SHORT PADS~D
@SHORT PADS~D
Place on Bottom
2
Link Done
B B
+3.3V_ALW
+5V_ALW
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C289
C289
A A
1
2
U9
U9
1
VCC
2
GND
RT9818A-46GU3_SC70-3~D
RT9818A-46GU3_SC70-3~D
RESET#
3
RSMRST#
R1622
R1622
1 2
10K_0402_5%~D
10K_0402_5%~D
PCH_RSMRST#<40>
EC SIDE
PCH_RSMRST#
1 2
R1623 0_0402_5%~D@R1623 0_0402_5%~D@
PCH_RSMRST#_Q
+3.3V_ALW
1 2
C288 0.1U_0402_25V6K~DC288 0.1U_0402_25V6K~ D
5
U7
U7
1
P
B
4
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
PCH_RSMRST#_Q <14,16>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Touch PAD/Int KB/BT
Touch PAD/Int KB/BT
Touch PAD/Int KB/BT
LA-7741
LA-7741
LA-7741
41 56Thursday, June 23, 2011
41 56Thursday, June 23, 2011
41 56Thursday, June 23, 2011
1
0.1
0.1
0.1
5
+3.3V_ALW_PCH Source
+3.3V_ALW2
12
R907
R907
100K_0402_5%~D
100K_0402_5%~D
ALW_ON_3.3V#
61
ALW_ENABLE<20>
D D
Q51A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_ALW_ON<40>
Q51A
2
+3.3V_SUS Source
+3.3V_ALW2
12
R915
R915
100K_0402_5%~D
100K_0402_5%~D
Q53A
Q53A
2
SUS_ON_3.3V#
61
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SUS_ON<39>
+PWR_SRC_S
12
100K_0402_5%~D
100K_0402_5%~D
3
5
4
+PWR_SRC_S
12
3
5
4
R905
R905
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q51B
Q51B
R911
R911
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q53B
Q53B
+3.3V_M Source
+3.3V_ALW2
12
61
Q57A
B B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SIO_SLP_A#<16,39,49>
Q57A
2
+PWR_SRC_S
R918
R918
100K_0402_5%~D
100K_0402_5%~D
A_ON_3.3V#
5
12
R917
R917
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q57B
Q57B
4
A_ENABLE
4
+3.3V_ALW +3.3V_ALW_ PCH
ALW_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
R1619
R1619
+3.3V_ALW
SUS_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
+3.3V_ALW
1M_0402_5%~D
1M_0402_5%~D
12
R1617
R1617
Q49
Q49
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C762
C762
3300P_0402_50V7K~D
3300P_0402_50V7K~D
2
Q54
Q54
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
R1618
R1618
1
C767
C767
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
Q58
Q58
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C770
C770
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
C760
C760
1
2
+3.3V_SUS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C765
C765
1
2
+3.3V_M
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C768
C768
1
2
R908
R908
20K_0402_5%~D
20K_0402_5%~D
12
R914
R914
20K_0402_5%~D
20K_0402_5%~D
12
R919
@R919
@
20K_0402_5%~D
20K_0402_5%~D
3
DC/DC Interface
A_ON_3.3V#
2
G
G
SIO_SLP_S3#<11,16,27,35,39,48>
+3.3V_M
RUN_ON<27,35,39,48>
12
R916
R916
39_0603_5%~D
39_0603_5%~D
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q60
Q60
S
S
RUN_ON_ENABLE#<40>
1 2
R735 0_0402_5%~DR735 0_0402_5%~D
1 2
R744 0_0402_5%~D@ R744 0_0402_5%~D@
SIO_SLP_S3#<11,16,27,35,39,48>
RUN_ON<27,35,39,48>
+3.3V_ALW2
12
100K_0402_5%~D
100K_0402_5%~D
RUN_ON_ENABLE#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q52A
Q52A
2
C1199
C1199
1U_0603_10V7K~D
1U_0603_10V7K~D
1 2
R749 0_0402_5%~DR749 0_0402_5%~D
1 2
R747 0_0402_5%~D@ R747 0_0402_5%~D@
+3.3V_ALW
1U_0603_10V7K~D
1U_0603_10V7K~D
R909
R909
12
2
1
+1.5V_RUN Source
Q59
+PWR_SRC_S
12
1.5V_RUN_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
5
4
R920
R920
100K_0402_5%~D
100K_0402_5%~D
Q52B
Q52B
+1.5V_MEM
470K_0402_5%~D
470K_0402_5%~D
12
R1610
R1610
Q59
NTGS4141NT1G_TSOP6~D
NTGS4141NT1G_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C771
C771
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
+1.5V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
12
C769
C769
R921
R921
20K_0402_5%~D
20K_0402_5%~D
+1.05V_RUN Source
C1198
C1198
+PWR_SRC_S
2
+5V_ALW
1
2
12
1.05V_RUN_ENABLE
13
D
D
G
G
S
S
U78
U78
1
VIN1
2
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2
7
VIN2
TPS22966DPUR_SON14_2X3~D
TPS22966DPUR_SON14_2X3~D
R930
R930
100K_0402_5%~D
100K_0402_5%~D
Q64
Q64
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
VOUT1
VOUT1
CT1
GND
CT2
VOUT2
VOUT2
GPAD
+1.05V_M
Q63
Q63
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8
7
5
470K_0402_5%~D
470K_0402_5%~D
12
R1611
R1611
14
13
12
11
10
9
8
15
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C773
C773
2
C1196
@C1196
@
1 2
270P_0402_50V7K~D
270P_0402_50V7K~D
C1197
C1197
1 2
270P_0402_50V7K~D
270P_0402_50V7K~D
+1.05V_RUN
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
36
12
C772
C772
1
R931
R931
20K_0402_5%~D
20K_0402_5%~D
2
+5V_RUN Source
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
12
C761
C761
1
2
+3.3V_RUN Source
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C764
C764
1
2
20K_0402_5%~D
20K_0402_5%~D
12
20K_0402_5%~D
20K_0402_5%~D
R913
R913
R910
R910
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW _PCH
2
G
G
12
R929
@ R 929
@
39_0603_5%~D
39_0603_5%~D
+3.3V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
Q69
Q69
S
S
12
R922
@R922
@
1K_0402_1%~D
1K_0402_1%~D
+3.3V_SUS_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
Q65
SUS_ON_3.3V#
A A
Q65
S
S
ALW_ON_3.3V#
2
G
G
12
R928
@R928
@
1K_0402_1%~D
1K_0402_1%~D
+3.3V_ALWPCH_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
RUN_ON_ENABLE#
Q66
2
Q66
G
G
S
S
12
@R923
@
1K_0402_1%~D
1K_0402_1%~D
+5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
R923
@
@
Q67
Q67
12
R924
@R924
@
1K_0402_1%~D
1K_0402_1%~D
+1.5V_RUN_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
Q68
Q68
2
G
G
S
S
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDD Q
2
G
G
12
R925
@R925
@
39_0402_5%~D
39_0402_5%~D
+1.05V_RUN_CHG
SSM3K7002FU_SC70-3~D
@
SSM3K7002FU_SC70-3~D
@
13
D
D
Q70
Q70
S
S
RUN_ON_CPU1.5VS3#<7,11>
2
G
G
12
R926
R926
220_0402_5%~D
220_0402_5%~D
+1.5V_CPU_VDDQ_CHG
13
D
D
S
S
12
R927
R927
22_0603_5%~D
22_0603_5%~D
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q71
Q71
SSM3K7002FU_SC70-3~D
13
D
D
Q72
2
Q72
G
G
S
S
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Discharg Circuit
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
ize Document Number R ev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
POWER CONTROL
POWER CONTROL
POWER CONTROL
LA-7741
LA-7741
LA-7741
42 56Thursday, June 23, 2011
42 56Thursday, June 23, 2011
42 56Thursday, June 23, 2011
1
0.1
0.1
0.1
of
5
4
3
2
1
+3.3V_ALW
12
R932
R932
10K_0402_5%~D
21
21
10K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
+3.3V_ALW
12
R937
R937
100K_0402_5%~D
100K_0402_5%~D
Q78A
Q78A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
Q74A
Q74A
Q80A
Q80A
2
2
2
Q74B
5
12
R950
R950
100K_0402_5%~D
100K_0402_5%~D
Q74B
3
4
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
5
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
3
Q78B
Q78B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
D59
D59
D62
D62
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
C C
SATA_ACT#<14>
MASK_SATA_LED#<39>
LED_SATA_DIAG_OUT#<39>
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
HDD LED solution for White LED Battery LED
61
2
61
2
+5V_ALW
1 3
1 2
R934 4.7K_0402_5%~DR934 4.7K_0402_5%~D
1 3
1 2
R938 4.7K_0402_5%~DR938 4.7K_0402_5%~D
Q75
Q75
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
PANEL_HDD_LED <23>
Q81
Q81
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
SATA_LED <30>
BAT2_LED#<39>
BAT1_LED#<39>
WLAN LED solution for White LED
+5V_ALW
2
61
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R939 4.7K_0402_5%~DR939 4.7K_0402_5%~D
WLAN_LED <30>
BREATH_LED#<38,39>
Q83B
Q83B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
5
MASK_BASE_LEDS#
Q83A
Q83A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
2
MASK_BASE_LEDS#
Q84A
Q84A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
BAT2_LED#_Q
BAT1_LED#_Q
61
MASK_BASE_LEDS#
R949
R949
4.7K_0402_5%~D
4.7K_0402_5%~D
1 2
R958
R958
4.7K_0402_5%~D
4.7K_0402_5%~D
1 2
R951
R951
330_0402_5%~D
330_0402_5%~D
1 2
R959
R959
330_0402_5%~D
330_0402_5%~D
1 2
LED1
LED1
LTW-193ZDS5_WHITE~D
LTW-193ZDS5_WHITE~D
Place LED1 close to SW1
BREATH_WHITE_LED_SNIFFBREATH_LED#_Q
21
BATT_WHITE <30>
BATT_YELLOW <30>
BATT_WHITE_LED <23>
BATT_YELLOW_LED <23>
1 2
R957 1K_0402_1%~DR957 1K_0402_1%~D
R955
R955
4.7K_0402_5%~D
4.7K_0402_5%~D
1 2
Breath LED
+5V_ALW
BREATH_WHITE_LED <23>
B B
LED Circuit Control Table
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
Fiducial Mark
FD1
@FD1
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
A A
FD2
@FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
H3
@H3
@
H_2P8
H_2P8
1
H15
@ H15
@
H16
@H16
@
H_2P8
H_2P8
H_3P4
H_3P4
1
1
5
@H4
@
H_2P0
H_2P0
@H17
@
H_2P3
H_2P3
H4
H17
H5
@ H5
@
H_2P8
H_2P8
1
H18
@ H18
@
H_3P4
H_3P4
1
LVDS standoff
@H7
@
H6
@H6
@
CLIP_C5
CLIP_C5
CLIP_C5
CLIP_C5
1
1
H20
@ H20
@
H19
@H19
@
H_2P8
H_2P8
H_2P3
H_2P3
1
1
H7
1
H21
@H21
@
H_2P8
H_2P8
1
1
0
1 0
@H11
@
H10
@ H10
@
H9
@H9
@
H_2P8
H_2P8
@H22
@
H_2P0X2P5
H_2P0X2P5
H_2P8
H_2P8
H_2P8
H_2P8
1
1
H22
1
H11
@ H24
@
H_2P8
H_2P8
X
11
+3.3V_ALW
C778 0. 1U_0402_25V6K~DC778 0. 1U_0402_25V6K~D
1 2
5
U58
SYS_LED_MASK#<39>
H12
@ H12
@
H13
@H13
@
H_2P6
H_2P6
H_2P6
H_2P6
1
1
1
H26
@ H26
@
H24
H25
@H25
@
H_2P8
H_2P8
1
4
H27
@H27
@
H_2P8
H_2P8
H_2P8
H_2P8
1
1
1
3
SYS_LED_MASK#
LID_CL#
LID_CL#<30,39>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
B
2
A
U58
P
MASK_BASE_LEDS#
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
2
EMI CLIP
CLIP1
CLIP1
EMI_CLIP
EMI_CLIP
GND
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PAD and Standoff
PAD and Standoff
PAD and Standoff
LA-7741
LA-7741
LA-7741
1
43 56Thursday, June 23, 2011
43 56Thursday, June 23, 2011
43 56Thursday, June 23, 2011
0.1
0.1
0.1
of
5
TR1
D D
SW_ LAN_TX0+<31>
SW_ LAN_TX0-<31>
+TRM_CT 1
+TRM_CT 2
SW_ LAN_TX1+<31>
1
1
SW_ LAN_TX1-<31>
C37
C37
C36
C36
2
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
C C
1
C38
C38
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
+TRM_CT 3
+TRM_CT 4
1
C39
C39
2
SW_ LAN_TX2+<31>
SW_ LAN_TX2-<31>
SW_ LAN_TX3+<31>
SW_ LAN_TX3-<31>
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
TR1
1
TD1+
2
TD1-
3
TDCT1
4
TDCT2
5
TD2+
6
TD2-
7
TD3+
8
TD3-
9
TDCT3
10
TDCT4
11
TD4+
12
TD4-
350UH_H 5120DNL~D
350UH_H 5120DNL~D
1:1
1:1
T1/A
T1/A
1:1
1:1
T1/A
T1/A
1:1
1:1
T1/A
T1/A
1:1
1:1
T1/A
T1/A
4
T1/B
T1/B
T1/B
T1/B
T1/B
T1/B
T1/B
T1/B
TX1+
TXCT1
TXCT2
TX2+
TX3+
TXCT3
TXCT4
TX4+
TX1-
TX2-
TX3-
TX4-
24
23
22
21
20
19
18
17
16
15
14
13
NB_LAN_ TX0+
NB_LAN_ TX0-
Z2805
Z2807
NB_LAN_ TX1+
NB_LAN_ TX1-
NB_LAN_ TX2+
NB_LAN_ TX2-
Z2806
Z2808
NB_LAN_ TX3+
NB_LAN_ TX3-
3
R1089 15 0_0402_5%~DR1089 15 0_0402_5%~D
LAN_ACT LED_YEL#<31>
LED_10_ GRN#<31>
LED_100 _ORG#<31>
12
12
12
12
1 2
NB_LAN_ TX3-
NB_LAN_ TX3+
NB_LAN_ TX1-
NB_LAN_ TX2-
NB_LAN_ TX2+
NB_LAN_ TX1+
NB_LAN_ TX0-
NB_LAN_ TX0+
R1091 150_040 2_5%~DR1091 150_040 2_5%~D
1 2
R1090 150_040 2_5%~DR1090 150_040 2_5%~D
1 2
2
+3.3V_LA N
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
470P_0402_50V7K~D
1U_0603_10V4Z~D
1U_0603_10V4Z~D
C1169
C1169
1
1
2
2
LAN_ACT LED_YEL#_R
470P_0402_50V7K~D
C1168
C1168
C1167
C1167
1
2
JLOM1
CONN@JLOM1
CONN@
9
Yellow LED+
10
Yellow LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Green LED-
13
Orange LED-
12
Green-Orange LED+
TYCO_2041 341-1~D
TYCO_2041 341-1~D
1
14
GND
15
GND
Link Done
R1112 75_0402_1%~DR1112 75_0402_1%~D
R1111 75_0402_1%~DR1111 75_0402_1%~D
R1114 75_0402_1%~DR1114 75_0402_1%~D
B B
GND
CHASSIS
A A
C1104 1000 P_1808_3KV7K ~DC11 04 1000P_ 1808_3KV7K~D
1 2
GND_CHA SSIS
R1113 75_0402_1%~DR1113 75_0402_1%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
ize Document Nu mber Rev
S
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
RJ45
RJ45
RJ45
LA-7741
LA-7741
LA-7741
44 56Thursday, June 23 , 2011
44 56Thursday, June 23 , 2011
44 56Thursday, June 23 , 2011
1
0.3
0.3
0.3
of
5
4
3
2
1
1
PD2
@ PD2
@
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
2nd Battery Connector
PBATT2
D D
12
PC141
PC141
2200P_0402_50V7K~D
2200P_0402_50V7K~D
12
PC3
PC3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
C C
B B
Link Done
PJPDC1
PJPDC1
1
2
3
4
5
6
7
MOLEX_87438-0743~D
MOLEX_87438-0743~D
A A
PBATT2
SUYIN_150010GR006M500ZR
SUYIN_150010GR006M500ZR
PBATT1
PBATT1
SUYIN_200277MR009F515ZR~D
SUYIN_200277MR009F515ZR~D
1
NB_PSID
2
3
+DCIN_JACK
4
5
-DCIN_JACK
6
7
PC13
PC13
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
1
2
2
3
3
4
4
5
5
6
6
7
GND
8
GND
9
GND
8
GND
7
7
6
6
5
5
4
4
3
3
2
2
1
1
12
Z5304
Z5305
Z5306
Z4304
Z4305
Z4306
PL3
PL3
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
1
12
PD10
PD10
@
@
PC10
PC10
2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PL4
PL4
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
GND
VZ0603M260APT_0603
VZ0603M260APT_0603
@
@
3
PR106
PR106
100_0402_5%~D
100_0402_5%~D
2
GND
12
PC12
PC12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
1
@
@
PD6
PD6
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
3
PR4
PR4
100_0402_5%~D
100_0402_5%~D
1 2
+DC_IN
12
PR17
@ PR17
@
4.7K_0805_5%~D
4.7K_0805_5%~D
100_0402_5%~D
100_0402_5%~D
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
PC6
PC6
PR77
PR77
1 2
ESD Diodes
PR3
PR3
100_0402_5%~D
100_0402_5%~D
1 2
PL2
PL2
+DC_IN
1 2
0.022U_0805_50V7K~D
0.022U_0805_50V7K~D
1
@
@
PD3
PD3
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
PR105
PR105
100_0402_5%~D
100_0402_5%~D
1 2
1
PD7
@ PD7
@
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
PR5
PR5
100_0402_5%~D
100_0402_5%~D
1 2
12
DC_IN+ Source
12
PR15
PR15
1M_0402_5%~D
1M_0402_5%~D
12
10K_0402_5%~D
10K_0402_5%~D
PR19
PR19
1M_0402_5%~D
1M_0402_5%~D
PQ4
PQ4
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
S
2
S
3
S
4
G
SOFT_START_GC<55>
1 2
PR18
PR18
PL19
PL19
FBMJ4516HS720NT_2P~D
PR10
PR10
PR12
PR12
100K_0402_1%~D
100K_0402_1%~D
15K_0402_1%~D
15K_0402_1%~D
MBATT+_C
1 2
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
BAY_SMBCLK <28,40>
BAY_SMBDAT <28,40>
PBATT+_C
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PBAT_SMBCLK <40>
PBAT_SMBDAT <40>
@ PR7
@
1 2
0_0402_5%~D
0_0402_5%~D
D
D
1 3
2
B
B
PC136
PC136
PC2
PC2
PR7
S
S
PQ2
PQ2
FDV301N_NL_SOT23-3~D
FDV301N_NL_SOT23-3~D
G
G
2
C
C
PQ3
PQ3
MMST3904-7-F_SOT323~D
MMST3904-7-F_SOT323~D
E
E
3 1
FBMJ4516HS720NT_2P~D
1 2
PJP51
PJP51
2 1
PAD-OPEN 2x2m~D
PAD-OPEN 2x2m~D
12
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PR9
PR9
33_0402_5%~D
33_0402_5%~D
1 2
PL20
PL20
PL1
PL1
PJP43
PJP43
+5V_ALW
12
MPBATT+
PBATT+
PR11
PR11
10K_0402_1%~D
10K_0402_1%~D
PR13
PR13
1 2
10K_0402_5%~D@
10K_0402_5%~D@
+3.3V_ALW
12
PR108
PR108
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW
12
PR2
PR2
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW
PR8
PR8
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2
MODULE_BATT_PRES# <39,55>
RB715FGT106_UMD3
RB715FGT106_UMD3
PBAT_PRES# <39,55>
Primary Battery Connector
PU1
PU1
DOCK_PSID<38> GPIO_PSID_SELECT <39>
NB_PSID_TS5A63157
PSID_DISABLE# <39>
1
NO
2
GND
NC3COM
TS5A63157DCKR_SC70-6~D
TS5A63157DCKR_SC70-6~D
<BOM Structure>
<BOM Structure>
+DC_IN_SS
8
D
7
D
6
D
5
D
12
12
12
PC7
PC7
PC8
PC8
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PC9
PC9
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PR16
PR16
PC11
PC11
100K_0402_5%~D
100K_0402_5%~D
10U_1206_25V6M~D
10U_1206_25V6M~D
+3.3V_ALW
+PWR_SRC
PR901
PR901
0_0402_5%
0_0402_5%
VSB_N_002
1 2
12
12
PR903
PR903
100K_0402_1%
100K_0402_1%
PR902
PR902
22K_0402_1%
22K_0402_1%
1 2
VSB_N_003
13
D
D
PQ901
PQ901
2
G
SSM3K7002FU_SC70-3
G
SSM3K7002FU_SC70-3
S
S
12
PC901
PC901
0.1U_0402_16V7K
0.1U_0402_16V7K
ESD Diodes
+3.3V_RTC_LDO
PD1
PD1
6
IN
5
V+
4
PC902
PC902
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
0.22U_0603_25V7K
0.22U_0603_25V7K
VSB_N_001
+COINCELL
12
PR1
PR1
1K_0402_5%~D
1K_0402_5%~D
Z4012
2
3
1
1
2
+5V_ALW
PS_ID <40>
13
2
PQ902
PQ902
COIN RTC Battery
+COINCELL
TYCO_2-1775293-2~D
+RTC_CELL
PC1
PC1
1U_0603_10V4Z~D
1U_0603_10V4Z~D
Move to power schematic
+PWR_SRC_S
12
PC903
PC903
0.1U_0603_25V7K
0.1U_0603_25V7K
TYCO_2-1775293-2~D
Link Done
JRTC1
JRTC1
1
1
G
22G
3
4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
LA-7741
LA-7741
LA-7741
1
45 56Thursday, June 23, 2011
45 56Thursday, June 23, 2011
45 56Thursday, June 23, 2011
0.1
0.1
0.1
of
A
3.3VALWP +/- 5%
TDC=5.45A
Peak Current=7.786A
OCP min=10.122A
L/S RDS(on) 14.2m ohm(typ),17.5m ohm(max)
FSW=375KHz
Delta_Iin=1.246A
Delta_Io=3.3231A
1 1
B
C
D
E
+5V_ALWP/ +3.3V_ALWP
2VREF_6182
1U_0603_16V6K
1U_0603_16V6K
PC36
PC36
Charlie_note :
SKIPSEL Connect to REF : DEM Mode
@DEM VFBx=2.0V
TONSEL
Frequency Selectable Input for VOUT1(+5v)/VOUT2(+3.3v)
respectively.
300kHz/375kHz : Connect to REF
12
5VALWP +/- 5%
TDC=8.41A
Peak Current=12.012A
OCP min=15.62A
L/S RDS(on) 14.2m ohm(typ),17.5m ohm(max)
FSW=300KHz
Delta_Iin=1.64A
Delta_Io=3.756A
+PWR_SRC
PJP5
PJP5
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PL24
PL24
@
@
1 2
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
2 2
+3.3V_ALWP
3 3
4 4
+DC1_PWR_SRC
12
PC22
PC22
0.1U_0402_25V6
0.1U_0402_25V6
+3.3V_ALWP
PJP9
PJP9
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP10
PJP10
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
ALWON<40>
THERM_STP#<22>
A
12
PC23
PC23
@
@
10U_0805_25V6K
10U_0805_25V6K
+3.3V_ALW
PR147
PR147
2K_0402_1%~D
2K_0402_1%~D
1 2
PR151
PR151
0_0402_5%
0_0402_5%
1 2
12
PC24
PC24
10U_0805_25V6K
10U_0805_25V6K
2.2UH_ETQP3W2R2W FN_8.5A_20%
2.2UH_ETQP3W2R2W FN_8.5A_20%
1 2
1
+
+
PC40
PC40
2
220U_D_6.3VM_R25M
220U_D_6.3VM_R25M
PQ70B
PQ70B
12
PC119
PC119
@
@
1U_0603_10V6K
1U_0603_10V6K
12
PC21
PC21
2200P_0402_50V7K
2200P_0402_50V7K
(4A,120mils ,Via NO.= 6)
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
+3.3V_RTC_LDO
+3.3V_ALW2
PR27
PR27
0_0402_5%
0_0402_5%
1 2
PQ6
PQ6
AON7408L_DFN8-5
AON7408L_DFN8-5
10U_0805_6.3V6M
10U_0805_6.3V6M
3 5
241
PL8
PL8
786
12
PR39
PR39
@
@
SNUB_3V
12
PC34
PC34
@
@
5
4.7_1206_5%
4.7_1206_5%
123
680P_0603_50V7K
680P_0603_50V7K
+PWR_SRC
ENTRIP2
3
5
4
2
ENTRIP1
61
2
1 2
13
100K_0402_1%
100K_0402_1%
PQ105
PQ105
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
PQ70A
PQ70A
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PR150
PR150
B
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
4
PQ8
PQ8
IRF8707GTRPBF_SO8
IRF8707GTRPBF_SO8
PD37
PD37
1 2
MMSZ5229BS_SOD323-2
MMSZ5229BS_SOD323-2
+5V_ALW2
PC28
PC28
PC38
PC38
1 2
12
PR46
PR46
12
499K_0402_1%~D
499K_0402_1%~D
Typ: 175mA
PR41
PR41
1 2
2.2_0603_5%
2.2_0603_5%
LX_3V
LG_3V
PR47
PR47
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
13.7K_0402_1%
13.7K_0402_1%
20K_0402_1%
20K_0402_1%
140K_0402_1%
140K_0402_1%
BST_3V
UG_3V
PC19
PC19
12
@
@
300K_0402_1%
300K_0402_1%
Issued Date
Issued Date
Issued Date
PR37
PR37
1 2
PR43
PR43
FB_3V
1 2
PR33
PR33
ENTRIP2
1 2
PU2
PU2
25
P PAD
7
VO2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
12
1U_0603_10V6K
1U_0603_10V6K
2VREF_6182
Max: 100uA
+DC1_PWR_SRC
C
PR36
PR36
30.9K_0402_1%
30.9K_0402_1%
1 2
PR42
PR42
20K_0402_1%
20K_0402_1%
FB_5V
1 2
PR34
PR34
232K_0402_1%~D
232K_0402_1%~D
ENTRIP1
1 2
2
3
4
5
6
FB2
ENTRIP2
SKIPSEL
EN
14
13
1
FB1
REF
TONSEL
ENTRIP1
24
VO1
23
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
NC18VREG5
VIN16GND
RT8205LZQW(2) WQFN 24P PW M
RT8205LZQW(2) WQFN 24P PW M
17
15
BST_5V
22
UG_5V
21
LX_5V
20
LG_5V
19
+DC1_PWR_SRC
PC17
PC17
PR38
PR38
BST1_5VBST1_3V
1 2
2.2_0603_5%
2.2_0603_5%
12
12
PC16
PC16
0.1U_0402_25V6
0.1U_0402_25V6
PC37
PC37
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
1 2
FDMS7692 1N POWER56-8
FDMS7692 1N POWER56-8
+5V_ALW2
Typ: 175mA
12
PC26
PC26
4.7U_0805_10V6K
4.7U_0805_10V6K
12
PC27
PC27
0.1U_0603_25V7K
0.1U_0603_25V7K
Compal Secret Data
Compal Secret Data
2007/08/02 <Deciphered_Date>
2007/08/02 <Deciphered_Date>
2007/08/02 <Deciphered_Date>
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+3.3V_ALW
PR20
PR20
100K_0402_1%
100K_0402_1%
1 2
+5V_ALWP
D
12
PC18
PC18
@
@
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
2200P_0402_50V7K
ALW_PWRGD_3V _5V <4 0>
12
PC20
PC20
3
PQ5
PQ5
D
10U_0805_25V6K
PQ7
PQ7
10U_0805_25V6K
FDS8878_G 1N SO8
FDS8878_G 1N SO8
2
G
S
1
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
3
D
2
G
S
1
PJP6
PJP6
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP74
PJP74
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
PL7
PL7
1 2
12
PR40
PR40
@
@
4.7_1206_5%
4.7_1206_5%
SNUB_5V
12
PC33
PC33
@
@
680P_0603_50V7K
680P_0603_50V7K
+5V_ALW
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+5V/+3.3V
+5V/+3.3V
+5V/+3.3V
LA-7741
LA-7741
LA-7741
1
+
+
2
(5A,180mils ,Via NO.= 9)
E
+5V_ALWP
PC35
PC35
220U_D_6.3VM_R25M
220U_D_6.3VM_R25M
46 56Thursday, June 23, 2011
46 56Thursday, June 23, 2011
46 56Thursday, June 23, 2011
0.1
0.1
0.1
5
1.5Volt +/- 5%
TDC=7.18A
Peak Current=10.25A
OCP min=13.33A
L/S RDS(on) 3.8m ohm(typ),4.8m ohm(max)
FSW=253KHz for RTON=1M ohm, spec. On-Time =303.947ns
Delta_Iin=1.458A
Delta_Io=5.4728A
D D
+PWR_SRC
+1.5V_MEN_P
C C
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
B B
PJP404
PJP404
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
1.5V_B+
12
12
12
PC412
PC412
PC413
PC413
PC414
PC414
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
SIR472DP-T 1-GE3_POWE RPAK8-5~D
SIR472DP-T 1-GE3_POWE RPAK8-5~D
PL27
PL27
1 2
1UH 20% F DUE1040D-H-1R0 M=P3_21.3A_20% ~D
1UH 20% F DUE1040D-H-1R0 M=P3_21.3A_20% ~D
1
1
+
+
+
+
PC423
PC423
PC422
PC422
@
@
330U_SX_2VY~R9M
330U_SX_2VY~R9M
2
2
330U_SX_2VY~R9M
330U_SX_2VY~R9M
4.7_1206 _5%
4.7_1206 _5%
@ PC 231
@
0.1U_060 3_25V7K~D
0.1U_060 3_25V7K~D
DDR_ON<4 0>
@
@
12
PC415
PC415
PR220
PR220
PC231
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
12
SNUB_1.5V
12
PR487
PR487
1 2
0_0402_ 5%~D
0_0402_ 5%~D
PQ67
PQ67
1 2
PC416
PC416
5
4
123
5
+5V_ALW
4
PQ68
PQ68
123
SIR466DP-T 1-GE3_POWE RPAK8-5
SIR466DP-T 1-GE3_POWE RPAK8-5
1.5V_SUS _PWRGD<40>
12
@
@
PC426
PC426
0.1U_040 2_16V7K~D
0.1U_040 2_16V7K~D
0.75V_DD R_VTT_ON<3 9>
3
+1.5V_MEN_P/ +0.75V_P
PR482
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
+3.3V_ALW
PR485
PR485
100K_04 02_1%~D
100K_04 02_1%~D
PR482
1 2
2.2_0603 _5%~D
2.2_0603 _5%~D
PR484
PR484
5.1_0603 _5%~D
5.1_0603 _5%~D
1 2
12
0_0402_ 5%~D
0_0402_ 5%~D
1 2
1 2
PC424
PC424
1U_0603 _10V6K~D
1U_0603 _10V6K~D
PR489
PR489
BOOT_1.5 V
DH_1.5V
SW_ 1.5V
DL_1.5V
PR483
PR483
5.1K_040 2_1%~D
5.1K_040 2_1%~D
PC419
PC419
2
PJP204
VLDOIN_1.5 V
16
PU16
PU16
15
LGATE
14
PGND
CS_1.5V
1U_0603 _10V6K~D
1U_0603 _10V6K~D
VDD_1.5V VDDQ_1.5 V
+5V_ALW
1.5V_SUS _PWRGD
1.5V_B+
S5_1.5V
S3_1.5V
13
CS
RT8207M ZQW_W QFN20_3X3
RT8207M ZQW_W QFN20_3X3
12
VDDP
11
VDD
PR486
PR486
1 2
1M_0402 _1%~D
1M_0402 _1%~D
10
18
17
PHASE
PGOOD
9
19
BOOT
UGATE
VLDOIN
S5
S3
TON
8
7
PJP204
12
PAD-OPEN 1x1m
PAD-OPEN 1x1m
20
21
VTT
PAD
1
VTTGND
2
VTTSNS
3
GND
4
VTTREF
5
VDDQ
FB
6
20110602 modify item
1. delete PU16.4 another net name VTTREF_1.5V
, only left +V_DDR_REF
+1.5V_ME N_P_FB
PR905
PR905
0_0402_ 5%~D
0_0402_ 5%~D
1 2
+1.5V_MEN_P
PR904
@ P R904
@
12
0_0402_ 5%~D
0_0402_ 5%~D
+1.5V_MEN_P
12
12
PC417
PC417
PC418
PC418
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PC904
@ PC904
@
0.1U_060 3_25V7K
0.1U_060 3_25V7K
1 2
1
0.75Volt +/- 5%
TDC=0.525A
Peak Current=0.75A
OCP min=0.975A
+0.75V_P
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+V_DDR_REF
PC425
PC425
0.033U_0 402_16V7~D
0.033U_0 402_16V7~D
+1.5V_MEN_P
PJP405
PJP405
2
112
JUMP_43 X118
+1.5V_MEN_P
JUMP_43 X118
PJP406
PJP406
2
JUMP_43 X118
JUMP_43 X118
112
+1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
PJP407
PJP407
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
(2A,80mils ,Via NO.= 4)
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
ize Document Nu mber Rev
S
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
LA-7741
LA-7741
LA-7741
47 56Thursday, June 23 , 2011
47 56Thursday, June 23 , 2011
47 56Thursday, June 23 , 2011
1
of
0.1
0.1
0.1
A
B
C
D
+1.8V_RUNP
1 1
TDC=0.81A
Peak Current=1.157A
OCP min=1.5A
PR475
1.8Volt +/-5%
PR475
12
10K_0402_5%~D
10K_0402_5%~D
PU15
PU15
PL25
+3.3V_ALW
2 2
3 3
RUN_ON<27,35,39,42>
SIO_SLP_S3#<11,16,27,35,39,42>
PL25
1 2
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
1 2
PR478
@ PR478
@
0_0402_5%
0_0402_5%
PR481
PR481
0_0402_5%
0_0402_5%
12
PC406
PC406
22U_0805_6.3VAM
22U_0805_6.3VAM
@ PR479
@
47K_0402_5%
47K_0402_5%
1.8VSP_VIN
EN_1.8VSP
PR479
12
12
PC410
@ PC410
@
0.1U_0402_10V7K
0.1U_0402_10V7K
10
PVIN
9
PVIN
8
SVIN
5
EN
11
4
2
LX
PG
3
LX
6
FB
TP
NC
NC
7
1
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
+3.3V_RUN
1.8V_RUN_PW RGD <39>
1.8VSP_LX
1.8VSP_FB
PL26
PL26
1UH_PH041H-1R0MS_3. 8A_20%
1UH_PH041H-1R0MS_3. 8A_20%
1 2
12
20K_0402_1%
PR476
PR476
@
@
SNUB_1.8VSP
PC411
PC411
@
@
20K_0402_1%
4.7_1206_5%
4.7_1206_5%
10K_0402_1%
10K_0402_1%
12
680P_0603_50V7K
680P_0603_50V7K
+1.8V_RUNP
12
PR477
PR477
PR480
PR480
12
PC407
PC407
12
22P_0402_50V8J
22P_0402_50V8J
12
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR477/PR480)=0.6*(1+20K/10K)=1.8V
PJP403
PJP403
1 2
PAD-OPEN 3x3m
PAD-OPEN 3x3m
12
PC408
PC408
22U_0805_6.3VAM
22U_0805_6.3VAM
+1.8V_RUN
PC409
PC409
22U_0805_6.3VAM
22U_0805_6.3VAM
FSW=1MHz
Delta_Iin=0.407A
Delta_Io=0.8182A
12
PC306
PC306
47P_0402_50V8J~D
47P_0402_50V8J~D
+1.8V_RUNP
4 4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
LA-7741
LA-7741
LA-7741
D
48 56Thursday, June 23, 2011
48 56Thursday, June 23, 2011
48 56Thursday, June 23, 2011
0.1
0.1
0.1
of
5
4
3
2
1
+1.05V_MP
PJP400
+V1.05SP _B+
D D
12
+3.3V_ALW
12
PR400
PR400
100K_04 02_1%~D
100K_04 02_1%~D
PC431
PC431
1.05V_A_ PWRGD<40>
TRIP_+V1.0 5SP
EN_+V1.0 5SP
FB_+V1.0 5SP
RF_+V1.0 5SP
12
12
PR405
PR405
470K_04 02_1%
470K_04 02_1%
PR402
PR402
66.5K_04 02_1%~D
66.5K_04 02_1%~D
1 2
PR403
PR403
SIO_SLP_A #<16,39 ,42>
S0 mode be high level
C C
1 2
0_0402_ 5%
0_0402_ 5%
@
@
0.1U_040 2_16V7K
0.1U_040 2_16V7K
PU17
PU17
1
2
3
4
5
VBST
PGOOD
TRIP
DRVH
EN
SW
V5IN
VFB
DRVL
RF
TPS5121 2DSCR_SON10_ 3X3
TPS5121 2DSCR_SON10_ 3X3
TP
10
9
8
7
6
11
BST_+V1 .05SP
UG_+V1.0 5SP
SW_ +V1.05SP
V5IN_+V1.0 5SP
LG_+V1.0 5SP
12
PC405
PC405
1U_0603 _6.3V6M
1U_0603 _6.3V6M
2.2_0603 _5%
2.2_0603 _5%
1 2
+5V_ALW
PR401
PR401
PC404
PC404
0.1U_060 3_25V7K
0.1U_060 3_25V7K
1 2
AO4710_ SO8
AO4710_ SO8
PQ401
PQ401
578
PQ400
PQ400
AO4466_ SO8
AO4466_ SO8
3 6
241
786
5
4
123
12
PC401
PC401
PC402
PC402
0.1U_0402_25V6
0.1U_0402_25V6
PL400
PL400
3.3UH_PC MB064T-3R3MS_ 7A_20%
3.3UH_PC MB064T-3R3MS_ 7A_20%
1 2
12
@
@
PR404
PR404
4.7_1206 _5%
4.7_1206 _5%
12
PC432
@ PC432
@
1000P_0 603_50V7K
1000P_0 603_50V7K
12
12
PC403
PC403
PC400
PC400
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
PJP400
2
JUMP_43 X118
JUMP_43 X118
1
+
+
PC430
PC430
2
220U_D2_4VM
220U_D2_4VM
112
+PWR_SRC
+1.05V_MP
PR406
PR406
12
4.99K_04 02_1%
4.99K_04 02_1%
PJP401
@
@
12
PC433
PC433
0.1U_060 3_25V7K
0.1U_060 3_25V7K
PR407
PR407
10K_040 2_1%
10K_040 2_1%
1 2
+1.05V_MP
B B
PJP401
2
JUMP_43 X118
JUMP_43 X118
PJP402
PJP402
2
JUMP_43 X118
JUMP_43 X118
112
112
+1.05V_M
+1.05Volt +/- 5%
TDC=2.38A
Peak Current=3.396A
OCP min=4.42A
L/S RDS(on) 11.7m ohm(typ),14.12m ohm(max)
FSW=290KHz
Delta_Iin=0.234A
Delta_Io=1.038A
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
ize Document Nu mber Rev
S
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.05V_M
+1.05V_M
+1.05V_M
LA-7741
LA-7741
LA-7741
49 56Thursday, June 23 , 2011
49 56Thursday, June 23 , 2011
49 56Thursday, June 23 , 2011
1
0.1
0.1
0.1
of
5
4
3
2
1
+1.05VTTP
PJP23
PC108
PC108
PC116
PC116
PC117
PC117
1 2
PR128
PR128
PR116
@ PR116
@
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PR96
PR96
GNDA_1.05VTT
PR119
PR119
0_0402_5%~D
0_0402_5%~D
12
+3.3V_ALW
+1.05VTT_COMP
+1.05VTT_VFB
+1.05VTT_SENSE
+1.05VTT_SS
12
PC118
PC118
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
GNDA_1.05VTT
3.01K_0402_1%
3.01K_0402_1%
12
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
17
PU7
PU7
VIN
1
VCCA
2
GND
3
COMP
4
VFB=0.6V
VFB
5
VOUT
6
SS
PGND
7
VCCP_PWRCTRL <10>
16
VIN
VBST
PGOOD
EN
FSET
MODE
IMON
PGND9SW
SN1003055RUWR_QFN17_3P5X3P5~D
SN1003055RUWR_QFN17_3P5X3P5~D
8
+1.05VTT_VX
From GPIO
+1.05VTT_BST
15
+1.05VTT_PWRGD
14
+1.05VTT_EN
13
+1.05VTT_FSET
12
+1.05VTT_MODE
11
10
PR89
PR89
1 2
3.3_0603_1%~D
3.3_0603_1%~D
PR92
@ PR92
@
22.1K_0402_1%~D
22.1K_0402_1%~D
GNDA_1.05VTT
PC114
PC114
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
1 2
12
PR95
PR95
1 2
+1.05VTT_VX
PR91
PR91
@
@
0_0402_5%~D
0_0402_5%~D
GNDA_1.05VTT
0_0402_5%~D
0_0402_5%~D
CPU_VTT_ON <39>
D D
GNDA_1.05VTT
PC115
PC115
12
100P_0402_50V8J~D
100P_0402_50V8J~D
PR90
PR90
12
5.6K_0402_5%~D
5.6K_0402_5%~D
+1.05VTT_SENSE
C C
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
Vth =1~x~2.5v
PQ17
PQ17
GNDA_1.05VTT
12
PR130
PR130
13
D
D
S
S
PR93 2K_0402_0.5%~DPR93 2K_0402_0.5%~D
PR94
PR94
12
0_0402_5%~D
0_0402_5%~D
20K_0402_0.5%~D
20K_0402_0.5%~D
2
G
G
12
PC183
PC183
@
@
680P_0402_50V7K~D
680P_0402_50V7K~D
12
1800P_0402_50V7K~D
1800P_0402_50V7K~D
+3.3V_RUN
10K_0402_5%
10K_0402_5%
1 2
100K_0402_5%
100K_0402_5%
1 2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
+1.05VTT_PWR_SRC
12
PC110
PC110
PC109
PC109
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PL10
+1.05VTT_VX
12
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
SNUB_1.05VTT
@PR511
@
7.68K_0805_1%~D
7.68K_0805_1%~D
1 2
PL10
0.42UH_ETQP4LR42AFM_17A_20%~D
0.42UH_ETQP4LR42AFM_17A_20%~D
PC513
PC513
PR511
12
12
+1.05VTT_SENSE
12
PC111
PC111
10U_0805_25V6K
10U_0805_25V6K
GNDA_1.05VTT
PC300
10U_0805_25V6K
10U_0805_25V6K
12
PR100
PR100
10_0402_5%~D
10_0402_5%~D
PC112
PC112
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PC129
PC129
22U_0805_6.3V6M
22U_0805_6.3V6M
PR102
PR102
1 2
0_0402_5%~D
0_0402_5%~D
PR118
PR118
1 2
0_0402_5%~D
0_0402_5%~D
12
PC121
PC121
47U_0805_4V6M~D
47U_0805_4V6M~D
12
PC120
PC120
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
12
PC301
PC301
PC300
PJP23
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PC113
PC113
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+5V_ALW
1.05Volt +/-5%
TDC=4.49A
Peak Current=6.411A
OCP min=8.334A
FSW=1MHz
Delta_Iin=0.804A
Delta_Io=1.975A
+1.05VTTP
12
PC130
PC130
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC123
PC123
22U_0805_6.3V6M
22U_0805_6.3V6M
VTT_SENSE <10>
VTT_GND <10>
12
PC122
PC122
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
12
PC125
PC125
PC124
PC124
22U_0805_6.3V6M
22U_0805_6.3V6M
47U_0805_4V6M~D
47U_0805_4V6M~D
12
PC126
PC126
PC127
PC127
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
PC131
PC131
PC128
PC128
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
6800P_0402_25V7K~D
6800P_0402_25V7K~D
PR101
PR101
12
9.31K_0402_1%~D
9.31K_0402_1%~D
PR103
@ PR103
B B
PJP25
GNDA_1.05VTT
PJP25
PAD-OPEN1x1m
PAD-OPEN1x1m
12
PJP24
PJP24
1 2
PAD-OPEN 43X118
PAD-OPEN 43X118
PJP26
PJP26
A A
+1.05VTTP
1 2
PAD-OPEN 43X118
PAD-OPEN 43X118
+1.05V_RUN_VTT
+1.05VTT_PWRGD
@
1 2
0_0402_5%~D
0_0402_5%~D
PR104
PR104
13.3K_0402_1%~D
13.3K_0402_1%~D
+5V_RUN
1.05V_VTTPWRGD <40,54>
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ISL95870A +1.05V_RUN_VTT
ISL95870A +1.05V_RUN_VTT
ISL95870A +1.05V_RUN_VTT
LA-7741
LA-7741
LA-7741
1
50 56Thursday, June 23, 2011
50 56Thursday, June 23, 2011
50 56Thursday, June 23, 2011
0.1
0.1
0.1
of
5
PC281
PC281
Charlie_note :
20110509 Maxim FAE-Allen reply:There are total 3 pcs
2.2uF capacitor for VCC(PC143), VDDA(PC160)
and VDDB(PC142) pin.
D D
Layout Note:
PC142 close to PIN15
PR121
@ PR121
@
0_0402_5%~D
0_0402_5%~D
+Vcore_VDD
PC277
PC277
@
@
1U_0603_10V6K~D
1U_0603_10V6K~D
VSSSENSE<10>
VCCSENSE<10>
PR158
PR158
1 2
10_0402_5%~D
10_0402_5%~D
10K_0402_1%~D
10K_0402_1%~D
1 2
12
+VCC_PWR_SRC
PR137
@ PR137
@
1 2
10_0402_5%~D
10_0402_5%~D
@
@
PR142
PR142
1 2
10_0402_5%~D
10_0402_5%~D
+1.05V_RUN_VTT
H_PROCHOT#<7,40,53>
GNDA_VCC
+GFX_CSPB1<52>
PR153
PR153
1 2
10_0402_5%~D
10_0402_5%~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
PR156
PR156
1 2
10_0402_5%~D
10_0402_5%~D
+3.3V_RUN
PR165
PR165
1 2
PJP28
PJP28
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
5
PC142
PC142
43P_0402_50V8J
43P_0402_50V8J
GNDA_VCC
@
@
PC165
PC165
12
2.2U_0603_10V7K~D
2.2U_0603_10V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
PC269
PC269
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
12
GNDA_VCC
@
@
PR166
PR166
0_0402_5%~D
0_0402_5%~D
1 2
+5V_ALW
C C
+VCC_CORE
PR149
PR149
1 2
10_0402_5%~D
10_0402_5%~D
VSS_AXG_SENSE<11>
B B
VCC_AXG_SENSE<11>
+VCC_GFXCORE
IMVP_PWRGD<39>
A A
GNDA_VCC
1 2
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
PC278
PC278
1 2
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
PR109
PR109
6.49K_0402_1%~D
6.49K_0402_1%~D
PH1
PH1
1 2
10K_0402_1%_ERTJ0EG103FA~D
10K_0402_1%_ERTJ0EG103FA~D
PR122
PR122
1 2
10_0402_5%~D
10_0402_5%~D
PC143
PC143
100K_0402_5%~D
100K_0402_5%~D
PR138
PR138
@
@
PR139
PR139
PR143
PR143
@
@
75_0402_5%~D
75_0402_5%~D
1 2
1 2
PR146
PR146
@
@
0_0402_5%~D
0_0402_5%~D
PC205
PC205
12
PC163
PC163
1000P_0402_50V7K~D
1000P_0402_50V7K~D
GNDA_VCC
PR157
PR157
8.45K_0402_1%~D
8.45K_0402_1%~D
PR171
PR171
1 2
2.2U_0603_10V7K~D
2.2U_0603_10V7K~D
PR132
PR132
1 2
12
PC150
PC150
12
+VGFX_GNDSB
+VGFX_FBB
12
+GFX_POKB
12
1.05V_0.8V_PWROK< 14,40>
PC158
PC158
1000P_0402_50V7K~D
1000P_0402_50V7K~D
+Vcore_POKA
GNDA_VCC
1 2
10_0402_5%~D
10_0402_5%~D
1 2
10_0402_5%~D
10_0402_5%~D
1 2
PC167
PC167
1000P_0402_50V7K~D
1000P_0402_50V7K~D
@
@
0_0402_5%~D
0_0402_5%~D
Main
2nd
1 2
0_0402_5%~D
0_0402_5%~D
12
IMVP_VR_ON<39>
12
1000P_0402_50V7K~D
1000P_0402_50V7K~D
GNDA_VCC
X7629631L88
X7629631L89
PR330
PR330
PR111
PR111
12
3.09K_0402_1%~D
3.09K_0402_1%~D
+VGFX_TONB
+Vcore_GNDSA
PC149
PC149
GNDA_VCC
PR140
PR140
9.76K_0402_1%~D
9.76K_0402_1%~D
+Vcore_VRHOT#
+GFX_CSNB<52>
+1.05V_RUN_VTT
+Vcore_FBA
12
+VGFX_FBB
+VGFX_GNDSB
+GFX_BSTB<52>
+GFX_LXB<52>
+GFX_DHB<52>
+GFX_DLB<52>
VIDSOUT<10>
VIDALERT_N<10>
VIDSCLK<10>
PQ9,PQ11,PQ13 PQ10,PQ14,PQ15
PR110
PR110
12.7K_0402_1%~D
12.7K_0402_1%~D
PR112
PR112
12.7K_0402_1%~D
12.7K_0402_1%~D
PR115
PR115
12.7K_0402_1%~D
12.7K_0402_1%~D
PR129
@ PR129
@
1 2
0_0402_5%~D
0_0402_5%~D
PR131
@ PR131
@
1 2
0_0402_5%~D
0_0402_5%~D
PU9
PU9
2
TON
3
GNDSA
4
FBA
5
VRHOT#
6
FBB
7
GNDSB
8
CSPB1
9
CSNB
10
POKB
AON6414AL
MDU2657RH
4
P1_SW
12
P2_SW
12
P3_SW
12
+Vcore_CSPA3
+Vcore_VCC
+Vcore_EN
1
40
41
EN
VCC
TPAD
PC173 0.1U_0402_25V6K~DPC173 0.1U_0402_25V6K~D
PR159
PR159
PR160 130_0402_1%~D@ PR160 130_0402_1%~D@
PR162 54.9_0402_1%~DPR162 54.9_0402_1%~D
1 2
PR164 0_0402_5%~DPR164 0_0402_5%~D
1 2
PR167 0_0402_5%~DPR167 0_0402_5%~D
1 2
PR168 0_0402_5%~DPR168 0_0402_5%~D
CSPA339CSPA2
MAX17511GTL+T_TQFN40_5X5~D
MAX17511GTL+T_TQFN40_5X5~D
BSTB11LXB12DHB13DLB14VDDB
1 2
12
130_0402_1%~D
130_0402_1%~D
12
12
AON6704L
MDU2653RH
4
3
+VCC_CORE
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
BOST3
2.2_0603_5%~D
2.2_0603_5%~D
LGATE3
+Vcore_VCC
PR126
PR126
1 2
107K_0402_1%~D
107K_0402_1%~D
PR134
PR134
1 2
154K_0402_1%~D
154K_0402_1%~D
PR141
PR141
2.2_0603_5%~D
2.2_0603_5%~D
UGATE3
PR107
PR107
BT3_1
12
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
P3_SW
PR127
PR127
1 2
165K_0402_1%
165K_0402_1%
+Vcore_IMAXA
+GFX_IMAXB
PR135
PR135
1 2
105K_0402_1%~D
105K_0402_1%~D
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
BT2_1
1 2
12
12
PC137
PC137
1 2
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
12
PC140
PC140
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PQ11
PQ11
PC157
PC157
PQ15
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PC161
PC161
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PQ15
4
+5V_ALW
PC138
PC138
12
1U_0603_10V6K~D
1U_0603_10V6K~D
+Vcore_CSPA1
+Vcore_CSPA2
+Vcore_CSNA
+Vcore_CSPAAVE
37
35
38
36
CSNA
CSPA1
15
+Vcore_PWMA
+VGFX_THERMB
+Vcore_THERMA
+Vcore_SR
32
33
31
SR
THERMB34THERMA
CSPAAVE
16
VDIO
ALERT#17CLK18POKA
19
DRVPWMA
IMAXB
IMAXA
BSTA2
DHA2
VDDA
DHA1
BSTA1
LXA2
DLA2
DLA1
LXA1
PU8
PU8
5
VDD
6
SKIP
2
PWM
3
GND
9
EP
MAX17491GTA+T_TQFN8_3X3~D
MAX17491GTA+T_TQFN8_3X3~D
PR123
PR123
5.62K_0402_1%~D
5.62K_0402_1%~D
PH2
PH2
100K_0402_1%_TSM0B104F4251RZ~D
100K_0402_1%_TSM0B104F4251RZ~D
+GFX_IMAXB
30
+Vcore_IMAXA
29
BOST2
28
P2_SW
27
UGATE2
26
LGAT2
25
+Vcore_VDD
24
23
22
21
20
1 2
1 2
BST
DH
LX
DL
PR124
PR124
1 2
5.62K_0402_1%~D
5.62K_0402_1%~D
PH3
PH3
1 2
100K_0402_1%_TSM0B104F4251RZ~D
100K_0402_1%_TSM0B104F4251RZ~D
12
1
8
7
4
PR125
PR125
1 2
1K_0402_5%~D
1K_0402_5%~D
PR133
PR133
@
@
1 2
10K_0402_1%~D
10K_0402_1%~D
GNDA_VCC
PC160
PC160
2.2U_0603_10V7K~D
2.2U_0603_10V7K~D
2
1
+VCC_PWR_SRC
12
PC147
PC147
4.7U_0805_25VAK
4.7U_0805_25VAK
+Vcore_CSPA3
GNDA_VCC
+Vcore_CSNA
12
4.7U_0805_25VAK
4.7U_0805_25VAK
+Vcore_CSPA2
GNDA_VCC
+Vcore_CSNA
12
PC132
PC132
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
PC148
PC148
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
@
@
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
@ PC145
@
1 2
PC151
PC151
12
12
PC164
PC164
PQ9
PQ9
3 5
PQ10
PQ10
4
3 5
241
5
123
12
PC168
PC168
4.7U_0805_25VAK
4.7U_0805_25VAK
241
5
123
12
PC192
PC192
PC214
PC214
4.7U_0805_25VAK
4.7U_0805_25VAK
12
PC134
PC134
PC133
PC133
4.7U_0805_25VAK
4.7U_0805_25VAK
2200P_0402_50V7K~D
2200P_0402_50V7K~D
12
@
@
PC139
PC139
1500P_0603_50V7K~D
1500P_0603_50V7K~D
12
PR117
@ PR117
@
1_1206_5%
1_1206_5%
PC145
12
12
PC152
PC152
4.7U_0805_25VAK
4.7U_0805_25VAK
2200P_0402_50V7K~D
2200P_0402_50V7K~D
@
@
PC159
PC159
1500P_0603_50V7K~D
1500P_0603_50V7K~D
PR148
@ PR148
@
1_1206_5%
1_1206_5%
12
12
PC135
PC135
4.7U_0805_25VAK
4.7U_0805_25VAK
2K_0402_0.5%~D
2K_0402_0.5%~D
PC146
PC146
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
+VCC_PWR_SRC
12
PC153
PC153
4.7U_0805_25VAK
4.7U_0805_25VAK
PR144
PR144
2K_0402_0.5%~D
2K_0402_0.5%~D
PC166
PC166
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PL11
PL11
0.42UH_ETQP4LR42AFM_17A_20%~D
0.42UH_ETQP4LR42AFM_17A_20%~D
1 2
P3_SW
12
PR113
PR113
PR120
PR120
3.24K_0402_1%~D
3.24K_0402_1%~D
PC144
@ PC144
@
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
1
1
+
+
+
+
PC154
PC154
PC155
PC155
2
2
100U_25V_M_R0.7~D
100U_25V_M_R0.7~D
100U_25V_M_R0.7~D
100U_25V_M_R0.7~D
PL12
PL12
0.42UH_ETQP4LR42AFM_17A_20%~D
0.42UH_ETQP4LR42AFM_17A_20%~D
1 2
P2_SW
12
PR152
PR152
3.24K_0402_1%~D
3.24K_0402_1%~D
PC162
@ PC162
@
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12
PC156
PC156
12
12
1
+
+
2
100U_25V_M_R0.7~D
100U_25V_M_R0.7~D
12
PR114
PR114
1_0402_5%~D
1_0402_5%~D
PJP27
PJP27
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
PR145
PR145
1_0402_5%~D
1_0402_5%~D
+VCC_CORE
+PWR_SRC
+VCC_CORE
+VCC_PWR_SRC
+Vcore_VDIO
+Vcore_CLK
+Vcore_VDD
+Vcore_POKA
+Vcore_ALERT#
+VCC_CORE
TDC=37.1A
Peak Current=53A
OCP min=69A
Fsw=270KHZ
Choke DCR=1.55± 7% mΩ
PQ13
SIR472DP-T1-GE3_POWERPAK8-5~D
BT1_1
12
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
12
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PC174
PC174
1 2
PC176
PC176
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
UGATE1
PR161
PR161
BOST1
2.2_0603_5%~D
2.2_0603_5%~D
P1_SW
LGATE1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PQ13
PQ14
PQ14
3 5
241
5
4
123
+Vcore_CSPA1
GNDA_VCC
1000P_0402_50V7K~D
1000P_0402_50V7K~D
+Vcore_CSNA
GNDA_VCC
1000P_0402_50V7K~D
1000P_0402_50V7K~D
2
12
PC276
PC276
4.7U_0805_25VAK
4.7U_0805_25VAK
12
@
@
PC175
PC175
1500P_0603_50V7K~D
1500P_0603_50V7K~D
12
PR173
@ PR173
@
1_1206_5%
1_1206_5%
PC178
@ PC178
@
1 2
PC180
@ PC180
@
1 2
12
PC226
PC226
4.7U_0805_25VAK
4.7U_0805_25VAK
2K_0402_0.5%~D
2K_0402_0.5%~D
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
12
PC169
PC169
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR169
PR169
PC179
PC179
12
12
PC171
PC171
PC172
PC170
PC170
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.42UH_ETQP4LR42AFM_17A_20%~D
0.42UH_ETQP4LR42AFM_17A_20%~D
P1_SW
12
12
PC172
4.7U_0805_25VAK
4.7U_0805_25VAK
PL13
PL13
1 2
PR176
PR176
12
3.24K_0402_1%~D
3.24K_0402_1%~D
PC177
@ PC177
@
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
4.7U_0805_25VAK
4.7U_0805_25VAK
12
PR170
PR170
1_0402_5%~D
1_0402_5%~D
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
ize Document Number Rev
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Vcore
Vcore
Vcore
LA-7741
LA-7741
LA-7741
1
51 56Thursday, June 23, 2011
51 56Thursday, June 23, 2011
51 56Thursday, June 23, 2011
+VCC_CORE
of
0.1
0.1
0.1
5
4
3
2
1
+VCC_GFXCORE
D D
PC193
PC193
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC282
PC282
1 2
PC208
PC208
1 2
@
@
PR201
PR201
PH4
PH4
1 2
12
+VGFX_PWR_SRC
12
12
PC195
PC195
PC194
PC194
2200P_0402_50V7K~D
2200P_0402_50V7K~D
10U_1206_25VAK~D
10U_1206_25VAK~D
12
PC198
@ PC198
@
470P_0603_50V8J~D
470P_0603_50V8J~D
12
PR193
@ PR193
@
2.2_1206_1%~D
2.2_1206_1%~D
PR192
PR192
0_0402_5%~D
0_0402_5%~D
12
PR203
PR203
2.21K_0402_1%~D
2.21K_0402_1%~D
PJP29
PJP29
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
12
12
PC204
PC204
PC196
PC196
10U_1206_25VAK~D
10U_1206_25VAK~D
10U_1206_25VAK~D
10U_1206_25VAK~D
PL15
PL15
0.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
0.36UH_FDUE1040J-H-R36M=P3_33A_20%~D
1
GP1_SW GP1_Vo
2
12
PR190
PR190
1.37K_0402_1%~D
1.37K_0402_1%~D
12
12
+PWR_SRC
4
3
12
PR191
PR191
0_0402_5%~D
0_0402_5%~D
+VCC_GFXCORE
1
12
PC200
PC200
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
+
+
PC201
PC201
2
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
+VCC_GFXCORE
TDC=23.1A
Peak Current=33A
OCP min=43A
Fsw=330KHZ
12
+
+
PC202
PC202
2
PC199
PC199
2200P_0402_50V7K~D
2200P_0402_50V7K~D
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
Choke DCR=0.82± 5% mΩ
C C
PQ24
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
+GFX_DHB<51>
PC197
PR189
+GFX_BSTB<51>
+GFX_LXB<51>
+GFX_DLB<51>
B B
PR189
2.2_0603_5%~D
2.2_0603_5%~D
PC197
GBT1_1
1 2
12
0.22U_0603_10V7K~D
0.22U_0603_10V7K~D
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
12
PC203
PC203
4700P_0402_25V7K~D
4700P_0402_25V7K~D
PQ21,PQ24 PQ25,PQ26
Main
X7629631L88
2nd
X7629631L89
A A
AON6414AL
MDU2657RH
AON6704L
MDU2653RH
PQ24
3 5
3 5
241
5
PQ25
PQ25
4
123
+GFX_CSPB1<51>
+GFX_CSNB<51>
GNDA_VCC
241
5
4
10K_0402_1%_ERTJ0EG103FA~D
10K_0402_1%_ERTJ0EG103FA~D
PC207
PC207
1 2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
PQ21
PQ21
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
123
PQ26
PQ26
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
0.068U_0402_16V7K~D
0.068U_0402_16V7K~D
0.33U_0402_10V6K
0.33U_0402_10V6K
40.2K_0402_1%~D
40.2K_0402_1%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ISL95870A +1.05V_RUN_VTT
ISL95870A +1.05V_RUN_VTT
ISL95870A +1.05V_RUN_VTT
LA-7741
LA-7741
LA-7741
1
52 56Thursday, June 23, 2011
52 56Thursday, June 23, 2011
52 56Thursday, June 23, 2011
0.1
0.1
0.1
5
+DC_IN_SS
Adapter Protection Event
PR522
0 Ohm@
PJP801
PJP801
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
PR510
100k0 Ohm @
@
49.9K_0402_1%~D
49.9K_0402_1%~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
GNDA_CHG
CHARGER_SMBCLK<40>
CHARGER_SMBDAT<40>
PR813
PR813
226K_0402_1%~D
226K_0402_1%~D
PR815
PR815
12
PC808
PC808
12
+5V_ALW
PC815
PC815
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+SDC_IN
1 2
GNDA_CHG
MAX8731A_LDO
ACAV_IN<22,40,55>
12
MAX8731_IINP<22>
12
PR810
PR810
10K_0402_1%~D
10K_0402_1%~D
PR814
PR814
15.8K_0402_1%~D
15.8K_0402_1%~D
@
@
8.45K_0402_1%~D
8.45K_0402_1%~D
MAX8731_REF
PR825
PR825
DC_BLOCK_GC<55>
12
PR521
D D
SW
HW
E2 AC_OK=17.7 Volt
PR813
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
C C
B B
GNDA_CHG
12
12
@
@
PR811
PR811
10K_0402_5%~D
10K_0402_5%~D
4
@ PR206
@
0_0402_5%~D
0_0402_5%~D
+DOCK_PWR_BAR
+CHGR_DC_IN<55>
PR818
PR818
1 2
0_0402_5%~D
0_0402_5%~D
12
PR822
PR822
2.2K_0402_1%~D
2.2K_0402_1%~D
12
PC823
PC823
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
PD14@
PD14@
2 1
ES2AA-13-F
ES2AA-13-F
PQ27
PQ27
SI4835DDY-T1-E3_SO8~D
SI4835DDY-T1-E3_SO8~D
8
7
5
12
PR206
CSS_GC<55>
+DC_IN_SS
1
2
36
4
2
3
PD801
PD801
BAT54CW_SOT323~D
BAT54CW_SOT323~D
PR809
@ PR809
@
1 2
1_0805_5%~D
1_0805_5%~D
GNDA_CHG
12
PC825
PC825
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
+SDC_IN
PR803
PR803
1 2
0_0402_5%~D
0_0402_5%~D
1
PC806
PC806
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
12
MAX8731_IINP
MAX8731_REF
GNDA_CHG
12
@
@
PC800
PC800
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PQ802
PQ802
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
PR833
PR833
10_0402_5%~D
10_0402_5%~D
PC803
PC803
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
GNDA_CHG
+DCIN
22
2
13
11
10
9
14
8
6
5
4
3
7
12
29
3
PR801
PR801
0.01_1206_1%~D
0.01_1206_1%~D
1
4
3
2
13
D
D
2
G
G
13
D
D
2
G
G
S
S
CSSP_1
10K_0402_5%~D
10K_0402_5%~D
12
0.047U_0603_25V7M~D
0.047U_0603_25V7M~D
1
PU801
PU801
DCIN
ICREF
ACIN
ACOK
VDDSMB
SCL
SDA
NC
VICM
FBO
EAI
EAO
VREF
CE
GND
TP
ISL88731CHRTZ-T T_QFN28P__5X5
ISL88731CHRTZ-T T_QFN28P__5X5
PR804
PR804
PC804
PC804
1 2
28
CSSP
S
S
CSSN_1
12
12
PR850
PR850
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
27
ICOUT
CSSN
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
VFB
NC
+PWR_SRC
PQ801
PQ801
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
S
S
12
10_0402_5%~D
10_0402_5%~D
PR807
PR807
PC805
PC805
1 2
100K_0402_1%~D
100K_0402_1%~D
GNDA_CHG
ICOUT
26
PR816
PR816
2.2_0603_1%~D
2.2_0603_1%~D
BOOT
25
1 2
PC809
PC809
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
MAX8731A_LDO
21
24
PR819
PR819
VFB
0_0603_5%~D
0_0603_5%~D
PR826
PR826
1 2
100_0402_5%~D
100_0402_5%~D
12
23
20
19
18
17
15
16
PQ803A
PQ803A
G
G
1
4.7_0603_5%~D
4.7_0603_5%~D
BOOT_D
12
CHG_LGATE
+VCHGR
PR817
PR817
D
D
65
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
12
PR808
PR808
CHG_UGATE
+VCHGR_B
PL800
@ PL800
@
1UH_PCMB053T-1R0MS_7A_20%
1UH_PCMB053T-1R0MS_7A_20%
100K_0402_1%~D
100K_0402_1%~D
12
PJP800
PJP800
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PQ803B
PQ803B
S
S
D
D
42
G
G
3
PR812
PR812
1 2
0_0402_5%~D
0_0402_5%~D
12
PC807
PC807
1U_0603_10V6K~D
1U_0603_10V6K~D
1 2
GNDA_CHG
1 2
PC811 1U_0603_10V6K~DPC811 1U_0603_10V6K~D
PQ805
PQ805
2
12
PC801
PC801
47P_0402_50V8J~D
47P_0402_50V8J~D
DOCK_DCIN_IS+ <38>
DOCK_DCIN_IS- <38>
DK_CSS_GC <55>
4
5
4
CHAGER_SRC
12
PC802
PC802
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
5
PQ804
PQ804
AON7408L_DFN8-5
AON7408L_DFN8-5
123
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
12
PC821
PC821
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PR829
PR829
4.7_1206_5%~D
4.7_1206_5%~D
1 2
123
GNDA_CHG
SI7716ADN-T1-GE3_POWERPAK8-5
SI7716ADN-T1-GE3_POWERPAK8-5
PL801
PL801
+VCHGR_L
12
PC832
@ PC832
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
12
PC812
PC812
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.01_1206_1%~D
0.01_1206_1%~D
4
3
12
PR827
PR827
10_0402_1%~D
10_0402_1%~D
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
PC813
PC813
PR823
PR823
PC833
PC833
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PC814
PC814
10U_1206_25V6M~D
10U_1206_25V6M~D
1
2
12
PR828
PR828
0_0402_5%~D
0_0402_5%~D
1
12
12
PC810
PC810
10U_1206_25V6M~D
10U_1206_25V6M~D
12
PC829
PC829
PC828
PC828
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
@
@
PC834
PC834
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
GNDA_CHG
+VCHGR
12
PC830
PC830
10U_1206_25V6M~D
10U_1206_25V6M~D
12
12
PC831
PC831
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
MAX8731_REF
Maximum charging current is 7.2A
+5V_ALW
DYN_TUR_CURRENT_SET#
65W
90W
A A
DYN_TUR_CURRNT_SET#
High
Low
PQ38
RHU002N06_SOT323-3~D
RHU002N06_SOT323-3~D
PQ38
+3.3V_ALW2
100P_0402_50V8J~D
12
PR259
PR259
150K_0402_1%~D
150K_0402_1%~D
MAX8731_IINP
12
12
PR260
PR260
PR261
PR261
150K_0402_1%~D
150K_0402_1%~D
66.5K_0402_1%~D
66.5K_0402_1%~D
13
D
D
2
G
G
S
S
5
100P_0402_50V8J~D
20K_0402_1%~D
20K_0402_1%~D
1 2
12
PC279
PC279
100P_0402_50V8J~D
100P_0402_50V8J~D
12
PC842
PC842
12
220P_0402_50V8J~D
220P_0402_50V8J~D
12
PC245
@ PC245
@
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
8
5
P
+
6
-
G
4
1 2
1.8M_0402_1%
1.8M_0402_1%
7
O
PU12B
PU12B
LM393DR_SO8~D
LM393DR_SO8~D
PR846
PR846
PR847
PR847
@
@
PC244
PC244
Adapter Protection Circuit fot Turbo Mode
4
+5V_ALW
PR474
PR474
1 2
221K_0402_1%~D
221K_0402_1%~D
2
H_PROCHOT# <7,40,51>
PR336
@ PR336
@
0_0402_5%~D
0_0402_5%~D
1 2
61
PQ806A
PQ806A
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
3
PQ806B
PQ806B
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
5
4
PUH800
PUH800
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
+3.3V_ALW
12
PR852
PR852
100K_0402_5%~D
+3.3V_ALW
PC841
PC841
12
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
5
1
P
B
4
O
2
A
G
To preset system to throtlle
3
switching from AC to DC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
100K_0402_5%~D
PROCHOT_GATE <39>
13
D
D
2
G
G
S
S
PQ808
PQ808
RHU002N06_SOT323-3~D
RHU002N06_SOT323-3~D
+DC_IN
PR235
PR235
232K_0402_1%~D
232K_0402_1%~D
12
PR241
PR241
PC242
PC242
22.6K_0402_1%~D
22.6K_0402_1%~D
100P_0402_50V8J~D
100P_0402_50V8J~D
ACAV_IN <22,40, 55>
PR236
PR236
1M_0402_1%~D
12
12
PR237
PR237
47K_0402_1%~D
47K_0402_1%~D
12
12
PR242
PR242
42.2K_0402_1%~D
42.2K_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
8
PU12A
PU12A
3
P
+
1
O
2
-
G
LM393DR_SO8~D
LM393DR_SO8~D
4
12
PC243
PC243
100P_0402_50V8J~D
100P_0402_50V8J~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
S
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
MAX8731_REF
12
PR239
PR239
10K_0402_1%~D
10K_0402_1%~D
1 2
@
@
PR240
PR240
12
0_0402_5%~D
0_0402_5%~D
PR243
PR243
@
@
41.2K_0402_1%~D
41.2K_0402_1%~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Charger
Charger
ize Document Number Rev
Charger
LA-7741P
LA-7741P
LA-7741P
1
ACAV_IN_NB <39, 40,55>
53 56Thursday, June 23, 2011
53 56Thursday, June 23, 2011
53 56Thursday, June 23, 2011
of
0.1
0.1
0.1
5
4
+VCCSA_P
3
2
1
VCCSA_VID_0 VCCSA_VID_1 VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
D D
+3.3V_RUN
12
PR244
@
@
PR258
PR258
VCCSAPWROK<40>
0_0402_5%~D
0_0402_5%~D
12
PR244
100K_0402_5%~D
100K_0402_5%~D
+VCCSA_PWRGD+VCCSA_PWRGD
+5V_ALW
PC252
PC252
1 2
PR303
PR303
12
10_0402_1%~D
PC251
PC251
12
PC383
PC383
3300P_0402_50V7K~D
3300P_0402_50V7K~D
10_0402_1%~D
PU13
PU13
19
PGND
20
PGND
21
PGND
22
VIN
23
VIN
24
VIN
12
18
17
V5FILT
V5DRV
TPS51461RGER_QFN24_4X4~D
TPS51461RGER_QFN24_4X4~D
Vo=2v
GND
VREF
1
2
PR247
PR247
12
5.1K_0402_1%~D
5.1K_0402_1%~D
PC250
PC250
1 2
2.2U_0603_10V7K~D
C C
1
PC249
PC249
PJP35
PJP35
+VCCSA_PWR_SRC +VCCSA_PWR_SR C
+3.3V_ALW
B B
PAD-OPEN 43X118
PAD-OPEN 43X118
12
2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2
PC248
PC248
PC247
PC247
PC246
1 2
PC246
1
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
GNDA_VCCSA
2.2U_0603_10V7K~D
2
1
10U_0805_25V6K
10U_0805_25V6K
0.22U_0402_10V6K~D
0.22U_0402_10V6K~D
+VCCSA_VID0
1U_0603_10V6K~D
1U_0603_10V6K~D
16
15
VID1
PGOOD
COMP
SLEW
3
4
+VCCSA_EN
13
14
EN
VID0
12
BST
11
SW
10
SW
9
SW
8
SW
7
SW
25
TP
VOUT
MODE
5
6
VCCSA VID is 00 prior to VCCIO stability.
@
@
PR264
PR264
1 2
0_0402_5%~D
0_0402_5%~D
PR266
PR266
1K_0402_5%~D
1K_0402_5%~D
1 2
@
@
PR265
PR265
12
0_0402_5%~D
@
@
PR255
PR255
0_0402_5%~D
0_0402_5%~D
1 2
PR245
PR245
1 2
2.2_0603_1%~D
2.2_0603_1%~D
12
0_0402_5%~D
1.05V_VTTPWRGD <40,50>
PC253
PC253
0.1U_0603_25V7K
0.1U_0603_25V7K
+VCCSA_BT_1+VCCSA_BT
1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
12
PC254
@ PC254
@
1000P_0603_50V7K~D
1000P_0603_50V7K~D
12
PR248
@ PR248
@
2.2_1206_1%~D
2.2_1206_1%~D
1 2
+VCCSA_PHASE
@
@
PR335
PR335
33K_0402_5%~D
33K_0402_5%~D
PR300
PR300
1K_0402_5%~D
1K_0402_5%~D
VCCSA_VID_1 <11>
VCCSA_VID_0 <11>
PL18
PL18
1 1 0.675V
output voltage adjustable network
VCCSA
TDC=3.15A
Peak Current=4. 5A
OCP min=5.85A
FSW=1MHz
12
12
12
12
12
PC182
PC182
PC258
PC181
PC181
1 2
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
PC258
1 2
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PR253
PR253
0_0402_5%~D
0_0402_5%~D
PC255
PC255
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC259
PC259
22U_0805_6.3V6M
22U_0805_6.3V6M
PR267
PR267
12
100_0402_1%~D
100_0402_1%~D
+VCCSA_SENSE < 11>
12
PC257
PC257
PC260
PC256
PC256
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PC260
22U_0805_6.3V6M
22U_0805_6.3V6M
+VCCSA_P
12
22U_0805_6.3V6M
22U_0805_6.3V6M
PC262
PC262
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
1 2
PJP37
PJP38
PJP38
+VCCSA_P
A A
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
+VCC_SA
GNDA_VCCSA
PJP37
PAD-OPEN1x1m
PAD-OPEN1x1m
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ISL95870A 0.8V_VCC_SA
ISL95870A 0.8V_VCC_SA
ISL95870A 0.8V_VCC_SA
LA-7741
LA-7741
LA-7741
1
54 56Thursday, June 23, 2011
54 56Thursday, June 23, 2011
54 56Thursday, June 23, 2011
0.1
0.1
0.1
of
5
+3.3V_ALW2
PC232
PC232
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
ACAV_IN<22,40,53>
CHARGE_MODULE_BATT
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
D D
MODULE_BATT_PRES#
B
2
A
13
D
D
2
G
G
S
S
+3.3V_ALW2
PC233
PC233
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
ACAV_IN
CHARGE_PBATT
C C
PBAT_PRES#
2N7002W-7-F_SOT323-3~D
2N7002W-7-F_SOT323-3~D
PUH5
PUH5
5
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
1
P
B
2
A
G
3
1K_0402_5%~D
1K_0402_5%~D
2
G
G
O
PR257
PR257
13
D
D
PQ910
PQ910
S
S
+VCHGR
5
PUH3
PUH3
P
4
O
G
3
12
PR304
PR304
PQ909
PQ909
2N7002W-7-F_SOT323-3~D
2N7002W-7-F_SOT323-3~D
+VCHGR
PR279
PR279
1 2
100K_0402_5%~D
100K_0402_5%~D
4
12
PR286
PR286
10K_0402_5%~D
10K_0402_5%~D
3
1 2
PQ49B
PQ49B
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
5
4
1K_0402_5%~D
1K_0402_5%~D
12
PC266
PC266
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR270
PR270
PC264
PC264
@
@
1 2
100K_0402_5%~D
100K_0402_5%~D
12
PR273
PR273
10K_0402_5%~D
10K_0402_5%~D
61
PQ42A
PQ42A
2
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ44
PQ44
SI4835DDY-T1-E3_SO8~D
SI4835DDY-T1-E3_SO8~D
1
2
3 6
4
@
@
PR285
PR285
0_0402_5%~D
0_0402_5%~D
1 2
PBATT+
SLICE_BAT_ON<39>
PR294
@ PR294
@
DEFAULT_OVRDE<39>
B B
1 2
0_0402_5%~D
0_0402_5%~D
PQ51A
PQ51A
2
12
PR288
PR288
@
@
499K_0402_1%~D
499K_0402_1%~D
+DC_IN
+3.3V_ALW2
1 2
100K_0402_5%~D
100K_0402_5%~D
ACAV_DOCK_SRC#<38>
+SDC_IN
ACAV_IN<22,40,53>
12
12
PD28
PD28
PD29
PD29
A A
RB751V-40_SOD323~D
RB751V-40_SOD323~D
SLICE_BAT_PRES#
RB751V-40_SOD323~D
RB751V-40_SOD323~D
PR321
@ PR321
@
1 2
0_0402_5%~D
0_0402_5%~D
PQ57
PQ57
FDN338P_NL_SOT23-3~D
FDN338P_NL_SOT23-3~D
1
1
1 3
2
12
5
3
3
DOCK_SMB_ALERT# <38,39>
2
2
PC272
PC272
1500P_0402_7K~D
1500P_0402_7K~D
+3.3V_ALW2
SI4835DDY-T1-E3_SO8~D
SI4835DDY-T1-E3_SO8~D
1
2
3 6
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
8
7
5
3
PQ47B
PQ47B
5
4
1 2
12
PR290
PR290
200K_0402_1%~D
200K_0402_1%~D
61
0_0402_5%~D
0_0402_5%~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PR307
PR307
1 2
47_0805_5%~D
47_0805_5%~D
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
SOFT_START_GC<45>
PR310
PR310
PR314
@ PR314
@
1 2
0_0402_5%~D
0_0402_5%~D
DC_BLOCK_GC<53>
@ PR318
@
1 2
0_0402_5%~D
0_0402_5%~D
@ PR319
@
1 2
0_0402_5%~D
0_0402_5%~D
PD24
PD24
PR318
PR319
PQ39
PQ39
8
7
5
4
PR297
PR297
20K_0402_1%~D
20K_0402_1%~D
1 2
61
2
PQ47A
PQ47A
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PD22
PD22
1 2
RB751V-40_SOD323~D
RB751V-40_SOD323~D
RB751V-40_SOD323~D
RB751V-40_SOD323~D
3
PQ51B
PQ51B
5
4
@
@
PR298
PR298
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
1 2
PBAT_PRES#<39,45>
+DOCK_PWR_BAR
12
PC271
PC271
@
@
PR312
PR312
ACAVDK_SRC
1 2
0_0402_5%~D
0_0402_5%~D
PC273
PC273
PQ48A
PQ48A
2
PD25
PD25
SLICE_BAT_PRES#<38,39>
+DC_IN_SS
+CHGR_DC_IN<53>
CD3301_DCIN
ERC1
12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR280
PR280
20K_0402_1%~D
20K_0402_1%~D
1 2
61
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
1 2
RB751V-40_SOD323~D
RB751V-40_SOD323~D
12
@ PR296
@
0_0402_5%~D
0_0402_5%~D
ACAVIN
P33ALW2
4
PR296
4
@ PR299
@
@
@
1 2
@
@
0_0402_5%~D
0_0402_5%~D
PU14
PU14
1
2
3
4
5
6
7
8
9
37
CSS_GC<53>
DK_CSS_GC<53>
PD26
PD26
1 2
RB751V-40_SOD323~D
RB751V-40_SOD323~D
PR299
1 2
0_0402_5%~D
0_0402_5%~D
PR302
PR302
1 2
0_0402_5%~D
0_0402_5%~D
PR305
PR305
DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2
TP
12
PC274
PC274
PQ48B
PQ48B
PQ50B
PQ50B
ERC3
0.047U_0603_25V7K~D
0.047U_0603_25V7K~D
3
4
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PD27
PD27
1 2
3
4
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
36
@
@
1 2
5
0_0402_5%~D
0_0402_5%~D
RB751V-40_SOD323~D
RB751V-40_SOD323~D
5
PR472
PR472
@
@
1 2
0_0402_5%~D
0_0402_5%~D
CHGVR_DCIN
DK_PWRBAR
DC_IN_SS
35
33
34
32
NC
DC_IN_SS
DK_PWRBAR
CHARGERVR_DCIN
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
ERC2
12
PC275
PC275
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
@
@
31
GND
15
MPBATT+
12
PR271
PR271
390K_0402_5%~D
390K_0402_5%~D
12
5
PR276
PR276
390K_0402_5%~D
390K_0402_5%~D
PBATT+
12
PR281
PR281
PR282
PR282
390K_0402_5%~D
390K_0402_5%~D
2
12
PQ49A
PQ49A
PR291
PR291
390K_0402_5%~D
390K_0402_5%~D
PR287
PR287
MODULE_ON <39>
MPBATT+
12
PR471
PR471
PR473
PR473
@
@
510K_0402_5%~D
510K_0402_5%~D
1 2
100K_0402_5%~D
100K_0402_5%~D
MODULE_BATT_PRES# <39,45>
PBATT+
PR301
@ PR301
@
0_0402_5%~D
0_0402_5%~D
1 2
28
29
30
NC
PBatt+
P50ALW
PBATT_OFF
BLK_MOSFET_GC
DK_AC_OFF_EN
ACAV_IN_NB
GND
DSCHRG_MOSFET_GC
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
SS_DCBLK_GC
EN_DK_PWRBAR17P33ALW
CD3301ARHHR_QFN36_6X6~D
CD3301ARHHR_QFN36_6X6~D
16
18
P33ALW
EN_DK_PWRBAR
STSTART_DCBLOCK_GC
3301_PWRSRC
1 2
0_0402_5%~D
0_0402_5%~D
12
PR272
PR272
620K_0402_5%~D
620K_0402_5%~D
3
4
PQ42B
PQ42B
12
620K_0402_5%~D
620K_0402_5%~D
PR284
PR284
1 2
61
820_0603_1%~D
820_0603_1%~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
27
26
25
24
23
22
21
20
19
@
@
PR324
PR324
1 2
0_0402_5%~D
0_0402_5%~D
@
@
1 2
0_0402_5%~D
0_0402_5%~D
PR327
@ PR327
@
PR274
PR274
1 2
820_0603_1%~D
820_0603_1%~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PC270
PC270
61
PQ50A
PQ50A
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
P50ALW
CD_PBATT_OFF
DK_AC_OFF
DK_AC_OFF_ENCD3301_SDC_IN
SL_BAT_PRES#
PR325
PR325
PQ40
PQ40
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
S
2
S
3
S
4
G
12
PC265
PC265
0.01U_0603_25V7K~D
0.01U_0603_25V7K~D
PQ45
PQ45
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
S
2
S
3
S
4
G
12
0.01U_0603_25V7K~D
0.01U_0603_25V7K~D
2
12
PR289
PR289
@
@
499K_0402_1%~D
499K_0402_1%~D
@
@
1 2
@ PR311
@
1 2
@
@
1 2
0_0402_5%~D
0_0402_5%~D
+3.3V_ALW
EN_DOCK_PWR_BAR <39>
@ PR326
@
1 2
1M_0402_5%~D
1M_0402_5%~D
+PWR_SRC
3
8
D
7
D
6
D
5
D
MPBATT_IN_SS
8
D
7
D
PBATT_IN_SS
6
D
5
D
DEFAULT_OVRDE<39>
PR923
PR923
10K_0402_5%~D
10K_0402_5%~D
1 2
PQ911
PQ911
2N7002W-7-F_SOT323-3~D
2N7002W-7-F_SOT323-3~D
13
D
D
2
G
G
S
S
PR309
PR309
+5V_ALW
0_0402_5%~D
0_0402_5%~D
PR311
0_0402_5%~D
0_0402_5%~D
PR313
PR313
@
@
PR316
PR316
1 2
0_0402_5%~D
0_0402_5%~D
BLKNG_MOSFET_GC
@
@
PR320
PR320
1 2
0_0402_5%~D
0_0402_5%~D
PR322
@ PR322
@
1 2
0_0402_5%~D
0_0402_5%~D
PR326
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
PR283
PR283
1 2
330K_0402_5%~D
330K_0402_5%~D
PR278
PR278
1 2
330K_0402_5%~D
330K_0402_5%~D
ACAV_IN <22,40,53>
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
3301_ACAV_IN_NB
@
@
PR317
PR317
1 2
0_0402_5%~D
0_0402_5%~D
SLICE_BAT_PRES# <38,39>
+NBDOCK_DC_IN_SS
ACAV_IN_NB <39,40,53>
8
7
6
5
PD18
PD18
RB751V-40_SOD323~D
RB751V-40_SOD323~D
PD19
PD19
RB751V-40_SOD323~D
RB751V-40_SOD323~D
PQ46
PQ46
8
7
6
5
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
PD21
PD21
RB751V-40_SOD323~D
RB751V-40_SOD323~D
PD23
PD23
RB751V-40_SOD323~D
RB751V-40_SOD323~D
DOCK_AC_OFF_EC <39>
2
PD17
PD17
2
3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D
PQ41
PQ41
1
S
D
2
S
D
3
S
D
4
G
D
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
12
12
12
PR275
PR275
499K_0402_1%~D
499K_0402_1%~D
PD20
PD20
2
1
3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D
1
S
D
2
S
D
3
S
D
4
G
D
12
12
12
PR292
PR292
PR315
PR315
1 2
1M_0402_5%~D
1M_0402_5%~D
2
1
1
+DOCK_PWR_BAR
ES2AA-13-F_SMA2~D
ES2AA-13-F_SMA2~D
2 1
PQ37
PQ37
8
D
7
D
6
D
5
D
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
PR268
PR268
330K_0402_5%~D
330K_0402_5%~D
1 2
PD16
PD16
1
S
2
S
3
S
G
12
4
PC263
PC263
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D
@
@
PR269
PR269
0_0402_5%~D
0_0402_5%~D
1 2
STSTART_DCBLOCK_GC
+PWR_SRC
12
12
PC267
PC267
PC268
PC268
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
499K_0402_1%~D
499K_0402_1%~D
PR306
@PR306
@
0_0402_5%~D
0_0402_5%~D
1 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Selector
Selector
Selector
LA-7741
LA-7741
LA-7741
1
55 56Thursday, June 23, 2011
55 56Thursday, June 23, 2011
55 56Thursday, June 23, 2011
0.1
0.1
0.1
5
+VCC_CORE
12
PC1200
PC1200
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
D D
C C
12
PC1205
PC1205
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1277
PC1277
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1282
PC1282
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1288
PC1288
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1294
PC1294
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1201
PC1201
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1206
PC1206
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1259
PC1259
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1281
PC1281
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1287
PC1287
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1293
PC1293
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
Charlie note: Vcore_Cout1
1.2.2uF*35 (SE00000888L)
2.22uF*25 (SE000008L80)
Vcore_Cout2
1.470uF 4.5m *4 (SGA00004X80)
12
PC1202
PC1202
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1207
PC1207
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1279
PC1279
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1284
PC1284
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1290
PC1290
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1296
PC1296
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1203
PC1203
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1208
PC1208
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1258
PC1258
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1280
PC1280
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1286
PC1286
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1292
PC1292
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
+VCC_CORE
1
PC1219
PC1219
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
B B
1
PC1243
PC1243
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1220
PC1220
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1244
PC1244
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1221
PC1221
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1245
PC1245
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1222
PC1222
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1246
PC1246
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
4
3
+VCC_CORE +VCC_GFXCORE
Charlie note:
iGfx_Cout1
12
PC1204
PC1204
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1209
PC1209
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1276
PC1276
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1283
PC1283
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1289
PC1289
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1295
PC1295
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
1
PC1223
PC1223
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1247
PC1247
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
12
PC1210
PC1210
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1278
PC1278
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1285
PC1285
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1291
PC1291
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1297
PC1297
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
+VCC_GFXCORE
1
1
PC1212
PC1212
PC1211
PC1211
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
PC1235
PC1235
PC1236
PC1236
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1240
PC1240
PC1239
PC1239
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1307
PC1307
PC1305
PC1305
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
1
+
+
+
+
PC1256
PC1256
2
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1
PC1213
PC1213
2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC1237
PC1237
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
PC1241
PC1241
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1308
PC1308
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1257
PC1257
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1.22uF*6 (SE000000I10)
2.10uF*6 (SE000005T8L)
3.1uF*11 (SE000000K8L)
iGfx_Cout2
1.470uF 4.5m *2 (SGA00004200)
1
1
PC1214
PC1214
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
PC1238
PC1238
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1242
PC1242
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1310
PC1310
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
Below is 458544_CRV_PDDG_0.5 Table 5-8.
5 x 22 µF (0805)
Socket Bottom
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
1
Socket Top
PC1216
PC1216
PC1215
PC1215
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC1218
PC1218
PC1217
PC1217
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
PC1306
PC1306
PC1304
PC1304
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1309
PC1309
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1225
PC1225
PC1224
PC1224
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1312
PC1312
PC1267
PC1267
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1319
PC1319
Charlie note:
+1.05V_RUN_VTT_1
3.1uF*26 (SE000000K8L)
4.10uF*10 (SE000005T8L)
+1.05V_RUN_VTT_2
5.330uF 6m *2 (SGA00001Q80)
12
12
PC1227
PC1227
PC1226
PC1226
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1248
PC1248
PC1311
PC1311
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1318
PC1318
PC1317
PC1317
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2 x (0805) no-stuff
sites
+1.05V_RUN_VTT
12
PC1228
PC1228
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1249
PC1249
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1325
PC1325
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1230
PC1230
PC1229
PC1229
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1250
PC1250
PC1251
PC1251
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1321
PC1321
PC1322
PC1322
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
+1.05V_RUN_VTT
12
12
PC1231
PC1231
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1252
PC1252
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1315
PC1315
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1324
PC1324
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1233
PC1233
PC1232
PC1232
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1253
PC1253
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1313
PC1313
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1320
PC1320
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
PC1234
PC1234
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1254
PC1254
PC1255
PC1255
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1316
PC1316
PC1314
PC1314
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1323
PC1323
PC1326
PC1326
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
+
+
+
+
PC1265
PC1265
PC1266
PC1266
2
2
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
1
PC1260
PC1260
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1268
PC1268
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
A A
1
PC1302
PC1302
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
5
1
PC1261
PC1261
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1269
PC1269
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1301
PC1301
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1262
PC1262
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1270
PC1270
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1300
PC1300
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1263
PC1263
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1271
PC1271
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1299
PC1299
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1264
PC1264
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1298
PC1298
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1303
PC1303
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
4
+VCC_CORE
+VCC_CORE
1
+
+
PC1272
PC1272
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPET ENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2 3
3
+
+
PC1273
PC1273
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
1
+
+
PC1274
PC1274
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
1
+
+
PC1275
PC1275
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-7741
LA-7741
LA-7741
56 56Thursday, June 23 , 2011
56 56Thursday, June 23 , 2011
56 56Thursday, June 23 , 2011
1
0.1
0.1
0.1
Loading...