Page 1
A
COMPAL CONFIDENTIAL
B
C
D
E
1 1
PCB NO :
BOM P/N :
LA-7731P
4319ET31L01
MODEL NAME :
QAM00
GPIO MAP:
2 2
Dalmore 12 UMA
Ivy Bridge + Panther POINT
@
2011-8-30
REV : 0.3 (X01)
@ : Nopop Component
3 3
CONN@ : Connector Component
MB Type BOM P/N
M/B SPI ROM
TAA SPI ROM
SATA re-driver with CD
function
Normal E-SATA re-driver
4 4
MB PCB
MB PCB
Part Number Description
Part Number Description
DA60000P700
DA60000P700
HDMI Royalty@
HDMI Royalty@
Part Number
Part Number
RO0000002HM
RO0000002HM
A
PCB 0FH LA-7731P REV0 M/B UMA
PCB 0FH LA-7731P REV0 M/B UMA
Description
Description
HDMI Royalty
HDMI Royalty
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
B
C
5@
6@
7@
8@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-7731P
LA-7731P
LA-7731P
1 59Thursday, September 01, 2011
1 59Thursday, September 01, 2011
1 59Thursday, September 01, 2011
E
0.3
0.3
0.3
Page 2
Block Diagram
A
B
C
D
E
Memory BUS (DDR3)
1333/1600MHz
1 1
Ivy Bridge
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
LVDS CONN
PAGE 24
CRT CONN
PAGE 45
VGA
2 2
DOCKING
PORT
PAGE 38
DAI
USB
SATA
DOCK LAN
USB30
PCIE5
EXPRESS
Card
PAGE 35 PAGE 34 PAGE 34 PAGE 34 PAGE 32
3 3
USB
CPU ITP Port
PCH ITP Port
1/2 Mini Card
PP
USB
PAGE 7
PAGE 14
WiFi ON/OFF
IO/B
DC/DC Interface
4 4
PAGE 42
Power On/Off
SW & LED
PAGE 30.43
A
For MB/Dock
Video Switch
PI3V713-AZLE
PAGE 23
HDMI CONN
PAGE 25
SDXC/MMC
PAGE 33 PAGE 33
Card reader
O2 Micro OZ600FJ0
PCI Express BUS
PCIE2
WLAN/60GHz
USB
Smart Card
RFID
TDA8034HN
Fingerprint
CONN
PCIE1PCIE3
Full Mini Card
WWAN
USB
Thermal Sensor
FAN
PAGE 22 PAGE 40
EMC4021
Option
SSX44B
BCM5882
FP_USB
USH Module
PAGE 22
B
LVDS
VGA
DPB
DPC
DPD
PCIE x1
LPC BUSChina TPM1.2
USH
USB
BC BUS
BGA CPU
FDI
Lane x 8
INTEL
Panther POINT-M
BGA
SPI
W25Q64CVSSIG
64M 4K sector
W25Q32BVSSIG
32M 4K sector
Discrete TPM
AT97SC3204
SMSC KBC
MEC5055
KB CONNTP CONN
PAGE 41PAGE 41
C
PAGE 6~11
DMI
Lane x 4
USB
PAGE 14~21
SATA
USB POWER SHARE
PCI Express BUS
HD Audio I/F
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
PAGE 14
PAGE 14
ST LNG3DM
PAGE 32
SMSC SIO
ECE5048
PAGE 39
BC BUS
BT 4.0
Camera
SATA Repeater
PS8513B
SLG55584A
PAGE 36
HDD
PAGE 28
FFS
PAGE 28
D
PAGE 41
PAGE 24
PAGE 37
USB30
USB30
HDA Codec
92HD93B2
Trough LVDS Cable
E-SATA
USB2.0
USB3.0/2.0
USB3.0/2.0+PS
PAGE 37
PAGE 37
PAGE 36
PAGE 36
Intel Lewisville
82579LM
PAGE 29
DOCK LAN
INT.Speaker
PAGE 29
Combo Jack
DAI
To Docking side
PAGE 45 PAGE 44
LAN SWITCH
PI3L720
Transformer
RJ45
PAGE 44
Dig.
MIC
Trough LVDS Cable
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
UMA Block Diagram
UMA Block Diagram
UMA Block Diagram
LA-7731P
LA-7731P
LA-7731P
E
PAGE 31
PAGE 31
2 59Thursday, September 01, 2011
2 59Thursday, September 01, 2011
2 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 3
5
4
3
2
1
POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
Signal
SLP
S3#
HIGH
LOW HIGH HIGH
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
SLP
A#
HIGH
HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
PCH
USB PORT#
0
1
2
3
4
5
6
7
JUSB1 (Right side )
JUSB2 (Bot side)
NA
MLK DOCK
WLAN
WWAN
JMINI3(PP)
USH->BIO
DESTINATION
DOCKING8
PM TABLE
C C
power
plane
State
S0
S3
+15V_ALW
+5V_ALW
+3.3V_ALW_PCH
+3.3V_RTC_LDO
ON
+3.3V_SUS
+1.5V_MEM
ON ON
ON
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
DESTINATION
HDD
NA
NA
NA
ESATA
Dock
USH
9
10 Express card
11
12
13
0
1
JESATA1 ( Left)
Bluetooth
Camera
NA
BIO
NA
S5 S4/AC
S5 S4/AC don't exist
B B
ON
OFF
OFFOFF
OFF
OFF
ON
need to update Power Status and PM
Table
A A
OFF
OFFOFF
UMA DP/HDMI Port
Port B
Port C
Port D
Connetion
MB HDMI Conn
Dock DP port 2
Dock DP port 1
PCI EXPRESS
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
Lane 8 None
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Express card
None
1/2vMINI CARD-3 PCIE
MMI
10/100/1G LOM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-7731P
LA-7731P
LA-7731P
3 59Thursday, September 01, 2011
3 59Thursday, September 01, 2011
3 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 4
5
4
3
2
1
EN_INVPWR
D D
ADAPTER
1.05V_0.8V_PWROK
+PWR_SRC
BATTERY
C C
CHARGER
FDC654P
(Q21)
ISL95836
(PU700)
+BL_PWR_SRC
+VCC_GFXCORE
HDDC_EN
SI3456BDV
(Q27)
+5V_HDD
ALWON
RT8205
(PU100)
+5V_ALW
MCARD_MISC_PWREN
SI3456
(Q42)
+3.3V_FLASH
MCARD_WWAN_PWREN
SI3456
(Q40)
+3.3V_WWAN
+3.3V_ALW
SIO_SLP_S3#
ISL95836
(PU700)
B B
TPS51212
(PU500)
TPS51212
(PU400)
RT8207
(PU200)
DDR_ON
SY8033
(PU300)
1.05V_VTTPWRGD
TPS51461
(PU600)
AUX_EN_WOWL
SI3456
(Q38)
PCH_ALW_ON
SI3456
(Q49)
SUS_ON
S13456
(Q54)
SIO_SLP_LAN#
SI3456
SIO_SLP_S3#
TPS22966
(Q34) (U78)
SIO_SLP_S3#
SIO_SLP_A#
SI3456
(Q58)
(QC3)
+1.5V_MEM
NTGS4141NAO4728
(Q59)
SIO_SLP_S3#
0.75V_DDR_VTT_ON
+1.8V_RUN
+VCC_SA
+3.3V_WLAN
+3.3V_ALW_PCH
+3.3V_LAN+3.3V_SUS
+3.3V_RUN
+5V_RUN
+3.3V_M
1.05V_0.8V_PWROK
+VCC_CORE
CPU_VTT_ON
SIO_SLP_A#
+1.05V_RUN_VTT +1.05V_M
SIO_SLP_S3#
CPU1.5V_S3_GATE
SI4164
(Q63)
A A
+1.5V_CPU_VDDQ
+1.5V_RUN +0.75V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
+1.05V_RUN
5
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-7731P
LA-7731P
LA-7731P
4 59Thursday, September 01, 2011
4 59Thursday, September 01, 2011
4 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 5
5
SMBUS Address [0x9a]
H14
C9
MEM_SMBCLK
MEM_SMBDATA
PCH
D D
B4
A3
B5
A4
LAN_SMBCLK
LAN_SMBDATA
2.2K
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMDATA
+3.3V_ALW_PCH
C8
G12
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
3A
1A
1A
C C
1B
1B
@
@
2.2K
2.2K
2.2K
2.2K
4
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_LAN
28
31
LOM
+3.3V_ALW
+3.3V_ALW
2N7002
2N7002
SMBUS Address [C8]
127
129
DOCKING
3
SMBUS Address
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
202
200
202
200
2
DIMMA
DIMMB
53
51
53
51
XDP1
XDP2
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
1
2.2K
G Sensor
WWAN
+3.3V_RUN
SMBUS Address [3B]
SMBUS Address [TBD]
2.2K
14
13
30
32
2.2K
4
+3.3V_ALW
100 ohm
100 ohm
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
10
9
7
6
M9
L9
7
8
Charger
BATTERY
CONN
SMBUS Address [0x16]
USH
SMBUS Address [0xa4]
Express card
SMBUS Address [0x12]
SMBUS Address [TBD]
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SMBUS TOPOLOGY
SMBUS TOPOLOGY
SMBUS TOPOLOGY
LA-7731P
LA-7731P
LA-7731P
5 59Thursday, September 01, 2011
5 59Thursday, September 01, 2011
5 59Thursday, September 01, 2011
1
0.3
0.3
0.3
KBC
A56
1C1CB59
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
2.2K
A50
B53
A49
B52
USH_SMBCLK
USH_SMBDAT
2.2K
2.2K
CARD_SMBCLK
CARD_SMBDAT
1E
B B
1E
MEC 5065
2B
2B
2.2K
B50
A47
CHARGER_SMBCLK
CHARGER_SMBDAT
1G
1G
A A
5
2.2K
Page 6
5
D D
DMI_CRX_PTX_N0<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_P3<16>
DMI_CTX_PRX_N0<16>
DMI_CTX_PRX_N1<16>
DMI_CTX_PRX_N2<16>
DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>
DMI_CTX_PRX_P1<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N3<16>
C C
B B
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P3<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P6<16>
FDI_CTX_PRX_P7<16>
FDI_FSYNC0< 16>
FDI_FSYNC1< 16>
FDI_INT<16>
FDI_LSYNC0<16>
FDI_LSYNC1<16>
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
W11
AC9
W10
AC8
AA11
AC12
AA10
AG8
AD2
AG11
AG4
AC3
AC4
AE11
AC1
AE10
P10
P11
AA6
AA7
AA3
U11
AF3
AF4
AE7
AA4
AE6
4
U1A
U1A
M2
DMI_RX#[0]
P6
DMI_RX#[1]
P1
DMI_RX#[2]
DMI_RX#[3]
N3
DMI_RX[0]
P7
DMI_RX[1]
P3
DMI_RX[2]
DMI_RX[3]
K1
DMI_TX#[0]
M8
DMI_TX#[1]
N4
DMI_TX#[2]
R2
DMI_TX#[3]
K3
DMI_TX[0]
M7
DMI_TX[1]
P4
DMI_TX[2]
T3
DMI_TX[3]
U7
FDI0_TX#[0]
FDI0_TX#[1]
W1
FDI0_TX#[2]
FDI0_TX#[3]
W6
FDI1_TX#[0]
V4
FDI1_TX#[1]
Y2
FDI1_TX#[2]
FDI1_TX#[3]
U6
FDI0_TX[0]
FDI0_TX[1]
W3
FDI0_TX[2]
FDI0_TX[3]
W7
FDI1_TX[0]
T4
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
eDP_COMPIO
eDP_ICOMPO
eDP_HPD#
eDP_AUX#
eDP_AUX
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
3
(1)PEG_RCOMPO (G4) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
+1.05V_RUN_VTT
12
RC2
RC2
24.9_0402_1%~D
24.9_0402_1%~D
PEG_COMP
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
G3
G1
G4
H22
J21
B22
PEG_ICOMPI and RCOMPO signals should be shor ted and routed
D21
A19
with - max leng th = 500 mils - typical imped ance = 43 mohm s
D17
PEG_ICOMPO sign als should be routed with - m ax length = 50 0 mils
B14
- typical imped ance = 14.5 mo hms
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6
G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4
F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4
PEG Compensation
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI Intel(R) FDI
DMI Intel(R) FDI
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
eDP
eDP
2
U1I
U1I
BG17
VSS[181]
BG21
VSS[182]
BG24
VSS[183]
BG28
VSS[184]
BG37
VSS[185]
BG41
VSS[186]
BG45
VSS[187]
BG49
VSS[188]
BG53
VSS[189]
BG9
VSS[190]
C29
VSS[191]
C35
VSS[192]
C40
VSS[193]
D10
VSS[194]
D14
VSS[195]
D18
VSS[196]
D22
VSS[197]
D26
VSS[198]
D29
VSS[199]
D35
VSS[200]
D4
VSS[201]
D40
VSS[202]
D43
VSS[203]
D46
VSS[204]
D50
VSS[205]
D54
VSS[206]
D58
VSS[207]
D6
VSS[208]
E25
VSS[209]
E29
VSS[210]
E3
VSS[211]
E35
VSS[212]
E40
VSS[213]
F13
VSS[214]
F15
VSS[215]
F19
VSS[216]
F29
VSS[217]
F35
VSS[218]
F40
VSS[219]
F55
VSS[220]
G51
VSS[221]
G6
VSS[222]
G61
VSS[223]
H10
VSS[224]
H14
VSS[225]
H17
VSS[226]
H21
VSS[227]
H4
VSS[228]
H53
VSS[229]
H58
VSS[230]
J1
VSS[231]
J49
VSS[232]
J55
VSS[233]
K11
VSS[234]
K21
VSS[235]
K51
VSS[236]
K8
VSS[237]
L16
VSS[238]
L20
VSS[239]
L22
VSS[240]
L26
VSS[241]
L30
VSS[242]
L34
VSS[243]
L38
VSS[244]
L43
VSS[245]
L48
VSS[246]
L61
VSS[247]
M11
VSS[248]
M15
VSS[249]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
VSS
VSS
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
NCTF
NCTF
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
G48
A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61
1
T128 PAD~D@ T128 PA D~D@
eDP Compensation
+1.05V_RUN_VTT
12
RC1
RC1
24.9_0402_1%~D
A A
eDP_COMPIO and ICOMPO signals should be shor ted near
balls and route d with typical impedance <25 mohms
5
24.9_0402_1%~D
EDP_COMP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (1/6)
Sandy Bridge (1/6)
Sandy Bridge (1/6)
LA-7731P
LA-7731P
LA-7731P
6 59Thursday, September 01, 2011
6 59Thursday, September 01, 2011
6 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 7
5
+3.3V_ALW_PCH
CC156 0.1U_0402_25V6K~DCC156 0.1U_0402_25V6K~D
1 2
5
UC2
UC2
1
RUNPWROK<39,40>
+3.3V_ALW_PCH
D D
+1.05V_RUN_VTT
C C
1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D
PM_DRAM_PWR GD<16>
1 2
RC126 56_0402_5%~D@RC126 56_0402_5%~D@
1 2
RC128 49.9_0402_1%~D@RC 128 49.9_0402_1%~D@
1 2
RC44 62_0402_5%~DRC44 62_0402_5%~D
Follow check list 0.5
H_PROCHOT#<40,53,54>
H_THERMTRIP#<22>
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
H_SNB_IVB#<18>
CPU_DETECT#<39>
PECI_EC<40>
1 2
place RC57 near CPU 300mils ~1530mils
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC129 0_0402_5%~DRC129 0_0402_5%~D
P
B
O
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,42>
H_CATERR#
VR1 TOPOLOGY
H_PROCHOT#_R
H_THERMTRIP#_R
RUNPWROK_AND PM_DRAM_PWR GD_CPU
4
+1.5V_CPU_VDDQ
RC64
39_0402_5%~D
39_0402_5%~D
1 2
13
D
D
QC1
QC1
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
S
S
INTEL suggest RC64 and QC1 NO stuff by default
U1B
U1B
F49
PROC_SELECT#
C57
PROC_DETECT#
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
place RC129 nea r CPU 250mils ~2530 mils
1 2
H_PM_SYNC
VCCPWRGOOD_0_R
PM_DRAM_PWR GD_CPU
PCH_PLTRST#_R
H_PM_SYNC< 16>
H_CPUPWRGD<18>
B B
RC25 1K_0402_5%~DRC25 1K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC141
CC141
2
C48
PM_SYNC
B46
UNCOREPWRGOOD
BE45
SM_DRAMPWR OK
D44
RESET#
EMI request to reserve CC141
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
Buffered reset to CPU
A A
PCH_PLTRST#<17,31,32,33>
1
2
5
+3.3V_RUN
1
5
PCH_PLTRST#_BUF
4
2
UC1
UC1
NC
VCC
A
GND3Y
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Open drain buffer
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CC140
CC140
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
4
12
RC12
RC12
200_0402_1%~D
200_0402_1%~D
1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D
@RC64
@
@
@
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
PCH_PLTRST#_R
4
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
MISC
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
3
+3.3V_ALW_PCH
12
RC124
@RC124
@
1K_0402_1%~D
1K_0402_1%~D
SYS_PWROK_XDP
J3
H2
AG3
AG1
N59
N58
AT30
BF44
BE43
BG43
N53
N55
L56
L55
J58
M60
TDI
L59
K58
G58
E55
E59
G55
G59
H60
J59
J61
CPU_DMI
CPU_DMI#
CPU_DPLL
CPU_DPLL#
CLK_XDP_ITP
CLK_XDP_ITP#
DDR3_DRAMRST#_CP U
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
BPM#6
BPM#7
1 2
RC13 0_0402_5%~DRC13 0_0402_5%~D
1 2
RC15 0_0402_5%~DRC15 0_0402_5%~D
1 2
RC16 1K_0402_5%~DRC16 1K_0402_5%~D
1 2
RC17 1K_0402_5%~DRC17 1K_0402_5%~D
+1.05V_RUN_VTT
Max 500mils
12
RC26 0_0402_5%~DRC26 0_0402_5%~D
Place T108 close to T107, T109
close to T127 for iFDIM request
T107 PAD~D@ T107 PAD~D@
T127 PAD~D@ T127 PAD~D@
4.99K_0402_1%~D
4.99K_0402_1%~D
For ESD concern, please put near CPU
VCCPWRGOOD_0_R
12
RC130
RC130
10K_0402_5%~D
10K_0402_5%~D
Avoid stub in t he PWRGD path
while placing r esistors RC25 & RC130
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
+1.05V_RUN_VTT
Place near JXDP1
CLK_CPU_DMI <15>
CLK_CPU_DMI# <15>
12
RC50
RC50
DDR_HVREF_RST_PCH<15>
DDR_HVREF_RST_GATE<40>
XDP_DBRESET#XDP_DBRESET#_R
T108 PAD~D@ T108 PAD~D@
T109 PAD~D@ T109 PAD~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC65
CC65
2
XDP_DBRESET# <1 4,16>
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
2
SIO_PWRBTN#<14,16,40>
CFG0<9>
SYS_PWROK<16,39>
PCH_PLTRST#<17,31,32,33>
1 2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@
D
S
D
S
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
1
CC177
CC177
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1 2
RC46 0_0402_5%~DR C46 0_0402_5%~D
1 2
RC47 0_0402_5%~D@RC47 0_0 402_5%~D@
XDP_TDO_R XDP_TDO
12
RC42
RC42
140_0402_1%~D
140_0402_1%~D
RC8 1K_0402_5%~DRC8 1K_0402_5%~D
DDR_HVREF_RST
1 2
RC23 0_0402_5%~DRC23 0_0402_5%~D
1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D
12
RC45
RC45
RC43
RC43
200_0402_1%~D
200_0402_1%~D
25.5_0402_1%~D
25.5_0402_1%~D
2
1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D
1 2
RC6 0_0402_5%~DRC6 0_0402_5%~D
1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D
1 2
RC9 0_0402_5%~D@RC9 0_0402_5%~D@
1 2
CLK_XDP
CLK_XDP#
DDR3_DRAMRST# <12>
XDP_TDIXDP_TDI_R
12
1
+1.05V_RUN_VTT
JXDP1
@JXDP1
XDP_PREQ#
XDP_PRDY#
H_CPUPWRGD_XDPH_CPUPWRGD
CFD_PWRBTN#_X DP
XDP_HOOK2
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCLK
1 2
RH107 0_0402 _5%~DRH107 0_0402_5%~D
1 2
RH106 0_0402 _5%~DRH106 0_0402_5%~D
CLK_XDP_ITP
CLK_XDP_ITP#
DDR_HVREF_RST <12>
M3 control
RH109 0_0402_5%~D@RH109 0_0402_5%~D@
RH108 0_0402_5%~D@RH108 0_0402_5%~D@
1 2
1 2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
MOLEX_52435-2671
MOLEX_52435-2671
OBSFN_A0
OBSFN_A1
GND
OBSDATA_A[0]
OBSDATA_A[1]
GND
OBSDATA_A[2]
OBSDATA_A[3]
GND
HOOK0
HOOK1
HOOK2
HOOK3
HOOK4
HOOK5
VCCOBS_AB
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK124GND
GND
GND
TCK0
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
@
27
28
PU/PD for JTAG signals
+3.3V_RUN
XDP_DBRESET#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
RC27 51_0402_1%~DRC27 51_0402_1%~D
RC29 51_0402_1%~DRC29 51_0402_1%~D
RC32 51_0402_1%~D@RC32 51_0402_1%~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D
RC40
RC40
RC41
RC41
12
12
12
12
12
12
51_0402_1%~D
51_0402_1%~D
12
51_0402_1%~D
51_0402_1%~D
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (2/6)
Sandy Bridge (2/6)
Sandy Bridge (2/6)
LA-7731P
LA-7731P
LA-7731P
7 59Thursday, September 01, 2011
7 59Thursday, September 01, 2011
7 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 8
5
U1C
D D
C C
B B
DDR_A_D[0..63]<12>
DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>
DDR_A_CAS#<12>
DDR_A_RAS#<12>
DDR_A_WE#< 12>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
U1C
AG6
SA_DQ[0]
AJ6
SA_DQ[1]
AP11
SA_DQ[2]
AL6
SA_DQ[3]
AJ10
SA_DQ[4]
AJ8
SA_DQ[5]
AL8
SA_DQ[6]
AL7
SA_DQ[7]
AR11
SA_DQ[8]
AP6
SA_DQ[9]
AU6
SA_DQ[10]
AV9
SA_DQ[11]
AR6
SA_DQ[12]
AP8
SA_DQ[13]
AT13
SA_DQ[14]
AU13
SA_DQ[15]
BC7
SA_DQ[16]
BB7
SA_DQ[17]
BA13
SA_DQ[18]
BB11
SA_DQ[19]
BA7
SA_DQ[20]
BA9
SA_DQ[21]
BB9
SA_DQ[22]
AY13
SA_DQ[23]
AV14
SA_DQ[24]
AR14
SA_DQ[25]
AY17
SA_DQ[26]
AR19
SA_DQ[27]
BA14
SA_DQ[28]
AU14
SA_DQ[29]
BB14
SA_DQ[30]
BB17
SA_DQ[31]
BA45
SA_DQ[32]
AR43
SA_DQ[33]
AW48
SA_DQ[34]
BC48
SA_DQ[35]
BC45
SA_DQ[36]
AR45
SA_DQ[37]
AT48
SA_DQ[38]
AY48
SA_DQ[39]
BA49
SA_DQ[40]
AV49
SA_DQ[41]
BB51
SA_DQ[42]
AY53
SA_DQ[43]
BB49
SA_DQ[44]
AU49
SA_DQ[45]
BA53
SA_DQ[46]
BB55
SA_DQ[47]
BA55
SA_DQ[48]
AV56
SA_DQ[49]
AP50
SA_DQ[50]
AP53
SA_DQ[51]
AV54
SA_DQ[52]
AT54
SA_DQ[53]
AP56
SA_DQ[54]
AP52
SA_DQ[55]
AN57
SA_DQ[56]
AN53
SA_DQ[57]
AG56
SA_DQ[58]
AG53
SA_DQ[59]
AN55
SA_DQ[60]
AN52
SA_DQ[61]
AG55
SA_DQ[62]
AK56
SA_DQ[63]
BD37
SA_BS[0]
BF36
SA_BS[1]
BA28
SA_BS[2]
BE39
SA_CAS#
BD39
SA_RAS#
AT41
SA_WE#
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AU36
AV36
AY26
AT40
AU40
BB26
BB40
BC41
AY40
BA41
AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55
AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54
BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26
M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
M_ODT0
M_ODT1
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <12>
M_CLK_DDR#0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
M_CLK_DDR#1 <12>
DDR_CKE1_DIMMA <12>
DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>
M_ODT0 <12>
M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_A_MA[0..15] <12>
3
DDR_B_D[0..63]<13>
DDR_B_BS0<13>
DDR_B_BS1<13>
DDR_B_BS2<13>
DDR_B_CAS#<13>
DDR_B_RAS#<13>
DDR_B_WE#< 13>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
2
U1D
U1D
AL4
SB_DQ[0]
AL1
SB_DQ[1]
AN3
SB_DQ[2]
AR4
SB_DQ[3]
AK4
SB_DQ[4]
AK3
SB_DQ[5]
AN4
SB_DQ[6]
AR1
SB_DQ[7]
AU4
SB_DQ[8]
AT2
SB_DQ[9]
AV4
SB_DQ[10]
BA4
SB_DQ[11]
AU3
SB_DQ[12]
AR3
SB_DQ[13]
AY2
SB_DQ[14]
BA3
SB_DQ[15]
BE9
SB_DQ[16]
BD9
SB_DQ[17]
BD13
SB_DQ[18]
BF12
SB_DQ[19]
BF8
SB_DQ[20]
BD10
SB_DQ[21]
BD14
SB_DQ[22]
BE13
SB_DQ[23]
BF16
SB_DQ[24]
BE17
SB_DQ[25]
BE18
SB_DQ[26]
BE21
SB_DQ[27]
BE14
SB_DQ[28]
BG14
SB_DQ[29]
BG18
SB_DQ[30]
BF19
SB_DQ[31]
BD50
SB_DQ[32]
BF48
SB_DQ[33]
BD53
SB_DQ[34]
BF52
SB_DQ[35]
BD49
SB_DQ[36]
BE49
SB_DQ[37]
BD54
SB_DQ[38]
BE53
SB_DQ[39]
BF56
SB_DQ[40]
BE57
SB_DQ[41]
BC59
SB_DQ[42]
AY60
SB_DQ[43]
BE54
SB_DQ[44]
BG54
SB_DQ[45]
BA58
SB_DQ[46]
AW59
SB_DQ[47]
AW58
SB_DQ[48]
AU58
SB_DQ[49]
AN61
SB_DQ[50]
AN59
SB_DQ[51]
AU59
SB_DQ[52]
AU61
SB_DQ[53]
AN58
SB_DQ[54]
AR58
SB_DQ[55]
AK58
SB_DQ[56]
AL58
SB_DQ[57]
AG58
SB_DQ[58]
AG59
SB_DQ[59]
AM60
SB_DQ[60]
AL59
SB_DQ[61]
AF61
SB_DQ[62]
AH60
SB_DQ[63]
BG39
SB_BS[0]
BD42
SB_BS[1]
AT22
SB_BS[2]
AV43
SB_CAS#
BF40
SB_RAS#
BD45
SB_WE#
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
1
M_CLK_DDR2
BA34
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AY34
AR22
BA36
BB36
BF27
BE41
BE47
AT43
BG47
AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59
AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61
BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22
M_CLK_DDR#2
DDR_CKE2_DIMMB
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
M_CLK_DDR2 <13>
M_CLK_DDR#2 <13>
DDR_CKE2_DIMMB <13>
M_CLK_DDR3 <13>
M_CLK_DDR#3 <13>
DDR_CKE3_DIMMB <13>
DDR_CS2_DIMMB# <13>
DDR_CS3_DIMMB# <13>
M_ODT2 <13>
M_ODT3 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_B_MA[0..15] <13>
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (3/6)
Sandy Bridge (3/6)
Sandy Bridge (3/6)
LA-7731P
LA-7731P
LA-7731P
8 59Thursday, September 01, 2011
8 59Thursday, September 01, 2011
8 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 9
5
4
3
2
1
CFG Straps for Processor
CFG2
D D
CFG0<7>
+VCC_GFXCORE
1 2
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@
1 2
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@
C C
+VCC_CORE
1 2
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@
1 2
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@
B B
1 2
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@
1 2
RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@
VAXG_VAL_SENSE
12
RC69
@RC69
@
100_0402_1%~D
100_0402_1%~D
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
12
RC71
@RC71
@
100_0402_1%~D
100_0402_1%~D
VSS_VAL_SENSE
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
EDS 1.0 RSVD_12 -> VCC_DIE_SENSE
T22PAD~D @T22PAD~D @
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7
VCC_VAL_SENSE
VSS_VAL_SENSE
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
TP_VCC_DIESENSE
U1E
U1E
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
RESERVED
RESERVED
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1
+DIMM0_1_VREF_CPU
BE7
+DIMM0_1_CA_CPU
BG7
N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50
TP_DC_TEST_A4
A4
C4
DC_TEST_C4_D3
D3
TP_DC_TEST_D1
D1
TP_DC_TEST_A58
A58
A59
DC_TEST_A59_C59
C59
A61
DC_TEST_A61_C61
C61
TP_DC_TEST_D61
D61
TP_DC_TEST_BD61
BD61
BE61
DC_TEST_BE59_BE61
BE59
BG61
DC_TEST_BG59_BG61
BG59
TP_DC_TEST_BG58
BG58
TP_DC_TEST_BG4
BG4
BG3
DC_TEST_BE3_BG3
BE3
BG1
DC_TEST_BE1_BG1
BE1
TP_DC_TEST_BD1
BD1
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2
definition matches socket pin map definition
0:Lane Reversed
Display Port Presence Strap
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
T121 PAD~D@ T121 PA D~D@
T118 PAD~D@ T118 PA D~D@
T119 PAD~D@ T119 PA D~D@
T120 PAD~D@ T120 PA D~D@ RC53
T122 PAD~D@ T122 PA D~D@
T132 PAD~D@ T132 PA D~D@
T123 PAD~D@ T123 PA D~D@
T124 PAD~D@ T124 PA D~D@
PCIE Port Bifurcation Straps
connected to the Embedded Display Port
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG4
CFG6
CFG5
RC54
@ RC54
@
1K_0402_1%~D
1K_0402_1%~D
12
@ RC51
@
1K_0402_1%~D
1K_0402_1%~D
12
@ RC52
@
1K_0402_1%~D
1K_0402_1%~D
12
12
RC51
RC52
@ RC53
@
1K_0402_1%~D
1K_0402_1%~D
CFG7
12
@ RC56
@
1K_0402_1%~D
1K_0402_1%~D
RC56
PEG DEFER TRAINING
1: (Default) PEG Train immediately
CFG7
following xxRESETB de assertion
A A
0: PEG Wait for BIOS for training
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (4/6)
Sandy Bridge (4/6)
Sandy Bridge (4/6)
LA-7731P
LA-7731P
LA-7731P
9 59Thursday, September 01, 2011
9 59Thursday, September 01, 2011
9 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 10
5
4
3
2
1
AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48
AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15
W16
W17
BC22
AM25
AN22
A44
B43
C44
F43
G43
AN16
AN17
8.5A
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
Note: Place the PU resistors close to CPU
RC61 close to C PU 300 - 1500m ils
1 2
RC140 0_0402_5%~D@RC140 0_0402_5%~D@
+1.05V_RUN_VTT
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VCCSENSE_R
VSSSENSE_R
H_CPU_SVIDALRT#
+3.3V_RUN
@ RC141
@
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC573
CC573
2
VIDSCLK <53>
Place RC66, RC70 ,RC133near CPU
1 2
RC67 0_0402_5%~DRC67 0_0402_5%~D
1 2
RC68 0_0402_5%~DRC68 0_0402_5%~D
RC133 10_0402_1%~DRC133 10_0402_1%~D
1 2
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D
VCCP_PWRCTRL Pull high on power side
CAD Note: Place the PU
RC141
10K_0402_5%~D
10K_0402_5%~D
VCCP_PWRCTR L <51>
+1.05V_RUN_VTT
12
RC63
RC63
130_0402_1%~D
130_0402_1%~D
resistors close to CPU
RC63 close to C PU 300 - 1500m ils
VIDSOUT <53>
RC75
@RC75
@
100_0402_1%~D
100_0402_1%~D
1 2
RC98
RC98
12
10_0402_1%~D
10_0402_1%~D
+1.05V_RUN_VTT
VTT_SENSE <51>
VSSIO_SENSE_R <5 1>
Place RC98 close to CPU
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
12
RC60
RC60
75_0402_1%~D
75_0402_1%~D
+VCC_CORE
12
12
2
RC66
RC66
100_0402_1%~D
100_0402_1%~D
VCCSENSE <53>
VSSSENSE <53>
RC70
RC70
100_0402_1%~D
100_0402_1%~D
VIDALERT_N <53>
Iccmax current changed for PD DG Rev0.7
CPU Power Rail Table
Voltage Rail
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
+1.5V_MEM 1.5
Description
*
5A to Mem contr oller(+1.5V_CP U_VDDQ)
5-6A to 2 DIMMs /channel
2-5A to +1.5V_R UN & +0.75V_DD R_VTT
Voltage
0.65-1.3
1.05/1
0.0-1.1
1.8
1.5
0.65-0.9
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (5/6)
Sandy Bridge (5/6)
Sandy Bridge (5/6)
LA-7731P
LA-7731P
LA-7731P
1
S0 Iccmax
Current (A)
10 59Thursday, September 01, 2011
10 59Thursday, September 01, 2011
10 59Thursday, September 01, 2011
53
8.5
33
1.2
5
6
12-16
*
0.3
0.3
0.3
POWER
U1F
53A
U1F
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
4
+VCC_CORE
D D
C C
B B
A A
5
POWER
CORE SUPPLY
CORE SUPPLY
VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
PEG IO AND DDR IO
PEG IO AND DDR IO
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE[1]
VCCPQE[2]
RAILS
RAILS
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID QUIET
SENSE LINES SVID QUIET
Page 11
5
12
RC74
RC74
100K_0402_5%~D
QC4A
QC4A
2
12
RC99
RC99
100_0402_1%~D
100_0402_1%~D
12
RC100
RC100
100_0402_1%~D
100_0402_1%~D
1
1
2
2
100K_0402_5%~D
61
+1.8V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC264
CC264
1
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
1
CC176
CC176
+
+
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC262
CC262
CC263
CC263
1
2
5
RUN_ON_CPU1.5VS3# <7,42>
RC76
100_0402_1%~D
100_0402_1%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC174
CC174
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
+1.5V_CPU_VDDQ Source
VCC_AXG_SENSE<53>
VSS_AXG_SENSE<53>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC170
CC170
2
2
5
1 2
RC82 0_0402_5%~D@RC82 0_0402_5%~D@
1 2
RC79 0_0402_5%~DRC79 0_0402_5%~D
+VCC_GFXCORE
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC183
CC183
CC168
CC168
CC169
CC169
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CPU1.5V_S3_GATE<40>
SIO_SLP_S3#<16,35,39,42,49>
+VCC_SA
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
CC172
CC172
+
+
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC171
CC171
2
D D
C C
B B
A A
12
RC72
RC72
100K_0402_5%~D
100K_0402_5%~D
RUN_ON_CPU1.5VS3
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
QC4B
QC4B
4
@RC76
@
12
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC175
CC175
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC260
CC260
CC261
CC261
1
2
4
+1.5V_MEM +1.5V_CPU_VDDQ+3.3V_ALW2 +PWR_SRC_S
8
7
6
5
330K_0402_1%~D
330K_0402_1%~D
12
RC143
RC143
+VCC_GFXCORE
1.2A
6A
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4
QC3
QC3
AO4728L_SO8~D
AO4728L_SO8~D
U1G
U1G
33A
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
VAXG[4]
AB52
VAXG[5]
AB53
VAXG[6]
AB55
VAXG[7]
AB56
VAXG[8]
AB58
VAXG[9]
AB59
VAXG[10]
AC61
VAXG[11]
AD47
VAXG[12]
AD48
VAXG[13]
AD50
VAXG[14]
AD51
VAXG[15]
AD52
VAXG[16]
AD53
VAXG[17]
AD55
VAXG[18]
AD56
VAXG[19]
AD58
VAXG[20]
AD59
VAXG[21]
AE46
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
W50
VAXG[48]
W51
VAXG[49]
W52
VAXG[50]
W53
VAXG[51]
W55
VAXG[52]
W56
VAXG[53]
W61
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
F45
VAXG_SENSE
G45
VSSAXG_SENSE
BB3
VCCPLL[1]
BC1
VCCPLL[2]
BC4
VCCPLL[3]
L17
VCCSA[1]
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
3
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
3
4
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
1
CC136
CC136
2
20K_0402_5%~D
20K_0402_5%~D
12
@
@
RC73
RC73
CC135
CC135
1
2
POWER
POWER
VREF
VREF
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
GRAPHICS
GRAPHICS
SENSE
LINES
SENSE
LINES
1.8V RAIL
1.8V RAIL
SA RAIL
SA RAIL
VCCSA VID
VCCSA VID
SM_VREF
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]
VCCDQ[1]
VCCDQ[2]
QUIET RAILS
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
VCCSA_SENSE
SENSE LINES
SENSE LINES
VCCSA_VID[0]
VCCSA_VID[1]
lines
lines
VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]
VDDQ[9]
+V_SM_VREF_CNT
+V_SM_VREF_CNT
AY43
+V_SM_VREF should
have 10 mil trace width
5A
+1.5V_CPU_VDDQ
AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
3
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33
AM28
AN26
BC43
BA43
U10
D48
D49
1
2
1
2
+1.5V_CPU_VDDQ
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
12
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
12
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
12
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
12
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC180
CC180
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC251
CC251
10U_0603_6.3V6M~D
1
CC161
CC161
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC252
CC252
1
2
VCCSA_VID_0 <52>
VCCSA_VID_1 <52>
CC162
CC162
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC181
CC181
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC250
CC250
1
2
CC574
CC574
VCCSA_SENSE <52>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC253
CC253
+1.5V_CPU_VDDQ
RC84
RC84
RC78
RC78
1
CC163
CC163
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC254
CC254
1
2
2
U1H
U1H
1K_0402_1%~D
1K_0402_1%~D
12
1K_0402_1%~D
1K_0402_1%~D
12
6A
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC165
CC165
CC164
CC164
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC255
CC255
1
1
2
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC256
CC256
CC167
CC167
CC166
CC166
+
+
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CC257
CC257
1
2
CC259
CC259
CC258
CC258
1
1
2
2
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
A37
VSS[7]
A40
VSS[8]
A45
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13]
AA13
VSS[14]
AA50
VSS[15]
AA51
VSS[16]
AA52
VSS[17]
AA53
VSS[18]
AA55
VSS[19]
AA56
VSS[20]
AA8
VSS[21]
AB16
VSS[22]
AB18
VSS[23]
AB21
VSS[24]
AB48
VSS[25]
AB61
VSS[26]
AC10
VSS[27]
AC14
VSS[28]
AC46
VSS[29]
AC6
VSS[30]
AD17
VSS[31]
AD20
VSS[32]
AD4
VSS[33]
AD61
VSS[34]
AE13
VSS[35]
AE8
VSS[36]
AF1
VSS[37]
AF17
VSS[38]
AF21
VSS[39]
AF47
VSS[40]
AF48
VSS[41]
AF50
VSS[42]
AF51
VSS[43]
AF52
VSS[44]
AF53
VSS[45]
AF55
VSS[46]
AF56
VSS[47]
AF58
VSS[48]
AF59
VSS[49]
AG10
VSS[50]
AG14
VSS[51]
AG18
VSS[52]
AG47
VSS[53]
AG52
VSS[54]
AG61
VSS[55]
AG7
VSS[56]
AH4
VSS[57]
AH58
VSS[58]
AJ13
VSS[59]
AJ16
VSS[60]
AJ20
VSS[61]
AJ22
VSS[62]
AJ26
VSS[63]
AJ30
VSS[64]
AJ34
VSS[65]
AJ38
VSS[66]
AJ42
VSS[67]
AJ45
VSS[68]
AJ48
VSS[69]
AJ7
VSS[70]
AK1
VSS[71]
AK52
VSS[72]
AL10
VSS[73]
AL13
VSS[74]
AL17
VSS[75]
AL21
VSS[76]
AL25
VSS[77]
AL28
VSS[78]
AL33
VSS[79]
AL36
VSS[80]
AL40
VSS[81]
AL43
VSS[82]
AL47
VSS[83]
AL61
VSS[84]
AM13
VSS[85]
AM20
VSS[86]
AM22
VSS[87]
AM26
VSS[88]
AM30
VSS[89]
AM34
VSS[90]
IVY-BRIDGE_BGA1023~D
IVY-BRIDGE_BGA1023~D
VSS
VSS
1
AM38
VSS[91]
AM4
VSS[92]
AM42
VSS[93]
AM45
VSS[94]
AM48
VSS[95]
AM58
VSS[96]
AN1
VSS[97]
AN21
VSS[98]
AN25
VSS[99]
AN28
VSS[100]
AN33
VSS[101]
AN36
VSS[102]
AN40
VSS[103]
AN43
VSS[104]
AN47
VSS[105]
AN50
VSS[106]
AN54
VSS[107]
AP10
VSS[108]
AP51
VSS[109]
AP55
VSS[110]
AP7
VSS[111]
AR13
VSS[112]
AR17
VSS[113]
AR21
VSS[114]
AR41
VSS[115]
AR48
VSS[116]
AR61
VSS[117]
AR7
VSS[118]
AT14
VSS[119]
AT19
VSS[120]
AT36
VSS[121]
AT4
VSS[122]
AT45
VSS[123]
AT52
VSS[124]
AT58
VSS[125]
AU1
VSS[126]
AU11
VSS[127]
AU28
VSS[128]
AU32
VSS[129]
AU51
VSS[130]
AU7
VSS[131]
AV17
VSS[132]
AV21
VSS[133]
AV22
VSS[134]
AV34
VSS[135]
AV40
VSS[136]
AV48
VSS[137]
AV55
VSS[138]
AW13
VSS[139]
AW43
VSS[140]
AW61
VSS[141]
AW7
VSS[142]
AY14
VSS[143]
AY19
VSS[144]
AY30
VSS[145]
AY36
VSS[146]
AY4
VSS[147]
AY41
VSS[148]
AY45
VSS[149]
AY49
VSS[150]
AY55
VSS[151]
AY58
VSS[152]
AY9
VSS[153]
BA1
VSS[154]
BA11
VSS[155]
BA17
VSS[156]
BA21
VSS[157]
BA26
VSS[158]
BA32
VSS[159]
BA48
VSS[160]
BA51
VSS[161]
BB53
VSS[162]
BC13
VSS[163]
BC5
VSS[164]
BC57
VSS[165]
BD12
VSS[166]
BD16
VSS[167]
BD19
VSS[168]
BD23
VSS[169]
BD27
VSS[170]
BD32
VSS[171]
BD36
VSS[172]
BD40
VSS[173]
BD44
VSS[174]
BD48
VSS[175]
BD52
VSS[176]
BD56
VSS[177]
BD8
VSS[178]
BE5
VSS[179]
BG13
VSS[180]
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (6/6)
Sandy Bridge (6/6)
Sandy Bridge (6/6)
LA-7731P
LA-7731P
LA-7731P
11 59Thursday, September 01, 2011
11 59Thursday, September 01, 2011
11 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 12
5
+V_DDR_REFA_M3
+V_DDR_REF
D D
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
All VREF traces should
have 10 mil trace width
DDR_A_DQS#[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
C C
Layout Note:
Place near JDIMM1
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD3
CD3
2
+1.5V_MEM
B B
A A
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD7
CD7
1
1
2
2
Layout Note:
Place near JDIMM1.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD17
CD17
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD4
CD4
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD8
CD8
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD18
CD18
2
1
CD5
CD5
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD9
CD9
CD10
CD10
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD19
CD19
2
2
5
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD6
CD6
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CD13
@
CD11
CD11
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD20
CD20
1
CD51
CD51
CD13
1
+
+
2
2
330U_SX_2VY~D
330U_SX_2VY~D
CD14
CD14
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
1 2
1 2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
4
1 2
RD7 0_0402_5%~DRD7 0_0402_5 %~D
1 2
RD1 0_0402_5%~DRD1 0_0402_5 %~D
+3.3V_RUN
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
DDR_CKE0_DIMMA<8>
DDR_CS1_DIMMA#<8>
4
3
JDIMM1
JDIMM1
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
TYCO_2-2013022-1
TYCO_2-2013022-1
CONN@
CONN@
H=4mm
2-3A to 1 DIMMs/channel
+1.5V_MEM+1.5V_MEM
2
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
S0#
ODT0
VDD
ODT1
NC
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
BOSS2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
DDR_A_D20DDR_A_D16
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11DDR_A_MA12
DDR_A_MA7DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA4DDR_A_MA5
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
+0.75V_DDR_VTT
DDR_CKE1_DIMMA <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
DDR_A_BS1 < 8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <8>
M_ODT0 <8>
M_ODT1 <8>
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+DIMM1_VREF_DQ
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DDR_A_D0
DDR_A_D1
CD2
CD2
1
CD1
CD1
2
DDR_A_BS2<8>
M_CLK_DDR0<8>
DDR_A_BS0<8>
DDR_A_WE#<8>
DDR_A_CAS#<8>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
CD21
CD21
2
2
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9 DDR_A_D13
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_BS2
DDR_A_MA3
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD22
CD22
+0.75V_DDR_VTT
2
+DIMM0_1_VREF_CPU
DDR_HVREF_RST<7>
+DIMM0_1_CA_CPU
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
+DIMM1_VREF_CA
RD11 0_0402_5%~DR D11 0_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD16
CD15
CD15
1
2
DDR_XDP_WAN_ SMBDAT <13,15,27,34>
DDR_XDP_WAN_ SMBCLK <13,15,27,34>
CD16
1
2
2
1
+1.5V_MEM
12
RD27
RD27
1K_0402_1%~D
1K_0402_1%~D
DDR3_DRAMRST#_R
DDR_HVREF_RST
DDR_HVREF_RST
12
1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D
RD29 0_0402_5%~D@RD29 0_0402_5%~D@
1 2
QD1
QD1
D
S
D
S
BSS138-G_SOT23-3
BSS138-G_SOT23-3
13
G
G
2
RD30 0_0402_5%~D@RD30 0_0402_5%~D@
1 2
QD2
QD2
D
S
D
S
BSS138-G_SOT23-3
BSS138-G_SOT23-3
13
G
G
2
+V_DDR_REF
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-7731P
LA-7731P
LA-7731P
1
+V_DDR_REFA_M3
+V_DDR_REFB_M3
12 59Thursday, September 01, 2011
12 59Thursday, September 01, 2011
12 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 13
5
D D
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
DDR_B_DQS#[0..7]<8>
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
C C
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD25
CD25
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
B B
A A
10U_0603_6.3V6M~D
CD29
CD29
CD30
CD30
1
1
2
2
Layout Note:
Place near JDIMM2.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD39
CD39
2
Layout Note:
Place near JDIMM2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD26
CD26
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD31
CD31
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD40
CD40
2
2
5
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD28
CD28
CD27
CD27
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD34
CD32
CD32
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD41
CD41
CD34
CD33
CD33
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD42
CD42
2
All VREF traces should
have 10 mil trace width
330U_SX_2VY~D
330U_SX_2VY~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CD35
@
1
CD36
CD36
CD35
1
+
+
2
2
4
+V_DDR_REFB_M3
+V_DDR_REF
4
+DIMM2_VREF_DQ
1 2
RD8 0_0402_5%~DRD8 0_0402_5 %~D
1 2
RD4 0_0402_5%~DRD4 0_0402_5 %~D
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
+3.3V_RUN
RD5 10K_04 02_5%~DRD5 10K_0402_5%~D
12
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
CD23
CD23
2
+3.3V_RUN
3
+1.5V_MEM +1.5V_MEM
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD24
CD24
1
2
DDR_CKE2_DIMMB<8>
DDR_B_BS2<8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_BS0<8>
DDR_B_WE#<8>
DDR_B_CAS#<8>
DDR_CS3_DIMMB#<8>
10K_0402_5%~D
10K_0402_5%~D
12
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
+0.75V_DDR_VTT +0.75V_DDR_VTT
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
RD6
RD6
CD43
CD43
1
1
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
CD44
CD44
2
H=4mm
JDIMM2
JDIMM2
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013287-1
TYCO_2-2013287-1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
DQ14
DQ15
DQ20
DQ21
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
A11
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G2
2
2-3A to 1 DIMMs/channel
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR3_DRAMRST#_R
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
2
DDR3_DRAMRST#_R <12>
DDR_CKE3_DIMMB <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
DDR_B_BS1 < 8>
DDR_B_RAS# <8>
DDR_CS2_DIMMB# <8>
M_ODT2 <8>
M_ODT3 <8>
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
CD37
CD37
2
DDR_XDP_WAN_ SMBDAT <12,15,27,34>
DDR_XDP_WAN_ SMBCLK <12,15,27,34>
1
JDIMMB Reverse Type
+DIMM2_VREF_CA
12
RD15 0_0402_5%~DR D15 0_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD38
CD38
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-7731P
LA-7731P
LA-7731P
+V_DDR_REF
13 59Thursday, September 01, 2011
13 59Thursday, September 01, 2011
13 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 14
5
CMOS settingCMOS_CLR1
Open
ME_CLR1
Shunt
Open
+RTC_CELL
D D
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
Low - Enable External VRs
Clear CMOSShunt
Keep CMOS
TPM setting
Clear ME RTC Registers
Keep ME RTC Registers
12
RH38
RH38
330K_0402_1%~D
330K_0402_1%~D
PCH_INTVRMEN
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
+3.3V_ALW_PCH
12
RH66
RH66
1K_0402_1%~D
1K_0402_1%~D
PCH_AZ_SYNC
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
*
+RTC_CELL
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
PCH_AZ_CODEC_SDOUT<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_RST#<29>
PCH_AZ_CODEC_BITCLK<29>
+3.3V_ALW_PCH
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
27P_0402_50V8J~D
27P_0402_50V8J~D
RH357 100K_0402_5%~DRH357 100K_0402_5%~D
C C
B B
1
1 2
CH101
@CH101
@
2
12
2
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
1
2
USB30_SMI#
1 2
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
CH4
CH4
CMOS place near DIMM
PCH_AZ_SDOUT
PCH_AZ_SYNC_Q
PCH_AZ_RST#
PCH_AZ_BITCLK
+3.3V_ALW_PCH
12
RH288
RH288
0_0603_5%~D
0_0603_5%~D
+3.3V_ALW_PCH_JTAG
2
2
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
ME_FWP<39>
12
12
12
12
18P_0402_50V8J~D
18P_0402_50V8J~D
18P_0402_50V8J~D
18P_0402_50V8J~D
4
PCH_AZ_SYNC_Q
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
INTEL HDA_SYNC
isolation circuit
CH2
CH2
12
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
CH3
CH3
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R
12
+3.3V_ALW_PCH
12
12
RH48
RH48
100_0402_1%~D
100_0402_1%~D
+5V_RUN
1 2
RH286 0_0402_5%~DRH286 0_0402_5%~D
PCH_AZ_CODEC_SDIN0<29>
1 2
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
12
RH47
RH47
RH49
RH49
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
S
S
G
G
PCH_RTCX1
SPKR<29>
D
D
13
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
12
RH2
RH2
10M_0402_5%~D
10M_0402_5%~D
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_GPIO33
USB30_SMI#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
3
PCH_AZ_SYNC
SIO_PWRBTN#
PCH_RSMRST#_Q<16,41>
UH4A
UH4A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_ EN# / GPIO3 3
N32
HDA_DOCK_ RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
2
+3.3V_ALW_PCH
12
1 2
RH24 1K_0402_1%~D@ RH24 1K_0402_1%~D@
FWH0 / L AD0
FWH1 / L AD1
FWH2 / L AD2
FWH3 / L AD3
LPC
LPC
FWH4 / L FRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA
SATA
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMP O
SATA3COMPI
SATA3RBIA S
SATALED#
+3.3V_ALW_PCH+1.05V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
CH1
CH1
1
CH1 clsoe to JXDP2CH6 clsoe to JXDP2
C38
A38
B37
C37
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
2
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
LPC_LDRQ1#
IRQ_SERIRQ
SATA_COMP
SATA3_COMP
RBIAS_SATA3
SATA_ACT#
HDD_DET#_R
BBS_BIT0_R
1.05V_0.8V_PWROK<40,53>
SIO_PWRBTN#<7,16,40>
+3.3V_ALW_PCH
XDP_DBRESET#<7,16>
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
RH46 750_0402_1%~DRH46 750_0402_1%~D
RH284 0_0402_5%~D@RH284 0_0402_5%~D@
RSMRST#_XDP
1 2
RH283 1K_0402_5%~D@R H283 1K_0402_5%~D@
1 2
1 2
RH21 0_0402_5%~D@RH21 0_0402_5%~D@
RSMRST#_XDP
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSRSMRST#_XDP
PCH_JTAG_TCK
LPC_LAD0 <32, 34,39,40>
LPC_LAD1 <32, 34,39,40>
LPC_LAD2 <32, 34,39,40>
LPC_LAD3 <32, 34,39,40>
LPC_LFRAME# <32,34,39,40>
LPC_LDRQ1# <39>
IRQ_SERIRQ <32,39,40>
PSATA_PRX_DTX_N0_C <27>
PSATA_PRX_DTX_P0_C <27>
PSATA_PTX_DRX_N0_C <27>
PSATA_PTX_DRX_P0_C <27>
ESATA_PRX_DTX_N4_C <37>
ESATA_PRX_DTX_P4_C <37>
ESATA_PTX_DRX_N4_C <37>
ESATA_PTX_DRX_P4_C <37>
SATA_PRX_DKTX_N5_C <38>
SATA_PRX_DKTX_P5_C <38>
SATA_PTX_DKRX_N5_C <38>
SATA_PTX_DKRX_P5_C <38>
1 2
1 2
1 2
SATA_ACT# <43>
1 2
RH290 0_0402_5%~DRH290 0_0402_5%~D
1.05V_0.8V_PWROK_R
PCH_PWRBTN#_XDP
+1.05V_RUN
+1.05V_RUN
HDD
E-SATA
DOCK
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
@
@
CH6
CH6
1
2
RH41 10K_0402_5%~D@ RH41 10K_0402_5%~D@
RTCIHDA
RTCIHDA
JTAG
JTAG
SATA0GP / GPIO21
SPI
SPI
SATA1GP / GPIO19
+1.05V_RUN
+3.3V_RUN
12
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
PCH_GPIO33
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
IRQ_SERIRQ
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
BBS_BIT0_R
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
INTEL feedback 0302
SPKR
RH35 10K_0402_5%~D@ RH35 10K_0402_5%~D@
No Reboot Strap
SPKR
RH30
RH30
10K_0402_5%~D
10K_0402_5%~D
HDD_DET# <27>
JXDP2
@JXDP2
@
OBSFN_A0
OBSFN_A1
GND
OBSDATA_A [0]
OBSDATA_A [1]
GND
OBSDATA_A [2]
OBSDATA_A [3]
GND
HOOK0
HOOK1
HOOK2
HOOK3
HOOK4
HOOK5
VCCOBS_A B
HOOK6
HOOK7
GND
TDO
TRSTn
TDI
TMS
TCK124GND
GND
GND
TCK0
MOLEX_52435-2671
MOLEX_52435-2671
12
12
1 2
+3.3V_RUN
12
Low = Default
High = No Reboot
27
28
+3.3V_RUN
BBS_BIT0 - BIOS BOOT STRAP BIT 0
+3.3V_M
12
200 MIL SO8
R890
5@ R890
5@
3.3K_0402_5%~D
3.3K_0402_5%~D
PCH_SPI_CS0# PCH_SPI_CS0_R#
1 2
R935 0_0402_5%~DR935 0_0402_5%~D
PCH_SPI_DIN SPI_DIN64
1 2
R894 33_0402_5%~D5@ R894 33_0402_5%~D5@
SPI_WP#_SEL
SPI_WP#_SEL<39>
A A
R898 0_0402_5%~D@R 898 0_0402_5%~D@
1 2
5
SPI_WP#_SEL_R
64Mb Flash ROM
U52
5@ U52
5@
1
VCC
/CS
2
DO
/HOLD
3
CLK
/WP
GND4DIO
W25Q64CVSSIG_SO8~D
W25Q64CVSSIG_SO8~D
PCH_SPI_DO SPI_DO_TAA
12
R912 0_0402_5%~D6@ R912 0_0402_5%~D6@
SPI_CLK_TAAPCH_SPI_CLK
12
R906 0_0402_5%~D6@ R906 0_0402_5%~D6@
8
7
6
5
12
5@ R891
5@
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_CLK64
SPI_DO64
2
4
6
8
10
12
14
ACES_50169-01441-002
ACES_50169-01441-002
CONN@
CONN@
4
C746
5@ C746
5@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
R891
SPI_HOLD#
1 2
R899 33_0402_5%~D5@ R899 33_0402_5%~D5@
1 2
R901 33_0402_5%~D5@ R901 33_0402_5%~D5@
JTAA1
JTAA1
112
334
556
778
9910
111112
131314
PCH_SPI_CLK
PCH_SPI_DO
PCH_SPI_CS1_R#
SPI_DIN_TAA
PCH_SPI_CS0_R#
PCH_SPI_CS1# PCH_SPI_CS1_R#
1 2
R936 0_0402_5%~DR936 0_0402_5%~D
PCH_SPI_DIN
1 2
R895 33_0402_5%~D5@ R895 33_0402_5%~D5@
+3.3V_M
PCH_SPI_DIN
12
R896 0_0402_5%~D
R896 0_0402_5%~D
6@
6@
+3.3V_M
C745
5@ C745
5@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
SPI_HOLD#
SPI_CLK32
SPI_DO32
1 2
1 2
R897 33_0402_5%~D5@ R897 33_0402_5%~D5@
1 2
R900 33_0402_5%~D5@ R900 33_0402_5%~D5@
PCH_SPI_CLK
PCH_SPI_DO
2
200 MIL SO8
32Mb Flash ROM
U53
5@ U53
5@
1
SPI_DIN32
SPI_WP#_SEL_R
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
/CS
2
DO
3
/WP
GND4DIO
W25Q32BVSSIG_SO8~D
W25Q32BVSSIG_SO8~D
VCC
/HOLD
8
7
6
CLK
5
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-7731P
LA-7731P
LA-7731P
14 59Thursday, September 01, 2011
14 59Thursday, September 01, 2011
14 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 15
5
Follow DG0.9 Device
D D
down & Express/Mini
card topology
PCIE_PRX_WANTX_N 1<3 4>
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
EXPRESS Card--->
1/2vMINI CARD-3 PCIE
(Mini Card 3)--->
C C
MMI --->
10/100/1G LAN --->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI Card--->
B B
PP (Mini Card 3)--->
Express card--->
WLAN (Mini Card 2)--->
A A
PCIE_PRX_WANTX_P 1<34>
PCIE_PTX_WANRX_N 1<3 4>
PCIE_PTX_WANRX_P 1<34>
PCIE_PRX_WLANTX_ N2<34>
PCIE_PRX_WLANTX_ P2<34>
PCIE_PTX_WLANRX_ N2<34>
PCIE_PTX_WLANRX_ P2<34>
PCIE_PRX_EXPTX_N3<35>
PCIE_PRX_EXPTX_P3<35>
PCIE_PTX_EXPRX_N3<35>
PCIE_PTX_EXPRX_P3<35>
PCIE_PRX_WPANTX _N5<34>
PCIE_PRX_WPANTX _P5<34>
PCIE_PTX_WPANRX _N5<34>
PCIE_PTX_WPANRX _P5<34>
PCIE_PRX_MMITX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_N6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_GLANTX_N7<31>
PCIE_PRX_GLANTX_P7<31>
PCIE_PTX_GLANRX_N7<31>
PCIE_PTX_GLANRX_P7<31>
CLK_PCIE_MINI1#<34>
CLK_PCIE_MINI1<34>
+3.3V_ALW_PCH
MINI1CLK_REQ#<34>
CLK_PCIE_LAN#<31>
CLK_PCIE_LAN<31>
LANCLK_REQ#<31>
CLK_PCIE_MMI#<33>
CLK_PCIE_MMI<33>
+3.3V_RUN
MMICLK_REQ#<33>
CLK_PCIE_MINI3#<34>
CLK_PCIE_MINI3<34>
+3.3V_ALW_PCH
MINI3CLK_REQ#<34>
CLK_PCIE_EXP#< 35>
CLK_PCIE_EXP<35>
+3.3V_ALW_PCH
EXPCLK_REQ#<35>
CLK_PCIE_MINI2#<34>
CLK_PCIE_MINI2<34>
+3.3V_ALW_PCH
MINI2CLK_REQ#<34>
+3.3V_ALW_PCH
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH87 10K_0402_5%~DRH87 10K_0402_ 5%~D
RH152 10K_0402_5%~DRH 152 10K_0402_5%~D
RH94 10K_0402_5%~DRH94 10K_0402_ 5%~D
RH97 10K_0402_5%~DRH97 10K_0402_ 5%~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
5
1 2
1 2
4
12
12
12
12
4
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
PCIE_PTX_WANRX_N 1
PCIE_PTX_WANRX_P 1
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2
PCIE_PTX_WLANRX_ P2
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
PCIE_PTX_WPANRX _N5
PCIE_PTX_WPANRX _P5
PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
MINI1CLK_REQ#
LANCLK_REQ#
MMICLK_REQ#
MINI3CLK_REQ#
EXPCLK_REQ#
MINI2CLK_REQ#
PEG_B_CLKRQ#
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
3
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
PCI_TPM_TCM
JETWAY_14M
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
LAN_SMBCLK
LAN_SMBDATA
PCH_GPIO74
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
PEG_A_CLKRQ#
CLK_CPU_DMI#
CLK_CPU_DMI
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN
XTAL25_OUT
+XCLK_RCOMP
SIO_14M
CLK_80H
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
2
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH <7>
LAN_SMBCLK <31>
LAN_SMBDATA <31 >
SML1_SMBCLK <40>
SML1_SMBDATA <40>
PCH_CL_CLK1 <34>
PCH_CL_DATA1 <34 >
PCH_CL_RST1# <34>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
1 2
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH311 22_0402_5%~DRH311 22_0402_5%~D
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH314 22_0402_5%~DRH314 22_0402_5%~D
RH315 22_0402_5%~D@ RH315 22_0402_5%~D@
12
12
12
12
2
+3.3V_RUN
5
3
QH5B
QH5B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
CLOCK TERMINATION for FCIM and need close to PCH
+1.05V_RUN
CLK_PCI_TPM_TCM <32>
CLK_SIO_14M <39>
1 2
C717 12P_0402_50V8J~DC717 12P_0402_50V8J~D
PCLK_80H <34>
JETWAY_CLK14M <32>
1
QH5A
QH5A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
6 1
4
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
PCH_GPIO74
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
PEG_A_CLKRQ#
LAN_SMBCLK
LAN_SMBDATA
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
DDR_XDP_WAN_ SMBCLK <12,13,27,34>
DDR_XDP_WAN_ SMBDAT <12,13,27,34>
1 2
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
RH300 1K_0402_1%~DRH300 1K_0402_1%~D
RH301 10K_0402_5%~DRH301 10K_0402_5%~D
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
RH304 10K_0402_5%~DRH304 10K_0402_5%~D
RH80 10K_0402_5%~DRH80 10K_0402_5%~D
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
1 2
RH74 10K_0402_5%~DRH74 10K_0402_ 5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_0402_ 5%~D
1 2
RH91 10K_0402_5%~DRH91 10K_0402_ 5%~D
1 2
RH76 10K_0402_5%~DRH76 10K_0402_ 5%~D
1 2
RH77 10K_0402_5%~DRH77 10K_0402_ 5%~D
1 2
RH78 10K_0402_5%~DRH78 10K_0402_ 5%~D
1 2
RH79 10K_0402_5%~DRH79 10K_0402_ 5%~D
1 2
RH183 10K_0402_5%~DRH 183 10K_0402_5%~D
12
RH309 0_0402_5%~DRH309 0_0402_5%~D
12
RH99
RH99
1M_0402_5%~D
1M_0402_5%~D
2
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
CH18
CH18
1
10P_0402_50V8J~D
10P_0402_50V8J~D
3
4
12
12
12
12
12
12
12
12
YH2
YH2
OUT
GND
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_LAN
1
IN
2
GND
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-7731P
LA-7731P
LA-7731P
15 59Thursday, September 01, 2011
15 59Thursday, September 01, 2011
15 59Thursday, September 01, 2011
1
2
CH19
CH19
1
10P_0402_50V8J~D
10P_0402_50V8J~D
0.3
0.3
0.3
Page 16
5
+3.3V_ALW_PCH
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_COMP_R
RBIAS_CPY
SUSACK#_R
XDP_DBRESET#
PM_APWROK_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
PCH_RI#
CLKRUN#
PCH_DPWROK PCH_RSMRST#_Q
ME_SUS_PWR_ACK SUSACK#_R
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
1 2
RH144 10K_0402_5 %~DRH1 44 10K_0402_5%~D
D D
+3.3V_RUN
C C
+1.05V_RUN
1 2
RH111 49.9_0402 _1%~DRH111 49.9_0402_ 1%~D
1 2
RH112 750_0402_ 1%~DRH112 750_0 402_1%~D
SUSACK#<39> PCH_DPWROK <39>
B B
ME_SUS_PWR_ACK<40 >
AC_PRESENT<40>
+3.3V_ALW_PCH
A A
Remove RH116, RH117,
RH118, RH320, RH120,
RH121, RH122 to save room
for D4 12" only
1 2
RH142 10K_0402_5 %~DRH1 42 10K_0402_5%~D
1 2
RH140 10K_0402_5 %~DRH1 40 10K_0402_5%~D
1 2
RH137 8 .2K_0402_5%~DRH137 8 .2K_0402_5%~D
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_P2<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CRX_PTX_P1<6>
DMI_CRX_PTX_P2<6>
DMI_CRX_PTX_P3<6>
1 2
RH114 0_0402_5%~D@ RH114 0_0402_5%~D@
XDP_DBRESET#<7,14>
SYS_PWROK<7,3 9>
RESET_OUT#<40>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q<14, 41>
SIO_PWRBTN#<7 ,14,40>
1 2
RH139 8.2K_0402_5%~DRH1 39 8.2K_0402_5%~D
5
4
1 2
RH113 0_0402_5%~DRH113 0_0402_5%~D
SYS_PWROKRESET_OUT#
1 2
RH321 0_0402_5%~D@ RH321 0_0402_5%~D@
1 2
RH323 0_0402_5%~DRH323 0_0402_5%~D
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
DMI
DMI
System Power Management
System Power Management
FDI_RXP7
FDI
FDI
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
4
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
RH131 150 _0402_1%~DRH131 150_0402_ 1%~D
RH132 150 _0402_1%~DRH132 150_0402_ 1%~D
RH133 150 _0402_1%~DRH133 150_0402_ 1%~D
RH134 100 K_0402_5%~DRH134 100K_0402_5%~D
DSWODVREN - On Die DSW VR Enable
Enabled (DEFAULT)
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
RH127 3 30K_0402_1%~DRH127 330K_ 0402_1%~D
1 2
PCH_PCIE_WAKE# <40>
CLKRUN# <32,39,40>
T56 PAD~DT56 PAD~D
T57 PAD~DT57 PAD~D
T58 PAD~DT58 PAD~D
SIO_SLP_S5# <40>
T59 PAD~DT59 PAD~D
SIO_SLP_S4# <39,42,48>
T60 PAD~DT60 PAD~D
SIO_SLP_S3# <11,35,39,4 2,49>
T61 PAD~DT61 PAD~D
SIO_SLP_A# <39,42,50>
T62 PAD~DT62 PAD~D
SIO_SLP_SUS# <39>
T63 PAD~DT63 PAD~D
SIO_SLP_LAN# < 31,39>
1 2
1 2
1 2
1 2
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
FDI_INT <6 >
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 < 6>
FDI_LSYNC1 < 6>
H_PM_SYNC <7>
3
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
PANEL_BKEN_PCH< 24>
ENVDD_PCH<24,39>
BIA_PWM_PCH<24>
LDDC_CLK_PCH<24>
LDDC_DATA_PCH<24>
Minimum speacing of 20mils for LVD_IBG
+RTC_CELL
PCH_CRT_HSYNC<23 >
PCH_CRT_VSYNC<23>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
RH344 2.3 7K_0402_1%~DRH344 2.3 7K_0402_1%~D
LCD_ACLK-_PCH<24 >
LCD_ACLK+_PCH<24>
LCD_A0-_PCH<24>
LCD_A1-_PCH<24>
LCD_A2-_PCH<24>
LCD_A0+_PCH<24>
LCD_A1+_PCH<24>
LCD_A2+_PCH<24>
PCH_CRT_BLU< 23>
PCH_CRT_GRN<23>
PCH_CRT_RED<23>
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
RH316
RH316
PM_APWROK<40>
PANEL_BKEN_PCH
ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
1 2
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH
LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
RH123 20_0402_1%~DRH123 20_ 0402_1%~D
RH124 20_0402_1%~DRH124 20_ 0402_1%~D
1 2
1 2
RH126
RH126
1K_0402_0.5%~D
1K_0402_0.5%~D
HSYNC
VSYNC
12
2.2K_0402_5%~D
2.2K_0402_5%~D
CRT_IREF
RH317
RH317
SIO_SLP_A#
PM_APWROK
UH4D
UH4D
J47
M45
P45
T40
K47
T45
P39
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
N48
P49
T49
T39
M40
M47
M49
T43
T42
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
2
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
RH118 0_0402_5%~ D@RH118 0_0402_5%~D@
+3.3V_ALW2
1
B
2
A
1 2
5
P
G
3
PCH_CRT_DDC_CLK <23>
PCH_CRT_DDC_DAT <23>
UH5
UH5
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
PM_APWROK_R
4
O
Intel request DDPB can not support eDP
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
2
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
LVDS
LVDS
CRT
CRT
1
+3.3V_RUN
12
12
AP43
AP45
AM42
AM40
AP39
AP40
PCH_SDVO_CTRLCLK
P38
PCH_SDVO_CTRLDATA
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
HDMIB_PCH_HPD <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_P0 <25>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_CLK <25>
PCH_DDPC_CTRLCLK <26>
PCH_DDPC_CTRLDATA <26>
DPC_PCH_DOCK_AUX# <26>
DPC_PCH_DOCK_AUX <26>
DPC_PCH_DOCK_HPD <3 8>
DPC_PCH_LANE_N0 <38>
DPC_PCH_LANE_P0 < 38>
DPC_PCH_LANE_N1 <38>
DPC_PCH_LANE_P1 < 38>
DPC_PCH_LANE_N2 <38>
DPC_PCH_LANE_P2 < 38>
DPC_PCH_LANE_N3 <38>
DPC_PCH_LANE_P3 < 38>
PCH_DDPD_CTRLCLK <26>
PCH_DDPD_CTRLDATA <26>
DPD_PCH_DOCK_AUX# <26>
DPD_PCH_DOCK_AUX <26>
DPD_PCH_DOCK_HPD <3 8>
DPD_PCH_LANE_N0 <38>
DPD_PCH_LANE_P0 < 38>
DPD_PCH_LANE_N1 <38>
DPD_PCH_LANE_P1 < 38>
DPD_PCH_LANE_N2 <38>
DPD_PCH_LANE_P2 < 38>
DPD_PCH_LANE_N3 <38>
DPD_PCH_LANE_P3 < 38>
RH351 2 .2K_0402_5%~DRH351 2 .2K_0402_5%~D
RH352 2 .2K_0402_5%~DRH352 2 .2K_0402_5%~D
PCH_SDVO_CTRLCLK <25>
PCH_SDVO_CTRLDATA <2 5>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-7731P
LA-7731P
LA-7731P
1
16 59Thursday, September 01, 2011
16 59Thursday, September 01, 2011
16 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 17
+3.3V_RUN
5
4
3
2
1
PCH_PLTRST#
5
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
CAM_MIC_CBL_DET#
BT_DET#
PCH_GPIO3
+3.3V_RUN
5
1
P
B
2
A
G
3
CLK_PCI_5048<39>
CLK_PCI_MEC<40>
CLK_PCI_DOCK<38>
CLK_PCI_LOOPBACK<15>
CH102
CH102
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
UH3
UH3
PCH_PLTRST#_EC
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
USB3RN1<36>
USB3RN2<36>
USB3RN4<38>
USB3RP1<36>
USB3RP2<36>
USB3RP4<38>
USB3TN1<36>
USB3TN2<36>
USB3TN4<38>
USB3TP1<36>
USB3TP2<36>
USB3TP4<38>
PCIE_MCARD2_DET#<34>
BT_DET#<41>
LCD_CBL_DET#<24>
CAM_MIC_CBL_DET#<24>
HDD_FALL_INT<27>
PCH_PLTRST#<7,31,32,33>
RH160 22_0402_5%~DRH160 22_0402_5%~D
RH102 22_0402_5%~DRH102 22_0402_5%~D
RH103 22_0402_5%~DRH103 22_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
PCH_PLTRST#_EC <32,34,35,39,40>
12
12
1 2
12
1
CH110
CH110
10P_0402_50V8J~D
10P_0402_50V8J~D
2
4
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
BT_DET#
BBS_BIT1
PCI_GNT3#
LCD_CBL_DET#
PCH_GPIO3
CAM_MIC_CBL_DET#
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048
PCI_MEC
PCI_DOCK
PCI_LOOPBACKOUT
CLK_PCI_MECCLK_PCI_5048
1
CH109
CH109
10P_0402_50V8J~D
10P_0402_50V8J~D
2
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
RSVD
RSVD
USB30
USB30
PCI
PCI
USB
USB
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
Boot BIOS Strap
BBS_BIT1 Boot BIOS Location
*
SATA_SLPD
(BBS_BIT0)
0 0
0 1
1 0
1 1
LPC
Reserved (NAND)
PCI
SPI
3
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USBP0ÂUSBP0+
USBP1ÂUSBP1+
USBP3ÂUSBP3+
USBP4ÂUSBP4+
USBP5ÂUSBP5+
USBP6ÂUSBP6+
USBP7ÂUSBP7+
USBP8ÂUSBP8+
USBP9ÂUSBP9+
USBP10ÂUSBP10+
USBP11ÂUSBP11+
USBP12ÂUSBP12+
USBRBIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
USBP0- <36>
USBP0+ <36>
USBP1- <36>
USBP1+ <36>
USBP3- <38>
USBP3+ <38>
USBP4- <34>
USBP4+ <34>
USBP5- <34>
USBP5+ <34>
USBP6- <34>
USBP6+ <34>
USBP7- <32>
USBP7+ <32>
USBP8- <38>
USBP8+ <38>
USBP9- <37>
USBP9+ <37>
USBP10- <35>
USBP10+ <35>
USBP11- <41>
USBP11+ <41>
USBP12- <24>
USBP12+ <24>
Within 500 mils
1 2
RH151
RH151
22.6_0402_1%~D
22.6_0402_1%~D
USB_OC0# <36>
USB_OC4# <36>
SIO_EXT_SMI# <40>
BBS_BIT1
----->Right Side Top
----->Right Side Bottom
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->Flash
----->USH
----->DOCK
----->Left side E-SATA
----->Express Card
----->Blue Tooth
----->Camera
12
RH342
@RH342
@
1K_0402_1%~D
1K_0402_1%~D
2
INTEL feedback 0307
USB_OC0#
USB_OC1#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
USB_OC2#
RH350 10K _0402_5%~DRH350 10K_0402_5%~D
1 2
RH341 10K _0402_5%~DRH341 10K_0402_5%~D
1 2
RH343 10K _0402_5%~DRH343 10K_0402_5%~D
1 2
RH345 10K _0402_5%~DRH345 10K_0402_5%~D
1 2
RH346 10K _0402_5%~DRH346 10K_0402_5%~D
1 2
RH347 10K _0402_5%~DRH347 10K_0402_5%~D
1 2
RH348 10K _0402_5%~DRH348 10K_0402_5%~D
1 2
RH349 10K _0402_5%~DRH349 10K_0402_5%~D
1 2
+3.3V_ALW_PCH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-7731P
LA-7731P
LA-7731P
17 59Thursday, September 01, 2011
17 59Thursday, September 01, 2011
17 59Thursday, September 01, 2011
1
0.3
0.3
0.3
1 2
D D
C C
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402 _5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402 _5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402 _5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402 _5%~D
1 2
RH332 10K_0402_5%~DRH332 10K_0402 _5%~D
PCI_GNT3#
12
RH333
@RH333
@
1K_0402_1%~D
1K_0402_1%~D
A16 swap overri de Strap/Top-B lock
Swap Override jumper
PCI_GNT#3
B B
Remove RH335,RH336,RH337,RH338
to save room for D12" only
A A
PCH_PLTRST#<7,31,32,33>
Low = A16 swap
High = Default
Page 18
5
4
3
2
1
+3.3V_ALW_PCH
RH53
RH53
4.7K_0402_5%~D
D D
C C
B B
A A
4.7K_0402_5%~D
1 2
SLP_ME_CSW_DE V#
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
+3.3V_ALW_PCH
SIO_EXT_WAKE#
RH177 10K_0402_5%~DRH177 10K_0402 _5%~D
RH354 1K_0402_1%~DRH354 1K _0402_1%~D
+3.3V_ALW_PCH
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
+3.3V_RUN
RH171 10K_0402_5%~D@RH171 10K_0402_5%~D@
RH173 1K_0402_1%~D@RH 173 1K_0402_1%~D@
RH175 10K_0402_5%~DRH175 10K_0402_5%~D
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
1 2
RH178 10K_0402_5%~DRH178 10K_0402_5%~D
1 2
RH269 8.2K_0402_5%~D@ RH269 8.2K_0402_5%~D@
1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D
12
12
12
12
12
12
12
PCH_GPIO15
PCH_GPIO36
12
PCH_GPIO37
12
DBC_ENABLE
12
KB_DET#
PCH_GPIO36
PCH_GPIO37
ESATA_CD#
TEMP_ALERT#
PCH_GPIO22
PCH_GPIO7
DBC_ENABLE
PCH_GPIO6
5
1 2
INTEL feedback 0302
RH174 10K_0402_5%~DRH174 10K_0402 _5%~D
RH172 10K_0402_5%~DRH172 10K_0402 _5%~D
RH273 10K_0402_5%~DRH273 10K_0402 _5%~D
SIO_EXT_SCI#<40>
USH_DET#<32>
SIO_EXT_WAKE#<39>
PM_LANPHY_ENABLE<31>
ESATA_CD#<37>
DBC_ENABLE<24>
PCIE_MCARD1_DET#<34>
EXPRCRD_DET#<35>
SLP_ME_CSW_DE V#<39>
USB_MCARD1_DET#<34>
FFS_INT2<27>
TEMP_ALERT#<39>
KB_DET#<41>
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
+3.3V_RUN
RH267
RH267
10K_0402_5%~D
10K_0402_5%~D
TPM_ID0
1 2
RH270
@ RH270
@
10K_0402_5%~D
10K_0402_5%~D
1 2
USH_DET#
PCH_GPIO6
PCH_GPIO7
PM_LANPHY_ENABLE
PCH_GPIO15
DBC_ENABLE
PCH_GPIO22
EXPRCRD_DET#
SLP_ME_CSW_DE V#
USB_MCARD1_DET#
PCH_GPIO36
PCH_GPIO37
TPM_ID0
TPM_ID1
FFS_INT2
TEMP_ALERT#
KB_DET#
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
+3.3V_RUN
TPM_ID1
4
12
RH268
RH268
20K_0402_5%~D
20K_0402_5%~D
12
RH271
@RH271
@
2.2K_0402_5%~D
2.2K_0402_5%~D
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49 / TEMP_ALERT#
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
GPIO
GPIO
NCTF
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
1 1USH2.0
3
PECI
RCIN#
NC_1
TPM_ID1TPM_ID0
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
CONTACTLESS_DET#
PCH_GPIO69
PCIE_MCARD3_DET#
SIO_A20GATE
SIO_RCIN#
PCH_THRMTRIP#_R
DF_TVS
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
CONTACTLESS_DET# <32>
PCIE_MCARD3_DET# <34>
USB_MCARD2_DET# <34>
SIO_A20GATE <40>
SIO_RCIN# <40>
H_CPUPWRGD <7>
1
2
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
Due to remove VCCDFERM
jumper(PJP66), need to
change the power rail to
+1.8V_RUN for D12" only
H_SNB_IVB#<7>
2
+1.05V_RUN_VTT
12
RH262 56_0402_5%~DRH262 56_0402_5%~D
CH97
CH97
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
RH150 0_0402_5%~DR H150 0_0402_5%~D
CONTACTLESS_DET#
PCH_GPIO69
RH256 10K _0402_5%~DRH256 10K_0402_5%~D
RH260 1.5K_0402 _1%~DRH260 1.5K_0402_1%~D
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
USH_DET#
PLACE RH150 CLO SE TO THE BRAN CHING POINT
( TO CPU and NV RAM CONNECTOR)
+1.8V_RUN
12
RH149
RH149
2.2K_0402_5%~D
2.2K_0402_5%~D
12
1 2
RH158 10K_0402_5%~DRH158 10K_0402 _5%~D
RH203 10K_0402_5%~DRH203 10K_0402 _5%~D
1 2
RH263 10K_0402_5%~DRH263 10K_0402 _5%~D
1 2
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
RH149 need to close to CPU
1 2
RH358 1K_0402_1%~DRH358 1K_0402_1%~D
DMI & FDI Termination Voltage
DF_TVS
Set to Vss when LOW
Set to Vcc when HIGH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-7731P
LA-7731P
LA-7731P
+3.3V_RUN
+3.3V_RUN
12
12
DF_TVSDF_TVS_R
0.3
0.3
18 59Thursday, September 01, 2011
18 59Thursday, September 01, 2011
18 59Thursday, September 01, 2011
1
0.3
Page 19
5
4
3
2
1
LH1 change for CRT ripple
LH1
POWER
+1.05V_RUN
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH30
CH30
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
+1.05V_RUN
CH44
CH44
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH45
CH45
2
+1.05V_RUN
+1.05V_RUN_VTT
D D
remove RH247,CH40 on VCCAPLLEXP
to save room for D12" only
+1.05V_RUN
C C
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH51
CH51
2
B B
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
1
2
+1.05V_+1.5V_1.8V_RUN
CH33
CH33
CH32
CH32
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH46
CH46
CH47
CH47
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH31
CH31
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH48
CH48
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
DMI
DMI
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+VCCADAC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH34
CH34
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH103
CH103
2
1
CH43
CH43
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_+1.5V_1.8V_RUN
1
CH50
CH50
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH52
CH52
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH54
CH54
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH35
CH35
2
1 2
LH1
4.7UH_LQM18FN4R7M00D_20%_0603~D
4.7UH_LQM18FN4R7M00D_20%_0603~D
1
2
+1.8V_RUN_LVDS
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH104
CH104
2
CH49
CH49
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
@CH106
@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
12
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CH36
CH36
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH105
CH105
1
2
+3.3V_RUN
CH106
+1.8V_RUN
Remove RH202,RH204,PJP66 to
save room for D12" only
+3.3V_M
+1.05V_RUN_VTT
+1.05V_RUN
+3.3V_RUN
+3.3V_RUN
LH8
LH8
100NH_HK1608R10J-T_5%_0603~D
100NH_HK1608R10J-T_5%_0603~D
12
0.1uH inductor, 200mA
CPN: SHI0110BJ0L
Remove RH205 to save
room for D12" only
Intel feedback that the Lfilter is
no longer request, just keep Cdecap
+1.8V_RUN
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax
Current (A)
0.001
5
5
0.001
0.001
0.266
0.001
0.08
0.08
1.3
0.042
1.05VccIO 2.925
VccASW
VccSPI
VccDSW3_3 0.003
1.05
3.3
3.3
1.01
0.020
1.8 0.19VCCDFTERM
3.3VccRTC 2 (mA)
3.3VccSus3_3
3.3VccSusHDA
0.119
0.01
VccVRM 1.8 / 1 .5 0.16
1.05VccClkDMI 0.02
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8VccTX_LVDS 0.06
VccAPLLEXP 1.0 5 0. 05
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
12
RH197 0_0603_5%~DRH197 0_0603_5%~D
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/8)
PCH (6/8)
PCH (6/8)
LA-7731P
LA-7731P
LA-7731P
19 59Thursday, September 01, 2011
19 59Thursday, September 01, 2011
19 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 20
5
Remove RH253 to save
room for D12" only
D D
Remove LH3,CH58 on VCCAPLLDMI2
to save room for D12" only
C C
+3.3V_RUN
1 2
RH215 0.022_0805_ 1%RH215 0.022_0805_1%
B B
+1.05V_RUN_VTT
A A
+1.05V_RUN
+1.05V_RUN
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
5
+3.3V_ALW_PCH
RH201 0_0402_5%~DRH201 0_0402_5%~D
1
CH85
CH85
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
LH6
LH6
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
1 2
LH7
LH7
1 2
+1.05V_RUN
+1.05V_M
+3.3V_RUN_VCC_CLKF33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH74
CH74
@
@
CH73
CH73
2
2
1
CH79
CH79
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH96
CH96
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH94
CH94
1
+
+
2
2
1
2
CH86
CH86
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1
CH92
CH92
+
+
2
1
CH55
CH55
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH64
CH64
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH67
CH67
2
2
CH78
CH78
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH81
CH81
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH84
CH84
2
1
CH87
CH87
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH95
CH95
CH93
CH93
1
2
4
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH65
CH65
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH68
CH68
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+VCCSST
+RTC_CELL
1
CH88
CH88
2
4
+VCCDSW3_3
+3.3V_RUN_VCC_CLKF33
CH69
CH69
+VCCRTCEXT
1
1
CH89
CH89
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
UH4J
UH4J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
CH90
CH90
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
3
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
3
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
1
CH56
CH56
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH59
CH59
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+PCH_V5REF_SUS
+PCH_V5REF_RUN
1
2
1
CH91
CH91
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_RUN
+3.3V_ALW_PCH
1
2
CH70
CH70
1U_0603_10V7K~D
1U_0603_10V7K~D
+3.3V_RUN
1
CH76
CH76
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_+1.5V_1.8V_RUN
1
CH82
CH82
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
CH60
CH60
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH66
CH66
2
1
CH72
CH72
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
2
+1.05V_RUN
+3.3V_ALW_PCH
ALW_ON_3.3V#<42>
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
CH75
CH75
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH77
CH77
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+1.05V_M
1
+PWR_SRC_S
12
RH279
RH279
100K_0402_5%~D
100K_0402_5%~D
5V_ALW_PCH_ENAB LE
13
D
D
QH6
QH6
2
G
G
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
CRB 0.7 RH208,RH213 trace width 20mil.
+3.3V_RUN
+1.05V_RUN
remove LH5,CH80 on VCCAPLLSATAto
save room for D12" only
+3.3V_ALW_PCH
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
RH208
RH208
10_0402_1%~D
10_0402_1%~D
RH213
RH213
10_0402_1%~D
10_0402_1%~D
D
D
1 3
QH4
QH4
12
12
S
S
G
G
2
1
2
CH107
CH107
3300P_0402_50V7K~D
3300P_0402_50V7K~D
+3.3V_ALW_PCH+5V_ALW_PC H
DH2
DH2
RB751V40_SC76-2
RB751V40_SC76-2
1 2
+PCH_V5REF_SUS
1
CH63
CH63
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+3.3V_RUN+5V_RUN
DH3
DH3
RB751V40_SC76-2
RB751V40_SC76-2
1 2
+PCH_V5REF_RUN
1
CH71
CH71
1U_0603_10V7K~D
1U_0603_10V7K~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (7/8)
PCH (7/8)
PCH (7/8)
LA-7731P
LA-7731P
LA-7731P
1
+5V_ALW_PCH+5V_ALW
12
1
RH278
RH278
CH98
CH98
2
20K_0402_5%~D
20K_0402_5%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.3
0.3
20 59Thursday, September 01, 2011
20 59Thursday, September 01, 2011
20 59Thursday, September 01, 2011
0.3
Page 21
5
D D
C C
B B
A A
UH4H
UH4H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
2
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8)
PCH (8/8)
PCH (8/8)
LA-7731P
LA-7731P
LA-7731P
21 59Thursday, September 01, 2011
21 59Thursday, September 01, 2011
21 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 22
5
Place under CPU
Place C266 close to the Q12 as possible
C
@
@
D D
100P_0402_50V8J~D
100P_0402_50V8J~D
C C
100P_0402_50V8J~D
100P_0402_50V8J~D
B B
2
C266
C266
1
(1) DP2/DN2 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP4/DN4 for Skin on Q13, place Q13 close to Vcore VR choke.
1
C272
@C272
@
2
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
2
B
B
E
E
Q12
Q12
3 1
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1
E
E
31
@
2
+1.05V_RUN_VTT
H_THERMTRIP#<7>
@
C277
C277
B
B
2
Q13
Q13
C
C
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
1 2
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
C
C
2
B
B
E
E
3 1
Q14
Q14
REM_DIODE1_P_4021
REM_DIODE1_N_4021
REM_DIODE2_P_4021
REM_DIODE2_N_4021
R399
R399
2.2K_0402_5%~D
2.2K_0402_5%~D
2
B
B
Q16
Q16
+3.3V_M
12
C
C
E
E
3 1
R395
R395
8.2K_0402_5%~D
8.2K_0402_5%~D
THERMATRIP2#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C278
C278
1
2
4
+5V_RUN
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C276
C276
C275
C275
1
1
2
+3.3V_RUN
2
place C270/C271 close to U9
+FAN1_VOUT
12
3
JFAN1
CONN@JFAN1
FAN1_DET#
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C219
C219
FAN1_TACH_FB
RB751V40_SC76-2D2RB751V40_SC76-2
D2
CONN@
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_50271-0040N-001
ACES_50271-0040N-001
2
BC_INT#_EMC4021
FAN1_TACH_FB
FAN1_DET#
1
R385 10K_040 2_5%~DR385 10K_0402_5%~D
R426 10K_040 2_5%~DR426 10K_0402_5%~D
R402 10K_040 2_5%~DR402 10K_0402_5%~D
12
12
12
+3.3V_M
Change to EMC4021 for cost saving
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C738
C738
C305
C305
1
1
2
2
+3.3V_M
1 2
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K ~D
C271 2200P_0402_50V7K~DC271 2200P_0402_50V7K ~D
MAX8731_IINP<54>
SMSC request
R404 10K_040 2_5%~DR404 10K_0402_5%~D
PCH_PWRGD#<40>
VDD_PWRGD
1 2
R389 10K_040 2_5%~DR389 10K_0402_5%~D
12
12
1 2
R391 1K_0402_1%~DR391 1K_04 02_1%~D
+RTC_CELL
REM_DIODE1_N_4021
REM_DIODE1_P_4021
REM_DIODE2_N_4021
REM_DIODE2_P_4021
12
R3874.7K_ 0402_5%~D R3874.7K_0402_5%~D
VSET_4021
FAN1_TACH_FB
FAN1_DET#
3V_PWROK#
U9
U9
2
3
6
13
23
24
26
27
30
29
VCP2
31
25
28
10
11
15
12
16
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
EMC4021-1-EZK-TR_QFN32_5X5~D
EMC4021-1-EZK-TR_QFN32_5X5~D
1
C274
C274
2
VDD_H
VDD_H
VDD_L
VDD_PWRGD
DN1/THERM
DP1/VREF_T
DN2/DP4
DP2/DN4
N/C
N/C
VCP
VIN
VSET
TACH/GPIO1
TEST3
GPIO3/PWM/THERMTRIP_SIO
3V_PWROK#
RTC_PWR3V
ATF_INT#/BC_IRQ#
SMDATA/BC_DATA
ADDR_MODE/XEN
THERMTRIP2#
N/C
SYS_SHDN#
POWER_SW#
ACAVAIL_CLR
FAN_OUT
FAN_OUT
SMCLK/BC_CLK
VDD
TEST1
TEST2
VSS
17
18
19
20
21
9
5
4
8
7
1
32
14
22
33
THERMATRIP2#
POWER_SW#
+VCC_4021
+ADDR_XEN
+FAN1_VOUT
1 2
12
R403
R403
10K_0402_5%~D
10K_0402_5%~D
SMSC request
1 2
R390 47K_0402_1%~D@ R390 47K_0402_1%~D@
ACAV_IN <4 0,54,55>
BC_INT#_EMC4021 <40>
BC_CLK_EMC4021 <40>
BC_DAT_EMC4021 <40>
+VCC_4021
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
THERM_STP# <47>
+RTC_CELL
R388
R388
22_0402_5%~D
22_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C273
C273
2
+3.3V_M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C1179
C1179
12
1
2
12
R406
R406
953_0402_1%~D
953_0402_1%~D
VSET_4021
POWER_SW#
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C282
C282
2
U10
U10
4
+RTC_CELL
5
O
3
P
B
A
G
1 2
C281 0.1U_0402_25V6K~DC281 0.1U_0402_25V6K~D
1
2
DOCK_PWR_SW # <40>
POWER_SW_IN# <40>
Rest=953, Tp=88degree
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Thermal Sensor
FAN & Thermal Sensor
FAN & Thermal Sensor
LA-7731P
LA-7731P
LA-7731P
22 59Thursday, September 01, 2011
22 59Thursday, September 01, 2011
22 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 23
2
1
SW for MB/DOCK
+5V_RUN +3.3V_RUN
U18
U18
PCH_CRT_RED<16>
PCH_CRT_GRN<16>
PCH_CRT_BLU<16>
PCH_CRT_HSYNC<16>
PCH_CRT_VSYNC<16>
+3.3V_RUN
12
R556
R556
4.7K_0402_5%~D
4.7K_0402_5%~D
B B
+3.3V_RUN
PCH_CRT_DDC_DAT<16>
PCH_CRT_DDC_CLK<16>
CRT_SWITCH<39>
1
R
2
G
5
B
6
H_SOURCE
7
V_HOURCE
9
SDA_SOURCE
10
SCL_SOURCE
30
SEL
29
TEST
8
Reserved
3
GND
11
GND
28
GND
31
GND
33
GPAD
PI3V713-AZLEX_TQFN32_6X3~D
PI3V713-AZLEX_TQFN32_6X3~D
5V VDD
VDD
VDD
VDD
H1_OUT
V1_OUT
SDA1
SCL1
H2_OUT
V2_OUT
SDA2
SCL2
16
4
23
32
27
R1
25
G1
22
B1
20
18
12
14
26
R2
24
G2
21
B2
19
17
13
15
RED_CRT <45 >
GREEN_CRT <45>
BLUE_CRT <45>
HSYNC_CRT <45>
VSYNC_CRT <45>
DAT_DDC2_CRT <45>
CLK_DDC2_CRT <45>
RED_DOCK <38>
GREEN_DOCK <38>
BLUE_DOCK <38>
HSYNC_DOCK <38>
VSYNC_DOCK <38>
DAT_DDC2_DOCK <38>
CLK_DDC2_DOCK <38>
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
Source
ChanelSEL1/SEL2
0
1
A A
A=B2
MBA=B1
APR/SPR
0.01U_0402_16V7K~D
@C332
@
1
C332
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@C333
@
1
1
C333
C334
C334
2
2
0.1U_0402_25V6K~D
1
1
C335
C335
C336
C336
2
2
+5V_RUN
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C339
C339
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
1
Date: Sheet of
Compal Electronics, Inc.
CRT/Video switch
CRT/Video switch
CRT/Video switch
LA-7731P
LA-7731P
LA-7731P
23 59Thursday, September 01, 2011
23 59Thursday, September 01, 2011
23 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 24
5
JLVDS1
JLVDS1
45
44
43
42
41
D D
C C
AMPHE_G47D4022101EU~D
AMPHE_G47D4022101EU~D
CONN@
CONN@
40
40
G5
39
39
G4
38
38
G3
37
37
G2
36
36
G1
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
BIA_PWM_LVDS DISP_ON
12
R1137
R1137
10K_0402_5%~D
10K_0402_5%~D
DMIC0
DMIC_CLK
USBP12_DÂUSBP12_D+
DISP_ON
LCD_ACLK+_PCH
LCD_ACLK-_PCH
LCD_A2+_PCH
LCD_A2-_PCH
LCD_A1+_PCH
LCD_A1-_PCH
LCD_A0+_PCH
LCD_A0-_PCH
LDDC_DATA_PCH
LDDC_CLK_PCH
1 2
1 2
+CAMERA_VDD
CAM_MIC_CBL_DET# <17>
+BL_PWR_SRC
DBC_ENABLE <18>
1 2
LE92 BLM 18BB221SN1D_2P~DLE92 BLM18BB221SN1D_2 P~D
LCD_A2+_PCH <16>
LCD_A2-_PCH <16>
LCD_A1+_PCH <16>
LCD_A1-_PCH <16>
LCD_A0+_PCH <16>
LCD_A0-_PCH <16>
LDDC_DATA_PCH <16>
LDDC_CLK_PCH <16>
LCD_TST < 39>
+3.3V_RUN
+LCDVDD
D66
D66
RB751V40_SC76-2
RB751V40_SC76-2
D68
D68
RB751V40_SC76-2
RB751V40_SC76-2
BIA_PWM_LVDSBIA_PWM_LVDS_L
4
ESD ask to add D8
3
1
5P_0402_50V8C~D
5P_0402_50V8C~D
5P_0402_50V8C~D
5P_0402_50V8C~D
1
1
@
@
@
@
C56
C56
C57
C57
2
2
LCD_CBL_DET# <17>
100P_0402_50V8J~D
100P_0402_50V8J~D
@D8
@
2
D8
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
LCD_ACLK+_PCH <16>
LCD_ACLK-_PCH <16>
+LCDVDD +3.3V_RUN +BL_PWR_SRC
Close to JLVDS1.3. 4
12
R1138
R1138
100K_0402_5%~D
100K_0402_5%~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1
1
@
@
@
@
CE279
CE279
CE280
CE280
2
2
+3.3V_RUN
Place near to JLVDS1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C298
C298
1
2
1 2
1 2
DMIC0 <29>
DMIC_CLK <29>
1 2
R159 2.2K_0402_5%~DR159 2.2K_ 0402_5%~D
1 2
R160 2.2K_0402_5%~DR160 2.2K_ 0402_5%~D
LDDC_CLK_PCH
LDDC_DATA_PCH
Close to JLVD1.5
D67
D67
RB751V40_SC76-2
RB751V40_SC76-2
D69
D69
RB751V40_SC76-2
RB751V40_SC76-2
3
LCD Power
D6
D6
LCD_VCC_TEST_EN<39>
ENVDD_PCH<16,39>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C243
C243
1
2
PANEL_BKEN_PCH <16>BIA_PWM_PCH <1 6>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
1
C246
C246
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
2
2
3
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
2
1
+LCDVDD
130_0402_1%~D
130_0402_1%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
12
R413
R413
61
Q19A
Q19A
2
EN_LCDPWR
2
Q20
Q20
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
40mil
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C297
C297
2
EN_INVPWR<40>
Q18
Q18
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
+PWR_SRC_S +3.3V_ALW
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R414
R414
5
13
+PWR_SRC
12
R422
R422
100K_0402_5%~D
100K_0402_5%~D
1 2
R423 47K_0402_5%~DR423 47K_0402_5%~D
12
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q19B
Q19B
4
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
4 5
PWR_SRC_ON
EN_INVPWR
+LCDVDD
R412
R412
1M_0402_5%~D
1M_0402_5%~D
12
Q21
Q21
S
S
G
G
3
D
S
S
4 5
G
G
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C293
C293
1
R1632
R1632
2
D
D
6
2
1
Q22
Q22
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
S
D
S
1 3
G
G
2
Panel backlight power control by EC
1
6
2
1
40mil
1
C296
C296
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C292
C292
1
2
+BL_PWR_SRC
FDC654P: P CHANNAL
For Webcam
B B
Q23
+CAMERA_VDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
C299
C299
C300
1
2
A A
C300
1
2
CCD_OFF<39>
CCD_OFF
Q23
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
S
D
S
1 3
G
G
2
L10
@L10
@
DLW21SN121SQ2L_4P~D
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C301
C301
1
2
USBP12+<17>
USBP12-<17>
USBP12- USBP12_D-
DLW21SN121SQ2L_4P~D
1
1
2
4
4
3
1 2
R427 0_0402_5%~DR427 0 _0402_5%~D
1 2
R428 0_0402_5%~DR428 0 _0402_5%~D
USBP12_D+USBP12+
2
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LVDS
LVDS
LVDS
LA-7731P
LA-7731P
LA-7731P
24 59Thursday, September 01, 2011
24 59Thursday, September 01, 2011
24 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 25
2
+5V_RUN
21
1 2
R451 0_0402_5%~DR451 0_0402_5%~D
L19
@L19
TMDSB_PCH_CLK_C
B B
TMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N2_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P0_C
TMDSB_PCH_N0_C
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
+3.3V_RUN
R452 680_0402_5%~DR452 680_0402_5%~D
1 2
R450 680_0402_5%~DR450 680_0402_5%~D
1 2
R448 680_0402_5%~DR448 680_0402_5%~D
1 2
R449 680_0402_5%~DR449 680_0402_5%~D
1 2
R454 680_0402_5%~DR454 680_0402_5%~D
1 2
R453 680_0402_5%~DR453 680_0402_5%~D
1 2
R456 680_0402_5%~DR456 680_0402_5%~D
1 2
R455 680_0402_5%~DR455 680_0402_5%~D
1 2
R458 10K_0402_5%~DR458 10K_0402_5%~D
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
Q26
Q26
S
S
TMDSB_PCH_CLK<16>
TMDSB_PCH_CLK#< 16>
TMDSB_PCH_P0< 16>
TMDSB_PCH_N0<16>
TMDSB_PCH_P1< 16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P2< 16>
TMDSB_PCH_N2<16>
12
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~D
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~D
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V7K~D
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V7K~D
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D
12
12
12
12
12
12
12
TMDSB_PCH_CLK#_C
TMDSB_PCH_P0_C
TMDSB_PCH_N0_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P2_C
TMDSB_PCH_N2_C
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R459 0_0402_5%~DR459 0_0402_5%~D
1 2
R462 0_0402_5%~DR462 0_0402_5%~D
L20
@L20
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R466 0_0402_5%~DR466 0_0402_5%~D
1 2
R468 0_0402_5%~DR468 0_0402_5%~D
L21
@L21
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R469 0_0402_5%~DR469 0_0402_5%~D
1 2
R470 0_0402_5%~DR470 0_0402_5%~D
L22
@L22
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R471 0_0402_5%~DR471 0_0402_5%~D
3
3
2
2
3
3
2
2
3
3
2
2
3
3
2
2
TMDSB_CON_CLK
TMDSB_CON_CLK#
TMDSB_CON_P0
TMDSB_CON_N0
TMDSB_CON_P1
TMDSB_CON_N1
TMDSB_CON_P2
TMDSB_CON_N2
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
C1216
C1216
C1217
C1217
1
1
2
2
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
C1218
C1218
C1219
1
2
1
2
1
2
C1219
1
2
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
C1221
C1221
C1220
C1220
1
2
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
C1222
C1222
C1223
C1223
1
2
+5V_RUN_HDMI
21
+5V_RUN +5V_RUN
1
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
3
D4
D4
NC
NC
+VDISPLAY_VCC
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_10V7K~D
0.5A_15V_SMD1812P050TFF20.5A_15V_SMD1812P050TF
F2
0.1U_0402_10V7K~D
C338
C338
1
1
C337
C337
2
2
JHDMI1
CONN@JHDMI1
HDMI_HPD_SINK
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
HDMI_CEC
TMDSB_CON_CLK#
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_P0
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
19
18
17
16
15
14
13
12
11
10
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKÂCK_shield
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
TYCO_2041343-1~D
TYCO_2041343-1~D
CONN@
GND
GND
GND
GND
23
22
21
20
+3.3V_RUN
D65
@ D65
Q120A
Q120A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC
+3.3V_RUN
A A
HDMI_CEC
R1165 10K_040 2_5%~DR1165 10K_0402_5%~D
12
2
PCH_SDVO_CTRLCLK<16>
PCH_SDVO_CTRLDATA<16>
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
HDMIB_PCH_HPD<16>
5
4
Q120B
Q120B
1M_0402_5%~D
1M_0402_5%~D
1 2
61
PCH_SDVO_CTRLDATA_R
3
+3.3V_RUN
R1168
R1168
G
G
2
HDMI_HPD_SINK
13
D
S
D
S
Q121
Q121
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1 2
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D
1 2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D
1 2
R1128 20K_040 2_5%~DR1128 20K_0402_5%~D
@
12
D70
R1163
R1163
0_0402_5%~D
0_0402_5%~D
1 2
RB751V40_SC76-2
RB751V40_SC76-2
@ D70
@
12
R1164
R1164
0_0402_5%~D
0_0402_5%~D
1 2
RB751V40_SC76-2
RB751V40_SC76-2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
Compal Electronics, Inc.
HDMI port
HDMI port
HDMI port
LA-7731P
LA-7731P
LA-7731P
25 59Thursday, September 01, 2011
25 59Thursday, September 01, 2011
25 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 26
5
4
3
2
1
AUX/DDC SW for DPC to E-DOCK
U20
C357
D D
DPC_PCH_DOCK_AUX< 16>
DPC_DOCK_AUX<38>
DPC_PCH_DOCK_AUX#<16>
DPC_DOCK_AUX#<38>
DPC_CA_DET<38>
C C
C357
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D
DPC_AUX_C
12
DPC_DOCK_AUX
DPC_AUX#_C
12
DPC_DOCK_AUX#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
U20
1
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
12
C365
C365
5NC1
P
A2Y
G
3
14
VCC
13
BE3
12
A3
11
B3
10
BE2
9
A2
8
B2
U21
U21
DPC_CA_DET#DPC_CA_DET
4
TC7SET04FU_SC70-5~D
TC7SET04FU_SC70-5~D
+3.3V_RUN
1 2
C356
C356
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPC_CTRLCLK <16>
PCH_DDPC_CTRLDATA <16>
There is a new die for PI3C3125. Sample availabe on May.
AUX/DDC SW for DPD to E-DOCK
C367
C367
0.1U_0402_10V7K~D
DPD_PCH_DOCK_AUX< 16>
DPD_PCH_DOCK_AUX#<16>
B B
0.1U_0402_10V7K~D
DPD_DOCK_AUX<38>
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D
DPD_DOCK_AUX#<38>
DPD_AUX_C
12
DPD_DOCK_AUX
DPD_AUX#_C
12
DPD_DOCK_AUX#
U23
U23
1
2
3
4
5
6
7
VCC
BE0
BE3
A0
B0
BE1
A1
BE2
B1
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
14
13
12
A3
11
B3
10
9
A2
8
B2
+3.3V_RUN
1 2
C366
C366
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPD_CTRLCLK <16>
PCH_DDPD_CTRLDATA <16>
+5V_RUN
12
C369
C369
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DPD_CA_DET<38>
+3.3V_RUN
1 2
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D
1 2
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D
A A
1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D
1 2
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D
1 2
R491 1M_0 402_5%~DR491 1M_0 402_5%~D
1 2
R492 1M_0 402_5%~DR492 1M_0 402_5%~D
5
PCH_DDPC_CTRLCLK
PCH_DDPC_CTRLDATA
PCH_DDPD_CTRLCLK
PCH_DDPD_CTRLDATA
DPD_CA_DET
DPC_CA_DET
5NC1
U24
U24
P
A2Y
G
3
DPD_CA_DET#DPD_CA_DET
4
TC7SET04FU_SC70-5~D
TC7SET04FU_SC70-5~D
Intel WW18 Strapping option
Intel WW18 Strapping option
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DP125
DP125
DP125
LA-7731P
LA-7731P
LA-7731P
1
26 59Thursday, September 01, 2011
26 59Thursday, September 01, 2011
26 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 27
5
D D
+3.3V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C387
C C
C387
2
2
DDR_XDP_WAN_ SMBDAT<12,13,15,34>
DDR_XDP_WAN_ SMBCLK<12,13,15,34>
Free Fall Sensor
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C388
C388
HDD_FALL_INT< 17>
HDD_FALL_INT
FFS_INT2
4
U88
U88
LNG3DM
LNG3DM
VDD_IO
VDD
INT 1
INT 2
SDO/SA0
SDA / SDI / SDO
SCL/SPC
CS
GND
GND
RES
RES
RES
RES
NC
NC
1
14
11
9
7
6
4
8
LNG3DMTR_LGA16_3X3~D
LNG3DMTR_LGA16_3X3~D
3
+5V_RUN_HDD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
2
C396
C396
C395
C395
2
PSATA_PTX_DRX_P0_C<14>
PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_N0_C<14>
PSATA_PRX_DTX_P0_C<14>
Pleace near HDD CONN
+3.3V_RUN_HDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C402
C402
C399
C399
2
2
Pleace near HDD CONN
10
13
15
16
5
12
2
3
+3.3V_RUN
+5V_RUN
2
C389 0.01U_0402_16V7K~DC389 0.01U_0402_16V7K~D
C390 0.01U_0402_16V7K~DC390 0.01U_0402_16V7K~D
C391 0.01U_0402_16V7K~DC391 0.01U_0402_16V7K~D
C392 0.01U_0402_16V7K~DC392 0.01U_0402_16V7K~D
1 2
PJP64 PAD -OPEN1x1mPJP64 PAD-OPEN1x1m
PJP65 JUM P_43X79PJP65 JUMP_43X79
112
12
12
12
12
+3.3V_RUN_HDD
HDD_DET#<14>
+5V_RUN_HDD
2
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
HDD_DET#
FFS_INT2_Q
1
For HDD Temp.
JSATA1
JSATA1
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
19
20
21
22
Main SATA +5V Default
GND1
Reserved
GND2
GND
12V
GND3
12V
12V
FOX_LD2822F-SAYL6
FOX_LD2822F-SAYL6
CONN@
CONN@
23
24
25
+3.3V_RUN
DDR_XDP_WAN_ SMBDAT
1 2
R501 10K_0402_5%~DR501 10K_0402_5%~D
R502 10K_0402_5%~DR502 10K_0402_5%~D
R503 100K_0402_5%~DR503 100K_0402_5%~D
B B
A A
1 2
1 2
FFS_INT2<18>
DDR_XDP_WAN_ SMBCLK
HDD_FALL_INT
FFS_INT2
2
+3.3V_RUN
12
R508
R508
100K_0402_5%~D
100K_0402_5%~D
61
+5V_RUN
12
R506
@R506
@
100K_0402_5%~D
100K_0402_5%~D
FFS_INT2_Q
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q29B
Q29B
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q29A
Q29A
4
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDD CONNECTOR
HDD CONNECTOR
HDD CONNECTOR
LA-7731P
LA-7731P
LA-7731P
27 59Thursday, September 01, 2011
27 59Thursday, September 01, 2011
27 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 28
5
D D
C C
4
3
2
1
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ODD CONNECTOR
ODD CONNECTOR
ODD CONNECTOR
LA-7731P
LA-7731P
LA-7731P
28 59Thursday, September 01, 2011
28 59Thursday, September 01, 2011
28 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 29
2
Internal Speakers Header
15 mils trace
INT_SPK_L+
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
C973 680 P_0402_50V7K~D@C97 3 680P_0402_50V7K~D@
1
B B
2
Close to U72 pin5 Close to U72 pin6
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
12
R1077
@R10 77
@
47_0402_5%~D
47_0402_5%~D
1
C978
@C978
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
L91 BLM18BD121SN1D_2P~DL91 BLM18BD121SN1D_2P~D
1 2
L92 BLM18BD121SN1D_2P~DL92 BLM18BD121SN1D_2P~D
1 2
L93 BLM18BD121SN1D_2P~DL93 BLM18BD121SN1D_2P~D
1 2
L94 BLM18BD121SN1D_2P~DL94 BLM18BD121SN1D_2P~D
1 2
C975 680 P_0402_50V7K~D@C97 5 680P_0402_50V7K~D@
C974 680 P_0402_50V7K~D@C97 4 680P_0402_50V7K~D@
C976 680 P_0402_50V7K~D@C97 6 680P_0402_50V7K~D@
1
1
1
2
2
2
Place closely to Pin 13.
AUD_SENSE_A
61
2
Q107A
Q107A
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
A A
Place closely to Pin 14
AUD_SENSE_B
+3.3V_RUN
12
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
R1079
R1079
39.2K_0402_1%~D
39.2K_0402_1%~D
R1081
R1081
100K_0402_5%~D
100K_0402_5%~D
2
Q106A
Q106A
DVDD_IO should match
with HDA Bus level
2
3
DE2
PESD5V0U2BT_SOT23-3~D
DE2
PESD5V0U2BT_SOT23-3~D
1
ESD ask to add DE1,DE2
12
R1076
@R1076
@
10_0402_1%~D
10_0402_1%~D
1
C977
@C977
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
12
R1086
R1086
20K_0402_1%~D
20K_0402_1%~D
3
5
Q107B
Q107B
4
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
12
12
R1080
R1080
20K_0402_1%~D
20K_0402_1%~D
3
61
5
Q106B
Q106B
4
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
JSPK1
CONN@JSPK1
INT_SPKL_L+
INT_SPKL_L-
INT_SPKR_R+
INT_SPKR_R-
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
DE1
DE1
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_SDOUT<14>
1
BCLK: Audio serial data bus bi t clock input/output
LRCK: Audio serial data bus word clock input/output
AUD_NB_MUTE#<39>
+3.3V_RUN
R1083
R1083
2.49K_0402_1%~D
2.49K_0402_1%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+3.3V_RUN
1
C980
C980
2
R1078
R1078
2.49K_0402_1%~D
2.49K_0402_1%~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C979
C979
+3.3V_RUN
2
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_SDIN0<14 >
PCH_AZ_CODEC_RST#<14>
1 2
10K_0402_5%~DR1099 10K_0402_5 %~DR1099
+VDDA_AVDD
12
12
R1087
R1087
100K_0402_5%~D
100K_0402_5%~D
AUD_HP_NB_SENSE <39,45>
+VDDA_AVDD
12
12
R1082
R1082
100K_0402_5%~D
100K_0402_5%~D
DOCK_MIC_DET <39>DOCK_HP_DET<39 >
2
CONN@
1
1
2
2
3
3
4
4
5
GND1
6
GND2
ACES_50271-0040N-001
ACES_50271-0040N-001
Place R1096 close to codec
1 2
R1096
R1096
I2S_MCLK I2S_MC LK_R
I2S_BCLK I2S_BCLK_R
I2S_DO
I2S_LRCLK
I2S_DI#
EN_I2S_NB_CODEC#
EMI request to add C984,C985
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C952
C952
2
33_0402_5%~D
33_0402_5%~D
1 2
RE9 0_0402_5%~DRE9 0_0402_5%~D
1 2
RE10 0_0402_5%~DRE10 0_ 0402_5%~D
1 2
Place R1097 close to codec
place at AGND and DGND plane
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PORT B
PORT C
PORT D
PORT E
PORT F
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C953
C953
2
C994
C994
12
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
PCH_AZ_CODEC_RST#
33_0402_5%~DR1097 33_0402_5%~DR1097
1 2
R1661 0_0402_5%~D@ R1661 0_ 0402_5%~D@
1 2
R1660 0_0402_5%~DR1660 0_0402_5 %~D
1 2
CE981
CE981
1 2
CE982
CE982
1 2
CE983
CE983
1 2
CE984
CE984
1 2
CE985
CE985
External MICPORT A
HeadPhone Out
Intel
Internal SPK
DOCK
DOCK
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C954
C954
2
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
Place C994, C952~C957 close to Codec
U72
U72
1
DVDD_CORE
3
DVDD_IO
9
DVDD
6
BITCLK
5
SDATA_OUT
10
SYNC
8
SDATA_IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
7
DVSS
42
PVSS
49
GND
92HD93B2X5NLGXYAX8_QFN48_7 X7~D
92HD93B2X5NLGXYAX8_QFN48_7 X7~D
place at Codec bottom side
PJP62
PJP62
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
SENSE_A
SENSE_B
PORTA_L
PORTA_R
VrefOut_A
PORTB_L
PORTB_R
PORTD_+L
PORTD_-L
PORTD_+R
PORTD_-R
MONO_OUT
PC_BEEP
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
VREFFILT
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
PORT A
PORT B
NA
SPDIFOUT0
2.49K
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC1)
Pull-up to AVDD
place close to pin27 place close to pin38
+VDDA_AVDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
27
AVDD1
38
AVDD2
PVDD
PVDD
CAP+
CAP-
CAP2
Vreg
AVSS1
AVSS
AVSS
V-
+VDDA_PVDD
45
39
AUD_SENSE_A
13
AUD_SENSE_B
14
MIC_IN_L
28
MIC_IN_R
29
+VREFOUT
23
AUD_HP_OUT_L
31
AUD_HP_OUT_R
32
INT_SPK_L+
40
INT_SPK_L-
41
INT_SPK_R+
44
INT_SPK_R-
43
ALC290_VREF
25
AUD_PC_BEEP
12
DMIC_CLK_L
2
4
46
48
36
35
21
22
34
37
26
30
33
1 2
LE3 BLM18BB2 21SN1D_2P~DLE3 BLM 18BB221SN1D_2P~D
1 2
R169 0 _0402_5%~D@ R169 0_0402 _5%~D@
1 2
R1662 0_0402_5%~DR1662 0_0402_5 %~D
1
C962
C962
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
Place C962 close to Codec
2
1 2
R1667 0_0402_5%~DR1667 0_0402_5 %~D
R162, R163, R164, R165,R166 CO-lay with U73
DAI_DI
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C957
C957
2
C1105 0.1U_04 02_25V6K~DC1105 0.1U_ 0402_25V6K~D
C1106 0.1U_04 02_25V6K~DC1106 0.1U_ 0402_25V6K~D
Place LE3 close to codec
Place C963~C966 close to Codec
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
EN_I2S_NB_CODEC#<39>
1
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C955
C955
C956
C956
2
1 2
2.2U_0603_6.3V6K~DC1163 2.2U_0603 _6.3V6K~DC1163
+VREFOUT
1 2
R1143 2.2K_0 402_5%~DR1143 2.2K_0402_5%~D
12
12
COMB_JACK_DET
EN_I2S_NB_CODEC#
1 2
R162 22_040 2_5%~DR162 22_0402_5%~D
1 2
R163 0_04 02_5%~DR163 0_0402_5%~D
1 2
R164 0_04 02_5%~DR164 0_0402_5%~D
1 2
R165 22_040 2_5%~DR165 22_0402_5%~D
DAI_DI <38 >
1
L77
L77
BLM21PG600SN1D_0805~ D
BLM21PG600SN1D_0805~ D
1 2
DMIC_CLK <24>
DMIC0 <24>
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
EN_I2S_NB_CODEC#
1
1
C963
C963
C964
C964
2
2
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1103
C1103
2
1
I2S_BCLK DAI_BCLK#
I2S_LRCLK
I2S_DO
12
R1540
@R1540
@
1K_0402_1%~D
1K_0402_1%~D
+5V_RUN
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C958
C958
2
MIC_IN_R <45>
AUD_HP_OUT_L <45>
AUD_HP_OUT_R <45>
1 2
R1119 100K_0402_5%~DR1119 100K_0402_ 5%~D
1 2
R1120 100K_0402_5%~DR1120 100K_0402_ 5%~D
1 2
R1141 10K_ 0402_5%~D@R11 41 10K_0402_5%~D@
1 2
R1142 10K_ 0402_5%~D@R11 42 10K_0402_5%~D@
20K_0402_1%~D
20K_0402_1%~D
1U_0603_10V7K~D
1U_0603_10V7K~D
12
@
@
R1663
R1663
C965
C965
1 2
R1666 0_0402_5%~DR1666 0_0402_5 %~D
1 2
1U_0402_6.3V6K~D@C1164 1U_0402_6.3V6K~D@ C1164
U73
@U73
@
16
VCC
2
1A
4
2A
6
3A
10
4A
12
5A
14
6A
1
OE1#
15
GND
OE2#
CD74HC366M96_SO16~D
CD74HC366M96_SO16~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
+5V_RUN
0_0805_5%~D
0_0805_5%~D
R1095
R1095
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C959
C959
2
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C966
C966
2
COMB_JACK_DET
1Y#
2Y#
3Y#
4Y#
5Y#
6Y#
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Azalia (HD) Codec
Azalia (HD) Codec
Azalia (HD) Codec
LA-7731P
LA-7731P
LA-7731P
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
1
C961
C961
C960
C960
2
2
ALC290_VREF
12
R1664, C1165, R1665
place close to Combo Jack
3
DAI_LRCK#
5
DAI_DO#
7
DAI_12MHZ#I2S_MCLK
9
11
I2S_DI#
13
R166 0_04 02_5%~DR166 0_0402_5%~D
8
SPKR <14>
BEEP <40>
10K_0402_5%~D
10K_0402_5%~D
@
@
R1664
R1664
1 2
+VREFOUT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
@
@
C1215
C1215
2
12
R1665
@R16 65
@
2.2K_0402_5%~D
2.2K_0402_5%~D
1
C1165
@C11 65
@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
29 59Thursday, September 01, 2011
29 59Thursday, September 01, 2011
29 59Thursday, September 01, 2011
1
2
2.2U_0603_10V6K~D
2.2U_0603_10V6K~D
1
@
@
C1214
C1214
2
MIC_IN_RMIC_IN_RR
DAI_BCLK# <38 >
DAI_LRCK# <38>
DAI_DO# <38>
DAI_12MHZ# <38 >
DAI_DI
1U_0603_10V7K~D
1U_0603_10V7K~D
C1180
C1180
0.3
0.3
0.3
Page 30
5
SW1
SW1
POWER_SW#_M B< 40,41>
D D
D23
@D23
@
3
1
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
4
3
NTC033-XJ1J-X260CM_4P
NTC033-XJ1J-X260CM_4P
POWER & INSTANT ON SWITCH
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
WIRELESS_ON#/OFF<39>
C C
WIRELESS_ON#/OFF
Sniffer Board
+3.3V_ALW
JSNIF1
JSNIF1
1
1
2
2
3
3
4
4
5
GND
6
GND
ACES_51522-00401-001
ACES_51522-00401-001
CONN@
CONN@
4
2
1
3
VOL_UP<40>
D75
D75
1
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
VOL_DOWN<40>
D76
D76
1
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
VOL_MUTE< 40>
2
SW2
SW2
SW3
SW3
SW4
SW4
2
1
2
1
2
1
4
3
2
3
2
3
NTC033-XJ1J-X260CM_4P
NTC033-XJ1J-X260CM_4P
4
3
NTC033-XJ1J-X260CM_4P
NTC033-XJ1J-X260CM_4P
4
3
NTC033-XJ1J-X260CM_4P
NTC033-XJ1J-X260CM_4P
1
Lid board
+3.3V_ALW
C457
@C457
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
B B
A A
LID_CL#<39,43>
1
2
LID_CL#
1
1
2
2
3
3
4
GND
5
GND
ACES_50281-0030N-001
ACES_50281-0030N-001
CONN@
CONN@
JLID1
JLID1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
PWR SW/Sub-board Connector
LA-7731P
LA-7731P
LA-7731P
30 59Thursday, September 01, 2011
30 59Thursday, September 01, 2011
30 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 31
5
+3.3V_LAN
1 2
R545 10K_040 2_5%~D@R 545 10K_0402_5%~D@
1 2
R546 10K_040 2_5%~D@R 546 10K_0402_5%~D@
D D
PM_LANPHY_ENABLE<18>
C C
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
+3.3V_LAN
R549
R549
10K_0402_5%~D
10K_0402_5%~D
1 2
R555 0_0402_5%~DR555 0 _0402_5%~D
R557
@R557
@
10K_0402_5%~D
10K_0402_5%~D
Y3
Y3
25MHZ_18PF_X3G025000DI1H-H~D
25MHZ_18PF_X3G025000DI1H-H~D
1
IN
33P_0402_50V8J~D
33P_0402_50V8J~D
2
2
1
GND
C470
C470
OUT
GND
12
12
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PCIE_PTX_GLANRX_P7<15>
PCIE_PTX_GLANRX_N7<15>
R1144
R1144
0_0402_5%~D
0_0402_5%~D
1 2
3
4
LANCLK_REQ#<15>
PCH_PLTRST#<7,17,32,33>
CLK_PCIE_LAN<15>
CLK_PCIE_LAN#<15>
LAN_SMBCLK<15>
LAN_SMBDATA<15>
33P_0402_50V8J~D
33P_0402_50V8J~D
2
C471
C471
1
1 2
R1187 0_0402_5%~DR 1187 0_0402_5%~D
12
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~D
12
C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~D
1 2
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~D
R551 0_0402_5%~DR551 0_0402_5%~D
1 2
1 2
R552 0_0402_5%~DR552 0_0402_5%~D
SMBus Device Address 0xC8
LAN_DISABLE#_R<39>
T142 PAD~DT142 PAD~D
T143 PAD~DT143 PAD~D
1K_0402_1%~D
1K_0402_1%~D
12
R561
R561
4
+3.3V_RUN
12
R547
R547
10K_0402_5%~D
10K_0402_5%~D
LANCLK_REQ#_R
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
PCIE_PTX_GLANRX_P7_C
PCIE_PTX_GLANRX_N7_C
LAN_SMBCLK_R
LAN_SMBDATA_R
LAN_DISABLE#_R
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
XTALO
XTALI
LAN_TEST_EN
RES_BIAS
3.01K_0402_1%~D
3.01K_0402_1%~D
12
R562
R562
U31
U31
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
MDI
MDI
PCIE
PCIE
RSVD_VCC3P3_1
RSVD_VCC3P3_2
SMBUS
SMBUS
VDD3P3_OUT
JTAG LED
JTAG LED
82579_QFN48_6X6~D
82579_QFN48_6X6~D
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI_PLUS2
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
RSVD_NC
VDD3P3_IN
VDD3P3_15
VDD3P3_19
VDD3P3_29
VDD1P0_47
VDD1P0_46
VDD1P0_37
VDD1P0_43
VDD1P0_11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
13
14
17
18
20
21
23
24
6
+RSVD_VCC3P3_1
1
+RSVD_VCC3P3_2
2
5
4
15
19
29
47
46
37
43
11
40
22
16
8
REGCTL_PNP10
7
49
3
LAN_TX0+
LAN_TX0-
LAN_TX1+
LAN_TX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
+3.3V_LAN_OUT
+1.0V_LAN
12
12
1
C464
C464
1U_0603_10V7K~D
1U_0603_10V7K~D
2
2
REGCTL_PNP10
+3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C466
C466
2
2
Note:
+1.0V_LAN will work at 0.95V to 1.15V
L29
L29
1 2
4.7UH_CBC2012T4R7M_20%~D
4.7UH_CBC2012T4R7M_20%~D
Idc max=330mA
+1.0V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C467
C467
C468
C468
2
1
+1.0V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C463
C463
C462
C462
1
1
2
2
Place C462, C46 3 and L29 clos e to U31
+3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1177
C1177
1
1
C469
C469
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1178
C1178
1
2
Place C1178 clo se to pin5
+1.0V_LAN POWER OPTIONS
Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3
+3.3V_LAN
B B
1 2
L30 12NH_06 03CS-120EJTS_5%~DL30 12NH_0603CS-120EJTS_5%~D
1 2
L31 12NH_06 03CS-120EJTS_5%~DL31 12NH_0603CS-120EJTS_5%~D
LAN_TX1+
1 2
L33 12NH_06 03CS-120EJTS_5%~DL33 12NH_0603CS-120EJTS_5%~D
LAN_TX1-
1 2
L32 12NH_06 03CS-120EJTS_5%~DL32 12NH_0603CS-120EJTS_5%~D
1 2
L34 12NH_06 03CS-120EJTS_5%~DL34 12NH_0603CS-120EJTS_5%~D
LAN_TX2-
1 2
L35 12NH_06 03CS-120EJTS_5%~DL35 12NH_0603CS-120EJTS_5%~D
1 2
L36 12NH_06 03CS-120EJTS_5%~DL36 12NH_0603CS-120EJTS_5%~D
LAN_TX3-
1 2
L37 12NH_06 03CS-120EJTS_5%~DL37 12NH_0603CS-120EJTS_5%~D
DOCKED
DOCKED<39>
A A
Layout Notice : Place bead as
close PI3L500 as possible
FROM NIC DOCKED
5
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C473
C473
C472
C472
2
2
LAN_TX0+RLAN_TX0+
LAN_TX0-RLAN _TX0-
LAN_TX1+R
LAN_TX1-R
LAN_TX2+RLAN_TX2+
LAN_TX2-R
LAN_TX3+RLAN_TX3+
LAN_TX3-R
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
1: TO DOCK
0: TO RJ45
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C474
C474
2
39
U32
U32
2
A0+
3
A0-
6
A1+
7
A1-
9
A2+
10
A2-
11
A3+
12
A3-
13
SEL
15
LEDA0
16
LEDA1
42
LEDA2
5
PD
43
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
PI3L720ZHEX_TQFN42_9X3P5~D
R1200 Resistor Value:
3.01 kohm for Hanksville-M LOM
2.37 kohm for Hanksville-D LOM
LAN ANALOG
SWITCH
38
B0+
VDD1VDD4VDD8VDD14VDD21VDD30VDD
37
B0-
34
B1+
33
B1-
29
B2+
28
B2-
25
B3+
24
B3-
17
LEDB0
18
LEDB1
41
LEDB2
36
C0+
35
C0-
32
C1+
31
C1-
27
C2+
26
C2-
23
C3+
22
C3-
19
LEDC0
20
LEDC1
40
LEDC2
4
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
SW_LAN_TX0+ <44>
SW_LAN_TX0- <44>
SW_LAN_TX1+ <44>
SW_LAN_TX1- <44>
SW_LAN_TX2+ <44>
SW_LAN_TX2- <44>
SW_LAN_TX3+ <44>
SW_LAN_TX3- <44>
LAN_ACTLED_YEL# <44>
LED_100_ORG# <44>
LED_10_GRN# <44>
DOCK_LOM_TRD0+ <38>
DOCK_LOM_TRD0- <38>
DOCK_LOM_TRD1+ <38>
DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2+ <38>
DOCK_LOM_TRD2- <38>
DOCK_LOM_TRD3+ <38>
DOCK_LOM_TRD3- <38>
DOCK_LOM_ACTLED_YEL# <38>
DOCK_LOM_SPD100LED_ORG# <38>
DOCK_LOM_SPD10LED_GRN# <38>
TO
DOCK
3
Shared with PCH
1.05V SVR
STUFF: R548
NO STUFF: L29
Internal SRV
*
STUFF: L29
NO STUFF: R548
SIO_SLP_LAN#<16,39>
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
2
+3.3V_ALW2
12
61
2
+3.3V_LAN
1
B
2
A
+PWR_SRC_S
R565
R565
100K_0402_5%~D
100K_0402_5%~D
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q35A
Q35A
C478
C478
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
5
P
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
U15
U15
Q34
12
R564
R564
100K_0402_5%~D
100K_0402_5%~D
ENAB_3VLAN
1M_0402_5%~D
1M_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
WLAN_LAN_DISB# <39>
12
R1638
R1638
Q35B
Q35B
Q34
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C477
C477
2
+3.3V_LAN+3.3V_ALW
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C475
C475
2
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
LA-7731P
LA-7731P
LA-7731P
31 59Thursday, September 01, 2011
31 59Thursday, September 01, 2011
31 59Thursday, September 01, 2011
1
C476
C476
0.3
0.3
0.3
Page 32
5
4
3
2
1
+3.3V_SUS
+3.3V_SUS
1
2
USH_SMBCLK
USH_SMBDAT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C53
C53
+5V_RUN
+3.3V_RUN
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
USBP7-<17>
USBP7+<17>
USH_SMBCLK<40>
USH_SMBDAT<40>
BCM5882_ALERT#<39>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C51
C51
C52
C52
BT_COEX_STATUS2< 41>
BT_PRI_STATUS<41>
PCH_PLTRST#<7,17,31,33>
USH_PWR_STATE #<39>
CONTACTLESS_DET#<18>
USH_DET#<18>
1 2
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D
1 2
+3.3V_RUN
D D
C C
1 2
R873 0_0402_5%~DR873 0_0402_5%~D
+3.3V_SB3V
CLK_PCI_TPM_TCM
12
RE5
RE5
33_0402_5%~D
33_0402_5%~D
1
CE3
CE3
12P_0402_50V8J~D
12P_0402_50V8J~D
2
+3.3V_SB3V
4700P_0402_25V7K~D
4700P_0402_25V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C45
C45
C44
C44
2
2
SP_TPM_LPC_EN<39>
LPC_LAD0<14,34,39,40>
LPC_LAD1<14,34,39,40>
LPC_LAD2<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLK_PCI_TPM_TCM< 15>
LPC_LFRAME#<14,34,39,40>
PCH_PLTRST#_EC<17,34,35,39,40>
IRQ_SERIRQ<14,39,40>
CLKRUN#<16,39,40>
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_TPM_TCM
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
TCM_BA1
ATMEL TPM for E4
U39
U39
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A14-AB_TSSOP28
AT97SC3204-X2A14-AB_TSSOP28
VCC_0
VCC_1
VCC_2
V_BAT
NBO_13
NBO_14
GPIO6
TESTBI
TESTI
NC_7
GND_4
GND_11
GND_18
GND_25
10
19
24
12
13
14
6
9
8
7
4
11
18
25
+3.3V_RUN
JETWAY_CLK14M
NC_P
1 2
C554 1U_0402_6.3V6K~DC554 1U_0402_6.3V6K~D
TCM_BA0
PP
1 2
R656 4.7K_0402_5%~D@R 656 4.7K_0402_5%~D@
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
C550
C550
C551
C551
2
2
JETWAY_CLK14M <15>
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
C553
C553
C552
C552
2
2
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D
USH board conn
JUSH1
JUSH1
22
GND
21
GND
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1M_0402_5%~D
1M_0402_5%~D
12
R1653
R1653
1
ACES_51522-02001-001
ACES_51522-02001-001
CONN@
CONN@
Co-lay U37 and U39
LPC layout: Place TCM first and then end LPC with TPM.
China TCM: NationZ & Jetway co-lay
VDD_0
VDD_1
VDD_2
NC_5
NC_12
NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
10
19
24
11
18
25
4
5
12
13
1
2
6
8
14
+3.3V_RUN
JETWAY_CLK14M
NC_P
+3.3V_SB3V
JETWAY_CLK14MCLK_PCI_TPM_TCM
12
@
@
RE6
RE6
33_0402_5%~D
33_0402_5%~D
1
@
@
CE4
CE4
27P_0402_50V8J~D
27P_0402_50V8J~D
2
LOW:Power Down Mode
High:Working Mode
SP_TPM_LPC_EN
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
PP
TCM_BA1
TCM_BA0
R657
@R657
@
10K_0402_5%~D
10K_0402_5%~D
R659
R659
10K_0402_5%~D
10K_0402_5%~D
+3.3V_RUN
12
12
12
R658
@R658
@
10K_0402_5%~D
10K_0402_5%~D
12
R660
R660
10K_0402_5%~D
10K_0402_5%~D
TCM_BA0
TCM_BA1
B B
U37
@ U37
@
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
GND_11
GND_18
GND_25
GND_4
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
TPM/TCM
TPM/TCM
TPM/TCM
LA-7731P
LA-7731P
LA-7731P
32 59Thursday, September 01, 2011
32 59Thursday, September 01, 2011
32 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 33
5
D D
+1.5V_RUN
+PE_VDDH
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C578
C578
C574
C574
2
2
C C
place close to pin U38.32
L47
L47
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C561
C561
2
CLK_PCIE_MMI<15>
CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>
PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_P6<15>
PCIE_PTX_MMIRX_N6<15>
PCH_PLTRST#<7,17,31,32>
MMICLK_REQ#<15>
4
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C562
C562
2
L45
L45
BLM18PG471SN1D_2P~D
BLM18PG471SN1D_2P~D
1 2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_ 10V7K~D
1 2
C573 0.1U_0402_10V7K~DC573 0.1U_0402_ 10V7K~D
1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_ 10V7K~D
1 2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_ 10V7K~D
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
1 2
L44 BLM18BD601SN1D_0603~DL44 BLM18BD601SN1D_0603~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C577
C577
C576
C576
C575
C575
2
2
+3.3VDDH
+VDDH_SD
+PE_VDDH
+PE_VDDH
12
C579 4.7U_0603_6.3V6K~DC579 4.7U_0603_6.3V6K~D
PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
1 2
R677 191_0402_1%~DR677 191_0402_1%~D
U38
U38
16
3.3VDDH
9
VDDH
32
PE_VDDH
2
PE_REFCLKP
1
PE_REFCLKM
6
PE_TXP
7
PE_TXM
5
PE_RXP
4
PE_RXM
3
PE_REXT
33
GPAD
13
PE_RST#
14
MULTI-IO1
31
MULTI-IO2
OZ600FJ0LN_QFN32_5X5~D
OZ600FJ0LN_QFN32_5X5~D
3
DVDD
AVDD
SKT_VCC
MMI_VCC_OUT
SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7
MS_CD#
SD_CMD/MS_BS
MMI_CLK
SD_CD#
SD_WPI
+OZ_DVDD
10
+OZ_AVDD
8
+SKT_VCC
17
15
SD/MMCDAT1_R
28
SD/MMCDAT2_R
26
SD/MMCDAT0_R
29
27
25
SD/MMCDAT3_R
24
SD/MMCDAT4_R
23
SD/MMCDAT5_R
22
SD/MMCDAT6_R
21
20
11
SD/MMCCMD_R
19
18
SD/MMCCD#
12
SDWP
30
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C563
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C565
C565
2
2
R663 33_0402_5%~DR663 33_0402_5%~D
1 2
R664 33_0402_5%~DR664 33_0402_5%~D
1 2
R665 33_0402_5%~DR665 33_0402_5%~D
1 2
R668 33_0402_5%~DR668 33_0402_5%~D
1 2
R669 33_0402_5%~DR669 33_0402_5%~D
1 2
R670 33_0402_5%~DR670 33_0402_5%~D
1 2
R672 33_0402_5%~DR672 33_0402_5%~D
1 2
R673 33_0402_5%~DR673 33_0402_5%~D
1 2
R674 33_0402_5%~DR674 33_0402_5%~D
1 2
1 2
R676 33_0402_5%~DR676 33_0402_5%~D
C563
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C566
C566
2
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C564
C564
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7S D/MMCDAT7_R
SD/MMCCMD
SD/MMCCLKSD/MMCCLK_R
1
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C560
C560
C559
C559
2
2
+3.3V_RUN_CARD
+3.3V_RUN_CARD
JSD1
JSD1
9
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
10K_0402_5%~D
10K_0402_5%~D
1
B B
2
12
1
C571
C571
C572
C572
R826
R826
2
EMI request
SD/MMCCLK
1
CE758
@CE758
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
A A
SD/MMCCLK
@
@
RE678
RE678
22_0402_5%~D
22_0402_5%~D
1 2
1
CE757
@CE757
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
SD/MMCCMD
SD/MMCCLK
SDWP
SD/MMCCD#
SD/MMCDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
VCC/VDD/SD4
12
CMD/SD2
8
CLK/SD5
1
WP SW_TAISOL/SD
2
CD SW_TAISOL/SD
4
DAT0/SD7
3
DAT1/SD8
15
DAT2/SD9
14
DAT3/SD1
13
DAT4/MMC10
11
DAT5/MMC11
7
DAT6/MMC12
5
DAT7/MMC13
10
VSS1/SD3
6
GND/VSS2/SD6
16
CD&WPSW /GND
17
CD&WPSW /GND
T-SOL_156-4000000605_RV
T-SOL_156-4000000605_RV
CONN@
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Card Reader
Card Reader
Card Reader
LA-7731P
LA-7731P
LA-7731P
33 59Thursday, September 01, 2011
33 59Thursday, September 01, 2011
33 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 34
5
USB_MCARD2_DET#
PCIE_MCARD2_DET#_R
D D
PCIE_PTX_WANRX_N 1<15>
PCIE_PTX_WANRX_P 1<15>
+1.5V_RUN
C C
+3.3V_PCIE_WWAN
B B
MINI1CLK_REQ#<15>
CLK_PCIE_MINI1#<15>
CLK_PCIE_MINI1<15>
PCIE_PRX_WANTX_N 1<1 5>
PCIE_PRX_WANTX_P 1<15>
PCIE_MCARD2_DET#<17>
33P_0402_50V8J~D
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C593
C593
2
2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C610
C610
2
2
R694 100K_0402_5%~DR694 100K_0402_5%~D
R695 10K_0402_5%~DR695 10K_0402_5%~D
PCIE_WAKE#<35,40>
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
R725 0_0402_5%~DR725 0 _0402_5%~D
C594
C594
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C611
C611
C612
C612
2
SIM Card Push-Push
12
+3.3V_PCIE_WWAN
12
PCIE_WAKE#
MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
PCIE_PTX_WANRX_N 1_C
1 2
PCIE_PTX_WANRX_P 1_C
1 2
1 2
HW_GPS_DISABLE2#<39>
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
1
C613
C613
2
2
+3.3V_RUN
DDR_XDP_WAN_ SMBCLK<12,13,15,27>
DDR_XDP_WAN_ SMBDAT<12,13,15,27>
Mini WWAN/GPS/LTE/UWB H=5.2
PCIE_MCARD2_DET#_R
33P_0402_50V8J~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
1
+
+
C614
C614
C615
C615
2
CONN@
CONN@
JMINI1
JMINI1
1
1
3
3
5
5
7
7
9
9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
GND153GND2
BELLW_80003-1121
BELLW_80003-1121
LED_WWAN _OUT#
PWR
Rail
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
2
2
4
4
6
6
8
8
10
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
+3.3V
+3.3Vaux
+1.5V
+SIM_PWR
UIM_RESET
UIM_CLK
33P_0402_50V8J~D
33P_0402_50V8J~D
@C628
@
1
1
C616
C616
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
A A
2
C628
2
JSIM1
JSIM1
1
2
3
4
SUYIN_254070FB008S205ZL
SUYIN_254070FB008S205ZL
33P_0402_50V8J~D
33P_0402_50V8J~D
@C629
@
1
C629
2
VCC
RST
CLK
NC
GND
VPP
GND
GND
5
UIM_VPP
6
UIM_DATA
7
I/O
8
NC
9
10
33P_0402_50V8J~D
33P_0402_50V8J~D
@C630
@
1
C630
2
4
R1157 0_0402_5%~DR1157 0_0402_5%~D
R1158 0_0402_5%~DR1158 0_0402_5%~D
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
1 2
WWAN_SM BCLK
WWAN_SM BDAT
USBP5ÂUSBP5+
USB_MCARD2_DET#
LED_WWAN _OUT#L ED_WWAN_OUT#
+3.3V_PCIE_WWAN
R719
R719
G
G
2
1 2
100K_0402_5%~D
100K_0402_5%~D
S
S
Q77
Q77
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Voltage
Tolerance
+-9%
+-9%
+-5%
33P_0402_50V8J~D
33P_0402_50V8J~D
@C631
@
1
C631
2
+3.3V_PCIE_WWAN
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
@R1160
@
@R1159
@
12
12
R1160
R1159
12
12
R704
R704
0_0402_5%~D
0_0402_5%~D
R697 0_0402_5%~D@ R697 0_0402_5%~D@
13
D
D
WWAN_SM BCLK
WWAN_SM BDAT
+1.5V_RUN
+SIM_PWR
WWAN_RA DIO_DIS# <39>
PCH_PLTRST#_EC <17,32,35,39,40>
USBP5- <17>
USBP5+ <17>
USB_MCARD2_DET# <18>
PCIE_MCARD2_DET#USB_MCARD2_DET#
1 2
WIRELESS_LED# <39,43>
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250 (Wake enable)
250
5 (Not wake enable)
375
NA
3
WLAN_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<41>
COEX1_BT_ACTIVE<41>
COEX2_WLAN_ACTIVE
C600
@C600
@
33P_0402_50V8J~D
33P_0402_50V8J~D
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C601
C601
2
2
PCIE_PTX_WPANRX _N5<15>
PCIE_PTX_WPANRX _P5<15>
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C619
C619
2
2
PCIE_PTX_WLANRX_ N2<15>
PCIE_PTX_WLANRX_ P2<15>
1
PCH_CL_RST1#<15>
2
+3.3V_WLAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@ C603
@
1
C603
C602
C602
2
COEX2_WLAN_ACTIVE
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15>
CLK_PCIE_MINI3<15>
PCIE_PRX_WPANTX _N5<15>
PCIE_PRX_WPANTX _P5<15>
PCIE_MCARD3_DET#<18>
+3.3V_RUN
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@ C621
@
1
C621
C620
C620
2
1 2
R693 0_0402_5%~D@ R693 0_0402_5%~D@
1 2
D31
D31
RB751V40_SC76-2
RB751V40_SC76-2
PCIE_WAKE#<35,40>
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
MINI2CLK_REQ#<15>
CLK_PCIE_MINI2#<15>
CLK_PCIE_MINI2<15>
HOST_DEBUG_RX<40>
MSCLK<40>
PCIE_PRX_WLANTX_ N2<15>
PCIE_PRX_WLANTX_ P2<15>
PCIE_MCARD1_DET#<18>
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C604
C604
2
PCH_CL_CLK1<15>
PCH_CL_DATA1<15>
R707 0_0402_5%~DR707 0 _0402_5%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1
C605
C605
1
2
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
1 2
1 2
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1/2 Minicard Flash Card H=4
R709 0_0402_5%~DR709 0 _0402_5%~D
MINI3CLK_REQ#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
PCH_PLTRST#_EC
PCLK_80H<15>
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
2
PCLK_80H
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D
C622
C622
PCIE_PTX_WPANRX _N5_C
1 2
PCIE_PTX_WPANRX _P5_C
1 2
1 2
R711 100K_0402_5%~DR711 100K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1
C623
C623
1
2
WLAN_RADIO_DIS#_R
PCIE_WAKE#
1 2
R700 0_0402_5%~DR700 0 _0402_5%~D
1 2
R702 0_0402_5%~DR702 0 _0402_5%~D
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2_C
PCIE_PTX_WLANRX_ P2_C
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
1
C606
C606
C607
C607
1
2
PCIE_WAKE#
1 2
PCIE_MCARD3_DET#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
1
C625
C625
C624
C624
1
2
2
Mini WLAN/WIMAX H=4
check
C608
C608
C626
C626
+3.3V_WLAN
1
3
5
7
9
BELLW_80003-1121
BELLW_80003-1121
CONN@
CONN@
JMINI2
JMINI2
1
1
3
3
5
5
7
7
9
9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
GND153GND2
BELLW_80003-1121
BELLW_80003-1121
WIMAX_LED#
WLAN_LED#
CONN@
CONN@
JMINI3
JMINI3
1
3
5
7
9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
GND153GND2
+3.3V_WLAN
+1.5V_RUN
2
2
4
4
6
6
8
8
10
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
R705
R705
R718
R718
1 2
1 2
100K_0402_5%~D
100K_0402_5%~D
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
2
2
4
4
6
6
8
10
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
R710 0_0402_5%~DR710 0_0402_5%~D
USBP6ÂUSBP6+
USB_MCARD3_DET#
1
PCIE_MCARD1_DET#
1 2
R698 0_0402_5%~D@ R698 0_0402_5%~D@
PCIE_MCARD1_DET#
USB_MCARD1_DET#
MSDATA
WLAN_RADIO_DIS#_R
R703 0_0402_5%~DR703 0_0402_5%~D
USBP4ÂUSBP4+PCIE_MCARD1_DET#
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#
1 2
R706 0_0402_5%~D@R706 0_0402_5%~D@
WIMAX_LED# STUDY FOR DEBUG
100K_0402_5%~D
100K_0402_5%~D
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q124A
Q124A
USB_MCARD3_DET# PC IE_MCARD3_DET#
+1.5V_RUN
PCH_PLTRST#_EC
12
R712 100K_0402_5%~D@R712 100K_0402_5%~D@
WPAN Noise
USB_MCARD3_DET#
1
@C627
@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1 2
R692 100K_0402_5%~DR692 100K_0402_5%~D
PCIE_MCARD1_DET#USB_MCARD1_DET#
1 2
R699 100K_0402_5%~D@R699 100K_0402_5%~D@
1 2
R701 100K_0402_5%~DR701 100K_0402_5%~D
1 2
C595 4700P_0402_25V7K~DC595 4700P_ 0402_25V7K~D
PCH_PLTRST#_EC
12
MSDATA
+3.3V_WLAN
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
Q124B
Q124B
1 2
R708 0_0402_5%~D@R708 0_0402_5%~D@
LPC_LFRAME# <14,32,39,40>
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
LPC_LAD1 <14,32,39,40>
LPC_LAD0 <14,32,39,40>
USBP6- <17>
USBP6+ <17>
12
C627
+3.3V_ALW_PCH
+3.3V_RUN
HOST_DEBUG_TX <40>
USBP4- <17>
USBP4+ <17>
USB_MCARD1_DET# <18>
MSDATA <40>
WIRELESS_LED#WIRELESS_LED#
just reserve
+3.3V_ALW_PCH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Mini Card
Mini Card
Mini Card
LA-7731P
LA-7731P
LA-7731P
34 59Thursday, September 01, 2011
34 59Thursday, September 01, 2011
34 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 35
5
4
3
2
1
Power Control for Mini card1
Q38
D D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
AUX_EN_WOW L<39>
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_WW AN_PWREN<39>
B B
+3.3V_ALW
Q39A
Q39A
2
12
R716
R716
100K_0402_5%~D
100K_0402_5%~D
Power Control for Mini card2
Q41A
Q41A
12
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
R713
R713
5
61
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R721
R721
MCARD_WW AN_PWREN#
61
2
R726
R726
100K_0402_5%~D
100K_0402_5%~D
6
12
R714
R714
2
1
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q39B
Q39B
4
Q38
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
45
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1620
R1620
+PWR_SRC_S
5
1
2
100K_0402_5%~D
100K_0402_5%~D
12
R722
R722
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q41B
Q41B
4
+3.3V_WLAN+3.3V_ALW
12
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C632
C632
+3.3V_PCIE_WWAN+3.3V_ALW
Q40
Q40
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
4700P_0402_25V7K~D
1M_0402_5%~D
1M_0402_5%~D
12
4700P_0402_25V7K~D
1
R1625
R1625
C644
C644
2
R715
R715
20K_0402_5%~D
20K_0402_5%~D
12
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q73
Q73
S
S
R723
R723
1K_0402_1%~D
1K_0402_1%~D
MCARD_WW AN_PWREN#
2
G
G
SIO_SLP_S3#<11,16,39,42,49>
RUN_ON<39,42,49>
PCH_PLTRST#_EC<17,32,34,39,40>
+1.5V_RUN
+3.3V_RUN +3.3V_CARD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C635
C635
2
1 2
R734 0_0402_5%~DR734 0_0402_5%~D
1 2
R717 0_0402_5%~D@ R717 0_0402_5%~D@
+3.3V_RUN
+3.3V_CARD
+1.5V_CARD
+1.5V_RUN
Swap L49 signal for layout
USBP10-<17>
USBP10+<17>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
1
C634
C634
2
EXPRCRD_STBY_R#
Note: Add connection on pin4, pin5, pin 13
and pin14 to support GMT 2nd source part
Power Control for Mini card3
+3.3V_ALW +3.3V_PC IE_FLASH
+3.3V_ALW
Q43A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_MISC_PW REN<39>
A A
Q43A
2
12
R733
R733
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R728
R728
61
100K_0402_5%~D
12
R729
R729
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q43B
Q43B
5
4
Q42
Q42
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1628
R1628
0.1U_0402_25V6K~D
1
2
0.1U_0402_25V6K~D
+3.3V_CARD
C646
C646
+3.3V_CARDAUX
12
R730
R730
20K_0402_5%~D
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
C650
C650
2
20K_0402_5%~D
Express Card PWR S/W
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C633
C633
U41
U41
17
12
20
1
6
19
4
5
13
14
16
TPS2231MRGPR-2_QFN20_4X4~D
TPS2231MRGPR-2_QFN20_4X4~D
AUXOUT
AUXIN
3.3VIN23.3VOUT
1.5VOUT
1.5VIN
SHDN#
STBY#
SYSRST#
OC#
NC
NC
NC
NC
NC
PERST#
CPPE#
CPUSB#
RCLKEN
GND
PAD
Express Card Conn.
EXPRCRD_DET#<18>
1 2
R724 0_0402_5%~D@R724 0_0402_5%~D@
1 2
R727 0_0402_5%~D@R727 0_0402_5%~D@
L49
L49
4
4
1
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
3
3
2
2
CARD_SMBCLK<40>
CARD_SMBDAT<40>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C649
C649
2
CLK_PCIE_EXP#<15>
CLK_PCIE_EXP<15>
PCIE_PRX_EXPTX_N3<15>
PCIE_PRX_EXPTX_P3<15>
PCIE_PTX_EXPRX_N3<15>
PCIE_PTX_EXPRX_P3<15>
+3.3V_CARDAUX
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C642
C642
C643
C643
2
2
15
3
11
CARD_RESET#
8
EXPRCRD_CPPE#
10
CPUSB#
9
18
7
21
+3.3V_RUN
PCIE_WAKE#<34,40>
EXPCLK_REQ#<15>
+3.3V_SUS
10K_0402_5%~D
10K_0402_5%~D
12
R830
R830
USBP10_DÂUSBP10_D+
CPUSB#
CARD_SMBCLK
CARD_SMBDAT
CARD_RESET#
EXPRCRD_CPPE#
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
1 2
1 2
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D
+1.5V_CARD
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
R731
R731
PCIE_PTX_EXPRX_N3_C
PCIE_PTX_EXPRX_P3_C
10U_0603_6.3V6M~D
1
1
C640
C640
C641
C641
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C645
R732
R732
C645
2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
+1.5V_CARD+3.3V_SUS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
JEXP1
CONN@JEXP1
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
GND
ACES_51522-02601-001
ACES_51522-02601-001
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C638
C638
C637
C637
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
LA-7731P
LA-7731P
LA-7731P
35 59Thursday, September 01, 2011
35 59Thursday, September 01, 2011
35 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 36
5
4
3
2
1
D79
L97
USB3RN2<17>
USB3RP2<17>
D D
+5V_ALW
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
ESATA_USB_PWR _EN#<39>
1
1
C678
C678
C677
C677
2
2
C C
USB_PWR_SHR_E N#<39>
B B
A A
R1626 0_0402_ 5%~DR1626 0_0402_5%~D
U49
U49
1
GND
2
IN
3
IN
4
EN1#
EN2#5FAULT#2
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
12
USBP0-<17>
USBP0+<17>
+SATA_SIDE_PWR
10
FAULT1#
9
OUT1
8
OUT2
7
ILIM
6
11
T-PAD
SB#
+5V_ALW +5V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C715
C715
2
USB_OC4# <17>
USB_PWR_SHR_V BUS_EN<39>
8
SB
7
Y-
6
Y+
5
VDD
PI5USB1457AZAEX_TDFN8_2X2~ D
PI5USB1457AZAEX_TDFN8_2X2~ D
USB3RN2
USB3RP2 USB3RP2_D+
1 2
R784 0_0402_5%~DR784 0_0402_5%~D
U2
GND
U2
INT
D-
D+
SEL
PWRSHARE_EN
1
USBP0_D-
2
USBP0_D+
3
SEL PWRSHARE_EN #
4
9
L97
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1608 0_0402_5%~D@R1608 0_04 02_5%~D@
1 2
R1609 0_0402_5%~D@R1609 0_04 02_5%~D@
12
R750
R750
24.9K_0402_1%~D
24.9K_0402_1%~D
R1614
R1614
10K_0402_5%~D
10K_0402_5%~D
1 2
R1613
@ R1613
@
10K_0402_5%~D
10K_0402_5%~D
1 2
USB3TN1<17>
USB3TP1<17>
2
2
3
3
USB3TN2<17>
USB3TP2<17>
+5V_ALW
R816
R816
100K_0402_5%~D
100K_0402_5%~D
1 2
PWRSHARE_EN #
13
D
D
Q48
Q48
2
G
SSM3K7002FU_SC70-3~D
G
SSM3K7002FU_SC70-3~D
S
S
USB3RN1<17>
USB3RP1<17>
C412 0.1U_0402_25V6K~DC412 0.1U_0402_25V6K~D
C413 0.1U_0402_25V6K~DC413 0.1U_0402_25V6K~D
USB3RN2_D- USB3RN2_D-
C410 0.1U_0402_25V6K~DC410 0.1U_0402_25V6K~D
C411 0.1U_0402_25V6K~DC411 0.1U_0402_25V6K~D
12
USB3TP1_C USB3TP1_D+
12
USB3RN2_D-
USB3RP2_D+
USB3TN2_D-
USB3TP2_D+
12
USB3TP2_C USB3TP2_D+
12
L95
L95
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1605 0_0402_5%~D@ R1605 0_0402_5%~D@
1 2
R1604 0_0402_5%~D@ R1604 0_0402_5%~D@
L96
L96
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1606 0_0402_5%~D@ R1606 0_0402_5%~D@
1 2
R1603 0_0402_5%~D@ R1603 0_0402_5%~D@
D79
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
+5V_ALW
10U_0805_10V6K~D
10U_0805_10V6K~D
1
1
C676
C676
2
2
2
2
3
3
2
2
3
3
10
USB3RP2_D+
9
USB3TN2_D-
7
USB3TP2_D+
6
L98
L98
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1612 0_0402_5%~D@ R1612 0_0402_5%~D@
1 2
R1607 0_0402_5%~D@ R1607 0_0402_5%~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C675
C675
USB3RN1_D-
USB3RP1_D+
USB3TN1_D-USB3TN1_C
2
2
3
3
USB_SIDE_EN#<39>
+5V_USB_PWR
USB3TN2_D-USB3TN2_C
U48
U48
1
2
3
4
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
+5V_USB_CHG_PWR
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
+
+
C651
C651
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
GND
FAULT1#
IN
IN
EN1#
EN2#5FAULT#2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C654
C654
2
USB3RN1_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+
USBP0_D+ USBP0_R_D+
USBP0_D-
C655
C655
OUT1
OUT2
T-PAD
USBP1+<17>
USBP1-<17>
ILIM
2
3
1
+5V_USB_PWR
10
9
8
7
6
11
2
3
1
USBP1_DÂUSBP1_D+
USB3RN2_D-
D73
PESD5V0U2BT_SOT23-3~D
D73
PESD5V0U2BT_SOT23-3~D
USB3RP2_D+
USB3TN2_DÂUSB3TP2_D+
USB_OC0# <17>
USB_OC0# <17>
USBP0_R_DÂUSBP0_R_D+
USB3RN1_D-
D72
PESD5V0U2BT_SOT23-3~D
D72
PESD5V0U2BT_SOT23-3~D
USB3RP1_D+
USB3TN1_DÂUSB3TP1_D+
D78
D78
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
L51
L51
4
4
1
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R736 0_0402_5%~D@ R736 0_0402_5%~D@
1 2
R740 0_0402_5%~D@ R740 0_0402_5%~D@
10
9
7
6
3
3
2
2
4
1
JUSB2
CONN@JUSB2
CONN@
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
7
8
9
L52
L52
4
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R737 0_0402_5%~D@ R737 0_0402_5%~D@
1 2
R739 0_0402_5%~D@ R739 0_0402_5%~D@
+5V_USB_CHG_PWR
JUSB1
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
7
GND-DRAIN
8
StdA-SSTX-
9
StdA-SSTX+
USB3RN1_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+
USBP0_R_D-
GND
GND-DRAIN
GND
StdA-SSTX-
GND
StdA-SSTX+
GND
LOTES_AUSB0015-P001A
LOTES_AUSB0015-P001A
3
3
2
2
12
R748
R748
24.9K_0402_1%~D
24.9K_0402_1%~D
CONN@JUSB1
CONN@
GND
GND
GND
GND
LOTES_AUSB0015-P001A
LOTES_AUSB0015-P001A
10
11
12
13
USBP1_D+
USBP1_D-
10
11
12
13
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB 3.0 x2
USB 3.0 x2
USB 3.0 x2
LA-7731P
LA-7731P
LA-7731P
36 59Thursday, September 01, 2011
36 59Thursday, September 01, 2011
36 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 37
5
D D
1 2
R751 0_0402_5%~D8@ R751 0_0402_5%~D8@
C C
ESATA_CD#_R
4
ESATA Repeater
If use 412CD part only, de-pop R745, R751, pop R746
If use 412A part, de-pop R746, pop R745, R751
R746 0_0402_5%~D7@ R746 0_0402_5%~D7@
ESATA_CD#<18>
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PRX_DTX_P4_C<14>
ESATA_PTX_DRX_P4_C ESATA_PTX_DRX_P4
ESATA_PTX_DRX_N4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
1 2
R745 0_0402_5%~D8@ R745 0_0402_5%~D8@
1 2
C663 0.01U_0402_16V7K~DC663 0.01U_0402_16V7K~D
C664 0.01U_0402_16V7K~DC664 0.01U_0402_16V7K~D
C665 0.01U_0402_16V7K~DC665 0.01U_0402_16V7K~D
C666 0.01U_0402_16V7K~DC666 0.01U_0402_16V7K~D
3
12
ESATA_PTX_DRX_N4
12
ESATA_PRX_DTX_N4
12
12
+3.3V_RUN
12
ESATA_CD#_R
R741
R741
0_0402_5%~D
0_0402_5%~D
U44
7
EN
18
CD
19
PS
1
RX_1P
2
RX_1N
4
TX_2N
5
TX_2P
3
GND
13
GND
17
GND
21
PAD
SN75LVCP412CDRTJR_QFN20_4X 4~D
SN75LVCP412CDRTJR_QFN20_4X 4~D
7@U44
7@
TX_1P
TX_1N
RX_2P
RX_2N
+3.3V_RUN
6
VCC
16
VCC
20
VCC
10
VCC
9
PE1
8
PE2
15
14
11
12
+SATA_SIDE_PWR
150U_B2_6.3V-M~D
150U_B2_6.3V-M~D
1
+
+
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
C661
C661
2
REXT
ESATA_PE1
ESATA_PE2
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_RP
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C667
C667
C668
C668
1
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C662
C662
2
R1595 0_0402_5%~DR15 95 0_0402_5%~D
12
R742 0_0402_5%~D@R742 0_0402_5%~D@
R1594 0_0402_5%~DR15 94 0_0402_5%~D
12
R743 0_0402_5%~DR743 0_0402_5%~D
12
12
1
U44
8@ U4 4
8@
PS8513BTQFN20GTR- A0
PS8513BTQFN20GTR- A0
SA00004WR00
SA00004WR00
JESA1
JESA1
1
USBP9_DÂUSBP9_D+
B B
L90
L90
USBP9+<17>
USBP9-<17>
1
1
4
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R1150 0_0402_5%~D@ R1150 0_0402_5%~D@
1 2
R1151 0_0402_5%~D@ R1151 0_0402_5%~D@
USBP9_D+
2
2
USBP9_D-
3
3
2
3
D74
D74
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP SATA_PRX_D TX_P4
SATA_PTX_DRX_P4
1 2
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
SATA_PTX_DRX_N4
1 2
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
SATA_PRX_DTX_N4
1 2
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
1 2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
VBUS
2
D-
USB
USB
3
D+
4
GND
5
GND
6
A+
ESATA
ESATA
7
A-
8
GND
9
B-
10
B+
11
GND
12
GND
13
GND
14
GND
15
GND
TAIWI_EU134-115CRL-TW
TAIWI_EU134-115CRL-TW
CONN@
CONN@
Place D74 close to JESATA1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
LA-7731P
LA-7731P
LA-7731P
37 59Thursday, September 01, 2011
37 59Thursday, September 01, 2011
37 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 38
5
DOCK_LOM_SPD10LED_GRN#<31>
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D
D D
DPD_PCH_DOCK_HPD<16> DPC_PCH_DOCK_HPD <16>
Close to DOCK
Its for Enhance ESD on dock issue.
C C
B B
DPD_PCH_DOCK_HPD
DPD_PCH_LANE_P0< 16>
DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1< 16>
DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2< 16>
DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3< 16>
DPD_PCH_LANE_N3<16>
12
R757
R757
100K_0402_5%~D
100K_0402_5%~D
1
2
+DOCK_PWR_BAR
12
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D
12
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D
12
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D
12
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D
12
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D
12
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D
12
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D
12
DPD_DOCK_AUX<26>
DPD_DOCK_AUX#<26>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
C695
C695
DPD_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
GREEN_DOCK<23>
HSYNC_DOCK<23>
VSYNC_DOCK<23>
CLK_MSE<40>
DAT_MSE<40>
D_LFRAME#<39>
D_CLKRUN#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>
DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,46>
DOCK_PWR_BTN#<40>
SLICE_BAT_PRES#<39,46,55> DOCK_DET# <39>
BLUE_DOCK<23>
RED_DOCK<23>
DAI_BCLK#< 29>
DAI_LRCK#<29>
DAI_DI<29>
DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD0<39>
D_LAD1<39>
D_LAD2<39>
D_LAD3<39>
D_SERIRQ<39 >
D_DLDRQ1#<39>
DOCK_PSID<46>
1
2
4
SLICE_BAT_PRES#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
@
@
1
CE6
CE6
2
DOCK_DET_1
DPD_CA_DET
DPD_DOCK_LANE_P0
DPD_DOCK_LANE_N0
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
BLUE_DOCK
RED_DOCK
GREEN_DOCK
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
C702
C702
1
3
JDOCK1
JDOCK1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
GND1
146
PWR1
147
PWR1
148
D33
D33
PWR1
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
Shield_G
JAE_WD2F144W B5R400
JAE_WD2F144W B5R400
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
149
150
151
152
159
160
161
162
163
164
DOCK_AC_OFF
DPC_CA_DET
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
DOCK_DET_R#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
C703
C703
1
2
DOCK_AC_OFF <39,55>
DOCK_LOM_SPD100LED_ORG# <31>
DPC_CA_DET <26>DPD_CA_DET<26>
C691 0.1U_0402_10V7K~DC691 0.1U_0402_ 10V7K~D
12
C680 0.1U_0402_10V7K~DC680 0.1U_0402_ 10V7K~D
12
C682 0.1U_0402_10V7K~DC682 0.1U_0402_ 10V7K~D
12
C684 0.1U_0402_10V7K~DC684 0.1U_0402_ 10V7K~D
12
C693 0.1U_0402_10V7K~DC693 0.1U_0402_ 10V7K~D
12
C686 0.1U_0402_10V7K~DC686 0.1U_0402_ 10V7K~D
12
C688 0.1U_0402_10V7K~DC688 0.1U_0402_ 10V7K~D
12
C694 0.1U_0402_10V7K~DC694 0.1U_0402_ 10V7K~D
12
DPC_DOCK_AUX <26 >
DPC_DOCK_AUX# <2 6>
ACAV_DOCK_SRC# <55>
DAT_DDC2_DOCK <23>
CLK_DDC2_DOCK <23>
12
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D
12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D
1 2
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D
1 2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D
USBP8+ <17>
USBP8- <17>
USBP3+ <17>
USBP3- <17>
CLK_KBD <40>
DAT_KBD <40>
USB3RN4 <17>
USB3RP4 <17>
USB3TN4 <17>
USB3TP4 <17>
BREATH_LED# <39,43>
DOCK_LOM_ACTLED_YEL# <31>
DOCK_LOM_TRD0+ <31>
DOCK_LOM_TRD0- <31>
DOCK_LOM_TRD1+ <31>
DOCK_LOM_TRD1- <31>
+LOM_VCT
DOCK_LOM_TRD2+ <31>
DOCK_LOM_TRD2- <31>
DOCK_LOM_TRD3+ <31>
DOCK_LOM_TRD3- <31>
DOCK_DCIN_IS+ <5 4>
DOCK_DCIN_IS- <54>
DOCK_POR_RST# <4 0>
+DOCK_PWR_BAR
DAI_12MHZ# DAI_BC LK#
12
RE11
@RE11
@
10_0402_1%~D
10_0402_1%~D
1
CE8
@CE8
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
+LOM_VCT
2
DPC_PCH_LANE_P0 <16>
DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P1 <16>
DPC_PCH_LANE_N1 <16>
DPC_PCH_LANE_P2 <16>
DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P3 <16>
DPC_PCH_LANE_N3 <16>
SATA_PRX_DKTX_P5_C <14>
SATA_PRX_DKTX_N5_C <14>
SATA_PTX_DKRX_P5_C <14>
SATA_PTX_DKRX_N5_C <14>
1
@
@
C701
C701
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1 2
D32
D32
RB751V40_SC76-2
RB751V40_SC76-2
12
1
2
1
2
DPC_PCH_DOCK_HPD
RE12
@RE12
@
10_0402_1%~D
10_0402_1%~D
CE9
@CE9
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
C696
C696
Close to DOCK
Its for Enhance ESD on dock issue.
12
R758
R758
100K_0402_5%~D
100K_0402_5%~D
DOCK_DET#
1 2
R755 100K_0402_5%~DR755 100K_0402_5%~D
CLK_PCI_DOCK
12
R756
R756
33_0402_5%~D
33_0402_5%~D
1
C704
C704
12P_0402_50V8J~D
12P_0402_50V8J~D
2
1
+3.3V_ALW
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DOCKING CONN
DOCKING CONN
DOCKING CONN
LA-7731P
LA-7731P
LA-7731P
38 59Thursday, September 01, 2011
38 59Thursday, September 01, 2011
38 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 39
+3.3V_ALW
1 2
R796 10K_040 2_5%~DR796 10K_0402_5%~D
1 2
R798 100K_04 02_5%~DR 798 100K_0402_5%~D
1 2
R761 100K_04 02_5%~DR 761 100K_0402_5%~D
1 2
R763 100K_04 02_5%~DR 763 100K_0402_5%~D
D D
+3.3V_RUN
C C
B B
1 2
R760 100K_04 02_5%~DR 760 100K_0402_5%~D
1 2
R774 100K_04 02_5%~DR 774 100K_0402_5%~D
1 2
R776 100K_04 02_5%~DR 776 100K_0402_5%~D
R764 10K_040 2_5%~DR764 10K_0402_5%~D
1 2
R769 100K_04 02_5%~DR 769 100K_0402_5%~D
1 2
R778 100K_04 02_5%~DR 778 100K_0402_5%~D
R785 10K_040 2_5%~DR785 10K_0402_5%~D
1 2
R768 10K_040 2_5%~DR768 10K_0402_5%~D
R773 10K_040 2_5%~DR773 10K_0402_5%~D
1 2
R457 100K_04 02_5%~DR 457 100K_0402_5%~D
1 2
R766 100K_04 02_5%~DR 766 100K_0402_5%~D
1 2
R772 10K_040 2_5%~D@R 772 10K_0402_5%~D@
R771 10K_040 2_5%~DR771 10K_0402_5%~D
1 2
R767 100K_04 02_5%~DR 767 100K_0402_5%~D
1 2
R775 10K_040 2_5%~DR775 10K_0402_5%~D
1 2
R3 100K_0402 _5%~DR3 100K_0402_5%~D
+3.3V_ALW
1 2
R800 100K_0402_5%~DR800 100K_0402_5%~D
VGA_ID
5
DYN_TURB_PWR_ALRT#
HW_GPS_DISABLE2#
PROCHOT_GATE
CPU_DETECT#
SLICE_BAT_PRES#
WWAN_RA DIO_DIS#
USB_PWR_SHR_E N#
MODULE_BATT_PRES#
12
ESATA_USB_PWR _EN#
USB_PWR_SHR_V BUS_EN
DOCK_SMB_ALERT#
12
USB_SIDE_EN#
MOD_SATA_PCIE#_DET
12
MCARD_PCIE_SATA#
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
ZODD_WAKE#
12
SYS_LED_MASK#
CHARGE_EN
VGA_ID
1 2
R803 100K_0402_5%~D@R803 100K_0402_5%~D@
D12" does not support E-Module, ECE5048(U46) pin B7,A15,B15,A16,B32,A42,A49 not used, but do not assign GPIO for these pins.
CRT_SWITCH<23>
MCARD_MISC_PW REN<35>
PROCHOT_GATE<54>
DOCK_SMB_ALERT#<38,46>
USB_SIDE_EN#<36>
EN_I2S_NB_CODEC#<29>
USH_PWR_STATE #<32>
EN_DOCK_PWR_BAR<55>
PANEL_BKEN_EC<24>
ENVDD_PCH<16,24>
LCD_TST<24>
PSID_DISABLE#<46>
PBAT_PRES#<46>
DOCKED<31>
DOCK_DET#<38>
AUD_NB_MUTE#<29>
MCARD_WW AN_PWREN<35>
LCD_VCC_TEST_EN< 24>
CCD_OFF<24>
AUD_HP_NB_SENSE<29,45>
ESATA_USB_PWR _EN#<36>
SLICE_BAT_ON<55>
SLICE_BAT_PRES#<38,46,55>
USB_PWR_SHR_E N#<36>
CPU_DETECT#<7>
BCM5882_ALERT#<32>
SUSACK#<16>
SLP_ME_CSW_DE V#<1 8>
LAN_DISABLE#_R<31>
SYS_LED_MASK#<43>
SIO_EXT_WAKE#<18>
WIRELESS_LED#<34,43>
USB_PWR_SHR_V BUS_EN<36>
WLAN_RADIO_DIS#<34>
WIRELESS_ON#/OFF<30>
BT_RADIO_DIS#<41>
WWAN_RA DIO_DIS#<34>
SYS_PWROK<7,16>
CPU_VTT_ON<51>
PCH_DPWROK<16>
R797 0_0402_5%~DR797 0_0402_5%~D
1 2
VGA_ID0
Discrete
0
UMA 1
A A
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP
12
R793
@ R793
@
1K_0402_1%~D
1K_0402_1%~D
5
4
CRT_SWITCH
MCARD_MISC_PW REN
PROCHOT_GATE
LID_CL_SIO#
DOCK_SMB_ALERT#
USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE #
EN_DOCK_PWR_BAR
PANEL_BKEN_EC
ENVDD_PCH
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
AUD_NB_MUTE#
MCARD_WW AN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR _EN#
SLICE_BAT_ON
SLICE_BAT_PRES#
MODULE_BATT_PRES#
USB_PWR_SHR_E N#
MCARD_PCIE_SATA#
CPU_DETECT#
MOD_SATA_PCIE#_DET
ZODD_WAKE#
BCM5882_ALERT#
VGA_ID
SLP_ME_CSW_DE V#
LAN_DISABLE#_R
CHARGE_EN
SYS_LED_MASK#
DYN_TURB_PWR_ALRT#
WIRELESS_LED#
USB_PWR_SHR_V BUS_EN
WLAN_RADIO_DIS#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
WWAN_RA DIO_DIS#
SYS_PWROK
CPU_VTT_ON
1 2
R802 0_0402_5%~D@R802 0_0402_5%~D@
4
U46
U46
B52
GPIOA0
A49
GPIOA1
B53
GPIOA2
A50
GPIOA3
B54
GPIOA4
A51
GPIOA5
B55
GPIOA6
A52
GPIOA7
A33
GPIOB0
B36
GPIOB1
A34
GPOC2
B37
GPOC3
A35
GPOC4
B38
GPOC5
A36
GPOC6/TACH4
A37
GPIOC7
B40
GPIOD0
A38
GPIOC1
B41
GPIOC0
A39
GPIOB7
B42
GPIOB6
A40
GPIOB5
B43
GPIOB4
A41
GPIOB3
B44
GPIOB2
B32
GPIOD1
A31
GPIOD2
B33
GPIOD3
B15
GPIOD4
A15
GPIOD5
B16
GPIOD6
A16
GPIOD7
A1
GPIOE0/RXD
B2
GPIOE1/TXD
A2
GPIOE2/RTS#
B3
GPIOE3/DSR#
A3
GPIOE4/CTS#
B45
GPIOE5/DTR#
A42
GPIOE6/RI#
B4
GPIOE7/DCD#
A59
GPIOF0
B62
GPIOF1
A58
GPIOF2
B61
GPIOF3/TACH8
A56
GPIOF4/TACH7
B59
GPIOF5
A55
GPIOF6
B58
GPIOF7
B47
GPIOG0/TACH5
A45
GPIOG1
B48
GPIOG2
A46
GPIOG3
B49
GPIOG4
A47
GPIOG5
B50
GPIOG6
A48
GPIOG7/TACH6
B13
GPIOH0
A13
GPIOH1
A53
SYSOPT1/GPIOH2
B57
SYSOPT0/GPIOH3
B14
GPIOH4
A14
GPIOH5
B17
GPIOH6
B18
GPIOH7
+3.3V_ALW
1
2
B5
A17
B30
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
GPIOK1/TACH3
14.318MHZ/GPIOM0
ECE5048-LZY_DQFN132_11X11~D
ECE5048-LZY_DQFN132_11X11~D
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
C705
C705
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
GPIOJ0
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1
GPIOM3/PWM4
GPIOM4/PWM6
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ0#
LDRQ1#
SER_IRQ
CLK32/GPIOM2
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
EP
DB Version 0.4
DB Version 0.4
3
2
1 2
1
2
1
C707
C707
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
SIO_SLP_A# <16,42,50>
0.75V_DDR_VTT_ON <48>
SIO_SLP_S4# <16,42,48>
SIO_SLP_S3# <11,16,35,42,49>
IMVP_PWRGD < 53>
IMVP_VR_ON <53>
DOCK_AC_OFF_EC
AUX_EN_WOW L <35>
WLAN_LAN_DISB# <31>
SIO_SLP_LAN# <16,31>
SIO_SLP_SUS# <16>
GPIO_PSID_SELECT < 46>
DOCK_HP_DET <29>
DOCK_MIC_DET < 29>
ME_FWP <14>
MASK_SATA_LED# <43>
1.8V_RUN_PWRGD <49>
LED_SATA_DIAG_OUT# <43>
RUN_ON <35,42,49>
SPI_WP#_SEL <14>
SUS_ON <42>
BAT1_LED# <43>
BAT2_LED# <43>
HW_GPS_DISABLE2# <34>
BREATH_LED# <38,43>
LPC_LAD0 <14,32,34,40>
LPC_LAD1 <14,32,34,40>
LPC_LAD2 <14,32,34,40>
LPC_LAD3 <14,32,34,40>
LPC_LFRAME# <14,32,34,40>
PCH_PLTRST#_EC <17,32,34,35,40>
CLK_PCI_5048 <17>
CLKRUN# <16,32,40>
LPC_LDRQ1# <14>
IRQ_SERIRQ <14,32,40>
CLK_SIO_14M <15>
EC_32KHZ_ECE5048 <40>
D_LAD0 <38>
D_LAD1 <38>
D_LAD2 <38>
D_LAD3 <38>
D_LFRAME# <38>
D_CLKRUN# <38>
D_DLDRQ1# <38>
D_SERIRQ <38>
BC_INT#_ECE5048 <40>
RUNPWROK <7,40>
SP_TPM_LPC_EN < 32>
C714
C714
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C708
C708
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
trace width 20 mils
trace width 20 mils
T117PAD~D @T11 7PAD ~D @
BC_DAT_ECE5048 <40>
BC_CLK_ECE5048 <40 >
+CAP_LDO trace width 20 mils
R794
@R794
@
10_0402_1%~D
10_0402_1%~D
C712
@C712
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
ACAV_IN_NB <40,54,55>
DOCK_AC_OFF_EC <55>
R738 0_0402_5%~DR738 0_0402_5%~D
12
1
2
2
1
C706
C706
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
SIO_SLP_A#
B63
0.75V_DDR_VTT_ON
A60
A61
B65
A62
1 2
B66
R765 0_0402_5%~DR765 0_0402_5%~D
A63
B67
A64
SIO_SLP_LAN#
A5
SIO_SLP_SUS#
B6
A6
B7
DOCK_HP_DET
A7
DOCK_MIC_DET
B8
ME_FWP
A8
MASK_SATA_LED#
B9
B10
LED_SATA_DIAG_OUT#
A10
TEMP_ALERT#_R TEMP_ALERT#
B11
RUN_ON
A11
B12
A12
SUS_ON
B60
A57
BAT1_LED#
B64
B68
BAT2_LED#
A9
B1
USH_PWR_ON
A18
A44
HW_GPS_DISABLE2#
B34
BREATH_LED#
B39
B51
LPC_LAD0
A27
LPC_LAD1
A26
LPC_LAD2
B26
LPC_LAD3
B25
LPC_LFRAME#
A21
PCH_PLTRST#_EC
B22
CLK_PCI_5048
A28
CLKRUN#
B20
A23
LPC_LDRQ1#
A22
IRQ_SERIRQ
B21
CLK_SIO_14M
A32
B35
D_LAD0
B29
D_LAD1
B28
D_LAD2
A25
D_LAD3
A24
D_LFRAME#
B23
D_CLKRUN#
A19
D_DLDRQ1#
B24
D_SERIRQ
A20
BC_INT#_ECE5048
A29
BC_DAT_ECE5048
B31
BC_CLK_ECE5048
A30
RUNPWROK
A4
SP_TPM_LPC_EN
B56
B19
R804 1K_0402_1%~DR804 1K_0402_1%~D
+CAP_LDO
B46
B27
C1
1
C709
C709
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
1 2
CLK_PCI_5048CLK _SIO_14M
R795
R795
10_0402_1%~D
10_0402_1%~D
C713
C713
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
1
1
C710
C710
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
+3.3V_ALW
C711 0.1U_0402_25V6K~D@ C711 0.1U_0402_25V6K~D@
1 2
5
1
P
B
2
A
G
3
12
1
2
U47
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
TEMP_ALERT# <18>
LID_CL_SIO#
4
O
@U47
@
D34
@D34
@
12
RB751V40_SC76-2
RB751V40_SC76-2
+3.3V_ALW
12
R805
R805
100K_0402_5%~D
100K_0402_5%~D
1
C716
C716
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
DOCK_AC_OFF <38,55>
12
R770
@R770
@
33K_0402_5%~D
33K_0402_5%~D
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
RUN_ON
CPU_VTT_ONLCD_TST
0.75V_DDR_VTT_ON
SLICE_BAT_ON
SUS_ON
R807 10_0402_1 %~DR807 10_0402_1 %~D
R777 100K_04 02_5%~DR 777 100K_0402_5%~D
R780 100K_04 02_5%~DR 780 100K_0402_5%~D
R782 100K_04 02_5%~DR 782 100K_0402_5%~D
R786 100K_04 02_5%~DR 786 100K_0402_5%~D
R789 100K_04 02_5%~DR 789 100K_0402_5%~D
R790 100K_04 02_5%~DR 790 100K_0402_5%~D
R791 100K_04 02_5%~DR 791 100K_0402_5%~D
R878 100K_04 02_5%~DR 878 100K_0402_5%~D
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ECE5048
ECE5048
ECE5048
LA-7731P
LA-7731P
LA-7731P
1
+3.3V_RUN
12
12
12
12
12
12
12
12
LID_CL# <30,43>
39 59Thursday, September 01, 2011
39 59Thursday, September 01, 2011
39 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 40
5
+3.3V_ALW
C720
C720
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
5
U50
U50
1
P
B
2
A
G
3
1
1
2
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R858
R858
R860
R860
R859
R859
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
JTAG1
@SHORT PADS~D
@SHORT PADS~D
CONN@JTAG1
CONN@
10K_0402_5%~D
10K_0402_5%~D
R861
R861
1 2
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
R853 0_0402_5%~DR85 3 0_0402_5%~D
R855 0_0402_5%~DR85 5 0_0402_5%~D
1.05V_0.8V_PWROK
C736 0.1U_0402_25V6K~ DC736 0.1U_04 02_25V6K~D
12
DOCK_POR_RST#<38>
EC_32KHZ_ECE5048<39>
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R847
R847
R848
R848
1 2
1 2
1.05V_0.8V_PWROK <14,53>
SML1_SMBDATA<15>
SML1_SMBCLK<15>
CLK_TP_SIO<41>
DAT_TP_SIO<41>
CLK_KBD<38>
DAT_KBD<38>
CLK_MSE<38>
DAT_MSE<38>
PBAT_SMBDAT<46>
PBAT_SMBCLK<46>
DOCK_POR_RST#
PCH_ALW_ON<42>
BIA_PWM_EC<24>
BC_CLK_ECE5048<39>
BC_DAT_ECE5048<39>
BC_INT#_ECE5048<39>
BC_CLK_EMC4021<22>
BC_DAT_EMC4021<22>
BC_INT#_EMC4021<22>
PCH_PCIE_WAKE#<16>
PCIE_WAKE#<34 ,35>
BC_CLK_ECE1117<41>
BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
BEEP<29>
SIO_SLP_S5#<16>
ACAV_IN_NB< 39,54,55>
SIO_EXT_SMI#<17>
SIO_RCIN#<18>
IRQ_SERIRQ<14,32,39>
PCH_PLTRST#_EC<17,32,34,35,39>
CLK_PCI_MEC<17>
LPC_LFRAME#<14,32,34,39>
LPC_LAD0<14,32,34,39>
LPC_LAD1<14,32,34,39>
LPC_LAD2<14,32,34,39>
LPC_LAD3<14,32,34,39>
CLKRUN#<16,32,39>
SIO_EXT_SCI#< 18>
MEC_XTAL2 MEC_XTAL2_R
R1068 0_0402 _5%~DR1068 0_0402_5%~D
1 2
R867 0_0402_5%~DR867 0_0402_5 %~D
@R850
@
100K_0402_5%~D
100K_0402_5%~D
12
R850
R849
R849
HOST_DEBUG_TXHOST_DEB_TX
HOST_DEBUG_RX
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+3.3V_ALW
12
12
12
10K_0402_5%~D
10K_0402_5%~D
12
100_0402_1%~D
100_0402_1%~D
12
@
@
1.05V_VTTPWRGD
VCCSAPWROK
PCIE_WAKE#
BC_DAT_ECE5048
BC_DAT_ECE1117
BC_DAT_EMC4021
PBAT_SMBDAT
PBAT_SMBCLK
LPC_LDRQ#_MEC
CHARGER_SMBDAT
CHARGER_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
R824
R824
R836
R836
JTAG_RST# citcu it
close to U51.B5 7
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C735
C735
2
1.05V_VTTPWRGD<51,52>
VCCSAPWROK<52>
Modify name net
+3.3V_ALW
D D
C C
R759 10K_0402_5%~DR759 10K_0402_5%~D
R814 100K_0402_5%~DR814 100K_0402_5%~D
R817 100K_0402_5%~DR817 100K_0402_5%~D
R821 100K_0402_5%~DR821 100K_0402_5%~D
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
R823 100K_0402_5%~D@R823 100K_0402_5%~D@
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D
EC firmware can configure those un-used SMBUS pins as GPO (Output),
then it's OK to leave these un-used pins No-Connect.
JTAG_RST#
32 KHz Clock
C741
C741
1 2
39P_0402_50V8J~D
39P_0402_50V8J~D
MEC_XTAL2
Y6
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
C743
C743
39P_0402_50V8J~D
39P_0402_50V8J~D
JDEG2
JDEG2
11
G1
12
G2
CONN@
CONN@
1 2
10
1 2
+3.3V_ALW
49.9_0402_1%~D
49.9_0402_1%~D
12
R864
R864
1
1
2
2
3
3
4
4
5
5
MSCLK
6
6
MSDATA
7
7
8
8
HOST_DEB_RX
9
9
10
MEC_XTAL1
B B
TYCO_1-2041070-0~D
TYCO_1-2041070-0~D
R875 C744
A A
Place closely pin A29
CLK_PCI_MEC
12
R885
R885
10_0402_1%~D
10_0402_1%~D
1
C747
C747
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
240K 4700p
130K 4700p
*
62K
33K
8.2K
4.3K
2K
1K
4700p
4700p
4700p
4700p
4700p
4700p
BOARD_ID rise time is measured from 5%~68%.
5
12
REV
X00
X01
X02
A00
4
3
D12" does not support E-Module, MEC5 055 (U51) pin A17,B36 not used, but do not assign GPIO for these pins.
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C723
C723
AGND
B66
SYSTEM_ID
+3.3V_ALW
B64
A11
VBAT
VTR[1]
DB Version 0.12
DB Version 0.12
VSS[1]
VSS[4]
B11
B60
+3.3V_ALW
1
A22
least
15mil
1 2
1
2
2
B35
A41
A58
A52
A26
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]B3VTR[8]
MISC INTERFACE
MISC INTERFACE
GPIO124/GPTP-OUT5/UART_RX
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
SMBUS INTERFACE
SMBUS INTERFACE
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
DELL PWR SW INF
DELL PWR SW INF
VR_CAP
VSS_RO
B12
B54
+VR_CAP
1
C740
C740
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
R871
R871
1K_0402_1%~D
1K_0402_1%~D
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C742
C742
CHIPSET_ID for BID
function
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C727
C727
C725
C725
C729
C729
2
2
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
nFWP
PROCHOT#/PWM4
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
PECI
PECI
PECI_VREF
PECI
I2S
I2S
I2S_DAT
I2S_CLK
I2S_WS
EP
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
C1
+3.3V_M
RESET_OUT#
2
G
G
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C731
C731
2
2
SYSTEM_ID
A10
BOARD_ID
B10
DDR_ON
B14
HOST_DEBUG_TX
B44
HOST_DEBUG_RX
B46
RUNPWROK
B26
EN_INVPWR
A25
B36
B37
B38
DDR_HVREF_RST_GATE
A34
DYN_TUR_CURRNT_SET#
A35
CPU1.5V_S3_GATE
A36
MSDATA
A40
MSCLK
B43
SIO_A20GATE
A45
PS_ID
A55
A57
B61
FWP#
B65
PROCHOT#_EC
A46
B2
A2
B8
B18
ME_SUS_PWR_ACK
A8
1.5V_SUS_PWRGD
B9
PM_APWROK
A9
1.05V_A_PWRGD
A14
ALW_PW RGD_3V_5V
B15
DEVICE_DET#
A17
RESET_OUT#
B39
A44
PCH_RSMRST#
B47
AC_PRESENT
A54
SIO_PWRBTN#
B58
DOCK_SMB_DAT
A3
DOCK_SMB_CLK
B4
LCD_SMBDAT
A4
LCD_SMBCLK
B5
BAY_SMBDAT
B7
BAY_SMBCLK
A7
GPU_SMBDAT
B48
GPU_SMBCLK
B49
CHARGER_SMBDAT
A47
CHARGER_SMBCLK
B50
CARD_SMBDAT
B52
CARD_SMBCLK
A49
USH_SMBDAT
B53
USH_SMBCLK
A50
A59
LAT_ON_SW#
B63
ALWON
A60
VCI_IN1#
A63
POWER_SW _IN#
B67
ACAV_IN
B1
DOCK_PWR_SW #
A1
+PECI_VREF
B51
PECI_EC_R
A48
B17
B27
R941 100K_0402_5%~D@R941 100K_0402_5%~D@
B28
R942 100K_0402_5%~D@R942 100K_0402_5%~D@
12
R893
R893
100K_0402_5%~D
100K_0402_5%~D
PCH_PWRGD# <22>
13
D
D
Q50
Q50
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
1
C726
C726
2
1 2
1 2
SMSC ask to add
SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
PCH_ALW_ON
BIA_PWM_EC
BC_CLK_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_EMC4021
BC_DAT_EMC4021
BC_INT#_EMC4021
PCH_PCIE_WAKE#
PCIE_WAKE#
BC_CLK_ECE1117
BC_DAT_ECE1117
BC_INT#_ECE1117
BEEP
SIO_SLP_S5#
ACAV_IN_NB
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
MEC_XTAL1
BOARD_ID
4
+RTC_CELL
R815
R815
0_0402_5%~D
0_0402_5%~D
+RTC_CELL_VBAT
1 2
U51
U51
PS/2 INTERFACE
PS/2 INTERFACE
A5
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
B6
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
A37
GPIO110/PS2_CLK2/GPTP-IN6
B40
GPIO111/PS2_DAT2/GPTP-OUT6
A38
GPIO112/PS2_CLK1A
B41
GPIO113/PS2_DAT1A
A39
GPIO114/PS2_CLK0A
B42
GPIO115/PS2_DAT0A
B59
GPIO154/I2C1C_DATA/PS2_CLK1B
A56
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
A51
GPIO145/I2C1K_DATA/JTAG_TDI
B55
GPIO146/I2C1K_CLK/JTAG_TDO
B56
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
A53
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
B57
JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
B22
GPIO050/FAN_TACH1
A21
GPIO051/FAN_TACH2
B23
GPIO052/FAN_TACH3
B24
GPIO053/PWM0
A23
GPIO054/PWM1
B25
GPIO055/PWM2
A24
GPIO056/PWM3
BC-LINK
BC-LINK
A43
GPIO123/BCM_A_CLK
B45
GPIO122/BCM_A_DAT
A42
GPIO121/BCM_A_INT#
A12
GPIO022/BCM_B_CLK
B13
GPIO023/BCM_B_DAT
A13
GPIO024/BCM_B_INT#
B20
GPIO044/BCM_C_CLK
A18
GPIO043/BCM_C_DAT
B19
GPIO042/BCM_C_INT#
A20
GPIO047/LSBCM_D_CLK
B21
GPIO046/LSBCM_D_DAT
A19
GPIO045/LSBCM_D_INT#
A16
GPIO032/GPTP-IN3/BCM_E_CLK
B16
GPIO31/GPTP-OUT2/BCM_E_DAT
A15
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
A6
GPIO011/nSMI
A27
GPIO061/LPCPD#
B29
LDRQ#
A28
SER_IRQ
B30
LRESET#
A29
PCI_CLK
B31
LFRAME#
A30
LAD0
B32
LAD1
A31
LAD2
B33
LAD3
A32
CLKRUN#
A33
GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
A61
XTAL1
A62
XTAL2
B62
GPIO160/32KHZ_OUT
B34
NC1
A64
NC2
B68
NC3
15mil
C739 close to U51.B12
+3.3V_ALW
12
R875
R875
130K_0402_5%~D
130K_0402_5%~D
1
C744
C744
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C728
C728
C732
C732
C739
C739
2
2
HOST_DEBUG_TX <34>
HOST_DEBUG_RX <34>
RUNPWROK <7,39>
EN_INVPWR <24>
DDR_HVREF_RST_GATE <7>
DYN_TUR_CURRNT_SET# <54>
CPU1.5V_S3_GATE <11>
R884 1K_0402_1%~ DR884 1K_0402_1%~D
1 2
R886 1K_0402_1%~ DR886 1K_0402_1%~D
1 2
R887 1K_0402_1%~ DR887 1K_0402_1%~D
ALWON <47>
ACAV_IN <22,54,55>
1 2
R863 43_0402_5%~DR863 4 3_0402_5%~D
FWP#
2
POWER_SW _IN#<22>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C730
C730
2
DDR_ON <48>
MSDATA <34>
MSCLK <34>
SIO_A20GATE <18>
PS_ID < 46>
VOL_MUTE
VOL_MUTE <30>
VOL_UP
VOL_UP < 30>
R872
R872
10K_0402_5%~D
10K_0402_5%~D
1 2
R879
@R879
@
10K_0402_5%~D
10K_0402_5%~D
1 2
VOL_DOWN
PECI_EC <7>
VCI_IN1#
VOL_DOWN <30>
R863 close to
U51& least 250mils
1
2
R869 10K_0402_5%~DR869 10K_0402_5%~D
1 2
R876 100K_0402_5%~DR876 100K_0402_5%~D
1 2
R880 100K_0402_5%~DR880 100K_0402_5%~D
1 2
R881 100K_0402_5%~DR881 100K_0402_5%~D
1 2
R882 100K_0402_5%~DR882 100K_0402_5%~D
1 2
R883 10K_0402_5%~DR883 10K_0402_5%~D
1 2
R843 8.2K_0402_5%~D@R843 8.2K_0402_5%~D@
1 2
R889 100K_0402_5%~DR889 100K_0402_5%~D
1 2
R892 10K_0402_5%~DR892 10K_0402_5%~D
+1.05V_RUN_VTT
1 2
R862 0_0402_5%~DR862 0_0 402_5%~D
C737
C737
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
12
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
MSDATA
12
DDR_ON
PCH_ALW_ON
DOCK_POR_RST#
EN_INVPWR
1.05V_0.8V_PWROK
RESET_OUT#
CPU1.5V_S3_GATE
PCH_RSMRST#
2
12
ME_SUS_PWR_ACK <16>
1.5V_SUS_PWRGD <48>
PM_APWROK <16>
1.05V_A_PWRGD <50>
ALW_PW RGD_3V_5V <47>
RESET_OUT# <16>
PCH_RSMRST# < 41>
AC_PRESENT <16>
SIO_PWRBTN# <7,14,16>
DOCK_SMB_DAT <38>
DOCK_SMB_CLK <38>
CHARGER_SMBDAT <54>
CHARGER_SMBCLK <54>
CARD_SMBDAT <35>
CARD_SMBCLK <35>
USH_SMBDAT <32>
USH_SMBCLK <32>
+3.3V_ALW
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DOCK_PWR_SW #<22>
+1.05V_RUN_VTT
R1179 10K_0402_5%~D@R1179 10K_0402_5%~D@
PROCHOT#_EC
R812 100K_0402_5%~D@R812 100K_0402_5%~D@
+RTC_CELL
1 2
1 2
1
+RTC_CELL
POWER_SW _IN#
DOCK_PWR_SW #
LAT_ON_SW#
DYN_TUR_CURRNT_SET#
12
1
2
+RTC_CELL
12
R825 10K_0402_5%~DR 825 10K_0402_5%~D
1
2
+RTC_CELL
12
13
D
D
2
G
G
S
S
R1180 0_0402_5%~DR1180 0_0402_5%~D
RUNPWROK
RUN_ON_ENABLE#<42>
AC_PRESENT
LCD_SMBCLK
LCD_SMBDAT
DOCK_SMB_DAT
DOCK_SMB_CLK
BAY_SMBDAT
BAY_SMBCLK
DEVICE_DET#
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
VOL_MUTE
VOL_DOWN
VOL_UP
R810
R810
100K_0402_5%~D
100K_0402_5%~D
R811 10K_0402_5%~DR 811 10K_0402_5%~D
C722
C722
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R819
R819
100K_0402_5%~D
100K_0402_5%~D
1 2
C734
C734
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R870
R870
100K_0402_5%~D
100K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
R1169 100K_0402_5%~DR1169 100K_0402_5%~D
R1197 100K_0402_5%~DR1197 100K_0402_5%~D
R1118 100K_0402_5%~DR1118 100K_0402_5%~D
C721
@C721
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
1 2
C733
@C733
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
Q47
@
Q47
@
+3.3V_RUN
12
R799
R799
10K_0402_5%~D
10K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
1 2
R835 10K_0402_5%~DR835 10K_0402_5%~D
12
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D
12
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D
12
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D
12
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D
12
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D
12
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D
12
R1171 100K_0402_5%~DR1171 100K_0402_5%~D
12
R1125 100K_0402_5%~ DR1125 100K_0402_5%~D
12
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D
12
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D
12
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D
12
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D
12
12
12
POWER_SW #_MB <30,41>
DOCK_PWR_BTN# <38>
Q45
Q45
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MEC5055
MEC5055
MEC5055
LA-7731P
LA-7731P
LA-7731P
1
H_PROCHOT# < 7,53,54>
+3.3V_ALW_PCH
+3.3V_ALW
+5V_RUN
+3.3V_RUN
40 59Thursd ay, September 01, 2011
40 59Thursd ay, September 01, 2011
40 59Thursd ay, September 01, 2011
0.3
0.3
0.3
Page 41
5
+3.3V_TP
1
C755
C755
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
D D
TP_CLK
TP_DATA
2
3
D37
PESD5V0U2BT_SOT23-3~D
D37
PESD5V0U2BT_SOT23-3~D
1
DAT_TP_SIO< 40>
CLK_TP_SIO<40>
Place close to JTP1
D37 ESD ask to change to SOT23-3
+5V_RUN+3.3V_ALW
1
C756
C756
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
C C
1
C758
C758
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
4
+3.3V_TP
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
12
R903
R903
10P_0402_50V8J~D
10P_0402_50V8J~D
C752
C752
1
2
+3.3V_ALW +3.3V_RUN +3.3V_TP
Touch Pad
R902
R902
L54 BLM 18AG601SN1D_0603~DL54 BLM 18AG601SN1D_0603~D
L55 BLM 18AG601SN1D_0603~DL55 BLM 18AG601SN1D_0603~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C751
C751
2
R1161
R1161
0_0603_5%~D
0_0603_5%~D
1 2
R1162
@R1162
@
0_0603_5%~D
0_0603_5%~D
1 2
3
BlueTooth
12
12
C750
C750
+3.3V_TP
TP_DATA
10P_0402_50V8J~D
10P_0402_50V8J~D
TP_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
1
1
C749
C749
2
2
JTP1
JTP1
8
PS2_CLK_TS
PS2_DAT_TS
TP_DATA
TP_CLK
8
7
10
7
G2
6
9
6
G1
5
5
4
4
3
3
2
2
1
1
ACES_51522-00801-001
ACES_51522-00801-001
CONN@
CONN@
+3.3V_RUN
2
COEX2_WLAN_ACTIVE<34>
R1133
R1133
1K_0402_5%~D
1K_0402_5%~D
1 2
R1134
R1134
1K_0402_5%~D
1K_0402_5%~D
1 2
BT_DET#<17>
COEX1_BT_ACTIVE<34>
BT_COEX_STATUS2< 32>
BT_PRI_STATUS<32>
BT_ACTIVE<43>
BT_RADIO_DIS#<39>
USBP11-<17>
USBP11+<17>
BT_COEX_STATUS2
BT_PRI_STATUS
1
+3.3V_RUN
1 2
C748
C748
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
JBT1
JBT1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
G1
14
G2
CONN@
CONN@
ACES_50224-0120N-001
100P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
C753
C753
1
2
100P_0402_50V8J~D
10K_0402_5%~D
10K_0402_5%~D
@C754
@
12
C754
R904
R904
1
2
ACES_50224-0120N-001
Place close to JKB1
ACES_51524-0100N-001
ACES_51524-0100N-001
12
GND
11
GND
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
JKB1
CONN@JKB1
CONN@
+3.3V_ALW
+5V_RUN
KB_DET#
PS2_CLK_TS
PS2_DAT_TS
KB_DET#<18>
BC_INT#_ECE1117<40>
BC_DAT_ECE1117<40>
BC_CLK_ECE1117<40>
Power Switch for debug
POWER_SW#_M B< 30,40>
100P_0402_50V8J~D
100P_0402_50V8J~D
C759
@C759
@
1
2
112
PWRSW1
@PW RSW1
@
@SHORT PADS~D
@SHORT PADS~D
Place on Bottom
2
B B
RSMRST circuit
+3.3V_ALW_PCH
R1622
R1622
+5V_ALW_PCH
RT9801_VSET2
1
C289
C289
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
A A
RT9801_VSET1
2
U4
U4
4
5
6
RESET
VDD
VSET2
VSET0
VSET1
RT9801AGE_SOT23-6~D
RT9801AGE_SOT23-6~D
GND
3
2
1
RSMRST#
10K_0402_5%~D
10K_0402_5%~D
RT9801_VSET0
1 2
PCH_RSMRST#<40>
EC SIDE
PCH_RSMRST#
1 2
R1623 0_0402_5%~DR 1623 0_0402_5%~D
PCH_RSMRST#_Q
+3.3V_ALW
1 2
C288 0.1U_0402_25V6K~DC288 0.1U_0402_25V6K~D
5
U7
U7
1
P
B
4
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
1 2
R1624 0_0402_5%~D@ R1624 0_0402_5%~D@
PCH_RSMRST#_Q <14,16>
+5V_ALW_PCH
10K_0402_5%~D
10K_0402_5%~D
12
R1654
R1654
10K_0402_5%~D
10K_0402_5%~D
12
@
@
R1655
R1655
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
@
@
R1657
R1657
R1659
R1659
RT9801_VSET2
RT9801_VSET1
RT9801_VSET0
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
@
@
R1656
R1656
R1658
R1658
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Touch PAD/Int KB/BT
Touch PAD/Int KB/BT
Touch PAD/Int KB/BT
LA-7731P
LA-7731P
LA-7731P
41 59Thursday, September 01, 2011
41 59Thursday, September 01, 2011
41 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 42
5
+3.3V_ALW_PCH Source
+3.3V_ALW2
12
R907
R907
100K_0402_5%~D
100K_0402_5%~D
D D
Q51A
Q51A
2
ALW_ON_3.3V#
61
ALW_ON_3.3V#<20>
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_ALW_ON<40>
+3.3V_SUS Source
+3.3V_ALW2
12
R752
@R752
C C
SUS_ON<39>
SIO_SLP_S4#<16,39,48>
@
1 2
0_0402_5%~D
0_0402_5%~D
1 2
R753 0_0402_5%~DR753 0_0402_5%~D
61
2
+PWR_SRC_S
12
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
5
4
R915
R915
100K_0402_5%~D
100K_0402_5%~D
SUS_ON_3.3V#
Q53A
Q53A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
R905
R905
Q51B
Q51B
+PWR_SRC_S
5
4
+3.3V_ALW +3.3V_ALW_ PCH
ALW_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
R1619
R1619
12
R911
R911
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q53B
Q53B
4
Q49
Q49
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C762
C762
3300P_0402_50V7K~D
3300P_0402_50V7K~D
2
+3.3V_ALW
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
6
2
1
SUS_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
R1618
R1618
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C760
C760
1
2
Q54
Q54
D
D
S
S
45
G
G
3
1
C767
C767
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
12
R908
R908
20K_0402_5%~D
20K_0402_5%~D
+3.3V_SUS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
C765
C765
1
2
R914
R914
20K_0402_5%~D
20K_0402_5%~D
3
DC/DC Interface
SIO_SLP_S3#<11,16,35,39,49>
RUN_ON<35,39,49>
RUN_ON_ENABLE#<40>
1 2
R735 0_0402_5%~DR735 0_0402_5%~D
1 2
R744 0_0402_5%~D@ R744 0_0402_5%~D@
+3.3V_ALW2
2
2
12
R909
R909
100K_0402_5%~D
100K_0402_5%~D
RUN_ON_ENABLE#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q52A
Q52A
+PWR_SRC_S
12
3
5
4
+PWR_SRC_S
12
1.05V_RUN_ENABLE
13
D
D
2
G
G
S
S
R920
R920
100K_0402_5%~D
100K_0402_5%~D
1.5V_RUN_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q52B
Q52B
R930
R930
100K_0402_5%~D
100K_0402_5%~D
Q64
Q64
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+1.5V_RUN Source
Q59
Q59
8
7
6
5
470K_0402_5%~D
470K_0402_5%~D
12
R1610
R1610
+1.05V_RUN Source
+1.05V_M
Q63
Q63
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8
7
5
470K_0402_5%~D
470K_0402_5%~D
12
R1611
R1611
AO4728L_SO8~D
AO4728L_SO8~D
4
1
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1
2
36
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C773
C773
2
C771
C771
1
2
3
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
1
2
+1.05V_RUN
12
C772
C772
+1.5V_RUN+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
C769
C769
R921
R921
20K_0402_5%~D
20K_0402_5%~D
R931
R931
20K_0402_5%~D
20K_0402_5%~D
+3.3V_M Source
R918
R918
100K_0402_5%~D
100K_0402_5%~D
A_ON_3.3V#
5
+PWR_SRC_S
12
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
R917
R917
100K_0402_5%~D
100K_0402_5%~D
Q57B
Q57B
+3.3V_ALW2
12
61
Q57A
B B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SIO_SLP_A#<16,39,50>
Q57A
2
Discharg Circuit
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW _PCH
12
R922
@R922
@
1K_0402_1%~D
1K_0402_1%~D
+3.3V_SUS_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q65
SUS_ON_3.3V#
A A
Q65
S
S
ALW_ON_3.3V#
2
G
G
12
R928
@R928
@
1K_0402_1%~D
1K_0402_1%~D
+3.3V_ALWPCH_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
RUN_ON_ENABLE#
Q66
Q66
2
G
G
S
S
+3.3V_ALW
A_ENABLE
12
2
G
G
1M_0402_5%~D
1M_0402_5%~D
R1617
R1617
12
+5V_RUN_CHG
13
D
D
S
S
R923
@R923
@
1K_0402_1%~D
1K_0402_1%~D
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q67
Q67
Q58
Q58
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C770
C770
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
12
R924
@R924
@
1K_0402_1%~D
1K_0402_1%~D
+1.5V_RUN_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q68
2
Q68
G
G
S
S
1
2
2
G
G
+3.3V_M
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C768
C768
12
+3.3V_RUN_CHG
13
D
D
S
S
12
R919
@R919
@
20K_0402_5%~D
20K_0402_5%~D
R929
@ R929
@
39_0603_5%~D
39_0603_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
Q69
Q69
+3.3V_M
12
R916
R916
39_0603_5%~D
39_0603_5%~D
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q60
A_ON_3.3V#
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDD Q
12
R925
@R925
@
39_0402_5%~D
39_0402_5%~D
+1.05V_RUN_CHG
RUN_ON_CPU1.5VS3#<7,11>
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q70
Q70
2
G
G
S
S
Q60
2
G
G
S
S
12
R926
R926
220_0402_5%~D
220_0402_5%~D
+1.5V_CPU_VDDQ_CHG
13
D
D
2
G
G
S
S
+PWR_SRC_S
12
R933
R933
100K_0402_5%~D
100K_0402_5%~D
5V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q62
Q62
2
G
G
S
S
+PWR_SRC_S
2
G
G
12
R940
R940
100K_0402_5%~D
100K_0402_5%~D
3.3V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q56
Q56
S
S
12
R927
R927
22_0603_5%~D
22_0603_5%~D
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q71
Q71
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q72
2
Q72
G
G
S
S
+5V_RUN Source
+5V_ALW
Q55
Q55
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
8
7
5
+3.3V_RUN Source
8
7
5
1
2
36
4
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C763
C763
2
Q61
Q61
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
1
2
36
4
1
C766
C766
470P_0402_50V7K~D
470P_0402_50V7K~D
2
1
2
+5V_RUN
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C761
C761
1
2
12
+3.3V_RUN+3.3V_ALW
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
C764
C764
R910
R910
20K_0402_5%~D
20K_0402_5%~D
12
R913
R913
20K_0402_5%~D
20K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
POWER CONTROL
POWER CONTROL
POWER CONTROL
LA-7731P
LA-7731P
LA-7731P
42 59Thursday, September 01, 2011
42 59Thursday, September 01, 2011
42 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 43
5
4
3
2
1
+3.3V_ALW
12
R932
R932
10K_0402_5%~D
Q74B
5
12
R950
R950
100K_0402_5%~D
100K_0402_5%~D
Q74B
3
4
RB751V40_SC76-2
RB751V40_SC76-2
5
RB751V40_SC76-2
RB751V40_SC76-2
3
Q78B
Q78B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
1 2
D59
D59
1 2
D62
D62
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
C C
B B
SATA_ACT#<14>
MASK_SATA_LED#<39>
LED_SATA_DIAG_OUT#<39>
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
10K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
+3.3V_ALW
12
R937
R937
100K_0402_5%~D
100K_0402_5%~D
Q78A
Q78A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
Q74A
Q74A
Q80A
Q80A
2
2
2
LED Circuit Control Table
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
0
1 0
X
11
HDD LED solution for White LED Battery LED
61
2
2
61
+5V_ALW
1 3
1 2
R934 1.2K_0402_5%~DR934 1.2K_0402_5%~D
+5V_ALW
1 3
1 2
R938 1.2K_0402_5%~DR938 1.2K_0402_5%~D
Q75
Q75
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
Q81
Q81
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
SATA_LED
LID_HDD_LED
BAT2_LED#<39>
BAT1_LED#<39>
WLAN LED solution for White LED
+5V_ALW
61
2
1 3
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
BREATH_LED#<38,39>
Q83B
Q83B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
5
MASK_BASE_LEDS#
Q83A
Q83A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
2
MASK_BASE_LEDS#
Q84B
Q84B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q84A
Q84A
2
MASK_BASE_LEDS#
R955
R955
1.2K_0402_5%~D
1.2K_0402_5%~D
1 2
61
BAT2_LED#_Q
BAT1_LED#_Q
R949
R949
1.2K_0402_5%~D
1.2K_0402_5%~D
1 2
R958
R958
1.2K_0402_5%~D
1.2K_0402_5%~D
1 2
R951
R951
330_0402_5%~D
330_0402_5%~D
1 2
R959
R959
330_0402_5%~D
330_0402_5%~D
1 2
BREATH_WHITE_LID
BATT_WHITE
BATT_YELLOW
BATT_WHITE_LID
BATT_YELLOW_LID
LED1
LED1
BREATH_WHITE_LED_SNIFFBREATH_LED#_Q
21
LTW-193ZDS5_WHITE~D
LTW-193ZDS5_WHITE~D
Place LED1 close to SW1
Status LED when LID OpenStatus LED when LID Close
1 2
R939 1.2K_0402_5%~DR939 1.2K_0402_5%~D
WLAN_LED
BREATH_WHITE_LID
BATT_WHITE_LID
BATT_YELLOW_LID
LTW-295DSKS-5A_YEL-WHITE~D
LTW-295DSKS-5A_YEL-WHITE~D
LID_HDD_LED
LED4
LED4
LTW-193ZDS5_WHITE~D
LTW-193ZDS5_WHITE~D
LED6
LED6
W
W
Y
Y
LED2
LED2
2 1
LTW-193ZDS5_WHITE~D
LTW-193ZDS5_WHITE~D
+5V_ALW +5V_ALW +5V_ALW +5V_ALW
21
21
43
1 2
R957 1.2K_0402_5%~DR957 1.2K_0402_5%~D
BATT_WHITE
BATT_YELLOW
LTW-295DSKS-5A_YEL-WHITE~D
LTW-295DSKS-5A_YEL-WHITE~D
SATA_LED
WLAN_LED
+5V_ALW
LED7
LED7
21
W
W
43
Y
Y
LED3
LED3
2 1
LTW-193ZDS5_WHITE~D
LTW-193ZDS5_WHITE~D
LED5
LED5
2 1
LTW-193ZDS5_WHITE~D
LTW-193ZDS5_WHITE~D
Breath LED
1
2
+3.3V_ALW
B
A
C778 0. 1U_0402_25V6K~DC778 0. 1U_0402_25V6K~D
1 2
5
U58
U58
P
MASK_BASE_LEDS#
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PAD and Standoff
PAD and Standoff
PAD and Standoff
LA-7731P
LA-7731P
LA-7731P
1
43 59Thursday, September 01, 2011
43 59Thursday, September 01, 2011
43 59Thursday, September 01, 2011
0.3
0.3
0.3
H7
@ H19
@
H_3P2
H_3P2
@
H10
@H10
@
H8
@H8
@
H_2P8
H_2P8
H_2P8
1
H20
@ H20
@
H_2P3X1P8N
H_2P3X1P8N
1
H_2P8
1
@ H21
@
H_4P5
H_4P5
1
H22
@H22
@
H21
H_4P5
H_4P5
1
1
SYS_LED_MASK#<39>
3
SYS_LED_MASK#
LID_CL#
LID_CL#<30,39>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
H_2P8
H_2P8
1
H19
1
H6
@H6
@
@H7
@ H17
@
H_3P2
H_3P2
@
H_2P8
H_2P8
H_2P8
H_2P8
1
H17
H18
@H18
@
H_3P2
H_3P2
1
1
@
H_2P8
H_2P8
Fiducial Mark
FD1
@FD1
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
A A
FD2
@FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
5
H11
@H11
@
CLIP_C6
CLIP_C6
@ H24
@
CLIP_C6
CLIP_C6
H12
@ H12
@
H15
@H15
@
H_3P6
H_3P6
H_3P6
H_3P6
1
H24
1
H25
@H25
@
CLIP_C6
CLIP_C6
1
1
H3
@ H3
@
H_2P8
H_2P8
H_2P8
H_2P8
1
H16
@H16
@
@ H23
@
H_3P6
H_3P6
H_3P6
H_3P6
1
1
H_2P8
H_2P8
H_2P8
H_2P8
1
1
H23
1
4
H5
@ H5
@1H4
@H4
@
H2
@H2
@1H1
@H1
H9
@ H9
Page 44
5
TR1
D D
SW_ LAN_TX0+<31>
TR1
1
TD1+
4
1:1
1:1
TX1+
24
NB_LAN_ TX0+
3
2
+3.3V_LA N
1
SW_ LAN_TX0-<31>
+TRM_CT 1
+TRM_CT 2
SW_ LAN_TX1+<31>
1
1
SW_ LAN_TX1-<31>
C37
C37
C36
C36
2
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
C C
1
C38
C38
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
B B
+TRM_CT 3
+TRM_CT 4
1
C39
C39
2
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
SW_ LAN_TX2+<31>
SW_ LAN_TX2-<31>
SW_ LAN_TX3+<31>
SW_ LAN_TX3-<31>
2
TD1-
3
TDCT1
4
TDCT2
5
TD2+
6
TD2-
7
TD3+
8
TD3-
9
TDCT3
10
TDCT4
11
TD4+
12
TD4-
350uH_IH-1 15-F~D
350uH_IH-1 15-F~D
GND
CHASSIS
NB_LAN_ TX0-
23
TX1-
Z2805
22
TXCT1
Z2807
21
1:1
1:1
TXCT2
TX2+
TX2-
1:1
1:1
1:1
1:1
TX3+
TX3-
TXCT3
TXCT4
TX4+
TX4-
NB_LAN_ TX1+
20
NB_LAN_ TX1-
19
NB_LAN_ TX2+
18
NB_LAN_ TX2-
17
Z2806
16
Z2808
15
NB_LAN_ TX3+
14
NB_LAN_ TX3-
13
GND_CHA SSIS
1 2
C1104 1000 P_1808_3KV7K ~DC 1104 100 0P_1808_3KV7 K~D
R1089 15 0_0402_5%~DR1089 150_04 02_5%~D
LAN_ACT LED_YEL#<31>
LED_10_ GRN#<31>
LED_100 _ORG#<31>
12
12
12
R1113 75_0402_1%~DR1113 75_0402_1%~D
R1114 75_0402_1%~DR1114 75_0402_1%~D
R1111 75_0402_1%~DR1111 75_0402_1%~D12R1112 75_0402_1%~DR1112 75_0402_1%~D
1 2
NB_LAN_ TX3-
NB_LAN_ TX3+
NB_LAN_ TX1-
NB_LAN_ TX2-
NB_LAN_ TX2+
NB_LAN_ TX1+
NB_LAN_ TX0-
NB_LAN_ TX0+
R1091 1 50_0402_5%~DR1091 150_0 402_5%~D
1 2
R1090 150_0402_5%~ DR1090 150_0402_5% ~D
1 2
1
2
LAN_ACT LED_YEL#_R
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0603_10V4Z~D
1U_0603_10V4Z~D
C1169
C1169
1
2
470P_0402_50V7K~D
470P_0402_50V7K~D
C1168
C1168
C1167
C1167
1
2
JLOM1
JLOM1
10
Yellow LED+
9
Yellow LED-
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Green LED-
13
Orange LED-
12
Green-Orange LED+
TYCO_2041 334-1~D
TYCO_2041 334-1~D
GND
GND
15
14
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Docum ent Number R ev
Size Docum ent Number R ev
Size Docum ent Number R ev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
RJ45
RJ45
RJ45
LA-7731P
LA-7731P
LA-7731P
44 59Thursday, September 01 , 2011
44 59Thursday, September 01 , 2011
44 59Thursday, September 01 , 2011
1
0.3
0.3
0.3
Page 45
2
1
+5V_RUN
21
3
D80
D80
NC
NC
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
ESD ask to add D77, D83
1
2
12P_0402_50V8J~D
12P_0402_50V8J~D
C1204
C1204
HSYNC_L2
VSYNC_L2
+5V_RUN_CRT
1 2
L99
L99
BLM18BB600SN1D_0603~D
BLM18BB600SN1D_0603~D
1 2
L100
L100
BLM18BB600SN1D_0603~D
BLM18BB600SN1D_0603~D
1 2
L101
L101
BLM18BB600SN1D_0603~D
BLM18BB600SN1D_0603~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
BLM18AG121SN1D_0603~D
BLM18AG121SN1D_0603~D
1 2
1 2
BLM18AG121SN1D_0603~D
BLM18AG121SN1D_0603~D
R1645
R1645
R1644
R1644
L102
L102
L103
L103
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
@
@
1
C1205
C1205
2
@R1647
@
@R1646
@
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
12
12
1
2
R1647
R1646
22P_0402_50V8J~D
22P_0402_50V8J~D
22P_0402_50V8J~D
22P_0402_50V8J~D
@C1209
@
@C1210
@
1
C1209
C1210
2
3.3P_0402_50V8C~D
@
@
1
C1206
C1206
2
3.3P_0402_50V8C~D
3.3P_0402_50V8C~D
@
@
1
C1207
C1207
2
RED_CRT<23>
GREEN_CRT<23>
BLUE_CRT<23>
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
3
D77
D77
B B
1
PESD5V0U2BT_SOT23-3~D
2
3
D83
D83
1
12
12
R1641
R1641
150_0402_1%~D
150_0402_1%~D
12
R1642
R1642
R1643
R1643
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
DAT_DDC2_CRT<23>
CLK_DDC2_CRT<23>
HSYNC_CRT<23>
VSYNC_CRT<23>
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
1
1
C1202
C1202
C1203
C1203
2
2
1 2
R1648 0_0402_5%~DR1648 0_0402_5%~D
1 2
R1649 0_0402_5%~DR1649 0_0402_5%~D
+5V_RUN_CRT
0.5A_15V_SMD1812P050TFF30.5A_15V_SMD1812P050TF
21
F3
+CRT_VCC
0_1206_5%~D
0_1206_5%~D
@
@
R1640
R1640
1 2
T144
T144
R
G
JVGA_HS
B
+CRT_VCC
JVGA_VS
M_ID2#
1
C1208
C1208
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
1
C1201
C1201
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
NC
PAD~D
PAD~D
JCRT1
JCRT1
6
11
1
7
16
12
17
2
8
13
3
9
14
4
10
15
5
SUYIN_070546HR015M26QZR
SUYIN_070546HR015M26QZR
CONN@
CONN@
Combo Jack
JHP1
BLM18BD601SN1D_0603~DL 104 BLM18B D601SN1D_0603~DL104
MIC_IN_R<29>
AUD_HP_OUT_L<29>
A A
AUD_HP_OUT_R<29>
12
12
AUD_HP_OUT_L1
30.1_0402_1%~DR1650 30.1_0402_1%~DR1650
AUD_HP_OUT_R1
30.1_0402_1%~DR1651 30.1_0402_1%~DR1651
2
12
BLM18BD601SN1D_0603~DL 105 BLM18B D601SN1D_0603~DL105
12
BLM18BD601SN1D_0603~DL 106 BLM18B D601SN1D_0603~DL106
12
220P_0402_50V7K~D
220P_0402_50V7K~D
1
C1211
C1211
2
EXT_MIC
AUD_HP_OUT_L2
AUD_HP_OUT_R2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C1212
C1212
2
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
C1213
C1213
2
3
D81
D81
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
4
3
1
2
5
6
2
3
D82
D82
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
JHP1
SINGA_2SJ3053-100111F
SINGA_2SJ3053-100111F
CONN@
CONN@
R1652
R1652
0_0402_5%~D
0_0402_5%~D
1 2
Normal
Close
7
G
G
AUD_HP_NB_SENSE <29,39>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
Compal Electronics, Inc.
CRT & Combo Jack
CRT & Combo Jack
CRT & Combo Jack
LA-7731P
LA-7731P
LA-7731P
45 59Friday, September 02, 2011
45 59Friday, September 02, 2011
45 59Friday, September 02, 2011
0.3
0.3
0.3
Page 46
5
4
3
2
1
+COINCELL
COIN RTC Battery
12
PR1
PR1
1K_0402_5%~D
3
PD4
PD4
1
DOCK_SMB_ALERT# < 38,39>
PC6
PC6
PU1
PU1
1
2
TS5A63157DCKR_SC70-6~D
TS5A63157DCKR_SC70-6~D
1K_0402_5%~D
Z4012
2
1
2
NO
GND
NC3COM
+RTC_CELL
PC3
PC3
1U_0603_10V4Z~D
1U_0603_10V4Z~D
6
IN
5
V+
4
+5V_ALW
PS_ID <40>
JRTC1
JRTC1
1
2
GND
@
@
GND
ACES_50271-0020N-001
ACES_50271-0020N-001
1
2
3
4
+COINCELL
+3.3V_RTC_LDO
D D
RB715FGT106_UMD3
RB715FGT106_UMD3
ESD Diodes
PL2
PL2
FBMJ4516HS720NT_2P~D
PR11
1 2
D
S
D
S
1 3
PQ2
PQ2
FDV301N_G_NL_SOT23-3~D
FDV301N_G_NL_SOT23-3~D
G
G
2
C
C
PQ3
PQ3
MMST3904-7-F_SOT323~D
MMST3904-7-F_SOT323~D
E
E
3 1
FBMJ4516HS720NT_2P~D
1 2
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
1 2
12
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PC4
PC4
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR13
PR13
33_0402_5%~D
33_0402_5%~D
1 2
PR15
PR15
PBATT+
10K_0402_1%~D
10K_0402_1%~D
SLICE_BAT_PRES#<38,39, 55>
<BOM Structure>
<BOM Structure>
PR17
PR17
1 2
10K_0402_5%~D@
10K_0402_5%~D@
+3.3V_ALW
12
PR6
PR6
100K_0402_5%~D
100K_0402_5%~D
RB751VM-40TE-17 SOD-323
RB751VM-40TE-17 SOD-323
+3.3V_ALW
PR12
PR12
1 2
2.2K_0402_5%~D
2.2K_0402_5%~D
PBAT_PRES# <39>
PQ1
PQ1
FDN338P_G_NL_SOT23-3~D
PD5
PD5
1 2
FDN338P_G_NL_SOT23-3~D
1
3
1
3
1 3
2
2
2
PR10
PR10
1 2
0_0402_5%~D
0_0402_5%~D
NB_PSID_TS5A63157
12
1500P_0402_7K~D
1500P_0402_7K~D
DOCK_PSID<38> GPIO_PSID_SELECT <39>
PSID_DISABLE# <39>
PL3
PL3
PJP4
PJP4
+5V_ALW
12
1
@
@
PD1
PD1
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
Primary Battery Connector
SUYIN_200277GR009M262ZR
SUYIN_200277GR009M262ZR
1
1
2
2
3
3
4
4
12
PC5
PC5
C C
2200P_0402_50V7K~D
2200P_0402_50V7K~D
B B
@
@
PBATT1
PBATT1
5
5
6
6
7
7
8
8
9
9
10
GND
11
GND
NB_PSID
Z4304
Z4305
Z4306
2
3
PR7
PR7
100_0402_5%~D
100_0402_5%~D
GND
1 2
100_0402_5%~D
100_0402_5%~D
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
PR9
PR9
1 2
PL4
PL4
1
@
@
PD2
PD2
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
PR8
PR8
100_0402_5%~D
100_0402_5%~D
1 2
12
PR14
PR14
1 2
100K_0402_1%~D
100K_0402_1%~D
PR16
PR16
1 2
15K_0402_1%~D
15K_0402_1%~D
PBATT+_C
PBAT_SMBCLK <40>
PBAT_SMBDAT <40>
@ PR11
@
0_0402_5%~D
0_0402_5%~D
2
B
B
DC_IN+ Source
+DC_IN
PL5
PL5
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
ACES_50299-00501-003
ACES_50299-00501-003
7
GND
6
GND
-DCIN_JACK
5
5
4
4
+DCIN_JACK
3
PJPDC1
@ PJPDC1
@
3
2
2
1
1
12
PC18
PC18
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
5
A A
1
12
PC13
PC13
2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PL6
PL6
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PD13
PD13
@
@
12
VZ0603M260APT_0603
VZ0603M260APT_0603
PC16
PC16
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+DC_IN
PC10
PC10
12
PR23
@ PR23
@
4.7K_0805_5%~D
4.7K_0805_5%~D
12
1 2
PR20
PR20
1M_0402_5%~D
1M_0402_5%~D
0.022U_0805_50V7K~D
0.022U_0805_50V7K~D
12
PR26
PR26
4
PQ5
PQ5
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
S
2
S
3
S
4
G
PR24
PR24
1 2
10K_0402_5%~D
10K_0402_5%~D
1M_0402_5%~D
1M_0402_5%~D
8
D
7
D
6
D
5
D
SOFT_START_GC <55>
12
12
PC11
PC11
PC12
PC12
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+DC_IN_SS
12
12
12
PC15
PC14
PC14
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC15
PR22
PR22
10U_0805_25V6K
10U_0805_25V6K
100K_0402_5%~D
100K_0402_5%~D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+3.3V_ALW
+PWR_SRC
PR25
PR25
0_0402_5%
0_0402_5%
VSB_N_002
1 2
12
12
PC8
PC8
PR19
PR19
100K_0402_1%
PR21
PR21
22K_0402_1%
22K_0402_1%
1 2
VSB_N_003
13
D
D
PQ6
PQ6
2
G
SSM3K7002FU_SC70-3
G
SSM3K7002FU_SC70-3
S
S
12
PC17
PC17
.1U_0402_16V7K
.1U_0402_16V7K
100K_0402_1%
VSB_N_001
2
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
0.22U_0603_25V7K
0.22U_0603_25V7K
2
+PWR_SRC_S
13
12
PC9
PC9
PQ4
PQ4
0.1U_0603_25V7K
0.1U_0603_25V7K
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
LA-7731P
LA-7731P
LA-7731P
1
0.3
0.3
46 59Thursday, September 01, 2011
46 59Thursday, September 01, 2011
46 59Thursday, September 01, 2011
0.3
Page 47
A
B
C
D
E
2VREF_6182
1 1
1U_0603_16V6K
1U_0603_16V6K
PJP100
PJP100
1 2
PAD-OPEN 1x3m
+PWR_SRC
PAD-OPEN 1x3m
PL100
@PL100
@
1UH_PCMB053T-1R0MS_7A_ 20%
1UH_PCMB053T-1R0MS_7A_ 20%
2 2
12
+3.3V_ALWP
3.3VALWP
TDC 4.729A
Peak Current 6.756A
+DC1_PWR_SRC
12
12
PC102
PC102
PC100
PC100
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
+3.3V_RTC_LDO
+3.3V_ALW2
PR100
PR100
0_0402_5%
12
12
PC119
PC119
PC103
PC103
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
3 5
241
PL101
PL101
2.2UH_ETQP3W2R2W FN_8.5A_20%
2.2UH_ETQP3W2R2W FN_8.5A_20%
PC110
PC110
1
+
+
2
220U_D_6.3VM_R25M
220U_D_6.3VM_R25M
1 2
12
PR109
PR109
4.7_1206_5%
4.7_1206_5%
3 5
241
SNUB_3V
12
PC112
PC112
820P_0603_50V7K
820P_0603_50V7K
PQ100
PQ100
PQ102
PQ102
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
0_0402_5%
1 2
PC107
PC107
10U_0805_6.3V6M
10U_0805_6.3V6M
PC108
PC108
0.22U_0603_16V7K
0.22U_0603_16V7K
1 2
LX_3V
12
PR107
PR107
1 2
2.2_0603_5%
2.2_0603_5%
LG_3V
OCP current 8.107A
Rsd(on): tpe 10.8 m
3 3
max 13.6 m
+PWR_SRC
PD100
PD100
MMSZ5229BS_SOD323~D
MMSZ5229BS_SOD323~D
1 2
PR113
PR113
499K_0402_1%~D
499K_0402_1%~D
PR111
PR111
300K_0402_1%
300K_0402_1%
12
13.7K_0402_1%
13.7K_0402_1%
91K_0402_1%
91K_0402_1%
BST_3V
UG_3V
12
PC115
PC115
@
@
1U_0603_10V6K
1U_0603_10V6K
PR101
PR101
1 2
PR103
PR103
20K_0402_1%
20K_0402_1%
1 2
PR105
PR105
1 2
PU100
PU100
25
7
8
9
10
11
12
12
P PAD
VO2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2
2VREF_6182
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
ENTRIP2
3
PQ104B
PQ104B
5
4
PR115
PR115
2K_0402_1%~D
2K_0402_1%~D
1 2
ALWON<40>
PR116
4 4
THERM_STP#<22>
PR116
0_0402_5%
0_0402_5%
1 2
2
ENTRIP1
61
2
13
PQ105
PQ105
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
2N7002DW-T/R7_SOT363-6~D
PQ104A
PQ104A
PR114
PR114
100K_0402_1%
100K_0402_1%
1 2
+5V_ALW2
12
PC101
PC101
FB_3V
ENTRIP2
6
ENTRIP2
EN
13
+DC1_PWR_SRC
FB_5V
2
3
4
5
FB1
FB2
REF
TONSEL
SKIPSEL
VIN16GND
14
17
15
12
PC114
PC114
4.7U_0805_10V6K
4.7U_0805_10V6K
12
PC116
PC116
0.1U_0603_25V7K
0.1U_0603_25V7K
+5V_ALWP
+3.3V_ALWP
PR102
PR102
30.9K_0402_1%
30.9K_0402_1%
1 2
PR104
PR104
20K_0402_1%
20K_0402_1%
1 2
PR106
PR106
91K_0402_1%
91K_0402_1%
ENTRIP1
1 2
1
ENTRIP1
24
VO1
23
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
NC18VREG5
BST_5V
22
UG_5V
21
LX_5V
20
LG_5V
19
RT8205LZQW(2) WQFN 24P PW M
RT8205LZQW(2) WQFN 24P PW M
+5V_ALW2
PJP102
PJP102
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP103
PJP103
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PR108
PR108
1 2
2.2_0603_5%
2.2_0603_5%
100K_0402_1%
100K_0402_1%
PR112
PR112
12
12
+DC1_PWR_SRC
12
12
PC106
PC106
PC105
PC105
PC104
PC104
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
PC109
PC109
0.22U_0603_16V7K
0.22U_0603_16V7K
BST1_5VBST1_3V
1 2
+3.3V_ALW
1 2
(5A,180mils ,Via NO.= 9)
+5V_ALW
PC121
PC121
@
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
(4A,120mils ,Via NO.= 6)
+3.3V_ALW
PC120
PC120
@
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
12
12
PC118
PC118
PQ101
PQ101
@
@
10U_0805_25V6K
10U_0805_25V6K
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PQ103
PQ103
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
ALW_PWRGD_3V _5V <40>
3 5
241
12
PR110
PR110
4.7_1206_5%
4.7_1206_5%
3 5
241
SNUB_5V
12
PL102
PL102
3.3UH_ETQP3W3R3W FN_7A_20%
3.3UH_ETQP3W3R3W FN_7A_20%
1 2
1
+
+
PC111
PC111
2
220U_D_6.3VM_R25M
220U_D_6.3VM_R25M
PC113
PC113
820P_0603_50V7K
820P_0603_50V7K
+5V_ALWP
5VALWP
TDC 4.656A
Peak Current 6.637A
OCP current 7.964A
Rsd(on): tpe 10.8 m
max 13.6 m
12
Compal Electronics, Inc.
Compal Electronics, Inc.
PC117
PC117
@
@
1U_0603_10V6K
1U_0603_10V6K
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
LA-7731P
LA-7731P
LA-7731P
47 59Thursday, September 01, 2011
47 59Thursday, September 01, 2011
47 59Thursday, September 01, 2011
E
0.3
0.3
0.3
Page 48
5
4
3
2
1
0.75Volt +/- 5%
TDC 0.525A
PJP200
+PWR_SRC
D D
1.5Volt +/- 5%
TDC 7.14A
Peak Current 10.2A
OCP current 12.24A
Rsd(on): tpe 3.6 m
max 4.5 m
+1.5V_MEN_P
C C
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
B B
PJP200
1 2
@
@
PAD-OPEN 4x4m
PAD-OPEN 4x4m
1UH_ETQ P3W1R0W FN_11.8A_20 %
1UH_ETQ P3W1R0W FN_11.8A_20 %
1 2
1
+
+
PC208
PC208
330U_SX_2VY~D
330U_SX_2VY~D
2
PL200
PL200
1.5V_B+
12
PR203
PR203
@
@
PJP204
PU200
PU200
PAD
GND
PJP204
PAD-OPEN 1x1m
PAD-OPEN 1x1m
21
1
2
3
4
5
1 2
12
+V_DDR_ REF
VDDQ_1.5 V
PR207
@ PR20 7
@
0_0402_ 5%~D
0_0402_ 5%~D
PR209
PR209
0_0402_ 5%~D
0_0402_ 5%~D
+1.5V_MEN_P
+1.5V_MEN_P
12
12
PR200
PR200
1 2
2.2_0603 _5%~D
2.2_0603 _5%~D
12
12
PC200
PC200
PC201
PC201
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
12
4.7_1206_5%
4.7_1206_5%
12
PC209
@ PC209
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
DDR_ON<40>
SIO_SLP_S 4#<16 ,39,42>
12
PC202
PC202
PC203
PC203
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
5
PQ200
PQ200
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
123
5
PQ202
PQ202
123
4
+5V_ALW
4
1 2
PC204
PC204
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
PR202
PR202
5.1_0603 _5%~D
5.1_0603 _5%~D
1 2
PC210
PC210
1U_0603 _10V6K~D
1U_0603 _10V6K~D
+3.3V_ALW
12
PR204
PR204
100K_04 02_1%~D
100K_04 02_1%~D
12
PC212
PC212
0.1U_040 2_16V7K~D
0.1U_040 2_16V7K~D
@
@
1.5V_SUS _PWRGD<40>
PR206
@P R206
@
0_0402_ 5%~D
0_0402_ 5%~D
1 2
PR210
PR210
0_0402_ 5%~D
0_0402_ 5%~D
1 2
SIR466DP-T1-GE3_POWERPAK8-5
SIR466DP-T1-GE3_POWERPAK8-5
BOOT_1.5 V
DH_1.5V
SW_ 1.5V
DL_1.5V
PR201
PR201
5.1K_040 2_1%~D
5.1K_040 2_1%~D
1 2
PC207
PC207
1U_0603 _10V6K~D
1U_0603 _10V6K~D
S5_1.5V
CS_1.5V
VDD_1.5V
+5V_ALW
PGOOD_1 .5V
1.5V_B+
0.75V_DD R_VTT_ON<39>
16
15
LGATE
14
PGND
13
CS
RT8207M ZQW_W QFN20_3X3
RT8207M ZQW_W QFN20_3X3
12
VDDP
11
VDD
10
PR205
PR205
1M_0402 _1%~D
1M_0402 _1%~D
1 2
PR208
PR208
0_0402_ 5%~D
0_0402_ 5%~D
1 2
17
PHASE
UGATE
PGOOD
TON
9
VLDOIN_1.5 V
18
20
19
BOOT
S5
8
VTT
VLDOIN
VTTGND
VTTSNS
VTTREF
VDDQ
FB
S3
6
7
Peak Current 0.75A
OCP Current 0.9A
12
12
PC205
PC205
PC206
PC206
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+1.5V_MEN_P
PC213
PC213
0.1U_040 2_16V7K~D
0.1U_040 2_16V7K~D
@
@
+0.75V_P
+V_DDR_REF
PC211
PC211
0.033U_0 402_16V7~D
0.033U_0 402_16V7~D
PJP201
PJP201
2
112
JUMP_1x3m@
JUMP_1x3m@
PJP202
+1.5V_MEN_P
A A
2
PJP202
JUMP_1x3m@
JUMP_1x3m@
112
+1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
PJP203
PJP203
12
PAD-OPEN 1x1m
PAD-OPEN 1x1m
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Docum ent Number R ev
Size Docum ent Number R ev
Size Docum ent Number R ev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
LA-7731P
LA-7731P
LA-7731P
48 59Thursday, September 01 , 2011
48 59Thursday, September 01 , 2011
48 59Thursday, September 01 , 2011
1
0.3
0.3
0.3
Page 49
A
1 1
PJP301
+3.3V_ALW
RUN_ON<35,39,42>
2 2
SIO_SLP_S3#<11,16,35,39,42>
PJP301
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
PR303 0_0402_5%@PR3 03 0_0402_5%@
PR306 0_0402_5%PR306 0_0402_5%
12
1 2
1 2
PC300
PC300
22U_0805_6.3VAM
22U_0805_6.3VAM
EN_1.8VSPEN_1.8VSP
1.8VSP_VIN
12
PC307
PC307
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR304
@PR30 4
@
47K_0402_5%
47K_0402_5%
12
12
B
PR300
PR300
12
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
1.8V_RUN_PWRGD <39>
PL301
1 2
PR301
PR301
4.7_0805_5%~D
4.7_0805_5%~D
PC305
PC305
820P_0603_50V7K
820P_0603_50V7K
PL301
PR302
PR302
20K_0402_1%
20K_0402_1%
PR305
PR305
10K_0402_1%
10K_0402_1%
PU300
PU300
4
10
9
8
5
PC304
PC304
@
@
0.1U_0402_10V7K
0.1U_0402_10V7K
LX
PVIN
PG
LX
PVIN
SVIN
FB
EN
TP
NC
7
11
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
1.8VSP_LX
2
3
1.8VSP_FB
6
NC
1
1UH_PH041H-1R0MS_3.8A_20 %
1UH_PH041H-1R0MS_3.8A_20 %
12
SNUB_1.8VSP
12
C
D
1.8Volt +/-5%
TDC 0.85A
Peak Current 1.215A
OCP current 1.458A
47P_0402_50V8J~D
47P_0402_50V8J~D
+1.8V_RUNP
12
12
12
PC301
PC301
12
22P_0402_50V8J
22P_0402_50V8J
12
12
PC306
PC306
PC303
PC302
PC302
PC303
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR64/PR67)=0.6*(1+20K/10K)=1.8V
PJP300
PJP300
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
+1.8V_RUNP
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
C
+1.8V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
LA-7731P
LA-7731P
LA-7731P
D
49 59Thursday, September 01, 2011
49 59Thursday, September 01, 2011
49 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 50
5
D D
PR402
PR402
73.2K_0402_1%
73.2K_0402_1%
1 2
PR403
PR403
0_0402_5%
SIO_SLP_A#<16,39,42>
0_0402_5%
1 2
S0 mode be high level
C C
PC407
PC407
0.1U_0402_16V7K
0.1U_0402_16V7K
1.05V_A_PWRGD<40>
12
@
@
+3.3V_ALW
PR400
PR400
100K_0402_1%~D
100K_0402_1%~D
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
12
PR405
PR405
470K_0402_1%
470K_0402_1%
12
4
PU400
PU400
1
2
3
4
5
4.99K_0402_1%
4.99K_0402_1%
VBST
PGOOD
TRIP
DRVH
EN
VFB
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
PR406
PR406
SW
V5IN
DRVL
TP
12
10
9
8
7
6
11
BST_+V1.05SP
UG_+V1.05SP
SW_+V1.05SP
LG_+V1.05SP
+5V_ALW
12
PC405
PC405
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
3
PR401
PR401
2.2_0603_5%
2.2_0603_5%
1 2
PC404
PC404
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
PQ400
PQ400
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PQ401
PQ401
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
2
+V1.05SP_B+
12
12
12
PC402
PC402
PC401
PC401
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
3 5
241
PL400
PL400
3.3UH_ETQP3W3R3 WFN_7A_20%
3.3UH_ETQP3W3R3 WFN_7A_20%
1 2
12
PR404
PR404
4.7_1206_5%
4.7_1206_5%
3 5
241
12
PC408
PC408
680P_0603_50V7K
680P_0603_50V7K
PC403
PC403
4.7U_0805_25V6K
4.7U_0805_25V6K
12
PC400
PC400
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
4.7U_0805_25V6K
4.7U_0805_25V6K
PJP400
PJP400
PC406
PC406
1
+PWR_SRC
+1.05V_MP
1
+
+
2
330U_2.5V_M
330U_2.5V_M
+1.05Volt +/- 5%
PR407
B B
A A
5
PR407
10K_0402_1%
10K_0402_1%
1 2
+1.05V_MP
@
2
JUMP_43X118
JUMP_43X118
112
+1.05V_M
PJP402
@PJP402
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
2
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
TDC 4.7A
Peak Current 6.5A
OCP current 7.8A
Rsd(on): tpe 10.8 m
max 13.6 m
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+1.05V_M
+1.05V_M
+1.05V_M
LA-7731P
LA-7731P
LA-7731P
1
0.3
0.3
0.3
50 59Thursday, September 01, 2011
50 59Thursday, September 01, 2011
50 59Thursday, September 01, 2011
Page 51
5
4
3
+V1.05S_VCCPP_B+
2
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
PJP500
PJP500
1
+PWR_SRC
+3.3V_RUN
12
12
12
D D
1.05V_VTTPWRGD<40,52>
PR501
PR501
84.5K_0402_1%~D
84.5K_0402_1%~D
1 2
PR503
PR503
0_0402_5%
0_0402_5%
CPU_VTT_ON<39>
C C
1 2
@
@
PC506
PC506
0.1U_0402_16V7K
0.1U_0402_16V7K
12
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
12
PR505
PR505
470K_0402_1%
470K_0402_1%
PR500
PR500
100K_0402_5%
100K_0402_5%
1 2
PU500
PU500
1
PGOOD
2
TRIP
3
EN
4
VFB
5
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
PR507
PR507
4.32K_0402_1%
4.32K_0402_1%
12
VBST
DRVH
V5IN
DRVL
PQ500
PQ500
FDMC8884_POWER33-8- 5
PC504
PR502
PR502
2.2_0603_5%
2.2_0603_5%
1 2
BST_+V1.05S_VCCPP
10
UG_+V1.05S_VCCPP
9
SW_+V1.05S_VCCPP
8
SW
7
LG_+V1.05S_VCCPP
6
11
TP
PC504
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
+5V_ALW
12
PC505
PC505
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
PQ501
PQ501
FDMC8884_POWER33-8- 5
3 5
241
3 5
241
1UH_ETQP3W1R0 WFN_11.8A_20%
1UH_ETQP3W1R0 WFN_11.8A_20%
12
PR504
PR504
4.7_1206_5%
4.7_1206_5%
12
PC508
PC508
680P_0603_50V7K
680P_0603_50V7K
PC502
PC502
PC501
PC501
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
PL500
PL500
1 2
VSSIO_SENSE_R_FB
12
PC503
PC503
4.7U_0805_25V6K
4.7U_0805_25V6K
12
@
@
PC510
PC510
.1U_0402_16V7K
.1U_0402_16V7K
0_0402_5%
0_0402_5%
<BOM Structure>
<BOM Structure>
0_0402_5%
0_0402_5%
<BOM Structure>
<BOM Structure>
PC500
PC500
4.7U_0805_25V6K
4.7U_0805_25V6K
PR508
PR508
PR513
PR513
+1.05VTTP
1
+
+
PC507
PC507
2
330U_2.5V_M
330U_2.5V_M
12
12
VTT_SENSE <10>
VSSIO_SENSE_R <10>
12
PR509
PR509
71.5K_0402_1%
B B
PR510
PR510
10K_0402_1%
10K_0402_1%
1 2
12
PR514
@PR51 4
@
10_0402_1%~D
10_0402_1%~D
A A
5
71.5K_0402_1%
PQ502
PQ502
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
13
D
D
S
S
PC509
PC509
@
@
4
+3.3V_RUN
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
PR511
PR511
10K_0402_5%
10K_0402_5%
1 2
2
G
G
PJP501
PJP501
12
.01U_0402_16V7K~D
.01U_0402_16V7K~D
+1.05VTTP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
PJP502
PJP502
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
VCCP_PWRCTRL <10>
+1.05V_RUN_VTT
3
From GPIO
DELL CONFIDENTIAL/PROPRIETARY
2
+1.05Volt +/- 5%
TDC 6A
Peak Current 8.5A
OCP current 10.2A
Rsd(on): tpe 10.8 m
max 13.6 m
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
LA-7731P
LA-7731P
LA-7731P
51 59Thursday, September 01, 2011
51 59Thursday, September 01, 2011
51 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 52
5
4
3
2
1
VID [0] VID[1] VCCSA Vout
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
PR601
PR601
1K_0402_5%
D D
PR600
PR600
0_0402_5%
0_0402_5%
VCCSAPWROK<40>
12
+3.3V_RUN
12
PR603
PR603
100K_0402_5%
100K_0402_5%
+VCCSA_PWRGD+VCCSA_PWRGD
1K_0402_5%
PR602
PR602
0_0402_5%
0_0402_5%
1 2
PR604
PR604
0_0402_5%
0_0402_5%
1 2
PR605
PR605
1K_0402_5%
1K_0402_5%
12
VCCSA_VID_1 <11>
VCCSA_VID_0 <11>
12
+5V_ALW
PR606
PR606
10_0402_1%
12
3300P_0402_50V7K
3300P_0402_50V7K
10_0402_1%
19
20
21
22
23
24
PC617
PC617
12
PU600
PU600
PGND
PGND
PGND
VIN
VIN
VIN
PC602
PC602
2.2U_0603_10V7K
2.2U_0603_10V7K
1 2
C C
2
PC613
PC613
PC614
PC614
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
10U_0805_25V6M
10U_0805_25V6M
GNDA_VCCSA
2
PC615
PC615
1
1
10U_0805_25V6M
10U_0805_25V6M
PC616
PC616
0.22U_0402_10V6K
0.22U_0402_10V6K
1
PC600
PC600
2
2200P_0402_50V7K
+3.3V_ALW
B B
PJP600
PJP600
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
2200P_0402_50V7K
+VCCSA_PWR_SRC +VC CSA_PWR_SRC
PC601
PC601
1 2
1U_0603_10V6K
1U_0603_10V6K
12
18
17
V5FILT
V5DRV
TPS51461RGER_QFN24_4X4~D
TPS51461RGER_QFN24_4X4~D
GND
VREF
1
2
12
PR613
PR613
5.1K_0402_1%~D
5.1K_0402_1%~D
+VCCSA_EN
16
PGOOD
COMP
3
PC618
PC618
13
14
15
EN
VID0
VID1
SLEW
4
1 2
0.01U_0402_25V7K
0.01U_0402_25V7K
12
BST
+VCCSA_PHASE
11
SW
10
SW
9
SW
8
SW
7
SW
25
TP
VOUT
MODE
5
6
@PR610
@
33K_0402_5%
33K_0402_5%
PR610
PR608
PR608
2.2_0603_1%
2.2_0603_1%
1 2
12
PR607
PR607
0_0402_5%
0_0402_5%
1 2
12
12
+VCCSA_BT_1+VCCSA_BT
PR609
@PR609
@
4.7_1206_5%
4.7_1206_5%
PC604
@ PC604
@
1000P_0603_50V7K
1000P_0603_50V7K
1.05V_VTTPWRGD <40,51>
PC603
PC603
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL600
PL600
1 2
PC605
PC605
PC606
PC606
1 2
@
@
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable netw ork
VCCSA
TDC 4.2A
Peak Current 6 A
OCP current 7.2 A
22U_0805_6.3V6M
22U_0805_6.3V6M
1 2
12
PC607
PC607
0.1U_0402_10V7K
0.1U_0402_10V7K
PR611
PR611
100_0402_5%
100_0402_5%
PR612
PR612
0_0402_5%
0_0402_5%
PC609
PC609
PC608
PC608
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC611
PC611
PC610
PC610
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_50V7K
2200P_0402_50V7K
VCCSA_SENSE <11>
PC612
PC612
1 2
+VCCSA_P
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
PJP601
PJP601
+VCCSA_P
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP602
PJP602
PAD-OPEN1x1m
PAD-OPEN1x1m
+VCC_SA
12
GNDA_VCCSA
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+VCC_SA
+VCC_SA
+VCC_SA
LA-7731P
LA-7731P
LA-7731P
1
52 59Thursday, September 01, 2011
52 59Thursday, September 01, 2011
52 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 53
5
VCC_AXG_SENSE<11>
VSS_AXG_SENSE<11>
D D
VSUMG+
12
12
PR707
PR707
2.61K_0402_1%
2.61K_0402_1%
12
PH700
PH700
VSUMG-
12
PC711
PC711
.1U_0402_16V7K
PR712
PR712
1 2
3.83K_0402_1%
3.83K_0402_1%
C C
H_PROCHOT#<7,40,54>
+1.05V_RUN_VTT
PR730 54.9_0402_1%PR730 54.9_0402_1%
PR735 75_0402_5%@ PR735 75_0402_5%@
B B
PR737 130_0402_1%PR737 130_0402_1%
A A
.1U_0402_16V7K
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR715
PR715
27.4K_0402_1%
27.4K_0402_1%
1 2
SCLK
12
ALERT#
12
SDA
12
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
12
PH701
PH701
12
PR724
@PR724
@
0_0402_5%
0_0402_5%
12
PR709
PR709
11K_0402_1%
11K_0402_1%
VIDSCLK<10>
VIDALERT_N<10>
VIDSOUT<10>
12
12
PC707
PC707
0.022U_0402_25V7K
0.022U_0402_25V7K
VSUMG-
+5V_RUN
PC719
PC719
43P_0402_50V8J~D
43P_0402_50V8J~D
12
PC708
PC708
.1U_0603_16V7K~D
.1U_0603_16V7K~D
PR716 0_0402_5%PR716 0_0402_5%
PR718 0_0402_5%PR718 0_0402_5%
PR719 0_0402_5%PR719 0_0402_5%
PR721 0_0402_5%PR721 0_0402_5%
IMVP_VR_ON<39>
1.05V_0.8V_PWROK<14,40>
1 2
3.83K_0402_1%
3.83K_0402_1%
PC709
PC709
0.068U_0402_16V7K
0.068U_0402_16V7K
PC712
@PC712
@
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PC713
@PC713
@
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
1 2
0_0402_5%
0_0402_5%
1 2
1 2
1 2
1 2
PR725
PR725
PR713
PR713
+5V_RUN
VSUM+
PR746
PR746
2.61K_0402_1%
2.61K_0402_1%
PH703
PH703
VSUM-
PC743
PC743
.1U_0402_16V7K
.1U_0402_16V7K
5
330P_0402_50V7K~D
330P_0402_50V7K~D
0.01U_0402_50V7K
0.01U_0402_50V7K
PR710
@PR710
@
649_0402_1%~D
649_0402_1%~D
1 2
PR711
PR711
357_0402_1%
357_0402_1%
1 2
12
12
ALERT#
SDA
VR_HOT#
PR722 0_0402_5%@ PR722 0_0402_5%@
1 2
1 2
PR723 0_0402_5%PR723 0_0402_5%
12
PH702
PH702
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR727
PR727
27.4K_0402_1%
27.4K_0402_1%
12
PC720 10P_0402_25V8JPC720 10P_0402_25V8J
COMP
PR732 0_0402_5%@ PR732 0_0402_5%@
1 2
PC724
@PC724
@
PC726
PC726
VSUM-
PC728
PC728
12
12
12
PR747 11K_0402_1%PR747 11K_04 02_1%
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
12
PC703
PC703
@
@
12
PC706
PC706
1 2
12
@PC710
@
3300P_0402_50V7K~D
3300P_0402_50V7K~D
ISEN1G
ISEN2G
NTCG
SCLK
VR_EN
NTC
12
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PC739
PC739
PC738
PC738
@PR754
@
1 2
649_0402_1%~D
649_0402_1%~D
4
PC710
PU700
PU700
1
2
3
4
5
6
7
8
9
10
41
12
0.22U_0603_10V7K
0.22U_0603_10V7K
PC740
@ PC740
@
PR754
4
39
40
ISUMNG
ISUMPG
ISEN1G
ISEN2G
NTCG
SCLK
ALERT#
SDA
VR_HOT#
VR_ON
NTC
TP
11
ISEN3
ISEN2
0.068U_0402_16V7K
0.068U_0402_16V7K
PR750
PR750
392_0402_1%~D
392_0402_1%~D
@
@
PC744
PC744
1 2
2200P_0402_25V7K~D
2200P_0402_25V7K~D
PR702
PR702
2.55K_0402_1%
2.55K_0402_1%
PR704
PR704
499_0402_1%~D
499_0402_1%~D
@PR708
@
1 2
0_0402_5%
0_0402_5%
PGOODG
37
38
36
35
34
FBG
RTNG
COMPG
PWM2G
PGOODG
ISEN212FB17ISUMP14ISEN3/FB2
RTN16ISEN1
15
13
ISEN1
12
12
PC704
PC704
12
470P_0402_50V7K~D
470P_0402_50V7K~D
PR708
IMVP_PWRGD
33
32
31
BOOT1G
LGATE1G
PHASE1G
UGATE1G
30
BOOT2
29
UGATE2
28
PHASE2
27
LGATE2
26
VCCP
25
VDD
24
PWM3
23
LGATE1
22
PHASE1
21
UGATE1
COMP
PGOOD19ISUMN
BOOT1
18
20
ISL95836HRTZ-T_TQFN40_5X5~D
ISL95836HRTZ-T_TQFN40_5X5~D
PGOOD
COMP
PR726 0_0402_5%PR726 0_0402_5%
1 2
PR736
PR736
499_0402_1%~D
499_0402_1%~D
2.1K_0402_1%~D
2.1K_0402_1%~D
@
@
PC737
PC737
1 2
330P_0402_50V7K
330P_0402_50V7K
PC741
PC741
1 2
0.01U_0402_50V7K
0.01U_0402_50V7K
3
PR701
2K_0402_1%
2K_0402_1%
267K_0402_1%
267K_0402_1%
12
BOOT1
PR728 1.91K_0402_1%PR728 1.91K_0402_1%
PC722
PC722
470P_0402_50V7K~D
470P_0402_50V7K~D
12
PR740
PR740
12
PR703
PR703
12
PR701
12
12
1 2
33P_0402_50V8J~D
33P_0402_50V8J~D
LGATE1G
PHASE1G
UGATE1G
BOOT1G
BOOT2
UGATE2
PHASE2
LGATE2
LGATE1
PHASE1
UGATE1
IMVP_PWRGD <39>
12
PR741
PR741
267K_0402_1%
267K_0402_1%
PR744
PR744
1 2
2K_0402_1%
2K_0402_1%
PC701
PC701
330P_0402_50V7K~D
330P_0402_50V7K~D
12
PC702
PC702
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC705
PC705
VCCP
PWM3
+3.3V_RUN
PC723
PC723
12
22P_0402_50V8J~D
22P_0402_50V8J~D
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC729
PC729
1 2
680P_0402_50V7K~D
680P_0402_50V7K~D
VCCSENSE <10>
VSSSENSE <10>
PC727
PC727
12
12
0.22U_0603_16V7K
0.22U_0603_16V7K
2.2_0603_5%
2.2_0603_5%
PR714
PR714
0_0402_5%
0_0402_5%
1 2
12
PC714
PC714
1U_0603_10V6K
1U_0603_10V6K
21K_0402_1%~D
21K_0402_1%~D
1 2
BOOT1
LGATE1
PR705
PR705
150K_0402_1%~D
150K_0402_1%~D
PC750
PC750
PR763
PR763
1 2
12
PC715
PC715
1U_0603_10V6K
1U_0603_10V6K
UGATE2
PHASE2
BOOT2
LGATE2
PR742
PR742
2.2_0603_5%
2.2_0603_5%
PR717
PR717
0_0402_5%~D
0_0402_5%~D
PR720
PR720
1_0402_1%~D
1_0402_1%~D
2.2_0603_5%
2.2_0603_5%
UGATE1
PHASE1
PR749
PR749
VCC_GFXCORE
TDC 21.5A
Peak Current 33A
OCP current 57.18A
Load line -3.9mV/A
5
PQ708
PQ708
4
123
5
PQ711
PQ711
1 2
4
12
213
+5V_ALW
12
PQ700
PQ700
4
PR729
PR729
1 2
12
PC721
PC721
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
0.22U_0603_16V7K
0.22U_0603_16V7K
4
PQ704
PQ704
4
1 2
12
PC742
PC742
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
0.22U_0603_16V7K
0.22U_0603_16V7K
4
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ710
PQ710
4
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
5
5
5
123
5
213
DELL CONFIDENTIAL/PROPRIETARY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD P ARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
12
PC746
PC746
10U_0805_25V6K
10U_0805_25V6K
5
VCC_core
TDC 36A
Peak Current 53A
OCP current 64A
Load line -1.9mV/A
Icc_Dyn_VID1 43A
123
PQ703
PQ703
213
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PQ706
PQ706
4
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
2
213
PR760
PR760
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PQ702
PQ702
5
4
+VCC_PWR_SRC
5
213
12
4.7_1206_5%
4.7_1206_5%
12
+VCC_PWR_SRC
213
PC733
PC733
PQ707
PQ707
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PC751
PC751
820P_0603_50V7K
820P_0603_50V7K
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
12
10U_0805_25V6K
10U_0805_25V6K
1
PJP702
PJP702
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PL703
@PL703
@
HCB4532KF-800T90_1812
+GFX_PWR_SRC
12
PC749
PC749
PC747
PC747
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
12
PC716
PC716
PC717
PC717
10U_0805_25V6K
10U_0805_25V6K
12
PR731
PR731
4.7_1206_5%
4.7_1206_5%
12
PC725
PC725
820P_0603_50V7K
820P_0603_50V7K
12
PC734
PC734
PC736
PC736
10U_0805_25V6K
10U_0805_25V6K
12
PR751
PR751
4.7_1206_5%
4.7_1206_5%
12
PC745
PC745
820P_0603_50V7K
820P_0603_50V7K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
HCB4532KF-800T90_1812
1 2
12
12
PC752
PC752
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PL704
PL704
1
PR758
PR758
1 2
10U_0805_25V6K
10U_0805_25V6K
ISEN2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
ISEN1
VSUM+
4
3
3.65K_0603_1%
3.65K_0603_1%
12
PC700
PC700
10K_0603_1%
10K_0603_1%
VSUM+
3.65K_0603_1%
3.65K_0603_1%
12
10K_0603_1%
10K_0603_1%
3.65K_0603_1%
3.65K_0603_1%
VSUM-
GP1_Vo
2
12
PR759
PR759
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
@PL700
@
HCB4532KF-800T90_1812
HCB4532KF-800T90_1812
1 2
12
12
PC753
PC753
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PR733
PR733
1 2
PR738
PR738
1 2
VSUM-
PC754
PC754
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PR752
PR752
1 2
PR755
PR755
1 2
P2_SW
PR743
PR743
1_0402_5%
1_0402_5%
1
+
+
12
PC730
PC730
2
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
P1_SW
PR757
PR757
1_0402_5%
1_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+VCC_CORE
+VCC_CORE
+VCC_CORE
LA-7731P
LA-7731P
LA-7731P
+VCC_GFXCORE
1_0402_5%
1_0402_5%
VSUMG-VSUMG+
PJP700
PJP700
PL700
PL701
PL701
4
3
12
1
+
+
PC731
PC731
2
33U_25V_M
33U_25V_M
33U_25V_M
33U_25V_M
PL702
PL702
4
3
1
2
12
1
+PWR_SRC
1
2
P2_Vo
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
+VCC_CORE
P1_Vo
@PR753
@
10K_0402_1%
10K_0402_1%
@PR756
@
10K_0402_1%
10K_0402_1%
53 59Thursday, Septem ber 01, 2011
53 59Thursday, Septem ber 01, 2011
53 59Thursday, Septem ber 01, 2011
+PWR_SRC
+VCC_CORE
PR734
@PR734
@
ISEN1
12
PR739
@PR739
@
ISEN3
12
PR753
ISEN2
12
PR756
ISEN3
12
0.3
0.3
0.3
Page 54
A
PD800@
PD800@
2 1
ES2AA-13-F
ES2AA-13-F
PQ800
PQ800
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
8
+DC_IN_SS
1 1
ISL88731C
7
5
E2 AC_OK=17.7 Volt
PR218
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
49.9K_0402_1%~D
49.9K_0402_1%~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
2 2
GNDA_CHG
CHARGER_SMBCLK<40>
CHARGER_SMBDAT<40>
PR815
PR815
12
PC808
PC808
12
+5V_ALW
PC815
PC815
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+SDC_IN
PR813
PR813
1 2
226K_0402_1%~D
226K_0402_1%~D
GNDA_CHG
MAX8731A_LDO
ACAV_IN<22,40,55>
12
MAX8731_IINP<22>
1
2
36
4
PR802
PR802
1 2
0_0402_5%~D
0_0402_5%~D
MAX8731_REF
12
@
@
PR811
PR810
PR810
PR811
10K_0402_1%~D
10K_0402_1%~D
12
PR814
PR814
@
@
15.8K_0402_1%~D
15.8K_0402_1%~D
12
PR825
PR825
@
@
8.45K_0402_1%~D
8.45K_0402_1%~D
10K_0402_5%~D
10K_0402_5%~D
12
DC_BLOCK_GC < 55>
+CHGR_DC_IN<55>
PR818
PR818
1 2
0_0402_5%~D
0_0402_5%~D
12
PR822
PR822
2.2K_0402_1%~D
2.2K_0402_1%~D
12
PC823
PC823
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
CSS_GC<55>
+DOCK_PWR_BAR
+DC_IN_SS
BAT54CW_SOT323~D
BAT54CW_SOT323~D
PC825
PC825
Maximum charging current is 7.2A
3 3
4 4
DYN_TUR_CURRENT_SET#
90W
130W
DYN_TUR_CURRNT_SET#<40>
High
Low
PQ807
PQ807
2N7002W-7-F 1N SOT323
2N7002W-7-F 1N SOT323
+3.3V_ALW2
12
PR837
PR837
150K_0402_1%~D
150K_0402_1%~D
12
12
PR844
PR844
PR843
PR843
150K_0402_1%~D
150K_0402_1%~D
66.5K_0402_1%~D
66.5K_0402_1%~D
13
D
D
2
G
G
S
S
MAX8731_IINP
12
PC840
PC840
100P_0402_50V8J~D
100P_0402_50V8J~D
PR839
PR839
20K_0402_1%~D
20K_0402_1%~D
1 2
12
@
@
Adapter Protection Circuit fot Turbo Mode
+5V_ALW
PC839
PC839
220P_0402_50V8J~D
220P_0402_50V8J~D
12
PC835
PC835
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
12
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
@
@
2
3
PR809
@PR809
@
1 2
1_0805_5%~D
1_0805_5%~D
GNDA_CHG
12
PC836
PC836
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
3
2
B
1 2
PD801
PD801
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
1.8M_0402_1%
1.8M_0402_1%
1 2
8
PU801A
PU801A
P
+
O
-
G
LM393DR_SO8~D
LM393DR_SO8~D
4
+SDC_IN
PR803
PR803
0_0402_5%~D
0_0402_5%~D
1
PC806
PC806
GNDA_CHG
PR836
PR836
1
@
@
12
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
GNDA_CHG
+DCIN
12
MAX8731_IINP
MAX8731_REF
+5V_ALW
PR831
PR831
PC800
PC800
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PQ802
PQ802
PC803
PC803
1 2
1 2
22
2
13
11
10
9
14
8
6
5
4
3
7
12
29
221K_0402_1%~D
221K_0402_1%~D
2
PR801
PR801
0.01_1206_1%~D
0.01_1206_1%~D
4
3
13
D
D
2
G
G
S
S
CSSP_1
PR804
PR804
10K_0402_5%~D
10K_0402_5%~D
12
PR805
PR805
10_0402_5%~D
10_0402_5%~D
PC804
PC804
0.047U_0603_25V7M~D
0.047U_0603_25V7M~D
1 2
1
28
PU800
PU800
DCIN
CSSP
ICREF
ACIN
ACOK
VDDSMB
SCL
SDA
NC
VICM
FBO
EAI
EAO
VREF
CE
GND
TP
ISL88731CHRTZ-T TQFN
ISL88731CHRTZ-T TQFN
PR835
PR835
0_0402_5%~D
0_0402_5%~D
1 2
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
PQ806A
PQ806A
61
1
2
13
D
D
2
G
G
S
S
CSSN_1
12
12
PR806
PR806
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
27
ICOUT
CSSN
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
VFB
NC
GNDA_CHG
PQ801
PQ801
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
S
S
12
10_0402_5%~D
10_0402_5%~D
PR807
PR807
PC805
PC805
100K_0402_1%~D
100K_0402_1%~D
1 2
GNDA_CHG
ICOUT
26
PR816
PR816
2.2_0603_1%~D
2.2_0603_1%~D
BOOT
25
1 2
MAX8731A_LDO
21
24
PR819
PR819
23
0_0603_5%~D
0_0603_5%~D
20
19
18
17
VFB
PR826
PR826
15
1 2
100_0402_5%~D
100_0402_5%~D
16
PJP801
PJP801
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
H_PROCHOT# <7,40,53>
DMN66D0LDW-7 2N SOT363-6
DMN66D0LDW-7 2N SOT363-6
PQ806B
PQ806B
3
5
4
1.2UH_+-30% PNS40201R2YAF_3A _20%
1.2UH_+-30% PNS40201R2YAF_3A _20%
+PWR_SRC
PQ803A
PQ803A
D
D
65
G
G
1
NTGD4161PT1G_TSOP6~D
NTGD4161PT1G_TSOP6~D
S
S
12
PR808
PR808
100K_0402_1%~D
100K_0402_1%~D
PR817
PR817
4.7_0603_5%~D
4.7_0603_5%~D
BOOT_D
12
PC809
PC809
PC811 1U_0603_10V6K~DPC811 1U_0603_10V6K~D
CHG_UGATE
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+VCHGR_B
12
CHG_LGATE
+VCHGR
12
PC837
PC837
100P_0402_50V8J~D
100P_0402_50V8J~D
C
PL800
@ PL800
@
12
PJP800
PJP800
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PQ803B
PQ803B
D
D
42
G
G
3
@
@
PR812
PR812
0_0402_5%~D
0_0402_5%~D
1 2
12
PC807
PC807
1U_0603_10V6K~D
1U_0603_10V6K~D
1 2
GNDA_CHG
1 2
PQ805
PQ805
4
MAX8731_REF
+DC_IN
12
12
PR833
PR833
PR832
PR832
47K_0402_1%~D
47K_0402_1%~D
232K_0402_1%~D
232K_0402_1%~D
12
12
PR840
PR840
PR841
PR841
22.6K_0402_1%~D
22.6K_0402_1%~D
42.2K_0402_1%~D
42.2K_0402_1%~D
+3.3V_ALW
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
5
PU802
PU802
P
B
4
O
A
G
3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
To preset system to throtlle
switching from AC to DC
12
PC801
PC801
PC802
PC802
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
47P_0402_50V8J~D
47P_0402_50V8J~D
DOCK_DCIN_IS+ <38>
DOCK_DCIN_IS- <38>
DK_CSS_GC <55>
5
PQ804
PQ804
4
SIR472DP-T1-GE3_POWERPAK8-5
SIR472DP-T1-GE3_POWERPAK8-5
123
5
123
SI7716ADN-T1-GE3_POWERPAK8-5
SI7716ADN-T1-GE3_POWERPAK8-5
1M_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
5
6
12
PC838
PC838
100P_0402_50V8J~D
100P_0402_50V8J~D
PC841
PC841
12
1
2
PROCHOT_GATE <39>
CHAGER_SRC
12
PL801
PC821
PC821
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PR829
PR829
4.7_1206_5%~D
4.7_1206_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
GNDA_CHG
7
+3.3V_ALW
PR845
PR845
D
D
S
S
PL801
PC832
@PC832
@
1 2
12
13
2
G
G
PQ808
PQ808
2N7002W-7-F 1N SOT323
2N7002W-7-F 1N SOT323
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
12
1 2
PR830
PR830
8
PU801B
PU801B
P
+
O
-
G
LM393DR_SO8~D
LM393DR_SO8~D
4
100K_0402_5%~D
100K_0402_5%~D
Adapter Protection Event
PR521 PR522
SW
@ 0 Ohm @
HW
12
12
PC813
PC813
PC812
PC812
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PR823
PR823
0.01_1206_1%~D
0.01_1206_1%~D
+VCHGR_L
12
4
3
12
PR827
PR827
10_0402_5%~D
10_0402_5%~D
PC833
PC833
1 2
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
MAX8731_REF
12
PR834
PR834
10K_0402_1%~D
10K_0402_1%~D
PR838
PR838
0_0402_5%~D
0_0402_5%~D
1 2
12
PR842
PR842
@
@
41.2K_0402_1%~D
41.2K_0402_1%~D
ACAV_IN <22,40, 55>
@0 Ohm 100k
12
PC810
PC810
PC814
PC814
10U_0805_25V6K
10U_0805_25V6K
1
2
12
PC828
PC828
PR828
PR828
0_0402_5%~D
0_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC834
@PC834
@
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
D
PR510
12
10U_0805_25V6K
10U_0805_25V6K
+VCHGR
12
12
PC830
PC830
PC829
PC829
10U_0805_25V6K
10U_0805_25V6K
GNDA_CHG
ACAV_IN_NB <39,40,55>
12
12
PC831
PC831
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Charger
Charger
Charger
LA-7731P
LA-7731P
LA-7731P
D
54 59Thursday, September 01, 2011
54 59Thursday, September 01, 2011
54 59Thursday, September 01, 2011
0.3
0.3
0.3
Page 55
5
+DOCK_PWR_BAR
D D
PQ901
PQ901
SI4835DDY-T1-E3_SO8~D
SI4835DDY-T1-E3_SO8~D
8
1 2
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
1 2
1 2
1 2
PD902
PD902
2 1
RB751S40T1_SOD523-2~D@
RB751S40T1_SOD523-2~D@
@PR922
@
180_0402_1%~D
180_0402_1%~D
5
7
5
PC905
PC905
PR912 0_0402_5%~DPR912 0_0402_5%~D
12
PR922
C C
+3.3V_ALW2
B B
ACAV_DOCK_SRC#<38>
A A
+VCHGR
+DC_IN
SOFT_START_GC<46>
1 2
PR910 100K_0402_5%~DPR910 100K_0402_5%~D
+SDC_IN
PR914 0_0402_5%~DPR914 0_0402_5%~D
DC_BLOCK_GC<54>
ACAV_IN<22,40,54>
+3.3V_ALW2
PR908 47_0805_5%~DPR908 47_0805_5%~D
PR918 0_0402_5%~DPR918 0_0402_5%~D
PR919 0_0402_5%~DPR919 0_0402_5%~D
4
+DOCK_PWR_BAR
+DC_IN_SS
+CHGR_DC_IN<54>
CD3301_DCIN
12
1 2
12
PC906
PC906
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1
2
36
ACAVDK_SRC
ERC1
ACAVIN
P33ALW2
PR904
PR904
0_0402_5%~D
0_0402_5%~D
1 2
PU900
PU900
1
DC_IN
2
SS_GC
3
ERC1
4
ACAVDK_SRC
5
GND
6
SDC_IN
7
DC_BLK_GC
8
ACAV_IN
9
P33ALW2
37
TP
CSS_GC<54>
DK_CSS_GC<54>
36
NC
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
ERC3
12
PC907
PC907
@
@
0.047U_0603_25V7K~D
0.047U_0603_25V7K~D
<BOM Structure>
<BOM Structure>
PBATT+
33
34
35
32
GND
DC_IN_SS
DK_PWRBAR
CHARGERVR_DCIN
ERC2
12
PC908
PC908
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
4
1 2
0_0402_5%~D
0_0402_5%~D
PR906
PR906
0_0402_5%~D
0_0402_5%~D
1 2
DSCHRG_MOSFET_GC
28
29
30NC31
PBatt+
P50ALW
PBATT_OFF
BLK_MOSFET_GC
DK_AC_OFF_EN
ACAV_IN_NB
GND
DSCHRG_MOSFET_GC
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
SS_DCBLK_GC
EN_DK_PWRBAR17P33ALW
16
15
18
P33ALW
EN_DK_PWRBAR
STSTART_DCBLOCK_GC
3301_PWRSRC
PR926 0_0402_5%~DPR926 0_0402_5%~D
4
PQ902
PQ902
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
S
D
2
S
D
3
S
D
4
G
D
PR903
PR903
12
PC903
PC903
1U_0603_25V6-K~D
1U_0603_25V6-K~D
P50ALW
CD_PBATT_OFF
27
26
DK_AC_OFF
25
24
23
DK_AC_OFF_ENCD3301_SDC_IN
22
SL_BAT_PRES#
21
20
19
CD3301ARHHR_QFN36_6X6~D
CD3301ARHHR_QFN36_6X6~D
1 2
PR923 0_0402_5%~DPR923 0_0402_5%~D
1 2
PR924 0_0402_5%~DPR924 0_0402_5%~D
1 2
+3.3V_ALW
12
PR900
PR900
330K_0402_5%~D
330K_0402_5%~D
8
PBATT_IN_SS
7
6
5
1 2
PR909 0_0402_5%~DPR909 0_0402_5%~D
1 2
PR911 0_0402_5%~DPR911 0_0402_5%~D
1 2
PR913 0_0402_5%~DPR913 0_0402_5%~D
BLKNG_MOSFET_GC
1 2
PR920 0_0402_5%~DPR920 0_0402_5%~D
1 2
PR921 0_0402_5%~DPR921 0_0402_5%~D
EN_DOCK_PWR_BAR <39>
1 2
1M_0402_5%~D
1M_0402_5%~D
PR925
PR925
@
@
+PWR_SRC
3
PD900
PD900
2 1
S2AA-13-F SMA
S2AA-13-F SMA
PQ900
PQ900
8
7
6
5
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
+5V_ALW
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
3301_ACAV_IN_NB
1 2
PR916 0_0402_5%~DPR916 0_0402_5%~D
1 2
PR917 0_0402_5%~DPR917 0_0402_5%~D
SLICE_BAT_PRES# <38,39,46>
+NBDOCK_DC_IN_SS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
1
S
D
2
S
D
3
S
D
4
G
D
PR902
PR902
330K_0402_5%~D
330K_0402_5%~D
1 2
12
PR905
PR905
1K_1206_5%~D
1K_1206_5%~D
12
PC904
PC904
1U_0603_25V6-K~D
1U_0603_25V6-K~D
GPIO Input from NB
Embedded Controller
ACAV_IN_NB <39,40,54>
DOCK_AC_OFF_EC <39>
12
PC900
PC900
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D
1M_0402_5%~D
1M_0402_5%~D
1 2
PR915
PR915
2
PR901
PR901
1 2
0_0402_5%~D
0_0402_5%~D
2
STSTART_DCBLOCK_GC
PD901
PD901
2
3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D
PQ903
PQ903
8
7
6
5
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
S
D
2
S
D
3
S
D
4
G
D
1
1
+PWR_SRC
12
12
PC902
PC902
PC901
PC901
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PR907
PR907
0_0402_5%~D
0_0402_5%~D
1 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Selector
Selector
Selector
LA-7731P
LA-7731P
LA-7731P
55 59Thursday, September 01, 2011
55 59Thursday, September 01, 2011
55 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 56
5
4
3
2
1
+VCC_CORE
12
PC1200
PC1200
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
D D
C C
12
PC1205
PC1205
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1277
PC1277
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1282
PC1282
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1288
PC1288
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1294
PC1294
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1201
PC1201
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1206
PC1206
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1259
PC1259
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1281
PC1281
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1287
PC1287
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1293
PC1293
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1202
PC1202
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1207
PC1207
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1279
PC1279
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1284
PC1284
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1290
PC1290
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1296
PC1296
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1203
PC1203
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1208
PC1208
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1258
PC1258
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1280
PC1280
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1286
PC1286
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1292
PC1292
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
+VCC_CORE
1
PC1219
PC1219
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
B B
1
PC1243
PC1243
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1220
PC1220
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1244
PC1244
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1221
PC1221
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1245
PC1245
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1222
PC1222
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1246
PC1246
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
+VCC_CORE +VCC_GFXCORE
12
PC1204
PC1204
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1209
PC1209
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1276
PC1276
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1283
PC1283
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1289
PC1289
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1295
PC1295
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
1
PC1223
PC1223
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1247
PC1247
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
12
PC1210
PC1210
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1278
PC1278
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1285
PC1285
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1291
PC1291
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
12
PC1297
PC1297
2.2U_040 2_6.3V6M~D
2.2U_040 2_6.3V6M~D
+VCC_GFXCORE
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1211
PC1211
PC1212
1
2
12
12
12
1
2
PC1212
1
1
2
2
12
12
PC1236
PC1236
PC1235
PC1235
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1239
PC1239
PC1240
PC1240
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1305
PC1305
PC1307
PC1307
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
1
PC1257
PC1256
PC1256
+
+
PC1257
+
+
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1213
PC1213
PC1237
PC1237
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
PC1241
PC1241
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1308
PC1308
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1214
PC1214
1
1
2
2
12
12
PC1238
PC1238
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1242
PC1242
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1310
PC1310
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1216
PC1216
PC1215
PC1215
1
2
12
PC1218
PC1218
PC1217
PC1217
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
PC1304
PC1304
PC1306
PC1306
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1309
PC1309
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
Below is 458544_CRV_PDDG_0.5 Table 5-8.
5 x 22 µF (0805)
Socket Bottom
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
Socket Top
2 x (0805) no-stuff
sites
+1.05V_RUN_VTT
+1.05V_R UN_VTT
12
12
12
12
PC1227
PC1227
PC1226
PC1226
PC1225
PC1225
PC1224
PC1224
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1312
PC1312
12
12
PC1267
PC1267
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1319
PC1319
12
PC1311
PC1311
PC1248
PC1248
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1318
PC1318
PC1317
PC1317
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1228
PC1228
PC1229
PC1229
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1249
PC1249
PC1250
PC1250
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1325
PC1325
PC1321
PC1321
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1230
PC1230
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1251
PC1251
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1322
PC1322
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
PC1231
PC1231
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1252
PC1252
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1315
PC1315
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1324
PC1324
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
12
PC1232
PC1232
PC1233
PC1233
PC1234
PC1234
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
12
PC1254
PC1254
PC1255
PC1253
PC1253
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1313
PC1313
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1320
PC1320
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
PC1255
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1314
PC1314
PC1316
PC1316
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
12
PC1326
PC1326
PC1323
PC1323
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
1
1
PC1265
PC1265
PC1266
PC1266
+
+
+
+
2
2
1
PC1260
PC1260
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1268
PC1268
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
A A
1
PC1302
PC1302
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
5
1
PC1261
PC1261
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1269
PC1269
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1301
PC1301
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1262
PC1262
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1270
PC1270
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1300
PC1300
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1263
PC1263
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1271
PC1271
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1299
PC1299
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1264
PC1264
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1298
PC1298
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1303
PC1303
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
4
+VCC_CORE
1
+
+
PC1272
PC1272
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
+
+
2 3
3
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
+VCC_CORE
PC1273
PC1273
1
+
+
PC1274
PC1274
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
1
+
+
PC1275
PC1275
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number R ev
Size Docum ent Number R ev
Size Docum ent Number R ev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-7731P
LA-7731P
LA-7731P
56 59Thursday, September 01 , 2011
56 59Thursday, September 01 , 2011
56 59Thursday, September 01 , 2011
1
0.3
0.3
0.3
Page 57
5
Request
Request
Item
Item Issue Description
ItemItem
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
4
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Issue DescriptionDate
Issue DescriptionIssue Description
3
Page 1
Page 1
Page 1Page 1
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
1 48 +1.5V_MEN 8/16 Dell Follow VC , enable use SIO_SLP_S4#. Add PR210 for net "SIO_SLP_S4#" X01
D D
2 46 DCIN Dell ME design change. PJPDC1 change from 7pin to 5pin X01
3 47 +5V/3.3V Dell Main and 2nd IC common setting. De-pop PD100,PR113,PR111 X01
4 53 Vcore/GFX core
5 X01
50
51
+1.05VM/
+1.05VTT
6
53 Vcore/GFX core
C C
47,53
7 X01
,54
8
Vcore, Charger
+5V/3.3V
53 Vcore/GFX core
9
8/16
8/16
8/16
8/16
8/16
8/16
8/16
Compal
RF_team
Compal
Compal
Compal
RF_team
Compal
Suppress WWAN BB noise.
COS concern, change from D2 Polymer cap to OScon cap
Prevent output voltage glitch when power up.
EMI solution.
adjust OCP and DC load line.
Pop PC751,PR760,PC725,PR731,
X01
PC745,PR751(680pF 0603, 4.7 ohm 1206)
PC406, PC507
PU700 VCCP and VDD change form +5V_RUN
X01
to +5V_ALW
Pop PL700.PL1300,PL100
PR740 change to 2.1k ohm, PR750 change to 392 ohm.
X01
X01
10 X01
11 X01
B B
12 X01
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR 1
PWR_PIR 1
PWR_PIR 1
LA-7731P
LA-7731P
LA-7731P
57 59Thursday, September 01, 2011
57 59Thursday, September 01, 2011
57 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 58
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
C C
B B
A A
Page# Title
Page#Page#
2
3 18 HW 7/26/2011 DELL Follow GPIO map rev1.0 Change RH273 from 1k to 10k X01
5 35 HW 7/26/2011 Compal Solve Express card PAID issue Add R830 X01
6 7,22 HW 7/27/2011 Compal Solve ESD issue Reserve D84,D85 X01
7 25 HW 7/27/2011 Compal Layout routing Swap HDMI trace connection on L19,L20,L21,L22 for layout routing X01
8 29 HW 7/28/2011 Compal EMI request Add CE984,CE985 X01
9 7 HW 8/1/2011 Compal EMI request Reserve CC141 X01
10 17 HW 8/3/2011 Intel Request from Intel review feedback Pop RH332 X01
12 20,42 HW 8/4/2011 Compal Add QH6,RH279,CH107 X01
13 42 HW 8/4/2011 Compal
14 10 HW 8/4/2011 Compal Follow INTEL PDDG 0.8 De-pop RC140
23 40 HW 8/8/2011 COMPAL Please depop VOL_MUTE/UP/DOWN due to EC code
25 42 HW 8/8/2011 COMPAL power suggestion Change Q59 to AO4728L
28
11 HW 7/14/2011 Compal Change DDR channel A signal to DSL Add CC149,CC152,CC178,CC179 X01
294 HW 7/26/2011 Compal EMI request Pop CE981, CE982, CE983 X01
14,39 Leave LDRQ0# no connection on both of 5048 and PCH side SMSCHW SMSC request to delete LPC_LDRQ0#8/4/201111 X01
40 HW 8/4/2011 COMPAL Change board ID to X01 Change R875 to 130Kohms
34 HW 8/4/2011 COMPAL PCH GPIO52 need 8.2~10K pull up +3.3VS Change R695 from 100K to 10Kohms17
23 HW 8/4/2011 COMPAL CRT SW 2nd source TI, TS3V713 pin29 is VDD Connect pin29 to +3.3V_RUN18
16 HW +1.05V_M turn off before APWROK de-assert Add UH5 circuit for backup HW solutionCOMPAL8/4/201119
43 8/9/2011 Align with E4 Change LED6, LED7 power source from +3.3V_ALW to +5V_ALWHW COMPAL26
26 DPX_CA_DET voltage too low through dongleCOMPAL08/11/2011HW Change U21 and U24 to SA000055G0L 29
43 HW 08/11/2011 COMPAL Tune white light LED brightness Change R934,R938,R939,R949,R958,R957 and R955 to 2.2K ohm30
Title
TitleTitle
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
Vgs less than cut-in voltage in battery mode
Load SW sources output rising time
mismatch and COS. cost concern.
Co-lay 92HD93 with ALC290COMPALHW 8/4/201121 29
enable internal PU resistors (3V_ALW)
Crystal EA result27 14,40 HW COMPAL8/10/2011
For RSMRST# debugCOMPAL08/11/2011HW41 Reserve R1655 and pop R1623
3
Add @R752, R753
Change back to E3 +3.3V/5V_RUN discrete solution. Add
Q55,Q56,Q61,Q62,R933,R940,R1627, remove U78,R749,R747,
C1199,C1198,C1197,C1196,change C761,C764 to 10uF
Add R1653, 1M ohms pull down for USH_PWR_STATE# at M/B side15 32 HW 8/4/2011 Compal RESET_OUT# power sequence issue
Change U4 to RT9801A (threshold adjustable)Reset IC threshold voltage issueCOMPALHW4120 8/4/2011
Pop option for 92HD93/ALC290=>R1646/C1164; R1644/R1643; C965/R1642
Reserve for ALC290 only: C1204, C1205, R171, R1647, C1165, R1648
Reserve for 92HD93 only: R1645, C963
Pop R162~R166 and de-pop U73HW29 Codec is change to 92HD93COMPAL22 8/4/2011
De-pop R1169,R1197,R1118
Add R1624COMPAL8/8/2011HW24 41 For debug purpose
Change C741, C743 from 22p to 39p, CH2, CH3 from 15p to 18p, CH18,
CH19 from 12p to 10p for crystal EA
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X01DELL39,40,42 E4 uses SIO_SLP_S4# for power control1 7/14/2011HW
X01
X01
X01
X0116
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (1/2)
EE P.I.R (1/2)
EE P.I.R (1/2)
LA-7731P
LA-7731P
LA-7731P
58 59Thursday, September 01, 2011
58 59Thursday, September 01, 2011
58 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 59
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
C C
Page# Title
Page#Page#
20,22,34
31 8/11/2011HW COMPAL Cost saving
38,39,43
32 11 HW 8/12/2011 COMPAL Solve S3 wake up issue Pop RC79 and de-pop RC82 X01
33 36,41 HW 8/14/2011 Change JUSB1,JUSB2,JBT1ME change connector X01
34 8/16/201130 HW ME change connector Change JLID1 X01
35
36 36 HW 8/19/2011 COMPAL Follow Intel design guide Change C410~C413 from 0.01uF to 0.1uF X01
37 25 HW 8/24/2011 COMPAL EMI request to solve HDMI issue Add C1216~C1223 X01
38 7 HW 8/25/2011 COMPAL ESD request Change RC25 to 1k and pop CC141 X01
39 40 HW 8/26/2011 SMSC SMSC request Reserve R941, R942 X01
40 24,33 HW 8/26/2011 EMI EMI request to solve SD/DMIC issue Reserve CE758, CE279, CE280 X01
41 43 HW 8/27/2011 ME
42 14 HW 8/29/2011 ME change TAA connector Change JTAA1 X01
17,32
39,40
43 HW 8/29/2011 COMPAL Tune white light LED brightness Change R934,R938,R939,R949,R958,R957 and R955 to 1.2K ohm42 X01
Title
TitleTitle
HW 8/18/2011 COMPAL RF request
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
ME
ME
4
Issue DescriptionDate
Issue DescriptionIssue Description
Solve standoff shift issue Change H11,H24,H25 to 6mm X01
3
Change D2,D31,D32,D34,D59,D62,DH2,DH3,
D65,D66,D67,D68,D69,D70 to SCS00002G00
Pop R885, C747, R795, C713, RE5 and change CE3 to 12pF and pop it,
and add CH109,CH110
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
X01
X01
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (2/2)
EE P.I.R (2/2)
EE P.I.R (2/2)
LA-7731P
LA-7731P
LA-7731P
59 59Thursday, September 01, 2011
59 59Thursday, September 01, 2011
59 59Thursday, September 01, 2011
1
0.3
0.3
0.3
Page 60
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