Compal LA-7571P QOQAE Ontario 10AS Schematic

A

1 1

B

C

D

E

QOQAE

2 2

Ontario 10AS

LA-7571P SchematicREV 1.0

3 3

AMD Llano FS1 Processor / Hudson M2/M3

2011-05-04 Rev 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

141Monday, May 09, 2011

E

B

of

A

B

C

D

E

EC SMBus

1 1

2 2

3 3

RTC CKT.

DC/DC Interface

page 12

page 32

HDMI-CEC

page 20

RJ45

page 24

HDMI Conn.

page 20

CRT

RTL8105E 10/100M RTL8111E 1G

Cardreader JMB389C

PCI-Express X4 5GHz

LVDS Translator ANX3110

PCIe port4

page 17

LVDS Conn.

page 18

page19

APU PCIe port 0

page 24

FCH PCIe port2

page 25

PCIe X1

1.1V 5GT/s

SPI Bus

3.3V 33 MHz

AMD APU FS1 Processor

Llano uPGA-722

page 5,6,7,8,9

DP0 (X1)

PCIe X1

1.1V 5GT/s

AMD FCH Hudson M2/M3

FCBGA-656

page 12,13,14,15,16

LPC Bus

3.3V 33 MHz

35mm*35mm

DP1 (X4)

24.5mm*24.5mm

UMI X4

2.5GT/s

HD Audio

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333 MT/s

PCIe X1 X1

1.1V 5GT/s

USB Conn

USB port 0,1

Int. Camera

USB

5V 480MHz

USB port 5

PCIeMini Card

USB

5V 480MHz

SATA port 0

5V 6GHz(600MB/s)

SATA port 1

5V 6GHz(600MB/s)

USB 3.0 port0

5GHz

PCIe X1

1.1V 5GT/s

3.3V 24MHz

WLAN

SATA HDD

SATA ODD

USB3.0 UPD720200AF1-DAP-A

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

USB 3.0

USB port 8

page 23

FCH PCIe port1

page 26

USB port 10

page 21

page 18

APU PCIe port 1

SATA port 0

page 21

SATA port 1

page 21

PWM Fan Control

FingerPrinter

page 26

USB port 7

PCIeMini Card 3G

USB port 6

page 23

PCIeMini Card JET

APU PCIe port 2

page 23

USB 3.0

page 5

page 10,11

page 22

USB3.0 port0

page 26

SIM

page 23

HDA Codec

Power Circuit DC/DC

page 33~40

SPI ROM (2MB)

page14

Debug Port

page 30

ENE KB930

page 29

ALC269

page27

NBQAA Sub-board Conn

Power Membrane

4 4

page 31

Slot ODD

page 21

Touch Pad FP/LOGO LED

page 22

Touch Pad

page 22

Cap Sensor

TP LED

page 22

A

page 22

B

Int.KBD

page 28'

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

EC ROM (128KB)

page 30

C

G-Sensor

page 30

Compal Secret Data

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

MIC Conn

page 18

D

MIC ConnInt.

page 28

Title

Size Document Number Rev

Date: Sheet

HP CONN

page 28

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

E

SPK CONN

241Monday, May 09, 2011

page 28

of

B

5

B+

D D

Ipeak=5A, Imax=3.5A, Iocp min=7.9A

SUSP

N-CHANNEL

SI4800

TPS51125A

Ipeak=5A, Imax=3.5A, Iocp min=7.7A

4

KB_LED

P-CHANNEL

AO-3413

+5VS

LDO

G9191

ODD_PWR

P-CHANNEL

AO-3413

WOL_EN

P-CHANNEL

AO-3413

SYSON

P-CHANNEL

AO-3413

DESIGN CURRENT 0.1A DESIGN CURRENT 0.1A

DESIGN CURRENT 5A

DESIGN CURRENT 400mA

DESIGN CURRENT 300mA

DESIGN CURRENT 1.6A

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 0.2A

+3VL +5VL

+5VALW

+5VS

+5VS_LED

+3VS_HDP

+5VS_ODD

+3VALW

+3V_LAN

+3V

3

2

1

SUSP

N-CHANNEL

C C

POK

G5603RU1U

VR_ON

SI4800

B B

ISL6267HRZ-T

VR_ON

Ipeak=94A, Imax=52A, Iocp min=122A

Ipeak=33A, Imax=21.5A, Iocp min=40A

LCD_ENVDD

P-CHANNEL

AO-3413

+3VS

LDO

APL5508-25DC

SUSP

N-CHANNEL FDS6676AS

G5603RU1U

SYSON

G5603RU1U

Ipeak=16A, Imax=11.2A, Iocp min=22.46A

SUSP

N-CHANNEL FDS6676AS

+3V

LDO

APL5930KAI-TRG

SUSP

G2992F1U

DESIGN CURRENT 5A

DESIGN CURRENT 1.5A

DESIGN CURRENT 1A

DESIGN CURRENT 5.3A

DESIGN CURRENT 4A

DESIGN CURRENT 50A

DESIGN CURRENT 23A

DESIGN CURRENT 6.5A

DESIGN CURRENT 20A

DESIGN CURRENT 2A

DESIGN CURRENT 1A

DESIGN CURRENT 1.5A

+3VS

+LCD_VDD

+2.5VS

+1.1VALW

+1.1VS

+CPU_CORE +CPU_CORE_NB

+1.2VS

+1.5V

+1.5VS

+1.05V

+0.75VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

SCHEMATIC MB A7571

4019D7

1

of

341Monday, May 09, 2011

of

341Monday, May 09, 2011

of

341Monday, May 09, 2011

B

A

B

C

D

E

Voltage Rails

State

S0

S1

S3

S5 S4/AC

power plane

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

FCH SM Bus Address (SCL0/SDA0)

Power

3 3

+3VS +3VS +3VS

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 WLAN 3G+3VS

( O MEANS ON X MEANS OFF )

+RTCVCC

O O O O O O

HEX

B+

O O O O O

X

Address

1010 0000 bA0 H 1010 0100 bA4 H

+5VL +3VL

O O O O O

X

+5VALW +3VALW +1.1VALW +VSB

O O O O

X X

+1.5V +3V +1.05V

+5VS +3VS +2.5VS +1.5VS +1.2VS +1.1VS +0.75VS +CPU_CORE +CPU_CORE_NB

OO OO

O

X XX X

X XX

BTO Option Table

Function

description

explain

BTO

Function

description

explain

BTO

Function

description

explain

BTO

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOW

HDMI-CEC

HDMI

Normal

ODD0@

Hudson-M2 Hudson-M3

SIGNAL

HDMI+CEC

CEC@

ODD

T

Slot

ODD1@

FCH

HM2 HM3 UM

M2@ M3@

SLP_S3#

HIGH HIGH

LOW

Y

SLP_S5#

HIGHHIGH

HIGH

LOWLOW

LAN

UV

10/100

8105E@

Mini Card Chipset

G

3G JET

3G@

J

JET@

UMA

10/100/1000

8111E@

3G/JET

3GJET@

CAM+MIC

X

CAM

CAM@

FCH

Hudson-M3

HUDM3R1@ HUDM3R3@

KB LED

KBL@

Renesas USB3.0

K

Renesas USB3.0

EC

N/A Reserved

KB-930 KB-9012

KB930@ KB9012@

Reserved

RENE@

EC SM Bus1 Address

Device Address Address

+3VL +3VL

4 4

HDMI-CEC 34 H 0011 0100 b

A

HEX HEX

16 H

0001 0110 bSmart Battery

PowerPower

+3VS

HEXDevice AddressPower

Virtual I2CCap. Sensor+3VL

EC SM Bus2 Address

Device

G-Sensor

B

40 H

0100 0000 b

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

441Monday, May 09, 2011

E

of

B

A

JAPUA

AA8 AA9

P_ZVDDP

Y7

Y8 W5 W6 W8 W9

V7

V8

U5

U6

U8

U9

T7

T8

R5

R6

R8

R9

P7

P8

N5

N6

N8

N9 M7 M8

L5 L6 L8 L9

AC5 AC6 AC8 AC9 AB7 AB8 AA5 AA6

AF8 AF7 AE6 AE5 AE9 AE8 AD8 AD7

K5

AMD_TOPEDO_FS-1

1 1

2 2

PCIE_FRX_C_LANTX_P0<24>

3 3

4 4

PCIE_FRX_C_LANTX_N0<24> PCIE_FRX_WLANTX_P1<23> PCIE_FRX_WLANTX_N1<23>

UMI_MTX_C_FRX_P0<12> UMI_MTX_C_FRX_N0<12> UMI_MTX_C_FRX_P1<12> UMI_MTX_C_FRX_N1<12> UMI_MTX_C_FRX_P2<12> UMI_MTX_C_FRX_N2<12> UMI_MTX_C_FRX_P3<12> UMI_MTX_C_FRX_N3<12>

+1.2VS

PCIE_FRX_C_LANTX_P0 PCIE_FRX_C_LANTX_N0 PCIE_FRX_WLANTX_P1 PCIE_FRX_WLANTX_N1

T29T29 T28T28

UMI_MTX_C_FRX_P0 UMI_MTX_C_FRX_N0 UMI_MTX_C_FRX_P1 UMI_MTX_C_FRX_N1 UMI_MTX_C_FRX_P2 UMI_MTX_C_FRX_N2 UMI_MTX_C_FRX_P3 UMI_MTX_C_FRX_N3

1 2

R9 196_0402_1%R9 196_0402_1%

close to APU close to APU

P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15

P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3

P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3

P_ZVDDP

PCI EXPRESS

GPPUMI-LINK GRAPHICS

B

P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9

P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15

P_GPP_TXP0

P_GPP_TXN0

P_GPP_TXP1

P_GPP_TXN1

P_GPP_TXP2

P_GPP_TXN2

P_GPP_TXP3

P_GPP_TXN3

P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3

P_ZVSS

@

AA2 AA3 Y2 Y1 Y4 Y5 W2 W3 V2 V1 V4 V5 U2 U3 T2 T1 T4 T5 R2 R3 P2 P1 P4 P5 N2 N3 M2 M1 M4 M5 L2 L3

AD4 AD5 AC2 AC3 AB2 AB1 AB4 AB5

AF1 AF2 AF5 AF4 AE3 AE2 AD1 AD2

K4

PCIE_FTX_LANRX_P0 PCIE_FTX_LANRX_N0 PCIE_FTX_WLANRX_P1 PCIE_FTX_WLANRX_N1 PCIE_FTX_JETRX_P2 PCIE_FTX_JETRX_N2

UMI_FTX_MRX_P0 UMI_FTX_MRX_N0 UMI_FTX_MRX_P1 UMI_FTX_MRX_N1 UMI_FTX_MRX_P2 UMI_FTX_MRX_N2 UMI_FTX_MRX_P3 UMI_FTX_MRX_N3

P_ZVSS

1 2

R10 196_0402_1%R10 196_0402_1%

C

C49 0.1U_0402_16V7KC49 0.1U_0402_16V7K

1 2

C50 0.1U_0402_16V7KC50 0.1U_0402_16V7K

1 2

C51 0.1U_0402_16V7KC51 0.1U_0402_16V7K

1 2

C52 0.1U_0402_16V7KC52 0.1U_0402_16V7K

1 2

C53 0.1U_0402_16V7KC53 0.1U_0402_16V7K

1 2

C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K

1 2

C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K

1 2

C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K

1 2

C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K

1 2

C58 0.1U_0402_16V7KC58 0.1U_0402_16V7K

1 2

C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K

1 2

C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K

1 2

C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K

1 2

C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K

1 2

UMA_HDMI_TX2+ <20> UMA_HDMI_TX2- <20> UMA_HDMI_TX1+ <20> UMA_HDMI_TX1- <20> UMA_HDMI_TX0+ <20> UMA_HDMI_TX0- <20> UMA_HDMI_TXC+ <20> UMA_HDMI_TXC- <20>

PCIE_FTX_C_LANRX_P0 <24> PCIE_FTX_C_LANRX_N0 <24> PCIE_FTX_C_WLANRX_P1 <23> PCIE_FTX_C_WLANRX_N1 <23> PCIE_FTX_C_JETRX_P2 <23> PCIE_FTX_C_JETRX_N2 <23>

UMI_FTX_C_MRX_P0 <12> UMI_FTX_C_MRX_N0 <12> UMI_FTX_C_MRX_P1 <12> UMI_FTX_C_MRX_N1 <12> UMI_FTX_C_MRX_P2 <12> UMI_FTX_C_MRX_N2 <12> UMI_FTX_C_MRX_P3 <12> UMI_FTX_C_MRX_N3 <12>

D

FAN Control Circuit

FAN_SPEED1<29>

+5VS

1 2

40 mils

+FAN1

LAN

WLAN

JET

1A

R14 0_0603_5%R14 0_0603_5%

2

C6

C6 10U_0805_10V6K

10U_0805_10V6K

1

@

+3VS

12

R13

R13 10K_0402_5%

10K_0402_5%

1

C7

0.01U_0402_25V7K

0.01U_0402_25V7K @

@

2

+5VS

1SS355TE-17_SOD323-2

D7

1

BAS16_SOT23-3

E

JFAN

1

FANPWM<29>

+FAN1

FANPWM

1

2

3

4

ACES_85204-0400N

@

Close to Connector

1000P_0402_50V7KC81000P_0402_50V7K

221

D8

10U_0805_10V6KC510U_0805_10V6K

12

C5

1

2

C8

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

541Monday, May 09, 2011

E

B

of

A

B

C

D

E

DDR_A_DQS[0..7]<10>

DDR_A_DQS#[0..7]<10>

1 1

DDR_A_MA[0..15]<10>

DDR_A_BS0<10> DDR_A_BS1<10> DDR_A_BS2<10> DDR_A_DM[0..7]<10>

2 2

DDR_A_CLK0<10> DDR_A_CLK0#<10> DDR_A_CLK1<10> DDR_A_CLK1#<10>

DDR_A_CKE0<10> DDR_A_CKE1<10>

DDR_A_ODT0<10> DDR_A_ODT1<10>

3 3

DDR_A_SCS0#<10> DDR_A_SCS1#<10>

DDR_A_RAS#<10> DDR_A_CAS#<10> DDR_A_WE#<10>

MEM_MA_RST#<10> MEM_MA_EVENT#<10>

+1.5V

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_CLK0 DDR_A_CLK0# DDR_A_CLK1 DDR_A_CLK1#

DDR_A_CKE0 DDR_A_CKE1

DDR_A_ODT0 DDR_A_ODT1

DDR_A_SCS0# DDR_A_SCS1#

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

MEM_MA_RST# MEM_MA_EVENT#

+MEM_VREF

M_ZVDDIO

1 2

R33 39.2_0402_1%R33 39.2_0402_1%

15mil

JAPUB

U20

MA_ADD0

R20

MA_ADD1

R21

MA_ADD2

P22

MA_ADD3

P21

MA_ADD4

N24

MA_ADD5

N23

MA_ADD6

N20

MA_ADD7

N21

MA_ADD8

M21

MA_ADD9

U23

MA_ADD10

M22

MA_ADD11

L24

MA_ADD12

AA25

MA_ADD13

L21

MA_ADD14

L20

MA_ADD15

U24

MA_BANK0

U21

MA_BANK1

L23

MA_BANK2

E14

MA_DM0

J17

MA_DM1

E21

MA_DM2

F25

MA_DM3

AD27

MA_DM4

AC23

MA_DM5

AD19

MA_DM6

AC15

MA_DM7

G14

MA_DQS_H0

H14

MA_DQS_L0

G18

MA_DQS_H1

H18

MA_DQS_L1

J21

MA_DQS_H2

H21

MA_DQS_L2

E27

MA_DQS_H3

E26

MA_DQS_L3

AE26

MA_DQS_H4

AD26

MA_DQS_L4

AB22

MA_DQS_H5

AA22

MA_DQS_L5

AB18

MA_DQS_H6

AA18

MA_DQS_L6

AA14

MA_DQS_H7

AA15

MA_DQS_L7

T21

MA_CLK_H0

T22

MA_CLK_L0

R23

MA_CLK_H1

R24

MA_CLK_L1

H28

MA_CKE0

H27

MA_CKE1

Y25

MA_ODT0

AA27

MA_ODT1

V22

MA_CS_L0

AA26

MA_CS_L1

V21

MA_RAS_L

W24

MA_CAS_L

W23

MA_WE_L

H25

MA_RESET_L

T24

MA_EVENT_L

W20

M_VREF

W21

M_ZVDDIO

AMD_TOPEDO_FS-1

MEMORY CHANNEL A

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7

MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15

MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23

MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31

MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39

MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47

MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55

MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

@

E13 J13 H15 J15 H13 F13 F15 E15

H17 F17 E19 J19 G16 H16 H19 F19

H20 F21 J23 H23 G20 E20 G22 H22

G24 E25 G27 G26 F23 H24 E28 F27

AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25

Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21

AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17

AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7

DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23

DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39

DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55

DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_D[0..63] <10>

DDR_B_DQS[0..7]<11>

DDR_B_DQS#[0..7]<11>

JAPUC

MEMORY CHANNEL B

DDR_B_MA[0..15]<11>

DDR_B_BS0<11> DDR_B_BS1<11> DDR_B_BS2<11> DDR_B_DM[0..7]<11>

DDR_B_CLK0<11> DDR_B_CLK0#<11> DDR_B_CLK1<11> DDR_B_CLK1#<11>

DDR_B_CKE0<11> DDR_B_CKE1<11>

DDR_B_ODT0<11> DDR_B_ODT1<11>

DDR_B_SCS0#<11> DDR_B_SCS1#<11>

DDR_B_RAS#<11> DDR_B_CAS#<11> DDR_B_WE#<11>

MEM_MB_RST#<11> MEM_MB_EVENT#<11>

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

DDR_B_CLK0 DDR_B_CLK0# DDR_B_CLK1 DDR_B_CLK1#

DDR_B_CKE0 DDR_B_CKE1

DDR_B_ODT0 DDR_B_ODT1

DDR_B_SCS0# DDR_B_SCS1#

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

MEM_MB_RST# MEM_MB_EVENT#

MEMORY CHANNEL B

T27

MB_ADD0

P24

MB_ADD1

P25

MB_ADD2

N27

MB_ADD3

N26

MB_ADD4

M28

MB_ADD5

M27

MB_ADD6

M24

MB_ADD7

M25

MB_ADD8

L26

MB_ADD9

U26

MB_ADD10

L27

MB_ADD11

K27

MB_ADD12

W26

MB_ADD13

K25

MB_ADD14

K24

MB_ADD15

U27

MB_BANK0

T28

MB_BANK1

K28

MB_BANK2

D14

MB_DM0

A18

MB_DM1

A22

MB_DM2

C25

MB_DM3

AF25

MB_DM4

AG22

MB_DM5

AH18

MB_DM6

AD14

MB_DM7

C15

MB_DQS_H0

B15

MB_DQS_L0

E18

MB_DQS_H1

D18

MB_DQS_L1

E22

MB_DQS_H2

D22

MB_DQS_L2

B26

MB_DQS_H3

A26

MB_DQS_L3

AG24

MB_DQS_H4

AG25

MB_DQS_L4

AG21

MB_DQS_H5

AF21

MB_DQS_L5

AG17

MB_DQS_H6

AG18

MB_DQS_L6

AH14

MB_DQS_H7

AG14

MB_DQS_L7

R26

MB_CLK_H0

R27

MB_CLK_L0

P27

MB_CLK_H1

P28

MB_CLK_L1

J26

MB_CKE0

J27

MB_CKE1

W27

MB_ODT0

Y28

MB_ODT1

V25

MB_CS_L0

Y27

MB_CS_L1

V24

MB_RAS_L

V27

MB_CAS_L

V28

MB_WE_L

J25

MB_RESET_L

T25

MB_EVENT_L

AMD_TOPEDO_FS-1

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7

MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15

MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23

MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31

MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39

MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47

MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55

MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

@

A14 B14 D16 E16 B13 C13 B16 A16

C17 B18 B20 A20 E17 B17 B19 C19

C21 B22 C23 A24 D20 B21 E23 B23

E24 B25 B27 D28 B24 D24 D26 C27

AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24

AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20

AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16

AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7

DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15

DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23

DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31

DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39

DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47

DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55

DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_D[0..63] <11>

EVENT# pull high 0.75V Reference Voltage

+1.5V

4 4

R11 1K_0402_5%R11 1K_0402_5%

1 2

R12 1K_0402_5%R12 1K_0402_5%

1 2

MEM_MA_EVENT# MEM_MB_EVENT#

A

R31

1K_0402_1%

R32

1K_0402_1%

+1.5V

1 2

B

1

C63

C63 1000P_0402_50V7K

1000P_0402_50V7K

2

15mil

+MEM_VREF

2

C64

0.1U_0402_16V7K

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

E

of

641Monday, May 09, 2011

B

A

To LVDS Translator

C69 0.1U_0402_16V7KC69 0.1U_0402_16V7K

DP0_TXP0_C<17> DP0_TXN0_C<17>

1 2

C70 0.1U_0402_16V7KC70 0.1U_0402_16V7K

1 2

DP0_TXP0 DP0_TXN0

Close to APU

1 1

Close to APU

C71 0.1U_0402_16V7KC71 0.1U_0402_16V7K

ML_VGA_TXP0<14> ML_VGA_TXN0<14>

ML_VGA_TXP1<14>

To FCH

ML_VGA_TXN1<14>

ML_VGA_TXP2<14> ML_VGA_TXN2<14>

ML_VGA_TXP3<14> ML_VGA_TXN3<14>

100MHz (SS)

2 2

100MHz (NSS)

APU_SVC<39> APU_SVD<39>

SB-TSI

APU_RST#

12

C258 1000P_0402_50V7KC258 1000P_0402_50V7K

C83 1000P_0402_50V7KC83 1000P_0402_50V7K

+1.5VS

Close to R38 and R39

@

1 2

C199 0.1U_0402_16V7K

R38 1K_0402_5%@R38 1K_0402_5%@

3 3

4 4

1 2

R39 1K_0402_5%@R39 1K_0402_5%@

1 2

R47 300_0402_5%R47 300_0402_5%

1 2

R48 300_0402_5%R48 300_0402_5%

1 2

+1.5V

R40 1K_0402_5%R40 1K_0402_5%

1 2

R41 1K_0402_5%R41 1K_0402_5%

1 2

R42 1K_0402_5%R42 1K_0402_5%

1 2

R145 1K_0402_5%R145 1K_0402_5%

1 2

R146 1K_0402_5%R146 1K_0402_5%

1 2

APU_VDDNB_RUN_FB_L<39>

+1.5V

Close to JHDT

R95 1K_0402_5%R95 1K_0402_5%

1 2

R97 1K_0402_5%R97 1K_0402_5%

1 2

R100 1K_0402_5%R100 1K_0402_5%

1 2

R116 1K_0402_5%R116 1K_0402_5%

1 2

R117 300_0402_5%R117 300_0402_5%

1 2

APU_PWRGD

12

APU_SVC_R APU_SVD_R

APU_RST#

APU_PWRGD

APU_SIC

APU_SID APU_ALERT# APU_SVC_R APU_SVD_R

APU_VDD_RUN_FB_L<39>

APU_VDDNB_SENSE<39>

APU_VDD_SENSE<39>

APU_TDI APU_TCK APU_TMS APU_TRST# APU_DBREQ#

A

1 2

C72 0.1U_0402_16V7KC72 0.1U_0402_16V7K

1 2

C73 0.1U_0402_16V7KC73 0.1U_0402_16V7K

1 2

C74 0.1U_0402_16V7KC74 0.1U_0402_16V7K

1 2

C75 0.1U_0402_16V7KC75 0.1U_0402_16V7K

1 2

C76 0.1U_0402_16V7KC76 0.1U_0402_16V7K

1 2

C77 0.1U_0402_16V7KC77 0.1U_0402_16V7K

1 2

C78 0.1U_0402_16V7KC78 0.1U_0402_16V7K

1 2

APU_CLKP<12> APU_CLKN<12>

APU_DISP_CLKP<12> APU_DISP_CLKN<12>

route on high speed layer

R216 0_0402_5%R216 0_0402_5%

1 2

R217 0_0402_5%R217 0_0402_5%

1 2

APU_SIC<9,13> APU_SID<9,13>

APU_RST#<12> APU_PWRGD<12>

APU_ALERT#<14>

T23T23

T22T22

Avoid leakage issue

R58 0_0402_5%R58 0_0402_5%

1 2

R212 0_0402_5%R212 0_0402_5%

1 2

R214 0_0402_5%R214 0_0402_5%

1 2

R215 0_0402_5%R215 0_0402_5%

1 2

DP1_TXP0 DP1_TXN0

DP1_TXP1 DP1_TXN1

DP1_TXP2 DP1_TXN2

DP1_TXP3 DP1_TXN3

APU_CLKP APU_CLKN

APU_DISP_CLKP APU_DISP_CLKN

APU_SVC_R APU_SVD_R

APU_SIC APU_SID

APU_RST# APU_PWRGD

APU_PROCHOT# APU_THERMTRIP# APU_ALERT#

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

VSS_SENSE

T1T1

VDDNB_SENSE

T4T4

VDD_SENSE

T5T5

B

JAPUD

F2

DP0_TXP0

F1

DP0_TXN0

E3

DP0_TXP1

E2

DP0_TXN1

D2

DP0_TXP2

D1

DP0_TXN2

C2

DP0_TXP3

C3

DP0_TXN3

K2

DP1_TXP0

K1

DP1_TXN0

J3

DP1_TXP1

J2

DP1_TXN1

H2

DP1_TXP2

H1

DP1_TXN2

G2

DP1_TXP3

G3

DP1_TXN3

AH7

CLKIN_H

AH6

CLKIN_L

AH4

DISP_CLKIN_H

AH3

DISP_CLKIN_L

B8

SVC

A8

SVD

AH11

SIC

AG11

SID

AF10

RESET_L

AE10

PWROK

AD10

PROCHOT_L

AG12

THERMTRIP_L

AH12

ALERT_L

C12

TDI

A12

TDO

A11

TCK

D12

TMS

B12

TRST_L

B11

DBRDY

C11

DBREQ_L

E8

RSVD_1

K21

RSVD_2

AC11

RSVD_3

B9

VSS_SENSE

C8

VDDP_SENSE

A9

VDDNB_SENSE

B10

VDDIO_SENSE

C9

VDD_SENSE

A10

VDDR_SENSE

AMD_TOPEDO_FS-1

B

DISPLAY PORT 0DISPLAY PORT 1CLKSER.CTRLJTAG RSVDSENSE

DP0_AUXP DP0_AUXN

DP1_AUXP DP1_AUXN

DP2_AUXP DP2_AUXN

DP3_AUXP DP3_AUXN

DP4_AUXP DP4_AUXN

DP5_AUXP DP5_AUXN

DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD

DP_BLON

DP_DIGON

DP_VARY_BL

DP_AUX_ZVSS

TEST6

TEST9 TEST10 TEST12 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST21

TEST DISPLAY PORT MISC.

TEST22 TEST23 TEST24

TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L

TEST31

TEST32_H TEST32_L

TEST35

FS1R1

DMAACTIVE_L

THERMDA

TEST4

THERMDC

TEST5

C

@

DP0_AUXP

D4

DP0_AUXN

D5

DP1_AUXP

E5

DP1_AUXN

E6

J5 J6

H4 H5

UMA_HDMI_CLK

G5

UMA_HDMI_DATA

G6

F4 F5

DP0_HPD

D7

DP1_HPD

E7 J7 H7

DP4_HPD

G7 F7

DP_ENBKL

C6

DP_ENVDD

C5

DP_INT_PWM

C7

DP_AUX_ZVSS

D8

AA10 G10 H10 H12 D9 E9 G9 H9

APU_TEST18

H11

APU_TEST19

G11

APU_TEST20

F12

APU_TEST21

E11

APU_TEST22

D11 F10

APU_TEST24

G12

TEST25_H

AH10

TEST25_L

AH9 K7 K8 AA12 AB12

M_TEST

K22 AB11 AA11

TEST35

D10

FS1R1

Y11

DMA_ACTIVE#

AB10

AE12 AD12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Close to APU

C79 0.1U_0402_16V7KC79 0.1U_0402_16V7K

1 2

C80 0.1U_0402_16V7KC80 0.1U_0402_16V7K

1 2

C81 0.1U_0402_16V7KC81 0.1U_0402_16V7K

1 2

C82 0.1U_0402_16V7KC82 0.1U_0402_16V7K

1 2

UMA_HDMI_CLK <20> UMA_HDMI_DATA <20>

DP0_HPD <9> DP1_HPD <9>

DP4_HPD <9>

DP_ENBKL <9> DP_ENVDD <9> DP_INT_PWM <9>

R61 150_0402_1%R61 150_0402_1%

1 2

R129 1K_0402_5%R129 1K_0402_5%

1 2

T6T6 T7T7 T8T8 T9T9

R130 1K_0402_5%R130 1K_0402_5%

1 2

R131 1K_0402_5%R131 1K_0402_5%

1 2

R136 1K_0402_5%R136 1K_0402_5%

1 2

R137 1K_0402_5%R137 1K_0402_5%

1 2

R142 1K_0402_5%R142 1K_0402_5%

1 2

R152 1K_0402_5%R152 1K_0402_5%

1 2

T11T11 T12T12

T13T13 T14T14

FS1R1 will be low for non-FS1 APU

DMA_ACTIVE# <12>

Llano do not support

T15T15

internal thermal die

T16T16

2011/01/11 2011/11/11

C

DP0_AUXP_C <17> DP0_AUXN_C <17>

ML_VGA_AUXP <14> ML_VGA_AUXN <14>

LVDS CRT

HDMI

Compal Secret Data

AUX 2~5 are for GFX interface use, they could be selected to DDC or AUX logic

VDDIO level Need level shifter

APU_PROCHOT#<12>

Thermal Shutdown Temperature: 125 degree

HDT Debug conn

Deciphered Date

D

To LVDS Translator

To FCH

+1.5V

@

1 2

R122 10K_0402_5%

@

1 2

R123 10K_0402_5%

@

1 2

R124 10K_0402_5%

Debug Stuff

D

APU_PROCHOT#

Change TEST35 PH to avoid HDMI issue

design guide 2K PH P.97

Avoid leakage issue

R43

1K_0402_5%

1 2

R52

1K_0402_5%

APU_THERMTRIP#

MMBT3904_NL_SOT23-3

JHDT

1

3

5

7

9

11

13

15

17

19

SAMTE_ASP-136446-07-B

Title

Size Document Number Rev

Date: Sheet

10K_0402_5%

1 2

10K_0402_5%

+1.5V

1 2

@JHDT

@

2 4 6

8 10 12 14 16 18 20

Custom

E

3 1

2 4 6 8 10 12 14 16 18 20

E

DP0_AUXP DP0_AUXN DP1_AUXP DP1_AUXN

TEST25_L TEST25_H

TEST35

M_TEST

FS1R1

DMA_ACTIVE# UMA_HDMI_CLK UMA_HDMI_DATA

DMA_ACTIVE#

R44

R46

MMBT3904_NL_SOT23-3

12

R51

R51 10K_0402_5%

10K_0402_5%

B

2

Q5

C

SCHEMATIC MB A7571

R34 1.8K_0402_5%R34 1.8K_0402_5% R35 1.8K_0402_5%R35 1.8K_0402_5% R36 1.8K_0402_5%R36 1.8K_0402_5% R37 1.8K_0402_5%R37 1.8K_0402_5%

R156 510_0402_1%R156 510_0402_1%

1 2

R160 510_0402_1%R160 510_0402_1%

1 2

R155 300_0402_5%R155 300_0402_5%

1 2

R128 300_0402_5%@R128 300_0402_5%@

1 2

R191 39.2_0402_1%@R191 39.2_0402_1%@

1 2

R192 39.2_0402_1%R192 39.2_0402_1%

1 2

R203 10K_0402_5%R203 10K_0402_5%

1 2

R49 1K_0402_5%@R49 1K_0402_5%@

1 2

R55 1K_0402_5%R55 1K_0402_5%

1 2

R57 1K_0402_5%R57 1K_0402_5%

1 2

R126 1K_0402_5%R126 1K_0402_5%

1 2

+3VS+1.5V

12

R45

R45 10K_0402_5%

10K_0402_5%

2

B

Q41

E

31

C

Compal Electronics, Inc.

4019D7

E

12 12 12 12

H_PROCHOT# <29,34,39>

H_THERMTRIP# <13>

741Monday, May 09, 2011

of

+1.2VS

+1.5V

+3VALW

+1.5VS

+1.5V

B

A

B

C

D

E

CPU BOTTOM SIDE DECOUPLING

+CPU_CORE

C132

C133

C135

C134

22U_0805_6.3V6M

1

2

C152

22U_0805_6.3V6M

1

2

C91

4.7U_0603_6.3V6K

1

2

C105

180P_0402_50V8J

1

2

C128

C129

0.22U_0402_6.3V6K

1

2

C116

C117

1000P_0402_50V7K

1

2

C134

1

2

C153

1

2

C92

1

2

If the VSS plane is cut to create a VDDIO plane, place across the VDDIO and VSS plane split

0.22U_0402_6.3V6K

1000P_0402_50V7K

22U_0805_6.3V6M

+CPU_CORE

1 1

1

2

4.7U_0603_6.3V6K

C170

+CPU_CORE_NB

+2.5VS_VDDA

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K C164

C164

1

12

2

+1.5V

+1.2VS

3300P_0402_50V7K

1

C198

C198 180P_0402_50V8J

180P_0402_50V8J @

@

2

2 2

3 3

+2.5VS

L1

FBM_L11_201209_300LMA30T_0805

1 2

100U_B2_4VM_R35M

1

+

C196

@

2

C165

JAPUE

C1

VDD

D3

VDD

D6

VDD

E1

VDD

F3

VDD

F6

VDD

F8

VDD

G1

VDD

H3

VDD

H6

VDD

H8

VDD

J1

VDD

K3

VDD

K6

VDD

L1

VDD

L11

VDD

L19

VDD

M3

VDD

M6

VDD

M10

VDD

M18

VDD

N1

VDD

N11

VDD

N19

VDD

P3

VDD

P6

VDD

P10

VDD

P18

VDD

R1

VDD

R11

VDD

R19

VDD

T3

VDD

J9

VDDNB

J10

VDDNB

J11

VDDNB

J12

VDDNB

J14

VDDNB

J16

VDDNB

K9

VDDNB

K10

VDDNB

G28

VDDIO

H26

VDDIO

J28

VDDIO

K20

VDDIO

K23

VDDIO

K26

VDDIO

L22

VDDIO

L25

VDDIO

L28

VDDIO

M20

VDDIO

M23

VDDIO

M26

VDDIO

N22

VDDIO

N25

VDDIO

N28

VDDIO

P20

VDDIO

P23

VDDIO

P26

VDDIO

AG2

VDDP_A_1

AG3

VDDP_A_2

AG4

VDDP_A_3

AG5

VDDP_A_4

AG6

VDDR

AG7

VDDR

AG8

VDDR

AG9

VDDR

AE11

VDDA

AF11

VDDA

AMD_TOPEDO_FS-1

50A

22.5A

4A

3.5A

3A

0.75A

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB VDDNB

VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO

VDDP_B_1 VDDP_B_2 VDDP_B_3 VDDP_B_4

VDDR VDDR VDDR VDDR

@JAPUE

@

+CPU_CORE

T6 T10 T18 U1 U11 U19 V3 V6 V10 V18 W1 W11 W13 W15 W17 W19 Y3 Y6 Y10 Y12 Y14 Y16 Y18 Y20 AA1 AB3 AB6 AC1 AD3 AD6 AE1

K11 K12 K13 K14 K16 K17 K18 L18

R22 R25 R28 T20 T23 T26 U22 U25 U28 V20 V23 V26 W22 W25 W28 Y24 Y26 AA28

A3 A4 B3 B4

A5 A6 B5 B6

+CPU_CORE_NB

+1.5V

10U_0603_6.3V6M

1

C123

2

180P_0402_50V8J

1

C119

2

C124

C120

1

2

1

2

1

C131

2

+CPU_CORE_NB

1

C149

2

+1.5V

1

C88

2

+1.5V

1

C102

2

VDDP Decoupling

C126

C125

10U_0603_6.3V6M

1

2

VDDR Decoupling

C121

C122

180P_0402_50V8J

1

2

22U_0805_6.3V6M

1

2

C150

22U_0805_6.3V6M

1

2

C89

22U_0805_6.3V6M

1

2

C103

0.22U_0402_6.3V6K

1

2

C127

180P_0402_50V8J

1

2

C115

180P_0402_50V8J

1

2

1

2

C151

22U_0805_6.3V6M

1

2

C90

22U_0805_6.3V6M

1

2

C104

0.22U_0402_6.3V6K

1

2

180P_0402_50V8J

1

2

1000P_0402_50V7K

1

2

C137

22U_0805_6.3V6M

1

2

C154

0.22U_0402_6.3V6K

1

2

C93

4.7U_0603_6.3V6K

1

2

+1.2VS

1

+

C130

C130 330U_2.5V_M_R17

330U_2.5V_M_R17

2

C118

1000P_0402_50V7K

1

2

C136

C138

22U_0805_6.3V6M

C138

22U_0805_6.3V6M

1

2

0.22U_0402_6.3V6K

C139

C140

0.01U_0402_16V7K

0.22U_0402_6.3V6K

1

2

4/27 change to 330u/9m ohm on Pre-MP

C155

0.22U_0402_6.3V6K

4.7U_0603_6.3V6K

+1.2VS

C155

C94

C158

180P_0402_50V8J

1

2

C95

0.22U_0402_6.3V6K

1

2

C160

C159

180P_0402_50V8J

1

2

C96

C97

0.22U_0402_6.3V6K

1

2

330U_D2_2V_Y

1

+

2

0.22U_0402_6.3V6K

1

2

C141

C201

C98

1

2

1

+

2

1

2

C142

0.01U_0402_16V7K

1

2

330U_D2_2V_Y

C99

0.22U_0402_6.3V6K

1

2

C143

0.01U_0402_16V7K

1

2

C100

0.22U_0402_6.3V6K

1

2

C145

C144

180P_0402_50V8J

1

2

C101

180P_0402_50V8J

1

2

C146

330U_D2_2V_Y

1

+

2

1

+

C106

C106 330U_2.5V_M_R17

330U_2.5V_M_R17

2

330U_D2_2V_Y

C147

C148

330U_D2_2V_Y

1

+

2

JAPUF

A7

VSS

A13

VSS

A15

VSS

A17

VSS

A19

VSS

A21

VSS

A23

VSS

A25

VSS

B7

VSS

C4

VSS

C10

VSS

C14

VSS

C16

VSS

C18

VSS

C20

VSS

C22

VSS

C24

VSS

C26

VSS

C28

VSS

D13

VSS

D15

VSS

D17

VSS

D19

VSS

D21

VSS

D23

VSS

D25

VSS

D27

VSS

E4

VSS

E10

VSS

E12

VSS

F9

VSS

F11

VSS

F14

VSS

F16

VSS

F18

VSS

F20

VSS

F22

VSS

F24

VSS

F26

VSS

F28

VSS

G4

VSS

G8

VSS

G13

VSS

G15

VSS

G17

VSS

G19

VSS

G21

VSS

G23

VSS

G25

VSS

J4

VSS

J8

VSS

J18

VSS

J20

VSS

J22

VSS

J24

VSS

K19

VSS

L4

VSS

L7

VSS

L10

VSS

M9

VSS

M11

VSS

M19

VSS

N4

VSS

N7

VSS

N10

VSS

N18

VSS

P9

VSS

P11

VSS

P19

VSS

R4

VSS

R7

VSS

R10

VSS

R18

VSS

T9

VSS

AMD_TOPEDO_FS-1

@JAPUF

@

T11

VSS

T19

VSS

U4

VSS

U7

VSS

U10

VSS

U18

VSS

V9

VSS

V11

VSS

V19

VSS

W4

VSS

W7

VSS

W10

VSS

W12

VSS

W14

VSS

W16

VSS

W18

VSS

Y9

VSS

Y22

VSS

AA4

VSS

AA7

VSS

AB9

VSS

AB13

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB25

VSS

AB27

VSS

AC4

VSS

AC7

VSS

AC10

VSS

AC12

VSS

AC14

VSS

AC16

VSS

AC18

VSS

AC20

VSS

AC22

VSS

AC24

VSS

AC26

VSS

AC28

VSS

AD9

VSS

AD11

VSS

AE4

VSS

AE7

VSS

AE13

VSS

AE15

VSS

AE17

VSS

AE19

VSS

AE21

VSS

AE23

VSS

AE25

VSS

AE27

VSS

AF3

VSS

AF6

VSS

AF9

VSS

AF12

VSS

AF14

VSS

AF16

VSS

AF18

VSS

AF20

VSS

AF22

VSS

AF24

VSS

AF26

VSS

AF28

VSS

AG10

VSS

AH5

VSS

AH8

VSS

AH13

VSS

AH15

VSS

AH17

VSS

AH19

VSS

AH21

VSS

AH23

VSS

AH25

VSS

C112

C111

0.22U_0402_6.3V6K

1

C114

2

4 4

A

B

1

2

0.22U_0402_6.3V6K

C113

C107

0.22U_0402_6.3V6K

1

2

C109

C110

4.7U_0603_6.3V6K

C110

4.7U_0603_6.3V6K

1

2

2011/01/11 2011/11/11

C

VDD: 470uF x 6 22uF x 9

0.22uF x 2

0.01uF x 3 180pF x 2

Compal Secret Data

Deciphered Date

C108

4.7U_0603_6.3V6K

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CRB Decoupling Capacitor (include PWM side)：

VDDNB: 470uF x 4 22uF x 6

0.22uF x 2 180pF x 3

D

VDDIO: 680uF x 1 330uF x 1 22uF x 2

4.7uF x 4

0.22uF x 8 180pF x 4

VDDP/R_PWM: 470uF x 2 10uF x 1

Title

Size Document Number Rev

Custom

Date: Sheet

VDDP: 10uF x 3

0.22uF x 2 180pF x 2

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

VDDR:

4.7uF x 4

0.22uF x 4 1nF x 4 180pF x 4

E

VDDA: 100uF x 1

4.7uF x 1

0.22uF x 1

3.3nF x 1

841Monday, May 09, 2011

of

B

5

4

3

2

1

HPD

D D

C C

Translator HPD

From Translator or Conn

LVDS_HPD<17> DP0_HPD <7>

LVDS_HPD

R207 100K_0402_5%R207 100K_0402_5%

CRT HPD

From FCH

FCH_CRT_HPD<14> DP1_HPD <7>

FCH_CRT_HPD

R64 100K_0402_5%R64 100K_0402_5%

HDMI HPD

From HDMI Conn

HDMI_HPD<13,20> DP4_HPD <7>

HDMI_HPD

R204 100K_0402_5%R204 100K_0402_5%

12

10K_0402_5%

+3VS

R54

1 2

B

E

3 1

MMBT3904_NL_SOT23-3

+3VS

R150

1 2

B

E

3 1

MMBT3904_NL_SOT23-3

+3VS

R267

1 2

B

E

3 1

MMBT3904_NL_SOT23-3

12

R59

R59 10K_0402_5%

10K_0402_5%

2

Q26

C

12

R62

R62 10K_0402_5%

10K_0402_5%

2

Q16

C

12

R208

R208 10K_0402_5%

10K_0402_5%

2

Q27

C

+1.5VS

12

R60

4.7K_0402_5%

+1.5VS

12

R63

4.7K_0402_5%

+1.5VS

12

R210

4.7K_0402_5%

Panel ENBKL

DP_ENBKL<7>

Panel ENVDD

DP_ENVDD<7>

@ R65

@

1 2

@ R69

@

R65 100K_0402_5%

100K_0402_5%

@

1 2

R66 2.2K_0402_5%

@

1 2

R71 2.2K_0402_5%

R69

100K_0402_5%

1 2

+3VS

R67

@ R67

@

100K_0402_5%

1 2

C

Q15

2

B

MMBT3904_NL_SOT23-3

E

3 1

@

+3VS

@ R74

@

2

B

E

@

12

R68

@ R68

@

4.7K_0402_5%

61

Q14A

Q14A 2N7002DW-T/R7_SOT363-6@

2N7002DW-T/R7_SOT363-6@

2

@ R75

@

R74

100K_0402_5%

1 2

5

C

Q28

Q28 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

3 1

12

R75

4.7K_0402_5%

3

Q14B

Q14B 2N7002DW-T/R7_SOT363-6@

2N7002DW-T/R7_SOT363-6@

4

APU_ENBKL <18>

APU_ENVDD <18>

B B

SB-TSI

Panel PWM

+3VS

Need to confirm R93 value

4.7K or 47K

Q37

Q42

Vgs of BSH111 : Min = 0.4V Max = 1.3V

4

EC_SMB_DA2 <29,30>

EC_SMB_CK2 <29,30>

12

R92

R92 47K_0402_5%

47K_0402_5%

C

Q21

DP_INT_PWM<7>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

R89 2.2K_0402_5%R89 2.2K_0402_5%

12

R76

4.7K_0402_5%

Compal Secret Data

2011/01/11 2011/11/11

Compal Secret Data

Q21

2

B

MMBT3904_NL_SOT23-3

E

3 1

Deciphered Date

2

G

12

R93

R93 47K_0402_5%

47K_0402_5%

13

D

Q35

Q35 2N7002_SOT23-3

2N7002_SOT23-3

S

2

APU_INVT_PWM <17,18>

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

1

B

of

941Monday, May 09, 2011

+1.5VS

12

R219

R218

2

Q22

APU_SID<7,13>

A A

APU_SIC<7,13>

5

SGD

BSH111_SOT23-3

2

Q25

SGD

BSH111_SOT23-3

31

R218

2.2K_0402_5%

APU_SID_Q

APU_SIC_Q

2.2K_0402_5%

2

3 1

SGD

BSH111_SOT23-3

2

3 1

SGD

BSH111_SOT23-3

5

+VREF_DQA

D D

C C

B B

A A

+3VS

DDR_A_SCS1#<6>

C181

DDR_A_BS2<6>

DDR_A_CLK0<6> DDR_A_CLK0#<6>

DDR_A_BS0<6>

DDR_A_WE#<6>

DDR_A_CAS#<6>

1 C182

C182

2

2.2U_0603_6.3V6K

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_A_CKE0

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 DDR_A_CLK0

DDR_A_CLK0# DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDR_A_SCS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

R90

1 2

10K_0402_5%

1

2

0.1U_0402_16V4Z

5

+0.75VS

12

R91

R91 10K_0402_5%

10K_0402_5%

+1.5V

JDDRH

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

LOTES_AAA-DDR-111-K01_204P

@

BOSS1

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0 ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

BOSS1 BOSS2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

VDD CK1

VDD BA1

VDD

VDD VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

VSS SDA

SCL VTT

A15 A14

A11

A7 A6

A4 A2

A0

S0#

NC

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

4

+1.5V

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 MEM_MA_RST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31

DDR_A_CKE1 DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0 DDR_A_CLK1

DDR_A_CLK1# DDR_A_BS1

DDR_A_RAS# DDR_A_SCS0#

DDR_A_ODT0 DDR_A_ODT1

+VREF_CAA DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

MEM_MA_EVENT#

FCH_SDATA0 FCH_SCLK0

+0.75VS

4

DDR3 SO-DIMM A Standard Type

MEM_MA_RST# <6>

DDR_A_CKE1 <6>DDR_A_CKE0<6>

DDR_A_CLK1 <6> DDR_A_CLK1# <6>

DDR_A_BS1 <6> DDR_A_RAS# <6>

DDR_A_SCS0# <6> DDR_A_ODT0 <6>

DDR_A_ODT1 <6>

1

C66

1000P_0402_50V7K

Close to JDDRH.126

MEM_MA_EVENT# <6> FCH_SDATA0 <11,13,23> FCH_SCLK0 <11,13,23>

1

C162

C161

0.1U_0402_16V7K

2.2U_0603_6.3V6K

2

Issued Date

2.2U_0603_6.3V6K

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+VREF_DQA

DDR_A_DQS[0..7] <6> DDR_A_DQS#[0..7] <6>

DDR_A_D[0..63] <6> DDR_A_MA[0..15] <6> DDR_A_DM[0..7] <6>

1

C157

C156

0.1U_0402_16V7K

2

C157

2

C65

1000P_0402_50V7K

Close to JDDRH.1

1

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

2

+1.5V

12

R79

1K_0402_1%

12

R81

1K_0402_1%

@

4/27 For ESD request Pre-MP

+1.5V

C343 0.1U_0402_16V4ZC343 0.1U_0402_16V4Z C344 0.1U_0402_16V4ZC344 0.1U_0402_16V4Z C345 0.1U_0402_16V4ZC345 0.1U_0402_16V4Z C346 0.1U_0402_16V4ZC346 0.1U_0402_16V4Z C347 0.1U_0402_16V4ZC347 0.1U_0402_16V4Z C348 0.1U_0402_16V4ZC348 0.1U_0402_16V4Z C349 0.1U_0402_16V4ZC349 0.1U_0402_16V4Z C350 0.1U_0402_16V4ZC350 0.1U_0402_16V4Z

+1.5V

C223 33P_0402_50V8JC223 33P_0402_50V8J C224 33P_0402_50V8JC224 33P_0402_50V8J C247 33P_0402_50V8JC247 33P_0402_50V8J C251 33P_0402_50V8JC251 33P_0402_50V8J

1

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

For EMI request

1 2 1 2 1 2 1 2

Place equally on moat

+1.5V

12

R80

1K_0402_1%

12

1

R82

@

1K_0402_1%

2

Compal Secret Data

2011/01/11 2011/11/11

3

Compal Secret Data

Layout Note: Place near JDDRH

+1.5V

C218 330U_D2_2VM_R9M

C218 330U_D2_2VM_R9M C166 0.1U_0402_16V4ZC166 0.1U_0402_16V4Z C168 0.1U_0402_16V4ZC168 0.1U_0402_16V4Z C171 0.1U_0402_16V4ZC171 0.1U_0402_16V4Z C174 0.1U_0402_16V4ZC174 0.1U_0402_16V4Z C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z C176 0.1U_0402_16V4ZC176 0.1U_0402_16V4Z C179 0.1U_0402_16V4ZC179 0.1U_0402_16V4Z C178 0.1U_0402_16V4ZC178 0.1U_0402_16V4Z C185 0.1U_0402_16V4ZC185 0.1U_0402_16V4Z C180 0.1U_0402_16V4ZC180 0.1U_0402_16V4Z

Deciphered Date

+

1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

SGA20331E10

Layout Note: Place near JDDRH.203 and 204

+0.75VS

C85 0.1U_0402_16V4Z

C84 4.7U_0603_6.3V6KC84 4.7U_0603_6.3V6K

C186 0.1U_0402_16V4ZC186 0.1U_0402_16V4Z C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

3/22 For EMI request PVT

+1.5V

C21 47P_0402_50V8JC21 47P_0402_50V8J

1 2

C20 47P_0402_50V8JC20 47P_0402_50V8J

1 2

C22 47P_0402_50V8JC22 47P_0402_50V8J

1 2

C23 47P_0402_50V8JC23 47P_0402_50V8J

1 2

Place equally on moat

+1.5V

@

1 2

1 2 1 2

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

10 41Monday, May 09, 2011

1

B

of

A

+VREF_DQB

1 1

DDR_B_CKE0<6>

2 2

3 3

4 4

+3VS

2.2U_0603_6.3V6K

C207

C207 @

@

DDR_B_BS2<6>

DDR_B_CLK0<6> DDR_B_CLK0#<6>

DDR_B_WE#<6> DDR_B_CAS#<6>

DDR_B_SCS1#<6>

1

2

1

C208

2

@

0.1U_0402_16V4Z

DDR_B_D0 DDR_B_D1

DDR_B_DM0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2 DDR_B_D18

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDR_B_CKE0

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 DDR_B_CLK0

DDR_B_CLK0# DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDR_B_SCS1#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D50

DDR_B_D51 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

R98

1 2

10K_0402_5%

+0.75VS

R99

R99 10K_0402_5%

10K_0402_5%

1 2

+1.5V

JDDRL

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

LOTES_AAA-DDR-109-K01_204P

@

BOSS1

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0 ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

BOSS1 BOSS2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

VDD CK1

VDD BA1

VDD

VDD VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

VSS SDA

SCL VTT

A15 A14

A11

A7 A6

A4 A2

A0

S0#

NC

Change SODIMM1 SMB address to A2 01/25

A

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

B

+1.5V

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 MEM_MB_RST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31

DDR_B_CKE1 DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 DDR_B_CLK1

DDR_B_CLK1# DDR_B_BS1

DDR_B_RAS# DDR_B_SCS0#

DDR_B_ODT0 DDR_B_ODT1

+VREF_CAB DDR_B_D36

DDR_B_D37 DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63

MEM_MB_EVENT#

FCH_SDATA0 FCH_SCLK0

+0.75VS

B

DDR3 SO-DIMM B Standard Type

MEM_MB_RST# <6>

DDR_B_CKE1 <6>

DDR_B_CLK1 <6> DDR_B_CLK1# <6>

DDR_B_BS1 <6> DDR_B_RAS# <6>DDR_B_BS0<6>

DDR_B_SCS0# <6> DDR_B_ODT0 <6>

DDR_B_ODT1 <6>

1

C68

C188

1000P_0402_50V7K

2

Close to JDDRL.126

MEM_MB_EVENT# <6> FCH_SDATA0 <10,13,23> FCH_SCLK0 <10,13,23>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C187

2.2U_0603_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K 2

2

C

+VREF_DQB

1

C67

1000P_0402_50V7K

2

Close to JDDRL.1

+1.5V

12

R86

1K_0402_1%

12

R94

@

1K_0402_1%

+1.5V

C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z C169 0.1U_0402_16V4ZC169 0.1U_0402_16V4Z C172 0.1U_0402_16V4ZC172 0.1U_0402_16V4Z C175 0.1U_0402_16V4ZC175 0.1U_0402_16V4Z C195 0.1U_0402_16V4ZC195 0.1U_0402_16V4Z C177 0.1U_0402_16V4ZC177 0.1U_0402_16V4Z C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z C191 0.1U_0402_16V4ZC191 0.1U_0402_16V4Z C192 0.1U_0402_16V4ZC192 0.1U_0402_16V4Z C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

Compal Secret Data

2011/01/11 2011/11/11

C

Compal Secret Data

Deciphered Date

DDR_B_DQS#[0..7] <6> DDR_B_DQS[0..7] <6> DDR_B_D[0..63] <6> DDR_B_MA[0..15] <6> DDR_B_DM[0..7] <6>

1

C184

Layout Note: Place near JDDRH

1

C183

0.1U_0402_16V7K

2.2U_0603_6.3V6K

2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

@

D

+1.5V

12

1K_0402_1%

12

1K_0402_1%

D

R83

R84

E

Layout Note: Place near JDDRH.203 and 204

+0.75VS

@

C87 0.1U_0402_16V4Z

1 2

C86 4.7U_0603_6.3V6KC86 4.7U_0603_6.3V6K

1 2

C194 0.1U_0402_16V4ZC194 0.1U_0402_16V4Z

1 2

C206 0.1U_0402_16V4ZC206 0.1U_0402_16V4Z

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

+1.5V

of

11 41Monday, May 09, 2011

E

B

A

APU_PCIE_RST#_R LPC_RST#_R

R229

R229 1M_0402_5%

1M_0402_5%

Y2

4

OSC

1

OSC

UMI_MTX_FRX_P0 UMI_MTX_FRX_N0 UMI_MTX_FRX_P1 UMI_MTX_FRX_N1 UMI_MTX_FRX_P2 UMI_MTX_FRX_N2 UMI_MTX_FRX_P3 UMI_MTX_FRX_N3

UMI_FTX_C_MRX_P0 UMI_FTX_C_MRX_N0 UMI_FTX_C_MRX_P1 UMI_FTX_C_MRX_N1 UMI_FTX_C_MRX_P2 UMI_FTX_C_MRX_N2 UMI_FTX_C_MRX_P3 UMI_FTX_C_MRX_N3

PCIE_CALRP PCIE_CALRN

PCIE_MTX_USBRX_P1 PCIE_MTX_USBRX_N1 PCIE_MTX_CRRX_P2 PCIE_MTX_CRRX_N2

PCIE_MRX_C_USBTX_P1 PCIE_MRX_C_USBTX_N1 PCIE_MRX_C_CRTX_P2 PCIE_MRX_C_CRTX_N2

CLK_CALRN

APU_DISP_CLKP APU_DISP_CLKN

TRAVIS_CLKP TRAVIS_CLKN

APU_CLKP APU_CLKN

CLK_CR CLK_CR#

CLK_WLAN CLK_WLAN#

CLK_LAN CLK_LAN#

CLK_USB30 CLK_USB30#

3

NC

2

NC

C202 0.1U_0402_16V7KC202 0.1U_0402_16V7K

UMI_MTX_C_FRX_P0<5> UMI_MTX_C_FRX_N0<5> UMI_MTX_C_FRX_P1<5> UMI_MTX_C_FRX_N1<5> UMI_MTX_C_FRX_P2<5> UMI_MTX_C_FRX_N2<5> UMI_MTX_C_FRX_P3<5>

1 1

USB3.0 Cardreader

2 2

UMI_MTX_C_FRX_N3<5> UMI_FTX_C_MRX_P0<5>

UMI_FTX_C_MRX_N0<5> UMI_FTX_C_MRX_P1<5> UMI_FTX_C_MRX_N1<5> UMI_FTX_C_MRX_P2<5> UMI_FTX_C_MRX_N2<5> UMI_FTX_C_MRX_P3<5> UMI_FTX_C_MRX_N3<5>

+PCIE_VDDR_FCH

PCIE_MTX_C_USBRX_P1<26> PCIE_MTX_C_USBRX_N1<26> PCIE_MTX_C_CRRX_P2<25> PCIE_MTX_C_CRRX_N2<25>

PCIE_MRX_C_USBTX_P1<26> PCIE_MRX_C_USBTX_N1<26> PCIE_MRX_C_CRTX_P2<25> PCIE_MRX_C_CRTX_N2<25>

+1.1VS_CKVDD

SS

APU Display

NSS

LVDS translator APU

Cardreader

WLAN

SS

LAN

3 3

4 4

JET

USB3.0

A

C220 27P_0402_50V8JC220 27P_0402_50V8J

1 2

25MHZ_20PF_7A25000012

1 2

C230 27P_0402_50V8JC230 27P_0402_50V8J

C248 15P_0402_50V8JC248 15P_0402_50V8J

1 2

20M_0402_5%

1 2

C249 15P_0402_50V8JC249 15P_0402_50V8J

1 2

C203 0.1U_0402_16V7KC203 0.1U_0402_16V7K

1 2

C204 0.1U_0402_16V7KC204 0.1U_0402_16V7K

1 2

C209 0.1U_0402_16V7KC209 0.1U_0402_16V7K

1 2

C210 0.1U_0402_16V7KC210 0.1U_0402_16V7K

1 2

C211 0.1U_0402_16V7KC211 0.1U_0402_16V7K

1 2

C213 0.1U_0402_16V7KC213 0.1U_0402_16V7K

1 2

C212 0.1U_0402_16V7KC212 0.1U_0402_16V7K

1 2

R220 590_0402_1%R220 590_0402_1%

1 2

R221 2K_0402_1%R221 2K_0402_1%

1 2

RENE@

C214 0.1U_0402_16V7K

1 2

C215 0.1U_0402_16V7KRENE@C215 0.1U_0402_16V7KRENE@

1 2

C216 0.1U_0402_16V7KC216 0.1U_0402_16V7K

1 2

C219 0.1U_0402_16V7KC219 0.1U_0402_16V7K

1 2

R228 2K_0402_1%R228 2K_0402_1%

1 2

Input from external clock generator NC for internal clock generator

APU_DISP_CLKP<7> APU_DISP_CLKN<7>

TRAVIS_CLKP<17> TRAVIS_CLKN<17>

APU_CLKP<7> APU_CLKN<7>

CLK_CR<25> CLK_CR#<25>

CLK_WLAN<23> CLK_WLAN#<23>

CLK_LAN<24> CLK_LAN#<24>

CLK_USB30<26> CLK_USB30#<26>

12

Y1

12

R230

32.768KHZ_12.5PF_Q13MC14610002

B

U1A

AE2

PCIE_RST#

AD5

A_RST#

AE30

UMI_TX0P

AE32

UMI_TX0N

AD33

UMI_TX1P

AD31

UMI_TX1N

AD28

UMI_TX2P

AD29

UMI_TX2N

AC30

UMI_TX3P

AC32

UMI_TX3N

AB33

UMI_RX0P

AB31

UMI_RX0N

AB28

UMI_RX1P

AB29

UMI_RX1N

Y33

UMI_RX2P

Y31

UMI_RX2N

Y28

UMI_RX3P

Y29

UMI_RX3N

AF29

PCIE_CALRP

AF31

PCIE_CALRN

V33

GPP_TX0P

V31

GPP_TX0N

W30

GPP_TX1P

W32

GPP_TX1N

AB26

GPP_TX2P

AB27

GPP_TX2N

AA24

GPP_TX3P

AA23

GPP_TX3N

AA27

GPP_RX0P

AA26

GPP_RX0N

W27

GPP_RX1P

V27

GPP_RX1N

V26

GPP_RX2P

W26

GPP_RX2N

W24

GPP_RX3P

W23

GPP_RX3N

F27

CLK_CALRN

G30

PCIE_RCLKP

G28

PCIE_RCLKN

R26

DISP_CLKP

T26

DISP_CLKN

H33

DISP2_CLKP

H31

DISP2_CLKN

T24

APU_CLKP

T23

APU_CLKN

J30

SLT_GFX_CLKP

K29

SLT_GFX_CLKN

H27

GPP_CLK0P

H28

GPP_CLK0N

J27

GPP_CLK1P

K26

GPP_CLK1N

F33

GPP_CLK2P

F31

GPP_CLK2N

E33

GPP_CLK3P

E31

GPP_CLK3N

25M_X1

25M_X2

32K_X1

32K_X2

B

M23 M24

M27 M26

N25 N26

R23 R24

N27 R27

J26

C31

C33

GPP_CLK4P GPP_CLK4N

GPP_CLK5P GPP_CLK5N

GPP_CLK6P GPP_CLK6N

GPP_CLK7P GPP_CLK7N

GPP_CLK8P GPP_CLK8N

14M_25M_48M_OSC

25M_X1

25M_X2

HUDSON-M3_FCBGA656

T66T66 T67T67

HUDSON-2

PCI CLKS

PCICLK4/14M_OSC/GPO39

PCI EXPRESS INTERFACES

PCI INTERFACE

INT PU 15K

INT PU 8.2K

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT2#/SD_LED/GPO45

GNT3#/CLK_REQ7#/GPIO46

INT PU 8.2K

CLOCK GENERATOR

LPCAPUS5 PLUS

INT PU 8.2K

LDRQ1#/CLK_REQ6#/GPIO49

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

SERIRQ/GPIO48

INTRUDER_ALERT#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HUDM3R3@

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

REQ1#/GPIO40

GNT0#

GNT1#/GPO44

CLKRUN#

LOCK#

INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

DMA_ACTIVE#

PROCHOT#

APU_PG LDT_STP# APU_RST#

S5_CORE_EN

RTCCLK

VDDBT_RTC_G

32K_X1

32K_X2

C

AF3

PCI_CLK1

AF1 AF5

PCI_CLK3

AG2

PCI_CLK4

AF6 AB5

AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12

PCI_AD23

AE12

PCI_AD24

AC12

PCI_AD25

AE13

PCI_AD26

AF13

PCI_AD27

AH13 AH14 AD15 AC15

FELICA_PWR

AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9

AF18 AE18 AC16 AD18

B25 D25

D27 C28 A26 A29 A31 B27 AE27 AE19

G25 E28 E26 G26 F26

H7 F1 F3 E6

G2

G4

1 2

R283 8.2K_0402_5%R283 8.2K_0402_5%

LPC_CLK0 LPC_CLK1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#

SERIRQ

DMA_ACTIVE# APU_PROCHOT#_R APU_PWRGD

APU_RST#

RTC_CLK_R +RTCVCC_R 32K_X1

32K_X2

0.1U_0402_16V4Z

2011/01/11 2011/11/11

PCI_CLK1 <15> PCI_CLK3 <15>

PCI_CLK4 <15>

PCI_AD23 <15> PCI_AD24 <15> PCI_AD25 <15> PCI_AD26 <15> PCI_AD27 <15>

FELICA_PWR

CLKREQ_USB30# <26>

+3VS

R255 22_0402_5%R255 22_0402_5%

1 2

R258 22_0402_5%R258 22_0402_5%

1 2

R259 0_0402_5%R259 0_0402_5%

T25T25

1 2

R260 0_0402_5%R260 0_0402_5%

20 mils

1

C250

Compal Secret Data

1

2

Deciphered Date

Strap

C252

C252 1U_0402_6.3V6K

1U_0402_6.3V6K

D

APU_PCIE_RST#_R

place close to FCH

LPC_RST#_R

12

R72 100K_0402_5%R72 100K_0402_5%

CLK_PCI_EC <15,29> CLK_PCI_DDR <15,30>

LPC_AD0 <29,30> LPC_AD1 <29,30> LPC_AD2 <29,30> LPC_AD3 <29,30> LPC_FRAME# <29,30>

SERIRQ <29>

DMA_ACTIVE# <7> APU_PROCHOT# <7> APU_PWRGD <7>

APU_RST# <7>

RTC_CLK <15,29>

R271

1 2

120_0402_5%

+RTCVCC

CMOS Setting Place under DDR Door

D

12

R225 33_0402_5%R225 33_0402_5%

R226 33_0402_5%R226 33_0402_5%

Strap

R355

1 2

120_0402_5%

JCMOS@JCMOS @

E

PCIE_RST# is for PCIE devices on APU

1 2

C221

150P_0402_50V8J

1

2

R223

R223 100K_0402_5%

100K_0402_5% @

@

1 2

APU_PCIE_RST# <17,23,24>

A_RST# is for LPC devices

1 2

C222

150P_0402_50V8J

1

2

R224

R224 100K_0402_5%

100K_0402_5% @

@

1 2

LPC_RST# <29,30>

For ESD request 3/24

APU_PWRGD APU_RST#

+3VS+1.5VS

12

R269

10K_0402_5%

B

2

Q46

E

APU_PWRGD

DMA active. The FCH drives the DMA_ACTIVE# to APU to notify DMA activity. This will cause the APU to reestablish the UMI link quicker.

S5_CORE_EN is for S5+ mode used to turn off +1.1VALW and +3VALW of FCH on S5+ mode

+RTCBATT_R +RTCBATT_D

E

3 1

C

MMBT3904_NL_SOT23-3

R268

1 2

1K_0402_5%

1

C256

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

12

C332 100P_0402_50V8JC332 100P_0402_50V8J

12

C333 100P_0402_50V8JC333 100P_0402_50V8J

R270

4.7K_0402_5%

1 2

1

D13

D13 BAS40-04_SOT23-3

BAS40-04_SOT23-3

2

3

E

APU_PWRGD_L <39>

+RTCBATT

+3VL

of

12 41Monday, May 09, 2011

B

A

FCH_PCIE_RST#<25,26>

1 1

+3VS

1 2

R301 8.2K_0402_5%

SM Bus 0-->S0 PWR domain SM Bus 1-->S5 PWR domain (for ASF device only)

VGA_PD: Support CRT power saving L: MLDAC power on

2 2

H: MLDAC power off

PEG_CLKREQ#

@

H_THERMTRIP#<7>

CLKREQ_LAN#<24>

USB_OC1# is for USB port10

USB_OC0# is for USB port0 and port1

AZ_BITCLK_HD<27> AZ_SDOUT_HD<27>

AZ_SDIN0_HD<27>

AZ_SYNC_HD<27> AZ_RST_HD#<27>

+3VALW

3 3

4 4

1 2

R421 10K_0402_5%R421 10K_0402_5%

1 2

R293 10K_0402_5%

1 2

R278 10K_0402_5%R278 10K_0402_5%

1 2

R288 10K_0402_5%R288 10K_0402_5%

1 2

R289 10K_0402_5%R289 10K_0402_5%

1 2

R272 10K_0402_5%

1 2

R276 10K_0402_5%R276 10K_0402_5%

1 2

R306 10K_0402_5%

1 2

R318 10K_0402_5%R318 10K_0402_5%

1 2

R319 10K_0402_5%R319 10K_0402_5%

+3VS

1 2

R286 2.2K_0402_5%R286 2.2K_0402_5%

1 2

R287 2.2K_0402_5%R287 2.2K_0402_5%

1 2

R291 8.2K_0402_5%

1 2

R290 8.2K_0402_5%

1 2

R281 8.2K_0402_5%

1 2

R284 8.2K_0402_5%

R280 100K_0402_5%R280 100K_0402_5%

1 2

R324 10K_0402_5%

1 2

R325 10K_0402_5%

@

RENE@

@

@ @

@

@ @

@

CR_CPPE# VGA_PD_FCH H_THERMTRIP# FCH_SCLK1 FCH_SDATA1 EC_LID_OUT# FCH_PCIE_WAKE# USB30_SMI# USB_OC0# USB_OC1#

FCH_SCLK0 FCH_SDATA0 CLKREQ_WLAN# CLKREQ_JET# CLKREQ_CR#

R282 1K_0402_5%R282 1K_0402_5%

CLKREQ_LAN#_R

EC_RSMRST#

12

HDA_BITCLK AZ_SDIN0_HD

A

Close to FCH

R227 100K_0402_5%@R227 100K_0402_5%@

C19 150P_0402_50V8JC19 150P_0402_50V8J

1 2

VGA_PD<15>

Change ACIN to low active for ACIN LED issue with PEQAE

Set cardreader clock as free-running

12

EC_LID_OUT#<29>

SLP_S3#<29>

SLP_S5#<29> PBTN_OUT#<29> FCH_PWRGD<29>

GATEA20<29> KB_RST#<29>

EC_SCI#<29> EC_SMI#<29>

FCH_PCIE_WAKE#<24,26>

1 2

+3VS

R279 10K_0402_5%R279 10K_0402_5%

EC_RSMRST#<29>

@

CLKREQ_JET#<23>

21

D17 RB751V40_SC76-2

1 2

R361 0_0402_5%R361 0_0402_5%

FCH_SPKR<27> FCH_SCLK0<10,11,23> FCH_SDATA0<10,11,23>

CLKREQ_WLAN#<23>

R292 0_0402_5%@R292 0_0402_5%@

1 2

USB30_SMI#<26>

ODD_PLUGIN#<21>

CR_CPPE#<25> USB_OC1#<23,26,29> USB_OC0#<21,29>

R320 33_0402_5%R320 33_0402_5%

1 2

R321 33_0402_5%R321 33_0402_5%

1 2

R322 33_0402_5%R322 33_0402_5%

1 2

R323 33_0402_5%R323 33_0402_5%

1 2

ACIN<29,31,35>

B

PCIE_RST2# is for PCIE devices on FCH

R222

33_0402_5%

FCH_PCIE_RST#_R

1 2

EC_LID_OUT# SLP_S3#

SLP_S5# PBTN_OUT# FCH_PWRGD

TEST0 TEST1 TEST2

GATEA20 KB_RST#

EC_SCI# EC_SMI#

T31T31

FCH_PCIE_WAKE#

T60T60

H_THERMTRIP#

WD_PWRGD EC_RSMRST# CLKREQ_JET#

CLKREQ_LAN#_R CLKREQ_CR#

FCH_SPKR FCH_SCLK0 FCH_SDATA0 FCH_SCLK1 FCH_SDATA1 CLKREQ_WLAN#

T30T30

VGA_PD_FCH

T58T58

HDMI_HPD_Q PEG_CLKREQ#

USB30_SMI#

ODD_DA#_FCH

T61T61 CR_CPPE# USB_OC1# USB_OC0#

HDA_BITCLK HDA_SDOUT AZ_SDIN0_HD

HDA_SYNC HDA_RST#

T26T26 T27T27

ACIN_FCH#

3

2N7002DW-T/R7_SOT363-6

5

Q208B

T33T33

4

T32T32 T35T35 T34T34 T37T37 T36T36 T38T38 T39T39 T45T45 T44T44 T46T46 T47T47 T41T41 T40T40 T42T42 T43T43 T49T49 T48T48

For FCH internal debug use

+3VALW

(Internal 10K pull-down)

@

1 2

R273 2.2K_0402_5%

@

1 2

R274 2.2K_0402_5%

@

1 2

R275 2.2K_0402_5%

B

U1D

AB6

PCIE_RST2#/PCI_PME#/GEVENT4#

R2

RI#/GEVENT22#

W7

SPI_CS3#/GBE_STAT1/GEVENT21#

T3

SLP_S3#

W2

SLP_S5#

J4

PWR_BTN#

N7

PWR_GOOD

T9

TEST0

T10

TEST1/TMS

V9

TEST2

AE22

GA20IN/GEVENT0#

AG19

KBRST#/GEVENT1#

R9

LPC_PME#/GEVENT3#

C26

LPC_SMI#/GEVENT23#

T5

LPC_PD#/GEVENT5#

U4

SYS_RESET#/GEVENT19#

K1

WAKE#/GEVENT8#

V7

IR_RX1/GEVENT20#

R10

THRMTRIP#/SMBALERT#/GEVENT2#

AF19

WD_PWRGD

U2

RSMRST#

AG24

CLK_REQ4#/SATA_IS0#/GPIO64

AE24

CLK_REQ3#/SATA_IS1#/GPIO63

AE26

SMARTVOLT1/SATA_IS2#/GPIO50

AF22

CLK_REQ0#/SATA_IS3#/GPIO60

AH17

SATA_IS4#/FANOUT3/GPIO55

AG18

SATA_IS5#/FANIN3/GPIO59

AF24

SPKR/GPIO66

AD26

SCL0/GPIO43

AD25

SDA0/GPIO47

T7

SCL1/GPIO227

R7

SDA1/GPIO228

AG25

CLK_REQ2#/FANIN4/GPIO62

AG22

CLK_REQ1#/FANOUT4/GPIO61

J2

IR_LED#/LLB#/GPIO184

AG26

SMARTVOLT2/SHUTDOWN#/GPIO51

V8

DDR3_RST#/GEVENT7#/VGA_PD

W8

GBE_LED0/GPIO183

Y6

SPI_HOLD#/GBE_LED1/GEVENT9#

V10

GBE_LED2/GEVENT10#

AA8

GBE_STAT0/GEVENT11#

AF25

CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

M7

BLINK/USB_OC7#/GEVENT18#

R8

USB_OC6#/IR_TX1/GEVENT6#

T1

USB_OC5#/IR_TX0/GEVENT17#

P6

USB_OC4#/IR_RX0/GEVENT16#

F5

USB_OC3#/AC_PRES/TDO/GEVENT15#

P5

USB_OC2#/TCK/GEVENT14#

J7

USB_OC1#/TDI/GEVENT13#

T8

USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

AB3

AZ_BITCLK

AB1

AZ_SDOUT

AA2

AZ_SDIN0/GPIO167

Y5

AZ_SDIN1/GPIO168

Y3

AZ_SDIN2/GPIO169

Y1

AZ_SDIN3/GPIO170

AD6

AZ_SYNC

AE4

AZ_RST#

K19

PS2_DAT/SDA4/GPIO187

J19

PS2_CLK/CEC/SCL4/GPIO188

J21

SPI_CS2#/GBE_STAT2/GPIO166

D21

PS2KB_DAT/GPIO189

C20

PS2KB_CLK/GPIO190

D23

PS2M_DAT/GPIO191

C22

PS2M_CLK/GPIO192

F21

KSO_0/GPIO209

E20

KSO_1/GPIO210

F20

KSO_2/GPIO211

A22

KSO_3/GPIO212

E18

KSO_4/GPIO213

A20

KSO_5/GPIO214

J18

KSO_6/GPIO215

H18

KSO_7/GPIO216

G18

KSO_8/GPIO217

B21

KSO_9/GPIO218

K18

KSO_10/GPIO219

D19

KSO_11/GPIO220

A18

KSO_12/GPIO221

C18

KSO_13/GPIO222

B19

KSO_14/GPIO223

B17

KSO_15/GPIO224

A24

KSO_16/GPIO225

D17

KSO_17/GPIO226

HUDSON-M3_FCBGA656

TEST0 TEST1 TEST2

C

HUDM3R3@

HUDSON-2

INT PU 10K

USBCLK/14M_25M_48M_OSC

USB MISCUSB 1.1USB 2.0USB 3.0

INT PD 15K

INT PU8.2K INT PU8.2K

INT PU10K INT PU8.2K INT PU10K INT PU10K INT PU10K INT PU10K

INT PU10K

INT PU8.2K INT PU8.2K INT PU8.2K

INT PU8.2K INT PU8.2K

INT PU8.2K INT PU10K

INT PU8.2K INT PU8.2K

INT PU10K INT PU10K INT PU10K INT PU8.2K

INT PU10K INT PU10K INT PU10K INT PU10K

INT PU10K

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

INT PU10K INT PU10K

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

INT PU10K

INT PD 50K

INT PU 10K

EMBEDDED CTRL

INT PU 10K

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198

EC_PWM2/EC_TIMER2/WOL_EN/GPIO199

EC_PWM3/EC_TIMER3/GPIO200

INT PU 10K

+3VS

G

S

HDMI_HPD<9,20>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S

2N7002_SOT23-3

C

+3VALW

2

Q39

Q39 CEC@

CEC@

13

D

2011/01/11 2011/11/11

HUDM3R3@

USB_RCOMP

USB_FSD1P/GPIO186

USB_FSD1N

USB_FSD0P/GPIO185

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P

USB_HSD9N

USB_HSD8P

USB_HSD8N

USB_HSD7P

USB_HSD7N

USB_HSD6P

USB_HSD6N

USB_HSD5P

USB_HSD5N

USB_HSD4P

USB_HSD4N

USB_HSD3P

USB_HSD3N

USB_HSD2P

USB_HSD2N

USB_HSD1P

USB_HSD1N

USB_HSD0P

USB_HSD0N

USBSS_CALRP USBSS_CALRN

USB_SS_TX3P USB_SS_TX3N

USB_SS_RX3P USB_SS_RX3N

USB_SS_TX2P USB_SS_TX2N

USB_SS_RX2P USB_SS_RX2N

USB_SS_TX1P USB_SS_TX1N

USB_SS_RX1P USB_SS_RX1N

USB_SS_TX0P USB_SS_TX0N

USB_SS_RX0P USB_SS_RX0N

SCL2/GPIO193

SDA2/GPIO194

SCL3_LV/GPIO195

SDA3_LV/GPIO196

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

R313

R313 10K_0402_5%

10K_0402_5% @

@

1 2

HDMI_HPD_Q

Compal Secret Data

G8

USB_RCOMP

B9 H1

H3 H6

H5 H10

G10 K10

J12 G12

F12

USB20_P10

K12

USB20_N10

K13 B11

D11

USB20_P8

E10

USB20_N8

F10

USB20_P7

C10

USB20_N7

A10

USB20_P6

H9

USB20_N6

G9

USB20_P5

A8

USB20_N5

C8 F8

E8 C6

A6 C5

A5

USB20_P1

C1

USB20_N1

C3

USB20_P0

E1

USB20_N0

E3

USBSS_CALRP

C16

USBSS_CALRN

A16 A14

C14 C12

A12 D15

B15 E14

F14 F15

G15 H13

G13

USB30_TX0P

J16

USB30_TX0N

H16

USB30_RX0P

J15

USB30_RX0N

K15

R326 10K_0402_5%R326 10K_0402_5%

H19

R328 10K_0402_5%R328 10K_0402_5%

G19

FCH_SIC

G22

FCH_SID

G21 E22 H22

EC_PWM2

J22 H21

K21 K22 F22 F24 E24 B23 C24 F18

Deciphered Date

D

R329 11.8K_0402_1%R329 11.8K_0402_1%

1 2

R330 1K_0402_1%M3@R330 1K_0402_1%M3@

1 2

R334 1K_0402_1%

1 2

1 2 1 2

1 2

R338 0_0402_5%R338 0_0402_5%

1 2

R343 0_0402_5%R343 0_0402_5%

Place R425 and C363 close to FCH for ESD

ODD_DA#_FCH

1

C363

0.1U_0402_16V4Z

2

D

USB20_P10 <23> USB20_N10 <23>

USB20_P8 <23> USB20_N8 <23>

USB20_P7 <22> USB20_N7 <22>

USB20_P6 <23> USB20_N6 <23>

USB20_P5 <18> USB20_N5 <18>

USB20_P1 <21> USB20_N1 <21>

USB20_P0 <21> USB20_N0 <21>

M3@

USB30_TX0P <26> USB30_TX0N <26>

USB30_RX0P <26> USB30_RX0N <26>

EC_PWM2 <15>

1 2

R425 0_0402_5%R425 0_0402_5%

E

Hudson-M2/M3 OHCI (DEV-20, FUN-5)

Hudson-M2 OHCI (DEV-22, FUN-0) EHCI (DEV-22, FUN-2)

USB 3.0 (For Hudson M3 only)

WLAN (BT) Finger Printer

Hudson-M3 XHCI (DEV-16, FUN-0) XHCI (DEV-16, FUN-1)

Hudson-M2/M3 OHCI (DEV-19, FUN-0) EHCI (DEV-19, FUN-2)

3G Int. Camera

Hudson-M2/M3 OHCI (DEV-18, FUN-0) EHCI (DEV-18, FUN-2)

USB-Left2

USB-Left1

+VDDANCR_11_SSUSB

Hudson-M3 XHCI (DEV-16, FUN-0) XHCI (DEV-16, FUN-1)

USB 3.0 (For Hudson M3 only)

+3VALW

APU_SIC <7,9> APU_SID <7,9>

SB-TSI

Strap

+3VALW

1 2

ODD_DA#_Q

Title

Size Document Number Rev

Custom

Date: Sheet

+3VS +3VS

R312

R312 10K_0402_5%

10K_0402_5% @

@

2

Q208A

6 1

2N7002DW-T/R7_SOT363-6

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

R311

R311 10K_0402_5%

10K_0402_5%

1 2

E

ODD_DA# <21>

B

13 41Monday, May 09, 2011

B

of

A

SATA_FTX_DRX_P0<21>

+3VALW

12

SATA_FTX_DRX_N0<21>

SATA_FRX_C_DTX_N0<21> SATA_FRX_C_DTX_P0<21>

SATA_FTX_DRX_P1<21> SATA_FTX_DRX_N1<21>

SATA_FRX_C_DTX_N1<21> SATA_FRX_C_DTX_P1<21>

R437

R437 10K_0402_5%

10K_0402_5%

FCH_ALERT#

HDD

ODD

1 1

+1.5V

12

R285

R285 10K_0402_5%

10K_0402_5% @

@

B

2

@

@ Q33

Q33

E

3 1

C

APU_ALERT#<7>

C

MMBT3904_NL_SOT23-3

To avoid LED flashing

2 2

+5VS

1 2

R444 10K_0402_5%R444 10K_0402_5%

12

R446 20K_0402_5%R446 20K_0402_5%

+3VALW

1 2

R434 10K_0402_5%R434 10K_0402_5%

+3VS

@

1 2

R339 8.2K_0402_5%

@

1 2

R340 8.2K_0402_5%

@

1 2

R344 8.2K_0402_5%

1 2

R363 8.2K_0402_5%R363 8.2K_0402_5%

1 2

R447 100K_0402_5%R447 100K_0402_5%

3 3

JPW@JPW

@

PW_CLEAR#

12

Place JPW under DDR Door

SATA_LED#

CR_WAKE#_R

WL_OFF# 3G_OFF# BT_ON# PW_CLEAR#

ODD_PWR

+AVDD_SATA

SATA_LED#<31>

ODD_PWR<32>

BT_ON#<23>

WL_OFF#<23> 3G_OFF#<23>

CR_WAKE#<25>

12

R336 1K_0402_1%R336 1K_0402_1%

12

R337 1K_0402_1%R337 1K_0402_1%

1 2

R111 10K_0402_5%R111 10K_0402_5%

2 1

RB751V40_SC76-2

1 2

R103 10K_0402_5%R103 10K_0402_5%

SATA_FTX_DRX_P0 SATA_FTX_DRX_N0

SATA_FRX_C_DTX_N0 SATA_FRX_C_DTX_P0

SATA_FTX_DRX_P1 SATA_FTX_DRX_N1

SATA_FRX_C_DTX_N1 SATA_FRX_C_DTX_P1

SATA_CALRP SATA_CALRN

SATA_LED#

T59T59

ODD_PWR BT_ON#

PW_CLEAR# WL_OFF# 3G_OFF#

D18

CR_WAKE#_R

FCH_ALERT#

B

U1B

AK19

SATA_TX0P

AM19

SATA_TX0N

AL20

SATA_RX0N

AN20

SATA_RX0P

AN22

SATA_TX1P

AL22

SATA_TX1N

AH20

SATA_RX1N

AJ20

SATA_RX1P

AJ22

SATA_TX2P

AH22

SATA_TX2N

AM23

SATA_RX2N

AK23

SATA_RX2P

AH24

SATA_TX3P

AJ24

SATA_TX3N

AN24

SATA_RX3N

AL24

SATA_RX3P

AL26

SATA_TX4P

AN26

SATA_TX4N

AJ26

SATA_RX4N

AH26

SATA_RX4P

AN29

SATA_TX5P

AL28

SATA_TX5N

AK27

SATA_RX5N

AM27

SATA_RX5P

AL29

NC6

AN31

NC7

AL31

NC8

AL33

NC9

AH33

NC10

AH31

NC11

AJ33

NC12

AJ31

NC13

AF28

SATA_CALRP

AF27

SATA_CALRN

AD22

SATA_ACT#/GPIO67

AF21

SATA_X1

AG21

SATA_X2

AH16

FANOUT0/GPIO52

AM15

FANOUT1/GPIO53

AJ16

FANOUT2/GPIO54

AK15

FANIN0/GPIO56

AN16

FANIN1/GPIO57

AL16

FANIN2/GPIO58

K6

TEMPIN0/GPIO171

K5

TEMPIN1/GPIO172

K3

TEMPIN2/GPIO173

M6

TEMPIN3/TALERT#/GPIO174

HUDSON-M3_FCBGA656

INT PU 8.2K

SERIAL ATA

INT PU 10K

INT PU 8.2K

HUDSON-2

SD CARDGBE LANSPI ROMVGA DACVGA MAINLINK

ROM_RST#/SPI_WP#/GPIO161

HW MONITOR

SD_CLK/SCLK_2/GPIO73

SD_CMD/SLOAD_2/GPIO74

SD_DATA0/SDATI_2/GPIO77

SD_DATA1/SDATO_2/GPIO78

SD_DATA2/GPIO79 SD_DATA3/GPIO80

GBE_RXCTL/RXDV

GBE_TXCTL/TXEN

SPI_CS1#/GPIO165

VGA_HSYNC/GPO68 VGA_VSYNC/GPO69

VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71

ML_VGA_HPD/GPIO229

VIN2/SDATI_1/GPIO177 VIN3/SDATO_1/GPIO178 VIN4/SLOAD_1/GPIO179

VIN5/SCLK_1/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

HUDM3R3@

SD_CD/GPIO75

SD_WP/GPIO76

GBE_COL

GBE_CRS

GBE_MDCK

GBE_MDIO

GBE_RXCLK

GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0

GBE_RXERR

GBE_TXCLK

GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0

GBE_PHY_PD

GBE_PHY_RST#

GBE_PHY_INTR

SPI_DI/GPIO164

SPI_DO/GPIO163

SPI_CLK/GPIO162

VGA_RED

VGA_GREEN

VGA_BLUE

VGA_DAC_RSET

AUX_VGA_CH_P AUX_VGA_CH_N

AUXCAL

ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N

VIN0/GPIO175 VIN1/GPIO176

C

HDMI_EN#

AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14

GBE_COL

AC4

GBE_CRS

AD3 AD9

GBE_MDIO

W10 AB8 AH7 AF7 AE7 AD7 AG8

GBE_RXERR

AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7

GBE_PHY_INTR

W9

FCH_SPI_MISO

V6

FCH_SPI_MOSI

V5

FCH_SPI_CLK

V3

FCH_SPI_CS1#

T6 V1

UMA_CRT_R

L30

UMA_CRT_G

L32

UMA_CRT_B

M29

UMA_CRT_HSYNC

M28

UMA_CRT_VSYNC

N30

UMA_CRT_DATA

M33

UMA_CRT_CLK

N32

VGA_DAC_RSET

K31

ML_VGA_AUXP

V28

ML_VGA_AUXN

V29

AUXCAL

U28

ML_VGA_TXP0

T31

ML_VGA_TXN0

T33

ML_VGA_TXP1

T29

ML_VGA_TXN1

T28

ML_VGA_TXP2

R32

ML_VGA_TXN2

R30

ML_VGA_TXP3

P29

ML_VGA_TXN3

P28

FCH_CRT_HPD

C29

N2

1 2

R101 10K_0402_5%R101 10K_0402_5%

LOGO_LED

M3

WL_BT_LED

L2 N4

1 2

R106 10K_0402_5%R106 10K_0402_5%

SLP_CHG_M3

P1

SLP_CHG#

P3 M1

1 2

R115 10K_0402_5%R115 10K_0402_5%

M5

1 2

R114 10K_0402_5%R114 10K_0402_5%

AG16

NC1

AH10

NC2

A28

NC3

G27

NC4

L4

NC5

12

R443 1K_0402_1%R443 1K_0402_1%

R346 10K_0402_5%R346 10K_0402_5%

1 2

R347 10K_0402_5%R347 10K_0402_5%

1 2

R345 10K_0402_5%R345 10K_0402_5%

1 2

R348 10K_0402_5%R348 10K_0402_5%

1 2

R352 10K_0402_5%R352 10K_0402_5%

UMA_CRT_R <19>

UMA_CRT_G <19>

UMA_CRT_B <19>

UMA_CRT_HSYNC <19> UMA_CRT_VSYNC <19>

UMA_CRT_DATA <19> UMA_CRT_CLK <19>

1 2

R366 715_0402_1%R366 715_0402_1%

1 2

R364 100_0402_1%R364 100_0402_1%

ML_VGA_AUXP <7> ML_VGA_AUXN <7>

ML_VGA_TXP0 <7> ML_VGA_TXN0 <7> ML_VGA_TXP1 <7> ML_VGA_TXN1 <7> ML_VGA_TXP2 <7> ML_VGA_TXN2 <7> ML_VGA_TXP3 <7> ML_VGA_TXN3 <7>

FCH_CRT_HPD <9>

LOGO_LED <22>

SLP_CHG_M3 <23> SLP_CHG# <23>

+3VALW

+FCH_VDDAN_11_MLDAC

R364 Close to FCH

D

HDMI_EN#

SKU

(Internal 8.2K PU)

HL

Non-HDMI SKU

HDMI SKU

UMA_CRT_DATA UMA_CRT_CLK

UMA_CRT_R UMA_CRT_G UMA_CRT_B

LOGO_LED

FCH_CRT_HPD

SLP_CHG_M3 SLP_CHG#

WL_BT_LED#<31>

1 2

R456 2.2K_0402_5%R456 2.2K_0402_5%

1 2

R455 2.2K_0402_5%R455 2.2K_0402_5%

R367 150_0402_1%R367 150_0402_1%

1 2

R368 150_0402_1%R368 150_0402_1%

1 2

R369 150_0402_1%R369 150_0402_1%

1 2

PVT change to 10K

1 2

R70 10K_0402_5%R70 10K_0402_5%

1 2

R365 10K_0402_5%R365 10K_0402_5%

1 2

R418 10K_0402_5%R418 10K_0402_5%

1 2

R420 10K_0402_5%R420 10K_0402_5%

Q32A

12

R307

R307 100K_0402_5%

100K_0402_5%

Q32A

2

WL_BT_LED

E

+3VS

+FCH_VDDAN_33_DAC_R

+3VALW

2N7002DW-T/R7_SOT363-6

61

Q32B in page31

+3VALW

C498

12

0.1U_0402_16V4Z

FCH_SPI_CS1#

4 4

FCH_SPI_CLK

Socket: SP07000F500/SP07000H900

2M Byte

SA000041N00

U13

8 3 7 1 6 5

MX25L1606EM2I-12G SOP 8P

A

VCC W HOLD S C D

4

VSS

2

Q

FCH_SPI_CLK

R402

R402 10_0402_5%

10_0402_5% @

@ 1 2 1

C257

C257 33P_0402_50V8J

33P_0402_50V8J @

@

FCH_SPI_MISOFCH_SPI_MOSI

2

For EMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

E

14 41Monday, May 09, 2011

of

B

A

STRAP PINS

B

C

D

E

12

R238

R238 10K_0402_5%

10K_0402_5%

12

R244

R244 @

@ 10K_0402_5%

10K_0402_5%

EC_PWM2

LPC ROM (INTERNAL 10K PULL-UP)

SPI ROM

DEFAULT

EC_PWM2

PCI_CLK1

1 1

2 2

PULL HIGH

PULL LOW

PCI_CLK1<12> PCI_CLK3<12> PCI_CLK4<12> CLK_PCI_EC<12,29> CLK_PCI_DDR<12,30> EC_PWM2<13> RTC_CLK<12,29>

ALLOW PCIE GEN2

DEFAULT

FORCE PCIE GEN1

PCI_CLK1

12

R231

R231 10K_0402_5%

10K_0402_5%

PCI_CLK3

12

R232

R232 @

@ 10K_0402_5%

10K_0402_5%

PCI_CLK3

ENABLE DEBUG STRAP

DISABLE DEBUG STRAP

DEFAULT

12

PCI_CLK4 LPC_CLK0

NON_FUSION CLOCK MODE

FUSION CLOCK MODE

DEFAULT

PCI_CLK4

12

R242

R242 @

@ 10K_0402_5%

10K_0402_5%

12

R234

R234 10K_0402_5%

10K_0402_5%

R241

R241 @

@ 10K_0402_5%

10K_0402_5%

R233

R233 10K_0402_5%

10K_0402_5%

EC ENABLED

EC DISABLED

DEFAULT

CLK_PCI_EC

12

R243

R243 @

@ 10K_0402_5%

10K_0402_5%

CLK_PCI_DDR

12

R237

R237 10K_0402_5%

10K_0402_5%

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLE

DEBUG STRAPS

FCH HAS 15K INTERNAL PU-UP FOR PCI_AD[27:23]

3 3

PCI_AD27 PCI_AD26

USE PCI

PULL

PLL

HIGH

DEFAULT

BYPASS

PULL

PCI PLL

LOW

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

PCI_AD25 PCI_AD24

USE FC PLL

BYPASS FC PLL

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULTDEFAULT

ENABLE PCI MEM BOOT

12

R245

R245 @

@ 10K_0402_5%

10K_0402_5%

RTC_CLK

12

R239

2.2K_0402_5%

RTC_CLKLPC_CLK1

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

+3VALW+3VALW+3VALW+3VALW+3VS+3VS+3VS

12

R240

R240 10K_0402_5%

10K_0402_5%

12

R246

R246 @

@

2.2K_0402_5%

CRT Power Down Circuit

VGA_PD_R

VGA_PD: Support CRT power saving L: MLDAC power on H: MLDAC power off

VGA_PD<13>

@

1 2

R439 47K_0402_5%

12

R294

2.2K_0402_5%@

VGA_PD_R

2

C496

@ C496

@

0.1U_0402_16V7K

1

AO3413_SOT23

2

@

C497

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

2

C494

@ C494

@

0.1U_0402_16V7K

1

AO3413_SOT23

2

@

C495

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

C689

2

Q62

C687

+3VS

G

1 3

1

@

2

+1.1VS

Q63

G

2

1 2

MBK1608221YZF_2P

S

@

D

+FCH_VDDAN_33_DAC +FCH_VDDAN_33_DAC_R

30mils

1

@

C690

C690 1U_0402_6.3V6K

1U_0402_6.3V6K

2

AO3413 Vgs(max)= -1V

S

R303

@

0_0603_5%

D

1 2

1 3

1

2

30mils

1

C688

C688 1U_0402_6.3V6K

1U_0402_6.3V6K

2

L32

L31

@L31

@

1 2

MBK1608221YZF_2P

+FCH_VDDAN_11_MLDAC

C277

2.2U_0603_6.3V6K

0.1U_0402_16V7K

1

C276

2

PCI_AD27<12> PCI_AD26<12> PCI_AD25<12> PCI_AD24<12> PCI_AD23<12>

4 4

A

PCI_AD27

PCI_AD26

12

R247

R247 @

@

2.2K_0402_5%

12

R248

R248 @

@

2.2K_0402_5%

PCI_AD25

12

R249

R249 @

@

2.2K_0402_5%

PCI_AD24

B

12

R250

R250 @

@

2.2K_0402_5%

PCI_AD23

12

R251

R251 @

@

2.2K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

E

of

15 41Monday, May 09, 2011

B

A

+3VS

1 1

+FCH_VDDAN_33_DAC_R

+3VS

+3VALW

2 2

+VDDAN_33_USB

+3VS

3 3

4 4

L30

1 2

MBK1608221YZF_2P

220 ohm

@

1 2

R19 0_0603_5%

L33

1 2

MBK1608221YZF_2P

L34

M3@ L34

M3@

1 2

MBK1608221YZF_2P

220 ohm

C278

C278 0_0402_5%

0_0402_5% M2@

M2@

L35

1 2

MBK1608221YZF_2P

220 ohm

L36

1 2

MBK1608221YZF_2P

220 ohm

L22

1 2

MBK1608221YZF_2P

220 ohm

+VDDPL_3.3V

2.2U_0603_6.3V6K

1

C272

C273

2

+FCH_VDDPL_33_MLDAC

2.2U_0603_6.3V6K

1

C275

C274

2

+FCH_VDDPL_33_SSUSB

2.2U_0603_6.3V6K

1

C278

C279

M3@

C280

C294

C297

2

+FCH_VDDPL_33_USB

2.2U_0603_6.3V6K

1

C281

2

+VDDPL_33_PCIE

2.2U_0603_6.3V6K

1

C293

2

+VDDPL_33_SATA

2.2U_0603_6.3V6K

1

C296

2

0.1U_0402_16V7K

1

C335

2

0.1U_0402_16V7K

1

C336

2

0.1U_0402_16V7K

+1.1VALW +VDDANCR_11_SSUSB

FBMA-L11-201209-221LMA30T_0805

+3VS

0.1U_0402_16V7K

1

2

R20 0_0603_5%R20 0_0603_5%

4/26 for EMI request

0.1U_0402_16V7K

VDDPL_33_SSUSB_S

1

2

+FCH_VDDAN_11_MLDAC

For Hudson M3 USB3.0 only For Hudson M2, connect to GND

LDO_CAP: Internally generated 1.8V supply for the RGB output

1 2

MBK1608221YZF_2P

+FCH_VDDAN_11_MLDAC

+3VALW

1 2

FBMA-L11-201209-221LMA30T_0805

220 ohm/3A

+1.1VALW

1 2

MBK1608221YZF_2P

L62

M3@L62

M3@

12

220 ohm/3A

C197

M3@

1 2

L24

220 ohm

L56

L58

220 ohm

10U_0603_6.3V6M

1

C305

M3@

2

1

2

C266

1U_0402_6.3V6K

C306

C299

C289

C303

M3@

B

22U_0805_6.3V6M

1U_0402_6.3V6K

1

C267

C269

2

+VDDAN_11_DAC

2.2U_0603_6.3V6K

1

C300

2

4/26 for EMI request

22U_0805_6.3V6M

1

C290

2

2.2U_0603_6.3V6K

1

C302

2

0.1U_0402_16V7K

1U_0402_6.3V6K

1

C307

C307 M3@

M3@

2

+VDDIO_33_PCIGP

1U_0402_6.3V6K

1

C271

C270

2

+VDDPL_3.3V +FCH_VDDPL_33_MLDAC

+FCH_VDDAN_33_DAC_R +FCH_VDDPL_33_SSUSB +FCH_VDDPL_33_USB +VDDPL_33_PCIE +VDDPL_33_SATA

@

1 2

C298 2.2U_0603_6.3V6K

0.1U_0402_16V7K

1

C301

C342

2

+VDDAN_33_USB

1U_0402_6.3V6K

1

C292

2

+VDDANCR_11_USB

0.1U_0402_16V7K

1

C304

2

+VDDANCR_11_SSUSB

0.1U_0402_16V7K

1

C309

C308

C308 M3@

M3@

C310

M3@

2

C310

C310 0_0402_5%

0_0402_5% M2@

M2@

1U_0402_6.3V6K

1

2

LDO_CAP

0.1U_0402_16V7K

1

2

10mils

10mils 10mils 10mils 10mils 10mils 10mils 10mils 10mils

15mils 10mils

20mils

30mils

20mils

40mils

U1C

AB17

VDDIO_33_PCIGP_1

AB18

VDDIO_33_PCIGP_2

AE9

VDDIO_33_PCIGP_3

AD10

VDDIO_33_PCIGP_4

AG7

VDDIO_33_PCIGP_5

AC13

VDDIO_33_PCIGP_6

AB12

VDDIO_33_PCIGP_7

AB13

VDDIO_33_PCIGP_8

AB14

VDDIO_33_PCIGP_9

AB16

VDDIO_33_PCIGP_10

H24

VDDPL_33_SYS

V22

VDDPL_33_DAC

U22

VDDPL_33_ML

T22

VDDAN_33_DAC

L18

VDDPL_33_SSUSB_S

D7

VDDPL_33_USB_S

AH29

VDDPL_33_PCIE

AG28

VDDPL_33_SATA

M31

LDO_CAP

V21

VDDPL_11_DAC

Y22

VDDAN_11_ML_1

V23

VDDAN_11_ML_2

V24

VDDAN_11_ML_3

V25

VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

AB11

VDDCR_11_GBE_S_1

AA11

VDDCR_11_GBE_S_2

AA9

VDDIO_GBE_S_1

AA10

VDDIO_GBE_S_2

G7

VDDAN_33_USB_S_1

H8

VDDAN_33_USB_S_2

J8

VDDAN_33_USB_S_3

K8

VDDAN_33_USB_S_4

K9

VDDAN_33_USB_S_5

M9

VDDAN_33_USB_S_6

M10

VDDAN_33_USB_S_7

N9

VDDAN_33_USB_S_8

N10

VDDAN_33_USB_S_9

M12

VDDAN_33_USB_S_10

N12

VDDAN_33_USB_S_11

M11

VDDAN_33_USB_S_12

U12

VDDAN_11_USB_S_1

U13

VDDAN_11_USB_S_2

T12

VDDCR_11_USB_S_1

T13

VDDCR_11_USB_S_2

P16

VDDAN_11_SSUSB_S_1

M14

VDDAN_11_SSUSB_S_2

N14

VDDAN_11_SSUSB_S_3

P13

VDDAN_11_SSUSB_S_4

P14

VDDAN_11_SSUSB_S_5

N16

VDDCR_11_SSUSB_S_1

N17

VDDCR_11_SSUSB_S_2

P17

VDDCR_11_SSUSB_S_3

M17

VDDCR_11_SSUSB_S_4

HUDSON-M3_FCBGA656

102mA

47mA 20mA 12mA 30mA 11mA 14mA 11mA 12mA

7mA

226mA

2mA

6mA

145mA

470mA

140mA

42mA

282mA

424mA

C

HUDSON-2

PCI/GPIO I/O

USB SS USB MAIN LINKGBE LAN

POWER

1007mA

CORE S0

340mA

CLKGEN I/OPCI EXPRESSSERIAL ATA3.3V_S5 I/O

1088mA

1337mA

VDDAN_11_SATA_10

59mA

5mA

187mA

70mA

12mA

26mA

HUDM3R3@

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDXL_33_S

VDDCR_11_S_1 VDDCR_11_S_2

VDDPL_11_SYS_S

VDDAN_33_HWM_S

VDDIO_AZ_S

50mils

T14 T17 T20 U16 U18 V14 V17 V20 Y17

20mils

H26 J25 K24 L22 M22 N21 N22 P22

50mils

AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27

60mils

AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19

10mils

N18 L19 M18 V12 V13 Y12 Y13 W11

10mils

G24

10mils

N20 M20

10mils

J24

10mils

M8

10mils

AA4

C311

C319

C327

C501

C507

4/26 for EMI request

+VCC_FCH_R

1U_0402_6.3V6K

1

C313

C312

2

+1.1VS_CKVDD

1U_0402_6.3V6K

1

C321

C320

2

+PCIE_VDDR_FCH

1U_0402_6.3V6K

1

C328

C329

2

+AVDD_SATA

1U_0402_6.3V6K

1

C503

C502

2

+VDDIO_33_S

1U_0402_6.3V6K

1

C508

2

+VDDXL_3.3V

C510

+VDDCR_1.1V

C512

+VDDPL_1.1V

0.1U_0402_16V7K

1

C521

C514

2

+VDDAN_33_HWM

C516

+VDDIO_AZ

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1

C506

2

0.1U_0402_16V7K

1

C509

2

1U_0402_6.3V6K

1

C511

2

0.1U_0402_16V7K

1

C513

2

0.1U_0402_16V7K

1

C515

2

1

C517

C517 1U_0402_6.3V6K

1U_0402_6.3V6K

2

D

+VCC_FCH_R

1U_0402_6.3V6K

1

C314

2

+1.1VS_CKVDD

1U_0402_6.3V6K

1

C322

2

+PCIE_VDDR_FCH

1U_0402_6.3V6K

1

C330

2

+AVDD_SATA

1U_0402_6.3V6K

1

C504

2

2.2U_0603_6.3V6K

1

2

2.2U_0603_6.3V6K

1

2

2.2U_0603_6.3V6K

1

2

2.2U_0603_6.3V6K

1

2

2.2U_0603_6.3V6K

1

C317

C315

2

2.2U_0603_6.3V6K

1

C318

C323

2

2.2U_0603_6.3V6K

1

C326

C499

2

2.2U_0603_6.3V6K

1

C500

C505

2

1 2

R26 0_0402_5%R26 0_0402_5%

L28

1 2

MBK1608221YZF_2P

220 ohm

1 2

R373 0_0603_5%R373 0_0603_5%

L29

1 2

MBK1608221YZF_2P

220 ohm

1 2

R27 0_0402_5%R27 0_0402_5%

1 2

R28 0_0402_5%R28 0_0402_5%

1 2

R193 0_0805_5%R193 0_0805_5%

22U_0805_6.3V6M

+5VS

@

1 3

D

22U_0805_6.3V6M

AO3416L_SOT23-3

1 2

R371 0_0603_5%R371 0_0603_5%

1 2

R194 0_0805_5%R194 0_0805_5%

22U_0805_6.3V6M

1 2

R370 0_0805_5%R370 0_0805_5%

22U_0805_6.3V6M

+3VALW

+1.1VALW

+3VALW

+3VS

Avoid +1.1VS_CKVDD leakage issue

+1.1VS

2

+1.1VS

G

Q56

S

+1.1VS

Connect to GND through a dedicated via

U1E

A3

VSS

A33

VSS

B7

VSS

B13

VSS

D9

VSS

D13

VSS

E5

VSS

E12

VSS

E16

VSS

E29

VSS

F7

VSS

F9

VSS

F11

VSS

F13

VSS

F16

VSS

F17

VSS

F19

VSS

F23

VSS

F25

VSS

F29

VSS

G6

VSS

G16

VSS

G32

VSS

H12

VSS

H15

VSS

H29

VSS

J6

VSS

J9

VSS

J10

VSS

J13

VSS

J28

VSS

J32

VSS

K7

VSS

K16

VSS

K27

VSS

K28

VSS

L6

VSS

L12

VSS

L13

VSS

L15

VSS

L16

VSS

L21

VSS

M13

VSS

M16

VSS

M21

VSS

M25

VSS

N6

VSS

N11

VSS

N13

VSS

N23

VSS

N24

VSS

P12

VSS

P18

VSS

P20

VSS

P21

VSS

P31

VSS

P33

VSS

R4

VSS

R11

VSS

R25

VSS

R28

VSS

T11

VSS

T16

VSS

T18

VSS

N8

VSSAN_HWM

K25

VSSXL

H25

VSSPL_SYS

HUDSON-M3_FCBGA656

E

HUDSON-2

HUDM3R3@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GROUND

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSPL_DAC

VSSAN_DAC

VSSANQ_DAC

VSSIO_DAC

EFUSE

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33

T21 L28 K33 N28

R6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

16 41Monday, May 09, 2011

E

B

of

5

+3VS +3VS_ANX

40mil

12

R944 0_0603_5%R944 0_0603_5%

+1.2VS +1.2VS_ANX

40mil

D D

+1.2VS_ANX

C C

+3VS_ANX

B B

12

R945 0_0603_5%R945 0_0603_5%

R946

12

0_0603_5%

C1513

0.1U_0402_16V7K

R947

12

0_0603_5%

C1521

0.1U_0402_16V7K

R949

0.1U_0402_16V7K

12

0_0603_5%

C1529

R950

12

0_0603_5%

0.1U_0402_16V7K

2

C1514

1

0.1U_0402_16V7K

2

C1522

1

+DVDD33

20mil

2

C1530

1

2.2U_0603_6.3V4Z

0.1U_0402_16V7K

0.1U_0402_16V7K 2

C1533

C1532

1

0.1U_0402_16V7K

2

C1515

1

0.1U_0402_16V7K

2

C1525

1

0.01U_0402_16V7K

1

2

0.1U_0402_16V7K

2

C1534

1

0.1U_0402_16V7K

2

C1516

1

0.01U_0402_16V7K

1

C1526

2

C1535

1

0.01U_0402_16V7K

2

C1517

1

0.01U_0402_16V7K

+AVDD12

1

C1527

2

2.2U_0603_6.3V4Z

0.01U_0402_16V7K

1

C1536

2

0.01U_0402_16V7K

1

C1518

2

1

2

20mil

1

C1537

2

2.2U_0603_6.3V4Z

20mil

1

C1519

2

2.2U_0603_6.3V4Z

20mil

+AVDD33

1

2

4

PD 100K at Page10

+DVDD12

1

2

3

DP0_AUXN_C DP0_AUXP_C LVDS_HPD DP0_TXN0_C DP0_TXP0_C

1 2

R30 10K_0402_5%R30 10K_0402_5%

1 2

R1312 1M_0402_5%R1312 1M_0402_5%

12

C1509 0.1U_0402_16V7KC1509 0.1U_0402_16V7K

R50 10K_0402_5%R50 10K_0402_5%

1 2

12

1 2

C1510 100P_0402_50V8JC1510 100P_0402_50V8J

1 2

R85 10K_0402_5%R85 10K_0402_5%

+3VS_ANX

DP0_AUXP_C

DP0_AUXN_C

DP0_AUXN_C<7> DP0_AUXP_C<7>

LVDS_HPD<9>

DP0_TXN0_C<7> DP0_TXP0_C<7>

APU_PCIE_RST#<12,23,24>

TL_ENVDD<18>

+3VS_ANX

@

12

R1321 1M_0402_5%

@

12

R1323 1M_0402_5%

+3VS_ANX

R1315 12K_0402_1%R1315 12K_0402_1%

Place via on each trace bus and let resistor very close the via.

T50T50 T51T51

T52T52 T53T53

T54T54 T55T55 T56T56 T57T57

+AVDD12

CLK_SEL

R_BIAS

+DVDD12

9

U4

1

AVDD12

SA00004G400

60

DPRX_AUX_N

61

DPRX_AUX_P

58

DPPX_HPD

4

DPRX_LN0_N

3

DPRX_LN0_P

7

DPRX_LN1_N

6

DPRX_LN1_P

10

CLK_SEL

12

RESET_L

14

DIGON

34

POR

51

CFG_SCL

52

CFG_SDA

16

GPIO_0

17

GPIO_1

18

GPIO_2

64

R_BIAS

55

TDI

57

TMS

56

TCK

54

TDO

11

TEST_EN

65

PAD

ANX3110_QFN64_9X9

32

46

DVDD12

59

DVDD12

2

+DVDD33

AVSS

5

62

AVSS

13

53

AVDD33

DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

LVDS_CLKL_N LVDS_CLKL_P

LVDS_L0_N LVDS_L0_P LVDS_L1_N

LVDS_L1_P LVDS_L2_N LVDS_L2_P

LVDS_L3_N

LVDS_L3_P

LVDS_CLKU_N

LVDS_CLKU_P

LVDS_U0_N

LVDS_U0_P

LVDS_U1_N

LVDS_U1_P

LVDS_U2_N

LVDS_U2_P

LVDS_U3_N

LVDS_U3_P

DDC_CLK

DDC_DATA

BL_EN

VARY_BL

CPU_VARY_BL

OSC_OUT

OSC_IN

8 25 33 39 63

26 27 19 20 21 22 23 24 28 29

42 43 35 36 37 38 40 41 44 45

49 50

15 47 48 31 30

+AVDD33

2

LVDS_EDID_CLK LVDS_EDID_DATA

R1314 4.7K_0402_5%R1314 4.7K_0402_5%

1 2

R1313 4.7K_0402_5%R1313 4.7K_0402_5%

1 2

LVDS_TXCLK- <18> LVDS_TXCLK+ <18> LVDS_TXOUT0- <18> LVDS_TXOUT0+ <18> LVDS_TXOUT1- <18> LVDS_TXOUT1+ <18> LVDS_TXOUT2- <18> LVDS_TXOUT2+ <18>

LVDS_EDID_CLK <18> LVDS_EDID_DATA <18>

TL_BKOFF# <18> TL_INVT_PWM <18> APU_INVT_PWM <9,18> TRAVIS_CLKN <12> TRAVIS_CLKP <12>

1

+3VS_ANX

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/01/11 2012/01/01

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

1

B

of

17 41Monday, May 09, 2011

A

B

C

D

E

F

G

H

R108

100K_0402_5%

2

5

R112

R112 100K_0402_5%

100K_0402_5%

1 2

+3VS

12

R109

1 2

47K_0402_5%

3

Q1B

Q1B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

USB20_N5<13>

USB20_P5<13>

@

1 2

R387 0_0402_5%

+3VS

2

C228

0.1U_0402_16V7K

0.01U_0402_25V7K

C229

G

1

2

1

2

0.1U_0402_16V4Z

For ESD

Reserve for EMI request

CAM@

1 2

R78 0_0402_5%

R78 0_0402_5% L55

@L55

@

1

2

4

WCM-2012-900T_0805

R96 0_0402_5%

LED_PWM

4

CAM@

1 2

3

W=80mils

S

Q17

Q17 AO3413_SOT23

AO3413_SOT23

D

1 3

C295

2

3

+LCD_VDD

1

2

USB20_N5_R

USB20_P5_R

W=80mils

C233

0.1U_0402_16V4Z

To prevent EC pin damage

@

1 2

R449 0_0402_5%

D29

LED_PWM

BKOFF#<29>

D29

2 1

RB751V40_SC76-2

D30

2 1

RB751V40_SC76-2

LED_PWM_D

1 2

R144 47K_0402_5%R144 47K_0402_5%

BKOFF#_D

1 2

R113 10K_0402_5%R113 10K_0402_5%

LCD/PANEL BD. Conn.

D84

CAM@

+3VS

LVDS_TXOUT0+<17> LVDS_TXOUT0-<17> LVDS_TXOUT1+<17> LVDS_TXOUT1-<17> LVDS_TXOUT2+<17> LVDS_TXOUT2-<17> LVDS_TXCLK+<17> LVDS_TXCLK-<17>

1 2

R388 0_0603_5%

USB20_P5_R USB20_N5_R

W=20mils

CAM@

+3VS_LVDS_CAM

CAM@

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1 2

C225

JLVDS

@JLVDS

@

112

3

4

3

5

6

7

8

7 9910 111112

13

14

13

15

16

15

17

18

17

19

20

19

21

22

23

24

23

25

26

27

28

29

30

31

GND1

32

GND2

ACES_87242-3001-09

68P_0402_50V8J

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

INT_MIC_CLK INT_MIC_DATA LED_PWM_D

BKOFF#_D

1

C234

2

LVDS_EDID_CLK <17>

LVDS_EDID_DATA <17>

+LCD_INV

Rated Current MAX: 600mA

L2

FBMA-L11-201209-221LMA30T_0805

1

C235

0.1U_0402_25V6

2

3A

1

C226

0.1U_0402_16V4Z

2

12

1

2

C334

0.1U_0402_25V6

For ESD request

2 3

PACDN042Y3R_SOT23-3

+LCD_VDD

C227

4.7U_0805_10V4Z

B+

1

2

D84

1

INT_MIC_CLK <27> INT_MIC_DATA <27>

For EMI

680P_0402_50V7K

For EMI request

1

C236

C236 680P_0402_50V7K

680P_0402_50V7K @

@

2

C231

+3VS

@

2

C232

0.1U_0402_16V4Z

2

1

@

For ESD

1

C287

0.1U_0402_16V4Z

2

+LCD_VDD

12

R107

150_0603_5%

1 1

LCD_ENVDD

2 2

3 3

61

Q1A

2N7002DW-T/R7_SOT363-6

From EC

INVT_PWM<29>

From APU

Close to LVDS Connector

APU_INVT_PWM<9,17>

APU_ENVDD<9>

@

1 2

R332 0_0402_5%

@

1 2

R350 0_0402_5%

@

1 2

R357 0_0402_5%

LED_PWM LCD_ENVDD EC_ENBKL

EC_ENBKL <29>APU_ENBKL<9>

For LVDS Translator

4 4

TL_INVT_PWM<17>

TL_ENVDD<17> TL_BKOFF#<17>

A

1 2

R333 0_0402_5%R333 0_0402_5%

1 2

R351 0_0402_5%R351 0_0402_5%

1 2

R360 0_0402_5%R360 0_0402_5%

LED_PWM LCD_ENVDD EC_ENBKL

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2011/01/11 2011/11/11

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

F

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

G

B

of

18 41Monday, May 09, 2011

H

A

B

C

D

E

CRT CONNECTOR

D5

@D4

@

DAN217_SC59

2

3

1

2

2.2P_0402_50V8C

12

D_CRT_HSYNC

D_CRT_VSYNC

1

C243

@D5

@

3

+3VS

1

2

2.2P_0402_50V8C

1 2

L6 10_0402_5%L6 10_0402_5%

1 2

L7 10_0402_5%L7 10_0402_5%

CRT_R_L CRT_G_L CRT_B_L

C246

C246 @

@

If=1A

D6

2

RB491D_SOT23-3

3

+CRT_VCC

HSYNC

VSYNC

1

2

10P_0402_50V8J

1

CRT_R_L CRT_DDC_DAT

CRT_G_L HSYNC

CRT_B_L VSYNC

CRT_DDC_CLK

F1

21

0.5A_8V_KMC3S050RY

T75 PADT75 PAD

T76 PADT76 PAD

+5VS +CRT_VCC_R +CRT_VCC

1

C245

C245 @

@

2

10P_0402_50V8J

40 mils

C237

0.1U_0402_16V4Z

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

ALLTO_C10532-11505-L_15P-T

JCRT

6 11 1 7 12 2 8 13 3 9 14 4 10 15 5

1

2

@JCRT

@

16

G

17

G

1

D3

DAN217_SC59

1 1

L3 NBQ100505T-800Y_0402L3 NBQ100505T-800Y_0402

UMA_CRT_R<14> UMA_CRT_G<14> UMA_CRT_B<14>

R140

R138

2 2

UMA_CRT_HSYNC<14>

UMA_CRT_VSYNC<14>

R140

R139

12

150_0402_1%

C244 0.1U_0402_16V4ZC244 0.1U_0402_16V4Z

SN74AHCT1G125GW_SOT353-5

C238

150_0402_1%

+CRT_VCC

1 2

1

C239

2

2.2P_0402_50V8C

1

5

P

OE#

A2Y

G

U6

3

4

1 2

L4 NBQ100505T-800Y_0402L4 NBQ100505T-800Y_0402

1 2

L5 NBQ100505T-800Y_0402L5 NBQ100505T-800Y_0402

1 2

1

C240

2

2.2P_0402_50V8C

+CRT_VCC

SN74AHCT1G125GW_SOT353-5

D4

@D3

@

DAN217_SC59

2

3

1

C241

2

R141 10K_0402_5%R141 10K_0402_5%

1

5

P

4

OE#

A2Y

G

U7

3

2

C242

2.2P_0402_50V8C

3 3

+CRT_VCC

+3VS

R159

@

R159

4.7K_0402_5%

1 2

1

C283

C283 470P_0402_50V8J

470P_0402_50V8J

2

@

CRT_DDC_CLK

CRT_DDC_DAT

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

E

of

19 41Monday, May 09, 2011

of

19 41Monday, May 09, 2011

of

19 41Monday, May 09, 2011

B

R153

4.7K_0402_5%

2

Q205A

UMA_CRT_CLK<14>

UMA_CRT_DATA<14>

1

C282

33P_0402_50V8K

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

@

2011/01/11 2011/11/11

C

Q205A

5

2N7002DW-T/R7_SOT363-6

Q205B

4

2N7002DW-T/R7_SOT363-6

1

C285

C285 33P_0402_50V8K

33P_0402_50V8K

2

@

61

3

470P_0402_50V8J

Compal Secret Data

Deciphered Date

C284

5

HDMI CEC Controller

12

R195

10K_0402_5%

CEC@

HDMI_CECIN

D D

CEC@

2N7002DW-T/R7_SOT363-6

HDMI_CECOUT

Q49B

R205

1 2

27K_0402_5%

CEC@

100K_0402_5%

3

4

R190

R190 CEC@

CEC@

+3VL+3VL

21

D9

D9 RB751V40_SC76-2

RB751V40_SC76-2

CEC@

12

R581

R581 27K_0402_5%

27K_0402_5% CEC@

5

12

CEC@

HDMI_CEC

61

Q49A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 CEC@

CEC@

2

0.1U_0402_16V4Z

EC_SMB_CK1<29,34> CEC_INT# <29>

+3VL

CEC@

R174 4.7K_0402_5%

CEC@

R179 47K_0402_5%

CEC@

R181 47K_0402_5%

CEC@

R176 4.7K_0402_5%

C340

1

CEC@

HDMI_CECIN HDMI_HPD_R

2

HDMI_CECOUT

12

CEC_XOUT

12

CEC_XIN

12

4

U17

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D62SP-W4_LSSOP20

R5F211B4D62SP-W4_LSSOP20 CEC@

CEC@

P1_5/RXD0/CNTR01/INT11#

SA000041F00 (D62)

P1_2/KI2#/AN10/CMP0_2

Address:0011010X

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

P1_6/CLK0/SSI01

P1_4/TXD0

P1_3/KI3#/AN11/TZOUT

P4_2/VREF

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

3

11

CEC_TEST

12

CEC_FSHUPDCEC_RST#

13

CEC_FSHUPD (Pin13)

14

Low= Force to update flash.

+3VL

15

16

17

18

19

20

CEC@

1 2

R171 4.7K_0402_5%

CEC@

1 2

R178 4.7K_0402_5%

CEC@

1 2

C848 1U_0402_6.3V4Z

1 2

C384 0.1U_0402_16V4Z

CEC@

HDMI_CLK

HDMI_DATA

EC_SMB_DA1 <29,34>

+3VL

2

1

UMA_HDMI_TXC+<5>

UMA_HDMI_TXC-<5>

C C

UMA_HDMI_TX2+<5>

UMA_HDMI_TX2-<5>

UMA_HDMI_TX1+<5>

UMA_HDMI_TX1-<5>

UMA_HDMI_TX0+<5>

UMA_HDMI_TX0-<5>

+5VS_HDMI

PMEG2010AEH_SOD123

2 1

+5VL

PMEG2010AEH_SOD123

B B

PMEG2010AEH_SOD123

2 1

D54

D53

CEC@D54

CEC@

0.5A_8V_KMC3S050RY

12 12

F2

21

C3410.1U_0402_16V7K C3410.1U_0402_16V7K

C3370.1U_0402_16V7K C3370.1U_0402_16V7K C3380.1U_0402_16V7K C3380.1U_0402_16V7K

C3250.1U_0402_16V7K C3250.1U_0402_16V7K C3310.1U_0402_16V7K C3310.1U_0402_16V7K

C3240.1U_0402_16V7K C3240.1U_0402_16V7K C3160.1U_0402_16V7K C3160.1U_0402_16V7K

1

C259

0.1U_0402_16V4Z

2

UMA_DVI_TXC-

UMA_DVI_TXD2+ UMA_DVI_TXD2-

UMA_DVI_TXD1+ UMA_DVI_TXD1-

UMA_DVI_TXD0+ UMA_DVI_TXD0-

+HDMI_5V_OUT+5VS

UMA_DVI_TXC+

C3390.1U_0402_16V7K C3390.1U_0402_16V7K

HDMI Connector

JHDMI

HDMI_HPD_C

+HDMI_5V_OUT

HDMI_SDATA HDMI_SCLK

HDMI_CEC HDMI_R_CK-

A A

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

TYCO_1939864-1_19P@

5

GND GND GND GND

20 21 22 23

UMA_DVI_TXC+ HDMI_R_CK+

UMA_DVI_TXD0+

UMA_DVI_TXD0-

UMA_DVI_TXD1+

UMA_DVI_TXD1-

UMA_DVI_TXD2-

4

1 2

L8

1

4

WCM-2012-900T_4P

1 2

L9

4

1

WCM-2012-900T_4P

1 2

L10

1

4

WCM-2012-900T_4P

1 2

L11

4

1

WCM-2012-900T_4P

1 2

R157

0_0402_5%@

2

SM070000K00

3

HDMI_R_CK-UMA_DVI_TXC-

R173

0_0402_5%@

HDMI_R_D0+

R175

0_0402_5%@

3

SM070000K00

2

HDMI_R_D0-

R180

0_0402_5%@

HDMI_R_D1+

R182

0_0402_5%@

2

SM070000K00

3

HDMI_R_D1-

R183

0_0402_5%@

HDMI_R_D2+UMA_DVI_TXD2+

R187

0_0402_5%@

3

SM070000K00

2

HDMI_R_D2-

R188

0_0402_5%@

UMA_HDMI_CLK<7>

UMA_HDMI_DATA<7>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDMI_R_CK+ HDMI_R_CKHDMI_R_D1HDMI_R_D1+ HDMI_R_D0+

HDMI_R_D0HDMI_R_D2-

HDMI_R_D2+

2011/01/11 2011/11/11

3

1 2

R169 604_0402_1%R169 604_0402_1%

1 2

R197 604_0402_1%R197 604_0402_1%

1 2

R198 604_0402_1%R198 604_0402_1%

1 2

R199 604_0402_1%R199 604_0402_1%

1 2

R200 604_0402_1%R200 604_0402_1%

1 2

R201 604_0402_1%R201 604_0402_1%

1 2

R202 604_0402_1%R202 604_0402_1%

1 2

R206 604_0402_1%R206 604_0402_1%

+5VS

+1.5VS

2

3 1

2

SGD

3 1

SGD

Q55

BSH111_SOT23-3

Compal Secret Data

Deciphered Date

13

D

Q64

2

G

2N7002_SOT23-3

G

2N7002_SOT23-3

S

R475

2K_0402_1%

Q48

BSH111_SOT23-3

12

To ConnTo APU To CEC

+5VL

2

C264

1

0.1U_0402_16V4Z

74AHCT1G125GW_SOT353-5

R189

100K_0402_5%

HDMI_HPD_R

HDMI_SCLK

HDMI_SDATA

12

RB751V40_SC76-2

Q47

Q47 BSH111_SOT23-3

BSH111_SOT23-3 CEC@

CEC@

Title

Size Document Number Rev

Date: Sheet

+3VL +3VS

+HDMI_5V_OUT

12

R476

R476 2K_0402_1%

2K_0402_1%

2

R314 1K_0402_5%R314 1K_0402_5%

1

5

U9

P

HDMI_HPD_R

4

OE#

A2Y

G

3

R480

1 2

2.2K_0402_5%

D15

2.2K_0402_5%

21

4.7K_0402_5%

2

31

2

Q52

SGD

BSH111_SOT23-3

BSH111_SOT23-3 CEC@

CEC@

SGD

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

12

100K_0402_5%

31

HDMI_HPD_C

R186

+3VL+3VL

12

R184

R184 CEC@

CEC@

1

2

1

1 2

12

R185

4.7K_0402_5%

4.7K_0402_5% CEC@

CEC@

HDMI_CLK

HDMI_DATA

20 41Monday, May 09, 2011

C265

0.1U_0402_16V4Z

HDMI_HPD <9,13>

of

B

5

SATA HDD Conn.

+5VS

1

2

D D

JHDD

C C

24

GND

23

GND

Place closely JHDD SATA CONN.

1.2A

C356

C356 10U_0805_10V4Z

10U_0805_10V4Z

GND

RX+

RX-

GND

TX-

TX+

GND

3.3V

3.3V GND GND GND

GND

Rsv

GND

12V 12V 12V

1

C357

0.1U_0402_16V4Z

2

1

SATA_FTX_C_DRX_P0

2

SATA_FTX_C_DRX_N0

3 4

SATA_FRX_DTX_N0

5

SATA_FRX_DTX_P0

6 7

8 9 10 11 12 13 14

5V

15

5V

16

5V

17 18 19 20 21 22

1

C358

0.1U_0402_16V4Z

2

1

C359

0.1U_0402_16V4Z

2

Close to JHDD

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

1 2

+3VS

+5VS

4

SATA_FTX_DRX_P0 <14> SATA_FTX_DRX_N0 <14>

SATA_FRX_C_DTX_N0 <14>

SATA_FRX_C_DTX_P0 <14>

SATA ODD Conn

+5VS_ODD

JODD0

15 14

SANTA_206401-1_RV

@

1

C352

C352 10U_0805_10V4Z

10U_0805_10V4Z

2

GND GND

1.8A

GND

A+

A-

GND

B-

B+

GND

DP +5V +5V

MD

GND GND

1

2

1 2 3 4 5 6 7

8 9 10 11 12 13

C353

C353 10U_0805_10V4Z

10U_0805_10V4Z

3

Close to ODD CONN

1

C354

C354 @

@

1U_0402_6.3V4Z

2

SATA_FTX_C_DRX_P1

SATA_FTX_C_DRX_N1

SATA_FRX_DTX_N1 SATA_FRX_DTX_P1

ODD_PLUGIN#_R

+5VS_ODD

ODD_DA#_R

R562 0_0402_5%

1

2

C378 0.01U_0402_25V7KODD0@C378 0.01U_0402_25V7KODD0@

1 2

C377 0.01U_0402_25V7KODD0@C377 0.01U_0402_25V7KODD0@

1 2

C376 0.01U_0402_25V7KODD0@C376 0.01U_0402_25V7KODD0@

1 2

C375 0.01U_0402_25V7KODD0@C375 0.01U_0402_25V7KODD0@

1 2

R561

1 2

0_0402_5%

1 2

SW5

SW5 SMT1-05-A_4P

SMT1-05-A_4P

1 2

@

6

C355

0.1U_0402_16V4Z

ODD0@R561

ODD0@

ODD_PLUGIN# <13>

ODD_DA# <13>

ODD0@

3 4

5

1

C360

0.1U_0402_16V4Z

2

SATA_FTX_DRX_P1 <14>

SATA_FTX_DRX_N1 <14>

SATA_FRX_C_DTX_N1 <14> SATA_FRX_C_DTX_P1 <14>

12 12

+5VS_ODD

SATA_FRX_DTX_P1_ODD

C3740.01U_0402_25V7KODD1@ C3740.01U_0402_25V7K ODD1@

SATA_FRX_DTX_N1_ODD

C3730.01U_0402_25V7KODD1@ C3730.01U_0402_25V7K ODD1@

SATA_FTX_C_DRX_N1_ODD

C3720.01U_0402_25V7KODD1@ C3720.01U_0402_25V7K ODD1@

SATA_FTX_C_DRX_P1_ODD

C3710.01U_0402_25V7KODD1@ C3710.01U_0402_25V7K ODD1@

ODD_PLUGIN# ODD_DA#

1

Slot ODD conn

JODD1

14

GND

13

GND

12

11

10

9

8

7

6

5

4

3

2

1

E&T_6905-E12N-00R

@

SANTA_194002-1

SANTA_194002-1 @

@

W=60mils

Left USB conn

C263

12

0.1U_0402_16V4Z

B B

For EMI request

C389

0.1U_0402_16V4Z

USB_EN#<29>

1 2

+5VALW

2.5A

U14

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

EN

RT9715BGS_SO8

FLG

W=60mils

+USB_VCCA

C390 0.1U_0402_16V4ZC390 0.1U_0402_16V4Z

8

C361 1000P_0402_50V7KC361 1000P_0402_50V7K

7 6 5

1

C362

4.7U_0805_10V4Z

2

For EMI request

12 12

USB_OC0# <13,29>

0.1U_0402_16V4Z C268

C268

1000P_0402_50V7K

USB20_N0_R USB20_P0_R

PJDLC05_SOT23-3

12

JUSB0

1

GND

VCC

2

GND

D-

3

GND

D+

D27

2

3

1

@

4

GND

P-TWO_CU304G-A0G1G-P

@JUSB0

@

5 6 7 8

220U_6.3V_M_R15

SF000001500 H=5.7

1000P_0402_50V7K

USB20_N1_R USB20_P1_R

PJDLC05_SOT23-3

+USB_VCCA+USB_VCCA

C260

+

C261

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z C262

C262

12

2

3

D25

@

1

12

JUSB1

1

VCC

2

D-

3

D+

4

GND

P-TWO_CU304G-A0G1G-P

GND GND GND GND

Reserve for EMI request

R73 0_0402_5%@R73 0_0402_5%@

1 2

L53

USB20_P0<13>

@JUSB1

@

5 6 7 8

USB20_N0<13>

USB20_N1<13>

USB20_P1<13>

4

1

WCM-2012-900T_4P

1 2

R87 0_0402_5%@R87 0_0402_5%@ R77 0_0402_5%@R77 0_0402_5%@

1 2

L54

4

1

WCM-2012-900T_4P

1 2

R88 0_0402_5%@R88 0_0402_5%@

USB20_P0_R

3

USB20_N0_R

2

USB20_N1_R

3

USB20_P1_R

2

SM070000K00

A A

Security Classification

2011/01/11 2011/11/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

21 41Monday, May 09, 2011

1

B

of

5

4

3

2

1

TP LED Conn Cap Sensor Conn

+5VS

KSI6<28,29>

KSO0<28,29>

D D

TP_LED<29>

2N7002DW-T/R7_SOT363-6

TP/B LED/B FP/B Conn

C C

+3VS_FP

R134

1 2

+3VS

B B

0_0603_5%

1

C480

0.1U_0402_16V4Z

2

TP_CLK<29> TP_DATA<29>

AZ5125-02S.R7G_SOT23-3

For EMI request(1/20 change to SC600001600)

D82

@

USB20_N7 USB20_P7

@

3

1

2

AZC199-02SPR7G_SOT23-3

Q163A

1

TP_LED#

61

2

D28

2 3

JTPL

1

2

3

4

5

P-TWO_161021-06021_6P-T

5 66G8

@

USB20_N7<13> USB20_P7<13>

7

G7

8

Fringer Printer

+5VS

LOGO_LED# USB20_N7

USB20_P7

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q163B

Q163B

5

4

JTOUCH

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

P-TWO_161021-10021

@

LOGO_LED <14>

Cap Sensor

+5VALW

+3VL

L13FBMA-11-100505-301T_0402 L13FBMA-11-100505-301T_0402

ESB_DAT<29>

ESB_CK<29> CAP_INT#<29> CAP_RST#<29>

ESB_DAZ ESB_CKZ

1 2

@R428

@ 100_0402_5%

100_0402_5%

R428

1 2

C291

@C291

@ 100P_0402_50V8J

100P_0402_50V8J

L14FBMA-11-100505-301T_0402 L14FBMA-11-100505-301T_0402

1 2 1 2

1 2

R427

@R427

@ 100_0402_5%

100_0402_5%

ESB_DAZ ESB_CKZ

CAP_RST#

1 2

C288

@C288

@ 100P_0402_50V8J

100P_0402_50V8J

JCS

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

P-TWO_161021-10021

@

A A

Security Classification

2011/01/11 2011/11/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

22 41Monday, May 09, 2011

1

B

of

0.01U_0402_25V4Z

+3V_WLAN

0.01U_0402_25V4Z

+3V_WLAN

1

CM1

2

+1.5VS

0.1U_0402_16V4Z

1

CM7

2

WLAN_OFF# APU_PCIE_RST#

40mils

0.1U_0402_16V4Z

1

CM3

CM2

CM8

CM3

2

4.7U_0805_10V4Z

1

CM9

2

4.7U_0805_10V4Z

R583

R583 0_0402_5%

0_0402_5%

1 2

FCH_SCLK0 <10,11,13> FCH_SDATA0 <10,11,13>

USB20_N8 <13> USB20_P8 <13>

For SED

1

12

CM10

CM10 47P_0402_50V8J

2

47P_0402_50V8J

For SED

1

12

CM11

CM11 47P_0402_50V8J

2

47P_0402_50V8J

WL_OFF# <14> APU_PCIE_RST# <12,17,24>

BTWLAN/ WiFi

PCIE_FTX_C_JETRX_N2<5> PCIE_FTX_C_JETRX_P2<5>

PCIE--JET

CLKREQ_JET#<13>

+UIM_PWR

0.1U_0402_16V4Z

0.1U_0402_16V4Z 3G@

3G@

T62T62 T63T63

T64T64 T65T65

+3VS

CM13

+UIM_PWR

1

2

PCIe Mini Card-WLAN PCIe Mini Card-3G/JET

PJ26

+3VS +3V_WLAN

E51_TXD<29,30> E51_RXD<29,30>

Debug card using

2

112

@

JUMP_43X79

Short PJ26 for WLAN

R582

@R582

@

0_0402_5%

BT_CTRL BT_CTRL_R

1 2

CLKREQ_WLAN#<13>

CLK_WLAN#<12> CLK_WLAN<12>

PCIE_FRX_WLANTX_N1<5> PCIE_FRX_WLANTX_P1<5>

PCIE_FTX_C_WLANRX_N1<5> PCIE_FTX_C_WLANRX_P1<5>

+3V_WLAN

R16 0_0402_5%R16 0_0402_5%

1 2 1 2

R17 0_0402_5%R17 0_0402_5%

E51_RXD_R

JWLAN

1

3

5

7

9

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

GND2

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

FOX_AS0B226-S40N-7F

FOX_AS0B226-S40N-7F @

@

+1.5VS

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

For Isolate Intel Rainbow Peak and Compal debug card

J3G

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0B226-S40N-7F

FOX_AS0B226-S40N-7F @

@

UIM_RESET

12

UIM_CLK

DM1

RLZ20A_LL34

RLZ20A_LL34 3G@

3G@

10P_0402_50V8J

GND2

500mA

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

CM15

3G@

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

2

+3VS

+1.5VS

APU_PCIE_RST#

FCH_SCLK0 FCH_SDATA0

LED_3G#

CM16

CM16 10P_0402_50V8J

10P_0402_50V8J 3G@

3G@

2.75A

+UIM_PWR

UIM_DATA UIM_CLK UIM_RESET UIM_VPP

1 2

100K_0402_5%

R133

R133 200K_0402_5%

200K_0402_5%

1 2

Avoid LED flashing

J3GSIM

1

VCC

2

RST

3

CLK

7

NC

MOLEX_47273-0001~D

MOLEX_47273-0001~D @

@

0.01U_0402_25V7K

3GJET@

3G_OFF# <14>

USB20_N6 <13> USB20_P6 <13>

LED_3G# <31>

R143

4

GND

5

VPP

6

I/O

8

NC

CM4

+3VS

+5VS

120 MIL

1

CM5

3GJET@

2

0.1U_0402_16V4Z

3G

UIM_VPP

4.7U_0805_10V4Z

1

CM6

3GJET@

2

+UIM_PWR

For SED

12

RM2

4.7K_0402_5%

4.7K_0402_5% @

@

UIM_DATA

1

CM14

CM14 22P_0402_50V8J

22P_0402_50V8J

2

@

CM12

CM12 47P_0402_50V8J

47P_0402_50V8J

BT_CTRL E51_RXD_R

BT_ON#<14>

1 2

R277 1K_0402_5%R277 1K_0402_5%

BT on Combo module

Enable Disable

BT_CRTL

BT_ON# H

5

H

L

BT_CTRL

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q61B

Q61B

The other on P31

4

USB Sleep & Charge Auto-Mode

L

Mode3/Mode4

USB_CHG_EN#<26,29>

+5VALW +USB_VCCB

2.5A

U16

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

RT9715BGS_SO8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

8 7 6 5

W=60mils

1

C385

4.7U_0805_10V4Z

4.7U_0805_10V4Z @

@

2

USB_OC1# <13,26,29>

2011/01/11 2011/11/11

MAX14566B

CB SLP_CHG_M4

0

CB1 (CEN#) SLP_CHG_M3

0

01

1X

SLP_CHG_M3<14> USB20_DN1_R<26> USB20_DP1_R<26>

Compal Secret Data

Deciphered Date

STATUS

AUTO MODE (Including Mode 4) Force Dedicated charger mode

(MODE3) Pass-Through (USB) Mode:

Connect DP/DM to TDP/TDM

U8

1

CEN

2

DM

3

DP

4

GND

9

GND

MAX14566BEETA+_TDFN-EP8_2X2~D

SA00004GV00

TDM TDP VCC

8

CB

7 6 5

SLP_CHG# <14> USB20_N10 <13> USB20_P10 <13>

+5VALW

1

C895

0.1U_0402_16V7K

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

Monday, May 09, 2011

of

23 41

of

23 41

of

23 41

B

5

RL21 10K_0402_5%8111E@ RL21 10K_0402_5%8111E@ RL22 1K_0402_5%RL22 1K_0402_5%

1 2

+LAN_VDDREG

PCIE_FRX_LANTX_P0 PCIE_FRX_LANTX_N0

RL19 0_0402_5%RL19 0_0402_5%

LAN_X1 LAN_X2

FCH_PCIE_WAKE# ISOLATE#

12

ENSWREG

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

CL1 0.1U_0402_16V7KCL1 0.1U_0402_16V7K

PCIE_FRX_C_LANTX_P0<5> PCIE_FRX_C_LANTX_N0<5>

+3V_LAN

D D

1K_0402_1%

15K_0402_5%

C C

RL20

RL3

RL6

RL7

+3VS

12

@

@ 10K_0402_5%

10K_0402_5% @

@ 10K_0402_5%

10K_0402_5%

@RL6

@

ISOLATE#

WOL_EN

12

RL25

0_0402_5%

CLKREQ_LAN#

FCH_PCIE_WAKE#

WOL_EN

Sx Enable Wake up

LOW

Sx Disable Wake up

1 2

CL2 0.1U_0402_16V7KCL2 0.1U_0402_16V7K

1 2

PCIE_FTX_C_LANRX_P0<5> PCIE_FTX_C_LANRX_N0<5>

CLKREQ_LAN#<13>

APU_PCIE_RST#<12,17,23>

FCH_PCIE_WAKE#<13,26>

+3V_LAN

S0

HIGH

CLK_LAN<12> CLK_LAN#<12>

+3VALW TO +3V_LAN

+3VALW

RL24

@RL24

100K_0402_5%

WOL_EN<29>

B B

@

CL12

0.1U_0402_16V7K @

1 2

RL16 47K_0402_5%

@

CL14

0.01U_0402_25V7K

4.7U_0805_10V4Z

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

For P/N and footprint Please place them to ISPD page

UL1

SA00003PO30

RTL8105E-VL-CGT

RTL8105E-VL-CGT 8105E@

8105E@

A A

+3VALW +3V_LAN

2

CL300.1U_0402_16V4Z CL300.1U_0402_16V4Z

1

2

CL31 0.1U_0402_16V4ZCL31 0.1U_0402_16V4Z

1

5

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

2

QL1

G

1

2

1

AO3413_SOT23

@

2

CL15

@

EMI request

11/16

1

S

@

PJ29

1

JUMP_43X39

JUMP_43X39 @

@

2

D

1 3

2

1

CL8 1U_0402_6.3V4ZCL8 1U_0402_6.3V4Z

2

+3V_LAN

LAN_MDI3LAN_MDI3+

LAN_MDI2LAN_MDI2+

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

4

LAN_MDI0+ LAN_MDI0-

CL35 0.1U_0402_25V4K8105E@ CL35 0.1U_0402_25V4K8105E@

1 2

EMI request

LAN_MDI1+ LAN_MDI1-

EMI request

CL45 0.1U_0402_25V4K8111E@ CL45 0.1U_0402_25V4K8111E@

1 2

CL46 0.1U_0402_25V4K8111E@ CL46 0.1U_0402_25V4K8111E@

1 2

CL47 0.1U_0402_25V4K8111E@ CL47 0.1U_0402_25V4K8111E@

1 2

CL48 0.1U_0402_25V4K8111E@ CL48 0.1U_0402_25V4K8111E@

1 2

4

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111E-VL-CGT_QFN48_6X6

RTL8111E-VL-CGT_QFN48_6X6 8111E@

8111E@

SA00004LR00

8105E@

CL430.1U_0402_25V4K

1 2

LED1/EESK

LED0

EECS

EEDI

MDIP0 MDIN0 MDIP1 MDIN1

NC/MDIP2

NC/MDIN2

NC/MDIP3

NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10 AVDD10

AVDD10 AVDD10 AVDD10

REGOUT

25MHZ_20PF_7A25000012

1

CL26

CL26 27P_0402_50V8J

27P_0402_50V8J

2

SP050006W00

UL4

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

DELTA 8456E-R

DELTA 8456E-R 8105E@

8105E@

SP050005L00

UL3

1

TCT1

MCT1

2

TD1+

MX1+

3

TD1-

MX1-

4

TCT2

MCT2

5

TD2+

MX2+

TD2-6MX2-

7

TCT3

MCT3

8

TD3+

MX3+

9

TD3-

MX3-

TCT4

MCT4

TD4+

MX4+

TD4-

MX4-

8111E@

31 37 40

30 32

1 2 4 5 7 8 10 11

13 29 41

27 39

12 42 47 48

21 3

6 9 45

36

TX+

RX+

TX-

CT NC NC CT

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1LAN_MDI2+ LAN_MDI2LAN_MDI3+ LAN_MDI3-

YL1

LED3/EEDO

10 11 12

SUPERWORLD_SWG150401

3

LL1

8111E@LL1

+LAN_REGOUT

2.2UH +-5% NLC252018T-2R2J-N

Layout Note: LL1 must be within 200mil to Pin36,

RL2 10K_0402_5%RL2 10K_0402_5% RL1 10K_0402_5%RL1 10K_0402_5%

+LAN_REGOUT

60 mils

16 15 14 13 12 11 10 9

24 23 22

21 20 19

18 17 16

15 14 13

12 12

+LAN_VDD10

+3V_LAN

+LAN_EVDD10 +LAN_VDD10

LAN_X2LAN_X1

12

1

CL27

CL27 27P_0402_50V8J

27P_0402_50V8J

2

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI1+ RJ45_MIDI1-

8111E@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CL13,CL9 must be within 200mil to LL1 +LAN_REGOUT: Width =60mil

+LAN_VDD10

Pin14 Pin15 Pin38

CL39 1000P_0402_50V7K

CL40 1000P_0402_50V7K

CL41 1000P_0402_50V7KCL41 1000P_0402_50V7K

CL42 1000P_0402_50V7KCL42 1000P_0402_50V7K

8111E@

1 2

12

RL11 75_0402_1%

8111E@

1 2

12

RL12 75_0402_1%

1 2

12

RL13 75_0402_1%RL13 75_0402_1%

12

1 2

RL15 75_0402_1%RL15 75_0402_1%

2011/01/11

RTL8105E

NC NC 10K ohm PD 1K ohm Pull-high

8111E@

1 2

4.7U_0603_6.3V6K

12

LL20_0603_5% LL20_0603_5%

CL18

1U_0402_6.3V4Z

Close to Pin 21

8111E@

12

LL30_0603_5%

CL28

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 8111E@

8111E@

RTL8111E

NC

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

RJ45_GND

Compal Secret Data

Deciphered Date

CL13

8111E@

2

+LAN_VDD10

1

2

CL9

0.1U_0402_16V4Z

2

1

8111E@

+LAN_EVDD10

2

1

CL17

0.1U_0402_16V4Z

1

2

+LAN_VDDREG+3V_LAN

2

1

CL29

0.1U_0402_16V4Z

1

2

8111E@

RJ45_GND LANGND

2011/11/11

2

RJ45_MIDI3RJ45_MIDI3+ RJ45_MIDI1RJ45_MIDI2RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

1

1 2 1 2 1 2 1 2 1 2 1 2

CL190.1U_0402_16V4Z CL190.1U_0402_16V4Z CL200.1U_0402_16V4Z CL200.1U_0402_16V4Z CL210.1U_0402_16V4Z CL210.1U_0402_16V4Z CL220.1U_0402_16V4Z

CL220.1U_0402_16V4Z CL230.1U_0402_16V4Z

CL230.1U_0402_16V4Z CL240.1U_0402_16V4Z

CL240.1U_0402_16V4Z CL250.1U_0402_16V4Z

CL250.1U_0402_16V4Z

+3V_LAN

CL100.1U_0402_16V4Z CL100.1U_0402_16V4Z CL40.1U_0402_16V4Z CL40.1U_0402_16V4Z CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z CL70.1U_0402_16V4Z8111E@ CL70.1U_0402_16V4Z8111E@ CL110.1U_0402_16V4Z8111E@ CL110.1U_0402_16V4Z8111E@

+LAN_VDD10

RTL8105E-VL

LDO Mode

NC

0 ohm (Pull Down)

Close to Pin 12,27,39,42,47,48

Close to Pin 3,6,9,13,29,41,45

1 2 1 2 1 2 1 2

8111E@

1 2

8111E@

1 2

8111E@

1 2

8111E@

CL23,CL24,CL25 close to pin6,9,41, respectively

RTL8105E-VL RTL8111E-VL PWM Mode

RL4 0 ohm

(Pull High)

NC

RL23

ENSWREG

8111E@

8105E@

+3V_LAN

RL4

RL4 0_0402_5%

0_0402_5%

RL23

RL23 0_0402_5%

0_0402_5%

LAN Conn.

JLAN

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130451-D

SANTA_130451-D @

@

AZC199-02SPR7G_SOT23-3

EMI request

1000P_1808_3KV7K

1 2

CL36

Title

Size Document Number Rev

Monday, May 09, 2011

Date: Sheet

1

CL37

@

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

1

SHLD1 SHLD2

1

2

DL1

9 10

DL2

CL38

CL38 220P_0402_50V7K

220P_0402_50V7K

24 41

223

of

1

3

1

B

A

1 1

CLK_CR#<12> CLK_CR<12>

PCIE_MTX_C_CRRX_N2<12> PCIE_MTX_C_CRRX_P2<12>

CC8 0.1U_0402_16V7KCC8 0.1U_0402_16V7K

PCIE_MRX_C_CRTX_N2<12> PCIE_MRX_C_CRTX_P2<12>

CC16 close to pin43 For internal LDO in SD3.0

2 2

+5VS

390_0402_5%

1 2

CC9 0.1U_0402_16V7KCC9 0.1U_0402_16V7K

1 2

CC16

12

2.2U_0603_6.3V6K

FCH_PCIE_RST#<13,26>

DC1

RC6

12

DC1

2 1

HT-F196BP5_WHITE

RC2 12K_0402_1%RC2 12K_0402_1%

CLK_CR# CLK_CR

PCIE_MTX_C_CRRX_N2 PCIE_MTX_C_CRRX_P2

PCIE_MRX_CRTX_N2 PCIE_MRX_CRTX_P2

APREXT

12

+SDV33_18

CPPE# XD_CD#

MS_CD# SD_CD#

40 mils

+VCC_OUT

CR_LED#

JMB can sink 16mA

12mil

B

UC1

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11 12

43 39

13 14

15 16

17

21

SA00003PN10

APTXN APTXP

7

APREXT

SDDV/MDIO4 TXIN/NC

JMB389

1

XRSTN

2

XTEST

CPPE_N CR1_CD2N

CR1_CD1N CR1_CD0N

CR1_PCTLN

CR1_LEDN

JMB389-LGAZ0A_LQFP48_7X7

APVDD

APV18

NC/TAV33

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3

MDIO6/4

MDIO5

G/MDIO6

MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

NC/SPI_SCK NC/SPI_CSN

NC/SPI_SO

NC/SPI_SI

APGND NC/GND NC/GND NC/GND

+1.8VS_OUT

20mil

CC1

5 10 36

40mil

19 20 44 18 37

XD_SD_MS_D0

48

XD_SD_MS_D1

47

XD_SD_MS_D2

46

XD_SD_MS_D3

45

SDCMD_MSBS_XDWE#

41

SDCLK_MSCLK_XDCE#

42

XDWP#_SDWP#

24

XD_CLE

40

XD_SD_D4

29

XD_SD_D5

28

XD_SD_D6

27

XD_SD_D7

26

XD_RE#

25

XD_RB#

23

XD_ALE

22 30

33 34 35

6 31 32 38

1

2

10U_0805_10V4Z

20mil

CC3 close to pin 5 CC2 close to CC3 CC1 is near CC3

1

CC2

1

CC3

CC4

2

0.22U_0402_6.3V4K

+3VS

place near pin 19,20 and 44

CC5 0.1U_0402_16V4ZCC5 0.1U_0402_16V4Z

CC4

2

1000P_0402_50V7K

1 2 1 2

CC6 0.1U_0402_16V4ZCC6 0.1U_0402_16V4Z

1 2

CC7 0.1U_0402_16V4ZCC7 0.1U_0402_16V4Z

+1.8VS_OUT

2

1

CC10

0.22U_0402_6.3V4K

CC10 close to pin37

C

1

CC4 close to pin 10

2

0.1U_0402_16V4Z

CC12 close to pin 36

1

CC11 10U_0805_10V4ZCC11 10U_0805_10V4Z

CC11 close to pin18

2

For intenal LDO's usage

D3E mode

CR_CPPE#<13>

CR_WAKE#<14>

+3VS +3VS

2

CC12

0.1U_0402_16V4Z

1

Power On Strapping setting

Pin name

MDIO7

MDIO14

MDIO7

MDIO14

D

1 3

D

RC14 0_0402_5%RC14 0_0402_5%

1 2

Due to JMB has INT

@

1 2

RC29 10K_0402_5%

PH. So unmount RC29

Description

High

★

CR_LED high active

JMB review to @

XD_CLE

1 2

RC28 10K_0402_5%@RC28 10K_0402_5%@

XD_ALE

1 2

RC26 10K_0402_5%@RC26 10K_0402_5%@

1 2

RC25 200K_0402_5%@RC25 200K_0402_5%@

+3VS +3VS

2

G

QC1

S

2N7002_SOT23-3

low

add-in cardon-board

CR_LED low active

12

RC19

RC19 10K_0402_5%

10K_0402_5%

CPPE#

SD_CD#

+3VS

★

+VCC_OUT

XDWP#_SDWP#

12

RC710K_0402_5% RC710K_0402_5%

1 2

RC91K_0402_5% RC91K_0402_5%

3 3

4 4

SD_CD# XD_CD#

1

CC21

CC20

@CC20

@

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

A

XD_RB#

10U_0805_10V4Z

CC17

+VCC_OUT

1

2

40 mils

1

CC18

0.1U_0402_16V4Z

2

XD_CD# XD_RB# XD_RE# SDCLK_MSCLK_XDCE#_R XD_CLE XD_ALE XDWE# XDWP#_SDWP#

XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7

NBQAA 4 in 1 Card Reader

JREAD

34

XD-VCC

1

XD-CD-SW

2

XD-R/B

3

XD-RE

4

XD-CE

5

XD-CLE

6

XD-ALE

7

XD-WE

8

XD-WP

9

XD-D0

24

XD-D1

25

XD-D2

27

XD-D3

28

XD-D4

29

XD-D5

31

XD-D6

33

XD-D7

TAITW_R015-300-LM_RV @

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MS-VCC

MS-SCLK

MS-INS

MS-BS MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

SD-VCC

SD-CLK

SD-CMD SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3

SD-WP-SW

SD-CD-SW

4in1-GND 4in1-GND 4in1-GND 4in1-GND

10

SDCLK_MSCLK_XDCE#_R

12

MS_CD#

16

SDCMD_MSBS

23

XD_SD_MS_D0

19

XD_SD_MS_D1

21

XD_SD_MS_D2

18

XD_SD_MS_D3

14 20

SDCLK_MSCLK_XDCE#_R

22

SDCMD_MSBS

15

XD_SD_MS_D0

30

XD_SD_MS_D1

32

XD_SD_MS_D2

11

XD_SD_MS_D3

13

XDWP#_SDWP#

35

SD_CD#

36

17 26 37 38

Compal Secret Data

2011/01/11 2011/11/11

Compal Secret Data

+VCC_OUT

Deciphered Date

C

RC15, RC16 need to place close to UC1==> for XD issue

RC15

SDCMD_MSBS_XDWE# XDWE#

RC15

12

22_0402_5%

1 2

RC16 0_0402_5%RC16 0_0402_5%

SDCMD_MSBS

PVT change RC16 to 0 ohm for SDXC performance

Reserved for EMI,close to UC1.42

SDCLK_MSCLK_XDCE#

12

RC11 0_0402_5%RC11 0_0402_5%

Change MDIO5 clock trace routing for SDHC issue

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

SDCLK_MSCLK_XDCE#_R

1

CC19

CC19 22P_0402_50V8J

22P_0402_50V8J @

@

2

4019D7

D

25 41Monday, May 09, 2011

B

of

5

USB30_POK

RT1

+1.5V to +1.05V Transfer

+3V+1.5V +1.5V +1.05V

10U_0603_6.3V6M

CT2

1

RENE@

Vout=0.8(1+10K/32.4K)

1.042 ~ 1.0469 ~ 1.0519V

D D

Spec: 0.9975 ~ 1.05 ~ 1.1025

USB30_POK

2

+3V

+3VALW to +3V Transfer

RENE@ RT37

RENE@

QT2A

1

CT25

2

RENE@

CT20 0.01U_0402_25V7K

CT21 0.1U_0402_16V7K

2

1

2

RENE@

CT14 0.1U_0402_16V7K

CT15 0.01U_0402_25V7K

1

2

1

2

RENE@

CT22 0.01U_0402_25V7K

CT23 0.01U_0402_25V7K

2

1

SYSON<29,32,37>

2N7002DW-T/R7_SOT363-6

+3V +3VA

LT3

1 2

BLM18AG601SN1D_2P

C C

RENE@

10U_0603_6.3V6M

RENE@

+1.05V

RENE@

CT17 0.01U_0402_25V7K

CT16 0.1U_0402_16V7K

1

2

+3V

RENE@

CT10 0.01U_0402_25V7K

CT11 0.01U_0402_25V7K

2

1

CT18 0.1U_0402_16V7K

2

1

2

CT12 0.01U_0402_25V7K

2

1

RENE@

CT19 0.01U_0402_25V7K

2

1

RENE@

CT13 0.01U_0402_25V7K

2

1

RENE@

B B

UT2

5

VIN

VOUT

9

VOUT

VIN

6

VCNTL

7

POK

8

EN

GND

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8 RENE@

RENE@

+3VALW

RENE@

RENE@ RT37 100K_0402_5%

100K_0402_5%

1 2 61

PCIE_MRX_C_USBTX_P1<12> PCIE_MRX_C_USBTX_N1<12>

PCIE_MTX_C_USBRX_P1<12> PCIE_MTX_C_USBRX_N1<12>

UPD720200A: SMIB Low active

CT24 0.01U_0402_25V7K

2

USB30_SMI#_IC

1

CT41

0.1U_0402_16V7K

RENE@

RENE@ 1 2

RT38 47K_0402_5%

CT43

0.01U_0402_25V7K

0.01U_0402_25V7K RENE@

RENE@

+3V & +1.05V has power sequence timing:

0.1*VDD(+3V) ~ 0.9*VDD(+1.05V) < 100ms

CLK_USB30<12> CLK_USB30#<12>

FCH_PCIE_RST#<13,25>

FCH_PCIE_WAKE#<13,24>

USB30_SMI#_IC

For UPD720200: SMI high active

3

QT2B

@

5

2N7002DW-T/R7_SOT363-6

4

24MHZ_12PF_X5H024000DC1H

RT30

0_0402_5%@RT30

0_0402_5%

@

1 2

RENE@

+3V

3 4

2

FB

1

2

1

2

1

+3V

1 2

12P_0402_50V8J

1

CT37

2

1 2

4.7K_0402_5%

4.7K_0402_5% RENE@

RENE@

1A

12

+3VALW

CT42

0.1U_0402_16V4Z

S

G

QT1

2

AO3413_SOT23

D

RENE@

1 3

CT29

CT29 CT30

CT30

RENE@ DT3

RENE@

USB30_SMI_R

@

@ RT21 0_0402_5%

RT21 0_0402_5%

USB30_SMI#_R

@

@ RT40 0_0402_5%

RT40 0_0402_5%

12 RT26

RT26 100_0402_5%

100_0402_5% RENE@

RENE@

RENE@ YT1

YT1

1

2

RENE@

12

RT2

10K_0402_1%

RT3

32.4K_0402_1%

32.4K_0402_1% RENE@

RENE@

+3V

RENE@

12 12

RENE@

RT12 0_0402_5%

+3V +3V

RT39 10K_0402_5%

1 2

S DIO 1SS355 SOD323

1

12P_0402_50V8J

CT38

RENE@

10U_0603_6.3V6M

1

2

RENE@

RENE@CT42

RENE@

0.1U_0402_16V7K

RENE@

PCIE_MRX_USBTX_P1 PCIE_MRX_USBTX_N1

RENE@

USB30_WAKE#

1 2

CLKREQ_USB30#_R

RT15 10K_0402_5%RENE@RT15 10K_0402_5%RENE@

1 2

RT16 100_0402_1%@RT16 100_0402_1%@

1 2

RT17 10K_0402_5%

1 2

USB30_SMI_R

RENE@

USB30_SMI#_R

RT180_0402_5%

1 2 RENE@

RENE@

221

DT3

1

2

RENE@

+3V

Close to U102.D7 Close to U102.P13

0.1U_0402_16V7K

CT3

CT4

RENE@

SPI_CLK_USB

1U_0603_10V6K

SPI_CS_USB#

CT44

SPI_SI_USB SPI_SO_USB

USB30_XT1 USB30_XT2

RENE@

0_0402_5%

1 2

@

@ RT28

RT28

RT29

Place as close as possibile to UU102.N14 and UU102.M14

RT32

47K_0402_5%

RENE@

+3V

1 2

12

RT33

RT33 10K_0402_5%

10K_0402_5% RENE@

RENE@

512K bit

UT4

1

CS#

2

SO

3

WP#

4

GND

MX25L5121EMC-20G SOP 8P

SA000046000

RENE@

5

35mA

HOLD#

SCLK

VCC

SI

8 7 6 5

1 2

RENE@

RENE@ RT35 10K_0402_5%

RT35 10K_0402_5%

SPI_CLK_USB_R SPI_SI_USB

RT36

1 2

0_0402_5%

RENE@

CT39

1 2

0.1U_0402_16V7K

RENE@

SPI_CLK_USBSPI_CLK_USB_R

A A

SPI_CS_USB# SPI_SO_USB

4

+3VA +3VA

8P_0402_50V8D

CT6

@

1

2

0.01U_0402_25V7K

0.01U_0402_25V7K RENE@

RENE@

@

1

2

CT5

Follow Vendor recommend.

+3V +1.05V

RENE@

UT1

D10

F13

F14

VDD33

B2

PECLKP

B1

PECLKN

D2

PETXP

D1

PETXN

F2

PERXP

F1

PERXN

H2

PERSTB

K1

PEWAKEB

K2

PECREQB

J2

AUXDET

J1

PSEL

H1

SMI

P4

SMIB

P5

PONRSTB

M2

SPISCK

N2

SPISCB

N1

SPISI

M1

SPISO

K13

GND

K14

GND

J13

GND

C14

GND

N14

XT1

M14

XT2

P6

CSEL

CSEL=0：24MHz XTAL CSEL=1

A1

GND

A2

GND

A3

GND

A4

GND

A5

0_0402_5%

GND

A7

GND

A9

GND

A11

GND

A13

GND

A14

GND

B3

GND

B4

GND

B5

GND

B7

GND

B9

GND

B11

GND

B13

GND

B14

GND

C1

GND

C2

GND

C3

GND

C10

GND

C11

GND

C12

C13

SPI_CLK_USB

Close to UU37.6

RT34

1 2

0_0402_5%

0_0402_5% @

@

4

GND

GNDD3GNDD4GND

1

0.1U_0402_16V7K

0.1U_0402_16V7K CT7

CT7 RENE@

RENE@

2

0.01U_0402_25V7K

0.01U_0402_25V7K RENE@

RENE@

L10

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

+3V:200mA +1.05V:800mA

：

48MHz Clock

GND

GNDE1GNDE2GND

D11

D12

D13

D14

2

CT40

0.1U_0402_16V7K

1

@

8P_0402_50V8D

CT9

@

1

2

CT8

L13

L14

VDD33

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

SA000048H00 (UPD720200AF1-DAP-A)

GND

E13

E14

GNDF4GNDF6GNDF7GNDF8GNDF9GND

F11

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

G9

F12

GND

G11

3

U3TXDP1_LU3TXDP1

RT5

@ RT5

@

1 2

0_0402_5%

WCM-2012-121T_0805

4

1

LT2

E11

E12

VDD10

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

H12

LT2 1 2

VDD10H3VDD10H4VDD10L5VDD10

3

U3TXDN1 U3TXDN1_L

GND

GNDH6GND

GNDH7GNDH8GNDH9GND

G13

G12

3

SM070001U00

2

RT7

0_0402_5%@

+3VA

H11

K11

K12

L8

D7

VDD10

U3AVDO33 U3TXDP2 U3TXDN2

U2DM2

U3RXDP2 U3RXDN2

PPON2

PPON1

U3TXDP1 U3TXDN1

U2DM1

U3RXDP1 U3RXDN1

U2AVSS U2PVSS U3AVSS

GND

GNDK3GNDK4GNDL1GNDL2GNDL3GND

L4

J11

J12

UPD720200AF1-DAP-A

P13

U2AVDD10

B6 A6

N8 P8

U2DP2

B8 A8

G14

OCI2B

H13

OCI1B

H14 J14

B10 A10

N10 P10

U2DP1

B12 A12

P12

RREF

N12 N11 D6

P14

GND

P11

GND

P9

GND

P7

GND

P2

GND

P1

GND

N13

GND

N9

GND

N7

GND

N3

GND

M13

GND

M12

GND

M11

GND

M10

GND

M9

GND

M8

GND

M7

GND

M6

GND

M5

GND

M4

GND

M3

GND

L12

GND

L11

GND

L7

GND

L6

GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

for EMI's requestfor EMI's request

4

1

USB30_RX0N U3RXDN1_R_L

OCI2#

RT13 10K_0402_5%

1 2

OCL1#

RENE@

USB30PWRON

U3TX_C_DP1 U3TX_C_DN1

U2D_DN1_N U2D_DP1_N

U3RXDP1_R U3RXDN1_R

Place test point close to UT1

RT22 1.6K_0402_1%

1 2

RENE@

RT11

1 2

0_0402_5%

T10T10 T17T17

T18T18 T19T19

T20T20 T21T21

CLKREQ_USB30#_R

+3V

USB30_SMI#_IC

OCL1#

+3V

@RT11

@

+3V

RT45

RT45 10K_0402_5%

10K_0402_5% RENE@

RENE@

1 2

10K_0402_5%

10K_0402_5% RT43

RT43 RENE@

RENE@

10K_0402_5%

10K_0402_5% RT44

RT44 RENE@

RENE@

2010/09/17 Add Level shift to avoid +3V leakage from +3VALW_PCH

2011/01/11 2011/11/11

2

RT4

@ RT4

@

1 2

0_0402_5%

LT1

4

1

WCM-2012-121T_0805

1 2

RB751V40_SC76-2

1 2

RT8 0_0402_5%

2N7002DW-T/R7_SOT363-6

Compal Secret Data

3

2

RT6

0_0402_5%@

+3V

USB_CHG_EN# <23,29>

DT1

21

RENE@

@

+3V

12

4

RENE@

2N7002DW-T/R7_SOT363-6

12

Deciphered Date

2

5

QT3B

U3RXDP1_R_LUSB30_RX0P

SM070001U00

3

2

QT3A

RENE@

+USB_VCCB

CLKREQ_USB30# <12>

USB30_SMI# <13>

61

USB_OC1# <13,23,29>

1

for EMI's request

RT9 0_0402_5%

@

1 2

LT4

W=80mils

4.7U_0805_10V4Z

CT26

JUSB30

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

SANTA_371394-3

RT10 0_0402_5%@RT10 0_0402_5%@

LT4

1

4

WCM-2012-900T_4P

1 2

USB30_RX0N

USB30_RX0P

1 2

CT35 0.1U_0402_16V7KCT35 0.1U_0402_16V7K

1 2

CT34 0.1U_0402_16V7KCT34 0.1U_0402_16V7K

+USB_VCCB

1

+

CT31

2

220U_6.3V_M_R15

@JUSB30

@

10

GND

11

GND

12

GND

13

GND

0_0603_5%

RT41

USB20_DN1_R<23>

USB20_DP1_R<23>

U3TXDP1_L U3TXDN1_L

USB20_DP1_L USB20_DN1_L

U3RXDP1_R_L U3RXDN1_R_L

USB20_DN1_R

USB20_DP1_R

USB30_RX0N<13>

USB30_RX0P<13>

USB30_TX0N<13>

USB30_TX0P<13>

For EMI's request 1/20

DT2

U3TXDN1_L U3TXDP1_L

U3RXDN1_R_L

U3RXDP1_R_L

Title

Size Document Number Rev

Custom

Date: Sheet

DT2

1

2

4

4 5

3

8

YSCLAMP0524P_SLP2510P8-10-9

@

DT4

4019D7

1

DT4

2

3

AZC199-02SPR7G_SOT23-3

@

USB20_DP1_L USB20_DN1_L

Compal Electronics, Inc.

SCHEMATIC MB A7571

2

SM070000K00

3

0.1U_0402_16V4Z

1

CT27

2

1000P_0402_50V7K

12

0_0603_5%

0_0603_5% RT42

RT42

U3TXDN1_L

10

9

U3TXDP1_L

9

8

U3RXDN1_R_L

7

U3RXDP1_R_L

65

6

1

26 41Monday, May 09, 2011

USB20_DN1_L

USB20_DP1_L

U3TXDN1

U3TXDP1

1

2

USB_GND

of

CT28

CT45 .1U_0402_16V7KCT45 .1U_0402_16V7K

2

1

B

5

place close to chip

+5VALW

EC setting: H/L

RA43

@

100K_0402_5%

EC_MUTE#

D D

To solve noise issue

MIC1_LINE1_R_L

Ext. Mic/LINE IN

MIC1_LINE1_R_R

C C

For EMI

RA17

4.7K_0402_5%

0.01U_0402_16V7K

B B

CA47 0.1U_0603_50V7KCA47 0.1U_0603_50V7K CA48 0.1U_0603_50V7KCA48 0.1U_0603_50V7K CA49 0.1U_0603_50V7KCA49 0.1U_0603_50V7K CA50 0.1U_0603_50V7KCA50 0.1U_0603_50V7K

RA18 10_0603_5%RA18 10_0603_5%

INT_MIC_DATA<18> INT_MIC_CLK<18>

+3VS

@

CA20

@

1 2 1 2 1 2 1 2

1 2

RA45

4.7K_0402_5%

1 2

RA36

0_0402_5%

RA39

0_0402_5%

12

AZ_RST_HD#

1

2

0_0402_5%

1 2

+3VS

RA19 0_0603_5%RA19 0_0603_5%

1 2

+3VS

RA1 0_0603_5%RA1 0_0603_5%

RA35

RA30

RA30 0_0402_5%

0_0402_5% @

@

RA38

0_0402_5%

RA37

RA37 0_0402_5%

0_0402_5% @

@

For EMI

RA41

KC FBMA-10-100505-301T_0402

AZ_RST_HD#<13>

10U_0603_6.3V6M

MIC1_LINE1_R_L MIC1_LINE1_R_R

1 2

CA12 100P_0402_50V8JCA12 100P_0402_50V8J

2

CA2

1

2

CA8

1

+MIC1_VREFO_L

0.1U_0402_16V4Z

CA9 1U_0402_6.3V4ZCA9 1U_0402_6.3V4Z

CA10 1U_0402_6.3V4ZCA10 1U_0402_6.3V4Z

CA15

2.2U_0603_6.3V4Z

CA1

CA7

12 12

CA214.7U_0603_6.3V6K CA214.7U_0603_6.3V6K CA224.7U_0603_6.3V6K CA224.7U_0603_6.3V6K

INT_MIC_CLK_R

AZ_RST_HD#

MONO_IN

SENSE_A

1 2

DGND

4

+DVDD_IO

1

+3VS_DVDD

2

35 mA

1

2

23 24

14 15

21 22

16 17

2 3

4

11

12

13 18 36 35 31 43

42 49

7

+PVDD1

JUMP_43X39

+PVDD2

CA61

1

DVDD

LINE1_L LINE1_R

LINE2_L LINE2_R

MIC1_L MIC1_R

MIC2_L MIC2_R

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

PD#

RESET#

PCBEEP

SENSE A SENSE B CBP CBN MIC1_VREFO_L PVSS2

PVSS1 DVSS2 DVSS1

ALC269Q-VB5-GR_QFN48_7X7

SA000028N40

9

DVDD_IO

46

PVDD139PVDD2

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SDATA_OUT

SDATA_IN

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

600 mA

2

JA1

2

1

@

place close to chip

1

0.1U_0402_16V4Z

+AVDD

2

68 mA

38

UA1

AVDD125AVDD2

10U_0603_6.3V6M

40 41

45 44

32 33

10

SYNC

6

BCLK

5 8

47

EAPD

48 20

29 30

28

AC_VREF

27

VREF

JDREF

CPVEE

AVSS1 AVSS2

19 34 26

37

AC_JDREF CPVEE

3

0.1U_0402_16V4Z

1

CA57

CA56

2

10U_0603_6.3V6M

2

CA5

CA4

CA3

1

0.1U_0402_16V4Z

SPKL+

SPKL-

SPKR+

SPKR-

AZ_SDIN0_HD_R

CA14 2.2U_0603_6.3V4ZCA14 2.2U_0603_6.3V4Z

RA6 33_0402_5%RA6 33_0402_5%

RA9 20K_0402_1%RA9 20K_0402_1%

1 2

AGND

RA2

1 2

0_0603_5%

2

10U_0603_6.3V6M

1

RA11

1 2

0_0603_5%

0.1U_0402_16V4Z

1

CA6

2

RA4 75_0402_1%RA4 75_0402_1% RA5 75_0402_1%RA5 75_0402_1%

+MIC1_VREFO_R

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z CA44

CA44

@

1

2

place close to chip

12

CA23

CA17

0.1U_0402_16V4Z

place close to chip

1

2

10U_0805_10V4Z

RA3

1 2

0_0603_5%

HP_L <28> HP_R <28>

AZ_SYNC_HD <13>

AZ_BITCLK_HD <13>

AZ_SDOUT_HD <13>

AZ_SDIN0_HD <13>EC_MUTE#<29>

12

10U_0603_6.3V6M

1

CA16

2.2U_0603_6.3V6K

2

@

2

1

placement near Audio Codec

LA16

+5VALW

1

CA43

2

+5VALW

EC Beep

EC_BEEP#<29>

SPKL+

SPKL-

SPKR+

SPKR-

PCI Beep

FCH_SPKR<13>

LA16

0_0603_1%

LA15

0_0603_1%

LA17

0_0603_1%

LA14

0_0603_1%

4.7K_0402_5%

12

2

CA28

10U_0603_6.3V6M

1 2

CA33

10U_0603_6.3V6M

1

12

2

CA32

10U_0603_6.3V6M

1 2

CA29

10U_0603_6.3V6M

1

12

RA7

1 2

47K_0402_5%

RA8

1 2

47K_0402_5%

RA12

@

2

1

2

1

Beep sound

CA13

1 2

0.1U_0402_16V4Z

100P_0402_50V8J

1 2

SPK_L1

CA30

CA30 1U_0402_6.3V4Z

1U_0402_6.3V4Z @

@

SPK_L2

SPK_R1

CA31

CA31 1U_0402_6.3V4Z

1U_0402_6.3V4Z @

@

SPK_R2

MONO_IN

CA18

SPK_L1 <28>

SPK_L2 <28>

SPK_R1 <28>

SPK_R2 <28>

For A51 demand

Ext.MIC/LINE IN JACK

RA33

MIC1_LINE1_R_R

MIC1_LINE1_R_L

RA33

1K_0402_5%

RA32

MIC_SENSE

QA1A

2N7002DW-T/R7_SOT363-6

12

RA31 2.2K_0402_5%RA31 2.2K_0402_5%

12

RA29 2.2K_0402_5%RA29 2.2K_0402_5%

61

RA28 100K_0402_5%RA28 100K_0402_5%

2

+MIC1_VREFO_R

MIC1_R <28>

MIC1_L <28>

+MIC1_VREFO_L

Sense Pin Impedance

39.2K

SENSE A

A A

20K 10K

5.1K

39.2K 20K 10K

5

Codec Signals

PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17)SENSE B PORT-H (PIN 20)

Function

Headphone out Ext. MIC

RA34 100K_0402_5%RA34 100K_0402_5%

+3VL

RA42 100K_0402_5%

place close to chip

MIC_SENSE SENSE_A

NBA_PLUG<28>

4

RA10 20K_0402_1%RA10 20K_0402_1%

RA21 39.2K_0402_1%RA21 39.2K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

Compal Secret Data

2011/01/11 2011/11/11

3

Compal Secret Data

Deciphered Date

EC

2

+3VALW

SM_SENSE#<29>

@

3

QA1B

2N7002DW-T/R7_SOT363-6

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Monday, May 09, 2011

5

4

SCHEMATIC MB A7571

SCHEMATIC MB A7571 4019D7

4019D7

1

BACK_SENSE <28>

27 41

B

of

HeadPhone/LINE Out JACK

JLINE

5

NBA_PLUG<27>

HP_R<27> HP_L<27>

LA6

1 2

KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA7

LA7

1 2

KC FBM-L11-160808-121LMT 0603

1

DA6 PJDLC05_SOT23-3

PJDLC05_SOT23-3

HP_R_L HP_L_L

3 2

@DA6

@

CA45

100P_0402_50V8J

CA46

100P_0402_50V8J

1

CA11

@CA11

@

2

0.1U_0402_16V4Z

For EMI

4 3

6 2 1

FOX_JA6333L-B3T0-7F

FOX_JA6333L-B3T0-7F @

@

Keyboard LED

R587

R587 10K_0402_5%

10K_0402_5% KBL@

KBL@

KB_LED<29>

2

G

+5VS

12

13

D

KBL@

S

Q38

KBL@

AO3413_SOT23-3

D

S

D

S

13

G

2

0.1U_0402_16V4Z

Q51

Q51 2N7002_SOT23-3

2N7002_SOT23-3

JKBL

@ JKBL

@

4

+5VS_LED

1

C836

KBL@C836

KBL@

2

6

GND

5

GND

ACES_85201-04051

4 3 2 1

+5VS_LED

3 2 1

Ext.MIC/LINE IN JACK

BACK_SENSE<27>

LA8

MIC1_R<27> MIC1_L<27>

1 2

KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA9

LA9

1 2

KC FBM-L11-160808-121LMT 0603

1

DA7

@DA7

@

PJDLC05_SOT23-3

Speaker Connector

MIC1_L_R MIC1_L_L

3 2

1

SPK_L1<27> SPK_L2<27>

SPK_R1<27> SPK_R2<27>

1

Need to update symbol

CA41

100P_0402_50V8J

DA8 PJDLC05_SOT23-3DA8 PJDLC05_SOT23-3

PJDLC05_SOT23-3

DA11

3 2

CA42

100P_0402_50V8J

1

CA19

2

0.1U_0402_16V4Z

For EMI

+5VL

@CA19

@

JSPKL

1

NC1

2

NC2

ACES_85204-0200N

ACES_85204-0200N @

@

JSPKR

1

NC1

2

NC2

ACES_85204-0200N

ACES_85204-0200N @

@

KEYBOARD CONN.

Notice: KB Connector Pin Definition Reversed with KB Membrane Pin Definition

RA40

4.7K_0402_5%

JEXMIC

5 4 3

6 2 1

FOX_JA6333L-B3T0-7F

FOX_JA6333L-B3T0-7F @

@

3 4

Security Classification

2011/01/11 2011/11/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

Compal Secret Data

KSI[0..7]

KSO[0..15]

JKB

34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

ACES_88170-3400

@

Deciphered Date

KSI[0..7] <22,29>

KSO[0..15] <22,29>

JKB34

JKB29 KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 JKB4

CAPS_LED# NUM_LED#

1 2

R372 300_0402_5%R372 300_0402_5%

1 2

R374 300_0402_5%R374 300_0402_5%

R376 300_0402_5%R376 300_0402_5%

12

please close to JKB

KSO2 KSO1 KSO0 KSO4 KSO3 KSO5

KSO14

+3VS

CAPS_LED# <29> NUM_LED# <29>

Title

Size Document Number Rev

Date: Sheet

KSO6 KSO7

KSO13

KSO8

KSO9 KSO10 KSO11 KSO12 KSO15

KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1

CAPS_LED#

NUM_LED#

Compal Electronics, Inc.

4019D7

Monday, May 09, 2011

1 2

C404 100P_0402_50V8JC404 100P_0402_50V8J

1 2

C405 100P_0402_50V8JC405 100P_0402_50V8J

1 2

C406 100P_0402_50V8JC406 100P_0402_50V8J

1 2

C407 100P_0402_50V8JC407 100P_0402_50V8J

1 2

C408 100P_0402_50V8JC408 100P_0402_50V8J

1 2

C409 100P_0402_50V8JC409 100P_0402_50V8J

1 2

C410 100P_0402_50V8JC410 100P_0402_50V8J

1 2

C411 100P_0402_50V8JC411 100P_0402_50V8J

1 2

C412 100P_0402_50V8JC412 100P_0402_50V8J

1 2

C413 100P_0402_50V8JC413 100P_0402_50V8J

1 2

C415 100P_0402_50V8JC415 100P_0402_50V8J

1 2

C416 100P_0402_50V8JC416 100P_0402_50V8J

1 2

C417 100P_0402_50V8JC417 100P_0402_50V8J

1 2

C418 100P_0402_50V8JC418 100P_0402_50V8J

1 2

C419 100P_0402_50V8JC419 100P_0402_50V8J

1 2

C420 100P_0402_50V8JC420 100P_0402_50V8J

1 2

C421 100P_0402_50V8JC421 100P_0402_50V8J

1 2

C422 100P_0402_50V8JC422 100P_0402_50V8J

1 2

C423 100P_0402_50V8JC423 100P_0402_50V8J

1 2

C424 100P_0402_50V8JC424 100P_0402_50V8J

1 2

C425 100P_0402_50V8JC425 100P_0402_50V8J

1 2

C427 100P_0402_50V8JC427 100P_0402_50V8J

1 2

C429 100P_0402_50V8JC429 100P_0402_50V8J

1 2

C431 100P_0402_50V8JC431 100P_0402_50V8J

1 2

C433 100P_0402_50V8JC433 100P_0402_50V8J

1 2

C435 100P_0402_50V8JC435 100P_0402_50V8J

SCHEMATIC MB A7571

28 41

B

of

5

For EMI

CLK_PCI_EC

12

R377

10_0402_5%

@

1

C443

22P_0402_50V8J

@

R378

R378 47K_0402_5%

47K_0402_5%

12

2

ECRST#

12

D D

+3VL

C444 0.1U_0402_16V4ZC444 0.1U_0402_16V4Z

For EMI

LPC_RST#

2

C447

C447 100P_0402_50V8J

100P_0402_50V8J

1

RP7

EC_SMB_CK1

+3VL

C C

+3VS

1 8

EC_SMB_DA1

2 7

EC_SMB_CK2

3 6

EC_SMB_DA2

4 5

2.2K_0804_8P4R_5%

@

1 2

C820 180P_0402_50V8J

SUSP#

0.1U_0402_16V4Z

KSI[0..7]<22,28>

KSO[0..15]<22,28>

Close to EC

USB_CHG_EN#<23,26>

1 2

R342 100K_0402_5%R342 100K_0402_5%

B B

E51_TXD

1 2

0_0402_5%

KB9012@

1 2

R1443 0_0402_5%

RTC_CLK<12,15>

C436

R1442

0.1U_0402_16V4Z

1

2

GATEA20<13>

KB_RST#<13>

SERIRQ<12>

LPC_FRAME#<12,30>

LPC_AD3<12,30> LPC_AD2<12,30> LPC_AD1<12,30> LPC_AD0<12,30>

CLK_PCI_EC<12,15>

LPC_RST#<12,30> EC_SCI#<13>

HDPLOCK<30>

KSI[0..7] KSO[0..15]

EC_SMB_CK1<20,34> EC_SMB_DA1<20,34> EC_SMB_CK2<9,30> EC_SMB_DA2<9,30>

EC_SMI#<13> ESB_CK<22>

ESB_DAT<22>

INVT_PWM<18>

FAN_SPEED1<5>

SM_SENSE#<27>

E51_TXD<23,30>

E51_RXD<23,30>

PWR_SUSP_LED#<31>

NUM_LED#<28>

R990 0_0402_5%

SLP_S3#<13> SLP_S5#<13>

1

2

C437

KB930@

0.1U_0402_16V4Z

1

C438

2

0.1U_0402_16V4Z

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC LPC_RST# ECRST# EC_SCI# HDPLOCK

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

SLP_S3# SLP_S5# EC_SMI# USB_CHG_EN#_R ESB_CK ESB_DAT HDPINT_RRHDPINT HDPINT_R INVT_PWM FAN_SPEED1 SM_SENSE# E51_TXD E51_RXD ON/OFFBTN#_R PWR_SUSP_LED# NUM_LED#

100K_0402_5%

KB930@

For KB930 and KB9012

KB930@

ON/OFFBTN#<31>

USB_OC1#<13,23,26>

A A

1 2

R419 0_0402_5%

1 2

R424 0_0402_5%

1 2

R426 0_0402_5%

1 2

R429 0_0402_5%

5

KB9012@

KB930@

KB9012@

ON/OFFBTN#_R

USB_OC1#_R

R266

CRY1 CRY2

1

2

C439

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8

KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

4

2

C440

1

1000P_0402_50V7K

1 2 3 4 5 7 8

10 12

13 37 20 38

KSI0

55

KSI1

56

KSI2

57

KSI3

58

KSI4

59

KSI5

60

KSI6

61

KSI7

62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

12

1

C1206

C1206 20P_0402_50V8J

20P_0402_50V8J

2

KB930@

4

+3VL

2

C441

C441 1000P_0402_50V7K

1000P_0402_50V7K

1

U19

GATEA20/GPIO00 KBRST#/GPIO01 SERIRQ# LPC_FRAME#/LFRAME# LPC_AD3/LAD3 LPC_AD2/LAD2 LPC_AD1/LAD1 LPC_AD0/LAD0

CLK_PCI_EC/PCICLK PCIRST#/GPIO05 EC_RST#/ECRST# EC_SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

EC_SMB_CK1/SCL0/GPIO44 EC_SMB_DA1/SDA0/GPIO45 EC_SMB_CK2/SCL1/GPIO46 EC_SMB_DA2/SDA1/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 GPIO0A GPIO0B GPIO0C SUS_PWR_DN_ACK/GPIO0D INVT_PWM/PWM2/GPIO11 FAN_SPEED1/FANFB0/GPIO14 FANFB1/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A

XCLK1 XCLK0

LPC & MISC

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

KB930: SA00003QQ10 KB9012: SA00004OB00

1

@

C449

18P_0402_50V8J

2

32.768KHZ_12.5PF_Q13MC14610002

9

22

33

96

111

125

VCC

PWM Output

DA Output

PS2 Interface

SPI Device I/F

SPI Flash ROM

GPIO

GPI

GND

11

24

35

94

113

R389

1 2

10M_0402_5%

@

1

OSC4OSC

NC3NC

2

+3VL

C442

1 2

0.1U_0402_16V4Z

67

VCC

AVCC

PWM0/GPIO0F

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

ACOFF/FANPWM1/GPIO13

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD3/GPI3B

AD Input

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B

CAP_INT#/PSCLK2/GPIO4C

TP_DATA/PSDAT3/GPIO4F

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

GPO

GND

Y4

@

AD4/GPI42 AD5/GPI43

DAC_BRIG/DA0/GPO3C EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

DA3/GPO3F

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

SDICS#/GPXIOA00

LID_SW#/GPXIOD00

SPIDI/MISO

SPIDO/MOSI

SPICLK/GPIO58

H_PECI/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

PWR_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

RF_OFF#/GPXIOA09

GPXIOA10 GPXIOA11

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

EAPD/GPXIOD03

EC_THERM#/GPXIOD04

SUSP#/GPXIOD05

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

AGND

KB930QF-A1_LQFP128_14X14

69

CRY2CRY1

1

@

@ C450

C450

18P_0402_50V8J

2

3

KB930@

KB_LED

21

EC_BEEP#

23

FANPWM

26

ACOFF

27

BATT_TEMPA

63 64

ADP_I

65

ADP_V

66 75

HDPACT

76

68 70

IREF

71

CHGVADJ

72

EC_MUTE#

83

USB_EN#

84

CAP_INT#

85

H_PROCHOT#

86

TP_CLK

87

TP_DATA

88

VGATE

97

WOL_EN

98 99

LID_SW#_R

109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120 126 128

SPICS#

CIR_IN_R

73

GPIO40

V18R

U19

U19 KB9012QF

KB9012QF KB9012@

KB9012@

USB_OC0#_R

74

FSTCHG

89

BATT_FULL_LED#

90

CAPS_LED#

91

BATT_CHG_LOW_LED#

92

PWR_ON_LED#

93

SYSON

95

VR_ON

121

ACIN_R

127

EC_RSMRST#

100

EC_LID_OUT#

101

EC_ON_R

102

TP_LED

103

FCH_PWRGD_R

104

BKOFF#

105 106

CAP_RST#

107 108

CEC_INT#_R

110

EC_ENBKL_R

112

USB_OC1#_R

114

LID_SW#_RR

115

SUSP#

116

PBTN_OUT#

117

USB_OC0#_RR

118

+EC_V18R

124

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

KB_LED <28> EC_BEEP# <27> FANPWM <5> ACOFF <35>

BATT_TEMPA <34> ADP_I <34,35>

ADP_V <35>

HDPACT <30>

IREF <35>

CHGVADJ <35>

EC_MUTE# <27> USB_EN# <21>

CAP_INT# <22>

H_PROCHOT# <7,34,39>

TP_CLK <22>

TP_DATA <22>

VGATE <39>

WOL_EN <24>

EC_SI_SPI_SO <30>

EC_SO_SPI_SI <30> SPI_CLK <30> SPI_CS# <30>

For KB9012 use

FSTCHG <35> BATT_FULL_LED# <31> CAPS_LED# <28>

PWR_ON_LED# <31> SYSON <26,32,37> VR_ON <32,38,39>

EC_RSMRST# <13> EC_LID_OUT# <13>

TP_LED <22>

BKOFF# <18>

CAP_RST# <22>

SUSP# <32> PBTN_OUT# <13>

C448

4.7U_0805_10V4Z

BATT_CHG_LOW_LED# <31>

Compal Secret Data

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

2

BATT_TEMPA ACIN_D

CEC_INT#

CAP_INT#

TP_CLK TP_DATA

SUSP# VR_ON SYSON

For KB930 and KB9012

CEC_INT#_R

For KB930 and KB9012

USB_OC0#_R

USB_OC0#_RR

EC_ON_R

EC_ENBKL_R

HDPINT_R

LID_SW#_R

LID_SW#_RR

FCH_PWRGD_R

CIR_IN_R

2

1 2

C445 100P_0402_50V8JC445 100P_0402_50V8J

1 2

C446 100P_0402_50V8JC446 100P_0402_50V8J

12

R53 100K_0402_5%R53 100K_0402_5%

@

1 2

R172 4.7K_0402_5%

1 2

R379 4.7K_0402_5%R379 4.7K_0402_5%

1 2

R381 4.7K_0402_5%R381 4.7K_0402_5%

R423 10K_0402_5%R423 10K_0402_5% R462 10K_0402_5%R462 10K_0402_5% R56 4.7K_0402_5%R56 4.7K_0402_5%

12 12

1 2

R341 330K_0402_5%R341 330K_0402_5%

+3VL

KB930@

1 2

R430 0_0402_5%

KB9012@

1 2

R431 0_0402_5%

KB930@

1 2

R433 0_0402_5%

KB9012@

1 2

R362 0_0402_5%

KB930@

1 2

R359 0_0402_5%

KB9012@

1 2

R375 0_0402_5%

KB930@

1 2

R380 0_0402_5%

KB9012@

1 2

R382 0_0402_5%

KB930@

1 2

R384 0_0402_5%

KB9012@

1 2

R386 0_0402_5%

KB930@

1 2

R390 0_0402_5%

KB930@

1 2

R392 0_0402_5%

KB9012@

1 2

R391 0_0402_5%

KB930@

1 2

R397 0_0402_5%

KB9012@

1 2

R398 0_0402_5%

1 2

1

+3VL

+5VS

D21

ACIN_DACIN_R

D21

2 1

RB751V40_SC76-2

CEC_INT#

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

4019D7

Monday, May 09, 2011

ACIN <13,31,35>

CEC_INT# <20>

USB_OC0# <13,21>

EC_ON <31>

EC_ENBKL <18>

HDPINT <30>

LID_SW# <30>

FCH_PWRGD <13>

SCHEMATIC MB A7571

29 41

1

29 41

of

B

SPI Flash (128KB)

+3VL

20mils

1

C451

0.1U_0402_16V4Z

SPI_CS#<29>

SPI_CLK<29>

EC_SO_SPI_SI

29>

KB930@

2

SPI_CLK

reserve for EMI, close to U22

SA00003FL10

U22

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

W25X10BVSNIG_SO8

R394

@R394

@

1 2

33_0402_5%

KB930@U22

KB930@

4

VSS

2

Q

@

1 2

C454 10P_0402_50V8J

EC_SI_SPI_SO <29>

Lid SW

U21

U21 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD2VOUT

1

C453

0.1U_0402_16V4Z

2

3

GND

1

10P_0402_50V8J

C452

+3VL

12

1

2

R383

R383 47K_0402_5%

47K_0402_5%

LID_SW# <29>

LPC / UART Debug Port

Please place JDB under DDR DIMM.

18 17

ACES_88512-1641

G18 G17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

JDB

@

E51_RXD_DB E51_TXD_DB

CLK_PCI_DDR

1 2

R21 0_0402_5%R21 0_0402_5%

1 2

R22 0_0402_5%R22 0_0402_5%

LPC_RST# <12,29> CLK_PCI_DDR <12,15> LPC_AD0 <12,29> LPC_AD1 <12,29> LPC_AD2 <12,29>

LPC_AD3 <12,29> +3VS +3VALW

LPC_FRAME# <12,29>

C457

1 2

22P_0402_50V8J

E51_RXD <23,29>

E51_TXD <23,29>

R393

1 2

22_0402_5%

For EMI

CLK_PCI_DDR

G-Sensor

+5VS +3VS_HDP

2

CG12

1U_0402_6.3V4Z

1

RG2

@RG2

@

12

0_0603_5%

0_0603_5% DG1 RB751V40_SC76-2DG1 RB751V40_SC76-2

UG3

1

VIN

2

GND

3

SHDN#

G9191-330T1U_SOT23-5

21

VOUT

BP

+3VS_HDP+3VS

CG13

5

CG14

4

@

0.22U_0402_10V4Z

2

1U_0402_6.3V4Z

1

12

HDPINT<29>

+3VS_HDP

SELF_TEST

EC_SMB_CK2<9,29>

HDPINT

UG1

2

Vdd1

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH352TR LGA 16P

RG3

RG4

RG5

RG6

4.7K_0402_5%

4.7K_0402_5% RG7

RG7 1K_0402_5%

1K_0402_5%

0.1U_0402_16V4Z

SA00004GB00

Voutx Vouty Voutz

NC1 NC2 NC3 NC4 NC5

GND1 GND2

SELF_TEST

12

4.7K_0402_5%

4.7K_0402_5% GXOUT

12

4.7K_0402_5%

GXIN

12

4.7K_0402_5%

12

1

CG8

CG7

2

0.1U_0402_16V4Z

VOUTX

CG1 0.033U_0402_16V7KCG1 0.033U_0402_16V7K

3

VOUTY

5

VOUTZ

7 10

11 14 15 16

1 13

1 2

CG2 0.033U_0402_16V7KCG2 0.033U_0402_16V7K

1 2

CG3 0.033U_0402_16V7KCG3 0.033U_0402_16V7K

1 2

SA00003A600 Supports ODD unexpected tray eject prevention

UG2

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D34SP_LSSOP20

P1_6/CLK0/SSI01

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

P1_4/TXD0

P4_2/VREF

11

12

13

14

15

16

17

18

19

20

VOUTZ

VOUTX

VOUTY

RG9

RG9 47K_0402_5%

47K_0402_5%

1 2

HDPACT <29>

HDPLOCK <29>

RG10 47K_0402_5%RG10 47K_0402_5%

12

+3VS_HDP

1

CG6

0.1U_0402_16V4Z

2

EC_SMB_DA2 <9,29>

Security Classification

2011/01/11 2011/11/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

Monday, May 09, 2011

of

30 41

of

30 41

of

30 41

B

5

4

3

2

1

Power Button

SW2

@ SW2

@

D D

TOP side

BTM side

1 2

SW3

@ SW3

@

1 2

SMT1-05-A_4P

5

6

SMT1-05-A_4P

5

6

+3VL

3 4

3

For EMI request

4

R395

R395 100K_0402_5%

100K_0402_5%

1 2

1

C458

0.1U_0402_25V6

0.1U_0402_25V6 @

@

2

ON/OFFBTN# <29>

EC_ON<29>

10K_0402_5%

R396

61

2

another at page 23

1 2

51_ON# <33>

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q61A

Q61A

WL/BT LEDDC-IN LED

C C

+5VALW

R110

1 2

390_0402_5%

D22

2 1

HT-F196BP5_WHITE

5

3

4

2N7002DW-T/R7_SOT363-6

Q32B

another at page 12

BATT CHARGE/FULL LED

D24

R104

1 2

390_0402_5%

+5VALW

B B

390_0402_5%

R120

1 2

510_0402_5%

D24

2 1

HT-F196BP5_WHITE

D23

2 1

HT-191UD5_AMBER_0603

POWER/SUSPEND LED

+5VALW

47K

Q43

10K

2

D11

PDTA114YT PNP SOT23-3

1 3

1 2

R518 390_0402_5%R518 390_0402_5%

1 2

R554 390_0402_5%R554 390_0402_5%

A A

+5VALW

POWER_ON_LED

R770

1 2

510_0402_5%

D11

2 1

HT-F196BP5_WHITE

2 1

HT-191UD5_AMBER_0603

5

D20

PWR_ON_LED# <29>

ACIN <13,29,35>

BATT_FULL_LED# <29>

BATT_CHG_LOW_LED# <29>

PWR_SUSP_LED# <29>

+5VS

WiMAX/3G LED

1 2

+5VS

R778 390_0402_5%R778 390_0402_5%

HDD LED

12

R132

390_0402_5%

21

D10

HT-F196BP5_WHITE

4

1 2

R403 510_0402_5%R403 510_0402_5%

2 1

HDD_LED#

PWR/B Conn

JPOWER

1

2

3

4

5

G1

6

G2

ACES_85201-0405N

@

POWER_ON_LED

ON/OFFBTN#

For EMI request

@

1 2

C479 0.1U_0402_16V4Z

2

3

D83

D83 PJSOT05C_SOT23-3

PJSOT05C_SOT23-3

1

ISPD

PJP1

DC-IN

DC301009V00

PJP1

PJP1 45@

45@

U1

SA000043I60

FCH

218-0755022 A13 HUDSON-M3

ZZZ

HUDM3R1@U1

HUDM3R1@

PCB DAZ0K500100

PCB LA-7571P

Screw Hole

H14

H15

H21

H23

H_4P2

H_4P2 @

@

H_1P2

H_1P2 @

@

H_1P2

H_1P2 @

@

1

H_3P0

1

@

H_2P7N

1

@

H6

1

@

H_3P8

H_3P8 @

@

H2

1

H9

1

H13

1

FD3@FD3

1

2

H21

1

H24

1

H_4P7

H_4P7 @

@

H_1P2

H_1P2 @

@

H_1P2

H_1P2 @

@

H_3P0

H_3P0 @

@

H_3P0

H_3P0 @

@

H7

FD4@FD4

D26

2 1

HT-191UD5_AMBER_0603

3G_LED_GND

R819

+3VS

D75

3G_LED_GND

HT-F194NB5_BLUE_0603

+3VS+5VS

R404

10K_0402_5%

3

Q7B 2N7002DW-T/R7_SOT363-6Q7B 2N7002DW-T/R7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R819

10K_0402_5%

1 2

6 1

5

Q7A

Q7A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

3

2

WL_BT_LED# <14>

@

@ R506

R506

1 2

0_0402_5%

6 1

12

Q8A

5

2N7002DW-T/R7_SOT363-6

4

Q8B 2N7002DW-T/R7_SOT363-6Q8B 2N7002DW-T/R7_SOT363-6

2

LED_3G# <23>

SATA_LED# <14>

CPU

WLAN

H22

H30

1

H_3P0

H_3P0 @

@

H_3P0

H_3P0 @

@

H_3P8

H_3P8 @

@

H1

H8

H12

1

PCB Fedical Mark PAD

FD2@FD2

FD1@FD1

@

1

Compal Secret Data

2011/01/11 2011/11/11

3

Compal Secret Data

Deciphered Date

H17

H25

H_2P8X3P8N

1

@

H3

H_4P2X4P7

1

@

FAN

3GJET

1

C392 0.1U_0402_16V4ZC392 0.1U_0402_16V4Z

+5VALW

H18

H19

H_3P0

1

@

H_2P7X3P7N

1

@

H4

1

H33

1

H10

1

H_4P2X4P7

H_4P2X4P7 @

@

H_3P8

H_3P8 @

@

H_1P2

H_1P2 @

@

1

@

H26

H_2P7N

1

@

H16

H_3P0

1

@

H11

H_1P2

1

@

Title

Size Document Number Rev

Monday, May 09, 2011

Date: Sheet

+3VS +5VS

H_3P0

H_3P0 @

@

For ESD's request C392 close to C465. C393 close to H22. C394 close to H6. C395 close to H21

+5VALW

+5VS

For ESD's request on 3/22(PVT) C396 close to JCRT. C397 close to JUSB30. C398 close to JUBS30. C399 close to H22. C426 close to D22

+1.5VS

+5VS

+5VALW

For ESD's request on 3/24(PVT) C400 close to D84. C401 close to R143. C402 close to C355.

+3VS

For EMI's request on 4/26 C403 close to L33. C414 close to R344

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

12

C393 0.1U_0402_16V4ZC393 0.1U_0402_16V4Z

12

C394 0.1U_0402_16V4ZC394 0.1U_0402_16V4Z

12

C395 0.1U_0402_16V4ZC395 0.1U_0402_16V4Z

12

C399 0.1U_0402_16V4ZC399 0.1U_0402_16V4Z

1 2

C396 0.1U_0402_16V4ZC396 0.1U_0402_16V4Z

12

C397 0.1U_0402_16V4ZC397 0.1U_0402_16V4Z

12

C398 0.1U_0402_16V4ZC398 0.1U_0402_16V4Z

12

C426 0.1U_0402_16V4ZC426 0.1U_0402_16V4Z

12

C400 0.1U_0402_16V4ZC400 0.1U_0402_16V4Z

12

C401 0.1U_0402_16V4Z

12

@

C402 0.1U_0402_16V4Z

@

12

@

C403

12

C414

12

1

0.1U_0402_16V4Z

of

31 41

of

31 41

of

31 41

B

A

+3VALW TO +3VS +5VALW TO +5VS

+3VALW +3VS

Q29

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

1 1

D

SI4800BDY_SO8

1

C465

2

4.7U_0805_10V4Z

0.022U_0402_25V7K

Vgs=10V,Id=9A,Rds=18.5mohm

1

C459

2

1U_0402_6.3V6K

1

12

C466

R412

R412 330K_0402_5%

330K_0402_5%

2

4.7U_0805_10V4Z

1

C460

2

R409

1 2

61

+VSB

47K_0402_5%

Q10A

SUSP SUSP SUSP

2

2N7002DW-T/R7_SOT363-6

R406

470_0805_5%

1 2 3

Q10B

5

4

B

C

D

E

+1.5V to +1.5VS

+5VALW

8 7 6 5

SI4800BDY_SO8

1

C467

2

4.7U_0805_10V4Z

Q30

1

S

D D D D

S S G

1U_0402_6.3V6K

2 3 4

1

C468

2

0.01U_0402_25V7K

12

+5VS

1

C461

2

R413

R413 200K_0402_5%

200K_0402_5% @

@

Vgs=10V,Id=9A,Rds=18.5mohm

4.7U_0805_10V4Z

1

C462

2

R407

R410

1 2

+VSB

47K_0402_5%

61

Q11A

2

2N7002DW-T/R7_SOT363-6

1 2 3

5

4

470_0805_5%

Q11B

2

C822

C822 @

@

1

0.1U_0402_16V4Z

+5VS

For EMI

2

C821

C821 @

@

1

0.1U_0402_16V4Z

Vgs=10V,Id=9A,Rds=18.5mohm

+1.5V

Q31

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C469

2

4.7U_0805_10V4Z

S S S G

C470

1 2 3 4

1

2

+1.5VS

1

C463

2

1U_0402_6.3V6K

0.1U_0402_25V6

12

R414

R414 820K_0402_5%

820K_0402_5%

4.7U_0805_10V4Z

1

C464

2

R411

1 2

+VSB

220K_0402_5%

61

Q12A

2

2N7002DW-T/R7_SOT363-6

5

R408

470_0805_5%

1 2 3

Q12B

4

+1.1VALW to +1.1VS

Vgs=10V,Id=14.5A,Rds=6mohm

+1.1VALW

Q44

8

D

7

D

6

D

5

D

FDS6676AS_SO8

SUSP#

+5VALW

1

C474

2

4.7U_0805_10V4Z

0_0402_5%

@

R436

0_0402_5%

@

R435

12

2 2

3 3

SUSP#

4 4

S S S G

C477

1 2 3 4

A

+1.1VS

C476

1U_0402_6.3V6K

1

2

0.1U_0402_25V6

@

0.01U_0402_25V7K

1

2

1

2

C519

1

C518

2

12

R416

R416 820K_0402_5%

820K_0402_5%

1

2

C520

0.01U_0402_25V7K

@

4.7U_0805_10V4Z

4.7U_0805_10V4Z C472

C472

R415

1 2

220K_0402_5%

61

Q209A

2N7002DW-T/R7_SOT363-6

@

2

+5VALW+3VALW

1

2

+VSB

1 2

R385 0_0402_5%R385 0_0402_5%

2

C200

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

1

Need to delay after +3VS ramp up

U24

1

MOS1_D

2

ON_MOS1

3

5_VDD

4

ON_MOS2

MOS2_D5MOS2_S

SLG59M232VTR_TDFN14-10_3X2

SA00004E900

MOS1_S

CAP_MOS1

CAP_MOS2

+1.1VS

R417

R417 470_0805_5%

470_0805_5%

1 2 3

Q209B

SUSPSUSP

Each 250pF on CAP_MOS1 (2) will make Slew Rate(uS/V) increase of 100uS/V

+5VS +3VS

@

10

9

8

GND

7

6

11

GND

B

Q209B

5

2N7002DW-T/R7_SOT363-6

4

1

C254

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

1

C253

C253 120P_0402_50V4Z

120P_0402_50V4Z @

@

2

C286

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

C255

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

+5VS_ODD

R457

R457 470_0805_5%

470_0805_5%

1 2 61

Q53A

2N7002DW-T/R7_SOT363-6

Discharge

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+5VS TO +5VS_ODD

+5VALW

ODD_PWR#

2

Q211B

2N7002DW-T/R7_SOT363-6

2011/01/11 2011/11/11

ODD_PWR<14>

SUSP<37>

SUSP#<29>

+1.2VS

R479

R479 470_0805_5%

470_0805_5%

1 2 3

100K_0402_5%

5

4

VR_ON<29,38,39>

Compal Secret Data

Deciphered Date

SUSP#

2

2N7002DW-T/R7_SOT363-6

5

2N7002DW-T/R7_SOT363-6

+5VALW

R422

R422 100K_0402_5%

100K_0402_5%

1 2

SUSP

61

Q6A

2

2N7002DW-T/R7_SOT363-6

+5VALW

R448

1 2 61

Q211A

D

R441

R441 100K_0402_5%

100K_0402_5%

1 2

ODD_PWR#

3

Q53B

4

+5VS

2

C471

0.1U_0402_16V7K

1

R440

1 2

47K_0402_5%

2N7002DW-T/R7_SOT363-6

2

C217

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

+0.75VS

R477

R477 470_0805_5%

470_0805_5%

1 2 3

Q6B

5

4

+1.5V

R478

R478 470_0805_5%

470_0805_5%

1 2 3

100K_0402_5%

Q210B

100K_0402_5%

SYSON#VR_ON#

5

4

SYSON<26,29,37>

Title

Size Document Number Rev

Date: Sheet

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

Q45

G

2

AO3413_SOT23

C679

@

SUSP

+5VALW

R432

2

2N7002DW-T/R7_SOT363-6

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

2

1

D

1 3

1

2

1 2 61

Q210A

E

PJ28

PJ28 JUMP_43X79

JUMP_43X79 @

@

1

C680

C680 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+5VS_ODD

32 41Monday, May 09, 2011

B

of

A

PL1

@

PJP1

1

+

2

+

3

1 1

2 2

-

4

-

SINGA_2DW-0005-B03

10A_125V_451010MRL

BATT+

51_ON#<31>

PF1

21

PD4

RLS4148_LL34-2

100K_0402_1%

PR11

1 2 22K_0402_1%

22K_0402_1%

DC_IN_S2 N3DC_IN_S1

12

PC1

1000P_0402_50V7K

12

PR10

12

PC2

100P_0402_50V8J

12

PC6

0.22U_0603_25V7K

12

N1

PL1

SMB3025500YA_2P

1 2

PC17

@

1000P_0402_50V7K

PQ4

TP0610K-T1-E3_SOT23-3

2

68_1206_5%

13

PR8

B

12

VIN

PC18

@

1000P_0402_50V7K

PD3

RLS4148_LL34-2

1 2

12

PR9

PR9 68_1206_5%

68_1206_5%

12

PC5

0.1U_0603_25V7K

12

PC3

1000P_0402_50V7K

C

1 2

PR1

@PR1

VIN

PD1

@PD1

@

RLS4148_LL34-2

PR4

@PR4

@

1 2

1

@PC16

@

PC16

12

LM393DG_SO8

12

PC4

100P_0402_50V8J

VIN

100K_0402_1%

VL

EN0<36> ACON<35>

100K_0402_1%

PD2

@PD2

@

RB715F_SOT323-3

2 3

1000P_0402_50V7K

VS

N1

8

PU2A

@PU2A

@

P

+

1

O

-

LM393DG_SO8

G

4

@ 1K_1206_5%

1K_1206_5%

1 2

@PR2

@ 1K_1206_5%

1K_1206_5%

1 2

@ PR3

@ 1K_1206_5%

1K_1206_5%

@ PR5

@

2.2M_0402_5%

N1

8

PU2B

@ PU2B

@

P

+

7

O

-

G

4

PC13

@PC13

@

1000P_0402_50V7K

3 2

PR2

PR3

PR5

5 6

12

PR6

@PR6

@

12

34K_0402_1%

PR7

@PR7

@

<35>

66.5K_0402_1%

SSM3K7002FU_SC70-3

12

6251VREF

PQ1

@

PQ1

@

12

PR36

@PR36

@ 150K_0402_1%

150K_0402_1%

13

D

S

2

G

D

12

PR38

@PR38

@ 511K_0402_1%

511K_0402_1%

12

PR35

@PR35

@ 255K_0402_1%

255K_0402_1%

47K_0402_1%

13

@PQ2

@ DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR39

@PR39

@

2

PQ2

B+

12

PC14

@PC14

@ 1000P_0402_50V7K

1000P_0402_50V7K

12

+5VALWP

PACIN <35>

PJ333

@ PJ333

@

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

3 3

VL

+VSBP +VSB

(120mA,40mils ,Via NO.= 1)

+2.5VSP +2.5VS

+0.75VSP

4 4

2

112

JUMP_43X39

PJ353

@ PJ353

@

2

112

JUMP_43X39

PJ72

@

2

112

JUMP_43X39

PJ252

@

2

112

JUMP_43X39

PJ76

@ PJ76

@

2

112

JUMP_43X79

(0.5A,40mils ,Via NO.= 1)

JUMP_43X79

A

+3VALWP

(5A,200mils ,Via NO.= 10) OCP=7.7A

+5VALWP

+5VL

(5A,200mils ,Via NO.= 10) OCP=7.9A

+1.1VALWP +1.1VALW

(5.3A,212mils ,Via NO.= 11) OCP=6.23A

+1.5VP

7.56A, 320mils ,Via NO.= 16) OCP=8.7A

+1.2VSP

+0.75VS

(6.5A,260mils ,Via NO.= 13) OCP=7.53A

@

PJ332

2

JUMP_43X118

PJ352

@ PJ352

@

2

JUMP_43X118

PJ112

@ PJ112

@

2

JUMP_43X118

@

PJ152

2

JUMP_43X118

PJ122

@ PJ122

@

2

JUMP_43X118

112

+3VALW

+5VALW

+1.5V

+1.2VS

RTC Battery

PR13

12

PR13

560_0603_5%

1 2

PBJ1

-+

MAXEL_ML1220T10@

SP093MX0000

PR17

560_0603_5%

1 2

+RTCBATT

ACIN

Precharge detector

Min. typ. Max. H-->L 14.42V 14.74V 15.23V L-->H 15.39V 15.88V 16.39V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/11 2011/11/11

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

Monday, May 09, 2011

D

of

33 41

of

33 41

of

33 41

B

A

B

C

D

1 1

@

PJP2

1

2

3

4

5

5 GND GND GND GND

6

7

8

9

10 11 12 13

SUYIN_200045MR009G171ZR

2 2

3 3

EC_SMCA

PR20

100_0402_1%

BATT_S1

BATT_P4 BATT_P5 EC_SMDA

1 2

1

2

3

PD5

PJSOT24C_SOT23-3

PR21

PR21 100_0402_1%

100_0402_1%

1 2

VL

PR25

100K_0402_1%

POK<36,38>

1 2

PR26

1 2

0_0402_5%

@ PC12

@

.1U_0402_16V7K

PC12

12

15A_65V_451015MRL

12

PJSOT24C_SOT23-3

2 3

12

PR19

1K_0402_1%

B+

2

G

PF2

21

PR14

PR14 1K_0402_1%

1K_0402_1%

PD6

1

6.49K_0402_1%

PR24

1 2

22K_0402_1%

13

D

PQ6

PQ6 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PR16

12

PR23

100K_0402_1%

VMB

12

PC15

@ PC15

@

.1U_0402_16V7K

TP0610K-T1-E3_SOT23-3

12

PC10

@

0.22U_0603_25V7K

12

PC7

1000P_0402_50V7K

+3VL

BATT_TEMPA <29>

EC_SMB_DA1 <20,29>

EC_SMB_CK1 <20,29>

PQ5

2

PL2

SMB3025500YA_2P

1 2

13

12

H_PROCHOT#<7,29,39>

SSM3K7002FU_SC70-3

PC11

@PC11

@

0.1U_0603_25V7K

12

PC8

0.01U_0402_25V7K

PQ7

+VSBP

BATT+

13

D

S

+3VS

PR29

100K_0402_1%

2

G

PH1 under CPU botten side :

CPU thermal protection at 90 degree C Recovery at 56 degree C

Rset = 3 * Rtmh Rhyst = (Rset* Rtml) / (3*Rtml - Rset)

Rtmh at 90C = 7.87K, Rtml at 56C = 26.1K Rset = 3 * 7.87K = 23.61K ==> 23.7K Rhyst = (23.7K * 26.1K) / (3 * 26.1K - 23.7K) = 11.33K ==> 11.3K

VL

12

PC9

0.1U_0603_25V7K

PU1

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

Throttle Watt

Adapter

VS_ON<36>

CPSETIN

no use

1 2

65W_UMA 71.8W

TMSNS1

RHYST1

TMSNS2

RHYST2

11.3K_0402_1%

8 7 6

1 2

5

1.18K_0402_1%

62.45W 1.504V 1.308V

PR28

PR18

12

PR15

23.7K_0402_1%

12

1 2

Throttle Point Recovery PointRecovery Watt

ADP_I <29,35>

PR22

PR22 180_0402_1%

180_0402_1%

PR27

PR27 10K_0402_1%

10K_0402_1%

12

PH1

PH1 100K_0402_1%_ERTJ0ER104F

100K_0402_1%_ERTJ0ER104F

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/11 2011/11/11

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

Monday, May 09, 2011

D

of

34 41

of

34 41

of

34 41

B

A

PQ203

AO4435L_SO8

VIN

1 1

12

PR210

47K_0402_1%

DTA144EUA_SC70-3

2

61

D

2

G

2 2

PQ212A

S

DMN66D0LDW-7_SOT363-6

SB00000EO00

PACIN<33>

ACON<33>

ACOFF<29>

8 7

5

PQ210

2

13

PQ211

PQ211 DTC115EUA_SC70-3

DTC115EUA_SC70-3

DMN66D0LDW-7_SOT363-6

PR211

22K_0402_5%

1 2

PQ213

DTC115EUA_SC70-3

ACOFF

4

1 3

2

P2 P3

1 2 36

12

PC210

0.1U_0603_25V7K

12

PQ212B

34

D

5

G

S

13

PQ204

AO4409L_SO8

AO4409L_SO8 1 2 3 6

4

PR212

PR212 200K_0402_1%

200K_0402_1%

PR213

PR213 150K_0402_1%

150K_0402_1%

ADP_I<29,34>

IREF<29>

FSTCHG<29>

8 7

5

1 2

0.01U_0402_25V7K

PR220

154K_0402_1%

PR221

120K_0402_1%

PC211

PC211 5600P_0402_25V7K

5600P_0402_25V7K

PC214

1 2

PC215

1 2

.1U_0402_16V7K

12

PC216

PR216

10K_0402_1%

1 2 10K_0402_1%

10K_0402_1%

12

B

PR215

0.02_2512_1%

1 2

ACSETIN

12

PR217

100K_0402_1%

PR218

2.39V

6251VREF<33>

PR222

6251VREF 6251aclim

1 2

75K_0402_1%

0.01U_0402_25V7K

0.01U_0402_25V7K 20K_0402_1%

20K_0402_1%

4 3

PC212

12

PC213

1 2

6800P_0402_25V7K

PR219

1 2 100_0402_1%

100_0402_1%

12

PR223

2.2U_0603_6.3V6K

6251_EN CSON

@

PC207

B+

10U_1206_25V6M

LDO 5.075V

6251VDD

RB751V-40_SOD323-2

12

PU200

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

@

12

PC209

PC208

10U_1206_25V6M

PD201

PR227

10_1206_5%

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

ISL6251AHAZ-T_QSOP24

12

10U_1206_25V6M

VIN

1 2 12

DCIN

24

0.1U_0603_25V7K

23

22

21

20

PC220

0.1U_0603_25V7K

19

1 2

LX_CHG

18

DH_CHG

17

BST_CHG

16

6251VDDP

15

DL_CHG

14

13

PL201

1UH_PH041H-1R0MS_3.8A_20%

12

PR226

PR226 191K_0402_1%

191K_0402_1%

ACSETIN

12

1.26V

PR228

14.3K_0402_1%

PC217

1000P_0402_50V7K

PC218

12

ACPRN

PR229 20_0402_5%PR229 20_0402_5%

1 2

PC219

0.047U_0402_16V7K

0.047U_0402_16V7K 1 2

1 2

PR230

20_0402_5%

12

PR231

PR231 20_0402_5%

20_0402_5%

1 2

PR205

0_0603_5%

1 2

PC221

4.7U_0603_6.3V6M

BST_CHGA

12

PR233 4.7_0603_5%PR233 4.7_0603_5%

1 2

C

12

CSIN

CSIP

PR232

PR232 2_0402_5%

2_0402_5%

PC205

0.1U_0603_25V7K

PD202

PD202 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

6251VDD

12

PC231

4.7U_0805_25V6-K

CSOP

12

PC232

PC233

4.7U_0805_25V6-K

PQ202

AO4466L_SO8

CHG_B+

12

4.7U_0805_25V6-K

6

578

4

6

578

4

12

PC224

0.1U_0402_25V6

PQ215

DTC115EUA_SC70-3

123

PQ215

PQ201

PQ201 AO4466L_SO8

AO4466L_SO8

PL202

10UH_MMD-10DZ-100M-X1_6A_20%

PL202

1 2

12

PR206

4.7_1206_5%

12

PC206

680P_0603_50V7K

PR237

47K_0402_1%

1 2 13

AO4435L_SO8

AO4435L_SO8 1 2 3 6

1 2

200K_0402_1%

DA2J10100L_SOD323-2

2

DA2J10100L_SOD323-2

PR235

CHGCHG

1 2

0.02_1206_1%

D

PQ208

4

PR236

PD9

21

PD10

21

SSM3K7002FU_SC70-3

4 3

8 7

5

ACOFF

12

PC222

0.1U_0402_25V6

PACIN

PC202

10U_1206_25V6M

VIN

PR290

200K_0402_1%

2

G

PQ216

12

PC203

12

VIN

13

D

S

BATT+

@

12

PC204

10U_1206_25V6M

12

10U_1206_25V6M

PR224

3 3

CHGVADJ<29>

CC=0.25A~3.6A IREF=0.9133*Icharge IREF=0.228V~3.288V

4 4

VCHLIM need over 88mV

CP mode

CP= 92%*Iada

CHGVADJ=(Vcell-4)*9.445

Vcell 4V

4.2V

4.35V

CHGVADJ

0V

1.889V

3.30575V

UMA

Iada=0~3.947A(75W) CP=3.63A Vaclim=1.1V(75W) PR222=24k, PR223=20k, PR215=0.02

A

1 2

15.4K_0402_1%

B

PR225

31.6K_0402_1%

1 2

PR240

47K_0402_1%

ACPRN

6251VDD

PR241

12

PR242

PR242 10K_0402_1%

10K_0402_1%

13

2

PR241

10K_0402_1%

1 2

PQ214

PQ214 DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR243

14.3K_0402_1%

PACIN

1.26 / 14.3 * 205.3 = 18.089V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/11 2011/11/11

Compal Secret Data

Deciphered Date

C

ACIN <13,29,31>

Vin Detector

18.089V

High

17.44V

Low

VIN

12

PR246

309K_0402_1%

12

PR248

47K_0402_1%

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Monday, May 09, 2011

PR247

10K_0402_1%

1 2

12

PC223

.1U_0402_16V7K

SCHEMATIC MB A7571

4019D7

D

35 41

ADP_V <29>

of

B

5

4

3

2

1

2VREF_8205

D D

RT8205_B+

PL331

B+

12

PC368

0.1U_0402_25V6

C C

Ipeak=5A Imax=3.5A F=305KHz

B B

Total Capacitor 330uF ESR 15mohm

VS

A A

PL331

HCB2012KF-121T50_0805

1 2

12

PC367

1U_0603_25V6K

+3VALWP

150U_D2_6.3VY_R15M

PR371

1 2

100K_0402_1%

5

12

PC360

10U_1206_25V6M

PC331

DMN66D0LDW-7_SOT363-6

VL

VS_ON<34>

PL332

4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%

1

+

2

PL332

1 2

4.7_1206_5%

PC336

680P_0603_50V7K

PQ360A

PR370

100K_0402_1%

12

PR372

42.2K_0402_1%

PR336

12

PC370

@

61

D

S

12

0.01U_0402_16V7K

12

2

6

578

PQ331

PQ331 AO4466L_SO8

AO4466L_SO8

4

PC335

123

786

5

4

PQ332

PQ332 AO4712L_SO8

AO4712L_SO8

123

ENTRIP1 ENTRIP2

5

2

G

13

PQ361

PQ361 DTC115EUA_SC70-3

DTC115EUA_SC70-3

4

PC335

0.1U_0603_25V7K

B+

34

D

PQ360B

DMN66D0LDW-7_SOT363-6

S

SB00000EO00

+3VLP

12

PC361

4.7U_0805_10V6K

PR335

1 2

PR335

1 2

1_0603_5%

EN0<33>

PR360

499K_0402_1%

1 2

12

PC362

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BST_3V UG_3V LX_3V LG_3V

1U_0603_10V6K

PR362

13K_0402_1%

1 2

PR363

20K_0402_1%

1 2

PR337

150K_0402_1%

1 2

PU330

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

PR361

100K_0402_5%

2VREF_8205

3

12

PC363

PR364

30K_0402_1%

1 2

PR365

19.1K_0402_1%

1 2

ENTRIP1

PR357

150K_0402_1%

ENTRIP2

6

13

ENTRIP2

EN0

5

VFB2

SKIPSEL

14

3

4

TONSEL

15

RT8205_B+

12

2010/11/11 2011/11/11

150K_0402_1%

1 2

1

2

VFB1

VREF

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VCLK18VREG5

VIN16GND

TPS51125ARGER_QFN24_4X4

17

12

PC364

4.7U_0805_10V6K

PC365

0.1U_0603_25V7K

Compal Secret Data

Deciphered Date

VL

BST_5V UG_5V LX_5V LG_5V

PR355

1 2

1_0603_5%

10U_1206_25V6M

POK <34,38>

1 2

2

RT8205_B+

12

PC366

PC355

0.1U_0603_25V7K

AO4712L_SO8

6

578

PQ351

PQ351 AO4466L_SO8

4

PQ352

Title

Size Document Number Rev

Date: Sheet

AO4466L_SO8

123

PL352

4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%

786

5

12

123

PL352

1 2

PR356

4.7_1206_5%

PC356

PC356 680P_0603_50V7K

680P_0603_50V7K

150U_D2_6.3VY_R15M

Ipeak=5A Imax=3.5A F=245KHz Total Capacitor 330uF ESR 15mohm

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

Monday, May 09, 2011

1

+5VALWP

1

+

PC351

2

of

36 41

of

36 41

of

36 41

B

A

1 1

PR150

SYSON<26,29,32>

+5VALW

2 2

1 2

0_0402_5%

PR151

1 2 100_0603_5%

100_0603_5%

4.7U_0603_6.3V6K

PC158

12

PC157

.1U_0402_16V7K

12

@

G5603RU1U_TQFN14_3P5X3P5

PR152

1 2

10.2K_0402_1%

12

PR153

10K_0402_1%

PU150

2

TON

3

OUT

4

VCC

5

FB

6

PGOOD

1

15

TP

EN_SKIP

AGND7PGND

B

BST_1.5V

14

BST

8

PR154

255K_0402_1%

1 2

13

DH

12

LX

11

ILIM

10

VDD

9

DL

PR155

1 2

1_0603_5%

DH_1.5V LX_1.5V

PR157

1 2 18K_0402_1%

18K_0402_1%

DL_1.5V

BST_1.5V-1

PC155

1 2

0.1U_0603_25V7K

+5VALW

PC151

4.7U_0805_10V6K

1 2

C

PL151

1 2

HCB2012KF-121T50_0805

12

PC153

PC154

4.7U_0805_25V6-K

6

578

PQ151

4

AO4466L_SO8

123

786

5

PQ152

4

AO4712L_SO8

123

4.7U_0805_25V6-K

PL152

1.8UH_PCMB104T-1R8MS_15A_20%

12

PR156

4.7_1206_5%

12

PC156

680P_0603_50V7K

12

B+

1

+

2

D

PC152

PC152 220U_D2_4VY_R15M

220U_D2_4VY_R15M

+1.5VP

UMA Ipeak=7.56A Imax=5.3A Rtrip=18K, OCP=8.7A F=315KHz

{P8 330uF/17mohm} {P10 390uF/10mohm} {P11 330uF/15mohm @} {POWER 220uF/15mohm} Total Capacitor 940uF, ESR 4.43mohm

+1.5V

1

PJ75

@PJ75

@

1

JUMP_43X79

13

D

PQ260

S

SSM3K7002FU_SC70-3

Deciphered Date

C

2

PC261

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K PR280

PR280

1 2

1K_0402_1%

PR281

12

PC263

.1U_0402_16V7K

1K_0402_1%

For shortage changed

12

PU75

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

+0.75VSP

12

PC262

PC262 10U_0805_6.3V6M

10U_0805_6.3V6M

Title

Size Document Number Rev

Date: Sheet

6 5

NC

7

NC

8

NC

9

TP

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

Monday, May 09, 2011

+3VALW

12

PC264

PC264 1U_0603_10V6K

1U_0603_10V6K

37 41

D

37 41

B

of

3 3

PJ251

+3VS

4 4

A

PJ251

112

JUMP_43X39@

2

PC251

1U_0603_10V6K

12

PU25

APL5508-25DC-TRL_SOT89-3

2

IN

OUT

GND

1

3

B

12

PC252

4.7U_0805_6.3V6K

+2.5VSP

PR282

0_0402_5%

SUSP<32>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

PC260

@PC260

@

.1U_0402_16V7K

2010/11/11 2011/11/11

2

G

12

Compal Secret Data

5

D D

PR111

0_0402_5%

1 2

POK<34,36>

+5VALW

C C

VR_ON<29,32,39>

B B

+5VALW

A A

PR118

100_0603_1%

1 2

PC113

4.7U_0603_6.3V6K

PR120

1 2

0_0402_5%

PR124

100_0603_1%

1 2

PC121

4.7U_0603_6.3V6K

12

PC111

@PC111

@ .1U_0402_16V7K

.1U_0402_16V7K

12

PC120

@ PC120

@ .1U_0402_16V7K

.1U_0402_16V7K

12

PR113

4.75K_0402_1%

1 2

12

PR114

PR114 10K_0402_1%

10K_0402_1%

PR122

6.04K_0402_1%

1 2

12

PR123

PR123 10K_0402_1%

10K_0402_1%

4

PR112

255K_0402_1%

1 2

2 3 4 5 6

PU110

TON OUT VCC FB PGOOD

PU111

TON OUT VCC FB PGOOD

15

14

1

TP

EN_SKIP

AGND7PGND

G5603RU1U_TQFN14_3P5X3P5

8

PR121

255K_0402_1%

1 2

15

14

1

TP

EN_SKIP

AGND7PGND

G5603RU1U_TQFN14_3P5X3P5

8

BST

DH

ILIM

VDD

DH

ILIM

VDD

LX

DL

LX

DL

PR115

1_0603_5%

1 2

13 12

1 2

11

13K_0402_1%

10

DL_1.1V

9

PR125

1_0603_5%

1 2

13 12

1 2

11

16K_0402_1%

10

DL_1.2V

9

DH_1.1V LX_1.1V

PR119

DH_1.2V LX_1.2V

PR128

BST_1.1V

BST_1.2V

3

PC115

1 2

0.1U_0603_25V7K

+5VALW

12

PC117

4.7U_0805_10V6K

PC125

1 2

0.1U_0603_25V7K

+5VALW

12

PC124

4.7U_0805_10V6K

2

PL111

1 2

HCB2012KF-121T50_0805

12

6

578

4

PQ111

PQ111 AO4466L_SO8

AO4466L_SO8

123

12

786

5

PR116

PQ121

AO4466L_SO8

12

PC116

12

PC127

2.2UH_VMPI0703AR-2R2M-Z01_8A_20%

12

4.7_1206_5%

12

PC126

4

PQ112

123

AO4712L_SO8

6

578

4

123

786

5

4

PQ122

123

AO4712L_SO8

PC119

PC118

4.7U_0805_25V6-K

PL112

1 2

1.2V_B+

12

PC128

4.7U_0805_25V6-K

PL122

1 2

PL112

PL121

1 2

HCB2012KF-121T50_0805

2.2UH_VMPI0703AR-2R2M-Z01_8A_20%

4.7_1206_5%

680P_0603_50V7K

4.7U_0805_25V6-K

PR126

680P_0603_50V7K

B+

1

PC112

2

330U_2.5V_M

B+

1

+

PC122

2

330U_2.5V_M

Ipeak=5.3A

+

Imax=3.71A Rtrip=13K, OCP=6.23A F=315KHz

Total Capacitor 330uF/17mohm, ESR 17mohm

+1.2VSP

Ipeak=6.5A Imax=4.55A Rtrip=16K, OCP=7.53A F=315KHz

{P8 330uF/17mohm} {POWER 330u/17mohm} Total Capacitor 660uF, ESR 8.5mohm

1

+1.1VALWP

Security Classification

2010/11/11 2011/11/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/11 2011/11/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

38 41Monday, May 09, 2011

1

B

of

5

4

3

2

1

CPU_B+

12

VSUMG+

VSUMG-

PC515

12

0.1U_0603_50V7K

0.1U_0603_50V7K 12

12

PC541

10U_1206_25V6M

4

PC525

PR509

10_0402_5%

PC507

1 2

10_0402_5%

12

PR508

12

143K_0402_1%

12

PC503

100P_0402_50V8J

1 2

D D

APU_VDDNB_RUN_FB_L<7>

APU_VDDNB_SENSE<7>

+CPU_CORE_NB

470P_0402_50V7K

12

PR504

100K_0402_1%

PR507

8.06K_0402_1%

Rfset(Kohm)=(Period(uS))-0.29)*2.65

C C

+3VS

12

PR520

@

APU_SVD<7>

APU_PWRGD_L<12>

APU_SVC<7>

12

470P_0402_50V7K

PR514

100K_0402_5%

PR513

100K_0402_5%

VGATE<29>

H_PROCHOT#<7,29,34>

B B

Rfset(Kohm)=(Period(uS))-0.29)*2.65

100K_0402_1%

APU_VDD_SENSE<7>

APU_VDD_RUN_FB_L<7>

A A

PC509

0.01U_0402_25V7K

PC508

330P_0402_50V7K

PR503

2.26K_0402_1%

12

PR501

324_0402_1%

PC504

1000P_0402_50V7K

VR_ON<29,32,38>

PR517 3.83K_0402_1%PR517 3.83K_0402_1%

12

PR519

8.06K_0402_1%

PC513

12

68P_0402_50V8J

68P_0402_50V8J PC517

PC517

PR522

12

143K_0402_1%

+CPU_CORE

12

330P_0402_50V7K

1 2

12

PC501

1000P_0402_50V7K

PR510 0_0402_5%PR510 0_0402_5% PR511 0_0402_5%PR511 0_0402_5% PR512 0_0402_5%PR512 0_0402_5%

PR518 27.4K_0402_1%PR518 27.4K_0402_1%

12

PH5 470KB_0402_5%_ERTJ0EV474JPH5 470KB_0402_5%_ERTJ0EV474J

PC511

1000P_0402_50V7K

PR521

12

1000P_0402_50V7K

324_0402_1%

PR523

12

2.15K_0402_1%

PR524

10_0402_5%

12

PR527

10_0402_5%

12

PR502

12

PC510

12

PC514

SDA

12

ALERT#

12

SCLK

12

48

PU500

1

FB2_NB

ISEN1_NB

2

FB_NB

3

COMP_NB

4

VW_NB

5

PGOOD_NB

6

SVD

7

PWROK

8

SVC

9

ENABLE

10

PGOOD

11

PROC_HOT

12

NTC

VW

13

PC512 33P_0402_50V8JPC512 33P_0402_50V8J

1 2

ISEN2

ISEN1

VSUM-

12

PC520

330P_0402_50V7K

12

PC518

0.01U_0402_25V7K

+5VS

47

46

45

RTN_NB

VSEN_NB

ISEN2_NB

ISL6267HRZ-T_QFN48_6X6

ISEN3/FB2

COMP

16

14

12

PC521

0.22U_0402_10V6K

12

330P_0402_50V7K

12

PC555

0.1U_0402_10V7K

12

470KB_0402_5%_ERTJ0EV474J

PR551

27.4K_0402_1%

845_0402_1%

NTC_NB

43

42

44

NTC_NB

ISUMP_NB

ISUMN_NB

VSEN

ISEN2

19

17FB15

18

12

PC522

0.22U_0402_10V6K

PC519

12

PC554

0.047U_0402_16V7K

PH4

1 2

PR549

1 2

PR548

6.65K_0402_1%

1 2

PROG2

BOOT1_NB

40

41

PROG2

BOOT1_NB

ISUMN21VDD

RTN20ISEN1

12

PR553

39

38

PH1_NB

UG1_NB

ISUMP

22

23

12

PC528 1U_0603_10V6KPC528 1U_0603_10V6K

PR528

976_0402_1%

VSUMG+

12

PR552

2.61K_0402_1%

2.61K_0402_1% 12

PH3

11K_0402_1%

10K_0402_1%_ERTJ0EG103FA

VSUMG-

12

PC553

0.1U_0603_50V7K

1 2

PR550

3.83K_0402_1%

PR505

1_0603_5%

12

37

LG1_NB

PWM2_NB

BOOT2

UG2

PH2 LG2

VCCP

PWM3

LG1 PH1

UG1 BOOT1 PROG1

VIN

TP

24

49 PR532

PR532

0_0603_5%

PR531

1_0603_5%

12

PC529

0.22U_0603_25V7K

12

PC523

0.22U_0402_16V7K

12

PC505

0.1U_0603_50V7K

36

BOOT2

35

UGATE2

34

PHASE2

33

LGATE2

32 31

PWM3

30

LGATE1

29

PHASE1

28

UGATE1

27

BOOT1

26 25

1 2

12 12

12

PC524

PR529

0.01U_0402_16V7K

12

PR533

6.65K_0402_1%

CPU_B+ +5VS

12

11K_0402_1%

5

4

123

5

PQ502

4

123

TPCA8057-H_PPAK56-8-5

+5VS

12

PR537

PR537 0_0603_5%

0_0603_5%

PR534

0_0603_5%

PR534

0_0603_5%

12

PC534

1U_0603_10V6K

VSUM+

12

PR530

2.61K_0402_1%

12

PH6

PH6 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

VSUM-

12

PC527

0.1U_0603_50V7K

PQ501

PQ501 TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

PR506

4.7_1206_5%

PC506

680P_0603_50V7K

UGATE2

PHASE2

PR515

1_0603_5%

BOOT2

LGATE2

UGATE1

PHASE1

BOOT1

LGATE1

12

0.1U_0603_50V7K

0.1U_0603_50V7K 12

PR525

1_0603_5%

12

PC542

PC543

PC544

0.01U_0402_25V7K

2200P_0402_50V7K

10U_1206_25V6M

3.65K_0402_1%

1_0402_1%

5

12

2200P_0402_50V7K

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20% 1

2

PR546

12

PR547

12

PQ503

PQ503 TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

123

PQ504

123

TPCA8059-H_PPAK56-8-5

5

PQ505

4

TPCA8065-H_PPAK56-8-5

123

5

PQ506

4

123

12

PL502

12

PR516

4.7_1206_5%

12

PC516

680P_0603_50V7K

TPCA8059-H_PPAK56-8-5

1

+

PC545

2

@

4 3

ISEN2

VSUM+

VSUM-

12

PR526

4.7_1206_5%

12

PC526

680P_0603_50V7K

100U_25V_M

PL501

HCB4532KF-800T90_1812

1 2

1

+

PC546

2

220U_25V_M

+CPU_CORE_NB

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20% 1

PR542

2

12

10K_0402_1%

PR543

12

3.65K_0402_1%

3.65K_0402_1% PR544

PR544

1_0402_1%

12

PC530

0.36UH_PCMC104T-R36MN1R17_30A_20%

ISEN1

PR540

12

10K_0402_1%

VSUM+

PR539

12

3.65K_0402_1%

3.65K_0402_1% PR538

PR538

1_0402_1%

VSUM-

12

PC537

10U_1206_25V6M

PL503

12

10U_1206_25V6M

1 2

PC547

1U_0603_25V6K

CPU_B+

12

PC538

10U_1206_25V6M

4

PR545

1 2

3

10K_0402_1%

CPU_B+

12

PC531

PC532

10U_1206_25V6M

PL504

B+

12

PC539

0.01U_0402_25V7K

ISEN1

12

PC533

0.01U_0402_25V7K

4 3

12

PC540

2200P_0402_50V7K

12

2200P_0402_50V7K

ISEN2

PR541

1 2 10K_0402_1%

10K_0402_1%

Ipeak=27.5A Imax=22A Ri=866, Rdroop=976,OCP=35A F=300KHz Total Capacitor 660uF, ESR 8.5mohm

HW side: C160 330u 17m C201 330u 17m @C163 330u 9m

+CPU_CORE

If the layout of each phase to CPU is symmetric, the two res. can be removed. They are used for phase current balance adjustment.

Ipeak=54A Imax=36A Ri=976, Rdroop=2.15K,OCP=65A F=300KHz Total Capacitor 1320uF, ESR 2.25mohm

HW side: C145 330u 9m C146 330u 9m C147 330u 9m C148 330u 9m

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/11 2011/11/11

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

Monday, May 09, 2011

1

of

39 41

of

39 41

of

39 41

B

NO DATE PA{觩靲罿醥綆蓶滹蓶摀犉齇蓶醥鴭餟蓶鷘齇 PURPOSE

------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

DVT to PVT 2011/03/16 Page38 Change PR119/PR128 to 13K/16Kohm For 1.1VALW/1.2VS OCP design point 2011/03/17

Page39 Change PR523 from 2.26K to 2.15Kohm For match loadline SPEC 2011/03/21 Page37 Change PR152 from 10K to 10.2Kohm For HW request to increase 1.5V voltage level 2011/03/21 Page35 Change PR236 & PR237 to 200K & 47Kohm For increase BAT P-MOS divide voltage level 2011/03/21 Page34 Change PR22 & PR28 to 180 & 1.18Kohm For 65W adapter protection point(H_PROCHOT#) 2011/03/21 Page35 Change PR222 to 75Kohm For 65W CP protection design point 2011/03/21 Page35&36 Add PC224 & PC368 two 0.1uF/25V_0402 to GND For EMI solution 2011/03/21 Page35~39 Add all power snuber and change boostrape R to 1ohm For EMI solution 2011/03/21 Page35 Change PQ208 from AO4407 to AO4435 For 65W system 2011/03/21 Page35 Change PL202 to moding package For short risk by QAD 8KG test

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/11 2011/11/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

40 41Monday, May 09, 2011

of

B

5

4

3

2

1

HW PIR (Product Improve Record)

QOQAE LA-7571P SC{樗靲罿犉齇蓶摀摀󴯊AN{觩靲餟蓶鷘 REVISION C{樗犉鴭󴯉E: 0.2 TO 0.3

NO DATE PA{觩靲罿醥綆蓶滹蓶摀犉齇蓶醥鴭餟蓶鷘齇 PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

1. 03/15 26 Add DT4 For ESD's request

D D

2. 03/15 13 Delete ODD_PLU{觩蓶鴭耳煶滹摀󴯊 level shift since ODD has INT 1k PD ODD has internal 1K PD

3. 03/15 25 Add level shift for CR_CPPE# leakage issue For leakage issue

4. 03/15 13 Change {樗綆罿蓶煶󴯊PD to {觩靲╛靲鴭齇蝴鼻耳 {觩靲╛靲鴭齇狒耳has issue

5. 03/15 24 Change LO{觩醥煶餟靲綆󴒡󳾡󴯉PIO176 and WL_BT_LED to {觩IO177 For LED flash issue

6. 03/17 25 Change RC16 from 22 ohm to 0 ohm for SDXC performance issue For SDXC performance issue

7. 03/17 12 Change JCOMS to JCMOS For naming rule

8. 03/17 07 Delete {樗綆齇󴎡䁱󳺡󳆡󳲡󴎡 For ESD's request

9. 03/22 10 Add C21/C22/C23 For EMI's request

10. 03/22 31 Add C396/C397/C398/C399 For ESD's request

11. 03/22 21 Add C390 on +USB_VCCA For ESD's request

12. 03/24 29 Delete net KSO16 and KSO17 W/O support 10 key

13. 03/24 07 Delete R127/R118/R119 For ESD's request

14. 03/24 31 Add C400/C40/C402 For ESD's request

15. 03/24 12 Add C332/C333 For ESD's request

16. 03/24 18 Add C287/C295 For ESD's request

17. 03/25 30 Change LPC debug port For SW request

C C

18. 03/28 18 Add C334 For ESD request

19. 03/28 12 Change C248 and C249 to 15PF For RTC issue

REVISION C{樗犉鴭󴯉E: 0.3 TO 1.0 NO DATE PA{觩靲罿醥綆蓶滹蓶摀犉齇蓶醥鴭餟蓶鷘齇 PURPOSE

---------------------------------------------------------------------------------------------------------------------------------------------------

1. 04/26 16 Add C521,C342,C335 and C336 For EMI request

2. 04/26 16 Delete Q56 and add R371 No need for AMD A13

3. 04/26 31 Add C403 and C414 For EMI request

4. 04/26 31 Change SW2 and SW3 to @ For Debug use

5. 04/27 08 Change C201 to 330/9mohm ))))))))) For Dynamic CPU_CORE_NB fail

6. 04/27 14 Delete 45@ of U13 For Debug use

7. 04/27 10 Add C343/C344/C345/C346/C347/C348/C349/C350 For ESD request

8. 04/27 31 Add C426 For ESD request

9. 04/29 10 Change C343/C344/C345/C346/C347/C348/C349/C350 from 1u to 0.1u For ESD request

B B

10. 05/03 12) Add C333 and C332 For ESD request

11. 05/03 13 Add C363

For ESD request

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/11 2011/11/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC MB A7571

4019D7

41 41Monday, May 09, 2011

1

B

of

Compal LA-7571P QOQAE Ontario 10AS Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual