Compal LA-6842P Schematics Rev1.0

A

1 1

B

C

D

E

PWWAA

2 2

LC Marseille

LA-6842P SchematicREV 1.0

3 3

4 4

Intel Processor(ARD) /PCH(HM55)

2010-08-04 Rev 1.0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

145Wednesday, September 01, 2010

E

B

of

A

B

C

D

E

Compal Confidential

Model Name : PWWAA

1 1

2 2

File Name : LA-6842P

LCD Conn.

page 13

CRT

page 14

Intel Arrandale

rPGA-988

page 5,6,7,8,9,10

FDI X8

Intel Ibex Peak

DMI X4

2.5GHz2.7GHz

5V 480MHz

1.5V 2.5GHz(250MB/s)

SATA port 1

5V 3GHz(300MB/s)

Fan Control

APL5607

page 6

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066 MT/s

USB port 0,1

USB

PCIeMini Card

USB

5V 480MHz

PCIe 1x

WiMax

USB port 13

PCIeMini Card WLAN

PCIe port 1

SATA HDD0

page 25

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

USB

page 25

RTS5137

2IN1

USB port 10

page 26

page 27

Clock Generator

RTM890N-631-GRT

page 11,12

Int. Camera

USB port 11

page 13

RJ45

RTL8105E-GR 10/100M

PCIe port 0

page 28page 28

PCIe 1x

1.5V 2.5GHz(250MB/s)

BGA-951

SATA port 4

5V 3GHz(300MB/s)

SATA ODD

page 25

PCI

3 3

page 16~24

3.3V/1.5V 24MHz

HDA Codec

ALC259-GR

page 29

Power/B conn.

page 33

RTC CKT.

page 16

SPI ROM

page 16

Debug Port

page 32

3.3V 33 MHz

LPC BUS

ENE KB926 E0

page 31

HD Audio

DC/DC Interface CKT.

page 34

Touch Pad

Power Circuit DC/DC

4 4

A

page 35~44

B

page 33

Int.KBD

page 32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC ROM

page 32

Compal Secret Data

2010/06/21 2011/06/21

C

Compal Secret Data

Deciphered Date

Int.

MIC CONN HP CONN

(LVDS CONN)

page 13

D

Ext.

MIC CONN

page 30

Title

Size Document Number Rev

Date: Sheet

SPK CONN

page 30

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

245Wednesday, September 01, 2010

E

B

of

5

D D

C C

4

B+

RT8205EGQW

VR_ON

ISL62883HRZ

MP2121DQ

N-CHANNEL

SI4800

SUSP

N-CHANNEL

SI4800

3

Ipeak=5A, Imax=3.5A, Iocp min=7.9

SUSP#

SUSP

BCPWON

P-CHANNEL

AO-3413

KB_LED

P-CHANNEL

AO-3413

+5VS

LDO

G9191

ODD_EN#

P-CHANNEL

AO-3413

Ipeak=5A, Imax=3.5A, Iocp min=7.7

WOL_EN#

P-CHANNEL

AO-3413

P-CHANNEL

AO-3415

P-CHANNEL

AO-3413

FELICA_PWR

P-CHANNEL

AO-3413

LCD_ENVDD

BT_PWR#

2

DESIGN CURRENT 0.1A DESIGN CURRENT 0.1A

DESIGN CURRENT 5A

DESIGN CURRENT 2A

DESIGN CURRENT 4A

DESIGN CURRENT 0.5A

DESIGN CURRENT 400mA

DESIGN CURRENT 300mA

DESIGN CURRENT 1.6A

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

DESIGN CURRENT 1.5A

DESIGN CURRENT 180mA

DESIGN CURRENT 0.5A

DESIGN CURRENT 48A

+3VL +5VL

+5VALW

+1.8VS

+5VS

+5VS_L_BCAS

+5VS_LED

+3VS_HDP

+5VS_ODD

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+BT_VCC

+FLICA_VCC

+CPU_CORE

1

GFXVR_EN

ADP3211AMNR2G

B B

VTTP_EN

APW7138NITRL

Ipeak=18A, Imax=12.6A, Iocp min=19.8

DESIGN CURRENT 15A

DESIGN CURRENT 18A

+GFX_CORE

+VTT

SUSP#

RT8209BGQW

SUSP#

RT8209BGQW

Ipeak=7A, Imax=4.9A, Iocp min=7.7

Ipeak=15A, Imax=10.5A, Iocp min=16.5

SUSP

N-CHANNEL FDS6676AS

SUSP

N-CHANNEL FDS6676AS

DESIGN CURRENT 7A

DESIGN CURRENT 15A

DESIGN CURRENT 2A

+1.05VS

+1.5V

+1.5V_CPU

+1.5VS

SUSP or 0.75VR_EN#

A A

G2992F1U

DESIGN CURRENT 1.5A

+0.75VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

345Wednesday, September 01, 2010

1

B

of

A

B

C

D

E

Voltage Rails

State

power plane

1 1

( O MEANS ON X MEANS OFF )

+RTCVCC

+B

+5VL +3VL

+5VALW +3VALW +VSB

+1.5V

+5VS +3VS +1.5VS +VGA_CORE +CPU_CORE +VTT +1.05VS +1.8VS +1.1VS +0.75VS

BTO Option Table

Function

description

explain

MINI PCI-E SLOT

SLOT1

WLAN/BT

LAN

10/100M

BTO

Function

description

S0

S1

2 2

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O O O O O O

O O O O O

X

O O O O O

X

O O O O

X X

O

XX X XX

OO OO

X

explain

BTO

Function

description

explain

BTO

S3 Power Saving

Power Saving

Camera & Mic

CAM@

PCH SM Bus Address

HEX

A0 H

D2 H

0001 0110 bSmart Battery

Address

1010 0000 b 1010 0100 bA4 H 1101 0010 b

PowerPower

+3VS

EC SM Bus2 Address

Device

96 H

1001 0110 bPCH

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

Compal Secret Data

2010/06/21 2011/06/21

C

Compal Secret Data

Deciphered Date

SIGNAL

SLP_S3#

HIGH HIGHHIGH

LOW

LOW LOW

D

SLP_S4# SLP_S5#

HIGH HIGHHIGH

HIGH

LOW LOWLOW

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

E

B

of

445Wednesday, September 01, 2010

Power

+3VS

3 3

+3VS +3VS

+3VS +3VS Clock Generator

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 Clock Generator

WLAN/WIMAX

EC SM Bus1 Address

Device Address Address

+3VL

4 4

A

HEX HEX

16 H

HEXDevice AddressPower

5

1 2

R1 20_0402_1%R1 20_0402_1%

1 2

R2 20_0402_1%R2 20_0402_1%

1 2

R4 49.9_0402_1%R4 49.9_0402_1%

1 2

R3 49.9_0402_1%R3 49.9_0402_1%

D D

+VTT

1 2

R18 49.9_0402_1%R18 49.9_0402_1%

PECI<21>

Power has removed VR_TT#

+VTT

R10

R10 68_0402_5%

68_0402_5% @

@

1 2

+1.5V_CPU

C C

R28

@R28

@

1.1K_0402_1%

1 2

DRAMPWROK

12

750_0402_1%

750_0402_1% R29

R29

R28 unmount for NPS@ R29 always mount for PS@

H_PWRGOOD<21>

DRAMPWROK<18>

VTTPWROK_CPU<39>

BUF_PLT_RST#<20>

+VTT

H_THERMTRIP#<21>

XDP_RST#_RH_CPURST#

PMSYNCH<18>

H_PWRGOOD

1 2

R9 68_0402_5%R9 68_0402_5%

1 2

R36 1K_0402_5%R36 1K_0402_5%

TAPPWRGD

R301.5K_0402_1% R301.5K_0402_1%

750_0402_1%

T41PAD T41PAD

H_PROCHOT#_D

H_CPURST#

H_PWRGOOD1_R

12

R250_0402_5% R250_0402_5%

VTTPWROK_CPU

BUF_PLT_RST#_R

R31

4

H_COMP3 H_COMP2 H_COMP1 H_COMP0

TP_SKTOCC#

CATERR#

DRAMPWROK

JCPUB

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

3

MISC THERMAL

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY# PREQ#

TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK

TDI

A16 B16

CLK_CPU_XDP_R

AR30

CLK_CPU_XDP#_R

AT30 E16

D16 A18

A17

SM_DRAMRST#_CPU

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#_R

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCK

AN28

XDP_TMS

AP28

XDP_TRST#

AT27

XDP_TDI_R

AT29

XDP_TDO_R

AR27

XDP_TDI_M

AR29

XDP_TDO_M

AP29

XDP_DBRESET#

AN25

XDP_BPM#0

AJ22

XDP_BPM#1

AK22

XDP_BPM#2

AK24

XDP_BPM#3

AJ24 AJ25 AH22 AK23 AH23

CLK_CPU_BCLK <21> CLK_CPU_BCLK# <21>

1 2

R41 0_0402_5%@R41 0_0402_5%@

1 2

R42 0_0402_5%@R42 0_0402_5%@

CLK_PEG <17> CLK_PEG# <17>

Unused by Clarksfield rPGA989

R6 100_0402_1%R6 100_0402_1%

1 2

R7 24.9_0402_1%R7 24.9_0402_1%

1 2

R8 130_0402_1%R8 130_0402_1%

1 2

12

R12 0_0402_5%R12 0_0402_5%

Routed as a single daisy chain

12

R312 1K_0402_5%R312 1K_0402_5%

XDP_DBRESET# <18>

JTAG MAPPING

Scan Chain (Default)

CPU Only

GMCH Only

STUFF -> R20, R23, R27 NO STUFF -> R21, R26

STUFF -> R20, R21 NO STUFF -> R23, R26, R27

STUFF -> R26, R27 NO STUFF -> R20, R21, R23

CLK_CPU_XDP CLK_CPU_XDP#

DDR3 Compensation Signals Layout Note:Please these resistors near Processor

PM_EXTTS# <11,12>

+3VS

2

PM_EXTTS#0 PM_EXTTS#_R

R19 unmount for NPS@

@

R19 0_0402_5%

S

R127

S

12

G

SM_DRAMRST#_CPU

100K_0402_5%

1

R15 10K_0402_5%R15 10K_0402_5% R13 10K_0402_5%R13 10K_0402_5%

BSS138_NL_SOT23-3

2

C301

0.047U_0402_16V7K

1 2

12

D

13

Q41

12 12

SM_DRAMRST# <11,12>

RST_GATE <21>

C301, Q41, R127 from PS@ to mount

+VTT

Add on 10/28

XDP_TDI_R XDP_TDI

XDP_TDO_M

0_0402_5%

XDP_TDI_M

XDP_TDO_R

12

R23

1 2

R20 0_0402_5%R20 0_0402_5%

@

1 2

R21 0_0402_5%

@

1 2

R26 0_0402_5%

1 2

R27 0_0402_5%R27 0_0402_5%

XDP_TDO

@

B B

For S3 CPU Power Saving

place near JCPU

DRAMPWROK

C4871000P_0402_50V7K C4871000P_0402_50V7K

12

VTTPWROK_CPU

C4881000P_0402_50V7K C4881000P_0402_50V7K

12

VTTPWROK<34,39>

VTTPWROK

0715 --> change BOM structure to mount

A A

5

+3VALW

1 2

C163 0.1U_0402_16V4ZC163 0.1U_0402_16V4Z

5

U16

1

P

IN1

4

O

2

IN2

G

3

@

4

R33 1.5K_0402_1%R33 1.5K_0402_1%

SN74AHC1G08DCKR_SC70-5

12

R840_0402_5%@R840_0402_5%

DRAMPWROK

XDP_PRDY# XDP_PREQ# XDP_TCK XDP_TMS XDP_TRST# XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_DBRESET# XDP_DBRESET#_R

EMI request, close to JCPU

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

@

R358 0_0402_5%

1 2

@

R359 0_0402_5%

1 2

@

R360 0_0402_5%

1 2

@

R367 0_0402_5%

1 2

@

R370 0_0402_5%

1 2

@

R371 0_0402_5%

1 2

@

R373 0_0402_5%

1 2

@

R374 0_0402_5%

1 2

@

R375 0_0402_5%

1 2

@

R390 0_0402_5%

1 2

2010/06/21 2011/06/21

XDP_PRDY#_R XDP_PREQ#_R XDP_TCK_R XDP_TMS_R XDP_TRST#_R XDP_BPM#0_R XDP_BPM#1_R XDP_BPM#2_R XDP_BPM#3_R

Compal Secret Data

Deciphered Date

H_PWRGOOD TAPPWRGD

+VTT

0.1U_0402_10V6K

2

XDP Connector

SFF-24Pin

JXDP

1

JXDP

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

GND

24

GND

MOLEX_52435-2472

@

545Wednesday, September 01, 2010

25 26

B

of

XDP_PREQ#_R XDP_PRDY#_R

XDP_BPM#0_R XDP_BPM#1_R

XDP_BPM#2_R

R32 1K_0402_5%@R32 1K_0402_5%@ 1 2 1 2

R35 0_0402_5%@R35 0_0402_5%@

1

C1

2

@

51_0402_5%

12

R1451_0402_5% R1451_0402_5%

12

R11

Title

Size Document Number Rev

Custom

Date: Sheet

XDP_BPM#3_R H_PWRGOOD_R

TAPPWRGD_R CLK_CPU_XDP CLK_CPU_XDP#

XDP_RST#_R XDP_DBRESET#_R

XDP_TDO XDP_TRST#_R XDP_TDI XDP_TMS_R

XDP_TCK_R

Compal Electronics, Inc.

Compal Electronics, Inc. SCHEMATICS, MB A6842

SCHEMATICS, MB A6842

SCHEMATICS, MB A6842 401981

401981

5

4

3

2

1

D D

DMI_PTX_CRX_N0<18> DMI_PTX_CRX_N1<18> DMI_PTX_CRX_N2<18> DMI_PTX_CRX_N3<18>

DMI_PTX_CRX_P0<18> DMI_PTX_CRX_P1<18> DMI_PTX_CRX_P2<18> DMI_PTX_CRX_P3<18>

DMI_CTX_PRX_N0<18> DMI_CTX_PRX_N1<18> DMI_CTX_PRX_N2<18> DMI_CTX_PRX_N3<18>

DMI_CTX_PRX_P0<18> DMI_CTX_PRX_P1<18> DMI_CTX_PRX_P2<18> DMI_CTX_PRX_P3<18>

C C

B B

FDI_CTX_PRX_N0<18> FDI_CTX_PRX_N1<18> FDI_CTX_PRX_N2<18> FDI_CTX_PRX_N3<18> FDI_CTX_PRX_N4<18> FDI_CTX_PRX_N5<18> FDI_CTX_PRX_N6<18> FDI_CTX_PRX_N7<18>

FDI_CTX_PRX_P0<18> FDI_CTX_PRX_P1<18> FDI_CTX_PRX_P2<18> FDI_CTX_PRX_P3<18> FDI_CTX_PRX_P4<18> FDI_CTX_PRX_P5<18> FDI_CTX_PRX_P6<18> FDI_CTX_PRX_P7<18>

FDI_FSYNC0<18> FDI_FSYNC1<18>

FDI_INT<18> FDI_LSYNC0<18>

FDI_LSYNC1<18>

A24 C23 B22 A21

B24 D23 B23 A22

D24 G24 F23 H23

D25 F24 E23 G23

E22 D21 D19 D18 G21 E19 F21 G18

D22 C21 D20 C18 G22 E20 F20 G19

F17 E17

C17 F18

D17

JCPUA

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]

DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7]

FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7]

FDI_FSYNC[0] FDI_FSYNC[1]

FDI_INT FDI_LSYNC[0]

FDI_LSYNC[1]

PEG_COMP

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_RBIAS

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS PEG_RX#[0]

PEG_RX#[1]

DMI Intel(R) FDI

PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

1 2

R38 49.9_0402_1%R38 49.9_0402_1%

1 2

R39 750_0402_1%R39 750_0402_1%

FAN Control Circuit

+5VS

1A

2

C3

10U_0805_10V4Z

U1

1

EN

GND

2

VIN

EN_DFAN1<31>

+FAN1

10mil

1

C5

C5 10U_0805_10V4Z

10U_0805_10V4Z

2

GND

3

VOUT

GND

4

VSET

GND

APL5607KI-TRG_SO8

1

8 7 6 5

+FAN1

2

C4 1000P_0402_25V8J@C41000P_0402_25V8J@

1

0.01U_0402_25V7K

C6

JFAN

@

1

2

3

4

GND

5

GND

ACES_85204-0300N

R34 10K_0402_5%R34 10K_0402_5%

12

FAN_SPEED1 <31>

+3VS

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

Remove Cap, for EMI

A A

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

645Wednesday, September 01, 2010

1

B

of

5

JCPUC

DDR_A_D[0..63]<11>

4

3

JCPUD

DDR_B_D[0..63]<12>

2

1

AA6

SA_CK[0]

AA7

SA_CK#[0]

P7

DDR_A_D0 DDR_A_D1

D D

C C

B B

DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>

DDR_A_CAS#<11> DDR_A_RAS#<11>

DDR_A_WE#<11>

DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

A10

C10

B10

D10

E10

F10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ7 AJ6

AJ10

AJ9

AL10

AK12

AK8

AL7

AK11

AL8

AN8 AM10 AR11

AL11

AM9

AN9

AT11

AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14

AP14

AC3 AB2

AE1 AB3 AE9

C7 A7

A8 D8

E6 F7 E9 B7 E7 C6

G8

K7

G7

J10

L7 M6 M8

L9

L6

K8

N8

P9

U7

J8

J7

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

SA_CKE[0]

Y6

SA_CK[1]

Y5

SA_CK#[1]

P6

SA_CKE[1]

AE2

SA_CS#[0]

AE8

SA_CS#[1]

AD8

SA_ODT[0]

AF9

SA_ODT[1]

DDR_A_DM0

B9

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDRA_CLK0 <11> DDRB_CLK0 <12> DDRA_CLK0# <11> DDRA_CKE0 <11> DDRB_CKE0 <12>

DDRA_CLK1 <11> DDRA_CLK1# <11> DDRA_CKE1 <11>

DDRA_SCS0# <11> DDRA_SCS1# <11> DDRB_SCS1# <12>

DDRA_ODT0 <11> DDRB_ODT0 <12> DDRA_ODT1 <11> DDRB_ODT1 <12>

DDR_A_DM[0..7] <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>

DDR_B_CAS#<12> DDR_B_RAS#<12>

DDR_B_WE#<12>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AG1

AG4 AG3

AM6

AM4 AM3

AR10

AT10

AF3

AJ3

AK1

AJ4 AH4 AK3 AK4

AN2 AK5 AK2

AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9

AB1

AC5 AC6

B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2

G1 G5

K2 M1

K5 K4 M4 N5

W5

R7

Y7

J6 J3

J2 J1 J5

L3

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

DDR SYSTEM MEMORY - B

SB_CK[0] SB_CK#[0] SB_CKE[0]

SB_CK[1] SB_CK#[1] SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

W8 W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDRB_CLK0# <12>

DDRB_CLK1 <12> DDRB_CLK1# <12> DDRB_CKE1 <12>

DDRB_SCS0# <12>

DDR_B_DM[0..7] <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

A A

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

745Wednesday, September 01, 2010

1

B

of

5

4

3

2

1

Material Note (+VTT):

JCPUF

+CPU_CORE

D D

C C

B B

A A

Clarksfield: 65A Clarksfield: 21A Auburndale:48A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26

VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CPU CORE SUPPLY

POWER

SENSE LINES

Auburndale:18A

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31

1.1V RAIL POWER

VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

PSI#

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

PROC_DPRSLPVR

CPU VIDS

VTT_SELECT

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34

G15

AN35

AJ34 AJ35

B15 A15

390uF/ 10mohm, number are 3, power x1, HW x2

(Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)

+

C144 390U_2.5V_M_R10

1 2

+

C267 390U_2.5V_M_R10

1 2

C89 22U_0805_6.3V6MC89 22U_0805_6.3V6M

1 2

C91 22U_0805_6.3V6MC91 22U_0805_6.3V6M

1 2

SF000002O00 ESR 10m-ohm H6.3

H_PSI# <42>

CPU_VID0 <42> CPU_VID1 <42> CPU_VID2 <42> CPU_VID3 <42> CPU_VID4 <42> CPU_VID5 <42>

T3 PADT3 PAD

CPU_VID6 <42> H_DPRSLPVR <42>

IMVP_IMON <42>

H_DPRSLPVR_R

H_VTTSELECT

VCCSENSE_R

1 2

R62 0_0402_5%R62 0_0402_5%

R65 0_0402_5%R65 0_0402_5%

1 2

R66 0_0402_5%R66 0_0402_5%

1 2

VTT_SENSE <39> VSS_SENSE_VTT <39>

+VTT

C81 10U_0805_10V4KC81 10U_0805_10V4K

1 2

C83 10U_0805_10V4KC83 10U_0805_10V4K

1 2

C85 10U_0805_10V4KC85 10U_0805_10V4K

1 2

C87 10U_0805_10V4KC87 10U_0805_10V4K

1 2

C88 10U_0805_10V4KC88 10U_0805_10V4K

1 2

C90 10U_0805_10V4KC90 10U_0805_10V4K

1 2

C92 10U_0805_10V4KC92 10U_0805_10V4K

1 2

C94 10U_0805_10V4K@C94 10U_0805_10V4K@

1 2

Power team request for F-Din

+CPU_CORE

22U_0805_6.3V6M

1

C179

C131

C114

2

22U_0805_6.3V6M

C131

2

22U_0805_6.3V6M

CRB default setting: VID[6:0]=[0100111]

VTT Rail

Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V

H_VTTSELECT = low, 1.1V H_VTTSELECT = high, 1.05V

1 2

R64 100_0402_1%R64 100_0402_1%

VCCSENSE VSSSENSEVSSSENSE_R

1 2

R67 100_0402_1%R67 100_0402_1%

near CPU

22U_0805_6.3V6M

1

C116

2

+CPU_CORE

VCCSENSE <42> VSSSENSE <42>

22U_0805_6.3V6M

1

C132

2

22U_0805_6.3V6M

1

C129

2

22U_0805_6.3V6M

C149

+CPU_CORE

10U_0805_10V4K

1

C71

2

10U_0805_10V4K

1

C72

2

10U_0805_10V4K

1

C73

2

1

2

1

C75

C74

2

10U_0805_10V4K

1

C76

2

10U_0805_10V4K

1

C77

2

1

C78

2

10U_0805_10V4K

1

C79

2

(Place these capacitors under CPU socket, top layer)

+CPU_CORE

10U_0805_10V4K

1

C98

2

10U_0805_10V4K

1

C99

2

10U_0805_10V4K

1

C100

2

1

C101

2

10U_0805_10V4K

1

C102

2

1

C103

C104

2

10U_0805_10V4K

(Place these capacitors on CPU cavity, Bottom Layer)

+CPU_CORE

22U_0805_6.3V6M

1

C106

C105

1

2

C105

2

22U_0805_6.3V6M

+CPU_CORE

22U_0805_6.3V6M

1

C112

C111

2

22U_0805_6.3V6M

1

C107

2

22U_0805_6.3V6M

1

C113

2

22U_0805_6.3V6M

1

C108

2

22U_0805_6.3V6M

1

C130

2

22U_0805_6.3V6M

C109

C115

22U_0805_6.3V6M

1

C110

2

22U_0805_6.3V6M

1

C148

2

TOP side (under inductor)

+CPU_CORE

330U_D2_2.5VM_R9M

1

+

C121

330U_D2_2.5VM_R9M

2

330U_D2_2.5VM_R9M

1

+

C122

330U_D2_2.5VM_R9M

2

C123

330U_D2_2.5VM_R9M

1

+

C124

2

1

+

2

Check list:

+CPU_CORE: 6x 470uF, 12x 22uF, 17x 10uF +VTT: 4x 330uF, 7x 22uF, 8x 10uF

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/06/21 2011/06/21

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

1

845Wednesday, September 01, 2010

B

of

5

For EMI request

+GFX_CORE

47P_0402_50V8J

C118

C118 @

@

47P_0402_50V8J

12

C119

C119 @

@

12

C93

C93 @

@

47P_0402_50V8J

12

C97

C97 @

@

D D

47P_0402_50V8J

Change C271 to 4.5mm height OS-CON at PVT

+GFX_CORE

22U_0805_6.3V6M

C271

330U_2.5V_M_R17

1

+

2

1

C95

2

22U_0805_6.3V6M

1

C127

2

1U_0402_6.3V4Z

1

C117

2

1U_0402_6.3V4Z

1

C96

2

10U_0805_6.3V6M

1

C120

2

Add C496 Co-Layout with C271

C496

@

+GFX_CORE

1

+

2

C C

330U_D2_2VM_R6M

For POLY Cap.

0714 --> C271 mount, C496 unmount

+VTT

1

C141

B B

C141

22U_0805_6.3V6M

C146

22U_0805_6.3V6M

2

+VTT

1

2

(Place these capacitors under CPU socket, top layer)

A A

4

C86

C86 10U_0805_6.3V6M

10U_0805_6.3V6M

1

C142

C142 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C147

C147 22U_0805_6.3V6M

22U_0805_6.3V6M

2

JCPUG

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

Auburndale:22A

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

7/22 modified for cost down.

GRAPHICS

Clarksfield: 5A Auburndale:3A

FDI PEG & DMI

POWER

Clarksfield: 21A Auburndale:18A

Clarksfield: 0.6A Auburndale:1.35A

3

+1.5V_CPU +1.5VS

PJ32

@PJ32

@

2

112

JUMP_43X79

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

DDR3 - 1.5V RAILS

1.1V1.8V

VCC_AXG_SENSE_R VSS_AXG_SENSE_R

GFXVR_EN

GFXVR_DPRSLPVR GFXVR_IMON

1U_0402_6.3V4Z

+1.8VS_H_PLL

C151

1U_0402_6.3V4Z

R424

470_0805_5%

Q46B

2N7002DW-T/R7_SOT363-6

R687 1K_0402_5%

1

C133

2

+VTT

1

C143

C143 10U_0805_10V4K

10U_0805_10V4K

2

1

C145

C145 22U_0805_6.3V6M

22U_0805_6.3V6M

2

5

R365 0_0402_5%R365 0_0402_5% R384 0_0402_5%R384 0_0402_5%

12

@

1U_0402_6.3V4Z

1

C135

C134

2

1U_0402_6.3V4Z

(Place these capacitors under CPU socket Edge, top layer)

+VTT

(Place these capacitors under CPU socket, top layer)

1U_0402_6.3V4Z

1

C152

2

2.2U_0603_6.3V4Z

1 2 3

4

1 2 1 2

For Power request

near CPU

GFXVR_VID_0 <43> GFXVR_VID_1 <43> GFXVR_VID_2 <43> GFXVR_VID_3 <43> GFXVR_VID_4 <43> GFXVR_VID_5 <43> GFXVR_VID_6 <43>

GFXVR_EN <43>

T8 PADT8 PAD

GFXVR_IMON <43>

1U_0402_6.3V4Z

1

C137

C136

2

1U_0402_6.3V4Z

4.7U_0603_6.3V6K

1

C153

C154

2

C154

2

3A

1

C273

C273 10U_0805_10V4K

10U_0805_10V4K

2

R69 100_0402_1%R69 100_0402_1%

R82 100_0402_1%R82 100_0402_1%

Change R136 to 470 ohm for GFX issue

1 2

R50 470_0402_5%R50 470_0402_5%

22U_0805_6.3V6M

1

C138

C139

2

22U_0805_6.3V6M

R71 0_0805_5%R71 0_0805_5%

1

C155

2

22U_0805_6.3V6M

1 2 3 4

FDS6676AS_SO8

1

C472

2

0.1U_0402_25V6

1 2

+1.5V_CPU

1

2

12

Q33

S

D

S

D

S

D

G

D

12

R417

R417 820K_0402_5%

820K_0402_5%

1

+

C216

C216 390U_2.5V_M_R10

390U_2.5V_M_R10

2

+1.8VS

+1.5V+1.5V_CPU

8 7 6 5

+GFX_CORE

R418

1 2

220K_0402_5%

61

Q46A

SUSPSUSP

2

2N7002DW-T/R7_SOT363-6

VCC_AXG_SENSE <43> VSS_AXG_SENSE <43>

C230 0.1U_0402_16V4ZC230 0.1U_0402_16V4Z

1 2

C314 0.1U_0402_16V4ZC314 0.1U_0402_16V4Z

1 2

C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z

1 2

C186 0.1U_0402_16V4ZC186 0.1U_0402_16V4Z

1 2

remove PJ30

PJ31

2

JUMP_43X79

PJ31 need to open for S3 CPU Power Saving

1

form PS@ to mount

+VSB

SUSP <34,41>

@PJ31

@

112

+1.5V

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

945Wednesday, September 01, 2010

1

B

of

5

JCPUI

K27

VSS161

K9

VSS162

K6

VSS163

D D

C C

B B

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

VSS

NCTF

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

AT35 AT1 AR34 B34 B2 B1 A35

H_NCTF1 H_NCTF2

H_NCTF6 H_NCTF7

PADT4PAD PADT5PAD

PADT6PAD PADT7PAD

4

JCPUH

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

T4 T5

T6 T7

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

3

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

2

WW41 Recommend not pull down PCIE2.0 Jitter is over on ES1

R743.01K_0402_1% @R743.01K_0402_1% @

1 2

R753.01K_0402_1% @R753.01K_0402_1% @

1 2

R763.01K_0402_1% @R763.01K_0402_1% @

1 2

CFG0 - PCI-Express Configuration Select

*1:Single PEG 0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

*1 :Normal Operation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

*1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

JCPUE

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

RSVD9

H17

RSVD10

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9 @

@

(SA_DIMM_VREF) (SB_DIMM_VREF)

RSVD32 RSVD33

RSVD34 RSVD35

RSVD36

RSVD_NCTF_37

RSVD38 RSVD39

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52

RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RSVD58

RSVD_TP_59 RSVD_TP_60

RESERVED

RSVD62

RSVD63

RSVD64

RSVD65

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

KEY

VSS

1

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AP1 AT2

AT3 AR1

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32

E15 F15 A2 D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

*:Default

A A

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

10 45Wednesday, September 01, 2010

1

B

of

5

+VREF_DQA

1

C157

C156

2

0.1U_0402_16V4Z

D D

close to JDDRL.1

C C

B B

A A

+3VS

C181

DDR_A_BS2<7>

DDRA_CLK0<7> DDRA_CLK0#<7>

DDR_A_BS0<7>

DDR_A_WE#<7>

DDR_A_CAS#<7>

DDRA_SCS1#<7>

1

C182

2

2.2U_0603_6.3V4Z

1

2

2.2U_0603_6.3V4Z

R90

R90 10K_0402_5%

10K_0402_5%

1

2

0.1U_0402_16V4Z

5

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_MA10

DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

1 2

R91

10K_0402_5%

+1.5V

+0.75VS

12

JDDRL

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1 GND2

VREF_CA

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

FOX_AS0A626-U2SN-7F_204P

FOX_AS0A626-U2SN-7F_204P @

@

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1 CK1#

VDD

BA1

RAS#

VDD

ODT0

VDD

ODT1

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

SCL

VTT

BOSS1 BOSS2

A15 A14

A11

S0#

A7 A6

A4 A2

A0

NC

4

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28 30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

74 76

DDR_A_MA15

78

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86 88

DDR_A_MA6

90

DDR_A_MA4

92 94

DDR_A_MA2

96

DDR_A_MA0

98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

+DDR_VREF_CA_DIMMA

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

+0.75VS

4

DDR3 SO-DIMM A Standard Type

+1.5V

12

R83

1K_0402_1%

R83 from PS@ to mount

DDRA_CKE1 <7>DDRA_CKE0<7>

DDRA_CLK1 <7> DDRA_CLK1# <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDRA_SCS0# <7> DDRA_ODT0 <7>

DDRA_ODT1 <7>

C161

2.2U_0603_6.3V4Z

close to JDDRL.126

PM_EXTTS# <5,12>

PM_SMBDATA <12,13,17,27> PM_SMBCLK <12,13,17,27>

+V_DDR3_DIMM_REF

R89

1 2

0_0402_5%

1

C162

2

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SM_DRAMRST# <5,12>

3

DDR_A_DQS[0..7]<7>

DDR_A_DQS#[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_DM[0..7]<7>

DDR_A_MA[0..15]<7>

Layout Note: Place near JDDRL

+1.5V

2010/06/21 2011/06/21

3

+

C218 390U_2.5V_M_R10

1 2

C166 10U_0805_6.3V6MC166 10U_0805_6.3V6M

1 2

C168 10U_0805_6.3V6MC168 10U_0805_6.3V6M

1 2

C171 10U_0805_6.3V6MC171 10U_0805_6.3V6M

1 2

C174 10U_0805_6.3V6MC174 10U_0805_6.3V6M

1 2

C176 10U_0805_6.3V6MC176 10U_0805_6.3V6M

1 2

C178 10U_0805_6.3V6MC178 10U_0805_6.3V6M

1 2

Compal Secret Data

Deciphered Date

M1 Circuit

+1.5V

R79

1K_0402_1%

R81

1K_0402_1%

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

+1.5V +0.75VS

C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z

2

12

+V_DDR3_DIMM_REF

12

1 2 1 2 1 2 1 2

2

1

12

R78 0_0402_5%R78 0_0402_5%

12

R80 0_0402_5%R80 0_0402_5%

Layout Note: Place near JDDRL1.203 and 204

C165 10U_0805_6.3V6MC165 10U_0805_6.3V6M

C169 1U_0402_6.3V4ZC169 1U_0402_6.3V4Z C172 1U_0402_6.3V4ZC172 1U_0402_6.3V4Z C175 1U_0402_6.3V4ZC175 1U_0402_6.3V4Z C177 1U_0402_6.3V4ZC177 1U_0402_6.3V4Z

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

1 2

+VREF_DQB

+VREF_DQA

12 12 12 12

1

11 45Wednesday, September 01, 2010

of

B

A

+VREF_DQB

1

2

C183

2.2U_0603_6.3V4Z

1 1

2.2U_0603_6.3V4Z

close to JDDRH.1

2 2

3 3

4 4

DDRB_CKE0<7>

DDR_B_BS2<7>

DDRB_CLK0<7> DDRB_CLK0#<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDRB_SCS1#<7>

+3VS

2.2U_0603_6.3V4Z

1

C207

2

0.1U_0402_16V4Z

1

C208

2

1

2

C184

0.1U_0402_16V4Z

R98

R98 10K_0402_5%

10K_0402_5%

R99

1 2

10K_0402_5%

DDR_B_D0 DDR_B_D1

DDR_B_DM0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2 DDR_B_D18

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_MA10

DDR_B_MA13

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D50

DDR_B_D51 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

1 2

A

+0.75VS

+1.5V

JDDRH

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1 GND2

VREF_CA

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

FOX_AS0A626-UASN-7F_204P

FOX_AS0A626-UASN-7F_204P @

@

VSS

DQ4

DQ5

VSS

DQS0#

DQS0

VSS

DQ6

DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1 CK1#

VDD

BA1

RAS#

VDD

ODT0

VDD

ODT1

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

SCL

VTT

BOSS1 BOSS2

A15 A14

A11

S0#

A7 A6

A4 A2

A0

NC

+1.5V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

B

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

+DDR_VREF_CA_DIMMB DDR_B_D36

DDR_B_D37 DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63

+0.75VS

B

Standard Type DDR3 SO-DIMM B

SM_DRAMRST# <5,11>

DDRB_CKE1 <7>

DDRB_CLK1 <7> DDRB_CLK1# <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>DDR_B_BS0<7>

DDRB_SCS0# <7> DDRB_ODT0 <7>

DDRB_ODT1 <7>

R97

1 2

1

2

C188

C187

close to JDDRH.126

PM_EXTTS# <5,11>

PM_SMBDATA <11,13,17,27> PM_SMBCLK <11,13,17,27>

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+V_DDR3_DIMM_REF

0_0402_5%

C

DDR_B_DQS#[0..7]<7>

DDR_B_DQS[0..7]<7>

DDR_B_D[0..63]<7>

DDR_B_DM[0..7]<7>

DDR_B_MA[0..15]<7>

Layout Note: Place near JDDRH

+1.5V

2010/06/21 2011/06/21

C

@

+

C189 330U_B2_2.5VM_R15M

1 2

C192 10U_0805_6.3V6MC192 10U_0805_6.3V6M

1 2

C194 10U_0805_6.3V6MC194 10U_0805_6.3V6M

1 2

C197 10U_0805_6.3V6MC197 10U_0805_6.3V6M

1 2

C200 10U_0805_6.3V6MC200 10U_0805_6.3V6M

1 2

C202 10U_0805_6.3V6MC202 10U_0805_6.3V6M

1 2

C204 10U_0805_6.3V6MC204 10U_0805_6.3V6M

1 2

Compal Secret Data

Deciphered Date

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

D

C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z

1 2

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

1 2

C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z

1 2

C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z

1 2

D

E

Layout Note: Place near JDDRH.203 and 204

+0.75VS+1.5V

C191 10U_0805_6.3V6MC191 10U_0805_6.3V6M

1 2

C195 1U_0402_6.3V4ZC195 1U_0402_6.3V4Z

12

C198 1U_0402_6.3V4ZC198 1U_0402_6.3V4Z

12

C201 1U_0402_6.3V4ZC201 1U_0402_6.3V4Z

12

C203 1U_0402_6.3V4ZC203 1U_0402_6.3V4Z

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

12 45Wednesday, September 01, 2010

E

of

B

A

Clock Generator

1 1

+1.5VS +1.5VS_CK505

CLK_DOT<17> CLK_DOT#<17>

CLK_48M_CR<26>

2 2

CLK_SATA<17> CLK_SATA#<17>

PCH_CLK_DMI<17>

PCH_CLK_DMI#<17>

1 2

R400 33_0402_5%R400 33_0402_5%

B

C

D

E

F

For SED For SED

FBMH1608HM601-T_0603

+3VS +3VS_CK505 +1.05VS +1.05VS_CK505

1 2

R100

R401

@ R401

@

0_0603_5%

FBMH1608HM601-T_0603

1 2

R126

For SED

0.1U_0402_16V4Z

1

C209

2

10U_0805_10V4Z

1 2

0.1U_0402_16V4Z

1

C213

2

1U_0402_6.3V4Z

C210

C214

1

C211

2

0.1U_0402_16V4Z

1

C215

2

0.1U_0402_16V4Z

C212

Add C213 for NALA eSATA transmit issue

+1.5VS_CK505 +1.05VS_CK505 +3VS_CK505

CLK_48M_CR_R

H_STP_CPU#

U5

1

VDD_USB_48

2

VSS_48M

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

USB_48

9

VSS_27M

10

SATA

11

SATA#

12

VSS_SRC

13

SRC_1

14

SRC_1#

15

VDD_SRC_IO

16

CPU_STOP#

33

TGND

RTM890N-631-GRT QFN 32P

For SED For SED

1

12

C251

C251 47P_0402_50V8J

2

47P_0402_50V8J

SCL SDA

REF_0/CPU_SEL

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

CKPWRGD/PD#

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_CPU_IO

VDD_SRC

+1.05VS_CK505

+3VS_CK505

32 31 30 29 28 27 26 25

24 23 22 21 20 19 18 17

FBMH1608HM601-T_0603

CPU_SEL

1 2

CLK_XTAL_IN CLK_XTAL_OUT

CK_PWRGD

+1.5VS_CK505

1 2

R101

R10233_0402_5% R10233_0402_5%

10U_0805_10V4Z

1

C219

C220

2

0.1U_0402_16V4Z

PM_SMBCLK <11,12,17,27>

PM_SMBDATA <11,12,17,27>

CLK_14M_PCH <17>

CLK_BCLK <17> CLK_BCLK# <17>

CLK_XTAL_IN

C223

22P_0402_50V8J

0.1U_0402_16V4Z

1

C221

C222

2

0.1U_0402_16V4Z

CLK_XTAL_OUT

Y1

1 2

2

14.318MHZ_16PF_7A14300083

1

2

12

C252

C252 47P_0402_50V8J

47P_0402_50V8J

2

C224

C224 22P_0402_50V8J

22P_0402_50V8J

1

G

+3VS_CK505

12

R110

R110 10K_0402_5%

10K_0402_5%

CK_PWRGD

13

D

2

G

Q372N7002_SOT23-3

S

Silego Have Internal Pull-Up

H_STP_CPU#

CPU_SEL

IDT Have Internal Pull-Down

Remove C484 (for RF)

(Default)

0 133MHz

1

100MHz 100MHz

H

CLK_ENABLE# <42>

+3VS_CK505

R10510K_0402_5% R10510K_0402_5%

12

R11910K_0402_5% @ R11910K_0402_5% @

12

+1.05VS

R10610K_0402_5% R10610K_0402_5%

12

CPU_1/1#CPU_SEL CPU_0/0#

133MHz

LVDS / Int.Camera / Int.MIC Conn

0618 --> change camera power rail to +3VS

+LCD_VDD

12

3 3

2N7002DW-T/R7_SOT363-6

UMA_ENVDD<19>

UMA PD 100K ohm DIS PD 10K ohm

Q1A

R112

100K_0402_5%

61

remove choke co-layout for DFB request

4 4

USB20_N11<20>

USB20_P11<20>

A

R107

R107 150_0603_5%

150_0603_5%

2

5

1 2

+3VS

12

R120

R120 100K_0402_5%

100K_0402_5%

0.1U_0402_16V7K

1 2

R109 47K_0402_5%R109 47K_0402_5%

3

0.01U_0402_25V7K

Q1B

Q1B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

R93

CAM@R93

CAM@

1 2

0_0402_5%

0_0402_5% R92

CAM@R92

CAM@

1 2

0_0402_5%

B

C228

C229

+3VS

2

G

1

2

1

1 3

2

W=60mils

USB20_N11_R

USB20_P11_R

W=60mils

S

Q17

Q17 AO3413_SOT23

AO3413_SOT23

D

+LCD_VDD

1

C233

0.1U_0402_16V4Z

2

D84

@D84

W=20mils

+3VS_LVDS_CAM

+3VS

R398

0_0603_5%

1 2

CAM@

Camera

LCD_TXOUT0+<19> LCD_TXOUT0-<19> LCD_TXOUT1+<19> LCD_TXOUT1-<19> LCD_TXOUT2+<19> LCD_TXOUT2-<19> LCD_TXCLK+<19>

LCD_TXCLK-<19>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB20_P11_R

D

0.1U_0402_16V4Z

1 2

C231

CAM@C231

CAM@

JLVDS

@JLVDS

@

2

112

3 5 7

13 15 17 19 21 23 25 27 29

31 32

ACES_87242-3001-09

2010/06/21 2011/06/21

4

3

6

5

6

8

7

10

9910

12

111112

14

13

16

15

18

17

20

19

22

21

22

24

23

26

25

26

28

27

28

30

29

30

GND1 GND2

Compal Secret Data

E

INT_MIC_CLKUSB20_N11_R INT_MIC_DATA

BKOFF#_R

+LCDVDD_R

C234

68P_0402_50V8J

Deciphered Date

LCD_EDID_CLK <19> LCD_EDID_DATA <19>

+LCD_INV

Rated Current MAX:600mA

1

2

L2

FBMA-L11-201209-221LMA30T_0805

1

C235

0.1U_0402_25V6

2

F

+3VS

1

C232

0.1U_0402_16V4Z

2

12

@

2

1

3

PACDN042Y3R_SOT23-3

INT_MIC_CLK <29> INT_MIC_DATA <29>

PCH_PWM <19>

BKOFF#_R

B+

+LCDVDD_R

Title

SCHEMATICS, MB A6842

Size Document Number Rev

Custom

Date: Sheet

G

R137 33_0402_5%R137 33_0402_5%

12

R113

10K_0402_5%

0_0805_5%

1

C226

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

401981

12

1.5A, 60mils

L1

12

1

2

+LCD_VDD

C227

4.7U_0805_10V4Z

13 45Wednesday, September 01, 2010

BKOFF# <31>

of

H

B

A

CRT CONNECTOR

B

C

D

E

1

D3

DAN217_SC59

1 1

UMA_CRT_R<19>

UMA_CRT_G<19>

UMA_CRT_B<19>

1

12

R139

R138

150_0402_1%

2 2

1 2

C244 0.1U_0402_16V4ZC244 0.1U_0402_16V4Z

UMA_CRT_HSYNC<19>

UMA_CRT_VSYNC<19>

3 3

12

R140

150_0402_1%

SN74AHCT1G125GW_SOT353-5

1

C239

C238

2

2.2P_0402_50V8C

150_0402_1%

+CRT_VCC

2.2P_0402_50V8C

1

5

P

4

OE#

A2Y

G

U6

3

+CRT_VCC

5

P

A2Y

SN74AHCT1G125GW_SOT353-5

G

3

2

1

OE#

U7

DAN217_SC59

2

3

@

L3

1 2

NBQ100505T-800Y_0402

L4

1 2

NBQ100505T-800Y_0402

L5

1 2

NBQ100505T-800Y_0402

1

C240

2

2.2P_0402_50V8C

12

R141 10K_0402_5%R141 10K_0402_5%

D_CRT_HSYNC

4

C241

1

D4

DAN217_SC59

2

3

@

1

C242

2

2.2P_0402_50V8C

1 2

L6 10_0402_5%L6 10_0402_5%

1 2

L7 10_0402_5%L7 10_0402_5%

D5

DAN217_SC59

2

@

1

2

2.2P_0402_50V8C

1

C243

3

C245

C245 @

@

1

2

2.2P_0402_50V8C

1

C246

C246 @

@

2

10P_0402_50V8J

+3VS

CRT_R_L

CRT_G_L

CRT_B_L

HSYNC

VSYNCD_CRT_VSYNC

1

2

10P_0402_50V8J

+CRT_VCC

+5VS

2 3

CRT_R_L CRT_DDC_DAT

CRT_G_L HSYNC

CRT_B_L VSYNC

CRT_DDC_CLK

+CRT_VCC_R +CRT_VCC

D6

RB491D_SOT23-3

If=1A

F1

1

1.1A_6V_MINISMDC110F-2

21

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

ALLTO_C10532-11505-L_15P-T

ALLTO_C10532-11505-L_15P-T @

@

30mil

0.1U_0402_16V4Z@

JCRT

6 11 1 7 12 2 8 13 3 9 14 4 10 15 5

G G

C237

1

2

16 17

+3VS

+CRT_VCC

12

R146

2.2K_0402_5%

2

Q2A

UMA_CRT_DATA<19>

UMA_CRT_CLK<19>

1

C247

33P_0402_50V8K

4 4

A

2

@

B

5

2N7002DW-T/R7_SOT363-6

Q2B

4

2N7002DW-T/R7_SOT363-6

1

C248

C248 33P_0402_50V8K

33P_0402_50V8K

2

@

61

3

470P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C249

1

2

@

將

R146 and R147

12

R147

2.2K_0402_5%

CRT_DDC_DAT

CRT_DDC_CLK

1

C250

C250 470P_0402_50V8J

470P_0402_50V8J

2

@

2010/06/21 2011/06/21

C

阻值改為

2.2k-ohm

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

E

of

14 45Wednesday, September 01, 2010

of

14 45Wednesday, September 01, 2010

of

14 45Wednesday, September 01, 2010

B

5

4

3

2

1

0624 --> Remove BIOS ROM Debug Circuit

D D

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

15 45Wednesday, September 01, 2010

1

B

of

5

CMOS Setting, near DDR Door

PCH_RTCRST#

+RTCVCC

1 2

R282 20K_0402_1%R282 20K_0402_1%

iME Setting.

PCH_SRTCRST#

1 2

R284 20K_0402_1%R284 20K_0402_1%

D D

JCMOSJCMOS

1 2 1 2

C288 1U_0402_6.3V4ZC288 1U_0402_6.3V4Z

J2J2

1 2 1 2

C289 1U_0402_6.3V4ZC289 1U_0402_6.3V4Z

32.768KHZ_12.5PF_Q13MC14610002

+RTCVCC

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

HDA_SYNC

This signal has a weak internal pull down. H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V

*

HDA_SDO

This signal has a weak internal pull down. This signal can't PU

Flash Descriptor Security Overide

C C

HDA_DOCK_EN#

AZ_BITCLK_HD<29>

AZ_SYNC_HD<29>

AZ_RST_HD#<29>

AZ_SDOUT_HD<29>

ITPM Enabled

SPI_MOSI

B B

+3VALW +3VALW +3VALW +3VALW

12

@

@ R386

R386 200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_RST#PCH_JTAG_TDO PCH_JTAG_TDI

12

@

R355

R355 100_0402_5%

100_0402_5%

1 2

A A

R156 51_0402_5%R156 51_0402_5%

PCH_JTAG_TDO

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TCK PCH_JTAG_RST#

High - Enable Internal VRs (must be always pulled high)

Low = Enabled High = Disabled

R288 33_0402_5%R288 33_0402_5%

R290 33_0402_5%R290 33_0402_5%

R292 33_0402_5%R292 33_0402_5%

R294 33_0402_5%R294 33_0402_5%

*

1 2

Internal: Pull down 20k

High = Enabled Low = Disabled (Default)

12

@

@ R363

R363 200_0402_5%

200_0402_5%

12

@

@ R535

R535 100_0402_5%

100_0402_5%

PCH_JTAG_TCK

@

@ R536

R536 200_0402_5%

200_0402_5%

1 2

@

@ R537

R537 100_0402_5%

100_0402_5%

1 2

06/01 change R125 from 4.7K to 51 ohm

PCH JTAG Enable PCH JTAG Disable (Default) ES1 ES1ES2 ES2

RefDesPCH Pin

No Install

R358

No Install

R535

200ohm

R355

100ohm 100ohm

R354

200ohm

R537

100ohm 100ohm 51ohm 51ohm 51ohm

R156 R643

20Kohm 20Kohm

R353

10Kohm

5

200ohm 100ohm 200ohm

200ohm

10Kohm

No Install No Install No Install No Install 20Kohm 10Kohm

No Install

AZ_BITCLK

AZ_SYNC

AZ_RST#

AZ_SDOUT

No Install No Install No Install No Install No InstallR536 No Install 51ohm No Install No InstallNo Install

4

C287

15P_0402_50V8J

12

Y3

3

NC

2

NC

4

OSC

1

OSC

12

C290 15P_0402_50V8JC290 15P_0402_50V8J

1 2

R285 1M_0402_5%R285 1M_0402_5%

1 2

R275 330K_0402_5%R275 330K_0402_5%

PCH_SPKR<19,29>

AZ_SDIN0_HD<29>

remove SDN1 for MDC

R118 1K_0402_5%@R118 1K_0402_5%@

1 2

PWRME_CTRL#<31>

remove CR_CPPE# for JM385

+3VS

R273 1K_0402_5%

@

R643

R643 20K_0402_5%

20K_0402_5%

1 2 12

@

R364

R364 10K_0402_5%

10K_0402_5%

4

R283

10M_0402_5%

@

12

PCH_RTCX1 PCH_RTCX2

PCH_RTCRST# PCH_SRTCRST# SM_INTRUDER# PCH_INTVRMEN

AZ_BITCLK AZ_SYNC PCH_SPKR AZ_RST#

AZ_SDOUT

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_RST#

PCH_SPI_CLK PCH_SPI_CS0#

PCH_SPI_MOSI

12

PCH_SPI_MISO

3

U11A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

RTCIHDA

SPI JTAG

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA

SATAICOMPO

SATAICOMPI

SATA0GP / GPIO21 SATA1GP / GPIO19

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATALED#

D33 B33 C32 A32

C34 A34

remove FELICA_PWR#

F34 AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16 AF15

SATA_LED#

T3

PCH_GPIO21

Y9

PCH_GPIO19

V1

SERIRQ

1 2

R286 10K_0402_5%R286 10K_0402_5%

Desktop Only

remove eSATA SATA

SATAICOMP

R295 37.4_0402_1%R295 37.4_0402_1%

+3VS

2

LPC_AD0 <31,32> LPC_AD1 <31,32> LPC_AD2 <31,32> LPC_AD3 <31,32>

LPC_FRAME# <31,32>

SERIRQ <31,32>

+3VS

SATA_PRX_C_DTX_N1 <25> SATA_PRX_C_DTX_P1 <25> SATA_PTX_DRX_N1 <25> SATA_PTX_DRX_P1 <25>

SATA_PRX_C_DTX_N4 <25> SATA_PRX_C_DTX_P4 <25> SATA_PTX_DRX_N4 <25> SATA_PTX_DRX_P4 <25>

1 2

+1.05VS

4MB

For EMI Place near U13

PCH_SPI_CLK

12

R385

@

10_0402_5%

1

C16

@ C16

@

10P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

2010/06/21 2011/06/21

3

0.1U_0402_16V4Z

Compal Secret Data

1

C293

2

PCH_SPI_CS0# PCH_SPI_CLK

Deciphered Date

U13

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L3205DM2I-12G SO8

VSS

4

2

Q

SA00003K800 (WINBOND)

2

1

RTC schematic for non-chargeable

+RTCVCC

C291

0.1U_0402_16V4Z

0812 -> Add R277 for RTC reserve charge

1ST HDD

SATA ODD

PCH_SPI_MISOPCH_SPI_MOSIPCH_SPI_MOSI

Title

Size Document Number Rev

B

Date: Sheet

D10

2

1

CHN202UPT SC-70

2

SCHEMATICS, MB A6842

3

R277 1K_0402_5%R277 1K_0402_5%

@ JRTC

LOTES_AAA-BAT-054-K01

PCH_GPIO21

SATA_LED#

PCH_GPIO19

Compal Electronics, Inc.

401981

@

R302 10K_0402_5%R302 10K_0402_5%

R301 10K_0402_5%R301 10K_0402_5%

R306 10K_0402_5%R306 10K_0402_5%

1 2

1

+3VL

JRTC

+RTCBATT

12

1

+

-

2

+3VS

12

B

16 45Wednesday, September 01, 2010

of

5

D D

For LAN

For WLAN

C C

B B

+3VS

1 2

R24410K_0402_5% R24410K_0402_5%

1 2

R24810K_0402_5% R24810K_0402_5%

+3VALW

1 2

R24610K_0402_5% R24610K_0402_5%

1 2

R24510K_0402_5% R24510K_0402_5%

1 2

R24910K_0402_5% R24910K_0402_5%

1 2

A A

R25010K_0402_5% R25010K_0402_5%

1 2

R25110K_0402_5% R25110K_0402_5%

PCIE_PRX_C_LANTX_N1<28>

PCIE_PRX_C_LANTX_P1<28> PCIE_PTX_C_LANRX_N1<28> PCIE_PTX_C_LANRX_P1<28>

PCIE_PRX_WLANTX_N2<27>

PCIE_PRX_WLANTX_P2<27> PCIE_PTX_C_WLANRX_N2<27> PCIE_PTX_C_WLANRX_P2<27>

PCH_GPIO20

CLKREQ_WLAN#

CLKREQ_LAN#

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

C371 0.1U_0402_16V7KC371 0.1U_0402_16V7K

12

C340 0.1U_0402_16V7KC340 0.1U_0402_16V7K

12

C274 0.1U_0402_16V7KC274 0.1U_0402_16V7K

12

C275 0.1U_0402_16V7KC275 0.1U_0402_16V7K

12

LAN

CLK_LAN#<28> CLK_LAN<28>

CLKREQ_LAN#<28>

CLK_WLAN#<27> CLK_WLAN<27>

CLKREQ_WLAN#<27>

form CLKREQ_NEW# to PCH_GPIO20

form CLKREQ_JET# to PCH_GPIO25

form CLKREQ_CR# to PCH_GPIO26

4

PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1

PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2

remove NewCard PCIE

remove JET PCIE

remove CardReader PCIE

CLKREQ_LAN#

CLKREQ_WLAN#

remove NEWCARD CLK

PCH_GPIO20

remove JET CLK

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

NC

3

U11B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

PCI-E*

Controller

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

Clock Flex

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1 CL_DATA1 CL_RST1#

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

B9 H14 C8

J14 C6 G8

M14 E10 G12

T13 T11 T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

P43

T42

N50

EC_LID_OUT# PCH_SMBCLK PCH_SMBDATA

PCH_GPIO60

PCH_SMLCLK0

PCH_SMLDATA0

PCH_GPIO74

PCH_SMLCLK1

PCH_SMLDATA1

CLKREQ_PEG#

PCH_X1 PCH_X2

XCLK_RCOMP

for EMI request

CLK_PCILOOP

CLK_14M_PCH

2

+3VALW

EC_LID_OUT# <31>

+3VALW

1 2

R260 10K_0402_5%R260 10K_0402_5%

CLK_PEG# <5> CLK_PEG <5>

PCH_CLK_DMI# <13> PCH_CLK_DMI <13>

CLK_BCLK# <13> CLK_BCLK <13>

CLK_DOT# <13> CLK_DOT <13>

CLK_SATA# <13> CLK_SATA <13>

CLK_14M_PCH <13>

CLK_PCILOOP <20>

1 2

R252 90.9_0402_1%R252 90.9_0402_1%

1 2

R125 10_0402_5%

1 2

R70 100_0402_5%

R229 2.2K_0402_5%R229 2.2K_0402_5%

12

R230 2.2K_0402_5%R230 2.2K_0402_5%

12

PCH_SMBDATA

PCH_SMBCLK

2N7002DW-T/R7_SOT363-6

R233 2.2K_0402_5%R233 2.2K_0402_5%

12

R234 2.2K_0402_5%R234 2.2K_0402_5%

12

PCH_SMLDATA1

PCH_SMLCLK1

+3VALW

FROM CLK GEN FOR: 133/100/96/14.318 MHZWLAN

+1.05VS

@

C265 22P_0402_50V8J

@

C206 100P_0402_50V8J

Q3B

3

2

2N7002DW-T/R7_SOT363-6

Q3A

6 1

2

Q4A

6 1

2N7002DW-T/R7_SOT363-6

PCH_SMLCLK0

PCH_SMLDATA0 PCH_GPIO60 PCH_GPIO74

EC_LID_OUT#

C277

27P_0402_50V8J

C277

C277 0_0402_5%

0_0402_5%

@

1 2

@

12

R231 4.7K_0402_5%R231 4.7K_0402_5%

5

R232 4.7K_0402_5%R232 4.7K_0402_5%

4

5

Q4B

3

4

2N7002DW-T/R7_SOT363-6

R247 1M_0402_5%R247 1M_0402_5%

PCH_X1

1 2

25MHZ_20PF_7A25000012

1

2

Note: Stuff 0 ohm if

@

25MHz crystal un-stuff

1

PM_SMBDATA <11,12,13,27>

+3VS

EC_SMB_DA2 <31>

EC_SMB_CK2 <31>

12

Y2

PCH_X2

+3VS

PM_SMBCLK <11,12,13,27>

+3VALW

R2372.2K_0402_5% R2372.2K_0402_5%

12

R2382.2K_0402_5% R2382.2K_0402_5%

12

R23910K_0402_5% R23910K_0402_5%

12

R24010K_0402_5% R24010K_0402_5%

12

R24110K_0402_5% R24110K_0402_5%

12

1

C278

C278 27P_0402_50V8J

27P_0402_50V8J

2

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

17 45Wednesday, September 01, 2010

1

B

of

5

4

3

2

1

D D

DMI_CTX_PRX_N0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>

DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>

DMI_PTX_CRX_N0<6>

+1.05VS

@R330

@

R3250_0402_5% R3250_0402_5%

4

3

2.2K_0402_5%

1 2

DMI_PTX_CRX_N1<6> DMI_PTX_CRX_N2<6> DMI_PTX_CRX_N3<6>

DMI_PTX_CRX_P0<6> DMI_PTX_CRX_P1<6> DMI_PTX_CRX_P2<6> DMI_PTX_CRX_P3<6>

Close to PCH

XDP_DBRESET#<5>

PWROK

DRAMPWROK<5>

PCH_SUSPWRDN<31>

PBTN_OUT#<31>

ACIN_D <31>

PCH_RSMRST#

12

R326

10K_0402_5%

5

D15B

@D15B

@

BAV99DW-7_SOT363

R328

@ R328

@

1 2

R311 49.9_0402_1%R311 49.9_0402_1%

XDP_DBRESET# PCH_WAKE#

VGATE<31,42>

LAN_RST#

PCH_RSMRST#

PCH_SUSPWRDN

PCH_ACIN

PCH_LOW_BAT#

IBEX_RI#

for abnormal shutdowm from s3 resume

4

VGATE

1 2

R321 0_0402_5%R321 0_0402_5%

POK<36,38>

DMI_COMP

CH751H-40PT_SOD323-2

+3VALW

1 2

R316 10K_0402_5%R316 10K_0402_5%

1 2

R318 10K_0402_5%R318 10K_0402_5%

1 2

R320 10K_0402_5%R320 10K_0402_5%

PM_PWROK<31>

+3VALW

ACIN<31,37>

+3VALW

R690 1K_0402_5%@R690 1K_0402_5%@

EC_RSMRST#<31>

R329 10K_0402_5%R329 10K_0402_5% R322 10K_0402_5%R322 10K_0402_5% R323 10K_0402_5%R323 10K_0402_5%

R324 330K_0402_5%R324 330K_0402_5%

1 2

C C

B B

A A

RSMRST# circuit

PCH_SUSPWRDN PCH_LOW_BAT#

12 12 12

0.1U_0402_16V4Z

VGATE

1 2

D26

CH751H-40PT_SOD323-2

MMBT3906_SOT23-3

+3VALW

BAV99DW-7_SOT363

5

IBEX_RI#

PM_PWROK PWROK

LAN_RST#

1 2

C272

21

4.7K_0402_5%@

4.7K_0402_5%@ @ D15A

@

12

R2560_0402_5%@R2560_0402_5%

+3VS

5

U12

1

P

IN1

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

R330

1 2

0_0402_5%

1 2

C

Q26

1

3

E

@

B

2

12

R327

1

D15A

2

6

4

U11C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

D29

2 1

D28

CH751H-40PT_SOD323-2

21

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

System Power Management

PCH_RSMRST#PWROK

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_LAN# / GPIO29

0716 --> Unmount : R327, Q26, D15A, D15B, R328, R690 Mount : R325, D29, D28

2010/06/21 2011/06/21

3

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

Compal Secret Data

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14 BF13 BH13 BJ12 BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

PCH_WAKE#

PM_CLKRUN#

SUS_STAT#

EC_CLK

Deciphered Date

FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>

FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>

FDI_INT <6> FDI_FSYNC0 <6> FDI_FSYNC1 <6> FDI_LSYNC0 <6> FDI_LSYNC1 <6>

PCH_WAKE# <28>

12

R319 8.2K_0402_5%R319 8.2K_0402_5%

T38PADT38PAD

EC_CLK <31>

PM_SLP_S5# <31>

PM_SLP_S4# <31>

PM_SLP_S3# <31>

PMSYNCH <5>

For EC Crystal cost down

2

+3VS

R313 10K_0402_5%R313 10K_0402_5%

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

12

1

+3VALW

18 45Wednesday, September 01, 2010

of

B

5

12

UMA_CRT_CLK

UMA_CRT_DATA

UMA_CRT_B UMA_CRT_G UMA_CRT_R

EC_ENBKL

+3VS

LCD_EDID_CLK

LCD_EDID_DATA

1 2

R124 100K_0402_5%R124 100K_0402_5%

+3VS

D D

+3VS

C C

R59 2.2K_0402_5%R59 2.2K_0402_5%

R60 2.2K_0402_5%R60 2.2K_0402_5%

12

R63 2.2K_0402_5%R63 2.2K_0402_5%

12

R61 2.2K_0402_5%R61 2.2K_0402_5%

1 2

R56 150_0402_1%R56 150_0402_1%

1 2

R57 150_0402_1%R57 150_0402_1%

1 2

R58 150_0402_1%R58 150_0402_1%

4

EC_ENBKL<31> UMA_ENVDD<13>

PCH_PWM<13>

LCD_EDID_CLK<13>

LCD_EDID_DATA<13>

1 2

R1433 10K_0402_5%R1433 10K_0402_5%

1 2

R54 10K_0402_5%R54 10K_0402_5%

1 2

R55 2.37K_0402_1%R55 2.37K_0402_1%

LCD_TXCLK-<13>

LCD_TXCLK+<13>

LCD_TXOUT0-<13> LCD_TXOUT1-<13> LCD_TXOUT2-<13>

LCD_TXOUT0+<13> LCD_TXOUT1+<13> LCD_TXOUT2+<13>

UMA_CRT_B<14> UMA_CRT_G<14> UMA_CRT_R<14>

UMA_CRT_CLK<14> UMA_CRT_DATA<14>

UMA_CRT_HSYNC<14> UMA_CRT_VSYNC<14>

R266

1K_0402_1%

EC_ENBKL

LCTL_CLK LCTL_DATA

LVDS_IBG

T15 PADT15 PAD

CRT_IREF

12

3

U11D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

LVDS

CRT

SDVO_TVCLKINN

SDVO_CTRLDATA

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLDATA

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_CTRLCLK

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

2

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44

R68 100K_0402_5%R68 100K_0402_5%

BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

1 2

For INTEL issue (pending interrupts from the PCH for unused HDMI ports)

R343 100K_0402_5%R343 100K_0402_5%

1 2

R77 100K_0402_5%R77 100K_0402_5%

1 2

1

PCH Strap Pin

B B

+3VS

PCH_SPKR

@

1 2

R269 1K_0402_5%

PCI_GNT#0

R2701K_0402_5% @ R2701K_0402_5% @

12

PCI_GNT#1

R2711K_0402_5% @ R2711K_0402_5% @

12

@

R272 1K_0402_5%

A A

PCI_GNT#3

12

Internal: Pull down 20k During Reset: HZ Initial: Low

PCH_SPKR <16,29>

Internal: Pull up 20k During Reset: High Initial: High

PCI_GNT#0 <20> PCI_GNT#1 <20>

Internal: Pull up 20k During Reset: High Initial: High

PCI_GNT#3 <20>

Internal: Pull up 20k During Reset: High Initial: High

NO REBOOT Strap

PCH_SPKR Low= Disable

Boot BIOS Strap PCI_GNT#1

High= Enable

PCI_GNT#0 Boot BIOS Loaction

0 0 1

0 1 0

11

A16 Swap Override Strap

PCI_GNT#3

Low= A16 swap override Enable High= A16 swap override Disable

LPC Reserved (NAND) PCI SPI (Default)

+1.8VS_PCH_NAND

@

R267 1K_0402_5%

R268 1K_0402_5%

12

@

12

Internal: Pull down 20k During Reset: Low Initial: Low

NV_ALE

NV_CLE

Internal: Pull down 20k During Reset: Low Initial: Low

NV_ALE <20>

NV_CLE <20>

Danbury Technology Enabled

NV_ALE

High = Enabled Low = Disabled (Default)

DMI Termination Voltage

NV_CLE

Low= Set to Vss (Default) High= Set to Vcc

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

19 45Wednesday, September 01, 2010

1

B

of

5

D D

+3VS

RP1

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP2

RP2

C C

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP3

RP3

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

GNT2#: Not pull low, internal pull up 20K

+3VS

RP4

B B

A A

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

+3VS

RP5

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

PCI_REQ#1 PCI_REQ#2 PCI_PIRQD# PCI_IRDY#

PCI_PIRQH# PCI_TRDY# PCI_FRAME# PCI_PIRQA#

PCI_STOP# PCI_PIRQE# PCI_PIRQC# PCI_PIRQG#

PCI_REQ#3 PCI_PIRQF# PCI_PIRQB# PCI_REQ#0

PCI_DEVSEL# PCI_PERR# PCI_SERR# PCI_PLOCK#

add PCI_REQ#2 for non-ODD_EN#

PCI_GNT#0<19> PCI_GNT#1<19>

PCI_GNT#3<19>

PLT_RST#<27,28,31,32>

CLK_PCI_DDR<32> CLK_PCI_EC<31>

CLK_PCILOOP<17>

T37 PADT37PAD

4

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

TP_PCI_RST# PCI_SERR#

PCI_PERR#

PCI_IRDY# PCI_DEVSEL#

PCI_FRAME# PCI_PLOCK# PCI_STOP#

PCI_TRDY#

CLK_SIO

12

CLK_EC

R28022_0402_5% R28022_0402_5%

12

CLK_PCH

R28122_0402_5% R28122_0402_5%

12

R27922_0402_5% R27922_0402_5%

3

U11E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

PCI

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_WR#0_RE# NV_WR#1_RE#

USB

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC6# / GPIO10 OC7# / GPIO14

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE

NV_CLE

NV_RCOMP

NV_RB#

NV_WE#_CK0 NV_WE#_CK1

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC5# / GPIO9

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

NV_RCOMP

AU2 AV7 AY8

AY5 AV11

BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22

HM55 USB port6/7 NC

B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25

USBBIAS

D25

N16 J16 F16 L16 E14 G16 F12 T15

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 EXP_CPPE#

R278 22.6_0402_1%R278 22.6_0402_1%

NV_ALE <19> NV_CLE <19>

@

1 2

R276 32.4_0402_1%

USB20_N0 <25> USB20_P0 <25> USB20_N1 <25> USB20_P1 <25>

USB20_N10 <26> USB20_P10 <26> USB20_N11 <13> USB20_P11 <13>

USB20_N13 <27> USB20_P13 <27>

12

USB_OC#0 <25,31>

2

BUF_PLT_RST#<5>

USB-LIGHT1 USB-LIGHT2

USB-Left1 remove eSATA remove NewCard remove BT

remove FingerPr remove FELICA

Card reader(2 in 1) Int. Camera

remove 3G/TV#1

WiMax(WLAN)

Within 500 mils

(USB-Right)

12

R129

R129 100K_0402_5%

100K_0402_5%

@

1 2

R253 0_0402_5%R253 0_0402_5%

+3VS

C477

0.1U_0402_16V4Z

1 2

5

U8

@U8

@

1

P

IN1

4

O

2

IN2

G

3

SN74AHC1G08DCKR_SC70-5

USB_OC#6 USB_OC#4 USB_OC#0 USB_OC#5

USB_OC#2 USB_OC#1 USB_OC#3 EXP_CPPE#

1

RP6

4 5 3 6 2 7 1 8

10K_0804_8P4R_5%

RP8

4 5 3 6 2 7 1 8

10K_0804_8P4R_5%

100K_0402_5%

1 2

+3VALW

PLT_RST#

R51

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

20 45Wednesday, September 01, 2010

1

B

of

5

4

3

2

1

pull down 100k to GND

U11F

GPIO8

D D

Not pull down

Internal: Pull up 20k During Reset: High Initial: High

GPIO15 a Strong pull up may be needed

for GPIO Functionality Internal: Pull down 20k

During Reset: Low Initial: Low

On-Die PLL VR

PCH_GPIO27

High = Enabled (Default) Low = Disabled

PROJECT_ID

Name

NBQAA 11.6/13.3"

C C

NBQAA 14" *NWQAA 16" NALAA 17.3"

+3VS

1 2 1 2 1 2 1 2 1 2 1 2 1 2

+3VALW

1 2 1 2 1 2 1 2 1 2

1 2

R225 10K_0402_5%R225 10K_0402_5%

1 2

R226 10K_0402_5%R226 10K_0402_5%

1 2

R227 1K_0402_5%R227 1K_0402_5%

1 2

R242 10K_0402_5%R242 10K_0402_5%

1 2

R222 10K_0402_5%R222 10K_0402_5%

1 2

R223 10K_0402_5%R223 10K_0402_5%

1 2

B B

A A

ID0

LL L H HH

PCH_GPIO1

R21410K_0402_5% R21410K_0402_5%

PCH_GPIO6

R21810K_0402_5% R21810K_0402_5%

EC_SCI#

R22410K_0402_5% R22410K_0402_5%

PCH_GPIO16

R22110K_0402_5% R22110K_0402_5%

PCH_GPIO17

R22010K_0402_5% R22010K_0402_5%

BT_DET#

R2158.2K_0402_5% R2158.2K_0402_5%

PCH_GPIO38

R21710K_0402_5% R21710K_0402_5%

PCH_GPIO39

R25410K_0402_5% R25410K_0402_5%

PROJECT_ID0

R25510K_0402_5% R25510K_0402_5%

PROJECT_ID1

R21610K_0402_5% R21610K_0402_5%

PCH_GPIO48

R25710K_0402_5% R25710K_0402_5%

THM_ALT#

R25910K_0402_5% R25910K_0402_5%

BT_PWR#

R26110K_0402_5% R26110K_0402_5%

EC_SMI# PCH_GPIO57 PCH_GPIO15 PCH_GPIO28 LVDS_SEL RST_GATE PCH_GPIO12

R21910K_0402_5% R21910K_0402_5%

ID1

H L

change Netname from RF_OFF# to PCH_GPIO17

change R254 to 10k and Netname from CIR_EN# to PCH_GPIO39

change Netname from ISDBT_DET to PCH_GPIO39

add R261 10k for BT fun

LVDS_SEL=H for Single Channel LVDS

R189 100K_0402_5%R189 100K_0402_5%

1 2

EC_SCI#<31> EC_SMI#<31>

@

12

R274 1K_0402_5%

BT_PWR#<27>

RST_GATE<5>

THM_ALT#<31>

PCH_HDMI_HPD PCH_GPIO1 PCH_GPIO6 EC_SCI# EC_SMI# PCH_GPIO12 PCH_GPIO15 PCH_GPIO16 PCH_GPIO17 BT_DET#

PCH_GPIO27 PCH_GPIO28

remove BT_RST#

PROJECT_ID0 PROJECT_ID1 PCH_GPIO38 PCH_GPIO39 LVDS_SEL RST_GATE PCH_GPIO48 THM_ALT# PCH_GPIO57

U11F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8

TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 NC_1 NC_2 NC_3 NC_4 NC_5

INIT3_3V#

TP24

AH45 AH46

AF48 AF47

GATEA20

U2

AM3 AM1 BG10

KB_RST#

T1 BE10

THRMTRIP_PCH#

BD10

BA22 AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39

Not pull low internal pull up

P6 C10

Internal: Pull up 20k During Reset: High Initial: High

1 2

R212 56_0402_1%R212 56_0402_1%

GATEA20 <31>

CLK_CPU_BCLK# <5> CLK_CPU_BCLK <5> PECI <5> KB_RST# <31> H_PWRGOOD <5> H_THERMTRIP# <5>

1 2

R210 56_0402_1%R210 56_0402_1%

+VTT

@

@ @

@

PROJECT_ID0 PROJECT_ID1

5

1 2

R416 10K_0402_5%

1 2

R415 10K_0402_5%

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

21 45Wednesday, September 01, 2010

1

B

of

5

4

3

2

1

+1.05VS

1

C295

10U_0805_10V4Z

D D

C C

B B

10U_0805_10V4Z

1 2

C304 10U_0805_10V4ZC304 10U_0805_10V4Z

1 2

C305 1U_0402_6.3V4ZC305 1U_0402_6.3V4Z

1 2

C306 1U_0402_6.3V4ZC306 1U_0402_6.3V4Z

1 2

C307 1U_0402_6.3V4ZC307 1U_0402_6.3V4Z

1 2

C308 1U_0402_6.3V4ZC308 1U_0402_6.3V4Z

C310 0.1U_0402_16V4ZC310 0.1U_0402_16V4Z

1

C294

C294 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+1.05VS

+3VS

12

+PCH_VRM

+1.05VS

U11G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

1432mA

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

POWER

40mA

3062mA

375mA

37mA

69mA

CRTLVDS

> 1mA

VCC CORE

59mA

375mA

HVCMOS

196mA

61mA

DMI

PCI E*

156mA

NAND / SPI

85mA

FDI

VCCADAC[1]

VCCADAC[2] VSSA_DAC[1] VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2] VCC3_3[3] VCC3_3[4]

VCCVRM[2]

VCCDMI[1] VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

AE50 AE52 AF53 AF51

AH38 AH39

AP43 AP45 AT46 AT45

AB34 AB35 AD35

close to AB34

AT24

AT16 AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

close to Ak13

AM8 AM9 AP11 AP9

close to AM8

+3VS

0.01U_0402_25V7K

+3VS

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C303

C303

1

+PCH_VRM

+PCH_VCCDMI

1

C309

C309 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

close to AT16

+1.8VS_PCH_NAND

2

C311

0.1U_0402_16V4Z

1

+3VS

2

C313 0.1U_0402_16V4ZC313 0.1U_0402_16V4Z

1

+3VS_VCCADAC

C296

0.01U_0402_25V7K

close to AE50

C300

1 2

R335 0_0603_5%R335 0_0603_5%

1 2

R338 0_0603_5%R338 0_0603_5%

Add R52 for CRT wave issue at pre-MP

L12

2.2_0603_1%

Change L12 to 2.2 ohm for CRT issue at pre-MP

2

C297

0.1U_0402_16V4Z

1

+1.8VS

C299

0.01U_0402_25V7K

+VTT

+1.8VS

1 2

0_0603_5%

1

C298

C298 10U_0805_10V4Z

10U_0805_10V4Z

2

R52

+3VS

12

R336 0_0402_5%R336 0_0402_5%

+1.8VS+PCH_VRM

12

A A

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

22 45Wednesday, September 01, 2010

1

B

of

5

4

3

2

1

0.1U_0402_16V4Z

+1.05VS

+PCH_VCC5REFSUS

+PCH_VCC5REF

+1.05VS

+PCH_VCCME1 +PCH_VCCME2 +PCH_VCCME3 +PCH_VCCME4

+VCC_HDA

1

C350

C350 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+1.05VS

1

C316

C316 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+3VALW

2

C325

C321

D16

+3VS

2

C333

0.1U_0402_16V4Z

1

+3VS

C337 0.1U_0402_16V4ZC337 0.1U_0402_16V4Z

+PCH_VRM

1

C342

C342 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

R351 0_0402_5%R351 0_0402_5%

1 2

R352 0_0402_5%R352 0_0402_5%

1 2

R353 0_0402_5%R353 0_0402_5%

1 2

R354 0_0402_5%R354 0_0402_5%

1 2

R356 0_0402_5%R356 0_0402_5%

1 2

C325

0.1U_0402_16V4Z

1

+5VALW+3VALW

12

21

R344

100_0402_1%

CH751H-40PT_SOD323-2

C326 1U_0402_6.3V4ZC326 1U_0402_6.3V4Z

12

+1.05VS

Remove VCCSUSHDA can be either 1.5V or 3.3V

2

+3VS

12

+1.05VS

+3VALW

Title

Size Document Number Rev

Custom

Date: Sheet

CH751H-40PT_SOD323-2

+PCH_VCC5REF

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

D17

21

1

2

1

C330

C330 1U_0402_6.3V4Z

1U_0402_6.3V4Z

23 45Wednesday, September 01, 2010

+5VS

12

R346

100_0402_1%

of

B

POWER

U11J

AP51

VCCACLK[1]

AP53

VCCACLK[2]

AF23

VCCLAN[1]

VccLAN may be grounded if Intel LAN is disabled

D D

+1.05VS

If two VccME rails can be combined, only total 2 x 22 µF and 2 x 1 µF caps are necessary

Near AD38

C391

22U_0805_6.3V6M

1

22U_0805_6.3V6M

2

C322

+TP_PCH_VCCDSW

12

C320 0.1U_0402_16V4ZC320 0.1U_0402_16V4Z

1

C318

C318 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

Near V39

1

C323

22U_0805_6.3V6M

2

+1.05VS

C334

1U_0402_6.3V4Z

C345 4.7U_0603_6.3V6KC345 4.7U_0603_6.3V6K C346 0.1U_0402_16V4ZC346 0.1U_0402_16V4Z C347 0.1U_0402_16V4ZC347 0.1U_0402_16V4Z

C351 0.1U_0402_16V4ZC351 0.1U_0402_16V4Z

C348 1U_0402_6.3V4ZC348 1U_0402_6.3V4Z

C349 0.1U_0402_16V4ZC349 0.1U_0402_16V4Z

4

C323

1

2

1 2 1 2 1 2

1 2

C447

22U_0805_6.3V6M

C C

+1.05VS

B B

Reseve R349 for L17 Filter Cap.

R349 0_0603_5%R349 0_0603_5%

1 2

L18

1 2

10UH_LB2012T100MR_20%

C80

C80 10U_0805_10V4K

10U_0805_10V4K

change cap to 10uf for cost

1

2

1

C329

C329 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

C332

C332 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

12

R347

R347 0_0603_5%

0_0603_5% @

@

Short AF34, AH34 and AF32 power for HDMI Deep Color

Remove HDA power rail to +1.5V

A A

5

1

C324

C324 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+VCCRTCEXT

1 2

C327 0.1U_0402_16V4ZC327 0.1U_0402_16V4Z

+PCH_VRM

+1.05VS_PCHDPLL_A

+1.05VS_PCHDPLL_B

1U_0402_6.3V4Z

1

C336

C335

2

1U_0402_6.3V4Z

1 2

C338 0.1U_0402_16V4ZC338 0.1U_0402_16V4Z

+V1.1A_INT_VCCSUS

1 2

C341 0.1U_0402_16V4ZC341 0.1U_0402_16V4Z

+3VALW

1 2

C343 0.1U_0402_16V4ZC343 0.1U_0402_16V4Z

+3VS

1 2

C344 0.1U_0402_16V4ZC344 0.1U_0402_16V4Z

+VTT

+RTCVCC

AF24

VCCLAN[2]

Y20

DCPSUSBYP

AD38

VCCME[1]

AD39

VCCME[2]

AD41

VCCME[3]

AF43

VCCME[4]

AF41

VCCME[5]

AF42

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

V9

DCPRTC

196mA

AU24

VCCVRM[3]

68mA

BB51

VCCADPLLA[1]

BB53

VCCADPLLA[2]

69mA

BD51

VCCADPLLB[1]

BD53

VCCADPLLB[2]

AH23

VCCIO[21]

1

2

AJ35

VCCIO[22]

AH35

VCCIO[23]

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

+VCCSST

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VCCIO[4]

V12

DCPSST

Y22

DCPSUS

163mA

P18

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

375mA

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

> 1mA

AT18

V_CPU_IO[1]

AU18

V_CPU_IO[2]

A12

VCCRTC

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

Issued Date

POWER

V24

VCCIO[5]

52mA

3062mA

VCCSUS3_3[1]

USB

163mA

> 1mA

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

V5REF_SUS

320mA

1849mA

> 1mA

Clock and Miscellaneous

3062mA

31mA

VCC3_3[10]

375mA

VCC3_3[11] VCC3_3[12]

PCI/GPIO/LPC

VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1] VCCSATAPLL[2]

196mA

VCCVRM[4]

SATA

3062mA

PCI/GPIO/LPC

1849mA

CPU

2mA

6mA

HDA

VCCSUSHDA

RTC

2010/06/21 2011/06/21

3

V26

VCCIO[6]

Y24

VCCIO[7]

Y26

VCCIO[8]

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23 V23

VCCIO[56]

F24

K49

V5REF

J38

VCC3_3[8]

L38

VCC3_3[9]

M36 N36 P36 U35

AD13

AK3 AK1

AH22

VCCIO[9]

AT20

AH19

VCCIO[10]

AD20

VCCIO[11]

AF22

VCCIO[12]

AD19

VCCIO[13]

AF20

VCCIO[14]

AF19

VCCIO[15]

AH20

VCCIO[16]

AB19

VCCIO[17]

AB20

VCCIO[18]

AB22

VCCIO[19]

AD22

VCCIO[20]

AA34

VCCME[13]

Y34

VCCME[14]

Y35

VCCME[15]

AA35

VCCME[16]

L30

Compal Secret Data

Deciphered Date

5

U11I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

D D

C C

B B

A A

B7

VSS[169]

BG12

VSS[170]

BB12

VSS[171]

BB16

VSS[172]

BB20

VSS[173]

BB24

VSS[174]

BB30

VSS[175]

BB34

VSS[176]

BB38

VSS[177]

BB42

VSS[178]

BB49

VSS[179]

BB5

VSS[180]

BC10

VSS[181]

BC14

VSS[182]

BC18

VSS[183]

BC2

VSS[184]

BC22

VSS[185]

BC32

VSS[186]

BC36

VSS[187]

BC40

VSS[188]

BC44

VSS[189]

BC52

VSS[190]

BH9

VSS[191]

BD48

VSS[192]

BD49

VSS[193]

BD5

VSS[194]

BE12

VSS[195]

BE16

VSS[196]

BE20

VSS[197]

BE24

VSS[198]

BE30

VSS[199]

BE34

VSS[200]

BE38

VSS[201]

BE42

VSS[202]

BE46

VSS[203]

BE48

VSS[204]

BE50

VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208]

BF49

VSS[209]

BF51

VSS[210]

BG18

VSS[211]

BG24

VSS[212]

BG4

VSS[213]

BG50

VSS[214]

BH11

VSS[215]

BH15

VSS[216]

BH19

VSS[217]

BH23

VSS[218]

BH31

VSS[219]

BH35

VSS[220]

BH39

VSS[221]

BH43

VSS[222]

BH47

VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251]

AF39

VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

5

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

U11H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@

Compal Secret Data

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

2

AK30

VSS[80]

AK31

VSS[81]

AK32

VSS[82]

AK34

VSS[83]

AK35

VSS[84]

AK38

VSS[85]

AK43

VSS[86]

AK46

VSS[87]

AK49

VSS[88]

AK5

VSS[89]

AK8

VSS[90]

AL2

VSS[91]

AL52

VSS[92]

AM11

VSS[93]

BB44

VSS[94]

AD24

VSS[95]

AM20

VSS[96]

AM22

VSS[97]

AM24

VSS[98]

AM26

VSS[99]

AM28

VSS[100]

BA42

VSS[101]

AM30

VSS[102]

AM31

VSS[103]

AM32

VSS[104]

AM34

VSS[105]

AM35

VSS[106]

AM38

VSS[107]

AM39

VSS[108]

AM42

VSS[109]

AU20

VSS[110]

AM46

VSS[111]

AV22

VSS[112]

AM49

VSS[113]

AM7

VSS[114]

AA50

VSS[115]

BB10

VSS[116]

AN32

VSS[117]

AN50

VSS[118]

AN52

VSS[119]

AP12

VSS[120]

AP42

VSS[121]

AP46

VSS[122]

AP49

VSS[123]

AP5

VSS[124]

AP8

VSS[125]

AR2

VSS[126]

AR52

VSS[127]

AT11

VSS[128]

BA12

VSS[129]

AH48

VSS[130]

AT32

VSS[131]

AT36

VSS[132]

AT41

VSS[133]

AT47

VSS[134]

AT7

VSS[135]

AV12

VSS[136]

AV16

VSS[137]

AV20

VSS[138]

AV24

VSS[139]

AV30

VSS[140]

AV34

VSS[141]

AV38

VSS[142]

AV42

VSS[143]

AV46

VSS[144]

AV49

VSS[145]

AV5

VSS[146]

AV8

VSS[147]

AW14

VSS[148]

AW18

VSS[149]

AW2

VSS[150]

BF9

VSS[151]

AW32

VSS[152]

AW36

VSS[153]

AW40

VSS[154]

AW52

VSS[155]

AY11

VSS[156]

AY43

VSS[157]

AY47

VSS[158]

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

1

B

24 45Wednesday, September 01, 2010

of

1

of

5

4

3

2

1

SATA HDD Conn.

+5VS

D D

+3VS

C C

24 23

this is temp. footprint

Place closely JHDD SATA CONN.

1.2A

1

C356

C356 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C357

0.1U_0402_16V4Z

2

SSD HDD need 400mA for 3V(PHISON)

+3VS rail reserve for SSD

GND

GND GND GND

GND

Reserved

GND

A+

AB-

B+

V33 V33 V33

V5 V5 V5

V12 V12 V12

1

C364

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_N1

SATA_PRX_DTX_N1 SATA_PRX_DTX_P1

1

C363

C363 10U_0805_10V4Z

10U_0805_10V4Z @

@

2

JHDD

@JHDD

@

GND GND

SANTA_191201-1

1

C358

0.1U_0402_16V4Z

2

1

C365

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

+3VS

+5VS

1

C359

0.1U_0402_16V4Z

2

1

C366

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

2

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

1 2

SATA_PTX_DRX_P1 <16>

SATA_PTX_DRX_N1 <16>

SATA_PRX_C_DTX_N1 <16> SATA_PRX_C_DTX_P1 <16>

SATA ODD Conn

JODD

@JODD

@

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

15

GND

14

GND

SANTA_206401-1_RV

+5VS

GND GND

1.1A

1

C352

C352 10U_0805_10V4Z

10U_0805_10V4Z

2

12 13

SATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4

SATA_PRX_DTX_N4 SATA_PRX_DTX_P4

+5VS

C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K

1 2

C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K

1 2

C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K

1 2

C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K

1 2

Place components closely ODD CONN.

1

C353

C353 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C354

C354 @

@

1U_0402_6.3V4Z

1U_0402_6.3V4Z 2

1

C355

0.1U_0402_16V4Z

2

1

C360

0.1U_0402_16V4Z

2

SATA_PTX_DRX_P4 <16>

SATA_PTX_DRX_N4 <16>

SATA_PRX_C_DTX_N4 <16> SATA_PRX_C_DTX_P4 <16>

USB Conn. (2 Port)

B B

VOUT VOUT

FLG

W=60mils

@

8

C361 1000P_0402_50V7K

7 6 5

1

C362

4.7U_0805_10V4Z

2

@

For EMI request

12

USB_OC#0 <20,31>

USB20_N0<20>

USB20_P0<20>

USB20_N1<20>

USB20_P1<20>

4

W=80mils

+5VALW +USB_VCCA

USB_EN#<31>

A A

5

1.4A

U48

1

GND

2

VIN VIN3VOUT

4

EN

RT9715BGS_SO8

Reserve for EMI request

R73 0_0402_5%@R73 0_0402_5%@

1 2

L53

1

4

WCM-2012-900T_0805

WCM-2012-900T_0805 R86 0_0402_5%@R86 0_0402_5%@

1 2

Reserve for EMI request

R88 0_0402_5%@R88 0_0402_5%@

1 2

L54

1

4

WCM-2012-900T_0805

WCM-2012-900T_0805 R87 0_0402_5%@R87 0_0402_5%@

1 2

2

3

2

3

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB20_N0_R

USB20_P0_R

USB20_N1_R

USB20_P1_R

Issued Date

3

+USB_VCCA +USB_VCCA

C18

220U_6.3V_M

USB20_N0_R USB20_P0_R

PJDLC05_SOT23-3

2010/06/21 2011/06/21

+

C19

0.1U_0402_16V4Z

0.1U_0402_16V4Z C20

C20

1000P_0402_50V7K

3

D7

@D7

@

1

Compal Secret Data

12

2

Deciphered Date

W=60mils

JUSB1

1

GND

VCC

2

GND

D-

3

GND

D+

4

GND

ALLTOP C107L8-10405-L

@JUSB1

@

5 6 7 8

2

USB20_N1_R USB20_P1_R

PJDLC05_SOT23-3

W=60mils

C21

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z C22

C22

12

1000P_0402_50V7K

3

D8

@D8

@

1

Title

Size Document Number Rev

Date: Sheet

USB-LIGHT2USB-LIGHT1

JUSB2

@JUSB2

@

VCC DD+ GND

GND GND GND GND

5 6 7 8

1 2 3 4

ALLTOP C107L8-10405-L

2

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

of

25 45Wednesday, September 01, 2010

of

25 45Wednesday, September 01, 2010

of

1

25 45Wednesday, September 01, 2010

B

5

4

3

2

1

For EMI request

1 2

D D

+3VS +3VS_CR

RC3

RC3 0_0603_5%

0_0603_5%

CC2 100P_0402_50V8J@CC2 100P_0402_50V8J@

RC2

6.19K_0402_1%

CC3

1

CC4

4.7U_0805_10V4Z

2

CC3, CC4, CC5, CC6, CC7, RC2, RC3, UC1 form CARD@ to mount

1

0.1U_0402_16V4Z

2

12

+3VS_CR

USB20_N10<20>

+VCC_3IN1

1

2

CC7

CC7 1U_0402_6.3V4Z

1U_0402_6.3V4Z

SDWP_MSCLK SD_DATA1

SD_DATA0

USB20_N10 USB20_P10

+V1_8

1 2

3 4

5 6

7 8

9 10 11 12

UC1

REFE DM

DP 3V3_IN

CARD_3V3 V18

XD_CD# SP1

SP2 SP3 SP4 SP5

EPAD

RTS5137-GR_QFN24_4X4

25

GPIO0

CLK_IN

XD_D7

SP14 SP13 SP12 SP11 SP10

SP9 SP8 SP7 SP6

CLK_48M_CR

0620 --> remove CR_LED#

17

CLK_48M_CR

24 23 22

SD_DATA2_MS_DATA5

21

MS_DATA1_SD_DATA3

20 19

SDCMD

18 16

MS_DATA2_SDCLK

15 14

SDCD#

13

RC6 10_0402_5%@RC6 10_0402_5%@

1 2

CLK_48M_CR <13>USB20_P10<20>

CC10 10P_0402_50V8J@CC10 10P_0402_50V8J@

1 2

< 48MHz >

0620 --> remove CARD-RADER LED

0715 --> change P/N to RTS5137 (SA000043500)

C C

< 2 in 1 Card Reader >

0624 --> change CARDREADER conn.

JREAD

@JREAD

@

MS_DATA1_SD_DATA3

1

D3

SDCMD

2

CMD

3

VSS1

VDD

CLK

VSS2

4

MS_DATA2_SDCLK

5 6

SD_DATA0

7

D0

SD_DATA1

8

D1

SD_DATA2_MS_DATA5

9

D2

SDWP_MSCLK

10

WP

SDCD#

11

CD

1

CC6

0.1U_0402_16V4Z

2

+VCC_3IN1

1

CC5

CC5 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

12

GND1

13

GND2

14

GND3

15

B B

TAITW_PSDAT3-09GLAS1N14N

GND4

For EMI request

MS_DATA2_SDCLK

SDWP_MSCLK

A A

5

4

RC4 10_0402_5%@RC4 10_0402_5%@

RC5 10_0402_5%@RC5 10_0402_5%@

1 2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

CC8 10P_0402_50V8J@CC8 10P_0402_50V8J@

CC9 10P_0402_50V8J@CC9 10P_0402_50V8J@

1 2

Compal Secret Data

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

26 45Wednesday, September 01, 2010

1

B

of

WLAN&BT Combo module circuits

**If +3V_WLAN is +3VS, please remove D24.

SUSP#<31,34,41>

BT_CRTL

BT_PWR#

D24

CH751H-40PT_SOD323-2

BT_PWR#<21>

BT on module

Enable Disable

BT on module

HI LO

LO HI

@D24

@

BT_CTRL

21

13

D

2

G

Q36 2N7002_SOT23-3

S

BT@

CLKREQ_WLAN#<17>

PCIE_PRX_WLANTX_N2<17> PCIE_PRX_WLANTX_P2<17>

PCIE_PTX_C_WLANRX_N2<17> PCIE_PTX_C_WLANRX_P2<17>

E51_TXD<31>

E51_RXD<31>

Debug card using

PCIe Mini Card-WLAN/WiMax

JWLAN

1

2

3

BT_CTRL

CLK_WLAN#<17> CLK_WLAN<17>

+3V_WLAN

1 2

R16 0_0402_5%R16 0_0402_5%

1 2

R17 0_0402_5%R17 0_0402_5%

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

FOX_AS0B226-S40N-7F@

Slot#1 Half PCIe Mini Card-WLAN/WiMax

+3V_WLAN

+1.5VS

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

2 A1 A

PLT_RST#

WL_OFF# <31> PLT_RST# <20,28,31,32>

PM_SMBCLK <11,12,13,17> PM_SMBDATA <11,12,13,17>

USB20_N13 <20> USB20_P13 <20>

WiMaxWLAN/ WiFi

+3VALW

Short PJ27 for WiFi(WLAN)/WiMax combo module Short PJ26 for WiFi(WLAN) module only.

+1.5VS

CM7

0.01U_0402_25V7K

+3VS

0.1U_0402_16V4Z

1

CM8

2

PJ27 JUMP_43X79@PJ27 JUMP_43X79@

2

PJ26 JUMP_43X79@PJ26 JUMP_43X79@

1

CM9

2

4.7U_0805_10V4Z

112

1

12

47P_0402_50V8J

2

@

@ C254

C254

+3V_WLAN

0.1U_0402_16V4Z

1

CM1

CM2

2

0.01U_0402_25V7K

1

CM3

2

4.7U_0805_10V4Z

For SEDFor SED

1

12

47P_0402_50V8J

2

@

@ C253

C253

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

SCHEMATICS, MB A6842

401981

Wednesday, September 01, 2010

of

27 45

of

27 45

of

27 45

B

A

B

C

D

E

3/19 --> Change JLAN for don't support LAN LED fuction

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8105E-GR QFN _6X6

0715 --> change P/N to SA00003PO20 (RTL8105E-VC )

0_0402_5%

0715 --> RL4 is unmount, RL23 mount for RTL8105E-VC

CL42 1000P_0402_50V7KCL42 1000P_0402_50V7K

CL41 1000P_0402_50V7KCL41 1000P_0402_50V7K

RL22 1K_0402_5%RL22 1K_0402_5%

1 2

+LAN_VDDREG

PCIE_PRX_LANTX_P1 PCIE_PRX_LANTX_N1

RL19 0_0402_5%RL19 0_0402_5%

LAN_X1 LAN_X2

PCH_WAKE#

ISOLATEB

ENSWREG

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

CL1 0.1U_0402_16V7KCL1 0.1U_0402_16V7K

PCIE_PRX_C_LANTX_P1<17> PCIE_PRX_C_LANTX_N1<17>

1 1

+3V_LAN

PCH_WAKE#

1 2

RL3 100K_0402_5%@RL3 100K_0402_5%@

2 2

Add RL10 for +3V_LAN power enable signal

3 3

Add RL11 for wake on LAN function enable signal

+3VS +3V_LAN

12

RL6

1K_0402_1% @

ISOLATEB

RL7

15K_0402_5%

ISOLATEB

RL10

RL11

0_0402_5%@

0_0402_5%

1 2

CL2 0.1U_0402_16V7KCL2 0.1U_0402_16V7K

1 2

PCIE_PTX_C_LANRX_P1<17> PCIE_PTX_C_LANRX_N1<17>

CLKREQ_LAN#<17>

PLT_RST#<20,27,31,32>

CLK_LAN<17> CLK_LAN#<17>

PCH_WAKE#<18>

+3V_LAN

RL22 need always pull-high for RTL8105E Efuse mode

WOL_EN# <31,34>

WOL_EN <31>

3/29 --> swap Line and PHY signal

UL3

LAN_MDI1LAN_MDI1+

LAN_MDI0- RJ45_GND LANGND LAN_MDI0+

Place these components colsed to LAN chip

4 4

1

CL34

0.1U_0402_25V6

2

UL3

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

LFE8456E-R

TX+

RX+

RJ45_MIDI1-

16

RJ45_MIDI1+

15

TX-

14

CT

13

NC

12

NC

11

CT

RJ45_MIDI0-

10

RJ45_MIDI0+

9

--> Pin40, 37 change to NC Pin

LED3/EEDO LED1/EESK

LED0

EECS/SCL

EEDI/SDA

MDIP0 MDIN0 MDIP1

MDIN1 NC/MDIP2 NC/MDIN2 NC/MDIP3 NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10 AVDD10

AVDD10 AVDD10 AVDD10

REGOUT

+3V_LAN

RL4

@ RL4

@

ENSWREG

RL23

12

1 2

RL15 75_0402_1%RL15 75_0402_1%

1 2

RL13 75_0402_1%RL13 75_0402_1%

31 37 40

RL2 10K_0402_5%RL2 10K_0402_5%

30

RL1 10K_0402_5%RL1 10K_0402_5%

32

LAN_MDI0+

1

LAN_MDI0-

2

LAN_MDI1+

4

LAN_MDI1-

5 7 8 10 11

13

+LAN_VDD10

29 41

27

+3V_LAN

39 12

+3V_LAN

42 47 48

21

+LAN_EVDD10

3

+LAN_VDD10

6 9 45

+LAN_REGOUT

36

4/2->remove RL8, RL9, CL11

CL26

27P_0402_50V8J

12 12

25MHZ_20PF_7A25000012

1

2

RJ45_GND

8/16 --> change P/N to SP050006E00(MHPC NS681610)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

0715 --> LL1, CL13, CL9, LL3, CL28, CL29 are unmount for RTL8105E-VC

LL1,CL13 will be changed to

2.2uH&4.7uF after EVT test

LL1

@LL1

+LAN_REGOUT

2.2UH +-5% NLC252018T-2R2J-N

Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1 +LAN_REGOUT: Width =60mil

+LAN_VDD10

@

1 2

4.7U_0603_6.3V6K

12

LL20_0603_5% LL20_0603_5%

1U_0402_6.3V4Z

CL18

CL13

@CL13

@

1

2

1

2

+LAN_EVDD10

2

1

Close to Pin 21

+LAN_VDDREG

12

LL30_0603_5% @LL30_0603_5% @

4.7U_0603_6.3V6K

YL1

LAN_X2LAN_X1

1 2

1

CL27

27P_0402_50V8J

2010/06/21 2011/06/21

2

CL36

1 2

1000P_1808_3KV7K

D69

D69 PJDLC05_SOT23-3

PJDLC05_SOT23-3

Compal Secret Data

Deciphered Date

1

CL28

@CL28

@

2

RJ45_MIDI1+

RJ45_MIDI0+

2

3

1

8/16->Add CL39 for EMI request Add D69 for ESD

D

2

CL9

@CL9

@

0.1U_0402_16V4Z

1

CL17

0.1U_0402_16V4Z

2

CL29

@CL29

@

0.1U_0402_16V4Z

1

RJ45_MIDI1-

RJ45_MIDI0-

2

CL39

CL39 120P_0402_50V8J

120P_0402_50V8J

1

C10,CL4,CL5,CL6,CL7 close to Pin 27,39,12,47,48

CL19,CL20,CL21,CL22 close to Pin 3,13,29,45

1 2

1 2 1 2 1 2 1 2

+3V_LAN+LAN_VDD10

CL100.1U_0402_16V4Z CL100.1U_0402_16V4Z

CL40.1U_0402_16V4Z CL40.1U_0402_16V4Z CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z CL70.1U_0402_16V4Z CL70.1U_0402_16V4Z

+LAN_VDD10

CL190.1U_0402_16V4Z CL190.1U_0402_16V4Z CL200.1U_0402_16V4Z CL200.1U_0402_16V4Z CL210.1U_0402_16V4Z CL210.1U_0402_16V4Z CL220.1U_0402_16V4Z CL220.1U_0402_16V4Z

LAN Conn.

JLAN

@JLAN

@

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130452-C

1

CL37

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

Custom

Date: Sheet

1

@CL37

@

CL38

4.7U_0603_6.3V6K

2

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

@CL38

@

SHLD1 SHLD2

9 10

28 45Wednesday, September 01, 2010

E

B

of

A

B

C

D

Codec

+DVDD_IO

0.1U_0402_16V4Z

1 2

+3VS

RA19 0_0603_5%RA19 0_0603_5%

RA1

12

0_0603_5%

CA2

CA8

1 1

Del RA20 with connect to +1.5VS

place close to chip

Ext. Mic

MIC1_R_L<30>

2 2

MIC1_R_R<30>

4.7U_0805_10V4Z

Int. Mic

EC_MUTE#

12

RA454.7K_0402_5% RA454.7K_0402_5%

INT_MIC_DATA<13>

EC_MUTE#<31>

AZ_RST_HD#<16>

CA12 100P_0402_50V8JCA12 100P_0402_50V8J

0.1U_0402_16V4Z

1

10U_0805_10V4Z

10U_0805_10V4Z 2

1

10U_0805_10V4Z

10U_0805_10V4Z 2

1

CA1

2

0.1U_0402_16V4Z

1

CA7

2

35mA for 3.3V level

CA234.7U_0805_10V4Z CA234.7U_0805_10V4Z

12

CA29

12

INT_MIC_DATA INT_MIC_CLK_R

1 2

MONO_IN

SENSE_A

0620 --> remove SENSE_B

CA47 0.1U_0603_50V7KCA47 0.1U_0603_50V7K

1 2

CA48 0_0603_5%CA48 0_0603_5%

1 2

CA49 0.1U_0603_50V7KCA49 0.1U_0603_50V7K

1 2

CA50 0.1U_0603_50V7KCA50 0.1U_0603_50V7K

1 2

3 3

CA48 --> SD013000080 0_0603_5% (Resistor) RA18 --> SE025104K80 0.1U_0603_50V7K (Cap)

1 2

RA18 0.1U_0603_50V7KRA18 0.1U_0603_50V7K

CA15

2.2U_0603_6.3V4Z

+MIC1_VREFO_L

1 2

DGND

ALC259Q PN IS NOT READY

JA1 place on +5vs source side

JUMP_43X39

+3VS_DVDD

35 mA

9

1

DVDD

PVDD139PVDD2

DVDD_IO

23

LINE1_L

24

LINE1_R

14

LINE2_L

15

LINE2_R

21

MIC1_L

22

MIC1_R

16

MIC2_L

17

MIC2_R

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

4

PD#

11

RESET#

12

PCBEEP

13

SENSE A

18

SENSE B

36

CBP

35

CBN

31

MIC1_VREFO_L

43

PVSS2

42

PVSS1

49

DVSS2

7

DVSS1

ALC259-GR_QFN48_7X7

SPK_OUT_R+

MIC1_VREFO_R

+PVDD1

JA1

+PVDD2

1

CA61

0.1U_0402_16V4Z

2

+AVDD

46

AVDD125AVDD2

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

LDO_CAP

VREF

JDREF

CPVEE

AVSS1 AVSS2

600 mA

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

CA57

2

1

@

1

68 mA

38

UA1

40 41

45 44

32 33

10 6

5 8

47 48 20

29 30

28 27 19 34 26

37

2

10U_0805_10V4Z

place close to chip

10U_0805_10V4Z

1

CA4

CA3

2

10U_0805_10V4Z

RA4 75_0402_1%RA4 75_0402_1% RA5 75_0402_1%RA5 75_0402_1%

AZ_SDIN0_HD_R

C23 10P_0402_50V8J@ C23 10P_0402_50V8J@

C24 10P_0402_50V8J@ C24 10P_0402_50V8J@

0618 --> remove +MIC2_VREFO for analoh IntMIC

AC_VREF AC_JDREF

RA9 20K_0402_1%RA9 20K_0402_1%

1 2

CA14 2.2U_0603_6.3V4ZCA14 2.2U_0603_6.3V4Z

AGND

RA2

0_0603_5%

1

CA56

2

RA11

0_0603_5%

1

@

CA63

2

0.1U_0402_16V4Z

1

CA6

CA5

2

0.1U_0402_16V4Z

SPKL+ <30> SPKL- <30>

SPKR+ <30> SPKR- <30>

12

RA6 33_0402_5%RA6 33_0402_5%

12

+MIC1_VREFO_R

12

0.1U_0402_16V4Z

12

CA44

0.1U_0402_16V4Z

12

CA62

1

place close to chip

2

R391 10_0402_5%

R402 10_0402_5%

CA28 10U_0805_10V4ZCA28 10U_0805_10V4Z

1 2

CA17

0.1U_0402_16V4Z

1

2

10U_0805_10V4Z

1

@

@ CA58

@

2

10U_0805_10V4Z

RA3

12

0_0603_5%

HP_L <30> HP_R <30>

AZ_SYNC_HD <16>

AZ_BITCLK_HD <16>

AZ_SDOUT_HD <16>

AZ_SDIN0_HD <16>

@

12

@

12

For EMI, place near codec

1

CA16

CA16 10U_0805_10V4Z

10U_0805_10V4Z

2

@

place close to chip

+5VS

CA43

+5VS

CA58

+5VS

AZ_BITCLK_HD

AZ_RST_HD#

Beep sound

Place close to chip

Pin36 Pin25

Pin37

Pin38

Pin39

ALC259-GR

Pin48

Pin1

DIGITAL (Include Themal PAD)

EC Beep

EC_BEEP#<31>

PCI Beep

PCH_SPKR<16,19>

+MIC1_VREFO_R +MIC1_VREFO_L

1

@

CA37

CA37 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

RA7

1 2 47K_0402_5%

47K_0402_5%

RA8

1 2 47K_0402_5%

47K_0402_5%

10K_0402_5%

1

@

CA36

CA36 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

Pin24

Pin13

ANALOG

Pin12

CA13

1 2

0.1U_0402_16V4Z

12

1

CA18

RA12

CA18

0.1U_0402_16V4Z

2

0618 --> remove +MIC2_VREFO for analog IntMIC

Moat

MONO_IN

Sense Pin Impedance

39.2K

SENSE A

4 4

20K 10K

5.1K

39.2K

Codec Signals

PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15)

A

Function

Headphone out Ext. MIC

B

place close to chip

MIC_SENSE<30>

NBA_PLUG<30>

RA10 20K_0402_1%RA10 20K_0402_1%

RA21 39.2K_0402_1%RA21 39.2K_0402_1%

0620 --> remove RA13 for SENSE_B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

SENSE_A

For EMI

RA41

INT_MIC_CLK<13>

Compal Secret Data

2010/06/21 2011/06/21

Compal Secret Data

Deciphered Date

C

FBMA-10-100505-301T

1

2

CAM@

CA30

CA30 27P_0402_50V8J

27P_0402_50V8J @

@

INT_MIC_CLK_R

Title

Size Document Number Rev

Date: Sheet

SCHEMATICS, MB A6842

SCHEMATICS, MB A6842 401981

401981

Wednesday, September 01, 2010

D

29 45

B

of

5

4

3

2

1

Speaker Connector

placement near Audio Codec

D D

RA26

SPKL-

SPKR+

SPKR-

1 2

0_0603_5%

RA27

1 2

0_0603_5%

RA28

1 2

0_0603_5%

RA29

1 2

0_0603_5%

2

CA22

470P_0402_50V8J

1 2

CA21

470P_0402_50V8J

1

2

CA25

470P_0402_50V8J

1 2

CA26

470P_0402_50V8J

1

@CA22

@

@CA21

@

@CA25

@

@CA26

@

SPKL+<29>

SPKL-<29>

SPKR+<29>

C C

SPKR-<29>

SPK_L1SPKL+

2

CA24

CA24 1U_0402_6.3V4Z

1U_0402_6.3V4Z @

@

1

SPK_L2

SPK_R1

2

CA27

CA27 1U_0402_6.3V4Z

1U_0402_6.3V4Z @

@

1

SPK_R2

DA4 PJDLC05_SOT23-3@DA4 PJDLC05_SOT23-3@

1

SPK_L1 SPK_L2 SPK_R1 SPK_R2

DA5 PJDLC05_SOT23-3@DA5 PJDLC05_SOT23-3@

1

place near JSPK conn.

2 3

3 2

JSPK

@JSPK

@

1

2

3

4

ACES_85204-0400N

Ex.MIC JACK

JEXMIC

@

JEXMIC

@

5

MIC_SENSE<29>

MIC1_R

LA6

1 2

KC FBM-L11-160808-121LMT 0603

MIC1_L

LA8

1 2

KC FBM-L11-160808-121LMT 0603

B B

CA9

100P_0402_50V8J

1

2

1

CA10

CA10 100P_0402_50V8J

100P_0402_50V8J

2

MIC1_L_R MIC1_L_L

DA6

@DA6

@

1

PJDLC05_SOT23-3

2 3

AGND

Head Phone JACK

NBA_PLUG<29> HP_R<29> HP_L<29>

A A

LA9

1 2

KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA10

LA10

1 2

KC FBM-L11-160808-121LMT 0603

100P_0402_50V8J

CA11

1

2

1

CA19

CA19 100P_0402_50V8J

100P_0402_50V8J

2

0812 --> change CA9, CA10, CA11 and CA12 to mount

5

HP_R_R HP_L_R

DA7

@DA7

@

1

PJDLC05_SOT23-3

4

2 3

AGND

5

4

3

6 7

6

2

1

FOX_JA63331-B39S4-7F

JLINE

@

JLINE

@

5

4

3

6 7

6

2

1

FOX_JA63331-B39S4-7F

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10

GND

9

GND

8

8 7

7

Ext.MIC/LINE IN

MIC1_R_R<29>

MIC1_R_L<29>

Int. Mic

10

GND

9

GND

8

8 7

7

2010/06/21 2011/06/21

3

0618 --> remove Analog IntMIC, and change to DIGITAL MIC

Compal Secret Data

Deciphered Date

2

RA23

1K_0402_5%

RA24

RA22

12

2.2K_0402_5%

12

RA25

12

2.2K_0402_5%

Compal Electronics, Inc.

Title

Size Document Number Rev

Wednesday, September 01, 2010

Date: Sheet

MIC1_R

MIC1_L

SCHEMATICS, MB A6842

SCHEMATICS, MB A6842 401981

401981

+MIC1_VREFO_R

+MIC1_VREFO_L

1

of

30 45

of

30 45

of

30 45

B

5

4

3

2

1

+3VL

0.1U_0402_16V4Z

C437

0.1U_0402_16V4Z

KSO1 KSO2

R624

100K_0402_5%

0.1U_0402_16V4Z

1

C438

2

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# ECRST# EC_SCI#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# THM_ALT#

PCH_SUSPWRDN FAN_SPEED1 E51_TXD

E51_RXD ON/OFFBTN#

NUM_LED#

12

1

C439

2

1000P_0402_50V7K

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

1

2

C441

C440

1000P_0402_50V7K

1

U19

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

@

C480

18P_0402_50V8J

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

1

C436

0.1U_0402_16V4Z

for EMI request

D D

CLK_PCI_EC

12

R377

@

10_0402_5%

1

C443

@

22P_0402_50V8J

+3VL

R378

R378 47K_0402_5%

47K_0402_5%

C444 0.1U_0402_16V4ZC444 0.1U_0402_16V4Z

2

ECRST#

12

+3VL

R380 47K_0402_5%R380 47K_0402_5% R382 47K_0402_5%R382 47K_0402_5%

1 2 1 2

2

GATEA20<21>

KB_RST#<21>

SERIRQ<16,32>

LPC_FRAME#<16,32>

LPC_AD3<16,32> LPC_AD2<16,32> LPC_AD1<16,32> LPC_AD0<16,32>

CLK_PCI_EC<20>

PLT_RST#<20,27,28,32>

EC_SCI#<21>

to avoid EC entry ENE test mode

PLT_RST#

@

12

C455 0.1U_0402_16V4Z

C C

C455 0.1U_0402_16V4Z

C456 0.1U_0402_16V4Z

For ESD

+3VL +3VS

12

@

RP7

RP7 1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

KB_RST#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

KSI[0..7]<32>

KSO[0..17]<32>

for Wake on LAN

B B

A A

R342 100K_0402_5%R342 100K_0402_5%

1 2

R389

1 2

10M_0402_5%@

1

@

C449

18P_0402_50V8J

1

2

32.768KHZ_12.5PF_Q13MC14610002

E51_TXD

CRY1

CRY2CRY1

1

@

C450

Y4

2

OSC4OSC

@

NC3NC

18P_0402_50V8J

CRY2

EC_CLK<18>

For EC Crystal cost down

KSI[0..7] KSO[0..17]

EC_SMB_CK1<36> EC_SMB_DA1<36> EC_SMB_CK2<17> EC_SMB_DA2<17>

PM_SLP_S3#<18> PM_SLP_S5#<18>

EC_SMI#<21> THM_ALT#<21> WOL_EN<28>

PCH_SUSPWRDN<18>

FAN_SPEED1<6>

E51_TXD<27> E51_RXD<27>

ON/OFFBTN#<33>

PWR_LED#<33>

NUM_LED#<32>

R104 0_0402_5%@R104 0_0402_5%@

1 2

R108 0_0402_5%@R108 0_0402_5%@

1 2

R103 0_0402_5%R103 0_0402_5%

+3VL

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

C442

1 2

0.1U_0402_16V4Z

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

KB926QFE0_LQFP128_14X14

69

remove KB LED

21

EC_BEEP#

23

remove SM_SENSE

26

ACOFF

27

BATT_TEMPA

63 64

ADP_I

65

ADP_V

66 75 76

VTTP_EN

68

EN_DFAN1

70

IREF

71

CHGVADJ

72

EC_MUTE#

83

USB_EN#

84 85 86

TP_CLK

87

TP_DATA

88

VGATE

97

WOL_EN#

98

PWRME_CTRL#

99

LID_SW#

109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120

SPI_CLK

126

SPI_CS#

128

73 74

FSTCHG

89

BATT_FULL_LED#

90

CAPS_LED#

91

BATT_CHG_LOW_LED#

92

0621->remove PWR_ON_LED#

93

SYSON

95

VR_ON

121

ACIN_D

127

EC_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102 103

PM_PWROK

104

BKOFF#

105

WL_OFF#

106 107

EC_SEL

108

PM_SLP_S4#

110

EC_ENBKL

112 114 115

SUSP#

116

PBTN_OUT#

117

USB_OC#0

118

+EC_V18R

124

EC_BEEP# <29> ACOFF <35,37>

BATT_TEMPA <36> ADP_I <37>

ADP_V <37>

VTTP_EN <39> EN_DFAN1 <6> IREF <37>

CHGVADJ <37>

EC_MUTE# <29>

USB_EN# <25>

TP_DATA <33>

VGATE <18,42> WOL_EN# <28,34>

PWRME_CTRL# <16>

LID_SW# <32>

EC_SI_SPI_SO <32>

EC_SO_SPI_SI <32> SPI_CLK <32> SPI_CS# <32>

BATT_FULL_LED# <33> CAPS_LED# <32>

SYSON <40> VR_ON <42>

EC_RSMRST# <18> EC_LID_OUT# <17> EC_ON <33,38>

PM_PWROK <18>

BKOFF# <13>

WL_OFF# <27>

PM_SLP_S4# <18>

EC_ENBKL <19>

SUSP# <27,34,41> PBTN_OUT# <18>

USB_OC#0 <20,25>

C448

4.7U_0805_10V4Z

TP_CLK <33>

FSTCHG <37>

BATT_CHG_LOW_LED# <33>

EC_SEL

BATT_TEMPA ACIN_D

1 2

C445 100P_0402_50V8JC445 100P_0402_50V8J

1 2

C446 100P_0402_50V8JC446 100P_0402_50V8J

Remove CEC_INT# pull high

VTTP_EN

TP_CLK TP_DATA

LID_SW#

SYSON

VR_ON

1 2

R337 100K_0402_5%R337 100K_0402_5%

1 2

R379 4.7K_0402_5%R379 4.7K_0402_5%

1 2

R381 4.7K_0402_5%R381 4.7K_0402_5%

1 2

R383 47K_0402_5%R383 47K_0402_5%

1 2

R5 4.7K_0402_5%R5 4.7K_0402_5%

1 2

R462 10K_0402_5%R462 10K_0402_5%

+5VS

+3VALW

For prevent leakage for CPU_CORE

R341 330K_0402_5%R341 330K_0402_5%

1 2

+3VL

ACIN_D<18>

+3VALW

SUSP#

R435

R435 100K_0402_5%

100K_0402_5% @

@

1 2

R436

R436 100K_0402_5%

100K_0402_5%

1 2

R423 10K_0402_5%R423 10K_0402_5%

D21

2 1

CH751H-40PT_SOD323-2

EC SEL EC Version

High

Low

KB926D3

KB926E0

ACIN <18,37>

Remove PM_SLP_S4#/S5# AND Gate

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

Wednesday, September 01, 2010

1

of

31 45

of

31 45

of

31 45

B

SPI Flash (256KB)

+3VL

20mils

1

C451

0.1U_0402_16V4Z

SPI_CS#<31>

SPI_CLK<31>

EC_SO_SPI_SI<31>

2

SPI_CLK

1 2

10_0402_5%

reserve for EMI, close to U22

KEYBOARD CONN.

U22

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L2005CMI-12G SOP 8P

R394

@R394

@

VSS

Q

1 2

C454 10P_0402_50V8J@C454 10P_0402_50V8J@

4

2

EC_SI_SPI_SO <31>

Lid SW

+3VALW

U21

U21 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD2VOUT

1

C453

0.1U_0402_16V4Z

2

3

GND

1

10P_0402_50V8J

C452

1

2

LID_SW# <31>

LPC Debug Port

SERIRQ<16,31>

R392 0_0402_5%R392 0_0402_5%

LPC_AD3<16,31>

LPC_AD1<16,31>

LPC_FRAME#<16,31>

Please place the PAD under DDR DIMM.

+3VS

H7

1 2

7

8

9

10

DEBUG_PAD @

56

4

3

2

1

R393

22_0402_5%

1 2 2

C457

C457 22P_0402_50V8J

22P_0402_50V8J

1

reserve for EMI

PLT_RST# <20,27,28,31>

LPC_AD2 <16,31>

LPC_AD0 <16,31>

CLK_PCI_DDR <20>

KSI[0..7]

KSO[0..17]

JKB

@JKB

@

34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

ACES_88170-3400

KSI[0..7] <31>

KSO[0..17] <31>

JKB34

1 2

KSO16

R372 300_0402_5%R372 300_0402_5%

KSO17

KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSO10 KSI0 KSI5 KSI6 KSI1 JKB4

CAPS_LED#

R376 300_0402_5%R376 300_0402_5%

NUM_LED#

12

+3VS

CAPS_LED# <31> NUM_LED# <31>

please close to JKB

KSO16 KSO17 KSO2 KSO1 KSO0 KSO4 KSO3 KSO5

KSO14

KSO6 KSO7

KSO13

KSO8 KSO9

KSO11 KSO12 KSO15

KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1

CAPS_LED#

NUM_LED#

1 2

C401 100P_0402_50V8JC401 100P_0402_50V8J

1 2

C402 100P_0402_50V8JC402 100P_0402_50V8J

1 2

C404 100P_0402_50V8JC404 100P_0402_50V8J

1 2

C405 100P_0402_50V8JC405 100P_0402_50V8J

1 2

C406 100P_0402_50V8JC406 100P_0402_50V8J

1 2

C407 100P_0402_50V8JC407 100P_0402_50V8J

1 2

C408 100P_0402_50V8JC408 100P_0402_50V8J

1 2

C409 100P_0402_50V8JC409 100P_0402_50V8J

1 2

C410 100P_0402_50V8JC410 100P_0402_50V8J

1 2

C411 100P_0402_50V8JC411 100P_0402_50V8J

1 2

C412 100P_0402_50V8JC412 100P_0402_50V8J

1 2

C413 100P_0402_50V8JC413 100P_0402_50V8J

1 2

C415 100P_0402_50V8JC415 100P_0402_50V8J

1 2

C416 100P_0402_50V8JC416 100P_0402_50V8J

1 2

C417 100P_0402_50V8JC417 100P_0402_50V8J

1 2

C418 100P_0402_50V8JC418 100P_0402_50V8J

1 2

C419 100P_0402_50V8JC419 100P_0402_50V8J

1 2

C420 100P_0402_50V8JC420 100P_0402_50V8J

1 2

C421 100P_0402_50V8JC421 100P_0402_50V8J

1 2

C422 100P_0402_50V8JC422 100P_0402_50V8J

1 2

C423 100P_0402_50V8JC423 100P_0402_50V8J

1 2

C424 100P_0402_50V8JC424 100P_0402_50V8J

1 2

C425 100P_0402_50V8JC425 100P_0402_50V8J

1 2

C427 100P_0402_50V8JC427 100P_0402_50V8J

1 2

C429 100P_0402_50V8JC429 100P_0402_50V8J

1 2

C431 100P_0402_50V8JC431 100P_0402_50V8J

1 2

C433 100P_0402_50V8JC433 100P_0402_50V8J

1 2

C435 100P_0402_50V8JC435 100P_0402_50V8J

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

Wednesday, September 01, 2010

of

32 45

of

32 45

of

32 45

B

5

4

3

2

1

Power Button

13

D

R396

JPOWER

1 2 3

4 G1 G2

2

G

Q38 2N7002_SOT23-3

S

1 2

@JPOWER

@

1 2 3 4 5 6

+3VL

R395

debug phase using

D D

TOP side

BTM side

SW2

@SW2

@

SW3

5

6

@SW3

@

5

6

3 4

SMT1-05_4P

3 4

SMT1-05_4P

1 2

R395 100K_0402_5%

100K_0402_5%

1 2

ON/OFFBTN#

1

C458

0.1U_0402_25V6

0.1U_0402_25V6 @

@

2

For EMI request

ON/OFFBTN# <31>

EC_ON<31,38>

10K_0402_5%

PWR/B to MB Conn.

ACES_85201-0405N

51_ON# <35>

ON/OFFBTN#

2

3

D83 AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3

1

@D83

@

For ESD

POWER/SUSPEND LED

C C

1 2

+5VALW

R397 510_0402_5%R397 510_0402_5%

Vf=1.9V~2.4V If=5mA

D22

2 1

YG

HT-110UYG5_YELLOW GREEN

3

PWR_LED# <31>

BATT CHARGE/FULL LED

Vf=1.8V~2.0V If=5mA(max)

D25

+5VALW

B B

1

HT-210UD5-UYG5_AMBER-YEL GRN

3

YG

2

A

1 2

R399 510_0402_5%R399 510_0402_5%

1 2

R403 510_0402_5%R403 510_0402_5%

BATT_CHG_LOW_LED# <31>

BATT_FULL_LED# <31>

Screw Hole

H5

H6

H8

1

H21

H23

H_3P0

H_3P0 @

@

H26

1

H_4P2x4P7

H_4P2x4P7 @

@

1

H_4P7

H_4P7 @

@

1

H_2P7N

H_2P7N @

@

H8

1

H1

CPU

H20

H22

1

H_3P0

H_3P0 @

@

H_2P7x3P2N

H_2P7x3P2N @

@

H_4P2

H_4P2 @

@

H_4P2x4P7

H_4P2x4P7 @

@

H_3P0

H_3P0 @

@

H9

1

TP Button/Conn.

H_3P3

H_3P3 @

@

3

1

H11

H_3P0

H_3P0 @

@

1

H14

H_3P0

1

@

LEFT

RIGHT

2

D20 AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3

H12

H_3P0

H_3P0 @

@

H17

1

MINI CARD

H18

1

SW_L

SW_R

For EMI request

H10

H_3P0

H_3P0 @

@

1

H_1P0N

H_1P0N @

@

H19

H_3P3

H_3P3 @

@

1

SW1

1 2

6

SW4

1 2

6

@D20

@

0827 --> change SW1, SW2 P/N to SN100002Y00 for PWR button H1.5 160g

H13

H_3P0

@

1

SB

H15

1

H_5P0N

H_5P0N @

@

H16

SMT1-05_4P

5

SMT1-05_4P

5

H_5P0N

H_5P0N @

@

1

3 4

+5VS TP_CLK<31> TP_DATA<31>

SW_L SW_R

2

1

3

D19

@D19

@

AZ5125-02S.R7G_SOT23-3

JTOUCH

@JTOUCH

@

1

2

3

4

5

7

5

G7

8

66G8

P-TWO_161021-06021_6P-T

0816->change JTOUCH connector

For Codec AGND Dummy 3G MDC

PCB Fedical Mark PAD

FD2@FD2

FD1@FD1

@

1

FD4@FD4

FD3@FD3

@

1

ISPD

ZZZ

PCB LA-6842P REV1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DC-INPCB

PJP1

PJP1 45@

Compal Secret Data

2010/06/21 2011/06/21

Compal Secret Data

Deciphered Date

PCH

U11

PCH

PCH HM55R3@

HM55R3@

2

Compal Electronics, Inc.

Title

SCHEMATICS, MB A6842

Size Document Number Rev

Date: Sheet

401981

Wednesday, September 01, 2010

B

of

33 45

of

33 45

of

33 45

1

A

B

C

D

E

+3VALW TO +3VS

+3VALW +3VS

Q29

8

D

7

D

6

D

5

1 1

D

SI4800BDY_SO8

1

C465

2

4.7U_0805_10V4Z

1

S

2

S

3

S

4

G

C459

1

C466

2

0.022U_0402_25V7K

Vgs=-0V,Id=9A,Rds=18.5mohm

1

2

1U_0402_6.3V4Z

12

R412

R412 330K_0402_5%

330K_0402_5%

61

1

C460 4.7U_0805_10V4ZC460 4.7U_0805_10V4Z

2

R409

1 2

47K_0402_5%

2N7002DW-T/R7_SOT363-6

+VSB

Q10A

SUSP SUSP

2

2N7002DW-T/R7_SOT363-6

R406

5

470_0805_5%

1 2 3

Q10B

4

For EMI request

+3VS

1

C315

C315 @

@

2

0.1U_0402_16V4Z

1

C292

2

0.1U_0402_16V4Z

For EMI request

+3VALW TO +3V_LAN

+3VALW

2 2

WOL_EN#<28,31>

R419

100K_0402_5%

@

1 2

0.1U_0402_16V7K

1 2

R420 47K_0402_5%@R420 47K_0402_5%@

0.01U_0402_25V7K

Vgs=-4.5V,Id=3A,Rds<97mohm

@

2

C471

AO3413_SOT23

1

C474

@C474

@

2

4.7U_0805_10V4Z

Q32

@

Q32

@

2

C476

@C476

@

+3VALW

G

S

D

1 3

1

1U_0402_6.3V4Z

2

PJ24

2

JUMP_43X79

JUMP_43X79 @

@

1

C479

@C479

@

1

2

1

C125

2

10U_0805_10V4K

+5VALW TO +5VS

+5VALW

+5VS

2

C821

1

0.1U_0402_16V4Z

4.7U_0805_10V4Z

C126

10U_0805_10V4K

Q30

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1

C467

2

+3V_LAN

1

2

1

S

2

S

3

S

4

G

0.01U_0402_25V7K

+1.5V to +1.5VS

+5VS

4.7U_0805_10V4Z

1

C461

2

1U_0402_6.3V4Z

1

12

R413

C468

200K_0402_5%

2

200K_0402_5% @

@

1

C462

2

R410

1 2

47K_0402_5%

61

Q11A

2N7002DW-T/R7_SOT363-6

+VSB

2

R407

5

Vgs=10V,Id=14.5A,Rds=6mohm

470_0805_5%

1 2 3

Q11B

4

+1.5V

8 7 6 5

1

FDS6676AS

C469

2

4.7U_0805_10V4Z

Q31

S

D

S

D

S

D

G

D

SI4800BDY_SO8

C463

1 2 3 4

1

C470

2

+1.5VS

1

2

1U_0402_6.3V4Z

12

R414

R414 820K_0402_5%

820K_0402_5%

0.1U_0402_25V6

4.7U_0805_10V4Z

C464

R411

1 2

220K_0402_5%

61

Q12A

2

2N7002DW-T/R7_SOT363-6

1

2

0715 --> Q31 change to SB548000310 the same as +5VS

+VSB

SUSP

R408

5

470_0805_5%

1 2 3

Q12B

4

For S3 CPU Power Saving

+3VALW

R425

R425 100K_0402_5%

100K_0402_5%

1 2 3

Q48B

0.75VR_EN

Q48B

5

4

2N7002DW-T/R7_SOT363-6

VTTPWROK<5,39>

1 2

R169 100K_0402_5%R169 100K_0402_5%

Q48A

2N7002DW-T/R7_SOT363-6

Q48A

SUSP

61

2

0.75VR_EN# <41>

Q48A,B R169, R425 form PS@ to mount

For EMI test

Reserve for EMI test

3 3

+3VS +5VS +5VALW

@

2

C473

0.1U_0402_16V7K

4 4

0.1U_0402_16V7K

1

+3VS +3VS +3VS +3VS

2

C481

0.1U_0402_16V7K

1

0816 --> Add C481~C485 for EMI request

@

2

C475

0.1U_0402_16V7K

1

2

C482

0.1U_0402_16V7K

1

A

C478

C483

2

1

2

0.1U_0402_16V7K

1

C484

2

1

+5VALW

0.1U_0402_16V7K

B

C485

+3VS

2

1

+1.05VS

SUSP<9,41>

SUSP#<27,31,41>

Security Classification

2010/06/21 2011/06/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

C

Compal Secret Data

+5VALW

SUSP

2

Deciphered Date

R422

R422 100K_0402_5%

100K_0402_5%

1 2 61

Q5A

Q5A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

D

+0.75VS

R421 form PS@ to mount

R421

47_0805_5%

1 2 3

4

0715 --> change R412 from 470ohm to 47ohm

Q5B

Q5B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

SUSP

5

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

Wednesday, September 01, 2010

E

34 45

of

34 45

of

34 45

B

A

B

C

D

VS

12

PC5

@

680P_0402_50V7K

VIN

12

PC6

100P_0402_50V8J

VIN

PreCHG

@

PD1

RLS4148_LL34-2

1

PD1

@

PR3

100K_0402_5%

2

12

13

@

DTC115EUA_SC70-3

PQ30

12

PR1

1 2 0_1206_5%

0_1206_5%

@

PR2

1 2 1K_1206_5%

1K_1206_5%

PR5

@

1 2 1K_1206_5%

1K_1206_5%

PR6

@PR6

@

1 2

1K_1206_5%

@

PR8

1 2

1K_1206_5%

@

PD4

ACOFF<31,37>

+5VALWP<38>

2 3

RB715F_SOT323-3

TP0610K-T1-E3_SOT23-3

@

PR4

100K_0402_5%

2

@

PQ2

2

12

PR7

@

100K_0402_5%

13

PQ3

@PQ3

@

DTC115EUA_SC70-3

13

B+

PL1

SMB3025500YA_2P

12

PC2

680P_0402_50V7K

68_1206_5%

2

SMB3025500YA_2P

1 2

PC3

100P_0402_50V8J

VIN

PD2

PD2 RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

PR9

13

12

PC10

0.1U_0603_25V7K

12

PR10

PR10 68_1206_5%

68_1206_5%

PC4

1000P_0402_50V7K

PF1

DC301001M80

PJP1

1

1 1

2 2

+

2

+

3

-

4

-

SINGA_2DW-0005-B03@

BATT+

51_ON#<33>

DC_IN_S1 DC_IN_S2

RLS4148_LL34-2

1 2

22K_0402_1%

PF1

7A_24VDC_429007.WRML

12

PD3

100K_0402_1%

PR15

PR13

12

21

12

TP0610K-T1-E3_SOT23-3

N1

12

PC9

0.22U_0603_25V7K

12

PC1

@

1000P_0402_50V7K

PQ1

3 3

PJ1

+3VALWP +3VALW

+5VALWP

+VSBP +VSB

2

112

JUMP_43X118@

(5A,200mils ,Via NO.= 10)

JUMP_43X118@

OCP(min)=7.7A

PJ5

2

112

JUMP_43X118@

(5A,200mils ,Via NO.= 10)

JUMP_43X118@

OCP(min)=7.9A

PJ7

2

112

JUMP_43X39@

+1.5VP +1.5V

(9A,360mils ,Via NO.= 18)

+5VALW

+GFX_COREP +GFX_CORE

(22A,880mils ,Via NO.=44)

(120mA,40mils ,Via NO.= 1)

4 4

+VTTP +VTT

PJ11

2

112

JUMP_43X118@

JUMP_43X118@ PJ13

PJ13

2

112

JUMP_43X118@

(1.5A,60mils ,Via NO.= 4)

(20A,800mils ,Via NO.=40)

OCP(min)=27.49A

A

PJ4

2

112

JUMP_43X118@

OCP(min)=9.8A

PJ8

2

112

JUMP_43X118@

JUMP_43X118@ PJ10

PJ10

2

112

JUMP_43X118@

OCP(min)=26A

PJ17

2

112

JUMP_43X79@

PJ3

2

JUMP_43X79@

(2A,80mils ,Via NO.= 4)

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

+0.75VS+0.75VSP

B

JUMP_43X79@

PJ9

2

JUMP_43X39@

Issued Date

+1.8VS+1.8VSP

Compal Secret Data

Deciphered Date

C

2010/01/232009/01/23

112

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

D

35 45Wednesday, September 01, 2010

of

B

A

B

C

D

1 1

PJP2

10 11 12 13

SUYIN_200045MR009G171ZR@

2 2

3 3

GND GND GND GND

1

2

3

4

5

6

7

8

9

PJSOT24C_SOT23-3

EC_SMCA

PR36

100_0402_1%

100K_0402_1%

POK<18,38>

BATT_S1

BATT_P4 BATT_P5 EC_SMDA

PD6

1 2

PR43

1

2

VL

3

1 2

PR37

PR37 100_0402_1%

100_0402_1%

1 2

B+

PR44

PR44 0_0402_5%

0_0402_5%

1 2

PF2

21

10A_125V_451010MRL

12

PR30

PR30 1K_0402_1%

1K_0402_1%

PD7

PJSOT24C_SOT23-3

2 3

12

PR35

PR35 1K_0402_1%

1K_0402_1%

2

G

12

PC22 @ PC22

@

.1U_0402_16V7K

1

PR32

6.49K_0402_1%

PR42

22K_0402_1%

1 2

13

D

PQ5

PQ5 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

+3VLP

12

PR41

100K_0402_1%

PC18

@PC18

@

0.1U_0402_25V6K

+3VLP

BATT_TEMPA <31>

EC_SMB_DA1 <31> EC_SMB_CK1 <31>

TP0610K-T1-E3_SOT23-3

12

PC20

@

0.22U_0603_25V7K

PQ4

12

2

VMB

SMB3025500YA_2P

12

PC16

PC16 1000P_0402_50V7K

1000P_0402_50V7K

13

PL2

1 2

12

PC21

@

0.1U_0603_25V7K

+VSBP

BATT+

12

PC17

0.01U_0402_25V7K

PH1 under CPU botten side :

CPU thermal protection at 90degree C Recovery at 56 degree C

VL

12

PC19

0.1U_0402_16V4Z

PU4

1

VCC

2

GND

3

OT1

4

VS_ON<38>

OT2

G718TM1U_SOT23-8

TMSNS1 RHYST1 TMSNS2 RHYST2

8 7 6 5

12

PR31

23.2K_0402_1%

PR34

10.7K_0402_1%

1 2

12

PH1

PH1 100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2010/01/232009/01/23

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

D

36 45Wednesday, September 01, 2010

B

of

A

PQ8

SI4483ADY-T1-GE3_SO8

1 2 3 6

4

PR46

PR46 200K_0402_1%

200K_0402_1%

PR55

PR55 150K_0402_1%

150K_0402_1%

PQ18B

DMN66D0LDW-7_SOT363-6

PR66

154K_0402_1%

FSTCHG<31>

0.01U_0402_25V7K

12

PR69

120K_0402_1%

8 7

5

1 2

PC28

5600P_0402_25V7K

PC36

1 2

ADP_I<31>

12

PC44

0.01U_0402_25V7K

P3

PR53

10K_0402_1%

PC35 6800P_0402_25V7KPC35 6800P_0402_25V7K

1 2

PR60 10K_0402_1%PR60 10K_0402_1%

1 2

PC39

PC39 .1U_0402_16V7K

.1U_0402_16V7K

6251VREF

12

20K_0402_1%

1 2 3

12

PC27

0.1U_0603_25V7K

5

G

13

DTC115EUA_SC70-3

IREF<31>

PQ20

P2

12

34

D

S

PQ7

PQ7 AO4435_SO8

PACIN

ACOFF

8 7 6 5

PQ10

13

AO4435_SO8

2

PQ13

PQ13 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR64

47K_0402_5%

1 2

2

4

1 3

VIN

1 1

DTA144EUA_SC70-3

12

PR48

PR48 200K_0402_1%

200K_0402_1%

BATT_ON

2

61

D

2

G

2 2

PQ18A

PQ18A DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

S

ACOFF<31,35>

CHGVADJ<31>

3 3

CP mode

Iada=0~3.42A(65W)4VCP= 92%*Iada; CP=3.147A

Vaclim=1.08V(65W) PR68=75k PR45=0.02

CC=0.25A~3A IREF=1.016*Icharge IREF=0.254V~3.048V VCHLIM need over 95mV

4 4

CHGVADJ=(Vcell-4)/0.10627

Vcell

CHGVADJ

0V

4.2V

4.35V

1.882V

3.2935V

ACPRN

47K_0402_1%

12

PR252

2

PQ214

DTC115EUA_SC70-3

1 2

12

1 2

PR68

75K_0402_1%

1 2

PR70

15.4K_0402_1%

15.4K_0402_1% 1 2

6251VDD

B

PR45

0.02_1206_1%

6251VDD

ACSETIN

12

PR56

100K_0402_1%

PR62 47K_0402_1%PR62 47K_0402_1%

1 2

6251aclim

12

PR72

PR73

31.6K_0402_1%

12

PR250

10K_0402_1%

13

4 3

6251VREF

12

10

11

12

PR251

10K_0402_1%

1 2

12

PR249

14.3K_0402_1%

PC73

B+

10U_1206_25V6M

12

PC29

2.2U_0603_6.3V6K

PU5

1

VDD

2

ACSET

ACPRN

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

PHASE

ICM

8

UGATE

VREF

9

CHLIM

ACLIM

VADJ

LGATE

GND

G5209S31U_SSOP24

PACIN

12

PC74

10U_1206_25V6M

PD8

PR50

10_1206_5%

DCIN

CSON

CSOP

CSIN

CSIP

BOOT

VDDP

PGND

ACIN <18,31>

12

PC75

HCB4532KF-800T90_1812

10U_1206_25V6M

VIN

1 2

RB751V-40_SOD323-2

12

PC77

1000P_0402_25V8J

PC31

24

0.1U_0603_25V7K

23

22

PC32

0.047U_0603_16V7K

21

1 2

20

PC37

0.1U_0603_25V7K

19

1 2

LX_CHG

18

DH_CHG

17

0_0603_5%

BST_CHG

16

6251VDDP

15

DL_CHG

14

13

Vin Detector

18.089V

High

17.44V

Low

PL19

PreCHG

1 2 12

12

ACPRN <38>

1 2

PR58

20_0603_5%

PR67

1 2

PC45

1 2

4.7U_0805_6.3V6K

@

PR74

309K_0402_1%

@

47K_0402_1%

12

CSIN

CSIP

PR47

PR47 191K_0402_1%

191K_0402_1%

ACSETIN

PR51

14.3K_0402_1%

PR57

20_0603_5%

1 2

PR59

20_0603_5%

1 2

PR61

2.2_0603_1%

0.1U_0603_25V7K

BST_CHGA

12

PD12

PD12 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PR71

4.7_0603_5%

VIN

12

PR76

12

PC40

C

CSON

CSOP

12

6251VDD

PR75

@

10K_0402_1%

1 2

12

PC46

@

.1U_0402_16V7K

12

PC23 0.1U_0402_25V6K

@

CHG_B+

12

PC25 4.7U_0805_25V6-KPC25 4.7U_0805_25V6-K

PC24 4.7U_0805_25V6-KPC24 4.7U_0805_25V6-K

6

578

4

6

578

4

ADP_V <31>

PR52

10K_0402_1%

PC26 4.7U_0805_25V6-KPC26 4.7U_0805_25V6-K

PQ15

DTC115EUA_SC70-3

PQ17

AO4466L_SO8

10UH_MSCDRI-104A-100M-E_4.6A_20%

123

PQ19

AO4466L_SO8

123

1 2

12

PR65

4.7_1206_5%

12

PC43

680P_0603_50V8J

D

B+

1 2

13

2

BATT_ON

PL3

CHG

1 2 3

PR54

1 2

ACPRN

PR63

0.02_1206_1%

1 2

PQ6

PQ6 AO4435_SO8

AO4435_SO8

4

47K_0402_1%

1 2

12

100K_0402_1%

4 3

8 7 6 5

PR49

PC33

2200P_0402_25V7K

13

D

PQ16

2

SSM3K7002FU_SC70-3

G

S

12

PC41

10U_1206_25V6M

VIN

12

PC42

@

10U_1206_25V6M

BATT+

12

PC107

10U_1206_25V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/23 2010/01/23

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

D

37 45Wednesday, September 01, 2010

of

B

5

4

3

2

1

2VREF_51125

D D

PR77

13K_0402_1%

1 2

PR79

150K_0402_1%

BST_3V

UG_3V

LX_3V

LG_3V

PR88

100K_0402_5%

PR79

20K_0402_1%

1 2

PR81

1 2

PU6

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

12

2VREF_51125

PL20

HCB4532KF-800T90_1812

B+

C C

12

PC121

+3VALWP

Ipeak=5A Imax=3.5A F=305kHZ Total capacitor 330u ESR=15m ohm

B B

B++

12

PC61

2200P_0402_50V7K

10U_1206_25V6M

12

PC48

10U_1206_25V6M

4.7UH_SIL1045R-4R7PF_6.3A_30%

1 2

1

+

PC53

2

330U_6.3V_M

PQ25A

DMN66D0LDW-7_SOT363-6

PQ25A

PL4

6

578

PQ21

AO4466L_SO8

4

123

786

12

PR85

4.7_1206_5%

12

PC55

680P_0603_50V8J

ENTRIP1 ENTRIP2

61

D

G

S

5

PQ23

AO4712L_SO8

4

123

2

5

G

12

PC50

4.7U_0805_10V6K

1 2

PC51

.1U_0402_16V7K

499K_0402_1%

B+

34

D

S

1 2

PQ25B

DMN66D0LDW-7_SOT363-6

+3VLP

PR87

PR83

1 2

2.2_0603_1%

PC57

1U_0402_6.3V6K

12

PC47

1U_0603_10V6K

ENTRIP2

6

5

ENTRIP2

EN

14

13

B++

12

4

FB2

TONSEL

SKIPSEL

15

3

2

REF

VIN16GND

17

12

PC59

0.1U_0603_25V7K

FB1

1

PGOOD

UGATE1 PHASE1 LGATE1

PC58

PR78

30K_0402_1%

1 2

PR80

19.1K_0402_1%

1 2

PR82

150K_0402_1%

ENTRIP1

1 2

ENTRIP1

24

VO1

23

BST_5V

22

BOOT1

NC18VREG5

UG_5V

21

LX_5V

20

LG_5V

19

S IC UP6182CQAG VQFN 24P PWM

VL

4.7U_0805_10V6K

PR84

1 2

0_0603_5%

POK <18,36>

PC52

PC52 .1U_0402_16V7K

.1U_0402_16V7K

BST_5V1BST_3V1

1 2

B++

12

PC49

10U_1206_25V6M

AO4712L_SO8

PQ24

6

578

PQ22

AO4466L_SO8

4

123

786

5

4

123

PL5

4.7UH_SIL1045R-4R7PF_6.3A_30%

1 2

12

PR86

4.7_1206_5%

12

PC56

680P_0603_50V8J

+5VALWP

1

+

PC54

2

330U_6.3V_M

Ipeak=5A Imax=3.5A F=245kHZ Total capacitor 330u ESR=15m ohm

VL

100K_0402_1%

VS_ON<36>

1 2

VS

PR91

100K_0402_1%

2

100K_0402_1%

13

PQ31

DTC115EUA_SC70-3

2

G

A A

ACPRN<37>

EC_ON<31,33>

1 2

PR105

200K_0402_1%

5

12

PR90

12

SSM3K7002FU_SC70-3

12

PR92

42.2K_0402_1%

13

D

PQ9

S

2

PC60

2.2U_0603_10V6K

13

PQ27

PQ27 DTC115EUA_SC70-3

DTC115EUA_SC70-3

4

Security Classification

2009/01/23 2010/01/23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/23 2010/01/23

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Wednesday, September 01, 2010

Date: Sheet

SCHEMATICS, MB A6842

401981

1

of

38 45

of

38 45

of

38 45

B

A

1 1

PR802

0_0402_5%

12

1 2

4.02K_0402_1%

1 2

12

10K_0402_1%

PR808

PR810

12

PC804

@PC804

@

.1U_0402_16V7K

VTTPWROK<5,34>

VTTPWROK_CPU<5>

2.43K_0402_1%

PR812

12

PR814

4.53K_0402_1%

12

1 2

PU800

2

TON

3

OUT

4

VCC

5

FB

6

PGOOD

PR811

3.4K_0402_1%

VTTP_EN<31>

PR807

100_0603_1%

2 2

+5VALW

3 3

1 2

4.7U_0603_6.3V6K

PC809

B

255K_0402_1%

1 2

15

1

TP

EN_SKIP

VFB=0.75V

AGND7PGND

+5VS

PR801

14

BST

G5603RU1U_TQFN14_3P5X3P5

8

DH

LX

ILIM

VDD

DL

BST_1.05VS_VCCP

DH_1.05VS_VCCP

13

LX_1.05VS_VCCP

12

1 2

11

13.7K_0402_1%

10 9

DL_1.05VS_VCCP

PR805

PR803

2.2_0603_1%

1 2

PC805

0.1U_0603_25V7K

0.1U_0603_25V7K BST_1.05VS_VCCP1

1 2

+5VALW

1 2

PC806

4.7U_0805_10V6K

C

PL801

HCB2012KF-121T50_0805

12

PC62

PC122

10U_1206_25V6M

2200P_0402_50V7K

PR806

0_0402_5%

1 2

PR809

10_0402_5%

PR813

10_0402_5%

HCB2012KF-121T50_0805

1 2

12

1

+

2

12

PQ801

4

TPCA8030-H_SOP-ADV8-5

5

3 5

1.05VS_51117_B+

12

PC803

4.7U_0805_25V6-K

123

1.0UH_PCMC104T-1R0MN_20A_20%

12

PR804

4.7_1206_5%

PQ802

12

241

MDU2653RH_POWERDFN56-8-5

12

PC801

PC802

4.7U_0805_25V6-K

PL802

1 2

PC808

680P_0603_50V7K

12

4.7U_0805_25V6-K

+VTTP

PC807

PC807 390U_2.5V_M

390U_2.5V_M

VTT_SENSE <8>

VSS_SENSE_VTT<8>

D

B+

PJ20

2

112

JUMP_43X79@

(7.0A,280mils ,Via NO.=14)

4 4

Security Classification

2009/01/23 2010/01/23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2009/01/23 2010/01/23

Compal Secret Data

Deciphered Date

C

JUMP_43X79@

+1.05VS+VTTP

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

D

39 45Wednesday, September 01, 2010

B

of

5

4

3

1.5V_B+

2

PL21

HCB2012KF-121T50_0805

12

B+

1

12

PC92

4.7U_0805_25V6-K

12

PC123

2200P_0402_50V7K

+1.5VP

1

+

2

Ipeak=9A Imax=6.3A F=313kHZ

PC95

Total capacitor

330U_6.3V_M

1110u ESR=5m ohm

D D

PR127

255K_0402_1%

PU10

TON OUT VCC FB PGOOD

1 2

1

EN_SKIP

AGND7PGND

BST_1.5V

1 2

2.2_0603_1%

15

TP

8

2.2_0603_1%

14

BST

13

DH

12

LX

11

ILIM

10

VDD

9

DL

G5603RU1U_TQFN14_3P5X3P5

PR129

1 2

18K_0402_1%

18K_0402_1% DL_1.5V

BST_1.5V1

DH_1.5V LX_1.5V

PR132

PC94

0.1U_0603_25V7K

1 2

+5VALW

12

PC98

4.7U_0805_10V6K

PR128

0_0402_5%

SYSON<31>

+5VALW

C C

1 2

PR131

100_0603_1%

1 2

PC96

4.7U_0603_6.3V6K

12

PC93

@PC93

@

.1U_0402_16V7K

12

10K_0402_1%

12

PR134

10K_0402_1%

PR133

1 2

2 3 4 5 6

6

578

PQ34

4

AO4466L_SO8

123

786

5

PQ35

4

AO4712L_SO8

123

12

PC91

4.7U_0805_25V6-K

PL10

1 2

12

PR130

4.7_1206_5%

12

PC97

680P_0603_50V8J

PL10

1.8UH_SIL104R-1R8PF_9.5A_30%

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/23

3

Compal Secret Data

Deciphered Date

2010/01/23

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

Wednesday, September 01, 2010

401981

1

40 45

of

B

A

1 1

@PR136

@ 0_0402_5%

0_0402_5%

SUSP<9,34>

0.75VR_EN#<34>

2 2

+3VALW +5VALW

1 2

PR137

0_0402_5%

1 2

.1U_0402_16V7K

PR136

PC101

@PC101

@

B

+1.5V

1

PJ23

1

JUMP_43X79@

2

12

4.7U_0805_6.3V6K

13

2

G

12

PC100

D

S

PQ36

SSM3K7002FU_SC70-3

12

PR135

1K_0402_1%

PR138

1K_0402_1%

12

PC102

0.1U_0402_10V7K

PU11

VIN1VCNTL

2

GND

3

VREF

4

VOUT

UP7711U8_PSOP8

+0.75VSP

PC103

PC103 10U_0805_6.3V6M

10U_0805_6.3V6M

6 5

NC

7

NC

8

NC

9

TP

C

12

PC99

PC99 1U_0603_10V6K

1U_0603_10V6K

D

+5VALW

JUMP_43X39@

3 3

SUSP#<27,31,34>

4 4

A

4.7U_0805_25V6-K

PR181

0_0402_5%

1 2

PC182

1

2

12

@ PC187

@

0.47U_0402_6.3V6K

PC187

12

PC181

1U_0603_10V6K

6 5 9

8 7

PU180

VCNTL VIN VIN

EN POK

3

VOUT

4

VOUT

2

FB

GND

APL5930KAI-TRG_SO8

1

B

12

PR182

3K_0402_1%

12

PR184

2.4K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC183

12

0.01U_0402_25V7K

2009/01/23 2010/01/23

+1.8VSP

PC184

22U_0805_6.3V6M

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

D

of

41 45Wednesday, September 01, 2010

of

41 45Wednesday, September 01, 2010

of

41 45Wednesday, September 01, 2010

B

1

PJ181

JUMP_43X39@

8

H H

G G

F F

E E

D D

C C

B B

A A

CPU_VID0<8> CPU_VID1<8> CPU_VID2<8> CPU_VID3<8> CPU_VID4<8> CPU_VID5<8> CPU_VID6<8>

VR_ON<31>

H_DPRSLPVR<8>

CLK_ENABLE#<13>

+3VS

VGATE<18,31>

12

PR189

PR188

249K_0402_1%

8.06K_0402_1%

@

1 2

10P_0402_50V8J

1 2

PC132

150P_0402_50V8J

Layout Note: PH3 place near Phase1 L-MOS

+CPU_CORE

VCCSENSE<8>

VSSSENSE<8>

PR167 0_0402_5%PR167 0_0402_5%

PR168 0_0402_5%PR168 0_0402_5%

PR177

PR177 0_0402_5%

0_0402_5%

1 2

PR180

1 2

147K_0402_1%

12

PC127

1000P_0402_50V7K

PC131

1 2

PR199

412K_0402_1%

1 2

PR205 10_0402_5%@PR205 10_0402_5%@

8

1 2

PR172

1.91K_0402_1%

1.91K_0402_1% 1 2

PR174

1.91K_0402_1%

1 2

PR178 1K_0402_1%@PR178 1K_0402_1%@

+VTT

PR179 0_0402_5%PR179 0_0402_5%

H_PSI#<8>

PR194

562_0402_1%

1 2

PR196

2.43K_0402_1%

1 2

ISEN2

PR202 0_0402_5%PR202 0_0402_5%

1 2

ISEN1

PR203 0_0402_5%PR203 0_0402_5%

1 2

PR209 0_0402_5%PR209 0_0402_5%

PR217 0_0402_5%PR217 0_0402_5%

1 2

PR219 10_0402_5%@PR219 10_0402_5%@

1 2

1 2 PC126

PC126

22P_0402_50V8J

PC130

1 2

390P_0402_50V7K

330P_0402_50V7K

1000P_0402_50V7K

PC148

PC146

12

VSUM-

7

CLK_ENABLE#

PU13

1

PGOOD

2

PSI#

3

RBIAS

4

VR_TT#

5

NTC

6

VW

7

COMP

8

FB

9

ISEN3

10

ISEN2

41

AGND

12

PC138 0.22U_0402_6.3V6KPC138 0.22U_0402_6.3V6K

PC137 0.22U_0402_6.3V6KPC137 0.22U_0402_6.3V6K

12

1200P_0402_50V7K

7

40

12

PC149

330P_0402_50V7K

38

39

37

VR_ON

CLK_EN#

DPRSLPVR

ISEN111VSEN12RTN13ISUM-14ISUM+15VDD

12

1 2

PC186

@PC186

@

35

VID031VID132VID233VID334VID536VID6

VID4

BOOT2 UGATE2 PHASE2

VSSP2

LGATE2

PWM3

LGATE1

VSSP1

PHASE1

VIN

IMON18BOOT119UGATE1

17

16

20

12

PC133

1U_0603_10V6K

PR206

@ PR206

@

82.5_0402_1%

PC147

@ PC147

@

0.01U_0402_25V7K

1 2

PR214

1.2K_0402_1%

1 2

PR220

@PR220

@ 100_0402_1%

100_0402_1%

6

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 H_DPRSLPVR

ISL62883CHRZ-T_QFN40_5X5~D

PC119

PC119 1U_0603_10V6K

1U_0603_10V6K

1 2

30 29 28 27 26 25

VCCP

24 23 22 21

PR186 0_0402_5%PR186 0_0402_5%

1 2

12

PC128

1U_0603_10V6K

PR198 0_0402_5%PR198 0_0402_5%

1 2

PR201 1_0402_5%PR201 1_0402_5%

1 2

PC134

0.22U_0603_25V7K

12

PC144

0.047U_0402_16V7K

8.87K_0402_1%

VSSSENSE

12

PC145

0.22U_0603_10V7K

12

6

PR195 0_0402_5%PR195 0_0402_5%

1 2

+CPU_B+

+5VALW

12

PR204

12

PR208

2.61K_0402_1%

12

PR215

1 2

11K_0402_1%

Layout Note: Place near Phase1 Choke

PC151

.1U_0402_16V7K

5

+VTT

PR166 2.2_0603_1%PR166 2.2_0603_1%

1 2

PR183

PR183 0_0402_5%

0_0402_5%

5

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 H_DPRSLPVR H_PSI#

BOOT1

UGATE1

PHASE1

LGATE1

PR142 1K_0402_1%PR142 1K_0402_1%

12

PR144 1K_0402_1%PR144 1K_0402_1%

12

PR146 1K_0402_1%PR146 1K_0402_1%

12

PR148 1K_0402_1%@PR148 1K_0402_1%@

12

PR151 1K_0402_1%@PR151 1K_0402_1%@

12

PR154 1K_0402_1%PR154 1K_0402_1%

12

PR157 1K_0402_1%@PR157 1K_0402_1%@

12

PR160 1K_0402_1%PR160 1K_0402_1%

12

BOOT2 BOOT2_2

+5VALW

1 2

IMVP_IMON<8>

PC135

0.22U_0603_25V7K

VSUM+

PH4

10K_0402_1%_ERTJ0EG103FA

VSUM-

PC117

0.22U_0603_25V7K

0.22U_0603_25V7K 1 2

LGATE2

PR207 2.2_0603_1%PR207 2.2_0603_1%

1 2

4

PR143 1K_0402_1%@PR143 1K_0402_1%@

12

PR145 1K_0402_1%@PR145 1K_0402_1%@

12

PR147 1K_0402_1%@PR147 1K_0402_1%@

12

PR149 1K_0402_1%PR149 1K_0402_1%

12

PR152 1K_0402_1%PR152 1K_0402_1%

12

PR155 1K_0402_1%@PR155 1K_0402_1%@

12

PR158 1K_0402_1%PR158 1K_0402_1%

12

PR161 1K_0402_1%@PR161 1K_0402_1%@

12

PR163 1K_0402_1%PR163 1K_0402_1%

12

UGATE2

PC143

0.22U_0603_25V7K

BOOT1_1

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

5

PQ37

4

123

PQ38

3 5

241

5

4

123

3 5

241

2009/01/23 2010/01/23

3

TPCA8030-H_SOP-ADV8-5

PHASE2

MDU2653RH_POWERDFN56-8-5

PQ43

TPCA8030-H_SOP-ADV8-5

PQ44

MDU2653RH_POWERDFN56-8-5

Compal Secret Data

Deciphered Date

3

12

PC112

470P_0603_50V8J

12

PC120

PC110

2200P_0402_50V7K

12

PR169

4.7_1206_5%

12

PC118

680P_0603_50V8J

12

PC139

470P_0603_50V8J

12

PR210

12

PC116

4.7U_0805_25V6-K

0.36UH_FDU1040J-H-R36M=P3_33A_20%

12

PR173

PR170

10K_0402_5%

3.65K_0805_1%

VSUM+

ISEN2

12

PC140

PC141

4.7U_0805_25V6-K

12

4.7_1206_5%

3.65K_0805_1%

PR211

PC150

ISEN1

VSUM+

680P_0603_50V8J

2

12

PC113

4.7U_0805_25V6-K

4 3

PR175

@PR175

@

0_0402_5%

1 2

+CPU_B+

PL12

1

+

PC114

2

68U_25V_M_R0.36

1 2

V1N

HCB4532KF-800T90_1812

1 2

1

+

PC111

PC185

2

68U_25V_M_R0.36

V2N

PL11

68U_25V_M_R0.36

+CPU_CORE

12

PR171

PR171 1_0402_5%

1_0402_5%

VSUM-

Arrandale -- 2 phase 1H1L

+CPU_B+

12

PC142

4.7U_0805_25V6-K

PL14

0.36UH_FDU1040J-H-R36M=P3_33A_20%

PR212

10K_0402_5%

2

1

4 3

PR216

@PR216

@

0_0402_5%

1 2

Title

Size Document Number Rev

C

Date: Sheet

V1N

2

V2N

Compal Electronics, Inc.

+CPU_CORE

12

PR213

PR213 1_0402_5%

1_0402_5%

VSUM-

SCHEMATICS, MB A6842

401981

1

12

PC115 @ PC115

@

0.1U_0603_25V7K

1

B+

B

42 45Wednesday, September 01, 2010

B

of

A

1 1

B

C

GFXVR_EN

GFXVR_VID_0

D

<9>

GFXVR_VID_1

GFXVR_VID_2

GFXVR_VID_3

<9>

GFXVR_VID_6

GFXVR_VID_5

GFXVR_VID_4

E

F

G

H

+5VALW

+1.05VS

12

PR229

@PR229

@

300K_0402_5%

GFXVR_IMON<9>

2 2

3 3

12

PC155

0.056U_0402_16V7K

GFXVR_IMON

12

PR232

6.98K_0402_1%

VSS_AXG_SENSE

PR243

0_0402_5%

12

PC156

PC156 1000P_0402_50V7K

1000P_0402_50V7K

220P_0402_50V7K

PR244

PR244 0_0402_5%

0_0402_5%

1 2

VSS_AXG_SENSE

VCC_AXG_SENSE

+3VS

12

PR233

PR233 10K_0402_1%

10K_0402_1%

1 2 PC158

PC158

1 2

PR236

470P_0402_50V8J

1K_0402_1%

Avoid high dV/dt

<9>

1 2 PC162

PC162

GFX_COMP-1

GFXVR_IMON

12

PC160

47P_0402_50V8J

1 2

PR237

20K_0402_1%

PR238

10.7K_0402_1%

+GFX_B+

Connect to input caps

GFX_FB GFX_COMP

GFX_VCC GFX_ILIM

1 2

GFX_CSCOMP

1 2 3 4 5 6 7 8

GFX_IREF

PR239

80.6K_0402_1%

1 2

PR248

1K_0402_1%

1000P_0402_50V7K

PWRGD IMON CLKEN# FBRTN FB COMP GPU ILIM

PR223 0_0402_5%PR223 0_0402_5%

PR224 0_0402_5%PR224 0_0402_5%

PR222 0_0402_5%PR222 0_0402_5%

PR221 0_0402_5%PR221 0_0402_5%

1 2

GFX_EN

32

EN

VID031VID130VID229VID328VID427VID526VID6

ADP3211AMNR2G_QFN32_5X5

PU15

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

GFX_RT

GFX_RAMP

GFX_RPM

PR241

PR240

12

1 2

340K_0402_1%

237K_0402_1%

GFX_RAMP-1

PC166

12

1 2

12

PR225 0_0402_5%PR225 0_0402_5%

PR226 0_0402_5%PR226 0_0402_5%

1 2

GFX_CSCOMP

PR245

422K_0402_1%

12

PR227 0_0402_5%PR227 0_0402_5%

PR231 0_0402_5%PR231 0_0402_5%

1 2

25

DRVH

PVCC

DRVL PGND AGND AGND

16

GFX_CSCOMP

GFX_CSFB

PC167

PC167 1000P_0402_50V7K

1000P_0402_50V7K

24

VCC

23

BST

22 21

SW

20 19 18 17 33

12

PC164

PC164 1000P_0402_50V7K

1000P_0402_50V7K

Shortest the net trace

PR228

PR228 10_0603_1%

10_0603_1%

1 2

GFX_VCC

GFX_BOOST

GFX_DRVH GFX_SW

GFX_DRVL

12

PC154

PC154 1U_0805_25V6K

1U_0805_25V6K

PR234

PR234 0_0603_5%

0_0603_5%

1 2

220K_0402_5%_ERTJ0EV224J~D

1 2

PR242

71.5K_0402_1%

12

PC165

PC165 560P_0402_50V7K

560P_0402_50V7K

PC157

0.22U_0603_25V7K

GFX_BOOST-1

1 2

+5VALW

12

PC159

2.2U_0603_10V6K

PH5

Place RTH1 close to inductor on the same layer

12

PR246

PR246 165K_0402_1%

165K_0402_1%

PR247

40.2K_0603_1%

5

PQ46

4

123

TPCA8030-H_SOP-ADV8-5

12

PR235

4.7_1206_5%

12

PQ47

3 5

241

12

MDU2653RH_POWERDFN56-8-5

PC163

680P_0603_50V8J

+GFX_B+

12

PC168

0.36UH_PCMC104T-R36MN1R105_30A_20%

12

PC152

4.7U_0805_25V6-K

PL16

1 2

Switchable -- mount Non Swithchable--non mount @

PC153

4.7U_0805_25V6-K

PL15

HCB4532KF-800T90_1812

12

1

+

2

PC161

390U_2.5V_M

B+

+GFX_COREP

Ipeak=22A Imax=15.4A F=350kHZ Total capacitor 720u ESR=3.75m ohm

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2009/10/02 2010/10/02

Compal Secret Data

Deciphered Date

F

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

G

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

43 45Wednesday, September 01, 2010

H

of

B

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------

2010/07/13 2010/07/13

2010/07/23

42 43

36

36 Add PD6,PD7

2010/07/26

2010/07/26 2010/07/26 2010/07/26 EMI request

2010/07/28 2010/07/28 2010/07/28

2010/07/28 2010/07/28

2010/07/28

2010/07/28 2010/07/28

37 Add PC73,PC74,PC75(10U_1206) 38 39

40 35

36 37 38 39

40

42

43 Change PQ47 to SB00000NT00 2010/08/10 36 2010/08/10 2010/08/10

2010/08/10

2010/08/10 2010/08/10 2010/08/12 2010/08/25

37

38

39 40 43 35

35

2010/08/25 37

Change PL12,PL14 to SH00000IN00 Change PL16 to SH00000IN00

Change PC19 to SE070104Z80

BOM modify

BOM modify BOM modify

EMI request2010/07/26

EMI request

Add PC121(2200P_0402),PC61(10U_1206)

Add PC122(2200P_0402),PC62(10U_1206)

EMI request EMI request

Add PC123(2200P_0402) Change PD1 to SC11N414880 Change PD6,PD7 to SCA00000R00 Change PQ16 to SB000009610

Change PQ32 to SB000009610,PC53,PC54 to SF000002000

Change PQ802 to SB00000NT00 Change PC95 to SF000002000

Change PQ38,PQ44 to SB00000NT00

BOM modify BOM modify BOM modify

BOM modify BOM modify

BOM modify

BOM modify BOM modify

Change PR31 to SD034232280,PR34 to SD034107280 Add PR65(4.7 ohm),PC43(680PF) EMI request

Add PR85,PR86(4.7ohm),PC55,PC56(680PF), Change PR83 to 2.2 ohm

Add PR804(4.7ohm),PC808(680PF), Change PR803 to 2.2 ohm

Add PR130(4.7ohm),PC97(680PF), Change PR129 to 2.2 ohm

Add PR235(4.7ohm),PC163(680PF)

Add PR8 Circuit modify Remove PR2,PR3,PR4,PR5,PR6,PR7,PR8,PD1,PD4,PQ2,PQ3,PQ30 Change PR1 to 0_1206_5%

Change PQ8 to SI4483(SB00000MW00)

Thermal request

EMI request

EMI request EMI request EMI request

Pre-charge issue

Circuit modify

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/23 2010/01/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

of

44 45Wednesday, September 01, 2010

of

44 45Wednesday, September 01, 2010

of

44 45Wednesday, September 01, 2010

B

5

4

3

2

1

PIR (Product Improve Record)

PWWAA LA-6842P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------------------------------

D D

7/22 32 change U22 P/N form SA00003GM10 to SA00003GK00.

7/22 27 D24 change from BT@ to @

33 Change to 5mA LED7/22 change D22, D25 to 5mA LED, R397,R399 form 120 to

510ohm,PU power plane form +3VALW to +5VALW.

(Change back on 7/27 due to SA00003GK00 is EOL.)

add PJ32 to connect +1.5V_CPU and +1.5VS.7/22 9 For cost down plan

7/23 7/23

28 30

Change UL3 P/N to SP050003N00 Change LEXMIC and JLINE symbol

For EMI request For ME request

For EMI request29 Add RA41 and reserve CA307/26

317/26 Change ACIN_D PU form +3VALW to +3VL. Design change

307/27 Change JLINE and JEXMIC footprint For ME request

317/28 unstuff Y4, C449,C450 Design change

C C

317/28 unstuff C456 For Ctrl+Alt+Del reboot fail issue

PWWAA LA-6842P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.2 TO 1.0

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------------------------------

33 Add R4038/03 Change to 5mA LED 33 unstuff SW2, SW38/03 For MP use

8/12 For EMI request

B B

30 change componment from unmount to mount --> CA9, CA10,

CA11 and CA19

16 Add R2778/12 For RTC reserve charge issue

34 Add C125 and C1268/13 For EMI request 28 change CL37 and CL38 from mount to unmount8/13 For EMI request 28 Add D698/13 For ESD request

34 Add C481, C482, C483, C484 and C4858/16 For EMI request 33 change JTOUCH footprint to SP010015G00 (S 161021-06021) For ME request8/16 28 change UL3 LAN tranfromer P/N to SP050006E00(MHPC

NS681610)

For EMI request8/16

28 Add CL39 For EMI request8/16

29 change CA63 BOM structure to always mount For +PVDD1 and +PVDD2 ripple noise8/23 29 exchange RA18 and CA48 P/N for +AVDD ripple noise For +AVDD ripple noise 8/23

a. change RA18 P/N from SD013000080 (0_0603_5%) to SE025104K80 (0.1U_0603_50V7K)

b. change CA48 P/N from SE025104K80 (0.1U_0603_50V7K) to SD013000080 (0_0603_5%)

16 change U13 P/N to SA00003K800 (WINBOND) For SPI ROM EOL8/16

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/06/21 2011/06/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6842

401981

45 45Wednesday, September 01, 2010

1

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