COMPAL LA-6801P Schematics

A

B

C

D

E

MODEL NAME :

PCB NO :

BOM P/N :

1 1

LA-6801P ( DAB00000410 )

46198531L01 -->R3
46198531L02 -->R1

PALB0

46198531L03 -->R3
46198531L04 -->R1

Dell/Compal Confidential

Schematic Document

2 2

Specter (Huron River)

Sandy Bridge(PGA) + Cougar Point(standard)

DISCRETE VGA N12E-GE-B (optimus)

3 3

2011-01-25

Rev: 1.0

4 4

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

C

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-6801P

LA-6801P

LA-6801P

1.0

1.0

1.0

of

of

of

1 61Tuesday, January 25, 2011

1 61Tuesday, January 25, 2011

1 61Tuesday, January 25, 2011

E

A

B

C

D

E

Compal Confidential

Project Code : PALB0

FFS

P.28

Fan Control

P.30

CPU XDP
Conn.

P.6

File Name : LA-6801P

1 1

HDMI
Conn.

DP Conn.

P.39

P.38

DP MUX

P.37

LVDS

2 2

Conn.

CRT Conn.

P.21

P.21

HDMI

DisplayPort

DisplayPort

DP (DIS)

DP

GPU
N12E-GE

P.40~45

PEG x16 (DIS)

LVDS

CRT

(UMA)

100MHz

2.7GT/s

DisplayPort

PCI-E x1

Port 3 Port 2 Port 1 Port 4

Mini Card-2

WLAN (Half)

USB[x]

3 3

port4

WWAN (Full)

USB[x]
port5

DMC/Daughter Board

RTC CKT.

Power On/Off CKT.

DC/DC Interface CKT.

4 4

Power Circuit DC/DC

P.13

P.29

P.33

P.49~59

LAN(GbE)

AR8151-BL1A

RJ45

P.32

Card ReaderMini Card-1

RTS5209

P.22 P.23

9 in 1
Socket

P.23P.22

USB 3.0/2.0
Host Ctrl.

USB 3.0/2.0
Combo Conns x2

SPI ROM

Port 6

P.27

P.27

ENE 3810

P.13 P.31

Intel

Sandy Bridge

Processor

4C 45W SV

rPGA 989 Socket

P.5~10

DMI x4FDI x8

100MHz
5GB/s

Intel

Cougar Point

PCH

BGA 989 Balls

P13~20

SPI

P.31

Touch Pad Int.KBD

LPC Bus

ENE KB930

P.35

P.29 P.31

Memory Bus (DDRIII)

Dual Channel

1.5V DDRIII 1066/1333 MHz

Port 0

SATA2.0

Port 2

Port 0

Port 2

Port 4

USB2.0

Port 5

Port 6

HD Audio

Port 8

BIOS ROM

204pin DDRIII SO-DIMM x2

P.28

P.28

P.26

P.21

P.32

P.32

P.32

P.11,12

DMC/Daughter Board

BANK 0, 1, 2, 3

SATA HDD Conn.

SATA ODD Conn.

USB 2.0

( USB Charger )

Digital Camera

Mini Card-1 (WLAN)

( Half )

Mini Card-2 (WWAN)

( Full )

AlienFX/ELC

P.34~36

BT 2.1 /BT 3.0

Audio Codec
ALC665-GR

TI TPA6017A2

Int. Speaker

P.24

P.25

P.25

( HeadPhone x2, MIC)

SIM Card

P.32

TPA6211A

sub-woofer conn.

Audio Jack x3

Digital MIC

P.25

P.25

P.25

P.24

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

C

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

LA-6801P

LA-6801P

LA-6801P

1.0

1.0

1.0

of

of

of

2 61Tuesday, January 25, 2011

2 61Tuesday, January 25, 2011

2 61Tuesday, January 25, 2011

E

A

Compal Confidential

Project Code : PALB0
File Name : LA-6801P

B

C

D

E

1 1

LA-6801P M/B

40 pin

Wire

Camera

LCD Panel

Blue Tooth

LS-6801P

LS-6803P

INDICATOR/B

2 2

Led-Wireless

Led-CapsLock

Wire

6 pin

BTB conn.

WLAN WWAN/DMC

80 pin

DMC/B

14 pin

Wire

12 pin

Wire

20 pin

HDD

ODD

LF-6801P

FPC

FFC

20 pin

Wire

6 pin

FFC

12 pin

LS-6802P

TP LED/B

Touch Pad

3 3

FFC

4 pin

Led x 6

Lid

LS-6809P

LOGO LIGHT GUIDE/B

Led x 6

LS-6806P

POWER BUTTON/B

on/off SW

Led x 3

4 pin4 pin

WireWire

LS-6807P

LS-6808P

FRONT LIGHT L/B

Led x 2 Led x 2

4 4

A

FRONT LIGHT R/B

B

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

C

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

of

of

of

3 61Tuesday, January 25, 2011

3 61Tuesday, January 25, 2011

3 61Tuesday, January 25, 2011

E

1.0

1.0

1.0

Board ID Table for AD channel

Vcc 3.3V +/- 5%
Ra

Board ID

0
1
2
3
4
5
6
7

SMBUS Control Table

EC_SMB_CK1
EC_SMB_DA1

EC_SMB_CK2
EC_SMB_DA2

PCH_SML0CLK
PCH_SML0DATA

PCH_SML1CLK
PCH_SML1DATA

MEM_SMBCLK
MEM_SMBDATA

100K +/- 5%

Rb V min

0 0 V

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%

100K +/- 5%
200K +/- 5%

NC

SOURCE

KB930

KB930

PCH

PCH

PCH

MINI1 BATT SODIMM

V V

AD_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

MINI2

V

V typ

AD_BID

0 V 0.155 V

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

Thermal
Sensor 1

V V

V

V

AD_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

Thermal
Sensor 2

max

FFS VGA

EC AD3

0x00-0x0C
0x0D-0x1C
0x1D-0x30
0x31-0x49
0x4A-0x69
0x6A-0x8E
0x8F-0xBB
0xBC-0xFF

VGA Thermal
Sensor

V

V V

A

BOARD ID Table

Board ID

0
1
2
3
4
5
6
7

DMCVXDP

Charger

V

V

PCB Revision

0.1

0.2

0.3

0.4

1.0

Link

PCH

USB PORT#

0

1

2

3

4

5

6

7

8

9

10

11

12

DESTINATION

None

JUSB1 (2.0 Ext Left Side)

Bluetooth

CAMERA

JMINI1 (WLAN)

JMINI2 (WWAN/DMC)

ELC 8051

None

None

None

None

None

None

CLKOUT

1 1

PCI0

PCI1

PCI2

PCI3

PCI4

CLK

DESTINATION

PCH_LOOPBACK

EC LPC

None

None

None

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

CLKOUT_PCIE6

CLKOUT_PCIE7

CLKOUT_PEG_B

DESTINATIONDIFFERENTIAL

None

10/100/1G LAN

MINI CARD-2 WWAN

MINI CARD-1 WLAN

CARD READER

None

USB 3.0

None

None

FLEX CLOCKS DESTINATION

CLKOUTFLEX0

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

None

None

None

None

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

A

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

DESTINATION

HDD

None

ODD

None

None

None

Symbol Note :

: means Digital Ground

: means Analog Ground

Compal Secret Data

Compal Secret Data

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

13

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

Lane 7

Lane 8 None

None

DESTINATION

10/100/1G LAN

MINI CARD-2 WWAN/DMC

MINI CARD-1 WLAN

CARD READER

None

USB 3.0

None

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

LA-6801P

LA-6801P

LA-6801P

4 61Tuesday, January 25, 2011

4 61Tuesday, January 25, 2011

4 61Tuesday, January 25, 2011

1.0

1.0

1.0

5

JCPU1A

D D

DMI_CRX_PTX_N0<15>
DMI_CRX_PTX_N1<15>
DMI_CRX_PTX_N2<15>
DMI_CRX_PTX_N3<15>

DMI_CRX_PTX_P0<15>
DMI_CRX_PTX_P1<15>
DMI_CRX_PTX_P2<15>
DMI_CRX_PTX_P3<15>

DMI_CTX_PRX_N0<15>
DMI_CTX_PRX_N1<15>
DMI_CTX_PRX_N2<15>
DMI_CTX_PRX_N3<15>

DMI_CTX_PRX_P0<15>
DMI_CTX_PRX_P1<15>
DMI_CTX_PRX_P2<15>
DMI_CTX_PRX_P3<15>

FDI_CTX_PRX_N0<15 >
FDI_CTX_PRX_N1<15 >
FDI_CTX_PRX_N2<15 >
FDI_CTX_PRX_N3<15 >
FDI_CTX_PRX_N4<15 >
FDI_CTX_PRX_N5<15 >

C C

B B

FDI_CTX_PRX_N6<15 >
FDI_CTX_PRX_N7<15 >

FDI_CTX_PRX_P0<15>
FDI_CTX_PRX_P1<15>
FDI_CTX_PRX_P2<15>
FDI_CTX_PRX_P3<15>
FDI_CTX_PRX_P4<15>
FDI_CTX_PRX_P5<15>
FDI_CTX_PRX_P6<15>
FDI_CTX_PRX_P7<15>

FDI_FSYNC0<15>
FDI_FSYNC1<15>

FDI_INT<15>

FDI_LSYNC0<15>
FDI_LSYNC1<15>

+VCCP

RC36 24.9_0402_1%

RC36 24.9_0402_1%

R1942 10K _0402_5%~DR1942 10K _0402_5%~D

1 2

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

+EDP_COM

12

JCPU1A

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

4

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]

PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

J22
J21
H22

PEG_GTX_C_HRX_N15

K33

PEG_GTX_C_HRX_N14

M35

PEG_GTX_C_HRX_N13

L34

PEG_GTX_C_HRX_N12

J35

PEG_GTX_C_HRX_N11

J32

PEG_GTX_C_HRX_N10

H34

PEG_GTX_C_HRX_N9

H31

PEG_GTX_C_HRX_N8

G33

PEG_GTX_C_HRX_N7

G30

PEG_GTX_C_HRX_N6

F35

PEG_GTX_C_HRX_N5

E34

PEG_GTX_C_HRX_N4

E32

PEG_GTX_C_HRX_N3

D33

PEG_GTX_C_HRX_N2

D31

PEG_GTX_C_HRX_N1

B33

PEG_GTX_C_HRX_N0

C32

PEG_GTX_C_HRX_P15

J33

PEG_GTX_C_HRX_P14

L35

PEG_GTX_C_HRX_P13

K34

PEG_GTX_C_HRX_P12

H35

PEG_GTX_C_HRX_P11

H32

PEG_GTX_C_HRX_P10

G34

PEG_GTX_C_HRX_P9

G31

PEG_GTX_C_HRX_P8

F33

PEG_GTX_C_HRX_P7

F30

PEG_GTX_C_HRX_P6

E35

PEG_GTX_C_HRX_P5

E33

PEG_GTX_C_HRX_P4

F32

PEG_GTX_C_HRX_P3

D34

PEG_GTX_C_HRX_P2

E31

PEG_GTX_C_HRX_P1

C33

PEG_GTX_C_HRX_P0

B32

PEG_HTX_GRX_N15

M29

PEG_HTX_GRX_N14

M32

PEG_HTX_GRX_N13

M31

PEG_HTX_GRX_N12

L32

PEG_HTX_GRX_N11

L29

PEG_HTX_GRX_N10

K31

PEG_HTX_GRX_N9

K28

PEG_HTX_GRX_N8

J30

PEG_HTX_GRX_N7

J28

PEG_HTX_GRX_N6

H29

PEG_HTX_GRX_N5

G27

PEG_HTX_GRX_N4

E29

PEG_HTX_GRX_N3

F27

PEG_HTX_GRX_N2

D28

PEG_HTX_GRX_N1

F26

PEG_HTX_GRX_N0

E25

PEG_HTX_GRX_P15

M28

PEG_HTX_GRX_P14

M33

PEG_HTX_GRX_P13

M30

PEG_HTX_GRX_P12

L31

PEG_HTX_GRX_P11

L28

PEG_HTX_GRX_P10

K30

PEG_HTX_GRX_P9

K27

PEG_HTX_GRX_P8

J29

PEG_HTX_GRX_P7

J27

PEG_HTX_GRX_P6

H28

PEG_HTX_GRX_P5

G28

PEG_HTX_GRX_P4

E28

PEG_HTX_GRX_P3

F28

PEG_HTX_GRX_P2

D27

PEG_HTX_GRX_P1

E26

PEG_HTX_GRX_P0

D25

+VCCP

12

RC2

RC2

24.9_0402_1%

24.9_0402_1%

PEG_COMP

CC200 220nF_0402_16V7 K

CC200 220nF_0402_16V7 K

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

CC199 220nF_0402_16V7 K

CC199 220nF_0402_16V7 K
CC198 220nF_0402_16V7 K

CC198 220nF_0402_16V7 K
CC197 220nF_0402_16V7 K

CC197 220nF_0402_16V7 K
CC196 220nF_0402_16V7 K

CC196 220nF_0402_16V7 K
CC195 220nF_0402_16V7 K

CC195 220nF_0402_16V7 K
CC194 220nF_0402_16V7 K

CC194 220nF_0402_16V7 K
CC193 220nF_0402_16V7 KCC193 220nF_0402_16V7 K
CC192 220nF_0402_16V7 KCC192 220nF_0402_16V7 K
CC191 220nF_0402_16V7 KCC191 220nF_0402_16V7 K
CC190 220nF_0402_16V7 KCC190 220nF_0402_16V7 K
CC189 220nF_0402_16V7 KCC189 220nF_0402_16V7 K
CC188 220nF_0402_16V7 KCC188 220nF_0402_16V7 K
CC187 220nF_0402_16V7 KCC187 220nF_0402_16V7 K
CC186 220nF_0402_16V7 KCC186 220nF_0402_16V7 K
CC185 220nF_0402_16V7 KCC185 220nF_0402_16V7 K

CC216 220nF_0402_16V7 K

CC216 220nF_0402_16V7 K
CC215 220nF_0402_16V7 K

CC215 220nF_0402_16V7 K
CC214 220nF_0402_16V7 K

CC214 220nF_0402_16V7 K
CC213 220nF_0402_16V7 K

CC213 220nF_0402_16V7 K
CC212 220nF_0402_16V7 K

CC212 220nF_0402_16V7 K
CC211 220nF_0402_16V7 K

CC211 220nF_0402_16V7 K
CC210 220nF_0402_16V7 K

CC210 220nF_0402_16V7 K
CC209 220nF_0402_16V7 KCC209 220nF_0402_16V7 K
CC208 220nF_0402_16V7 KCC208 220nF_0402_16V7 K
CC207 220nF_0402_16V7 KCC207 220nF_0402_16V7 K
CC206 220nF_0402_16V7 K

CC206 220nF_0402_16V7 K
CC205 220nF_0402_16V7 KCC205 220nF_0402_16V7 K
CC204 220nF_0402_16V7 KCC204 220nF_0402_16V7 K
CC203 220nF_0402_16V7 KCC203 220nF_0402_16V7 K
CC202 220nF_0402_16V7 KCC202 220nF_0402_16V7 K
CC201 220nF_0402_16V7 KCC201 220nF_0402_16V7 K

3

PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

PEG_GTX_C_HRX_N15 <40>
PEG_GTX_C_HRX_N14 <40>
PEG_GTX_C_HRX_N13 <40>
PEG_GTX_C_HRX_N12 <40>
PEG_GTX_C_HRX_N11 <40>
PEG_GTX_C_HRX_N10 <40>
PEG_GTX_C_HRX_N9 <40>
PEG_GTX_C_HRX_N8 <40>
PEG_GTX_C_HRX_N7 <40>
PEG_GTX_C_HRX_N6 <40>
PEG_GTX_C_HRX_N5 <40>
PEG_GTX_C_HRX_N4 <40>
PEG_GTX_C_HRX_N3 <40>
PEG_GTX_C_HRX_N2 <40>
PEG_GTX_C_HRX_N1 <40>
PEG_GTX_C_HRX_N0 <40>

PEG_GTX_C_HRX_P15 <40>
PEG_GTX_C_HRX_P14 <40>
PEG_GTX_C_HRX_P13 <40>
PEG_GTX_C_HRX_P12 <40>
PEG_GTX_C_HRX_P11 <40>
PEG_GTX_C_HRX_P10 <40>
PEG_GTX_C_HRX_P9 <40>
PEG_GTX_C_HRX_P8 <40>
PEG_GTX_C_HRX_P7 <40>
PEG_GTX_C_HRX_P6 <40>
PEG_GTX_C_HRX_P5 <40>
PEG_GTX_C_HRX_P4 <40>
PEG_GTX_C_HRX_P3 <40>
PEG_GTX_C_HRX_P2 <40>
PEG_GTX_C_HRX_P1 <40>
PEG_GTX_C_HRX_P0 <40>

PEG_HTX_C_GRX_N15 <40>
PEG_HTX_C_GRX_N14 <40>
PEG_HTX_C_GRX_N13 <40>
PEG_HTX_C_GRX_N12 <40>
PEG_HTX_C_GRX_N11 <40>
PEG_HTX_C_GRX_N10 <40>
PEG_HTX_C_GRX_N9 <40>
PEG_HTX_C_GRX_N8 <40>
PEG_HTX_C_GRX_N7 <40>
PEG_HTX_C_GRX_N6 <40>
PEG_HTX_C_GRX_N5 <40>
PEG_HTX_C_GRX_N4 <40>
PEG_HTX_C_GRX_N3 <40>
PEG_HTX_C_GRX_N2 <40>
PEG_HTX_C_GRX_N1 <40>
PEG_HTX_C_GRX_N0 <40>

PEG_HTX_C_GRX_P15 <40>
PEG_HTX_C_GRX_P14 <40>
PEG_HTX_C_GRX_P13 <40>
PEG_HTX_C_GRX_P12 <40>
PEG_HTX_C_GRX_P11 <40>
PEG_HTX_C_GRX_P10 <40>
PEG_HTX_C_GRX_P9 <40>
PEG_HTX_C_GRX_P8 <40>
PEG_HTX_C_GRX_P7 <40>
PEG_HTX_C_GRX_P6 <40>
PEG_HTX_C_GRX_P5 <40>
PEG_HTX_C_GRX_P4 <40>
PEG_HTX_C_GRX_P3 <40>
PEG_HTX_C_GRX_P2 <40>
PEG_HTX_C_GRX_P1 <40>
PEG_HTX_C_GRX_P0 <40>

2

JCPU1I

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS

1

F22

VSS234

F19

VSS235

E30

VSS236

E27

VSS237

E24

VSS238

E21

VSS239

E18

VSS240

E15

VSS241

E13

VSS242

E10

VSS243

E9

VSS244

E8

VSS245

E7

VSS246

E6

VSS247

E5

VSS248

E4

VSS249

E3

VSS250

E2

VSS251

E1

VSS252

D35

VSS253

D32

VSS254

D29

VSS255

D26

VSS256

D20

VSS257

D17

VSS258

C34

VSS259

C31

VSS260

C28

VSS261

C27

VSS262

C25

VSS263

C23

VSS264

C10

VSS265

C1

VSS266

B22

VSS267

B19

VSS268

B17

VSS269

B15

VSS270

B13

VSS271

B11

VSS272

B9

VSS273

B8

VSS274

B7

VSS275

B5

VSS276

B3

VSS277

B2

VSS278

A35

VSS279

A32

VSS280

A29

VSS281

A26

VSS282

A23

VSS283

A20

VSS284

A3

VSS285

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

A A

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(1/6) DMI,FDI,PEG

PROCESSOR(1/6) DMI,FDI,PEG

PROCESSOR(1/6) DMI,FDI,PEG

LA-6801P

LA-6801P

LA-6801P

1

of

of

of

5 61Tuesday, January 25, 2011

5 61Tuesday, January 25, 2011

5 61Tuesday, January 25, 2011

1.0

1.0

1.0

5

XDP_PREQ#_R
XDP_PRDY#_R

XDP_BPM#0
XDP_BPM#1

XDP_BPM#2
XDP_BPM#3

CFG10_R

RC130_0402_5%~D @ RC130_04 02_5%~D @

1 2
1 2

1 2
1 2

1 2

12

RC150_0402_5%~D @ RC150_04 02_5%~D @

12

RC221K_0402_5%~D RC221K_0402_5%~D
RC230_0402_5%~D RC230_040 2_5%~D

RC241K_0402_5%~D RC241K_0402_5%~D
RC260_0402_5%~D RC260_0402_5%~D

RC30

RC30

CFG11_R

XDP_BPM#4
XDP_BPM#5

XDP_BPM#6
XDP_BPM#7

H_CPUPWRGD_XDP
CFD_PWRBTN#_XDP

XDP_HOOK2
SYS_PWROK_XDP

XDP_TCK1
XDP_TCK_R

D D

C C

CFG10<8>
CFG11<8>

H_CPUPWRGD

CFG0<8>

VGATE<15,31,57>

PCH_JTAG_TCK<13>

The resistor
for HOOK2 should be
placed such that the
stub is very small
on CFG0 net

PCH_SMBDATA<11,12,14,28,32>
PCH_SMBCLK<11,12,14,28,32>

0_0402_5%~D @

0_0402_5%~D @

+VCCP +VCCP

+3VALW

12

@

@

RC27

RC27
1K_0402_5%~D

1K_0402_5%~D

SYS_PWROK_XDP

4

JXDP1

JXDP1

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_A B

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

SAMTE_BSH-030-01-L-D-A

CONN@

CONN@

GND1
OBSFN_C0
OBSFN_C1

GND3

OBSDATA_C0
OBSDATA_C1

GND5

OBSDATA_C2
OBSDATA_C3

GND7
OBSFN_D0
OBSFN_D1

GND9

OBSDATA_D0
OBSDATA_D1

GND11
OBSDATA_D2
OBSDATA_D3

GND13

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_C D

RESET#/HOOK6

DBR#/HOOK7

GND15

TRST#

TMS

GND17

JCPU1B

JCPU1B

3

PM_DRAM_PWRGD<15>

PCH_PWROK<15,31>

SYS_PWROK<15>

+3V_PCH

1 2

2

CFG16_R

RC3 0_0402_5%~D@RC3 0_04 02_5%~D@

4

CFG17_R

6
8

CFG0_R

10

CFG1_R

12
14

CFG2_R

16

CFG3_R

18
20

CFG8_R

22

CFG9_R

24
26

CFG4_R

28

CFG5_R

30
32

CFG6_R

34

CFG7_R

36
38

CLK_CPU_ITP

40

CLK_CPU_ITP#

42
44

XDP_RST#_R

46

XDP_DBRES ET#

48
50

XDP_TDO

52

TD0

TDI

XDP_TRST#_R

54

XDP_TDI

56

XDP_TMS_R

58
60

1 2

RC5 0_0402_5%~D@RC5 0_04 02_5%~D@

1 2

RC7 0_0402_5%~D@RC7 0_04 02_5%~D@

1 2

RC9 0_0402_5%~D@RC9 0_04 02_5%~D@

1 2

RC10 0_0402_5%~D@RC10 0_0402_5 %~D@

1 2

RC12 0_0402_5%~D@RC12 0_0402_5 %~D@

1 2

RC14 0_0402_5%~D@RC14 0_0402_5 %~D@

1 2

RC16 0_0402_5%~D@RC16 0_0402_5 %~D@

1 2

RC17 0_0402_5%~D@RC17 0_0402_5 %~D@

1 2

RC18 0_0402_5%~D@RC18 0_0402_5 %~D@

1 2

RC20 0_0402_5%~D@RC20 0_0402_5 %~D@

1 2

RC21 0_0402_5%~D@RC21 0_0402_5 %~D@

1 2

1 2

RC25 1K_0402_5%~DRC25 1K_0402_5%~D

RC28 0_0402_5%~D@RC28 0_0402_5%~D@

1 2

RC31 0_0402_5%~D@RC31 0_0402_5%~D@

1 2

RC29 0_0402_5%~D@RC29 0_0402_5%~D@

1 2

+VCCP

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

CC67

CC67

2

CFG16 <8>
CFG17 <8>

CFG0 <8>
CFG1 <8>

CFG2 <8>
CFG3 <8>

CFG8 <8>
CFG9 <8>

CFG4 <8>
CFG5 <8>

CFG6 <8>
CFG7 <8>

CLK_CPU_ITP <14>
CLK_CPU_ITP# <14>PBTN_OUT#<15,31>

PLT_RST#

PCH_JTAG_TDO <13>

PCH_JTAG_TDI <13>
PCH_JTAG_TMS <13>

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

CC66

CC66

2

Place near JXDP1

0_0402_5%~D

0_0402_5%~D

RC4

RC4

200_0402_1%

200_0402_1%

2

RC128

RC128

RC127

RC127

@

@

1 2

1 2

0_0402_5%~D

0_0402_5%~D

1 2

RC11 0_0402_5%~DRC11 0_0402_5%~D

RUN_ON_CPU1.5VS3#<10,33>

PLT_RST#<16,22,23,27,31,32>

+3VS

12

@

@

RC6

RC6

10K_0402_5%~D

10K_0402_5%~D

D_PWG

1
2

+3VALW

UC1

UC1

5

B

VCC

A

4

GND3Y

74AHC1G09GW TSSOP 5P

74AHC1G09GW TSSOP 5P

RUN_ON_CPU1.5VS3#

UC2

UC2

1

NC

VCC

2

A
GND3Y

SN74LVC1G07DC KR_SC70-5~D

SN74LVC1G07DC KR_SC70-5~D

5

4

2

G

G

+3VALW

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

+1.5V_CPU_VDDQ

CC65

CC65

1

2

RC19

RC19
39_0402_1%

39_0402_1%

1 2

13

D

D

QC1

QC1
SSM3K7002F_S C59-3

SSM3K7002F_S C59-3

S

S

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

2

BUFO_CPU_RST#

1

12

RC8

RC8
200_0402_1%

200_0402_1%

VDDPWRGOOD

RC8
CRB 1.1K
CHECK LIST 0.7 --> 4.75K
INTEL recommand 1.1K
PDG 0.71 rev -->200

+VCCP

CC68

CC68

12

RC32

RC32
75_0402_5%

75_0402_5%

RC33

RC33

1 2

43_0402_1%

43_0402_1%

BUF_CPU_RST#

12

@

@

RC34

RC34
0_0402_5%~D

0_0402_5%~D

CLK_CPU_DMI_R

A28

DPLL_REF_CLK

DPLL_REF_CLK #

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

MISC

MISC

3

BCLK

BCLK#

PRDY#
PREQ#

TRST#

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

H_SNB_IVB#<17>

+VCCP

RC41

RC41

RC49

RC49

RC53

RC53

RC57

RC57

H_CATERR#

H_PROCHOT#_R

H_THERMTRIP#

H_PM_SYNC_R

H_CPUPWRGD_R

VDDPWRGOOD_R

BUF_CPU_RST#

4

T1PAD~D @T1PAD~D @

RC43

RC43

62_0402_5%

62_0402_5%

B B

A A

H_PROCHOT#<31>

5

1 2

H_THERMTRIP#<17>

H_PM_SYNC<15>

H_CPUPWRGD<17>

H_PECI<17,31>

VDDPWRGOOD

1 2

56_0402_5%

56_0402_5%

1 2

0_0402_5%~D

0_0402_5%~D

1 2

0_0402_5%~D

0_0402_5%~D

1 2

130_0402_1%~D

130_0402_1%~D

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

Sandy Bridge_rPGA_Rev1p0

Sandy Bridge_rPGA_Rev1p0

CONN@

CONN@

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

CLK_CPU_DMI#_R

A27

CLK_CPU_DP LL_R

A16

CLK_CPU_DP LL#_R

A15

H_DRAMRST#

R8

SM_RCOMP0

AK1

SM_RCOMP1

A5

SM_RCOMP2

A4

DDR3 Compensation Signals

XDP_PRDY#

AP29

XDP_PREQ#

AP27

XDP_TCK

AR26

TCK

XDP_TMS

AR27

TMS

XDP_TRST#

AP30

XDP_TDI_R

AR28

TDI

XDP_TDO_R

AP26

TDO

XDP_DBRES ET#_R

AL35

XDP_BPM#0_ R

AT28

XDP_BPM#1_ R

AR29

XDP_BPM#2_ R

AR30

XDP_BPM#3_ R

AT30

XDP_BPM#4_ R

AP32

XDP_BPM#5_ R

AR31

XDP_BPM#6_ R

AT31

XDP_BPM#7_ R

AR32

XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

RC37 0_0402_5%~DRC37 0_0402_5%~D

1 2

RC38 0_0402_5%~DRC38 0_0402_5%~D

1 2

RC39 0_0402_5%~DRC39 0_0402_5%~D

1 2

RC40 0_0402_5%~DRC40 0_0402_5%~D

1 2

H_DRAMRST# <7>

RC55140_0402_1% RC55140_0402_1 %

1 2

RC5825.5_0402_1% RC5825.5_0402_1%

1 2

RC60200_0402_1% RC60200_0402_1 %

1 2

for EMC request, close to CPU 7/26

RC121 0_0402_5%~DRC121 0_0402_5%~D

1 2

RC122 0_0402_5%~DRC122 0_0402_5%~D

1 2

RC123 0_0402_5%~DRC123 0_0402_5%~D

1 2

RC124 0_0402_5%~DRC124 0_0402_5%~D

1 2

RC125 0_0402_5%~DRC125 0_0402_5%~D

1 2

RC50 0_0402_5%~DRC50 0_0402_5%~D

1 2

RC51 0_0402_5%~DRC51 0_0402_5%~D

1 2

RC56

RC56

1 2

RC59 0_0402_5%~DRC59 0_0402_5%~D

1 2

RC61 0_0402_5%~DRC61 0_0402_5%~D

1 2

RC62 0_0402_5%~DRC62 0_0402_5%~D

1 2

RC63 0_0402_5%~DRC63 0_0402_5%~D

1 2

RC64 0_0402_5%~DRC64 0_0402_5%~D

1 2

RC65 0_0402_5%~DRC65 0_0402_5%~D

1 2

RC66 0_0402_5%~DRC66 0_0402_5%~D

1 2

RC67 0_0402_5%~DRC67 0_0402_5%~D

1 2

RC68 0_0402_5%~DRC68 0_0402_5%~D

1 2

RC69 0_0402_5%~DRC69 0_0402_5%~D

1 2

RC70 0_0402_5%~DRC70 0_0402_5%~D

1 2

RC71 0_0402_5%~DRC71 0_0402_5%~D

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

XDP_PRDY#_R
XDP_PREQ#_R

XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R

XDP_TDI
XDP_TDO

close to CPU 7/26

XDP_DBRES ET#

0_0402_5%~D

0_0402_5%~D

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7

CFG12 <8>
CFG13 <8>
CFG14 <8>
CFG15 <8>

2

CLK_CPU_DMI <14>
CLK_CPU_DMI# <14>

CLK_CPU_DP LL <14>
CLK_CPU_DP LL# <14>

XDP_DBRES ET# <15>

PU/PD for JTAG signals

XDP_TMS_R

XDP_TDI_R

XDP_PREQ#

XDP_TDO

XDP_TCK_R

XDP_TRST#_R

XDP_DBRES ET#

H_CPUPWRGD_R

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(2/6) PM,XDP,CLK

PROCESSOR(2/6) PM,XDP,CLK

PROCESSOR(2/6) PM,XDP,CLK

LA-6801P

LA-6801P

LA-6801P

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1

+VCCP

RC4551_0402_5% RC4551_0402_5 %

RC4651_0402_5% RC4651_0402_5 %

RC4751_0402_5% @ RC4751_0402_5% @

RC4851_0402_5% RC4851_0402_5%

RC5251_0402_5% RC5251_0402_5 %

RC5451_0402_5% RC5451_0402_5 %

+3VS

RC421K_0402_5%~D RC421K_0402_5%~D

RC4410K_0402_5%~D RC4410K_0402_5%~D

of

of

of

6 61Tuesday, January 25, 2011

6 61Tuesday, January 25, 2011

6 61Tuesday, January 25, 2011

1.0

1.0

1.0

5

JCPU1C

JCPU1C

DDR_A_D[0.. 63]< 11>

D D

C C

B B

A A

DDR_A_BS0<1 1>
DDR_A_BS1<1 1>
DDR_A_BS2<1 1>

DDR_A_CAS#<11 >
DDR_A_RAS#<11 >
DDR_A_WE#<11>

H_DRAMRST#<6>

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

H_DRAMRST#

4.99K_04 02_1%~D

4.99K_04 02_1%~D

5

RC77

RC77

AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12

AJ14
AH14
AL15
AK15
AL14
AK14

AJ15
AH15

AE10
AF10

C5
D5
D3
D2
D6
C6
C2
C3

F10

F8

G10

G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8

N10

N8
N7

M10

M9
N9

M7
AG6
AG5
AK6
AK5
AH5
AH6

AJ5
AJ6
AJ8

AK8

AJ9
AK9
AH8
AH9
AL9
AL8

V6

AE8
AD9
AF9

12

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

Sandy Brid ge_rPGA_Rev1 p0

Sandy Brid ge_rPGA_Rev1 p0

CONN@

CONN@

@

@

1 2

RC74 0_0402_5 %~D

RC74 0_0402_5 %~D

QC2

QC2

BSS138_SOT23

BSS138_SOT23

S

S

G

G

2

1

2

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

D

D

DDR3_DRAMRST#_R

13

DRAMRST_CNTRL

CC69

CC69
.047U_0 402_16V7K~D

.047U_0 402_16V7K~D

4

AB6

SA_CLK[0]

AA6

SA_CLK#[0]

V9

SA_CKE[0]

AA5

SA_CLK[1]

AB5

SA_CLK#[1]

V10

SA_CKE[1]

AB4

RSVD_TP[1]

AA4

RSVD_TP[2]

W9

RSVD_TP[3]

AB3

RSVD_TP[4]

AA3

RSVD_TP[5]

W10

RSVD_TP[6]

AK3

SA_CS#[0]

AL3

SA_CS#[1]

AG1

RSVD_TP[7]

AH1

RSVD_TP[8]

AH3

SA_ODT[0]

AG3

SA_ODT[1]

AG2

RSVD_TP[9]

AH2

RSVD_TP[10]

C4

SA_DQS#[0]

G6

SA_DQS#[1]

J3

SA_DQS#[2]

M6

SA_DQS#[3]

AL6

SA_DQS#[4]

AM8

SA_DQS#[5]

AR12

SA_DQS#[6]

AM15

SA_DQS#[7]

D4

SA_DQS[0]

F6

SA_DQS[1]

K3

SA_DQS[2]

N6

SA_DQS[3]

AL5

SA_DQS[4]

AM9

SA_DQS[5]

AR11

SA_DQS[6]

AM14

SA_DQS[7]

AD10

SA_MA[0]

W1

SA_MA[1]

W2

SA_MA[2]

W7

SA_MA[3]

V3

SA_MA[4]

V2

SA_MA[5]

W3

SA_MA[6]

W6

SA_MA[7]

V1

SA_MA[8]

W5

SA_MA[9]

AD8

SA_MA[10]

V4

SA_MA[11]

W4

SA_MA[12]

AF8

SA_MA[13]

V5

SA_MA[14]

V7

SA_MA[15]

+1.5V

12

RC75

RC75
1K_0402 _5%~D

1K_0402 _5%~D

1 2

RC76 1K_0402_5 %~D

RC76 1K_0402_5 %~D

DG 1.0 Figure 61 RC76=1K

4

M_CLK_DDR0
M_CLK_DDR#0
DDR_CKE0_DIMMA

M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

M_ODT0
M_ODT1

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

1 2

RC72 0_0402_5 %~DRC72 0_0402_ 5%~D

@

@

1 2

RC73 0_0402_5 %~D

RC73 0_0402_5 %~D

M_CLK_DDR0 <11 >
M_CLK_DDR#0 <1 1>
DDR_CKE0_DIMMA <11 >

M_CLK_DDR1 <11 >
M_CLK_DDR#1 <1 1>
DDR_CKE1_DIMMA <11 >

DDR_CS0_DIMMA# <11>
DDR_CS1_DIMMA# <11>

M_ODT0 <11 >
M_ODT1 <11 >

DDR_A_DQS#[ 0..7] <11>

DDR_A_DQS[0 ..7] <11>

DDR_A_MA[0..1 5] <11>

DDR3_DRAMRST# <11,1 2>

DRAMRST_CNTRL_PCH <14>

DRAMRST_CNTRL_EC <31>

3

DDR_B_D[0.. 63]< 12>

DDR_B_BS0<1 2>
DDR_B_BS1<1 2>
DDR_B_BS2<1 2>

DDR_B_CAS#<12 >
DDR_B_RAS#<12 >
DDR_B_WE#<12>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

2

JCPU1D

JCPU1D

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]

AM5

SB_DQ[32]

AM6

SB_DQ[33]

AR3

SB_DQ[34]

AP3

SB_DQ[35]

AN3

SB_DQ[36]

AN2

SB_DQ[37]

AN1

SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]

AN9

SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]

AN8

SB_DQ[45]

AR6

SB_DQ[46]

AR5

SB_DQ[47]

AR9

SB_DQ[48]

AJ11

SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]

AH11

SB_DQ[52]

AR8

SB_DQ[53]

AJ12

SB_DQ[54]

AH12

SB_DQ[55]

AT11

SB_DQ[56]

AN14

SB_DQ[57]

AR14

SB_DQ[58]

AT14

SB_DQ[59]

AT12

SB_DQ[60]

AN15

SB_DQ[61]

AR15

SB_DQ[62]

AT15

SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

AA10

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

Sandy Brid ge_rPGA_Rev1 p0

Sandy Brid ge_rPGA_Rev1 p0

CONN@

CONN@

2

1

M_CLK_DDR2

AE2

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

SB_CS#[0]

SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]

SB_ODT[0]

SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]

SB_DQS[1]

SB_DQS[2]

SB_DQS[3]

SB_DQS[4]

SB_DQS[5]

SB_DQS[6]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

M_CLK_DDR#2

AD2

DDR_CKE2_DIMMB

R9

M_CLK_DDR3

AE1

M_CLK_DDR#3

AD1

DDR_CKE3_DIMMB

R10

AB2
AA2
T9

AA1
AB1
T10

DDR_CS2_DIMMB#

AD3

DDR_CS3_DIMMB#

AE3
AD6
AE6

M_ODT2

AE4

M_ODT3

AD4
AD5
AE5

DDR_B_DQS#0

D7

DDR_B_DQS#1

F3

DDR_B_DQS#2

K6

DDR_B_DQS#3

N3

DDR_B_DQS#4

AN5

DDR_B_DQS#5

AP9

DDR_B_DQS#6

AK12

DDR_B_DQS#7

AP15

DDR_B_DQS0

C7

DDR_B_DQS1

G3

DDR_B_DQS2

J6

DDR_B_DQS3

M3

DDR_B_DQS4

AN6

DDR_B_DQS5

AP8

DDR_B_DQS6

AK11

DDR_B_DQS7

AP14

DDR_B_MA0

AA8

DDR_B_MA1

T7

DDR_B_MA2

R7

DDR_B_MA3

T6

DDR_B_MA4

T2

DDR_B_MA5

T4

DDR_B_MA6

T3

DDR_B_MA7

R2

DDR_B_MA8

T5

DDR_B_MA9

R3

DDR_B_MA10

AB7

DDR_B_MA11

R1

DDR_B_MA12

T1

DDR_B_MA13

AB10

DDR_B_MA14

R5

DDR_B_MA15

R4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

PROCESSOR(3/6) DDRIII

PROCESSOR(3/6) DDRIII

LA-6801P

LA-6801P

LA-6801P

1

M_CLK_DDR2 <12 >
M_CLK_DDR#2 <1 2>
DDR_CKE2_DIMMB <12 >

M_CLK_DDR3 <12 >
M_CLK_DDR#3 <1 2>
DDR_CKE3_DIMMB <12 >

DDR_CS2_DIMMB# < 12>
DDR_CS3_DIMMB# < 12>

M_ODT2 <12 >
M_ODT3 <12 >

DDR_B_DQS#[ 0..7] <12 >

DDR_B_DQS[0 ..7] <12>

DDR_B_MA[0..1 5] <12>

7 61Tuesday, J anuary 25, 2011

7 61Tuesday, J anuary 25, 2011

7 61Tuesday, J anuary 25, 2011

of

of

of

1.0

1.0

1.0

5

4

3

2

1

CFG Straps for Processor

D D

JCPU1E

JCPU1E

L7

RSVD28

AG7

RESERVED

RESERVED

RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

RSVD51
RSVD52

VCC_DIE_SENSE

RSVD54
RSVD55

RSVD56
RSVD57
RSVD58

AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

AT2
AT1
AR1

B1

KEY

CFG0<6>
CFG1<6>
CFG2<6>
CFG3<6>
CFG4<6>
CFG5<6>
CFG6<6>
CFG7<6>
CFG8<6>
CFG9<6>

+VCC_GFXCORE_AXG

+VCC_CORE

@

@

RC80

RC80
50_040 2_1%

50_040 2_1%

1 2

C C

+V_DDR_REFA

+V_DDR_REFB

B B

RC82 0_0402_5%~D@RC82 0_0402_ 5%~D@

1 2

RC83 0_0402_5%~D@RC83 0_0402_ 5%~D@

1 2

@

@

RC79

RC79
50_040 2_1%

50_040 2_1%

1 2

VCC_AXG_VAL_SENSE

VCC_VAL_SENSE

12

12

RC85

RC85

RC84

RC84

1K_0402 _1%~D

1K_0402 _1%~D

1K_0402 _1%~D

INTEL 1 2/28 rec ommand
to add 1k pull down

VCCP_PWRCTRL<54 >

1K_0402 _1%~D

CFG10<6>
CFG11<6>
CFG12<6>
CFG13<6>
CFG14<6>
CFG15<6>
CFG16<6>
CFG17<6>

+V_DDR_REFA_R
+V_DDR_REFB_R

1 2

RC88 0_0402_5%~DRC88 0_04 02_5%~D

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

T19PAD~D @T19PAD~D @

T25PAD~D @T25PAD~D @
T26PAD~D @T26PAD~D @
T27PAD~D @T27PAD~D @
T28PAD~D @T28PAD~D @
T30PAD~D @T30PAD~D @
T32PAD~D @T32PAD~D @
T33PAD~D @T33PAD~D @
T34PAD~D @T34PAD~D @
T35PAD~D @T35PAD~D @
T37PAD~D @T37PAD~D @
T38PAD~D @T38PAD~D @
T39PAD~D @T39PAD~D @
T40PAD~D @T40PAD~D @
T41PAD~D @T41PAD~D @
T42PAD~D @T42PAD~D @
T43PAD~D @T43PAD~D @

T44PAD~D @T44PAD~D @
T45PAD~D @T45PAD~D @

H_VCCP_SEL

T49PAD~D @T49PAD~D @

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

Need PWR add ne w circuit on 1. 05V(refer CRB)

Sandy Brid ge_rPGA_Rev1 p0

Sandy Brid ge_rPGA_Rev1 p0

CONN@

CONN@

T2 PAD~D@ T2 PAD~D@
T3 PAD~D@ T3 PAD~D@
T4 PAD~D@ T4 PAD~D@
T5 PAD~D@ T5 PAD~D@
T6 PAD~D@ T6 PAD~D@

T7 PAD~D@ T7 PAD~D@
T8 PAD~D@ T8 PAD~D@
T9 PAD~D@ T9 PAD~D@

T10 PAD~D@ T10 PAD~D@
T11 PAD~D@ T11 PAD~D@
T12 PAD~D@ T12 PAD~D@
T13 PAD~D@ T13 PAD~D@

T14 PAD~D@ T14 PAD~D@
T15 PAD~D@ T15 PAD~D@
T16 PAD~D@ T16 PAD~D@
T17 PAD~D@ T17 PAD~D@
T18 PAD~D@ T18 PAD~D@

T20 PAD~D@ T20 PAD~D@
T21 PAD~D@ T21 PAD~D@
T22 PAD~D@ T22 PAD~D@
T23 PAD~D@ T23 PAD~D@
T24 PAD~D@ T24 PAD~D@

T29 PAD~D@ T29 PAD~D@
T31 PAD~D@ T31 PAD~D@

T36 PAD~D@ T36 PAD~D@

CLK_RES_ITP <14>
CLK_RES_ITP# <14 >

T46 PAD~D@ T46 PAD~D@
T47 PAD~D@ T47 PAD~D@
T48 PAD~D@ T48 PAD~D@

T50 PAD~D@ T50 PAD~D@

CFG[6:5 ]

CFG2

12

RC78

RC78
1K_0402 _1%~D

1K_0402 _1%~D

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Defa ult) Nor mal Oper ation; L ane #

CFG2

definit ion matc hes sock et pin m ap defin ition

0:Lane Reversed

*

CFG4

12

RC81

@ RC81

@

1K_0402 _1%~D

1K_0402 _1%~D

Display Port Presence Strap

1 : Dis abled; N o Physic al Displ ay Port

*

CFG4

attache d to Emb edded Di splay Po rt

0 : Ena bled; An externa l Displa y Port d evice is
connect ed to th e Embedd ed Displ ay Port

CFG6

CFG5

1K_0402 _1%~D

1K_0402 _1%~D

RC87

@ RC87

@

12

12

RC86

@ RC86

@

1K_0402 _1%~D

1K_0402 _1%~D

PCIE Port Bifurcation Straps

11: (De fault) x 16 - Dev ice 1 fu nctions 1 and 2 disable d

*

10: x8, x8 - De vice 1 f unction 1 enable d ; func tion 2
dis abled

01: Res erved - (Device 1 functi on 1 dis abled ; functio n
2 e nabled)
00: x8, x4,x4 - Device 1 functio ns 1 and 2 enabl ed

CFG7

12

RC89

@ RC89

@

1K_0402 _1%~D

1K_0402 _1%~D

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

@

@

RC90

RC90

50_040 2_1%

A A

50_040 2_1%

INTEL 1 2/28 rec ommand
to add RC120, R C121, RC 122, RC1 23
Please place as close a s JCPU1

5

@

@

RC91

RC91
50_040 2_1%

50_040 2_1%

1 2

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

PEG DEFER TRAINING

1: (Def ault) PE G Train immediat ely

*

CFG7

followi ng xxRES ETB de a ssertion

0: PEG Wait for BIOS fo r traini ng

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

PROCESSOR(4/6) RSVD,CFG

PROCESSOR(4/6) RSVD,CFG

LA-6801P

LA-6801P

LA-6801P

8 61Tuesday, J anuary 25, 2011

8 61Tuesday, J anuary 25, 2011

8 61Tuesday, J anuary 25, 2011

1

of

of

of

1.0

1.0

1.0

5

+VCC_CORE

1

CC70

CC70
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC89

CC89
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC114

CC114
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC119

CC119
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC124

CC124
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC129

CC129
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

+

+

CC133

CC133

2

470U_D2 _2VM_R4.5M~D

470U_D2 _2VM_R4.5M~D

1

CC86

CC86
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC90

CC90
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC115

CC115
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC120

CC120
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC125

CC125
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC130

CC130
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

+

+

2

470U_D2 _2VM_R4.5M~D

470U_D2 _2VM_R4.5M~D

+VCC_CORE

+VCC_CORE

1

CC85

CC85
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC82

CC82
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC113

CC113
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC118

CC118
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC123

CC123
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC128

CC128
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

+

+

2

470U_D2 _2VM_R4.5M~D

470U_D2 _2VM_R4.5M~D

1

+

+

CC136

CC136

2

470U_D2 _2VM_R4.5M~D

470U_D2 _2VM_R4.5M~D

CC132

CC132

D D

C C

B B

A A

CC134

CC134

1

CC87

CC87
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC91

CC91
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC116

CC116
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC121

CC121
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC126

CC126
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC131

CC131
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

+

+

CC135

CC135

2

470U_D2 _2VM_R4.5M~D

470U_D2 _2VM_R4.5M~D

4

1

CC71

CC71
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC83

CC83
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

1

CC117

CC117
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC122

CC122
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC127

CC127
22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

2

1

CC84

CC84
10U_080 5_4VAM~D

10U_080 5_4VAM~D

2

+VCC_CORE

JCPU1F

JCPU1F

QC=94A
DC=53A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Sandy Brid ge_rPGA_Rev1 p0

Sandy Brid ge_rPGA_Rev1 p0

CONN@

CONN@

3

POWER

POWER

CORE SUPPLY

CORE SUPPLY

2

8.5A

PDDG 0.7@P12

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE
VSS_SENSE

VSSIO_SENSE

C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

VCCSENSE_R
VSSSENSE_R

PEG AND DDR

PEG AND DDR

VCCIO_SENSE

SENSE LINES SVID

SENSE LINES SVID

130_04 02_1%~D

130_04 02_1%~D

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

CC72

CC72

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

CC92

CC92

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

CC103

CC103

2

RC95

RC95

RC98 0_040 2_5%~DRC98 0_04 02_5%~D

1 2

RC99 0_040 2_5%~DRC99 0_04 02_5%~D

1 2

VCCIO_SENSE <54>
VSSIO_SENSE <54>

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC73

CC73

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

CC93

CC93

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

CC104

CC104

2

12

1

CC74

CC74

2

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC94

CC94

2

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC105

CC105

2

2

RC95 close to CPU

RC94 43_04 02_1% RC94 43_0402_1 %

1 2

RC92 0_040 2_5%~DRC92 0_04 02_5%~D

1 2

RC96 0_040 2_5%~DRC96 0_04 02_5%~D

1 2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

CC75

CC75

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

CC95

CC95

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

CC106

CC106

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC77

CC77

CC76

CC76

2

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC97

CC97

CC96

CC96

2

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC107

CC107

CC108

CC108

2

2

+VCCP

+VCC_CORE

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

2

12

RC93

RC93
75_040 2_5%

75_040 2_5%

12

RC97

RC97
100_04 02_1%~D

100_04 02_1%~D

12

RC100

RC100
100_04 02_1%~D

100_04 02_1%~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC78

CC78

CC88

CC88

2

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC98

CC98

CC99

CC99

2

2

330U_D2 _2VM_R6M~D

330U_D2 _2VM_R6M~D

330U_D2 _2VM_R6M~D

330U_D2 _2VM_R6M~D

1

1

@

@

CC110

CC110

CC109

CC109

+

+

+

+

2

2

Place the PU
resistors close to CPU

VR_SVID_ALRT# <57>
VR_SVID_CLK <57 >
VR_SVID_DAT <57>

VCCSENSE <57>
VSSSENSE <57>

1

+VCCP

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC81

CC79

CC79

CC100

CC100

CC111

CC111

CC81

CC80

CC80

2

2

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

22U_080 5_6.3VAM~D

1

1

CC101

CC101

CC102

CC102

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(5/6) PWR,BYPASS

PROCESSOR(5/6) PWR,BYPASS

PROCESSOR(5/6) PWR,BYPASS

LA-6801P

LA-6801P

LA-6801P

9 61Tuesday, J anuary 25, 2011

9 61Tuesday, J anuary 25, 2011

9 61Tuesday, J anuary 25, 2011

of

of

1

of

1.0

1.0

1.0

5

12

RC10 2

RC10 2
100K_ 0402 _5%~D

100K_ 0402 _5%~D

CC145

CC145

CC153

CC153

1

2

1

2

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

CC175

CC175

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC146

CC146

1

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC154

CC154

1

2

330U_D2_2.5VM_R6M~D

330U_D2_2.5VM_R6M~D

1

+

+

2

RUN_ ON_CP U1.5VS3#

61

QC5A

QC5A
2N70 02DW-7 -F_SOT36 3-6~D

2N70 02DW-7 -F_SOT36 3-6~D

33A

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC147

CC147

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC155

CC155

@

@

CC176

CC176

JCPU1 G

JCPU1 G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

TBD

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

Sandy Bri dge_r PGA_Rev1p 0

Sandy Bri dge_r PGA_Rev1p 0

CONN @

CONN @

D D

RC10 4

@ RC1 04

@

1

2

1

2

CC15 7

CC15 7

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC142

CC142

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC150

CC150

1 2

0_04 02_5% ~D

0_04 02_5% ~D

1 2

0_04 02_5% ~D

0_04 02_5% ~D

CC21 7

0.1U_ 0402_ 10V7K~D

0.1U_ 0402_ 10V7K~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC143

CC143

1

1

2

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC151

CC151

1

1

2

2

10U_0805_4VAM~D

10U_0805_4VAM~D

1

CC172

CC172

2

RC10 7

RC10 7

@CC21 7

@

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

2

CC144

CC144

1

2

CC152

CC152

1

2

+1.8VS_VCC PLL

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

CC174

CC174

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

@

@

1

2

SUSP#<18,3 1,33,53 ,54>

CPU1 .5V_S3_GATE<31>

+VCC_GFXC ORE_AXG

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

CC140

CC140

CC141

CC141

1

1

2

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C C

B B

22U_0805_6.3V6M~D

CC149

CC149

CC148

CC148

1

1

2

2

1

1

+

+

+

+

CC15 6

CC15 6

2

2

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

+1.8VS

RC10 9 0_ 0805 _5%~DRC10 9 0_ 0805 _5%~D

1 2

4

B+_BIAS+3VALW

12

RC10 1

RC10 1
100K_ 0402 _5%~D

100K_ 0402 _5%~D

3

QC5B

QC5B

5

2N70 02DW-7 -F_SOT36 3-6~D

2N70 02DW-7 -F_SOT36 3-6~D

4

RUN_ ON_CP U1.5VS3# <6,33>

POWER

POWER

SENSE

SENSE

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

+1.5V_CPU_VDDQ Source

+1.5V +1.5V_C PU_VDDQ

RUN_ ON_CP U1.5VS3

VSSAXG_SENSE

LINES

LINES

VREFMISC

VREFMISC

VAXG_SENSE

SM_VREF

QC3

QC3

AO4728L _SO8~D

AO4728L _SO8~D

8
7
6
5

4

0.1U_0603_50V_X7R

0.1U_0603_50V_X7R

12

1

2

RC105

RC105

330K_0402_1%

330K_0402_1%

VCC_AXG_SEN SE

AK35

VSS_AXG_SENS E

AK34

+V_SM_VREF should
have 10 mil trace width

+V_SM_VREF_ CNT

AL1

1
2

12

3

1

2

CC138

CC138

10U_0805_10V4Z~D

10U_0805_10V4Z~D

CC139

CC139

100K_ 0402 _5%~D

100K_ 0402 _5%~D

5A

AF7

VDDQ1

AF4

VDDQ2

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

VCCSA_SENSE

FC_C22

VCCSA_VID1

AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

6A

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

H_FC_ C22

10U_0805_4VAM~D

10U_0805_4VAM~D

1

1

CC160

CC160

2

2

10U_0805_4VAM~D

10U_0805_4VAM~D

1

CC167

CC167

2

VCCSA_SEL <55>

RC11 1

RC11 1

10K_0 402_ 5%~D

10K_0 402_ 5%~D

RC103

RC103

20K_0402_5%~D

20K_0402_5%~D

VCC_AXG_SEN SE <57>
VSS_AXG_SENS E <57 >

12

RC12 6

RC12 6

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

1

CC161

CC161

CC162

CC162

2

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

1

1

CC168

CC168

CC169

CC169

2

2

12

3

1 2

RC10 6 0_04 02_5% ~D@RC1 06 0_04 02_5 %~D@

1

3

QC4

QC4

2

NTR45 03NT1 G_SOT23 -3~D

NTR45 03NT1 G_SOT23 -3~D

RUN_ ON_CP U1.5VS3

+1.5V_C PU_VDDQ

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

1

1

1

CC164

CC164

CC163

CC163

CC165

CC165

2

2

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

@

@

1

+

+

CC17 1

CC17 1

CC170

CC170

330U _D2_ 2VM_R6M~D

330U _D2_ 2VM_R6M~D

2

2

RC12 0 0_ 0402 _5%~DRC12 0 0_ 0402 _5%~D

1 2

12

RC11 0

@ RC 110

@

0_04 02_5% ~D

0_04 02_5% ~D

+V_SM_VREF

1

+

+

CC16 6

CC16 6
330U _D2_ 2VM_R6M~D

330U _D2_ 2VM_R6M~D

2

+VCCSA

VCCSA_SEN SE < 55>

2

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10

AT7
AT4

AT3
AR25
AR22
AR19
AR16
AR13
AR10

AR7
AR4

AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16

+1.5V_CP U_VDDQ

12

1K_04 02_5 %~D

1K_04 02_5 %~D
RC11 2

RC11 2

12

1K_04 02_5 %~D

1K_04 02_5 %~D
RC11 6

RC11 6

@

@

J8

J8

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

J8 OPEN

VSSSA_SEN SE <55>

+1.5V_CP U_VDDQ +1.5V

add CC181 , CC182, 4 caps are all pop.
follow checklist 1.0 5/24

+1.5V

CC18 2 0.1U_040 2_10 V7K~DCC182 0.1U _0402 _10V7K ~D

CC18 4 0.1U_040 2_10 V7K~DCC184 0.1U _0402 _10V7K ~D

CC18 1 0.1U_040 2_10 V7K~DCC181 0.1U _0402 _10V7K ~D

CC18 3 0.1U_040 2_10 V7K~DCC183 0.1U _0402 _10V7K ~D

AP13
AP10

AP7

AP4

AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AN7

AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AL7
AL4

AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AK7
AK4

AJ25

12

12

12

12

JCPU1 H

JCPU1 H

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

Sandy Bri dge_r PGA_Rev1p 0

Sandy Bri dge_r PGA_Rev1p 0

CONN @

CONN @

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

1

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(6/6) PWR,VSS

PROCESSOR(6/6) PWR,VSS

PROCESSOR(6/6) PWR,VSS

Size Do cum ent Num ber Rev

Size Do cum ent Num ber Rev

Size Do cum ent Num ber Rev

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

2

Date: Sheet

1

10 61Tues day, Janua ry 25, 201 1

10 61Tues day, Janua ry 25, 201 1

10 61Tues day, Janua ry 25, 201 1

1.0

1.0

1.0

of

of

of

5

+1.5V

CD6

CD6

1

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CD11

CD11

1

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CD20

CD20

2

<BOM Structure>

<BOM Structure>

12

RD1

RD1
1K_0402_1%~D

1K_0402_1%~D

+V_DDR_REFA

12

RD3

RD3
1K_0402_1%~D

1K_0402_1%~D

All VREF traces should
have 10 mil trace width

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

330U_SX_2VY~D

330U_SX_2VY~D

@

@

1

CD12

CD12

CD13

CD13

CD14

1

2

CD14

1

+

+

2

2

DDR_A_DQS#[0..7]<7>

DDR_A_DQS[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_MA[0..15]<7>

D D

Layout Note:
Place near JDIMM1

+1.5V

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

CD3

CD3

1

2

+1.5V

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

C C

CD7

CD7

1

2

Layout Note:
Place near JDIMM1.203,204

+0.75VS

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CD17

CD17

2

B B

CD5

CD5

CD4

CD4

1

1

2

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CD10

CD8

CD8

1

2

1

2

CD10

CD9

CD9

1

1

2

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CD19

CD19

CD18

CD18

2

+V_DDR_REFA

4

RD2 0_0402_5%~DRD2 0_0402_5%~D

1 2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

1

1

CD1

CD1

2

2

DDR_CKE0_DIMMA<7> DDR_CKE1_DIMMA <7>

DDR_A_BS2<7>

M_CLK_DDR0<7>
M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7>
DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+3VS

CD21

CD21

1

1

2

2

+DIMM0_VREF

DDR_A_D0
DDR_A_D1

CD2

CD2

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_D58
DDR_A_D59

RD6 10K_0402_5%~DRD6 10K_0402_5%~D

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

RD7 10K_0402_5%~DRD7 10K_0402_5%~D

CD22

CD22

1 2

1 2

+0.75VS

+1.5V

JDIMM1

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

FOX_AS0A626-U2SN-7F

FOX_AS0A626-U2SN-7F

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

EVENT#

GND2

BOSS2

3

+1.5V

2

VSS
DQ4
DQ5
VSS

VSS
DQ6
DQ7
VSS

VSS
DM1

VSS

VSS

VSS
DM2
VSS

VSS

VSS

VSS

VSS

VDD
A15
A14
VDD
A11

VDD

VDD

VDD
CK1

VDD
BA1

VDD
S0#

VDD

VDD

VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
DM6
VSS

VSS

VSS

VSS

VSS

SDA
SCL
VTT

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26
28

DDR3_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44
46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

DDR_CKE1_DIMMA

74
76

DDR_A_MA15

78

DDR_A_MA14

80
82

DDR_A_MA11

84

DDR_A_MA7

86

A7

88

DDR_A_MA6

90

A6

DDR_A_MA4

92

A4

94

DDR_A_MA2

96

A2

DDR_A_MA0

98

A0

100

M_CLK_DDR1

102

M_CLK_DDR#1

104
106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDR_CS0_DIMMA#

114

M_ODT0

116
118

M_ODT1

120
122

NC

124
126
128

DDR_A_D36

130

DDR_A_D37

132
134
136
138

DDR_A_D38

140

DDR_A_D39

142
144

DDR_A_D44

146

DDR_A_D45

148
150

DDR_A_DQS#5

152

DDR_A_DQS5

154
156

DDR_A_D46

158

DDR_A_D47

160
162

DDR_A_D52

164

DDR_A_D53

166
168
170
172

DDR_A_D54

174

DDR_A_D55

176
178

DDR_A_D60

180

DDR_A_D61

182
184

DDR_A_DQS#7

186

DDR_A_DQS7

188
190

DDR_A_D62

192

DDR_A_D63

194
196
198

PCH_SMBDATA

200

PCH_SMBCLK

202
204

+0.75VS

206
208

M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>

DDR_A_BS1 <7>
DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7>
M_ODT0 <7>

M_ODT1 <7>

+VREF_CA

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CD15

CD15

2

PCH_SMBDATA <6,12,14,28,32>
PCH_SMBCLK <6,12,14,28,32>

DDR3_DRAMRST# <7,12>

+1.5V

1

CD16

CD16

2

12

RD4

RD4
1K_0402_1%~D

1K_0402_1%~D

12

RD5

RD5
1K_0402_1%~D

1K_0402_1%~D

2

1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DDRIII DIMMA

DDRIII DIMMA

DDRIII DIMMA

LA-6801P

LA-6801P

LA-6801P

1

1.0

1.0

11 61Tuesday, January 25, 2011

11 61Tuesday, January 25, 2011

11 61Tuesday, January 25, 2011

1.0

of

of

of

5

+1.5V

12

RD15

RD15
1K_0402_1%~D

1K_0402_1%~D

DDR_B_DQS#[0..7]<7>

DDR_B_DQS[0..7]<7>

D D

DDR_B_D[0..63]<7>

DDR_B_MA[0..15]<7>

Layout Note:
Place near JDIMMB

+1.5V

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

CD29

CD29

CD28

CD28

1

1

2

C C

B B

2

+1.5V

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CD33

CD33

CD34

CD34

CD32

CD32

1

1

1

2

2

2

Layout Note:
Place near JDIMMB.203,204

+0.75VS

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

1

CD43

CD43

CD42

CD42

2

2

CD31

CD31

CD30

CD30

1

1

2

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

@

@

330U_SX_2VY~D

330U_SX_2VY~D

@

@

CD35

CD35

CD36

CD36

1

1

2

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

1

CD44

CD44

2

2

1

CD37

CD37

CD38

CD38

CD39

1

2

CD45

CD45

CD39

1

+

+

2

2

12

RD16

RD16
1K_0402_1%~D

1K_0402_1%~D

+V_DDR_REFB

4

+V_DDR_REFB

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

All VREF traces should
have 10 mil trace width

+3VS

RD14 0_0402_5%~DRD14 0_0402_5%~D

1 2

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

1

CD27

CD27

2

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7>
M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7>
DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

+3VS

12

RD19

RD19

10K_0402_5%~D

10K_0402_5%~D

3

+1.5V

JDIMM2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+DIMM1_VREF

DDR_B_D0
DDR_B_D1

1

CD26

CD26

DDR_B_D2

2

DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_D58
DDR_B_D59

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

12

10K_0402 _5%~D

10K_0402 _5%~D

RD20

RD20

+0.75VS

CD46

CD46

1

1

2

2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9
VSS925VSS10
DQS#127DM1
DQS129RESET#
VSS1131VSS12
DQ1033DQ14
DQ1135DQ15
VSS1337VSS14
DQ1639DQ20
DQ1741DQ21
VSS1543VSS16
DQS#245DM2
DQS247VSS17
VSS1849DQ22
DQ1851DQ23
DQ1953VSS19
VSS2055DQ28
DQ2457DQ29
DQ2559VSS21
VSS2261DQS#3

63

DM3
VSS2365VSS24
DQ2667DQ30
DQ2769DQ31
VSS2571VSS26

CKE073CKE1
VDD175VDD2

77

NC1

79

BA2
VDD381VDD4
A12/BC#83A11

85

A9
VDD587VDD6

89

A8

91

A5
VDD793VDD8

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

CD47

CD47

G1

LCN_DAN06-K4926-0100

LCN_DAN06-K4926-0100

CONN@

CONN@

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

DQS3

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

+1.5V

2

DDR_B_D4

4

DQ4
DQ5

DQ6
DQ7

A15
A14

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

DDR_B_D5

6
8

DDR_B_DQS#0

10

DDR_B_DQS0

12
14

DDR_B_D6

16

DDR_B_D7

18
20

DDR_B_D12

22

DDR_B_D13

24
26
28

DDR3_DRAMRST#

30
32

DDR_B_D14

34

DDR_B_D15

36
38

DDR_B_D20

40

DDR_B_D21

42
44
46
48

DDR_B_D22

50

DDR_B_D23

52
54

DDR_B_D28

56

DDR_B_D29

58
60

DDR_B_DQS#3

62

DDR_B_DQS3

64
66

DDR_B_D30

68

DDR_B_D31

70
72

DDR_CKE3_DIMMB

74
76

DDR_B_MA15

78

DDR_B_MA14

80
82

DDR_B_MA11

84

DDR_B_MA7

86

A7

88

DDR_B_MA6

90

A6

DDR_B_MA4

92

A4

94

DDR_B_MA2

96

A2

DDR_B_MA0

98

A0

100

M_CLK_DDR3

102

M_CLK_DDR#3

104
106

DDR_B_BS1

108

DDR_B_RAS#

110
112

DDR_CS2_DIMMB#

114

M_ODT2

116
118

M_ODT3

120
122
124
126
128

DDR_B_D36

130

DDR_B_D37

132
134
136
138

DDR_B_D38

140

DDR_B_D39

142
144

DDR_B_D44

146

DDR_B_D45

148
150

DDR_B_DQS#5

152

DDR_B_DQS5

154
156

DDR_B_D46

158

DDR_B_D47

160
162

DDR_B_D52

164

DDR_B_D53

166
168
170
172

DDR_B_D54

174

DDR_B_D55

176
178

DDR_B_D60

180

DDR_B_D61

182
184

DDR_B_DQS#7

186

DDR_B_DQS7

188
190

DDR_B_D62

192

DDR_B_D63

194
196
198

PCH_SMBDATA

200

PCH_SMBCLK

202
204

+0.75VS

206

G2

2

DDR3_DRAMRST# <7,11>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>

DDR_B_BS1 <7>
DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7>
M_ODT2 <7>

M_ODT3 <7>

+VREF_CB

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CD40

CD40

2

2

PCH_SMBDATA <6,11,14,28,32>
PCH_SMBCLK <6,11,14,28,32>

RD17

RD17
1K_0402_1%~D

1K_0402_1%~D

CD41

CD41

+1.5V

12

12

RD18

RD18
1K_0402_1%~D

1K_0402_1%~D

1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DDRIII DIMMB

DDRIII DIMMB

DDRIII DIMMB

LA-6801P

LA-6801P

LA-6801P

1

1.0

1.0

12 61Tuesday, January 25, 2011

12 61Tuesday, January 25, 2011

12 61Tuesday, January 25, 2011

1.0

of

of

of

5

PCH_RTCX1

32.768KHZ_ 12.5PF_Q13MC146 10002

32.768KHZ_ 12.5PF_Q13MC146 10002

1

CH3

CH3

OSC4OSC

18P_0402 _50V8J~D

18P_0402 _50V8J~D

2

NC3NC

1 2

RH27 33_0402 _5%

RH27 33_0402 _5%

1 2

RH28 33_0402 _5%

RH28 33_0402 _5%

1 2

RH33 33_0402 _5%

RH33 33_0402 _5%

1 2

RH275 1M_040 2_5%~DRH275 1M_04 02_5%~D

HDA_SDO<31>

12

RH39

@RH39

@

200_040 2_5%

200_040 2_5%

12

RH45

RH45
100_040 2_1%~D

100_040 2_1%~D

RH53 5 1_0402_5 %

RH53 5 1_0402_5 %

PCH_SPI_WP#

PCH_SPI_HOLD#

@

@

12

1 2

CH98

CH98

@

@

10P_0402 _50V8J~D

10P_0402 _50V8J~D

PCH_RTCX2

+RTCVCC

HDA_BIT_CLK

HDA_RST#

HDA_SYNC_R

1 2

RH24 0 _0402_5%~D

RH24 0 _0402_5%~D

1 2

RH30 33_0 402_5%

RH30 33_0 402_5%

12

RH40

@RH40

@

200_040 2_5%

200_040 2_5%

12

RH46

RH46

100_040 2_1%~D

100_040 2_1%~D

+3V_PCH

12

@

@

RH267

RH267
10K_0402 _5%~D

10K_0402 _5%~D

DP_PCH_HPD

RH268

RH268
100K_040 2_5%~D

100K_040 2_5%~D

@

@

1 2

1 2

@

@

RH256

RH256

PCH_SPI_CLK_R

33_0402 _5%

33_0402 _5%

PCH_SPI_CLK

12

+RTCVCC

1U_0603_1 0V4Z

1U_0603_1 0V4Z

1 2

RH25 20K_040 2_5%~DRH25 20K_04 02_5%~D

1 2

RH23 20K_040 2_5%~DRH23 20K_04 02_5%~D

1U_0603_1 0V4Z

1U_0603_1 0V4Z

QH1 BSS138_SOT23

QH1 BSS138_SOT23

RH36 0_0402_ 5%~D

RH36 0_0402_ 5%~D

@

@

1M_0402_ 5%~D

1M_0402_ 5%~D

CMOS

CLRP1

CLRP1

CLRP2

CLRP2

ME CMOS

HDA_SPKR<24>

HDA_SYNC

HDA_SDIN0<24>

DP_PCH_HPD<38>

PCH_JTAG_TCK<6 >

PCH_JTAG_TMS<6>

PCH_JTAG_TDI<6>

PCH_JTAG_TDO<6>

SM_INTRUDER#

RH255 0_0 402_5%~DRH255 0_04 02_5%~D

RH11

RH11

CH4

CH4

CH5

CH5

+5VS

G

G

2

S

S

@

@

1 2

HDA_SDOUT

HDA_SDOUT

1 2

1

12

SHORT PADS

SHORT PADS

2

1

12

SHORT PADS

SHORT PADS

2

CLP1 & CLP2 place near DIMM

13

D

D

PCH_SPI_CLK_R

close to UH1

+3V_PCH

@ RH57

@

1 2

RH58 0_0402 _5%~DRH58 0_0402 _5%~D

PCH_SPI_SO PCH_SPI_SO_R

1 2

RH60 33_040 2_5%RH60 33_040 2_5%

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

12

PCH_SPI_CS#

PCH_SPI_SI

PCH_SPI_SO

RH57

3.3K_040 2_5%

3.3K_040 2_5%

1 2

PCH_SPI_CS#_RPCH_SPI_CS#

PCH_SPI_WP#

DP_PCH_HPD

1 2

RH2 10 M_0402_5%RH2 10M_0402_ 5%

18P_0402 _50V8J~D

18P_0402 _50V8J~D

1

1

CH2

CH2

2

YH1

YH1

D D

C C

B B

A A

2

far away hot spot

HDA_BITCLK_AUDIO<24>

HDA_RST_AUDIO#<24>

HDA_SYNC_AUDIO<24>

HDA_SDOUT_AUDIO<24>

+3V_PCH +3V_PCH+3V_PCH

12

RH38

@RH38

@

200_040 2_5%

200_040 2_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

RH44

RH44

100_040 2_1%~D

100_040 2_1%~D

PCH_JTAG_TCK

+3V_PCH

1 2

RH54 3.3K_ 0402_5%R H54 3.3K_04 02_5%

1 2

RH56 3.3K_ 0402_5%R H56 3.3K_04 02_5%

CH94

CH94

22P_0402 _50V8J~D

22P_0402 _50V8J~D

Reserve for EMI please close to U48

Reserve for RF please close to UH1

5

4

@

@

HDA_SDOUT

12

CH103 10P_04 02_50V8J~D

CH103 10P_04 02_50V8J~D

@

@

HDA_BIT_CLK

12

CH97 10P_0 402_50V8J~D

CH97 10P_0 402_50V8J~D

Reserve for RF please close to UH1

R3@

R3@

UH1A

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPo int_Rev_1p0

CougarPo int_Rev_1p0

SA00004ED3L

RTCIHDA

RTCIHDA

JTAG

JTAG

SPI

SPI

LPC

LDRQ1# / GPIO23

SATA LPC

SATA

SATA0GP / GPIO21

SATA1GP / GPIO19

SPI ROM FOR ME ( 4MByte )

SPI ROM FOR ME
( 4MByte )

U48

U48

1

2

3

W25Q32BVSSIG_SO8

W25Q32BVSSIG_SO8

SPI BIOS Pinout

(1)CS# (5)DIO
(2)DO (6)CLK
(3)WP# (7)HOLD#
(4)GND (8)VCC

W25X32

4

/CS

DO

/WP

GND4DIO

/HOLD

8

VCC

PCH_SPI_HOLD#

7

PCH_SPI_CLK_R

6

CLK

5

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

SERIRQ

SATA0RXN
SATA0RXP

SATA0TXN
SATA0TXP

SATA1RXN

SATA 6G

SATA 6G

SATA1RXP

SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP

SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP

SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP

SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP

SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

RH63 33_0402_ 5%RH63 33_0402_5 %

C38
A38
B37
C37

D36

E36
K36

V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

1 2

UH1

BD82HM67 SLH9C B2

BD82HM67 SLH9C B2

SA00004ED2L

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PTX_DRX_N1
SATA_PTX_DRX_P1

SATA_PTX_DRX_N2
SATA_PTX_DRX_P2

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

BBS_BIT0_R

PCH_SPI_SIPCH_SPI_SI_R

3

R1@UH1

R1@

LPC_AD0 <31>
LPC_AD1 <31>
LPC_AD2 <31>
LPC_AD3 <31>

LPC_FRAME# <31 >

SERIRQ <31>

CH91 0 .01U_0402_1 6V7K~DCH91 0.01U_0402 _16V7K~D

1 2

CH90 0 .01U_0402_1 6V7K~DCH90 0.01U_0402 _16V7K~D

1 2

CH92 0 .01U_0402_1 6V7K~DCH92 0.01U_0402 _16V7K~D

1 2

CH93 0 .01U_0402_1 6V7K~DCH93 0.01U_0402 _16V7K~D

1 2

PCH_SATALED# <35 >

10K_0402 _5%~D

10K_0402 _5%~D

12

CH6

CH6

0.1U_0402_ 16V7K~D

0.1U_0402_ 16V7K~D

3

+1.05VS_VCC_SAT A

+1.05VS_SATA3

Security Classification

Security Classification

Security Classification

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

1 2

RH41 37.4_0 402_1%RH41 37.4_0 402_1%

1 2

RH43 49.9_0 402_1%RH43 49.9_0 402_1%

1 2

RH48 750_0 402_1%~D

RH48 750_0 402_1%~D

RH276

RH276

+3V_PCH

1

2

+3VS

Issued Date

Issued Date

Issued Date

2

SATA_PRX_DTX_N1 <28>
SATA_PRX_DTX_P1 <28>
SATA_PTX_DRX_N1_C <28>
SATA_PTX_DRX_P1_C <28>

SATA_PRX_DTX_N2 <28>
SATA_PRX_DTX_P2 <28>
SATA_PTX_DRX_N2_RP <28>
SATA_PTX_DRX_P2_RP <28>

HDD1

ODD

PCH_INTVRMEN

INTVRMEN

HIntegrated VRM enable

*

L



HDA_SDO

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash
Descriptor will be in effect (default)

H=>Flash Descriptor Security will be overridden

RTC Battery

+RTCBATT

+CHGRTC

W=20mils

W=20mils

0_0603_ 5%~D

+CHGRTC

0_0603_ 5%~D

2011/01/25 2 012/01/25

2011/01/25 2 012/01/25

2011/01/25 2 012/01/25

3

1

1

CH95

CH95
1U_0603_1 0V4Z

1U_0603_1 0V4Z

2

RH260

RH260

12

Compal Secret Data

Compal Secret Data

Compal Secret Data

RH259

RH259
1K_0402_ 5%~D

1K_0402_ 5%~D

1 2

W=20mils

2

DH4

DH4
BAT54CW_SOT 323-3

BAT54CW_SOT 323-3

RH261

RH261

0_0603_ 5%~D

0_0603_ 5%~D

12

Deciphered Date

Deciphered Date

Deciphered Date

2

RH31 3 30K_0402_5 %RH31 3 30K_0402_5 %

RH34 3 30K_0402_5 %@RH34 33 0K_0402_5%@

Integrated VRM disable

+RTCVCC

+3VLP

1

+3VS

SERIRQ

+RTCVCC

12

12

HDA_SYNC

This signal has a weak internal pull-down
On Die PLL VR is supplied by

1.5V when smapled high

1.8V when sampled low
Needs to be pulled High for Huron River platfrom

HDA_SYNC

Title

Title

Title

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

RH29 1 0K_0402_5%~DRH29 10K_0402_5%~D

PCH_GPIO21

RH32 1 0K_0402_5%~DRH32 10K_0402_5%~D

PCH_SATALED#PCH_INTVRMEN

RH35 1 0K_0402_5%~DRH35 10K_0402_5%~D

HDA_SPKR

RH37 1 K_0402_5%~D@RH37 1K_0402_5%~D@

HDA_SDOUT

RH42 1 K_0402_5%~D@RH42 1K_0402_5%~D@

Low = Disabled

*

High = Enabled

RH52 1 K_0402_5%~D RH52 1K_0402_5%~D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

12

1

LOW=Default
HIGH=No Reboot

*

12

+3V_PCH

13 61Tuesday , January 25, 2011

13 61Tuesday , January 25, 2011

13 61Tuesday , January 25, 2011

12

12

12

+3VS

12

+3V_PCH

1.0

1.0

1.0

of

of

of

5

PCIE_PRX_GLANTX_N3<22>

@

@

CH21

CH21

1 2

PCIE_PRX_GLANTX_P3<22>
PCIE_PTX_GLANRX_N3<22>
PCIE_PTX_GLANRX_P3<2 2>

PCIE_PRX_WANTX_N2<32>
PCIE_PRX_WANTX_P2<32>
PCIE_PTX_WANRX_N2<32>
PCIE_PTX_WANRX_P2<32 >

PCIE_PRX_WLANTX_N1<32>
PCIE_PRX_WLANTX_P1<32>
PCIE_PTX_WLANRX_N1<32>
PCIE_PTX_WLANRX_P1<32>

PCIE_PRX_CARDTX_N4<23>
PCIE_PRX_CARDTX_P4<23>
PCIE_PTX_CARDRX_N4<23>
PCIE_PTX_CARDRX_P4<23>

PCIE_PRX_USB3TX_N6<27 >
PCIE_PRX_USB3TX_P6<27>
PCIE_PTX_USB3RX_N6<27>
PCIE_PTX_USB3RX_P6<27>

10/100/1G LAN --->

MiniDMC (Mini Card 2)--->

D D

MiniWLAN (Mini Card 1)--->

CARD_READER --->

USB 3.0 --->

@

@

RH86

CLK_PCH_14 M

RH86

33_040 2_5%

33_040 2_5%

12

22P_040 2_50V8J~D

22P_040 2_50V8J~D

CH9 0.1U_0402 _10V7K~DCH9 0.1U_0402 _10V7K~D

1 2

CH14 0.1U_0402_ 10V7K~DCH14 0.1U_0402_ 10V7K~D

1 2

CH10 0.1U_0402_ 10V7K~DCH10 0.1U_0402_ 10V7K~D

1 2

CH15 0.1U_0402_ 10V7K~DCH15 0.1U_0402_ 10V7K~D

1 2

CH11 0.1U_0402_ 10V7K~DCH11 0.1U_0402_ 10V7K~D

1 2

CH16 0.1U_0402_ 10V7K~DCH16 0.1U_0402_ 10V7K~D

1 2

CH12 0.1U_0402_ 10V7K~DCH12 0.1U_0402_ 10V7K~D

1 2

CH13 0.1U_0402_ 10V7K~DCH13 0.1U_0402_ 10V7K~D

1 2

CH19 0.1U_0402_ 10V7K~DCH19 0.1U_0402_ 10V7K~D

1 2

CH20 0.1U_0402_ 10V7K~DCH20 0.1U_0402_ 10V7K~D

1 2

Reserve for EMI please close t o UH1

C C

CLK_PCI_LPBACK

Reserve for EMI please close t o
UH1

B B

25MHZ_18PF_1Y7 25000CE1A~D

25MHZ_18PF_1Y7 25000CE1A~D

1

CH23

CH23

2

A A

@

@

@

RH89

RH89

33_040 2_5%

33_040 2_5%

@

CH22

CH22

12

1 2

22P_040 2_50V8J~D

22P_040 2_50V8J~D

10/100/1G LAN --->

MiniDMC (Mini Card 2)--->

MiniWLAN (Mini Card 1)--->

Card Reader --->

USB 3.0 --->

12

RH1171M_040 2_5%~D RH11 71M_04 02_5%~D

YH2

YH2

1 2

22P_040 2_50V8J~D

22P_040 2_50V8J~D

22P_040 2_50V8J~D

CH24

CH24

22P_040 2_50V8J~D

1

2

XTAL25_IN

XTAL25_OUT

RH91 10K_04 02_5%~DRH9 1 10K_0402_5 %~D

+3V_PCH

CLK_PCIE_LAN#<22>
CLK_PCIE_LAN<22>

LANCLK_REQ#<22 >

CLK_PCIE_MINI2#<32>
CLK_PCIE_MINI2<3 2>

MINI2CLK_REQ#<32>

CLK_PCIE_MINI1#<32>
CLK_PCIE_MINI1<3 2>

MINI1CLK_REQ#<32>

CLK_PCIE_CD#<23>
CLK_PCIE_CD<23 >

CDCLK_REQ#<23>

CLK_PCIE_USB30 #<27>
CLK_PCIE_USB30<27 >

USB30_CLKREQ#<27>

CLK_CPU_ITP#<6>
CLK_CPU_ITP<6>

CLK_RES_ITP#<8>
CLK_RES_ITP<8 >

CLK_CPU_ITP#
CLK_CPU_ITP

RH93 0_040 2_5%~DRH93 0_04 02_5%~D
RH94 0_040 2_5%~DRH94 0_04 02_5%~D

RH95 10K_0402_5%~D@RH9 5 10K_0 402_5%~D@

+3VS

RH96 0_040 2_5%~DRH96 0_04 02_5%~D
RH97 0_040 2_5%~DRH97 0_04 02_5%~D
RH100 10 K_0402_5%~DRH100 10 K_0402_5%~D

+3VS

RH101 0_ 0402_5%~DRH101 0_0402_5%~D
RH102 0_ 0402_5%~DRH102 0_0402_5%~D
RH103 10 K_0402_5%~DRH103 10 K_0402_5%~D

+3V_PCH

RH104 0_ 0402_5%~DRH104 0 _0402_5%~D
RH106 0_0402_5%~DRH106 0_0402_5%~D
RH107 10K_0402_5%~DRH107 10K_0402_5%~D

+3V_PCH

RH110 10 K_0402_5%~DRH110 10 K_0402_5%~D

+3V_PCH

RH112 10 K_0402_5%~DRH112 10 K_0402_5%~D

+3V_PCH

RH114 0_ 0402_5%~DRH114 0_0402_5%~D
RH115 0_ 0402_5%~DRH115 0_0402_5%~D
RH116 10 K_0402_5%~DRH116 10 K_0402_5%~D

+3V_PCH

RH118 10 K_0402_5%~DRH118 10 K_0402_5%~D

+3V_PCH

RH119 0_ 0402_5%~DRH119 0 _0402_5%~D
RH120 0_ 0402_5%~DRH120 0 _0402_5%~D

RH121 0_ 0402_5%~D@RH1 21 0_0402 _5%~D@
RH122 0_0402_5%~D@RH1 22 0_0402 _5%~D@

1 2

1 2
1 2

1 2

1 2

1 2

1 2

12

12
12
12

12
12
12

12
12
12

12
12

12
12

12
12

4

PCIE_PRX_GLANTX_N3
PCIE_PRX_GLANTX_P3
PCIE_PTX_GLANRX_N3 _C
PCIE_PTX_GLANRX_P3 _C

PCIE_PRX_WANTX_N2
PCIE_PRX_WANTX_P2
PCIE_PTX_WANRX_N2_ C
PCIE_PTX_WANRX_P2_C

PCIE_PRX_WLANTX_N1
PCIE_PRX_WLANTX_P1
PCIE_PTX_WLANRX_N1 _C
PCIE_PTX_WLANRX_P1_ C

PCIE_PRX_CARDTX_N4
PCIE_PRX_CARDTX_P4
PCIE_PTX_CARDRX_N4_ C
PCIE_PTX_CARDRX_P4_ C

PCIE_PRX_USB3TX_N6
PCIE_PRX_USB3TX_P6
PCIE_PTX_USB3RX_N6_ C
PCIE_PTX_USB3RX_P6_ C

T81PAD~D @T81PAD~D @
T82PAD~D @T82PAD~D @

PCIECLKREQ0#

PCIE_LAN#
PCIE_LAN

LANCLK_REQ#

PCIE_MINI2#
PCIE_MINI2

MINI2CLK_REQ#

PCIE_MINI1#
PCIE_MINI1

MINI1CLK_REQ#

PCIE_CD#
PCIE_CD

CDCLK_REQ#

PEG_B_CLKREQ#

PCIE_USB30#
PCIE_USB30

USB30_CLKREQ#

GPIO46

CLK_BCLK_ITP#
CLK_BCLK_ITP

CLK_BCLK_ITP

UH1B

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPo int_Rev_1p0

CougarPo int_Rev_1p0

R3@

R3@

PCI-E*

PCI-E*

CLOCKS

CLOCKS

3

SMBALERT# / GPIO11

SMBDATA

SML0ALERT# / GPIO60

SMBUSControll er

SMBUSControll er

SML1ALERT# / PCHHOT# / GPIO74

Link

Link

FLEX CLOCKS

FLEX CLOCKS

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N

CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

SMBCLK

PCH_LID_SW_ IN#

E12

SMBCLK

H14

SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

SML0CLK

C8

SML0DATA

G12

C13

SML1CLK

E14

SML1DATA

M16

M7

T11

No support iAMT

P10

PEG_A_CLKRQ#

M10

CLK_PEG_VGA#

AB37

CLK_PEG_VGA

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

CLK_CPU_DPLL #

AM12

CLK_CPU_DPLL

AM13

CLKIN_DMI#

BF18

CLKIN_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLKIN_DOT96 #

G24

CLKIN_DOT96

E24

CLKIN_SATA#

AK7

CLKIN_SATA

AK5

CLK_PCH_14 M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

KB_DET#

K43

DMC_PCH_DET#

F47

BT_DET#

H47

CAM_DET#

K49

CAM_DET#

DMC_PCH_DET#

BT_DET#

KB_DET#

MEMORY

Total device

+3V_PCH

1 2

RH113 90.9 _0402_1%RH113 9 0.9_0402_ 1%

1 2

RH166 10K_ 0402_5%~DRH 166 10K_0402 _5%~D

1 2

RH109 10K_ 0402_5%~DRH 109 10K_0402 _5%~D

1 2

RH108 10K_ 0402_5%~DRH 108 10K_0402 _5%~D

12

R1791 100K_04 02_5%~DR1791 100K_04 02_5%~D

2

EC_LID_OUT#

1 2

RH680_0402_5 %~D R H680_ 0402_5%~D

@

1 2

RH710_0402_5 %~D@RH710_0402_5 %~D

DRAMRST_CNTRL_PCH <7>

20090512
add double mosfet prevent
ATI M92 electric leakage

RH141

RH141
10K_040 2_5%~D

10K_040 2_5%~D

1 2

CLK_PEG_VGA# <4 0>
CLK_PEG_VGA <40>

CLK_CPU_DMI# <6>
CLK_CPU_DMI <6>

CLK_CPU_DPLL # <6>
CLK_CPU_DPLL <6>

CLK_PCI_LPBACK <16>

KB_DET# <29>

DMC_PCH_DET# <37>

BT_DET# <3 2>

CAM_DET# <21>

PEG_A_CLKRQ# <40>

SMBCLK

SMBDATA

+1.05VS_VCCDI FFCLKN

+3VS

EC_LID_OUT# <3 1>

LID_SW_IN# <31,34,35>

6 1

DMN66D0LDW- 7_SOT363-6~D

DMN66D0LDW- 7_SOT363-6~D

SML1CLK

SML1DATA

QH3A

QH3A

RH105

RH105

@

@

1 2

0_0402 _5%~D

0_0402 _5%~D

DMN66D0LDW- 7_SOT363-6~D

DMN66D0LDW- 7_SOT363-6~D

6 1

DMN66D0LDW- 7_SOT363-6~D

DMN66D0LDW- 7_SOT363-6~D

DMN66D0LDW- 7_SOT363-6~D

DMN66D0LDW- 7_SOT363-6~D

2

QH4A

QH4A

3

+3VS

2

+3VS

5

QH3B

QH3B

RH111

RH111

@

@

1 2

0_0402 _5%~D

0_0402 _5%~D

3

QH4B

QH4B

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

LID_SW_IN#

DRAMRST_CNTRL_PCH

CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96 #
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14 M

If use extenal CLK gen, please place close to CLK gen
else, please place close to PCH

+3VS

RH98

RH98

2.2K_040 2_5%~D

2.2K_040 2_5%~D

1 2

4

5

4

RH76 10K_040 2_5%~DRH76 10K_040 2_5%~D
RH78 10K_040 2_5%~DRH78 10K_040 2_5%~D
RH77 10K_040 2_5%~DRH77 10K_040 2_5%~D
RH79 10K_040 2_5%~DRH79 10K_040 2_5%~D
RH80 10K_040 2_5%~DRH80 10K_040 2_5%~D
RH81 10K_040 2_5%~DRH81 10K_040 2_5%~D
RH82 10K_040 2_5%~DRH82 10K_040 2_5%~D
RH83 10K_040 2_5%~DRH83 10K_040 2_5%~D
RH84 10K_040 2_5%~DRH84 10K_040 2_5%~D

RH99

RH99

2.2K_040 2_5%~D

2.2K_040 2_5%~D

1 2

PCH_SMLCLK <31,51>

PCH_SMLDATA <31,51>

1

1 2

RH67 2.2K_0402 _5%~DRH67 2. 2K_0402_5%~D

1 2

RH69 2.2K_0402 _5%~DRH69 2. 2K_0402_5%~D

1 2

RH70 2.2K_0402 _5%~D

RH70 2.2K_0402 _5%~D

1 2

RH72 2.2K_0402 _5%~D

RH72 2.2K_0402 _5%~D

1 2

RH73 2.2K_0402 _5%~DRH73 2. 2K_0402_5%~D

1 2

RH74 2.2K_0402 _5%~DRH74 2. 2K_0402_5%~D

1 2

R1790 10K_040 2_5%~D

R1790 10K_040 2_5%~D

@

@

1 2

RH75 1K_0402_5 %~D

RH75 1K_0402_5 %~D

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PCH_SMBCLK <6,11, 12,28,32>

PCH_SMBDATA <6,11, 12,28,32>

+3V_PCH

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

LA-6801P

LA-6801P

LA-6801P

1

14 61Tuesday, Ja nuary 25, 2011

14 61Tuesday, Ja nuary 25, 2011

14 61Tuesday, Ja nuary 25, 2011

1.0

1.0

1.0

of

of

of

5

Compal Electronics, Inc.

UH1C

UH1C

DMI_CTX_PRX_N0<5>
DMI_CTX_PRX_N1<5>
DMI_CTX_PRX_N2<5>
DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5>
DMI_CTX_PRX_P1<5>
DMI_CTX_PRX_P2<5>
DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5>

D D

C C

PM_DRAM_PWRGD<6>

SUSWARN# SUSACK#_R

B B

GPIO72

RI#

WAKE#

AC_PRESENT

SUSWARN#

PCH_RSMRST#

SYS_PWROK

A A

DMI_CRX_PTX_N1<5>
DMI_CRX_PTX_N2<5>
DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5>
DMI_CRX_PTX_P1<5>
DMI_CRX_PTX_P2<5>
DMI_CRX_PTX_P3<5>

+1.05VS

SUSACK#<31>

XDP_DBRESET#<6>

PCH_APWROK<31>

PCH_RSMRST#<31>

SUSWARN#<31>

PBTN_OUT#<6,31>

AC_PRESENT<31>

1 2

RH139 0_0402_5%~DRH139 0_0402_5%~D

RH143 10K_0402_5%~DRH143 10K_0402_5%~D

1 2

RH145 10K_0402_5%~DRH145 10K_0402_5%~D

1 2

RH146 10K_0402_5%~DRH146 10K_0402_5%~D

1 2

RH150 10K_0402_5%~D@RH150 10K_0402_5%~D@

1 2

RH154 10K_0402_5%~DRH154 10K_0402_5%~D

1 2

RH159 10K_0402_5%~DRH159 10K_0402_5%~D

1 2

RH272 10K_0402_5%~DRH272 10K_0402_5%~D

1 2

PCH_PWROK<6,31>

VGATE< 6,31,57>

RH124 49.9_0402_1%RH124 49.9_0402_1%

RH125 750_0402_1%~DRH125 750_0402_1%~D

4mil width and place
within 500mil of the PCH

PCH_PWROK

PCH_PWROK

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

1 2

XDP_DBRESET#

@

@

1 2

1 2

1 2

PM_DRAM_PWRGD

1 2

1 2

1 2

1 2

+3V_PCH

1

CH96

CH96

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

1

IN1

2

IN2

DMI_IRCOMP

RBIAS_CPY

PCH_RSMRST#_R

GPIO72

+3VS

1 2

1 2

RH127 0_0402_5%~DRH127 0_0402_5%~D

RH273 0_0402_5%~D

RH273 0_0402_5%~D

RH130 0_0402_5%~DRH130 0_0402_5%~D

RH131 0_0402_5%~DRH131 0_0402_5%~D

RH133 0_0402_5%~DRH133 0_0402_5%~D

RH134 0_0402_5%~DRH134 0_0402_5%~D

RH135 0_0402_5%~DRH135 0_0402_5%~D

RH137 0_0402_5%~DRH137 0_0402_5%~D

BC24

BE20
BG18
BG20

BE24
BC20

BJ18
BJ20

AW24
AW20

BB18

AV18

AY24

AY20

AY18

AU18

BJ24

BG25

BH21

SUSACK#_R

SYS_PWROK

PM_PWROK_R

SUSWARN#_R

PBTN_OUT#_R

AC_PRESENT_R

RI#

C12

K3

P12

L22

L10

B13

C21

K16

E20

H20

E10

A10

5

UH7

UH7

VCC

SYS_PWROK

4

OUT

GND

MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

3

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

DMI_ZCOMP

DMI_IRCOMP

DMI2RBIAS

SUSACK#

SYS_RESET#

SYS_PWROK

PWROK

APWROK

DRAMPWROK

RSMRST#

SUSWARN#/SUSPWRDNACK/GPIO30

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

CougarPoint_Rev_1p0

CougarPoint_Rev_1p0

R3@

R3@

DSWODVREN

DSWODVREN

RH147 330K_0402_5%RH147 330K_0402_5%

RH151 330K_0402_5%@RH151 330K_0402_5%@

DSWODVREN - On Die DSW VR Enable

HEnable

*



Disable

L

DMI

DMI

System Power Management

System Power Management

SYS_PWROK <6>

4

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6

FDI

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

Check EC for S3 S4 LED

12

12

+RTCVCC

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

RH126 0_0402_5%~D

RH126 0_0402_5%~D

PCH_DPWROK

WAKE#

1 2

1 2

RH128 0_0402_5%~DRH128 0_0402_5%~D

PM_CLKRUN#

SUS_STAT#

SUSCLK

RH132 0_0402_5%~DRH132 0_0402_5%~D

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_SUS#

H_PM_SYNC

If not using integrated
LAN,signal may be left as NC.

@

@

12

3

FDI_CTX_PRX_N0 <5>
FDI_CTX_PRX_N1 <5>
FDI_CTX_PRX_N2 <5>
FDI_CTX_PRX_N3 <5>
FDI_CTX_PRX_N4 <5>
FDI_CTX_PRX_N5 <5>
FDI_CTX_PRX_N6 <5>
FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5>
FDI_CTX_PRX_P1 <5>
FDI_CTX_PRX_P2 <5>
FDI_CTX_PRX_P3 <5>
FDI_CTX_PRX_P4 <5>
FDI_CTX_PRX_P5 <5>
FDI_CTX_PRX_P6 <5>
FDI_CTX_PRX_P7 <5>

FDI_INT <5>

FDI_FSYNC0 <5>

FDI_FSYNC1 <5>

FDI_LSYNC0 < 5>

FDI_LSYNC1 < 5>

PCH_RSMRST#_R

PCH_DPWROK <31>

PCIE_WAKE# <22,31,32>

T76 PAD~DT76 PAD~D

SUSCLK_R <31>

PM_SLP_S5# <31,34>

PM_SLP_S4# <31>

PM_SLP_S3# <31,34>

PM_SLP_SUS# <31>

H_PM_SYNC <6>

Can be left NC when IAMT is
not support on the platfrom

SUSCLK

Reserve for RF please close to UH1

CRT_B<21>
CRT_G<21>
CRT_R< 21>

CRT_DDC_CLK<21>
CRT_DDC_DATA<21>

CRT_HSYNC<21>
CRT_VSYNC<21>

CH102

CH102

12

@

@

10P_0402_50V8J~D

10P_0402_50V8J~D

+3VS

RH148 2.2K_0402_5%~D

RH148 2.2K_0402_5%~D

RH152 2.2K_0402_5%~D

RH152 2.2K_0402_5%~D

RH155 2.2K_0402_5%~DRH155 2.2K_0402_5%~D

RH157 2.2K_0402_5%~DRH157 2.2K_0402_5%~D

RH248 8.2K_0402_5%~D@RH248 8.2K_0402_5%~D@

+3VS

RV169 2.2K_0402_5%~DRV169 2.2K_0402_5%~D
RV170 2.2K_0402_5%~DRV170 2.2K_0402_5%~D

VGA_LVDDEN<21,31>

VGA_PWM<21>

LVDS_DDC_CLK<21>

LVDS_DDC_DATA<21>

LVDS_ACLK-<21>
LVDS_ACLK+<21>

LVDS_A0-<21>
LVDS_A1-<21>
LVDS_A2-<21>

LVDS_A0+<21>
LVDS_A1+<21>
LVDS_A2+<21>

LVDS_BCLK-<21>
LVDS_BCLK+<21>

LVDS_B0-<21>
LVDS_B1-<21>
LVDS_B2-<21>

LVDS_B0+<21>
LVDS_B1+<21>
LVDS_B2+<21>

@

@

1 2

@

@

1 2

1 2

1 2

1 2

1 2
1 2

ENBKL<31>

T203PAD~D T203PAD~D

RH136 33_0402_5%RH136 33_0402_5%

RH138 33_0402_5%RH138 33_0402_5%

1K_0402_0.5%~D

1K_0402_0.5%~D

ENBKL

LVDS_DDC_CLK
LVDS_DDC_DATA

LVDS_ACLK­LVDS_ACLK+

LVDS_A0­LVDS_A1­LVDS_A2-

LVDS_A0+
LVDS_A1+
LVDS_A2+

LVDS_BCLK­LVDS_BCLK+

LVDS_B0­LVDS_B1­LVDS_B2-

LVDS_B0+
LVDS_B1+
LVDS_B2+

CRT_B
CRT_G
CRT_R

CRT_DDC_CLK
CRT_DDC_DATA

1 2
1 2

RH140

RH140

CRT_DDC_CLK

CRT_DDC_DATA

CTRL_CLK

CTRL_DATA

PM_CLKRUN#

CTRL_CLK
CTRL_DATA

LVDS_IBG

HSYNC
VSYNC

CRT_IREF

12

LVDS_DDC_CLK
LVDS_DDC_DATA

J47

M45

P45

T40
K47

T45
P39

AF37
AF36

AE48
AE47

AK39
AK40

AN48

AM47

AK47
AJ48

AN47

AM49

AK49
AJ47

AF40
AF39

AH45
AH47
AF49
AF45

AH43
AH49
AF47
AF43

N48
P49
T49

T39
M40

M47
M49

T43
T42

CougarPoint_Rev_1p0

CougarPoint_Rev_1p0

R3@

R3@

2

UH1D

UH1D

L_BKLTEN
L_VDD_EN

L_BKLTCTL

L_DDC_C LK
L_DDC_D ATA

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CL K#
LVDSA_CL K

LVDSA_DA TA#0
LVDSA_DA TA#1
LVDSA_DA TA#2
LVDSA_DA TA#3

LVDSA_DA TA0
LVDSA_DA TA1
LVDSA_DA TA2
LVDSA_DA TA3

LVDSB_CL K#
LVDSB_CL K

LVDSB_DA TA#0
LVDSB_DA TA#1
LVDSB_DA TA#2
LVDSB_DA TA#3

LVDSB_DA TA0
LVDSB_DA TA1
LVDSB_DA TA2
LVDSB_DA TA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

1

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

HDMI

LVDS

LVDS

DDPC_C TRLCLK

DDPC_C TRLDATA

mDP

Digital Display Interface

Digital Display Interface

DDPD_C TRLCLK

DDPD_C TRLDATA

CRT

CRT

DMC

AP43
AP45

AM42
AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

P38
M39

AT49

DDPB_AUXN

AT47

DDPB_AUXP

AT40

DDPB_HPD

AV42

DDPB_0N

AV40

DDPB_0P

AV45

DDPB_1N

AV46

DDPB_1P

AU48

DDPB_2N

AU47

DDPB_2P

AV47

DDPB_3N

AV49

DDPB_3P

P46
P42

AP47

DDPC_AUXN

AP49

DDPC_AUXP

AT38

DDPC_HPD

AY47

DDPC_0N

AY49

DDPC_0P

AY43

DDPC_1N

AY45

DDPC_1P

BA47

DDPC_2N

BA48

DDPC_2P

BB47

DDPC_3N

BB49

DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

RH167 10K_0402_5%~DRH167 10K_0402_5%~D

RH144 2.37K_0402_1%~DRH144 2.37K_0402_1%~D

RH149 150_0402_1%~DRH149 150_0402_1%~D

RH153 150_0402_1%~DRH153 150_0402_1%~D

RH156 150_0402_1%~DRH156 150_0402_1%~D

RH158 100K_0402_5%~DRH158 100K_0402_5%~D

RH123 100K_0402_5%~DRH123 100K_0402_5%~D

1 2

1 2

1 2

1 2

1 2

1 2

1 2

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

PCH_DPD_CLK
PCH_DPD_DAT

PCH_DMC_HPD

PCH_DPD_N0
PCH_DPD_P0
PCH_DPD_N1
PCH_DPD_P1
PCH_DPD_N2
PCH_DPD_P2
PCH_DPD_N3
PCH_DPD_P3

PM_CLKRUN#

LVDS_IBG

CRT_B

CRT_G

CRT_R

VGA_LVDDEN

ENBKL

PCH_DPD_CLK <37>
PCH_DPD_DAT <37>

PCH_DMC_HPD <37>

PCH_DPD_N0 <37>
PCH_DPD_P0 <37>
PCH_DPD_N1 <37>
PCH_DPD_P1 <37>
PCH_DPD_N2 <37>
PCH_DPD_P2 <37>
PCH_DPD_N3 <37>
PCH_DPD_P3 <37>

DMC
( HDMI )

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

3

201 1/01/25 2012/0 1/25

201 1/01/25 2012/0 1/25

201 1/01/25 2012/0 1/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

LA-6801P

LA-6801P

LA-6801P

1

15 61Tuesday, January 25, 2011

15 61Tuesday, January 25, 2011

15 61Tuesday, January 25, 2011

of

of

of

1.0

1.0

1.0

5

D D

+3V_PCH

C C

B B

A A

12

@

@

RH269

RH269
10K_040 2_5%~D

10K_040 2_5%~D

CARD_HPLUG

RH264

RH264
100K_04 02_5%~D

100K_04 02_5%~D

@

@

1 2

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_ RST#

T123PAD~D @T123PAD~D @

12

T165PAD~D @T165PAD~D @
T166PAD~D @T166PAD~D @
T204PAD~D @T204PAD~D @

+3VS

DGPU_SELECT#
DGPU_PWR_EN

DMC_RADIO_OFF#

WL_OFF#

FFS_INT1
ODD_DA#
DP_CBL_DET
CARD_HPLUG

PCH_PLTRST#

CLK_PCI0
CLK_PCI1
CLK_PCI2
CLK_PCI3
CLK_PCI4

DGPU_SELECT#<37>

DGPU_PWR_EN<33 ,43,55,56>

DMC_RADIO_OFF#<3 2>

WL_OFF#<32>

FFS_INT1<28>

ODD_DA#<28>

DP_CBL_DET<38>

CARD_HPLUG<23 >

CLK_PCI_LPBACK<14>

CLK_PCI_LPC<31>

CLK_PCI_LPBACK
CLK_PCI_LPC

WL_OFF#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#

DMC_RADIO_OFF#
DGPU_SELECT#
DGPU_PWR_EN
FFS_INT1

PCI_PIRQA#

ODD_DA#

DGPU_HOLD_ RST#

RH164 22 _0402_5%RH164 2 2_0402_5%
RH165 22 _0402_5%

RH165 22 _0402_5%

1 2

RPH3

RPH3

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

RPH4

RPH4

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

RPH5

RPH5

1 8
2 7
3 6
4 5

8.2K_080 4_8P4R_5%

8.2K_080 4_8P4R_5%

RH173 10K_ 0402_5%~DRH 173 10K_0402 _5%~D

1 2

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

CougarPo int_Rev_1p0

CougarPo int_Rev_1p0

R3@

R3@

10K_040 2_5%~D

10K_040 2_5%~D

PLT_RST#<6,22,23 ,27,31,32>

UH1E

UH1E

4

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

RSVD22

RSVD23
RSVD24

RSVD25

RSVD26
RSVD27

RSVD28
RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P

USB

USB

USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

@

@

1 2

RH168 0_0 402_5%~D

RH168 0_0 402_5%~D

+3VS

5

UH5

UH5

P

IN1

4

O

IN2

G

SN74AHC1G0 8DCKR_SC70-5

SN74AHC1G0 8DCKR_SC70-5

3

NV_ALE

AV5
AV10

AT8

AY5
BA2

AT12
BF3

C24
A24

USB20_N9

C25

USB20_P9

B25

USB20_N8

C26

USB20_P8

A26

USB20_N3

K28

USB20_P3

H28

USB20_N4

E28

USB20_P4

D28

USB20_N5

C28

USB20_P5

A28

USB20_N6

C29

USB20_P6

B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USBRBIAS

C33

B33

USB_OC2#

A14

USB_OC1#

K20

1.5VDDR_VID0

B17

1.5VDDR_VID1

C16

USB_OC0#

L16

USB_OC5#

A16

GPIO10

D14

GPIO14

C14

PCH_PLTRST#

1

2

RH183

RH183

@

@

10K_040 2_5%~D

10K_040 2_5%~D

1 2

@

@

RH169

RH169

+3VS

RSVD

RSVD

1 2

PCI

PCI

12

RH171

RH171
100K_04 02_5%~D

100K_04 02_5%~D

3

USB20_N9 < 26>
USB20_P9 <26>
USB20_N8 < 32>
USB20_P8 <32>
USB20_N3 < 21>
USB20_P3 <21>
USB20_N4 < 32>
USB20_P4 <32>
USB20_N5 < 32>
USB20_P5 <32>
USB20_N6 < 34>
USB20_P6 <34>

Within 500 mils

1 2

RH163 22.6_04 02_1%RH163 22.6_0402 _1%

1 2

RH277 0_0 402_5%~D@ RH277 0_0402_5 %~D@

1 2

RH278 0_0 402_5%~DRH 278 0_0402 _5%~D

USB/B

Bluetooth

Camera

Mini Card(WLAN)

Mini Card(Mini2)

ELC LED

USB3_SMI#

USB3_SMI#

PLTRST_VGA#<40>

USB_OC2# <2 6>

1.5VDDR_VID0 <53>

1.5VDDR_VID1 <53>

USB3_SMI# <27 >

RH17 0

12

100_04 02_5%~D

100_04 02_5%~D

100K_04 02_5%~D

100K_04 02_5%~D

(For USB Port 9 )

1 2

RH254 0_0 402_5%~D@ RH254 0_0402_5 %~D@

RH170

4

Y

12

RH172

RH172

+3VS

5

UH6

UH6

2

P

B

DGPU_HOLD_ RST#

1

A

G

SN74AHC1G0 8DCKR_SC70-5

SN74AHC1G0 8DCKR_SC70-5

3

2

Intel Anti-Thef t Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

RH160 1K_0402_5%~D@RH 160 1K_04 02_5%~D@

USB_OC0#
USB_OC2#
GPIO10
USB_OC5#

USB_OC1#

1.5VDDR_VID0

1.5VDDR_VID1
GPIO14

1 2

RH265 0_0 402_5%~D@ RH265 0_0402_5 %~D@

1 2

RH266 0_0 402_5%~DRH 266 0_0402 _5%~D

RH179

RH179

@

@

10K_040 2_5%~D

10K_040 2_5%~D

1 2

1 2

4 5
3 6
2 7
1 8

10K_120 6_8P4R_5%~D

10K_120 6_8P4R_5%~D

4 5
3 6
2 7
1 8

10K_120 6_8P4R_5%~D

10K_120 6_8P4R_5%~D

*

RPH1

RPH1

RPH2

RPH2

DGPU_PWROK

PCH_PLTRST#

1

+1.8VS

+3V_PCH

DGPU_PWROK <17,38,39,55, 56>

Security Classification

Security Classification

CH99

CH99

CLK_PCI1

12

@

@

10P_040 2_50V8J~D

10P_040 2_50V8J~D

Reserve for RF please close to UH1

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

LA-6801P

LA-6801P

LA-6801P

1

16 61Tuesday, Ja nuary 25, 2011

16 61Tuesday, Ja nuary 25, 2011

16 61Tuesday, Ja nuary 25, 2011

1.0

1.0

1.0

of

of

of

5

+3V_PCH

12

RH270

RH270
10K_040 2_5%~D

10K_040 2_5%~D

HDMI_PCH_HPD# GPIO6

D D

GPIO28

On-Die PLL Volt age Regu lator
This si gnal has a weak internal pull up

HOn-Die voltage regulator enabl e

*

LOn-Die PLL Volt age Regulator d isable

PCH_GPIO37

C C

FDI TER MINATION VOLTAGE OVERRID E

LOW - Tx, Rx te rminated

*

to same voltage
(DC Coupling Mo de)

+3VS

RH181 1K_ 0402_5%~D@RH181 1K_0402_5 %~D@

RH182

RH182

1 2

1 2

RH177 1K_0 402_5%~D@R H177 1K_0402 _5%~D@

12

10K_040 2_5%~D

10K_040 2_5%~D

PCH_GPIO28

PCH_GPIO37

PCH_GPIO37

GPIO27

PCH_GPI O27 (Hav e intern al Pull- High)
High: V CCVRM VR Enable

*

Low: VC CVRM VR Disable

RH186 10K_0402_5 %~D@ RH186 10K_0402_ 5%~D@

B B

High: CRT Plugged

A A

CRT_DET#<21>

1 2

CRT_DET

QH5

QH5

SSM3K7002F_SC59 -3

SSM3K7002F_SC59 -3

5

PCH_GPIO27

+3VS

2

G

G

RH198

RH198
10K_040 2_5%~D

10K_040 2_5%~D

1 2

13

D

D

S

S

PCH_GPI O28 need s to be connecte d to XDP _FN8
PCH_GPI O35 need s to be connecte d to XDP _FN9
PCH_GPI O15 need s to be connecte d to XDP _FN16

Please refer to Huron R iver Deb ug Board DG 0.5

4

UH1F

CRT_DET

DGPU_EDIDSEL#<37 >

EC_SCI#<31>

EC_SMI#<3 1>

BT_RADIO_DIS#<32 >

HDMI_PCH_HPD#<39>

DGPU_PWROK<16,38,39,55, 56>

BT_ON#<32>

ODD_DETECT#<28>

FFS_INT2<28 >

HDD_DETECT#<28>

4

DGPU_EDIDSEL#

EC_SCI#

EC_SMI#

BT_RADIO_DIS#

HDMI_PCH_HPD#

GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO27

PCH_GPIO28

BT_ON#

GPIO35

ODD_DETECT#

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

FFS_INT2

GPIO49

HDD_DETECT#

UH1F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPo int_Rev_1p0

CougarPo int_Rev_1p0

R3@

R3@

3

ODD_EN#

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

GPIO

GPIO

CPU/MISC

CPU/MISC

NCTF

NCTF

3

C40

GPIO69

B41

C41

A40

P4

A20GATE

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PECI

RCIN#

NC_1

Issued Date

Issued Date

Issued Date

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

PCH_PECI_R

KB_RST#

H_THERMTRIP#_C

INIT3_3V#

NV_CLE

ODD_EN# <2 8>

T126 PAD~D@T126 PAD~D@

@

1 2

KB_RST# <3 1>

H_CPUPWRGD <6>

1 2

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

RH1750_0402_5%~D@RH1750_0402_5%~D

RH176390_ 0402_5% RH17639 0_0402_5 %

H_PECI <6, 31>

H_THERMTRIP#

12

@

@

RH178

RH178
10K_040 2_5%~D

10K_040 2_5%~D

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

2

+3VS

RH174

RH174
10K_040 2_5%~D

10K_040 2_5%~D

1 2

GATEA20 <31>

H_THERMTRIP# <6>

INIT3_3V

This signal has weak internal
PU, can't pull low

CRT_DET#

ODD_DETECT#

GPIO16

BT_ON#

KB_RST#

PCH_GPIO22

GPIO35

GPIO49

PCH_GPIO38

PCH_GPIO39

GPIO6

Deciphered Date

Deciphered Date

Deciphered Date

2

DGPU_EDIDSEL#

ODD_EN#

HDD_DETECT#

EC_SMI#

1

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal
PU,Do not pull low

NV_CLE

+1.8VS

12

RH161

RH161

2.2K_040 2_5%~D

2.2K_040 2_5%~D

12

RH1621K_0 402_5%~D RH1621K_0 402_5%~D

H_SNB_IVB# <6>

CLOSE TO THE BRANCHING POINT

RH161 an d RH162
Follow C RB FAB2 setting

+3VS

RH180 10K_ 0402_5%~DRH 180 10K_0402 _5%~D

1 2

+3V_PCH

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH187

RH187

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH188

RH188

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH190

RH190

+3VS

@

@

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH192

RH192

200K_04 02_5%

200K_04 02_5%

1 2

RH193

RH193

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH274

RH274

8.2K_040 2_5%~D

8.2K_040 2_5%~D

1 2

RH195

RH195

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH196

RH196

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH197

RH197

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH257

RH257

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH258

RH258

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH262

RH262

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH263

RH263

10K_040 2_5%~D

10K_040 2_5%~D

1 2

RH271

RH271

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

LA-6801P

LA-6801P

LA-6801P

1

17 61Tuesday, Ja nuary 25, 2011

17 61Tuesday, Ja nuary 25, 2011

17 61Tuesday, Ja nuary 25, 2011

1.0

1.0

1.0

of

of

of

5

4

3

2

1

+1.05VS

@

@

J10

J10

12

PAD-OPEN 4x4m

PAD-OPEN 4x4m

D D

+1.05VS

+1.05VS

@

@

12

RH201 0_0603_5%~D

RH201 0_0603_5%~D

1

2

RH200 0_0603_5%~DRH200 0_0603_5%~D

+VCCAPLLE XP_R

1 2

1UH_LB2012T1R0M_20%~D

1UH_LB2012T1R0M_20%~D

Place CH40 Near BJ22 pin

+1.05VS

12

RH203

RH203

0_0805_5%~D

C C

+1.05VS

B B

0_0805_5%~D

+3VS

12

RH206

RH206
0_0805_5%~D

0_0805_5%~D

1

CH44

CH44

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

@

@

RH208 0_0603_5%~D

RH208 0_0603_5%~D

1

CH37

CH37

2

10U_0805_4VAM~D

10U_0805_4VAM~D

+3VS_VCCA 3GBG

Place CH53 Near BG6 pin

12

1

CH46

CH46

2

@

@

1

2

1

CH27

CH27

2

10U_0805_4VAM~D

10U_0805_4VAM~D

LH3

@LH3

@

+1.05VS_VCC_E XP

1

CH38

CH38

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.05VS

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.05VS_VCCC ORE

1

CH28

CH28

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

12

1

CH39

CH39

CH40

CH40

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

RH209

RH209

1 2

0_0805_5%~D

0_0805_5%~D

+VCCP_VC CDMI

1

CH26

CH26

CH25

CH25

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.05VS_VCCD PLLEXP

+VCCAPLLE XP

1

CH35

CH35

2

@

@

10U_0805_4VAM~D

10U_0805_4VAM~D

1

CH41

CH41

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCAFDI_VRM

+1.05VS_VCCA PLL_FDI

+1.05VS_VCCD PLL_FDI

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

UH1G

UH1G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLE XP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

CougarPoint_Rev_1p0

CougarPoint_Rev_1p0

R3@

R3@

1300mA

2925mA

POWER

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

CRTLVDS

CRTLVDS

60mA

DMI

DMI

190mA

DFT / SPI HVCMOS

DFT / SPI HVCMOS

20mA

1mA

VCCADA C

VSSADAC

1mA

VCCALVD S

VSSALVD S

VCCTX_LVDS [1]

VCCTX_LVDS [2]

VCCTX_LVDS [3]

VCCTX_LVDS [4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKD MI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

20mA

VCCSPI

+VCCADAC

U48

U47

+VCCA_LVD S

AK36

AK37

AM37

AM38

AP36

AP37

+3VS_VCC3_ 3_6

V33

V34

+VCCAFDI_VRM

AT16

+VCCP_VC CDMI

AT20

+1.05VS_VCC_D MI_CCI

AB36

AG16

AG17

AJ16

AJ17

+3V_VCCPS PI

V1

1

CH29

CH29

2

+VCCTX_LVDS

CH32

CH32

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

CH36

CH36

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

CH45

CH45

2

1

CH47

CH47
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

2

RH202

RH202

1 2

0_0805_5%~D

0_0805_5%~D

1

CH43

CH43
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+VCCPNAND

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
RH210

RH210

1 2

0_0805_5%~D

0_0805_5%~D

1

CH31

CH31
10U_0805_4VAM~D

10U_0805_4VAM~D

CH30

CH30

2

RH199 0_0805_5%RH199 0 _0805_5%

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

Near AP43

1

CH33

CH33

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

2

+3VS

+VCCP_VC CDMI

RH205

RH205

1 2

0_0805_5%~D

0_0805_5%~D

1 2

RH207 0_080 5_5%~DRH207 0_0805_5%~D

+3V_PCH

LH1

LH1

12

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1 2

CH34

CH34

1

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

1

CH42

CH42

+1.05VS

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.8VS

+3VS

+3VS

LH2

LH2

12

0.1UH_MLF1608DR10KT_10%_1608

0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

+1.05VS

RH204

RH204

1 2

0_0805_5%~D

0_0805_5%~D

+1.8VS

PCH Powe r Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

3.3

1.05

1.05

1.05

1.05

S0 Ic cmax
Curre nt (A )

0.001

5

5

0.001

0.001

0.266

0.001

0.08

0.08

1.3

0.042

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0.16

1.05VccCLKDMI

0.02

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.06

+3VALW

1

C432

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

A A

5

C432

SUSP#<10,31,33,53,54>

4

2

SUSP#

U47

U47

1

VIN

3

EN

RT9013-15GB_SOT23-5

RT9013-15GB_SOT23-5

+1.5VS +VCCAFDI_VRM

RH211

@RH211

@

+VCCAFDI_VRM

12

0_0603_5%~D

0_0603_5%~D

VOUT

GND

5
4

NC

2

12

RH212

RH212

0_0603_5%~D

0_0603_5%~D

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

2

VCCVRM = 160mA detal waiting f or newest spec

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCH (6/8) PWR

PCH (6/8) PWR

PCH (6/8) PWR

LA-6801P

LA-6801P

LA-6801P

1

1.0

1.0

1.0

of

of

of

18 61Tuesday, January 25, 2011

18 61Tuesday, January 25, 2011

18 61Tuesday, January 25, 2011

5

4

3

2

1

+1.05VS

+3V_PCH

+3V_DSW

D D

+1.05VS

PCH_VREG_EN#<31>

C C

+3VS

B B

A A

+1.05VS

RH216

@ RH216

@

1 2

0_0805_5%~D

0_0805_5%~D

QH6

+3VALW +3V_DSW

QH6
AO3419L_SOT23-3

AO3419L_SOT23-3

S

S

G

G

5/18 delete RH229

+3VS_VCC_C LKF33_R

1 2

RH2300_0805_5%~D RH2300_0805 _5%~D

+1.05VS

@

@

12

RH234 0_0603_5%~D

RH234 0_0603_5%~D

+1.05VS

RH235 0_0603_5%~DRH235 0_0603_5%~D

+1.05VS

+1.05VS

+1.05VS

+VCCA_DP LL_L

1 2

RH247

RH247

0_0805_5%~D

0_0805_5%~D

1 2

RH214 0_0603_5%~DRH214 0_0603_5%~D

1 2

RH221 0_0603_5%~D@RH221 0_0603_5%~D@

LH4

@LH4

@

10UH_LBR2012T100M_20%~D

+VCCAPLL_C PY +3VS_VC C_CLKF33

2

5

10UH_LBR2012T100M_20%~D

1 2

D

D

13

1 2

+1.05VM_VCCSUS

12

1

CH72

CH72

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

RH237 0_0603_5%~DRH237 0_0603_5%~D

RH239 0_0603_5%~DRH239 0_0603_5%~D

1 2

RH242 0_060 3_5%~DRH242 0_0603_5%~D

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

1 2

1 2

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

@

@

1

CH49

CH49

2

+1.05VS

1 2

RH225 0_080 5_5%~DRH225 0_0805_5%~D

LH5

LH5

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

12

1

2

12

1

CH77

CH77
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

2

LH7

LH7

LH8

LH8

+1.05VS

+3VS_VCC_C LKF33

1

1

CH66

CH66

2

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

+VCCDIFFCLK

+1.05VS_VCCD IFFCLKN

CH74

CH74
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+V_CPU_IO

CH79

CH79

1

+

+

CH86

CH86

2

220U_B2_2.5VM_R35M~D

220U_B2_2.5VM_R35M~D

1

CH48

CH48

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

RH219 0_0603_5%~DRH219 0_0603_5%~D

CH67

CH67

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.05VS_VCCD IFFCLKN

+1.05VS_SSCVC C

1

CH78

CH78

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

2

+1.05VS_VCCA _A_DPL

+1.05VS_VCCA _B_DPL

1

CH87

CH87

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

@

@

RH213 0_0603_5%~D

RH213 0_0603_5%~D

CH51

@CH51

@

1

CH57

CH57

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

CH60

CH60

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

CH71

CH71

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

CH81

CH81

CH80

CH80

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

+

+

CH88

CH88

CH89

CH89

2

2

220U_B2_2.5VM_R35M~D

220U_B2_2.5VM_R35M~D

12

1

2

1

CH58

CH58

2

1

CH61

CH61

2

+VCCRTCEXT

1

@

@

CH76

CH76
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+RTCVCC

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

4

+VCCACLK

+VCCPDSW

+PCH_VCCDS W

+VCCAPLL_C PY_PCH

+VCCDPLL_ CPY

+VCCSUS1

1

@

@

CH54

CH54
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+1.05VM_VCCASW

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

CH62

CH62

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCAFDI_VRM

+1.05VS_VCCA _A_DPL

+1.05VS_VCCA _B_DPL

+VCCSST

+1.05VM_VCCSUS

1

CH82

CH82

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

UH1J

UH1J

AD49

VCCACLK

T16

VCCDSW3_ 3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLD MI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADP LLA

BF47

VCCADP LLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

1

CH83

CH83

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

VCCRTC

1

CougarPoint_Rev_1p0

CougarPoint_Rev_1p0

CH84

CH84

2

R3@

R3@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

POWER

POWER

N26

VCCIO[29]

P26

119mA

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

HDA

HDA

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

VCCSUS3_3[1]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCAPLLS ATA

10mA

3

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

1mA

V5REF

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

3mA

1010mA

Clock and Miscellaneous

Clock and Miscellaneous

80mA

80mA

55mA

95mA

1mA

CPURTC

CPURTC

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

+1.05VS_VCCUSB CORE

1

CH50

CH50
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+3V_VCCPUSB

1

CH52

CH52

2

+1.05VS_VCCA UPLL

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_VCCPS US_1

+PCH_V5REF_RUN

1

CH63

CH63
1U_0402_6.3V

1U_0402_6.3V

2

+3VS_VCCP PCI

+VCC3_3_2

+VCCAFDI_VRM

+VCCAFDI_VRM

+1.05VS_VCC_S ATA

+VCCME_22

+VCCME_23

+VCCME_21

+VCCSUSHDA

1

CH850.1U_0402_1 0V7K~D C H850.1U_0402_10V7K~D

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

RH220 0_0603_5%~DRH220 0_0603_5%~D

RH217 0_0603_5%~DRH217 0_0603_5%~D

+3V_VCCAUBG

1

CH53

CH53

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+3V_VCCPS US

1

CH69

CH69

2

+1.05VS_VCC_S ATA

RH240 0_0603_5%~DRH240 0_060 3_5%~D

RH241 0_0603_5%~DRH241 0_060 3_5%~D

RH243 0_0603_5%~DRH243 0_060 3_5%~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

RH223 0_0603_5%~DRH223 0_0603_5%~D

RH224 0_0603_5%~DRH224 0_0603_5%~D

1

CH59

CH59

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+3VS_VCCP CORE

1

CH65

CH65

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

+3VS

RH232

RH232

12

0_0603_5%~D

0_0603_5%~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+1.05VS_SATA3

+VCCSATAPLL

1

CH75

CH75

2

12

12

12

RH244 0_0603_5%~DRH244 0_0603_5%~D

RH245 180_0402_1%@ RH245 180_0402_1%@

12

@

@

RH246

RH246

150_0402_1%~D

150_0402_1%~D

Dec iphered Date

Dec iphered Date

Dec iphered Date

RH218 0_0603_5%~DRH218 0_0603_5%~D

RH226

RH226
0_0603_5%~D

0_0603_5%~D

RH228 0_080 5_5%~DRH228 0_0805_5%~D

1

2

+1.05VS_SATA3

RH238

RH238

0_0805_5%~D

0_0805_5%~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 2

2

12

+1.05VS

12

+3V_PCH

12

+1.05VS

12

12

+3V_PCH

12

RH231 0_0603_5%~DRH231 0_0603_5%~D

CH68

CH68

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

RH233

RH233

1

0_0805_5%~D

0_0805_5%~D

CH70

CH70
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

12

+1.05VS

+1.05VS

12

VCC3_3 = 266mA detal waiting f or newest spec

VCCDMI = 42mA d etal waiting fo r newest spec

QH7

QH7
AO3419L_SOT23-3

AO3419L_SOT23-3

D

S

D

S

13

12

G

G

2

12

RH222

RH222

100_0402_5%~D

100_0402_5%~D

12

RH227

RH227

100_0402_5%~D

100_0402_5%~D

@

@

RH236

RH236

12

0_0805_5%~D

0_0805_5%~D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+3V_PCH

+VCCA_USBSUS

+3V_PCH

+3VS

+3VS

12

12

+1.05VS

LH6

@LH6

@

10UH_LBR2012T100M_20%~D

10UH_LBR2012T100M_20%~D

1 2

1

CH73

@CH73

@

10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

+3V_PCH

+3V_PCH

PCH_PWR_EN#<33>

RH215

RH215

0_0603_5%~D

0_0603_5%~D

1

CH55

2

@CH55

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCSATAPLL_ R

Place CH80 Near AK1 pin

If it support 3.3V audio signals
POP:RH2 28
Depop R H233/RH2 34

If it support 1.5V audio signals
POP:RH2 33/RH234
Depop R 228

Title

Title

Title

PCH (7/8) PWR

PCH (7/8) PWR

PCH (7/8) PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

+5V_PCH+5VALW

12

1

R22

R22

C8

2

0.1U_0402_10V7K~DC80.1U_0402_10V7K~D

+3V_PCH+5V_PCH

21

DH2

DH2
RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_SUS

1

CH56

CH56

0.1U_0603_25V7K

0.1U_0603_25V7K

2

+3VS+5VS

21

DH3

DH3
RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_RUN

1

CH64

CH64
1U_0603_10V6K~D

1U_0603_10V6K~D

2

+1.05VS

1

20K_0402_5%~D

20K_0402_5%~D

1.0

1.0

1.0

of

of

of

19 61Tuesday, January 25, 2011

19 61Tuesday, January 25, 2011

19 61Tuesday, January 25, 2011

5

UH1H

AA17

AA33
AA34
AB11
AB14
AB39

AB43

AC19

AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39

AD4
AD40
AD42
AD43
AD45
AD46

AD8

AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38

AF42
AF46

AG19

AG2
AG31
AG48
AH11

AH36
AH39
AH40
AH42
AH46

AJ19
AJ21
AJ24
AJ33
AJ34

AK12

H5

AA2
AA3

AB4

AB5
AB7

AE2
AE3

AF4

AF5
AF7
AF8

AH3

AH7

AK3

UH1H

VSS[0]

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

CougarPoint_Rev_1p0

CougarPoint_Rev_1p0

R3@

R3@

D D

C C

B B

A A

5

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

4

3

UH1I

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

CougarPoint_Rev_1p0

CougarPoint_Rev_1p0

R3@

R3@

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

2

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

2

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCH (8/8) VSS

PCH (8/8) VSS

PCH (8/8) VSS

LA-6801P

LA-6801P

LA-6801P

1

of

of

of

20 61Tuesday, January 25, 2011

20 61Tuesday, January 25, 2011

20 61Tuesday, January 25, 2011

1.0

1.0

1.0

5

C R T

LU6 0_0603_5%~DLU6 0_0603_5%~D

CRT_R<15>

D D

CRT_G<15>

CRT_B<15>

CRT_DDC_DATA<15>

CRT_DDC_CLK<15>

C C

VGA_LVDDEN<15,31>

EC_ENVDD<31>

B B

BKOFF#<31>

CH751H-40PT_SOD323-2~D

CH751H-40PT_SOD323-2~D

VGA_PWM<15>

EC_INV_PWM<31>

A A

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

+3VS

10P_0402 _50V8J~D

10P_0402 _50V8J~D

12

@

@

EC_ENVDD

BKOFF#

CH751H-40PT_SOD323-2~D

CH751H-40PT_SOD323-2~D

D72

D72

2 1

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

1

CV367

CV367

2

5

1 2

LU7 0_0603_5%~DLU7 0_0603_5%~D

1 2

LU8 0_0603_5%~DLU8 0_0603_5%~D

1 2

CU57

CU57

CU56

CU56

CU58

CU58

10P_0402 _50V8J~D

10P_0402 _50V8J~D

10P_0402 _50V8J~D

10P_0402 _50V8J~D

12

12

@

@

@

@

+3VS +CRT_VCC+3VS +CRT_VCC+3VS

R1834

R1834

2.2K_0402 _5%~D

2.2K_0402 _5%~D

1 2

1 2

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

D37

D37

2

3

BAT54C-7-F_SOT23~D

BAT54C-7-F_SOT23~D

+3VS

@ R382

@

@

@

D69

D69

21

+3VS +3VS

5

U54

U54

1

P

IN1

4

O

IN22G

3

R944

@R944

@

0_0402_5%~D

0_0402_5%~D

12

R1837

@R1837

@

0_0402_5%~D

0_0402_5%~D

12

+LCDVDD

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

CV368

CV368

2.2K_0402 _5%~D

2.2K_0402 _5%~D
R370

R370

G

G

2

S

S

1

12

R382

4.7K_0402_5%~D

4.7K_0402_5%~D

DISPOFF#

10U_0805 _10V4Z~D

10U_0805 _10V4Z~D

CV369

CV369

1

2

PMF3800SN_SC70-3

PMF3800SN_SC70-3

Q288

Q288

10K_0402_5%~D

10K_0402_5%~D

12

G

G

2

S

S

PMF3800SN_SC70-3

PMF3800SN_SC70-3

13

D

D

Q287

Q287

+LCDVDD +5VALW

1 2
13

D

D

S

S

R394

@R394

@

10K_0402_5%~D

10K_0402_5%~D

INV_PWM

1

2

R366

150_040 2_1%~D

R366

150_040 2_1%~D

12

13

D

D

Q286

Q286

R1847

R1847
100_0402_5%~D

100_0402_5%~D

2

G

G

12

R380

R380

12

10K_0402_5%~D

10K_0402_5%~D
R2021

R2021

2

12

1 2

G

G

150_040 2_1%~D

150_040 2_1%~D

R1832

R1832

12

R371

2.2K_0402 _5%~D

R371

2.2K_0402 _5%~D

1 2

13

CRT_R_C

CRT_G_C

CRT_B_C

R1833

R1833

150_040 2_1%~D

150_040 2_1%~D

1

2

2.2K_0402 _5%~D

2.2K_0402 _5%~D

1 2

CRT_DDC_DATA_C

CRT_DDC_CLK_C

R377

R377
47K_0402_5%

47K_0402_5%

D

D

Q290

Q290
BSS138_SOT23~D

BSS138_SOT23~D

S

S

22P_0402 _50V8J~D

22P_0402 _50V8J~D

R372

R372

R378

R378
56K_0402_5%

56K_0402_5%

4

CU550.1U_0402_16V7K~D CU550.1U_0402_16V7K~D

12

L31 BLM18BB750SN1D_2P~DL31 BLM18BB750SN1D_2P~D

L32 BLM18BB750SN1D_2P~DL32 BLM18BB750SN1D_2P~D

L103 BLM18BB750SN1D_2P~DL103 BLM18BB750SN1D_2P~D

22P_0402 _50V8J~D

22P_0402 _50V8J~D

22P_0402 _50V8J~D

22P_0402 _50V8J~D

C537

C537

C538

C538

C539

C539

1

1

2

2

1 2

1 2

1 2

CRT_HSYNC<15>

CRT_VSYNC<15>

CRT_R_L

CRT_G_L

CRT_B_L

For EMI

W=60mils

+3VS

S

S

AO3419L_SOT23-3

AO3419L_SOT23-3

G

G

Q289

2

C549

0.47U_04 02_16V4Z~D

C549

0.47U_04 02_16V4Z~D

1 3

EN_INVPWR<31>

+LCDVDD

C1748

C1748

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

EN_CAM<31>

Q289

4.14

4.14

D

D

+LCDVDDVGA_LVDDEN

1

C1869

C1869

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

2

2

1

W=60mils

+LCDVDD

+5VS

2

G

G

12

1

2

D66

D66

D15

1

2

C540

10P_0402 _50V8J~D

C540

10P_0402 _50V8J~D

+CRT_VCC

3

+CRT_VCC

D15

DAN217_SC59-3

DAN217_SC59-3

1

2

C541

10P_0402 _50V8J~D

C541

10P_0402 _50V8J~D

12

1

5

P

4

OE#

A2Y

G

U625

U625

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

1

5

P

4

OE#

A2Y

G

U626

U626
74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

B+ +INV_PWR_SRC

DAN217_SC59-3

DAN217_SC59-3

+3VS

12

C545

C545

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1 2

C546

C546

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1 2

CRT_VSYNC

60mil

C1126

C1126

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

1

+LCDVDD_R

D50

D50

6

5

4

IP4223CZ6_SO6-6

IP4223CZ6_SO6-6

S

S

G

G

V I/O

V BUS

V I/O

2

2

2

G

G

V I/O

Ground

V I/O

Q47

Q47

D

D

13

1

C551

C551

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

R2005

R2005
0_0402_5%~D

0_0402_5%~D

12

R2006

R2006
0_0402_5%~D

0_0402_5%~D

12

@

@

DMIC_CLK USB20_N3

DMIC0

SI2301CDS-T1-GE3_SOT23-3

SI2301CDS-T1-GE3_SOT23-3

12

R1653

R1653
100K_0402_5%~D

100K_0402_5%~D

13

D

D

Q42

Q42
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

EN_CAM# control circuit

4

D67

D67
DAN217_SC59-3

DAN217_SC59-3

2

3

10P_0402 _50V8J~D

10P_0402 _50V8J~D

12

R373

R373

10K_0402_5%~D

10K_0402_5%~D

1 2

R1835 0_0805_5%~D@ R1835 0_0805_5%~D@

B+

R1242

R1242

100K_040 2_5%~D

100K_040 2_5%~D

12

PWR_SRC_ON

12

R1243

R1243
100K_0402_5%~D

100K_0402_5%~D

13

D

D

Q71

Q71
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

1

2

USB20_P3

3

+3VS_CAM+3VS

3

1

3

C542

C542

+5VS

W=40mils

BAT1000-7-F_SOT23-3~D

BAT1000-7-F_SOT23-3~D

D68

D68

2 1
3

NC

NC

CRT_DET#<17>

R2012

FV3

FV3

21

1.1A_6VDC_FUSE

1.1A_6VDC_FUSE

0_1206_5%~D

0_1206_5%~D

12

@R2012

@

CRT_R_L

CRT_DDC_DATA_C
CRT_G_L

HSYNC_L
CRT_B_L

VSYNC_L

CRT_DDC_CLK_C

T83PAD~D @T83PAD~D @

2

+CRT_VCC+R_CRT_VCC

W=40mils

R1857

R1857

100K_0402_5%~D

100K_0402_5%~D

C543

100P_040 2_50V8J~D

C543

100P_040 2_50V8J~D

1

2

R1160

D_CRT_HSYNC HSYNC_LCRT_HSYNC

D_CRT_VSYNC

R1160

1 2

R1161

R1161

1 2

0_0603_5%~D

0_0603_5%~D

0_0603_5%~D

0_0603_5%~D

1

2

VSYNC_L

C547

15P_0402 _50V8J~D

C547

15P_0402 _50V8J~D

C548

15P_0402 _50V8J~D

C548

15P_0402 _50V8J~D

1

2

1 2

Q70

Q70
SI3457BDV-T1-E3_TSOP6~D

SI3457BDV-T1-E3_TSOP6~D

D

D

6

S

S

4 5

2
1

G

G

3

60mil

+INV_PWR_SRC_R

1

C1127

C1127

0.1U_0603_50V_X7R

0.1U_0603_50V_X7R

2

R2015 0_0805_5%~DR2015 0_0805_5%~D

1 2

LVDS_DDC_CLK<15>
LVDS_DDC_DATA<15>

USB20_P3<16>
USB20_N3<16>
CAM_DET#<14>

DMIC0<24>

W=60mils

W=60mils

R1948

R1948

0_0402_5%~D

0_0402_5%~D

INV_PWM INV_PWM_R

12

1

CU63

CU63
680P_0402_50V7K~D

680P_0402_50V7K~D

2

+INV_PWR_SRC

5P_0402_50V8C

5P_0402_50V8C

5P_0402_50V8C

5P_0402_50V8C

INV_PWM_R
DISPOFF#
USB20_P3
USB20_N3
CAM_DET#
DMIC_CLK_R

DMIC0

+3VS_CAM

+3VS
+LCDVDD

+INV_PWR_SRC

C1133

C1133

@

@

1 2

C1132

C1132

@

@

1 2

close to JLVDS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

12

1

C535

C535

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

LVDS_A0-<15>
LVDS_A0+<15>

LVDS_A1-<15>
LVDS_A1+<15>

LVDS_A2-<15>
LVDS_A2+<15>

LVDS_ACLK-<15>
LVDS_ACLK+<15>

LVDS_B0-<15>
LVDS_B0+<15>

LVDS_B1-<15>
LVDS_B1+<15>

LVDS_B2-<15>
LVDS_B2+<15>

LVDS_BCLK-<15>
LVDS_BCLK+<15>
LCD_TEST<31>

R3790_0402_5%~DR3790_0402_5%~D
R1836 0_0402_5%~DR1836 0_0402_5%~D

DMIC_CLK<24>

JCRT1

JCRT1

6

11

1
7

12

2
8

16

G

G

13

17

G

G

3
9

14

4
10
15

5

SUYIN_070546HR015M25CZR

SUYIN_070546HR015M25CZR

CONN@

CONN@

+LCDVDD_R

EDID_CLK_LCD

12

EDID_DATA_LCD

12

1

+INV_PWR_SRC

R2014

R2014

100K_0402_5%

100K_0402_5%

@

@

Q305A

Q305A

2

@

@

+5VALW

12

@

@

R2013

R2013

12

820_0805_1%

820_0805_1%

3

@

@

Q305B

Q305B

5

61

4

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

Discharg Circuit

LVDS Conn.

JLVDS

LVDS_A0­LVDS_A0+

LVDS_A1­LVDS_A1+

LVDS_A2­LVDS_A2+

LVDS_ACLK­LVDS_ACLK+

LVDS_B0­LVDS_B0+

LVDS_B1­LVDS_B1+

LVDS_B2­LVDS_B2+

LVDS_BCLK­LVDS_BCLK+

LCD_TEST

R1949

R1949

0_0402_5%~D

0_0402_5%~D

JLVDS

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

JAE_FI-G40SB-VF25-R2000-DT~D

JAE_FI-G40SB-VF25-R2000-DT~D

CONN@

CONN@

DMIC_CLK_RDMIC_CLK

12

1

CU64

@CU64

@

470P_0402_50V7K~D

470P_0402_50V7K~D

2

Title

Title

Title

VGA / LVDS /camera conn.

VGA / LVDS /camera conn.

VGA / LVDS /camera conn.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

5P_0402_50V8C

5P_0402_50V8C

5P_0402_50V8C

5P_0402_50V8C

41

G1

42

G2

43

G3

44

G4

45

G5

46

G6

47

G7

48

G8

49

G9

50

G10

51

G11

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

C1134

C1134

1 2

C1135

C1135

1 2

@

@

@

@

21 61Tuesday, January 25, 2011

21 61Tuesday, January 25, 2011

21 61Tuesday, January 25, 2011

LVDS_BCLK-

LVDS_BCLK+

of

of

of

1.0

1.0

1.0

5

PCIE_PRX_GLANTX_P3_C

PCIE_PRX_GLANTX_P3<14>

PCIE_PRX_GLANTX_N3<14>

PCIE_PTX_GLANRX_P3<14>

PCIE_PTX_GLANRX_N3<14>

CLK_PCIE_LAN<14>

CLK_PCIE_LAN#<14>

D D

LANCLK_REQ#<14>

PLT_RST#<6,16,23,27,31,32>

PCIE_WAKE#<15,31,32>

25MHz_12P_X5H025000FC1H-H

25MHz_12P_X5H025000FC1H-H

YL1

YL1

1 2

1

CL18

CL18
15P_0402_50V8J~D

15P_0402_50V8J~D

2

RL15

RL15

0_0402_5%~D

0_0402_5%~D

1 2

LAN_X2

1

CL19

CL19
15P_0402_50V8J~D

15P_0402_50V8J~D

2

12

CL2 0.1U_0402_16V7K~DCL2 0.1U_0402_16V7K~D

12

CL1 0.1U_0402_16V7K~DCL1 0.1U_0402_16V7K~D

12

RL12 0_0402_5%~DRL12 0_0402_5%~D

1 2

PCIE_PRX_GLANTX_N3_C

PCIE_PTX_GLANRX_N3

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLKREQ_LAN#_R

PLT_RST#

PCIE_WAKE#

RL16

RL16

5.1K_0402_1%~D

5.1K_0402_1%~D

Version A will be fail on 802.3a
need to update to Version B

LAN_X1
LAN_X2_R

LAN_ACTIVITY

LAN_LINK#_R
LAN_LED2#_R

30

29

35

36

33

32

4

2

3

25
26

28
27
41

7
8

38
39
23

UL1

UL1

TX_P

TX_N

RX_P

RX_N

REFCLK_P

REFCLK_N

CLKREQ#

PERST#

WAKE#

SMCLK
SMDATA

TEST_RST
TESTMODE
GND

XTLO
XTLI

LED_0
LED_1
LED_2

AR8151-BL1A

AR8151-BL1A

4

Atheros

Atheros
AR8151 AL1A

AR8151 AL1A

TRXP0
TRXN0
TRXP1
TRXN1
TRXP2
TRXN2
TRXP3
TRXN3

AVDDL
AVDDL
AVDDL
AVDDL

AVDDL_REG

AVDDH
AVDDH

AVDDH_REG

DVDDL

DVDDL_REG

VDD33

VDDCT

RBIAS

3

LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2PCIE_PTX_GLANRX_P3
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3

+AVDDH

+DVDDL

W=40mils

+LX

+RBIAS

RL14

RL14

1 2

2.37K_0402_1%~D

2.37K_0402_1%~D

RL2 49.9_0402_1%RL2 49.9_0402_1%
RL1 49.9_0402_1%RL1 49.9_0402_1%
RL3 49.9_0402_1%RL3 49.9_0402_1%
RL4 49.9_0402_1%RL4 49.9_0402_1%
RL5 49.9_0402_1%RL5 49.9_0402_1%
RL7 49.9_0402_1%RL7 49.9_0402_1%
RL8 49.9_0402_1%RL8 49.9_0402_1%
RL9 49.9_0402_1%RL9 49.9_0402_1%

+LAN_IO

+VDDCT

11
12
14
15
17
18
20
21

13
19
31
34
6

16
22
9

24
37

1

40

LX

5

10

+LAN0

12
12
12
12
12
12
12
12

CL3 1000P_0402_50V7K~DCL3 1000P_0402_50V7K~D

1 2

CL4 0.1U_0402_16V7K~DCL4 0.1U_0402_16V7K~D

1 2

+LAN1

CL5 1000P_0402_50V7K~DCL5 1000P_0402_50V7K~D

1 2

CL6 0.1U_0402_16V7K~DCL6 0.1U_0402_16V7K~D

1 2

+LAN2

CL7 1000P_0402_50V7K~DCL7 1000P_0402_50V7K~D

1 2

CL8 0.1U_0402_16V7K~DCL8 0.1U_0402_16V7K~D

1 2

+LAN3

CL9 1000P_0402_50V7K~DCL9 1000P_0402_50V7K~D

1 2

CL10 0.1U_0402_16V7K~DCL10 0.1U_0402_16V7K~D

1 2

close to Lan chip 1000p rese rved for EMI

2.2UH +-20% 1225AS-H-2R2M-P2 1.3A

2.2UH +-20% 1225AS-H-2R2M-P2 1.3A

LL1

LL1

+LX

W=40mils

+VDDCT

1 2

close to Lan pin40

1

CL11

CL11

CL12

CL12

2

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

W=40mils

1

1

1

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CL14

CL14

CL13

CL13

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

2

PLT_RST#

PCIE_WAKE#+AVDDL

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

close to Lan pin5

1 2

1 2

CLKREQ_LAN#_R

+DVDDL

CL15

CL15

1

+LAN_IO

12

RL6

RL6

0_0402_ 5%~D

4.7K_0402_5%~D

4.7K_0402_5%~D

0_0402_ 5%~D

+LAN_IO

4.7K_0402_5%~D

4.7K_0402_5%~D

@

@

RL10

RL10

4.7K_0402_5%~D

4.7K_0402_5%~D

@

@

RL11

RL11

1 2

RL13

RL13

W=20mils

1

1

CL16

CL16

2

1U_0603_ 10V6K~D

1U_0603_ 10V6K~D

1

CL17

CL17

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

close to Lan pin24close to Lan pin37

C C

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

B+_BIAS

+3VALW

RL28

RL28

10K_0402_5%~D

10K_0402_5%~D

EN_WOL#<31>

MURATA_BLM18AG601SN1D_0603

MURATA_BLM18AG601SN1D_0603

B B

close to LL2

1 2

1 2

13

D

D

2

G

G

S

S

LL2

LL2

12

CL40

CL40

+3VALW

CL20

CL20

RL18

RL18
470K_0402_5%~D

470K_0402_5%~D

EN_WOL

QL2

QL2
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

+VDDCT_L+VDDCT

LAN_MDIP3
LAN_MDIN3

LAN_MDIP2
LAN_MDIN2

LAN_MDIP1
LAN_MDIN1

LAN_MDIP0
LAN_MDIN0

TIMAG: S X'FORM _ IH-160 LAN , S P050006F 00

BOTHHAN D: S X'F ORM_ GST 5009-D L F LAN,SP 050006B0 0

1

2

CL41

CL41

@

@

2

1

1U_0603_ 10V6K~D

1U_0603_ 10V6K~D

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

CL42

CL42

1

2

1

2

@

@

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

D

D

6

2
1

RL19

RL19

TS1

TS1

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

350UH_GST5009-CLF

350UH_GST5009-CLF

2

CL44

CL44

CL43

CL43

1

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

QL1

QL1

S

S

+LAN_IO_R

45

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

G

G

3

1 2

1.5M_0402 _5%~D

1.5M_0402 _5%~D

24

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19

MX2-

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

1

2

CL45

CL45

@

@

2

1

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D
1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

RJ45_CT3
RJ45_MDI3+
RJ45_MDI3-

RJ45_CT2
RJ45_MDI2+
RJ45_MDI2-

RJ45_CT1
RJ45_MDI1+
RJ45_MDI1-

RJ45_CT0
RJ45_MDI0+
RJ45_MDI0-

1

CL46

CL46

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

W=40mils

R2016

R2016

1

CL36

CL36

0.1U_0402_25V6

0.1U_0402_25V6

2

2

CL47

CL47

@

@

1

1 2

0_0805_5%~D

0_0805_5%~D

1

CL48

CL48

2

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

W=40mils

CL31

CL31

1 2

75_0402_1%~D

75_0402_1%~D

1 2

75_0402_1%~D

75_0402_1%~D

1 2

75_0402_1%~D

75_0402_1%~D

1 2

75_0402_1%~D

75_0402_1%~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+LAN_IO

RL21

RL21

RL22

RL22

RL23

RL23

RL24

RL24

1

2

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

1A

1

CL33

CL33

CL32

CL32

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

close to Pin 1

2

CL39

CL39

1000P_1808_3KV7K~D

1000P_1808_3KV7K~D

1

W=20mils W=20mils

1

CL34

CL34

2

1U_0603_ 10V6K~D

1U_0603_ 10V6K~D

1

1

CL35

CL35

2

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

+AVDDH +AVDDL

1

CL21

CL21

2

close to Lan pin16close to Lan pin9

1

CL22

CL22

CL23

CL23

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D
1U_0603_ 10V6K~D

1U_0603_ 10V6K~D

1

1

CL24

CL24

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

close to Lan pin22

JLAN1

RJ45_MDI0+

RJ45_MDI0-

RJ45_MDI1+

RJ45_MDI2+

RJ45_MDI2-

RJ45_MDI1-

RJ45_MDI3+

RJ45_MDI3-

JLAN1

1

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

FOX_JM36113-P2651-9F~D

FOX_JM36113-P2651-9F~D

CONN@

CONN@

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

close to Lan pin6

1

1

CL26

CL26

CL25

CL25

2

2

1U_0603_ 10V6K~D

1U_0603_ 10V6K~D

close to Lan pin34

9

LDE_ORANGE-

10

LDE_GREEN-

11

A2

12

LED_YELLOW+

13

LED_YELLOW-

14

NC

SHLD1

SHLD2

15

16

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

LAN_ACTIVITY_R

close to Lan pin31

1

CL28

CL28

CL27

CL27

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

12

RL26 470_0402_5%~DRL26 470_0402_5%~D

12

RL27 130_0402_1%~DRL27 130_0402_1%~D

CL49 470P_0402_50V7KCL49 470P_0402_50V7K

LAN_LED2#

CL38 470P_0402_50V7KCL38 470P_0402_50V7K

LAN_LINK#

LAN_LED_VCC1

RL25 330_0402_5%RL25 330_0402_5%

1 2

0_0402_5%~D

0_0402_5%~D

1

1

CL29

CL29

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

close to Lan pin13

LAN_LED2#_R

LAN_LINK#_R

12

RL20

RL20

12

LAN_ACTIVITY

12

close to Lan pin19

1

CL30

CL30

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+LAN_IO

close to TS1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

GLAN AR8151 AL1A/ RJ45

GLAN AR8151 AL1A/ RJ45

GLAN AR8151 AL1A/ RJ45

LA-6801P

LA-6801P

LA-6801P

1

22 61Tuesday, January 25, 2011

22 61Tuesday, January 25, 2011

22 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of

5

Zdiff = 10 0 ohm

PCIE_PTX_CARDRX_P4<14>

PCIE_PTX_CARDRX_N4<14>

CLK_PCIE_CD<14>

CLK_PCIE_CD#<14>

D D

PCIE_PRX_CARDTX_P4<14>

PCIE_PRX_CARDTX_N4<14>

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

Removed CR17

22P_0402_50V8J~D

22P_0402_50V8J~D

C C

PCIE_PTX_CARDRX_P4

PCIE_PTX_CARDRX_N4

+ODR_PWR

1

12

CR28

CR28

CR19

CR19

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

SD_D1_R SD_D1

SD_D0_R SD_D0

CR25

CR25

SD_CLK_R SD_CLK

1 2

@

@

Reser ved

CLK_PCIE_CD

CLK_PCIE_CD#

CR24 4.7U_0603_6.3V6K~DCR24 4.7U_0603_6.3V6K~D

1 2

PCIE_PRX_CARDTX_P4_CPCIE_PRX_CARDTX_P4

1 2

CR15 0.1U_0402_10V7K~D

CR15 0.1U_0402_10V7K~D

PCIE_PRX_CARDTX_N4_CPCIE_PRX_CARDTX_N4

1 2

CR16 0.1U_0402_10V7K~D

CR16 0.1U_0402_10V7K~D

1 2

CR22 0.1U_0402_10V7K~D

CR22 0.1U_0402_10V7K~D

+3VS_CR

DV33_18

1

CR23

CR23

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

SP1_SDD7_XDRDY

2

SP2_SDD6_XDRE#

SP3_SDD5_XDCE#

SP4_SDD4_XDWE#

1 2

RR20 0_0402_5%~DRR20 0_0402_5%~D

1 2

RR19 0_0402_5%~DRR19 0_0402_5%~D

1 2

RR23 33_0402_1%RR23 33_0402_1%

1 2

RR24 0_0402_5%~DRR24 0_0402_5%~D

1 2

RR21 0_0402_5%~DRR21 0_0402_5%~D

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

AV12

5

AV12

6

HSOP

7

HSON

8

GND

DV12

9

DV12

10

Card1_3 V3

11

3V3_IN

12

Card2_3 V3

XD_CD#

13

XD_CD#

14

DV33_18

15

GND

16

SP1

17

SP2

18

SP3

19

SP4

20

SD_D1

21

SD_D0

22

SD_CMDSD_CMD_R

SD_D3SD_D3_R

SD_CLK

23

SD_CMD

24

SD_D3

RTS5209-GR_LQFP48_7X7

RTS5209-GR_LQFP48_7X7

R2017

R2017

U135

U135

1 2

0_0805_5%~D

0_0805_5%~D

4

+3VS_CR

R1563

R1563

RREF

3V3_IN

CLK_REQ#

PERST#

EEDO

EECS

EESK

GPIO/EEDI

MS_INS#

SD_CD#

DV12_S

SD_D2

RREF

48

47

CDCLK_REQ#

46

PLT_RST#

45

44

CARD_HPLUG_R CARD_HPLUG

43

42

41

MS_INS#

40

SD_CD#

39

SP15_SDWP_XDD7

38

SP15

SP14_MSCLK_XDD6

37

SP14

SP13_MSD7_XDD5

36

SP13

SP12_MSD3_XDD4

35

SP12

SP11_MSD6_XDD3

34

SP11

SP10_MSD2_XDD2

33

SP10

SP9_MSD0_XDD1

32

SP9

SP8_MSD4_XDD0

31

SP8

SP7_MSD1_XDWP#

30

SP7

SP6_MSD5_XDALE

29

SP6

SP5_MSBS_XDCLE

28

SP5

DV12_S

27

26

GND

SD_D2 SD_D2_R

25

+3VS_CR+3VS_CR+3VS

12

6.2K_0402_1%~D

6.2K_0402_1%~D

CDCLK_REQ# <14>

PLT_RST# <6,16,22,27,31,32>

@

@

1 2

RR25 0_0402_5%~D

RR25 0_0402_5%~D

RR22 change to 0

1 2

RR22 0_0402_5%~DRR22 0_0402_5%~D

1 2

CR21

CR21

SP14_MSCLK_XDD6_R

CR20

CR20

1 2

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

RR12 0_0402_5%~DRR12 0_0402_5%~D

3

CR27

CR27

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

Ω

2

CR26

CR26
22P_0402_50V8J~D

22P_0402_50V8J~D

1

@

@

CARD_HPLUG <16>

+ODR_PWR

12

1

CR3

CR3

RR3

RR3

2

For ver:ES2-B0

10K_0402 _5%~D

10K_0402 _5%~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

Place CR3 close to socket pin 22

Place CR4 close to socket pin 11

Place CR5 close to socket pin 11

Place CR6 close to socket pin 18

2

CR6

CR6

CR5

CR5

CR4

CR4

12

1

1

2

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

1

JREAD

CONN@JREAD

CONN@

22

SP8_MSD4_XDD0
SP9_MSD0_XDD1

B B

A A

SP10_MSD2_XDD2
SP11_MSD6_XDD3
SP12_MSD3_XDD4
SP13_MSD7_XDD5
SP14_MSCLK_XDD6
SP15_SDWP_XDD7

SP4_SDD4_XDWE#
SP7_MSD1_XDWP#
SP6_MSD5_XDALE
XD_CD#
SP1_SDD7_XDRDY
SP2_SDD6_XDRE#
SP3_SDD5_XDCE#
SP5_MSBS_XDCLE

5

XD-VCC

30

XD10-D0

29

XD11-D1

28

XD12-D2

27

XD13-D3

26

XD14-D4

25

XD15-D5

24

XD16-D6

23

XD17-D7

33

XD07-WE

32

XD08-WP

34

XD06-ALE

39

XD01-CD

38

XD02-R/B

37

XD03-RE

36

XD04-CE

35

XD05-CLE

31

XD GND

40

XD GND

41

SD CD/WP GND

42

SD CD/WP GND

T-SOL_144-1300002600_NR

T-SOL_144-1300002600_NR

SD4-VDD
MS9-VCC

SD5-CLK
SD7-DAT0
SD8-DAT1
SD9-DAT2
SD1-DAT3

SD2-CMD

SD-CD
SD-WP

SD6-VSS

SD3-VSS

MS8-SCLK

MS4-DATA0
MS3-DATA1
MS5-DATA2
MS7-DATA3

MS6-INS

MS2-BS

MS1-VSS
MS10-VSS

11
18

9
4
3
21
19
16
1
2

6
13

17
10
8
12
15
14
7
5
20

+ODR_PWR+ODR_PWR

SD_CLK_R
SD_D0_R
SD_D1_R
SD_D2_R
SD_D3_R
SD_CMD_R
SD_CD#
SP15_SDWP_XDD7

SP14_MSCLK_XDD6_R
SP9_MSD0_XDD1
SP7_MSD1_XDWP#
SP10_MSD2_XDD2
SP12_MSD3_XDD4
MS_INS#
SP5_MSBS_XDCLE

4

Reserve for EMI please close to JREAD1

@

@

RR8

RR8

1 2

33_0402_5%

33_0402_5%

Reserve for EMI
please close to JREAD1

@

@

RR11

RR11

1 2

33_0402_5%

33_0402_5%

1

CR18

CR18

@

@

22P_0402_50V8J~D

22P_0402_50V8J~D

2

@

@

CR14

CR14

12

22P_0402_50V8J~D

22P_0402_50V8J~D

Co-lay connector for 2nd. 2010/11/26

+ODR_PWR

JREAD1

24

Deciphered Date

Deciphered Date

Deciphered Date

2

XD-VCC

32

XD-D0

31

XD-D1

30

XD-D2

29

XD-D3

28

XD-D4

27

XD-D5

26

XD-D6

25

XD-D7

35

XD-WE

34

XD-WP

36

XD-ALE

41

XD-CD

40

XD-R/-B

39

XD-RE

38

XD-CE

37

XD-CLE

33

XD-GND

42

XD-GND

43

GND

44

GND

ALPS_SCDG4B0102_NR

ALPS_SCDG4B0102_NR

SP8_MSD4_XDD0
SP9_MSD0_XDD1
SP10_MSD2_XDD2
SP11_MSD6_XDD3
SP12_MSD3_XDD4
SP13_MSD7_XDD5
SP14_MSCLK_XDD6
SP15_SDWP_XDD7

SP4_SDD4_XDWE#
SP7_MSD1_XDWP#
SP6_MSD5_XDALE
XD_CD#
SP1_SDD7_XDRDY
SP2_SDD6_XDRE#
SP3_SDD5_XDCE#
SP5_MSBS_XDCLE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

CONN@JREAD1

CONN@

SD-VDD/MMC-VDD

MS-VCC

MMC-CLK/SD-CLK

MMC-DAT/SD-DAT0

SD-DAT1

SD-DAT2
MMC-RSV/SD-DAT3
SD-CMD/MMC-CMD

SD-CD

SD-WP

SD-CD

MS-SCLK

MS-SDIO/DATA0

MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

MS-BS
MS-VSS
MS-VSS

SD-VSS/MMC-VSS1
SD-VSS/MMC-VSS2
SD-VSS/MMC-VSS2

+ODR_PWR

12
19

SD_CLK_R

10

SD_D0_R

4

SD_D1_R

3

SD_D2_R

22

SD_D3_R

20

SD_CMD_R

17

SD_CD#

1

SP15_SDWP_XDD7

2
5

SP14_MSCLK_XDD6_R

18

SP9_MSD0_XDD1

11

SP7_MSD1_XDWP#

9

SP10_MSD2_XDD2

13

SP12_MSD3_XDD4

16

MS_INS#

15

SP5_MSBS_XDCLE

8
6
21

14
23
7

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Card Reader RTS5209

Card Reader RTS5209

Card Reader RTS5209

LA-6801P

LA-6801P

LA-6801P

1

23 61Tuesday, January 25, 2011

23 61Tuesday, January 25, 2011

23 61Tuesday, January 25, 2011

of

of

of

1.0

1.0

1.0

5

D D

C7

C7

BEEP#<31>

HDA_SPKR<13>

+3VS

close to U2, 7/ 26

C C

4.7K_0402_1%~D

4.7K_0402_1%~D

B B

12

R1792

R1792

HDA_RST_AUDIO#

C46

C46

1

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

1 2

R13 0_0 805_5%~DR13 0_0805_5%~D

1 2

R15 0_0 805_5%~DR15 0_0805_5%~D

1 2

R17 0_0 805_5%~DR17 0_0805_5%~D



5/30 change +1.5vs to +3vs

1 2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1870

C1870

1 2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

R4

R4

1 2

560_0402_5%

560_0402_5%

1 2

560_0402_5%

560_0402_5%

10K_0402_5%~D

10K_0402_5%~D

1 2

R14 0_0 805_5%~DR14 0_0805_5%~D

1 2

R16 0_0 805_5%~DR16 0_0805_5%~D

1 2

R18 0_0 805_5%~DR18 0_0805_5%~D

2

B

B

R5

R5

12

R6

R6

DMIC_CLK<21>

DMIC0<21>

4

+VDDA

12

R1

R1
10K_0402_5%~D

10K_0402_5%~D

1 2

12

C1 1U_0402_6.3V6K ~DC1 1U_0402_6.3V6K~D

R2

R2
10K_0402_5%~D

10K_0402_5%~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C

C

Q1

Q1

E

E

2SC2411K_S OT23

2SC2411K_S OT23

3

12

D1

D1
SDMK0340L-7-F_SOD 323-2~D

SDMK0340L-7-F_SOD 323-2~D

MIC1_PLUG#<25>
LINE2_PLUG#<25>
MIC2_PLUG#<25>

L102 FB MA-10-100505-301T 0402L102 F BMA-10-100505-301T 0402

1 2

Reserve for EMI

1 2

R110 0_0 402_5%~DR110 0_0402_5%~D

C6

C6

1 2

1 2

R3 1.3K_0 402_1%R3 1.3K_0402_1%

+VDDA

MONO_IN

FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

Close t o codec

MIC1_L<25 >

MIC1_R<25>

Place close to Codec

R9 20K _0402_1%~DR9 20K_0402_1 %~D
R10 39.2K _0402_1%R10 39.2K _0402_1%

R11 20K _0402_1%~DR11 20K_0402_1%~D

C119 15P_0402_50 V8J~D@C119 15P_0402_ 50V8J~D@

C120 15P_0402_50 V8J~D@C120 15P_0402_ 50V8J~D@

1

1

2

2

L4

L4

1 2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

MIC1_L

MIC1_R

HDA_RST_AUDIO#<13>

HDA_SYNC_AUDIO<13>

HDA_SDOUT_AUDIO<13>

1 2

1 2

EC_EAPD #<31>

L1

+5VS

L1

FBMA-L11-201209-221LMA3 0T_0805

FBMA-L11-201209-221LMA3 0T_0805

L2

L2

FBMA-L11-201209-221LMA3 0T_0805

FBMA-L11-201209-221LMA3 0T_0805

1

C9

C9

C10

C10

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

1 2

C16 4.7U_0603_6.3V 6MC16 4.7U_0603_6.3V6M

1 2

C17 4.7U_0603_6.3V 6MC17 4.7U_0603_6.3V6M

12

1 2

1 2

1

2

12

C132.2U_0603_6.3V6K~DC132.2U_0603_6.3V6K~D

12

C142.2U_0603_6.3V6K~DC142.2U_0603_6.3V6K~D

3

+5VAMP

1

C2

C2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

HD Audio Codec

+AVDD_HDA

40mil

38

U2

U2

AVDD125AVDD2

14

LINE2-L

15

LINE2-R

16

MIC2_L

17

MIC2_R

29

CBP

30

CBN

31

CPVEE

21

MIC1_L

22

MIC1_R

12

PCBEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

SPDIFO2

13

SENSE A

36

SENSE B

47

EAPD

48

SPDIFO1

44

DMIC-CLK3/4

46

DMIC_CLK1/2

3

GPIO1/DMIC-3/4

2

GPIO0/DMIC-1/2

4

DVSS

7

DVSS

MIC2-VREFO

LINE2-VREFO

LINE1-VREFO

MIC1-VREFO

ALC665-GR_LQFP48_7X7

ALC665-GR_LQFP48_7X7

1

C3

C3

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

1

9

DVDD

DVDD_IO

SURR_L

SURR_R

MIC2-OUT-L

MIC2-OUT-R

LINE2-OUT-R

LINE2-OUT-L

NC

BITCLK

SDATA_IN

LINE1-L

LINE1-R

VREF

JDREF

MONO-OUT

AVSS1
AVSS2

60mil

20mil

1

C47

C47

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

20mil

1

C11

C11

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

AMP_LEFT

39

AMP_RIGHT

41

35

33

32

34

For EMI

43

6

HDA_SDIN0_AUDIOMONO_IN

8

23

24

19

20

18

10mil

28

27

40

37

26
42

U1

U1

1

IN

2

GND

3

SHDN

RT9198-4GGBR_SOT23-5

RT9198-4GGBR_SOT23-5

L14

+1.5VS_DVDD

1 2

FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1

C48

C48

R2003

R2003
0_0402_5%~D

0_0402_5%~D

2

L5

10U_0805_10V4Z~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

L5

1 2

+3VS_DVDD

1 2

FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1

C12

C12

2

1 2

R7 0_0402_ 5%~DR7 0_0402_ 5%~D

1 2

R8 33_0 402_5%R8 3 3_0402_5%

MIC1_VREFO

CODEC_VREF

12

R12

R12
20K_0402_1%~D

20K_0402_1%~D

2

5

OUT

4

BYP

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

@L14

@

+1.5VS

+3VS

AMP_LEFT <25>

AMP_RIGHT <25>

MIC2-OUT_L <25>

MIC2-OUT_R <25>

LINE2-OUT_R <25>

LINE2-OUT_L <25>

1 2

10mil

1

C20

C20

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

Close t o codec

MONO_OUT <25>

(output = 300 mA)

40mil

1

1

2

C15

C15
22P_0402_50V8 J~D

22P_0402_50V8 J~D

HDA_BITCLK_AUDIO <13>

HDA_SDIN0 <13>

1

C19

C19
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

@

@

2

C5

C5

+VDDA

4.75V

C4

C4

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

1

GND GNDA GND GNDA

A A

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Codec ALC665

Codec ALC665

Codec ALC665

LA-6801P

LA-6801P

LA-6801P

1

1.0

1.0

1.0

of

of

of

24 61Tuesday, January 25, 2011

24 61Tuesday, January 25, 2011

24 61Tuesday, January 25, 2011

5

+5VAMP +5VAMP

GAIN0 GAIN1
0 0 6dB
0 1 10dB
1 0 15.6dB
1 1 21.6dB

D D

FFC=153HZ

C26

C26

0.47U_0603_16V4Z

0.47U_0603_16V4Z

1 2

@

@

4.7K_0603_1%

4.7K_0603_1%

1 2

1 2

C28

C28

0.47U_0603_16V4Z

0.47U_0603_16V4Z

C1929 0.033U_0603_25V7M~DC1929 0.033U_0603_25V7M~D

1 2

12

R1986

R1986

+5VAMP

AMP_LEFT< 24>

AMP_RIGHT< 24>

C C

AMP_LEFT AMP_RIGHT

C1928 0.015U_0402_16V7K

C1928 0.015U_0402_16V7K

B B

AMP_LEFT_C-1

AMP_RIGHT_C-1

R28

R28

390_0402_5%

390_0402_5%

R1984

R1984

1 2

10K_0402_5%~D

10K_0402_5%~D

R23

R23

100K_0402_1%

100K_0402_1%

1 2

R26

R26
100K_0402_1%

100K_0402_1%

@

@

1 2

12

12

R29

R29

390_0402_5%

390_0402_5%

R1980 12K_0402_5%~DR1980 12K_0402_5%~D

3

2

12

R1988

R1988
10K_0402_5%~D

10K_0402_5%~D

SPK_MUTE#<31>

either one opti on.

MONO_OUT<24>

1 2

R1990 1K_0603_1%R1990 1K_0603_1%

1 2

R1991 1K_0402_1%~D

R1991 1K_0402_1%~D

@

@

0_0402_ 5%~D

0_0402_ 5%~D

12

C1936

C1936

R24

R24
100K_0402_1%

100K_0402_1%

@

@

1 2

R27

R27

100K_0402_1%

100K_0402_1%

1 2

AMP_LEFT_C

1 2

C29 0.1U_0402_16V7K~DC29 0.1U_0402_16V7K~D

AMP_RIGHT_C

1 2

C32 0.1U_0402_16V7K~DC32 0.1U_0402_16V7K~D

1 2

C1926 0.015U_0402_16V7KC1926 0.015U_0402_16V7K

1 2

+5VAMP

4

U634A

U634A

P

+

1

OUT

G

-

1U_0603_16V6K~D

11

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

C1937

C1937

1

1U_0603_16V6K~D

TLV2464_TSSOP14

TLV2464_TSSOP14

C1889

C1889

1 2

C1888

C1888

1 2

220nF_040 2_16V7K

220nF_040 2_16V7K

@

@

GAIN1GAIN0

0.1U_0603_25V7K

0.1U_0603_25V7K

C1932

1 2

+3VS

W=20mil

12

R1863

R1863
47K_0402_1%

47K_0402_1%

C30

C30

@C1932

@

AMP_LEFT_C AMP_RIGHT_C

1 2

R1879 3.48K_0603_1%

R1879 3.48K_0603_1%

1 2

R1861 3.48K_0603_1%

R1861 3.48K_0603_1%

2

@

@

1 2

100K_0402_1%~D

AMP_LEFT

AMP_LEFT<24>

A A

AMP_RIGHT< 24>

1 2

100K_0402_1%~D

100K_0402_1%~D

R1997

R1997

@

@

AMP_RIGHT AMP_RIGHT_RR

1 2

100K_0402_1%~D

100K_0402_1%~D

5

10K_0402_1%~D

10K_0402_1%~D

10K_0402_1%~D

10K_0402_1%~D

@

@

C1940

C1940

1 2

1U_0603_16V6K~D

1U_0603_16V6K~D

+5VAMP

12

R2000

R2000

12

R2001

R2001

R1994

R1994

@

@

100K_0402_1%~D

9

-

10

+

U634C

U634C

@

@

@

@

@

@

1

2

1U_0603_16V6K~D

1U_0603_16V6K~D

R1993

R1993

11

G

OUT

P

4

4

W=40mil

GAIN0

GAIN1

1

C31

C31

0.1U_0603_25V7K

0.1U_0603_25V7K

2

AMP_LEFT_RRAMP_LEFT_R

AMP_RIGHT_RRAMP_RIGHT_R

R2002

R2002

20K_0402_1%~D

20K_0402_1%~D

@

@

C1945

C1945

@

@

MONO_OUT

R1992 0_0603_5%

R1992 0_0603_5%

TLV2464_TSSOP14

TLV2464_TSSOP14

8

+5VAMP

4

+5VAMP

1

C21

C21

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

U3

U3

16

VDD

6

PVDD

15

PVDD

2

GAIN0

3

GAIN1

5

LIN-

17

RIN-

9

LIN+

7

RIN+

1 2

2

1

1 2

@

@

R1995

R1995

1 2

1K_0402_1%~D

1K_0402_1%~D

@

@

1

C27

C27

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

SHUTDOWN

LOUT-

ROUT-

LOUT+

ROUT+

GND
GND
GND
GND
GND

BYPASS

TPA6017A2PWPR_TSSOP20

TPA6017A2PWPR_TSSOP20

1 2

C1930 0.015U_0402_16V7K

C1930 0.015U_0402_16V7K

@

@

R1987

R1987

4.7K_0603_1%

4.7K_0603_1%

U633

U633

3

IN+

4

IN-

1

SHUTDOWN

2

BYPASS

1

C1887

C1887

0.22U_0603_25V7K~D

0.22U_0603_25V7K~D

2

R1996

@R1996

@

1 2

1K_0402_1%~D

1K_0402_1%~D

C1942

C1942

1U_0603_16V6K~D

1U_0603_16V6K~D

+3VS

W=20mil

12

R25

R25
47K_0402_1%

47K_0402_1%

12

NC

19

SPKL-

8

SPKR-

14

SPKL+

4

SPKR+

18

1
11
13
20
21

10

1

C41

C41

2.2U_0603_10V7K~D

2.2U_0603_10V7K~D

2

C19310.033U_0603_25V7M~DC19310.033U_0603_25V7M~D

1 2

+5VAMP

12

R1985

R1985

1 2

10K_0402_5%~D

10K_0402_5%~D

@

@

1 2

C1934 0.012U_0603_50V7K~D

C1934 0.012U_0603_50V7K~D

@

@

1 2

C1935 0.012U_0603_50V7K~D

C1935 0.012U_0603_50V7K~D

+5VAMP

W=40mil

1

C1886

C1886

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

6

VDD

5

VO+

8

VO-

GND

GND

TPA6211A1DGNRG4_MSOP8

TPA6211A1DGNRG4_MSOP8

7

9

C1939

@ C1939

@

1 2

1U_0603_16V6K~D

1U_0603_16V6K~D

+5VAMP

4

U634D

U634D

12

P

+

OUT

13

G

-

2

@

@

1

@

@

TLV2464_TSSOP14

TLV2464_TSSOP14

11

3

SPK_MUTE# <31>

1 2

C1927 0.015U_0402_16V7KC1927 0.015U_0402_16V7K

R1981 12K_0402_5%~DR1981 12K_0402_5%~D

1 2

+5VAMP

4

U634B

U634B

5

P

+

7

OUT

6

G

-

1U_0603_16V6K~D

TLV2464_TSSOP14

TLV2464_TSSOP14

11

C1885

C1885

4.7U_0603_10V6K~D

4.7U_0603_10V6K~D

SUB_L+
SUB_R-

C1941

1 2

1U_0603_16V6K~D

1U_0603_16V6K~D

1U_0603_16V6K~D

@C1941

@

3

12

R1989

R1989
10K_0402_5%~D

10K_0402_5%~D

1

2

14

@

@

2

LINE2-OUT_L<24>

LINE2-OUT_R<24>

LINE2_PLUG#<24>

MIC2-OUT_L<24>

MIC2-OUT_R<24>

MIC2_PLUG#<24>

C1933

@C1933

@

1 2

MIC1_L<24>

MIC1_R<24>

MIC1_PLUG#<24>

JWFER2

JWFER2

1

1

2

2

MOLEX_53261-0271~D

MOLEX_53261-0271~D

CONN@

CONN@

R1998

R1998

@

@

1 2

20K_0402_1%~D

20K_0402_1%~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

1 2

R30 56.2_0603_1%R30 56.2_0603_1%

1 2

R31 56.2_0603_1%R31 56.2_0603_1%

R33 75_0402_1%R33 75_0402_1%

1 2

R32 75_0402_1%R32 75_0402_1%

1 2

For ESD
I/O status:
a. input/output mount 75 ohm
b. input only mount 1K ohm

R36 75_0402_1%R36 75_0402_1%

1 2

1 2

R37 75_0402_1%R37 75_0402_1%

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

1 2

L6 BLM15AG121SN1D_L0402_2PL6 BLM15AG121SN1D_L0402_2P

1 2

L7 BLM15AG121SN1D_L0402_2PL7 BLM15AG121SN1D_L0402_2P

C33

@ C33

@

10P_0402_50V8J

10P_0402_50V8J

MIC2_OUT_L_1

1 2

L8 BLM15AG121SN1D_L0402_2PL8 BLM15AG121SN1D_L0402_2P

MIC2_OUT_R_1 MIC2_OUT_R_R

1 2

L9 BLM15AG121SN1D_L0402_2PL9 BLM15AG121SN1D_L0402_2P

1

C35

@ C35

@

220P_0402_50V8J

220P_0402_50V8J

2

220P_040 2_50V8J

220P_040 2_50V8J

MIC1_VREFO MIC1_VREFO

R34

R34

2.2K_0402_5%

2.2K_0402_5%

MIC1_L_1 MIC1_L_R

1 2

L10 BLM15AG121SN1D_L0402_2PL10 BLM15AG121SN1D_L0402_2P

MIC1_R_1 MIC1_R_R

1 2

L11 BLM15AG121SN1D_L0402_2PL11 BLM15AG121SN1D_L0402_2P

C39

@C39

@

220P_0402_50V8J

220P_0402_50V8J

20mil

SPKL+

R19 0_0603_5%R19 0_0603_5%

SPKL­SPKR+

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1 2

R21 0_0603_5%R21 0_0603_5%

1 2

R20 0_0603_5%R20 0_0603_5%

1 2

R1848 0_0603_5%R1848 0_0603_5%

1 2

2

1

LINE Out/Headphone Out

JHP1

JHP1

LINE2_LLINE2_OUT_L_1

LIEN2_RLINE2_OUT_R_1

2

3

D5

D5

1

1

C34

@C34

@

2

2

@

@

1

PJDLC05C_SOT2 3-3

PJDLC05C_SOT2 3-3

10P_0402 _50V8J

10P_0402 _50V8J

MIC2_OUT_L_R

2

1

@C36

@

2

C36

3

D6

D6

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

@

@

3

1

2
5

6

SHLD1

SHLD1

4

SINGA_2SJ2285-112252

SINGA_2SJ2285-112252

CONN@

CONN@

LINE Out/Headphone Out

JHP2

JHP2

3

1

2
5

6

SHLD1

SHLD1

4

SINGA_2SJ2285-112252

SINGA_2SJ2285-112252

CONN@

CONN@

1

12

12

R35

R35

2.2K_0402 _5%

2.2K_0402 _5%

2

1

1

C40

@C40

@

D7

D7

2

2

220P_040 2_50V8J

220P_040 2_50V8J

Int. Speaker Conn.

2

3

2

3

D2

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

1

PJDLC05C_SOT2 3-3D2PJDLC05C_SOT2 3-3

For ESD

Title

Title

Title

Amp TPA6017/subwoofer/ Audio Jack

Amp TPA6017/subwoofer/ Audio Jack

Amp TPA6017/subwoofer/ Audio Jack

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

3

@

@

1

D4

D4

LA-6801P

LA-6801P

LA-6801P

MIC JACK

JHP3

JHP3

3

1

2
5

6

SHLD1

SHLD1

4

SINGA_2SJ2285-112252

SINGA_2SJ2285-112252

CONN@

CONN@

PJDLC05C_SOT2 3-3

PJDLC05C_SOT2 3-3

SPK_L+
SPK_L­SPK_R+
SPK_R-SPKR-

C22

C22

1

220P_0402_50V8J

220P_0402_50V8J

C23

C23

1

2

220P_0402_50V8J

220P_0402_50V8J

C24

C24

1

2

220P_0402_50V8J

220P_0402_50V8J

C25

C25

1

220P_0402_50V8J

220P_0402_50V8J

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

25 61Tuesday, January 25, 2011

25 61Tuesday, January 25, 2011

1

25 61Tuesday, January 25, 2011

JSPK

JSPK

1

1

2

2

3

3

4

4

5

GND

6

GND

MOLEX_53780-0470

MOLEX_53780-0470

CONN@

CONN@

of

of

of

1.0

1.0

1.0

A

Power share

1 1

U30

PW RSHARE_ EN#
SW _USB20_ N9
SW _USB20_ P9

2 2

U30

1

CEN

2

DM

3

DP

4

GND

9

GND

MAX1 4566EE TA+_TD FN-EP8_2 X2~D

MAX1 4566EE TA+_TD FN-EP8_2 X2~D

TDM

TDP
VCC

CB

8
7
6
5

PW RSHARE_ OE#

+5VA LW

2

C26 1

C26 1

0.1U_ 0402_1 6V7K~D

0.1U_ 0402_1 6V7K~D

1

USB2 0_N9 <16 >
USB2 0_P9 <16>

B

CB Function

auto detection charger identification active

L

DP/DM=TDP/TDM

H

12

R20 3

R20 3
100 K_0402 _5%~D

100 K_0402 _5%~D

PW RSHARE_ OE# <31 >

12

PW RSHARE_ EN_EC#<31>

PW RSHARE_ EN#

R2004

10K_0402_1%~D

R2004

10K_0402_1%~D

C

PW RSHARE_ EN#

R20 07 10K _0402_ 5%~DR2007 1 0K_04 02_5% ~D

1SS 355TE-1 7_SOD 323-2

1SS 355TE-1 7_SOD 323-2

1 2

1

221

D71

D71

+5VA LW

10K_0402_1%~D@R1941

10K_0402_1%~D

12

@

SW _USB20_ P9

SW _USB20_ N9

D

R1941

+5VA LW

1

1

C26 2

C26 2

C26 3

C26 3

10U_1206_16V4Z

10U_1206_16V4Z

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

2

R26 2 0_0 402_5% ~D

R26 2 0_0 402_5% ~D

1 2

L40

L40

1

1

4

4

WC M2012F2 S-900T 04_080 5

WC M2012F2 S-900T 04_080 5

R22 2 0_0 402_5% ~D

R22 2 0_0 402_5% ~D

1 2

@

@

@

@

2.0A

U29

U29

1

GND

2

IN

3

EN1#

4

EN2#

TPS 2062AD R_SO8 ~D

TPS 2062AD R_SO8 ~D

2

2

3

3

+5V_ CHGUSB

8

OC1#

7

OUT1

6

OUT2

5

OC2#

USB2 0_P9_C ONN

USB2 0_N9_CO NN

L40 close to JUSB1

E

USB_ OC2# <1 6>

+5VA LW

D26

D26

3 3

4 4

A

6

V I/O

5

V BUS

4

V I/O

IP4 223CZ6 _SO6-6

IP4 223CZ6 _SO6-6

B

1

V I/O

2

Ground

3

V I/O

USB2 0_P9_C ONN
USB2 0_N9_CO NN

Security Classification

Security Classification

Security Classification

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/25 2012/01/25

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

USB CONN

+5V_ CHGUSB

Deciphered Date

Deciphered Date

Deciphered Date

JUSB 1

JUSB 1

1

GND

2

USB_P

3

USB_N

4

VCC

5

GND

6

GND

7

GND

8

GND

SUYIN_0 20173 MR004S5 2KZL

SUYIN_0 20173 MR004S5 2KZL

CONN@

CONN@

D

close to JUSB1

+5V_ CHGUSB

2.0A

1

+

+

2

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

1

C30 3

C30 3

Date: Sheet

Date: Sheet

Date: Sheet

C26 5

C26 5

2

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Compal Electronics, Inc.

USB conn.

USB conn.

USB conn.

LA-6801P

LA-6801P

LA-6801P

E

1.0

1.0

1.0

26 61Tues day, January 25, 201 1

26 61Tues day, January 25, 201 1

26 61Tues day, January 25, 201 1

of

of

of

5

4

3

2

1

+1.5V_3.0+5VALW

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

1U_0603_ 10V6K~D

1U_0603_ 10V6K~D

CI41

CI41

1

1

2

D D

C C

B B

USB3_SMI#<16>

+3V

A A

10K_0402 _1%~D

10K_0402 _1%~D

RI46

RI46

1 2

SPI_CLK_USB
USB_SO_SPI_SI

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

CI75

CI75

1

2

UI8

UI8

8

VCC

7

NC

6

SCLK

5

SI

MX25L5121EMC-20G_SO8

MX25L5121EMC-20G_SO8

1

CS#

2

SO

3

WP#

4

GND

2





CLK_PCIE_USB30<14>
CLK_PCIE_USB30#<14>

PCIE_PRX_USB3TX_P6<14>

PCIE_PRX_USB3TX_N6<14>

PCIE_PTX_USB3RX_P6<14>
PCIE_PTX_USB3RX_N6<14>

RI38 10K_0402_1%~DRI38 10K_0402_1%~D

1 2

+3V

1

DI3

DI3

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

USB30_CLKREQ#<14>

+3V

2

G

G

@

@

1 3

D

S

D

S

QI3

QI3

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1 2

RI59 0_0402_5%~DRI59 0_0402_5%~D

+3V

10K_0402 _1%~D

10K_0402 _1%~D

47K_0402 _5%

47K_0402 _5%

RI44

RI44

RI45

RI45

1 2

1 2

SPI_CS_USB#

USB_SI_SPI_SO



+5VALW

+1.5V_3.0

CI42

CI42

+5VALW

RI23 5.1K_0402_1%RI23 5. 1K_0402_1%

6
5
9

SYSON

8
7

12

APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8



+3V_3.0 +3V

SYSON

SYSON<31,33,53>

CLK_PCIE_USB30
CLK_PCIE_USB30#

CI67 . 1U_0402_16V7K~DCI67 .1U_0402_16V7K~D
CI68 . 1U_0402_16V7K~DCI68 .1U_0402_16V7K~D

PCIE_PTX_USB3RX_P6
PCIE_PTX_USB3RX_N6

PLT_RST#< 6,16,22,23,31,32>

USB_PCIE_WAKE#<31>

USB3_SMI#_R

1 2

221

CI71

CI71

1U_0603_10V6K~D

1U_0603_10V6K~D

+3V

2

G

G

1 3

D

S

D

S

QI1

QI1

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

+3V

+3V

@ RI57

@

2

G

G

@

@

1 3

D

S

D

S

QI2

QI2

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

+3V

RI58

RI58

@

@

10K_0402_5%~D

10K_0402_5%~D

1 2

USB3_SMI#_R

YI1

YI1

1 2

12P_0402 _50V8J~D

12P_0402 _50V8J~D

24MHZ_12PF_X5H024000DC1H

24MHZ_12PF_X5H024000DC1H

CI39

CI39

1

2

UI6

UI6

VCNTL
VIN
VIN

EN
POK

1

UI7

UI7

3

VIN

4

VIN/CE

2

GND

RT9701-PB_SOT23-5

RT9701-PB_SOT23-5

1 2
1 2

+3V

+3V

+3V

10K_0402_1%~D

10K_0402_1%~D

1 2

CLKREQ_USB3

RI57
10K_0402_5%~D

10K_0402_5%~D

1 2

PCIE_WAKE#_USB3USB_PCIE_WAKE#

USB3_XT2_R

VOUT
VOUT

GND

VOUT
VOUT

RI40

RI40

1A

3
4

RI24

RI24

2

1 2

FB

10K_0402_1%~D

10K_0402_1%~D

12

RI26

RI26

32.4K_0402_1%~D

32.4K_0402_1%~D

1
5

0.2A

PCIE_PRX_USB3TX_C_P6
PCIE_PRX_USB3TX_C_N6

RI29 0_0402_5%~DRI29 0_0402_5%~D

1 2

1 2

RI30 0_0402_5%~DRI30 0_0402_5%~D

PCIE_WAKE#_USB3

RI33 10K_0402_1%~DRI33 10K_0402_1%~D

1 2

RI34 100_0402_1%~D@RI34 100_0402_1%~D@

1 2

RI35 10K_0402_1%~DRI35 10K_0402_1%~D

1 2

RI36 0_0402_5%~D@ RI36 0_0402_5%~D@

1 2

RI37 0_0402_5%~DRI37 0_0402_5%~D

1 2

SPI_CLK_USB
SPI_CS_USB#

RI39 0_0402_5%~DRI39 0_0402_5%~D

USB_SO_SPI_SI
USB_SI_SPI_SO

+3V

0_0402_ 5%~D

0_0402_ 5%~D

12

0_0402_ 5%~D

0_0402_ 5%~D

1 2

USB3_XT1
USB3_XT2

12

RI20

RI20

100_0402_5%

100_0402_5%

12P_0402 _50V8J~D

12P_0402 _50V8J~D

CI40

CI40

1

Place a s close as
possibi le to
UI5.N14 and UI5 .M14

2

CLKREQ_USB3

1 2

RI43

RI43

USB3_XT1

@

@

USB3_XT2

RI48

RI48

+1.05V

1 2

+1.5V

RI21 0_0603_5%~DRI21 0_0603_5%~D

1 2

+1.5VS

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CI64

CI64

1

2

RI22 0_0603_5%~D@RI22 0_0603_5%~D@

+3VALW

B2
B1

D2
D1

F2
F1

H2
K1
K2

J2

J1
H1
P4

P5

M2
N2
N1
M1

K13
K14

J13

C14

N14

M14

P6

A1
A2
A3
A4
A5
A7
A9

A11
A13
A14

B3
B4
B5
B7
B9

B11
B13
B14

C1
C2
C3

C10
C11

1 2

RI25 0_0603_5%~DRI25 0_0603_5%~D

1 2

+3VS

RI27 0_0603_5%~D@RI27 0_0603_5%~D@

+3V

UI5

UI5

D10

F13

F14

VDD33

VDD33

VDD33

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

PECLKP

SPEC Max :+3V---200mA;+1.05V---800mA

PECLKN

Idle mode:0.48 9W:

PETXP
PETXN

+3V---43mA;+1.05V---328mA

D3 mode:0 .066W:

PERXP
PERXN

+3V---5.4mA;+1.05V---45mA

PERSTB
PEWAKEB
PECREQB

AUXDET
PSEL

PCI Express/ExpressCard select signal

SMI

1:others

SMIB

0:Express Card or Mini card

PONRSTB

SPISCK
SPISCB
SPISI
SPISO

GND
GND
GND

+1.05V

L10

L13

VDD33

1 2

L14

VDD33

GND

XT1
XT2

P/N: SA000048H0L (S IC UPD720200AF1-DAP-A FBGA 176P USB3.0)
A version

CSEL

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND

GND

GNDD3GNDD4GND

GND

GND

GND

GNDE1GNDE2GND

GND

GNDF4GNDF6GNDF7GNDF8GNDF9GND

E13

C12

C13

E14

D11

D12

D13

D14

UPD720200AF1DAPA_FBGA176P-NH~D

UPD720200AF1DAPA_FBGA176P-NH~D

 

+1.5V_3.0

+3V_3.0

RI28

RI28

0_0805_5%

0_0805_5%

+3VA + 3VA

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

CI43

CI43

1

1

2

2

+1.05VR

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

Can be attach to EC, either.

As short as possible

8/11 updat e

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

GNDH6GND

GND

GND

F11

F12

GNDH7GNDH8GNDH9GND

G9

G13

G11

G12

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI44

CI44

8P_0402_ 50V8D~D

8P_0402_ 50V8D~D

1

2

E11

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

H12

+1.05VR+3V

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

8P_0402_ 50V8D~D

8P_0402_ 50V8D~D

@

@

CI47

CI47

@

@

CI46

CI46

1

1

1

CI45

CI45

2

E12

VDD10

VDD10H3VDD10H4VDD10L5VDD10

J11

2

H11

GND

GNDK3GNDK4GNDL1GNDL2GNDL3GND

J12

+3VA +3V

K11

K12

L8

VDD10

VDD10

VDD10

2

D7

U3AVDO33

U3TXDP2

U3TXDN2

U2DM2

U2DP2

U3RXDP2

U3RXDN2

OCI2B
OCI1B

PPON2
PPON1

U3TXDP1

U3TXDN1

U2DM1

U2DP1

U3RXDP1

U3RXDN1

U2AVSS

U2PVSS

U3AVSS

L4

RREF

CI48

CI48

P13

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

U2AVDD10

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI50

CI50

CI49

CI49

1

1

2

2

LI1

LI1

BLM18AG601SN1D_2P

BLM18AG601SN1D_2P

1 2

.1U_0402_16V7K~D

.1U_0402_16V7K~D

U3TX_C_DP2

B6

U3TX_C_DN2

A6

U2DN2_L

N8

U2DP2_L

P8

U3RXDP2_L

B8

U3RXDN2_L

A8

OCI2B

RI31 10K_0402_5%~DRI31 10K_0402_5%~D

G14

OCI1B

RI32 10K_0402_5%~DRI32 10K_0402_5%~D

H13

H14
J14

B10

U3TX_C_DN1

A10

U2DN1_L

N10

U2DP1_L

P10

U3RXDP1_L

B12

U3RXDN1_L

A12

RI41

RI41

P12

1 2

N12

N11

D6

P14
P11
P9
P7
P2
P1
N13
N9
N7
N3
M13
M12
M11
M10
M9
M8
M7
M6
M5
M4
M3
L12
L11
L7
L6

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI51

CI51

1

1

2

2

CI66

CI66

1 2

1 2

CI69

CI69

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2
1 2

CI70

CI70

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

1 2

CI72

CI72

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1.6K_0402_1%~D

1.6K_0402_1%~D

+USB3_VCCA

U3TXDP2

U3TXDN2
U2DP2

U2DN2
U3RXDP2

U3RXDN2

+USB3_VCCB

U3TXDP1

U3TXDN1
U2DP1

U2DN1

U3RXDP1

U3RXDN1

+3VA

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI53

CI53

CI52

CI52

1

1

2

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

U3TXDP2_L U3TXDP2

CI65

CI65

1

U3TXDN2_L U3TXDN2 U3TXDP1_L U3TXDP1

2

U3TXDP2_L

U3RXDN2_L U3RXDN2

U3TXDN2_L

U2DP2_L

+3V

U2DN2_L

U3RXDN2
U3RXDP2
U3TXDN2

U3TXDP1_LU3TX_C_DP1

U3TXDP2

U3TXDN1_L

USB_PWR_EN#<31>

JUSB3

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND
D-2GND

6

SSRX+

4

GND

5

SSRX-

SUYIN_020053GR009M2106L

SUYIN_020053GR009M2106L

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND
D-2GND

6

SSRX+

4

GND

5

SSRX-

SUYIN_020053GR009M2106L

SUYIN_020053GR009M2106L

CI54

CI54

For EMI request

3 4

DLW21SN670HQ2L_4P

DLW21SN670HQ2L_4P

3 4

DLW21SN670HQ2L_4P

DLW21SN670HQ2L_4P

3

2



DI1

DI1

1

R-

2

R+

3

T-

4

T+

LXES4XBAA6-027_MSOP8

LXES4XBAA6-027_MSOP8

CI73

CI73

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

CI74

CI74

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

CONN@JUSB3

CONN@

GND
GND
GND

CONN@JUSB2

CONN@

GND
GND
GND

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI55

CI55

1

1

2

2

LI2

LI2

LI4

LI4

LI6

LI6

3

2

WCM-2012-670T_4P

WCM-2012-670T_4P

VCC
GND

D­D+

+5VALW +USB3_VCCA

USB_PWR_EN#

+5VALW

USBGND1

10
11
12
13

USBGND2

10
11
12
13

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI56

CI56

1

2

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

CI58

CI58

CI57

CI57

1

1

2

2

U3TXDN1_L

12

U3RXDP2U3RXDP2_L

12

4

4

1

1

+USB3_VCCA

8
7
6
5

RI49 0_0603_5%~DRI49 0_0603_5%~D

RI50 0_0603_5%~DRI50 0_0603_5%~D

CI77 . 1U_0402_16V7K~DCI77 .1U_0402_16V7K~D

RI51 0_0603_5%~DRI51 0_0603_5%~D

RI52 0_0603_5%~DRI52 0_0603_5%~D

CI78 .1U_0402_16V7K~DCI78 .1U_0402_16V7K~D

U3RXDP1_L U3RXDP1

U2DP2

U2DP1_L

U2DN2

U2DN1_L

U3RXDN1
U3RXDP1

U2DN2

U3TXDN1

U2DP2

2.0A

UI3

UI3

1

GND

OC1#

2

IN

OUT1

3

OUT2

EN1#

4

OC2#

EN2#

TPS2062ADR_SO8~D

TPS2062ADR_SO8~D

2.0A

UI4

UI4

1

GND

OC1#

2

IN

OUT1

3

OUT2

EN1#

4

OC2#

EN2#

TPS2062ADR_SO8~D

TPS2062ADR_SO8~D



1 2

1 2

1 2



1 2

1 2

1 2

CI59

CI59

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI60

CI60

1

1

2

2

For EMI request

LI3

LI3

3 4

DLW21SN670HQ2L_4P

DLW21SN670HQ2L_4P

LI5

LI5

3 4

DLW21SN670HQ2L_4P

DLW21SN670HQ2L_4P

LI7

LI7

3

3

2

2

WCM-2012-670T_4P

WCM-2012-670T_4P



DI2

DI2

1

R-

2

R+

3

T-

4

T+

LXES4XBAA6-027_MSOP8

LXES4XBAA6-027_MSOP8

8
7
6
5

+USB3_VCCB

8
7
6
5

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI62

CI62

CI61

CI61

1

2

VCC
GND

D-

D+

W=60mils

RI42

RI42

10K_0402_5%~D

10K_0402_5%~D

1 2

W=60mils

RI47

RI47

10K_0402_5%~D

10K_0402_5%~D

1 2

+USB3_VCCA

150U_B2_6 .3VM_R35M

150U_B2_6 .3VM_R35M

1

+

+

2

+USB3_VCCB

150U_B2_6 .3VM_R35M

150U_B2_6 .3VM_R35M

1

+

+

2

1

2

4

1

8
7
6
5

CI28

CI28

CI30

CI30

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

CI63

CI63

U3TXDN1

12

U3RXDN1U3RXDN1_L

12

U2DP1

4

U2DN1

1

+USB3_VCCB

U2DN1
U2DP1U3TXDP1

OCI2B

OCI1B

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CI29

CI29

1

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CI31

CI31

1

2

Pin compare table for support USB remote wakeup or not

CSEL(Pin P6)

Tied to GND

pull high
to VDD33

5

Support USB
remote wakeup

Not support USB
remote wakeup

AUXDET(Pin J2)

pull high
10k to VDD33

Tied to GND

CLK

Must use 24MHz crystal: mount
Y1,R19,C40,C41

Can use either 48MHz or 24MHz When
use 48MHz clock: mount R22,R25

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

USB conn.

USB conn.

USB conn.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

1

27 61Tuesday, January 25, 2011

27 61Tuesday, January 25, 2011

27 61Tuesday, January 25, 2011

of

of

of

1.0

1.0

1.0

A

SAT A_ PT X_D RX_P 1_ C<13>
SAT A_ PT X_D RX_N 1_C<13 >

SAT A_ PRX _DT X_N 1< 13>
SAT A_ PRX _DT X_P 1< 13>

1 1

RS13 0_04 02 _5% ~D@RS1 3 0_ 040 2_ 5%~ D@
RS14 0_04 02 _5% ~D@RS1 4 0_ 040 2_ 5%~ D@

RS15 0_04 02 _5% ~D@RS1 5 0_ 040 2_ 5%~ D@
RS16 0_04 02 _5% ~D@RS1 6 0_ 040 2_ 5%~ D@

SAT A_ PRX _DT X_N 1
SAT A_ PRX _DT X_P 1

Free Fall Sensor

FFS_INT1 connec t to PCH GPIO & EC
discuss with BI OS to use which pin

2 2

B

SAT A_ PT X_D RX_P 1_ B

12

SAT A_ PT X_D RX_N 1_B

12

SAT A_ PRX _DT X_N 1_B

12

SAT A_ PRX _DT X_P 1_ B

12

RS18 0_0 402 _5% ~DRS1 8 0_ 040 2_5 %~D

1 2

RS20 5.1K _0 402 _1% ~DRS2 0 5.1 K_0 40 2_1 %~D

1 2

RS23 2.7K _0 402 _5% ~DRS2 3 2.7 K_0 40 2_5 %~D

1 2

CS33 0. 01U _04 02 _16 V7K ~DCS3 3 0.01 U_0 402 _16 V7 K~D

1 2

CS35 0. 01U _04 02 _16 V7K ~DCS3 5 0.01 U_0 402 _16 V7 K~D

1 2

+3V S

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

C190

C190

1

C189

C189

1

2

2

FFS_ INT 1<16>
FFS_ INT 2<17>

PCH_ SM BDA TA<6,11 ,12 ,14 ,32 >

PCH_ SM BCL K<6,1 1,12 ,14 ,32 >

RS33 0_0 40 2_5 %~D@RS3 3 0 _04 02 _5% ~D@
RS31 0_0 40 2_5 %~D@RS3 1 0 _04 02 _5% ~D@

RS30 0_0 40 2_5 %~D@RS3 0 0 _04 02 _5% ~D@
RS32 0_0 40 2_5 %~D@RS3 2 0 _04 02 _5% ~D@

SAT A_ PT X_D RX_P 1_ C
SAT A_ PT X_D RX_N 1_C

SAT A_ PRX _DT X_N 1_C
SAT A_ PRX _DT X_P 1_ C

10U_0805_10V4Z~D

10U_0805_10V4Z~D

FFS_ INT 1
FFS_ INT 2

C

SAT A_ PT X_D RX_P 1_ RC1 +5V S_HD D2

12

SAT A_ PT X_D RX_N 1_R C1

12

SAT A_ PRX _DT X_N 1_R C

12

SAT A_ PRX _DT X_P 1_ RC

12

US2

US2

6

10

DNC

VDD3P3

16

20

DNC

VDD3P3

3

13

A_EN#

B_EN#

A2_ EQ
A2_ EM
A2_ OS B2_ OS

U19

U19

DE351DLTR

DE351DLTR

1

VDD_IO

6

VDD

8

INT 1
INT 29GND

12

SDO

13

SDA / SDI / SDO

14

SCL / SPC

7

CS

DE35 1DL TR _LG A14 _3 X5

DE35 1DL TR _LG A14 _3 X5

17

B_EQ

A_EQ

18

B_EM

A_EM

19

B_OS

A_OS

1

AI+

AO+

2

AI-

AO-

4

BO-

BI-

5

BO+

BI+

21

EP

PI3E QX 670 1ZDE X_ TQ FN20 _4X 4~ D

PI3E QX 670 1ZDE X_ TQ FN20 _4X 4~ D

2

GND

4

GND

5

GND

10

+3V S

3

RSVD

11

RSVD

7
8
9

SAT A_ PT X_D RX_P 1_ RC

15

SAT A_ PT X_D RX_N 1_R C

14

SAT A_ PRX _DT X_N 1_R C

12

SAT A_ PRX _DT X_P 1_ RC

11

B2_ EQ
B2_ EM

+3V S

1

@CS 27

@

2

CS27

0.1U _04 02 _16 V7K ~D

0.1U _04 02 _16 V7K ~D

RS19 0_0 402 _5% ~DRS1 9 0_ 040 2_5 %~D
RS21 5.1K _0 402 _1% ~DRS2 1 5.1 K_0 40 2_1 %~D
RS24 2.7K _0 402 _5% ~DRS2 4 2.7 K_0 40 2_5 %~D

CS30 0.01U _04 02 _16 V7K ~DC S30 0.01U _04 02 _16 V7K ~D

1 2

CS32 0.01U _04 02 _16 V7K ~DC S32 0.01U _04 02 _16 V7K ~D

1 2

D

12
12
12

SAT A_ PT X_D RX_P 1_ RC1
SAT A_ PT X_D RX_N 1_R C1

E

+3V S

1

CS19

CS19

0.1U _04 02 _16 V7K ~D

0.1U _04 02 _16 V7K ~D

2

JHDD

JHDD

21

GND1

22

GND2

23

GND3

24

GND4

FOX_ GS 122 01-1 01 1-9F

FOX_ GS 122 01-1 01 1-9F

CONN@

CONN@

1

2

100 0P_ 04 02_ 50V 7K ~D

100 0P_ 04 02_ 50V 7K ~D

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

FFS_ INT 2_C ONN

18

18

19

19

20

20

0.1U _04 02 _16 V7K ~D

0.1U _04 02 _16 V7K ~D

CS20

CS20

1

CS21

CS21

2

1U_0 40 2_6 .3V 6K~ D

1U_0 40 2_6 .3V 6K~ D

SAT A_ PT X_D RX_P 1_ RC1
SAT A_ PT X_D RX_N 1_R C1

SAT A_ PRX _DT X_N 1_R C1
SAT A_ PRX _DT X_P 1_ RC1

+3V S_V CC3. 3

HDD_D ET ECT #

+5V S_HD D2

F

1

CS22

CS22

2

RS22

RS22

0.02 2_ 080 5_ 1%

0.02 2_ 080 5_ 1%

10U_ 08 05_ 10 V4Z~ D

10U_ 08 05_ 10 V4Z~ D

1

CS23

CS23

2

RS17

RS17

12

0.02 2_ 080 5_ 1%

0.02 2_ 080 5_ 1%

12

0.01 U_0 40 2_1 6V7 K~ D

0.01 U_0 40 2_1 6V7 K~ D

CS26

CS26

CS28

CS28

0.01 U_0 40 2_1 6V7 K~ D

0.01 U_0 40 2_1 6V7 K~ D

+3V S

HDD_D ET ECT # <1 7>

+5V S

SAT A_ PRX _DT X_N 1_R C

12

SAT A_ PRX _DT X_P 1_ RC

12

G

H

+3V S

G

G

2

FFS_ INT 2 FFS_ INT 2_C ONN

13

D

S

D

S

Q23

Q23

SSM 3K 700 2FU_ SC7 0-3 ~D

SSM 3K 700 2FU_ SC7 0-3 ~D

3 3

SAT A_ PT X_D RX_P 2_ RP< 13>
SAT A_ PT X_D RX_N 2_R P<1 3>

A

CS49 0 .01 U_0 40 2_1 6V7 K~ D@CS 49 0. 01U _04 02_ 16 V7K ~D@
CS50 0 .01 U_0 40 2_1 6V7 K~ D@CS 50 0. 01U _04 02_ 16 V7K ~D@

SMT 1-0 5-A _4P

SMT 1-0 5-A _4P

214

@

@

Reserve for test
Zero Power ODD

SAT A_ PRX _DT X_N 2<13>
SAT A_ PRX _DT X_P 2<13>

4 4

SAT A_ PT X_D RX_P 2_ RP
SAT A_ PT X_D RX_N 2_R P

+3V S

10K_0402_5%~D

10K_0402_5%~D

@

@

RS51

RS51

0_0402_5%~D

0_0402_5%~D

RS53

RS53

ODD_ DA# _R

SAT A_ PRX _DT X_N 2_R P
SAT A_ PRX _DT X_P 2_ RP

HDD_E Q1

10K_0402_5%~D

10K_0402_5%~D

HDD_E Q2

12

@

@

RS52

RS52

0_0402_5%~D

0_0402_5%~D

12

RS54

RS54

@

@

+5V S +5 VS _OD D

B

12
12

12

12

@

@

SW4

SW4

3

5

6

+5V S

21

D24

D24

SDM 10U 45-7 _SO D52 3-2 ~D

SDM 10U 45-7 _SO D52 3-2 ~D

US3

US3

7

VCC6EN

18

VCC10CAD
VCC

1

AINP

VCC

2

AINM

PA

4

PB

BOUTM

5

BOUTP

AOUTP

3

AOUTM

GND

13

GND

17

BINP

GND

19

GND

BINM

21

EP

MAX 49 51B ECT P+ TG H7_T QF N20 _4X 4~D

MAX 49 51B ECT P+ TG H7_T QF N20 _4X 4~D

@

@

SAT A_ PT X_D RX_P 2_ RP
SAT A_ PT X_D RX_N 2_R P

SAT A_ PRX _DT X_N 2
SAT A_ PRX _DT X_P 2

RS34

RS34

1 2

0_1 206 _5 %~D

0_1 206 _5 %~D

12

R159

@R1 59

@

100 K_0 40 2_5 %~D

100 K_0 40 2_5 %~D

+3V S

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

@

@

@

@

CS47

CS47

2

HDD_D EW2

HDD_D EW1

16
20

HDD_P E1

9

HDD_P E2

8

SAT A_ PT X_D RX_P 2_ P

15

SAT A_ PT X_D RX_N 2_P

14

SAT A_ PRX _DT X_P 2_ P

11

SAT A_ PRX _DT X_N 2_P

12

RS35 0_04 02 _5% ~DR S35 0_04 02_ 5% ~D

12

RS37 0_04 02 _5% ~DR S37 0_04 02_ 5% ~D

12

RS39 0_04 02 _5% ~DR S39 0_04 02_ 5% ~D

12

RS41 0_04 02 _5% ~DR S41 0_04 02_ 5% ~D

12

1U_0 40 2_6 .3V 6K~ D

1U_0 40 2_6 .3V 6K~ D

B+_ BIAS

1 2

13

D

D

2

ODD_ EN#< 17>

G

G

S

S

C

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

CS48

CS48

2

SAT A_ PT X_D RX_P 2_ B
SAT A_ PT X_D RX_N 2_B

SAT A_ PRX _DT X_N 2_B
SAT A_ PRX _DT X_P 2_ B

+5V S

1

CS41

CS41

2

RS26

RS26
470 K_0 40 2_5 %~D

470 K_0 40 2_5 %~D

ODD_ EN

QS2

QS2
SSM 3K 700 2FU_ SC7 0-3

SSM 3K 700 2FU_ SC7 0-3

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

12

12

RS43

RS43

RS44

RS44

@

@

@

@

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

12

12

@

@

@

@

RS48

RS48

RS47

RS47

RS36 0_04 02 _5% ~DR S36 0_04 02_ 5% ~D
RS38 0_04 02 _5% ~DR S38 0_04 02_ 5% ~D

RS40 0_04 02 _5% ~DR S40 0_04 02_ 5% ~D
RS42 0_04 02 _5% ~DR S42 0_04 02_ 5% ~D

QS1

QS1

D

D

6

2
1

G

G

RS27

RS27

D

+3V S

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

@

@

@

@

RS46

RS46

RS45

RS45

1 2

1 2

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

12

12

@

@

@

@

RS50

RS50

RS49

RS49

12
12

12
12

S

S

+5V S_O DD_R

45

SI34 56 BDV -T1 -E3 1 N T SO P6

SI34 56 BDV -T1 -E3 1 N T SO P6

3

1

CS46

CS46

2

1 2

1.5M_0402_5%~D

1.5M_0402_5%~D

MAXIM TI

main 2nd

P/N

RS43 RS44

SA00003LH1L SA00003ZX0 L

pop depop

RS47 RS48 popdepop

RS53 RS54 pop depop

SAT A_ PT X_D RX_P 2_ C
SAT A_ PT X_D RX_N 2_C

SAT A_ PRX _DT X_N 2_P
SAT A_ PRX _DT X_P 2_ P

+5V S_O DD

RS25

RS25

@

@

1 2

0_1 206 _5 %~D

0_1 206 _5 %~D

Securi ty Class ificatio n

Securi ty Class ificatio n

Securi ty Class ificatio n

Issued Dat e

Issued Dat e

Issued Dat e

0.1U_0402_25V6

0.1U_0402_25V6

THIS SHEE T OF ENGINEERING DRA WING IS THE PROPRIE TARY PR OPERTY OF COMPA L ELECTRONICS , INC. AND CONTA INS CONFIDENTIAL

THIS SHEE T OF ENGINEERING DRA WING IS THE PROPRIE TARY PR OPERTY OF COMPA L ELECTRONICS , INC. AND CONTA INS CONFIDENTIAL

THIS SHEE T OF ENGINEERING DRA WING IS THE PROPRIE TARY PR OPERTY OF COMPA L ELECTRONICS , INC. AND CONTA INS CONFIDENTIAL
AND TRADE S ECRET INFORMA TION. THIS SHEE T MAY NOT B E TRANSFE RED FROM THE CUS TODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE S ECRET INFORMA TION. THIS SHEE T MAY NOT B E TRANSFE RED FROM THE CUS TODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE S ECRET INFORMA TION. THIS SHEE T MAY NOT B E TRANSFE RED FROM THE CUS TODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONIC S, INC . NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONIC S, INC . NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONIC S, INC . NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011 /01/25 201 2/01/25

2011 /01/25 201 2/01/25

2011 /01/25 201 2/01/25

E

SAT A_ PT X_D RX_P 2_ P
SAT A_ PT X_D RX_N 2_P

SAT A_ PRX _DT X_N 2_P
SAT A_ PRX _DT X_P 2_ P

ODD_ DET ECT #< 17>

ODD_ DA#<16>

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

F

+5V S_O DD

@

@

CS51 0 .01 U_0 40 2_1 6V7 K~D

CS51 0 .01 U_0 40 2_1 6V7 K~D

12

CS52 0 .01 U_0 40 2_1 6V7 K~D@CS5 2 0.0 1U_ 040 2_1 6V 7K~ D@

12

CS44 0 .01 U_0 40 2_1 6V7 K~D CS4 4 0.0 1U_ 040 2_ 16V 7K~ D

1 2

CS45 0 .01 U_0 40 2_1 6V7 K~D CS4 5 0.0 1U_ 040 2_ 16V 7K~ D

1 2

RS28 0_ 04 02_ 5% ~DR S28 0_ 04 02_ 5%~ D

1 2

0_0 402 _5 %~D

0_0 402 _5 %~D

1 2

RS29

RS29

Placea caps . near ODD CONN.

+5V S_O DD

1

2

100 0P_ 04 02_ 50V 7K ~D

100 0P_ 04 02_ 50V 7K ~D

0.1U _04 02 _16 V7K ~D

0.1U _04 02 _16 V7K ~D

CS37

CS37

1

CS38

CS38

2

1

CS39

CS39

2

1U_0 40 2_6 .3V 6K~ D

1U_0 40 2_6 .3V 6K~ D

10U_ 08 05_ 10 V4Z~ D

10U_ 08 05_ 10 V4Z~ D

1

2

SATA ODD Conn .

JODD1

JODD1

SAT A_ PT X_D RX_P 2_ C
SAT A_ PT X_D RX_N 2_C

SAT A_ PRX _DT X_N 2_C
SAT A_ PRX _DT X_P 2_ C

ODD_ DET ECT #_ R

+5V S_O DD

ODD_ DA# _R

Title

Title

Title

Size D ocu men t Nu mb er Rev

Size D ocu men t Nu mb er Rev

Size D ocu men t Nu mb er Rev

Date :

Date :

Date :

G

272728
252526
232324
212122
191920
171718
151516
131314
111112

9

9

10

7

7

8

5

5

6

3

3

4

1

1

2

E-T_ 69 00-Q 14 N-00R

E-T_ 69 00-Q 14 N-00R

CONN@

CONN@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FFS /HDD/ ODD Connector

FFS /HDD/ ODD Connector

FFS /HDD/ ODD Connector

LA-6801P

LA-6801P

LA-6801P

CS40

CS40

28
26
24
22
20
18
16
14
12
10
8
6
4
2

Sheet

Sheet

Sheet

28 61Tu esday , Ja nua ry 2 5, 2 011

28 61Tu esday , Ja nua ry 2 5, 2 011

28 61Tu esday , Ja nua ry 2 5, 2 011

of

of

of

H

1.0

1.0

1.0

A

B

C

D

E

ON/OFF switch

TOP Side

SW6

1 1

2 2

3 3

4 4

SMT1-05-A_4P

SMT1-05-A_4P

1

2

6

Bottom Side

SMT1-05-A_4P

SMT1-05-A_4P

1

2

6

@

@

Test Onl y

FD1

FD1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

H63

H63

H_1P9N

H_1P9N

H39

H39

H_3P3

H_3P3

H32

H32

H_3P8

H_3P8

H46

H46

H_3P0

H_3P0

1

SW6

5

SW5

SW5

5

1

1

1

1

@

@

@

@

@

@

@

@

H_3P3

H_3P3

@

@

H_3P8

H_3P8

@

@

H_2P7

H_2P7

H48

H48

H_3P0

H_3P0

3

4

3

4

H64

H64

H_3P9x1P9N

H_3P9x1P9N

H40

H40

@

@

1

H33

H33

@

@

1

H42

H42

@

@

1

H_3P0

H_3P0

@

@

1

FD2

FD2

FIDUCIAL_C40M80

FIDUCIAL_C40M80

@

@

1

H58

H58

H_3P3

H_3P3

@

@

1

H34

H34

H_3P8

H_3P8

@

@

1

H43

H43

H_2P7

H_2P7

@

@

1

H49

H49

H_3P0

H_3P0

@

@

1

A

Power Button

ON/OFFBTN#

1

C326

C326

0.1U_0402_25V6

0.1U_0402_25V6

2

ON/OFFBTN# <35>

EC_ON<31,52>

@

@

1

FIDUCIAL_C40M80

FIDUCIAL_C40M80

H60

H60

H59

H59

H_3P3

H_3P3

H_3P3

H_3P3

@

@

1

1

H36

H36

H35

H35

H_3P8

H_3P8

H_3P8

H_3P8

@

@

1

1

H45

H45

H_2P7

H_2P7

1

H51

H51

H_2P7

H_2P7

@

@

1

H44

H44

H50

H50

H_3P0

H_3P0

@

@

@

@

1

1

H_3P3

H_3P3

@

@

H_3P8

H_3P8

@

@

@

@

H41

H41

H_3P0

H_3P0

FD3

FD3

H61

H61

H37

H37

1

1

1

1

@

@

EC_ON

@

@

@

@

@

@

2

3

D28

D28

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

1

R264

R264

10K_0402_5%~D

10K_0402_5%~D

FIDUCIAL_C40M80

FIDUCIAL_C40M80

H38

H38

H_3P8

H_3P8

@

@

1

H47

H47

H_2P7

H_2P7

@

@

1

1 2

FD4

FD4

1

ZZZ1

ZZZ1

PCB-MB

PCB-MB

@

@

D27

D27

2

1

DAN202UT106_SC70-3

DAN202UT106_SC70-3

3

2

G

G

ZZZ

ZZZ

PCBA-DMC/B

PCBA-DMC/B

45@

45@

B

+3VALW

R263

R263

100K_0402_5%~D

100K_0402_5%~D

1 2

13

D

D

Q24

Q24

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

CLIP1

CLIP1
EMI_CLIP

EMI_CLIP

CLIP2

CLIP2
EMI_CLIP

EMI_CLIP

CLIP3

CLIP3
EMI_CLIP

EMI_CLIP

GND

GND

GND

@

@

@

@

@

@

C1918 100P_0402_50V8J~D

C1918 100P_0402_50V8J~D

1 2

KSO15

KSO14

KSO13

KSO12

ON/OFF <31>

51ON# <50>

KSI[0..7]

KSO[0..16]

1

1

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KSI[0..7] <31>

KSO[0..16] <31>

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

C

KSI0

KSO11

KSO10

KSI1

KSI2

KSO9

KSI3

KSO8

KB_DET#< 14>

Compal Sec ret Data

Compal Sec ret Data

Compal Sec ret Data

C306 100P_0402_50V8J~D

C306 100P_0402_50V8J~D

1 2

C304 100P_0402_50V8J~D

C304 100P_0402_50V8J~D

1 2

C312 100P_0402_50V8J~D

C312 100P_0402_50V8J~D

1 2

C308 100P_0402_50V8J~D

C308 100P_0402_50V8J~D

1 2

C328 100P_0402_50V8J~D

C328 100P_0402_50V8J~D

1 2

C327 100P_0402_50V8J~D

C327 100P_0402_50V8J~D

1 2

C314 100P_0402_50V8J~D

C314 100P_0402_50V8J~D

1 2

C316 100P_0402_50V8J~D

C316 100P_0402_50V8J~D

1 2

C318 100P_0402_50V8J~D

C318 100P_0402_50V8J~D

1 2

C320 100P_0402_50V8J~D

C320 100P_0402_50V8J~D

1 2

C322 100P_0402_50V8J~D

C322 100P_0402_50V8J~D

1 2

C324 100P_0402_50V8J~D

C324 100P_0402_50V8J~D

1 2

KB detect pin

KB_DET#

Deciphere d Date

Deciphere d Date

Deciphere d Date

KB_DET#KSO16

KSO7

KSO6

KSO5

KSO4

KSO3

KSI4

KSO2

KSO1

KSO0

KSI5

KSI6

KSI7

C434 100P_0402_50V8J~D

C434 100P_0402_50V8J~D

1 2

C310 100P_0402_50V8J~D

C310 100P_0402_50V8J~D

1 2

C305 100P_0402_50V8J~D

C305 100P_0402_50V8J~D

1 2

C307 100P_0402_50V8J~D

C307 100P_0402_50V8J~D

1 2

C309 100P_0402_50V8J~D

C309 100P_0402_50V8J~D

1 2

C311 100P_0402_50V8J~D

C311 100P_0402_50V8J~D

1 2

C313 100P_0402_50V8J~D

C313 100P_0402_50V8J~D

1 2

C315 100P_0402_50V8J~D

C315 100P_0402_50V8J~D

1 2

C317 100P_0402_50V8J~D

C317 100P_0402_50V8J~D

1 2

C319 100P_0402_50V8J~D

C319 100P_0402_50V8J~D

1 2

C321 100P_0402_50V8J~D

C321 100P_0402_50V8J~D

1 2

C323 100P_0402_50V8J~D

C323 100P_0402_50V8J~D

1 2

C325 100P_0402_50V8J~D

C325 100P_0402_50V8J~D

1 2

INT_KBD Conn.

CONN@

CONN@

TYCO_3-2041084-0

TYCO_3-2041084-0

30

KSO10
KSO11
KSO9
KSO14
KSO13
KSO15
KSO16
KSO12
KSO0
KSO2
KSO1
KSO3
KSO8
KSO6
KSO7
KSO4
KSO5
KSI0
KSI3
KSI1
KSI5
KSI2
KSI4
KSI6
KSI7

D

30

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

JKB

JKB

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

32

GND

31

GND

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PWRBTN/SCREWH/KB

PWRBTN/SCREWH/KB

PWRBTN/SCREWH/KB

LA-6801P

LA-6801P

LA-6801P

1.0

1.0

29 61Tuesday, January 25, 2011

29 61Tuesday, January 25, 2011

29 61Tuesday, January 25, 2011

E

1.0

of

of

of

5

4

3

2

1

System Thermal Sensor 1

D D

C

C

1

C1814

@C18 14

@

100P_0402_50V 8J~D

100P_0402_50V 8J~D

C C

100P_0402_50V 8J~D

100P_0402_50V 8J~D

C1871

@C18 71

@

2

1

2

2

B

B

E

E

Q283

Q283

3 1

MMBT3904WT1G_SC70-3~D

MMBT3904WT1G_SC70-3~D

C

C

2

B

B

E

E

Q279

Q279

3 1

MMBT3904WT1G_SC70-3~D

MMBT3904WT1G_SC70-3~D



 !"#

MAINPWON<52,59>

MAINPWON<52,59>

REMOTE_P1SENSOR_DIODE_P1

1

C1815

C1815
470P_0402_50V 7K

470P_0402_50V 7K

2

+3VS

REMOTE_P2SENSOR_DIODE_P2

1

C1873

C1873
470P_0402_50V 7K

470P_0402_50V 7K

2

+3VS

+3VS

R1796 0 _0402_5%~DR1796 0_0402_5%~D

1 2

SENSOR_DIODE_N1 REMOTE_N1


$%%
&!"&'

SENSOR_DIODE_N2 REMOTE_N2

R1797 0 _0402_5%~DR1797 0_0402_5%~D

1 2

R1851 0 _0402_5%~DR1851 0_0402_5%~D

1 2

R1853 0 _0402_5%~DR1853 0_0402_5%~D

1 2

+3VS

1

2

C1816

C1816

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

R1798 4.7K_0402_1%~DR1798 4.7K_0402_1%~D

D

S

D

S

1 3

Q303

@

Q303

@

SSM3K7002FU_SC 70-3~D

SSM3K7002FU_SC 70-3~D

G

G

2

+3VS

System Thermal Sensor 2

+3VS

1

2

C1872

C1872

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

R1856 6.8K_0402_1%~DR1856 6.8K_0402_1%~D

D

S

D

S

1 3

Q304

@

Q304

@

SSM3K7002FU_SC 70-3~D

SSM3K7002FU_SC 70-3~D

G

G

2

U615

U615

1

VDD

2

DP

3

DN

THERM#/ADDR4GND

EMC1412-A-ACZL-TR_MSOP8

EMC1412-A-ACZL-TR_MSOP8

U627

U627

1

VDD

2

DP

3

DN

THERM#/ADDR4GND

EMC1412-A-ACZL-TR_MSOP8

EMC1412-A-ACZL-TR_MSOP8

SMCLK

SMDATA

ALERT

SMCLK

SMDATA

ALERT

8

7

6

5

8

7

6

5

EC_SMB_CK 2

EC_SMB_DA 2

EC_SMB_CK 2

EC_SMB_DA 2

EC_SMB_CK 2 <31,45,58>

EC_SMB_DA 2 <31,45,58>

SYSTEM_FAN_PWM<31>

SYSTEM_FAN_FB<31>

EC_SMB_CK 2 <31,45,58>

EC_SMB_DA 2 <31,45,58>

SYSTEM_FAN_PWM
SYSTEM_FAN_FB

+3VS

10K_0402_5%~D

10K_0402_5%~D

R1801

R1801

R1800

R1800

1 2

1 2

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

2 1

D65

D65
CH751H-40PT_SOD323-2~D

CH751H-40PT_SOD323-2~D

R1802

R1802

+5VS

+5VS_FAN

1 2

R2018

R2018
0_0805_5%~D

0_0805_5%~D

1 2

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

12

C1923

C1923

JFAN1

JFAN1

1

1

2

2

3

3

G5

4

4

G6

MOLEX_53398-0471

MOLEX_53398-0471

CONN@

CONN@

5
6

B B

A A

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

FAN Controller

FAN Controller

FAN Controller

LA-6801P

LA-6801P

LA-6801P

1

1.0

1.0

1.0

of

of

of

30 61Tuesday, January 25, 2011

30 61Tuesday, January 25, 2011

30 61Tuesday, January 25, 2011

5

4

3

2

1

+3VALW

1 2

R216

+3VS

1 2

R217 10K_0402_5%~DR217 10K_0402_5%~D

1 2

R218 10K_0402_5%~D

R218 10K_0402_5%~D

D D

+3VALW

C C

+3VS

1 2

R244 2.2K_0402_5%~D R244 2.2K_0402_5%~D

1 2

B B

R247 2.2K_0402_5%~D R247 2.2K_0402_5%~D

VR_HOT#<50,57>

1 2

R1943 10K_0402_5%~DR1943 10K_0402_5%~D

C284

C284

22P_0402_50V8J~D@

22P_0402_50V8J~D@

CLK_PCI_LPC< 16>

R221 47K_0402_5%

R221 47K_0402_5%

+3VALW

C285 0.1U_0402_16V7K~D

C285 0.1U_0402_16V7K~D

EC_SMB_CK1

1 2

R229 2.2K_0402_5%~D R229 2.2K_0402_5%~D

R230 2.2K_0402_5%~D R230 2.2K_0402_5%~D

R231 47K_0402_5%

R231 47K_0402_5%

R232 47K_0402_5%

R232 47K_0402_5%

10/1 EN E Recomm and

R238 10K_0402_5%~D

R238 10K_0402_5%~D

R239 1K_0402_1%~D

R239 1K_0402_1%~D

R241 10K_0402_5%~D

R241 10K_0402_5%~D

R242 4.7K_0402_5%~D

R242 4.7K_0402_5%~D

R243 4.7K_0402_5%~D

R243 4.7K_0402_5%~D

R1952 10K_0402_5%~DR1952 10K_0402_5%~D

R2019 10K_0402_5%~D

R2019 10K_0402_5%~D

1 2

1 2

1 2

@

@

1 2

@

@

1 2

@

@

1 2

1 2

1 2

1 2

@

@

1 2

EC_SMB_DA1

KSO1

KSO2

EC_MUTE

EC_SMI#

SPK_MUTE#

EC_ESB_CLK

EC_ESB_DAT

LID_SW_IN#

PCIE_WAKE#_R

EC_SMB_CK2

EC_SMB_DA2

R265

R265
0_0402_5%~D

0_0402_5%~D

12

1 2

H_PROCHOT#<6>

A A

H_PROCHOT# H_PROCHOT#_EC

SN74LVC1G06DCKR_SC70-5

SN74LVC1G06DCKR_SC70-5

1

2

C1944

C1944
47P_0402_50V

47P_0402_50V

5

Y4A

BKOFF#

EC_SCI#

M_THERMAL#

R226 33_0402_5%@R226 33_0402_5%@

12

12

EC_SMB_CK2 < 30,45,58>

+3VS

1

2

5

U635

U635

P

2

G3NC

1

R216
0_0805_5%~D

0_0805_5%~D

12

PCH_SMLCLK< 14,51>
PCH_SMLDATA<14,51>

PM_SLP_S3#<15,34>
PM_SLP_S5#<15,34>

EC_ESB_CLK

EC_SMB_DA2 < 30,45,58>

SUSCLK_R<15>

C1943

C1943

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

R1999

R1999
100K_0402_5%~D

100K_0402_5%~D

1 2

C297

C297

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1 2

R258 0_0402_5%~DR258 0_0402_5%~D

1 2

R259 0_0402_5%~DR259 0_0402_5%~D

1 2

R260 0_0402_5%~DR260 0_0402_5%~D

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

C277

C277

2

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

GATEA20< 17>

KB_RST#<17>

SERIRQ<13>

LPC_FRAME#<13>

LPC_AD3<13>
LPC_AD2<13>
LPC_AD1<13>
LPC_AD0<13>

PLT_RST#< 6,16,22,23,27,32>

EC_SCI#<17>
EN_CAM<21>

PCH_DPWROK<15>

EC_SMB_CK1<59>
EC_SMB_DA1<59>

R245 0_0402_5%~DR245 0_0402_5%~D

1 2

R246 0_0402_5%~DR246 0_0402_5%~D

1 2

R249 0_0402_5%~DR249 0_0402_5%~D

1 2

R250 0_0402_5%~DR250 0_0402_5%~D

1 2

EC_SMI#<17>

PS_ID<50>

R252 0_0402_5%~DR252 0_0402_5%~D

1 2

SUSWARN#<15>

EC_INV_PWM<21>

SYSTEM_FAN_FB< 30>

PCH_PWR_EN<33>

EC_TX<32>
EC_RX<32>

ON/OFF<29>

SUSACK#<15>

USB_PWR_EN#<27>

1 2

R253 0_0402_5%~DR253 0_0402_5%~D

100K_0402_5%~D

100K_0402_5%~D

+3VALW

20mils

1

2

SPI_FSEL#FSEL#

SPI_CLK_RSPI_CLK

1

C276

C276

2

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

R1979

R1979

SPI ROM

8

3

7

1

6

5

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

1

C279

C279

C278

C278

2

2

1000P_0402_50V7K~D

1000P_0402_50V7K~D

GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_LPC
PLT_RST#
EC_RST#
EC_SCI#
EN_CAM

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16

PCH_DPWROK

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#_R
PM_SLP_S5#_R
EC_SMI#
PS_ID
EC_ESB_CLK_R
EC_ESB_DAT
SUSWARN#

SYSTEM_FAN_FB
PCH_PWR_EN
EC_TX
EC_RX
ON/OFF
SUSACK#
USB_PWR_EN#

EC_CRY1
EC_CRY2

1

C1947

C1947
20P_0402_50V8J~D

20P_0402_50V8J~D

2

1 2

256KB

U36

U36

4

VCC

VSS

W

HOLD

S

C

2

Q

D

MX25L1005AMC-12G SOP 8P

MX25L1005AMC-12G SOP 8P

4

2

2

C280

C280

1

1

U34

U34

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

SPI_CLK_R

Reserve for EMI please close to U36

1 2

R261 0_0402_5%~DR261 0_0402_5%~D

L43

L43
FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

+3VALW_EC

C281

C281

1000P_0402_50V7K~D

1000P_0402_50V7K~D

9

LPC & MISC

LPC & MISC

PS2 Interface

PS2 Interface

Int. K/B

Int. K/B
Matrix

Matrix

SM Bus

SM Bus

EC test PSID

SP07000F500 S SOCKET WIESON G6179-100000 8P
SPIFLASH
WIESO_G6179-100000_8P

33_0402_5%

33_0402_5%

FRD#SPI_SOSPI_FWR#FWR#

1 2

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

VCC

PWM Output

PWM Output

AD Input

AD Input

DA Output

DA Output

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

GPIO

GPIO

GND

GND

GND

GND

GND

11

24

35

94

113

@

@

R257

R257

12

22P_0402_50V8J~D

22P_0402_50V8J~D

+EC_VCCA

1

2

ECAGND

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/F ANPWM2/GPIO13

BATT_TEMP/AD0 /GPIO38

BATT_OVP/AD1 /GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B
AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D

TP_CLK/PSCLK3 /GPIO4E

TP_DATA/PSDAT 3/GPIO4F

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/G PIO52

CAPS_LED#/GPIO53

BATT_LOW _LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

GPO

BKOFF#/G PXO08

WL_OFF #/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPI

GPI

AGND

KB930QF A1 LQFP 128P

KB930QF A1 LQFP 128P

69

20mil

ECAGND

FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

@

@

C296

C296

1 2

SPICS#

GPXO10
GPXO11

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

L44

L44

C282

C282

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

21
23
26
27

63
64
65
66
75
76

68
70
71
72

83
84
85
86
87
88

97
98
99
109

119
120
126
128

73
74
89
90
91
92
93
95
121
127

100
101
102
103
104
105
106
107
108

110
112
114
115
116
117
118

124

V18R

12

KSI[0..7]

KSO[0..16]

BEEP#
SYSTEM_FAN_PWM
ACOFF

BATT_TEMP
PM_SLP_SUS#
ADP_I
AD_BID0

IMON

AC_SEL
IREF
CHGVADJ

EC_MUTE_R
PWRSHARE_EN_EC#
AC_PRESENT
H_PROCHOT#_EC
TP_CLK
TP_DATA

VGATE
EN_WOL#
HDA_SDO
LID_SW_IN#

R234 33_0402_5%

R234 33_0402_5%

R_SPI_CLK

R237 33_0402_5%

R237 33_0402_5%

PCH_VREG_EN#
EC_PECI
FSTCHG
BATT_CHG_LED#
CAPS_LED#
BATT_LOW_LED#
EN_INVPWR
SYSON
VR_ON
ACIN

PCH_RSMRST#
EC_LID_OUT#
EC_ON

PCH_PWROK
BKOFF#
CPU1.5V_S3_GATE
PCH_APWROK
SA_PGOOD

PM_SLP_S4#
ENBKL
EC_EAPD#
M_THERMAL#
SUSP#
PBTN_OUT#
PCIE_WAKE#_R

+V18R

3

KSI[0..7] <29>

KSO[0..16] <29>

BEEP# <24>

SYSTEM_FAN_PWM < 30>

ACOFF <50,51>

PM_SLP_SUS# <15>
ADP_I <50,51>

IMON <57>

AC_SEL <50>
IREF <51>
CHGVADJ <51>

R228 0_0402_5%~DR228 0_0402_5%~D

12

PWRSHARE_EN_EC# < 26>
AC_PRESENT <15>

TP_CLK < 35>
TP_DATA <35>

VGATE <6,15,57>

EN_WOL# <22>
HDA_SDO < 13>
LID_SW_IN# <14,34,35>

1 2

R236 33_0402_5%

R236 33_0402_5%

1 2

1 2

PCH_VREG_EN# <19>

FSTCHG <51>
BATT_CHG_LED# <34>
CAPS_LED# <35>
BATT_LOW_LED# <34>
EN_INVPWR <21>
SYSON <27,33,53>
VR_ON <57>
ACIN <34,51>

12

C550 100P_0402_50V8J~D

C550 100P_0402_50V8J~D

1

C293

C293

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

2

Security Classification

Security Classification

Security Classification

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

1 2

R1944 0_0402_5%~DR1944 0_0402_5%~D

1 2

R2020 0_0402_5%~DR2020 0_0402_5%~D

Issued Date

Issued Date

Issued Date

PCH_RSMRST# <15>
EC_LID_OUT# <14>
EC_ON <29,52>

PCH_PWROK <6,15>
BKOFF# <21>
CPU1.5V_S3_GATE <10>
PCH_APWROK <15>

SA_PGOOD < 55>

PM_SLP_S4# <15>
ENBKL <15>

EC_EAPD# < 24>

SUSP# <10,18,33,53,54>
PBTN_OUT# <6,15>

ECAGND

12

C286 100P_0402_50V8J~D

C286 100P_0402_50V8J~D

BATT_TEMP <59>

SPK_MUTE#

13

D

D

SSM3K7002F_SC59-3

2

G

G

S

S

CP_SEL<51>

DRAMRST_CNTRL_EC< 7>

VGA_LVDDEN< 15,21>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SSM3K7002F_SC59-3
Q21

Q21

H_PECI <6,17>

EC_ESB_CLK

RST#

EC_ESB_DAT

Dyn_Turbo_Sel

2

EC_MUTE

FRD#
FWR#
SPI_CLK
FSEL#

1 2

R240 43_0402_1%

R240 43_0402_1%

Please place R240 close
to EC with in 750mil

PCIE_WAKE# <15,22,32>

USB_PCIE_WAKE# <27>

CPU_SEL<57>

EMC_ALERT#<51>

Dyn_Turbo_Sel<50>

+3VALW

12

R248

R248
47K_0402_5%

47K_0402_5%

RST#

2

C292

C292

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Board ID

TP_CLK

TP_DATA

SPK_MUTE# <25>

U620

U620

1

ESB_CLK

2

GPIO00

3

RST#

4

ESB_DAT

5

GPIO01

6

GPIO02

7

GPIO03

8

GPIO04

9

GPIO05

10

GPIO06

11

GPIO07/CAS_CLK

12

GND

KC3810_QFN24_4X4

KC3810_QFN24_4X4

@

@

C287

C287

27P_0402_50V8J~D

27P_0402_50V8J~D

EC_MUTE

R_SPI_CLK

EC_ESB_CLK_R

Reserve for RF please c lose to U34

+3VALW

R219

R219
100K_0402_5%~D

100K_0402_5%~D

Ra

1 2

AD_BID0

1

C283

C283

R225

R225

Rb

56K_0402_5%

56K_0402_5%

1 2

Analog Board ID definition,
Please see page 4.

EC_CRY1

1

2

@

@

X1

X1

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

1 2

CH100

CH100

@

@

10P_0402_50V8J~D

10P_0402_50V8J~D
CH101

CH101

@

@

10P_0402_50V8J~D

10P_0402_50V8J~D

TEST_EN#

GPIO08/CAS_DAT

GPIO0C/PWM0

GPIO0D/PWM1

GPIO0E/PWM2

GPIO0F/PWM3

GPIO10/ESB_RUN#

GPIO11/BaseAdd Opt

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

2

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

+5VS

12

R2234.7K_0402_5%~D R2234.7K_0402_5%~D

12

R2244.7K_0402_5%~D R2244.7K_0402_5%~D

EC_CRY2

1

C288

C288

1

27P_0402_50V8J~D

27P_0402_50V8J~D

2

@

@

OSC4OSC

NC3NC

2

R233 10K_0402_5%~DR233 10K_0402_5%~D

12

12

13

14

15

GPIO09

16

GPIO0A

17

GPIO0B

18

19

20

21

22

23

24

VCC

GND

25

EC ENE-KB930/ ENE3810

EC ENE-KB930/ ENE3810

EC ENE-KB930/ ENE3810

LA-6801P

LA-6801P

LA-6801P

EC_ENVDD <21>

PWRSHARE_OE#

EN_TPLED# <35>

60 mil

+3VALW

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

C294

C294

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

PWRSHARE_OE# <26>

WLES ON/OFF LED# <35>

LCD_TEST <21>

3V_F347_ON <34>

31 61Tuesday, January 25, 2011

31 61Tuesday, January 25, 2011

31 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of

A

B

C

D

E

BlueTooth

+3VS

@

@

CU1

CU1

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

BT_ON#

1 1

BT_ON#<17>

1 2

RU1 10K_0402_5%~DRU1 10K_0402_5%~D

CU3

CU3

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

To DMC PCB connector

2 2

PCIE_WAKE#<15,22,31>

PCIE_PRX_WLANTX_N1<14>
PCIE_PRX_WLANTX_P1<14>

PCIE_PTX_WLANRX_N1<14>

PCIE_PTX_WLANRX_P1<14>

DMC_DAT_AUXN_CONN<37>
DMC_CLK_AUXP_CONN<37>

DP_DMC_ML2N_RCC< 37>
DP_DMC_ML2P_RCC<37>

DP_DMC_ML0N_RCC< 37>
DP_DMC_ML0P_RCC<37>

3 3

PCIE_WAKE#
COEX2
COEX1

WL_OFF#<16>

MINI1CLK_REQ#< 14>

CLK_PCIE_MINI1#<14>

CLK_PCIE_MINI1<14>

BT_RADIO_DIS#

EC_TX<31>
EC_RX<31>

DMC_DET#<37>

MINI2CLK_REQ#< 14>

330U_D2E_6.3VM_R25~D

330U_D2E_6.3VM_R25~D

WL_OFF#

DMC_DET#

DMC_DAT_AUXN_CONN
DMC_CLK_AUXP_CONN

DP_DMC_ML2N_RCC
DP_DMC_ML2P_RCC

DP_DMC_ML0N_RCC
DP_DMC_ML0P_RCC

+3VS

1

1

+

+

C1946

C1946

@ C1924

@

2

2

Reserve for RF please
close t o JWDB1

C1924
47P_0402_50V

47P_0402_50V

JWDB1

JWDB1

82

G2

80

Reserved

78

Reserved

76

Reserved

74

Reserved

72

VPP_Test

70

SDIO_PWR#_BLT

68

SDIO_RST#_BLT

66

SDIO_CMD_BLT

64

VSS

62

SDIO_CLK_BLT

60

VSS

58

Ser_TX

56

Ser_RX

54

VSS

52

BLT_USB2_BioMetric +

50

BLT_USB2_BioMetric -

48

VSS

46

VSS

44

VDD 3.3v

42

VDD 3.3v

40

VDD 3.3v

38

VDD 3.3v

36

VSS

34

VSS

32

M_Clk

30

VSS

28

I2S_BCLK

26

I2S_DOUT

24

I2S_DIN

22

I2S_LRC

20

VSS

18

NC

16

BLT_LED_1 #

14

VSS

12

NC

10

NC

8

VSS

6

LID_Cl#

4

BLT_Sus#

2

VSS

CONN@

CONN@

SDIO_GPIO2_BLT
SDIO_GPIO1_BLT

BLT_USB3_HOST+

BLT_USB3_HOST-

BLT_USB1_WWAN_Data+

BLT_USB1_WWAN_Data-

BLT_USB_Port1_ Dir

HRS_DF12(3.0)-80DP-0.5V86

HRS_DF12(3.0)-80DP-0.5V86

Reserved
Reserved
Reserved
Reserved

SDIO_D3_BLT
SDIO_D2_BLT
SDIO_D1_BLT
SDIO_D0_BLT

VDD 3.3v
VDD 3.3v
VDD 3.3v
VDD 3.3v

RST_BLT#

SMBALERT_1

SMBDATA_1

SMBCLK_1

eDP_CH1_p
eDP_CH1_n

Radio_disa ble#

PAID_IN

81

G1

79
77
75
73
71
69
67
65
63
61
59

VSS

57
55
53

VSS

51
49
47

VSS

45

VSS

43
41
39
37
35

VSS

33

VSS

31

VSS

29
27
25
23
21
19

VSS

17

NC

15

NC

13

VSS

11
9
7

VSS

5
3
1

VSS

DMC_RADIO_OFF#

UICC_VPP

UICC_RESET

UICC_DATA

UICC_CLK

DP_DMC_HPD

DP_DMC_ML3N_RCC
DP_DMC_ML3P_RCC

DP_DMC_ML1N_RCC
DP_DMC_ML1P_RCC

1

C1925

@ C1925

@

47P_0402_50V

47P_0402_50V

2

Reserve for RF please
close t o JWDB1

PLT_RST# <6,16,22,23,27,31>

PCH_SMBCLK <6,11,12,14,28>
PCH_SMBDATA <6,11,12,14,28>

USB20_N4 < 16>
USB20_P4 <16>

DMC_RADIO_OFF# <16>

+UICC_PWR

USB20_N5 < 16>
USB20_P5 <16>
DP_DMC_HPD <37>

DP_DMC_ML3N_RCC <37>
DP_DMC_ML3P_RCC <37>

DP_DMC_ML1N_RCC <37>
DP_DMC_ML1P_RCC <37>

PCIE_PTX_WANRX_P2 <14>
PCIE_PTX_WANRX_N2 <14>

PCIE_PRX_WANTX_P2 <14>
PCIE_PRX_WANTX_N2 <14>

CLK_PCIE_MINI2# <14>
CLK_PCIE_MINI2 <14>

+1.5VS

+UICC_PWR +UICC_PWR+UICC_PWR

R88

R88
10K_0402_5%~D

10K_0402_5%~D

@

@

1 2

BT_DET#<14>

BT_RADIO_DIS#<17>

USB20_N8<16>

USB20_P8<16>

UICC_RESET UICC_VPP

COEX1

BT_RADIO_DIS#
COEX2PLT_RST#

33P_0402 _50V8J~D

33P_0402 _50V8J~D

12

C192

C192

1

2

SIM card board 4.7uF change to 1uF
for Tiger detect issue.

1

C428

C428

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+3VS

1

CU2

CU2

1U_0603_10V4Z

1U_0603_10V4Z

S

S

QU1

QU1

D

D

AO3419L_SOT23-3

AO3419L_SOT23-3

1 3

W=40mils

1

2

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

+3VS_BT

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

12

CU5

CU5

13

2

G

G

C191

C191

1 2

JBT

JBT

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

G1

12

12

G2

LOTES_YBA-WTB-015-K01~D

LOTES_YBA-WTB-015-K01~D

CONN@

CONN@

2

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

10K_0402 _5%~D

10K_0402 _5%~D

@C19 3

@

C193

R167

R167

1

2

G

G

CU4

CU4

100P_040 2_50V8J~D

100P_040 2_50V8J~D

SIM Connector

JSIM1

CONN@JSIM1

CONN@

1

VCC

2

RST

3

CLK

4

NC

MOLEX_475531001~D

MOLEX_475531001~D

GND

VPP

I/O

NC
GND
GND

1

C429

@C429

@

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

2

5
6
7
8
9
10

UICC_DATAUICC_CLK

1

C430

C430

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

+3VS_BT

RU2

RU2
300_0603_5%

300_0603_5%

D

D

QU2

QU2
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

13
14

12

@ R95

@

R95
10K_0402_5%~D

10K_0402_5%~D

U41

U41

Reserve for SIM card does not meet
rise time and pull-up is needed.

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

A

B

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

C

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

UICC_VPP

UICC_CLK

3

V I/O

Ground2V BUS

1

V I/O

IP4223CZ6_SO6~D

IP4223CZ6_SO6~D

For E SD

Title

Title

Title

Mini Card -WLAN / DMC / BT

Mini Card -WLAN / DMC / BT

Mini Card -WLAN / DMC / BT

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

UICC_RESET

4

V I/O

5

UICC_DATA

6

V I/O

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-6801P

LA-6801P

LA-6801P

E

+UICC_PWR

1

C431

C431

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

32 61Tuesday, January 25, 2011

32 61Tuesday, January 25, 2011

32 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of

A

+5VALW to +5VS

+5VALW

Q26

Q26
SI4800BDY-T1-E3_SO8

SI4800BDY-T1-E3_SO8

8

1

C335

C335
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

1 1

B+_BIAS

1 2

R270

R270
102K_0402_1%

102K_0402_1%

SUSP

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

1

C336

C336
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

5

0_0402_5%~D

0_0402_5%~D

3

Q285B

Q285B

4

7

5

4

R271

R271

1

2

+5VS

1
2

10U_0805 _10V4Z~D

10U_0805 _10V4Z~D

1U_0603_ 10V4Z

36

C337

C337

0.1U_060 3_50V_X7R

0.1U_060 3_50V_X7R

@

@

C340

C340

R273

R273
0_0402_5%~D

0_0402_5%~D

1U_0603_ 10V4Z

1

1

C338

C338

2

R267

R267
470_0603_5%

470_0603_5%

2

1 2

+5VS_D

61

Q285A

Q285A

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

B

C

D

+5VALW

R1934

R1934
100K_0402_5%~D

100K_0402_5%~D

E

1 2

DGPU_PWR_EN#

SUSP#<10,18,31,53,54>

SUSP

2

DGPU_PWR_EN<16,43,55,56>

1 2

D22

D22

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

12

R1938

R1938
100K_0402_5%~D

100K_0402_5%~D

Q294

Q294
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

@

@

13

D

D

2

G

G

S

S

+3VALW to +3V_PCH

1 2

R280

R280
102K_0402_1%

102K_0402_1%

B+_BIAS

R1945

R1945

2

G

G

Q34

Q34

+3VALW

1

C350

C350
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

2

G

G

10U_0805 _10V4Z~D

10U_0805 _10V4Z~D

12

1

2

1 2

13

D

D

Q297

Q297

PMF3800SN_SC70-3

PMF3800SN_SC70-3

S

S

13

D

D

S

S

+1.05VS

C1919

C1919

R1946

R1946

470_0402_5%

470_0402_5%

SYSON#

JP3

112

JUMP_43X79

JUMP_43X79

Q41

Q41
SI4800BDY-T1-E3_SO8

SI4800BDY-T1-E3_SO8

8
7

5

R277

R277

0_0402_5%~D

0_0402_5%~D

Q31

Q31
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

U632

U632

SI4634DY-T1-E3_SO8~D

SI4634DY-T1-E3_SO8~D

8
7
6
5

12

R1947

R1947

2M_0402_5 %~D

2M_0402_5 %~D

+3V

12

R294

R294

470_0402_5%

470_0402_5%

+3V_USB

13

D

D

2

G

G

S

S

@JP3

@

2

1
2
36

4

0.1U_060 3_50V_X7R

0.1U_060 3_50V_X7R

1

C355

C355

2

+1.05VSDGPU

8A

1
2
3

4

1

C1922

C1922

0.1U_0402_25V6

0.1U_0402_25V6

2

Q36

Q36

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

+3V_PCH

1

C351

C351
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

@

@

R282

R282
0_0402_5%~D

0_0402_5%~D

C1920

C1920

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

2

2

40mil

10U_0805 _10V4Z~D

10U_0805 _10V4Z~D

1

C352

C352
1U_0603_10V4Z

1U_0603_10V4Z

2

DGPU_PWR_EN# DGPU_PWR_EN#

C1921

C1921

+1.5VSDGPU +1.05VSDGPU

12

R1939

R1939

470_0402_5%

470_0402_5%

61

Q296A

Q296A

2

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

12

+1.5V_CPU_VDDQ _CHG

13

D

D

Deciphered Date

Deciphered Date

Deciphered Date

D

2

G

G

S

S

RUN_ON_CPU1.5VS3#<6,10>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

C

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

R292

R292
220_0402_5%~D

220_0402_5%~D

SSM3K7002FU_SC70 -3~D

SSM3K7002FU_SC70 -3~D

Q37

Q37

PCH_PWR_EN<31>

470_0402_5%

470_0402_5%

+0.75VS+1.5V_CPU_VDDQ

2

G

G

12

R1940

R1940

3

Q296B

Q296B

5

4

R286

R286

10K_0402_5%~D

10K_0402_5%~D

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

1 2

PCH_PWR_EN#<19>

SUSP#<10,18,31,53,54>

R291

R291
100K_0402_5%~D

100K_0402_5%~D

@

@

R290

R290
100K_0402_5%~D

100K_0402_5%~D

PCH_PWR_EN#

0.1U_060 3_50V_X7R

0.1U_060 3_50V_X7R

12

1

2

12

R293

R293
22_0603_5%~D

22_0603_5%~D

+DDR_CHG

SSM3K7002FU_SC70 -3~D

SSM3K7002FU_SC70 -3~D

13

D

D

Q38

Q38

S

S

Title

Title

Title

DC/DC Interface

DC/DC Interface

DC/DC Interface

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

SYSON#

SYSON<27,31,53>

R300

R300
100K_0402_5%~D

100K_0402_5%~D

1

12

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

E

12

2

G

G

@

@

C359

C359

0.1U_060 3_50V_X7R

0.1U_060 3_50V_X7R

SUSP

0.1U_060 3_50V_X7R

0.1U_060 3_50V_X7R

1

2

+5VALW+3VALW

12

13

D

D

S

S

+5VALW

2

G

G

@

@

C361

C361

+5VALW

12

R288

R288
100K_0402_5%~D

100K_0402_5%~D

13

D

D

2

G

G

S

S

@

@

C360

C360

R287

R287
100K_0402_5%~D

100K_0402_5%~D

Q32

Q32
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

12

R295

R295
100K_0402_5%~D

100K_0402_5%~D

13

D

D

Q35

Q35
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

33 61Tuesday, January 25, 2011

33 61Tuesday, January 25, 2011

33 61Tuesday, January 25, 2011

Q33

Q33
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

of

of

of

1.0

1.0

1.0

+3VALW to +3VS

+3VALW

Q27

Q27
SI4800BDY-T1-E3_SO8

SI4800BDY-T1-E3_SO8

8
7

2

G

G

R296

R296

Q4A

Q4A

2

1 2

R279

R279
102K_0402_1%

102K_0402_1%

SUSP

B+_BIAS

12

R283

R283
100K_0402_5%~D

100K_0402_5%~D

13

D

D

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

+1.5VS

12

+1.5VS_D

61

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

1

2

Q40

Q40

5

C346

C346
10U_0805_10V4Z~D

10U_0805_10V4Z~D

13

D

D

2

G

G

S

S

+1.5V To +1.5VS

+1.5V +1.5VS

R284

R284

1 2

10K_0402_5%~D

10K_0402_5%~D

R276

R276

0_0402_5%~D

0_0402_5%~D

Q30

Q30
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

U20

U20

SI4634DY-T1-E3_SO8~D

SI4634DY-T1-E3_SO8~D

8
7
6
5

0.1U_060 3_50V_X7R

0.1U_060 3_50V_X7R

1

4

1

2

C358

C358

2

12

R297

R297

470_0402_5%

470_0402_5%

+VCCP_D

3

Q4B

Q4B

SUSP

A

PCH_PWR_EN#

5

4

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

1

C345

C345
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

B+_BIAS

2 2

SUSP

3 3

470_0402_5%

470_0402_5%

4 4

SUSP SUSP

1
2
36

0.1U_060 3_50V_X7R

0.1U_060 3_50V_X7R

C354

C354

4

R285

R285
0_0402_5%~D

0_0402_5%~D

1
2
3

@

@

@

@

470_0402_5%

470_0402_5%

+3VS

1

2

@

@

R281

R281
0_0402_5%~D

0_0402_5%~D

C356

C356

+3V_PCH

12

R298

R298

61

Q5A

Q5A

2

C347

C347
10U_0805_10V4Z~D

10U_0805_10V4Z~D

10U_0805 _10V4Z~D

10U_0805 _10V4Z~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

C357

C357

1

1

2

2

+3V_D

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

1

C348

C348
1U_0603_10V4Z

1U_0603_10V4Z

2

Q5B

Q5B

5

+3VS+VCCP

12

R299

R299

470_0402_5%

470_0402_5%

+3VS_D

3

4

2N7002DW- 7-F_SOT363-6

2N7002DW- 7-F_SOT363-6

1

C349

C349
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

B+_BIAS

PCH_PWR_EN#

+1.05V to +1.05VSDGPU Transfer

330K_0402_5%

330K_0402_5%

DGPU_PWR_EN#

+1.5V

12

R289

R289

470_0402_5%

470_0402_5%

+1.5V_D

13

D

D

SYSON#

2

G

G

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

B

5

R1569 0_0603_5%~DR1569 0_0603_5%~D

W=40mils

+3.3V_F347

1

1

C1712

C1712

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

2

JP1

JP1

5

G1

6

G2

MOLEX_53398-0471~D

MOLEX_53398-0471~D

CONN@

CONN@

12

R1586

R1586
100K_0402_1%~D

100K_0402_1%~D

13

D

D

Q210

Q210
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

1
2
3
4

SLP_S3

1 2

+5VALW_VBUS

1 2

R1577

R1577
1K_0402_1%~D

1K_0402_1%~D

+3.3V_F347

1
2
3
4

C1707

C1707

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

2

USB20_P6<16>
USB20_N6<16>

+3.3V_F347

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

PM_SLP_S5#<15,31>

1

1

C1706

2

R1572

R1572
0_0603_5%~D

0_0603_5%~D

R1575

R1575
0_0603_5%~D

0_0603_5%~D

1U_0805_10V7

1U_0805_10V7

C1706

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

C1711

C1711

+3.3V_F347

2

G

G

+3.3V_F347

C1705

C1705

1U_0805_10V7

1U_0805_10V7

@

D D

C C

+5VALW

+5VS

@

1 2

1 2

PM_SLP_S3#<15,31>

12

R1588

R1588
100K_0402_1%~D

100K_0402_1%~D

ACIN#

13

D

D

Q213

Q213

B B

ACIN<31,51>

2

G

G

+3.3V_F347

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

BATT_LOW_LED#<31>

12

R1592

R1592
100K_0402_1%~D

100K_0402_1%~D

CHRG_STATE

13

D

D

Q216

Q216

BATT_CHG_LED#<31>

2

G

G

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

C1719

C1719

@

@

+3.3V_F347_VDD

2

C1708

C1708
22P_0402_50V8J~D

22P_0402_50V8J~D

1

C1715

C1715

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

@

@

@

@

2

C1720

C1720

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

@

@

2

2

3V_F347_ON< 31>

USB20_P6
USB20_N6

C1716

C1716

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

4

1

2

C1721

C1721

@

@

C1717

C1717

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

@

@

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

2

G

G

2

G

G

U602

U602

6

VDD

4

D+

5

D-

7

REGIN

8

VBUS

9

RST#/C2CK

10

P3.0/C2D

18

P2.0

17

P2.1

16

P2.2

15

P2.3

14

P2.4

13

P2.5

12

P2.6
P2.711GND

C8051F347-GQ_LQFP32_7X7

C8051F347-GQ_LQFP32_7X7

C1718

C1718

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

@

@

2

C1722

C1722

@

@

+3.3V_F347

12

R1587

R1587
100K_0402_1%~D

100K_0402_1%~D

13

D

D

Q211

Q211
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

+3.3V_F347

12

R1664

R1664
100K_0402_1%~D

100K_0402_1%~D

13

D

D

Q249

Q249
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

SLP_S5

BATT_LOW_LED

12

R1593

R1593
100K_0402_1%~D

100K_0402_1%~D

4.7K_0402_1%~D

4.7K_0402_1%~D

SPI_MOCLK

2

P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

2

G

G

SPI_MOSO

1

SPI_MOSI

32

SPI_MOCS#

31

I2C_DAT

30

I2C_CLK

29

C1710 0.1U_0402_16V7K~D@C1710 0.1U_0402_16V7K~D@

1 2

28
27

SLP_S3

26

CHRG_STATE

25

ACIN#

24

LID_SW_IN#

23

BATT_LOW_LED

22

SLP_S5

21

C1713 0.1U_0402_16V7K~D@C1713 0.1U_0402_16V7K~D@

1 2

20

C1714 0.1U_0402_16V7K~D@C1714 0.1U_0402_16V7K~D@

1 2

19

3

+3VALW +3.3V_F347

+3VALW B+_BIAS

12

R1590

R1590
100K_0402_1%~D

100K_0402_1%~D

13

D

D

Q215

Q215
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

J11

J11

2

JUMP_43X118

JUMP_43X118

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

6

2
1

R1591

R1591
100K_0402_1%~D

100K_0402_1%~D

1 2

2

G

G

R1570

R1570

@

@

Q212

Q212

D

D

G

G

+3.3V_F347+3.3V_F347

12

LID_SW_IN# < 14,31,35>

112

S

S

45

1

3

C1726

C1726

0.1U_0402_25V6

0.1U_0402_25V6

2

13

D

D

Q214

Q214
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

3

12

R1571

R1571

4.7K_0402_1%~D

4.7K_0402_1%~D

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

R1951

R1951

I2C_DAT <35,36>

I2C_CLK <35,36>

1 2

1K_0402_5%~D

1K_0402_5%~D

1

C1725

C1725

2

12

1

2

1M_0402_5 %~D

1M_0402_5 %~D

R1576

R1576

10K_0402_5%~D

10K_0402_5%~D

12

R1589

R1589
100K_0402_1%~D

100K_0402_1%~D

C1727

C1727

0.1U_0402_25V6

0.1U_0402_25V6

2

+3.3V_F347

12

R1580

R1581

R1581

12

12

R1582

R1582

10K_0402_5%~D

10K_0402_5%~D

R1580
10K_0402_5%~D

10K_0402_5%~D

SPI_MOCS#

U604

U604

1

CE#

3

WP#

7

HOLD#

4

VSS

EN25F80-75HCP_SOP8

EN25F80-75HCP_SOP8

8

VDD

6

SCK

5

SI

2

SO

1

2

+3.3V_F347 behavior

STATE

AC IN

BAT only

S0 S 3 S4 S5

ON O N ON ON

ON O N OF F OFF

MAXIM - LE D
MAXIM - GP IO 0100 001 b
I2C E EPROM

AC mode battery full in S5:turn off ELC controller

+3.3V_F347+3.3V_F347 + 3.3V_F347

1

C1723

C1723

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

R1583 15_0402_5%R1583 15_0402_5%

1 2

R1584 15_0402_5%R1584 15_0402_5%

1 2

R1585 15_0402_5%R1585 15_0402_5%

1 2

C1724

C1724
22P_0402_50V8J~D

22P_0402_50V8J~D

SMBUS ADDR ESSDEVICE
0100 000b

1010 000b

SPI_MOCLK
SPI_MOSI
SPI_MOSO

1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

ELC (1)/STATUS CONN

ELC (1)/STATUS CONN

ELC (1)/STATUS CONN

LA-6801P

LA-6801P

LA-6801P

1

1.0

1.0

34 61Tuesday, January 25, 2011

34 61Tuesday, January 25, 2011

34 61Tuesday, January 25, 2011

1.0

of

of

of

5

4

3

2

1

7313_INT#< 36>

+3.3V_F347

R1595

R1595

1 2

12

4.7K_0402_1%~D

4.7K_0402_1%~D

R1594

D D

C C

4.7K_0402_1%~D

4.7K_0402_1%~D

R1596

R1596

4.7K_0402_1%~D

4.7K_0402_1%~D

12

+3.3V_F347

12

R1598

R1598

4.7K_0402 _1%~D

4.7K_0402 _1%~D

R1594

12

R1597

R1597

4.7K_0402_1%~D

4.7K_0402_1%~D

7313_INT#< 36>

12

R1599

R1599

4.7K_0402 _1%~D

4.7K_0402 _1%~D

12

R1601

R1601

4.7K_0402_1%~D

4.7K_0402_1%~D

I2C_CLK<34,36>
I2C_DAT<34,36>

12

R1600

R1600

4.7K_0402 _1%~D

4.7K_0402 _1%~D

L/R Headlight, Logo

U605

I2C_CLK
I2C_DAT

AD0_0

AD0_1

AD0_2

U605

22

INT#/O16

19

SCL

20

SDA

18

AD0

23

AD1

24

AD2

14

P12

15

P13

16

P14

17

P15

GND9GND

MAX7313ATG+T_TQFN24_4X4

MAX7313ATG+T_TQFN24_4X4

TP_LED_R_DRV#
TP_LED_G_DRV#
TP_LED_B_DRV#

7313_INT#

CAP, Media, Eyes, Rim

U608

U608

22

INT#/O16

I2C_CLK
I2C_DAT

AD2_0
AD2_1
AD2_2

HDD_R_7313#
HDD_G_7313#
HDD_B_7313#

V+

19

P0

SCL

20

P1

SDA

P2

18

P3

AD0

23

P4

AD1

24

P5

AD2

P6

14

P7

P12

15

P8

P13

16

P9

P14

17

P10

P15

P11

GND9GND

MAX7313ATG+T_TQFN24_4X4

MAX7313ATG+T_TQFN24_4X4

V+

P0
P1
P2
P3
P4
P5
P6
P7
P8

P9
P10
P11

21

1
2
3
4
5
6
7
8
10
11
12
13
25

check with EC

+5VS

12

R1602

R1602
100K_0402_5%~D

100K_0402_5%~D

SATA_LED_ACT

13

D

2

G

G

D

Q235

Q235
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

PCH_SATALED#<13>

B B

PCH_SATALED#

21

LSPK_LED_R_DRV#

1

LSPK_LED_G_DRV#

2

LSPK_LED_B_DRV#

3

RSPK_LED_R_DRV#

4

RSPK_LED_G_DRV#

5

RSPK_LED_B_DRV#

6
7
8
10

LOGO_LED_R_DRV#

11

LOGO_LED_G_DRV#

12

LOGO_LED_B_DRV#

13
25

+3.3V_F347

LED_R_7313#_1
LED_G_7313#_1
LED_B_7313#_1

PWR_R_7313#
PWR_G_7313#
PWR_B_7313#

2

G

G

2

G

G

2

G

G

+3.3V_F347

5/18 delet e

1

2

HDD_B

13

D

D

Q233

Q233
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

HDD_B_7313#

HDD_R

13

D

D

Q234

Q234
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

HDD_R_7313#

HDD_G

13

D

D

Q225

Q225
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

HDD_G_7313#

1

C1728

C1728

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

C1733

C1733

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

LID_SW_IN#<14,31,34>

LID_SW_IN#

LID_SW

2

G

G

close to JTPMB 7/26

2

3

D70

D70

PESD5V0U2BT_SOT23-3~D

PESD5V0U2BT_SOT23-3~D

1

+5VALW

12

R1603

R1603
100K_0402_5%~D

100K_0402_5%~D

LID_SW

13

D

D

Q232

Q232

2

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

G

G

S

S

SATA_LED_ACT

13

D

D

Q224

Q224
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

Touchpad LED CONN

+5VS

C605

C605

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

TP_CLK
TP_DATA

+3VALW

+3VS

TP_DATA<31>
TP_CLK<31>

WLES ON/OFF LED#<31>

CAPS_LED#<31>

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

C603

C603

TP_DATA
TP_CLK
LID_SW_IN#
TP_LED_R_DRV#
TP_LED_G_DRV#
TP_LED_B_DRV#

LSPK_LED_R_DRV#
LSPK_LED_G_DRV#
LSPK_LED_B_DRV#
RSPK_LED_R_DRV#
RSPK_LED_G_DRV#
RSPK_LED_B_DRV#

CAPS_LED#

+5VS_TP_LED

+5VS

2

+5VS

2

JTPMB

JTPMB

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

GND1

22

GND2

HRS_FH28E-20S-0.5SH(11)

HRS_FH28E-20S-0.5SH(11)

CONN@

CONN@

12

R1976

R1976

100K_0402_5%~D

100K_0402_5%~D

WLAN_BT_LED

5

61

Q301A

Q301A
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

12

R1978

R1978

100K_0402_5%~D

100K_0402_5%~D

CAPS_LED

61

Q302A

Q302A
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

+5VS

12

R1975

R1975

100K_0402_5%~D

100K_0402_5%~D

WLAN_BT_LED_A#

3

Q301B

Q301B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

4

+5VS

12

R1977

R1977

100K_0402_5%~D

100K_0402_5%~D

3

5

Q302B

Q302B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

4

CAPS_LED_A#

4.7K_0402_1%~D

4.7K_0402_1%~D

LOGO_LED_R_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

LOGO_LED_G_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

LOGO_LED_B_DRV#

Indicator CONN

C1729

C1729

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

LED_R_7313#_1
LED_B_7313#_1
LED_G_7313#_1
CAPS_LED_A#
WLAN_BT_LED_A#

+5VS

12

+5VS

R1969

R1969

4.7K_0402_1%~D

4.7K_0402_1%~D

12

LOGO_LED_R_DRV

R1970

R1970

61

Q298A

Q298A

2

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

+5VS

12

+5VS

R1971

R1971

4.7K_0402_1%~D

4.7K_0402_1%~D

12

LOGO_LED_G_DRV

R1972

R1972

61

Q299A

Q299A

2

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

+5VS

12

+5VS

R1973

R1973

4.7K_0402_1%~D

4.7K_0402_1%~D

12

LOGO_LED_B_DRV

R1974

R1974

61

Q300A

Q300A

2

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

+5VS

1

2

LOGO_LED_R_DRV_1#

3

5

4

LOGO_LED_G_DRV_1#

3

5

4

LOGO_LED_B_DRV_1#

3

5

4

JCAP

JCAP

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

TYCO_2041183-6

TYCO_2041183-6

CONN@

CONN@

Q298B

Q298B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

Q299B

Q299B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

Q300B

Q300B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

MAX73 13AD2 AD1 AD0Refer ence

0 1 0

U605

0 1 1

U608

A A

5

L/R H eadli ght , Logo, TP

Num, CAP , SCR
EJECT , REV , PLAY /PAUS E
FFWD, Vol_ DWN, V ol_UP
Wirel ess O N/OFF
AWCC Butto n
Alien Adre naline
Power Butt on Eye s
Power Butt on Rim

EN_TPLED#<31>

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4

R173

R173

470K_0402_5%~D

470K_0402_5%~D

2

G

G

Q44

Q44

B+_BIAS

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1 2

EN_TPLED

13

D

D

S

S

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

D

D

6

2
1

1

Q45

Q45

C1746

C1746

2

12

R1654

R1654
2M_0402_5%~D

2M_0402_5%~D

G

G

3

1

2

Touch pad L ED cir cuit

+5VS_TP_LED+5VS

S

S

45

C185

C185

0.1U_0402_25V6

0.1U_0402_25V6

3

1U_0603_ 10V4Z

1U_0603_ 10V4Z

1

C184

C184

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

LOGO Board CONN

+5VS

1

C1732

C1732

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

LID_SW
LOGO_LED_R_DRV_1#
LOGO_LED_G_DRV_1#
LOGO_LED_B_DRV_1#

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

JLOGO

JLOGO

20mil

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

TYCO_0-1775737-6

TYCO_0-1775737-6

CONN@

CONN@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PWR BTN Board CONN

+5VS

JBTN

JBTN

1

ON/OFFBTN#<29>

+5VALW

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

ON/OFFBTN#
HDD_R
HDD_G
HDD_B

LID_SW
PWR_R_7313#
PWR_G_7313#
PWR_B_7313#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ELC (2)

ELC (2)

ELC (2)

LA-6801P

LA-6801P

LA-6801P

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

G1

14

G2

FCI_10089708-012010-LF

FCI_10089708-012010-LF

CONN@

CONN@

1

1.0

1.0

35 61Tuesday, January 25, 2011

35 61Tuesday, January 25, 2011

35 61Tuesday, January 25, 2011

1.0

of

of

of

5

4

3

2

1

K/B Backlight CONN

CONN@

CONN@

TYCO_1-2041070-6~D

TYCO_1-2041070-6~D

18

GND

17

GND

16

16

15

D D

+3.3V_F347

7313_INT#< 35>

12

12

R1605

R1605

R1606

12

R1608

R1608

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_R1_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_G1_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_B1_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_B3_DRV#

R1606

4.7K_0402_1%~D

4.7K_0402_1%~D

I2C_CLK<34,35>

I2C_DAT<34,35>

12

R1609

R1609

4.7K_0402_1%~D

4.7K_0402_1%~D

+3VS

R1613

R1613

+3VS

R1619

R1619

+3VS

R1625

R1625

+3VS

R1631

R1631

4.7K_0402_1%~D

4.7K_0402_1%~D

4.7K_0402_1%~D

4.7K_0402_1%~D

C C

B B

K/B Backlight

AD2 AD1 AD0
0 0 1

I2C_CLK

AD3_0
AD3_1
AD3_2

+3VS

12

R1612

R1612

4.7K_0402_1%~D

12

12

12

12

4.7K_0402_1%~D

KB_LED_R1_DRV

3

Q277B

Q277B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

+3VS

12

R1618

R1618

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_G1_DRV

3

Q271B

Q271B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

+3VS

12

R1624

R1624

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_B1_DRV

3

Q273B

Q273B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

+3VS

12

R1630

R1630

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_B3_DRV

3

Q278B

Q278B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

U609

U609

22

INT#/O16

V+

19

P0

SCL

20

P1

SDA

P2

18

P3

AD0

23

P4

AD1

24

P5

AD2

P6

14

P7

P12

15

P8

P13

16

P9

P14

17

P10

P15

P11

GND9GND

MAX7313ATG+T_TQFN24_4X4

MAX7313ATG+T_TQFN24_4X4

2

2

2

2

+3.3V_F347

21

KB_LED_R1_DRV#

1

KB_LED_G1_DRV#I2C_DAT

2

KB_LED_B1_DRV#

3

KB_LED_R2_DRV#

4

KB_LED_G2_DRV#

5

KB_LED_B2_DRV#

6

KB_LED_R3_DRV#

7

KB_LED_G3_DRV#

8

KB_LED_B3_DRV#

10

KB_LED_R4_DRV#

11

KB_LED_G4_DRV#

12

KB_LED_B4_DRV#

13
25

KB_LED_R1_DRV#_A#

61

Q277A

Q277A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

KB_LED_G1_DRV#_A#

61

Q271A

Q271A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

KB_LED_B1_DRV#_A#

61

Q273A

Q273A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

KB_LED_B3_DRV#_A#

61

Q278A

Q278A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_R2_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_G2_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_B2_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_R3_DRV#

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_G3_DRV#

R1607

R1607

+3VS

R1611

R1611

R1617

R1617

R1623

R1623

R1629

R1629

12

+3VS

+3VS

+3VS

+3VS

+3VS

12

R1604

R1604

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_R2_DRV

3

Q262B

Q262B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

KB_LED_R2_DRV#_A#

61

Q262A

Q262A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

+5VS

0.5A_13.2V_NANOSMDC050F-13.2-2

0.5A_13.2V_NANOSMDC050F-13.2-2

4

+3VS

12

R1610

R1610

4.7K_0402_1%~D

12

4.7K_0402_1%~D

KB_LED_G2_DRV

3

Q282B

Q282B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

+3VS

12

R1616

R1616

4.7K_0402_1%~D

12

4.7K_0402_1%~D

KB_LED_B2_DRV

3

Q267B

Q267B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

KB_LED_G2_DRV#_A#

61

Q282A

Q282A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

KB_LED_B2_DRV#_A#

61

Q267A

Q267A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

4.7K_0402_1%~D

4.7K_0402_1%~D

KB_LED_R4_DRV#

R1615

R1615

+3VS

4

R1621

R1621

4.7K_0402_1%~D

4.7K_0402_1%~D

+3VS

+3VS

12

R1622

R1622

4.7K_0402_1%~D

12

4.7K_0402_1%~D

KB_LED_R3_DRV

3

Q268B

Q268B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

KB_LED_R3_DRV#_A#

61

Q268A

Q268A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

KB_LED_G4_DRV#

4

R1627

R1627

4.7K_0402_1%~D

4.7K_0402_1%~D

+3VS

+3VS

12

R1628

R1628

4.7K_0402_1%~D

12

4.7K_0402_1%~D

KB_LED_G3_DRV

3

Q269B

Q269B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

KB_LED_G3_DRV#_A#

61

Q269A

Q269A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

KB_LED_B4_DRV#

4

KB_LED_R1_DRV#_A#
KB_LED_G1_DRV#_A#
KB_LED_B1_DRV#_A#
KB_LED_R2_DRV#_A#
KB_LED_G2_DRV#_A#
KB_LED_B2_DRV#_A#
KB_LED_R3_DRV#_A#
KB_LED_G3_DRV#_A#
KB_LED_B3_DRV#_A#
KB_LED_R4_DRV#_A#
KB_LED_G4_DRV#_A#
KB_LED_B4_DRV#_A#

F3

F3

21

+3VS

12

R1614

R1614

4.7K_0402_1%~D

4.7K_0402_1%~D

12

KB_LED_R4_DRV

3

Q264B

Q264B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

+3VS

12

R1620

R1620

4.7K_0402_1%~D

12

4.7K_0402_1%~D

KB_LED_G4_DRV

3

Q265B

Q265B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

+3VS

12

R1626

R1626

4.7K_0402_1%~D

12

4.7K_0402_1%~D

KB_LED_B4_DRV

3

Q266B

Q266B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

4

14
13
12
11
10

9
8
7
6
5
4
3
2
1

KB_LED_R4_DRV#_A#

61

Q264A

Q264A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

KB_LED_G4_DRV#_A#

61

Q265A

Q265A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

KB_LED_B4_DRV#_A#

61

Q266A

Q266A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

2

15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JKBBL1

JKBBL1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

ELC (3)

ELC (3)

ELC (3)

LA-6801P

LA-6801P

LA-6801P

1

1.0

1.0

36 61Tuesday, January 25, 2011

36 61Tuesday, January 25, 2011

36 61Tuesday, January 25, 2011

1.0

of

of

of

5

PCH/GPU DDC SW for DMC

+3VS

1 2

R1862 1.5K_0402_5%~D@R1862 1.5K_0402_5%~D@

1 2

R1864 1.5K_0402_5%~D@R1864 1.5K_0402_5%~D@

D D

DMC_PCH_DET#<14>

C C

VGA_DPD_P0<44>
VGA_DPD_N0<44>

B B

VGA_DPD_P1<44>
VGA_DPD_N1<44>
VGA_DPD_P2<44>
VGA_DPD_N2<44>
VGA_DPD_P3<44>
VGA_DPD_N3<44>

PCH_DPD_P0<15>
PCH_DPD_N0<15>
PCH_DPD_P1<15>
PCH_DPD_N1<15>
PCH_DPD_P2<15>
PCH_DPD_N2<15>
PCH_DPD_P3<15>
PCH_DPD_N3<15>

A A

PCH_DPD_CLK

PCH_DPD_DAT

VGA_DPD_AUXP/DDC< 44>
VGA_DPD_AUXN/DDC<44>

+3VS_DELAY

C1894 0.1U_0402_10V6K~D@C1894 0.1U_0402_10V6K~D@
C1895 0.1U_0402_10V6K~D@C1895 0.1U_0402_10V6K~D@
C1896 0.1U_0402_10V6K~D@C1896 0.1U_0402_10V6K~D@
C1897 0.1U_0402_10V6K~D@C1897 0.1U_0402_10V6K~D@
C1900 0.1U_0402_10V6K~D@C1900 0.1U_0402_10V6K~D@
C1901 0.1U_0402_10V6K~D@C1901 0.1U_0402_10V6K~D@
C1902 0.1U_0402_10V6K~D@C1902 0.1U_0402_10V6K~D@
C1903 0.1U_0402_10V6K~D@C1903 0.1U_0402_10V6K~D@

C1904 0. 1U_0402_16V7K~DC1904 0.1U_0402_16V7K~D
C1905 0. 1U_0402_16V7K~DC1905 0.1U_0402_16V7K~D
C1906 0. 1U_0402_16V7K~DC1906 0.1U_0402_16V7K~D
C1907 0. 1U_0402_16V7K~DC1907 0.1U_0402_16V7K~D
C1908 0. 1U_0402_10V7K~DC1908 0.1U_0402_10V7K~D
C1909 0. 1U_0402_10V7K~DC1909 0.1U_0402_10V7K~D
C1910 0. 1U_0402_10V7K~DC1910 0.1U_0402_10V7K~D
C1911 0. 1U_0402_10V7K~DC1911 0.1U_0402_10V7K~D

VGA_DMC_HPD<44>

PCH_DPD_CLK<15>
PCH_DPD_DAT<15>
PCH_DMC_HPD<15>

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

0_0402_5%~D

0_0402_5%~D

1 2

@

@

R1883

R1883

+3VS_DELAY

VGA_DPD_AUXP/DDC

1 2

DGPU_EDIDSEL#<17>

SEL

0

1

100K_0402_5%~D

100K_0402_5%~D

@

@

1 2

R1878

R1878

R1867 1. 5K_0402_5%~D@R1867 1.5K_0402_5%~D@

R1865 1. 5K_0402_5%~D@R1865 1.5K_0402_5%~D@

VGA_DPD_AUXN/DDC

1 2

VGA_DPD_AUXP/DDC

VGA_DPD_AUXN/DDC

R1869 10K_0402_5%~D@R1869 10K_0402_5%~D@

12

PCH_DPD_CLK
PCH_DPD_DAT DMC_DET#

R1870 10K_0402_5%~D@R1870 10K_0402_5%~D@

12

DGPU_EDIDSEL#

Y

A0 B0 C0 D0

A1 B1 C1 D1

PCH_DPD_CLK

PCH_DPD_DAT

PCH_DMC_HPD

2N7002_SOT23

2N7002_SOT23

S

S

G

G

2

Q291

Q291

D

D

1 3

@

@

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

499_040 2_1%~D

R1902

R1902

R1900

R1900

R1901

R1901

R1903

R1903

R1905

R1905

R1904

R1904

1 2

1 2

1 2

1 2

1 2

@

@

@

@

@

@

R1921 680 _0402_1%~D R1921 680 _0402_1%~D

R1920 680 _0402_1%~D R1920 680 _0402_1%~D

12

12

+3VS

@

@

R1922 680 _0402_1%~D R1922 680 _0402_1%~D

12

1 2

R1929

R1929

100K_0402_5%~D

100K_0402_5%~D

@

@

R1923 680 _0402_1%~D R1923 680 _0402_1%~D

12

0_0402_5%~D

0_0402_5%~D

R1930

12

R1930

@

@

R1924 680 _0402_1%~D R1924 680 _0402_1%~D

U630

U630

2

IA0

5

IB0

11

IC0

14

ID0

3
6

IB1

10

IC1

13

ID1

1

SEL

15

EN#

PI5C3257QEX_QSOP16

PI5C3257QEX_QSOP16

@

@

499_040 2_1%~D

499_040 2_1%~D

R1907

R1907

R1906

R1906

1 2

1 2

@

@

R1925 680 _0402_1%~D R1925 680 _0402_1%~D

R1926 680 _0402_1%~D R1926 680 _0402_1%~D

12

12

2

G

G

12

Q293

Q293

2N7002_SOT23

2N7002_SOT23

4

16

VCC

4

YA

7

YB

YC9IA1

12

YD

8

GND

R2008 0_0402_5%~DR2008 0_0402_5%~D

1 2

R2009 0_0402_5%~DR2009 0_0402_5%~D

1 2

R2010 0_0402_5%~DR2010 0_0402_5%~D

1 2

R2011 0_0402_5%~DR2011 0_0402_5%~D

1 2

+3VS

@

@

1

C1883

C1883

2

DP_DMC_AUXP
DP_DMC_AUXN

DMC_HPD

DP_DMC_AUXP

DP_DMC_AUXN

DMC_HPD

DMC_DET#DMC_PCH_DET#

@

@

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

C1884

C1884

2

DMC_DET# <32>

DMC_DAT_AUXN_CONN<32>
DMC_CLK_AUXP_CONN<32>

PCH/GPU AUX&LANE SW for DMC

499_040 2_1%~D

499_040 2_1%~D

6/5 change C188, C1162 0805 to 0603

1 2

@

@

12

13

VGA_DPD_SW_P0
VGA_DPD_SW_N0
VGA_DPD_SW_P1
VGA_DPD_SW_N1
VGA_DPD_SW_P2
VGA_DPD_SW_N2
VGA_DPD_SW_P3
VGA_DPD_SW_N3

PCH_DPD_SW_P0
PCH_DPD_SW_N0
PCH_DPD_SW_P1
PCH_DPD_SW_N1
PCH_DPD_SW_P2
PCH_DPD_SW_N2
PCH_DPD_SW_P3
PCH_DPD_SW_N3

R1927 680 _0402_1%~D R1927 680 _0402_1%~D

+1.5VS_DMC

D

D

10U_0603 _6.3V6M~D@C1912

10U_0603 _6.3V6M~D

S

S

1

2

0.1U_040 2_16V7K~D@C1913

0.1U_040 2_16V7K~D

C1912

@

22
23
24
25
26
27
28
29

31
32
33
34
35
36
37
38

39
41
21
19
17
13
10

C1913

1

2

@

U631

U631

D3-_B
D3+_B
D2-_B
D2+_B
D1-_B
D1+_B
D0-_B
D0+_B

D3-_A
D3+_A
D2-_A
D2+_A
D1-_A
D1+_A
D0-_A
D0+_A

VSS
VSS
VSS
VSS
VSS
VSS
VSS

5

VSS

1

VSS

PI3HDMI412FT-BZHE_TQFN42_9X3P5

PI3HDMI412FT-BZHE_TQFN42_9X3P5

@

@

42

VDD

40

VDD

30

VDD

20

VDD

18

VDD

16

VDD

8

VDD

2

VDD

15

D3-

14

D3+

12

D2-

11

D2+

7

D1-

6

D1+

4

D0-

3

D0+

9

SEL

43

GND_PAD

+1.5VS_DMC +VCCAFDI_VRM

R1932

@R1932

@

0_0603_5%~D

0_0603_5%~D

DMC_SW_P0
DMC_SW_N0
DMC_SW_P1
DMC_SW_N1
DMC_SW_P2
DMC_SW_N2
DMC_SW_P3
DMC_SW_N3

DMC_DGPU_SELECT#

12

3

DMC Redriver

+3VS

+3VS

+3VS

C1898

C1898

C1899

C1899

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

@

@

2

1

@

@

R1911 0_0402_5%~D@R1911 0_0402_5%~D@
R1912 0_0402_5%~D@R1912 0_0402_5%~D@
R1913 0_0402_5%~D@R1913 0_0402_5%~D@
R1915 0_0402_5%~D@R1915 0_0402_5%~D@
R1916 0_0402_5%~D@R1916 0_0402_5%~D@
R1917 0_0402_5%~D@R1917 0_0402_5%~D@
R1918 0_0402_5%~D@R1918 0_0402_5%~D@
R1919 0_0402_5%~D@R1919 0_0402_5%~D@

+1.5VS_DMC

1 2

R1866 1. 5K_0402_5%~DR1866 1.5K_0402_5%~D

1 2

R1868 1. 5K_0402_5%~DR1868 1.5K_0402_5%~D

1 2

RV17 4.7K_0402_5%~D@ RV17 4.7K_0402_5%~D@

1 2

RV16 4.7K_0402_5%~D@ RV16 4.7K_0402_5%~D@

+5VS

12

12

R1872

R1872

R1873

R1873

1.5K_0402 _5%~D

1.5K_0402 _5%~D

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

DP_DMC_AUXN

DP_DMC_AUXP

DMC_SDA_CTL

DMC_SCL_CTL

R1871 4.7K_0402_5%~DR1871 4.7K_0402_5%~D

1 2

+3VS

1.5K_0402 _5%~D

1.5K_0402 _5%~D

DMC_DAT_AUXN_CONN
DMC_CLK_AUXP_CONN

R1874 4.7K_0402_5%~DR1874 4.7K_0402_5%~D

1 2

R1875 4.7K_0402_5%~D@R1875 4.7K_0402_5%~D@

1 2

R1876 4.7K_0402_5%~DR1876 4.7K_0402_5%~D

1 2

DP_DMC_ML0P
DP_DMC_ML0N
DP_DMC_ML1P
DP_DMC_ML1N
DP_DMC_ML2P
DP_DMC_ML2N
DP_DMC_ML3P
DP_DMC_ML3N

DP_DMC_ML0P
DP_DMC_ML0N
DP_DMC_ML1P
DP_DMC_ML1N
DP_DMC_ML2P
DP_DMC_ML2N
DP_DMC_ML3P
DP_DMC_ML3N

+3VS

R1877

R1877
499_0402_1%~D

499_0402_1%~D

1 2

PCH_DPD_SW_P0
PCH_DPD_SW_N0

PCH_DPD_SW_P1

PCH_DPD_SW_P2
PCH_DPD_SW_N2

PCH_DPD_SW_P3
PCH_DPD_SW_N3

DP_DMC_HPD

DMC_SDA_CTL
DMC_SCL_CTL

2

Close to U158 VCC pins

1

U629

U629

38

IN1p

39

IN1n

41

IN2p

42

IN2n

44

IN3p

45

IN3n

47

IN4p

48

IN4n

2

POW

30

HPD_SINK

26

I2C_CTL_EN#

32

DMC_OE#

1

2

NC/DDCBUF_EN#

25

NC/OE#

8

SDA

9

SCL

34

SDA_CTL/CF G1

35

SCL_CTL/C FG0

DMC_PC0

3

I2C_ADDR0/PC0

DMC_PC1

4

I2C_ADDR1/PC1

DMC_PC1

1

GND/PC2

6

REXT

10

CEXT

C1893

C1893

2.2U_0402_6.3V6M~D

2.2U_0402_6.3V6M~D

R1953 0_0402_5%~DR1953 0_0402_5%~D

1 2

R1955 0_0402_5%~DR1955 0_0402_5%~D

1 2

R1957 0_0402_5%~DR1957 0_0402_5%~D

1 2

R1959 0_0402_5%~DR1959 0_0402_5%~D

1 2

R1961 0_0402_5%~DR1961 0_0402_5%~D

1 2

R1963 0_0402_5%~DR1963 0_0402_5%~D

1 2

R1965 0_0402_5%~DR1965 0_0402_5%~D

1 2

R1967 0_0402_5%~DR1967 0_0402_5%~D

1 2

GND15GND2

18

12

21

VCC1

VCC2

VCC3

GND424GND631GND5

GND3

27

DP_DMC_R_ML0P
DP_DMC_R_ML0N

DP_DMC_R_ML1P
DP_DMC_R_ML1N

DP_DMC_R_ML2P
DP_DMC_R_ML2N

DP_DMC_R_ML3P
DP_DMC_R_ML3N

VCC4

VCC540VCC6

GND7

GND837GND9

GND10

36

43

49

2

C1879

C1879

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

23

OUT1p

22

OUT1n

20

OUT2p

19

OUT2n

17

OUT3p

16

OUT3n

14

OUT4p

13

OUT4n

7

HPD

29

SDAZ

28

SCLZ

PS121QFN48G_QFN48_7X7

PS121QFN48G_QFN48_7X7

R1954 0_0402_5%~DR1954 0_0402_5%~D
R1956 0_0402_5%~DR1956 0_0402_5%~D

R1958 0_0402_5%~DR1958 0_0402_5%~D
R1960 0_0402_5%~DR1960 0_0402_5%~D

R1962 0_0402_5%~DR1962 0_0402_5%~D
R1964 0_0402_5%~DR1964 0_0402_5%~D

R1966 0_0402_5%~DR1966 0_0402_5%~D
R1968 0_0402_5%~DR1968 0_0402_5%~D

33

46

11

15

Close to U631 Clo se to U629

+3VS

12

R931

R931

100K_0402_1%~D

100K_0402_1%~D

DMC_OE#

13

D

D

Q292

Q292

DP_DMC_HPD

2

G

G

S

S

2N7002_SOT23

2N7002_SOT23

+3VS

12

R1928

@ R1928

@

36K_0402_1%

DMC_DGPU_SELECT#

36K_0402_1%

12

R1933

R1933

@

@

680K_0402_1%

680K_0402_1%

R1931

R1931

1 2

30K_0402_1%

30K_0402_1%

@

@

1

2

C1880

C1880

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

DMC_HPD

DP_DMC_AUXN
DP_DMC_AUXP

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

DP_DMC_HPD <32>

1

2

C1882

C1882

C1881

C1881

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

DP_DMC_ML0P_RCC
DP_DMC_ML0N_RCC
DP_DMC_ML1P_RCC
DP_DMC_ML1N_RCC
DP_DMC_ML2P_RCC
DP_DMC_ML2N_RCC
DP_DMC_ML3P_RCC
DP_DMC_ML3N_RCC

DGPU_SELECT# <16>

+3VS

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

1

2

DP_DMC_ML0P
DP_DMC_ML0N

DP_DMC_ML1P
DP_DMC_ML1NPCH_DPD_SW_N1

DP_DMC_ML2P
DP_DMC_ML2N

DP_DMC_ML3P
DP_DMC_ML3N

1

DP_DMC_ML0P_RCC <32>
DP_DMC_ML0N_RCC <32>
DP_DMC_ML1P_RCC <32>
DP_DMC_ML1N_RCC <32>
DP_DMC_ML2P_RCC <32>
DP_DMC_ML2N_RCC <32>
DP_DMC_ML3P_RCC <32>
DP_DMC_ML3N_RCC <32>

Source

ChanelAUX_SEL/SEL1& 2

0

1

5

4

GPUA

PCH

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Com pal El ectronics, Inc.

DM C M UX/Redriver

DM C M UX/Redriver

DM C M UX/Redriver

C

C

C

LA-6801P

LA-6801P

LA-6801P

37 61Tuesday, January 25, 2011

37 61Tuesday, January 25, 2011

37 61Tuesday, January 25, 2011

of

of

1

of

1.0

1.0

1.0

5

DP Redriver

1

CV1

CV1

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

D D

DISP_A0P_VGA
DISP_A0N_VGA

DISP_A1P_VGA
DISP_A1N_VGA

DISP_A2P_VGA
DISP_A2N_VGA

DISP_A3P_VGA
DISP_A3N_VGA

C C

DISP_A0P_VGA_C
DISP_A0N_VGA_C

DISP_A1P_VGA_C
DISP_A1N_VGA_C

DISP_A2P_VGA_C
DISP_A2N_VGA_C

DISP_A3P_VGA_C
DISP_A3N_VGA_C

DISP_AUXP_C
DISP_AUXN_C

DISP_HPD_SINK DP_HPD_CDISP_HPD_SINK_R

B B

CV10 0.1U_0402_10V6K~DCV10 0.1U_0402_1 0V6K~D
CV12 0.1U_0402_10V6K~DCV12 0.1U_0402_1 0V6K~D

CV7 0.1U_0402_10V6K~DCV7 0.1U_040 2_10V6K~D
CV9 0.1U_0402_10V6K~DCV9 0.1U_040 2_10V6K~D

CV14 0.1U_0402_10V6K~DCV14 0.1U_0402_1 0V6K~D
CV16 0.1U_0402_10V6K~DCV16 0.1U_0402_1 0V6K~D

CV22 0.1U_0402_10V6K~DCV22 0.1U_0402_1 0V6K~D
CV18 0.1U_0402_10V6K~DCV18 0.1U_0402_1 0V6K~D

DISP_A0P_VGA<44>
DISP_A0N_VGA<44>
DISP_A1P_VGA<44>
DISP_A1N_VGA<44>
DISP_A2P_VGA<44>
DISP_A2N_VGA<44>
DISP_A3P_VGA<44>
DISP_A3N_VGA<44>

DISP_AUXP<44>

DISP_AUXN<44>

RV171 0_ 0402_5%~D@RV171 0_0402_5%~D@

1 2

RV173 0_ 0402_5%~D@RV173 0_0402_5%~D@

1 2

RV175 0_ 0402_5%~D@RV175 0_0402_5%~D@

1 2

RV177 0_ 0402_5%~D@RV177 0_0402_5%~D@

1 2

RV179 0_ 0402_5%~D@RV179 0_0402_5%~D@

1 2

RV181 0_ 0402_5%~D@RV181 0_0402_5%~D@

1 2

RV183 0_ 0402_5%~D@RV183 0_0402_5%~D@

1 2

RV185 0_ 0402_5%~D@RV185 0_0402_5%~D@

1 2

RV187 0_ 0402_5%~D@RV187 0_0402_5%~D@

1 2

RV189 0_ 0402_5%~D@RV189 0_0402_5%~D@

1 2

RV191 0_ 0402_5%~D@RV191 0_0402_5%~D@

1 2

12
12

12
12

12
12

12
12

DISP_A0P_VGA
DISP_A0N_VGA
DISP_A1P_VGA
DISP_A1N_VGA
DISP_A2P_VGA
DISP_A2N_VGA
DISP_A3P_VGA
DISP_A3N_VGA

DISP_AUXP
DISP_AUXN

DISP_A0P_VGA_C
DISP_A0N_VGA_C

DISP_A1P_VGA_C
DISP_A1N_VGA_C

DISP_A2P_VGA_C
DISP_A2N_VGA_C

DISP_A3P_VGA_C
DISP_A3N_VGA_C

DP_HPD_C

CAB_DET_SINK
DISP_HPD_SINK

DISP_A0P_R
DISP_A0N_R

DISP_A1P_R
DISP_A1N_R

DISP_A2P_R
DISP_A2N_R

DISP_A3P_R
DISP_A3N_R

DISP_AUXP_R
DISP_AUXN_R

GPU DDC Dongle SW for DP

UV19

CAB_DET_SINK#
DISP_AUXP

CAB_DET_SINK#
DISP_AUXN

DISP_DAT_AUXN_CONN

A A

Dongle

UV19

1

BE0

2

A0

3

B0

4

BE1

5

A1

6

B1

7

GND

PI3C3125LEX_TSS OP14~D

PI3C3125LEX_TSS OP14~D

VCC
BE3

BE2

14
13

12

A3

11

B3

10

9

A2

8

B2

2

36

UV1

UV1

1

D0+

2

D0-

VCC33

3

D1+

4

D1-

6

D2+

7

D2-

9

D3+

10

D3-

12

CAD

13

HPDSRC

14

CAD_SINK

15

HPD_SINK

16

NC

RV172 0_ 0402_5%~D@RV172 0_0402_5%~D@

1 2

RV174 0_ 0402_5%~D@RV174 0_0402_5%~D@

1 2

RV176 0_ 0402_5%~D@RV176 0_0402_5%~D@

1 2

RV178 0_ 0402_5%~D@RV178 0_0402_5%~D@

1 2

RV180 0_ 0402_5%~D@RV180 0_0402_5%~D@

1 2

RV182 0_ 0402_5%~D@RV182 0_0402_5%~D@

1 2

RV184 0_ 0402_5%~D@RV184 0_0402_5%~D@

1 2

RV186 0_ 0402_5%~D@RV186 0_0402_5%~D@

1 2

RV188 0_ 0402_5%~D@RV188 0_0402_5%~D@

1 2

RV190 0_ 0402_5%~D@RV190 0_0402_5%~D@

1 2

RV192 0_ 0402_5%~D@RV192 0_0402_5%~D@

1 2

+3VS_DELAY

CV535 0.1U_0402_10V 6K~DCV535 0.1U_0402_10V6K~D

CAB_DET_SINK

DISP_AUXP_C

CAB_DET_SINK

4

+1.5VS+3VS

5

11

17

21

29

VDD15

VDD15

VDD15

VDD15

VDD15

GND

GND

GND

GND

PI2EQXDP101ZFEX _TQFN36_6X5

PI2EQXDP101ZFEX _TQFN36_6X5

8

18

24

37

28

D0+A

27

D0-A

26

D1+A

25

D1-A

23

D2+A

22

D2-A

20

D3+A

19

D3-A

31

AUX_SINK+

30

AUX_SINK-

33

AUXSRC+

32

AUXSRC-

35

DDCSDA

34

DDCSCL

DISP_A0P
DISP_A0N

DISP_A1P
DISP_A1N

DISP_A2P
DISP_A2N

DISP_A3P
DISP_A3N

DISP_CLK_AUXP_CONN

DISP_DAT_AUXN_CONN

12

CV525 0.1U_0402_10V 6K~DCV525 0.1U_0402_10V6K~D

12

CV526 0.1U_0402_10V 6K~DCV526 0.1U_0402_10V6K~D

12

Normal

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

2

DISP_A0P_C
DISP_A0N_C

DISP_A1P_C
DISP_A1N_C

DISP_A2P_C
DISP_A2N_C

DISP_A3P_C
DISP_A3N_C

DISP_AUXPDISP_CLK_AUXP_CONN

DISP_AUXNDISP_AUXN_C

3

CV2

CV2

CV4

CV4

CV3

CV3

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

1

2

2

CV5 0.1U_0402_10V6K~DCV5 0.1U_0402_10V6K~D
CV8 0.1U_0402_10V6K~DCV8 0.1U_0402_10V6K~D

CV13 0.1U_0402 _10V6K~DCV13 0.1U_0402_1 0V6K~D
CV15 0.1U_0402 _10V6K~DCV15 0.1U_0402_1 0V6K~D

CV17 0.1U_0402 _10V6K~DCV17 0.1U_0402_1 0V6K~D
CV23 0.1U_0402 _10V6K~DCV23 0.1U_0402_1 0V6K~D

CV19 0.1U_0402 _10V6K~DCV19 0.1U_0402_1 0V6K~D
CV24 0.1U_0402 _10V6K~DCV24 0.1U_0402_1 0V6K~D

DISP_CLK_AUXP_CONN
DISP_DAT_AUXN_CONN

DV2

@8DV2

DISP_A0N

DISP_A0P

DISP_A1P

DISP_A1N

@

1

2

4

5

3

8

RCLAMP0524P.TCT~D

RCLAMP0524P.TCT~D

Place close JDP1

DV1

@8DV1

DISP_A3P

DISP_A3N

DISP_A2N

DISP_A2P

@

1

2

4

5

12
12

12
12

12
12

12
12

10

9

7

6

10

9

7

6

DISP_A0N

DISP_A0P

DISP_A1P

DISP_A1N

DISP_A3P

DISP_A3N

DISP_A2N

DISP_A2P

DISP_A0P
DISP_A0N

DISP_A1P
DISP_A1N

DISP_A2P
DISP_A2N

DISP_A3P
DISP_A3N

DISP_AUXN_C
DISP_AUXP_C

DISP_AUXN
DISP_AUXP

DP_CBL_DET<16>

+3VS_DELAY

2K_0402_5%~D

2K_0402_5%~D

12

@

@

100K_0402_5%~D

100K_0402_5%~D

12

+3VS

RV281

RV281

RV272

RV272

100K_0402_5%~D

100K_0402_5%~D

12

100K_0402_5%~D

100K_0402_5%~D

12

12

@

@

12

DP_CBL_DET

RV268

RV268

CAB_DET_SINK#

Close connect

2N7002_SOT23

2N7002_SOT23

RV270

RV270

2K_0402_5%~D

2K_0402_5%~D

RV282

RV282

100K_0402_5%~D

100K_0402_5%~D

RV271

RV271

3

8

RCLAMP0524P.TCT~D

RCLAMP0524P.TCT~D

07/29/2010
DP HPD for OPT DGPU output

RV239

RV239

0_0402_5%~D

RV280

RV280

0_0402_5%~D

DP_HPD_C

12

DGPU_PWROK<16,17,39,55,56>

10K_0402_5%~D

10K_0402_5%~D

1

12

2

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

+3VS

5

UV17

UV17

P

IN1

IN2

G

3

1 2

0_0402_5%~D

0_0402_5%~D

RV240

@ RV240

@

CV506

CV506

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1 2

DP_HPD

4

O

DP_PCH_HPD<13>

QV14

QV14

2

1 2

+3VS

12

13

D

D

S

S

DP_HPD <44>

+3VS

RV231

RV231

0_0402_5%~D

0_0402_5%~D

100K_0402_5%~D

100K_0402_5%~D

RV267

RV267

2

G

G

RV269

RV269

Co-lay

FV1

FV1

1 2

1.5A_6V_1206L15 0PR~D

1.5A_6V_1206L15 0PR~D

RV3 0_12 06_5%~D@RV3 0_1206_ 5%~D@

DISP_HPD_SINK
DISP_A0P
CAB_DET_SINK
DISP_A0N
DISP_CEC

DISP_A1P
DISP_A3P
DISP_A1N
DISP_A3N

DISP_A2P
DISP_CLK_AUXP_CONN
DISP_A2N
DISP_DAT_AUXN_CONN

12

12

RV4

RV4

1M_0402_5%~D

1M_0402_5%~D

1M_0402_5%~D

1M_0402_5%~D

PMBT3904_SOT23

PMBT3904_SOT23

RV234 0_0402_5%~DRV234 0_040 2_5%~D

1 2

1

6/5 change C61 0805 to 0603

+3VS_DP

CV11

CV11

CV6

CV6

0.1U_0402_16V7K~D

1

2

CV28 0.1U_0402_10V6K~DCV28 0.1U_0402_1 0V6K~D

1

2

RV233

RV233

1

2

RV5 5.1M_0402_5%RV5 5.1M_0402_5%

12

0.1U_0402_16V7K~D

DISP_HPD_SINK

10
11
12
13
14
15
16
17
18
19
20

21
22
23
24

FOX_3V112M3-RH1HH7-7H

FOX_3V112M3-RH1HH7-7H

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

12

RV6 1M_0402_5%~D@RV6 1M_0402_5%~D

CV27 22U_0805_6.3V6M~DCV27 22U_0805_6.3V6M~D

12

1

@

2

+3VS

1

150K_0402_5%

150K_0402_5%

C

C

QV9

QV9

2

B

B

E

E

3

12

RV235

RV235
10K_0402_5%~D

10K_0402_5%~D

1 2

1
2
3
4
5
6
7
8
9

JMDP1

JMDP1

GND

GND

LANE0_P

LANE0_P

LANE0_N

LANE0_N

GND

GND

LANE1_P

LANE1_P

LANE1_N

LANE1_N

GND

GND

LANE2_P

LANE2_P

LANE2_N

LANE2_N

GND

GND

GROUND

GROUND

CONN@

CONN@

HPD

HPD

CONFIG1

CONFIG1

CONFIG2

CONFIG2

GND

GND

LANE3_P

LANE3_P

LANE3_N

LANE3_N

GND

GND

AUXCH_P

AUXCH_P

AUXCH_N

AUXCH_N

DP_PWR

DP_PWR

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/ 01/25 2012/ 01/25

2011/ 01/25 2012/ 01/25

2011/ 01/25 2012/ 01/25

3

Compal Sec ret Data

Compal Sec ret Data

Compal Sec ret Data

Deciphere d Date

Deciphere d Date

Deciphere d Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Mini Display Port

Mini Display Port

Mini Display Port

LA-6801P

LA-6801P

LA-6801P

1.0

1.0

38 61Tuesday, January 25, 2011

38 61Tuesday, January 25, 2011

38 61Tuesday, January 25, 2011

1

1.0

of

of

of

PC0
PC1

PC2

1

CV47

CV47

2.2U_0402_6.3V6M~D

2.2U_0402_6.3V6M~D

2

2

UV2

UV2

38

IN1p

39

IN1n

41

IN2p

42

IN2n

44

IN3p

45

IN3n

47

IN4p

48

IN4n

2

POW

30

HPD_SINK

26

I2C_CTL_EN#

32

NC/DDCBUF_EN#

25

NC/OE#

8

SDA

9

SCL

34

SDA_CTL/CFG1

35

SCL_CTL/CFG0

3

I2C_ADDR0/PC0

4

I2C_ADDR1/PC1

1

GND/PC2

6

REXT

10

CEXT

Place close JHDMI1

1

2

CV34

CV34

CV33

CV33

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1

@

@

CV530

CV530
10P_0402_50V8 J~D

10P_0402_50V8 J~D

2

+3VS

1

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

HDMI_DDC_DATA <44>
HDMI_DDC_CLK <44>

TMDS_TXCN

TMDS_TXCP

TMDS_TX0N TMDS_L_TX0N

TMDS_TX0P

TMDS_TX1N

TMDS_TX1P

TMDS_TX2N

TMDS_TX2P

Close to U158 VCC pins

1

1

33

46

11

15

21

VCC4

VCC540VCC6

VCC1

VCC2

VCC3

OUT1p
OUT1n
OUT2p
OUT2n
OUT3p
OUT3n
OUT4p
OUT4n

SDAZ

GND7

GND424GND631GND5

GND3

GND15GND2

GND837GND9

GND10

PS121QFN48G_QFN48_7X7

PS121QFN48G_QFN48_7X7

36

27

18

12

43

49

HPD

SCLZ

CV31

CV31

23
22
20
19
17
16
14
13

7

29
28

2

CV32

CV32

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

TMDS_TXCP
TMDS_TXCN
TMDS_TX0P
TMDS_TX0N
TMDS_TX1P
TMDS_TX1N
TMDS_TX2P
TMDS_TX2N

HDMI_HPD_C

HDMI_DDC_DATA

HDMI_DDC_CLK

2

RV21 0_0402_5%~D@RV21 0_0402_5 %~D@

1 2

LV1

LV1

1

1

4

4

MURATA DLW21SN900HQ2L

MURATA DLW21SN900HQ2L

RV27 0_0402_5%~D@RV27 0_0402_5%~D@

1 2

RV30 0_0402_5%~D@RV30 0_0402_5%~D@

1 2

LV2

LV2

1

1

4

4

MURATA DLW21SN900HQ2L

MURATA DLW21SN900HQ2L

RV34 0_0402_5%~D

RV34 0_0402_5%~D

1 2

RV35 0_0402_5%~D@RV35 0_0402_5%~D@

1 2

LV3

LV3

1

1

4

4

MURATA DLW21SN900HQ2L

MURATA DLW21SN900HQ2L

RV37 0_0402_5%~D@RV37 0_0402_5%~D@

1 2

RV38 0_0402_5%~D@RV38 0_0402_5%~D@

1 2

LV4

LV4

1

1

4

4

MURATA DLW21SN900HQ2L

MURATA DLW21SN900HQ2L

RV39 0_0402_5%~D@RV39 0_0402_5%~D@

1 2

2

2

3

3

2

2

3

3

@

@

2

2

3

3

2

2

3

3

TMDS_L_TXCN

TMDS_L_TXCP

TMDS_L_TX0P

TMDS_L_TX1N

TMDS_L_TX1P

TMDS_L_TX2N

TMDS_L_TX2P

+3VS_DELAY

+3VS

HDMI_DDC_DATA

HDMI_DDC_CLK

HDMI_SDA_CTL

HDMI_SCL_CTL

CV516 0.1U_0402_10V7K~DCV516 0.1U_0402_10V7K~D

12

CV517 0.1U_0402_10V7K~DCV517 0.1U_0402_10V7K~D

12

CV518 0.1U_0402_10V7K~DCV518 0.1U_0402_10V7K~D

12

CV519 0.1U_0402_10V7K~DCV519 0.1U_0402_10V7K~D

12

CV520 0.1U_0402_10V7K~DCV520 0.1U_0402_10V7K~D

12

CV521 0.1U_0402_10V7K~DCV521 0.1U_0402_10V7K~D

12

CV522 0.1U_0402_10V7K~DCV522 0.1U_0402_10V7K~D

12

CV523 0.1U_0402_10V7K~DCV523 0.1U_0402_10V7K~D

12

RV25 4.7K_0402_5%~DRV25 4 .7K_0402_5%~D

+3VS

RV31 4.7K_0402_5%~DRV31 4 .7K_0402_5%~D
RV32 4.7K_0402_5%~D@RV32 4.7K_0402_5%~D@

RV33 4.7K_0402_5%~DRV33 4 .7K_0402_5%~D

+3VS

1 2

RV281.5K_0402_5%~D RV281.5K_0402_5%~D

12

RV291.5K_0402_5%~D RV291.5K_0402_5%~D

12

1 2
1 2

1 2

HDMI_R_HPLUG

HDMI_OE#

DDC_DA T_HDMI
DDC_CLK _HDMI

HDMI_SDA_CTL
HDMI_SCL_CTL

RV36

RV36
499_0402_1%~D

499_0402_1%~D

1 2

HDMI_A3P_C_VGA
HDMI_A3N_C_VGA
HDMI_A0P_C_VGA
HDMI_A0N_C_VGA
HDMI_A1P_C_VGA
HDMI_A1N_C_VGA
HDMI_A2P_C_VGA
HDMI_A2N_C_VGA

1 2

RV12 4.7K_0402_5%~DRV12 4.7K_04 02_5%~D

1 2

RV13 4.7K_0402_5%~DRV13 4.7K_04 02_5%~D

1 2

RV14 4.7K_0402_5%~D@RV14 4.7K_0 402_5%~D@

1 2

RV15 4.7K_0402_5%~D@RV15 4.7K_0 402_5%~D@

HDMI_A3P_VGA<44>
HDMI_A3N_VGA<44 >
HDMI_A0P_VGA<44>
HDMI_A0N_VGA<44 >
HDMI_A1P_VGA<44>
HDMI_A1N_VGA<44 >
HDMI_A2P_VGA<44>
HDMI_A2N_VGA<44 >

B B

+5VS

1

+5VS

BAT1000-7-F_SOT23-3~D

BAT1000-7-F_SOT23-3~D

W=40mils

DV3

DV3

2 1
3

NC

NC

@

@

RV10 0_1206_5%~D

RV10 0_1206_5%~D

12

FV2

FV2

12

1.5A_6V_1206L150 PR~D

1.5A_6V_1206L150 PR~D

HDMI_HPLUG

DDC_DA T_HDMI
DDC_CLK _HDMI

TMDS_L_TXCN

TMDS_L_TXCP
TMDS_L_TX2N

TMDS_L_TX2P
TMDS_L_TX1N

TMDS_L_TX1P
TMDS_L_TX0N

TMDS_L_TX0P

+VDISPLAY_VCC

CV29

CV29

1

1

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

JHDMI1

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC _GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11
10

GND

CK_shield

GND

CK+

GND

9

D0-

GND

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042MR019S153ZL

SUYIN_100042MR019S153ZL

CONN@

CONN@

CV30

CV30

20
21
22
23

HDMI_A3P_C_VGA
HDMI_A3N_C_VGA

HDMI_A0P_C_VGA
HDMI_A0N_C_VGA

HDMI_A1P_C_VGA
HDMI_A1N_C_VGA

HDMI_A2P_C_VGA
HDMI_A2N_C_VGA

HDMI_DDC_DATA
HDMI_DDC_CLK

HDMI_HPLUG HDMI_HPD_CHDMI_HPLUG_R

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

RV246

RV246

RV247

RV247

A A

12

@

@

+3VS_DELAY

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

RV249

RV249

RV250

RV250

RV248

RV248

12

@

@

@

@

12

12

@

@

0_0402_5%~D

0_0402_5%~D

1 2

RV254

RV254

100K_0402_5%~D

100K_0402_5%~D

RV251

RV251

12

@

@

RV255

RV255

@

@

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

499_0402_1%~D

RV253

RV253

RV252

RV252

12

12

@

@

@

@

@

@

2

G

G

12

@

@

@

@

12

13

D

D

QV13

QV13

S

S

2N7002_SOT23

2N7002_SOT23

RV193 0_0402_5%~D@RV193 0_040 2_5%~D@

1 2

RV195 0_0402_5%~D@RV195 0_040 2_5%~D@

1 2

RV197 0_0402_5%~D@RV197 0_040 2_5%~D@

1 2

RV199 0_0402_5%~D@RV199 0_040 2_5%~D@

1 2

RV201 0_0402_5%~D@RV201 0_040 2_5%~D@

1 2

RV203 0_0402_5%~D@RV203 0_040 2_5%~D@

1 2

RV205 0_0402_5%~D@RV205 0_040 2_5%~D@

1 2

RV207 0_0402_5%~D@RV207 0_040 2_5%~D@

1 2

RV209 0_0402_5%~D@RV209 0_040 2_5%~D@

1 2

RV211 0_0402_5%~D@RV211 0_040 2_5%~D@

1 2

RV213 0_0402_5%~D@RV213 0_040 2_5%~D@

1 2

2

TMDS_TXCP_R
TMDS_TXCN_R

TMDS_TX0P_R
TMDS_TX0N_R

TMDS_TX1P_R
TMDS_TX1N_R

TMDS_TX2P_R
TMDS_TX2N_R

DDC_DA T_HDMI_R DDC_DA T_HDMI
DDC_CLK _HDMI_R

07/29/2010
HDMI HPD for OPT DGPU output

DGPU_PWROK<16,17,38,55,56>

HDMI_HPD_C

RV194 0_0402_5%~D@RV194 0_040 2_5%~D@

1 2

RV196 0_0402_5%~D@RV196 0_040 2_5%~D@

1 2

RV198 0_0402_5%~D@RV198 0_040 2_5%~D@

1 2

RV200 0_0402_5%~D@RV200 0_040 2_5%~D@

1 2

RV202 0_0402_5%~D@RV202 0_040 2_5%~D@

1 2

RV204 0_0402_5%~D@RV204 0_040 2_5%~D@

1 2

RV206 0_0402_5%~D@RV206 0_040 2_5%~D@

1 2

RV208 0_0402_5%~D@RV208 0_040 2_5%~D@

1 2

RV210 0_0402_5%~D@RV210 0_040 2_5%~D@

1 2

RV212 0_0402_5%~D@RV212 0_040 2_5%~D@

1 2

RV214 0_0402_5%~D@RV214 0_040 2_5%~D@

1 2

RV244

RV244

0_0402_5%~D

0_0402_5%~D

12

1

2

SN74AHC1G08DCKR_S C70-5

SN74AHC1G08DCKR_S C70-5

+3VS

IN1

IN2

1 2

0_0402_5%~D

0_0402_5%~D

RV245

5

3

CV507

CV507

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

1 2

UV18

UV18

P

4

O

G

@RV24 5

@

TMDS_TXCP
TMDS_TXCN

TMDS_TX0P
TMDS_TX0N

TMDS_TX1P
TMDS_TX1N

TMDS_TX2P
TMDS_TX2N

DDC_CLK _HDMI

HDMI_HPD

HDMI_HPD <44 >

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDMI_PCH_HPD#<17>

Compal Secret Data

Compal Secret Data

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

RV273

RV273

10K_0402_5%~D @

10K_0402_5%~D @

R1950

R1950

10K_0402_5%~D

10K_0402_5%~D

HDMI_OE#

Dec iphered Date

Dec iphered Date

Dec iphered Date

+3VS

12

13

D

D

QV1

QV1

S

S

2N7002_SOT23

2N7002_SOT23

+3VS

12

13

D

D

QV10

QV10

S

S

2N7002_SOT23

2N7002_SOT23

2

G

G

2

G

G

LV17

LV17

MBK1608221YZF_2P

HDMI_R_HPLUG HDMI_HPLUG

RV9

RV9

100K_0402_5%~D

100K_0402_5%~D

1K_0402_5%~D

1K_0402_5%~D

1

12

2

3

+3VS

1

MBK1608221YZF_2P

12

RV7

RV7

DV4

DV4
BAV99-7-F_SOT23-3

BAV99-7-F_SOT23-3

@

@

1 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1

CV524

CV524
220P_0402_50V 8J

220P_0402_50V 8J

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LA-6801P

LA-6801P

LA-6801P

HDMI

HDMI

HDMI

1.0

1.0

1.0

of

of

of

39 61Tuesday, January 25, 2011

39 61Tuesday, January 25, 2011

39 61Tuesday, January 25, 2011

5

4

3

2

1

UV3A

UV3A

AW18

PLTRST_VGA#<16>

CLK_PEG_VGA<14>

PEG_GTX_C_HRX_P0<5>

D D

C C

B B

PEG_GTX_C_HRX_N0<5>

PEG_HTX_C_GRX_P0<5>
PEG_HTX_C_GRX_N0<5>

PEG_GTX_C_HRX_P1<5>
PEG_GTX_C_HRX_N1<5>

PEG_HTX_C_GRX_P1<5>
PEG_HTX_C_GRX_N1<5>

PEG_GTX_C_HRX_P2<5>
PEG_GTX_C_HRX_N2<5>

PEG_HTX_C_GRX_P2<5>
PEG_HTX_C_GRX_N2<5>

PEG_GTX_C_HRX_P3<5>
PEG_GTX_C_HRX_N3<5>

PEG_HTX_C_GRX_P3<5>
PEG_HTX_C_GRX_N3<5>

PEG_GTX_C_HRX_P4<5>
PEG_GTX_C_HRX_N4<5>

PEG_HTX_C_GRX_P4<5>
PEG_HTX_C_GRX_N4<5>

PEG_GTX_C_HRX_P5<5>
PEG_GTX_C_HRX_N5<5>

PEG_HTX_C_GRX_P5<5>
PEG_HTX_C_GRX_N5<5>

PEG_GTX_C_HRX_P6<5>
PEG_GTX_C_HRX_N6<5>

PEG_HTX_C_GRX_P6<5>
PEG_HTX_C_GRX_N6<5>

PEG_GTX_C_HRX_P7<5>
PEG_GTX_C_HRX_N7<5>

PEG_HTX_C_GRX_P7<5>
PEG_HTX_C_GRX_N7<5>

PEG_GTX_C_HRX_P8<5>
PEG_GTX_C_HRX_N8<5>

PEG_HTX_C_GRX_P8<5>
PEG_HTX_C_GRX_N8<5>

PEG_GTX_C_HRX_P9<5>
PEG_GTX_C_HRX_N9<5>

PEG_HTX_C_GRX_P9<5>
PEG_HTX_C_GRX_N9<5>

PEG_GTX_C_HRX_P10< 5>
PEG_GTX_C_HRX_N10<5>

PEG_HTX_C_GRX_P10< 5>
PEG_HTX_C_GRX_N10<5>

PEG_GTX_C_HRX_P11< 5>
PEG_GTX_C_HRX_N11<5>

PEG_HTX_C_GRX_P11< 5>
PEG_HTX_C_GRX_N11<5>

PEG_GTX_C_HRX_P12< 5>
PEG_GTX_C_HRX_N12<5>

PEG_HTX_C_GRX_P12< 5>
PEG_HTX_C_GRX_N12<5>

PEG_GTX_C_HRX_P13< 5>
PEG_GTX_C_HRX_N13<5>

PEG_HTX_C_GRX_P13< 5>
PEG_HTX_C_GRX_N13<5>

PEG_GTX_C_HRX_P14< 5>
PEG_GTX_C_HRX_N14<5>

PEG_HTX_C_GRX_P14< 5>
PEG_HTX_C_GRX_N14<5>

PEG_GTX_C_HRX_P15< 5>
PEG_GTX_C_HRX_N15<5>

PEG_HTX_C_GRX_P15< 5>
PEG_HTX_C_GRX_N15<5>

CLK_PEG_VGA#<14>

CV51220nF_0402_16V7K CV51220nF_0402_16V7K

12

CV52220nF_0402_16V7K CV52220nF_0402_16V7K

12

CV66220nF_0402_16V7K CV66220nF_0402_16V7K

12

CV53220nF_0402_16V7K CV53220nF_0402_16V7K

12

CV60220nF_0402_16V7K CV60220nF_0402_16V7K

12

CV61220nF_0402_16V7K CV61220nF_0402_16V7K

12

CV68220nF_0402_16V7K CV68220nF_0402_16V7K

12

CV69220nF_0402_16V7K CV69220nF_0402_16V7K

12

CV70220nF_0402_16V7K CV70220nF_0402_16V7K

12

CV71220nF_0402_16V7K CV71220nF_0402_16V7K

12

CV72220nF_0402_16V7K CV72220nF_0402_16V7K

12

CV73220nF_0402_16V7K CV73220nF_0402_16V7K

12

CV74220nF_0402_16V7K CV74220nF_0402_16V7K

12

CV76220nF_0402_16V7K CV76220nF_0402_16V7K

12

CV78220nF_0402_16V7K CV78220nF_0402_16V7K

12

CV79220nF_0402_16V7K CV79220nF_0402_16V7K

12

CV80220nF_0402_16V7K CV80220nF_0402_16V7K

12

CV81220nF_0402_16V7K CV81220nF_0402_16V7K

12

CV82220nF_0402_16V7K CV82220nF_0402_16V7K

12

CV83220nF_0402_16V7K CV83220nF_0402_16V7K

12

CV84220nF_0402_16V7K CV84220nF_0402_16V7K

12

CV85220nF_0402_16V7K CV85220nF_0402_16V7K

12

CV86220nF_0402_16V7K CV86220nF_0402_16V7K

12

CV87220nF_0402_16V7K CV87220nF_0402_16V7K

12

CV88220nF_0402_16V7K CV88220nF_0402_16V7K

12

CV89220nF_0402_16V7K CV89220nF_0402_16V7K

12

CV90220nF_0402_16V7K CV90220nF_0402_16V7K

12

CV91220nF_0402_16V7K CV91220nF_0402_16V7K

12

CV95220nF_0402_16V7K CV95220nF_0402_16V7K

12

CV97220nF_0402_16V7K CV97220nF_0402_16V7K

12

CV98220nF_0402_16V7K CV98220nF_0402_16V7K

12

CV99220nF_0402_16V7K CV99220nF_0402_16V7K

12

12

RV40 0_0402_5%~DRV40 0_0402_5%~D

VGA_CLKREQ#_R

PEG_GTX_HRX_P0
PEG_GTX_HRX_N0

PEG_GTX_HRX_P1
PEG_GTX_HRX_N1

PEG_GTX_HRX_P2
PEG_GTX_HRX_N2

PEG_GTX_HRX_P3
PEG_GTX_HRX_N3

PEG_GTX_HRX_P4
PEG_GTX_HRX_N4

PEG_GTX_HRX_P5
PEG_GTX_HRX_N5

PEG_GTX_HRX_P6
PEG_GTX_HRX_N6

PEG_GTX_HRX_P7
PEG_GTX_HRX_N7

PEG_GTX_HRX_P8
PEG_GTX_HRX_N8

PEG_GTX_HRX_P9
PEG_GTX_HRX_N9

PEG_GTX_HRX_P10

PEG_GTX_HRX_N10

PEG_GTX_HRX_P11

PEG_GTX_HRX_N11

PEG_GTX_HRX_P12

PEG_GTX_HRX_N12

PEG_GTX_HRX_P13

PEG_GTX_HRX_N13

PEG_GTX_HRX_P14

PEG_GTX_HRX_N14

PEG_GTX_HRX_P15

PEG_GTX_HRX_N15

AV18

AT19
AU19

AW19

AV19

BB18
BB19

AW20

AY20

BA19
AY19

AW21

AV21

BA21
AY21

AT22
AU22

BB21
BB22

AW22

AV22

BA22
AY22

AY23

AW23

BA24
AY24

AW24

AV24

BB24
BB25

AW25

AV25

BA25
AY25

AW26

AY26

BA27
AY27

AW27

AV27

BB27
BB28

AT28
AU28

BA28
AY28

AW28

AV28

BA30
AY30

AY29

AW29

BB30
BB31

AW30

AV30

BA31
AY31

AW31
AW32

BA33
BB33

AY32
AY33

BB34
BA34

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

PEX_RST

PEX_CLKREQ

PEX_REFCLK
PEX_REFCLK

PEX_TX0
PEX_TX0

PEX_RX0
PEX_RX0

PEX_TX1
PEX_TX1

PEX_RX1
PEX_RX1

PEX_TX2
PEX_TX2

PEX_RX2
PEX_RX2

PEX_TX3
PEX_TX3

PEX_RX3
PEX_RX3

PEX_TX4
PEX_TX4

PEX_RX4
PEX_RX4

PEX_TX5
PEX_TX5

PEX_RX5
PEX_RX5

PEX_TX6
PEX_TX6

PEX_RX6
PEX_RX6

PEX_TX7
PEX_TX7

PEX_RX7
PEX_RX7

PEX_TX8
PEX_TX8

PEX_RX8
PEX_RX8

PEX_TX9
PEX_TX9

PEX_RX9
PEX_RX9

PEX_TX10
PEX_TX10

PEX_RX10
PEX_RX10

PEX_TX11
PEX_TX11

PEX_RX11
PEX_RX11

PEX_TX12
PEX_TX12

PEX_RX12
PEX_RX12

PEX_TX13
PEX_TX13

PEX_RX13
PEX_RX13

PEX_TX14
PEX_TX14

PEX_RX14
PEX_RX14

PEX_TX15
PEX_TX15

PEX_RX15
PEX_RX15

PEX_IOVDD

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT

PEX_PLLVDD

TESTMODE

PEX_TERMP

AR19
AR26
AR27
AR28
AT18

2200mA

AR22
AR23
AR24
AR25
AT20
AT21
AT25
AT27
AU18
AU21
AU25

AR18

AR17

AN37

AP38

AT24
AU24

AR21

AN3

AU27

PLACE NEAR BALLS

1

CV48

CV48

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV54

CV54

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+PEX_VDD_SVDD

+PEX_SVDD33

RV82 0_0402_5%~DRV82 0_0402_5%~D

@

@

12

RV276 0_0402_5%~D

RV276 0_0402_5%~D

1

CV527

CV527

@

@

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

RV42 0_0402_5%~DRV42 0_0402_5%~D

12

RV43 0_0402_5%~DRV43 0_0402_5%~D

12

RV44

RV44

1 2

200_0402_1%

200_0402_1%

PLACE NEAR BALLS

+PEX_PLLDVDD

RV45

RV45

1 2

10K_0402_5%~D

10K_0402_5%~D

RV46

RV46

1 2

2.49K_0402_1%

2.49K_0402_1%

1

CV62

CV62

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV55

CV55

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

PLACE NEAR BALLS

12

+1.05VSDGPU

PLACE NEAR BGA

Nvidia recommend 08/11

+NVVDD_SENSE <56>

GND_SENSE <56>

1

CV92

CV92

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

CV63

CV63

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV67

CV67

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV77

CV77

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

PLACE NEAR BGA

1

CV93

CV93

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

PLACE NEAR BGA

1

1

CV49

CV49

2

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

1

CV56

CV56

2

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

PLACE NEAR BGA

1

1

CV508

CV508

CV75

CV75

2

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

1

CV94

CV94

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

CV64

CV64

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

CV57

CV57

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

RV41 0_0402_5%~DRV41 0_0402_5%~D

LV5

LV5

+1.05VSDGPU

1

1

CV65

CV65

CV50

CV50

2

2

22U_0805 _6.3V6M~D

22U_0805 _6.3V6M~D

1

1

CV58

CV58

2

2

22U_0805 _6.3V6M~D

22U_0805 _6.3V6M~D

12

120mA

12

CV59

CV59

120mA

+1.05VSDGPU

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV96

CV96

2

+1.05VSDGPU

+3VS_DELAY

+3VS_DELAY

+3VS_DELAY

2

G

G

A A

PEG_A_CLKRQ#< 14>

1 3

D

D

2N7002_SOT23-3

2N7002_SOT23-3

QV3

QV3

RV52

RV52

0_0402_5%~D

0_0402_5%~D

@

@

5

12

RV47

RV47

2.2K_0402_5%~D

2.2K_0402_5%~D

S

S

VGA_CLKREQ#_R

12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Com pal El ectronics, Inc.

C

C

C

LA-6801P

LA-6801P

LA-6801P

N12E(1/6)_PCIE

N12E(1/6)_PCIE

N12E(1/6)_PCIE

1

1.0

1.0

40 61Tuesday, January 25, 2011

40 61Tuesday, January 25, 2011

40 61Tuesday, January 25, 2011

1.0

of

of

of

5

4

3

2

1

UV3C

UV3B

MDA[0..63]<46>

D D

C C

DQMA#[7..0]<46>

QSA[7..0]< 46>

B B

QSA#[7..0]<46>

+1.5VSDGPU

12

RV62

RV62

1.33K_0402_1%~D

1.33K_0402_1%~D

12

@

@

RV63

RV63

1.33K_0402_1%~D

1.33K_0402_1%~D

@

@

A A

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

Rt

+FB_VREF

1

CV106

CV106

Rb

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

2

@

@

P39

FBA_D0

R37

FBA_D1

R39

FBA_D2

R38

FBA_D3

T38

FBA_D4

T39

FBA_D5

U39

FBA_D6

V39

FBA_D7

M37

FBA_D8

N39

FBA_D9

M36

FBA_D10

M38

FBA_D11

K38

FBA_D12

K37

FBA_D13

L36

FBA_D14

K36

FBA_D15

K40

FBA_D16

K41

FBA_D17

J42

FBA_D18

K42

FBA_D19

M42

FBA_D20

N40

FBA_D21

N41

FBA_D22

N42

FBA_D23

V41

FBA_D24

U40

FBA_D25

V42

FBA_D26

V40

FBA_D27

R42

FBA_D28

R41

FBA_D29

P40

FBA_D30

R40

FBA_D31

AH39

FBA_D32

AH36

FBA_D33

AH38

FBA_D34

AH37

FBA_D35

AG39

FBA_D36

AF39

FBA_D37

AE39

FBA_D38

AE38

FBA_D39

AL39

FBA_D40

AL37

FBA_D41

AL36

FBA_D42

AL38

FBA_D43

AP39

FBA_D44

AR40

FBA_D45

AT41

FBA_D46

AT40

FBA_D47

AP40

FBA_D48

AP42

FBA_D49

AT42

FBA_D50

AP41

FBA_D51

AM40

FBA_D52

AL40

FBA_D53

AL42

FBA_D54

AL41

FBA_D55

AG41

FBA_D56

AG40

FBA_D57

AF40

FBA_D58

AG42

FBA_D59

AJ40

FBA_D60

AK41

FBA_D61

AK40

FBA_D62

AK42

FBA_D63

R36

FBA_DQM0

K39

FBA_DQM1

M41

FBA_DQM2

T40

FBA_DQM3

AE37

FBA_DQM4

AN38

FBA_DQM5

AN40

FBA_DQM6

AH40

FBA_DQM7

T37

FBA_DQS_WP0

M39

FBA_DQS_WP1

M40

FBA_DQS_WP2

T42

FBA_DQS_WP3

AG37

FBA_DQS_WP4

AN39

FBA_DQS_WP5

AN42

FBA_DQS_WP6

AH41

FBA_DQS_WP7

T36

FBA_DQS_RN0

L39

FBA_DQS_RN1

L40

FBA_DQS_RN2

T41

FBA_DQS_RN3

AG38

FBA_DQS_RN4

AM39

FBA_DQS_RN5

AN41

FBA_DQS_RN6

AH42

FBA_DQS_RN7

V5

FB_VREF

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

UV3B

FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DEBUG0
FBA_DEBUG1

FBA_WCK01
FBA_WCK01
FBA_WCK23
FBA_WCK23
FBA_WCK45
FBA_WCK45
FBA_WCK67
FBA_WCK67

FBA_PLL_AVDD

MAA2 MAA3 MAA5

12

RV50

RV50
10K_0402_5%~D

10K_0402_5%~D

12

RV55

RV55
10K_0402_5%~D

10K_0402_5%~D

MAA0

W36

FBA_CMD0

W37

FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

MAA2

W38

MAA3

W39

MAA4

W40

MAA5

W42

MAA6

W41

MAA7

Y40

MAA8

Y38

MAA9

AA39

MAA10

AA38

MAA11

AA37

MAA12

AA40

MAA13

AA41

MAA14

AA42

MAA15

AB40

MAA16

AD38
AD39

MAA18

AC39

MAA19

AB38

MAA20

AE40

MAA21

AE42

MAA22

AE41

MAA23

AD42

MAA24

AB39

MAA25

AB37

MAA26

AC36

MAA27

AB36

MAA28

AD40

MAA29

AC41

MAA30

AB41
AB42

Y36

RV58 60.4_0402_1%~DRV58 60.4_0402_1%~D

AE36

RV60 60.4_0402_1%~DRV60 60.4_0402_1%~D

CLKA0

V37

CLKA0#

V36

CLKA1

AD36

CLKA1#

AD37

N38
N37
N36
P36
AK37
AK38
AK36
AJ36

+FB_PLLAVDD

AA35

1 2
1 2

1

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

MAA18MAA19

CV100

CV100

12

12

CLKA0 <46>
CLKA0# <46>
CLKA1 <46>
CLKA1# <46>

300mA

1

CV101

CV101

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

RV51

RV51
10K_0402_5%~D

10K_0402_5%~D

RV56

RV56
10K_0402_5%~D

10K_0402_5%~D

MAA[0..31] <46>

+1.5VSDGPU

1

2

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

12

RV54

RV54
10K_0402_5%~D

10K_0402_5%~D

LV6

LV6

BLM18PG330SN1D_0603

BLM18PG330SN1D_0603

CV102

CV102

12

+1.05VSDGPU

1

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

DQMB#[7..0]<47>

CV105

CV105

MDB[0..63]<47>

QSB[7..0]< 47>

QSB#[7..0]<47>

@

@

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

UV3C

D22

FBB_D0

D24

FBB_D1

E22

FBB_D2

D23

FBB_D3

G24

FBB_D4

G25

FBB_D5

E25

FBB_D6

F25

FBB_D7

D20

FBB_D8

E21

FBB_D9

D21

FBB_D10

F21

FBB_D11

G18

FBB_D12

F18

FBB_D13

D18

FBB_D14

E18

FBB_D15

A18

FBB_D16

A19

FBB_D17

B18

FBB_D18

C20

FBB_D19

B21

FBB_D20

A21

FBB_D21

A22

FBB_D22

C22

FBB_D23

B27

FBB_D24

C25

FBB_D25

A27

FBB_D26

C26

FBB_D27

B24

FBB_D28

C24

FBB_D29

B22

FBB_D30

C23

FBB_D31

F35

FBB_D32

E37

FBB_D33

C38

FBB_D34

D37

FBB_D35

E34

FBB_D36

C35

FBB_D37

C34

FBB_D38

D34

FBB_D39

H37

FBB_D40

F38

FBB_D41

E40

FBB_D42

F39

FBB_D43

H40

FBB_D44

J39

FBB_D45

J38

FBB_D46

J40

FBB_D47

G41

FBB_D48

G42

FBB_D49

J41

FBB_D50

G40

FBB_D51

D41

FBB_D52

D42

FBB_D53

C41

FBB_D54

D40

FBB_D55

B36

FBB_D56

C36

FBB_D57

A36

FBB_D58

A37

FBB_D59

C39

FBB_D60

A39

FBB_D61

C40

FBB_D62

B40

FBB_D63

G23

FBB_DQM0

F19

FBB_DQM1

C21

FBB_DQM2

B25

FBB_DQM3

E36

FBB_DQM4

H39

FBB_DQM5

F42

FBB_DQM6

B39

FBB_DQM7

F24

FBB_DQS_WP0

E19

FBB_DQS_WP1

C19

FBB_DQS_WP2

A25

FBB_DQS_WP3

D36

FBB_DQS_WP4

G38

FBB_DQS_WP5

F41

FBB_DQS_WP6

C37

FBB_DQS_WP7

E24

FBB_DQS_RN0

D19

FBB_DQS_RN1

B19

FBB_DQS_RN2

A24

FBB_DQS_RN3

D35

FBB_DQS_RN4

G39

FBB_DQS_RN5

F40

FBB_DQS_RN6

B37

FBB_DQS_RN7

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31

FBB_DEBUG0
FBB_DEBUG1

FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1

FBB_WCK01
FBB_WCK01
FBB_WCK23
FBB_WCK23
FBB_WCK45
FBB_WCK45
FBB_WCK67
FBB_WCK67

FBB_PLL_AVDD

MAB0

F27
G28

MAB2

G29

MAB3

E28

MAB4

C27

MAB5

A28

MAB6

B28

MAB7

C28

MAB8

D28

MAB9

F28

MAB10

D30

MAB11

E30

MAB12

C29

MAB13

B30

MAB14

A30

MAB15

C30

MAB16

D33
D32

MAB18

F31

MAB19

D31

MAB20

B34

MAB21

A34

MAB22

C33

MAB23

A33

MAB24

E31

MAB25

G32

MAB26

F30

MAB27

E29

MAB28

B32

MAB29

C31

MAB30

B31
A31

G27

RV59 60.4_0402_1%~DRV59 60.4_0402_1%~D

E33

RV61 60.4_0402_1%~DRV61 60.4_0402_1%~D

CLKB0

E27

CLKB0#

D27

CLKB1

G33

CLKB1#

F33

G22
F22
G20
G21
G34
G35
J36
H36

+FB_PLLAVDD

H30

12

RV48

RV48
10K_0402_5%~D

10K_0402_5%~D

12

RV53

RV53
10K_0402_5%~D

10K_0402_5%~D

MAB19

1 2
1 2

1

CV104

CV104

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

MAB3MAB2

MAB18MAB5

12

12

12

RV64

RV64
10K_0402_5%~D

10K_0402_5%~D

MAB[0..31] <47>

+1.5VSDGPU

CLKB0 <47>
CLKB0# <47>
CLKB1 <47>
CLKB1# <47>

RV49

RV49
10K_0402_5%~D

10K_0402_5%~D

RV57

RV57
10K_0402_5%~D

10K_0402_5%~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Com pal El ectronics, Inc.

C

C

C

LA-6801P

LA-6801P

LA-6801P

N12E(2/6)_Mem oryA /B

N12E(2/6)_Mem oryA /B

N12E(2/6)_Mem oryA /B

41 61Tuesday, January 25, 2011

41 61Tuesday, January 25, 2011

41 61Tuesday, January 25, 2011

of

of

1

of

1.0

1.0

1.0

5

4

3

2

1

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

+1.5VSDGPU

+1.5VSDGPU+1.5VSDGPU

H22
H24
H25
H26
H27
H28
H29
H31
H32
H33
H34
H7
H9
J35
J4
J7
J8
K35
K8
M35
M8
N35
N8
R35
R8
T35
T8
U35
V35
V38
W35
Y35
H21
Y41

V8

V6

1 2

RV69 40.2_0402_1%~DRV69 40.2_0402_1%~D

1 2

V7

RV70 40.2_0402_1%~DRV70 40.2_0402_1%~D

V4

1 2

RV71 60.4_0402_1%~DRV71 60.4_0402_1%~D

1

CV125

CV125

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV129

CV129

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV151

CV151

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV110

CV110

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV113

CV113

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV119

CV119

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

T205 PAD~D@ T205 PAD~D@

+1.5VSDGPU

1

1

CV126

CV126

2

1

CV130

CV130

2

1

CV152

CV152

2

1

CV127

CV127

CV128

CV128

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

22U_0805 _6.3V6M~D

22U_0805 _6.3V6M~D

1

1

CV131

CV131

CV132

CV132

2

2

10U_0805 _6.3V6M

10U_0805 _6.3V6M

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV154

CV154

CV153

CV153

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

22U_0805 _6.3V6M~D

22U_0805 _6.3V6M~D

1

1

CV107

CV107

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV114

CV114

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV120

CV120

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV133

CV133

2

10U_0805 _6.3V6M

10U_0805 _6.3V6M

1

CV108

CV108

CV111

CV111

2

2

1U_0402_ 6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV115

CV115

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV121

CV121

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1U_0402_ 6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV116

CV116

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV122

CV122

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV109

CV109

CV112

CV112

2

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

1

CV118

CV118

CV117

CV117

2

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

1

CV123

CV123

CV124

CV124

2

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

MAC3MAC2

UV3D

MDC[0..63]<48>

D D

C C

DQMC#[7..0]<48>

QSC[7..0]<48>

B B

QSC#[7..0]<48>

MDC0
MDC1
MDC2
MDC3
MDC4
MDC5
MDC6
MDC7
MDC8
MDC9
MDC10
MDC11
MDC12
MDC13
MDC14
MDC15
MDC16
MDC17
MDC18
MDC19
MDC20
MDC21
MDC22
MDC23
MDC24
MDC25
MDC26
MDC27
MDC28
MDC29
MDC30
MDC31
MDC32
MDC33
MDC34
MDC35
MDC36
MDC37
MDC38
MDC39
MDC40
MDC41
MDC42
MDC43
MDC44
MDC45
MDC46
MDC47
MDC48
MDC49
MDC50
MDC51
MDC52
MDC53
MDC54
MDC55
MDC56
MDC57
MDC58
MDC59
MDC60
MDC61
MDC62
MDC63

DQMC#0
DQMC#1
DQMC#2
DQMC#3
DQMC#4
DQMC#5
DQMC#6
DQMC#7

QSC0
QSC1
QSC2
QSC3
QSC4
QSC5
QSC6
QSC7

QSC#0
QSC#1
QSC#2
QSC#3
QSC#4
QSC#5
QSC#6
QSC#7

UV3D

M6

FBC_D0

N4

FBC_D1

M7

FBC_D2

M5

FBC_D3

K5

FBC_D4

K6

FBC_D5

L7

FBC_D6

K7

FBC_D7

P4

FBC_D8

R6

FBC_D9

R4

FBC_D10

R5

FBC_D11

T5

FBC_D12

T4

FBC_D13

U4

FBC_D14

T6

FBC_D15

U3

FBC_D16

T1

FBC_D17

V3

FBC_D18

T2

FBC_D19

R3

FBC_D20

P3

FBC_D21

N1

FBC_D22

N2

FBC_D23

J2

FBC_D24

K3

FBC_D25

J3

FBC_D26

J1

FBC_D27

M3

FBC_D28

M2

FBC_D29

N3

FBC_D30

M1

FBC_D31

F12

FBC_D32

D13

FBC_D33

G12

FBC_D34

E12

FBC_D35

E10

FBC_D36

F10

FBC_D37

G11

FBC_D38

G10

FBC_D39

D14

FBC_D40

F15

FBC_D41

D15

FBC_D42

E15

FBC_D43

E16

FBC_D44

D16

FBC_D45

D17

FBC_D46

F16

FBC_D47

C17

FBC_D48

A16

FBC_D49

C18

FBC_D50

B16

FBC_D51

C15

FBC_D52

C14

FBC_D53

A13

FBC_D54

B13

FBC_D55

B9

FBC_D56

C10

FBC_D57

C9

FBC_D58

A9

FBC_D59

C12

FBC_D60

B12

FBC_D61

C13

FBC_D62

A12

FBC_D63

K4

FBC_DQM0

R7

FBC_DQM1

T3

FBC_DQM2

L3

FBC_DQM3

D10

FBC_DQM4

G15

FBC_DQM5

C16

FBC_DQM6

C11

FBC_DQM7

L4

FBC_DQS_WP0

U7

FBC_DQS_WP1

R1

FBC_DQS_WP2

K1

FBC_DQS_WP3

D11

FBC_DQS_WP4

G17

FBC_DQS_WP5

A15

FBC_DQS_WP6

B10

FBC_DQS_WP7

M4

FBC_DQS_RN0

T7

FBC_DQS_RN1

R2

FBC_DQS_RN2

K2

FBC_DQS_RN3

D12

FBC_DQS_RN4

G16

FBC_DQS_RN5

B15

FBC_DQS_RN6

A10

FBC_DQS_RN7

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

GND_REF
GND_REF

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31

FBC_DEBUG0
FBC_DEBUG1

FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1

FBC_WCK01
FBC_WCK01
FBC_WCK23
FBC_WCK23
FBC_WCK45
FBC_WCK45
FBC_WCK67
FBC_WCK67

FBC_PLL_AVDD

C3
E5

MAC0

H5
G4

MAC2

G5

MAC3

F4

MAC4

G2

MAC5

G1

MAC6

G3

MAC7

F1

MAC8

J5

MAC9

E3

MAC10

H6

MAC11

C2

MAC12

F3

MAC13

E2

MAC14

D1

MAC15

D2

MAC16

E8
D7

MAC18

E7

MAC19

D6

MAC20

B7

MAC21

A7

MAC22

C7

MAC23

A6

MAC24

E9

MAC25

C5

MAC26

F8

MAC27

B3

MAC28

C6

MAC29

B5

MAC30

A4
B4

1 2

J6

RV72 60.4_0402_1%~DRV72 60.4_0402_1%~D

1 2

F9

RV73 60.4_0402_1%~DRV73 60.4_0402_1%~D

CLKB0

H3

CLKB0#

H4

CLKB1

C8

CLKB1#

D8

P7
N7
N5
N6
G14
G13
E13
F13

+FB_PLLAVDD

H8

12

RV65

RV65
10K_0402_5%~D

10K_0402_5%~D

12

RV66

RV66
10K_0402_5%~D

10K_0402_5%~D

MAC5

12

RV81

RV81
10K_0402_5%~D

10K_0402_5%~D

+1.5VSDGPU

CLKC0 <48>
CLKC0# < 48>
CLKC1 <48>
CLKC1# < 48>

1

CV142

CV142

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

MAC19MA C18

MAC[0..31] <48>

12

RV68

RV68
10K_0402_5%~D

10K_0402_5%~D

12

RV67

RV67
10K_0402_5%~D

10K_0402_5%~D

A2

A3
AA36
AB35
AC38
AD35
AD41
AE35
AF35
AF36

AG35
AG36

AH35
AK35
AL35

B1

B2

B29
B33

B6

C1
C4

D26

D3
D4
D5
D9

E32

E4

E6

F2

F5

F6

F7

G19
G30

G6
G8

G9
H10
H12
H13
H15
H16
H18
H19

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

UV3E

UV3E

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

FBVDDQ_PROBE

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CALTERM_GND

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Com pal El ectronics, Inc.

C

C

C

LA-6801P

LA-6801P

LA-6801P

N12E(3/6)_Mem oryC

N12E(3/6)_Mem oryC

N12E(3/6)_Mem oryC

42 61Tuesday, January 25, 2011

42 61Tuesday, January 25, 2011

1

42 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of

5

NVVDD DCPLNG Follows GF106 NVVDD Decap Guidelines DT

UV3F

UV3F

AA12

VDD

AA14

VDD

AA16

VDD

AA18

VDD

AA21

VDD

AA23

VDD

AA25

VDD

AA27

VDD

AB11

VDD

AB13

VDD

AB15

D D

C C

B B

A A

AB17
AB19
AB20
AB22
AB24
AB26
AB28
AC12
AC14
AC16
AC18
AC21
AC23
AC25
AC27
AD11
AD13
AD15
AD17
AD19
AD20
AD22
AD24
AD26
AD28
AE12
AE14
AE16
AE18
AE21
AE23
AE25
AE27
AF11
AF13
AF15
AF17
AF19
AF20
AF22
AF24
AF26
AF28
AG12
AG14
AG16
AG18
AG21
AG23
AG25
AG27
AH11
AH13
AH15
AH17
AH19
AH20
AH22
AH24
AH26
AH28
AM35
AN35
AN36
AP35
AP36
AP37
AR29
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AR37
AR38
AT30
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AT39
AU30
AU31
AU33
AU34
AU35
AU36
AU37
AU38
AU39
AU40
AU41
AU42
AV32
AV33
AV34
AV35
AV36
AV37
AV38
AV39
AV40

AV41
AW33
AW34
AW35

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

5

+VGA_CORE+VGA_CORE

AW36

VDD

AW37

VDD

AW38

VDD

AW39

VDD

AW40

VDD

AW41

VDD

AW42

VDD

AY34

VDD

AY35

VDD

AY36

VDD

AY37

VDD

AY38

VDD

AY39

VDD

AY40

VDD

AY41

VDD

AY42

VDD

BA35

VDD

BA36

VDD

BA37

VDD

BA38

VDD

BA39

VDD

BA40

VDD

BA41

VDD

BA42

VDD

BB36

VDD

BB37

VDD

BB39

VDD

BB40

VDD

BB41

VDD

L11

VDD

L13

VDD

L15

VDD

L17

VDD

L19

VDD

L20

VDD

L22

VDD

L24

VDD

L26

VDD

L28

VDD

M12

VDD

M14

VDD

M16

VDD

M18

VDD

M21

VDD

M23

VDD

M25

VDD

M27

VDD

N11

VDD

N13

VDD

N15

VDD

N17

VDD

N19

VDD

N20

VDD

N22

VDD

N24

VDD

N26

VDD

N28

VDD

P12

VDD

P14

VDD

P16

VDD

P18

VDD

P21

VDD

P23

VDD

P25

VDD

P27

VDD

R11

VDD

R13

VDD

R15

VDD

R17

VDD

R19

VDD

R20

VDD

R22

VDD

R24

VDD

R26

VDD

R28

VDD

T12

VDD

T14

VDD

T16

VDD

T18

VDD

T21

VDD

T23

VDD

T25

VDD

T27

VDD

U11

VDD

U13

VDD

U15

VDD

U17

VDD

U19

VDD

U20

VDD

U22

VDD

U24

VDD

U26

VDD

U28

VDD

V12

VDD

V14

VDD

V16

VDD

V18

VDD

V21

VDD

V23

VDD

V25

VDD

V27

VDD

W11

VDD

W13

VDD

W15

VDD

W17

VDD

W19

VDD

W20

VDD

W22

VDD

W24

VDD

W26

VDD

W28

VDD

Y11

VDD

Y13

VDD

Y15

VDD

Y17

VDD

Y19

VDD

Y20

VDD

Y22

VDD

Y24

VDD

Y26

VDD

Y28

VDD

DGPU_PWR_EN<16,33,55,56>

+VGA_CORE

RV227 1K_0402_5%~DRV227 1K_0402_5%~D

0.1uF - X5R 0402 x 16 under chip

1

CV190

CV190

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV181

CV181

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV188

CV188

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1uF - X5R 0402 x 15 under c hip

1

CV212

CV212

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV200

CV200

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

CV219

CV219

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV236

CV236

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV226

CV226

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1 2

CV499

CV499

1

CV209

CV209

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV182

CV182

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV203

CV203

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV214

CV214

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV201

CV201

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

CV222

CV222

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV243

CV243

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV227

CV227

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

1

CV194

CV194

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV183

CV183

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV215

CV215

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV195

CV195

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV202

CV202

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

CV224

CV224

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV245

CV245

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV228

CV228

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+3VALW

1 2

61

2

4

1

1

CV216

CV216

CV185

CV185

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV180

CV180

CV186

CV186

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV191

CV191

CV189

CV189

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

SPARE/TEST

1

1

CV210

CV210

CV196

CV196

2

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

1

CV208

CV208

CV204

CV204

2

2

10U_0805 _6.3V6M

10U_0805 _6.3V6M

10U_0805 _6.3V6M

10U_0805 _6.3V6M

1

1

CV221

CV221

CV218

CV218

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV235

CV235

CV242

CV242

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV229

CV229

CV230

CV230

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+3VS +3VS_DELAY

RV225

RV225
100K_0402_5%~D

100K_0402_5%~D

QV16A

QV16A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

10U_0805 _6.3V6M

10U_0805 _6.3V6M

1 2

RV278 1K_0402_5%~DRV278 1K_0402_5%~D

1

CV187

CV187

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV184

CV184

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV211

CV211

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV197

CV197

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV205

CV205

2

22U_0805 _6.3V6M~D

22U_0805 _6.3V6M~D

1

CV223

CV223

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV244

CV244

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV231

CV231

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

RV277 0_0805_5%~D

RV277 0_0805_5%~D

QV5 AO3419L_SOT23-3

QV5 AO3419L_SOT23-3

1

CV528

CV528

2

3VS_Dgate

CV513

CV513

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

470U_D2E_ 2.5VM_R9M~D

470U_D2E_ 2.5VM_R9M~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

@

@

1 2

123

DGS

DGS

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

3

UV3G

1

CV179

CV179

2

1

CV213

CV213

2

1

1

CV193

CV193

CV192

CV192

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV198

CV198

CV199

CV199

2

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

1

+

+

+

+

CV206

CV206

CV207

CV207

2

2

470U_D2E_ 2.5VM_R9M~D

470U_D2E_ 2.5VM_R9M~D

1

1

CV220

CV220

CV217

CV217

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV225

CV225

CV241

CV241

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

1

CV232

CV232

CV233

CV233

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

AJ39

NC

AK39

NC

AT9

NC

AU12

NC

D25

NC

F34

NC

J37

NC

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

UV3G

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

AA8
AB8
AC8
AD8
AE8
AF8
Y8
AR16

AA15
AA17
AA19
AA20
AA22
AA24
AA26
AA28
AB12
AB14

AB16
AB18
AB21
AB23
AB25
AB27
AC11
AC13
AC15
AC17
AA11
AC19

AC20
AC22
AC24
AC26
AC28
AC35
AC40

AA13

AD12
AD14
AD16
AD18
AD21
AD23
AD25
AD27
AE11
AE13
AE15
AE17
AE19
AE20
AE22
AE24
AE26
AE28
AF12
AF14
AF16
AF18

AF21
AF23
AF25
AF27
AF38
AF41

AG11
AG13
AG15
AG17

A40

A41

AC2

AC5

AC7

AF2

AF5
AF7

Y7

+IFPE_IOVDD

+IFPEF_PLLVDD

+IFPF_IOVDD

470_060 3_5%

470_060 3_5%

1

RV226

RV226

CV529

CV529

2

10U_0805 _6.3V6M

10U_0805 _6.3V6M

1 2

34

QV16B

QV16B

DMN66D0LDW-7 _SOT363-6~D

DMN66D0LDW-7 _SOT363-6~D

3VS_Dgate

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

0.4mm

1

1

CV170

CV170

CV171

CV171

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

UV3H

UV3H

PD_AJ4
PD_AJ5
PD_AJ7

PD_AK4
PD_AK5
PD_AK6
PD_AK7

PD_AL4
PD_AL5
PD_AL6
PD_AL7

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

Compal Secret Data

Compal Secret Data

Compal Secret Data

0.1U_040 2_16V7K~D

AG19
AG20
AG22
AG24
AG26
AG28
AH12
AH14
AH16
AH18
AH21
AH23
AH25
AH27
AJ2
AJ35
AJ38
AJ41
AM2
AM36
AM38
AM41
AR2
AR20
AR39
AR41
AT11
AT14
AT17
AT23
AT26
AT29
AT5
AT8
AV11
AV14
AV17
AV2
AV20
AV23
AV26
AV29
AV31
AV5
AV8
AY1
B11
B14
B17
B20
B23
B26
B35
B38
B41
B42
B8
BA1
BA11
BA14
BA17
BA2
BA20
BA23
BA26
BA29
BA32
BA5
BA8
BB2
Y5

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

UV3I

UV3I

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

AJ4
AJ5
AJ7

AK4
AK5
AK6
AK7

AL4
AL5
AL6
AL7

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

1

1

CV172

CV172

2

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

PLACE N EAR BALL S

Deciphered Date

Deciphered Date

Deciphered Date

2

CV173

CV173

2

1

CV174

CV174

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

BB3
C32
C42
D29
D38
D39
E11
E14
E17
E20
E23
E26
E35
E38
E39
E41
F36
F37
G26
G31
G36
G37

G7
H11
H14
H17

H2
H20
H23
H35
H38
H41
L12
L14
L16
L18

L2
L21
L23
L25
L27
L35
L38
L41

L5

L8
M11
M13
M15
M17
M19
M20
M22
M24
M26
M28
N12
N14
N16
N18
N21
N23
N25
N27
P11
P13
P15
P17
P19

P2
AT6

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

+3VS_DELAY_VDD34

UV3J

UV3J

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

1

+3VS_DELAY

1

1

CV175

CV175

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

P20

GND

P22

GND

P24

GND

P26

GND

P28

GND

P35

GND

P38

GND

P41

GND

P5

GND

P8

GND

R12

GND

R14

GND

R16

GND

R18

GND

R21

GND

R23

GND

R25

GND

R27

GND

T11

GND

T13

GND

T15

GND

T17

GND

T19

GND

T20

GND

T22

GND

T24

GND

T26

GND

T28

GND

U12

GND

U14

GND

U16

GND

U18

GND

U2

GND

U21

GND

U23

GND

U25

GND

U27

GND

U36

GND

U38

GND

U41

GND

U5

GND

U8

GND

V11

GND

V13

GND

V15

GND

V17

GND

V19

GND

V20

GND

V22

GND

V24

GND

V26

GND

V28

GND

W12

GND

W14

GND

W16

GND

W18

GND

W21

GND

W23

GND

W25

GND

W27

GND

Y12

GND

Y14

GND

Y16

GND

Y18

GND

Y2

GND

Y21

GND

Y23

GND

Y25

GND

Y27

GND

Y39

GND

AT7

GND

1

CV176

CV176

CV177

2

CV177

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

CV178

CV178

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

PLACE NEAR BGA

RV74 0_0402_5%~DRV74 0_0402_5%~D

12

+IFPC_IOVDD

AM4

PD_AM4

AM5

PD_AM5

AM7

PD_AM7

AN4

PD_AN4

AN5

PD_AN5

AN6

PD_AN6

AN7

PD_AN7

AP5

PD_AP5

AP6

PD_AP6

AP7

PD_AP7

AP8

PD_AP8

AR6

PD_AR6

AR7

PD_AR7

AR8

PD_AR8

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

+IFPC_PLLVDD

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

N12E(4/6)_Pow er/GND

N12E(4/6)_Pow er/GND

N12E(4/6)_Pow er/GND

43 61Tuesday, January 25, 2011

43 61Tuesday, January 25, 2011

1

43 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of

5

UV3K

UV3K

IFPAB_RSET

@

@

12

RV75 1K_0402_1%~D

RV75 1K_0402_1%~D

RV221 10K_0402_5%~DRV221 10K_0402_5%~D

D D

RV222 10K_0402_5%~DRV222 10K_0402_5%~D

C C

12

RV77 1K_0402_1%~DRV77 1K_0402_1%~D

@

@

12

RV79 1K_0402_1%~D

B B

A A

RV79 1K_0402_1%~D

12

RV223 10K_0402_5%~DRV223 10K_0402_5%~D

12

RV224 10K_0402_5%~DRV224 10K_0402_5%~D

12

12

IFPC_RSET

+IFPC_PLLVDD

+IFPC_IOVDD

IFPD_RSET

AR15

IFPAB_RSET

AT12

IFPAB_PLLVDD

AR11

IFPA_IOVDD

AR12

IFPB_IOVDD

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

AU8

IFPC_RSET

AN8

IFPC_PLLVDD

AM8

IFPC_IOVDD

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

AU9

IFPD_RSET

AR10

IFPD_PLLVDD

AR9

IFPD_IOVDD

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

UV3L

UV3L

UV3M

UV3M

IFPC

IFPC

IFPD

IFPD

DVI/HDMI DP

DVI/HDMI DP

I2CW_SDA

I2CW_SDA
I2CW_SCL

I2CW_SCL

TXC

TXC
TXC

TXC

TXD0

TXD0
TXD0

TXD0

TXD1

TXD1
TXD1

TXD1

TXD2

TXD2
TXD2

TXD2

DVI/HDMI

DVI/HDMI

I2CW_SDA

I2CW_SDA
I2CW_SCL

I2CW_SCL

TXC

TXC
TXC

TXC

TXD0

TXD0
TXD0

TXD0

TXD1

TXD1
TXD1

TXD1

TXD2

TXD2
TXD2

TXD2

IFPA_TXC
IFPA_TXC

IFPA_TXD0
IFPA_TXD0

IFPA_TXD1
IFPA_TXD1

IFPA_TXD2
IFPA_TXD2

IFPA_TXD3
IFPA_TXD3

IFPB_TXC
IFPB_TXC

IFPB_TXD4
IFPB_TXD4

IFPB_TXD5
IFPB_TXD5

IFPB_TXD6
IFPB_TXD6

IFPB_TXD7
IFPB_TXD7

IFPC_AUX
IFPC_AUX

DP

DP

IFPD_AUX
IFPD_AUX

GPIO0

IFPC_L3
IFPC_L3

IFPC_L2
IFPC_L2

IFPC_L1
IFPC_L1

IFPC_L0
IFPC_L0

GPIO1

IFPD_L3
IFPD_L3

IFPD_L2
IFPD_L2

IFPD_L1
IFPD_L1

IFPD_L0
IFPD_L0

GPIO19

4

AW13
AV13

AT10
AU10

AW10

+3VS_DELAY

AV10

AW11
AY11

AW12
AV12

AY18
BA18

BA13
AY13

BA15
AY15

BB15
BB16

AY16
BA16

AB4

AU6
AV6

AU7
AV7

AW6
AW7

AY8
AW8

AW9
AV9

AD2

AV3
AW3

BB9
BB10

BA10
AY10

BA12
AY12

BB12
BB13

AG5

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

+1.05VSDGPU

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

+1.05VSDGPU

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

12

RV130

RV130

100K_040 2_5%~D

100K_040 2_5%~D

12

RV274

RV274

100K_040 2_5%~D

100K_040 2_5%~D

BLM18PG331SN1D_2P~D

BLM18PG331SN1D_2P~D

1 2

LV8

LV8

1

CV510

CV510

@

@

2

BLM18PG221SN1D_2P~D

BLM18PG221SN1D_2P~D

1 2

LV12

LV12

1

CV257

CV257

@

@

2

BLM18PG221SN1D_2P~D

BLM18PG221SN1D_2P~D

1 2

LV13

LV13

1

CV262

CV262

@

@

2

HDMI_DDC_DATA <39>
HDMI_DDC_CLK < 39>

HDMI_A3N_VGA <39>
HDMI_A3P_VGA <39>

HDMI_A2N_VGA <39>
HDMI_A2P_VGA <39>

HDMI_A1N_VGA <39>
HDMI_A1P_VGA <39>

HDMI_A0N_VGA <39>
HDMI_A0P_VGA <39>

HDMI_HPD <39>

+3VS_DELAY

BLM18PG331SN1D_2P~D

BLM18PG331SN1D_2P~D

1

CV405

CV405

@

@

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

+1.05VSDGPU

BLM18PG221SN1D_2P~D

BLM18PG221SN1D_2P~D

1

CV410

CV410

@

@

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1 2

LV14

LV14

1 2

LV15

LV15

CV238

CV238

CV258

CV258

CV263

CV263

440mA

1

CV239

CV239

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

285mA

1

CV259

CV259

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

285mA

1

CV264

CV264

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

CV406

CV406

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

1

CV411

CV411

2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

285mA

1

2

4.7U_060 3_6.3V6M

4.7U_060 3_6.3V6M

1

CV509

CV509

2

1

CV403

CV403

2

1

CV404

CV404

2

220mA

CV407

CV407

CV412

CV412

3

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+IFPE_IOVDD

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+IFPF_IOVDD

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

+IFPEF_PLLVDD

1

CV240

CV240

2

+IFPE_IOVDD

1

CV261

CV261

2

+IFPF_IOVDD

1

CV266

CV266

2

CV408

CV408

+IFPC_IOVDD

CV413

CV413

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

CV409

CV409

2

+IFPC_IOVDD

1

CV414

CV414

2

+IFPEF_PLLVDD

CV234

CV234

+IFPC_PLLVDD

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1

2

CV511

CV511

+IFPC_PLLVDD

12

RV761K_0402_1%~D RV761K_0402_1%~D

+IFPE_IOVDD

+IFPF_IOVDD

UV3N

UV3N

AK8

IFPEF_PLLVDD

AU5

IFPEF_RSET

AJ8

IFPE_IOVDD

AL8

IFPF_IOVDD

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

12

RV7810K_0402_5%~D RV7810K_0402_5%~D

12

RV80 10K_0402_5%~DRV80 10K_0402_5%~D

2

IFPE

IFPE

IFPF

IFPF

AR14

DACA_VDD

AT15

DACA_VREF

AT16

DACA_RSET

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

AR13

DACB_VDD

AU13

DACB_VREF

AT13

DACB_RSET

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

+3VS_DELAY

I2CY_SDA

I2CY_SDA
I2CY_SCL

I2CY_SCL

TXC

TXC

TXD0

TXD0
TXD0

TXD0

TXD1

TXD1
TXD1

TXD1

TXD2

TXD2
TXD2

TXD2

HPD_E HPD_E

HPD_E HPD_E

TXD3

TXD3
TXD3

TXD3

TXD4

TXD4
TXD4

TXD4

TXD5

TXD5
TXD5

TXD5

UV3O

UV3O

UV3P

UV3P

1 2

RV256 2.2K_0402_5%~DRV256 2.2K_0402_5%~D

1 2

RV257 2.2K_0402_5%~DRV257 2.2K_0402_5%~D

1 2

RV258 2.2K_0402_5%~DRV258 2.2K_0402_5%~D

1 2

RV259 2.2K_0402_5%~DRV259 2.2K_0402_5%~D

I2CY_SDA

I2CY_SDA
I2CY_SCL

I2CY_SCL

TXCTXC

TXCTXC
TXC

TXC

TXD0

TXD0
TXD0

TXD0

TXD1

TXD1
TXD1

TXD1

TXD2

TXD2
TXD2

TXD2

I2CZ_SDA

I2CZ_SDA
I2CZ_SCL

I2CZ_SCL

TXC

TXC
TXC

TXC

TXD0

TXD0
TXD0

TXD0

TXD1

TXD1
TXD1

TXD1

TXD2

TXD2
TXD2

TXD2

HPD_F

HPD_F

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

DPDVI-DL DVI-SL/HDMI

DPDVI-DL DVI-SL/HDMI

IFPE_AUX
IFPE_AUX

IFPE_L3
IFPE_L3

IFPE_L2
IFPE_L2

IFPE_L1
IFPE_L1

IFPE_L0
IFPE_L0

GPIO15

IFPF_AUX
IFPF_AUX

IFPF_L3
IFPF_L3

IFPF_L2
IFPF_L2

IFPF_L1
IFPF_L1

IFPF_L0
IFPF_L0

GPIO21

I2CA_SCL
I2CA_SDA

DACA_HSYNC

DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

I2CB_SCL
I2CB_SDA

DACB_HSYNC

DACB_VSYNC

DACB_RED

DACB_GREEN

DACB_BLUE

AY2
BA3

BA4
BB4

AY3
AY4

AW4
AV4

AY5
AW5

AB5

AW1
AW2

AY6
BA6

BB6
BB7

AY7
BA7

BA9
AY9

AE4

AK2
AK1

AU16
AV16

AW17

AY17

AW16

AH2
AH3

AV15
AU15

AW15

AY14

AW14

1

DP_HPD

I2CA_SCL
I2CA_SDA

I2CB_SCL
I2CB_SDA

VGA_DPD_AUXN/DDC <37>
VGA_DPD_AUXP/DDC <37>

VGA_DPD_N3 <37>
VGA_DPD_P3 <37>

VGA_DPD_N2 <37>
VGA_DPD_P2 <37>

VGA_DPD_N1 <37>
VGA_DPD_P1 <37>

VGA_DPD_N0 <37>
VGA_DPD_P0 <37>

VGA_DMC_HPD <37>

12

RV127

RV127

100K_0402_5%~D

100K_0402_5%~D

DISP_AUXN <38>
DISP_AUXP <38>

DISP_A3N_VGA <38>
DISP_A3P_VGA <38>

DISP_A2N_VGA <38>
DISP_A2P_VGA <38>

DISP_A1N_VGA <38>
DISP_A1P_VGA <38>

DISP_A0N_VGA <38>
DISP_A0P_VGA <38>

DP_HPD <38>

12

RV129

RV129

100K_0402_5%~D

100K_0402_5%~D

I2CB_SCL <58>

I2CB_SDA < 58>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Com pal El ectronics, Inc.

C

C

C

LA-6801P

LA-6801P

LA-6801P

N12E(5/6)_DP/HDMI

N12E(5/6)_DP/HDMI

N12E(5/6)_DP/HDMI

44 61Tuesday, January 25, 2011

44 61Tuesday, January 25, 2011

1

44 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of

5

4

3

2

1

+1.05VSDGPU

UV3Q

UV3Q

D D

AA7

MIOACAL_PD_VDDQ

AB7

+3VS_DELAY

MIOACAL_PU_GND

W8

MIOA_VREF

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

UV3R

UV3R

AH6

BBIASN_NC

AH5

BBIASP_NC

AT1

STRAP0

AT2

STRAP1

AT3

STRAP2

AP4

MULTISTRAP_REF0_GND

AR5

MULTISTRAP_REF1_GND

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

+3VS_DELAY

2

CV275

CV275

1

UV4

UV4

1

VDD

SCLK

2

D+

SDATA

3

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

ADM1032ARMZ-2REEL_MSOP8

Address:100_1101

+3VS_DELAY

8

7

6

5

PGOOD_OUT_NC

RV109

RV109

4.7K_0402_5%~D

4.7K_0402_5%~D

1 2

@

@

12

RV279

RV279

0_0402_5%~D

0_0402_5%~D

@

@

C C

STRAP0
STRAP1
STRAP2

1 2

RV103 40.2K_0402_1%~DRV103 40.2K_0402_1%~D

1 2

RV104 40.2K_0402_1%~DRV104 40.2K_0402_1%~D

B B

VGA Thermal Sensor ADM1032ARMZ

Closed to GPU

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

GPU_THERMAL_D+ EC_SMB_DA2_PX

GPU_THERMAL_D-

A A

CV276

CV276

1 2

2200P_0402_50V7K

2200P_0402_50V7K

1 2

RV110 4.7K_0402_5%~DRV110 4.7K_0402_5%~D

5

MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8

MIOAD9
MIOAD10
MIOAD11

MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC

MIOA_DE

MIOA_CLKOUT
MIOA_CLKOUT

MIOA_CLKIN

ROM_CS

ROM_SI

ROM_SO

ROM_SCLK

I2CH_SCL
I2CH_SDA

BUFRST

CEC

EC_SMB_CK2_PX

THM_ALERT#

1

CV533

CV533
10P_0402_50V8J~D

10P_0402_50V8J~D

2

V1
V2
W1
W2
W3
Y3
AA2
AA1
AA3
AB1
AB2
AB3

W5
W7
W6
W4

Y4
AA4
AA5

AR3

AP1
AP3
AP2

AG2
AG1

AG7

AH4

AJ3

4

RV260

RV260

10K_0402_5%~D

10K_0402_5%~D

ROM_CS#

ROM_SI
ROM_SO

I2CH_SCL
I2CH_SDA

2.2K_0402_5%~D

2.2K_0402_5%~D

EC_SMB_CK2_PX

EC_SMB_DA2_PX

12

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

+3VS_DELAY

RV105

RV105

+3VS_DELAY

RV100

RV100

1 2

ROM_SCLK

1

CV531

CV531
68P_0402_50V8J~D

68P_0402_50V8J~D

2

RV261

RV261

1 2

12

12

RV106

RV106

2.2K_0402_5%~D

2.2K_0402_5%~D

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

@

@

1 2

RV111 2.2K_0402_5%~DRV111 2.2K_0402_5%~D

1 2

RV112 2.2K_0402_5%~DRV112 2.2K_0402_5%~D

1 2

RV113 2.2K_0402_5%~DRV113 2.2K_0402_5%~D

1 2

RV114 2.2K_0402_5%~DRV114 2.2K_0402_5%~D

LV16

LV16

1 2

BLM18PG330SN1D_0603

BLM18PG330SN1D_0603

1

@

@

CV512

CV512

2

+3VS_DELAY

+3VS_DELAY

+3VS_DELAY

2

61

QV4A

QV4A

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

I2CC_SCL

I2CC_SDA

I2CH_SCL

I2CH_SDA

4

QV4B

QV4B

5

Straps

10U_0603 _6.3V6M~D

10U_0603 _6.3V6M~D

Spare/Te st

150mA

1

CV267

CV267

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

1 2

RV90 5.1K_0402_5%

RV90 5.1K_0402_5%

1 2

RV92 35.7K_0402_1%RV92 35.7K_0402_1%

1 2

RV94 15K_0402_1%~D

RV94 15K_0402_1%~D

X76@

X76@

1 2

RV96 15K_0402_5%~D

RV96 15K_0402_5%~D

1 2

RV98 10K_0402_1%~DRV98 10K_0402_1%~D

1 2

RV101 15K_0402_1%~DRV101 15K_0402_1%~D

+GPU_PLLVDD

1

CV269

CV269

2

STRAP0
STRAP1
STRAP2
ROM_SI
ROM_SO
ROM_SCLK

@

@

@

@

NOT FOR PRODUCTION

FOR LAB TEST ONLY

Place cl ose to bal ls

1

CV270

CV270

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

MULTI LEVEL STRAPS

1 2

RV91 45.3K_0402_1%RV91 45.3K_0402_1%

@

@

1 2

RV93 10K_0402_1%~D

RV93 10K_0402_1%~D

1 2

RV95 30K_0402_1%RV95 30K_0402_1%

@

@

1 2

RV97 5.1K_0402_1%~D

RV97 5.1K_0402_1%~D

@

@

1 2

RV99 5.1K_0402_1%~D

RV99 5.1K_0402_1%~D

@

@

1 2

RV102 15K_0402_1%~D

RV102 15K_0402_1%~D

1

CV271

CV271

2

+3VS_DELAY

1

2

0.1U_040 2_16V7K~D

0.1U_040 2_16V7K~D

strap0

strap1

strap2

ROM_SI

ROM_SO

ROM_SCLK

0.3mm

0.3mm

0.3mm

CV272

CV272

10K_0402_5%~D

10K_0402_5%~D

12

RV88

RV88

64MX16
Samsung

64MX16
Hynix

128MX16
Samsung

128MX16
Hynix

SSI --> Hynix

UV3T

UV3T

GPU_THERMAL_D-

GPU_THERMAL_D+

12

@

@

RV264

RV264

10K_0402_5%~D

10K_0402_5%~D

EC_SMB_CK2 < 30,31,58>

3

EC_SMB_DA2 < 30,31,58>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

AT4

THERMDN

AR4

THERMDP

AL2

JTAG_TCK

AM3

JTAG_TMS

AN2

JTAG_TDI

AN1

JTAG_TDO

AL3

12

RV265

RV265

10K_0402_5%~D

10K_0402_5%~D

JTAG_TRST

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

Compal Secret Data

Compal Secret Data

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

UV3S

UV3S

AH8

PLLVDD

AH7

SP_PLLVDD

AG8

VID_PLLVDD

AU4

XTALSSIN

AU2

XTALIN

N12E-GE_BGA1328~D

N12E-GE_BGA1328~D

XTALIN

CV273

CV273

18P_0402_50V8J~D

18P_0402_50V8J~D

ROM_SI

Pull low with
RV96=20K
Pull low with
RV96=15K
Pull low with
RV96=45K
Pull low with
RV96=35K

I2CS_SCL
I2CS_SDA

I2CC_SCL

I2CC_SDA

GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14

GPIO16
GPIO17
GPIO18

GPIO20

GPIO22
GPIO23
GPIO24

1

2

YV1

YV1

3

OUT

GND

2

GND

27MHZ_16PF_X7T027000BG1H-V

27MHZ_16PF_X7T027000BG1H-V

EC_SMB_CK2_PX

AK3

EC_SMB_DA2_PX

AL1

AG3

I2CC_SDA

AH1

AD3
AD4
AC3

GPU_VID0

AC4

GPU_VID1

AD5
AD1

RV228 10K_0402_5%~DRV228 10K_0402_5%~D

AE1

1 2
AE5
AD6

RV229 10K_0402_5%~DRV229 10K_0402_5%~D

1 2

AA6
AE2
AE6

1 2

AD7

RV230 10K_0402_5%~DRV230 10K_0402_5%~D

AE7
AE3
AF3

AF4

AB6
AG4
AG6

PACIN<51>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

XTALOUTBUFF

XTALOUT

4

1

IN

1

CV274

CV274
18P_0402_50V8J~D

18P_0402_50V8J~D

2

I2CC_SCL

1

@

@

CV532

CV532
10P_0402_50V8J~D

10P_0402_50V8J~D

2

10K_0402_5%~D

10K_0402_5%~D

THM_ALERT#

+3VS_DELAY

AC_BATT

+3VS_DELAY

12

RV275

RV275

4.7K_0402_1%~D

4.7K_0402_1%~D

PACIN#

61

QV15A

QV15A

2

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

LA-6801P

LA-6801P

LA-6801P

XTAL_OUTBUFFXTAL_SSIN

AU1

AU3

XTALOUT

+3VS_DELAY

12

12

@

@

RV262

RV262

RV263

RV263

10K_0402_5%~D

10K_0402_5%~D

12

12

RV107

RV107

10K_0402_5%~D

10K_0402_5%~D

+3VS_DELAY

12

RV266

RV266
10K_0402_5%~D

10K_0402_5%~D

AC_BATT

3

5

QV15B

QV15B
2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

4

N12E(6/6)_GPIO

N12E(6/6)_GPIO

N12E(6/6)_GPIO

1

12

RV89

RV89
10K_0402_5%~D

10K_0402_5%~D

GPU_VID0 <56>
GPU_VID1 <56>

@

@

RV108

RV108

10K_0402_5%~D

10K_0402_5%~D

45 61Tuesday, January 25, 2011

45 61Tuesday, January 25, 2011

45 61Tuesday, January 25, 2011

of

of

of

1.0

1.0

1.0

5

+VREFCA_A1 +VREFCA_A2
+VREFDA_Q1

MDA[0..63]<41>

MAA[0..31]<41>

DQMA#[7..0]<41>

QSA[7..0]<41>

D D

QSA#[7..0]<41>

CLKA0<41 >
CLKA0#<4 1>

C C

RV115

RV115
243_04 02_1%~OK

243_04 02_1%~OK

MAA9
MAA11
MAA8
MAA25
MAA10
MAA24
MAA22
MAA7
MAA21
MAA6
MAA29
MAA23
MAA28
MAA20
MAA4
MAA14

MAA12
MAA27
MAA26

MAA3

MAA2
MAA0
MAA30
MAA15
MAA13

QSA1

DQMA#2 DQMA#6

QSA#1
QSA#2

MAA5

12

UV5

UV5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

4

RV116

RV116
243_04 02_1%~OK

243_04 02_1%~OK

+VREFCA_A1
+VREFDA_Q1

MAA9
MAA11
MAA8
MAA25
MAA10
MAA24
MAA22
MAA7
MAA21
MAA6
MAA29
MAA23
MAA28
MAA20
MAA4
MAA14

MAA12
MAA27
MAA26

CLKA0
CLKA0#
MAA3

MAA2
MAA0
MAA30
MAA15
MAA13

QSA0
QSA3

DQMA#0
DQMA#3

QSA#0
QSA#3

MAA5

12

MDA12

E3

MDA8

F7

MDA15

F2

MDA11

F8

MDA13

H3

MDA9

H8

MDA14

G2
H7

MDA18

D7

MDA20

C3

MDA16

C8

MDA21

C2

MDA17

A7

MDA22

A2

MDA19

B8

MDA23

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

UV6

UV6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3

MDA1

E3

MDA4

F7

MDA3

F2

MDA5

F8

MDA2

H3

MDA7

H8

MDA0

G2

MDA6

H7

MDA30

D7

MDA27

C3

MDA31

C8

MDA25

C2

MDA28

A7

MDA24

A2

MDA29

B8

MDA26

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

CLKA1<41 >
CLKA1#<4 1>

RV117

RV117
243_04 02_1%~OK

243_04 02_1%~OK

M8

+VREFDA_Q2 +VREFDA_Q2

H1

MAA9

N3

MAA11

P7

MAA8

P3

MAA25

N2

MAA10

P8

MAA24

P2

MAA22

R8

MAA7

R2

MAA21
MAA6

R3

MAA29
MAA23

R7

MAA28

N7

MAA20
MAA4
MAA14

M7

MAA12

M2

MAA27

N8

MAA26

M3

K7

MAA19

K9

MAA18

K1

MAA16
MAA30
MAA15

K3

MAA13

QSA4
QSA7QSA2

C7

DQMA#4DQMA#1

E7

DQMA#7

D3

QSA#4

G3

QSA#7

B7

MAA5

12

2

UV7

UV7

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7

T8

A8
A9

L7

A10/AP
A11
A12

T3

A13

T7

A14
A15/BA3

BA0
BA1
BA2

J7

CK
CK
CKE/CKE0

ODT/ODT0

L2

CS/CS0

J3

RAS
CAS

L3

WE

F3

DQSL
DQSU

DML
DMU

DQSL
DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1

UV8

UV8

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

MDA46

E3

MDA40

F7

MDA47

F2

MDA43

F8

MDA44

H3

MDA42

H8

MDA45

G2

MDA41MDA10

H7

MDA53

D7

MDA51

C3

MDA54

C8

MDA49

C2

MDA52

A7

MDA50

A2

MDA55

B8

MDA48

A3

+1.5VSDGPU

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

CLKA1<41 >
CLKA1#<4 1>

RV118

RV118
243_04 02_1%~OK

243_04 02_1%~OK

+VREFCA_A2

MAA9
MAA11
MAA8
MAA25
MAA10
MAA24
MAA22
MAA7
MAA21
MAA6
MAA29
MAA23
MAA28
MAA20
MAA4
MAA14

MAA12
MAA27
MAA26

MAA19

MAA18
MAA16
MAA30
MAA15
MAA13

QSA5
QSA6

DQMA#5

QSA#5
QSA#6

MAA5

12

MDA33

E3

MDA36

F7

MDA35

F2

MDA37

F8

MDA32

H3

MDA38

H8

MDA34

G2

MDA39

H7

MDA58

D7

MDA60

C3

MDA56

C8

MDA62

C2

MDA57

A7

MDA63

A2

MDA59

B8

MDA61

A3

+1.5VSDGPU

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU

1

1

1

CV288

CV288

CV287

CV287

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CV277

CV277

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

4

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

CV286

CV286

2

1

CV298

CV298

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

RV119

RV119

1.33K_04 02_1%~D

1.33K_04 02_1%~D

RV123

RV123

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1

CV299

CV299

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

12

1

2

B B

A A

VRAM P/N :
Samsung : SA00 0041T00 (S IC D3 64MX16 K4W 1G1646E-HC11 FBGA 96P )
Hynix : SA000041S20 (S IC D3 64MX16 H5TQ1G63DFR-11C FBGA 9 6P )

1

CV283

CV283

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+1.5VSDGPU +1.5VSDGPU

12

RV120

RV120

1.33K_04 02_1%~D

1.33K_04 02_1%~D

12

RV124

RV124

1.33K_04 02_1%~D

1.33K_04 02_1%~D

5

1

1

CV285

CV285

CV284

CV284

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+VREFDA_Q1 +VREFCA_A1

CV278

CV278

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

1

2

1

1

CV289

CV289

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CLKA0

12

CLKA0#

CV290

CV290

2

RV128

RV128
160_04 02_1%

160_04 02_1%

CV282

CV282

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

1

CV500

CV500

CV281

CV281

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

1

CV294

CV294

CV295

CV295

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+1.5VSDGPU

RV122

RV122

1.33K_04 02_1%~D

1.33K_04 02_1%~D

RV126

RV126

1.33K_04 02_1%~D

1.33K_04 02_1%~D

Compal Secre t Data

Compal Secre t Data

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secre t Data

1

CV296

CV296

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

+VREFDA_Q2

12

Deciphered Date

Deciphered Date

Deciphered Date

1

CV293

CV293

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

CV280

CV280

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

1

2

1

1

1

CV305

CV305

CV304

CV304

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+1.5VSDGPU

RV121

RV121

1.33K_04 02_1%~D

1.33K_04 02_1%~D

RV125

RV125

1.33K_04 02_1%~D

1.33K_04 02_1%~D

2

1

CV300

CV300

CV301

CV301

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

+VREFCA_A2

CV279

CV279

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

12

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1

1

CV302

CV302

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CLKA1

CLKA1#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VRAM_DDR3 / Channel A

VRAM_DDR3 / Channel A

VRAM_DDR3 / Channel A

CV303

CV303

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

LA-6801P

LA-6801P

LA-6801P

1

CV292

CV292

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

RV131

RV131
160_04 02_1%

160_04 02_1%

1

1

1

CV291

CV291

CV501

CV501

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1.0

1.0

46 61Tuesday, Ja nuary 25, 2011

46 61Tuesday, Ja nuary 25, 2011

46 61Tuesday, Ja nuary 25, 2011

1.0

of

of

of

5

+VREFCB_A1 +VREFCB_A2
+VREFDB_Q1

RV133

RV133
243_04 02_1%~OK

243_04 02_1%~OK

MAB9
MAB11
MAB8
MAB25
MAB10
MAB24
MAB22
MAB7
MAB21
MAB6
MAB29
MAB23
MAB28
MAB20
MAB4
MAB14

MAB12
MAB27
MAB26

MAB3

MAB2
MAB0
MAB30
MAB15
MAB13

MAB5

12

QSB1

QSB#1
QSB#2

MDB[0..63]<41 >

MAB[0..31]<41>

DQMB#[7..0]<41>

QSB[7..0]<41 >

D D

QSB#[7..0]< 41>

CLKB0<41 >
CLKB0#<4 1>

C C

UV9

UV9

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

4

+1.5VSDGPU

RV134

RV134
243_04 02_1%~OK

243_04 02_1%~OK

+VREFCB_A1
+VREFDB_Q1

MAB9
MAB11
MAB8
MAB25
MAB10
MAB24
MAB22
MAB7
MAB21
MAB6
MAB29
MAB23
MAB28
MAB20
MAB4
MAB14

MAB12
MAB27
MAB26

CLKB0
CLKB0#

MAB3

MAB2
MAB0
MAB30
MAB15
MAB13

QSB0
QSB3

DQMB#0
DQMB#3DQMB#2 DQMB#6

QSB#0
QSB#3

MAB5

12

MDB13

E3

MDB8

F7

MDB12

F2

MDB10

F8

MDB14

H3

MDB11

H8

MDB15

G2

MDB9

H7

MDB18

D7

MDB20

C3

MDB16

C8

MDB21

C2

MDB17 MDB57

A7

MDB22

A2

MDB19

B8

MDB23

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

UV10

UV10

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3

MDB2

E3

MDB4

F7

MDB3

F2

MDB5

F8

MDB1

H3

MDB7

H8

MDB0

G2

MDB6

H7

MDB30

D7

MDB27

C3

MDB31

C8

MDB25

C2

MDB28

A7

MDB26

A2

MDB29

B8

MDB24

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

CLKB1<41 >
CLKB1#<4 1>

M8

+VREFDB_Q2 +VREFDB_Q2

H1

MAB9

N3

MAB11

P7

MAB8

P3

MAB25

N2

MAB10

P8

MAB24

P2

MAB22

R8

MAB7

R2

MAB21

T8

MAB6

R3

MAB29

L7

MAB23

R7

MAB28

N7

MAB20

T3

MAB4

T7

MAB14

M7

MAB12

M2

MAB27

N8

MAB26

M3

J7

K7

MAB19

K9

MAB18

K1

MAB16

L2

MAB30

J3

MAB15

K3

MAB13

L3

QSB4

F3

QSB7QSB2

C7

DQMB#4DQMB#1

E7

DQMB#7

D3

QSB#4

G3

QSB#7

B7

MAB5

T2

L8

12

J1

L1

RV135

RV135

J9

L9

243_04 02_1%~OK

243_04 02_1%~OK

2

UV11

UV11

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1

UV12

UV12

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

RV136

RV136
243_04 02_1%~OK

243_04 02_1%~OK

+VREFCB_A2

MAB9
MAB11
MAB8
MAB25
MAB10
MAB24
MAB22
MAB7
MAB21
MAB6
MAB29
MAB23
MAB28
MAB20
MAB4
MAB14

MAB12
MAB27
MAB26

CLKB1
CLKB1#
MAB19

MAB18
MAB16
MAB30
MAB15
MAB13

QSB5
QSB6

DQMB#5

QSB#5
QSB#6

MAB5

12

MDB36

E3

MDB33

F7

MDB38

F2

MDB34

F8

MDB39

H3

MDB32

H8

MDB37

G2

MDB35

H7

MDB58

D7

MDB60

C3

MDB56

C8

MDB62

C2
A7

MDB63

A2

MDB59

B8

MDB61

A3

+1.5VSDGPU

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDB40

E3

MDB46

F7

MDB43

F2

MDB47

F8

MDB42

H3

MDB44

H8

MDB41

G2

MDB45

H7

MDB53

D7

MDB49

C3

MDB54

C8

MDB51

C2

MDB52

A7

MDB50

A2

MDB55

B8

MDB48

A3

+1.5VSDGPU

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5VSDGPU +1.5VSDGPU

B B

A A

1

CV327

CV327

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

5

1

CV328

CV328

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+1.5VSDGPU

RV138

RV138

RV142

RV142

1

1

CV329

CV329

CV326

CV326

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

+VREFDB_Q1

CV308

CV308

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

12

1

2

VRAM P/N :
Samsung : SA00 0035700 (S IC D3 64MX16 K4W 1G1646E-HC12 FBGA 96P)
Hynix : SA000032400 (S IC D3 64 MX16 H5TQ1G63BFR-12C FBGA 1.5V )

1

CV334

CV334

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

1

CV335

CV335

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+1.5VSDGPU

RV137

RV137

1.33K_04 02_1%~D

1.33K_04 02_1%~D

RV141

RV141

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1

CV330

CV330

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

+VREFCB_A1

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

12

1

2

4

1

1

1

1

CV332

CV332

CV333

CV331

CV331

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CV307

CV307

CV333

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CLKB0

12

CLKB0#

1

CV325

CV325

CV324

CV324

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

RV146

RV146
160_04 02_1%

160_04 02_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5VSDGPU +1.5VSDGPU

1

1

CV502

CV502

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

3

1

CV315

CV315

CV318

CV318

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

0.1U_04 02_16V7K~D

RV140

RV140

RV144

RV144

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

1

CV319

CV319

2

12

12

Deciphered Date

Deciphered Date

Deciphered Date

1

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

2

CV322

CV322

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1

CV323

CV323

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+1.5VSDGPU+1.5VSDGPU

RV139

RV139

RV143

RV143

1

CV320

CV320

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

CV310

CV310

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

1

2

1

1

CV314

CV314

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

+VREFCB_A2+VREFDB_Q2

12

1

2

1

CV316

CV316

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CV309

CV309

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1

CV317

CV317

CV321

CV321

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CLKB1

12

RV149

RV149
160_04 02_1%

160_04 02_1%

CLKB1#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VRAM_DDR3 / Channel B

VRAM_DDR3 / Channel B

VRAM_DDR3 / Channel B

LA-6801P

LA-6801P

LA-6801P

1

1

CV313

CV313

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

1

CV312

CV312

CV503

CV503

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1.0

1.0

47 61Tuesday, Ja nuary 25, 2011

47 61Tuesday, Ja nuary 25, 2011

47 61Tuesday, Ja nuary 25, 2011

1.0

of

of

of

5

+VREFCC_A1 +VREFCC_A2
+VREFDC_Q1

RV151

RV151
243_04 02_1%~OK

243_04 02_1%~OK

MAC9
MAC11
MAC8
MAC25
MAC10
MAC24
MAC22
MAC7
MAC21
MAC6
MAC29
MAC23
MAC28
MAC20
MAC4
MAC14

MAC12
MAC27
MAC26

MAC3

MAC2
MAC0
MAC30
MAC15
MAC13

MAC5

12

QSC1

QSC#1
QSC#2

MDC[0..63]<42>

MAC[0..31]<42 >

DQMC#[7..0]<4 2>

QSC[7..0]<42>

D D

QSC#[7..0 ]<42>

CLKC0<42 >
CLKC0#<42>

C C

UV13

UV13

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

4

+1.5VSDGPU

RV152

RV152
243_04 02_1%~OK

243_04 02_1%~OK

+VREFCC_A1
+VREFDC_Q1

MAC9
MAC11
MAC8
MAC25
MAC10
MAC24
MAC22
MAC7
MAC21
MAC6
MAC29
MAC23
MAC28
MAC20
MAC4
MAC14

MAC12
MAC27
MAC26

CLKC0
CLKC0#

MAC3

MAC2
MAC0
MAC30
MAC15
MAC13

QSC0
QSC3

DQMC#0
DQMC#3DQMC#2 DQMC#6

QSC#0
QSC#3

MAC5

12

MDC15

E3

MDC11

F7

MDC14

F2

MDC10

F8

MDC13

H3

MDC9

H8

MDC12

G2

MDC8

H7

MDC23

D7

MDC19

C3

MDC22

C8

MDC17

C2

MDC20

A7

MDC18

A2

MDC21

B8

MDC16

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

UV14

UV14

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDC4
MDC6
MDC0
MDC2
MDC7
MDC1
MDC5
MDC3

MDC29
MDC24
MDC30
MDC27
MDC28
MDC26
MDC31
MDC25

+1.5VSDGPU

+1.5VSDGPU

3

M8

+VREFDC_Q2

H1

MAC9

N3

MAC11

P7

MAC8

P3

MAC25

N2

MAC10

P8

MAC24

P2

MAC22

R8

MAC7

R2

MAC21

T8

MAC6

R3

MAC29

L7

MAC23

R7

MAC28

N7

MAC20

T3

MAC4

T7

MAC14

M7

MAC12

M2

MAC27

N8

MAC26

M3

MAC18
MAC16
MAC30
MAC15
MAC13

MAC19

QSC4
QSC7QSC2

DQMC#4DQMC#1
DQMC#7

QSC#4
QSC#7

MAC5

12

RV153

RV153

J7
K7
K9

K1
L2

J3
K3
L3

F3

C7

E7

D3

G3

B7

T2

L8

J1
L1

J9
L9

CLKC1<42>
CLKC1#<42 >

243_04 02_1%~OK

243_04 02_1%~OK

2

UV15

UV15

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

1

UV16

UV16

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G164 6E-HC11_FBGA96

K4B1G164 6E-HC11_FBGA96

X76@

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

MDC46

E3

MDC43

F7

MDC47

F2

MDC40

F8

MDC45

H3

MDC42

H8

MDC44

G2

MDC41

H7

MDC53

D7

MDC51

C3

MDC54

C8

MDC49

C2

MDC52

A7

MDC50

A2

MDC55

B8

MDC48

A3

+1.5VSDGPU

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

RV154

RV154
243_04 02_1%~OK

243_04 02_1%~OK

+VREFCC_A2
+VREFDC_Q2

MAC9
MAC11
MAC8
MAC25
MAC10
MAC24
MAC22
MAC7
MAC21
MAC6
MAC29
MAC23
MAC28
MAC20
MAC4
MAC14

MAC12
MAC27
MAC26

CLKC1
CLKC1#
MAC19

MAC18
MAC16
MAC30
MAC15
MAC13

QSC5
QSC6

DQMC#5

QSC#5
QSC#6

MAC5

12

MDC37

E3

MDC32

F7

MDC36

F2

MDC33

F8

MDC38

H3

MDC35

H8

MDC39

G2

MDC34

H7

MDC61

D7

MDC59

C3

MDC60

C8

MDC62

C2

MDC57

A7

MDC58

A2

MDC63

B8

MDC56

A3

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5VSDGPU +1.5VSDGPU+1.5VSDGPU +1.5VSDGPU

B B

1

CV356

CV356

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

+1.5VSDGPU +1.5VSDGPU

12

RV156

RV156

1.33K_04 02_1%~D

1.33K_04 02_1%~D

+VREFDC_Q1 +VREFCC_ A1

12

RV160

RV160

1.33K_04 02_1%~D

1.33K_04 02_1%~D

A A

5

1

1

CV358

CV358

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CV338

CV338

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

1

2

VRAM P/N :
Samsung : SA00 0035700 (S IC D3 64MX16 K4W 1G1646E-HC12 FBGA 96P)
Hynix : SA000032400 (S IC D3 64 MX16 H5TQ1G63BFR-12C FBGA 1.5V )

1

CV359

CV359

CV355

CV355

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

RV155

RV155

1.33K_04 02_1%~D

1.33K_04 02_1%~D

RV159

RV159

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1

1

CV365

CV365

CV364

CV364

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

CV337

CV337

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

12

1

2

4

1

1

CV360

CV360

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CLKC0

1

CV361

CV361

CV362

CV362

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

RV164

RV164
160_04 02_1%

160_04 02_1%

1

1

CV354

CV354

CV363

CV363

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

1

1

CV504

CV504

CV353

CV353

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

+1.5VSDGPU +1.5VSDGPU

RV158

RV158

1.33K_04 02_1%~D

1.33K_04 02_1%~D

RV162

RV162

1.33K_04 02_1%~D

1.33K_04 02_1%~D

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

3

1

CV348

CV348

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CV340

CV340

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

1

2

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

Deciphered Date

Deciphered Date

Deciphered Date

1

CV349

CV349

2

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

1.33K_04 02_1%~D

CV347

CV347

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

12

+VREFDC_Q2CLKC0#

12

1

1

CV350

CV350

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

RV157

RV157

+VREFCC_A2

12

RV161

RV161

2

1

CV351

CV351

CV352

CV352

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CV339

CV339

0.01U_0 402_25V7K~D

0.01U_0 402_25V7K~D

1

2

1

1

CV344

CV344

CV343

CV343

2

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

CLKC1

12

RV167

RV167
160_04 02_1%

160_04 02_1%

CLKC1#

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1

CV346

CV346

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

LA-6801P

LA-6801P

LA-6801P

1

1

CV342

CV342

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

CV345

CV345

2

0.1U_04 02_16V7K~D

0.1U_04 02_16V7K~D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

VRAM_DDR3 / Channel C

VRAM_DDR3 / Channel C

VRAM_DDR3 / Channel C

1

1

CV505

CV505

CV341

CV341

2

2

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1.0

1.0

48 61Tuesday, Ja nuary 25, 2011

48 61Tuesday, Ja nuary 25, 2011

48 61Tuesday, Ja nuary 25, 2011

1.0

of

of

of

5

4

3

2

1

Power block

D D

CPU OTP

Page 59

Turn Off

DC IN

Input
Switch

Page 51

B+

+3VALWP: TDC:4.8A efficiency: 93%
+5VALWP: TDC:6A efficiency: 90%
RT8205E

Always

Page 52

CHARGER
CC:0A~3A

C C

CV:14.8V(8cell)
ISL6251AHAZ-T

Page 51

Battery

DGPU_PWR_EN

B B

+GPU CORE efficiency: 88%
TDC:36.8A
ISL6264CRZ-T

Page 56

+1.8VP: TDC:1.25A
RT8209B efficiency: 88%

+VCCPP: TDC:12.8A
RT8209B efficiency: 82%

+1.5VSDGPUP: TDC:5.6A
RT8209B efficiency: 83%

+1.5VP: TDC:7A
RT8209B efficiency: 84%

SUSP#

Page 54

SUSP#

Page 54

DGPU_PWR_EN

Page 55

SYSON

Page 53

+0.75VSP: TDC:1A

VR_ON

VR_ON

A A

CPU CORE efficiency: 86%
TDC: 52A
ISL95831CRZ-T

GFX CORE efficiency: 85%
TDC: 21.5A
ISL95831CRZ-T

5

Page 57

Page 57

4

+VCCSAP: TDC:4.2A
RT8209B efficiency: 80%

Page 55

+1.5VSP: TDC:1.26A
RT8209B efficiency: 89%

Page 53

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

2

VTTPWRGOOD

RT9026

Page 53

SUSP#

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+3VALW

Compal Electronics, Inc.

POWER BLOCK DIAGRAM

POWER BLOCK DIAGRAM

POWER BLOCK DIAGRAM

LA-6801P

LA-6801P

LA-6801P

49 61Tuesday, January 25, 2011

49 61Tuesday, January 25, 2011

49 61Tuesday, January 25, 2011

1

1.0

1.0

1.0

of

of

of

5

PL1

PL1

BLM18BD102SN1D_0603~D

BLM18BD102SN1D_0603~D

12

PJDCIN

PJDCIN

@

@

9

D D

C C

B B

8

7

6

DETECT_PSID

GND_4

GND_3

GND_2

GND_1

FOX_JPD113D-DB570-7F

FOX_JPD113D-DB570-7F

BATT+

51ON#<29>

2

1

DETECT

DC+_1

DC+_2

DC-_1

DC-_2

3

@

@

PD4

PD4
SM24_SOT23

SM24_SOT23

RLS4148_LL34-2

RLS4148_LL34-2

100K_0402_5%

100K_0402_5%

PR23

PR23

22K_0402_5%

22K_0402_5%

1 2

5

1

2

3

4

PR11

PR11

1 2

100K_040 2_1%

100K_040 2_1%

PR13

PR13

15K_0402 _1%

15K_0402 _1%

1 2

PD7

PD7

12

Pre_V

Pre_V

12

12

PR22

PR22

PC9

PC9

0.22U_06 03_25V7K~D

0.22U_06 03_25V7K~D

ADPIN

12

PC1

PC1

100P_040 2_50V8J~D

100P_040 2_50V8J~D

PR8

PR8

@

@

0_0402_5%

0_0402_5%

2

B

B

PQ6

PQ6

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

2

12

1 2

D

D

1 3

E

E

13

32.7

32.7

DETECT_PSIDPSID

PL2

PL2

C8B BPH 853025_2P

C8B BPH 853025_2P

1 2

PC2

PC2

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

33_0402_5%

33_0402_5%

S

S

1 2

PQ4

PQ4
FDV301N_NL_SOT23-3~D

FDV301N_NL_SOT23-3~D

G

G

2

C

C

PQ5

PQ5
MMST3904-7-F_SOT323~D

MMST3904-7-F_SOT323~D

3 1

VIN

PD6

PD6
RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

PR18

PR18

68_1206_5%

68_1206_5%

12

PC10

PC10

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

4

PR10

PR10

PR19

PR19

12

68_1206_5%

68_1206_5%

3

VIN

PreCHG

PR1

@PR1

VIN

12

12

PC4

PC4

PC3

PC3

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

100P_040 2_50V8J~D

100P_040 2_50V8J~D

12

PR12

PR12

10K_0402 _1%

10K_0402 _1%

PR14

PR14

1 2

10K_0402_1%

10K_0402_1%

+3VALW

PR9

PR9

2.2K_0402 _5%

2.2K_0402 _5%

PD5

PD5

@

@

1 2

+5VALW

DA204U_SOT32 3~D

DA204U_SOT32 3~D

ACOFF<31,51>

+5VALW

PS_ID <31>

2

3

1

PSID_DISABLE#

+5VALW

2

3

PD3

PD3

DA204U_SOT32 3~D

DA204U_SOT32 3~D

1

+5VALW

Dyn_Turbo_Sel<31>

EMC_THERM#<51>

VS

VR_HOT#<31,57>

@

1K_1206_5%

1K_1206_5%

1 2

PR2

@PR2

@

1K_1206_5%

1K_1206_5%

1 2

PR3

@PR3

@

1K_1206_5%

1K_1206_5%

1 2

PR6

@PR6

@

1K_1206_5%

1K_1206_5%

1 2

PR17

@PR17

@

0_0402_5%

0_0402_5%

12

PR24

@PR24

@

0_0402_5%

0_0402_5%

12

PR25

PR25
0_0402_5%

0_0402_5%

12

add 01/06
design change

PD2

@PD2

@

2

3

RB715F_SOT323-3

RB715F_SOT323-3

1

10K_0402_1%

10K_0402_1%

D

D

S

S

PD1

@PD1

@

12

RLS4148_LL34-2

RLS4148_LL34-2

2

+3VALW

PR16

PR16

13

2

G

G

PQ12

PQ12
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

@

@

12

2

12

PR4

PR4

13

12

PR5

PR5

@

@

470K_040 2_5%

470K_040 2_5%

PQ2

@PQ2

@

DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

1

PQ1

@ PQ1

@

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

470K_040 2_5%

470K_040 2_5%

2

PR26

@PR26

@

0_0402_5%

0_0402_5%

12

VL

PC23

PC23

PU1A

PU1A

8

LM393DR_SO8

LM393DR_SO8

3

P

+

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

0

2

-

G

4

2

12

PR7

@PR7

@

470K_0402_5%

470K_0402_5%

13

@PQ3

@

B+

13

PQ3
DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PC8

PC8

@

@

12

PC7

PC7

@

@

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

0_0402_5%

0_0402_5%
PR21

PR21

PR20

PR20
0_0402_5%

0_0402_5%

del 12/13
design change

12

12

1

ADP_I <31,51>

AC_SEL <31>

modify 10/07
design change

PU2

PU2

@

PBJ1

PBJ1

1
2

SP020009Z0L

SP020009Z0L

CONN@

CONN@

@

MAX1615EUK+_SOT23-5~D

MAX1615EUK+_SOT23-5~D

IN

3

OUT

#SHDN

4

5/3+

GND

2

+RTCBATT

1
2

1

5

+CHGRTC

12

PC11

PC11

@

@

4.7U_060 3_6.3V6K~D

4.7U_060 3_6.3V6K~D

A A

MOLEX_53261-0271~D

MOLEX_53261-0271~D

5

+RTCBATT

PR27

PR27

@

@

1 2

200_0805_5%

200_0805_5%

modify 10/21
for ME request

4

12

PC12

PC12

@

@

1U_0603_ 25V6-K~D

1U_0603_ 25V6-K~D

revise 9/17
reduce S5 loss

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PWR-DCIN / Vin Detector

PWR-DCIN / Vin Detector

PWR-DCIN / Vin Detector

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

1

50 61Tuesday, January 25, 2011

50 61Tuesday, January 25, 2011

50 61Tuesday, January 25, 2011

of

of

of

1.0

1.0

1.0

Iada=0~7.693A(1 50W/19.5V=7.693 A)

A

ADP_I = 19.9*Ia dapter*Rsense

PQ101

PQ101

SI4459ADY-T1-GE3_SO8

VIN

1 1

12

PR105

PR105
200K_0402_1%

200K_0402_1%

V1

2

61

D

D

2

G

G

PQ108A

PQ108A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

S

S

2 2

PACIN<45>

ACOFF<31,50>

3 3

CP mode

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
Vaclim=2.39*((6.98K//152K)/((11.5K//152K)+(6.98K//152K)))

SI4459ADY-T1-GE3_SO8

8
7

5

2

13

PQ105

PQ105
DTC115EUA_SC70 -3

DTC115EUA_SC70 -3

PACIN

1 2

DTC115EUA_SC70 -3

DTC115EUA_SC70 -3

ACOFF

1 3

PQ104

PQ104
DTA144EUA_SC70 -3

DTA144EUA_SC70 -3

PR122

PR122

47K_0402_1%

47K_0402_1%

PQ113

PQ113

2

CP = 90%*Iada ; CP = 6.92A

PQ102

PQ102

SI4459ADY-T1-GE3_SO8

SI4459ADY-T1-GE3_SO8

1
2
3 6

4

PR106

PR106
200K_0402_1%

200K_0402_1%

12

6251VDD

PR113

PR113
150K_0402_1%

150K_0402_1%

34

D

D

PQ108B

PQ108B
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

S

S

PR126

PR126

147K_0402_1%

147K_0402_1%

12

PR128

PR128

100K_0402_1%

100K_0402_1%

+3VALW

PR143

PR143

@

@

10K_0402_1%

10K_0402_1%

1 2

2

G

G

PC133

PC133

1 2

@

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

FSTCHG<31>

revise 10/25

12

4

13

P2

1
2
36

12

12

PC106

PC106

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

5

G

G

IREF<31>

CP_SEL<31>

reserve 12/07
CP point select

8
7

5

1 2

PC101

PC101

5600P_0402_25V 7K~D

5600P_0402_25V 7K~D

PR114 0_0402_5%P R114 0_0402_5%

1 2

1 2

PC115

PC115

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

ADP_I<31,50>

12

PC120

PC120

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1 2

PR142

@PR142

@

4.53K_0402_1%

4.53K_0402_1%

13

D

D

PQ115

PQ115
SSM3K7002FU_SC 70-3

SSM3K7002FU_SC 70-3

@

@

S

S

6251VREF

add 10/ 19
for EMI request

P3

PD103 1SS355_ SOD323-2PD10 31 SS355_SOD323-2

1 2

PR112

PR112

10K_0402_5%

10K_0402_5%

1 2

PC110

PC110

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PC114 6800P_0402_2 5V7K~DP C114 680 0P_0402_25V7K~D

1 2

PR120 10K_0402_1%P R120 10K_0402_1 %

1 2

1 2

PC117

PC117

100P_0402_50V 8J~D@

100P_0402_50V 8J~D@

PC118

PC118

1 2

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PR129

PR129

6251VREF

1 2

11.5K_0402_1%

11.5K_0402_1%

CHGVADJ<31>

1

2

CC=3.3A

IREF=1*Icharge

IREF=0.25V~3.3V

4 4

BATT Type Charging Voltage

Normal 4S LI-ON Ce lls

(0x15)

14800mV

A

CV mode

14.80V

CHGVADJ CV mode

0V

3.99V per cell

1.93V

3.3V

4.2V per cell

4.35V per cell

PR101

PR101

0.01_2512_1%

0.01_2512_1%

EMC_SENSE+

ACSETIN

12

PR115

PR115

100_0402_1%

100_0402_1%

1 2

6251VREF

6251aclim

12

PR131

PR131

6.98K_0402_1%

6.98K_0402_1%

PR132

PR132

25.5K_0402_1%

25.5K_0402_1%

1 2

B

PL102

12

PC126

PC126

4

10U_0805_25V6K~D

10U_0805_25V6K~D

3

EMC_SENSE-

6251VDD

12

PC107

PC107

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

12

6251_EN CSON

100K_0402_1%

100K_0402_1%

PR123

PR123

6251VREF

PR133

PR133

43.2K_0402_1%

43.2K_0402_1%

1 2

47K_0402_1%

47K_0402_1%

B

12

12

PC129

PC129

PC128

PC128

@

@

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

swap 12 /13
design change

PD102

RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1

2

3

4

5

6

7

8

9

10

11

12

PR134

PR134

ACPRN

PD102

PU101

PU101

VDD

DCIN

ACSET

ACPRN

EN

CSON

CELLS

CSOP

ICOMP

CSIN

VCOMP

CSIP

PHASE

ICM

UGATE

VREF

CHLIM

BOOT

ACLIM

VDDP

VADJ

LGATE

PGND

GND

ISL6251AHAZ-T_QSOP24

ISL6251AHAZ-T_QSOP24

12

2

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

B+

VIN

1 2
12

PR110

PR110

10_1206_5%

10_1206_5%

24

23

22

21

20

19

18

17

16

15

14

13

6251VDD

12

13

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

1 2

@PJP 101

@

2

PR102

PR102

1 2

0_0402_5%

0_0402_5%

12

PC108

PC108

PC111

PC111

1000P_0402_50V 7K~D

1000P_0402_50V 7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

DCIN

ACPRN

PC113

PC113

0.047U_0603_16V7K~D

0.047U_0603_16V7K~D

1 2

PC116

PC116

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

LX_CHG

DH_CHG

2.2_0603_5%

2.2_0603_5%

BST_CHG

1 2

6251VDDP

DL_CHG

PR135

PR135
10K_0402_1%

10K_0402_1%

PQ114

PQ114
DTC115EUA_SC70 -3

DTC115EUA_SC70 -3

PL102

PJP101

112

JUMP_43X118

JUMP_43X118

PR104

@PR104

@

1 2

12

0_0402_5%

0_0402_5%

PR107

PR107

191K_0402_1%

191K_0402_1%

ACSETIN

12

PR111

PR111

15K_0402_1%

15K_0402_1%

12

ACPRN <52>

20_0402_5%

20_0402_5%

1 2

1 2

PR118

PR118

20_0402_5%

20_0402_5%

12

PR119

PR119
20_0402_5%

20_0402_5%

1 2

2_0402_5%

2_0402_5%

PR127

PR127

PC127

PC127

1 2

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

PR136

PR136

10K_0402_1%

10K_0402_1%

1 2

PACIN

12

PR137

PR137

14.3K_0402_1%

14.3K_0402_1%

CSIN

CSIP

PreCHG

PR116

PR116

PR121

PR121

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

BST_CHGA

12

PD105

PD105

RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PR130

PR130

4.7_0603_5%

4.7_0603_5%

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

add 01/ 20
for EMI request

12

PC103

PC103

PC102

PC102

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

CSOP

PC119

PC119

12

6251VDD

ACIN <31,34>

Compal Secret Data

Compal Secret Data

Compal Secret Data

C

12

PC104

PC104

C

CHG_B+

12

12

PC105

PC105

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
2200P_0402_50V 7K~D

2200P_0402_50V 7K~D

578

4

578

4

+5VS

Dec iphered Date

Dec iphered Date

Dec iphered Date

DTC115EUA_SC70 -3

DTC115EUA_SC70 -3

6

PQ111

PQ111
AO4466L_SO8

AO4466L_SO8

10UH_PCMB104T-100MS_6A_20%

10UH_PCMB104T-100MS_6A_20%

123

PQ112

PQ112
AO4466L_SO8

AO4466L_SO8

123

EMC_SENSE-

EMC_SENSE+

PC131

PC131

12

12

1 2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

6

PQ103

PQ103
SI4459ADY-T1-GE3_SO8

SI4459ADY-T1-GE3_SO8

1
2
3 6

4

PR108

PR108

10K_0402_1%

10K_0402_1%

1 2
13

PQ106

PQ106

PR117

PR117

100K_0402_1%

100K_0402_1%

V1

ACPRN

PL101

PL101

1 2

PR125

PR125

4.7_1206_5%

4.7_1206_5%

PC123

PC123

680P_0402_50V 7K~D

680P_0402_50V 7K~D

3

5

PC132

PC132

1 2

.1U_0402_16V7K~D

.1U_0402_16V7K~D

8
7

5

PR103

PR103

47K_0402_1%

47K_0402_1%

1 2

del 12/ 21
design change

2

PC109

PC109

@

@

2200P_0402_50V 7K~D

2200P_0402_50V 7K~D

12

CHGCHG

1

2

2

N/C

SMCLK

SENSE-

SENSE+4SMDATA

VDD

ALERT#

THERM#

ADDR_SEL

6

7

12

PR138

PR138

20K_0402_1%

20K_0402_1%

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

D

VIN

PD101

@PD 101

@

1 2

1SS355_SOD32 3-2

1SS355_SOD32 3-2

BAT_DIS_G

PD104

@PD 104

@

1 2

1SS355_SOD32 3-2

1SS355_SOD32 3-2

12

13

D

D

PQ110

PQ110

2

G

G

S

S

@

@

0.02_1206_1%

0.02_1206_1%

4

3

PU102

PU102
EMC1701-2-AIZL-TR_MSOP10

EMC1701-2-AIZL-TR_MSOP10

1

10

9

8

GND

slave ad dress : 0101101
please p lacemne t near R -sense

Compal Electronics, Inc.

Title

Title

Title

PWR-CHARGER

PWR-CHARGER

PWR-CHARGER

LA-6801P

LA-6801P

LA-6801P

PR109

@PR109

@

200K_0402_1%

200K_0402_1%

1 2

12

PC112

PC112

@

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

del 12/ 13
design change

PR124

PR124

PC124

PC124

1 2

PR141

@PR141

@

0_0402_5%

0_0402_5%

12

12

PR139

PR139

PR140

PR140

@

@

@

@

10K_0402_1%

10K_0402_1%

10K_0402_1%

10K_0402_1%

+3VS

ACOFF

13

D

D

2

G

G

PQ107

@

PQ107

@

S

S

SSM3K7002FU_SC 70-3

SSM3K7002FU_SC 70-3

12

PC121

PC121

10U_0805_25V6K~D

10U_0805_25V6K~D

D

VIN

PACIN

12

PC125

PC125

10U_0805_25V6K~D

10U_0805_25V6K~D

modify 10/06
customer request

PCH_SMLCLK <14,31>

PCH_SMLDATA <14,31>

12

12

PC122

PC122

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

10U_0805_25V6K~D

EMC_ALERT# <31>

EMC_THERM# <50>

51 61Tuesday, January 25, 2011

51 61Tuesday, January 25, 2011

51 61Tuesday, January 25, 2011

of

of

of

BATT+

1.0

1.0

1.0

5

4

3

2

1

2VREF_RT8205E

Note:
Use TPS51125 IC can remove RTC refernece LDO

D D

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

B+

PC202

PC202

@

@

680P_0402_50V 7K~D

680P_0402_50V 7K~D

C C

3.3VALWP
TDC 4.8 A
Peak Current 8.93 A
OCP current 10.67 A

+3VALWP +3VALW

B B

A A

Use TPS51427 IC must keep RTC refernece LDO

add 01/ 20
for EMI request

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

PL201

PL201

1 2

12

PC222

PC222

@

@

10U_0805_25V6K~D

10U_0805_25V6K~D

12

PL204

PL204

1 2

PJP205

PJP205

2

112

JUMP_43X118@

JUMP_43X118@

12

PC203

PC203

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

reserve 01/21

+3VALWP

1

PC214

PC214

2

330U_D_6.3VM_R18M~D

330U_D_6.3VM_R18M~D

PQ205A

PQ205A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

2

2

PJP201

PJP201

JUMP_43X118@

JUMP_43X118@

PJP202

PJP202

JUMP_43X118@

JUMP_43X118@

112

112

MAINPWON<30,59>

1 2

VS

PR218

PR218
100K_0402_1%

100K_0402_1%

ACPRN<51>

EC_ON<29,31>

1 2

PR219

PR219

200K_0402_1%

200K_0402_1%

13

2

13

2

G

G

PQ208

PQ208
DTC115EUA_SC70 -3

DTC115EUA_SC70 -3

RT8205E_B+

12

12

PC204

PC204

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D

4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D

+

+

VL

PR217

PR217

1 2

0_0402_5%

0_0402_5%

D

D

S

S

PQ207

PQ207
SSM3K7002FU_SC 70-3

SSM3K7002FU_SC 70-3

PC205

PC205

PC206

PC206

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

PL202

PL202

1 2

PR209

PR209

PR216

PR216
100K_0402_1%

100K_0402_1%

12

PR220

PR220

40.2K_0402_1%

40.2K_0402_1%

12

2200P_0402_50V 7K~D

2200P_0402_50V 7K~D

12

4.7_1206_5%

4.7_1206_5%

12

PC215

PC215

680P_0402_50V 7K~D

680P_0402_50V 7K~D

61

D

D

S

S

2

12

PC221

PC221

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

123

123

2

G

G

12

6

578

PQ201

PQ201
AO4466L_SO8

AO4466L_SO8

4

786

5

4

PQ203

PQ203
SI4634DY-T1-E3_SO8

SI4634DY-T1-E3_SO8

5

13

B+

VS

Pre_V

34

D

D

G

G

S

S

PQ206

PQ206
DTC115EUA_SC70 -3

DTC115EUA_SC70 -3

Typ: 175mA

+3VLP

12

PC211

PC211

4.7U_0805_10V6K

4.7U_0805_10V6K

1 2

PC212

PC212

.1U_0402_16V7K~D

.1U_0402_16V7K~D

MAINPWON<30,59>

PR211

PR211

@

@

499K_0402_1%

499K_0402_1%

1 2

PR212

PR212

499K_0402_1%

499K_0402_1%

1 2

PR215

PR215

499K_0402_1%@

499K_0402_1%@

1 2

ENTRIP2ENTRIP1

PQ205B

PQ205B
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

PR207

PR207

1 2

2.2_0603_5%

2.2_0603_5%

1 2

PR221

@PR221

@

0_0402_5%

0_0402_5%

reserve 10/06

12

PR213

PR213

reserve 10/27

13K_0402_1%

13K_0402_1%

1 2

20K_0402_1%

20K_0402_1%

1 2

PR205

PR205

71.5K_0402_1%

71.5K_0402_1%

1 2

BST_3V

UG_3V

LX_3V

LG_3V

12

PC218

PC218

100K_0402_1%

100K_0402_1%

1U_0603_10V6K~D

1U_0603_10V6K~D

2VREF_RT8205E

25

10

11

12

PR201

PR201

PR203

PR203

7

8

9

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

PR222

PR222

1 2

PC201

PC201

1U_0603_10V6K~D

1U_0603_10V6K~D

ENTRIP2

5

6

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

1 2

PR214

PR214

0_0402_5%@

0_0402_5%@

0_0402_5%

0_0402_5%

RT8205E_B+

12

PR202

PR202

30K_0402_1%

30K_0402_1%

1 2

PR204

PR204

20K_0402_1%

20K_0402_1%

1 2

PR206

PR206

88.7K_0402_1%

88.7K_0402_1%

ENTRIP1

1 2

2

3

1

4

FB1

REF

TONSEL

ENTRIP1

24

VO1

23

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

15

12

PC219

PC219

12

4.7U_0805_10V6K

4.7U_0805_10V6K

PC220

PC220

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

PU201

PU201
RT8205EGQW_WQFN24_4X4

RT8205EGQW_WQFN24_4X4

VL

Typ: 175 mA

RT8205E_B+

PC207

PC207

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

PR208

PR208

2.2_0603_5%

2.2_0603_5%

1 2

12

12

PC208

PC208

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

SPOK <59>

PC213

PC213
.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

12

PC209

PC209

2200P_0402_50V 7K~D

2200P_0402_50V 7K~D

SI4634DY-T1-E3_SO8

SI4634DY-T1-E3_SO8

12

PC210

PC210

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

6

578

4

PQ202

PQ202
AO4466L_SO8

AO4466L_SO8

123

4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D

4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D

1 2

12

786

5

PR210

PR210

4.7_1206_5%

4

PQ204

PQ204

+5VALWP +5VALW

5VALWP
TDC 6A
Peak Current 11.24 A
OCP current 13.24 A

4.7_1206_5%

12

PC216

PC216

123

680P_0402_50V 7K~D

680P_0402_50V 7K~D

PJP203

PJP203

2

112

JUMP_43X118@

JUMP_43X118@
PJP204

PJP204

2

112

JUMP_43X118@

JUMP_43X118@

PL203

PL203

+5VALWP

1

+

+

PC217

PC217

2

330U_D_6.3VM_R18M~D

330U_D_6.3VM_R18M~D

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

5

4

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Title

Title

Title

3VALWP/5VALWP

3VALWP/5VALWP

3VALWP/5VALWP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

2

Date: Sheet

52 61Tuesday, January 25, 2011

52 61Tuesday, January 25, 2011

52 61Tuesday, January 25, 2011

1

1.0

1.0

1.0

of

of

of

A

267K_0402_1%

1 1

SYSON<27,31,33>

+5VALW

PR302

PR302

0_0402_5%

0_0402_5%

1 2

PR306

PR306

10_0603_5%

10_0603_5%

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

PC316

PC316

12

PC308

PC308

.1U_0402_16V7K~D

.1U_0402_16V7K~D

12

12

PR315

PR315

12

10K_0402 _5%

10K_0402 _5%

DMN66D0LDW-7 2N SOT363-6

DMN66D0LDW-7 2N SOT363-6

PQ303A

PQ303A

12

12

EN_1.5VS

1M_0402_1%

1M_0402_1%

2

PR322

PR322

12

PR312

PR312
75K_0402_1%

75K_0402_1%

61

PC325

PC325

DMN66D0LDW-7 2N SOT363-6

DMN66D0LDW-7 2N SOT363-6

0.01U_04 02_25V7K~D

0.01U_04 02_25V7K~D

PQ304A

PQ304A

2

12

12

PC327

PC327

10K_0402 _5%

10K_0402 _5%

1.5VS_PIN

PC330

PC330
10U_0805_10V6K~D

10U_0805_10V6K~D

PR326

PR326

1 2

add 12/13
for EE request

12

PR318

PR318
150K_0402_1%

150K_0402_1%

61

DMN66D0LDW-7 2N SOT363-6

DMN66D0LDW-7 2N SOT363-6

0.01U_04 02_25V7K~D

0.01U_04 02_25V7K~D

12

PC334

PC334

@

@

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

10

9

8

5

2 2

1.5VDDR_VID0<16>

3 3

+5VALW

4 4

PR314

PR314
10K_0402_5%

10K_0402_5%

PR320

PR320
10K_0402_5%

10K_0402_5%

1.5VDDR_VID1<16>

add 12/20
design change

+3VALW

12

PR316

PR316
10K_0402_5%

10K_0402_5%

1 2

@

@

+3VALW

12

PR321

PR321
10K_0402_5%

10K_0402_5%

1 2

PR323

@PR323

@

10K_0402_5%

10K_0402_5%

add 12/20
design change

@ PJP306

@

2

PR317

PR317

10K_0402 _5%

10K_0402 _5%

PJP306

JUMP_43X79

JUMP_43X79

SUSP#<10,18,31,33,54>

+3VALW

12

PR313

PR313
10K_0402_5%

10K_0402_5%

3

PQ303B

PQ303B

5

12

12

4

PC326

PC326

DMN66D0LDW-7 2N SOT363-6

DMN66D0LDW-7 2N SOT363-6

0.01U_04 02_25V7K~D

0.01U_04 02_25V7K~D

+3VALW

12

PR319

PR319
10K_0402_5%

10K_0402_5%

3

PQ304B

PQ304B

5

12

PC328

PC328

0.01U_04 02_25V7K~D

0.01U_04 02_25V7K~D

12

PC329

PC329
10U_0805_10V6K~D

10U_0805_10V6K~D

PR325

PR325
0_0402_5%

0_0402_5%

4

1 2

12

112

A

267K_0402_1%

1 2

PR307

PR307

1 2

10K_0402_1%

10K_0402_1%

PR308

PR308
10K_0402_1%

10K_0402_1%

4

2

LX

PVIN

PG

3

LX

PVIN

SVIN

6

FB

EN

TP

NC

NC

7

1

11

PU303

PU303
RT8061AZQW_WDFN10_3X3

RT8061AZQW_WDFN10_3X3

10.5K_0402_1%

10.5K_0402_1%

PR328

PR328

B

PR301

PR301

1

14NC15

PU301

PU301

2

TON

EN/DEM

3

VOUT

4

VFB=0.75V

VDD

5

FB

6

PGOOD

GND7PGND

BST_1.5V

DH_1.5V

13

BOOT

UGATE

LX_1.5V

12

PHASE

1 2

11

CS

10

VDDP

9

LGATE

RT8209MGQW_WQFN14_3P5X3P5

RT8209MGQW_WQFN14_3P5X3P5

8

DDR GPIO Output Voltage Selection

bit2 = 1.5DDR_VID0 DDR Voutbit1 = 1.5DDR_VID1

0

0

1

1 1

+1.5VP

+0.75VSP

PL303

PL303

1UH_PCMC063T-1R0MN_11A_20%

12

1UH_PCMC063T-1R0MN_11A_20%

1 2

PR324

PR324

4.7_1206_5%

4.7_1206_5%

1 2

1.5VS_SNB

PC331

PC331
680P_0603_50V7K~D

680P_0603_50V7K~D

1 2

1 2

PR327

PR327

15.8K_0402_1%

15.8K_0402_1%

12

PC335

PC335
68P_0402_50V8J~D

68P_0402_50V8J~D

B

LX_1.5VS

1.5VS_FB

PR305

PR305

6.49K_0402_1%

6.49K_0402_1%

0

1

0

12

PC321

PC321

2.2_0603_5%

2.2_0603_5%

1 2

PJP304

PJP304

112

@

@

JUMP_43X79

JUMP_43X79

4.7U_080 5_6.3V6K~D

4.7U_080 5_6.3V6K~D

PR303

PR303

12

DL_1.5V

@

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

BST_1.5V-1

+5VALW

12

PC313

PC313

4.7U_0805_10V6K

4.7U_0805_10V6K

1.65V

1.6V

1.55V

1.5V (Default)

2

12

PC317

PC317

PC322

PC322

4.7U_080 5_6.3V6K~D

4.7U_080 5_6.3V6K~D

12

PC332

PC332

22U_0805 _6.3VAM~D

22U_0805 _6.3VAM~D

C

1.5V_B+

12

PC307

PC307

1 2

4

678

35241

786

5

PQ301

PQ301
SI4172DY-T1-GE3_SO8

SI4172DY-T1-GE3_SO8

PQ302

PQ302
SI4634DY-T1-E3_SO8

SI4634DY-T1-E3_SO8

123

12

PC303

PC303

PC301

PC301

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

2200P_04 02_50V7K~D

2200P_04 02_50V7K~D

PL302

PL302

1UH_PCMB062D-1R0MS_9A_20%

1UH_PCMB062D-1R0MS_9A_20%

1 2

12

PR304

PR304

4.7_1206_5%

4.7_1206_5%

12

PC314

PC314

680P_0402_50V7K~D

680P_0402_50V7K~D

12

12

PC305

PC305

PC306

PC304

PC304

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

PC306

@

@

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

12

12

PC310

PC310

PC309

PC309

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

10U_0805 _6.3V6M~D

10U_0805 _6.3V6M~D

Low Side MOS RDS(on)=5.5m ohm(Typ),6.7m ohm(Max)

+3VALW

12

PR309

PR309

1.2K_0402_1%

1.2K_0402_1%

12

PR310

PR310
1K_0402_1%

1K_0402_1%

12

PC318

PC318

4.7U_080 5_6.3V6K~D

4.7U_080 5_6.3V6K~D

4.7U_080 5_6.3V6K~D

4.7U_080 5_6.3V6K~D

@

@

12

PC333

PC333

22U_0805 _6.3VAM~D

22U_0805 _6.3VAM~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

PU302

PU302

RT9026_MSOP10

RT9026_MSOP10

1

2

3

5

VDDQSNS

VLDOIN

VTT

VTTSNS

PGND

4

VTTREF

11

10

VIN

8

GND

6

9

S5

7

S3

GND

12

PC323

PC323

.1U_0402_16V7K~D

.1U_0402_16V7K~D

+1.5VSP

+1.5VSP
Imax=1.26A
Ipeak=1.8A
Iocp(minimum)=4A

Com pal Secret D ata

Com pal Secret D ata

C

Com pal Secret D ata

Deciphered Date

Deciphered Date

Deciphered Date

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

12

PC320

PC320
.1U_0402_16V7K~D

12

.1U_0402_16V7K~D

SUSP# < 10,18,31,33,54>

PJP307

PJP307

112

@

@

JUMP_43X79

JUMP_43X79

PR311

PR311

10K_0402_5%

10K_0402_5%

+1.5VSP +1.5VS

modify 10/20
for EMI request

PL301

PL301

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

1 2

PJP301

PJP301

112

@

@

12

JUMP_43X79

JUMP_43X79

1

1

+

+

+

+

PC311

PC311

PC312

PC312

2

2

220U_D2_ 2VY_R15M

220U_D2_ 2VY_R15M

220U_D2_ 2VY_R15M

220U_D2_ 2VY_R15M

@

@

1.5VP
TDC 7 A
Peak Current 10 A
OCP current 12 A

+3VALW

12

PC319

PC319

1U_0603_ 10V6K~D

1U_0603_ 10V6K~D

2

D

B+

12

PC302

@PC302

@

2

680P_0402_50V7K~D

680P_0402_50V7K~D

+1.5VP

PJP302

PJP302

2

112

@

@

JUMP_43X118

JUMP_43X118

PJP303

PJP303

2

112

@

@

JUMP_43X118

JUMP_43X118

PJP305

PJP305

2

112

@

@

JUMP_43X79

JUMP_43X79

Compal Electronics, Inc.

Title

Title

Title

PWR-+1.5VP/+0.75VSP/+1.5VSP

PWR-+1.5VP/+0.75VSP/+1.5VSP

PWR-+1.5VP/+0.75VSP/+1.5VSP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

+0.75VS+0.75VSP

D

+1.5V+1.5VP

53 61Tuesday, January 25, 2011

53 61Tuesday, January 25, 2011

53 61Tuesday, January 25, 2011

of

of

of

1.0

1.0

1.0

5

VCCPP
TDC 12.8 A
Peak Current 18.3 A
OCP current 22.4 A

D D

C C

Low Side MOS RDS(on)=2.6m ohm(Typ),3.2m ohm(Max)

PR403

PR403

0_0402_5%

0_0402_5%

+5VALW

100K_040 2_5%

100K_040 2_5%

12

PC417

PC417

@

@

1 2

PR408

PR408

10_0603_5%

10_0603_5%

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

G

G

2

S

S

PQ403

@

PQ403

@

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

0.01U_04 02_16V7K~D

0.01U_04 02_16V7K~D

13

D

D

SUSP#<10,18,31,33,53>

+5VS

PR409

PR409

10K_0402_5%@

10K_0402_5%@

PR411

1 2

PR411

10K_0402_5%

10K_0402_5%

@

@

12

12

PR413

PR413

@

@

PR410

@ PR410

@

1 2

0_0402_5%

0_0402_5%

VCCP_PWRCTRL<8>

PC415

PC415

PR414

PR414

35.7K_0402_1%

35.7K_0402_1%

1 2

@

@

4

12

PC407

@PC407

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

12

revise 01/11
EE request

4.12K_0402_1%

4.12K_0402_1%

1 2

12

PR416

PR416

10K_0402_1%

10K_0402_1%

PR415

PR415

267K_0402_1%

267K_0402_1%

1 2

VTTPWRGOOD<55>

PR402

PR402

3

4

PC408

BST_VCCP-1

12

PC408

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

+5VALW

PC414

PC414

4.7U_0805_10V6K

4.7U_0805_10V6K

PR418

PR418

0_0402_5%

0_0402_5%

1 2

VCCP_AGND

PR404

1

@

@

1 2

PR420

PR420
10K_0402_1%

10K_0402_1%

EN/DEM

VFB=0.75V

GND7PGND

VCCP_AGND

PR412

PR412
0_0402_5%

0_0402_5%

1 2

8

14NC15

13

BOOT

UGATE

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209MGQW_WQFN14_3P5X3P5

RT8209MGQW_WQFN14_3P5X3P5

PR417

PR417

1 2

10K_0402_1%

10K_0402_1%

PR426

@PR426

@

1 2

10K_0402_1%

10K_0402_1%

reserve 01/11

PU401

PU401

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

BST_VCCP

DH_VCCP

LX_VCCP

+3VS

+3VALW

2.2_0603_5%

2.2_0603_5%

1 2

PR406

PR406

1 2

5.9K_0402_1%

5.9K_0402_1%

PR404

DL_VCCP

VSSIO_SENSE<9>

PC402

PC402

5

3 5

241

PR419

PR419

0_0402_5%

0_0402_5%

VCCP_B+

12

PC403

PC403

2200P_04 02_50V7K~D

2200P_04 02_50V7K~D

PQ401

PQ401
AON6414AL-1N_DFN

AON6414AL-1N_DFN

123

PQ402

PQ402

AON6702L- 1N_DFN8

AON6702L- 1N_DFN8

12

2

12

12

12

PC404

PC404

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

0.42UH_FDUE0640-R42M_20.2A_20%~D

0.42UH_FDUE0640-R42M_20.2A_20%~D

12

PC405

PC405

PC406

PC406

@

@

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

PL402

PL402

12

12

PR405

PR405

4.7_1206_5%

4.7_1206_5%

12

PC411

PC411
680P_0402_50V7K~D

680P_0402_50V7K~D

10_0402_5%

10_0402_5%

VCCIO_SENSE <9>

PR407

PR407

PL401

@ PL401

@

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

PJP401

PJP401

2

JUMP_43X118

JUMP_43X118

@

@

1

+

+

2

PC409

PC409

1 2

330U_D2_ 2.5VY_R9M

330U_D2_ 2.5VY_R9M

1

revise 10/25
design change

12

PC401

@PC401

@

112

680P_0402_50V7K~D

680P_0402_50V7K~D

CPU_IN_B+

CPU_VIN-< 58> CPU_VIN+<58>

+VCCPP

12

12

PC413

PC413

PC410

PC410

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

10U_0805 _6.3V6M~D

10U_0805 _6.3V6M~D

Output voltage is adjusted to 1.06V
from EE requirement at 2011/01/11

PJP402

PJP402

2

112

JUMP_43X118

JUMP_43X118

@

@

2

@

@

PJP403

PJP403

JUMP_43X118

JUMP_43X118

+VCCP+VCCPP

112

PJP406

PJP406

2

112

@

@

JUMP_43X118

JUMP_43X118

0.01_1206_1%

0.01_1206_1%

1

2

+1.05VS

PR401

PR401

4

B+

3

PU402

PU402
RT8061AZQW_WDFN10_3X3

RT8061AZQW_WDFN10_3X3

PJP404

@PJP404

@

+5VALW

B B

2

JUMP_43X79

JUMP_43X79

SUSP#<10,18,31,33,53>

112

12

PC419

PC419
10U_0805_10V6K~D

10U_0805_10V6K~D

1 2

PR422

PR422
0_0402_5%

0_0402_5%

12

PC420

PC420
10U_0805_10V6K~D

10U_0805_10V6K~D

EN_1.8VS

PR424

PR424

1M_0402_1%

1M_0402_1%

1.8VS_PIN

12

1 2

A A

5

4

3

4

10

PVIN

9

PVIN

8

SVIN

5

EN

TP

11

PC424

PC424

@

@

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

PG

NC

7

2

LX

3

LX

6

FB

NC

1

14.3K_0402_1%

14.3K_0402_1%

LX_1.8VS

1.8VS_FB

1 2

12

PR425

PR425

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

PL403

PL403

1UH_PCMC063T-1R0MN_11A_20%

1UH_PCMC063T-1R0MN_11A_20%

1 2

PR421

PR421

4.7_1206_5%

4.7_1206_5%

1 2

1.8VS_SNB

PC421

PC421
680P_0603_50V7K~D

680P_0603_50V7K~D

1 2

PR423

PR423

28.7K_0402_1%

28.7K_0402_1%

12

PC425

PC425
68P_0402_50V8J~D

68P_0402_50V8J~D

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+1.8VSP

12

12

PC423

PC423

PC422

PC422

22U_0805 _6.3VAM~D

22U_0805 _6.3VAM~D

22U_0805 _6.3VAM~D

22U_0805 _6.3VAM~D

PJP405

PJP405

2

112

@

@

JUMP_43X118

JUMP_43X118

1.8VSP
TDC 1.25 A
Peak Current 1.75 A
OCP current 4 A

Compal Electronics, Inc.

Title

Title

Title

PWR+VCCPP/+1.8VSP

PWR+VCCPP/+1.8VSP

PWR+VCCPP/+1.8VSP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

1

+1.8VS+1.8VS P

1.0

1.0

54 61Tuesday, January 25, 2011

54 61Tuesday, January 25, 2011

54 61Tuesday, January 25, 2011

1.0

of

of

of

5

D D

PR502

PR502

0_0402_5%

0_0402_5%

+5VALW

PR511

PR511
10K_0402_5%

10K_0402_5%

1 2

12

PR516

PR516

@

@

+5VALW

PR514

PR514

10K_0402_5%

10K_0402_5%

1 2

100K_040 2_5%

100K_040 2_5%

1 2

PR504

PR504

10_0603_5%

10_0603_5%

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

12

PC515

PC515

@

@

PR519

@PR519

@

100K_0402_1%

100K_0402_1%

1 2

PR528

PR528

0_0402_5%

0_0402_5%

1 2

PR523

PR523

10_0603_5%

10_0603_5%

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

PC511

PC511

2

G

G

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

PC531

PC531

12

PC506

@PC506

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

12

12

PR512

PR512
15K_0402_1%

15K_0402_1%

13

D

D

PQ503

PQ503

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

12

PC523

PC523

.1U_0402_16V7K~D

.1U_0402_16V7K~D

12

12

revise 01/11
for EE request

12

VTTPWRGOOD<54>

C C

+3VS

VCCSA_SEL

PR515

PR515

1 2

0_0402_5%

0_0402_5%

PR517

@PR517

@

10K_0402_5%

10K_0402_5%

1 2

B B

1

2

3

PQ504

PQ504

PMBT2222A_SOT23-3

PMBT2222A_SOT23-3

DGPU_PWR_EN<16,33,43,56>

VGA_PWROK<56>

add 10/19
for EE request

A A

5

PR509

PR509

1 2

2K_0402_1%

2K_0402_1%

PR513

PR513
30K_0402_1%

30K_0402_1%

PR524

PR524

1 2

10.5K_0402_1%

10.5K_0402_1%

PR525

PR525
10K_0402_1%

10K_0402_1%

4

PR501

PR501

267K_0402_1%

267K_0402_1%

1 2

1 2

SA_PGOOD<31>

PR518

PR518

267K_0402_1%

267K_0402_1%

1 2

1 2

DGPU_PWROK<16,17,38,39,56>

4

PU501

PU501

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

PR526

PR526

10K_0402_5%

10K_0402_5%

1 2

PR527

PR527
0_0402_5%

0_0402_5%

PU502

PU502

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

PR529

PR529

10K_0402_5%

10K_0402_5%

1 2

PR530

PR530
0_0402_5%

0_0402_5%

3

PQ501

PQ501
AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

PR503

PR503

2.2_0603_5%

1

14NC15

13

BOOT

UGATE

EN/DEM

VFB=0.75V

GND7PGND

1

EN/DEM

VFB=0.75V

GND7PGND

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209MGQW_WQFN14_3P5X3P5

RT8209MGQW_WQFN14_3P5X3P5

8

+3VS

VID[0] VID[1] VCCSA Vout Required on 2011 / 2012 Required
0 0 0.9V Yes / Yes
0 1 0.8V Yes / Yes

14NC15

13

BOOT

UGATE

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209MGQW_WQFN14_3P5X3P5

RT8209MGQW_WQFN14_3P5X3P5

8

+3VS

add 10/19
for EE request

BST_SAP

DH_SAP

LX_SAP

1 2

PR505

PR505

10.7K_0402_1%

10.7K_0402_1%

BST_1.35V

DH_1.35V

LX_1.35V

1 2

PR522

PR522

5.76K_0402_1%

5.76K_0402_1%

2.2_0603_5%

1 2

DL_SAP

revise 9/21
RF request

PR520

PR520

2.2_0603_5%

2.2_0603_5%

1 2

DL_1.35V

BST_SAP-1

BST_1.35V-1

PC507

PC507

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

+5VALW

12

PC512

PC512

4.7U_0805_10V6K

4.7U_0805_10V6K

PC522

PC522

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

+5VALW

12

PC528

PC528

4.7U_0805_10V6K

4.7U_0805_10V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

241

5

4

123

6

578

4

123

786

5

4

123

PQ502

PQ502
SI7716ADN-T1-GE3_POWERPAK8-5

SI7716ADN-T1-GE3_POWERPAK8-5

PQ505

PQ505
AO4466L_SO8

AO4466L_SO8

PQ506

PQ506
SI4634DY-T1-E3_SO8

SI4634DY-T1-E3_SO8

2

VCCSAP_B+

12

12

PC502

PC502

PC501

PC501

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

2200P_04 02_50V7K~D

2200P_04 02_50V7K~D

PL502

PL502

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

12

PR506

PR506

4.7_1206_5%

4.7_1206_5%

12

PC513

PC513

680P_0402_50V7K~D

680P_0402_50V7K~D

1.35V_B+

PC517

PC517

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

12

PR521

PR521

4.7_1206_5%

4.7_1206_5%

12

PC529

PC529

680P_0402_50V7K~D

680P_0402_50V7K~D

12

PC518

PC518

2200P_04 02_50V7K~D

2200P_04 02_50V7K~D

PL504

PL504

1 2

revise 9/21
RF request

12

12

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

12

12

PC504

PC504

PC503

PC503

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

Low Side MOS RDS(on)=13.5m ohm(Typ),16.5m ohm(Max)

1

12

12

PC510

PC510

PR510

PR510

12

2

10U_0805 _6.3V6M~D

10U_0805 _6.3V6M~D

12

12

PC521

PC521

@

@

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

12

PC527

PC527

PC525

PC525

10U_0805 _6.3V6M~D

10U_0805 _6.3V6M~D

220U_D2_ 2VY_R15M

220U_D2_ 2VY_R15M

PC509

PC509

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

PR507

PR507

1 2

10_0402 _5%

10_0402 _5%

0_0402_5%

0_0402_5%

1 2

12

PC519

PC519

PC520

PC520

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

PC524

PC524

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

Low Side MOS RDS(on)=5.5m ohm(Typ),6.7m ohm(Max)

Compal Secret Data

Compal Secret Data

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

PJP501

PJP501

2

112

JUMP_43X79

JUMP_43X79

@

@

+VCCSAP

+

+

PC508

PC508

PR508

PR508

0_0402_5%

0_0402_5%

330U_D2_ 2.5VY_R9M

330U_D2_ 2.5VY_R9M

1 2

VCCSA_SENSE <10>

PL503

@ PL503

@

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

PJP503

PJP503

2

112

JUMP_43X79

JUMP_43X79

@

@

+1.5VSDGPUP

1

1

+

+

+

+

PC526

PC526

2

2

220U_D2_ 2VY_R15M

220U_D2_ 2VY_R15M

@

@

1.5VSDGPUP (for VRAM)
TDC 5.6 A
Peak Current 8 A
OCP current 9.6 A

1

CPU_IN_B+

+VCCSAP
TDC 4.2A
Peak Current 6 A
OCP current 7.2 A

VSSSA_SENSE <10>

PJP502

PJP502

2

112

@

@

JUMP_43X118

JUMP_43X118

GPU_IN_B+

12

PC516

@PC516

@

680P_0402_50V7K~D

680P_0402_50V7K~D

Output voltage is adjusted to 1.54V
from EE requirement at 2011/01/11

PJP504

PJP504

2

112

@

@

JUMP_43X118

JUMP_43X118

PJP505

PJP505

2

112

JUMP_43X118

JUMP_43X118

@

@

Compal Electronics, Inc.

Title

Title

Title

PWR-+VCCSAP/+1.5VSDGPUP

PWR-+VCCSAP/+1.5VSDGPUP

PWR-+VCCSAP/+1.5VSDGPUP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

1

+VCCSA+VCCSAP

+1.5VSDGPU+1.5VSDGPUP

55 61Tuesday, January 25, 2011

55 61Tuesday, January 25, 2011

55 61Tuesday, January 25, 2011

of

of

of

1.0

1.0

1.0

5

N12E-GE-B
(N11E-GE for SSI)

0
0

D D

add 10/19
for EE request

1 2

PC606

PC606

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

PR625

C C

PR625

97.6K_0402_1%

97.6K_0402_1%

1 2

PR628

PR628

255_0402_1%

255_0402_1%

1 2

+NVVDD_SEN SE<40>

+VGA_CORE



from outpu t Bulk Cap

1 2

GND_SENSE<40>

B B

470P_0402_50V7K~D

470P_0402_50V7K~D

PC613

PC613

220P_0402_50V8J~D

220P_0402_50V8J~D

1 2

PR626

PR626

1K_0402_1%

1K_0402_1%

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PR630

PR630

10_0402_5%

10_0402_5%

12

PR638

PR638

10_0402_5%

10_0402_5%

12

1 2

PC611

PC611

1 2

PC621

PC621

0_0402_5%

0_0402_5%

PR629

PR629

12

0_0402_5%

0_0402_5%

PR639

PR639

VGA_CORE

GPU_VID0GPU_VID1

0.825V

11
0

0.875V

1

0.925V

PR648

PR648

0_0402_5%

1 2

5.49K_040 2_1%

5.49K_040 2_1%

0_0402_5%

@ PR603

@

0_0402_5%

0_0402_5%

1 2

PC608

PC608

PR616

PR616

.047U_04 02_16V7K~D

.047U_04 02_16V7K~D

PC623

PC623

330P_0402_50V7K~D

330P_0402_50V7K~D

1 2

1 2

PC625

PC625

1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

PC629

PC629

1 2

0.22U_04 02_6.3V6K~D

0.22U_04 02_6.3V6K~D

PC630

PC630

PR603

1 2

@

@

PR617

PR617

36.5K_040 2_1%

36.5K_040 2_1%

1 2

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

VGA_PWROK<55>

DGPU_PWROK<16,17,38,39,55>

VCC_PRM

1 2

PR615

PR615

PC607

PC607

PR623

PR623

@

@

1 2

6.81K_040 2_1%

6.81K_040 2_1%
1000P_04 02_50V7K~D

1000P_04 02_50V7K~D

1 2

PC622

PC622

@

@

330P_040 2_50V7K~D

330P_040 2_50V7K~D

12

4

+3VS_DELAY

PR647

PR647

0_0402_5%

0_0402_5%

add 10/19
for EE request

+3VS

12

10K_0402_5%

10K_0402_5%

12

1 2

150K_040 2_1%

150K_040 2_1%

180P_0402_50V8J~D

180P_0402_50V8J~D

PR631

PR631

1K_0402_1%

1K_0402_1%

VCC_PRM

PC631

PC631

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

+3VS

PR602

PR602

1 2

+3VS

1 2

PR605 0_0402_5%PR605 0_0402_ 5%

PR606

PR606

PR612

PR612

1 2

1 2

@

@

10K_0402 _5%

10K_0402 _5%

10K_0402 _5%

10K_0402 _5%

1

SET

2

RBIAS

3

OFS

4

SOFT

5

OCSET

6

VW

7

COMP

8

FB

9

VDIFF

10

VSEN

41

GND PAD

PC626

PC626

1 2

PR632

PR632

787_0402_1%

787_0402_1%

12

1 2

Close to P hase1 Choke PL18

PR642

PR642

1 2

11K_0402 _1%

11K_0402 _1%

1 2

PR643

PR643

12

PC634

PC634

1 2

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

38

39

40

PSI_L

VR_ON

PGOOD

ISL6264CRZ-T_QFN40_6X6

ISL6264CRZ-T_QFN40_6X6

DFB

11

13

PH601

PH601

1 2

1 2

10K_0603 _5%_TSM1A103J430 2RE

10K_0603 _5%_TSM1A103J430 2RE

2.61K_040 2_1%

2.61K_040 2_1%

VSUM

PR604

PR604

@

@

10K_0402_1%

10K_0402_1%

+3VS_DELAY

PR607 0_0402_5%PR607 0_0402_ 5%

1 2

1 2

37

PU601

PU601

15

1 2

2

G

G

1 2

2.2_0603 _5%

2.2_0603 _5%

PR627

PR627

2.2_0603_5%

2.2_0603_5%

0.22U_0603_25V7K~D

0.22U_0603_25V7K~D

3

PR644

PR644
0_0402_5%

0_0402_5%

+3VS_DELAY

PR645

PR645
10K_0402_5%

10K_0402_5%

1 2

1 2

PC605

PC605

0.22U_0603_25V7K~D

0.22U_0603_25V7K~D

1 2

PR624 0_0402_5%PR624 0_0402_5%

12

PC612

PC612

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

UG_VGA2

12

1 2

PC624

PC624

PR646

PR646
0_0402_5%

0_0402_5%

LG_VGA1

12

UG_VGA1

PHASE_VGA1

+5VS

PHASE_VGA2

LG_VGA2

modify 8/11

GPU_VID1 <45>

GPU_VID0 <45>

VGA_B+

5

4

123

PQ601

PQ601

AON6414AL_ DFN8-5

AON6414AL_ DFN8-5

5

4

123

5

4

5

4

5

4

AON6702L_ DFN8-5

AON6702L_ DFN8-5

AON6702L_ DFN8-5

PQ603

PQ603

123

PQ605

PQ605

AON6414AL_ DFN8-5

AON6414AL_ DFN8-5

123

VGA_B+

AON6702L_ DFN8-5

PQ604

PQ604

PC614

PC614

5

4

AON6702L_ DFN8-5

AON6702L_ DFN8-5

AON6702L_ DFN8-5

PQ607

PQ607

123

AON6702L_ DFN8-5

PQ608

PQ608

123

+3VS_DELAY

DGPU_PWR_EN<16,33,43,55>

12

+3VS_DELAY

PR613 10K_04 02_5%PR613 10 K_0402_5%

PR608 10K_04 02_5%PR608 10 K_0402_5%

1 2

PR609

PR609
10K_0402_5%

10K_0402_5%

1 2

+3VS_DELAY

PR610

PR610
10K_0402_5%

10K_0402_5%

1 2

PQ610

PQ610

13

D

D

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

PR611

PR611

PR614 10K_04 02_5%PR614 10 K_0402_5%

1 2

31

VID032VID133VID234VID335VID436VID5

BOOT1

30

UGATE1

29

PHASE1

28

PGND1

27

LGATE1

26

PVCC

25

LGATE2

24

PGND2

23

PHASE2

22

UGATE2

21

BOOT2

ISEN219GND17VSUM

VIN16VO14DROOP12RTN

ISEN120VDD

18

VGA_ISEN1

VGA_ISEN2

+5VS

B+

PR640

PR640

PR641

PR641

10_0402 _5%

10_0402 _5%

10_0402 _5%

10_0402 _5%

1 2

1 2

12

PC632

PC632

PC633

PC633

1 2

1U_0402_ 6.3V6K~D

1U_0402_ 6.3V6K~D

0.01U_04 02_50V7K~D

0.01U_04 02_50V7K~D

VGA_CORE
TDC 36.8 A
Peak Current 46 A
OCP current 55 A
Cesr=9 mOHM
DCR=1.48 mOHM+-7%

1

+

+

2

PC618

PC618

2

12

12

PC602

PC602

PC601

PC601

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

2200P_04 02_50V7K~D

2200P_04 02_50V7K~D

0.42UH_FDUE0640-R42M_20.2A_20%~D

0.42UH_FDUE0640-R42M_20.2A_20%~D

PR620

PR620

10K_0402 _1%

10K_0402 _1%

1 2

PR618

PR618

0.22U_0603_16V7K~D

0.22U_0603_16V7K~D

1 2

4.7_1206 _5%

4.7_1206 _5%
PR619

PR619

1 2

3.65K_080 5_1%

3.65K_080 5_1%

12

VGA_ISEN1 VCC_PRM

PC610

PC610

VSUM

680P_060 3_50V7K~D

680P_060 3_50V7K~D

12

2200P_04 02_50V7K~D

2200P_04 02_50V7K~D

PR636

PR636

1 2

12

+

+

330U_D2_ 2.5VY_R9M

330U_D2_ 2.5VY_R9M

12

12

PC616

PC616

PC615

PC615

PC617

PC617

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

PL603

PL603

0.42UH_FDUE0640-R42M_20.2A_20%~D

0.42UH_FDUE0640-R42M_20.2A_20%~D

PR633

PR633

10K_0402 _1%

10K_0402 _1%

PC627

PC627

1 2

0.22U_0603_16V7K~D

0.22U_0603_16V7K~D

PR637

PR637

1 2

1 2

4.7_1206 _5%

4.7_1206 _5%

3.65K_080 5_1%

3.65K_080 5_1%

PC628

PC628

VSUM

680P_060 3_50V7K~D

680P_060 3_50V7K~D

1

1

+

+

2

2

PC620

PC620

PC619

PC619

330U_D2_ 2.5VY_R9M

330U_D2_ 2.5VY_R9M

330U_D2_ 2.5VY_R9M

330U_D2_ 2.5VY_R9M

12

12

PC603

PC603

PC604

PC604

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

PL602

PL602

12

PC609

PC609

1 2

1 2

12

4.7U_080 5_25V6K~D

4.7U_080 5_25V6K~D

12

PR634

1_0402_ 5%

PR634

1_0402_ 5%

1 2

VCC_PRMVGA_ISEN2

+VGA_CORE

PL601

PL601

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

PR621

1_0402_ 5%

PR621

1_0402_ 5%

1 2

VGA_ISEN2

1 2

VGA_ISEN1

PR622

PR622
10K_0402_1%

10K_0402_1%

PR635

PR635
10K_0402_1%

10K_0402_1%

revise 10/25
design change

GPU_IN_B+

GPU_VIN-<58> GPU_VIN+<58>

+VGA_CORE

+VGA_CORE

0.01_1206_1%

0.01_1206_1%

1

2

PR601

PR601

1

4

3

B+

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

VGA_CORE

VGA_CORE

VGA_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

2

Date: Sheet

1

56 61Tuesday, January 25, 2011

56 61Tuesday, January 25, 2011

56 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of

5

12

PR702

PR702

8.06K_04 02_1%

D D

12

PR706

PR706

@

@

499K_04 02_1%

499K_04 02_1%

IMONG

VSS_AXG_SENSE<10>

8.06K_04 02_1%

39P_040 2_50V8J~D

39P_040 2_50V8J~D
PC716

PC716

150P_04 02_50V8J~D

150P_04 02_50V8J~D

12

PR718

PR718

18.2K_04 02_1%

18.2K_04 02_1%

12

PC720

PC720

revise 8/23

VR_SVID_DAT<9>

VR_SVID_ALRT#<9>

VSSSENSE<9 >

VR_HOT#

10K_040 2_5%

10K_040 2_5%

PR737

@PR7 37

@

1 2

499_04 02_1%

499_04 02_1%

PR773

PR773

PQ720B

PQ720B

VR_SVID_CLK<9>

1 2

PR750

@ PR750

@

499K_04 02_1%

499K_04 02_1%

+3VALW

12

5

PR775

PR775

@

@

100K_04 02_5%

100K_04 02_5%

1 2

12

12

18.7K_04 02_1%

18.7K_04 02_1%

PR736

PR736

12

PC735

PC735

43P_060 3_50V8

43P_060 3_50V8

PR741

PR741

PC752

PC752

150P_04 02_50V8J~D

150P_04 02_50V8J~D

+5VS

12

PR771

PR771
10K_040 2_5%

10K_040 2_5%

Quad_SEL #

3

12

PR774

PR774
100K_04 02_5%

100K_04 02_5%

@

@

4

+3VS

PC730

PC730

0.047U_ 0603_25V7M~D

0.047U_ 0603_25V7M~D

@PC7 36

@

470P_04 02_50V7K~D

470P_04 02_50V7K~D

PR738

PR738

1 2

3.83K_04 02_1%

3.83K_04 02_1%

12

12

PC741

PC741

8.06K_04 02_1%

8.06K_04 02_1%

PC748

PC748

39P_040 2_50V8J~D

39P_040 2_50V8J~D

12

12

PR754

PR754
316K_04 02_1%

316K_04 02_1%

+5VS

12

PR772

PR772
10K_040 2_5%

10K_040 2_5%

Quad_SELQua d_SEL#

61

2

PQ720A

PQ720A
DMN66D0LDW- 7 2N SOT363-6

DMN66D0LDW- 7 2N SOT363-6

Alert# PU resister need close CPU,
so the PU resister in HW schematic.
but DAT and CLK need close PWM-IC,
so the PU resister in POWER schematic.

C C

IMON

+VCCP

B B

CPU_SEL<31>

DMN66D0LDW- 7 2N SOT363-6

DMN66D0LDW- 7 2N SOT363-6

A A

PC711

PC711

12

PR712

PR712

475K_04 02_1%~D

475K_04 02_1%~D

12

@

@

0.047U_ 0603_25V7M~D

0.047U_ 0603_25V7M~D

VR_ON<31>

PR734

PR734

1.91K_04 02_1%

1.91K_04 02_1%

VGATE<6,15,31 >

PC736

12

1 2

1000P_0 402_50V7K~D

1000P_0 402_50V7K~D

12

Quad_SEL #

1 2

+VCC_CORE

12

PC708

PC708

1000P_0 402_50V7K~D

1000P_0 402_50V7K~D

PR710

PR710

422_04 02_1%

422_04 02_1%

PR713

PR713

12

2.43K_04 02_1%

2.43K_04 02_1%

+VCCP

12

1 2

PR722

PR722

PC724

PC724

PR768

PR768
2K_0402 _1%

2K_0402 _1%

PR751

PR751
499_04 02_1%

499_04 02_1%

PR755

PR755

3.74K_06 03_1%~D

3.74K_06 03_1%~D

130_04 02_1%

130_04 02_1%

.1U_040 2_16V7K~D

.1U_040 2_16V7K~D

VGATEG

1 2

0_0402 _5%

0_0402 _5%

PH703

PH703

470KB_04 02_5%_ERTJ0EV474 J

470KB_04 02_5%_ERTJ0EV474 J

12

PR739

PR739

27.4K_04 02_1%

27.4K_04 02_1%

12

PC768

PC768
680P_04 02_50V7K~D

680P_04 02_50V7K~D

12

12

D

S

D

S

1 3

PR770

@ PR770

@

5.11K_04 02_1%

5.11K_04 02_1%

PQ718

PQ718

G

G

2

SSM3K7002FU_SC7 0-3

SSM3K7002FU_SC7 0-3

PR757

PR757
10_040 2_1%

10_040 2_1%

@

@

VCCSENSE<9>

VSSSENSE<9>

PR759

PR759
10_040 2_1%

10_040 2_1%

@

@

PC712

PC712

12

330P_04 02_50V7K~D

330P_04 02_50V7K~D

12

12

PR720

PR720

+3VS

54.9_04 02_1%

54.9_04 02_1%

PR724

PR724

SVID_SDA

SVID_ALERT#

SVID_SCLK

PR733

PR733

12

PC749

PC749

12

470P_04 02_50V7K~D

470P_04 02_50V7K~D

12

12

12

Quad & Dual CORE selection

L

PR758//PR769

TBD

953

PR755//PR770

TBD

3.74k

CORE

Dual

Quad

(Default)

CPU_SEL

L

H

Quad_SEL Quad_SEL#

L H

H

5

12

revise 10/25

12

1.91K_04 02_1%

1.91K_04 02_1%

VSUM-

4

3.83K_04 02_1%

3.83K_04 02_1%

PC767

PC767
470P_04 02_50V7K~D

470P_04 02_50V7K~D

1

VWG

2

IMONG

3

PGOODG

4

SDA

5

ALERT#

6

SCLK

7

VR_ON

8

PGOOD

9

IMON

10

VR_HOT#

11

NTC

12

VW

PC743

@ PC743

@

10P_040 2_25V8J

10P_040 2_25V8J

PC745

PC745

PC750

PC750

PC751

PC751

PC701

@PC7 01

@

12

470P_04 02_50V7K~D

470P_04 02_50V7K~D

PR701

PR701

12

12

1 2

PR703

PR703

12

27.4K_06 03_1%~D

27.4K_06 03_1%~D

PR767

PR767

4.99K_04 02_1%

4.99K_04 02_1%

12

PC713

PC713

ISPG

44

45

46

47

48

49

FBG

GND

COMP13FB14ISEN3/ FB215ISEN216ISEN117VSEN18RTN19ISUMN20ISUMP21VDD22VIN23PROG1

12

12

0.22U_0 402_6.3V6K~D

0.22U_0 402_6.3V6K~D

12

0.22U_0 402_6.3V6K~D

0.22U_0 402_6.3V6K~D

12

0.22U_0 402_6.3V6K~D

0.22U_0 402_6.3V6K~D

RTNG

VSENG

COMPG

ISL95831 CRZ-T_TQFN48_6X6

ISL95831 CRZ-T_TQFN48_6X6

ISEN2

ISEN3

ISEN1

revise 10/25

PC760

PC760

330P_04 02_50V7K~D

330P_04 02_50V7K~D

PC762

PC762

0.01U_0 402_16V7K~D

0.01U_0 402_16V7K~D

12

12

PC761

PC761

12

PROG1

4.32k

0

4

PH701

PH701

12

470KB_04 02_5%_ERTJ0EV474 J

470KB_04 02_5%_ERTJ0EV474 J

revise 9/21

PC710

PC710

330P_04 02_50V7K~D

330P_04 02_50V7K~D

1 2

PC714

PC714

12

0.01U_0 402_16V7K~D

0.01U_0 402_16V7K~D

330P_04 02_50V7K~D

330P_04 02_50V7K~D

ISNG

NTCG

16.5K_04 02_1%

16.5K_04 02_1%

PR721

PR721

UGATEG

BOOTG

@

@

1 2

39

40

41

42

ISNG43ISPG

NTCG

PROG2

BOOTG

12

PC746

PC746

12

PC753

PC753

@

@

0.068U_ 0402_16V7K~D

0.068U_ 0402_16V7K~D

PR758

PR758
953_04 02_1%

953_04 02_1%

PR769

@ PR769

@

1.27K_04 02_1%

1.27K_04 02_1%

330P_04 02_50V7K~D

330P_04 02_50V7K~D

1

1

+

+

+

+

PC780

PC780

PC781

PC781

2

2

@

@

@

@

470U_D2 _2VM_R4.5M

470U_D2 _2VM_R4.5M

3

NTCG

UGATEG

+VCC_GFXCORE_AXG

PR704

PR704

12

10_040 2_1%

PHASEG

38

PHG

UGG

BOOT2

VSSP2

VSSP1

BOOT1

24

PC747

PC747

1U_0603 _10V6K~D

1U_0603 _10V6K~D

PC754

PC754

12

12

Quad_SEL #

1

+

+

2

470U_D2 _2VM_R4.5M

470U_D2 _2VM_R4.5M

10_040 2_1%

LGATEG

37

LGG

UG2

PH2

LG2

VDDP

PWM3

LG1

PH1

UG1

PR742

PR742

0_0603 _5%

0_0603 _5%

1 2

PR745

PR745

1_0603 _5%

1_0603 _5%

12

0.22U_0 603_25V7K~D

0.22U_0 603_25V7K~D

12

0.47U_0 603_16V7K~D

0.47U_0 603_16V7K~D

D

D

1 3

PC782

PC782

@

@

470U_D2 _2VM_R4.5M

470U_D2 _2VM_R4.5M

VCC_AXG_SENSE <10>

VSS_AXG_SENSE <10>

PR714

PR714

12

10_040 2_1%

10_040 2_1%

36

35

34

33

32

31

30

29

28

27

26

25

PU701

PU701

12

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

CPU_B+

+5VS

PR716

PR716

PR725

PR725

12

PR740

PR740

12

0_0603 _5%

0_0603 _5%

12

0_0603 _5%

0_0603 _5%

13

D

D

PQ719

@

PQ719

@

S

S

0_0402 _5%

0_0402 _5%

SSM3K7002FU_SC7 0-3

SSM3K7002FU_SC7 0-3

G

G

Vboot=0

VSUM+

12

PR753

PR753

2.61K_04 02_1%

2.61K_04 02_1%

12

12

PC755

PC755

@

@

S

S

PQ717

PQ717

G

G

2

SSM3K7002FU_SC7 0-3

SSM3K7002FU_SC7 0-3

+VCC_CORE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED B Y OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PR756

PR756

PH704

PH704
10K_040 2_5%_ERTJ0ER103J

10K_040 2_5%_ERTJ0ER103J

11K_040 2_1%

11K_040 2_1%

0.068U_ 0402_16V7K~D

0.068U_ 0402_16V7K~D

3

VSUM-

12

PC763

PC763

.1U_040 2_16V7K~D

.1U_040 2_16V7K~D

PHASEG

PR705

PR705

BOOTG

2.2_060 3_5%

2.2_060 3_5%

LGATEG

+5VS

12

PC718

PC718

1U_0603 _10V6K~D

1U_0603 _10V6K~D

PU702

PU702

5

VCC

6

FCCM

2

PWM

3

GND

ISL6208ACR Z-T_QFN8_3X3

ISL6208ACR Z-T_QFN8_3X3

PR729

@ PR729

@

0_0603 _5%

0_0603 _5%

1 2

12

PC731

PC731

PC732

PC732

1U_0603 _10V6K~D

1U_0603 _10V6K~D

Quad_SEL

2

UGATE1

PHASE1

BOOT1

LGATE1

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

BOOT

UGATE

PHASE

LGATE

PGND

PR730

PR730

1 2

0_0603 _5%

0_0603 _5%

12

1U_0603 _10V6K~D

1U_0603 _10V6K~D

UGATE2

PHASE2

BOOT2

LGATE2

PR760

PR760

2.2_060 3_5%

2.2_060 3_5%

2.2_060 3_5%

2.2_060 3_5%

0.1U_06 03_25V7K~D

0.1U_06 03_25V7K~D

1

8

7

4

9

+5VS

PR743

PR743

2.2_060 3_5%

2.2_060 3_5%

PC764

PC764

0.1U_06 03_25V7K~D

0.1U_06 03_25V7K~D

12

Compal Secre t Data

Compal Secre t Data

Compal Secre t Data

PC709

PC709

0.1U_06 03_25V7K~D

0.1U_06 03_25V7K~D

12

PR719

PR719

12

PC722

PC722

PC742

PC742

0.1U_06 03_25V7K~D

0.1U_06 03_25V7K~D

12

12

4

12

4

Deciphered Date

Deciphered Date

Deciphered Date

4

12

12

4

4

PQ713

PQ713

PQ715

PQ715

2

CPU_B+

5

PQ701

PQ701

4

PQ705

PQ705

4

4

5

PQ709

PQ709

5

PQ711

PQ711

213

5

123

5

213

5

PQ702

PQ702

4

AON6414AL -1N_DFN

AON6414AL -1N_DFN

123

5

213

5

123

5

PQ707

PQ707

213

AON6414AL -1N_DFN

AON6414AL -1N_DFN

123

AON6702L -1N_DFN8

AON6702L -1N_DFN8

PQ714

PQ714

4

AON6414AL -1N_DFN

AON6414AL -1N_DFN

4

AON6702L -1N_DFN8

AON6702L -1N_DFN8

2

PQ703

PQ703

AON6702L -1N_DFN8

AON6702L -1N_DFN8

PQ716

PQ716

CPU_B+

AON6414AL -1N_DFN

AON6414AL -1N_DFN

AON6702L -1N_DFN8

AON6702L -1N_DFN8

4

4

5

AON6414AL -1N_DFN

AON6414AL -1N_DFN

123

5

PQ704

PQ704

4

213

5

PQ706

PQ706

4

123

5

PQ708

PQ708

4

213

CPU_B+

5

PQ710

PQ710

AON6414AL -1N_DFN

AON6414AL -1N_DFN

123

5

PQ712

PQ712

AON6702L -1N_DFN8

AON6702L -1N_DFN8

213

CPU_B+

AON6414AL -1N_DFN

AON6414AL -1N_DFN

123

5

AON6702L -1N_DFN8

AON6702L -1N_DFN8

213

12

12

PC704

PC704

10U_080 5_25V5K~D

10U_080 5_25V5K~D

PR709

PR709

AON6702L -1N_DFN8

AON6702L -1N_DFN8

12

PC725

PC725

10U_080 5_25V5K~D

10U_080 5_25V5K~D

AON6414AL -1N_DFN

AON6414AL -1N_DFN

PR727

PR727

AON6702L -1N_DFN8

AON6702L -1N_DFN8

PC737

PC737

10U_080 5_25V5K~D

10U_080 5_25V5K~D

12

PR744

PR744

12

12

PC756

PC756

10U_080 5_25V5K~D

10U_080 5_25V5K~D

12

PR761

PR761

12

12

PC705

PC705

PC706

PC706

PC707

PC707

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

PR707

PR707

12

10K_060 3_1%

10K_060 3_1%

4.7_120 6_5%

4.7_120 6_5%

PR711

PR711

7.5K_040 2_1%

7.5K_040 2_1%

12

PC717

PC717

680P_04 02_50V7K~D

680P_04 02_50V7K~D

12

12

12

PC728

PC728

PC726

PC726

PC727

PC727

@

@

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

12

12

12

PC738

PC738

4.7_120 6_5%

4.7_120 6_5%

PC744

PC744

680P_04 02_50V7K~D

680P_04 02_50V7K~D

PC757

PC757

10U_080 5_25V5K~D

10U_080 5_25V5K~D

4.7_120 6_5%

4.7_120 6_5%

PC765

PC765

680P_04 02_50V7K~D

680P_04 02_50V7K~D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PR728

PR728

ISEN3

1 2

10K_060 3_1%

10K_060 3_1%

4.7_120 6_5%

4.7_120 6_5%

PC729

PC729

10U_080 5_25V5K~D

10U_080 5_25V5K~D

12

VSUM+

1 2

3.65K_06 03_1%

3.65K_06 03_1%

680P_04 02_50V7K~D

680P_04 02_50V7K~D

12

12

12

PC739

PC739

PC740

PC740

@

@

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

PR746

PR746

ISEN2

1 2

10K_060 3_1%

10K_060 3_1%

PR748

PR748

VSUM+

1 2

3.65K_06 03_1%

3.65K_06 03_1%

VSUM-

12

12

PC758

PC758

PC759

@ PC759

@

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

10U_080 5_25V5K~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

0.36UH_ETQP4 LR36AFC_28A_2 0%~D

PR762

PR762

ISEN1

1 2

10K_060 3_1%

10K_060 3_1%

PR764

PR764

VSUM+

1 2

3.65K_06 03_1%

3.65K_06 03_1%

VSUM-

PR732

PR732

Compal Electronics, Inc.

PWR-CPU_CORE

PWR-CPU_CORE

PWR-CPU_CORE

LA-6801P

LA-6801P

LA-6801P

1

HCB4532KF-8 00T90_1812

HCB4532KF-8 00T90_1812

1 2

PL701

PL701

12

PL702

PL702

4

3

12

10K_040 2_5%_ERTJ0ER103J

10K_040 2_5%_ERTJ0ER103J

1 2

1 2

1 2

PR715 11K_0402 _1%PR7 15 1 1K_0402_1 %

PC719

PC719

1 2

.1U_040 2_16V7K~D

.1U_040 2_16V7K~D

1 2

PC721

PC721

0.022U_ 0402_16V7K~D

0.022U_ 0402_16V7K~D

487_04 02_1%

487_04 02_1%

ISPG

PL703

PL703

4

3

PR735

PR735

VSUM-

1_0402 _5%

1_0402 _5%

1

1

+

+

+

+

PC733

PC733

2

2

100U_25 V_M

100U_25 V_M

PL704

PL704

4

3

PR752

PR752

12

1_0402 _5%

1_0402 _5%

DCR:0.82 mOHM

PL705

PL705

4

3

PR766

PR766

12

1_0402 _5%

1_0402 _5%

1

PH702

PH702

12

PC734

PC734

PR723

PR723

1

2

1

2

12

PC703

PC703

@

@

680P_04 02_50V7K~D

680P_04 02_50V7K~D

12

revise 10/25

ISNG

1

+

+

2

100U_25 V_M

100U_25 V_M

1

2

1

2

10K_040 2_1%

10K_040 2_1%

10K_040 2_1%

10K_040 2_1%

CPU_IN_B+

12

PC702

PC702

@

@

680P_04 02_50V7K~D

680P_04 02_50V7K~D

+VCC_GFXCORE_AXG

12

PR708

PR708
1_0402 _5%

1_0402 _5%

1 2

PC715

PC715

.1U_040 2_16V7K~D

.1U_040 2_16V7K~D

PR717

@ PR717

@
1 2

100_04 02_1%

100_04 02_1%

@

@

+VCC_CORE

PR726

PR726

ISEN1

12

10K_040 2_1%

10K_040 2_1%

PR731

PR731

ISEN2

12

10K_040 2_1%

10K_040 2_1%

add 10/26
design change

PC766

PC766

100U_25 V_M

100U_25 V_M

+VCC_CORE

PR747

PR747

ISEN1

12

10K_040 2_1%

10K_040 2_1%

PR749

PR749

12

10K_040 2_1%

10K_040 2_1%

+VCC_CORE

PR763

PR763

ISEN2

12

PR765

PR765

ISEN3

12

57 61Tuesday, Ja nuary 25, 2011

57 61Tuesday, Ja nuary 25, 2011

57 61Tuesday, Ja nuary 25, 2011

of

of

of

PC723

PC723

ISEN3

12

470P_04 02_50V7K~D

470P_04 02_50V7K~D

1.0

1.0

1.0

5

4

3

2

1

VENTURA

D D

I2CB_SDA<44>

I2CB_SCL<44>

I2CB_SDA I2CB_DATA

+3VS_DELAY

2

61

PQ801A

@ P Q801A

@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

PQ801B

@ P Q801B

@

2.2K_0402_5%

2.2K_0402_5%

PR801

@ PR801

@

3

+3VS

PR802

@ PR802

@

2.2K_0402_5%

2.2K_0402_5%

1 2

1 2

12

PR823

PR823
0_0402_5%

I2CB_CLKI2CB_SCL

0_0402_5%

12

PR824

PR824
0_0402_5%

0_0402_5%

EC_SMB_DA 2 <30,31,45>

EC_SMB_CK 2 <30,31,45>

connect to EC 10/05

PR804 0_0402_5%P R804 0_0402_5%

CPU_VIN+<54>

C C

GPU_VIN+<56>

CPU_VIN-<54>

GPU_VIN-<56>

12

PR803 0_0402_5%P R803 0_0402_5%

12

PR806 0_0402_5%P R806 0_0402_5%

1 2

12

PC801

@PC801

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PR805 0_0402_5%P R805 0_0402_5%

1 2

PR807 0_0402_5%P R807 0_0402_5%

1 2

12

PC803

@PC803

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PR808 0_0402_5%P R808 0_0402_5%

1 2

12

PC802

@PC802

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

+3VS

12

PC804

@PC804

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

+3VS

PU801

PU801

1

VIN+

2

VIN-

3
4

1
2
3
4

SDA

GND

SCL

VS

INA219AIDCNRG4_SOT23-8

INA219AIDCNRG4_SOT23-8

PU802

PU802

VIN+
VIN-

SDA

GND

SCL

VS

INA219AIDCNRG4_SOT23-8

INA219AIDCNRG4_SOT23-8

CPU_A1

8

A1

CPU_A0

7

A0

I2CB_DATA

6

I2CB_CLK

5

GPU_A1

8

A1

GPU_A0

7

A0

I2CB_DATA

6

I2CB_CLK

5

B B

A A

5

+3VS +3VS

PR810

@ PR810

@

PR809

@ PR809

@

0_0402_5%

0_0402_5%

1 2

CPU_A1

PR819

PR819
0_0402_5%

0_0402_5%

1 2

Ventura for CPU side
slave ad dress : 1000010
please p lacemne t near R -sense

0_0402_5%

0_0402_5%

1 2

CPU_A0

PR820

@ PR820

@

0_0402_5%

0_0402_5%

1 2

12

PR813 0_0402_5%PR813 0_ 0402_5%

12

PR815

PR815

@

@

0_0402_5%

0_0402_5%

12

PR817 0_0402_5%@PR817 0_0402_5%@

I2CB_DATA

I2CB_CLK

4

PR811
0_0402_5%

0_0402_5%

1 2

PR821

@ PR821

@

0_0402_5%

0_0402_5%

1 2

Ventura for GPU side
slave Ad dress 1 000110
please p lacemen t near R -sense

0_0402_5%

0_0402_5%

1 2

PR822

@ PR822

@

0_0402_5%

0_0402_5%

1 2

GPU_A0

12

PR814 0_0402_5%PR814 0_ 0402_5%

12

PR816

PR816

@

@

0_0402_5%

0_0402_5%

12

PR818 0_0402_5%@PR818 0_0402_5%@

PR812

@ PR812

@

PR811

I2CB_DATA

I2CB_CLKGPU_A1

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

2

Compal Electronics, Inc.

Title

Title

Title

VENTURA

VENTURA

VENTURA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

Date: Sheet

1

of

of

of

58 61Tuesday, January 25, 2011

58 61Tuesday, January 25, 2011

58 61Tuesday, January 25, 2011

1.0

1.0

1.0

5

4

revise 8/09
ESD req uest

3

2

1

1

PD9

PD9
PESD24VS 2UT_SOT23-3

D D

PJP30 battery connector

C C

B B

BATT+ BATT++

PL3

PL3

SMB3025500YA_2P

SMB3025500YA_2P

BATT+

1 2

12

12

PC15

PC15

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PC13

PC13

100P_0402_50V 8J~D

100P_0402_50V 8J~D

SMART
Battery:

11.BAT+

10.BAT+

9.BAT+

8.ID

7.B/I

6.TS

5.SMD

4.SMC

3.GND

2.GND

1.GND

100K_0402_1%

100K_0402_1%

SPOK<52>

BATT++

12

PC14

PC14

1000P_0402_50V 7K~D

1000P_0402_50V 7K~D

MOLEX_87437-1173_11P -T

MOLEX_87437-1173_11P -T

SP020907230

SP020907230

@PJP 30

@

+5VALW

PR44

PR44

1 2

1 2

11
10

9
8
7
6
5
4
3
2
1

PJP30

PR45

PR45
0_0402_5%

0_0402_5%

12

PC16

PC16

100P_0402_50V 8J~D

100P_0402_50V 8J~D

11
10
9
8
7
6
5
4
3
2
1

B+

13

D

D

2

G

G

S

S

12

PC22

PC22

@

@

+3VALWP

3S/4S#

1 2

100_0402_5%

100_0402_5%

1 2

100_0402_5%

100_0402_5%

PR43

PR43

22K_0402_1%

22K_0402_1%

1 2

PQ11

PQ11
SSM3K7002FU_SC 70-3

SSM3K7002FU_SC 70-3

PR34

PR34

PR37

PR37

12

1 2

PR42

PR42

PR30

PR30
47K_0402_5%

47K_0402_5%

12

100K_0402_1%

100K_0402_1%

PC20

PC20

@

@

2

3

EC_SMB_DA1 <31>

EC_SMB_CK1 <31>

PQ10

PQ10

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

2

0.22U_1206_25V7K~D

0.22U_1206_25V7K~D

PESD24VS 2UT_SOT23-3

PR32

PR32

1K_0402_5%

1K_0402_5%

13

2

12

12

PC21

@PC 21

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

PD10

PD10
PESD24VS 2UT_SOT23-3

PESD24VS 2UT_SOT23-3

3

Place clsoe to EC pin

BATT_TEMP

1 2

PR31

PR31

1K_0402_5%

1K_0402_5%

1 2

1 2

PR33

PR33

6.49K_0402_1%

6.49K_0402_1%

B+_BIAS

BATT_TEMP <31>

PC17

PC17

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

@

@

+3VALWP

Battery Connect/OTP

PH1 under CPU botten side :

CPU thermal protection at 90 degree C
Recovery at 50 degree C

VL VL

12

PH1

PH1

100K_0402_1%_TSM0B10 4F4251RZ

100K_0402_1%_TSM0B10 4F4251RZ

PR38

PR38

13.7K_0402_1%

13.7K_0402_1%

OTP-1

1 2

12

12

PR39

PC18

PC18

PR39

17.8K_0402_1%

17.8K_0402_1%

0.22U_0603_25V7K~D

0.22U_0603_25V7K~D

revise 12/06
adjust OTP setting point

12

OTP-4

PC19

PC19

OTP-2

1000P_0402_50V 7K~D

1000P_0402_50V 7K~D

PR36

PR36

47K_0402_1%

47K_0402_1%

1 2

5

+

6

-

PR40

PR40

12

100K_0402_1%

100K_0402_1%

PR41

PR41
100K_0402_1%

100K_0402_1%

VL

8

P

G

4

7

0

PU1B

PU1B
LM393DR_SO8

LM393DR_SO8

12

modify 9/27
reduce S5 loss

OTP-3

VL

PR35

PR35
47K_0402_1%

47K_0402_1%

1 2

2

G

G

MAINPWON <30 ,52>

13

D

D

PQ9

PQ9
SSM3K7002FU_SC 70-3

SSM3K7002FU_SC 70-3

S

S

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

A A

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

5

4

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR-BATTERY CONN

PWR-BATTERY CONN

PWR-BATTERY CONN

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-6801P

LA-6801P

LA-6801P

Date: Sheet

Date: Sheet

2

Date: Sheet

59 61Tuesday, January 25, 2011

59 61Tuesday, January 25, 2011

59 61Tuesday, January 25, 2011

1

1.0

1.0

1.0

of

of

of

5

4

3

2

1

Version Change List ( P. I. R. List )

Page 1

Request

Item Issue DescriptionDate

1

D D

2

3

4 COMPAL 0.2

5

6

7

8

9

10

11

12

C C

13

14

15

17 57 +CPU_CORE 10/10/26 COMPAL design change for solve acoustic issue add PC766 0.3

18 52 3VALWP/5VALWP 10/10/27 COMPAL design change for reserve adjust working frequency add PR222 0.3

19 0.359 BATTERY CONN 10/12/06 COMPAL adjust OTP setting point change PR39 from 16.9K to 17.8K

20

21

22

B B

23 53 +1.5VP/+0.75VSP/+1.5VSP 10/12/20 COMPAL design change for adjust original output voltage 0.4swap PR314;PR317 and PR320;PR323

24 51 CHARGER 10/12/21 COMPAL 0.4del PC109

25 50 PWR-DCIN / Vin Detector 11/01/06 COMPAL design change for add AC peak power function add PR25 0.4

26

27

28

29

50 PWR-DCIN / Vin Detector reduce S5 loss add PU2;PR27;PC11;PC12

55 +VCCSAP/+1.5VSDGPUP RF request add PR521;PC529 change PR520 from 0 to 2.2

57 +CPU_CORE design change change PR703 from 0 to 27.4K

51 CHARGER design change change PC131 from 0.1u to 1u

54 +VCCPP/+1.8VSP design change modify 1.8VSP solution

51 CHARGER EMI request add PC126;PC128

55 +VCCSAP/+1.5VSDGPUP EE request add PR528;PR529;PR530 del PR519

51 CHARGER design change change PR114 from 47K to 0

54 +VCCPP/+1.8VSP design change for use ventura curcuit change PR401 from 0 to 0.01

56 +VGA_CORE 10/10/25 change PR601 from 0 to 0.01 0.2

57 +CPU_CORE 10/10/25

57 +CPU_CORE

57 +CPU_CORE

50 PWR-DCIN / Vin Detector 10/12/13 COMPAL design change for delete prechange circuit del PR1;PR2;PR3;PR4;PR5;PR6;PR7;PD1;PD2;PQ1;PQ2;PQ3

51 CHARGER 10/12/13 COMPAL del PR104;PQ110 add PR102

53 +1.5VP/+0.75VSP/+1.5VSP 10/12/13 COMPAL EE request for use memory over clocking circuit 0.3add PR312;PR318

54

+VCCPP/+1.8VSP

55

+VCCSAP/+1.5VSDGPUP

51

CHARGER

52

3VALWP/5VALWP

10/09/17

10/09/21

10/09/21

10/10/06

10/10/07

10/10/07

10/10/19

10/10/19

10/10/19

10/10/25

10/10/25

10/10/25

11/01/11

11/01/11

11/01/20

11/01/20

Owner

COMPAL

COMPAL

COMPAL 0.2

COMPAL

COMPAL 0.2

COMPAL

COMPAL 0.2

COMPAL

COMPAL 0.2

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL EE request for adjust output voltage

COMPAL

COMPAL

design change50 PWR-DCIN / Vin Detector add PQ12;PC23

EE request56 +VGA_CORE add PR647;PR648 del PR603;PR604

design change for use ventura curcuit

change CPU OCP setting change PR758 from 887 to 953 0.2

change GFX OCP & LL setting change PR723 from 442 to 487 change PR713 from 2.61K to 2.43K

quad & dual core CPU switch setting design

design change for delete prechange circuit

design change for delete prechange circuit

EE request for adjust output voltage

EMI request

EMI request

add PQ717;PQ718;PQ720;PR771;PR772;PR773;PR767;PR768;PC767;PC768

add PU801;PU802;PR803;PR804;PR805;PR806;PR807;PR808

;PR811;PR813;PR814;PR819;PR823;PR824 0.2

change PR415 from 4.02K to 4.12K

change PR524 from 10K to 10.5K

add PL102

add PL204

Solution Description Rev.Page# Title

0.2

0.2

0.2

0.2

0.2

0.210/10/25 COMPAL

0.2

0.2

0.216 58 VENTURA 10/10/25 COMPAL add ventura connect to EC

0.3

0.3

0.4

0.4

0.4

0.4

A A

Sec urity Classificatio n

Sec urity Classificatio n

Sec urity Classificatio n

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF C OMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM T HE CUSTODY OF THE CO MPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS
MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

5

4

MAY BE USED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

3

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

201 1/01/25 201 2/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Dec iphered Date

Dec iphered Date

Dec iphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PWR-PIR

PWR-PIR

PWR-PIR

60 61Tuesday, January 25, 2011

60 61Tuesday, January 25, 2011

60 61Tuesday, January 25, 2011

1

1.0

1.0

1.0

of

of

of

5

4

3

2

1

Version Change List ( P. I. R. List )

Item Issue DescriptionDate

23 Card Reade r RTS520 9 Add a ca rdreader conn JE RAD1 to co-lay f or 2nd source A LPS. T he requ irement from ME

D D

C C

1

2

33 DC/DC Inte rface Net nam e change d from + 1.5V_D t o +3V_US B T he disch arge cir cuit for power r ail +3V of USB3 .0

3

29 PWRBTN/SCR EWH/KB footpr ints cha nged fr om H_2P7 to H_3P 0 T he requi rement f rom ME

4

31 EC ENE-KB9 30/ ENE3 810 Add a net CP_ SEL link U620.2 to PQ115 .2 T he requ irement from PWR

5

31 EC ENE-KB9 30/ ENE3 810 Add a cap. 20 p_0402 o n XCLK0 of KB930 t o follow the sug gestion from ENE

6

16 PCH (4/8) PCI, USB , NVRAM GPIO10 changed to GPIO1 4 for US B3_SMI# for com mon desi gn with Voyager

7

10 PROCESSOR( 6/6) PWR ,VSS BOM cha nged for QC4, Ma ximum de rateing changed from 12 V to 20V safe to pass deratein g

8

9

10

13 CHARGER Del RH2 60,RH261 The req uirement from PW R

10 PROCESSOR( 6/6) PWR ,VSS BOM cha nged for CC176, Maximum deratein g change d from 2V to 2. 5V safe to pass der ateing

11

21 VGA / LVDS /camera conn. 10/10/2 5 Add FV3, Del R20 12 The req uirement from Sa fty 0.3

12

39 HDMI 10/10 /25

13

14

38 Mini Displ ay Port

31 EC ENE-KB9 30/ ENE3 810

15

17 21

18 18

VGA / L VDS /cam era conn .

PCH (6/ 8) PWR

Request
Owner

10/11/2 6

10/11/2 9

10/12/0 1

10/12/0 6

10/12/0 7

10/12/0 7

10/12/0 7

10/10/1 9

10/10/1 9

10/10/2 5 COMPAL

10/10/2 5

10/10/2 5

10/10/2 5

10/10/2 6 COMPAL BOM changed for L31 ,L32,L10 3,C540,C 541,C542 ,C537,C 538,C539

10/10/2 7 COMPAL Del RH211, Add RH21 2

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL 0.3

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

Remove the net 3S/4S# f rom U34. 103 to P JP3031 EC ENE-KB9 30/ ENE3 810

Del RI2 2,RI27, Add RI21 ,RI2527 +VGA_CORE

Add FV2 , Del RV 10 The req uirement from Sa fty 0.3

BOM cha nged for QV9 The req uirement from So urcer.(F airchild support no goo d)

BOM cha nged for R225

Page 1

Solution Description Rev.Page# Title

to avoi d EC dam aged by ESD. Fix issue D F434042 (2) [S_ PT] Memo ry Matri x
test, s ystem 7 beeps er ror

power r ail chan ged from +vs to +valw to fix iss ue can' t wake f rom S3 b y
port of USB3.0

for Boa rd ID ch anged

for sho rtage

The req uirement from EM C for CR T 0.3

+VCCAFD I_VRM co me from +1.5VS c hanged t o U47 LD O_VOUT 0 .3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.316 22 GLAN AR815 1 AL1A/ RJ45 10/10/25 CO MPAL BOM changed for CL39

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL

THIS SHE ET OF ENGINE ERING DR AWING IS THE PR OPRIETARY PR OPERTY OF COMPAL EL ECTRON ICS, INC. AND CONTAINS C ONFIDEN TIAL
AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D

AND TRADE S ECRET IN FORMATION. THIS SH EET MAY NOT BE TRANSFE RED FROM TH E CUSTOD Y OF THE COMPETE NT DIVISION OF R& D
DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS

DEPARTMEN T EXCEPT AS AUTHOR IZED BY COMPAL EL ECTRON ICS, INC. N EITHER TH IS SHEET N OR THE INFO RMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

5

4

MAY BE USED BY OR D ISCLOSE D TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELEC TRONICS , INC.

3

2011/01/25 2012/01/25

2011/01/25 2012/01/25

2011/01/25 2012/01/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Com pal El ectronics, Inc.

Com pal El ectronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Com pal El ectronics, Inc.

HW-PIR

HW-PIR

HW-PIR

61 61Tuesday, January 25, 2011

61 61Tuesday, January 25, 2011

1

61 61Tuesday, January 25, 2011

1.0

1.0

1.0

of

of

of