Compal LA-675AP Schematics Rev1.0

A

1 1

B

C

D

E

Compal Confidential

2 2

G470/G570 UMA M/B Schematics Document

Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH

3 3

2010-12-03

LA-675AP

REV:1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

LA-675AP

E

151Thursday, May 05, 2011

1.0

of

A

Compal confidential

File Name : G470/G570

B

C

D

For 14"(Page 4x) LS6753P PWR/B LS6751P CardReader/B

E

For 15"(Page 4x+1) LS6753P PWR/B LS6751P CardReader/B LS6754P LED/B

Intel

1 1

HDMI Connector

CRT

Page33

Page32

100MHz

2.7GT/s

Connector LVDS

2 2

Connector

LAN

Page31

Page35

PCI-E x1 *6

Athros

AR8151-B(GLAN) AR8152-B(10/100)

RJ-45 Connector

PCI Express

Mini Card Slot *1

3 3

Page36

SPIROM BIOS

PCI-E(WLAN)

USB(WiMAX)

WLAN WiMAX

Page34

Sandy Bridge

Socket-rPGA988B

37.5mm*37.5mm

FDI *8

Intel

Cougar Point

FCBGA 989 25mm*25mm

LPC BUS

Page40

EC

ENE KB930 ENE KB9012

Page5‐11

DMI *4

Page14‐22

DDR3 SO-DIMM *2

BANK 0, 1, 2, 3

Dual Channel DDR3 1066MHz(1.5V) DDR3 1333MHz(1.5V)

Audio Codec

AZALIA

USB2.0 *14

SATA *6

Conexant

CX20671

Up to 8GB

Page12‐13

2 channel speaker Int. MIC

Page39

Audio Jacks

Camera Conn. BlueTooth Conn. Mini Card Slot *1 Card Reader

Reltek

RTS5139 SDXC/MMC/MS/xD

USB2.0 *1(Right)

Page42

Page34

LS6755P ODD/B

Touch Pad Int. KBD

USB2.0 *2(Left)

Thermal Sensor

EMC1403

4 4

A

B

Page37

SPI ROM

Page41 Page42

Security Classification

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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

eSATA+USB(Left) SATA3 HDD SATA ODD

Compal Secret Data

2010/07/12 2012/07/11

C

Compal Secret Data

Deciphered Date

D

(Port 0/Port 1 support SATA3)

Page38

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

LA-675AP

Block Diagram

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A

Voltage Rails

power

State

S0

S3

S5 S4/AC

Device

Smart Battery

plane

Address

0001 011X b

+B

O

O O O

X

+5VALW

+3VALW

O

O O

X XX X

+1.5V

EC SM Bus2 address

Device

Thermal Sensor EMC1403-2

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

EC SM Bus1 address

PCH SM Bus address

Device Address

3 3

DDR DIMM0 DDR DIMM2

1001 000Xb 1001 010Xb

B

+5VS +3VS +1.5VS +VCCP +CPU_CORE +VGA_CORE +GFX_CORE +1.8VS

+0.75VS +1.05VS

BOARD ID Table

Board ID

OO

O

XX X

Address

1001_101xb

X

USB Port Table

X

USB 2.0 USB 1.1 Port

EHCI1

EHCI2

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

D

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VALW +V +VS Clock

LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

E

ON

OFF

ON ON

ON

OFF

LOW

OFF

ON

Board ID / SKU ID Table for AD channel

0

0.1

1 2 3 4 5 6 7

3 External USB Port

0

PCB Revision

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

USB/B (Right Side)

1

USB Port (Left Side)

2

USB Port (Left Side)

3

USB Port (Left Side)

4 5

Camera

6 7 8

Mini Card(WLAN)

9 10 11

Card Reader

12 13

Blue Tooth

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

7 NC

AD_BID

V typ

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

BOM Structure Table

BTO Item BOM Structure

Blue Tooth BT@ eSATA ESATA@ COMMON HDMI HDMI@ Connector ME@ 45 LEVEL 45@ 10/100 LAN 8152@

CMOS@CAMERA DEVICE

GIGA@GIGA LAN

V

max

AD_BID

0 V 0 V

0.538 V

0.875 V

2.341 V

3.300 V

EVT DVT PVT MP

SMBUS Control Table

X X

V

+3VS

X

WLAN WWAN

SOURCE

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2 SMBCLK SMBDATA SML0CLK SML0DATA

4 4

SML1CLK SML1DATA

KB930

+3VALW

KB930

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

VGA BATT KE930 SODIMM

X V

+3VALW

X X X

V

+3VS

A

X X X

X

X X

V

+3VS

X XX

V

+3VS

X

B

Thermal Sensor

X X X XX

V

+3VS

PCH

X

V

+3VS

X X XXX

Unpop

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

D

@

Compal Electronics, Inc.

Title

Size Document Number Rev

B

LA-675AP

Date: Sheet

Compal Electronics, Inc.

Notes List

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351Thursday, May 05, 2011

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1

Power-Up/Down Sequence

All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-up sequence, though a shorter ramp-up duration is preferred.

VDDR3 should ramp-up before or simultaneously with VDDC. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin before

D D

DPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC and

VDD_CT have ramped up. VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts to

ramp-up (or vice versa).)

PCIE_VDDC(1.0V)

VDDR3(3.3VGS)

Note: Do not drive any IOs before VDDR3 is ramped up.

VDDR1(1.5VGS)

VDDC/VDDCI(1.12V)

C C

VDD_CT(1.8V)

PERSTb

REFCLK

Straps Reset

Straps Valid

Global ASIC Reset

B B

T4+16clock

WithoutBACOoption:

PE_GPIO0:Low‐>ResetdGPU;High‐>Normaloperation

PE_GPIO1:Low‐>dGPUPowerOFF;High‐>dGPUPowerON

BACOoption:

PE_GPIO0:High‐>Normaloperation(dGPUisnotresetonBACOmode)

PE_GPIO1:Low‐>dGPUPowerOFF;High‐>dGPUPowerON(alwaysHigh)

dGPUPowerPins

PCIE_PVDD,PCIE_VDDR,TSVDD,VDDR4,VDD_CT, DPE_PVDD,DP[F:E]_VDD18,DP[D:A]_PVDD, DP[D:A]_VDD18,AVDD,VDD1DI,A2VDDQ,VDD2DI, DPLL_PVDD,MPV18,andSPV18

DP[F:E]_VDD10,DP[D:A]_VDD10,DPLL_VDDC,and SPV10

PCIE_VDDC

VDDR3,andA2VDD

BIF_VDDC(currentconsumption=55mA@1.0V,in BACOmode)

VDDR1

VDDC/VDDCI

PowerSequence

+1.0V

+3.3VALW

+1.5V

SI4800

BACO(jmp)

EN

MOS

BACO(jmp)

SI4800

+1.0VGS

+3.3VGS

+1.5VGS

Voltage

1.8V

1.0V

3.3V

Sameas VDDC

1.5V

1.12V

EN

Regulator

+VGA_CORE

+B

1.12V

SI4800

BACO(jmp)

EN

+1.8VGS

PE_GPIO0

PE_EN

dGPU

P24

+1.8V

PE_GPIO1

iGPU

PX3.0

OFF

BACOSwitch P25

BIF_VDDC

BACOMode

ON

ON Sameas PCIE_VDDC

OFF

PX_mode

PWRGOOD

Maxcurrent

1679mA

575mA

2A

190mA

70mA

2.8A

12.9A

Regulators

VDDC/VDDCI

VDDR1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

CLOCK GENERATOR

LA-675AP

1

1.0

of

451Thursday, May 05, 2011

of

451Thursday, May 05, 2011

of

451Thursday, May 05, 2011

5

4

3

2

1

D D

+1.05VS

12

R1

24.9_0402_1%

JCPU1A

EDP_COMP eDP_HPD

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev1p0

ME@

DMI

Intel(R) FDI

eDP

DMI_CRX_PTX_N0<16> DMI_CRX_PTX_N1<16> DMI_CRX_PTX_N2<16> DMI_CRX_PTX_N3<16>

DMI_CRX_PTX_P0<16> DMI_CRX_PTX_P1<16> DMI_CRX_PTX_P2<16> DMI_CRX_PTX_P3<16>

DMI_CTX_PRX_N0<16> DMI_CTX_PRX_N1<16> DMI_CTX_PRX_N2<16> DMI_CTX_PRX_N3<16>

DMI_CTX_PRX_P0<16>

C C

+1.05VS

12

R7

B B

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms

24.9_0402_1%

R7

FDI_FSYNC0<16> FDI_FSYNC1<16>

FDI_INT<16>

FDI_LSYNC0<16> FDI_LSYNC1<16>

DMI_CTX_PRX_P1<16> DMI_CTX_PRX_P2<16> DMI_CTX_PRX_P3<16>

FDI_CTX_PRX_N0<16> FDI_CTX_PRX_N1<16> FDI_CTX_PRX_N2<16> FDI_CTX_PRX_N3<16> FDI_CTX_PRX_N4<16> FDI_CTX_PRX_N5<16> FDI_CTX_PRX_N6<16> FDI_CTX_PRX_N7<16>

FDI_CTX_PRX_P0<16> FDI_CTX_PRX_P1<16> FDI_CTX_PRX_P2<16> FDI_CTX_PRX_P3<16> FDI_CTX_PRX_P4<16> FDI_CTX_PRX_P5<16> FDI_CTX_PRX_P6<16> FDI_CTX_PRX_P7<16>

FDI_FSYNC0 FDI_FSYNC1

FDI_INT FDI_LSYNC0

FDI_LSYNC1

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

PEG_COMP

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

24.9_0402_1%

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 mohms

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

LA-675AP

1

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551Thursday, May 05, 2011

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+1.05VS

12

R9

62_0402_5%

H_PROCHOT#<32>

H_PROCHOT#

closs to EC 250~750mils

H_PECI<19,32>

H_THRMTRIP#<19>

H_SNB_IVB#<18>

4

56_0402_5%

R15

1 2

H_CATERR#

H_PECI

H_PROCHOT#_R

H_THRMTRIP#

C26

AN34

AL33

AN33

AL32

AN32

JCPU1B

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

3

A28

BCLK

A27

BCLK#

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

A16 A15

R8

AK1 A5 A4

CLK_CPU_DMI_R CLK_CPU_DMII#_R

R12 1K_0402_5%R12 1K_0402_5% R13 1K_0402_5%R13 1K_0402_5%

H_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

R10 0_0402_5%R10 0_0402_5% R11

R11

12 12

H_DRAMRST# <7>

R16 140_0402_1%R16 140_0402_1% R17 25.5_0402_1%R17 25.5_0402_1% R18 200_0402_1%R18 200_0402_1%

2

1 2 1 2

0_0402_5%

12 12 12

DG1.0

+1.05VS

CLK_CPU_DMI <15> CLK_CPU_DMI# <15>

DDR3 Compensation Signals

1

PRDY#

R22

C C

R26

0_0402_5%

H_CPUPWRGD<19>

0_0402_5%

0.1U_0402_16V4Z

10/12 reserve R880 / R882

B B

PCH_POK<16,32>

SYS_PWROK<16>

PM_DRAM_PWRGD<16>

1 2

R161 100K_0402_5%R161 100K_0402_5%

+3VS

1 2

R26

1 2

R27

R27 10K_0402_5%

10K_0402_5%

1 2

+3VALW

1

C33

2

R8820_0402_5%@R8820_0402_5%

@

R8800_0402_5%@R8800_0402_5%

@

U1

5

1

P

B

2

A

G

74AHC1G09GW_TSSOP5

3

SUSP<10,37,51>

PM_SYS_PWRGD_BUF

4

O

SUSP

2

G

H_PM_SYNC<16>

+1.5V_CPU_VDDQ

12

@

R33

R33 39_0402_5%

39_0402_5%

13

D

Q1

Q1 2N7002H_SOT23-3

2N7002H_SOT23-3

S

12

R30

R30 200_0402_5%

200_0402_5%

@

Change footprint 20100814

R22

0_0402_5%

1 2

R29

1 2

130_0402_5%

H_PM_SYNC_R

H_CPUPWRGD_R

PM_DRAM_PWRGD_R

BUF_CPU_RST#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

Sandy Bridge_rPGA_Rev1p0

ME@

12

R35

@R35

@

0_0402_5%

+1.05VS

R32

75_0402_5%

R34

43_0402_1%

1 2

SN74LVC1G07DCKR_SC70-5

Buffered reset to CPU

0.1U_0402_16V4Z

12

BUFO_CPU_RST#

JTAG & BPM

C34

U2

4

PREQ#

TRST#

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

+3VS

1

2

5

1

P

NC

Y

2

A

G

3

TCK TMS

TDO

TDI

AP27 AR26

AR27 AP30

AR28 AP26

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

PLT_RST#

XDP_PREQ# XDP_TCK

XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO

XDP_DBRESET#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

3V

PLT_RST# <18>

XDP_TMS

R20 51_0402_5%R20 51_0402_5%

XDP_TDI

R21 51_0402_5%R21 51_0402_5%

XDP_TDO

R23 51_0402_5%@R23 51_0402_5%@

XDP_TCK

R24 51_0402_5%R24 51_0402_5%

XDP_TRST#

R25 51_0402_5%R25 51_0402_5%

R28 1K_0402_5%R28 1K_0402_5%

12

+3VS

XDP_PRDY#

AP29

+1.05VS

12 12 12

12 12

PU/PD for JTAG signals

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2010/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Custom

LA-675AP

Date: Sheet

2

Date: Sheet

1

651Thursday, May 05, 2011

1.0

of

5

JCPU1C

4

3

JCPU1D

2

1

DDR_A_D[0..63]<12>

D D

C C

B B

DDR_A_BS0<12> DDR_A_BS1<12> DDR_A_BS2<12>

DDR_A_CAS#<12> DDR_A_RAS#<12> DDR_A_WE#<12>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AP11 AN11

AL12 AM12 AM11

AL11 AP12 AN12

AJ14 AH14

AL15 AK15

AL14 AK14

AJ15 AH15

AE10 AF10

F10 G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8

AE8 AD9 AF9

C5 D5 D3 D2 D6 C6 C2 C3

F8

G9

F9

F7 G8 G7

K4

K5

K1

J1

J5

J4

J2

K2 M8

N8 N7

M9 N9 M7

V6

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

RSVD_TP[10]

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0]

SA_CS#[1] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0]

SA_ODT[1] RSVD_TP[9]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AB6 AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 <12> M_CLK_DDR#0 <12> DDR_CKE0_DIMMA <12>

M_CLK_DDR1 <12> M_CLK_DDR#1 <12> DDR_CKE1_DIMMA <12>

DDR_CS0_DIMMA# <12> DDR_CS1_DIMMA# <12>

M_ODT0 <12> M_ODT1 <12>

DDR_A_DQS#[0..7] <12>

DDR_A_DQS[0..7] <12>

DDR_A_MA[0..15] <12> DDR_B_MA[0..15] <13>

DDR_B_D[0..63]<13>

DDR_B_BS0<13> DDR_B_BS1<13> DDR_B_BS2<13>

DDR_B_CAS#<13> DDR_B_RAS#<13> DDR_B_WE#<13>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AM5 AM6 AR3

AN3 AN2 AN1

AN9

AN8 AR6 AR5 AR9

AJ11

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34]

AP3

SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40] SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

RSVD_TP[17] RSVD_TP[18]

RSVD_TP[19] RSVD_TP[20]

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

M_CLK_DDR2 <13> M_CLK_DDR#2 <13> DDR_CKE2_DIMMB <13>

M_CLK_DDR3 <13> M_CLK_DDR#3 <13> DDR_CKE3_DIMMB <13>

DDR_CS2_DIMMB# <13> DDR_CS3_DIMMB# <13>

M_ODT2 <13> M_ODT3 <13>

DDR_B_DQS#[0..7] <13>

DDR_B_DQS[0..7] <13>

Sandy Bridge_rPGA_Rev1p0

Deciphered Date

Sandy Bridge_rPGA_Rev1p0

ME@

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

LA-675AP

1

751Thursday, May 05, 2011

of

1.0

Sandy Bridge_rPGA_Rev1p0

ME@

R36

@R36

@

0_0402_5%

1 2

D

S

D

S

DDR3_DRAMRST#_RH_DRAMRST#

1 2

13

Q2

G

BSS138_NL_SOT23-3

2

1

C35

0.047U_0402_16V4Z

2

H_DRAMRST#<6>

R39

4.99K_0402_1%

A A

DRAMRST_CNTRL_PCH<15>

5

R40

0_0402_5%

1 2

DRAMRST_CNTRL

+1.5V

12

R37

1K_0402_5%

R38

R38 1K_0402_5%

1K_0402_5%

1 2

Eiffel used 0.01u Module design used 0.047u

4

DDR3_DRAMRST# <12,13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

5

4

3

2

1

CFG Straps for Processor

CFG2

D D

JCPU1E

L7

RSVD28

AG7

AK28

CFG[0]

AK29

CFG2 CFG4

CFG5 CFG6 CFG7

C C

B B

R64

1K_0402_1%

T9 PADT9 PAD T10 PADT10 PAD T11 PADT11 PAD T12 PADT12 PAD

12

R353

1K_0402_1%

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

Sandy Bridge_rPGA_Rev1p0

ME@

RESERVED

RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

VCC_DIE_SENSE

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

KEY

AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35 AM35

AT2 AT1 AR1

B1

T13PAD T13PAD

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

*

Display Port Presence Strap

CFG4

*

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

12

R41

R41 1K_0402_1%

1K_0402_1%

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

CFG4

1K_0402_1%

12

R42

@ R42

@

1K_0402_1%

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6 CFG5

12

R43

@R43

@

CFG7

12

@R45

@

R44

@R44

@

1K_0402_1%

R45 1K_0402_1%

1K_0402_1%

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

0: PEG Wait for BIOS for training

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

LA-675AP

1

851Thursday, May 05, 2011

1.0

of

5

+CPU_CORE

D D

+CPU_CORE

C C

+CPU_CORE

B B

(330uF)*4

(6/16 change 10uF_0603_6.3V)*5

10U_0805_6.3V6M

1

2

1

2

1

C36

2

C48

10U_0603_6.3V6M

C48

10U_0603_6.3V6M

1

2

10U_0805_6.3V6M

1

C37

2

C49

10U_0603_6.3V6M

C49

10U_0603_6.3V6M

1

2

10U_0805_6.3V6M

1

C38

C39

2

C50

10U_0603_6.3V6M

C50

10U_0603_6.3V6M

C51

10U_0603_6.3V6M@C51

10U_0603_6.3V6M

1

2

@

(22uF_0805_6.3V)*16

C67

22U_0805_6.3V6M

C67

22U_0805_6.3V6M

C66

22U_0805_6.3V6M@C66

22U_0805_6.3V6M

1

2

@

C74

22U_0805_6.3V6M

C74

22U_0805_6.3V6M

1

2

1

2

330U_X_2VM_R6M

1

+

2

22U_0805_6.3V6M

1

2

C79

22U_0805_6.3V6M

C79

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

2

330U_X_2VM_R6M

1

C89

C88

+

2

C68

22U_0805_6.3V6M

C68

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

C75

1

2

22U_0805_6.3V6M@C81

22U_0805_6.3V6M

C80

1

@

2

C84

22U_0805_6.3V6M

1

2

330U_X_2VM_R6M

1

C90

+

2

C70

22U_0805_6.3V6M

C70

22U_0805_6.3V6M

1

2

C76

C77

22U_0805_6.3V6M

C77

22U_0805_6.3V6M

1

2

C82

22U_0805_6.3V6M@C82

22U_0805_6.3V6M

C81

1

@

2

C86

22U_0805_6.3V6M

C86

22U_0805_6.3V6M

C85

1

2

C394

330U_X_2VM_R6M

1

+

2

1

+

C91

2

8/23 modify

A A

5

4

POWER

JCPU1F

POWER

3

2

1

Cap quantity follow HR_PDDG_Rev07

QC=94A

C399

DC=53A

1

+

2

10U_0805_6.3V6M

1

C40

2

C52

10U_0603_6.3V6M

C52

10U_0603_6.3V6M

1

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

2

@+C394

@

C53

10U_0603_6.3V6M

C53

10U_0603_6.3V6M

1

2

C71

C78

C83

C87

@+C399

@

330U_X_2VM_R6M

4

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Sandy Bridge_rPGA_Rev1p0

ME@

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30

PEG AND DDR

VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

SENSE LINES SVID

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSSIO_SENSE

2010/07/12 2012/07/11

CORE SUPPLY

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

18A

+1.05VS

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

C41

22U_0805_6.3V6M

C41

22U_0805_6.3V6M

C42

22U_0805_6.3V6M

C42

22U_0805_6.3V6M

1

2

C58

22U_0805_6.3V6M

C58

22U_0805_6.3V6M

C57

22U_0805_6.3V6M

C57

22U_0805_6.3V6M

1

2

OSCAN

(220uF_6.3V_4.2L_ESR17m)*2=(SF000002Y00)

R47 43_0402_5%R47 43_0402_5% R48 0_0402_5% R48 0_0402_5% R49 0_0402_5% R49 0_0402_5%

R50 130_0402_5%R50 130_0402_5%

VCC_SENCE 100ohm +-1% pull-up to VCC near processor

VCCSENSE_R

AJ35

VSSSENSE_R

AJ34

B10 A10

1 2

8/12 Modify, need follow diffential routing R74 close CPU,R75 close PWR

R52 0_0402_5%R52 0_0402_5% R53 0_0402_5%R53 0_0402_5%

R74

VSSIO_SENSE

0_0402_5%

@

Compal Secret Data

1 2 1 2

VCCIO_SENSE <51>

Deciphered Date

22uF*7 NO-STUFF

(22uF_0805_6.3V)*13

OSCAN

C44

22U_0805_6.3V6M

C44

22U_0805_6.3V6M

C43

22U_0805_6.3V6M

C43

22U_0805_6.3V6M

1

2

C59

22U_0805_6.3V6M@C59

22U_0805_6.3V6M

1

2

1 2 1 2 1 2

1 2

R75

0_0402_5%

@

1

2

C60

22U_0805_6.3V6M@C60

22U_0805_6.3V6M

1

@

2

12

22U_0805_6.3V6M

22U_0805_6.3V6M@C61

22U_0805_6.3V6M

C54

C61

@

1

+

2

+1.05VS

12

+1.05VS

+CPU_CORE

C45

22U_0805_6.3V6M

C45

22U_0805_6.3V6M

1

2

C62

22U_0805_6.3V6M@C62

22U_0805_6.3V6M

1

@

2

C69

C69 220U_6.3V_M

220U_6.3V_M

R46

R46 75_0402_5%

75_0402_5%

12

R51

R51 100_0402_1%

100_0402_1%

12

R54

R54 100_0402_1%

100_0402_1%

22U_0805_6.3V6M

C46

22U_0805_6.3V6M

C46

22U_0805_6.3V6M

1

2

C63

22U_0805_6.3V6M@C63

22U_0805_6.3V6M

22U_0805_6.3V6M@C64

22U_0805_6.3V6M

1

@

2

1

+

C72

C72 220U_6.3V_M

220U_6.3V_M

2

VR_SVID_CLK

VCCSENSE <53> VSSSENSE <53>

C55

1

2

C64

1

@

2

series-resistors close to VR

VR_SVID_ALRT# <53> VR_SVID_CLK <53> VR_SVID_DAT <53>

22U_0805_6.3V6M

22U_0805_6.3V6M@C65

22U_0805_6.3V6M

+1.05VS

C56

C47

22U_0805_6.3V6M

C47

22U_0805_6.3V6M

1

2

C65

@

330U_D2_2.5VY_R9M

C73

1

+

@

2

VSS_SENCE 100ohm +-1% pull-down to GND near processor

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(5/7) PWR,BYPASS

LA-675AP

1

951Thursday, May 05, 2011

1.0

of

5

4

3

2

1

+1.5V +1.5V_CPU_VDDQ

8/27 change to stuff

SUSP<6,37,51>

D D

CPU1.5V_S3_GATE<32>

SUSP#<32,37,49,51>

0_0402_5%

R60

@

C C

B B

A A

@

8/27 change to @

+VGFX_CORE

12

1 2

C98

22U_0805_6.3V6M

C98

22U_0805_6.3V6M

1

2

C108

22U_0805_6.3V6M

C108

22U_0805_6.3V6M

1

2

@

R580_0402_5%@R580_0402_5%

@

R590_0402_5%@R590_0402_5%

C99

22U_0805_6.3V6M

C99

22U_0805_6.3V6M

1

2

C109

22U_0805_6.3V6M

C109

22U_0805_6.3V6M

1

2

+1.8VS

1 2

+3VALW

12

R667

100K_0402_5% @

@

13

2

G

Change footprint 20100814

8/27 change to @

C100

22U_0805_6.3V6M

C100

22U_0805_6.3V6M

C101

22U_0805_6.3V6M

C101

22U_0805_6.3V6M

1

2

C110

22U_0805_6.3V6M@C110

22U_0805_6.3V6M

1

2

@

10/21 Change

330U_D2_2.5VY_R9M

C115

1

+

2

R67

0_0805_5%

1

2

1 2

R6680_0402_5% R6680_0402_5%

+VSB

12

R56

15K_0402_1%

RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3

D

Q7

Q7 2N7002H_SOT23-3

2N7002H_SOT23-3

S

C102

22U_0805_6.3V6M

C102

22U_0805_6.3V6M

1

2

C111

22U_0805_6.3V6M@C111

22U_0805_6.3V6M

1

2

1

+

2

C154

22U_0805_6.3V6M@C154

22U_0805_6.3V6M

1

2

@

C103

22U_0805_6.3V6M

C103

22U_0805_6.3V6M

C112

22U_0805_6.3V6M

C112

22U_0805_6.3V6M

330U_D2_2.5VY_R9M

C116

C345

22U_0805_6.3V6M@C345

22U_0805_6.3V6M

@

Change footprint 20100814

C104

22U_0805_6.3V6M

C104

22U_0805_6.3V6M

1

2

C113

22U_0805_6.3V6M

C113

22U_0805_6.3V6M

1

2

@

10U_0805_6.3V6M

1

2

1

2

C130

C105

22U_0805_6.3V6M

C105

22U_0805_6.3V6M

13

D

Q4

2

G

2N7002H_SOT23-3

S

C107

22U_0805_6.3V6M

C107

22U_0805_6.3V6M

C106

22U_0805_6.3V6M

C106

22U_0805_6.3V6M

1

2

+1.8VS_VCCPLL VCCSA_SENSE

C132

1U_0402_6.3V6K

C132

1U_0402_6.3V6K

C131

1U_0402_6.3V6K

C131

1U_0402_6.3V6K

1

2

J1

@J1

@

1 2

PAD-OPEN 4x4m

U3

DMN3030LSS-13_SOP8L-8

8 7

5

AT24

AT23

AT21

AT20

AT18

AT17

AR24

AR23

AR21

AR20

AR18

AR17

AP24

AP23

AP21

AP20

AP18

AP17

AN24

AN23

AN21

AN20

AN18

AN17

AM24

AM23

AM21

AM20

AM18

AM17

AK24

AK23

AK21

AK20

AK18

AK17

AH24

AH23

AH21

AH20

AH18

AH17

U3

4

12

JCPU1G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

Sandy Bridge_rPGA_Rev1p0

ME@

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

R57

R57 330K_0402_5%

330K_0402_5%

@

1 2 36

R885

1 2

0_0402_5%

POWER

GRAPHICS

1.8V RAIL

1

12

R55

220_0402_5%

2N7002H_SOT23-3

Change footprint 20100814

R55

13

D

Q3

S

2

G

@ C92

@

2

C92

0.1U_0402_10V6K

RUN_ON_CPU1.5VS3#

11/18 add for sequence

1

C97

0.1U_0603_25V7K

2

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

FC_C22

AK35 AK34

+V_SM_VREF_CNT +V_SM_VREF

AL1

0.1U_0402_16V4Z

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

M27 M26 L26 J26 J25 J24 H26 H25

H23

H_FC_C22

C22 C24

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

VCCSA_VID1

VCC_AXG_SENSE <53> VSS_AXG_SENSE <53>

1

C114

2

C117

10U_0603_6.3V6M

C117

10U_0603_6.3V6M

C118

10U_0603_6.3V6M

C118

10U_0603_6.3V6M

1

2

+VCCSA

C125

10U_0805_6.3V6M

C125

10U_0805_6.3V6M

C124

10U_0805_6.3V6M

C124

10U_0805_6.3V6M

1

2

R68 0_0402_5%

R69 10K_0402_5%

100K_0402_5%

100K_0402_5% R666

R666

@

1 2

C119

10U_0603_6.3V6M

C119

10U_0603_6.3V6M

1

2

C126

10U_0805_6.3V6M

C126

10U_0805_6.3V6M

1

2

1 2

@

10U_0603_6.3V6M

1

2

1

2

RUN_ON_CPU1.5VS3

+1.5V_CPU_VDDQ

C122

10U_0603_6.3V6M

C122

10U_0603_6.3V6M

C121

10U_0603_6.3V6M

C121

10U_0603_6.3V6M

C120

1

2

+VCCSA

@

R65 0_0402_5%R65 0_0402_5%

C127

10U_0805_6.3V6M@C127

10U_0805_6.3V6M

1

+

C128

@+C128

@

330U_2.5V_M

6.3 X4.2

2

R66 0_0402_5%R66 0_0402_5%

VCCSA_SEL <50>

+1.5V_CPU_VDDQ

R61

0_0402_5%

3

2

1

+

C123

C123 330U_2.5V_M

330U_2.5V_M

2

1 2

+1.5V

0.1U_0402_10V6K

C95

1

2

12

1

Q5

@Q5

@

AP2302GN-HF_SOT23-3

VCCSA_SENSE

@

0.1U_0402_10V6K

C129

C396

C96

C396

1

2

+1.5V_CPU_VDDQ

12

10/5 change to 1K

VCCSA_SENSE <50>

VSSSA_SENSE <50>

R62

R62 1K_0402_1%

1K_0402_1%

R63

R63 1K_0402_1%

1K_0402_1%

6/9 change 330U to 22U X2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

LA-675AP

Date: Sheet

2

Date: Sheet

1

10 51Thursday, May 05, 2011

1.0

of

5

D D

C C

B B

4

JCPU1H

AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10

AR25 AR22 AR19 AR16 AR13 AR10

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7 AM4 AM3 AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AJ25

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42

AN7

VSS43

AN4

VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77

AK7

VSS78

AK4

VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

3

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

2

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

1

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

Sandy Bridge_rPGA_Rev1p0

ME@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Sandy Bridge_rPGA_Rev1p0

ME@

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

LA-675AP

1

1.0

of

11 51Thursday, May 05, 2011

5

+VREF_DQ_DIMMA +1.5V

+VREF_DQ_DIMMA

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K C133

C133

1

2

D D

C C

B B

A A

2

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7> DDR_A_WE#<7>

DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

+3VS

1

2

5

DDR_A_D0

C134

DDR_A_D1 DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 M_CLK_DDR0

M_CLK_DDR#0 DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# M_ODT0 DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

1 2

10K_0402_5%

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

C155

C156

1

2

+1.5V +1.5V

3A@1.5V

DDR3 SO-DIMM A

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

R81

10K_0402_5%

12

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

R83

VTT1

205

G1

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2 DQ22

DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1

VDD2

A15 A14

VDD4

A11

A7

VDD6

A6 A4

VDD8

A2 A0

CK1 CK1#

VDD12

BA1 RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL VTT2

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F ME@

ME@

G2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

4

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 DDR3_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31

DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0 M_CLK_DDR1

M_CLK_DDR#1 DDR_A_BS1

DDR_A_RAS# DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

SMB_DATA_S3 SMB_CLK_S3

+0.75VS

0.65A@0.75V

4

DDR3_DRAMRST# <7,13>

DDR_CKE1_DIMMA <7>

M_CLK_DDR1 <7> M_CLK_DDR#1 <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7> M_ODT0 <7>

M_ODT1 <7>

0.1U_0402_10V6K

0.1U_0402_10V6K C135

C135

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs) 6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

VREF =

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

SMB_DATA_S3 <13,15,26> SMB_CLK_S3 <13,15,26>

+VREF_CA

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C136

C136

1

2

DDR_A_D[0..63]<7> DDR_A_DQS[0..7]<7> DDR_A_DQS#[0..7]<7> DDR_A_MA[0..15]<7>

R72

1K_0402_1%

R73

1K_0402_1%

4*0402 1uf

+1.5V

12

1*0402 2.2uf

3

12

R70

1K_0402_1%

+VREF_DQ_DIMMA

12

R71

Layout Note: Place near DIMM

10U_0603_6.3V6M

C137

C138

1

@

2

Layout Note: Place near DIMM

10U_0603_6.3V6M

C139

1

2

+1.5V

C140

1

2

(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)

OSCAN

(10uF_0603_6.3V)*8 (0.1uF_402_10V)*4

10U_0603_6.3V6M

C142

1

2

10U_0603_6.3V6M

C143

1

2

10U_0603_6.3V6M

C141

1

2

7/28 Update connect GND directly

+0.75VS

C151

1U_0402_6.3V6K

C151

1U_0402_6.3V6K

C150

1U_0402_6.3V6K

C150

1U_0402_6.3V6K

C152

1U_0402_6.3V6K

C152

1U_0402_6.3V6K

C153

1U_0402_6.3V6K

C153

1

2

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

1U_0402_6.3V6K

1

2

@

Compal Secret Data

Deciphered Date

2

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

Layout Note: Place near DIMM

10U_0603_6.3V6M

C144

1

2

1

0.1U_0402_10V6K

C145

C146

1

2

C146

1

2

Title

Size Document Number Rev

Custom

Date: Sheet

0.1U_0402_10V6K

0.1U_0402_10V6K C148

C148

C147

1

2

1

+

C149

C149 220U_6.3V_M

220U_6.3V_M

2

@

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

LA-675AP

1

1.0

of

12 51Thursday, May 05, 2011

5

+VREF_DQ_DIMMB

1

C157

2

C177

1

2

+VREF_DQ_DIMMB DDR_B_D0

DDR_B_D1 DDR_B_DM0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2 DDR_B_D18

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 M_CLK_DDR2

M_CLK_DDR#2 DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D50

DDR_B_D51 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

R95

1 2

10K_0402_5%

0.1U_0402_10V6K

0.1U_0402_10V6K R97 10K_0402_5%R97 10K_0402_5%

C178

5

1 2

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

1

C158

+3VS

2

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7> DDR_B_WE#<7>

DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

2.2U_0603_6.3V4Z

1

2

D D

C C

B B

A A

+1.5V

3A@1.5V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17 VSS1849DQ22

51

DQ18

53

DQ19 VSS2055DQ28

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U8SN-7F

ME@

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

DQ23

VSS19

DQ29

VSS21

DQS3 DQ30

DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30 VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42 VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

+1.5V

2 4

DQ4

6

DQ5

8 10 12 14 16

DQ6

18

DQ7

20 22 24 26 28

DM1

30 32 34 36 38 40 42 44 46

DM2

48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102

CK1

104 106 108

BA1

110 112 114

S0#

116 118 120 122

NC2

124 126 128 130 132 134 136

DM4

138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170

DM6

172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

SDA

202

SCL

204 206

G2

4

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31

DDR_CKE3_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 M_CLK_DDR3

M_CLK_DDR#3 DDR_B_BS1

DDR_B_RAS# DDR_CS2_DIMMB#

M_ODT2 M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63

SMB_DATA_S3 SMB_CLK_S3

0.65A@0.75V

4

DDR_B_D[0..63]<7> DDR_B_DQS[0..7]<7> DDR_B_DQS#[0..7]<7> DDR_B_MA[0..15]<7>

DDR3_DRAMRST# <7,12>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7> M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7> M_ODT2 <7>

M_ODT3 <7>

0.1U_0402_10V6K

0.1U_0402_10V6K C159

C159

1

2

+VREF_CB

2.2U_0603_6.3V4Z

1K_0402_1%

C160

1K_0402_1%

+1.5V

12

R86

12

R87

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs) 6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

4*0402 1uf

1*0402 2.2uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

SMB_DATA_S3 <12,15,26> SMB_CLK_S3 <12,15,26>

+0.75VS

3

Layout Note: Place near DIMM

10U_0603_6.3V6M

C161

C162

1

@

2

Layout Note: Place near DIMM

10U_0603_6.3V6M

C163

1

2

(10uF_0603_6.3V)*8 (0.1uF_402_10V)*4

+1.5V

10U_0603_6.3V6M

C165

C164

1

2

10U_0603_6.3V6M

C166

1

2

10U_0603_6.3V6M

C167

1

2

10U_0603_6.3V6M

C168

1

2

7/28 Update connect GND directly

+0.75VS

C173

1U_0402_6.3V6K

C173

1U_0402_6.3V6K

C174

1U_0402_6.3V6K

C174

1U_0402_6.3V6K

C175

1U_0402_6.3V6K

C175

1U_0402_6.3V6K

C176

1

2

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C176

1

2

@

2010/07/12 2012/07/11

1U_0402_6.3V6K

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

Layout Note: Place near DIMM

Compal Secret Data

Deciphered Date

2

0.1U_0402_10V6K

0.1U_0402_10V6K C169

C169

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C170

C170

1

2

1

+1.5V

12

R84

1K_0402_1%

For Arranale only +VREF_DQ_DIMMB supply from a external 1.5V voltage divide circuit. 07/17/2009

0.1U_0402_10V6K

0.1U_0402_10V6K C172

C172

C171

1

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

R85

+VREF_DQ_DIMMB

12

LA-675AP

1

1.0

of

13 51Thursday, May 05, 2011

of

13 51Thursday, May 05, 2011

of

13 51Thursday, May 05, 2011

5

W=20milsW=20mils

R99

1K_0402_5%

1

C179

C179 1U_0603_10V4Z

1U_0603_10V4Z

2

D D

+RTCVCC

R101 1M_0402_5%R101 1M_0402_5% R102 330K_0402_5%R102 330K_0402_5%

*

1 2

1 2 1 2

INTVRMEN

H：Integrated VRM enable L：Integrated VRM disable

(INTVRMEN should always be pull high.)

+3VS

R105 1K_0402_5%@R105 1K_0402_5%@

1 2

HIGH= Enable ( No Reboot ) LOW= Disable (Default)

*

+3VALW

C C

R106 1K_0402_5%@R106 1K_0402_5%@

Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3VALW

R108 1K_0402_5% R108 1K_0402_5%

12

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

1.5V when smapled high

*

1.8V when sampled low Needs to be pulled High for Huron River platfrom

R112

33_0402_5%

HDA_BITCLK_AUDIO<31>

HDA_SYNC_AUDIO<31>

B B

HDA_RST_AUDIO#<31>

HDA_SDOUT_AUDIO<31>

+3VALW +3VALW+3VALW

12

R121

@

200_0402_5%

PCH_JTAG_TDO PCH_JTAG_TDIPCH_JTAG_TMS

12

R125

@

100_0402_1%

1 2

33_0402_5%

1 2

33_0402_5%

1 2

33_0402_5%

1 2

12

R122

200_0402_5%

12

R126

R126 100_0402_1%

100_0402_1%

R114

R116

R118

+RTCBATT+RTCVCC

12

CLRP1

SHORT PADS

SM_INTRUDER# PCH_INTVRMEN

HDA_SPKR

HDA_SDOUT

HDA_SYNC

HDA_BIT_CLK

HDA_SYNC_R

HDA_RST#

HDA_SDOUT

12

R123

200_0402_5%

12

R128

100_0402_1%

C180

15P_0402_50V8J

R878

1M_0402_5%

+RTCVCC

ME_FLASH<32>

C183

1U_0603_10V4Z

1 2

R103 20K_0402_5%R103 20K_0402_5%

1 2

R100 20K_0402_5%R100 20K_0402_5%

C182

1U_0603_10V4Z

ME_FLASH

R107 1K_0402_1%@R107 1K_0402_1%@

1 2

+3VS

G

2

Q10

Q10 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

13

D

S

D

S

1 2

R325

@R325

@

0_0402_5%

1 2

HDA_SPKR<31>

HDA_SDIN0<31>

Kill_SW#<56,57>

9/27 reserve R878 for DG1.5

DPDG1.1

6/30 update R121, R122, R123

A A

4

1 2

R98 10M_0402_5%R98 10M_0402_5%

1

OSC4OSC

NC3NC

2

CMOS

CLRP2

SHORT PADS

CLRP2

SHORT PADS

1

12

2

CLRP3

SHORT PADS

CLRP3

SHORT PADS

1

12

2

R109

1 2

0_0402_5%

R110

51_0402_5%

12

HDA_SYNC

Y1

1

2

32.768KHZ_12.5PF_9H03200413

PCH_RTCX1 PCH_RTCX2 PCH_RTCRST# PCH_SRTCRST# SM_INTRUDER# PCH_INTVRMEN

HDA_BIT_CLK HDA_SYNC HDA_SPKR HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_GPIO33 Kill_SW#

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

SPI_CLK_PCH_R SPI_SB_CS0#

SPI_SI SPI_SO_R

PCH_RTCX1 PCH_RTCX2

1 2 1 2

R663 0_0402_5%@ R663 0_0402_5%@ R670 0_0402_5%@ R670 0_0402_5%@

6/24 Update R663,R670 must be close Y1

C181

C181 15P_0402_50V8J

15P_0402_50V8J

U4A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

COUGARPOINT_FCBGA989

RTCIHDA

JTAG

SPI

LPC

FWH4 / LFRAME#

LDRQ1# / GPIO23

SATA

SATA3RCOMPO

SATA0GP / GPIO21 SATA1GP / GPIO19

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

3

PCH_RTCX1_OUT <32> PCH_RTCX2_OUT <32>

LPC_AD0

C38

LPC_AD1

A38

LPC_AD2

B37

LPC_AD3

C37

LPC_FRAME#

D36 E36

K36

SERIRQ

V5

AM3 AM1

SATA_ITX_C_DRX_N0

AP7

SATA_ITX_C_DRX_P0

AP5 AM10

AM8 AP11 AP10

AD7 AD5

SATA_ITX_C_DRX_N2

AH5

SATA_ITX_C_DRX_P2

AH4 AB8

AB10 AF3 AF1

Y7 Y5

SATA_ITX_C_DRX_N4

AD3

SATA_ITX_C_DRX_P4

AD1 Y3

Y1 AB3 AB1

Y11

SATA_COMP

Y10

AB12

SATA3_COMP

AB13

RBIAS_SATA3

AH1

R117 10K_0402_5%R117 10K_0402_5%

HDD_LED#

P3

PCH_GPIO21

V14

PCH_GPIO19

P1

LPC_AD0 <26,32> LPC_AD1 <26,32> LPC_AD2 <26,32> LPC_AD3 <26,32>

LPC_FRAME# <26,32>

R104 10K_0402_5%R104 10K_0402_5%

R115 750_0402_1%R115 750_0402_1%

12

SERIRQ <32>

R111

37.4_0402_1%

1 2

R113

49.9_0402_1%

1 2

12

HDD_LED# <56,57>

R119

12

10K_0402_5%

R187 10K_0402_5%

12

@

+1.05VS_VCC_SATA

8/16 reserved for MOW

2

EC and Mini card debug port

+3VS

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

C1840.01U_0402_16V7K C1840.01U_0402_16V7K

12

C1850.01U_0402_16V7K C1850.01U_0402_16V7K

12

C1860.01U_0402_16V7K C1860.01U_0402_16V7K

12

C1870.01U_0402_16V7K C1870.01U_0402_16V7K

12

ESATA@

+1.05VS_SATA3

+3VS

SATA_DTX_C_IRX_N4 SATA_DTX_C_IRX_P4

C1880.01U_0402_16V7K

12

C1890.01U_0402_16V7K

12

+3VS

4MB SPI ROM FOR ME

+3VS

& Non-share ROM.

SPI_SB_CS0#

SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_P2 SATA_ITX_DRX_N2_CONN SATA_ITX_DRX_P2_CONN

SATA_ITX_DRX_N4 SATA_ITX_DRX_P4

7/28 change from port 5 to port 4

+3VS

R127

R129

R130

0_0402_5%

1 2 1 2

33_0402_5%

R131

SATA_DTX_C_IRX_N0 <30> SATA_DTX_C_IRX_P0 <30> SATA_ITX_DRX_N0 <30> SATA_ITX_DRX_P0 <30>

SATA_DTX_C_IRX_N2 <56,57>

SATA_DTX_C_IRX_P2 <56,57> SATA_ITX_DRX_N2_CONN <56,57> SATA_ITX_DRX_P2_CONN <56,57>

SATA_DTX_C_IRX_N4 <35> SATA_DTX_C_IRX_P4 <35> SATA_ITX_DRX_N4 <35>

SATA_ITX_DRX_P4 <35>

SPI_WP#

1 2

3.3K_0402_5%

SPI_HOLD#

1 2

3.3K_0402_5%

U5

1

CS#

2

SPI_WP#

SO

3

WP#

4

GND

S IC FL 32M W25Q32BVSSIG SOIC 8P

HOLD#

SCLK

VCC

1

HDD

ODD

ESATA

SPI_CLK_PCH

12

R124

33_0402_5%

@

C190

22P_0402_50V8J

@

R1320_0402_5% R1320_0402_5%

SPI_CLK_PCH_R SPI_SI

@

+3VS

C191

1 2

0.1U_0402_16V4Z

8

SPI_HOLD#SPI_SO_R SPI_SO_L

7

SPI_CLK_PCH

6 5

SI

SPI_SI_R

1 2 1 2

33_0402_5%

R133

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PCH (1/8) SATA,HDA,SPI, LPC, XDP

Size Document Number Rev

Custom

LA-675AP

Date: Sheet

2

Date: Sheet

14 51Thursday, May 05, 2011

1

1.0

of

5

LAN

WLAN

D D

C C

WLAN

LAN

B B

PCIE_PRX_DTX_N1<27>

PCIE_PRX_DTX_P1<27> PCIE_PTX_C_DRX_N1<27> PCIE_PTX_C_DRX_P1<27>

PCIE_PRX_DTX_N2<26>

PCIE_PRX_DTX_P2<26> PCIE_PTX_C_DRX_N2<26> PCIE_PTX_C_DRX_P2<26>

CLK_PCIE_WLAN1#<26> CLK_PCIE_WLAN1<26>

WLAN_CLKREQ1#<26>

CLK_PCIE_LAN#<27> CLK_PCIE_LAN<27>

CLKREQ_LAN#<27>

+3VALW

C192 0.1U_0402_10V7KC192 0.1U_0402_10V7K

1 2

C193 0.1U_0402_10V7KC193 0.1U_0402_10V7K

1 2

C194 0.1U_0402_10V7KC194 0.1U_0402_10V7K

1 2

C195 0.1U_0402_10V7KC195 0.1U_0402_10V7K

1 2

R147 10K_0402_5%R147 10K_0402_5%

+3VALW

R149 0_0402_5%R149 0_0402_5%

1 2

R150 0_0402_5%R150 0_0402_5%

1 2

R156 0_0402_5%R156 0_0402_5%

1 2

R158 10K_0402_5%R158 10K_0402_5%

+3VS

R301 10K_0402_5%R301 10K_0402_5%

+3VS

R153 0_0402_5%R153 0_0402_5%

1 2

R154 0_0402_5%R154 0_0402_5%

1 2

R151 0_0402_5%R151 0_0402_5%

1 2

R152 10K_0402_5%R152 10K_0402_5%

+3VALW

R165 10K_0402_5%R165 10K_0402_5%

+3VALW

R168 10K_0402_5%R168 10K_0402_5%

+3VALW

R170 10K_0402_5%R170 10K_0402_5%

+3VALW

R172 10K_0402_5%R172 10K_0402_5%

R174 10K_0402_5%R174 10K_0402_5%

+3VALW

12

4

PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 PCIE_PTX_DRX_N1 PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

Desktop Only

PCH_GPIO73

CLK_PCIE_WLAN1#_R CLK_PCIE_WLAN1_R

WLAN_CLKREQ1#_R

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

PCH_GPIO46 PCIE_CLK_8N

PCIE_CLK_8P

U4B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

3

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

Link

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

FLEX CLOCKS

CL_DATA1

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_DMI2_N CLKIN_DMI2_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

EC_LID_OUT#

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

PCH_SML0CLK

C8

PCH_SML0DATA

G12

7/28 reserved

PCH_GPIO74

C13

PCH_SML1CLK

E14

PCH_SML1DATA

M16

M7

T11

P10

PEG_CLKREQ#_R

M10

AB37 AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

AM12 AM13

CLK_BUF_CPU_DMI#

BF18

CLK_BUF_CPU_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLK_BUF_DREF_96M#

G24

CLK_BUF_DREF_96M

E24

CLK_BUF_PCIE_SATA#

AK7

CLK_BUF_PCIE_SATA

AK5

CLK_BUF_ICH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

K43

CLK_PCI_DB_R

F47 H47 K49

10K_0402_5%

R134

10K_0402_5%

R140

+3VALW

R143

R143 10K_0402_5%

10K_0402_5%

1 2

R155 10K_0402_5%R155 10K_0402_5% R157 10K_0402_5%R157 10K_0402_5%

R159 10K_0402_5%R159 10K_0402_5% R160 10K_0402_5%R160 10K_0402_5%

R162 10K_0402_5%R162 10K_0402_5% R163 10K_0402_5%R163 10K_0402_5%

R164 10K_0402_5%R164 10K_0402_5% R166 10K_0402_5%R166 10K_0402_5%

R167 10K_0402_5%R167 10K_0402_5%

R171

90.9_0402_1%

1 2

R173

1 2

@

12

+3VALW

EC_LID_OUT# <32>

R139

12

1K_0402_5%

7/5 change to 1K

12

+3VALW

CLK_CPU_DMI# <6> CLK_CPU_DMI <6>

1 2 1 2

1 2

CLK_PCI_LPBACK <18>

+1.05VS_VCCDIFFCLKN

22_0402_5%

2

Q60A

Q60A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

XTAL25_IN XTAL25_OUT

27P_0402_50V8J

CLK_BUF_ICH_14M

6 1

2 5

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q60B

Q60B

Q61A

Q61A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

6 1

2 5

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q61B

Q61B

1

25MHZ_20PF_7A25000012

C196

2

2.2K_0402_5%

1 2 1 2

2.2K_0402_5%

4

R169 1M_0402_5%R169 1M_0402_5%

2.2K_0402_5%

2.2K_0402_5% R136

R136

1 2

+3VALW

1 2

R135

2.2K_0402_5%

DRAMRST_CNTRL_PCH <7>

+3VALW

2.2K_0402_5%

2.2K_0402_5% R141

R141

+3VALW +3VS

CLK_PCI_DB <26>

1 2 1 2

R142

2.2K_0402_5%

SMB_CLK_S3

+3VS

SMB_DATA_S3

EC_SMB_CK2

EC_SMB_DA2

CLK_CPU_DMI# CLK_CPU_DMI

1 2

Y2

R175

@R175

@

33_0402_5%

1

SMB_CLK_S3 <12,13,26>

DIMM1

R137

DIMM2

R138

MINI CARD

SMB_DATA_S3 <12,13,26>

8/14 change P/N to DMN66D0LDW-7_SOT363-6 (SB00000DH00)

EC_SMB_CK2 <29,32>

VGA EC thermal sensor

EC_SMB_DA2 <29,32>

2.2K_0402_5%

PCH_SML0CLK PCH_SML0DATA

7/28 reserved

@

R349 10K_0402_5%

1 2

R347 10K_0402_5%

1 2

@

6/30 Update to @

12

1

C197

C197 27P_0402_50V8J

27P_0402_50V8J

2

C198

@C198

@

22P_0402_50V8J

1 2

R544

+3VALW

1 2

R545

2.2K_0402_5%

1 2

Reserve for EMI please close to PCH

C199

@C199

12

@

22P_0402_50V8J

1 2

R176

@R176

@

33_0402_5%

A A

CLK_PCI_LPBACK

33_0402_5%

Reserve for EMI please close to PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

LA-675AP

1

15 51Thursday, May 05, 2011

1.0

of

5

D D

MC74VHC1G08DFT2G SC70 5P

VGATE PCH_POK

SYS_PWROK_EC<32>

C C

AEPWROK can be connect to PWROK if iAMT disable

PCH_POK_R APWROK

+3VALW

R192 200_0402_5%

B B

R194 10K_0402_5%R194 10K_0402_5%

R197 10K_0402_5%R197 10K_0402_5%

3

1

G

A

2

B

R180 100K_0402_1%R180 100K_0402_1%

SYS_PWROK

4

Y

P

U6

5

7/28 Defult use AND Gate

*

+3VS

12

R743

1 2

0_0402_5%

R742

1 2

0_0402_5%

7/22 modify

R191

1 2

0_0402_5% @

@

12 12

R195

12

200K_0402_1%

12

SYS_PWROK <6>

SYS_PWROK

SYS_PWROKPCH_POK_R

@

7/22 modify

PM_DRAM_PWRGD SUSWARN# ACIN_R

PCH_RSMRST#_R

SUSACK# is only used on platform that support the Deep Sx state.

VGATE<53>

PCH_POK<6,32>

PCH_APWROK<32>

PM_DRAM_PWRGD<6>

EC_RSMRST#<32>

SUSWARN#<32>

ACIN<32,47>

7/28 modify

+3VS

4

DMI_CTX_PRX_N0<5> DMI_CTX_PRX_N1<5> DMI_CTX_PRX_N2<5> DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5> DMI_CTX_PRX_P1<5> DMI_CTX_PRX_P2<5> DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5> DMI_CRX_PTX_N1<5> DMI_CRX_PTX_N2<5> DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5> DMI_CRX_PTX_P1<5> DMI_CRX_PTX_P2<5> DMI_CRX_PTX_P3<5>

+1.05VS_PCH

+3VS

R188 0_0402_5%@R188 0_0402_5%@

1 2

R190 0_0402_5%R190 0_0402_5%

1 2

R302 0_0402_5%R302 0_0402_5%

1 2

PBTN_OUT#<32>

1 2

R199 0_0402_5%@R199 0_0402_5%@

+3VALW

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

R177 49.9_0402_1%R177 49.9_0402_1%

1 2

R178 750_0402_1%R178 750_0402_1%

4mil width and place within 500mil of the PCH

T72 PADT72 PAD

R184 10K_0402_5%R184 10K_0402_5%

1 2

R193 0_0402_5%R193 0_0402_5%

1 2

R196 0_0402_5%R196 0_0402_5%

1 2

R198 0_0402_5%R198 0_0402_5%

D29

21

CH751H-40PT_SOD323-2

DMI_IRCOMP RBIAS_CPY

SUSACK#

SYS_RST#

12

SYS_PWROK

PCH_POK_R

APWROK

PM_DRAM_PWRGD

PCH_RSMRST#_R

SUSWARN#_R SLP_S3#

PBTN_OUT#_R

ACIN_R

PCH_GPIO72

R200

1 2

8.2K_0402_5%

8.2K_0402_5% R201

R201

RI#

12

10K_0402_5%

U4C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PWR_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989

3

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

DMI

System Power Management

FDI_RXP6

FDI

FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

BH9

AW16 AV12 BC10 AV14 BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWODVREN

PCH_DPWROK_R

WAKE#

1 2 1 2

PM_CLKRUN#

SUS_STAT#

SUSCLK

SLP_S5#

SLP_S4#

PM_SLP_SUS#

H_PM_SYNC

T66 PAD@T66 PAD@

R185

R185 0_0402_5%

0_0402_5%

R186

1 2

8.2K_0402_5%

10K_0402_5%

R189

2

FDI_CTX_PRX_N0 <5> FDI_CTX_PRX_N1 <5> FDI_CTX_PRX_N2 <5> FDI_CTX_PRX_N3 <5> FDI_CTX_PRX_N4 <5> FDI_CTX_PRX_N5 <5> FDI_CTX_PRX_N6 <5> FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5> FDI_CTX_PRX_P1 <5> FDI_CTX_PRX_P2 <5> FDI_CTX_PRX_P3 <5> FDI_CTX_PRX_P4 <5> FDI_CTX_PRX_P5 <5> FDI_CTX_PRX_P6 <5> FDI_CTX_PRX_P7 <5>

FDI_INT <5> FDI_FSYNC0 <5> FDI_FSYNC1 <5> FDI_LSYNC0 <5> FDI_LSYNC1 <5>

R1810_0402_5% @R1810_0402_5% @

1 2

R1820_0402_5% R1820_0402_5%

1 2

PCIE_WAKE# <26,27>

+3VALW

+3VS

SUSCLK <32>

SLP_S5# <32>

SLP_S4# <32>

SLP_S3# <32>

T71PAD T71PAD

H_PM_SYNC <6>

PCH_RSMRST#_R

PCH_DPWROK <32>

7/28 Update

T73PAD T73PAD

Can be left NC when IAMT is not support on the platfrom

Can be left NC if no use integrated LAN.

1

+RTCVCC

12

R179

R179 330K_0402_5%

330K_0402_5%

12

R183

R183 330K_0402_5%

330K_0402_5%

@

DSWODVREN - On Die DSW VR Enable

*

H

：

Enable

L

：

Disable

R546 200_0402_5%R546 200_0402_5%

12

PM_DRAM_PWRGD

7/28 Modify follow CRB & ORB

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,

LA-675AP

1

1.0

of

16 51Thursday, May 05, 2011

5

4

3

2

1

D D

2.2K_0402_5%

EDID_CLK EDID_DATA

C C

B B

2.2K_0402_5%

CRT_DDC_CLK CRT_DDC_DATA

R524

R234

+3VS

12

+3VS

12

R523

2.2K_0402_5%

DAC_BLU<24>

DAC_GRN<24>

DAC_RED<24>

12

R559

2.2K_0402_5%

Pull up R for CONN SIDE

R204 2.2K_0402_5%R204 2.2K_0402_5%

+3VS

R205 2.2K_0402_5%R205 2.2K_0402_5%

Pull up R for CONN SIDE

PCH_ENBKL<23> PCH_ENVDD<23>

PCH_PWM<23>

EDID_CLK<23> EDID_DATA<23>

1 2 1 2

2.37K_0402_1%

R206

0_0402_5%

R207

LVDS_ACLK#<23> LVDS_ACLK<23>

LVDS_A0#<23> LVDS_A1#<23> LVDS_A2#<23>

LVDS_A0<23> LVDS_A1<23> LVDS_A2<23>

R208 150_0402_1%R208 150_0402_1%

R209 150_0402_1%R209 150_0402_1%

R210 150_0402_1%R210 150_0402_1%

CRT_DDC_CLK<24> CRT_DDC_DATA<24>

CRT_HSYNC<24> CRT_VSYNC<24>

12

DAC_BLU

12

DAC_GRN

12

DAC_RED

12

1K_0402_1%

PCH_ENBKL PCH_ENVDD

EDID_CLK EDID_DATA

12

CRT_DDC_CLK CRT_DDC_DATA

R211

CTRL_CLK CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_IREF

12

U4D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGARPOINT_FCBGA989

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

TMDS_B_DATA2#_PCH

AV42

TMDS_B_DATA2_PCH

AV40

TMDS_B_DATA1#_PCH

AV45

TMDS_B_DATA1_PCH

AV46

TMDS_B_DATA0#_PCH

AU48

TMDS_B_DATA0_PCH

AU47

TMDS_B_CLK#_PCH

AV47

TMDS_B_CLK_PCH

AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

2.2K_0402_5%

HDMI@

HDMICLK_NB HDMIDAT_NB

R202

12

+3VS

12

R203

2.2K_0402_5%

HDMI@

HDMICLK_NB <25> HDMIDAT_NB <25>

TMDS_B_HPD# <25>

C200 0.1U_0402_10V6KHDMI@ C200 0.1U_0402_10V6KHDMI@ C201 0.1U_0402_10V6KHDMI@ C201 0.1U_0402_10V6KHDMI@ C202 0.1U_0402_10V6KHDMI@ C202 0.1U_0402_10V6KHDMI@ C203 0.1U_0402_10V6KHDMI@ C203 0.1U_0402_10V6KHDMI@ C204 0.1U_0402_10V6KHDMI@ C204 0.1U_0402_10V6KHDMI@ C205 0.1U_0402_10V6KHDMI@ C205 0.1U_0402_10V6KHDMI@ C206 0.1U_0402_10V6KHDMI@ C206 0.1U_0402_10V6KHDMI@ C207 0.1U_0402_10V6KHDMI@ C207 0.1U_0402_10V6KHDMI@

HDMI@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

HDMI_TX2-_CK <25> HDMI_TX2+_CK <25> HDMI_TX1-_CK <25> HDMI_TX1+_CK <25> HDMI_TX0-_CK <25> HDMI_TX0+_CK <25> HDMI_CLK-_CK <25> HDMI_CLK+_CK <25>

HDMI

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (4/9) LVDS,CRT,DP,HDMI

LA-675AP

1

17 51Thursday, May 05, 2011

1.0

of

5

+3VS

R297 8.2K_0402_5%@R297 8.2K_0402_5%@

1 2

RP2

PCI_PIRQA#

18

PCI_PIRQD#

27

PCI_PIRQC#

36

PCI_PIRQB#

45

8.2K_0804_8P4R_5%

D D

WL_OFF#

C C

GPIO53=This Signal has a weak internal pull-up. NOTE: The internal pull-up is disabled after PLTRST# deasserts.

B B

PCH_GPIO51

8.2K_0804_8P4R_5%

RP1

PCH_GPIO2

18

PCH_GPIO54

27

PCH_GPIO4

36

PCH_GPIO3

45

8.2K_0804_8P4R_5%

R225 8.2K_0402_5%R225 8.2K_0402_5%

1 2

R212 8.2K_0402_5%R212 8.2K_0402_5%

1 2

R213 8.2K_0402_5%R213 8.2K_0402_5%

1 2

R296 8.2K_0402_5%R296 8.2K_0402_5%

1 2

R214 8.2K_0402_5%

1 2

@

R215 1K_0402_5%@R215 1K_0402_5%@

1 2

A16 swap overide Strap/Top-Block Swap Override jumper

PCI_GNT3#

Low=A16 swap override/Top-Block Swap Override enabled High=Default

R221 1K_0402_5%@R221 1K_0402_5%@

1 2

PCH_GPIO53

8/17 reserved

WL_OFF#

PCH_GPIO52 PCH_GPIO5 PCH_GPIO50 PCH_GPIO50

GPIO55

*

ODD_DA#<32,56,57>

CLK_PCI_LPBACK<15>

CLK_PCI_LPC<32>

ODD_DA# PCH_GPIO3

4

WL_OFF#<26>

1 2

R7150_0402_5%@R7150_0402_5%

PCI_PME#<32> PLT_RST#<6>

R219 22_0402_5%R219 22_0402_5%

1 2 1 2

R220 22_0402_5%R220 22_0402_5%

@

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO50 PCH_GPIO52 PCH_GPIO54

PCH_GPIO53 WL_OFF#

PCH_GPIO2 PCH_GPIO4

PCH_GPIO5

PLT_RST#

CLK_PCI_LPBACK_R CLK_PCI_LPC_R

U4E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989

RSVD

PCI

3

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_RE#_WRB0 NV_RE#_WRB1

NV_WE#_CK0 NV_WE#_CK1

USB

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AY1

AV10 AT8 AY5

BA2 AT12

BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

NV_CLE

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N5 USB20_P5

USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11

USB20_N13 USB20_P13

USBRBIAS

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

USB DEBUG=PORT1 AND PORT9

USB20_N0 <56,57> USB20_P0 <56,57> USB20_N1 <30> USB20_P1 <30> USB20_N2 <35> USB20_P2 <35> USB20_N3 <35> USB20_P3 <35>

USB20_N5 <23> USB20_P5 <23>

USB20_N9 <26> USB20_P9 <26>

USB20_N11 <36> USB20_P11 <36>

USB20_N13 <35> USB20_P13 <35>

Within 500 mils

1 2

R218 22.6_0402_1%R218 22.6_0402_1%

RIGHT USB LEFT USB LEFT USB LEFT USB (COMBO)

USB Camera

WLAN

CARD READER

Bluetooth

USB_OC0# <30,56,57> USB_OC1# <35>

2

USB charger

DMI Termination Voltage

NV_CLE

Set to Vcc when HIGH Set to Vss when LOW

6/24 change to 1K

NV_CLE

R217 4.7K_0402_5%R217 4.7K_0402_5%

CLOSE TO THE BRANCHING POINT

USB_OC0# USB_OC2#PCH_GPIO51 USB_OC7# USB_OC5#

USB_OC1# USB_OC4# USB_OC3# USB_OC6#

1

+1.8VS

12

RP3

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%

RP4

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%

R216

R216 1K_0402_5%

1K_0402_5%

H_SNB_IVB# <6>

+3VALW

Boot BIOS Strap bit1 BBS1

12

R223

R223 100K_0402_5%

100K_0402_5%

1 2

R222 0_0402_5%R222 0_0402_5%

3

@

4

U7

1

G

A

Y

2

B

P

5

+3VS

PLT_RST#

Boot BIOS

Bit10

0 1 0

Destination

Reserved Reserved SPI

*

LPC

(Default)

MC74VHC1G08DFT2G SC70 5P

BUF_PLT_RST#<26,27,32>

C208

1

2

1U_0402_6.3V4Z

@

Bit11

GNT1#/ GPIO51

01 1 1 0

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PCH (5/9) PCI, USB

Size Document Number Rev

Custom

LA-675AP

Date: Sheet

2

Date: Sheet

1

18 51Thursday, May 05, 2011

1.0

of

5

D D

+3VS

ICC_EN#

Integrated Clock Chip Enable

H ; Disable L ; Enable

*

@

R235 1K_0402_5%

1 2

7/22 update to reserve only

EC_SMI#

Weak internal pull-high

GPIO28

On-Die PLL Voltage Regulator This signal has a weak internal pull up

：

On-Die voltage regulator enable

H

*

L：On-Die PLL Voltage Regulator disable

R240 1K_0402_5%@R240 1K_0402_5%@

1 2

C C

PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable

*

Low: VCCVRM VR Disable

R245 10K_0402_5%@R245 10K_0402_5%@

1 2

R250 10K_0402_5%@R250 10K_0402_5%@

+3VS

1 2

R547 10K_0402_5% R547 10K_0402_5%

1 2

PCH_GPIO28

PCH_GPIO27

PCH_GPIO36

7/22 update to used intel function

ESATA_DET#

+3VS

+3VALW

+3VS

ESATA_DET#<35>

+3VS +3VS

BT_OFF#<35>

+3VS

+3VALW

8/5 update to pull down

B B

R881 10K_0402_5%R881 10K_0402_5%

1 2

PCH_GPIO37

10/8 update to pull down for checklist Rev1.2

4

R233 10K_0402_5%R233 10K_0402_5%

1 2

@

1 2

1 2 1 2

R241

1 2 1 2

R242

1 2

1 2 1 2 1 2 1 2 1 2

1 2

R3030_0402_5%@R3030_0402_5%

EC_SCI#<32> EC_SMI#<32>

ODD_EN<30>

10K_0402_5%

10K_0402_5% 10K_0402_5%@

10K_0402_5%@

R227 10K_0402_5%R227 10K_0402_5% R228 10K_0402_5%R228 10K_0402_5%

R229 10K_0402_5%@R229 10K_0402_5%@ R230 1K_0402_5%R230 1K_0402_5%

R231 10K_0402_5%R231 10K_0402_5% R542 0_0402_5%@R542 0_0402_5%@

R232 10K_0402_1%R232 10K_0402_1% R238 10K_0402_5%R238 10K_0402_5%

+3VALW

R243 10K_0402_5%R243 10K_0402_5%

R244 10K_0402_5%@R244 10K_0402_5%@ R246 10K_0402_5%R246 10K_0402_5% R247 10K_0402_5%R247 10K_0402_5% R248 10K_0402_5%R248 10K_0402_5% R249 10K_0402_5%R249 10K_0402_5%

R251 10K_0402_5% R251 10K_0402_5%

PCH_GPIO0

PCH_GPIO6 EC_SCI# EC_SMI# CPUSB# PCH_GPIO15

PCH_GPIO16

GPIO17 PCH_GPIO22 ODD_EN PCH_GPIO27 PCH_GPIO28 BT_OFF# PCH_GPIO35 PCH_GPIO36 PCH_GPIO37 PCH_GPIO38 PCH_GPIO39 PCH_GPIO48 ESATA_DET#_R

PCH_GPIO57

T19PAD @T19PAD @ T21PAD @T21PAD @ T23PAD @T23PAD @ T25PAD @T25PAD @ T27PAD @T27PAD @ T29PAD @T29PAD @ T31PAD @T31PAD @ T33PAD @T33PAD @ T35PAD @T35PAD @ T37PAD @T37PAD @ T39PAD @T39PAD @ T41PAD @T41PAD @ T43PAD @T43PAD @ T45PAD @T45PAD @

U4F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989

3

PCH_GPIO69 PCH_GPIO70 PCH_GPIO71

PCH_GPIO68

A20GATE

PECI

RCIN#

THRMTRIP#

INIT3_3V#

NC_1 NC_2 NC_3 NC_4 NC_5

C40 B41 C41 A40

P4 AU16 P5 AY11 AY10 T14

AH8 AK11 AH10 AK10 P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

PCH_GPIO69 PCH_GPIO70

PCH_GPIO71

PCH_PECI_R KB_RST#

PCH_THRMTRIP#_R

T15 PAD@T15 PAD@ T16 PAD@T16 PAD@ T17 PAD@T17 PAD@ T18 PAD@T18 PAD@ T20 PAD@T20 PAD@ T22 PAD@T22 PAD@ T24 PAD@T24 PAD@ T26 PAD@T26 PAD@ T28 PAD@T28 PAD@ T30 PAD@T30 PAD@ T32 PAD@T32 PAD@ T34 PAD@T34 PAD@ T36 PAD@T36 PAD@ T38 PAD@T38 PAD@ T40 PAD@T40 PAD@ T42 PAD@T42 PAD@ T44 PAD@T44 PAD@ T46 PAD@T46 PAD@

GPIO

NCTF

TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71

PROCPWRGD

CPU/MISC

VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32

2

00 1

0

01

11

@

1 2

R2370_0402_5%@R2370_0402_5%

1 2

R239 390_0402_5%R239 390_0402_5%

INIT3_3V

This signal has weak internal PU, can't pull low

Intel schematic reviwe recommand.

H_PECI <6,32> KB_RST# <32> H_CPUPWRGD <6>

H_THRMTRIP#

0 0 0 0

+3VS

1 2

Function

PX3.0 PX4.0

R236

R236 10K_0402_5%

10K_0402_5%

UMA

*

DIS

GATEA20 <32>

H_THRMTRIP# <6>

1

R702

PCH_GPIO69 PCH_GPIO70 PCH_GPIO71

R707

6/23 update for MB ID

PCH_GPIO68

R224 10K_0402_5%R224 10K_0402_5%

KB_RST#

1 2

R226 10K_0402_5%R226 10K_0402_5%

1 2

R703

10K_0402_5%

@

R705

10K_0402_5%

1 2 @

@

1 2

R704

10K_0402_5%

R706

10K_0402_5%

+3VS

1 2 @

@

1 2

+3VS

10K_0402_5%

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (6/9) GPIO, CPU, MISC

LA-675AP

1

19 51Thursday, May 05, 2011

1.0

of

5

4

3

2

1

POWER

2925mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1] VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3] VCCTX_LVDS[4]

DMI

20mA

190mA

NAND / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

+VCCADAC

U48

U47

+VCCA_LVDS

AK36 AK37

AM37 AM38

+VCCTX_LVDS

AP36 AP37

+3VS_VCC3_3_6

V33

V34

+VCCAFDI_VRM

AT16

+VCCP_VCCDMI

AT20

+1.05VS_VCC_DMI_CCI

AB36

1U_0402_6.3V6K

AG16

AG17

AJ16

AJ17

+3V_VCCPSPI

V1

C230

1U_0402_6.3V6K

1

2

1

C216

0.01U_0402_16V7K

2

1

2

1

C226

2

1

2

1

2

C213

0.01U_0402_16V7K

C213

0.01U_0402_16V7K

0.1U_0402_10V7K

1

2

R256

0_0805_5%

1 2

C219

0.1U_0402_10V7K

1

C917

@

2

10U_0603_6.3V6M

C228

0.1U_0402_10V7K

C214

1

C215

C215 10U_0805_6.3V6M

10U_0805_6.3V6M

2

12

@

R253

R253 0_0402_5%

0_0402_5%

1

C217

0.01U_0402_16V7K

2

+3VS

10UH_LBR2012T100M_20%

R261

R261 0_0805_5%

0_0805_5%

1 2

R399

1 2

0_0805_5%

L1

1_0603_5%

R252

0.022_0805_1%

1 2

12

+3VS

1

2

8/5 Reserved

0.1UH_MLF1608DR10KT_10%_1608

C218

22U_0805_6.3V6M

C218

22U_0805_6.3V6M

1

2

L75

1 2

8/11 update for PDGD 1.2 8/27 update L75 symbol

+1.8VS+VCCPNAND

+3VS

0.1uH inductor, 200mA

12

@

R255

R255 0_0402_5%

0_0402_5%

+VCCP_VCCDMI

+1.05VS_PCH

R259

R259 0_0805_5%@

0_0805_5%@

1 2

6/30 update

+3VS

C395

C395 10U_0805_6.3V6M

10U_0805_6.3V6M

@

L2

12

+1.8VS

1

C220

C220 1U_0402_6.3V6K

1U_0402_6.3V6K

2

R258

1 2

0_0805_5%

+1.05VS

D D

J12

@J12

@

PAD-OPEN 4x4m

+1.05VS_PCH

PAD-OPEN 4x4m

0_0805_5%

1 2

+1.05VS_PCH

C C

B B

12

R257

@

R262

@R262

@

0_0603_5%

PJP1

@PJP1

@

12

PAD-OPEN 4x4m

+1.05VS_PCH

12

1U_0402_6.3V6K

1

2

R254 0_0603_5%R254 0_0603_5%

This pin can be left as no connect in On-Die VR enabled mode (default).

C221

10U_0805_6.3V6M

C221

10U_0805_6.3V6M

1

2

+3VS

R260

0_0805_5%

1 2

Place CH53 Near BG6 pin

1

C229

@C229

@

2

1U_0402_6.3V6K

C209

10U_0603_6.3V6M

C209

10U_0603_6.3V6M

1

2

12

T47PAD @T47PAD @

+1.05VS_VCC_EXP

C222

1U_0402_6.3V6K

C222

1U_0402_6.3V6K

1

2

1

C227

0.1U_0402_10V7K

2

+1.05VS_PCH

C210

1U_0402_6.3V6K

C211

1U_0402_6.3V6K

C211

1U_0402_6.3V6K

1

2

+VCCAPLLEXP

C223

C224

1U_0402_6.3V6K

C224

1U_0402_6.3V6K

1

2

R263

1 2

0_0805_5%

+VCCP_VCCDMI

+1.05VS_PCH

C212

1U_0402_6.3V6K

C212

1U_0402_6.3V6K

1

2

+1.05VS_VCCDPLLEXP

C225

1U_0402_6.3V6K

C225

1U_0402_6.3V6K

1

2

+3VS_VCCA3GBG

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

+1.05VS_VCCDPLL_FDI

U4G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.001

5

0.001

0.266

0.001

0.08

1.3

0.042

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0.16

1.05VccCLKDMI

0.02

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.06

+1.5VS

R265 0_0603_5%R265 0_0603_5%

+1.8VS

R266 0_0603_5%@R266 0_0603_5%@

Intel recommand stuff R265 and unstuff R266

12

+VCCAFDI_VRM

VCCVRM==>1.5V FOR MOBILE VCCVRM==>1.8V FOR DESKTOP

VCCVRM = 160mA detal waiting for newest spec

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (7/9) PWR

LA-675AP

1

1.0

of

20 51Thursday, May 05, 2011

5

+3VS

D D

+1.05VS_PCH

C C

+1.05VS_PCH

B B

+1.05VS_PCH

A A

R267

@R267

@

0_0805_5%

1 2

L3

10UH_LBR2012T100M_20%

1 2

R271

@R271

@

0_0603_5%

+VCCAPLL_CPY

1 2

+VCCA_DPLL_L

10UH_LB2012T100MR_20%

R284

0_0603_5%

12

R286

0_0603_5%

12

R288

0_0603_5%

12

R290

@R290

@

0_0603_5%

12

@ C264

@

+3VS_VCC_CLKF33

C231

10U_0805_10V4Z

C231

10U_0805_10V4Z

1

2

L4

@ L4

@

10UH_LBR2012T100M_20%

1 2

@

L5

10UH_LB2012T100MR_20%

1 2

L6

+VCCDIFFCLK

1

C256

C256 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCDIFFCLKN

1

C259

C259 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_SSCVCC

1

C262

C262 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VM_VCCSUS

1

C264 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C237

10U_0805_6.3V6M@C237

10U_0805_6.3V6M

1

2

1

C250

+

2

+1.05VS

1

2

220U_6.3V_M

C232

1U_0402_6.3V6K

C232

1U_0402_6.3V6K

+1.05VS_PCH

1

2

+1.05VS_VCCDIFFCLKN

+1.05VS_PCH

+3VALW

7/1 update to @

R274 0_0603_5%R274 0_0603_5%

+1.05VS_PCH

0_0805_5%

1 2

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C251

1U_0402_6.3V6K

C251

1U_0402_6.3V6K

R02R02

1

C252

+

220U_6.3V_M

2

OSCONOSCON

0.1U_0402_10V7K

R293

0_0603_5%

1 2

R277

1

2

4

Have internal VRM

R268

@R268

@

0_0603_5%

12

R269

0_0603_5%

1 2

C235

0.1U_0402_10V7K

12

@

1 2

C244

1U_0402_6.3V6K

C244

1U_0402_6.3V6K

1

2

C253

1U_0402_6.3V6K

C253

1U_0402_6.3V6K

1

2

1

C258

2

1

C263

2

0.1U_0402_10V7K@C267

0.1U_0402_10V7K

C266

0.1U_0402_10V7K

C266

0.1U_0402_10V7K

C265

4.7U_0603_6.3V6K

C265

4.7U_0603_6.3V6K

1

2

@

+VCCACLK

+VCCPDSW

1

C234

0.1U_0402_10V7K

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCAPLL_CPY_PCH +VCCDPLL_CPY

+VCCSUS1

1

C239

@C239

@

1U_0402_6.3V6K

2

+1.05VM_VCCASW

C241

22U_0805_6.3V6M

C241

22U_0805_6.3V6M

1

2

C245

1U_0402_6.3V6K

C245

1U_0402_6.3V6K

1

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL +1.05VS_VCCA_B_DPL

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

+VCCSST

+1.05VM_VCCSUS

+V_CPU_IO

C267

+RTCVCC

C268

1U_0402_6.3V6K

C268

1U_0402_6.3V6K

1

2

C242

C246

3

2

1

VCC3_3 = 266mA detal waiting for newest spec VCCDMI = 42mA detal waiting for newest spec

POWER

U4J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCIO[8]

AF34

VCCIO[9]

AG34

VCCIO[11]

AG33

VCCIO[10]

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

1

2

C270

0.1U_0402_10V7K@C270

0.1U_0402_10V7K

VCCRTC

COUGARPOINT_FCBGA989

C269

0.1U_0402_10V7K

C269

0.1U_0402_10V7K

1

2

POWER

VCCIO[29]

119mA

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

VCCSUS3_3[1]

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]

VCCAPLLSATA

10mA

VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

1mA

V5REF

VCC3_3[1] VCC3_3[8] VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12] VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2] VCCIO[3] VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

3mA

1010mA

Clock and Miscellaneous

80mA 80mA

55mA

95mA

1mA

CPURTC

N26 P26 P28 T27 T29

T23 T24 V23 V24 P24

T26

M26

AN23 AN24

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14 AK1

AF11

AC16 AC17 AD17

T21

V21

T19

P32

+1.05VS_VCCUSBCORE

1

2

1

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS +3V_VCCPSUS

+PCH_V5REF_RUN

+3V_VCCPSUS

+3VS_VCCPCORE

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

+VCCSUSHDA

1

C271

0.1U_0402_16V4Z

2

0_0603_5%

C233

C233 1U_0402_6.3V6K

1U_0402_6.3V6K

+3V_VCCPUSB

C236

0.1U_0402_10V7K

C236

0.1U_0402_10V7K

+3V_VCCAUBG

1

C238

0.1U_0402_10V7K

2

C243 1U_0402_6.3V6K

R283

0_0603_5%

1

C255

0.1U_0402_10V7K

2

+1.05VS_SATA3

+VCCSATAPLL

+1.05VS_VCC_SATA

R291 0_0603_5%R291 0_0603_5%

R292 0_0603_5%R292 0_0603_5%

R294 0_0603_5%R294 0_0603_5%

R295 0_0603_5%R295 0_0603_5%

R270

R272

R272 0_0603_5%

0_0603_5%

@

1 2

+3VS

12

1

C261

C261 1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

+1.05VS_PCH

12

+3VALW

12

+3VALW

R273

12

+1.05VS_PCH

R276

12

1

2

1

2

1

2

+1.05VS_SATA3

1

2

R289

0_0805_5%

R278

R278 0_0603_5%

0_0603_5%

C247

C247 1U_0402_6.3V

1U_0402_6.3V

R281

R281 0_0805_5%

0_0805_5%

C249

0.1U_0402_10V7K

C254

0.1U_0402_10V7K

C257

C257 1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_PCH

12

+1.05VS_PCH

+3VALW

12

+3VS

12

R282

R282 0_0603_5%

0_0603_5%

0_0805_5%

+3VS

12

+1.05VS_PCH

R285

12

L7

@L7

@

10UH_LB2012T100MR_20%

1 2

1

C260

@C260

@

10U_0805_6.3V6M

Place CH80 Near AK1 pin

2

100_0402_5%

+VCCSATAPLL_R

R275

R279

12

R287

@R287

@

0_0805_5%

+3VALW+5VALW

21

D1

D1 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

1

C240

0.1U_0603_25V7K

2

+3VS+5VS

21

D2

D2 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

1

C248

C248 1U_0603_10V6K

1U_0603_10V6K

2

+1.05VS_PCH

12

@

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH (8/9) PWR

LA-675AP

1

of

21 51Thursday, May 05, 2011

1.0

5

D D

C C

B B

A A

U4H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

U4I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBGA989

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

2

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (9/9) VSS

LA-675AP

1

1.0

of

22 51Thursday, May 05, 2011

5

LCD POWER CIRCUIT

D D

2N7002H_SOT23-3

Change footprint 20100814

PCH_ENVDD<17>

C C

R406 0_0402_5%R406 0_0402_5%

12

+LCDVDD

D

Q79

S

LCD_ENVDDLCD_ENVDD

100K_0402_5%

13

R408

+3VS

R400

R400 150_0603_1%

150_0603_1%

2

G

DTC124EK

2

12

@R408

@

+5VALW

12

1

OUT

IN

GND

3

R401

R401 100K_0402_5%

100K_0402_5%

1 2

Q81

DTC124EKAT146_SC59-3

4

Change footprint

R403 220K_0402_5%R403 220K_0402_5%

20100814

1

C515

0.1U_0402_16V4Z

2

C509

1

2

470P_0402_50V7K

+3VS

W=60mils

C513

1

4.7U_0603_6.3V6K

Q80

31

2

AP2301GN-HF_SOT23-3

+LCDVDD

FBMA-L11-201209-221LMA30T_0805

4.7U_0603_6.3V6K

2

L29

1 2

4.7U_0603_6.3V6K

INVPWM

For EMI

Change footprint 20100814

W=60mils

+LCDVDD_CONN

1

C516

2

DISPOFF#

1

C511

2

470P_0402_50V7K

1

C517

0.1U_0402_16V4Z

2

Change footprint 20100814

3

680P_0402_50V7K

+3VS

C514

2

+LEDVDD B+

C508

680P_0402_50V7K

@

+3VS_CMOS

JLVDS1

2

112

4

+LCDVDD_CONN

@

INVT_PWM<32>

1

2

+3VS

R404 2.2K_0402_5%R404 2.2K_0402_5% R405 2.2K_0402_5%R405 2.2K_0402_5%

(60 MIL)

CE_EN<32>

R402

R402 0_0402_5% @

0_0402_5% @

EDID_CLK<17> EDID_DATA<17>

LVDS_ACLK<17> LVDS_ACLK#<17>

1 2

EDID_CLK EDID_DATA

LVDS_A0<17> LVDS_A0#<17>

LVDS_A1<17> LVDS_A1#<17>

LVDS_A2<17> LVDS_A2#<17>

INVPWM DISPOFF#

EDID_CLK EDID_DATA

LVDS_A0 LVDS_A0#

LVDS_A1 LVDS_A1#

LVDS_A2 LVDS_A2#

LVDS_ACLK LVDS_ACLK#

ACES_87142-3041-BS

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

GND31GND

ME@

@

USB20_N5 USB20_P5

1

2

LVDS_A0# LVDS_A0

LVDS_A1# LVDS_A1

LVDS_A2# LVDS_A2

LVDS_ACLK# LVDS_ACLK

1

R398 0_0805_5%R398 0_0805_5%

1 2

1

C512

4.7U_0805_25V6-K

2

USB20_N5 <18> USB20_P5 <18>

CMOS

5

U22

1

P

NC

Y

A

G

TC7SZ14FU_SSOP5

3

@

R430

1 2

0_0402_5%

10K_0402_5% @

4

R431

12

PCH_PWM<17>

G

2

13

D

S

D

B B

S

2N7002H_SOT23-3

@

Q82

Change footprint 20100814

2

INVPWM

For GMCH DPST

+3VS

21

100K_0402_1%

R438

12

R433

@R433

@

4.7K_0402_5%

DISPOFF#

1 2

4

R717 0_0402_5%R717 0_0402_5%

1 2

BKOFF#<32>

A A

PCH_ENBKL<17>

5

BKOFF#

12

D4

CH751H-40PT_SOD323-2@D4CH751H-40PT_SOD323-2@

R716

R716 10K_0402_5%

10K_0402_5%

R437 0_0402_5%R437 0_0402_5%

1 2

INVPWM

+3VS

ENBKL <32>

(20 MIL) (20 MIL)

+5VS

+3VS

+5VALW

R434 100K_0402_5%

CMOS@

CMOS_OFF#<32>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

12

R543

R543 0_0402_5%

0_0402_5%

@

2

0_0603_5%

1 2

0_0603_5%

1 2

CMOS@

IN

2

R539

R596

R435

R435 150K_0402_5%

150K_0402_5%

CMOS@

1

OUT

GND

Q84

Q84 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

3

CMOS@

CMOS Camera Conn

Change footprint 20100814

3 1

Q83

AP2301GN-HF_SOT23-3

2

4.7V

1

CMOS@

C520

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

B

Date: Sheet

+CMOS_PW

1

CMOS@

C518

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

LVDS/CAMERA

LA-675AP

1

+3VS_CMOS

1

10U_0805_10V4Z

2

23 51Thursday, May 05, 2011

CMOS@

C519

of

1.0

A

B

+5VS +5VS +5VS +5VS +5VS

3

2

@

D5

D5 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

C

3

1

2

1

@

D6

D6 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

3

2

@

D7

D

REDGREENBLUE

1

BAT54S-7-F_SOT23-3

3

2

1

@

D8

D8 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

3

2

E

JVGA_VSJVGA_HS

1

@

D9

D9 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

1 1

+5VS

UMA only

FCM1608CF-121T03 0603

1

C523

2

10P_0402_50V8J

CRT_HSYNC_1

CRT_VSYNC_1

FCM1608CF-121T03 0603

1 2

L30

FCM1608CF-121T03 0603

1 2

L31

FCM1608CF-121T03 0603

1 2

L32

1

C524

C524 10P_0402_50V8J

10P_0402_50V8J

2

FCM1608CF-121T03 0603

1

C525

2

10P_0402_50V8J

1 2

L33

1 2

L34

1

C526

2

10P_0402_50V8J

RED

GREEN

BLUE

1

C527

C527 10P_0402_50V8J

10P_0402_50V8J

2

1

@

C530

C530 10P_0402_50V8J

10P_0402_50V8J

2

1

C532

@C532

@

10P_0402_50V8J

2

JVGA_HS

JVGA_VS

RED CRT_DDC_DAT_CONN

GREEN JVGA_HS

BLUE JVGA_VS

CRT_DDC_CLK_CONN

DAC_RED<17>

DAC_GRN<17>

DAC_BLU<17>

8/6 Modify,

2 2

3 3

DAC_RED

DAC_GRN

DAC_BLU

12

R445

R445 150_0402_1%

150_0402_1%

12

R443

R443 150_0402_1%

150_0402_1%

CLOSE TO CONN

0.1U_0402_16V4Z

CRT_HSYNC<17>

0.1U_0402_16V4Z

CRT_VSYNC<17>

C529

C531

12

R446

R446 150_0402_1%

150_0402_1%

+CRT_VCC

1

2

A2Y

+CRT_VCC

1

2

A2Y

1

C522

2

10P_0402_50V8J

R448

1 2

1K_0402_5%

1

5

P

4

OE#

G

U23

U23 SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

3

R451

1 2

1K_0402_5%

1

5

P

4

OE#

G

U24

U24 SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

3

D10

2 1

RB491D_SC59-3

100P_0402_50V8J

+CRT_VCC

CRT Connector

F1

1.1A_6V_SMD1812P110TF

W=40mils

1

C528

2

21

T67 PAD@T67 PAD

@

1

C521

0.1U_0402_16V4Z

2

JCRT1

6

11

1 7

12

2 8

16

G

13

14 10

15

17

G

3 9

4

5

CONTE_80431-5K1-152

ME@

+3VS

@

12

R454

2.2K_0402_5%

CRT_DDC_DATA<17>

CRT_DDC_CLK<17>

4 4

A

CRT_DDC_DATA

CRT_DDC_CLK

8/14 change P/N to DMN66D0LDW-7_SOT363-6 (SB00000DH00)

B

12

2N7002DW-T/R7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

@

R455

2.2K_0402_5%

2N7002DW-T/R7_SOT363-6

4

2

Q62A

+CRT_VCC

12

R457

R456

5

R456

2.2K_0402_5%

3

Q62B

61

100P_0402_50V8J

2010/07/12 2012/07/11

C

R457

2.2K_0402_5%

CRT_DDC_DAT_CONN

CRT_DDC_CLK_CONN

1

C533

1

2

Compal Secret Data

Deciphered Date

@

C534

C534 68P_0402_50V8K

68P_0402_50V8K

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT Connector

LA-675AP

24 51Thursday, May 05, 2011

E

1.0

of

5

4

3

2

1

12/02 change L35~L38 P/N to SM070000I00

HDMI_CLK+_CONN HDMI_CLK-_CONN

HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX1+_CK

D D

HDMI_TX1+_CONN HDMI_TX1-_CONN

HDMI_TX2+_CONN HDMI_TX2-_CONN

8/6 Modify

R462 680_0402_1%HDMI@R462 680_0402_1%HDMI@ R463 680_0402_1%HDMI@R463 680_0402_1%HDMI@

R472 680_0402_1%HDMI@R472 680_0402_1%HDMI@ R473 680_0402_1%HDMI@R473 680_0402_1%HDMI@

R474 680_0402_1%HDMI@R474 680_0402_1%HDMI@ R475 680_0402_1%HDMI@R475 680_0402_1%HDMI@

1 2

R476 680_0402_1%HDMI@R476 680_0402_1%HDMI@

1 2

R477 680_0402_1%HDMI@R477 680_0402_1%HDMI@

1 2 1 2

Q95

13

D

S

2N7002H_SOT23-3

UMA_HDMI@

2

G

Change footprint 20100814

+3VS

HDMI_CLK+_CK

HDMI_CLK+_CK<17>

HDMI_CLK-_CK<17> HDMI_TX0+_CK<17> HDMI_TX0-_CK<17> HDMI_TX1+_CK<17> HDMI_TX1-_CK<17> HDMI_TX2+_CK<17> HDMI_TX2-_CK<17>

HDMI_CLK+_CK HDMI_CLK-_CK HDMI_TX0+_CK HDMI_TX0-_CK

HDMI_TX1-_CK HDMI_TX2+_CK HDMI_TX2-_CK

R464 0_0402_5%@ R464 0_0402_5%@ R465 0_0402_5%@ R465 0_0402_5%@ R466 0_0402_5%@ R466 0_0402_5%@ R467 0_0402_5%@ R467 0_0402_5%@ R468 0_0402_5%@ R468 0_0402_5%@ R469 0_0402_5%@ R469 0_0402_5%@ R470 0_0402_5%@ R470 0_0402_5%@ R471 0_0402_5%@ R471 0_0402_5%@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_CLK-_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_TX1+_CK

HDMI_TX1-_CK

HDMI_TX2+_CK

HDMI_TX2-_CK

HDMI@ L35

HDMI@

1

4

HDMI@ L36

HDMI@

1

4

HDMI@ L37

HDMI@

1

4

HDMI@ L38

HDMI@

1

4

L35

WCM-2012-900T_4P

WCM-2012-900T_4P L36

WCM-2012-900T_4P

WCM-2012-900T_4P L37

WCM-2012-900T_4P

WCM-2012-900T_4P L38

WCM-2012-900T_4P

2

3

2

3

2

3

2

3

HDMI_CLK+_CONN

2

HDMI_CLK-_CONN

3

HDMI_TX0+_CONN

2

HDMI_TX0-_CONN

3

HDMI_TX1+_CONN

2

HDMI_TX1-_CONN

3

HDMI_TX2+_CONN

2

HDMI_TX2-_CONN

3

C C

HDMICLK_NB<17>

HDMIDAT_NB<17>

B B

A A

Pull up R for PCH SIDE

TMDS_B_HPD#<17>

TMDS_B_HPD#

2

HDMI@

5

HDMI@

4

Q63B 2N7002DW-T/R7_SOT363-6

8/14 change P/N to DMN66D0LDW-7_SOT363-6 (SB00000DH00)

R485

1M_0402_5%

HDMI@

2N7002DW-T/R7_SOT363-6

Q63A

3

1 2

2N7002H_SOT23-3

61

S

UMA_HDMI@

+3VS

G

Q93

2

13

D

Change footprint 20100814

HDMICLK_R

HDMIDAT_R

+5VS

HDMI_DET

R488

R488 100K_0402_5%

100K_0402_5%

HDMI@

1 2

2

3

@

1

D14

D14 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

2 1

HDMI@

R482

0_0805_5%

@

D13RB491D_SC59-3

+5VS_HDMI_F

2.2K_0402_5%

HDMI@

HDMIDAT_R HDMICLK_R

1.1A_6V_SMD1812P110TF

9/27 add F2 for safty

R483

+5VS +5VS

3

1

@

2

D11

D11 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

F2

21

HDMI@

+5VS_HDMI

1

2

1 2

R484

2.2K_0402_5%

HDMI@

1 2

HDMI_CLK-_CONN HDMI_CLK+_CONN

HDMI_TX0-_CONN HDMI_TX0+_CONN

HDMI_TX1-_CONN HDMI_TX1+_CONN

HDMI_TX2-_CONN HDMI_TX2+_CONN

HDMIDAT_R

C543

0.1U_0402_16V4Z

HDMI@

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

SUYIN_100042GR019M23DZL

3

2

JHDMI1

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

HDMICLK_R

1

@

D12

D12 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

20

G1

21

G2

22

G3

23

G4

Security Classification

2010/07/12 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

HDMI CONN

LA-675AP

1.0

25 51Thursday, May 05, 2011

of

1

of

A

B

C

D

E

Mini-Express Card for WLAN/WiMAX(Half)

1 1

+1.5VS

112

@

+3VS_WLAN+3VS

2

+1.5VS_CONN

J6

Mini-Express Card(WLAN/WiMAX)

JUMP_43X79

JWLN1

PCIE_WAKE#<16,27>

BT_ACTIVE<35>

WLAN_CLKREQ1#<15>

2 2

EC_TX_P80_DATA<32,33> EC_RX_P80_CLK<32,33>

3 3

PCIE_WAKE# BT_ACTIVE

WLAN_CLKREQ1#

CLK_PCIE_WLAN1#<15>

CLK_PCIE_WLAN1<15>

PCIE_PRX_DTX_N2<15> PCIE_PRX_DTX_P2<15>

PCIE_PTX_C_DRX_N2<15> PCIE_PTX_C_DRX_P2<15>

EC_TX_P80_DATA EC_RX_P80_CLK

For EC to detect debug card insert.

R514 0_0402_5%R514 0_0402_5%

1 2

R497 0_0402_5%@R497 0_0402_5%@

1 2

PCI_RST#_R CLK_PCI_DB

+3VS_WLAN

100_0402_1%

R505

1 2 1 2

R506

100_0402_1%

R507

R507 100K_0402_5%

100K_0402_5%

1 2

JWLN1

1

WAKE#

3

NC

5

NC

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

17

NC

19

NC

21

GND

23

PERn0

25

PERp0

27

GND

29

GND

31 33 35 37 39 41 43 45 47 49 51

53

SMB_CLK

PETn0

SMB_DATA PETp0 GND NC NC NC

LED_WWAN#

NC

LED_WLAN#

NC

LED_WPAN# NC NC NC

GND

TAITW_PFPET0-AFGLBG1ZZ4N0

ME@

3.3V

GND

1.5V

GND

PERST#

+3.3Vaux

GND

+1.5V

GND

USB_D-

USB_D+

GND

+1.5V

GND

+3.3V

GND

NC NC NC NC NC

NC

JUMP_43X79

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

J7

1

JUMP_43X79

@

2

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R

R498 0_0402_5%R498 0_0402_5%

1 2

R499 0_0402_5%@R499 0_0402_5%@

1 2

R500 0_0402_5%R500 0_0402_5%

1 2

R501 0_0402_5%@R501 0_0402_5%@

1 2

R502 0_0402_5%@R502 0_0402_5%@

1 2

@

R5030_0402_5% @ R5030_0402_5% @

12

R5040_0402_5%

12

BUF_PLT_RST#

USB20_N9 <18> USB20_P9 <18>

WLAN_LED#

+3VALW

1

C544

@

0.1U_0402_16V4Z

2

WL_OFF# <18>

BUF_PLT_RST# <18,27,32> +3VALW +3VS

SMB_CLK_S3 <12,13,15> SMB_DATA_S3 <12,13,15>

WLAN_LED# <56,57>

+1.5VS_CONN

1

@

C545

0.1U_0402_16V4Z

2

@

1

C546

0.1U_0402_16V4Z

2

Reserve for SW mini-pcie debug card. Series resistors closed to KBC side.

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R PCI_RST#_R CLK_PCI_DB

4 4

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

R508 0_0402_5%@R508 0_0402_5%@

1 2

R509 0_0402_5%@R509 0_0402_5%@

1 2

R510 0_0402_5%@R510 0_0402_5%@

1 2

R511 0_0402_5%@R511 0_0402_5%@

1 2

R512 0_0402_5%@R512 0_0402_5%@

1 2

R513 0_0402_5%@R513 0_0402_5%@

1 2

2010/07/12 2012/07/11

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

C

LPC_FRAME# <14,32> LPC_AD3 <14,32> LPC_AD2 <14,32> LPC_AD1 <14,32> LPC_AD0 <14,32>

CLK_PCI_DB <15>

Compal Secret Data

Deciphered Date

BUF_PLT_RST#

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Mini-Card/NEW Card/SIM

LA-675AP

E

of

26 51Thursday, May 05, 2011

of

26 51Thursday, May 05, 2011

of

26 51Thursday, May 05, 2011

1.0

5

2

PCIE_PTX_C_DRX_N1<15> PCIE_PTX_C_DRX_P1<15> CLK_PCIE_LAN#<15>

CLK_PCIE_LAN<15>

CLKREQ_LAN#

1

C564

2

GIGA@ C564

GIGA@

0.1U_0402_16V4Z

Near Pin13

+3V_LAN

Layout Notice : Place as close chip as possible.

Place Close to Chip

C553 0.1U_0402_16V7KC553 0.1U_0402_16V7K

1 2

C552 0.1U_0402_16V7KC552 0.1U_0402_16V7K

1 2

BUF_PLT_RST#<18,26,32>

PCIE_WAKE#<16,26>

LAN_WAKE#<32>

8152@

1 2

C559 0.1U_0402_16V4Z

R525

GIGA@R525

GIGA@

1 2

0_0402_5%

1

C565

C566

2

GIGA@ C565

GIGA@

0.1U_0402_16V4Z

Near

Pin19

Pin31

R517 0_0402_5%R517 0_0402_5%

12

R518 0_0402_5%R518 0_0402_5%

12

R519 0_0402_5%@R519 0_0402_5%@

1 2

R521 0_0402_5%R521 0_0402_5%

1 2

1

C567

2

0.1U_0402_16V4Z

Near Pin34

PCIE_PRX_C_DTX_N1 PCIE_PRX_C_DTX_P1

CLK_PCIE_LAN#_C CLK_PCIE_LAN_C

BUF_PLT_RST# PCIE_WAKE#_R

LAN_XTALO LAN_XTALI

CLKREQ_LAN#_R

+1.1_AVDDL +1.1_AVDDL +1.1_AVDDL +1.1_AVDDL +1.1_AVDDL

1

C568

C569

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near Pin6

+3VALW

J8

112

JUMP_43X79

@

D D

C C

B B

Atheros request can't disable LAN power

@

PCIE_PRX_DTX_N1<15> PCIE_PRX_DTX_P1<15>

CLKREQ_LAN#<15>

4

+1.7_VDDCT +1.7_LX

C549

@ C549

@

1000P_0402_50V7K

Close to Pin40

U26

8152@U26

8152@

S IC AR8152-AL1E QFN 40P E-LAN CTRL

Atheros

8151-AL1A

Y4

C579

LED0,1,2 intel Pull UP

DVDDL_REG

AVDDH_REG

LAN_XTALI LAN_XTALO

1

2

27P_0402_50V8J

U26

29

TX_N

30

TX_P

36

RX_N

35

RX_P

32

REFCLK_N

33

REFCLK_P

2

PERST#

3

WAKE#

25

SMCLK

26

SMDATA

28

TEST_RST

27

TESTMODE

7

XTLO

8

XTLI

4

CLKREQ#

13

AVDDL

19

AVDDL

31

AVDDL

34

AVDDL

6

AVDDL_REG

41

GND

AR8151-AL1A_QFN40_5X5

GIGA@

1 2

25MHZ_20PF_7A25000012

1

C578

2

27P_0402_50V8J

Close together

1

C547

C548

2

0.1U_0402_16V4Z

LED_0 LED_1 LED_2

TRXN0 TRXP0 TRXN1 TRXP1 TRXN2 TRXP2 TRXN3 TRXP3

RBIAS

VDD33

LX

VDDCT

DVDDL

AVDDH AVDDH

3

+1.7_LX+1.7_VDDCT

L39

1 2

4.7UH_SIA4012-4R7M_20%

Note: Place Close to LAN chip L39 DCR< 0.15 ohm Rate current > 1A

10U_0805_10V4Z

no overclocking PD 5.1K

1 2

R515 5.1K_0402_5%R515 5.1K_0402_5%

ACTIVITY

38

LAN_LINK#

39 23

12 11 15 14 18 17 21 20

10

1

40

5

24 37

16 22 9

MDI0MDI0+ MDI1MDI1+ MDI2MDI2+ MDI3MDI3+

LAN_RBIAS

+3V_LAN

+1.7_LX

+1.7_VDDCT

+1.1_DVDDL +1.1_DVDDL

+2.7_AVDDH +2.7_AVDDH +2.7_AVDDH

1

C571

2

0.1U_0402_16V4Z

Near Pin9

+1.7_LX

1

C570

2

8152@

1 2

R516 0_0402_5%

1 2

R522 2.37K_0402_1%R522 2.37K_0402_1%

C561

1 2

0.1U_0402_16V4Z

1

C572

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near

Pin22

Pin16

MDI0- <28> MDI0+ <28> MDI1- <28> MDI1+ <28> MDI2- <28> MDI2+ <28> MDI3- <28> MDI3+ <28>

1

C573

2 GIGA@ C573

GIGA@

0.1U_0402_16V4Z

Power On strapping

Pin Description

H:Over Clock Enable

LED0

L:Over Clock Disable H:SWR Switch mode regulator Select

LED2

AR8151 Pin23=LED2. AR8152, Pin23 is CLKREQ

ACTIVITY <28> LAN_LINK# <28>

Close Pin 10

+1.7_VDDCT

1

C563

2

0.1U_0402_16V4Z

Near Pin37

CLKREQ_LAN#

C554 & C555 Close pin1 < 200mil C557 & C558 Close pin < 400mil

2

1

C560

C562

1

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Near Pin24

1

C554

2

1

Chip Default

*

Place Close to LAN chip

MDI0+ MDI0MDI1+ MDI1MDI2+ MDI2-

+3V_LAN

1

C557

2

1

C558

@ C558

@

2

10U_0805_10V4Z

1

C555

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

MDI3+ MDI3-

Note 1 : 8152 no mount MDI3+, MDI3-, MDI2-, MDI2+ resister and cap

Note 2 : C574, C576, C580, C582, reserved for EMI.

H

*

--

49.9_0402_1%

R526

R526 R527

R527 R528

R528 R529

R529 R530

R530 R531

R531 R532

R532 R533

R533

1 2 1 2 1 2 1 2 1 2

GIGA@

1 2

GIGA@

1 2

GIGA@

1 2

GIGA@

49.9_0402_1%

C574 1000P_0402_50V7K@ C574 1000P_0402_50V7K@

1 2

C575 0.1U_0402_16V4ZC575 0.1U_0402_16V4Z

1 2

C576 1000P_0402_50V7K@ C576 1000P_0402_50V7K@

1 2

C577 0.1U_0402_16V4ZC577 0.1U_0402_16V4Z

1 2

C580 1000P_0402_50V7K@ C580 1000P_0402_50V7K@

1 2

C581 0.1U_0402_16V4Z

1 2

GIGA@

C582 1000P_0402_50V7K@ C582 1000P_0402_50V7K@

1 2

C583 0.1U_0402_16V4Z

1 2

GIGA@

A A

Configure

Pin4

VDDCT_REG CLKREQn

AR8152

CLKREQn LED[2]

AR8151

R525

5

C559

*

Pin23

Configure

R516

**

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN-AR8151/8152

LA-675AP

Thursday, May 05, 2011

LA-675AP

1

of

27 51

1.0

5

4

3

2

1

8/23 Change T1,T2 P/N to SP050006E00

D D

+1.7_VDDCT

1U_0402_6.3V4Z

R304

R304 0_0603_5%

0_0603_5%

C427

@C427

@

2

C435

GIGA@C435

GIGA@

0.1U_0402_16V4Z

12

1

2

0.1U_0402_16V4Z

1

C436

GIGA@C436

GIGA@

0.1U_0402_16V4Z

2

MDI3+<27> MDI3-<27>

MDI2+<27> MDI2-<27>

MDI3+ MDI3-

MDI2+ MDI2-

6/23 update

Place Close to T2

2

C438

MDI1-

D31

C C

TCLAMP3302N.TCT_SLP2626P10-10

B B

D31

6677889

11

GND

5

@

Reserve D1 for EMI go rural solution 20101006

MDI1+

9

10

112233445

MDI0-

MDI0+

R02

LAN_LINK#<27>

ACTIVITY<27>

LAN_LINK#

@

C378

470P_0402_50V7K

ACTIVITY

@

C379

470P_0402_50V7K

1

2

R538 220_0402_5%R538 220_0402_5%

1

2

C438

0.1U_0402_16V4Z

1

C440

0.1U_0402_16V4Z

2

+3V_LAN

12

220_0402_5%

R699

12

MDO3MDO3+ MDO1MDO2MDO2+ MDO1+ MDO0MDO0+

MDI0+<27> MDI0-<27>

MDI1+<27> MDI1-<27>

MDI0+ MDI0-

MDI1+ MDI1-

JRJ2

12

Green LED-

11

Green LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Yellow LED-

9

Yellow LED+

LIYO_101007-08203-033

ME@

T1

1

TD+

2 3 4 5 6 7

1 2 3 4 5 6 7

SHLD2 SHLD1

TX+

TD-

TX-

CT

NC

CT

RD+

RX+

RD-8RX-

BOTHHAND_NS0013LF

GIGA@

T2

TD+

TX+

TD-

TX-

CT

NC

CT

RD+

RX+

RD-8RX-

BOTHHAND_NS0013LF

16 15

14 13

MDO3+

16

MDO3-

15

MCT3

14 13 12

MCT2

11

MDO2+

10

MDO2-

9

16 15

MCT0

14 13 12

MCT1

11 10 9

R534

75_0402_5%

R535

75_0402_5%

MDO0+ MDO0-

GIGA@R534

GIGA@

12

GIGA@R535

GIGA@

12

R536

75_0402_5%

R537

MDO1+ MDO1-

C643

22U_1206_10V7K

Reserve gas tube for EMI go rural solution 20101006

1

C644

C644 22U_1206_10V7K

22U_1206_10V7K

2

@

R537

75_0402_5%

12

1 2

C585

1000P_1206_2KV7K

A A

Security Classification

2010/07/12 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN_Transformer

LA-675AP

1

1.0

of

28 51Thursday, May 05, 2011

5

D D

Close U20

C587

2200P_0402_50V7K

C588

2200P_0402_50V7K

C C

1

2

1

2

REMOTE1+

REMOTE1-

REMOTE2+

@C588

@

REMOTE2-

4

C590

0.1U_0402_16V4Z

+3VS

3

SMSC thermal sensor placed near by VRAM

U27

1

REMOTE1+

2

REMOTE1REMOTE2+

1

REMOTE2-

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-2-AIZL-TR_MSOP10

SMCLK

SMDATA

ALERT#

THERM#

GND

+3VS

12

R540

R540 10K_0402_5%

10K_0402_5%

@

10 9 8 7 6

EC_SMB_CK2 EC_SMB_DA2

EC_SMB_CK2 <15,32> EC_SMB_DA2 <15,32>

Address 1001_101xb

10/5 change P/N to SA000046C00

2

REMOTE1+

C586

100P_0402_50V8J

REMOTE1-

REMOTE2+

C589

100P_0402_50V8J

REMOTE2-

@

1

2

B

2

E

1

2

B

2

E

@

Close to DDR

C

Q97

MMST3904-7-F_SOT323-3

3 1

Under WWAN

C

Q98

MMST3904-7-F_SOT323-3

3 1

REMOTE1,2+/-: Trace width/space:10/10 mil Trace length:<8"

1

B B

FAN1 Conn

+5VS

EC_TACH<32>

2

C591

C591 10U_0805_10V4Z

10U_0805_10V4Z

1

A A

Security Classification

2010/07/12 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

Compal Secret Data

Deciphered Date

2

EC_FAN_PWM<32>

Compal Electronics,Ltd.

Title

EMC1403_Thermal sensor/FAN

Size Document Number Rev

Custom

Date: Sheet

LA-675AP

JFAN1

1

2

3

4

5

G5

6

G6

ACES_85205-04001

ME@

1

1.0

29 51Thursday, May 05, 2011

of

A

B

C

D

E

F

G

H

+USB_VCCB

1

+

C592

220U_6.3V_M

1 1

9/27 change C592 to

4.2H SF000002Y00

2

C593

C593 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N1<18> USB20_P1<18>

Left USB Conn.

W=80mils

USB20_N1 USB20_P1

8/27 change to @

USB20_N1

USB20_P1

8/27 change to stuff

C594 0.1U_0402_16V4ZC594 0.1U_0402_16V4Z

R660 0_0402_5%

R660 0_0402_5% R661 0_0402_5%

R661 0_0402_5%

WCM-2012-900T_4P

4

1

L65

12

USB_ON#<32,35,56,57>

@

1 2

@

1 2

3

2

USB20_N1_C

USB20_P1_C

U29

1

GND

2

IN

3

IN

4

EN

APL3510BKI_SO8

Low Active

OUT OUT OUT OC#

JUSB1

1

USB20_N1_C USB20_P1_C

2

3

D16

@

PJDLC05_SOT23-3

1

+USB_VCCB+5VALW

8 7 6 5

E-SATA COMBO RIGHT USB PORT

USB_OC0#USB_ON#

1

C595

1000P_0402_50V7K@

2

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173GR004M58BZL

ME@

USB_OC0# <18,56,57>

SATA HDD Conn.

JHDD1

2 2

SATA_ITX_DRX_P0<14> SATA_ITX_DRX_N0<14>

C596 0.01U_0402_16V7KC596 0.01U_0402_16V7K

SATA_DTX_C_IRX_N0<14>

SATA_DTX_C_IRX_P0<14>

+5VS +3VS

1

C598

C598 1000P_0402_50V7K

1000P_0402_50V7K

3 3

2

SATA_DTX_C_IRX_P0

1

C599

0.1U_0402_16V4Z

2

1

C600

C600 1U_0603_10V4Z

1U_0603_10V4Z

2

@

1 2

C597 0.01U_0402_16V7KC597 0.01U_0402_16V7K

1 2

+3VS

+5VS

1

C601

C601 10U_0805_10V4Z

10U_0805_10V4Z

2

@

1

C602

C602 10U_0805_10V4Z

10U_0805_10V4Z

2

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0SATA_DTX_C_IRX_N0 SATA_DTX_IRX_P0

1

@

C603

0.1U_0402_16V4Z

2

JHDD1

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21 22

SUYIN_127043FB022G278ZR

GND

12V

GND

12V

23 24

ODD Power Control

J9

@ J9

@

2

112

JUMP_43X79

100K_0402_5%

JUMP_43X79

3 1

AP2301GN-HF_SOT23-3

2

1 2

Q99

C607

0.01U_0402_16V7K

Title

Size Document Number Rev

B

Date: Sheet

1

C608

C608 10U_0805_10V4Z

10U_0805_10V4Z

2

Compal Electronics, Inc.

HDD/ODD Connector

G

1

C604

0.1U_0402_16V4Z

2

LA-675AP

1.0

of

30 51Thursday, May 05, 2011

H

+5VS +5V_ODD

12

1

OUT

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

ODD_EN<19>

2010/07/12 2012/07/11

E

2

IN

GND

3

Compal Secret Data

Deciphered Date

Change footprint 20100814

R552

R552 10K_0402_5%

10K_0402_5%

R675

1 2

Q100

Q100 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

F

5

CX20671 High Definition Audio Codec SoC With Integrated Class-D Stereo Amplifier. An integrated 5 V to 3.3 V Low-dropout voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout voltage regulator (LDO).

D D

+3VS

+VAUX_3.3

HDA_SDOUT_AUDIO_RHDA_SDOUT_AUDIO

@

R582

1 2

33_0402_5%

12

R585

R585 10K_0402_5%

10K_0402_5%

12

R5570_0402_5% R5570_0402_5%

12

R5580_0402_5%

12

R5600_0402_5% R5600_0402_5%

12

R5610_0402_5%

EC_MUTE#<32>

HDA_RST_AUDIO#

C584

100P_0402_50V8J

1 2

C645 0.1U_0402_16V4ZC645 0.1U_0402_16V4Z

1

C616

2

1

C622

2

8/10 update

HDA_SDIN0<14>

EAPD<32>

Internal SPEAKER

+3VS

12

R351

4.7K_0402_5%@

1

@

2

+3VS

+3VALW

6/24 change +3VS

C C

HDA_SYNC_AUDIO<14>

HDA_SDOUT_AUDIO<14>

C637

@C637

@

1 2

0.1U_0402_16V4Z

C640

@C640

@

1 2

B B

0.1U_0402_16V4Z

R576

@R576

@

1 2

0_0402_5%

R577

@R577

@

1 2

0_0402_5%

R579

@R579

@

1 2

0_0402_5%

GND GNDA

8/10 update

EC Beep

ICH Beep

A A

PC Beep

HDA_SPKR<14>

To support Wake-on-Jack or Wake-on-Ring, the CODEC VAUX_3.3 & VDD_IO pins must be powerd by a rail that is not removed unless AC power is removed. *DSH page42 has more detail.

+3VS

+3VALW

HDA_RST_AUDIO#<14> HDA_BITCLK_AUDIO<14>

HDA_SYNC_AUDIO

Change footprint 20100814

BEEP#<32>

+3VS

1 3

D

2N7002H_SOT23-3

2N7002H_SOT23-3 Q9

Q9 R669

1 2

EAPD active low 0=power down ex AMP 1=power up ex AMP

0_0402_5%

R598

2 1

D17 RB751V_SOD323D17 RB751V_SOD323

2 1

D30 RB751V_SOD323D30 RB751V_SOD323

HDA_RST_AUDIO# HDA_BITCLK_AUDIO

2

G

S

@R669

@

0_0402_5%

@R598

@

12

PC_BEEP1 PC_BEEP

8/10 update

5

1

C617

2

10U_0805_10V4Z

1

C623

2

1U_0603_10V4Z

R5780_0402_5% R5780_0402_5%

EC_MUTE#

4

1

C614

C613

2

10U_0805_10V4Z

0.1U_0402_16V4Z

10K only needed if supply to VAUX_3.3 is removed during system re-start.

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z R563

R563

10K_0402_5%

HDA_BITCLK_AUDIO_R

12

R566 33_0402_5%R566 33_0402_5%

1 2

PC_BEEP

1 2

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

4

9/27 Update U30 P/N to SA00003K410

1

C615

2

@

0.1U_0402_16V4Z

1

C631

C630

2

10U_0805_10V4Z

0.1U_0402_16V4Z

9 5

8 6 4

10

R5720_0402_5% R5720_0402_5%

38 37

12

R5730_0402_5% R5730_0402_5%

40

1

11 13

16 14

R720

FBMA-L11-160808-121LMA30T

R721

FBMA-L11-160808-121LMA30T

R722

FBMA-L11-160808-121LMA30T

R723

FBMA-L11-160808-121LMA30T

1

C618

2

1U_0603_10V4Z

3

U30

FILT_1.8

RESET# BIT_CLK

SYNC SDATA_IN SDATA_OUT

PC_BEEP

GPIO0/EAPD# GPIO1/SPK_MUTE#

DMIC_CLK DMIC_1/2

LEFT+ LEFT-

RIGHT+ RIGHT-

GND

41

1

C619

2

0.1U_0402_16V4Z

18

2

29

7

VDD_IO

FILT_1.65

VAUX_3.3

DVDD_3.3

CX20671-21Z_QFN40_6X6

27

28

AVDD_5V

AVDD_3.3

1

C620

2

26

AVDD_HP

CLASS-D_REF

AVDD_3.3 pinis output of

1

internal LDO. NOT connect

C621

to external supply.

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C624

2

12

LPWR_5.0

15

RPWR_5.0

17

36

SENSE_A

35

PORTB_R

34

PORTB_L

33

B_BIAS

32

C_BIAS

31

PORTC_R

30

PORTC_L

23

PORTA_R

22

PORTA_L

24

NC

25

NC

39

NC

21

AVEE

19

FLY_P

20

FLY_N

wide 20MIL

SPK_R1SPK_R2+ SPK_L1SPK_L2+

8/24 update

3

+LDO_OUT_3.3V

+CLASSD_5VS

+5VS

1

C625

2

10U_0805_10V4Z

0.1U_0402_16V4Z

+MICBIASB

+MICBIASC

HP_OUTR_R

R575 15_0402_5%

HP_OUTL_R

R574 15_0402_5%

Changed from 5.1ohm to 15ohm for "zi zi"noise.

1 2

C638 1U_0603_10V4ZC638 1U_0603_10V4Z

R720 0_0603_5%@R720 0_0603_5%@ R721 0_0603_5%@R721 0_0603_5%@ R722 0_0603_5%@R722 0_0603_5%@ R723 0_0603_5%@R723 0_0603_5%@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C626

C627

2

0.1U_0402_16V4Z

1

C632

2

12 12 12 12

0.1U_0402_16V4Z

Please bypass caps very close to device.

0.1U_0402_16V4Z

MIC_INR

MIC_INL

C633 2.2U_0603_6.3V4ZC633 2.2U_0603_6.3V4Z

1 2

C634 2.2U_0603_6.3V4ZC634 2.2U_0603_6.3V4Z

1 2

1 2 1 2

1

C639

C641

2

0.1U_0402_16V4Z

2010/07/12 2012/07/11

1

2

10U_0805_10V4Z

9/28 Change to R879 for 21Z

1

C628

C629

2

10U_0805_10V4Z

0.1U_0402_16V4Z

10U_0805_10V4Z

R564 5.11K_0402_1%R564 5.11K_0402_1% R565 10K_0402_1%R565 10K_0402_1%

R567 39.2K_0402_1%R567 39.2K_0402_1%

Internal MIC

R568 2.2K_0402_5%R568 2.2K_0402_5% R569 2.2K_0402_5%R569 2.2K_0402_5%

HP_OUTR <36> HP_OUTL <36>

WM-64PCY_2P

SPK_R1-_CONN SPK_R2+_CONN SPK_L1-_CONN SPK_L2+_CONN

Compal Secret Data

2

R879

1 2

0_0805_5%

R562

@R562

@

1 2

0.1_1206_1%

1 2 1 2

1 2

R570 100_0402_1%R570 100_0402_1% R571 100_0402_1%R571 100_0402_1%

Headphone

+MICBIASB

R580

4.7K_0402_5%

MIC1

1

GNDA

2

45@

Deciphered Date

2

+5VS

Layout Note:Path from +5VS to LPWR_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms)

+MICBIASC

12

C642

8/10 update for vendor suggestion

C649

1

C610

C609

2

@

22P_0402_50V8J

+VAUX_3.3

MIC_JD <36>

PLUG_IN <36>

EXT_MIC_R <36> EXT_MIC_L <36>

2.2U_0603_6.3V4Z

1 2

1

C650

2

1000P_0402_50V7K

HDA_RST_AUDIO# HDA_SYNC_AUDIO HDA_SDOUT_AUDIO_R

1

C611

2

@

22P_0402_50V8J

Port C Port A

1

C651

C647

2

1000P_0402_50V7K

1

EMI

1 2

@

1

C612

2

@

Sense resistors must be connected same power that is used for VAUX_3.3

External MIC

MIC_INR MIC_INL

1

2

1000P_0402_50V7K

Compal Electronics,Ltd.

Title

Size Document Number Rev

C

Date: Sheet

HDA_BITCLK_AUDIO

R55633_0402_5%@R55633_0402_5%

CX20671 Codec

LA-675AP

1

JSPK1

1

2

3

4

5

GND1

6

GND2

ACES_88231-04001

ME@

31 51Thursday, May 05, 2011

1.0

of

L44

+3VALW +EC_AVCC

1 2

FBM-11-160808-601-T_0603

C656

0.1U_0402_16V4Z

1 2

L45 FBM-11-160808-601-T_0603L45 FBM-11-160808-601-T_0603

2

1

ECAGND

1

C659

1000P_0402_50V7K

2

Change to 0 ohm P/N

KB_RST#<19>

12

R589 10_0402_5%@R589 10_0402_5%@

2

1

KSO1 KSO2

1 2

+3VALW

R590 47K_0402_5%R590 47K_0402_5%

KSO[0..15]<56,57>

KSI[0..7]<56,57>

+3VALW

R595 47K_0402_5%R595 47K_0402_5% R597 47K_0402_5%R597 47K_0402_5%

C660 22P_0402_50V8J@C660 22P_0402_50V8J@

0.1U_0402_16V4Z

1 2 1 2

12

C661

KSO[0..15] KSI[0..7]

ENE UPDATE 08/10/21

R602

2.2K_0402_5%

EC_SMB_CK2 EC_SMB_DA2

Y5

@

32.768KHZ_12.5PF_9H03200413

+3VALW

EC_RTCX1 SUSCLK_R

1

C367

C367 18P_0402_50V8J

18P_0402_50V8J

2

@

R600

2.2K_0402_5%

R604

2.2K_0402_5%

SUSCLK<16>

1 2 1 2

6/24 Update R708,R709 must be close Y5

+3VS

R601

2.2K_0402_5%

1

@

C665

C665 100P_0402_50V8J

100P_0402_50V8J

2

10K_0402_5%

18P_0402_50V8J

+3VS

12

R605

1 2

R120 10M_0402_5%

@

1

C347

2

@

2

1

@

C666

C666 100P_0402_50V8J

100P_0402_50V8J

2

EC_TACH

OSC4OSC

NC3NC

8/23 change to reserved

EC_SMB_CK1

EC_SMB_DA1

R708 0_0402_5%@ R708 0_0402_5%@ R709 0_0402_5%@ R709 0_0402_5%@

C653

0.1U_0402_16V4Z

C653

0.1U_0402_16V4Z

1

2

GATEA20<19>

SERIRQ<14>

LPC_FRAME#<14,26>

LPC_AD3<14,26> LPC_AD2<14,26> LPC_AD1<14,26> LPC_AD0<14,26>

CLK_PCI_LPC<18>

BUF_PLT_RST#<18,26,27>

EC_SCI#<19> BATT_LEN#<46>

KSI3<56,57> KSI4<56,57>

KSO16<57> KSO17<57>

EC_SMB_CK1<46> EC_SMB_DA1<46> EC_SMB_CK2<15,29> EC_SMB_DA2<15,29>

SLP_S3#<16> SLP_S5#<16>

EC_SMI#<19>

SUSWARN#<16>

INVT_PWM<23>

EC_TACH<29>

ODD_DA#<18,56,57> EC_TX_P80_DATA<26,33> EC_RX_P80_CLK<26,33>

ON/OFF#<36>

EC_FAN_PWM<29>

NUM_LED#<36>

100K_0402_5%

8/23 modify

+3VALW

C658

1000P_0402_50V7K

C658

C662

0.1U_0402_16V4Z

C662

0.1U_0402_16V4Z

C654

1

2

12

R6110_0402_5% R6110_0402_5%

PCH_RTCX1_OUT <14> PCH_RTCX2_OUT <14>

C655

0.1U_0402_16V4Z

C655

0.1U_0402_16V4Z

1

2

KB_RST#

LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

EC_RST# EC_SCI# BATT_LEN#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI#

SUSWARN#

INVT_PWM EC_TACH ODD_DA# EC_TX_P80_DATA EC_RX_P80_CLK

EC_FAN_PWM

EC_RTCX1

122

SUSCLK_RSUSCLK_R

123

12

R740

C93

C93 20P_0402_50V8

20P_0402_50V8

1000P_0402_50V7K

C657

1000P_0402_50V7K

C657

1000P_0402_50V7K

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

XCLK1 XCLK0

1

2

LPC & MISC

1

2

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

+EC_AVCC

9

22

33

96

111

125

67

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

AGND

KB930QF A0 LQFP 128P

69

ECAGND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U31

SPICS#

V18R

3.3V +/- 5%

Vcc

100K +/- 5%

R694

Board ID

0 1 2

CPU1.5V_S3_GATE

21

BEEP#

23

PCH_DPWROK

26

ACOFF

27

63 64 65 66

BRDID BRDID

75 76

68

CHG_ON#

70

IREF

71 72

83

USB_ON#

84 85 86

TP_CLK

87

TP_DATA

88

97

CE_EN_EC

98 99

LID_SW#

109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

73

H_PECI_R

74 89

CHARGE_LED0#

90

CAPS_LED#

91 92

CHARGE_LED1#

93

SYSON

95 121

ACIN

127

100

EC_LID_OUT#

101

EC_ON

102 103

PCH_POK_EC PCH_POK

104

BKOFF#

105

RF_LED#

106 107 108

110 112 114

NOVO#

115

SUSP#

116

PBTN_OUT#

117 118

124

C667

1

4.7U_0603_6.3V6K

2

2010/07/12 2012/07/11

CPU1.5V_S3_GATE <10>

BEEP# <31>

PCH_DPWROK <16>

ACOFF <45,47>

BATT_TEMP <46>

ADP_I <46,47>

IMVP_IMON <53>

CHG_ON# IREF <47> CHGVADJ <47>

EC_MUTE#

EC_MUTE# <31>

TP_CLK <56,57>

TP_DATA <56,57>

SYS_PWROK_EC <16>

12

R7460_0402_5%@R7460_0402_5%

FRD#SPI_SO <34>

FWR#SPI_SI <34>

FSEL#SPICS# <34>

R665 43_0402_1%R665 43_0402_1%

1 2

FSTCHG <47>

CHARGE_LED0# <56,57>

CAPS_LED# <36> PWR_LED# <36,56,57>

CHARGE_LED1# <56,57>

SYSON <37,49> VR_ON <53> ACIN <16,47>

EC_RSMRST# <16> EC_LID_OUT# <15> EC_ON <36,48>

BATT_SEL_EC <47>

Compal Secret Data

R593 10K_0402_5%R593 10K_0402_5%

USB_ON# <30,35,56,57> CMOS_OFF# <23>

@

ME_FLASH <14>

LID_SW# <56,57>

SPI_CLK <34>

H_PROCHOT#_EC

BKOFF# <23> RF_LED# <56,57> PCH_APWROK <16> SA_PGOOD <50>

SLP_S4# <16>

ENBKL <23>

EAPD <31>

NOVO# <36>

SUSP# <10,37,49,51>

PBTN_OUT# <16>

Deciphered Date

EC_FAN_PWM

1 2

CE_EN <23>

7/23 Modify

3

+3VS

12

USB_ON#

7/23 Modify

FRD#SPI_SO

FSEL#SPICS#

H_PECI <6,19>

D18 RB751V_SOD323

1 2

R607 0_0402_5%R607 0_0402_5%

R588

R588 10K_0402_5%

10K_0402_5%

@

+3VALW

@

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5%

10/6 Modify

+5VALW

R594 10K_0402_5%R594 10K_0402_5%

1 2

+3VALW

12

R599100K_0402_1%@ R599100K_0402_1%@

12

R603100K_0402_1%@ R603100K_0402_1%@

VR_HOT#<46,53>

21

1 2

R608 10K_0402_5%

@

EC_PME#

Title

Size Document Number Rev

Custom

Date: Sheet

min

VR695

AD_BID

0 V

0.436 V

0.712 V

VR_HOT#KSO16

H_PROCHOT#_EC

PCH_POK <6,16>

+3VS

+3VALW

R606

10K_0402_5%

2N7002H_SOT23-3 @

Change footprint 20100814

Compal Electronics, Inc.

BIOS & EC I/O Port

typ

V

AD_BID

0.503 V

0.819 V

6/19 Add BRDID

TP_CLK

R591 4.7K_0402_5%R591 4.7K_0402_5%

TP_DATA

R592 4.7K_0402_5%R592 4.7K_0402_5%

BATT_TEMP ACIN

R737

0_0402_5%

12

13

D

2

G

S

R7470_0402_5%@R7470_0402_5%

12

@

1 2

D

1 3

Q102

2

LA-675AP

V

max

AD_BID

0 V0 V

0.289 V0.250 V0.216 V

0.538 V

0.875 V

+3VALW

100K_0402_1%

@

R694

1 2

R695

8.2K_0402_5%

1 2

1 2 1 2

1 2

C663 100P_0402_50V8JC663 100P_0402_50V8J

1 2

C664 100P_0402_50V8JC664 100P_0402_50V8J

H_PROCHOT# <6>

Q37

Q37 2N7002H_SOT23-3

2N7002H_SOT23-3

Change footprint 20100814

7/28 Modify

12

LAN_WAKE# <27>

R6090_0402_5% R6090_0402_5%

12

R6100_0402_5%@ R6100_0402_5%@

S

G

+3VALW

32 51Thursday, May 05, 2011

PCI_PME# <18>

of

MP PVT DVT EVT

+5VS

1.0

5

4

3

2

1

EC DEBUG PORT

D D

+3VALW EC_TX_P80_DATA<26,32> EC_RX_P80_CLK<26,32>

C C

B B

EC_TX_P80_DATA EC_RX_P80_CLK

JP3

1

2

3

4

ACES_85205-0400

ME@

A A

Security Classification

2010/07/12 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

KB /SW /LPC Debug Conn.

LA-675AP

33 51Thursday, May 05, 2011

of

1

of

1.0

FOR EC 128KB SPI ROM (150mil PACKAGE) SA00003FL10 SA00003JD00

+3VALW

1

C699

0.1U_0402_16V4Z

2

FSEL#SPICS#<32>

R618 15_0402_5%R618 15_0402_5%

FRD#SPI_SO<32>

1 2

FSEL#SPICS#

20mils

U33

1 2 3 4

VCC

CS#

HOLD#

DO

CLK

WP#

DIO

GND

MX25L2005CMI-12G SOP

12

R617

R617 10K_0402_5%

10K_0402_5%

8

HOLD#FRD#SPI_SO SPI_SO

7 6 5

SPI_SI_EC

R620

R619 0_0402_5%@R619 0_0402_5%@

1 2

15_0402_5%

R619

8/27 R619 change to Bead

S SUPPRE_ KC FBMA-10-100505-101T 0402

SPI_CLKSPI_CLK_R

FWR#SPI_SI

SPI_CLK <32>

FWR#SPI_SI <32>

SPI_CLK_R

Colse to EC

@

C700

10P_0402_50V8J

1

2

EMI

H_3P8

H2

H1

HOLEAH2HOLEA

HOLEAH1HOLEA

1

H_3P3

H6 HOLEAH6HOLEA

1

FD1FD1

H3 HOLEAH3HOLEA

1

H15

H15 HOLEA

HOLEA

1

H4 HOLEAH4HOLEA

1

FD2FD2

H16

H16 HOLEA

HOLEA

1

FD4FD4

FD3FD3

1

H_3P0NH_3P0x4P5N H_6P0

H5 HOLEAH5HOLEA

1

H17

H17 HOLEA

HOLEA

1

H_2P8

H12

H11

HOLEA

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

H10

H10 HOLEA

HOLEA

1

H8

H13

H9

HOLEA

HOLEAH9HOLEA

1

Title

Size Document Number Rev

B

Date: Sheet

H7

HOLEAH8HOLEA

HOLEAH7HOLEA

1

Compal Electronics, Inc.

LED/EC SPI ROM

LA-675AP

34 51Thursday, May 05, 2011

1.0

of

A

B

C

D

E

1 1

(220uF_6.3V_5.9L_ESR17m)*2=(SF000001500)

+5VALW

U34

1

C703 0.1U_0402_16V4ZC703 0.1U_0402_16V4Z

2 2

BT@ R631

3 3

R877

@ R877

@

0_0402_5%

BT_OFF#<19>

BT_LED#<56,57>

4 4

BT@

12

2

IN

PJDLC05_SOT23-3

+5VALW

12

1

3

1

3

R631 100K_0402_5%

100K_0402_5%

OUT

GND

OUT

GND

12

USB_ON#<30,32,56,57>

USB20_N3_C USB20_P3_C

2

1

D22

USB_ON#

@

USB20_P3

BT MODULE CONN

R632

1 2

100K_0402_5%

BT@

Q103

Q103 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

BT@

Q105

Q105 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

@

2

IN

GND

2

IN

3

IN

4

EN

APL3510BKI_SO8

Low Active

WCM-2012-900T_4P

4

1

L64

C709

1 2

BT@

+3VS

Change footprint 20100814

AP2301GN-HF_SOT23-3

USB20_P13<18> USB20_N13<18>

BT_ACTIVE<26>

+USB_VCCC

OUT OUT OUT

OC#

0.1U_0402_16V4Z

BT@

3 1

2

8 7 6 5

3

2

SATA_DTX_C_IRX_N4<14>

SATA_DTX_C_IRX_P4<14>

Q104

USB20_P13 USB20_N13 BTON_LED BT_ACTIVE

USB20_N3_C

USB20_P3_C

E-SATA COMBO RIGHT USB PORT

1

C704

1000P_0402_50V7K@

2

SATA_DTX_C_IRX_N4 SATA_DTX_C_IRX_P4

ESATA_DET#<19>

7/31 Add

+3VS_BT

30mils

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C712

C712

BT@

2

JBT1

1 2 3 4 5 6

ACES_87213-0600G

ME@

USB_OC1# <18>

SATA_ITX_DRX_P4<14> SATA_ITX_DRX_N4<14>

1 2 3 4

7

5

G1

8

6

G2

0.01U_0402_16V7K ESATA@

1

C735

0.1U_0402_16V4Z

2

@

SATA_ITX_DRX_P4 SATA_ITX_DRX_N4

SATA_DTX_IRX_P4 SATA_DTX_IRX_N4

Left USB Conn.

+USB_VCCC

1

C702

C702 470P_0402_50V7K

470P_0402_50V7K

2

W=80mils

USB20_N2<18> USB20_P2<18>

8/27 change to @

ESATA and USB Conn.

+USB_VCCC

1

+

2

SATA_ITX_DRX_P4 SATA_ITX_DRX_N4

ESATA@

SATA_DTX_IRX_N4

C7070.01U_0402_16V7K

12

SATA_DTX_IRX_P4

C708

12

ESATA@

@

1 2

C706

C706 220U_6.3V_M

220U_6.3V_M

R633

4.7K_0402_5%

7 1

5 4

3

17 18 19 21

SN75LVCP412RTJR_QFN20_4X4

W=80mils

1

C705

C705 470P_0402_50V7K

470P_0402_50V7K

USB20_N3<18>

2

USB20_P3<18>

R627 0_0402_5%ESATA@R627 0_0402_5%ESATA@

1 2

R628 0_0402_5%

1 2

ESATA@

R629 0_0402_5%ESATA@R629 0_0402_5%ESATA@

1 2

R630 0_0402_5%

1 2

ESATA@

ESATA_DET#_CONN

R8660_0402_5%

12

R867

12

0_0402_5%@

U35

EN RX_0P

RX_0N2VCC TX_1P

TX_1N GND

GND13TX_0N GND GND GND PAD

@

VCC VCC VCC

TX_0P

RX_1N RX_1P

6 10 16 20

9

D0

8

D1

15 14

12 11

8/27 change to @8/27 change to stuff

USB20_N2 USB20_P2

8/27 change to stuff

WCM-2012-900T_4P

USB20_N2

USB20_P2

WCM-2012-900T_4P

4

1

L63

R862 0_0402_5%@R862 0_0402_5%@ R863 0_0402_5%@R863 0_0402_5%@

USB20_N3 USB20_P3

SATA_ITX_DRX_P4_R SATA_ITX_DRX_N4_R ESATA_DET#_CONN SATA_DTX_IRX_N4_R SATA_DTX_IRX_P4_R

+3VS+3VS

1

C710

0.1U_0402_16V4Z

2

@

SATA_ITX_DRX_P4_R

SATA_ITX_DRX_N4_R SATA_DTX_IRX_N4_R

SATA_DTX_IRX_P4_R

12 12

D21

@

0_0402_5%

@

R865

@

R8640_0402_5%@R8640_0402_5%

3

2

1

12 12

USB20_N2_C

USB20_P2_C

USB20_N2_C USB20_P2_C

3

PJDLC05_SOT23-3

USB20_N3_C USB20_P3_CUSB20_N3

2

C711

0.01U_0402_16V7K

1

@

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173GR004M58BZL

ME@

JESAT1

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

7

A-

8

GND

SHIELD

9

B-

SHIELD

10

B+

SHIELD

11

GND

SHIELD

FOX_3Q38111-RB1C3-7HC

R634

4.7K_0402_5%

1 2

12 13 14 15

@

R636

R636 0_0402_5%

0_0402_5%

@

USB A+ = RXP A- = RXN

B- = TXN B+ = TXP

R635

4.7K_0402_5%

@

1 2

R637

R637 0_0402_5%

0_0402_5%

@

1 2

Security Classification

2010/07/12 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

USB ports/BT/E-SATA

LA-675AP

35 51Thursday, May 05, 2011

E

1.0

of

ON/OFF switch

Power Button

TOP Side

Bottom Side

ON/OFFBTN#

EC_ON<32,48>

1 2

SW3

1 2

EC_ON

5

6

J11

SHORT PADS

1 2

NOVO#<32>

@SW3

@

3 4

SMT1-05_4P

D23

1

DAN202UT106_SC70-3

R639

R639 10K_0402_5%

10K_0402_5%

NOVO#

51_ON#

3 2

+3VALW

1 2

+3VALW

R638

R638 100K_0402_5%

100K_0402_5%

1 2

13

D

2

G

S

R642

R642 100K_0402_5%

100K_0402_5%

ON/OFF# 51_ON#

2N7002H_SOT23-3

Q106

Change footprint 20100814

D26

2

1

3

DAN202UT106_SC70-3

NOVO_BTN#

ON/OFF# <32>

51_ON# <45>

Power Bottom Board Conn. 8pin

+5VALW

JPWRB1

1

NUM_LED#<32>

CAPS_LED#<32>

PWR_LED#<32,56,57>

NOVO_BTN# ON/OFFBTN#

2

3

D24

D24 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

@

1

EMI REQUEST 1ST = SCA00000E00

2ST = SCA00000R00

2

3

4

5

6

7

8

9

GND

10

GND

ACES_88058-080N

ME@

+3VS

12

USB20_P11<18>

USB20_N11<18>

USB20_N11

C635

USB20_P11

1000P_0603_50V7K

Card Reader/Audio Jack SB CONN

3

2

USB20_N11_C

3

USB20_P11_C

2

HP_OUTL

HP_OUTR

PLUG_IN

EXT_MIC_L EXT_MIC_R

MIC_JD

0_0402_5%

R871

R871 R870

R870

0_0402_5%

12 12

USB20_P11_C USB20_N11_C

HP_OUTL<31> HP_OUTR<31> PLUG_IN<31>

EXT_MIC_L<31> EXT_MIC_R<31> MIC_JD<31>

WCM-2012-900T_4P

4

1

L67

@L67

@

USB20_P11 USB20_N11

JCR1

1

2

3

4

5

6

7

8

9

10

11

12

13

GND

14

GND

ACES_88058-120N

Security Classification

2010/07/12 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Size Document Number Rev

Custom

Date: Sheet

other IO connector

LA-675AP

of

36 51Thursday, May 05, 2011

of

36 51Thursday, May 05, 2011

of

36 51Thursday, May 05, 2011

1.0

A

B

C

D

E

SUSP

12

R652

R652 100K_0402_5%

100K_0402_5%

2

+1.5V to +1.5VS

SUSP#SUSP

2

G

+5VALW+RTCVCC

12

@

R653

R653 100K_0402_5%

100K_0402_5%

Q117

1

OUT

IN

GND

3

1

C717

C717 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VALW

12

100K_0402_5%

100K_0402_5% R648

R648

13

D

S

U39

R650

R650 0_0402_5%

0_0402_5%

1 2

SUSP

4

@

Change footprint 20100814

+3VS

1 2

1

36

C724

C724 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C727

0.1U_0603_25V7K

2

1

C725

C725 1U_0603_10V4Z

1U_0603_10V4Z

2

2N7002H_SOT23-3

SUSP<6,10,51>

SUSP#<10,32,49,51> SYSON<32,49>

12

R645

R645 470_0603_5%

470_0603_5%

@

13

D

Q108

@

S

SUSP

DTC124EKAT146_SC59-3

2

G

Change footprint 20100814

U38

R649

U38

+5VS

1 2

1

36

C721

C721 10U_0805_10V4Z

10U_0805_10V4Z

4

5VS_GATE_R

12

Q114

2

1

C726

0.1U_0603_25V7K

2

+1.5V+1.8VS +0.75VS +1.05VS

12

R656

R656 470_0603_5%

470_0603_5%

@

13

D

SYSON# SUSPSUSP

2

G

Change footprint

@

S

20100814

2N7002H_SOT23-3

1

C722

C722 1U_0603_10V4Z

1U_0603_10V4Z

2

2N7002H_SOT23-3

Q107

12

R644

R644 470_0603_5%

470_0603_5%

@

13

D

2

G

Change footprint

@

S

20100814

2N7002H_SOT23-3

Change footprint 20100814

SUSP

Q115

+5VALW

DMN3030LSS-13_SOP8L-8

8

R646

R646 20K_0402_5%

20K_0402_5%

13

D

Q110

Q110 2N7002H_SOT23-3

2N7002H_SOT23-3

S

Change footprint 20100814

12

R655

R655 470_0603_5%

470_0603_5%

@

13

D

2

G

Change footprint

S

20100814

2N7002H_SOT23-3

7 5

10K_0402_5%

1

C720

C720 10U_0805_10V4Z

1 1

2 2

3 3

10U_0805_10V4Z

2

+VSB +VSB

2

G

Q113

@

12

13

D

S

+3VALW TO +3VS+5VALW TO +5VS

SUSP

R658

R658 22_0603_5%

22_0603_5%

2

G

1

C723

C723 10U_0805_10V4Z

10U_0805_10V4Z

2

12

R647

R647 47K_0402_5%

47K_0402_5%

13

D

2

G

S

Q116

+3VALW

DMN3030LSS-13_SOP8L-8

8 7

5

Q111

Q111 2N7002H_SOT23-3

2N7002H_SOT23-3

Change footprint 20100814

12

R659

R659 470_0603_5%

470_0603_5%

@

13

D

2

G

2N7002H_SOT23-3@

S

Change footprint 20100814

+1.5V

3 1

R651

12

0_0402_5%

Q112

Q112 2N7002H_SOT23-3

2N7002H_SOT23-3

Change footprint 20100814

SYSON

+1.5VS

Q8

AP2301GN-HF_SOT23-3

2

1.5VS_GATE5VS_GATE

1

C728

2

0.1U_0603_25V7K

100K_0402_5%

SYSON#

DTC124EKAT146_SC59-3

@

2

1

C718

C718 10U_0805_10V4Z

10U_0805_10V4Z

2

C729

0.1U_0603_25V7K

+5VALW

12

@

R654

Q119

1

OUT

IN

GND

3

1

C719

C719 1U_0603_10V4Z

1U_0603_10V4Z

2

2N7002H_SOT23-3

Change footprint 20100814

Q109

@

12

R643

R643 470_0603_5%

470_0603_5%

@

13

D

S

SUSP

2

G

For Intel S3 Power Reduction.

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

LA-675AP

37 51Thursday, May 05, 2011

E

1.0

of

5

4

3

2

1

12

PR110

PR110 68_1206_5%

68_1206_5%

+CHGRTC

+3VLP

VIN

Precharge detector

15.97V/14.84V FOR ADAPTOR

12

100P_0402_50V8J

PC103

PC104

1000P_0402_50V7K

VS

VIN

ACOFF<32,47>

+5VALWP<48>

PR102

PR102 1K_1206_5%@

1K_1206_5%@

1 2

PR103

PR103 1K_1206_5%@

1K_1206_5%@

1 2

PR104

PR104 1K_1206_5%@

1K_1206_5%@

1 2

PR107

PR107 1K_1206_5%@

1K_1206_5%@

1 2

PreCHG

PQ103

PQ103 DDTC115EUA-7-F_SOT323-3@

DDTC115EUA-7-F_SOT323-3@

PD104

2 3

RB715F_SOT323-3@

1

PD102

12

LL4148_LL34-2

@

2

PR105

100K_0402_1%

@

PQ102

TP0610K-T1-E3_SOT23-3@

13

12

PR106

100K_0402_1%

@

13

2

12

PR108

100K_0402_1%@

13

2

PQ104

DDTC115EUA-7-F_SOT323-3@

B+

PR112

2.2M_0402_5%@

12

VL

12

PR114

100K_0402_1%@

PD105

RB715F_SOT323-3@

MAINPWON<46,48>

ACON<47>

2 3

100K_0402_1%@

1

12

PC108

0.1U_0603_25V7K@

6251VREF

PU101A

LM393DG_SO8

1

O

VS

12

PC107

8

0.01U_0402_25V7K@

3

P

+

2

-

G

4

12

PC109

1000P_0402_50V7K@

PR119

34K_0402_1%@

12

PR115

205K_0402_1%

PRG++

13

D

PQ105

S

47K_0402_5%@

2

G

PR120

13

12

PR113

499K_0402_1%

@

12

PC110

PR116

499K_0402_1%@

PC110

0.01U_0402_25V7K@

PACIN<47>

12

DC030006J00

PL101

PF101

7A_24VDC_429007.WRML

4

3

2

D D

C C

B B

2

1

4602-Q04C-09R 4P P2.5@

4602-Q04C-09R 4P P2.5@ JDCIN1

JDCIN1

PD101

LL4148_LL34-2

51_ON#<36>

LL4148_LL34-2

100K_0402_5%

22K_0402_5%

JRTC1

ML1220T13RE

45@

PR101

PR111

1 2

12

BATT+

-+

12

+RTCBATT

APDIN1APDIN

21

N1

12

PC105

0.22U_0603_25V7K

TP0610K-T1-E3_SOT23-3

+RTCBATT

560_0603_5%

1 2

12

PQ101

PR117

PC101

2

SMB3025500YA_2P

12

1000P_0402_50V7K

560_0603_5%

1 2

PL101

1 2

100P_0402_50V8J

PC102

13

PR118

VIN

PD103

PD103 LL4148_LL34-2

LL4148_LL34-2

1 2

12

PR109

PR109 68_1206_5%

68_1206_5%

12

PC106

0.1U_0603_25V7K

1 2

PD106

RB751V-40_SOD323-2

2N7002W-T/R7_SOT323-3@

PR121

1 2

66.5K_0402_1%@

ACIN

Precharge detector Min. typ. Max.

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

L-->H 14.991V 15.381V 15.782V H-->L 13.860V 14.247V 14.621V

Compal Secret Data

2010/01/25 2010/12/31

Compal Secret Data

Deciphered Date

2

BATT ONLY

Precharge detector

Min. typ. Max. L-->H 7.196V 7.349V 7.505V H-->L 6.138V 6.214V 6.056V

PQ106

DTC115EUA_SC70-3@

Compal Electronics, Inc.

Title

PWR DCIN / Vin Detector /Pre-charge

Size Document Number Rev

Custom

Date: Sheet

2

+5VALWP

1.0

LA-675AP

1

38 51Thursday, May 05, 2011

1.0

of

5

4

3

2

1

PH201 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

12

VL

12

PR221

100K_0402_1%

2

G

B+

PR218

22K_0402_1%

1 2

13

D

PQ203

2N7002W-T/R7_SOT323-3

S

PU201

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

PR223

@

0_0402_5%

1 2

12

PR216

100K_0402_1%

TMSNS1

RHYST1

TMSNS2

RHYST2

PC205

PR203

10K_0402_1%@

8 7 6 5

PQ202

TP0610K-T1-E3_SOT23-3

2

0.22U_0603_25V7K

12

PH202

PR222

1 2

3.48K_0402_1%

12

PH201

PR208

100K_0402_1%_TSM0B104F4251RZ

1 2

43.2K_0402_1%

100K_0402_1%

13

12

0.1U_0603_25V7K

ADP_I <32,47>

12

PR204

21.5K_0402_1%

PR206

9.76K_0402_1%

1 2

+VSBP

PC206

+VSBP

VL

1 2

PJ201

PJ201 JUMP_43X39@

JUMP_43X39@

112

PR205

PR205 100K_0402_1%@

100K_0402_1%@

MAINPWON <45,48>

2

+VSB

BATT_LEN#<32>

VMB

12

PC201

PC201 1000P_0402_50V7K

1000P_0402_50V7K

EC_SMB_CK1 <32>

EC_SMB_DA1 <32>

+3VALW

BATT_TEMP <32>

+3VALW

PR210

PR210 100K_0402_1%

100K_0402_1%

1 2

PL201

SMB3025500YA_2P

1 2

A/D

+3VS

PR211

PR211 10K_0402_1%

10K_0402_1%

1 2

PQ201

13

D

2N7002KW_SOT323-3

2

G

S

2

G

BATT+

12

PC202

0.01U_0402_25V7K

BATT_OUT <47>

PQ205

13

D

2N7002KW_SOT323-3

S

100K_0402_1%

SPOK<48>

PR219

VL

1 2

0.1U_0603_25V7K

VR_HOT#<32,53>

PR220

PR220 1K_0402_5%

1K_0402_5%

1 2

VL

PC203

13

D

PQ204

S

2N7002KW_SOT323-3

2

G

12

PC207

1U_0402_6.3V6K

JBATT1

1

2

D D

C C

2

3

4

5

6

7

8

GND

9

GND

TYCO_1775789-1

@

EC_SMCA EC_SMDA

12

PR201

100_0402_1%

PR201

100_0402_1%

12

PR202

100_0402_1%

PR202

100_0402_1%

VMB2

PR212

PR212 649K_0402_1%

649K_0402_1%

PR214

10K_0402_1%

1 2

PR215

VMB2

B B

PR215 232K_0402_1%

232K_0402_1%

1 2

PR207

6.49K_0402_1%

1 2

PR209

PR209 10K_0402_5%

10K_0402_5%

12

PC204

0.01U_0402_25V7K

5

+

6

-

PR217

PR217 10K_0402_1%

10K_0402_1%

PF201

PF201 12A_65V_451012MRL

12A_65V_451012MRL

21

VS

PR213

5.1M_0402_5%

1 2

8

P

7

O

G

PU101B

LM393DG_SO8

4

12

6251VREF

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2010/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR-BATTERY CONN/OTP

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

LA-675AP

1

39 51Thursday, May 05, 2011

1.0

of

5

13

1 2 36

12

PC301

5

P2

0.1U_0603_25V7K

PQ302

SI4459_SO8

1 2 3 6

4

5600P_0402_50V7K

12

PR304

P2-1

12

P2-2

34

IREF<32>

12

61

200K_0402_1%

PQ317A

PQ317A 2N7002KDW-2N_SOT363-6@

2N7002KDW-2N_SOT363-6@

12

PR313

PR313 10K_0402_1%

10K_0402_1%

13

D

PR314

2

G

150K_0402_1%

S

PQ308

2N7002KW_SOT323-3

PQ307B

PQ307B 2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

154K_0402_1%

100K_0402_1%

Connect to EC A/D Pin.

PC325

1 2

PC302

0.1U_0603_25V7K@

2

FSTCHG<32>

0.01U_0402_25V7K

ADP_I<32,46>

PR327

PR330

PQ301

PQ301 AO4407A_SO8

AO4407A_SO8

DTA144EUA_SC70-3

47K_0402_5%

13

2

PQ307A

PACIN

PQ312

DTC115EUA_SC70-3

ACOFF-1

1 2

8 7

5

PQ304

2

1 3

PQ305

DTC115EUA_SC70-3

PR319

47K_0402_1%

1 2

2

12

PR343

PR343 0_0402_5%

0_0402_5%

PQ314

13

D

2

G

S

4

2N7002KW_SOT323-3

VIN

D D

C C

B B

BATT_ON

ACOFF<32,45>

BATT_OUT<46>

12

PR301

61

2N7002KDW-2N_SOT363-6

2

PACIN<45>

ACON<45>

PR325

PR325 10K_0402_5%

10K_0402_5%

CHGVADJ=(Vcell-4)/0.10627

Vcell 4V

4.2V

4.35V

CC=0.25A~3A IREF=1.016*Icharge IREF=0.254V~3.048V

CHGVADJ

0V

1.882V

3.2935V

CP mode for 65W adapter Vaclim=2.39*(2.2K/(2.2K+21K))=0.2515V Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) where Vaclim=0.2515V, Iinput=2.76A

CP mode for 90W adapter Vaclim=2.39*(3.9K/(3.9K+16.9K))=0.478V Iinput=(1/0.015)((0.05*Vaclim)/2.39+0.05) where Vaclim=0.478V, Iinput=4A

VCHLIM need over 95mV

A A

8 7

5

VIN

PR303

47K_0402_1%@

1 2

PQ317B

PQ317B 2N7002KDW-2N_SOT363-6@

2N7002KDW-2N_SOT363-6@

34

5

BATT_OUT <46>

PC314

6251_VCOMP-1

1 2

12

PC319

0.01U_0402_25V7K

CHGVADJ<32>

4

P3

12

FSTCHG

6251VREF

65W:0.020 90W:0.015

0.02_1206_1%

1 2

BATT_OUT <46>

PR310

0_0402_5%

12

PR315

PC312 6800P_0402_25V7KPC312 6800P_0402_25V7K

1 2

PR321 10K_0402_1%PR321 10K_0402_1%

1 2

PC315

0.1U_0402_16V7K

PR333

15.4K_0402_1%

1 2

PR302

12

100K_0402_1%

1 2

PR323

PR323 100_0402_1%

100_0402_1%

6251VREF

PR329

PR329 21K_0402_1%

21K_0402_1%

1 2

PR332

2.2K_0402_1%

31.6K_0402_1%

ACPRN<48>

3

B+

PL302

1 2

12

10U_0805_25V6K@

12

PR306

1 2 12

PR312

14.3K_0402_1%

PC309

0.1U_0603_25V7K

12

PC311

0.047U_0402_16V7K

PC313

0.1U_0402_16V7K

6251_CSIP

1 2

LX_CHG

DH_CHG

0_0603_5%

1 2

6251_VDDP

PR338

PR338 10K_0402_1%

10K_0402_1%

PL302

PreCHG

12

191K_0402_1%

12

ACPRN <48>

20_0402_5%

1 2

PR318

20_0402_5%

1 2

2_0402_5%

PR328

12

PC321

4.7U_0805_6.3V6K

PR339

10K_0402_1%

1 2

PACIN

12

PR342

14.3K_0402_1%

PR307

191K_0402_1%@

ACSETIN

12

PC307

PC307 1000P_0402_25V8J

1000P_0402_25V8J

PR317

12

PR320

PR320 20_0402_5%

20_0402_5% PR322

PR322

PC316

0.1U_0603_25V7K

BST_CHGA

12

PD304

PD304 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PR331

4.7_0402_5%

12

6251_VDD

ACIN <16,32>

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

4 3

PC324

CSIP

VIN

PD301

6251_VDD

PC308

2.2U_0603_6.3V6K

ACSETIN

6251_EN CSON

CELLS

6251_ICOMP

6251_VCOMP

6251_ICM

6251_CHLIM

6251_ACLIM

12

PR334

1 2

6251_VADJ

12

PU301

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

PR337

47K_0402_1%

DTC115EUA_SC70-3

PD301

RB751V-40_SOD323-2

PR311

10_1206_5%

24

DCIN

23

ACPRN

22

CSON

21

CSOP

20

CSIN

19

CSIP

18

PHASE

17

UGATE

16

BOOT

15

VDDP

14

LGATE

13

PGND

6251_VDD

12

2

PQ316

6251_DCIN

6251_CSON

6251_CSOP

6251_CSIN

BST_CHG

DL_CHG

12

13

1 2

PC303

1 2

PC304

4.7U_0805_25V6-K

CSOP

2

PC306

1 2

PC305

4.7U_0805_25V6-K

4

CELLS

CHG_B+

DISCHG_GCSIN

2200P_0402_50V7K

PR308

PR308 10K_0402_1%

10K_0402_1%

1 2

DISCHG_G-1

13

DTC115EUA_SC70-3

6

578

PQ310

AO4466L_SO8

123

6

578

PQ313

AO4466L_SO8

123

12

PR340

PR340 0_0402_5%

0_0402_5%

2N7002KDW-2N_SOT363-6@

AO4407A_SO8

1 2 3 6

PR305

47K_0402_1%

1 2

ACOFF-1

PD302

2

PR316

BATT_ON

1 2

ACPRN

12

6251_SN

12

PR335

1 2 61

PR326

PC320

100K_0402_1%@

PD302

1 2

1SS355_SOD323-2

12

PC322

100K_0402_5%@

2200P_0402_50V7K

13

D

2

G

S

PL301

1 2

4.7_1206_5%

680P_0603_50V7K

1 2 34

2

2N7002KDW-2N_SOT363-6@

1SS355_SOD323-2

1 2

PR336

PR336 100K_0402_1%@

100K_0402_1%@

PQ315B

PQ306

10U_LF919AS-100M-P3_4.5A_20%

6251_VDD 6251_VDD

PQ315A

PQ303

8 7

5

4

1 2

PD303

12

PC310

0.1U_0603_25V7K

PQ311

2N7002W-T/R7_SOT323-3@

PR324

0.02_1206_1%

CHGCHG

1 2

3cell : GND 4cell : VDD

5

PR341

PR341 0_0402_5%@

0_0402_5%@

BATT_SEL_EC<32>

1

VIN

PR309

200K_0402_1%

PQ309

13

D

2N7002W-T/R7_SOT323-3

PACIN

2

G

S

4 3

12

PC317

PC323

10U_0805_25V6K

12

PC318

BATT+

12

10U_0805_25V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/01/132010/01/13

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CHARGER

LA-675AP

40 51Thursday, May 05, 2011

1

1.0

of

5

Note: Use TPS51125 IC can remove RTC refernece LDO Use TPS51427 IC must keep RTC refernece LDO

4

3

2

1

2VREF_8205

+3VALWP +3VALW

D D

PR401

13K_0402_1%

1 2

PR403

RT8205_B+

PJ403

B+

PC401

C C

B B

2

12

0.1U_0603_25V7K

MAINPWON<45,46>

PJ403

JUMP_43X118@

112

12

PC403

0.1U_0603_25V7K

+3VALWP

PR414

PR414 0_0402_5%

0_0402_5%

12

PC404

4.7U_0805_25V6-K

12

PC406

PC405

4.7U_0805_25V6-K

2200P_0402_50V7K

4.7UH_FMJ-0630T-4R7 HF_5.5A_20%

1

PC414

2

2N7002KDW-2N_SOT363-6

+

6.3V M V LESR15M VL H5.9

VL

AO4466L_SO8

PL401

1 2

PR409

PC415

PQ405A

PQ401

12

4.7_1206_5%

12

680P_0603_50V7K

61

2

100K_0402_1%

123

PR415

241

12

6

578

3 6

4

PQ403

PQ403 AO4712_SO8

AO4712_SO8

34

5

Typ: 175mA

+3VLP

12

PC407

4.7U_0805_10V6K

1 2

PC412

0.1U_0603_25V7K

MAINPWON

PR412

499K_0402_1%

1 2

B+

ENTRIP2ENTRIP1

PQ405B

PQ405B 2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

PR407

1 2

0_0603_5%

PR413

100K_0402_1%

PR411 0_0402_5%

0_0402_5%

12

PR403

20K_0402_1%

1 2

PR405

110K_0402_1%

1 2

25

7 8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

@PR411

@

12

PC418

1U_0603_10V6K

2VREF_8205

PU401

P PAD

VO2 VREG3 BOOT2 UGATE2 PHASE2 LGATE2

12

PC402

1U_0603_10V6K

ENTRIP2

6

5

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_B+

4

TONSEL

15

3

2

REF

VIN16GND

17

12

PC420

0.1U_0603_25V7K

FB1

UGATE1 PHASE1

PC419

PR402

30K_0402_1%

1 2

PR404

20K_0402_1%

1 2

PR406

154K_0402_1%

ENTRIP1

1 2

1

ENTRIP1

24

VO1

23

PGOOD

22

BOOT1

21 20 19

LGATE1

RT8205EGQW_WQFN24_4X4

NC18VREG5

VL

Typ: 175mA

4.7U_0805_10V6K

BST_5V UG_5V LX_5V LG_5V

PC408

4.7U_0805_25V6-K

PR408

0_0603_5%

1 2

RT8205_B+

12

PC409

4.7U_0805_25V6-K

SPOK <46>

PC413

0.1U_0603_25V7K

1 2

12

PC411

PC410

0.1U_0603_25V7K

2200P_0402_50V7K

+5VALWP +5VALW

12

578

4

578

AO4712_SO8

PQ404

+3.3VALWP OCP(min)=5.81A +5VALWP OCP(min)=8.44A

PJ401

2

112

JUMP_43X118@

PJ402

2

112

JUMP_43X118@

6

PQ402

AO4466L_SO8

123

PL402

1 2

12

PR410

4.7_1206_5%

12

PC417

680P_0603_50V7K

PL402

4.7UH_FMJ-0630T-4R7 HF_5.5A_20%

3 6

241

+5VALWP

1

+

PC416

2

6.3V M V LESR15M VL H5.9

13

PR418

200K_0402_1%

ACPRN

A A

200K_0402_1%

EC_ON<32,36>

12

2

5

2

G

13

D

VS

PQ406

S

2N7002W-T/R7_SOT323-3

PQ408

DTC115EUA_SC70-3

1 2

PR416

100K_0402_1%

12

PR417

40.2K_0402_1%

12

2

PC421

2.2U_0603_10V7K

4

PQ407

PQ407 DTC115EUA_SC70-3

DTC115EUA_SC70-3

Security Classification

2010/01/25 2010/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2010/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

3VALWP/5VALWP

Size Document Number Rev

Custom

Date: Sheet

LA-675AP

1

41 51Thursday, May 05, 2011

of

1.0

A

1 1

PR503

267K_0402_1%

PC509

1 2

PR509

10K_0402_1%

267K_0402_1%

1 2

2 3 4 5 6

PR501

0_0402_5%

SYSON<32,37>

2 2

+5VALW

3 3

1 2

PR505

PR507

100_0603_5%

1 2

4.7U_0603_6.3V6K

1 2

47K_0402_5%

PC510

12

PC501

.1U_0402_16V7K

12

@PC501

@

@PC509

@

47P_0402_50V8J

1 2

12

PR510

PR510 10K_0402_1%

10K_0402_1%

PU501

TON VOUT VDD FB PGOOD

B

15

1

14

NC

BOOT

UGATE

EN/DEM

VFB=0.75V

PHASE

LGATE

GND7PGND

RT8209BGQW_WQFN14_3P5X3P5

8

VDDP

C

PJ505

12

PC503

4.7U_0805_25V6-K

PJ505

2

112

JUMP_43X118@

1

+

PC506

PC506 220U_6.3V_M

220U_6.3V_M

2

6

578

4

578

3 6

123

241

PC505

BST_1.5V-1

12

9.76K_0402_1%

PC505

0.1U_0603_25V7K

1 2

+5VALW

PC507

4.7U_0805_10V6K

PQ502

AO4456_SO8

PR504

0_0603_5%

BST_1.5V

1 2

DH_1.5V

13

LX_1.5V

12 11

CS

10

DL_1.5V

9

12

PR508

1.5_51117_B+

PQ501

AO4406AL 1N SO8

1UH_PCMC063T-1R0MN_11A_20%

12

PC502

4.7U_0805_25V6-K

1 2

PR506

4.7_1206_5%

PC508

1000P_0603_50V7K

PL502

D

B+

12

PC504

@PC504

@

680P_0402_50V7K

+1.5VP

+1.5VP OCP(min)=15.6A

1.8VSP max current=4A

PJ501

2

112

JUMP_43X118@

+1.5VP

JUMP_43X118@ PJ502

PJ502

2

112

JUMP_43X118@

+1.5V

PJ504

PU502

PJ503

+5VALW

4 4

2

112

JUMP_43X118@

SUSP#<10,32,37,51>

A

12

PC511

PC511 22U_0805_6.3VAM

22U_0805_6.3VAM

PR513

1 2

100K_0402_1%

EN_1.8V

1M_0402_5%

PR514

12

PC516

1 2

10

PVIN

9

PVIN

8

SVIN

5

EN

11

0.1U_0402_10V7K

4

2

LX

PG

3

LX

6

FB

TP

NC

7

1

SY8033BDBC_DFN10_3X3

B

LX_1.8V

FB=0.6Volt

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PL503

1UH_PCMC063T-1R0MN_11A_20%

1 2

12

PR511

4.7_1206_5%

12

PC513

680P_0603_50V7K

30K_0402_1%

FB_1.8V

14.7K_0402_1%

12

PR512

12

PR515

2010/01/25 2010/12/31

12

PC512

12

68P_0402_50V8J

Compal Secret Data

12

PC514

22U_0805_6.3VAM

Deciphered Date

C

PC515

22U_0805_6.3VAM

+1.8VSP

Compal Electronics, Inc.

Title

PWR-+1.5VP/+1.8VSP

Size Document Number Rev

Custom

Date: Sheet

PJ504

2

112

JUMP_43X118@

LA-675AP

D

+1.8VS+1.8VSP

1.0

of

42 51Thursday, May 05, 2011

5

D D

PR602

+3VS

PR609

1 2

10K_0402_5%

280K_0402_1%

1 2

0_0402_5%

PR611

12

4700P_0402_25V7K@

PR602

PU601

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

12

PR617

10K_0402_5%

PC609

C C

PR601

0_0402_5%

+5VALW

0_0402_5%

1 2

PR604

@ PR604

@

47K_0402_5%

PR606

PR606 100_0603_1%

100_0603_1%

1 2

PC608

4.7U_0603_6.3V6K

12

VFB=0.75V

PR614

30K_0402_1%

0.1U_0402_16V7K

@

12

2K_0402_1%

1 2

12

PC601

PR612

12

PR615

PR615 15K_0402_1%

15K_0402_1%

PQ603

13

D

2N7002W-T/R7_SOT323-3

2

G

S

VCCPPWRGOOD<51>

B B

1

15

NC

EN/DEM

GND7PGND

RT8209BGQW_WQFN14_3P5X3P5

8

SA_PGOOD <32>

+3VS

12

PR616

10K_0402_5%

12

PR618 100K_0402_5%

100K_0402_5%

4

BST_VCCSAPEN_VCCSAP

14

BOOT

UGATE PHASE

CS

VDDP

LGATE

PMBT2222A_SOT23-3

1

@PR618

@

3

13 12 11 10 9

PQ604

UG_VCCSAP LX_VCCSAP

LG_VCCSAP

2

PR603

0_0603_5%

1 2

PR619

0_0402_5%

12

0.1U_0603_25V7K

BST_VCCSAP-1

+5VALW

PR610

13K_0402_1%

PR620

10K_0402_5%@

PC604

1 2

AO4712_SO8

12

4.7U_0805_10V6K

VCCSA_SEL <10>

PC607

PQ602

3

B+

PJ601

@PJ601

51117_VCCSAP_B+

12

PC602

6

578

AO4466L_SO8

4

123

578

3 6

241

PC602

PQ601

4.7U_0805_25V6-K

PL601

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR605

4.7_1206_5%

12

PC606

470P_0603_50V8J

@

2

112

JUMP_43X118

12

PC603

4.7U_0805_25V6-K

1

+

PC605

220U_6.3V_M

2

PR607

1 2

PR607 0_0402_5%

0_0402_5%

PR613

1 2

10_0402_5%

PR608

1 2

0_0402_5%

VCCSA_SENSE <10>

2

+VCCSAP

VSSSA_SENSE <10>

+VCCSAP OCP(min)=6.28A

PJ602

2

112

JUMP_43X118@

1

+VCCSA+VCCSAP

VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required 0 0 0.9 V Yes/Yes 0 1 0.8 V Yes/Yes 1 1 0.725V No/Yes

A A

5

1 1 0.675V No/Yes

Note:Use VCCSA_SEL to switch High & Low Level for VID[1] (ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2010/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR +VCCSAP

Size Document Number Rev

C

Date: Sheet

1

LA-675AP

43 51Thursday, May 05, 2011

of

1.0

5

4

3

2

1

+1.5V

1

PJ701

1

JUMP_43X118

D D

PQ701

PQ701 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PR702

20K_0402_1%

12

PC709

PC709 .1U_0402_16V7K

.1U_0402_16V7K

12

1 2

PC704

0.1U_0402_16V7K

PC715

@PC715

@

47P_0402_50V8J

1 2

PR711

4.02K_0402_1%

1 2

12

PR712

10K_0402_1%

SUSP<6,10,37>

C C

PR705

120K_0402_1%

10,32,37,49>

B B

SUSP#

+5VALW

A A

1 2

PR709

100_0603_5%

1 2

4.7U_0603_6.3V6K

PR716

PC713

10K_0402_1%@

1 2

2

G

12

PR704

267K_0402_1%

1 2

2 3 4 5 6

13

D

S

PU702

TON VOUT VDD FB PGOOD

1

15

NC

EN/DEM

VFB=0.75V

GND7PGND

PR713

1 2

10K_0402_1%

JUMP_43X118

@

2

PC701

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K PR701

PR701

1 2

1K_0402_1%

PR703

14

BOOT

UGATE PHASE

VDDP

LGATE

RT8209BGQW_WQFN14_3P5X3P5

8

CS

+3VS

BST_1.05VS_VCCP DH_1.05VS_VCCP

13

LX_1.05VS_VCCP

12 11 10

DL_1.05VS_VCCP

9

12

1K_0402_1%

PR706

0_0603_5%

1 2

12

PC703

PC705

0.1U_0402_16V7K

12

PR710

13.7K_0402_1%

PU701

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

+0.75VSP

12

10U_0603_6.3V6M

PC710

0.1U_0603_25V7K

1 2

+5VALW

PC714

4.7U_0805_10V6K

PC716

10U_0603_6.3V6M

NC NC NC

TP

6 5 7 8 9

AO4456_SO8

PQ703

12

4

+3VALW

PC702

PC702 1U_0603_10V6K

1U_0603_10V6K

6

578

123

578

3 6

241

PR714

10_0402_5%

1.05VS_B+

PC706

PQ702

AO4406AL 1N SO8

12

PC706

4.7U_0805_25V6-K

1.0UH +-20% PCMC104T-1R0MN 20A

PR707

4.7_1206_5%

PC712

1000P_0603_50V7K

VCCIO_SENSE <9>VCCPPWRGOOD<50>

12

PC707

PL702

0_0603_5%

PJ702

2

112

JUMP_43X118@

PJ703

2

112

JUMP_43X118@

JUMP_43X118@ PJ704

PJ704

2

112

JUMP_43X118@

+1.05VS_VCCPP OCP(min)=20.75A

PJ705

2

112

JUMP_43X118@

12

4.7U_0805_25V6-K

12

PR708

1 2

JUMP_43X118@

PC711

330U_X_2VM_R6M

1

+

2

12

@PC708

@

680P_0402_50V7K

+0.75VS+0.75VSP

+1.05VS+1.05VS_VCCPP

B+ B+

B+

PC708

1

+

2

+1.05VS_VCCPP

PC717

100U_25V_M

1

+

PC718

68U_25V_M

2

PR715

@PR715

@

10K_0402_1%

1 2

5

4

Security Classification

2010/01/25 2010/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/25 2010/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR +1.05VS_VCCPP/+0.75VSP

Size Document Number Rev

Custom

Date: Sheet

LA-675AP

1

44 51Thursday, May 05, 2011

of

1.0

PR901

@PR901

@

VR_SVID_DAT<9> VR_SVID_ALRT#<9> VR_SVID_CLK<9>

PR927

1 2

1.91K_0402_1%

VGATE <16>

12

PC926

29.4K_0402_1%

For shortage changed

0.047U_0603_16V7K

12

PR916

2K_0402_1%@

5

PR903

8.06K_0402_1%

12

PR918

For shortage changed

1 2

3.83K_0402_1%

12

PR943

8.06K_0402_1%

10P_0402_50V8J

PC943

150P_0402_50V8J

12

PC911

PC911 39P_0402_50V7K

39P_0402_50V7K

PC913

PC913 150P_0402_50V8J

150P_0402_50V8J

12

PR911

PR911 475K_0402_1%

475K_0402_1%

12

PC916

18.2K_0402_1%

VR_ON<32>

PC929

470P_0402_50V7K

PR939

470KB_0402_5%_ERTJ0EV474J

PR940 27.4K_0402_1%PR940 27.4K_0402_1%

12

PC932

1000P_0402_50V7K

PC938

12

PR954

12

316K_0402_1%

+CPU_CORE

VCCSENSE<9> VSSSENSE<9>

12

PC920

.1U_0402_16V7K@

0.047U_0603_16V7K

@PC929

@

12

PH903

1 2

499_0402_1%

12

PC917

12

470P_0402_50V7K@

12

PC901

1000P_0402_50V7K

422_0402_1%

12

1 2

PR920

130_0402_1%

GFX_CORE_PWRGD

PR933

1 2

0_0402_5%

12

PR949

12

PR955

3.32K_0402_1%

PR956

12

10_0402_1%@

PR960

12

10_0402_1%@

PR915

4.99K_0402_1%@

PC912

PR909

680P_0402_50V7K

12

PR912

2.55K_0402_1%

+1.05VS

12

PR921

PR967

43_0402_1%@

SVID_SDA

SVID_ALERT#

SVID_SCLK

PC940

12

470P_0402_50V7K

12

+3VS

54.9_0402_1%

12

PR926

Alert# PU resister need close CPU, so the PU resister in HW schematic. but DAT and CLK need close PWM-IC, so the PU resister in POWER schematic.

D D

499K_0402_1%

GFXVR_IMON

VSS_AXG_SENSE<10>

Parallel and tune length

+3VS

C C

VSSSENSE<9>

IMVP_IMON

+1.05VS

B B

12

PR936

VR_HOT#<32,46>

PR938

1 2

499_0402_1%@

PC928

PC928 47P_0402_50V8J

47P_0402_50V8J

change from 43P to 47P for shortage problem 2010-03-15

PR950

1 2

499K_0402_1%@

12

PC923

680P_0402_50V7K@

*Iccmax in Turbo Mode for SV (35W) is 53A

A A

+CPU_CORE

Icc-max=53A Rdson=3.6~4.5m ohm DCR=1.1m ohm HW output cap: (1)10U_0805_4V *10 (2)22U_0805_6.3V *15 (3)470U_D2_2V *4(ESR=4.5m ohm)

*OCP setting value=71.5A *OCP setting value=37A

5

4

PC902 470P_0402_50V7K@PC902 470P_0402_50V7K @

12

1.91K_0402_1%

VSUM-

PR902

3.83K_0402_1%

49

GND

1

VWG

2

IMONG

3

PGOODG

4

SDA

5

ALERT#

6

SCLK

7

VR_ON

8

PGOOD

9

IMON

10

VR_HOT#

11

NTC

12

VW

COMP13FB14ISEN3/ FB215ISEN216ISEN117VSEN18RTN19ISUMN20ISUMP21VDD22VIN23PROG1

PC933

PC933 22P_0402_50V8J

22P_0402_50V8J

12

PC9370.22U_0402_6.3V6K @PC9370.22U_0402_6.3V6K @

12

PC941

12

0.22U_0402_6.3V6K

PC942

12

0.22U_0402_6.3V6K

PC947

12

330P_0402_50V7K

PC950

1000P_0402_50V7K

12

470KB_0402_5%_ERTJ0EV474J

1 2

27.4K_0402_1%

PC908

45

48

46

47

FBG

RTNG

VSENG

COMPG

ISL95831CRZ-T_TQFN48_6X6

ISEN2

ISEN1

ISEN3

PC946

12

PH901

PR904

12

330P_0402_50V7K

ISPG

ISNG

44

43

ISPG

ISNG

12

330P_0402_50V7K

12

PC906

1 2

330P_0402_50V7K

1000P_0402_50V7K

1 2

NTCG

42

41

NTCG

PR958

1.47K_0402_1%

1.47K_0402_1% PC951

PC951

330P_0402_50V7K@

+VGFX_COREP

Ipeak=26A , Imax=18.2A , 1.2Ipeak=31.2A Rdson=3.6~4.5m ohm DCR=1.1m ohm HW output cap: (1)22U_0805_6.3V *12 (2)470U_D2_2V *2(ESR=4.5m ohm)

4

PROG2

PC935

PC909

BOOTG

12

PR919

16.5K_0402_1%@

UGATEG

39

40

BOOTG

12

1U_0603_10V6K

PC944

12

3

NTCG

+VGFX_CORE

PR905

12

10_0402_1%

VCC_AXG_SENSE <10> VSS_AXG_SENSE <10>

PR913

12

10_0402_1%

LGATEG

PHASEG

37

38

LGG

PHG

UGG

0.22U_0603_25V7K

0.22U 10V K X7R 0603

BOOT2

36

BOOT2

UGATE2

35

UG2

PHASE2

34

PH2

33

VSSP2

LGATE2

32

LG2

31

VDDP

PWM3

VSSP1

BOOT1

24

12

PWM3

30

LGATE1

29

LG1

28

PHASE1

27

PH1

UGATE1

26

UG1

BOOT1

25

PU901

PR941

1 2

CPU_B+

0_0603_5%

0_0603_5% PR945

PR945

12

+5VS

1_0603_5%

PC936

12

PC945

PC955

0.068U_0402_16V7K

0.068U_0402_16V7K@

PR959

12

100_0402_1%@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PR957

3

12

PR953

11K_0402_1%

B+

1

+

PC905

68U_25V_M

2

PR928

1 2

0_0402_5%

PR931

1 2

0_0402_5%

12

PC927

2.2U_0603_10V6K

UGATE2

PR942

1.69K_0402_1%

(Ipeak=54A)

VSUM+

12

2.61K_0402_1%

2.61K_0402_1% PH904

PH904

10K_0402_5% ERTJ0ER103J

12

PC952

.1U_0402_16V7K

PHASE2

BOOT2

LGATE2

VSUM-

UGATE1

PHASE1

2.2_0603_5%

BOOT1

LGATE1

2010/01/25 2010/12/31

UGATEG

PHASEG BOOTG

2.2_0603_5%

2.2_0603_5% PR944

PR944

12

0.22U_0603_10V7K

PR961

PC953

12

Compal Secret Data

2.2_0603_5%

LGATEG

+5VS

12

PC934

12

4

Deciphered Date

PR906

4

5

PQ911

213

2

PC907

12

0.22U_0603_10V7K

5

PQ908

213

TPCA8059-H 1N PPAK56-8@

PQ910

4

TPCA8065-H 1N PPAK56

4

TPCA8059-H 1N PPAK56-8

2

4

PQ907

4

TPCA8065-H 1N PPAK56

4

5

PQ912

5

PQ902

CPU_B+

123

213

TPCA8065-H 1N PPAK56

213

5

123

5

PQ909

213

PC948

4.7U_0805_25V6-K

TPCA8059-H 1N PPAK56-8@

PQ901

4

TPCA8057-H 1N PPAK56-8

TPCA8059-H 1N PPAK56-8

12

CPU_B+

1 2

PL901

PL901 HCB4532KF-800T90_1812

5

PC903

123

5

PQ903

4

213

CPU_B+

12

PC930

PC931

4.7U_0805_25V6-K

12

4.7_1206_5%

PR946

@

ISEN2

12

PC939

VSUM+

680P_0603_50V7K

@

12

PC949

4.7U_0805_25V6-K

10K_0402_1%

12

ISEN1

PR962

4.7_1206_5%

3.65K_0402_1%

@

12

VSUM+

PC954

680P_0603_50V7K

@

Title

Size Document Number Rev

Custom

Date: Sheet

HCB4532KF-800T90_1812

12

PC904

4.7U_0805_25V6-K

.36UH 20% PCMC104T-R36MN1R105 30A

12

@

PR907

10K_0402_1%

4.7_1206_5%

PR910

12

1 2

PC915

7.5K_0402_1%

TPCA8057-H 1N PPAK56-8@

680P_0603_50V7K@

ISPG

+5VS

12

.36UH 20% PCMC104T-R36MN1R105 30A

4 3

10K_0402_1%

PR947

12

3.65K_0402_1%

3.65K_0402_1% PR951

PR951

12

.36UH 20% PCMC104T-R36MN1R105 30A

4 3

PR963

12

PR965

12

Compal Electronics, Inc.

PWR +CPU_CORE/+VGFX_CORE

1

PL902

1

4 3

2

PH902

10K_0402_5% ERTJ0ER103J

PR914

1 2

PR917

1 2

11K_0402_1%

1 2

PC918 .1U_0402_16V7KPC918 .1U_0402_16V7K

PC921

1 2

0.01U_0402_16V7K@

ISNG

PR925

12

0_0402_5%@

PL904

1 2

PL905

1 2

LA-675AP

1

PR924

10K_0402_1%

1_0402_5%

B+

12

PR908

PR908 1_0402_5%

1_0402_5%

.1U_0402_16V7K

1 2

12

590_0402_1%

+CPU_CORE

PR948

1_0402_5%

PR952

+CPU_CORE

PR964

12

PR966

12

+VGFX_CORE

PC919

1 2

100_0402_1%

PR922

@PR922

@

ISEN1

12

VSUM-

12

ISEN2

VSUM-

45 51Thursday, May 05, 2011

of

1

+

2

PC910

470U_X_2VM_R4.5M

12

PC922

470P_0402_50V7K

@ PC922

@

1.0

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change PG# Modify List Date PhaseItem

1

D D

2

3

4

5

6

C C

7

8

9

10

B B

11

12

13

14

15

16

17

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2009/01/06

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR (PWR)

LA-675AP

46 51Thursday, May 05, 2011

1

1.0

of

5

4

3

2

1

D D

AC MODE

BATT MODE

A1

VIN

BATT

B1

V

PU2

A3

B4

+3VALW

B5

A5

V

B7

V

A2

PU3

V

B+

B2

V

B+

PCH_PWR_EN#

2 2

V

PQ2

EC

VV

A5

A4

ON/OFF

B7

B6

V

PBTN_OUT#

PM_SLP_S3# PM_SLP_S4# PM_SLP_S5# PM_SLP_A#

V

PM_SLP_SUS#

SYSON

DGPU_PWR_EN

SUSP#,SUSP

B3

51ON#

C C

EC_ON

2

4

PCH_RSMRST#

5

7 SYSON#

(DIS)

8a

8

6

U14,+3VALW_PCH

V

QH4,+5VALW_PCH

+3VALW_PCH

3

+5VALW_PCH

V

PCH

VV

+1.5V

V

PU5

VGA_ON

U49

V

+5VS

V

SYS_PWROK

PM_DRAM_PWRGD

H_CPUPWRGD

PLT_RST#

+3VSDGPU

V

Q6

+1.5VSDGPU

V

13

V

14

CPU

V

15

V

VVVV

11

VGATE

U40

U20

V

+1.8VSDGPU

+3VS

B B

V

U13 +1.5VS

V

U37

+1.0VSDGPU

V

VGA

V

PU28

PU8

VCCPPWRGOOD

V

PU9 +1.05VS_VCCP

VR_ON

9

PU1000 +CPU_CORE

V

VV

+0.75V

PU7 +VCCSA

+VGA_CORE

V

PU998

VGA_PWROK

(DIS)

8b

U47 CK505

V

10

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/12 2012/07/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Power sequence

LA-675AP

1

47 51Thursday, May 05, 2011

1.0

of

47 51Thursday, May 05, 2011

5

KSI[0..7] KSO[0..17]

KSO2

C668 100P_0402_50V8J@C668 100P_0402_50V8J@

KSO15 KSO6 KSO8 KSO13 KSO12 KSO11 KSO10 KSO3 KSO4 KSI0 KSO0

C670 100P_0402_50V8J@C670 100P_0402_50V8J@

C672 100P_0402_50V8J@C672 100P_0402_50V8J@

C674 100P_0402_50V8J@C674 100P_0402_50V8J@

C676 100P_0402_50V8J@C676 100P_0402_50V8J@

C678 100P_0402_50V8J@C678 100P_0402_50V8J@

C680 100P_0402_50V8J@C680 100P_0402_50V8J@

C682 100P_0402_50V8J@C682 100P_0402_50V8J@

C684 100P_0402_50V8J@C684 100P_0402_50V8J@

C686 100P_0402_50V8J@C686 100P_0402_50V8J@

C688 100P_0402_50V8J@C688 100P_0402_50V8J@

C690 100P_0402_50V8J@C690 100P_0402_50V8J@

D D

CONN PIN define need double check

C C

To TP/B Conn.

TP_CLK<32,56> TP_DATA<32,56>

SW/L

B B

SW/R

KSI[0..7] <32,56>

INT_KBD Conn.

KSO[0..17] <32,56>

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1

@

C697

C697 100P_0402_50V8J

100P_0402_50V8J

2

6

2 1

SW4

6

2 1

SW5

5

SMT1-05_4P

5

SMT1-05_4P

4 3

+5VS

C696

0.1U_0402_16V4Z

1

@

C698

C698 100P_0402_50V8J

100P_0402_50V8J

2

KSO16

C693 100P_0402_50V8J@C693 100P_0402_50V8J@

KSO17 KSO1 KSO7 KSI2 KSO5 KSI3 KSO14 KSI7 KSI6 KSI5 KSI4 KSO9 KSI1

1 2

C692 100P_0402_50V8J@C692 100P_0402_50V8J@

1 2

C669 100P_0402_50V8J@C669 100P_0402_50V8J@

1 2

C671 100P_0402_50V8J@C671 100P_0402_50V8J@

1 2

C673 100P_0402_50V8J@C673 100P_0402_50V8J@

1 2

C675 100P_0402_50V8J@C675 100P_0402_50V8J@

1 2

C677 100P_0402_50V8J@C677 100P_0402_50V8J@

1 2

C679 100P_0402_50V8J@C679 100P_0402_50V8J@

1 2

C681 100P_0402_50V8J@C681 100P_0402_50V8J@

1 2

C683 100P_0402_50V8J@C683 100P_0402_50V8J@

1 2

C685 100P_0402_50V8J@C685 100P_0402_50V8J@

1 2

C687 100P_0402_50V8J@C687 100P_0402_50V8J@

1 2

C689 100P_0402_50V8J@C689 100P_0402_50V8J@

1 2

C691 100P_0402_50V8J@C691 100P_0402_50V8J@

1 2

Reserve for ESD.

TP_CLK TP_DATA

SW/L SW/R

TP_CLK TP_DATA

2

3

D15

D15 PSOT24C_SOT23-3

PSOT24C_SOT23-3

@

1

CONN PIN define need double check

SATA ODD FFC Conn.

SATA_ITX_DRX_P2_CONN<14,56>

SATA_DTX_C_IRX_N2<14,56>

SATA_DTX_C_IRX_P2<14,56>

ODD_DA#<18,32,56>

A A

5

SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_P2 SATA_DTX_IRX_P2

ODD_DETECT#

ODD_DA#

+3VS

SATA_ITX_DRX_N2_CONN<14,56>

C605 0.01U_0402_16V7KC605 0.01U_0402_16V7K

1 2

C606 0.01U_0402_16V7KC606 0.01U_0402_16V7K

1 2

R555

1 2

10K_0402_5%

R554 0_0402_5%R554 0_0402_5%

4

JTP1

1

2

3

4

5

6

7

GND

8

GND

ACES_88058-060N

ME@

SATA_ITX_DRX_P2_CONN SATA_ITX_DRX_N2_CONN

SATA_DTX_IRX_N2

R710 0_0402_5%R710 0_0402_5%

+5V_ODD

1 2

4

1 2

3

JKB1

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

KSO16<32> KSO17<32>

KSO16 KSO17

JKB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

GND

29

30

GND

30

ACES_88514-3001

ME@

ZZZ

DAZ0GM00200

UMA-6L VS 8L 差異:

1.P09- C397;C398;C89

2.P10- C128

3.P21- C250;C252

C713 0.1U_0402_16V4ZC713 0.1U_0402_16V4Z

31 32

2

ZZZ1

PCB

DA60000JY10

DA60000JY10 DA6@

DA6@

+5VALW

12

USB_ON#<30,32,35,56>

USB_ON#

ZZZ2

PCB

DA40000VV10

DA40000VV10 DA4@

DA4@

U36

1

GND

2

IN

3

IN

4

EN

APL3510BKI_SO8

OUT OUT OUT OC#

ZZZ3

PCB

DA40000VS10

DA40000VS10 DA4@

DA4@

+USB_VCCA

8 7 6 5

RIGHT USB PORT X1

USB_OC0# <18,30,56>

1

C716

1000P_0402_50V7K@

2

ZZZ4

PCB

DA40000VT10

DA40000VT10 DA4@

DA4@

1

ZZZ5

PCB

DA40000VU10

DA40000VU10 DA4@

DA4@

Right USB Conn.

C714

220U_6.3V_M

+USB_VCCA

1

+

2

W=80mils

1

C715

C715 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N0<18,56> USB20_P0<18,56>

8/14 change to OSCAN 220U (220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)

D19

@

WLAN_LED#<26,56>

JP2

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_87056-01001-001

ME@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

BT_LED#<35,56>

RF_LED#<32,56>

For 15" M/B to LED/B

KILL_SW#

R884 100K_0402_5%@R884 100K_0402_5%@

11/16modify

Compal Secret Data

@

RB751V_SOD323

@

RB751V_SOD323

1 2

Deciphered Date

D20

1 2

R679 0_0402_5%R679 0_0402_5%

White

21

USB20_N0

USB20_P0

RF_LED#_R

+3VALW

2

8/27 change to @

USB20_N0 USB20_P0

R868 0_0402_5%@R868 0_0402_5%@ R869 0_0402_5%@R869 0_0402_5%@

8/27 change to stuff

WCM-2012-900T_4P

4

1

L66

R615 100K_0402_5%R615 100K_0402_5%

1 2

LID_SW#

B

3

2

+5VALW +3VALW

LID_SW#<32,56>

PWR_LED#<32,36,56> CHARGE_LED1#<32,56> CHARGE_LED0#<32,56>

HDD_LED#<14,56>

KILL_SW#<14,56>

Title

Size Document Number Rev

Date: Sheet

JUSB3

1

2

3

4

5

G5

6

G6

ACES_85205-04001

ME@

USB20_N0_C USB20_P0_C

2

3

D25

@

PJDLC05_SOT23-3

1

JP13

1

2

3

4

5

6

7

8

9

10

11

12

13

GND1

14

GND2

ACES_88514-01201-071

ME@

48 51Thursday, May 05, 2011

1

USB20_N0_C

USB20_P0_C

RF_LED#_R

USB20_N0_C USB20_P0_C

12 12

3

2

+5VS

7/22 modify

Compal Electronics, Inc.

KB /SW /LPC Debug Conn.

LA-675AP

1.0

of

5

4

3

2

1

Modification list PURPOSEPHASE PAGE

P31 Change CRT Symbol0.2 For CRT footprint issue

0.2 P31 Del C510 For Non-used part

0.2 P39 change C610 pin 1 net name

0.2 P35 U25 change to U26

0.2 P40 Add R740, C93

0.2 P18

D D

0.2 P16 Add R742, R743 For PCH power sequence

Change R215 pin1 net name Change R215 pin1 net name to correct

0.2 P38 Del U28, R542~R551 , J12

0.2 P40 Add EC pin 97,98,103

0.2 P39 Change J10 footprint and Add J13

0.2 P39

0.2 Add R161,

0.2 Add R615 in 15" and 17" page

P58/59

0.2

Change PC_Beep circuit Change PC_Beep circuit

P6 Follow ORB circuit

Add Q83 pin 1 power net name +CMOS_PW

0.2 P56/57/58 Change JP21 to JKB1 Change connector to standard name

0.2

P56/57/58 Change JP4 to JTP1 Change connector to standard name

P43/60

0.2

0.2 P34

0.2 P42

Change JP6 to JPWRB1 Change JP1 to JWLN1 Change JP5 to JBT1

0.2 P43/60 Change JP7 to JCR1

C C

0.2

0.2 P42

0.2

0.2 P42

P19 Add R542

Add R866, R886 , C735 P31 Add R543 For reserve EC control directly P39

Change J10 footprint, Del C635, C636

Add R877

SW3 BOM structure change to @

0.2 P42 Change ESATA from port 5 to port 4 For intel risk

0.2

0.2 P12/13

0.2

0.2 P20

0.2

B B

0.2

P15 Add R544,R545

Del R74~R80,R82 R88~R94,R96 P16 Add R182,R546

Del Add J12, R257 change to @ P6 R161 change to 100K Follow CRB P19 Add R547 , R250 change to @ Follow Module and CRB P18 WLAN USB port for port8 to port9 For debug port P39 Del J13 For layout space

P20,39,42 Add C395 , R581 , R583 , R584 , R586 , R587 For customer request reserved

P20 Add C129, C396 , Del R264 For reserved P40 Add PIN 66 , R740,C93 change to @ Add IMVP_IMON0.2 P9 Add R74 For VCCIO_SENSE / VSSIO_SENSE differential routing0.2 P30 Del R419~425, R427~R429 Del 0 ohm for UMA only 0.2 P31 Del R439 , R440, R441 Del 0 ohm for UMA only 0.2 P32 Del RQ51 ~ Q54 Add Q95 For DIS HDMI0.2

0.2

P38 Del J10, C637,C640,R576,R577,R579 change to @ , L40~L43 change to R720~R723 For Vendor suggestion and EMI

Del C643, R578 , MIC_INR connect MIC_INL , Add R578 P20 Add L75 , R264 , C917, R259 C226 change to @ For intel PDDG update0.2 P43 C714 change to OSCON CAP C714 change to OSCON CAP0.2 P9 Add C394, C397 ,C398 , C399 ,Add R75 For CPU_CORE power reserved at Bottom side, Add R75 for reserved at cpu side and pwr side0.2 P42 Change C706 P/N to SF000001500 Change to H=6 OSCAN0.2

A A

P10 Change C128 to @ For Reserved0.2 P56 Update JODD1 symbol For ME update drawing0.2

change C610 pin 1 net name to correct For co-lay 10/100 and GIGA For EC request

Del USB charger circuit Add EC pin 97 for SYS_PWROK_EC , pin 98 for CE_EN , pin 103 for BATT_SEL_EC Change J10 footprint by DFx request and Add J13 by vendor suggestion

Pull high LID_SW# at M/B side For power trace netP31

Change connector to standard name Change connector to standard name Change connector to standard name Change connector to standard name For ESATA detect function For ESATA detect function

Change J10 for DFx and Del component for layout For reserve EC control directly For ME ASSY concern

For Pull high SMBus For DDR3 DM Bus to GND Add 186 for reserve sequence, Add R546 for follow CRB & ORB For voltage drop

Del C653, R578 connect MIC_INR/L for vendor suggestion , Add R578 for EMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR

LA-675AP

49 51Thursday, May 05, 2011

1

1.0

of

5

4

3

2

1

Modification list PURPOSEPHASE PAGE

P16 D29 change to @ For AC detect issue0.2 P24 R548,R549 change to DIS@ For AC detect issue0.2 P10 C128 change to stuff For test on DVT0.2 P44 Del Q118, R657 For not need0.2

D D

C C

0.2 Change C509,C511,C635 to stuff For EMI

0.2 Change 14" C714 P/N to SGA00002N80 For Sourcer requestP56

0.2 Change R720,R721,R722,R723 P/N to SM01000BZ00(Bead), and

0.2 For BIOS ESATA detect functionChange R303 to Stuff, and change R542 to @P19

0.2 For common part Change U32 P/N to SA000031C00P56

0.2 For correct part Change T1,T2 P/N to SP050006E00P36

0.2 For S3 power reduction R688 change to stuff , R687 ,Q7 change to @P10

0.2 For EMIChange R660,R661,R862,R863,R864,R865,R868,R869 to @ , change

0.2 P20 Change L75 symbol For common part

B B

0.2 P30 Change R402 to @

Change R513, R516 ,R667 P/N and from 0805 to 0603 For common part0.2

Change C633, C634 , C642 For common part0.2

Change D3, D29 P/N and symbol For common part0.2

Change U3,U11,U13,U14,U38,U39 P/N and symbol For common part0.2

Change Q8,Q65,Q80,Q83,Q99,Q104 P/N and symbol For common part0.2

Change Q1,Q37,Q93 P/N and symbol For common part0.2

Change Q94, Q95 P/N and symbol For common part0.2

Change Q3,Q4,Q7,Q9,Q66,Q67,Q68,Q73,Q74,Q75,Q76,Q77,Q78, For common part0.2

Q79,Q82,Q85,Q86,Q87,Q102,Q106,Q107,Q108,Q109,Q110,Q111,Q112,Q113,Q114,Q115,Q116

P/N and symbol

Change C635 part and change to @ For EMI0.2 P18

Reserved R297 Reserved0.2 P9

Change C53,C85,C86,C87 ,C397,C398,C399 to stuff and

change ,C48,C80,C81,C82, C90,C91 to @ Del C89

For CPU_CORE0.2

P10 Change C110,C111,C112,C113 to stuff0.2 For VGFX_CORE

Change LED1/LED3/LED4 P/N to SC50000A3000.2 Change P/N

P56

Change T1,T2 P/N to SP050003N00 For test pass part0.2

P36 P40

Change R611,R740,C93 to stuff and change Y5,C347,C367 to @0.2 For SUS_CLK

Change R695 to 18K, Q37 change to @, R747 change to stuff, R695 for Board ID, Q37, R747 for VR_HOT P400.2 Change U33 P/N to SA00003FL10 For BIOS ROM

P39

Change C647,C649,C650,C651 to Stuff

For EMI request

L63,L64,L65,L66 to stuff , change R619 to Bead (SM01000DI00)

For DPST P10 Update Q5 symbol For update symbol0.3 P33 Add F2 For safty request 0.3 P39 Update U30 P/N to SA00003K410 and Add R879 For Audio update to 21Z0.3 P10 Change C128 to D2 size and @ Change size for M/E issue0.3 P14 Add reserve R878 For Intel DG 1.50.3 P37 C592 change P/N to SF000001500 (H=6) For ME Z high ok0.3 P29 R369 P/N change to SD034100A80 For GP part0.3 P6 Reserved R880 to SYS_PWROK Follow ORB0.3 P10 R62,R63 change to 1K Follow CRB0.3 P33 R483,R484 change connect to +5V_HDMI_F For Add F20.3 P37 Change U27 P/N to SA000046C00 For Fintek0.3 P40 Change R594 pull high to +5VALW For leakage issue0.3

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HW-PIR

LA-675AP

50 51Thursday, May 05, 2011

1

1.0

of

5

4

3

2

1

Modification list PURPOSEPHASE PAGE

P19 R881 change to Dtuff, R244 change to @ For intel MRC Rev0.90.3 P14 R878 change to stuff For intel DG 1.50.3 P31 Del R432 For non-used part0.3 P36 Reserved D31 , C643 , C644 For reserved EMI parts0.3 P37 Del R5810.3 For non-used part

D D

P38 Del R5500.3 P38 Change C592 P/N to SF000002Y000.3 P39 Del R584, R586 , R5870.3 P40 Change R600, R604 to 2.2K Change R695 to 8.2k0.3 P42 Del R5830.3 P31 Del R449, R452, R458, R460 (UMA change only)0.3 P32 Del R478, R480, R486 (UMA change only)0.3 P6 Reserved R882 connect to PCH_PWROK Reserved for intel0.3 P56 R765 change to 300 ohm0.3 For LED

C C

For non-used part For M/E Z high limlt For non-used part Change R600, R604 for Battery SMBus, R695 for Board ID For non-used part For non-used part For non-used part

B B

A A

Security Classification

2010/07/12 2012/07/11

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/12 2012/07/11

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR

LA-675AP

51 51Thursday, May 05, 2011

1

1.0

of