COMPAL LA-6601P Schematics

A

B

C

D

E

MODEL NAME :

PCB NO :

BOM P/N :

1 1

LA-6601P (DAA00002000)

TBD

PAR00

Compal Confidential

2 2

Voyager

Schematic Document

Rev: 1.0(A00)

2010-11-30

3 3

@ : Nopop Component

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

LA-6601P

1 63Tuesday, November 30, 2010

E

1.0

A

Compal Confidential

Project Code : PAR00 File Name : LA-6601P

1 1

2 2

3 3

4 4

LVDS Panel Conn

P.26 P.26 P.25

eDP Panel Conn

P.24

mini DP Conn

P.29

HDMI 1.4

P.28 P.28P.28

Conn

SIM Card

P.38

Wireless Display DMC (Full)

Port 2

Port 4

Card Reader

Card Reader/B

RTC CKT.

Power On/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

P.48~P57

LVDS MUX

DP

Rediver

CRT Conn

HDMI Rediver

8 in 1 Socket

P.15

P.46

P.47

A

LVDS MUX

DisplayPort

DP MUXDP MUX

P.24 P.23

DP MUX

P.29

CRT MUX

P.27 P.27

HDMI MUX

P.38

USB 3.0/2.0 Host Ctrl.

USB 3.0 /2.0 Combo Conns x 2

LVDS

P.29

P.30

Port 6

P.39

B

eDP

DP (DIS)

LVDS (DIS)

LVDS

DP (DIS)

DP

CRT (DIS)

CRT

HDMI (DIS) HDMI

Port 1

LAN(GbE)

AR8151

RJ45

B

LVDS MUX

LVDS

LVDS to DP SW

STDP4028

P.33

ENE 3810

HDMI to LVDS SW

P.25

P.32

DisplayPort

LVDS

DisplayPort

CRT

HDMI

Port 3

Mini Card-1 WLAN (Half)

P.38

USB Port 4

P.44

Touch Pad

C

HDMI 1.3 input Conn

STDP6038

P.31

Sandy Bridge

PEG x16 (DIS)

MXM III Conn.

P.14

LVDS

DisplayPortMini Card -2

CRT

HDMI

PCIE BUS

SPI

SPI ROM

P.15

ENE KB930

PS2 SPI

Int.KBD

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

2C 35W 4C 45W

rPGA 988 Socket

(UMA)

100MHz

2.7GT/s

Cougar Point

BGA 989 Balls

BIOS ROM

Intel

Processor

Intel

PCH

LPC Bus

Media / Mode Buttons

P.44P.42 P.42P.46

P.4~9

DMI x4 gen 2FDI x8

100MHz 5GB/s

P15~22

P.44

D

Free Fall Sensor

(DDRIII) Memory Bus

Dual Channel

1.5V DDRIII 1066/1333 MHz

SATA3.0

SATA2.0

USB2.0

HD Audio

D

E

P.36 P.45 P.5

Fan Control

CPU XDP Conn.

204pin DDRIII SO-DIMM x4

BANK 0, 1, 2, 3 P.10~13

SATA Port 0

SATA HDD-1 Conn.

P.36

SATA

SATA Port 1

SATA Port 2

SATA Port 4

USB Port 9

USB Port 7

USB Port 0

USB Port 1

USB Port 2 USB Port 3

USB Port 6

USB Port 8

Rediver

P.36

SATA ODD Conn.

ESATA Redriver

3D IR

USB 2.0 Conn x 2 dual-stack

Digital Camera ( LVDS port3/eDP port2 )

AlienFX/ELC

BT 2.1 /BT 3.0

SATA HDD-2 Conn.

P.37

USB / eSATA Conn.

USB Charger

P.46

P.40

P.41

P.38

P.26,24

Array Mics x2

Audio Codec

IDT 92HD73

P.34

S/PIDF Jack x1

MIC Jack x1

Amplifier x2 HeadPhone Jack x2 MAX9724

Amplifier x1 MAX9736

P.34

Int. Speaker

P.35

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

LA-6601P

E

5W x2

2 63Tuesday, November 30, 2010

P.35

P.36

P.37

P.34

P.35

P.34

1.0

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7

100K +/- 5%Ra

Rb V min

0 0 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

NC

AD_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

V typ

AD_BID

0 V 0.155 V

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

V

AD_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

max

EC AD3

0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

A

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

0.4

1.0

USB PORT#

0

1

2

3

4

DESTINATION

JUSB1

JUSB2

eDP CAMERA

LVDS CAMERA

JMINI1 (WLAN)

SMBUS Control Table

SOURCE

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

PCH_SMBCLK PCH_SMBDATA PCH

MEM_SMBCLK MEM_SMBDATA

KB930

PCH

MIINI1 BATT SODIMM

X X

V V

MINI2

V

X X

X

X X

EXPRESS CARD

X

X X X

V

X X

X

V

MXM

V

X

CLKOUT

PCI0

PCI1

PCI2

PCI3

PCI4

USB

DESTINATION

PCH_LOOPBACK

EC

None

5

6

7

8

9 JESATA

10

11

12

13

1 1

DESTINATION

HDD1

HDD2

ODD

NA

ESATA

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

CLK

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

DESTINATIONDIFFERENTIAL

None

10/100/1G LAN

MINI CARD-2 DMC

MINI CARD-1 WLAN

CARD READER

FLEX CLOCKS DESTINATION

CLKOUTFLEX0

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

None

CLK_14M

None

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

JMINI2 (DMC)

AlienFX/ELC

IR SENSOR

Bluetooth

None

DESTINATION

10/100/1G LAN

MINI CARD-2 DMC

MINI CARD-1 WLAN

CARD READER

None

CLKOUT_PCIE5

CLKOUT_PCIE6

CLKOUT_PCIE7

CLKOUT_PEG_A

None

USB 3.0

None

MXM

Symbol Note :

: means Digital Ground

: means Analog Ground

SATA5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

None

Lane 6

Lane 7

Lane 8

USB 3.0

None

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-6601P

1.0

3 63Tuesday, November 30, 2010

1.0

5

JCPU1A

DMI_CRX_PTX_N017 DMI_CRX_PTX_N117 DMI_CRX_PTX_N217

D D

C C

B B

DMI_CRX_PTX_N317

DMI_CRX_PTX_P017 DMI_CRX_PTX_P117 DMI_CRX_PTX_P217 DMI_CRX_PTX_P317

DMI_CTX_PRX_N017 DMI_CTX_PRX_N117 DMI_CTX_PRX_N217 DMI_CTX_PRX_N317

DMI_CTX_PRX_P017 DMI_CTX_PRX_P117 DMI_CTX_PRX_P217 DMI_CTX_PRX_P317

FDI_CTX_PRX_N017 FDI_CTX_PRX_N117 FDI_CTX_PRX_N217 FDI_CTX_PRX_N317 FDI_CTX_PRX_N417 FDI_CTX_PRX_N517 FDI_CTX_PRX_N617 FDI_CTX_PRX_N717

FDI_CTX_PRX_P017 FDI_CTX_PRX_P117 FDI_CTX_PRX_P217 FDI_CTX_PRX_P317 FDI_CTX_PRX_P417 FDI_CTX_PRX_P517 FDI_CTX_PRX_P617 FDI_CTX_PRX_P717

FDI_FSYNC017 FDI_FSYNC117

FDI_INT17

FDI_LSYNC017 FDI_LSYNC117

EDP_AUXP23 EDP_AUXN23

EDP_TX0P23 EDP_TX1P23 EDP_TX2P23 EDP_TX3P23

EDP_TX0N23 EDP_TX1N23 EDP_TX2N23 EDP_TX3N23

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

EDP_COM

EDP_HPD#_Q

EDP_AUXP EDP_AUXN

EDP_TX0P EDP_TX1P EDP_TX2P EDP_TX3P

EDP_TX0N EDP_TX1N EDP_TX2N EDP_TX3N

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev1p0

CONN@

4

PEG_COMP

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

J22 J21 H22

PEG_GTX_C_HRX_N0

K33

PEG_GTX_C_HRX_N1

M35

PEG_GTX_C_HRX_N2

L34

PEG_GTX_C_HRX_N3

J35

PEG_GTX_C_HRX_N4

J32

PEG_GTX_C_HRX_N5

H34

PEG_GTX_C_HRX_N6

H31

PEG_GTX_C_HRX_N7

G33

PEG_GTX_C_HRX_N8

G30

PEG_GTX_C_HRX_N9

F35

PEG_GTX_C_HRX_N10

E34

PEG_GTX_C_HRX_N11

E32

PEG_GTX_C_HRX_N12

D33

PEG_GTX_C_HRX_N13

D31

PEG_GTX_C_HRX_N14

B33

PEG_GTX_C_HRX_N15

C32

PEG_GTX_C_HRX_P0

J33

PEG_GTX_C_HRX_P1

L35

PEG_GTX_C_HRX_P2

K34

PEG_GTX_C_HRX_P3

H35

PEG_GTX_C_HRX_P4

H32

PEG_GTX_C_HRX_P5

G34

PEG_GTX_C_HRX_P6

G31

PEG_GTX_C_HRX_P7

F33

PEG_GTX_C_HRX_P8

F30

PEG_GTX_C_HRX_P9

E35

PEG_GTX_C_HRX_P10

E33

PEG_GTX_C_HRX_P11

F32

PEG_GTX_C_HRX_P12

D34

PEG_GTX_C_HRX_P13

E31

PEG_GTX_C_HRX_P14

C33

PEG_GTX_C_HRX_P15

B32

PEG_HTX_GRX_N0

M29

PEG_HTX_GRX_N1

M32

PEG_HTX_GRX_N2

M31

PEG_HTX_GRX_N3

L32

PEG_HTX_GRX_N4

L29

PEG_HTX_GRX_N5

K31

PEG_HTX_GRX_N6

K28

PEG_HTX_GRX_N7

J30

PEG_HTX_GRX_N8

J28

PEG_HTX_GRX_N9

H29

PEG_HTX_GRX_N10

G27

PEG_HTX_GRX_N11

E29

PEG_HTX_GRX_N12

F27

PEG_HTX_GRX_N13

D28

PEG_HTX_GRX_N14

F26

PEG_HTX_GRX_N15

E25

PEG_HTX_GRX_P0

M28

PEG_HTX_GRX_P1

M33

PEG_HTX_GRX_P2

M30

PEG_HTX_GRX_P3

L31

PEG_HTX_GRX_P4

L28

PEG_HTX_GRX_P5

K30

PEG_HTX_GRX_P6

K27

PEG_HTX_GRX_P7

J29

PEG_HTX_GRX_P8

J27

PEG_HTX_GRX_P9

H28

PEG_HTX_GRX_P10

G28

PEG_HTX_GRX_P11

E28

PEG_HTX_GRX_P12

F28

PEG_HTX_GRX_P13

D27

PEG_HTX_GRX_P14

E26

PEG_HTX_GRX_P15

D25

Near MXM Connector

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

DMI

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

Intel(R) FDI

PEG_TX#[10] PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

eDP

3

CC1 0.22U_0402_16V 7K~DCC1 0.22U_0402_16V7K~D

1 2

CC2 0.22U_0402_16V 7K~DCC2 0.22U_0402_16V7K~D

1 2

CC3 0.22U_0402_16V 7K~DCC3 0.22U_0402_16V7K~D

1 2

CC4 0.22U_0402_16V 7K~DCC4 0.22U_0402_16V7K~D

1 2

CC5 0.22U_0402_16V 7K~DCC5 0.22U_0402_16V7K~D

1 2

CC13 0.22U_0402_16V7K~DCC13 0.22U_0402_16V7K~D

1 2

CC6 0.22U_0402_16V 7K~DCC6 0.22U_0402_16V7K~D

1 2

CC7 0.22U_0402_16V 7K~DCC7 0.22U_0402_16V7K~D

1 2

CC8 0.22U_0402_16V 7K~DCC8 0.22U_0402_16V7K~D

1 2

CC9 0.22U_0402_16V 7K~DCC9 0.22U_0402_16V7K~D

1 2

CC10 0.22U_0402_16V7K~DCC10 0.22U_0402_16V7K~D

1 2

CC11 0.22U_0402_16V7K~DCC11 0.22U_0402_16V7K~D

1 2

CC12 0.22U_0402_16V7K~DCC12 0.22U_0402_16V7K~D

1 2

CC14 0.22U_0402_16V7K~DCC14 0.22U_0402_16V7K~D

1 2

CC15 0.22U_0402_16V7K~DCC15 0.22U_0402_16V7K~D

1 2

CC16 0.22U_0402_16V7K~DCC16 0.22U_0402_16V7K~D

1 2

CC17 0.22U_0402_16V7K~DCC17 0.22U_0402_16V7K~D

1 2

CC18 0.22U_0402_16V7K~DCC18 0.22U_0402_16V7K~D

1 2

CC19 0.22U_0402_16V7K~DCC19 0.22U_0402_16V7K~D

1 2

CC20 0.22U_0402_16V7K~DCC20 0.22U_0402_16V7K~D

1 2

CC21 0.22U_0402_16V7K~DCC21 0.22U_0402_16V7K~D

1 2

CC22 0.22U_0402_16V7K~DCC22 0.22U_0402_16V7K~D

1 2

CC23 0.22U_0402_16V7K~DCC23 0.22U_0402_16V7K~D

1 2

CC24 0.22U_0402_16V7K~DCC24 0.22U_0402_16V7K~D

1 2

CC25 0.22U_0402_16V7K~DCC25 0.22U_0402_16V7K~D

1 2

CC26 0.22U_0402_16V7K~DCC26 0.22U_0402_16V7K~D

1 2

CC27 0.22U_0402_16V7K~DCC27 0.22U_0402_16V7K~D

1 2

CC28 0.22U_0402_16V7K~DCC28 0.22U_0402_16V7K~D

1 2

CC29 0.22U_0402_16V7K~DCC29 0.22U_0402_16V7K~D

1 2

CC30 0.22U_0402_16V7K~DCC30 0.22U_0402_16V7K~D

1 2

CC31 0.22U_0402_16V7K~DCC31 0.22U_0402_16V7K~D

1 2

CC32 0.22U_0402_16V7K~DCC32 0.22U_0402_16V7K~D

1 2

CC33 0.22U_0402_16V7K~DCC33 0.22U_0402_16V7K~D

1 2

CC34 0.22U_0402_16V7K~DCC34 0.22U_0402_16V7K~D

1 2

CC35 0.22U_0402_16V7K~DCC35 0.22U_0402_16V7K~D

1 2

CC36 0.22U_0402_16V7K~DCC36 0.22U_0402_16V7K~D

1 2

CC37 0.22U_0402_16V7K~DCC37 0.22U_0402_16V7K~D

1 2

CC38 0.22U_0402_16V7K~DCC38 0.22U_0402_16V7K~D

1 2

CC39 0.22U_0402_16V7K~DCC39 0.22U_0402_16V7K~D

1 2

CC40 0.22U_0402_16V7K~DCC40 0.22U_0402_16V7K~D

1 2

CC41 0.22U_0402_16V7K~DCC41 0.22U_0402_16V7K~D

1 2

CC42 0.22U_0402_16V7K~DCC42 0.22U_0402_16V7K~D

1 2

CC43 0.22U_0402_16V7K~DCC43 0.22U_0402_16V7K~D

1 2

CC44 0.22U_0402_16V7K~DCC44 0.22U_0402_16V7K~D

1 2

CC45 0.22U_0402_16V7K~DCC45 0.22U_0402_16V7K~D

1 2

CC46 0.22U_0402_16V7K~DCC46 0.22U_0402_16V7K~D

1 2

CC47 0.22U_0402_16V7K~DCC47 0.22U_0402_16V7K~D

1 2

CC48 0.22U_0402_16V7K~DCC48 0.22U_0402_16V7K~D

1 2

CC49 0.22U_0402_16V7K~DCC49 0.22U_0402_16V7K~D

1 2

CC50 0.22U_0402_16V7K~DCC50 0.22U_0402_16V7K~D

1 2

CC51 0.22U_0402_16V7K~DCC51 0.22U_0402_16V7K~D

1 2

CC52 0.22U_0402_16V7K~DCC52 0.22U_0402_16V7K~D

1 2

CC53 0.22U_0402_16V7K~DCC53 0.22U_0402_16V7K~D

1 2

CC54 0.22U_0402_16V7K~DCC54 0.22U_0402_16V7K~D

1 2

CC55 0.22U_0402_16V7K~DCC55 0.22U_0402_16V7K~D

1 2

CC56 0.22U_0402_16V7K~DCC56 0.22U_0402_16V7K~D

1 2

CC57 0.22U_0402_16V7K~DCC57 0.22U_0402_16V7K~D

1 2

CC58 0.22U_0402_16V7K~DCC58 0.22U_0402_16V7K~D

1 2

CC59 0.22U_0402_16V7K~DCC59 0.22U_0402_16V7K~D

1 2

CC60 0.22U_0402_16V7K~DCC60 0.22U_0402_16V7K~D

1 2

CC61 0.22U_0402_16V7K~DCC61 0.22U_0402_16V7K~D

1 2

CC62 0.22U_0402_16V7K~DCC62 0.22U_0402_16V7K~D

1 2

CC63 0.22U_0402_16V7K~DCC63 0.22U_0402_16V7K~D

1 2

CC64 0.22U_0402_16V7K~DCC64 0.22U_0402_16V7K~D

1 2

PEG_GTX_HRX_P[0..15] 14 PEG_GTX_HRX_N[0..15] 14

PEG_HTX_C_GRX_P[0..15] 14 PEG_HTX_C_GRX_N[0..15] 14

PEG_GTX_HRX_N0 PEG_GTX_HRX_N1 PEG_GTX_HRX_N2 PEG_GTX_HRX_N3 PEG_GTX_HRX_N4 PEG_GTX_HRX_N5 PEG_GTX_HRX_N6 PEG_GTX_HRX_N7 PEG_GTX_HRX_N8 PEG_GTX_HRX_N9 PEG_GTX_HRX_N10 PEG_GTX_HRX_N11 PEG_GTX_HRX_N12 PEG_GTX_HRX_N13 PEG_GTX_HRX_N14 PEG_GTX_HRX_N15

PEG_GTX_HRX_P0 PEG_GTX_HRX_P1 PEG_GTX_HRX_P2 PEG_GTX_HRX_P3 PEG_GTX_HRX_P4 PEG_GTX_HRX_P5 PEG_GTX_HRX_P6 PEG_GTX_HRX_P7 PEG_GTX_HRX_P8 PEG_GTX_HRX_P9 PEG_GTX_HRX_P10 PEG_GTX_HRX_P11 PEG_GTX_HRX_P12 PEG_GTX_HRX_P13 PEG_GTX_HRX_P14 PEG_GTX_HRX_P15

PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_N15

PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_P1

PEG_HTX_C_GRX_P2

PEG_HTX_C_GRX_P3

PEG_HTX_C_GRX_P4

PEG_HTX_C_GRX_P5

PEG_HTX_C_GRX_P6

PEG_HTX_C_GRX_P7

PEG_HTX_C_GRX_P8

PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_P15

2

JCPU1I

M34

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186 VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

1

HPD Inversion for eDP

+VCCP

12

R1472

R1472 1K_0402_5%~D

1K_0402_5%~D

EDP_HPD#_Q

13

D

2

G

D

Q9

Q9 BSS138_SOT23~D

BSS138_SOT23~D

S

EDP_HPD#23

A A

EDP_HPD#

Note: Place pull up resistor within 2 inches of CPU

5

4

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

+VCCP

1 2

RC35 24.9_0402_1%~DRC35 24.9_0402_1%~D

1 2

RC36 24.9_0402_1%~DRC36 24.9_0402_1%~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

PEG_COMP

EDP_COM

2

Sandy Bridge_rPGA_Rev1p0

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/6) DMI,FDI,PEG

LA-6601P

4 63Tuesday, November 30, 2010

1

1.0

+VCCP

0.1U_0402_16V4Z~D

1

@

CC67

2

Place near JXDP1

D D

C C

B B

The resistor for HOOK2 should be placed such that the stub is very small on CFG0 net

H_PROCHOT#44,49

H_THRMTRIP#19

5

+3VALW

@

CC66

1 2

RC27 1K_0402_5%~D@RC27 1K_0402_5%~D@

CFG107

0_0402_5%~D@

CFG117

PBTN_OUT#17,44

CFG07 VGATE56

PCH_SMBDATA10,11,12,13,16,37,38 PCH_SMBCLK10,11,12,13,16,37,38

PCH_JTAG_TCK15

H_SNB_IVB#19

RC41 56_0402_5%

H_CPUPWRGD

0_0402_5%~D@

CFG0

1K_0402_5%~D

T1PAD~D @T1PAD~D @

H_PECI19,44

1 2

SYS_PWROK_XDP

12 12

RC22

@RC22

@

1K_0402_5%~D

1 2 1 2

RC23

RC23 RC24

RC24

1 2 1 2

RC26 0_0402_5%~D@R C26 0_0402_5%~D@

1 2

RC30

@RC30

@

0_0402_5%~D

H_SNB_IVB#

H_CATERR#

H_PECI

H_PROCHOT#_R

H_THERMTRIP#

XDP_PREQ# XDP_PRDY#

XDP_BPM#0 XDP_BPM#1

XDP_BPM#2 XDP_BPM#3

CFG10_R

RC130_0402_5%~D@ RC130_0402_5%~D@ RC15

RC15

CFG11_R

XDP_BPM#4 XDP_BPM#5

XDP_BPM#6 XDP_BPM#7

H_CPUPWRGD_XDP CFD_PWRBTN#_X DP

XDP_HOOK2 SYS_PWROK_XDP

XDP_TCK1 XDP_TCK_R

C26

AN34

AL33

AN33

AL32

AN32

+VCCP +VCCP

JCPU1B

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

4

JXDP1

@JXDP1

@

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

MISCTHERMALPWR MANAGEMENT

ITPCLK/HOOK4

ITPCLK#/HOOK5

RESET#/HOOK6

CLOCKS

DDR3

MISC

DDR3

MISC

GND1 OBSFN_C0 OBSFN_C1

GND3

OBSDATA_C0 OBSDATA_C1

GND5

OBSDATA_C2 OBSDATA_C3

GND7 OBSFN_D0 OBSFN_D1

GND9

OBSDATA_D0 OBSDATA_D1

GND11 OBSDATA_D2 OBSDATA_D3

GND13

VCC_OBS_CD

DBR#/HOOK7

GND15

TD0

TRST#

TDI

TMS

GND17

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

BCLK

BCLK#

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60

A28 A27

A16 A15

R8

AK1 A5 A4

CLK_CPU_DMI_R

CFG16_R

RC3 0_0402_5%~D@RC3 0_0402_5%~D@

CFG17_R

RC5 0_0402_5%~D@RC5 0_0402_5%~D@

CFG0_R

RC7 0_0402_5%~D@RC7 0_0402_5%~D@

CFG1_R

RC9 0_0402_5%~D@RC9 0_0402_5%~D@

CFG2_R

RC10 0_0402_5%~D@RC10 0_0402_5%~D@

CFG3_R

RC12 0_0402_5%~D@RC12 0_0402_5%~D@

CFG8_R

RC14 0_0402_5%~D@RC14 0_0402_5%~D@

CFG9_R

RC16 0_0402_5%~D@RC16 0_0402_5%~D@

CFG4_R

RC17 0_0402_5%~D@RC17 0_0402_5%~D@

CFG5_R

RC18 0_0402_5%~D@RC18 0_0402_5%~D@

CFG6_R

RC20 0_0402_5%~D@RC20 0_0402_5%~D@

CFG7_R

RC21 0_0402_5%~D@RC21 0_0402_5%~D@

CLK_CPU_ITP CLK_CPU_ITP#

XDP_RST#_R XDP_DBRESET#

XDP_TDO XDP_TRST#_R XDP_TDI XDP_TMS_R

CLK_CPU_DMI#_R

CLK_CPU_DPLL_R CLK_CPU_DPLL#_R

H_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

RC28 0_0402_5%~D@RC28 0_0402_5%~D@

RC31 0_0402_5%~D@RC31 0_0402_5%~D@ RC29 0_0402_5%~D@RC29 0_0402_5%~D@

3

1 2 1 2

RC25

1K_0402_5%~D

PLT_RST#

@RC25

@

12

1 2

1 2 1 2

RC37 33_0402_5%~DRC37 33_0402_5%~D

1 2

RC38 33_0402_5%~DRC38 33_0402_5%~D

1 2

RC39 0_0402_5%~DRC39 0_0402_5%~D

1 2

RC40 0_0402_5%~DRC40 0_0402_5%~D

1 2

H_DRAMRST# 6

PCH_PWROK17,44

SYSTEM_PWROK17,44

CFG16 7 CFG17 7

CFG0 7 CFG1 7

CFG2 7 CFG3 7

CFG8 7 CFG9 7

CFG4 7 CFG5 7

CFG6 7 CFG7 7

CLK_CPU_ITP 16 CLK_CPU_ITP# 16

PCH_JTAG_TDO 15

PCH_JTAG_TDI 15 PCH_JTAG_TMS 15

CLK_CPU_DMI 16 CLK_CPU_DMI# 16

CLK_CPU_DPLL 16 CLK_CPU_DPLL# 16

RC113 0_0402_5%~DRC113 0_0402_5%~D

1 2

RC74 0_0402_5%~D@RC74 0_0402_5%~D@

1 2

RC4

200_0402_1%

PM_DRAM_PWR GD17

XDP_DBRESET#

H_CPUPWRGD_R

2

+3VALW

0.1U_0402_16V4Z~D

+3VS+3V_PCH

12

PLT_RST#18,33,35,38,39,44

12

RC6

@RC6

@

10K_0402_5%~D

1

2

UC5

MC74VHC1G09DFT2G_SC70-5

1 2

UC5

RUN_ON_CPU1.5VS3#9,47

+3VS

5

1

NC

2

A

3

RC421K_0402_5%~D RC421K_0402_5%~D

RC4410K_0402_5%~D RC4410K_0402_5%~D

P

G

0.1U_0402_16V4Z~D

1

CC65

2

5

B

4

Y

VCC

A

G

3

1 2

13

D

2

G

S

+VCCP

CC68

1 2

0.1U_0402_16V4Z~D

BUFO_CPU_RST# BUF_CPU_RST#

4

Y

UC2

SN74LVC1G07DCKR_SC70-5~D

+3VS

H_PROCHOT#

12

Processor Pullups

1

+1.5V_CPU_VDDQ

12

RC8

RC8 200_0402_1%

200_0402_1%

VDDPWRGOOD

RC19

RC19 39_0402_1%

39_0402_1%

RC12 CRB 1.1K CHECK LIST 0.7 --> 4.75K INTEL recommand 1.1K

QC1

QC1 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

PDG 0.71 rev -->200

RC32

RC32 75_0402_5%

75_0402_5%

1 2

RC33 43_0402_1%RC33 43_0402_1%

1 2

+VCCP

RC4362_0402_5% RC4362_0402_5%

PU/PD for JTAG signals

RC121 0_0402_5%~D@RC121 0_0402_5%~D@

AP29

PRDY#

PREQ#

H_PM_SYNC17

H_CPUPWRGD19

VDDPWRGOOD

A A

1 2

RC49 0_0402_5%~DRC49 0_0402_5%~D

1 2

RC53 0_0402_5%~DRC53 0_0402_5%~D

1 2

RC57 130_0402_1%~DRC57 130_0402_1%~D

H_PM_SYNC_R

H_CPUPWRGD_R

VDDPWRGOOD_R

BUF_CPU_RST#

AM34

AP33

V8

AR33

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWR OK

RESET#

TRST#

DBR#

BPM#[0]

JTAG & BPM

BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDO

TDI

XDP_PREQ#_R

AP27

XDP_TCK

AR26

XDP_TMS

AR27

XDP_TRST#

AP30

XDP_TDI_R

AR28

XDP_TDO_R

AP26

XDP_DBRESET#_R

AL35

XDP_BPM#0_R

AT28

XDP_BPM#1_R

AR29

XDP_BPM#2_R

AR30

XDP_BPM#3_R

AT30

XDP_BPM#4_R

AP32

XDP_BPM#5_R

AR31

XDP_BPM#6_R

AT31

XDP_BPM#7_R

AR32

1 2

RC125 0_0402_5%~D@RC125 0_0402_5%~D@

1 2

RC126 0_0402_5%~D@RC126 0_0402_5%~D@

1 2

RC127 0_0402_5%~D@RC127 0_0402_5%~D@

1 2

RC128 0_0402_5%~D@RC128 0_0402_5%~D@

1 2

RC50 0_0402_5%~D@RC50 0_0402_5%~D@

1 2

RC51 0_0402_5%~D@RC51 0_0402_5%~D@

1 2

RC56 0_0402_5%~DRC56 0_0402_5%~D

1 2

RC59 0_0402_5%~D@RC59 0_0402_5%~D@

1 2

RC61 0_0402_5%~D@RC61 0_0402_5%~D@

1 2

RC62 0_0402_5%~D@RC62 0_0402_5%~D@

1 2

RC63 0_0402_5%~D@RC63 0_0402_5%~D@

1 2

RC64 0_0402_5%~D@RC64 0_0402_5%~D@

1 2

RC65 0_0402_5%~D@RC65 0_0402_5%~D@

1 2

RC66 0_0402_5%~D@RC66 0_0402_5%~D@

1 2

RC67 0_0402_5%~D@RC67 0_0402_5%~D@

1 2

XDP_PRDY#XDP_PRDY#_R XDP_PREQ#

XDP_TCK_R XDP_TMS_R XDP_TRST#_R

XDP_TDI XDP_TDO

XDP_DBRESET# 17

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

1 2

RC55140_0402_1% RC55140_0402_1%

RC5825.5_0402_1%~D RC5825.5_0402_1%~D

RC60200_0402_1% RC60200_0402_1%

XDP_TMS

XDP_TDI_R

XDP_PREQ#_R

XDP_TDO_R

XDP_TCK

XDP_TRST#

1 2

+VCCP

RC4551_0402_5% RC4551_0402_5%

RC4651_0402_5% RC4651_0402_5%

RC4751_0402_5% @RC4751_0402_5% @

RC4851_0402_5% RC4851_0402_5%

RC5251_0402_5% RC5251_0402_5%

RC5451_0402_5% RC5451_0402_5%

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(2/6) PM,XDP,CLK

LA-6601P

5 63Tuesday, November 30, 2010

1

1.0

5

4

3

2

1

Need to confired

when Intel spec release.

JCPU1C

M_CLK_DDR0

DDR_A_D[0..63]10,12

D D

C C

B B

DDR_A_CAS#10,12 DDR_A_RAS#10,12 DDR_A_WE#10,12

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_BS010,12 DDR_A_BS110,12 DDR_A_BS210,12

AP11 AN11

AL12 AM12 AM11

AL11

AP12 AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10 AF10

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]

M10

SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]

AG6

SA_DQ[32]

AG5

SA_DQ[33]

AK6

SA_DQ[34]

AK5

SA_DQ[35]

AH5

SA_DQ[36]

AH6

SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]

AK8

SA_DQ[41]

AJ9

SA_DQ[42]

AK9

SA_DQ[43]

AH8

SA_DQ[44]

AH9

SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1]

V6

SA_BS[2]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE#

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0]

SA_CS#[1] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0]

SA_ODT[1] RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AB6 AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_CLK_DDR#0 DDR_CKE0_DIMMA

M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA

M_CLK_DDR4 M_CLK_DDR#4 DDR_CKE4_DIMMC

M_CLK_DDR5 M_CLK_DDR#5 DDR_CKE5_DIMMC

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS4_DIMMC# DDR_CS5_DIMMC#

M_ODT0 M_ODT1 M_ODT4 M_ODT5

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 12 M_CLK_DDR#0 12 DDR_CKE0_DIMMA 12

M_CLK_DDR1 12 M_CLK_DDR#1 12 DDR_CKE1_DIMMA 12

M_CLK_DDR4 10 M_CLK_DDR#4 10 DDR_CKE4_DIMMC 10

M_CLK_DDR5 10 M_CLK_DDR#5 10 DDR_CKE5_DIMMC 10

DDR_CS0_DIMMA# 12 DDR_CS1_DIMMA# 12 DDR_CS4_DIMMC# 10 DDR_CS5_DIMMC# 10

M_ODT0 12 M_ODT1 12 M_ODT4 10 M_ODT5 10

DDR_A_DQS#[0..7] 10,12

DDR_A_DQS[0..7] 10,12

DDR_A_MA[0..15] 10,12

DDR_B_D[0..63]11,13

DDR_B_BS011,13 DDR_B_BS111,13 DDR_B_BS211,13

DDR_B_CAS#11,13 DDR_B_RAS#11,13 DDR_B_WE#11,13

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AM5 AM6 AR3

AN3 AN2 AN1

AN9

AN8 AR6 AR5 AR9

AJ11

AH11

AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

JCPU1D

M_CLK_DDR2

AE2

SB_CLK[0]

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34]

AP3

SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40] SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

SB_CS#[0]

SB_CS#[1] RSVD_TP[17] RSVD_TP[18]

SB_ODT[0]

SB_ODT[1] RSVD_TP[19] RSVD_TP[20]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0]

SB_DQS[1]

SB_DQS[2]

SB_DQS[3]

SB_DQS[4]

SB_DQS[5]

SB_DQS[6]

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_CLK_DDR#2 DDR_CKE2_DIMMB

M_CLK_DDR3 M_CLK_DDR#3 DDR_CKE3_DIMMB

M_CLK_DDR6 M_CLK_DDR#6 DDR_CKE6_DIMMD

M_CLK_DDR7 M_CLK_DDR#7 DDR_CKE7_DIMMD

DDR_CS2_DIMMB# DDR_CS3_DIMMB# DDR_CS6_DIMMD# DDR_CS7_DIMMD#

M_ODT2 M_ODT3 M_ODT6 M_ODT7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

M_CLK_DDR2 13 M_CLK_DDR#2 13 DDR_CKE2_DIMMB 13

M_CLK_DDR3 13 M_CLK_DDR#3 13 DDR_CKE3_DIMMB 13

M_CLK_DDR6 11 M_CLK_DDR#6 11 DDR_CKE6_DIMMD 11

M_CLK_DDR7 11 M_CLK_DDR#7 11 DDR_CKE7_DIMMD 11

DDR_CS2_DIMMB# 13 DDR_CS3_DIMMB# 13 DDR_CS6_DIMMD# 11 DDR_CS7_DIMMD# 11

M_ODT2 13 M_ODT3 13 M_ODT6 11 M_ODT7 11

DDR_B_DQS#[0..7] 11,13

DDR_B_DQS[0..7] 11,13

DDR_B_MA[0..15] 11,13

Sandy Bridge_rPGA_Rev1p0

CONN@

QC2

BSS138_SOT23~D

D

S

D

S

H_DRAMRST#5

A A

H_DRAMRST#

4.99K_0402_1%~D

RC77

12

DDR3_DRAMRST#_R

13

DG 0.7 Figure 57 RC124=1K

G

2

DRAMRST_CNTRL

1

CC69

0.047U_0402_16V4Z~D

2

+1.5V

12

RC75

1K_0402_5%~D

RC76 1K_0402_5%~DRC76 1K_0402_5%~D

1 2

12

RC720_0402_5%~D RC720_0402_5%~D

RC730_0402_5%~D @RC730_0402_5%~D @

DDR3_DRAMRST# 10,11,12,13

DRAMRST_CNTRL_PCH 16

DRAMRST_CNTRL_EC 44

Sandy Bridge_rPGA_Rev1p0

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT .

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

LA-6601P

6 63Tuesday, November 30, 2010

1

1.0

5

4

3

2

1

CFG Straps for Processor

D D

JCPU1E

L7

RSVD28

AG7

RESERVED

RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

VCC_DIE_SENSE

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35 AM35

AT2 AT1 AR1

B1

KEY

CFG0

CFG05

CFG1

+VCC_GFXCORE_AXG

VCC_AXG_VAL_SENSE

12

RC79 49.9_0402_1%@RC79 49.9_0402_1%@

+VCC_CORE

VCC_VAL_SENSE

12

RC80 49.9_0402_1%@RC80 49.9_0402_1%@

VSS_AXG_VAL_SENSE

1 2

RC90 49.9_0402_1%@RC90 49.9_0402_1%@

RC91 49.9_0402_1%@RC91 49.9_0402_1%@

C C

+V_DDR_REFA

+V_DDR_REFB

B B

RC82 0_0402_5%~D@RC82 0_0402_5%~D@ RC83 0_0402_5%~D@RC83 0_0402_5%~D@

1 2

1 2 1 2

VSS_VAL_SENSE

12

RC84

1K_0402_1%~D

INTEL 12/28 rec ommand to add 1k pull down

VCCP_PWRCTRL52

CFG15 CFG25 CFG35 CFG45 CFG55 CFG65 CFG75 CFG85 CFG95 CFG105 CFG115

T51PAD~D@ T51PAD~D@ T52PAD~D@ T52PAD~D@ T53PAD~D@ T53PAD~D@ T54PAD~D@ T54PAD~D@

CFG165 CFG175

+V_DDR_REFA_R +V_DDR_REFB_R

RC85

1K_0402_1%~D

1 2

RC88 0_0402_5%~DRC88 0_0402_5%~D

CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

VCC_AXG_VAL_SENSE VSS_AXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE

T19PAD~D @T19PAD~D @

T25PAD~D @T25PAD~D @ T26PAD~D @T26PAD~D @ T27PAD~D @T27PAD~D @ T28PAD~D @T28PAD~D @ T30PAD~D @T30PAD~D @ T32PAD~D @T32PAD~D @ T33PAD~D @T33PAD~D @ T34PAD~D @T34PAD~D @ T35PAD~D @T35PAD~D @ T37PAD~D @T37PAD~D @ T38PAD~D @T38PAD~D @ T39PAD~D @T39PAD~D @ T40PAD~D @T40PAD~D @ T41PAD~D @T41PAD~D @ T42PAD~D @T42PAD~D @ T43PAD~D @T43PAD~D @

T44PAD~D @T44PAD~D @ T45PAD~D @T45PAD~D @

H_VCCP_SEL

T49PAD~D @T49PAD~D @

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

Sandy Bridge_rPGA_Rev1p0

CONN@

T2 PAD~D@T2 PAD~D@ T3 PAD~D@T3 PAD~D@ T4 PAD~D@T4 PAD~D@ T5 PAD~D@T5 PAD~D@ T6 PAD~D@T6 PAD~D@

T7 PAD~D@T7 PAD~D@ T8 PAD~D@T8 PAD~D@ T9 PAD~D@T9 PAD~D@

T10 PAD~D@T10 PAD~D@ T11 PAD~D@T11 PAD~D@ T12 PAD~D@T12 PAD~D@ T13 PAD~D@T13 PAD~D@

T14 PAD~D@T14 PAD~D@ T15 PAD~D@T15 PAD~D@ T16 PAD~D@T16 PAD~D@ T17 PAD~D@T17 PAD~D@ T18 PAD~D@T18 PAD~D@

T20 PAD~D@T20 PAD~D@ T21 PAD~D@T21 PAD~D@ T22 PAD~D@T22 PAD~D@ T23 PAD~D@T23 PAD~D@ T24 PAD~D@T24 PAD~D@

T29 PAD~D@T29 PAD~D@ T31 PAD~D@T31 PAD~D@

T36 PAD~D@T36 PAD~D@

CLK_RES_ITP 16 CLK_RES_ITP# 16

T46 PAD~D@T46 PAD~D@ T47 PAD~D@T47 PAD~D@ T48 PAD~D@T48 PAD~D@

T50 PAD~D@T50 PAD~D@

CFG[6:5]

CFG2

1K_0402_1%~D

@RC78

@

12

RC78

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Default) Normal Operation; Lane #

CFG2

definition matches socket pin map definition 0:Lane Reversed

CFG4

1K_0402_1%~D

12

RC81

Display Port Presence Strap

1 : Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port 0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6 CFG5

1K_0402_1%~D

@RC87

@

@RC86

@

12

RC87

RC86

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7

1K_0402_1%~D

@RC89

@

12

RC89

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB de assertion

CFG7

0: PEG Wait for BIOS for training

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT .

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

LA-6601P

7 63Tuesday, November 30, 2010

1

1.0

5

4

POWER

JCPU1F

POWER

3

2

1

+VCC_CORE

94A

AG35

D D

+VCC_CORE

10U_0805_4VAM~D

CC82

1

2

+VCC_CORE

22U_0805_6.3VAM~D

1

2

1

2

+VCC_CORE

1

2

22U_0805_6.3VAM~D

CC117

22U_0805_6.3VAM~D

CC116

470U_D2_2VM_R4.5M~D

CC132

+

C C

B B

A A

10U_0805_4VAM~D

CC90

CC89

1

2

22U_0805_6.3VAM~D

CC119

CC118

1

2

22U_0805_6.3VAM~D

@

CC129

1

2

470U_D2_2VM_R4.5M~D

1

CC136

CC133

+

2

10U_0805_4VAM~D

CC70

CC85

1

2

22U_0805_6.3VAM~D

CC120

CC121

1

2

22U_0805_6.3VAM~D

@

CC131

CC130

1

2

470U_D2_2VM_R4.5M~D

1

CC134

CC137

+

2

10U_0805_4VAM~D

1

2

22U_0805_6.3VAM~D

1

2

470U_D2_2VM_R4.5M~D

1

+

2

10U_0805_4VAM~D

CC91

CC86

CC122

CC135

CC87

1

2

22U_0805_6.3VAM~D

1

2

22U_0805_6.3VAM~D

CC123

CC124

1

2

10U_0805_4VAM~D

@

CC84

CC83

CC71

1

2

22U_0805_6.3VAM~D

CC126

CC125

1

2

22U_0805_6.3VAM~D

CC127

CC128

1

2

22U_0805_6.3VAM~D

CC115

CC114

CC113

1

2

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Sandy Bridge_rPGA_Rev1p0

CONN@

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30

PEG AND DDR

VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

SENSE LINES SVID

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSSIO_SENSE

CORE SUPPLY

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

VCCSENSE_R VSSSENSE_R

8.5A

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

22U_0805_6.3VAM~D

1

2

22U_0805_6.3VAM~D

1

2

330U_D2_2VM_R6M~D

1

+

2

RC98 0_0402_5%~DRC98 0_0402_5%~D RC99 0_0402_5%~DRC99 0_0402_5%~D

VCCIO_SENSE 52 VSSIO_SENSE 52

22U_0805_6.3VAM~D

CC73

CC74

CC72

CC96

CC110

CC74

1

2

1

2

1

+

2

1 2 1 2

1

2

22U_0805_6.3VAM~D

CC97

CC98

1

2

330U_D2_2VM_R6M~D

1

@

CC112

CC111

+

2

RC94 43_0402_1%RC94 43_0402_1%

1 2

RC92 0_0402_5%~DRC92 0_0402_5%~D

1 2

RC96 0_0402_5%~DRC96 0_0402_5%~D

1 2

22U_0805_6.3VAM~D

CC75

22U_0805_6.3VAM~D

CC99

22U_0805_6.3VAM~D

CC76

1

2

22U_0805_6.3VAM~D

CC100

1

2

+VCC_CORE

CC77

CC101

22U_0805_6.3VAM~D

CC88

1

2

22U_0805_6.3VAM~D

CC102

1

2

+VCCP

75_0402_1%~D

12

RC93

12

100_0402_1%~D

12

100_0402_1%~D

1

2

1

2

RC97

RC100

22U_0805_6.3VAM~D

130_0402_1%~D

12

22U_0805_6.3VAM~D

CC80

CC78

CC103

RC95

CC80

CC79

1

2

1

2

1

2

22U_0805_6.3VAM~D

CC104

CC105

1

2

Note: Place the PU resistors close to CPU 300 - 1500mils

VCCSENSE 56 VSSSENSE 56

22U_0805_6.3VAM~D

CC81

CC92

1

2

22U_0805_6.3VAM~D

CC106

CC107

1

2

VR_SVID_ALRT# 56 VR_SVID_CLK 56

VR_SVID_DAT 56

+VCCP

22U_0805_6.3VAM~D

CC95

CC94

CC93

1

2

22U_0805_6.3VAM~D

CC108

CC109

1

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT .

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/6) PWR,BYPASS

LA-6601P

8 63Tuesday, November 30, 2010

1

1.0

5

+3VALW

12

RC102

100K_0402_5%~D

22U_0805_6.3VAM~D

1U_0402_6.3V6K~D

2

G

CC146

@

CC154

CC175

6

22U_0805_6.3VAM~D

CC147

1

2

22U_0805_6.3VAM~D

@

CC155

1

2

330U_D2_2.5VM_R6M~D

1

CC176

+

2

RUN_ON_CPU1.5VS3#

DMN66D0LDW-7_SOT363-6~D

D

QC5A

S

1

33A

3A

JCPU1G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

Sandy Bridge_rPGA_Rev1p0

CONN@

D D

RC104 0_0402_5%~D@RC104 0_0402_5%~D@

SUSP#20,44,47,52,53,54

CPU1.5V_S3_GATE44

+VCC_GFXCORE_AXG

22U_0805_6.3VAM~D

CC140

1

2

C C

B B

22U_0805_6.3VAM~D

CC148

1

2

470U_D2_2VM_R4.5M~D

1

+

CC156

2

+1.8VS

RC109 0_0805_5% R C109 0_0805_5%

1 2

RC107 0_0402_5%~DRC107 0_0402_5%~D

1 2

CC178

0.1U_0402_10V7K~D

22U_0805_6.3VAM~D

CC142

CC141

1

2

22U_0805_6.3VAM~D

CC150

CC149

1

2

470U_D2_2VM_R4.5M~D

1

+

@

CC158

CC157

2

1 2

1

@CC178

@

2

22U_0805_6.3VAM~D

CC144

CC145

CC143

1

2

22U_0805_6.3VAM~D

@

CC152

CC151

CC153

1

2

@

CC159

+1.8VS_VCCPLL

1U_0402_6.3V6K~D

10U_0805_4VAM~D

CC174

1

CC172

2

4

B+_BIAS

12

RC101

100K_0402_5%~D

3

D

5

G

S

4

RUN_ON_CPU1.5VS3# 5,47

POWER

SENSE

GRAPHICS

1.8V RAIL

+1.5V_CPU_VDDQ Source

+1.5V +1.5V_CPU_VDDQ

QC3

AO4728L_SO8~D

RUN_ON_CPU1.5VS3

DMN66D0LDW-7_SOT363-6~D

QC5B

VAXG_SENSE

VSSAXG_SENSE

LINES

SM_VREF

VREFMISC

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

DDR3 -1.5V RAILS

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

SA RAIL

VCCSA_SENSE

FC_C22

VCCSA_VID1

8 7 6 5

1 2 3

4

0.1U_0603_25V7K~D

330K_0402_1%

12

RC105

1

CC139

2

VCC_AXG_SENSE

AK35

VSS_AXG_SENSE

AK34

AL1

+V_SM_VREF should have 10 mil trace width

5A

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

6A

M27 M26 L26 J26 J25 J24 H26 H25

H23

C22 C24

VCCSA_SEL 55

+V_SM_VREF_CNT

10U_0805_4VAM~D

1

2

10U_0805_4VAM~D

1

CC167

2

10U_0805_10V4Z~D

CC138

1

12

2

VCC_AXG_SENSE 56 VSS_AXG_SENSE 56

10U_0805_4VAM~D

1

CC160

CC161

2

10U_0805_4VAM~D

1

CC168

2

3

20K_0402_5%~D

RC103

+1.5V

100_0402_1%~D

12

RC112

100_0402_1%~D

12

RC116

10U_0805_4VAM~D

1

CC162

CC163

2

+VCCSA

330U_D2_2VM_R6M~D

10U_0805_4VAM~D

10U_0603_6.3V6M~D

1

+

@

CC169

CC170

2

10K_0402_5%~D

RC111

1 2

RC106 0_0402_5%~D@RC106 0_0402_5%~D@

1 2

+V_SM_VREF

10U_0805_4VAM~D

1

CC164

2

CC171

RC120 0_0402_5%~DRC120 0_0402_5%~D

H_FC_C22 55

123

QC4

NTR4503NT1G_SOT23-3~D

RUN_ON_CPU1.5VS3

+1.5V_CPU_VDDQ

330U_D2_2VM_R6M~D

10U_0805_4VAM~D

1

CC166

1

+

CC165

2

1 2

0_0402_5%~D

12

@

RC110

12

RC108

RC108 100K_0402_5%~D

100K_0402_5%~D

CC173 0.1U_0402_10V7K~DCC173 0.1U_0402_10V7K~D

12

CC177 0.1U_0402_10V7K~DCC177 0.1U_0402_10V7K~D

12

CC181 0.1U_0402_10V7K~DCC181 0.1U_0402_10V7K~D

12

CC182 0.1U_0402_10V7K~DCC182 0.1U_0402_10V7K~D

12

J8

@J8

@

1 2

PAD-OPEN 4x4m

PJP30 OPEN

VSS_AXG_SENSE 56

VCCSA_SENSE 55

2

+V_SM_VREF_CNT

+1.5V

JCPU1H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

Sandy Bridge_rPGA_Rev1p0

CONN@

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

1

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(6/6) PWR,VSS

LA-6601P

9 63Tuesday, November 30, 2010

1

1.0

5

DDR_A_DQS#[0..7]6,12 DDR_A_DQS[0..7]6,12

DDR_A_D[0..63]6,12 DDR_A_MA[0..15]6,12

D D

Layout Note: Place near JDIMM1

+1.5V

1U_0402_6.3V6K~D

1

2

+1.5V

10U_0603_6.3V6M~D

C C

B B

1

2

+0.75VS

1U_0402_6.3V6K~D

1

CD4

CD3

CD5

2

10U_0603_6.3V6M~D

1

CD8

CD9

CD7

Layout Note: Place near JDIMM1.203,204

1U_0402_6.3V6K~D

1

2

1U_0402_6.3V6K~D

CD17

CD18

1

2

RD1

100_0402_1%~D

RD3

100_0402_1%~D

1U_0402_6.3V6K~D

CD6

10U_0603_6.3V6M~D

CD10

1

2

1U_0402_6.3V6K~D

CD19

1

2

+1.5V

12

10U_0603_6.3V6M~D

CD12

CD11

1

2

1U_0402_6.3V6K~D

CD20

+V_DDR_REFA

All VREF traces should have 10 mil trace width

10U_0603_6.3V6M~D

@

CD13

330U_SX_2VY~D

1

CD14

+

2

10K_0402_5%~D

4

+V_DDR_REFA

SA0

1

0

RD35

RD6

10K_0402_5%~D

RD2 0_0402_5%~DRD2 0_0402_5%~D

1 2

DDR_CKE4_DIMMC6

DDR_CS5_DIMMC#6

SA1

001

DIMM1

1

DIMM2

DIMM3

1

DIMM4

+3VS

RD36

@ RD36

@

10K_0402_5%~D

1 2

+3VS

RD7

1 2

RD7

10K_0402_5%~D

1 2

@RD6

@

3

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

+1.5V+1.5V

2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS

DM1

VSS

VSS DM2 VSS

VSS

VDD

A15 A14

VDD

A11

VDD

VDD CK1

VDD BA1

VDD

S0#

VDD

VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

SDA SCL

VTT

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22 24 26 28

DDR3_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20DDR_A_D16

40

DDR_A_D21

42 44 46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDR_CKE5_DIMMC

74 76

DDR_A_MA15

78

DDR_A_MA14

80 82

DDR_A_MA11DDR_A_MA12

84

DDR_A_MA7DDR_A_MA9

86

A7

88

DDR_A_MA6DDR_A_MA8

90

A6

DDR_A_MA4DDR_A_MA5

92

A4

94

DDR_A_MA2

96

A2

DDR_A_MA0

98

A0

100

M_CLK_DDR5

102

M_CLK_DDR#5

104 106

DDR_A_BS1

108

DDR_A_RAS#

110 112

DDR_CS4_DIMMC#

114

M_ODT4

116 118

M_ODT5

120 122

NC

124 126 128

DDR_A_D36

130

DDR_A_D37

132 134 136 138

DDR_A_D38

140

DDR_A_D39

142 144

DDR_A_D44

146

DDR_A_D45

148 150

DDR_A_DQS#5

152

DDR_A_DQS5

154 156

DDR_A_D46

158

DDR_A_D47

160 162

DDR_A_D52

164

DDR_A_D53

166 168 170 172

DDR_A_D54

174

DDR_A_D55

176 178

DDR_A_D60

180

DDR_A_D61

182 184

DDR_A_DQS#7

186

DDR_A_DQS7

188 190

DDR_A_D62

192

DDR_A_D63

194 196

M_THERMAL#

198

PCH_SMBDATA

200

PCH_SMBCLK

202 204

+0.75VS

206

JDIMM1

+DIMM0_VREF

DDR_A_D0

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

DDR_A_D1

CD2

CD1

1

2

M_CLK_DDR46 M_CLK_DDR#46

DDR_A_BS06,12

DDR_A_WE#6,12 DDR_A_CAS#6,12

DDR_A_D2

2

DDR_A_D3

DDR_A_D8 DDR_A_D9 DDR_A_D13

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE4_DIMMC

DDR_A_BS2

DDR_A_BS26,12

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR4 M_CLK_DDR#4

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13

DDR_CS5_DIMMC#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

+0.75VS

CD21

1

CD22

1

2

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

TYCO_2-2013287-1

Link Done

2

DDR3_DRAMRST# 6,11,12,13

DDR_CKE5_DIMMC 6

M_CLK_DDR5 6 M_CLK_DDR#5 6

DDR_A_BS1 6,12 DDR_A_RAS# 6,12

DDR_CS4_DIMMC# 6 M_ODT4 6

M_ODT5 6

+VREF_CA

2.2U_0603_6.3V6K~D

CD15

1

2

M_THERMAL# 11,12,13,44

PCH_SMBDATA 5, 11,12,13,16,37,38

PCH_SMBCLK 5,11,12,13,16,37,38

1

2 (H8)

JDIMM1 (H4)

CPU

+1.5V

12

RD4

1K_0402_1%~D

0.1U_0402_16V4Z~D

12

CD16

RD5

1K_0402_1%~D

3 (H5.2)

4 (H9.2)

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMA

LA-6601P

10 63Tuesday, November 30, 2010

1

1.0

5

4

3

2

1

+1.5V

RD14 0_0402_5%~DRD14 0_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

CD27

1

2

Note: Check voltage tolerance of VREF_DQ at the DIMM socket

DDR_CKE6_DIMMD6

DDR_B_BS26,13

M_CLK_DDR66 M_CLK_DDR#66

DDR_B_BS06,13

DDR_B_WE#6,13 DDR_B_CAS#6,13

DDR_CS7_DIMMD#6

SA0

SA1

001

DIMM1

1

DIMM2

1

DIMM3

0

1

DIMM4

0

+3VS

RD19

10K_0402_5%~D

1 2

12

RD37

@ RD37

@

10K_0402_5%~D

+3VS

12

0.1U_0402_16V4Z~D

CD26

DDR_CKE6_DIMMD

DDR_B_BS2

M_CLK_DDR6 M_CLK_DDR#6

DDR_CS7_DIMMD#

1

2

+DIMM1_VREF

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

+0.75VS

0.1U_0402_16V4Z~D

CD46

1

2

+1.5V

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

CK1#

+1.5V

2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

A15 A14

VDD

A11

VDD

VDD CK1

VDD BA1

VDD

S0#

VDD

VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

SDA SCL

VTT

DDR_B_D4

4

DDR_B_D5

6 8

DDR_B_DQS#0

10

DDR_B_DQS0

12 14

DDR_B_D6

16

DDR_B_D7

18 20

DDR_B_D12

22

DDR_B_D13

24 26 28

DDR3_DRAMRST#

30 32

DDR_B_D14

34

DDR_B_D15

36 38

DDR_B_D20

40

DDR_B_D21

42 44 46 48

DDR_B_D22

50

DDR_B_D23

52 54

DDR_B_D28

56

DDR_B_D29

58 60

DDR_B_DQS#3

62

DDR_B_DQS3

64 66

DDR_B_D30

68

DDR_B_D31

70 72

DDR_CKE7_DIMMD

74 76

DDR_B_MA15

78

DDR_B_MA14

80 82

DDR_B_MA11

84

DDR_B_MA7

86

A7

88

DDR_B_MA6

90

A6

DDR_B_MA4

92

A4

94

DDR_B_MA2

96

A2

DDR_B_MA0

98

A0

100

M_CLK_DDR7

102

M_CLK_DDR#7

104 106

DDR_B_BS1

108

DDR_B_RAS#

110 112

DDR_CS6_DIMMD#

114

M_ODT6

116 118

M_ODT7

120 122

NC

124 126 128

DDR_B_D36

130

DDR_B_D37

132 134 136 138

DDR_B_D38

140

DDR_B_D39

142 144

DDR_B_D44

146

DDR_B_D45

148 150

DDR_B_DQS#5

152

DDR_B_DQS5

154 156

DDR_B_D46

158

DDR_B_D47

160 162

DDR_B_D52

164

DDR_B_D53

166 168 170 172

DDR_B_D54

174

DDR_B_D55

176 178

DDR_B_D60

180

DDR_B_D61

182 184

DDR_B_DQS#7

186

DDR_B_DQS7

188 190

DDR_B_D62

192

DDR_B_D63

194 196

M_THERMAL#

198

PCH_SMBDATA

200

PCH_SMBCLK

202 204

+0.75VS

206

CPU

DDR3_DRAMRST# 6,10,12,13

DDR_CKE7_DIMMD 6

M_CLK_DDR7 6 M_CLK_DDR#7 6

DDR_B_BS1 6,13 DDR_B_RAS# 6,13

DDR_CS6_DIMMD# 6 M_ODT6 6

M_ODT7 6

+VREF_CB

2.2U_0603_6.3V6K~D

CD40

1

2

M_THERMAL# 10,12,13,44

PCH_SMBDATA 5, 10,12,13,16,37,38

PCH_SMBCLK 5,10,12,13,16,37,38

JDIMM2

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

2.2U_0603_6.3V6K~D

205

CD47

GND1

TYCO_2-2013298-1

Link Done

+V_DDR_REFB

RD38

10K_0402_5%~D

RD20

@RD20

@

10K_0402_5%~D

12

RD15

100_0402_1%~D

DDR_B_DQS#[0..7]6,13

DDR_B_DQS[0..7]6,13

D D

C C

+1.5V

B B

DDR_B_D[0..63]6,13

DDR_B_MA[0..15]6,13

+1.5V

1U_0402_6.3V6K~D

CD28

CD29

1

2

10U_0603_6.3V6M~D

CD34

CD32

CD33

1

2

+0.75VS

1

2

Layout Note: Place near JDIMMB.203,204

1U_0402_6.3V6K~D

CD42

1

2

Layout Note: Place near JDIMMB

1U_0402_6.3V6K~D

CD30

CD31

1

2

10U_0603_6.3V6M~D

CD36

CD37

CD35

CD43

CD37

1

2

1U_0402_6.3V6K~D

CD45

CD44

1

2

10U_0603_6.3V6M~D

@

CD38

1

2

RD16

100_0402_1%~D

330U_SX_2VY~D

1

CD39

+

2

12

All VREF traces should have 10 mil trace width

0.1U_0402_16V4Z~D

CD41

JDIMM2 (H8)

1 (H4)

3 (H5.2)

4 (H9.2)

+1.5V

12

RD17

1K_0402_1%~D

12

RD18

1K_0402_1%~D

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMB

LA-6601P

11 63Tuesday, November 30, 2010

1

1.0

5

DDR_A_DQS#[0..7]6,10

DDR_A_DQS[0..7]6,10

DDR_A_D[0..63]6,10

DDR_A_MA[0..15]6,10

D D

Layout Note: Place near JDIMM1

+1.5V

1U_0402_6.3V6K~D

CD53

1

2

+1.5V

10U_0603_6.3V6M~D

CD57

1

C C

B B

1

2

Layout Note: Place near JDIMM1.203,204

+0.75VS

1U_0402_6.3V6K~D

CD67

1

2

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

CD58

CD56

CD55

CD54

1

2

10U_0603_6.3V6M~D

CD60

CD59

1

2

1U_0402_6.3V6K~D

CD69

CD68

1

2

10U_0603_6.3V6M~D

@

CD62

CD63

CD61

1

2

1U_0402_6.3V6K~D

CD70

330U_SX_2VY~D

1

CD64

+

2

10K_0402_5%~D

4

+V_DDR_REFA

SA0

1

0

RD32

@ RD 32

@

RD40

+3VS

RD28 0_0402_5%~DRD28 0_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

CD51

1

2

DDR_CKE0_DIMMA6

DDR_A_BS26,10

M_CLK_DDR06 M_CLK_DDR#06

DDR_A_BS06,10

DDR_A_WE#6,10 DDR_A_CAS#6,10

DDR_CS1_DIMMA#6

SA1

001

DIMM1

1

DIMM2

DIMM3

1

DIMM4

12

RD39

@RD39

@

10K_0402_5%~D

+3VS

12

RD33

10K_0402_5%~D

1 2

3

JDIMM3

+0.75VS

JDIMM3

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

TYCO_2-2013289-1

Link Done

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

A15 A14

VDD

A11

A7

VDD

A6 A4

VDD

A2

A0 VDD CK1

VDD BA1

VDD

S0#

VDD

NC VDD

VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

SDA SCL

VTT

+DIMM3_VREF

DDR_A_D0

0.1U_0402_16V4Z~D

DDR_A_D1

CD52

1

DDR_A_D2

2

DDR_A_D3

DDR_A_D8 DDR_A_D9 DDR_A_D13

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

CD71

CD72

1

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

+1.5V+1.5V

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12

DDR3_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20DDR_A_D16 DDR_A_D21

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11DDR_A_MA12 DDR_A_MA7DDR_A_MA9

DDR_A_MA6DDR_A_MA8 DDR_A_MA4DDR_A_MA5

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

M_THERMAL# PCH_SMBDATA PCH_SMBCLK

+0.75VS

2

DDR3_DRAMRST# 6,10,11,13

DDR_CKE1_DIMMA 6

M_CLK_DDR1 6 M_CLK_DDR#1 6

DDR_A_BS1 6,10 DDR_A_RAS# 6,10

DDR_CS0_DIMMA# 6 M_ODT0 6

M_ODT1 6

+VREF_CC

M_THERMAL# 10,11,13,44

PCH_SMBDATA 5,10,11,13,16,37, 38

PCH_SMBCLK 5,10,11,13,16,37,38

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

CD65

1

2

CPU

CD66

+1.5V

12

RD30

RD30 1K_0402_1%~D

1K_0402_1%~D

12

RD31

RD31 1K_0402_1%~D

1K_0402_1%~D

2 (H8) 1 (H4)

JDIMM3 (H5.2)

4 (H9.2)

1

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMC

LA-6601P

12 63Tuesday, November 30, 2010

1

1.0

5

4

3

2

1

+1.5V

12

RD44

1K_0402_1%~D

12

RD45

1K_0402_1%~D

2 (H8) 1 (H4)

3 (H5.2)

RD41 0_0402_5%~DRD41 0_0402_5%~D

+V_DDR_REFB

DDR_B_DQS#[0..7]6,11

DDR_B_DQS[0..7]6,11

D D

C C

B B

DDR_B_D[0..63]6,11

DDR_B_MA[0..15]6,11

+1.5V

1U_0402_6.3V6K~D

CD78

CD79

1

2

+1.5V

10U_0603_6.3V6M~D

CD84

CD83

CD82

1

2

Layout Note: Place near JDIMM4.203,204

+0.75VS

1U_0402_6.3V6K~D

CD92

CD93

1

2

Layout Note: Place near JDIMMB

1U_0402_6.3V6K~D

CD81

CD80

1

2

10U_0603_6.3V6M~D

CD86

CD85

1

2

1U_0402_6.3V6K~D

CD95

CD94

1

2

10U_0603_6.3V6M~D

330U_SX_2VY~D

1

@

CD88

CD87

CD89

1

+

2

10K_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

CD76

1

2

Note: Check voltage tolerance of VREF_DQ at the DIMM socket

DDR_CKE2_DIMMB6

DDR_B_BS26,11

M_CLK_DDR26 M_CLK_DDR#26

DDR_B_BS06,11

DDR_B_WE#6,11 DDR_B_CAS#6,11

DDR_CS3_DIMMB#6

SA0

SA1

001

DIMM1

1

DIMM2

1

DIMM3

0

1

DIMM4

0

+3VS

12

RD46

@ RD 46

@

RD48

10K_0402_5%~D

RD50

10K_0402_5%~D

1 2

12

RD49

10K_0402_5%~D

+3VS

@RD49

@

12

0.1U_0402_16V4Z~D

CD77

+DIMM4_VREF

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10

DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

+0.75VS

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D CD96

CD96

1

2

+1.5V

JDIMM4

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

CD97

GND1

TYCO_2-2013310-1

VREF_CA

Link Done

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3

DQ30 DQ31

CKE1

CK1#

RAS#

ODT0

ODT1

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5

DQ46 DQ47

DQ52 DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7

DQ62 DQ63

EVENT#

GND2

+1.5V

2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

A15 A14

VDD

A11

VDD

VDD CK1

VDD BA1

VDD

S0#

VDD

VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

SDA SCL

VTT

DDR_B_D4

4

DDR_B_D5

6 8

DDR_B_DQS#0

10

DDR_B_DQS0

12 14

DDR_B_D6

16

DDR_B_D7

18 20

DDR_B_D12

22

DDR_B_D13

24 26 28

DDR3_DRAMRST#

30 32

DDR_B_D14

34

DDR_B_D15

36 38

DDR_B_D20

40

DDR_B_D21

42 44 46 48

DDR_B_D22

50

DDR_B_D23

52 54

DDR_B_D28

56

DDR_B_D29

58 60

DDR_B_DQS#3

62

DDR_B_DQS3

64 66

DDR_B_D30

68

DDR_B_D31

70 72

DDR_CKE3_DIMMB

74 76

DDR_B_MA15

78

DDR_B_MA14

80 82

DDR_B_MA11

84

DDR_B_MA7

86

A7

88

DDR_B_MA6

90

A6

DDR_B_MA4

92

A4

94

DDR_B_MA2

96

A2

DDR_B_MA0

98

A0

100

M_CLK_DDR3

102

M_CLK_DDR#3

104 106

DDR_B_BS1

108

DDR_B_RAS#

110 112

DDR_CS2_DIMMB#

114

M_ODT2

116 118

M_ODT3

120 122

NC

124 126 128

DDR_B_D36

130

DDR_B_D37

132 134 136 138

DDR_B_D38

140

DDR_B_D39

142 144

DDR_B_D44

146

DDR_B_D45

148 150

DDR_B_DQS#5

152

DDR_B_DQS5

154 156

DDR_B_D46

158

DDR_B_D47

160 162

DDR_B_D52

164

DDR_B_D53

166 168 170 172

DDR_B_D54

174

DDR_B_D55

176 178

DDR_B_D60

180

DDR_B_D61

182 184

DDR_B_DQS#7

186

DDR_B_DQS7

188 190

DDR_B_D62

192

DDR_B_D63

194 196

M_THERMAL#

198

PCH_SMBDATA

200

PCH_SMBCLK

202 204

+0.75VS

206

CPU

DDR3_DRAMRST# 6,10,11,12

DDR_CKE3_DIMMB 6

M_CLK_DDR3 6 M_CLK_DDR#3 6

DDR_B_BS1 6,11 DDR_B_RAS# 6,11

DDR_CS2_DIMMB# 6 M_ODT2 6

M_ODT3 6

+VREF_CD

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

CD91

CD90

1

2

M_THERMAL# 10,11,12,44

PCH_SMBDATA 5, 10,11,12,16,37,38

PCH_SMBCLK 5,10,11,12,16,37,38

JDIMM4 (H9.2)

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMD

LA-6601P

13 63Tuesday, November 30, 2010

1

1.0

5

PEG_HTX_C_GRX_N[0..15]4

PEG_HTX_C_GRX_P[0..15]4

PEG_GTX_HRX_N[0..15]4

PEG_GTX_HRX_P[0..15]4

D D

+5VMXM

PAD-OPEN 4x4m

+5V_MXM

J12

@J12

@

12

Add R7 increase NV MXM PEG Swing

C C

B B

A A

DGPU_ENVDD26 DGPU_BKL_EN26 VGA_PNL_PWM26

VGA_LCD_DAT26

VGA_LCD_CLK26

LVDS DDC Module have 4.7K Pull-UP

+3V_MXM

SPDIF_OUT34,35

VIN+49

R594 0_0402_5%~DR594 0_0402_5%~D

VIN-49

R596 0_0402_5%~DR596 0_0402_5%~D

PEG_HTX_C_GRX_N[0..15]

PEG_HTX_C_GRX_P[0..15]

PEG_GTX_HRX_N[0..15]

PEG_GTX_HRX_P[0..15]

10U_0603_6.3V6M~D

0.1U_0402_16V4Z~DC70.1U_0402_16V4Z~D

C328

1

C7

2

+5V_MXM

100mil(2.5A, 5VIA)

R7 0_0402_5%~DR7 0_0402_5%~D

1 2

R9 10K_0402_5%~D@R9 10K_0402_5%~D@ R10 36K_0402_1%@R10 36K_0402_1%@

1 2

.1U_0402_16V7K~D

1 2

VGA_DISABLE#

VGA_HDMI_CEC

VGA_LCD_DAT VGA_LCD_CLK

1 2 1 2

PEG_GTX_HRX_N15 PEG_GTX_HRX_P15

PEG_GTX_HRX_N14 PEG_GTX_HRX_P14

PEG_GTX_HRX_N13 PEG_GTX_HRX_P13

PEG_GTX_HRX_N12 PEG_GTX_HRX_P12

PEG_GTX_HRX_N11 PEG_GTX_HRX_P11

PEG_GTX_HRX_N10 PEG_GTX_HRX_P10

PEG_GTX_HRX_N9 PEG_GTX_HRX_P9

PEG_GTX_HRX_N8 PEG_GTX_HRX_P8

PEG_GTX_HRX_N7 PEG_GTX_HRX_P7

PEG_GTX_HRX_N6 PEG_GTX_HRX_P6

PEG_GTX_HRX_N5 PEG_GTX_HRX_P5

PEG_GTX_HRX_N4 PEG_GTX_HRX_P4

PEG_GTX_HRX_N3 PEG_GTX_HRX_P3

C852

@C852

@

+3V_MXM

5

1

2

B+_MXM

JMXM1A

1

PWR_ SRC

3

PWR_ SRC

5

PWR_ SRC

7

PWR_ SRC

9 11 13 15 17

19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161

1

2

3

4

E1 E2

PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC

GND GND GND GND GND

E3 E4

GND GND GND GND 5V 5V 5V 5V 5V GND GND GND GND PEX_STD _SW# VGA_DISAB LE# PNL_PW R_EN PNL_BL_ EN PNL_BL_ PWM HDMI_CEC DVI_HPD LVDS_DD C_DAT LVDS_DD C_CLK GND OEM OEM OEM OEM GND PEX_RX1 5# PEX_RX1 5 GND PEX_RX1 4# PEX_RX1 4 GND PEX_RX1 3# PEX_RX1 3 GND PEX_RX1 2# PEX_RX1 2 GND PEX_RX1 1# PEX_RX1 1 GND PEX_RX1 0# PEX_RX1 0 GND PEX_RX9 # PEX_RX9 GND PEX_RX8 # PEX_RX8 GND PEX_RX7 # PEX_RX7 GND PEX_RX6 # PEX_RX6 GND PEX_RX5 # PEX_RX5 GND PEX_RX4 # PEX_RX4 GND PEX_RX3 # PEX_RX3 GND

JAE_MM70-314-310B1-1

CONN@

U51

VIN+ VINGND VS

INA219AIDCNRG4_SOT23-8

VGA_LCD_CLK VGA_LCD_DAT DGPU_PWROK VGA_HDMI_CEC VGA_DISABLE# VGA_WAKE#

PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC PWR_ SRC

PRSNT_R #

PWR_ GOOD

PWR_ LEVEL TH_OVER T#

TH_ALER T#

PEX_TX1 5#

PEX_TX1 5

PEX_TX1 4#

PEX_TX1 4

PEX_TX1 3#

PEX_TX1 3

PEX_TX1 2#

PEX_TX1 2

PEX_TX1 1#

PEX_TX1 1

PEX_TX1 0#

PEX_TX1 0

PEX_TX9 #

PEX_TX8 #

PEX_TX7 #

PEX_TX6 #

PEX_TX5 #

PEX_TX4 #

PEX_TX3 #

Link Done

8

A1

7

A0

6

SDA

5

SCL

SMB_DAT SMB_CLK

4

R13 4.3K_0402_5%R13 4.3K_0402_5%

1 2

R14 4.3K_0402_5%R14 4.3K_0402_5%

1 2

R15

R15 R18 10K_0402_5%~DR18 10K_0402_5%~D

1 2

R19 10K_0402_5%~D@R19 10K_0402_5%~D@

1 2

R20 10K_0402_5%~D@R20 10K_0402_5%~D@

1 2

2 4 6 8 10 12 14 16 18

20

GND

22

GND

24

GND

26

GND

28

GND

30

GND

32

GND

34

GND

36

GND

38 40

WAKE #

42 44

PWR_ EN

46

RSVD

48

RSVD

50

RSVD

52

RSVD

54 56 58 60

TH_PW M

62

GPIO0

64

GPIO1

66

GPIO2

68 70 72

GND

74

OEM

76

OEM

78

OEM

80

OEM

82

GND

84 86 88

GND

90 92 94

GND

96 98 100

GND

102 104 106

GND

108 110 112

GND

114 116 118

GND

120 122

PEX_TX9

124

GND

126 128

PEX_TX8

130

GND

132 134

PEX_TX7

136

GND

138 140

PEX_TX6

142

GND

144 146

PEX_TX5

148

GND

150 152

PEX_TX4

154

GND

156 158

PEX_TX3

160

GND

For B+_MXM slave address : 1000010 please placemnet near R-sense

B+_MXM_A1 B+_MXM_A0 MXM_CURI2C_DATA MXM_CURI2C_CLK

4

10K_0402_5%~D

12

400mil(10A)

10U_1206_25V6M~DC210U_1206_25V6M~D

1

C2

2

VGA_PRSNT_R# VGA_WAKE# DGPU_PWROK VGA_ON

AC_BATT# VGA_TH_OVERT#

1 2

R8 10K_0402_5%~DR8 10K_0402_5%~D

VGA_SMB_DA1 VGA_SMB_CK1

SYSTEM

PEG_HTX_C_GRX_N15

PEG_HTX_C_GRX_P15

PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P14

PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P13

PEG_HTX_C_GRX_N12

PEG_HTX_C_GRX_P12

PEG_HTX_C_GRX_N11

PEG_HTX_C_GRX_P11

PEG_HTX_C_GRX_N10

PEG_HTX_C_GRX_P10

PEG_HTX_C_GRX_N9

PEG_HTX_C_GRX_P9

PEG_HTX_C_GRX_N8

PEG_HTX_C_GRX_P8

PEG_HTX_C_GRX_N7

PEG_HTX_C_GRX_P7

PEG_HTX_C_GRX_N6

PEG_HTX_C_GRX_P6

PEG_HTX_C_GRX_N5

PEG_HTX_C_GRX_P5

PEG_HTX_C_GRX_N4

PEG_HTX_C_GRX_P4

PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P3

680P_0603_50V7K~DC3680P_0603_50V7K~D

68P_0402_50V8J~DC468P_0402_50V8J~D

C3

1

2

ACIN17,41,44,50

EC_AC_BAT#44

VGA_PRSNT_R# 19

DGPU_PWROK 19 VGA_ON 16

R6940_0402_5%~D R6940_0402_5%~D

12

R6930_0402_5%~D R6930_0402_5%~D

12

MXM_CURI2C_CLK MXM_CURI2C_DATA VGA_DDC_DATA VGA_DDC_CLK

AC_BATT#

B+_MXM

0.1U_0603_25V7K~DC10.1U_0603_25V7K~D

2

C4

C1

1

2

+3V_MXM

R682

10K_0402_5%~D

1 2

B+_MXM_A0

R692

10K_0402_5%~D

1 2

+3V_MXM

R681

@R681

@

10K_0402_5%~D

1 2

B+_MXM_A1

R691

10K_0402_5%~D

1 2

VGA_SMB_DA1 VGA_SMB_CK1

3

R1818 3.3K_0402_5%@ R1818 3.3K_0402_5%@

1 2

R1819 3.3K_0402_5%@ R1819 3.3K_0402_5%@

1 2

R23 4.3K_0402_5%R23 4.3K_0402_5%

1 2

R24 4.3K_0402_5%R24 4.3K_0402_5%

1 2

R1816 10K_0402_5%~DR1816 10K_0402_5%~D

+3VALW

1

C1823

0.1U_0402_25V6K~D

2

5

U622

B

A

3

1

2

AC_BATT#

4

VCC

Y

G

MC74VHC1G09DFT2G_SC70-5

CLK_PEG_PCH#16 CLK_PEG_PCH16

J13

@J13

@

4.7U_0805_10V4Z~DC54.7U_0805_10V4Z~D

C5

12

PAD-OPEN 4x4m

HDMI

@R692

@

+3VMXM

+3V_MXM

12

VGA_TH_OVERT#

R5 0_0402_5%~DR5 0_0402_5%~D

1 2

R6 0_0402_5%~DR6 0_0402_5%~D

1 2

VGA_TZCLK-25 VGA_TZCLK+25

VGA_TZOUT2-25

LVDS

DMC

VGA_TZOUT2+25

VGA_TZOUT1-25 VGA_TZOUT1+25

VGA_TZOUT0-25 VGA_TZOUT0+25

GPU_HDMI_TXD2-28 GPU_HDMI_TXD2+28

GPU_HDMI_TXD1-28 GPU_HDMI_TXD1+28

GPU_HDMI_TXD0-28 GPU_HDMI_TXD0+28

GPU_HDMI_TXC-28 GPU_HDMI_TXC+28

GPU_HDMI_SDATA28

GPU_HDMI_SCLK28

VGA_DPD_N030 VGA_DPD_P030

VGA_DPD_N130 VGA_DPD_P130

VGA_DPD_N230 VGA_DPD_P230

VGA_DPD_N330 VGA_DPD_P330

VGA_DPD_AUXN/DDC30 VGA_DPD_AUXP/DDC30

VGA_PRSNT_L#19

+3V_MXM

10K_0402_5%~D

12

R11

S

SSM3K7002F_SC59-3~D

PEG_GTX_HRX_N2 PEG_GTX_HRX_P2

PEG_GTX_HRX_N1 PEG_GTX_HRX_P1

PEG_GTX_HRX_P0

CLK_PEG_PCH#_R CLK_PEG_PCH_R

VGA_TZCLKVGA_TZCLK+

VGA_TZOUT2VGA_TZOUT2+

VGA_TZOUT1VGA_TZOUT1+

VGA_TZOUT0VGA_TZOUT0+

GPU_HDMI_TXD2GPU_HDMI_TXD2+

GPU_HDMI_TXD1GPU_HDMI_TXD1+

GPU_HDMI_TXD0GPU_HDMI_TXD0+

GPU_HDMI_TXCGPU_HDMI_TXC+

GPU_HDMI_SDATA GPU_HDMI_SCLK

VGA_DPD_N0 VGA_DPD_P0

VGA_DPD_N1 VGA_DPD_P1

VGA_DPD_N2 VGA_DPD_P2

VGA_DPD_N3 VGA_DPD_P3

+3VALW

G

2

D

13

Q3

(Pull-UP 10K at PCH)

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT .

3

2

10K_0402_5%~D

12

R16

TH_OVERT# 44

JMXM1B

163

GND

165

PEX_RX2 #

167

PEX_RX2

169

GND

171

PEX_RX1 #

173

PEX_RX1

175

GND

177

PEX_RX0 #

179

PEX_RX0

181

GND

183

PEX_REF CLK#

185

PEX_REF CLK

187

GND

189

RSVD

191

RSVD

193

RSVD

195

RSVD

197

RSVD

199

LVDS_UC LK#

201

LVDS_UC LK

203

GND

205

LVDS_UT X3#

207

LVDS_UT X3

209

GND

211

LVDS_UT X2#

213

LVDS_UT X2

215

GND

217

LVDS_UT X1#

219

LVDS_UT X1

221

GND

223

LVDS_UT X0#

225

LVDS_UT X0

227

GND

229

DP_C_L0 #

231

DP_C_L0

233

GND

235

DP_C_L1 #

237

DP_C_L1

239

GND

241

DP_C_L2 #

243

DP_C_L2

245

GND

247

DP_C_L3 #

249

DP_C_L3

251

GND

253

DP_C_AU X#

255

DP_C_AU X

257

RSVD

259

RSVD

261

RSVD

263

RSVD

265

RSVD

267

RSVD

269

RSVD

271

RSVD

273

RSVD

275

RSVD

277

RSVD

279

RSVD

281

GND

283

DP_A_L0 #

285

DP_A_L0

287

GND

289

DP_A_L1 #

291

DP_A_L1

293

GND

295

DP_A_L2 #

297

DP_A_L2

299

GND

301

DP_A_L3 #

303

DP_A_L3

305

GND

307

DP_A_AU X#

309

DP_A_AU X

310

PRSNT_L #

311

GND

JAE_MM70-314-310B1-1

CONN@

2

PEX_CLK _REQ#

VGA_DDC _DAT VGA_DDC _CLK

Link Done

1

+3V_MXM+3V_MXM

+3V_MXM

12

2

G

D

S

D

S

EC_SMB_DA144,48

EC_SMB_CK144,48

GND

PEX_TX2 #

PEX_TX2

GND

PEX_TX1 #

PEX_TX1

GND

PEX_TX0 #

PEX_TX0

GND

PEX_RST #

VGA_VSYNC VGA_HSYNC

GND

VGA_RED

VGA_GRE EN

VGA_BLU E

GND

LVDS_LC LK#

LVDS_LC LK

GND

LVDS_LT X3#

LVDS_LT X3

GND

LVDS_LT X2#

LVDS_LT X2

GND

LVDS_LT X1#

LVDS_LT X1

GND

LVDS_LT X0#

LVDS_LT X0

GND

DP_D_L0 #

DP_D_L0

GND

DP_D_L1 #

DP_D_L1

GND

DP_D_L2 #

DP_D_L2

GND

DP_D_L3 #

DP_D_L3

GND

DP_D_AU X#

DP_D_AU X DP_C_HP D DP_D_HP D

RSVD RSVD RSVD

GND

DP_B_L0 #

DP_B_L0

GND

DP_B_L1 #

DP_B_L1

GND

DP_B_L2 #

DP_B_L2

GND

DP_B_L3 #

DP_B_L3

GND

DP_B_AU X#

DP_B_AU X DP_B_HP D DP_A_HP D

GND

162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258 260 262 264 266 268 270 272 274 276 278 280 282 284 286 288 290 292 294 296 298 300 302 304 306

3V3

308

3V3

312

1 3

Q1

SSM3K7002F_SC59-3~D

PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P2

PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P1

PEG_HTX_C_GRX_N0PEG_GTX_HRX_N0 PEG_HTX_C_GRX_P0

PEG_CLKREQ# PLTRST_VGA# VGA_DDC_DATA VGA_DDC_CLK VGA_CRT_VSYNC VGA_CRT_HSYNC

VGA_CRT_R VGA_CRT_G VGA_CRT_B

VGA_TXCLKVGA_TXCLK+

VGA_TXOUT2VGA_TXOUT2+

VGA_TXOUT1VGA_TXOUT1+

VGA_TXOUT0VGA_TXOUT0+

MXM_TX0N MXM_TX0P

MXM_TX1N MXM_TX1P

MXM_TX2N MXM_TX2P

MXM_TX3N MXM_TX3P

MXM_DPB_AUXN/DDC MXM_DPB_AUXP/DDC VGA_HDMI_DET MXM_DPB_HPD

VGA_DPC_N0 VGA_DPC_P0

VGA_DPC_N1 VGA_DPC_P1

VGA_DPC_N2 VGA_DPC_P2

VGA_DPC_N3 VGA_DPC_P3

VGA_DPC_AUXN/DDC VGA_DPC_AUXP/DDC VGA_DPC_HPD VGA_DMC_HPD

+3V_MXM

40mil(1A)

2

G

D

S

D

S

1 3

Q2

SSM3K7002F_SC59-3~D

PEG_CLKREQ# 16 PLTRST_VGA# 18

VGA_DDC_DATA 27

VGA_DDC_CLK 27 VGA_CRT_VSYNC 27 VGA_CRT_HSYNC 27

VGA_CRT_R 27 VGA_CRT_G 27 VGA_CRT_B 27

VGA_TXCLK- 25 VGA_TXCLK+ 25

VGA_TXOUT2- 25 VGA_TXOUT2+ 25

VGA_TXOUT1- 25 VGA_TXOUT1+ 25

VGA_TXOUT0- 25 VGA_TXOUT0+ 25

MXM_TX0N 23 MXM_TX0P 23

MXM_TX1N 23 MXM_TX1P 23

MXM_TX2N 23 MXM_TX2P 23

MXM_TX3N 23 MXM_TX3P 23

MXM_DPB_AUXN/DDC 23

MXM_DPB_AUXP/DDC 23 VGA_HDMI_DET 28 MXM_DPB_HPD 23

VGA_DPC_N0 29 VGA_DPC_P0 29

VGA_DPC_N1 29 VGA_DPC_P1 29

VGA_DPC_N2 29 VGA_DPC_P2 29

VGA_DPC_N3 29 VGA_DPC_P3 29

VGA_DPC_AUXN/DDC 29

VGA_DPC_AUXP/DDC 29 VGA_DPC_HPD 29 VGA_DMC_HPD 30

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

MXMIII Connector A

LA-6601P

1

4.7K_0402_5%~DR24.7K_0402_5%~D

4.7K_0402_5%~DR14.7K_0402_5%~D

12

R1

R2

VGA_SMB_DA1

VGA_SMB_CK1

CRT

LVDS

eDP

mDP

1.0

14 63Tuesday, November 30, 2010

1.0

5

D D

+RTCVCC

1M_0402_5%~D

W=20mils

2

W=20mils

1 2

3

RH55

1K_0402_5%~D

SM_INTRUDER#

+RTCVCC

RH25 20K_0402_5%~DRH25 20K_0402_5%~D

+CHGRTC

+RTCBATT

HDA_SDOUT

HDA_BIT_CLK

HDA_RST#

HDA_SYNC_R

1M_0402_5%~D

12

R1960

RH36 0_0402_5%~D

1 2

PCH_SPI_CS# PCH_SPI_SO PCH_SPI_SO_R

1 2

RH23 20K_0402_5%~DRH23 20K_0402_5%~D

1 2

+5VS

G

2

HDA_SYNC

13

D

S

D

S

QH1

BSS138_SOT23~D

@

1 2

RH5351_0402_5% RH5351_0402_5%

12

RH40200_0402_5% @ RH40200_0402_5% @

RH39200_0402_5% @ RH39200_0402_5% @

RH38200_0402_5% @ RH38200_0402_5% @

100_0402_1%~D

12

RH46

RH58

0_0402_5%~D

1 2

RH62

0_0402_5%~D

SPI BIOS Pinout

(1)CS# (5)DIO (2)DO (6)CLK (3)WP# (7)HOLD # (4)GND (8)VCC

W25X32

PCH_JTAG_TCK

PCH_JTAG_TDI

PCH_JTAG_TMS

PCH_JTAG_TDO

100_0402_1%~D

12

RH45

+3V_PCH

3.3K_0402_5%

RH57

1 2

RH11

+RTCVCC

C C

HDA_SDOUT_AUDIO34

HDA_BITCLK_AUDIO34

HDA_RST_AUDIO#34

HDA_SYNC_AUDIO34

B B

A A

RTC Battery

W=20mils

1

1U_0603_10V4Z~D

CH7

1

CHN202UPT_SC70-3

2

RH30 33_0402_5%~DRH30 33_0402_5%~D

RH27 33_0402_5%~DRH27 33_0402_5%~D

RH28 33_0402_5%~DRH28 33_0402_5%~D

RH33 33_0402_5%~DRH33 33_0402_5%~D

+3V_PCH

PCH_SPI_CLK

RH59

@

33_0402_5%~D

1 2

22P_0402_50V8J~D

1

@

CH8

2

Reserve for EMI please close to U48

DH1

1 2

5

4

CMOS

1

12

COMS1

@COMS1

CH4

1U_0603_10V4Z~D

CH5

1U_0603_10V4Z~D

100_0402_1%~D

12

RH44

@

PCH_SPI_CS#_R

PCH_SPI_WP#

2

1

2

CLP1 & CLP2 place near DIMM

HDA_SDO44

+3V_PCH

@

SHORT PADS

12

ME1

@ME1

@

SHORT PADS

ME CMOS

HDA_SPKR34

HDA_SDIN034

1 2

RH50 0_0402_5%~DRH50 0_0402_5%~D

EDP_DETECT#25

PCH_JTAG_TCK5

PCH_JTAG_TMS5

PCH_JTAG_TDI5

PCH_JTAG_TDO5

RH54 3.3K_0402_5%RH54 3.3K_0402_5%

1 2

RH56 3.3K_0402_5%RH56 3.3K_0402_5%

1 2

U48

1

CS#

VCC

2

DO

HOLD#

3

WP#

CLK

4

GND

DI

W25Q32BVSSIG_SO8

SPI ROM FOR ME ( 4MByte )

4

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

EDP_DETECT#

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS#

PCH_SPI_SI

PCH_SPI_SO

PCH_SPI_HOLD#

8 7 6 5

HDA_SDOUT

PCH_SPI_WP#

PCH_SPI_HOLD# PCH_SPI_CLK_R

PCH_SPI_SI_R

0_0402_5%~D

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST # / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

CougarPoint_Rev_1p0

1 2

PCH_SPI_CLK

RH6015_0402_5%~D RH6015_0402_5%~D

PCH_SPI_SI

RH61

3

CH218P_0402_50V8J~D CH218P_0402_50V8J~D

12

10M_0402_5%~D

12

RH2

CH318P_0402_50V8J~D CH318P_0402_50V8J~D

12

LPC_AD0

C38

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

RTCIHDA

JTAG

SPI

3

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

+3V_PCH

0.1U_0402_16V4Z~D

CH6

1

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

BBS_BIT0_R

LPC_AD0 44 LPC_AD1 44 LPC_AD2 44 LPC_AD3 44

LPC_FRAME# 44

SERIRQ 44

SATA_PRX_DTX_N1 36 SATA_PRX_DTX_P1 36

SATA_PTX_DRX_N1 36 SATA_PTX_DRX_P1 36

SATA_PRX_DTX_N0 36 SATA_PRX_DTX_P0 36

SATA_PTX_DRX_N0 36 SATA_PTX_DRX_P0 36

SATA_PRX_DTX_N2 37 SATA_PRX_DTX_P2 37

SATA_PTX_DRX_N2 37 SATA_PTX_DRX_P2 37

SATA_PRX_DTX_N4 40 SATA_PRX_DTX_P4 40

SATA_PTX_DRX_N4 40 SATA_PTX_DRX_P4 40

1 2

RH41 37.4_0402_1%RH41 37.4_0402_1%

1 2

RH43 49.9_0402_1%RH43 49.9_0402_1%

1 2

RH48 750_0402_1%RH48 750_0402_1%

+1.05VS_VCC_SATA

+1.05VS_SATA3

PCH_SATALED# 42

2

PCH_RTCX2

PCH_RTCX1

HDD2

HDD1

ODD

E-SATA

2

YH1

4

1

Far away hot sp ot

3

OSC

NC

2

OSC

NC

32.768KHZ_12.5PF_Q13MC14610002

1

SERIRQ

PCH_GPIO21

PCH_SATALED#

BBS_BIT0_R

INTVRMEN

H：Integrated VRM enable

*

L： Integrated VRM disable

HDA_SPKR

HDA_SDOUT

HDA_SDO

ME debug mode , this signal has a weak internal PD L=>security measures defined in the Flash

Descriptor will be in effect (default) H=>Flash Descriptor Security will be overridden

HDA_SYNC

This signal has a weak internal pull-down On Die PLL VR is supplied by

1.5V when smapled high

1.8V when sampled low Needs to be pulled High for Huron River platfrom

+3V_PCH

RH29 10K_0402_5%~DRH29 10K_0402_5%~D

RH32 10K_0402_5%~DRH32 10K_0402_5%~D

RH35 10K_0402_5%~DRH35 10K_0402_5%~D

RH47 10K_0402_5%~DRH47 10K_0402_5%~D

+RTCVCC

12

330K_0402_5%

PCH_INTVRMEN

330K_0402_5%

1 2

LOW=Default HIGH=No Reboot

RH42 1K_0402_5%~D@RH42 1K_0402_5%~D@

Low = Disabled

*

High = Enabled

1 2

RH521K_0402_5%~D RH521K_0402_5%~D

12

HDA_SYNC

RH37 1K_0402_5%~D@RH37 1K_0402_5%~D@

*

12

@RH34

@

RH31

RH34

+3VS

+3V_PCH

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC

LA-6601P

1

15 63Tuesday, November 30, 2010

+3VS

1.0

5

PCIE_PRX_GLANTX_N333

10/100/1G LAN --->

MiniDMC (Mini Card 2)--->

D D

MiniWLAN (Mini Card 1)--->

CARD_READER --->

USB 3.0 --->

C C

PCIE_PRX_GLANTX_P333

PCIE_PTX_GLANRX_N333 PCIE_PTX_GLANRX_P333

PCIE_PRX_WANTX_N238 PCIE_PRX_WANTX_P238

PCIE_PTX_WANRX_N238 PCIE_PTX_WANRX_P238

PCIE_PRX_WLANTX_N138 PCIE_PRX_WLANTX_P138

PCIE_PTX_WLANRX_N138 PCIE_PTX_WLANRX_P138

PCIE_PRX_CARDTX_N435 PCIE_PRX_CARDTX_P435

PCIE_PTX_CARDRX_N435 PCIE_PTX_CARDRX_P435

PCIE_PRX_USB3TX_N639 PCIE_PRX_USB3TX_P639

PCIE_PTX_USB3RX_N639 PCIE_PTX_USB3RX_P639

10/100/1G LAN --->

CLK_PCIE_MINI2#38

MiniDMC (Mini Card 2)--->

MiniWLAN (Mini Card 1)--->

CLK_PCIE_MINI238

CLK_PCIE_MINI1#38 CLK_PCIE_MINI138

Card Reader --->

B B

CLK_PCIE_USB30#39 CLK_PCIE_USB3039

USB 3.0 --->

CLK_CPU_ITP#5 CLK_CPU_ITP5

CLK_RES_ITP#7 CLK_RES_ITP7

XTAL25_IN

1

2

12P_0402_50V8J~D

CH24

XTAL25_OUT

RH117

12

1M_0402_5%~D

A A

1M_0402_5%~D

YH2

1 2

25MHZ_12PF_X5H025000DC1H-H

12P_0402_50V8J~D

CH23

1

2

5

+3V_PCH

CLK_PCIE_LAN#33 CLK_PCIE_LAN33

+3VS

LANCLK_REQ#33

MINI2CLK_REQ#38

+3V_PCH

MINI1CLK_REQ#38

CLK_PCIE_CD#35 CLK_PCIE_CD35

+3V_PCH

CDCLK_REQ#35

+3V_PCH

USB30_CLKREQ#39

+3V_PCH

VGA_ON14

CLK_CPU_ITP# CLK_CPU_ITP

CLK_RES_ITP# CLK_RES_ITP

+3VS

CH9 0.1U_0402_10V7K~DCH9 0.1U_0402_10V7K~D

1 2

CH14 0.1U_0402_10V7K~DCH14 0.1U_0402_10V7K~D

1 2

CH10 0.1U_0402_10V7K~DCH10 0.1U_0402_10V7K~D

1 2

CH15 0.1U_0402_10V7K~DCH15 0.1U_0402_10V7K~D

1 2

CH11 0.1U_0402_10V7K~DCH11 0.1U_0402_10V7K~D

1 2

CH16 0.1U_0402_10V7K~DCH16 0.1U_0402_10V7K~D

1 2

CH12 0.1U_0402_10V7K~DCH12 0.1U_0402_10V7K~D

1 2

CH13 0.1U_0402_10V7K~DCH13 0.1U_0402_10V7K~D

1 2

CH19 0.1U_0402_10V7K~DCH19 0.1U_0402_10V7K~D

1 2

CH20 0.1U_0402_10V7K~DCH20 0.1U_0402_10V7K~D

1 2

RH91 10K_0402_5%~DRH91 10K_0402_5%~D

RH93 0_0402_5%~DRH93 0_0402_5%~D RH94 0_0402_5%~DRH94 0_0402_5%~D RH95 10K_0402_5%~D@ RH95 10K_0402_5%~D@

RH96 0_0402_5%~DRH96 0_0402_5%~D RH97 0_0402_5%~DRH97 0_0402_5%~D RH100 10K_0402_5%~DRH100 10K_0402_5%~D

RH101 0_0402_5%~DRH101 0_0402_5%~D RH102 0_0402_5%~DRH102 0_0402_5%~D RH103 10K_0402_5%~DRH103 10K_0402_5%~D

RH104 0_0402_5%~DRH104 0_0402_5%~D RH106 0_0402_5%~DRH106 0_0402_5%~D RH107 10K_0402_5%~DRH107 10K_0402_5%~D

RH110 10K_0402_5%~DRH110 10K_0402_5%~D

RH112 10K_0402_5%~DRH112 10K_0402_5%~D

RH114 0_0402_5%~DRH114 0_0402_5%~D RH115 0_0402_5%~DRH115 0_0402_5%~D RH116 10K_0402_5%~DRH116 10K_0402_5%~D

RH118 10K_0402_5%~D@RH118 10K_0402_5%~D@

RH119 0_0402_5%~DRH119 0_0402_5%~D RH120 0_0402_5%~DRH120 0_0402_5%~D

RH121 0_0402_5%~D@RH121 0_0402_5%~D@ RH122 0_0402_5%~D@RH122 0_0402_5%~D@

1 2

1 2 1 2 1 2

1 2

12 12 12

12 12

4

PCIE_PRX_GLANTX_N3 PCIE_PRX_GLANTX_P3 PCIE_PTX_GLANRX_N3_C PCIE_PTX_GLANRX_P3_C

PCIE_PRX_WANTX_N2 PCIE_PRX_WANTX_P2 PCIE_PTX_WANRX_N2_C PCIE_PTX_WANRX_P2_C

PCIE_PRX_WLANTX_N1 PCIE_PRX_WLANTX_P1 PCIE_PTX_WLANRX_N1_C PCIE_PTX_WLANRX_P1_C

PCIE_PRX_CARDTX_N4 PCIE_PRX_CARDTX_P4 PCIE_PTX_CARDRX_N4_C PCIE_PTX_CARDRX_P4_C

PCIE_PRX_USB3TX_N6 PCIE_PRX_USB3TX_P6 PCIE_PTX_USB3RX_N6_C PCIE_PTX_USB3RX_P6_C

4

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

PCIECLKREQ0#

PCIE_LAN# PCIE_LAN

LANCLK_REQ#

PCIE_MINI2# PCIE_MINI2

MINI2CLK_REQ#

PCIE_MINI1# PCIE_MINI1

MINI1CLK_REQ#

PCIE_CD# PCIE_CD

CDCLK_REQ#

PEG_B_CLKREQ#

PCIE_USB30# PCIE_USB30

USB30_CLKREQ#

VGA_ON

CLK_BCLK_ITP# CLK_BCLK_ITP

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

CougarPoint_Rev_1p0

CLK_PCH_14M CLK_PCI_LPBACK

33_0402_5%~D

RH86

@

1 2

1

2

Reserve for EMI please close t o UH1

3

PCH_LID_SW_IN# LID_SW_IN#

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

PCI-E*

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLOCKS

33_0402_5%~D

RH89

@

22P_0402_50V8J~D

CH21

1 2

22P_0402_50V8J~D

@

22P_0402_50V8J~D

@

CH22

1

2

CLKOUT_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

3

CLKOUT_DP_N CLKOUT_DP_P

E12

SMBCLK

H14

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKIN_DMI_N CLKIN_DMI_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT .

SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

SML0CLK

C8

SML0DATA

G12

C13

SML1CLK

E14

SML1DATA

M16

M7

T11

P10

PEG_CLKREQ#_R

M10

CLK_PEG_PCH#

AB37

CLK_PEG_PCH

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

CLK_CPU_DPLL#

AM12

CLK_CPU_DPLL

AM13

CLKIN_DMI#

BF18

CLKIN_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLKIN_DOT96#

G24

CLKIN_DOT96

E24

CLKIN_SATA#

AK7

CLKIN_SATA

AK5

CLK_PCH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

KB_DET#

K43

DMC_PCH_DET#

F47

BT_DET#

H47

CAM_DET#

K49

GPIO74

1 2

MEMORY

DRAMRST_CNTRL_PCH 6

RH87

10K_0402_5%~D

CLK_PEG_PCH# 14 CLK_PEG_PCH 14

CLK_CPU_DMI# 5 CLK_CPU_DMI 5

CLK_CPU_DPLL# 5 CLK_CPU_DPLL 5

CLK_PCI_LPBACK 18

1 2

RH113 90.9_0402_1%RH113 90.9_0402_1%

KB_DET# 46

DMC_PCH_DET# 38

BT_DET# 38

CAM_DET# 24,26

2

EC_LID_OUT#

RH680_0402_5%~D RH680_0402_5%~D

RH710_0402_5%~D @RH710_0402_5%~D @

+3V_PCH

12

10K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

VGA

DMN66D0LDW-7_SOT363-6~D

+1.05VS_VCCDIFFCLKN

2

EC_LID_OUT# 44

LID_SW_IN# 41,42,44

+3V_MXM

12

R21

2

G

QH2A

6

D

12

RH92

@RH92

@

10K_0402_5%~D

QH3A

SMBCLK

SMBDATA

SMBCLK

SMBDATA

SML0CLK

SML0DATA

DRAMRST_CNTRL_PCH

GPIO74

SML1CLK

SML1DATA

+3V_MXM

12

RH85

1K_0402_5%~D

5

G

3

4

D

S

QH2B

1 2

5

3

D

RH111

1 2

0_0402_5%~D

G

@RH111

@

QH2B

RH900_0402_5%~D @RH900_0402_5%~D @

+3VS

2.2K_0402_5%~D

RH98

1 2

QH3B

DMN66D0LDW-7_SOT363-6~D

4

S

RH76 10K_0402_5%~DRH76 10K_0402_5%~D

1 2

RH77 10K_0402_5%~DRH77 10K_0402_5%~D

1 2

RH78 10K_0402_5%~DRH78 10K_0402_5%~D

1 2

RH79 10K_0402_5%~DRH79 10K_0402_5%~D

1 2

RH80 10K_0402_5%~DRH80 10K_0402_5%~D

1 2

RH81 10K_0402_5%~DRH81 10K_0402_5%~D

1 2

RH82 10K_0402_5%~DRH82 10K_0402_5%~D

1 2

RH83 10K_0402_5%~DRH83 10K_0402_5%~D

1 2

RH84 10K_0402_5%~DRH84 10K_0402_5%~D

1 2

DMN66D0LDW-7_SOT363-6~D

1

S

+3VS

2

G

6

1

D

S

RH105

@RH105

@

1 2

0_0402_5%~D

KB_DET#

CAM_DET#

DMC_PCH_DET#

BT_DET#

CLKIN_DMI2# CLKIN_DMI2 CLKIN_DMI# CLKIN_DMI CLKIN_DOT96# CLKIN_DOT96 CLKIN_SATA# CLKIN_SATA CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen else, please place close to PCH

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

1

PEG_CLKREQ# 14

12

RH88

@RH88

@

10K_0402_5%~D

2.2K_0402_5%~D

RH99

1 2

PCH_SMBCLK 5,10,11,12,13,37,38

PCH_SMBDATA 5,10,11,12,13,37,38

R1745100K_0402_5%~D R1745100K_0402_5%~D

1 2

RH16610K_0402_5%~D RH16610K_0402_5%~D

1 2

RH10910K_0402_5%~D RH10910K_0402_5%~D

1 2

RH10810K_0402_5%~D RH10810K_0402_5%~D

1 2

LA-6601P

1

1 2

+3VS

16 63Tuesday, November 30, 2010

+3V_PCH

RH672.2K_0402_5%~D RH672.2K_0402_5%~D

RH692.2K_0402_5%~D RH692.2K_0402_5%~D

RH702.2K_0402_5%~D RH702.2K_0402_5%~D

RH722.2K_0402_5%~D RH722.2K_0402_5%~D

RH751K_0402_5%~D RH751K_0402_5%~D

RH16710K_0402_5%~D RH16710K_0402_5%~D

RH742.2K_0402_5%~D RH742.2K_0402_5%~D

RH732.2K_0402_5%~D RH732.2K_0402_5%~D

1.0

5

UH1C

D D

C C

B B

A A

DMI_CTX_PRX_N04 DMI_CTX_PRX_N14 DMI_CTX_PRX_N24 DMI_CTX_PRX_N34

DMI_CTX_PRX_P04 DMI_CTX_PRX_P14 DMI_CTX_PRX_P24 DMI_CTX_PRX_P34

DMI_CRX_PTX_N04 DMI_CRX_PTX_N14 DMI_CRX_PTX_N24 DMI_CRX_PTX_N34

DMI_CRX_PTX_P04 DMI_CRX_PTX_P14 DMI_CRX_PTX_P24 DMI_CRX_PTX_P34

+1.05VS

SG_AMD_BKL26,44

XDP_DBRESET#5

SYSTEM_PWROK5,44

PCH_PWROK5,44

PCH_APWROK44

PM_DRAM_PWR GD5

PCH_RSMRST#44

SUSWARN#44

PBTN_OUT#5,44

R1899

10K_0402_5%

2

ACIN14,41,44,50

QH11A

DMN66D0LDW-7_SOT363-6~D

QH11A

G

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

RH124 49.9_0402_1%RH124 49.9_0402_1%

1 2

RH125 750_0402_1%~DRH12 5 750_0 402_1%~D

4mil width and place within 500mil of the PCH

1 2

RH127 0_0402_5%~D@ RH127 0_0402_5%~D@

XDP_DBRESET#

1 2

RH129 0_0402_5%~DRH129 0_0402_5%~D

1 2

RH130 0_0402_5%~DRH130 0_0402_5%~D

1 2

RH131 0_0402_5%~DRH131 0_0402_5%~D

PM_DRAM_PWR GD

1 2

RH133 0_0402_5%~DRH133 0_0402_5%~D

1 2

RH134 0_0402_5%~D@ RH134 0_0402_5%~D@

1 2

RH135 0_0402_5%~DRH135 0_0402_5%~D

+3V_PCH

12

R1900

12

6

D

S

1

R1900 10K_0402_5%

10K_0402_5%

3

D

5

G

S

4

DMI_IRCOMP

RBIAS_CPY

SUSACK#_R

PM_PWROK_R

PCH_RSMRST#_R

GPIO30

PBTN_OUT#_R

ACIN_PCH

BATLOW#

RI#

ACIN_PCH

DMN66D0LDW-7_SOT363-6~D

GPIO3028

QH11B

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

CougarPoint_Rev_1p0

BATLOW#

RI#

WAKE#

GPIO30

RH143 10K_0402_5%~DRH143 10K_0402_5%~D

RH145 10K_0402_5%~DRH145 10K_0402_5%~D

RH146 1K_0402_5%~DRH146 1K_0402_5%~D

RH154 10K_0402_5%~D@RH154 10K_0402_5%~D@

1 2

4

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

+3V_PCH

FDI_CTX_PRX_N0

BJ14

FDI_CTX_PRX_N1

AY14

FDI_CTX_PRX_N2

BE14

FDI_CTX_PRX_N3

BH13

FDI_CTX_PRX_N4

BC12

FDI_CTX_PRX_N5

BJ12

FDI_CTX_PRX_N6

BG10

FDI_CTX_PRX_N7

BG9

FDI_CTX_PRX_P0

BG14

FDI_CTX_PRX_P1

BB14

FDI_CTX_PRX_P2

BF14

FDI_CTX_PRX_P3

BG13

FDI_CTX_PRX_P4

BE12

FDI_CTX_PRX_P5

BG12

FDI_CTX_PRX_P6

BJ10

FDI_CTX_PRX_P7

BH9

FDI_INT

AW16

FDI_FSYNC0

AV12

FDI_FSYNC1

BC10

FDI_LSYNC0

AV14

FDI_LSYNC1

BB10

DSWODVREN

A18

PCH_DPWROK_R

E22

WAKE#

B9

N3

SUS_STAT#

G8

SUSCLK

N14

D10

H4

F4

G10

G16

AP14

K14

DSWODVREN - On Die DSW VR Enable

H：Enable

*

L：Disable

RH126 0_0402_5%~DRH126 0_0402_5%~D

RH159 0_0402_5%~D@RH159 0_0402_5%~D@

1 2

RH128 0_0402_5%~DRH128 0_0402_5%~D

PM_CLKRUN#

RH132 0_0402_5%~DRH132 0_0402_5%~D

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_SUS#

H_PM_SYNC

DSWODVREN

12

If not using in tegrated LAN,signal may be left as NC.

FDI_CTX_PRX_N0 4 FDI_CTX_PRX_N1 4 FDI_CTX_PRX_N2 4 FDI_CTX_PRX_N3 4 FDI_CTX_PRX_N4 4 FDI_CTX_PRX_N5 4 FDI_CTX_PRX_N6 4 FDI_CTX_PRX_N7 4

FDI_CTX_PRX_P0 4 FDI_CTX_PRX_P1 4 FDI_CTX_PRX_P2 4 FDI_CTX_PRX_P3 4 FDI_CTX_PRX_P4 4 FDI_CTX_PRX_P5 4 FDI_CTX_PRX_P6 4 FDI_CTX_PRX_P7 4

FDI_INT 4

FDI_FSYNC0 4

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_LSYNC1 4

1 2

T76 PAD~D@T76 PAD~D@

PM_SLP_S5# 41,44

PM_SLP_S4# 44

PM_SLP_S3# 41,44

PM_SLP_SUS# 44

H_PM_SYNC 5

+RTCVCC

12

RH147

RH147 330K_0402_5%

330K_0402_5%

@ RH151

@

330K_0402_5%

1 2

PCIE_WAKE# 33,38,39,44

SUSCLK_R 44

RH151

3

IGPU_BKLT_EN26

PCH_ENVDD26,44

PCH_INV_PWM26

PCH_LCD_CLK26

PCH_LCD_DATA26

RH144 2.37K_0402_1%~DRH144 2.37K_0402_1%~D

12

Minimum speacing of 20mils for LVD_IBG

PCH_TXCLK-25 PCH_TXCLK+25

PCH_TXOUT0-25 PCH_TXOUT1-25 PCH_TXOUT2-25

PCH_TXOUT0+25 PCH_TXOUT1+25 PCH_TXOUT2+25

PCH_RSMRST#_R

PCH_DPWROK 44

PCH_CRT_HSYNC27 PCH_CRT_VSYNC27

Can be left NC when IAMT is not support on the platfrom

+3VS

RH148 2.2K_0402_5%~DRH148 2.2K_0402_5%~D

RH152 2.2K_0402_5%~DRH152 2.2K_0402_5%~D

RH155 2.2K_0402_5%~DRH155 2.2K_0402_5%~D

RH157 2.2K_0402_5%~DRH157 2.2K_0402_5%~D

R78 8.2K_0402_5%@R78 8.2K_0402_5%@

RV1 2.2K_0402_5%~DRV1 2.2K_0402 _5%~D

RV2 2.2K_0402_5%~DRV2 2.2K_0402 _5%~D

PCH_TZCLK-25 PCH_TZCLK+25

PCH_TZOUT0-25 PCH_TZOUT1-25 PCH_TZOUT2-25

PCH_TZOUT0+25 PCH_TZOUT1+25 PCH_TZOUT2+25

PCH_CRT_BLU27 PCH_CRT_GRN27 PCH_CRT_RED27

PCH_CRT_DDC_CLK27

PCH_CRT_DDC_DAT27

RH136 33_0402_5%~DRH136 33_0402_5%~D

1 2

RH138 33_0402_5%~DRH138 33_0402_5%~D

1 2

1K_0402_0.5%~D

1 2

CTRL_CLK CTRL_DATA

LVDS_IBG

PCH_TXCLKPCH_TXCLK+

PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-

PCH_TXOUT0+ PCH_TXOUT1+ PCH_TXOUT2+

PCH_TZCLKPCH_TZCLK+

PCH_TZOUT0PCH_TZOUT1PCH_TZOUT2-

PCH_TZOUT0+ PCH_TZOUT1+ PCH_TZOUT2+

PCH_CRT_BLU PCH_CRT_GRN PCH_CRT_RED

PCH_CRT_DDC_CLK PCH_CRT_DDC_DAT

CRT_IREF

12

RH140

PCH_CRT_DDC_CLK

PCH_CRT_DDC_DAT

CTRL_CLK

CTRL_DATA

PM_CLKRUN#

PCH_LCD_CLK

PCH_LCD_DATA

HSYNC VSYNC

2

UH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

CougarPoint_Rev_1p0

1 2

R1696 10K_0402_5%~DR1696 10K_0402_5%~D

1 2

RH142 110K_0402_1%~DRH142 110K_0402_1%~D

1 2

RH149 150_0402_1%RH149 150_0402_1%

1 2

RH153 150_0402_1%RH153 150_0402_1%

1 2

RH156 150_0402_1%RH156 150_0402_1%

1 2

RH158 100K_0402_5%~DRH158 100K_0402_5%~D

1 2

RH123 100K_0402_5%~DRH123 100K_0402_5%~D

1 2

R1697 10K_0402_5%~DR1697 10K_0402_5%~D

LVDS

Digital Display Interface

CRT

PM_CLKRUN#

TMDS_B_HPD

PCH_CRT_BLU

PCH_CRT_GRN

PCH_CRT_RED

PCH_ENVDD

IGPU_BKLT_EN

PCH_RSMRST#

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

HDMI

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

mDP

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DMC HDMI

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

HDMICLK_NB HDMIDAT_NB

TMDS_B_HPD

TMDS_B_DATA2# TMDS_B_DATA2 TMDS_B_DATA1# TMDS_B_DATA1 TMDS_B_DATA0# TMDS_B_DATA0 TMDS_B_CLK# TMDS_B_CLK

PCH_DPC_CLK PCH_DPC_DAT

PCH_DPC_AUXN PCH_DPC_AUXP DP_HPD

PCH_DPC_N0 PCH_DPC_P0 PCH_DPC_N1 PCH_DPC_P1 PCH_DPC_N2 PCH_DPC_P2 PCH_DPC_N3 PCH_DPC_P3

PCH_DPD_CLK PCH_DPD_DAT

PCH_DMC_HPD

PCH_DPD_N0 PCH_DPD_P0 PCH_DPD_N1 PCH_DPD_P1 PCH_DPD_N2 PCH_DPD_P2 PCH_DPD_N3 PCH_DPD_P3

1

HDMICLK_NB 28

HDMIDAT_NB 28

TMDS_B_HPD 28

TMDS_B_DATA2# 28 TMDS_B_DATA2 28 TMDS_B_DATA1# 28 TMDS_B_DATA1 28 TMDS_B_DATA0# 28 TMDS_B_DATA0 28 TMDS_B_CLK# 28 TMDS_B_CLK 2 8

PCH_DPC_CLK 29

PCH_DPC_DAT 29

PCH_DPC_AUXN 2 9 PCH_DPC_AUXP 29

DP_HPD 29

PCH_DPC_N0 29 PCH_DPC_P0 29 PCH_DPC_N1 29 PCH_DPC_P1 29 PCH_DPC_N2 29 PCH_DPC_P2 29 PCH_DPC_N3 29 PCH_DPC_P3 29

PCH_DPD_CLK 30

PCH_DPD_DAT 30

PCH_DMC_HPD 30

PCH_DPD_N0 30 PCH_DPD_P0 30 PCH_DPD_N1 30 PCH_DPD_P1 30 PCH_DPD_N2 30 PCH_DPD_P2 30 PCH_DPD_N3 30 PCH_DPD_P3 30

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

LA-6601P

17 63Tuesday, November 30, 2010

1

1.0

5

D D

C C

B B

A A

CLK_PCI_LPBACK16

CLK_PCI_LPC44

+3VS

RH173 10K_0402_5%~D@RH173 10K_0402_5%~D@

CLK_PCI_LPBACK CLK_PCI_LPC

RPH3

8.2K_8P4R_5%

RPH5

8.2K_8P4R_5%

RPH4

8.2K_8P4R_5%

18

PCI_PIRQB#

27

PCI_PIRQD#

36

PCI_PIRQC#

45

DMC_RADIO_OFF#

18 27

DGPU_SELECT#

36 45

HDMI_IN_PWMSEL#

18

PCI_PIRQA#

27 36 45

DGPU_HOLD_RST#

12

4

DGPU_SELECT#23,25,26,27,28 DGPU_PWR_EN47

DMC_RADIO_OFF#38 HDMI_IN_PWMSEL#26

WL_OFF#38

FFS_INT137 ODD_DA#37

DP_CBL_DET29

BT_ON#38

T123PAD~D @T123PAD~D @

RH164 22_0402_5%RH164 22_0402_5% RH165 22_0402_5%RH165 22_0402_5%

WL_OFF#

BT_ON#

FFS_INT1

ODD_DA#

1 2

12

T165PAD~D @T165PAD~D @ T166PAD~D @T166PAD~D @ T124PAD~D @T124PAD~D @

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# DGPU_SELECT# DGPU_PWR_EN

DMC_RADIO_OFF# HDMI_IN_PWMSEL# WL_OFF#

FFS_INT1 ODD_DA# DP_CBL_DET BT_ON#

PCH_PLTRST#

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4

BG26

BH25

BG16 AH38 AH37 AK43 AK45

AH12

AB46 AB45

AY16 BG46

BE28 BC30 BE32

BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28

AW30

PLT_RST#5,33,35,38,39,44

UH1E

TP1

BJ26

TP2 TP3

BJ16

TP4 TP5 TP6 TP7 TP8 TP9

C18

TP10

N30

TP11

H3

TP12 TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18 TP19 TP20

B21

TP21

M20

TP22 TP23 TP24

TP25 TP26 TP27

BJ32

TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

CougarPoint_Rev_1p0

+3VS

3

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

USB

4

RSVD22

AV5

RSVD23

AV10

RSVD24

AT8

RSVD25

AY5

RSVD26

BA2

RSVD27

AT12

RSVD28

BF3

RSVD29

C24

USBP0N

A24

USBP0P

C25

USBP1N

B25

USBP1P

C26

USBP2N

A26

USBP2P

K28

USBP3N

H28

USBP3P

E28

USBP4N

D28

USBP4P

C28

USBP5N

A28

USBP5P

C29

USBP6N

B29

USBP6P

N28

USBP7N

M28

USBP7P

L30

USBP8N

K30

USBP8P

G30

USBP9N

E30

USBP9P

C30

USBP10N

A30

USBP10P

L32

USBP11N

K32

USBP11P

G32

USBP12N

E32

USBP12P

C32

USBP13N

A32

USBP13P

C33

USBRBIAS#

B33

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC6# / GPIO10 OC7# / GPIO14

O

A14 K20 B17 C16 L16 A16

OC5# / GPIO9

D14 C14

+3VS

C1805 .1U_0402_16V7K~DC1805 .1U_0402_16V7K~D

5

1

P

IN1

2

IN2

G

UH5

3

SN74AHC1G08DCKR_SC70-5

NV_ALE

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7 USB20_N8 USB20_P8 USB20_N9 USB20_P9

Within 500 mils

USBRBIAS

RH163 22.6_0402_1%RH163 22.6_0402_1%

USB_OC0# USB_OC1#

1.5VDDR_VID0

1.5VDDR_VID1 USB_OC2# USB_OC5# USB_OC6# USB3_SMI#

12

PCH_PLTRST#

USB20_N0 40 USB20_P0 40 USB20_N1 40 USB20_P1 40 USB20_N2 24 USB20_P2 24 USB20_N3 26 USB20_P3 26 USB20_N4 38 USB20_P4 38 USB20_N5 38 USB20_P5 38 USB20_N6 41 USB20_P6 41 USB20_N7 46 USB20_P7 46 USB20_N8 38 USB20_P8 38 USB20_N9 40 USB20_P9 40

1 2

USB_OC0# 40 USB_OC1# 40

1.5VDDR_VID0 54

1.5VDDR_VID1 54 USB_OC2# 40

USB3_SMI# 39

USB/B

eDP Camera

LVDS Camera

Mini Card(WLAN)

Mini Card(Mini2)

ELC LED

IR sensor

Bluetooth

USB/ESATA Conn.

(For USB Port 0) (For USB Port 1)

(For USB Port 9)

RSVD

PCI

10K_0402_5%~D

@RH169

@

RH169

1 2

100K_0402_5%~D

12

RH171

2

1

Intel Anti-Theft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

PLTRST_VGA#14

RH160 1K_0402_5%~D@ RH160 1K_0402_5%~D@

+3V_MXM

1 2

100K_0402_5%~D

12

@

RH170

100K_0402_5%~D

12

R28

USB_OC0# USB_OC2# USB3_SMI# USB_OC5#

USB_OC1#

1.5VDDR_VID0

1.5VDDR_VID1 USB_OC6#

4

Y

*

+1.8VS

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%~D

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%~D

+3VS

C1806

.1U_0402_16V7K~D

5

2

P

B

1

A

G

UH6

3

NC7SZ08P5X_NL_SC70-5

+3V_PCH

RPH1

RPH2

12

DGPU_HOLD_RST#

PCH_PLTRST#

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT .

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI, USB, NVRAM

LA-6601P

1

18 63Tuesday, November 30, 2010

1.0

5

+3VS

RH198

2

G

RH198

10K_0402_5%~D

1 2

1

D

QH5

QH5 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

High: CRT Plugged

CRT_DET

D D

CRT_DET#27

GPIO28

On-Die PLL Voltage Regulator This signal has a weak internal pull up

H：On-Die voltage regulator enable

*

L：On-Die PLL Voltage Regulator disable

RH177 1K_0402_5%~D@ RH177 1K_0402_5%~D@

1 2

PCH_GPIO28

PCH_GPIO37

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated

*

to same voltage

C C

(DC Coupling Mode)

+3VS

RH181 1K_0402_5%~D

1K_0402_5%~D

1 2

PCH_GPIO37

12

RH182

10K_0402_5%~D

@RH181

@

GPIO27

PCH_GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable

*

Low: VCCVRM VR Disable

RH186 10K_0402_5%~D@RH186 10K_0402_5%~D@

B B

1 2

PCH_GPIO27

SATA2GP/GPIO36

When Used as SATA2GP/SATA3GP for Mechanical Presence detect

- Use a weak external pull-up (150K-200K ohms) to Vcc3_3 check list Rev 1.0

*

+3VS

ODD_DETECT#

RH255 200K_0402_5%RH255 200K_0402_5%

12

4

UH1F

CRT_DET

DGPU_EDIDSEL#23,26,28

DGPU_HPD_INT#28

BT_RADIO_DIS#38

DGPU_PWROK14

ODD_EN#37

ODD_DETECT#37

VGA_PRSNT_R#14

VGA_PRSNT_L#14

HDD2_DETECT#36

DGPU_EDIDSEL#

DGPU_HPD_INT#

EC_SCI#

EC_SCI#44

EC_SMI#

EC_SMI#44

BT_RADIO_DIS#

PCH_GPIO15

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

ODD_EN#

PCH_GPIO27

PCH_GPIO28

STP_PCI#

ODD_DETECT#

PCH_GPIO37

VGA_PRSNT_R#

VGA_PRSNT_L#

FFS_INT2

FFS_INT237

GPIO49

HDD2_DETECT#

VSS_NCTF_1

VSS_NCTF_2

VSS_NCTF_3

VSS_NCTF_4

VSS_NCTF_5

VSS_NCTF_6

VSS_NCTF_7

VSS_NCTF_8

VSS_NCTF_9

VSS_NCTF_10

VSS_NCTF_11

VSS_NCTF_12

VSS_NCTF_13

VSS_NCTF_14

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

CougarPoint_Rev_1p0

3

2

1

DMI Termination Voltage

DGPU_BKL_PWM_SEL#

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

EDP_CAB_DET#

LVDS_CAB_DET#

PCH_PECI_R

0_0402_5%~D

KB_RST#

H_CPUPWRGD

H_THERMTRIP#_C

INIT3_3V#

NV_CLE

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

1 2

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

GPIO

CPU/MISC

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

@

RH175

10K_0402_5%~D

12

DGPU_BKL_PWM_SEL# 26

EDP_CAB_DET# 23,24

LVDS_CAB_DET# 26

GATEA20 44

H_PECI 5,44

KB_RST# 44

H_CPUPWRGD 5

1 2

@ RH178

@

RH178

RH176390_0402_5% RH176390_0402_5%

H_THRMTRIP# 5

INIT3_3V

This signal has weak internal PU, can't pull low

NV_CLE

DGPU_HPD_INT#

DGPU_EDIDSEL#

VGA_PRSNT_L#

VGA_PRSNT_R#

CRT_DET#

PCH_GPIO16

STP_PCI#

KB_RST#

PCH_GPIO22

GPIO49

LVDS_CAB_DET#

GATEA20

ODD_EN#

HDD2_DETECT#

PCH_GPIO15

EC_SMI#

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal PU,Do not pull low

+1.8VS

12

RH161

2.2K_0402_5%~D

12

RH1621K_0402_5%~D RH1621K_0402_5%~D

CLOSE TO THE BRANCHING POINT

RH179 10K_0402_5%~DRH179 10K_0402_5%~D

1 2

RH180 10K_0402_5%~DRH180 10K_0402_5%~D

1 2

RH183 10K_0402_5%~DRH183 10K_0402_5%~D

1 2

RH184 10K_0402_5%~DRH184 10K_0402_5%~D

1 2

RH192 10K_0402_5%~DRH192 10K_0402_5%~D

1 2

RH194 10K_0402_5%~D@RH194 10K_0402_5%~D@

1 2

RH195 10K_0402_5%~DRH195 10K_0402_5%~D

1 2

RH196 10K_0402_5%~DRH196 10K_0402_5%~D

1 2

RH197 10K_0402_5%~DRH197 10K_0402_5%~D

1 2

RH229 10K_0402_5%~DRH229 10K_0402_5%~D

1 2

RH251 10K_0402_5%~DRH251 10K_0402_5%~D

1 2

RH174 10K_0402_5%~DRH174 10K_0402_5%~D

1 2

RH187 10K_0402_5%~DRH187 10K_0402_5%~D

1 2

RH188 10K_0402_5%~DRH188 10K_0402_5%~D

1 2

RH189 1K_0402_5%~DRH189 1K_0402_5%~D

1 2

RH190 10K_0402_5%~DRH190 10K_0402_5%~D

1 2

H_SNB_IVB# 5

+3VS

+3V_PCH

Layout note: Trace wide 10mil & length 30mil All NCTF pins should have thick traces at 45°from the pad.

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT .

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

LA-6601P

1

19 63Tuesday, November 30, 2010

1.0

5

4

3

2

1

12

1 2

1

CH42

CH42 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+3VS

+1.8VS

RH2040_0805_5% R H2040_0805_5%

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

+1.05VS

VccVRM 1.8 / 1.5 0.16

VccSSC 1.05 0 .095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

Voltage

S0 Iccmax Current (A)

1.05

5

3.3

1.05

1.05VccIO 2.925

1.05VccASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5Vc cSusHDA

1.05VccCLKDMI

0.001

0.266

0.001

0.08

1.3

0.042

0.119

0.01

0.02

0.001

LH1

0.01U_0402_16V7K~D

0.1U_0402_10V7K~D

UH1G

+1.05VS

D D

+1.05VS

RH201

C C

+1.05VS

+3VS

+1.05VS

@

RH208

B B

Place CH64 Near BG6 pin

J10

@J10

@

12

PAD-OPEN 4x4m

+1.05VS

RH200 0_0603_5%~DRH200 0_0603_5%~D

+VCCAPLLEXP_R

12

0_0603_5%~D@

Place CH35 Near BJ22 pin

RH203 0_0805_5%RH203 0_0805_5%

1 2

12

RH206

RH206 0_0805_5%

0_0805_5%

+3VS_VCCA3GBG

1

CH44

0.1U_0402_10V7K~D

2

12

0_0603_5%~D

1U_0402_6.3V6K~D

1

@

CH46

2

+1.05VS_VCCCORE

1U_0402_6.3V6K~D

10U_0805_4VAM~D

CH27

1

CH28

2

12

1 2

LH3

@LH3

@

1UH_LB2012T1R0M_20%~D

+1.05VS_VCC_EXP

1U_0402_6.3V6K~D

10U_0805_4VAM~D

CH37

1

2

+1.05VS_VCCAPLL_FDI

+1.05VS

1U_0402_6.3V6K~D

1

CH38

2

1 2

RH209 0_0805_5%RH209 0_0805_5%

+VCCP_VCCDMI

1U_0402_6.3V6K~D

1

CH25

2

+1.05VS_VCCDPLLEXP

10U_0805_4VAM~D

1

2

1U_0402_6.3V6K~D

1

CH39

CH40

2

+1.05VS_VCCDPLL_FDI

1U_0402_6.3V6K~D

1

CH26

2

+VCCAPLLEXP

@

CH35

1U_0402_6.3V6K~D

1

CH41

2

+VCCAFDI_VRM

UH1G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

CougarPoint_Rev_1p0

2925mA

POWER

VCC CORE

VCCIO

FDI

CRTLVDS

60mA

DMI

20mA

190mA

DFT / SPI HVCMOS

1mA

VCCADAC

VSSADAC

1mA

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

20mA

VCCSPI

+VCCADAC

U48

U47

+VCCA_LVDS

AK36

AK37

AM37

AM38

AP36

AP37

+3VS_VCC3_3_6

V33

V34

+VCCAFDI_VRM

AT16

+VCCP_VCCDMI

AT20

+1.05VS_VCC_DMI_CCI

AB36

AG16

AG17

AJ16

AJ17

+3V_VCCPSPI

V1

+VCCTX_LVDS

0.1U_0402_10V7K~D

1

2

+VCCPNAND

0.1U_0402_10V7K~D

1

2

1

2

1 2

0_0805_5%

CH36

CH45

1 2

0_0805_5%

CH47

CH47 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

CH29

CH30

1

2

RH202

RH210

CH30

1

2

0.01U_0402_16V7K~D

CH32

1

2

+VCCP_VCCDMI

LH11

1 2

+3V_PCH

RH1990_0805_5% RH1990_0805_ 5%

0.01U_0402_16V7K~D

CH33

+3VS

1 2

100NH_HK1608R10J-T_5%_0603~D

1

CH43

CH43 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

LH1

10U_0805_4VAM~D

BLM18PG181SN1_0603~D

CH31

+3VS

LH2

0.1UH_MLF1608DR10KT_10%~D

22U_0805_6.3VAM~D

0.1uH inductor, 200mA

CH34

1

2

+1.05VS

+1.8VS

RH2070_0805_5% RH2070_0805_5%

1.8VccTX_LVDS 0.06

+3VALW

1U_0402_6.3V6K~D

C432

1

2

SUSP#

SUSP#9 ,44,47,52,53,54

U47

1

VIN

3

EN

RT9013-15GB_SOT23-5

+1.5VS +VCCAFDI_VRM

@

RH211

VOUT

GND

RH211

RH212

5 4

NC

2

RH212

0_0603_5%~D

12

0_0603_5%~D

12

+VCCAFDI_VRM

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

LA-6601P

20 63Tuesday, November 30, 2010

1

1.0

5

+3V_PCH

+3V_DSW

D D

C C

B B

A A

+1.05VS

1 2

RH216 0_0805_5%@RH216 0_0805_5%@

+3VALW +3V_D SW

PCH_VREG_EN#44

+3VS

RH230

0_0805_5%

1 2

+1.05VS

AO3413_SOT23-3~D

RH234 0_0603_5%~D@ RH234 0_0603_5%~D@

+1.05VS

1 2

RH247

0_0805_5%

QH6

@

QH6

@

S

G

2

+3VS_VCC_CLKF33_R

12

RH235

0_0603_5%~D

+VCCA_DPLL_L

5

+VCCAPLL_CPY +3VS_VCC_CLKF33

1 2

RH245 0_0603_5%~DRH245 0_0603_ 5%~D

1 2

RH221 0_0603_5%~D@ RH221 0_060 3_5%~D@

@LH4

@

10UH_LBR2012T100M_20%~D

1 2

13

D

+1.05VS

10UH_LBR2012T100M_20%~D

1 2

+1.05VM_VCCSUS

12

1

CH72

1U_0402_6.3V6K~D

2

RH237

0_0603_5%~D

RH239

0_0603_5%~D

+1.05VS

RH242

1 2

0_0603_5%~D

10UH_LBR2012T100M_20%~D

1 2

10UH_LBR2012T100M_20%~D

1 2

LH4

10U_0805_10V4Z~D

1

@

CH49

2

1 2

RH225 0_0805_5%RH225 0_0805_5%

LH5

+3VS_VCC_CLKF33

+1.05VS_VCCDIFFCLKN

12

1

2

1

4.7U_0603_6.3V6K~D

2

LH7

LH8

+1.05VS

RH219 0_0603_5%~DRH219 0_0603_5%~D

+VCCDIFFCLK

1U_0402_6.3V6K~D

CH74

1

2

CH77

1U_0402_6.3V6K~D

+V_CPU_IO

CH79

220U_B2_2.5VM_R35M~D

1

CH86

+

2

+1.05VS

0.1U_0402_10V7K~D

1

CH48

2

0.1U_0402_10V7K~D

1 2

10U_0805_10V4Z~D

CH66

1

2

+1.05VS_VCCDIFFCLKN

+1.05VS_SSCVCC

0.1U_0402_10V7K~D

1

CH78

2

0.1U_0402_10V7K~D

1

CH80

2

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

1U_0402_6.3V6K~D

1

CH87

1

+

2

RH213 0_0603_5%~D@ RH213 0_0603_5%~D@

1U_0402_6.3V6K~D

220U_B2_2.5VM_R35M~D

CH90

@CH90

@

1

2

1

2

CH67

1

2

CH88

4

+VCCACLK

12

+VCCPDSW

+PCH_VCCDSW

1

2

+VCCAPLL_CPY_PCH

+VCCDPLL_CPY

+VCCSUS1

1

CH54

@CH54

@

1U_0402_6.3V6K~D

2

+1.05VM_VCCASW

22U_0805_6.3V6M~D

1

CH58

CH57

2

1U_0402_6.3V6K~D

CH60

0.1U_0402_10V7K~D

CH81

1U_0402_6.3V6K~D

CH89

1

2

4

1

2

1

2

0.1U_0402_10V7K~D

1

2

CH61

CH71

1U_0402_6.3V6K~D

@

CH76

+RTCVCC

1U_0402_6.3V6K~D

1

CH62

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+VCCSST

+1.05VM_VCCSUS

0.1U_0402_10V7K~D

1

CH83

CH82

2

1U_0402_6.3V6K~D

1

2

CH84

AD49

BH23

AL29

AL24

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

BD47

BF47

AF17 AF33 AF34 AG34

AG33

T16

V12

T38

N16

Y49

V16

T17 V19

BJ8

A22

UH1J

VCCACLK

3mA

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW[1]

1010mA

VCCASW[2]

VCCASW[3]

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

80mA

VCCADPLLB

VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]

VCCSSC

95mA

DCPSST

DCPSUS[1] DCPSUS[2]

1mA

V_PROC_IO

VCCRTC

CougarPoint_Rev_1p0

3

POWER

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

119mA

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

1mA

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

PCI/GPIO/LPCMISC

SATA USB

HDA

3

VCCAPLLSATA

10mA

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

Clock and Miscellaneous

55mA

CPURTC

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+1.05VS_VCCUSBCORE

1U_0402_6.3V6K~D

1

CH50

2

+3V_VCCPUSB

0.1U_0402_10V7K~D

1

CH52

2

+1.05VS_VCCAUPLL

+PCH_V5REF_SUS

+VCCA_USBSUS

+3V_VCCPSUS_1

+PCH_V5REF_RUN

+3V_VCCPSUS

1

1U_0402_6.3V6K~D

2

+3VS_VCCPPCI

+VCC3_3_2

+VCCAFDI_VRM

+VCCME_22

+VCCME_23

+VCCME_21

+VCCSUSHDA

0.1U_0402_10V7K~D

1

CH85

2

+3V_VCCAUBG

RH223 0_0603_5%~DRH223 0_0603_5%~D

CH63

+3VS_VCCPCORE

RH232

0_0603_5%~D

1

CH69

0.1U_0402_10V7K~D

2

+1.05VS_SATA3

+VCCSATAPLL

+1.05VS_VCC_SATA

1U_0402_6.3V6K~D

CH75

1

2

RH240 0_0603_5%~DRH240 0_0603_5%~D

RH241 0_0603_5%~DRH241 0_0603_5%~D

RH243 0_0603_5%~DRH243 0_0603_5%~D

2

RH220 0_0603_5%~DRH220 0_0603_5%~D

RH217 0_0603_5%~DRH217 0_0603_5%~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D RH218 0_0603_5%~DRH218 0_0603_5%~D

1

CH53

2

12

0_0603_5%~D

0.1U_0402_10V7K~D

1

CH59

2

0_0603_5%~D

RH228 0_0805_5%RH228 0_0805_ 5%

1

CH65

0.1U_0402_10V7K~D

2

+3VS

12

+1.05VS_SATA3

RH238

0_0805_5%

12

RH246

@RH246

@

150_0402_1%

2

+1.05VS

12

+3V_PCH

12

+3V_PCH

12

+1.05VS

RH224

12

RH226

12

+3V_PCH

+3VS

12

RH231 0_0603_5%~DRH231 0_0603_5%~D

1

CH68

0.1U_0402_10V7K~D

2

RH233

0_0805_5%

1

CH70

1U_0402_6.3V6K~D

2

+1.05VS

12

+1.05VS

12

RH2440_0603_5%~D R H2440_0603_5%~D

1

QH7

AO3413_SOT23-3~D

RH215

0_0603_5%~D

+3V_PCH

+3VS

12

+1.05VS

LH6

@LH6

@

10UH_LBR2012T100M_20%~D

1 2

1

CH73

@CH73

@

10U_0805_10V4Z~D

2

+3V_PCH

+5VALW_PCH

12

PCH_PWR_EN#47

10_0402_5%~D

+VCCSATAPLL_R

RH222

RH227

AO3413_SOT23-3~D

S

+3V_PCH+5V_PCH

12

+3VS+5VS

12

+VCCA_USBSUS

RH236

@RH236

@

0_0805_5%

12

D

G

2

21

DH2

DH2 RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_SUS

1

CH56

0.1U_0402_10V7K~D

2

21

DH3

DH3 RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_RUN

1

CH64

CH64 1U_0603_10V6K~D

1U_0603_10V6K~D

2

1U_0402_6.3V6K~D

@

CH55

1

2

+1.05VS+VCCDIFFCLK

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (7/8) PWR

LA-6601P

1

+5V_PCH+5VALW

13

21 63Tuesday, November 30, 2010

20K_0402_5%~D

0.1U_0402_10V7K~DC80.1U_0402_10V7K~D

12

R22

C8

1

2

1.0

5

UH1H

AA17

AA33 AA34 AB11 AB14 AB39

AB43

AC19

AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39

AD4 AD40 AD42 AD43 AD45 AD46

AD8

AF10 AF12 AD14 AD16 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38

AF42 AF46

AG19

AG2 AG31 AG48 AH11

AH3 AH36 AH39 AH40 AH42 AH46

AH7

AJ19 AJ21 AJ24 AJ33 AJ34

AK12

H5

AA2 AA3

AB4

AB5 AB7

AE2 AE3

AF4

AF5 AF7 AF8

AK3

UH1H

VSS[0]

VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]

CougarPoint_Rev_1p0

D D

C C

B B

A A

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

CougarPoint_Rev_1p0

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

2

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (8/8) VSS

LA-6601P

22 63Tuesday, November 30, 2010

1

1.0

5

D D

4

3

2

1

+3VS

0.1U_0402_16V4Z~D

C372

1

2

DP_IN3_PEQ# DP_IN4_PEQ# DP_IN3_AEQ# DP_IN4_AEQ#

C1760.1 U_0402_10V6K~D C1760.1U_0402_10V6K~D

MXM_C_TX0P

MXM_TX0P14 MXM_TX0N14

C C

MXM

MXM_DPB_AUXP/DDC14 MXM_DPB_AUXN/DDC14

CPU

B B

A A

MXM_TX1P14 MXM_TX1N14 MXM_TX2P14 MXM_TX2N14 MXM_TX3P14 MXM_TX3N14

EDP_TX0P4 EDP_TX0N4 EDP_TX1P4 EDP_TX1N4 EDP_TX2P4 EDP_TX2N4 EDP_TX3P4 EDP_TX3N4

EDP_AUXP4 EDP_AUXN4

MXM_DPB_HPD14

EDP_HPD#4

MXM_DPB_AUXP/DDC

MXM_DPB_AUXN/DDC

12

R508

100K_0402_5%~D

D

S

1

3

D

S

4

DMN66D0LDW-7_ SOT363-6~D

12

C1740.1 U_0402_10V6K~D C1740.1U_0402_10V6K~D

12

C1710.1 U_0402_10V6K~D C1710.1U_0402_10V6K~D

12

C1750.1 U_0402_10V6K~D C1750.1U_0402_10V6K~D

12

C1720.1 U_0402_10V6K~D C1720.1U_0402_10V6K~D

12

C1770.1 U_0402_10V6K~D C1770.1U_0402_10V6K~D

12

C1700.1 U_0402_10V6K~D C1700.1U_0402_10V6K~D

12

C1730.1 U_0402_10V6K~D C1730.1U_0402_10V6K~D

12

C3710.1U_04 02_10V6K~D C3710 .1U_0402_10V6K~D C3730.1U_04 02_10V6K~D C3730 .1U_0402_10V6K~D

12

100K_0402_5%~D

6

Q277A

DMN66D0LDW-7_ SOT363-6~D

5

G

Q277B

R530

G

2

MXM_DPB_AUXP/DDC_C

12

MXM_DPB_AUXN/DDC_C

12

C3750.1 U_0402_10V6K~D C3750.1U_0402_10V6K~D

12

C3760.1 U_0402_10V6K~D C3760.1U_0402_10V6K~D

12

C3770.1 U_0402_10V6K~D C3770.1U_0402_10V6K~D

12

C3780.1 U_0402_10V6K~D C3780.1U_0402_10V6K~D

12

C3790.1 U_0402_10V6K~D C3790.1U_0402_10V6K~D

12

C3800.1 U_0402_10V6K~D C3800.1U_0402_10V6K~D

12

C3810.1 U_0402_10V6K~D C3810.1U_0402_10V6K~D

12

C3820.1 U_0402_10V6K~D C3820.1U_0402_10V6K~D

12

C4350.1U_0402_10V6K~D C43 50.1U_0402_10V6K~D

12

C4360.1U_0402_10V6K~D C43 60.1U_0402_10V6K~D

12

MXM_C_TX0N

MXM_C_TX1P MXM_C_TX1N MXM_C_TX2P DP_IN4_PEQ#

MXM_C_TX2N

MXM_C_TX3P

MXM_C_TX3N

CPU & MXM SW for EDP

0.1U_0402_16V4Z~D

C374

EDP_C_TX0P

EDP_C_TX0N

EDP_C_TX1P

EDP_C_TX1N

EDP_C_TX2P

EDP_C_TX2N

EDP_C_TX3P

EDP_C_TX3N

EDP_AUXP_C EDP_AUXN_C

DP_MXM_CARD_SEL 29,44

U130

54

VDD

31

VDD

49

IN2_PEQ/SDA_CTL

50

IN1_PEQ/SCL_CTL

3

IN1_AEQ#

51

IN2_AEQ#

52

IN1_D0p

53

IN1_D0n

55

IN1_D1p

56

IN1_D1n

1

IN1_D2p

2

IN1_D2n

4

IN1_D3p

5

IN1_D3n

24

IN1_AUXp

23

IN1_AUXn

20

IN1_SCL

19

IN1_SDA

7

IN2_D0p

8

IN2_D0n

10

IN2_D1p

11

IN2_D1n

13

IN2_D2p

14

IN2_D2n

15

IN2_D3p

16

IN2_D3n

26

IN2_AUXp

25

IN2_AUXn

22

IN2_SCL

21

IN2_SDA

6

IN1_HPD

9

IN2_HPD

PS8321QFN56GTR-A0_QFN56 _7X7

MXM_MFG_SEL

0

1

SW_AUX

OUT_AUXp_SCL OUT_AUXn_SDA

AC_AUXp AC_AUXn

I2C_CTL_EN

CFG_OUTPUT

CA_DET

OUT_D0p OUT_D0n OUT_D1p

OUT_D1n OUT2_D2p OUT2_D2n

OUT_D3p

OUT_D3n

SW_ML/I2C_ADDR

CFG_HPD OUT_HPD

REXT CEXT

GND GND Epad

GPU Source

NVDIA

ATI

AUX_SEL/SEL1&2

0

1

A CPU

B

47

EDP_AUXP_L

28

EDP_AUXN_L

27

EDP_AUXP_L_C

30

EDP_AUXN_L_C

29

37

CFG_OUTPUT_1

34

EDP_CAB_DET#

44

LV_DP_A0P

42

LV_DP_A0N

41

LV_DP_A1P

39

LV_DP_A1N

38

LV_DP_A2P

36

LV_DP_A2N

35

LV_DP_A3P

33

LV_DP_A3N

32

DGPU_SELECT#

48

CFG_HPD_1

46

LV_DP_HPD

43

18 17

45 12 57 40

PD

DGPU_EDIDSEL# 19,26,28

C437 0.1U _0402_10V6K~DC437 0.1U_0402_10V6K~D

12

C438 0.1U _0402_10V6K~DC438 0.1U_0402_10V6K~D

12

EDP_CAB_DET# 19 ,24

LV_DP_A0P 24 LV_DP_A0N 2 4 LV_DP_A1P 24 LV_DP_A1N 2 4 LV_DP_A2P 24 LV_DP_A2N 2 4 LV_DP_A3P 24 LV_DP_A3N 2 4

DGPU_SELECT# 1 8,25,26,27,28

LV_DP_HPD 24

2.2U_0402_6.3V6M~D

4.99K_0402_1%

12

C1802

1

2

R1733

EDP_AUXP_L 24 EDP_AUXN_L 24

SourceChanel

MXM

+3VS

4.7K_0402_1%~D

1 2

12

4.7K_0402_1%~D

+3VS+3VS

R1717

4.7K_0402_1%~D

1 2

CFG_HPD_1

12

R1718

4.7K_0402_1%~D

R1715

R1713

DP_IN3_AEQ#

DP_IN4_AEQ#

@R1715

@

@R1713

@

@R1718

@

R1721 4.7K_0402_ 1%~D@R1 721 4.7K_0402_1%~D@

R1720 4.7K_0402_ 1%~D@R1 720 4.7K_0402_1%~D@

INy_AEQ# (y=1, 2),Automatic RX equalization enable L:Disable input automatic equalization H:Enable input automatic equalization

+3VS

INy_PEQ(y = 1, 2),Programmable input equalization level setting L:Low EQ setting (LEQ), default H:High EQ setting (HEQ) M:No EQ

CFG_OUTPUT: output configuration L:Output is tracking DPCD register setting (auto interception) H:Output swing level fixed at 600mV and no pre-emphasis M:Output swing level is fixed at 400mV and no pre-emphasis

CFG_HPD,HPD switching configuration L:HPD is switched by SW_ML H:HPD is switched by SW_AUX M:HPD is switched with overlap

R1712

4.7K_0402_1%~D

1 2

DP_IN3_PEQ#

12

R1722

4.7K_0402_1%~D

R1716

4.7K_0402_1%~D

1 2

CFG_OUTPUT_1

12

R1719

4.7K_0402_1%~D

12

@R1712

@

@R1722

@

@R1716

@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

eDP SW- GPU & CPU

LA-6601P

1

23 63Tuesday, November 30, 2010

1.0

5

+EDPVDD

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

CV42

1

CV41

2

D D

2

0.1U_0402_16V4Z~D

1

2

Close to JEDP1

0_0402_5%~D

LCDVDD_ON25,26

EC_ENVDD26,44

C C

Back light power

0_0402_5%~D

+EDPVDD +5VS

0.1U_0402_16V4Z~D

CV14

CV44

1

2

D

S

1 2

80 mil

1000P_0402_50V7K~D

1

C332

2

Inverter power

CONN@JEDP1

CONN@

CONNTST

GND

LANE1_N

LANE1_P

GND

LANE0_N

LANE0_P

GND AUX_CH_P AUX_CH_N

GND

LCD_VCC LCD_VCC LCD_VCC

TEST

GND

HPD BL_GND BL_GND BL_PWR BL_PWR BL_PWR BL_PWR BL_GND BL_GND

BL_PWM

ALS_VCC ALS_INT#

GND

USB+

USB-

USB_VCC

MIC_CLK

MIC_GND

MIC_DAT

GND

PWR_LED BATT2_LED BATT1_LED

GND

CONNTST

+INVPWR_B+B+

44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

5

EDP_A0N EDP_A0P

EDP_A1N EDP_A1P

EDP_A2N EDP_A2P

EDP_A3N EDP_A3P

EDP_AUX+ EDP_AUX-

EDP_HPD

USB20_P2 USB20_N2

DMIC_CLK DMIC0

EDP_CAB_DET#

CAM_DET# DISPOFF#

1 2

C248

0.1U_0603_50V4Z~D

LV7

@LV7

@

1 2

FBMA-L11-201209- 221LMA30T_0805

80 mil

JEDP1

45

MGND1

46

B B

A A

MGND2

47

MGND3

48

MGND4

49

MGND5

50

MGND6

51

MGND7

52

MGND8

53

MGND9

54

MGND10

55

MGND11

56

MGND12

57

MGND13

SMBUS_CLK

SMBUS_DATA

CAM_MIC_CBL_DET#

I-PEX_20505-044E-011G ~D

Link Done

eDP POWER

100_0402_5%~D

12

RV40

6

2

G

QV9A

1

DMN66D0LDW-7_ SOT363-6~D

RV49

RV37

@RV37

@

B+

12

R422

R422 100K_0402_5%~D

100K_0402_5%~D

1 2

R423 47K_040 2_5%~DR423 47K_0402_5%~D

LCD_BKL_EN44

Panel backlight power control by EC

EDP_CAB_DET# 19 ,23

CAM_DET# 16,26

DISPOFF# 26

+INVPWR_B+

5

G

FDC654P-G_SSOT-6~D

S

4 5

PWR_SRC_ON

FDC654P: P CHANNAL

+3VS

R324 100K_0402_5%~DR324 100K_0402 _5%~D

1 2

R339 100K_0402_5 %~DR339 100K_04 02_5%~D

1 2

R222

1 2

R336 100 K_0402_5%~DR336 100K_0402_5 %~D

+3VS +3VS_CAM

+EDPVDD

+INVPWR_B+

4

+EDPVDD

47K_0402_5%~D

12

RV38

RV36

220K_0402_1%

3

D

S

QV9B

4

DMN66D0LDW-7_ SOT363-6~D

Q39

D

6

2 1

G

3

Q28

Q28 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

D

S

D

S

1 3

G

2

EDP_CAB_DET#

12

EDP_AUX-

100K_0402_5%~D

EDP_AUX+

+3VS

12

@R32 8

@

10K_0402_5%~D

USB20_P218

USB20_N218

4

W=60mils

FDS4435BZ_SO8~D

8 7

4.7U_0805_10V4Z~D

6 5

1

CV16

2

12

80 mil

1

C331

0.1U_0603_50V4Z~D

2

R328

L100

1 2

BLM18BB221SN1D_2P~D

QV8

1 2

4.7U_0805_10V4Z~D

3

1

CV45

4

0.1U_0603_25V7K~D

2

CV46

1

+INVPWR_B+

CV45

2

4028

LV_DP_AUXP32 LV_DP_AUXN32

CPU/MXM

EDP_AUXP_L23 EDP_AUXN_L23

DP_4028_HPD32 LV_DP_HPD23

INV_PWM 26

1

C169

@C169

@

120P_0402_50VNPO~D

2

D48

USB20_P2 DMIC0

USB20_N2 DMIC_CLK

D48

1

V I/O

Ground2V BUS

3

V I/O

IP4223CZ6_SO6~D

V I/O

6

5

4

3

+3VS

R1731 4.7K_0402_ 1%~D@R1 731 4.7K_0402_1%~D@

R1730 4.7K_0402_ 1%~D@R1 730 4.7K_0402_1%~D@

INy_AEQ# (y=1, 2),Automatic RX equalization enable L:Disable input automatic eq ualization H:Enable input automatic equ alization

+3VS +3VS

1 2

12

INy_PEQ(y = 1, 2),Programmable input equalization level setting L:Low EQ setting (LEQ), defa ult H:High EQ setting (HEQ) M:No EQ

LV_DP_A0P_L32 LV_DP_A0N_L32 LV_DP_A1P_L32 LV_DP_A1N_L32 LV_DP_A2P_L32 LV_DP_A2N_L32 LV_DP_A3P_L32 LV_DP_A3N_L32

LV_DP_A0P23 LV_DP_A0N23 LV_DP_A1P23 LV_DP_A1N23 LV_DP_A2P23 LV_DP_A2N23 LV_DP_A3P23 LV_DP_A3N23

R1723

@R1 723

@

4.7K_0402_1%~D

DP_IN5_PEQ#

R1732

@R1 732

@

4.7K_0402_1%~D

DP_IN5_PEQ# DP_IN6_PEQ# DP_IN5_AEQ# DP_IN6_AEQ#

LV_DP_A0P_L LV_DP_A0N_L LV_DP_A1P_L LV_DP_A1N_L LV_DP_A2P_L LV_DP_A2N_L LV_DP_A3P_L LV_DP_A3N_L

1 2 1 2

LV_DP_A0P LV_DP_A0N LV_DP_A1P LV_DP_A1N LV_DP_A2P LV_DP_A2N LV_DP_A3P LV_DP_A3N

1 2 1 2

12

0.1U_0402_16V4Z~D

C179

1

2

C4390.1U_0402_10V7K~D C43 90.1U_0402_10V7K~D C4400.1U_0402_10V7K~D C44 00.1U_0402_10V7K~D

C4410.1U_0402_10V7K~D C4 410. 1U_0402_10V7K~D C4420.1U_0402_10V7K~D C4 420. 1U_0402_10V7K~D

AUX_SEL/SEL1&2

0

DP_IN5_AEQ#

DP_IN6_AEQ#

R1725

@R1725

@

4.7K_0402_1%~D

1 2

DP_IN6_PEQ#

12

R1724

@R1724

@

4.7K_0402_1%~D

+3VS

0.1U_0402_16V4Z~D

C181

1

2

LV_DP_AUXP_C LV_DP_AUXN_C

EDP_AUXP_C_L EDP_AUXN_C_L

SourceChanel

4028

54 31

49 50

3

51

52 53 55 56

1 2 4 5

24 23 20 19

7

8 10 11 13 14 15 16

26 25 22 21

6

9

BACPU/MXM1

DMIC0 26,34

+5VS

DMIC_CLK 26,3 4

3

2

+3VS

R1726

@R1726

@

4.7K_0402_1%~D

1 2

CFG_OUTPUT_2

12

R1729

4.7K_0402_1%~D

CFG_OUTPUT: output configurati on L:Output is tracking DPCD register setting (auto interception) H:Output swing level fixed a t 600mV and no pre-emphasis M:Output swing level is fixe d at 400mV and no pre-emphasis

+3VS

12

R1727

4.7K_0402_1%~D

CFG_HPD_2

12

R1728

@R1728

@

4.7K_0402_1%~D

CFG_HPD,HPD switching configuration L:HPD is switched by SW_ML H:HPD is switched by SW_AUX M:HPD is switched with overl ap

CPU/GPU & 4028 SW for DPB

U131

VDD VDD

IN2_PEQ/SDA_CTL IN1_PEQ/SCL_CTL IN1_AEQ# IN2_AEQ#

IN1_D0p IN1_D0n IN1_D1p IN1_D1n IN1_D2p IN1_D2n IN1_D3p IN1_D3n

IN1_AUXp IN1_AUXn IN1_SCL IN1_SDA

IN2_D0p IN2_D0n IN2_D1p IN2_D1n IN2_D2p IN2_D2n IN2_D3p IN2_D3n

IN2_AUXp IN2_AUXn IN2_SCL IN2_SDA

IN1_HPD IN2_HPD

PS8321QFN56GTR-A0_QFN56 _7X7

2

OUT_AUXp_SCL

OUT_AUXn_SDA

CFG_OUTPUT

SW_ML/I2C_ADDR

SW_AUX

AC_AUXp AC_AUXn

I2C_CTL_EN

CA_DET

OUT_D0p OUT_D0n OUT_D1p

OUT_D1n OUT2_D2p OUT2_D2n

OUT_D3p

OUT_D3n

CFG_HPD OUT_HPD

REXT CEXT

GND GND Epad

47

28 27

EDP_AUX+_C

30

EDP_AUX-_C

29

37

CFG_OUTPUT_2

34

EDP_CAB_DET#

44

EDP_A0P_L

42

EDP_A0N_L

41

EDP_A1P_L

39

EDP_A1N_L

38

EDP_A2P_L

36

EDP_A2N_L

35

EDP_A3P_L

33

EDP_A3N_L

32

HDMI_IN_SELECT#EDP_HPD

48

CFG_HPD_2

46

EDP_HPD

43

18 17

45 12 57 40

PD

HDMI_IN_SELECT# 26,35,44

C443 0.1U _0402_10V7K~DC443 0.1U_0402_10V7K~D

1 2

C444 0.1U _0402_10V7K~DC444 0.1U_0402_10V7K~D

1 2

EDP_CAB_DET# 19 ,23

2.2U_0402_6.3V6M~D

1

C1803

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

eDP SW- 4028 & eDP CONN

1

4.99K_0402_1%

12

R1734

LA-6601P

1

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

EDP_AUX+ EDP_AUX-

C4190.1U_0402_10V7K~D C4 190. 1U_0402_10V7K~D

EDP_A0P EDP_A0N

C4180.1U_04 02_10V7K~D C4180.1U_0402_10V7K~D C4210.1U_04 02_10V7K~D C4210.1U_0402_10V7K~D

EDP_A1P

C4200.1U_04 02_10V7K~D C4200.1U_0402_10V7K~D

EDP_A1N EDP_A2P

C4240.1U_04 02_10V7K~D C4240.1U_0402_10V7K~D C4220.1U_04 02_10V7K~D C4220.1U_0402_10V7K~D

EDP_A2N EDP_A3P

C4250.1U_04 02_10V7K~D C4250.1U_0402_10V7K~D C4230.1U_04 02_10V7K~D C4230.1U_0402_10V7K~D

EDP_A3N

1.0

24 63Tuesday, November 30, 2010

1.0

5

4

3

2

1

SEL

L H

Y

GPU

PCH

STDP6038 SW STDP4028 PCH/GPU AUX for LVDS

D D

LVDS_SW _TXOUT0-32

LVDS_SW _TXOUT0+32

LVDS_MU X_TXOUT0-26

LVDS_MU X_TXOUT0+26

LVDS_SW _TXOUT1-32 LVDS_SW _TXOUT1+32

LVDS_MU X_TXOUT1-26 LVDS_MU X_TXOUT1+26

LVDS_SW _TXOUT2-32

LVDS_SW _TXOUT2+32

LVDS_MU X_TXOUT2-26

LVDS_MU X_TXOUT2+26

LVDS_SW _TXCLK-32 LVDS_SW _TXCLK+32

C C

LVDS_MU X_TXCLK-26 LVDS_MU X_TXCLK+26

STDP4028 Panel MUX

LVDS_SW _TZOUT0-32

LVDS_SW _TZOUT0+32

LVDS_MU X_TZOUT0-26

LVDS_MU X_TZOUT0+26

LVDS_SW _TZOUT1-32

LVDS_SW _TZOUT1+32

LVDS_MU X_TZOUT1-26

LVDS_MU X_TZOUT1+26

LVDS_SW _TZOUT2-32

LVDS_SW _TZOUT2+32

LVDS_MU X_TZOUT2-26

B B

A A

LVDS_MU X_TZOUT2+26

LVDS_SW _TZCLK-3 2

LVDS_SW _TZCLK+32

LVDS_MU X_TZCLK-26

LVDS_MU X_TZCLK+26

LCDVDD_ ON24,26

S

LVDS_SW _TXOUT0LVDS_SW _TXOUT0+

LVDS_MU X_TXOUT0LVDS_MU X_TXOUT0+

LVDS_SW _TXOUT1LVDS_SW _TXOUT1+

LVDS_MU X_TXOUT1LVDS_MU X_TXOUT1+

LVDS_SW _TXOUT2LVDS_SW _TXOUT2+

LVDS_MU X_TXOUT2LVDS_MU X_TXOUT2+

LVDS_SW _TXCLKLVDS_SW _TXCLK+

LVDS_MU X_TXCLK-

LVDS_MU X_TXCLK+

output STDP6038 input

LVDS_SW _TZOUT0LVDS_SW _TZOUT0+

LVDS_MU X_TZOUT0LVDS_MU X_TZOUT0+

LVDS_SW _TZOUT1LVDS_SW _TZOUT1+

LVDS_MU X_TZOUT1LVDS_MU X_TZOUT1+

LVDS_SW _TZOUT2LVDS_SW _TZOUT2+

LVDS_MU X_TZOUT2LVDS_MU X_TZOUT2+

LVDS_SW _TZCLKLVDS_SW _TZCLK+

LVDS_MU X_TZCLKLVDS_MU X_TZCLK+

+3VS

12

RV45

D

13

RV45

100K_04 02_5%~D

G

2

QV10

QV10 SSM3K70 02F_SC59-3~D

SSM3K70 02F_SC59-3~D

5

SEL

L H

U46

2

0B1

1

1B1

80

0B2

79

1B2

78

2B1

77

3B1

76

2B2

75

3B2

73

4B1

72

5B1

71

4B2

70

5B2

68

6B1

67

7B1

66

6B2

65

7B2

64

8B1

63

9B1

62

8B2

61

9B2

60

10B1

59

11B1

58

10B2

57

11B2

56

12B1

55

13B1

54

12B2

53

13B2

51

14B1

50

15B1

49

14B2

48

15B2

46

16B1

45

17B1

44

16B2

43

17B2

42

18B1

41

19B1

40

18B2

39

19B2

3

GND1

13

GND2

20

GND3

21

GND4

31

GND5

38

GND6

52

GND7

74

GND8

25

OE2#

7

OE1#

PI3LVD101 2BE_BQSOP80

Y

STDP4028

Panel MUX

U1

DGPU_SE LECT#

16

SLE1

2

0B1

1

1B1

80

0B2

79

1B2

78

2B1

77

3B1

76

2B2

75

3B2

73

4B1

72

5B1

71

4B2

70

5B2

68

6B1

67

7B1

66

6B2

65

7B2

64

8B1

63

9B1

62

8B2

61

9B2

60

10B1

59

11B1

58

10B2

57

11B2

56

12B1

55

13B1

54

12B2

53

13B2

51

14B1

50

15B1

49

14B2

48

15B2

46

16B1

45

17B1

44

16B2

43

17B2

42

18B1

41

19B1

40

18B2

39

19B2

3

GND1

13

GND2

20

GND3

21

GND4

31

GND5

38

GND6

52

GND7

74

GND8

25

OE2#

7

OE1#

PI3LVD101 2BE_BQSOP80

SEL2

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

A10 A11

A12 A13

A14 A15

A16 A17

A18 A19

A0 A1

A2 A3

A4 A5

A6 A7

A8 A9

5 6

8 9

11 12

14 15

17 18

34

23 24

26 27

29 30

32 33

35 36

4 10 19 22 28 37 47 69

SYS_TXOUT 0SYS_TXOUT 0+

SYS_TXOUT 1SYS_TXOUT 1+

SYS_TXOUT 2SYS_TXOUT 2+

SYS_TXCLK SYS_TXCLK +

SEL=LOW B1,GPU SEL=HIGH B2,PCH

SYS_TZOUT 0SYS_TZOUT 0+

SYS_TZOUT 1SYS_TZOUT 1+

SYS_TZOUT 2SYS_TZOUT 2+

SYS_TZCLK SYS_TZCLK +

0.1U_0402_16V4Z~D

CV9

1

2

DGPU_SE LECT# 18,23,2 6,27,28

SYS_TXOUT 0- 26

SYS_TXOUT 0+ 2 6

SYS_TXOUT 1- 26 SYS_TXOUT 1+ 2 6

SYS_TXOUT 2- 26 SYS_TXOUT 2+ 26

SYS_TXCLK - 26 SYS_TXCLK + 26

SYS_TZOUT 0- 26 SYS_TZOUT 0+ 2 6

SYS_TZOUT 1- 2 6 SYS_TZOUT 1+ 2 6

SYS_TZOUT 2- 2 6 SYS_TZOUT 2+ 2 6

SYS_TZCLK - 26 SYS_TZCLK + 2 6

+3VS

4.7U_0603_6.3V6K~D

0.1U_0402_16V4Z~D

CV11

CV10

1

2

SLE1

SEL2

A10 A11

A12 A13

A14 A15

A16 A17

A18 A19

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

A0 A1

A2 A3

A4 A5

A6 A7

A8 A9

16

LVDS_60 38_TXOUT0-

5

LVDS_60 38_TXOUT0+

6

LVDS_60 38_TXOUT1-

8

LVDS_60 38_TXOUT1+

9

LVDS_60 38_TXOUT2-

11

LVDS_60 38_TXOUT2+

12

LVDS_60 38_TXCLK-

14

LVDS_60 38_TXCLK+

15

17 18

34

23 24

26 27

29 30

32 33

35 36

4 10 19 22 28 37 47 69

LVDS_60 38_TZOUT0LVDS_60 38_TZOUT0+

LVDS_60 38_TZOUT1LVDS_60 38_TZOUT1+

LVDS_60 38_TZOUT2LVDS_60 38_TZOUT2+

LVDS_60 38_TZCLKLVDS_60 38_TZCLK+

0.1U_0402_16V4Z~D

CV49

1

2

EDP_DET ECT# 15

LVDS_60 38_TXOUT0- 31 LVDS_60 38_TXOUT0+ 31

LVDS_60 38_TXOUT1- 31 LVDS_60 38_TXOUT1+ 31

LVDS_60 38_TXOUT2- 31 LVDS_60 38_TXOUT2+ 31

LVDS_60 38_TXCLK- 31 LVDS_60 38_TXCLK+ 31

LVDS_60 38_TZOUT0- 31 LVDS_60 38_TZOUT0+ 31

LVDS_60 38_TZOUT1- 31 LVDS_60 38_TZOUT1+ 31

LVDS_60 38_TZOUT2- 31 LVDS_60 38_TZOUT2+ 31

LVDS_60 38_TZCLK- 31 LVDS_60 38_TZCLK+ 31

+3VS

4.7U_0603_6.3V6K~D

CV50

CV47

1

2

VGA_TXO UT0-14

VGA_TXO UT0+14

PCH_TXO UT0-17

PCH_TXO UT0+17

VGA_TXO UT1-14

VGA_TXO UT1+14

PCH_TXO UT1-17

PCH_TXO UT1+17

VGA_TXO UT2-14

VGA_TXO UT2+14

PCH_TXO UT2-17

PCH_TXO UT2+17

VGA_TXC LK-14

VGA_TXC LK+14

PCH_TXC LK-17

PCH_TXC LK+17

VGA_TZO UT0-14

VGA_TZO UT0+14

PCH_TZO UT0-17

PCH_TZO UT0+17

VGA_TZO UT1-14

VGA_TZO UT1+14

PCH_TZO UT1-17

PCH_TZO UT1+17

VGA_TZO UT2-14

VGA_TZO UT2+14

PCH_TZO UT2-17

PCH_TZO UT2+17

VGA_TZC LK-14

VGA_TZC LK+14

PCH_TZC LK-17

PCH_TZC LK+17

LCDVDD_ ON

G

2

D

S

D

S

QV3

QV3 SSM3K70 02F_SC59-3~D

SSM3K70 02F_SC59-3~D

13

+3VS

12

RV11

100K_04 02_5%~D

VGA_TXO UT0VGA_TXO UT0+

PCH_TXO UT0PCH_TXO UT0+

VGA_TXO UT1-

VGA_TXO UT1+

PCH_TXO UT1PCH_TXO UT1+

VGA_TXO UT2VGA_TXO UT2+

PCH_TXO UT2PCH_TXO UT2+

VGA_TXC LKVGA_TXC LK+

PCH_TXC LKPCH_TXC LK+

VGA_TZO UT0VGA_TZO UT0+

PCH_TZO UT0PCH_TZO UT0+

VGA_TZO UT1VGA_TZO UT1+

PCH_TZO UT1PCH_TZO UT1+

VGA_TZO UT2VGA_TZO UT2+

PCH_TZO UT2PCH_TZO UT2+

VGA_TZC LKVGA_TZC LK+

PCH_TZC LKPCH_TZC LK+

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Nu mber Rev

Date: Sheet o f

Compal Electronics, Inc.

LVDS SW- 1 to 2 & GPU/PCH

LA-6601P

25 63Tuesday, November 30 , 2010

1

1.0

5

LCD Backlight Selector

DGPU_SELECT#

HDMI_IN_PWMSEL#18

D D

EC_INV_PWM44

VGA_PNL_PWM14 HDMI_IN_PWM31 PCH_INV_PWM17

DGPU_BKL_EN14

HDMI_IN_BKL_EN31

IGPU_BKLT_EN17

SG_AMD_BKL17 ,44

RV42 0_0402_5%~D@ RV42 0_0402_ 5%~D@

1 2

0_0402_5%~D

RV41

1 2

RV46 0_0402_5%~DRV46 0_04 02_5%~D

RV43 0_0402_5%~D@ RV43 0_ 0402_5%~D@

1 2

RV44 0_0402_5%~DRV44 0_0402_5%~D

1 2

VGA_EC_PWM HDMI_IN_PWM PCH_INV_PWM

U44

6 5 4 3

10 11 12 13

1

SN74CB3Q3253PWR_TSSOP16

16

1B1

VCC

1B2

14

1B3

S0

2

S1

1B4

7

2B1

1A

9

2B2

2A

2B3

15

2B4

2OE

8

1OE

GND

HDMI_IN_PWM_SELECT#

0.1U_0402_16V4Z~D

+3VS

1

CV43

2

HDMI_IN_PWM_SELECT#

INV_PWM ENBKL

S1 S0 Output

LCD DDC Selector

1

C C

DHMI_IN_NV_CLK31

DHMI_IN_NV_DAT31

DGPU_SELECT#

DGPU_EDIDSEL#19,23,28

VGA_LCD_CLK14

PCH_LCD_CLK17

VGA_LCD_DAT14

PCH_LCD_DATA17

RV8

@RV8

@

0_0402_5%~D

1 2

RV9

0_0402_5%~D

1 2

VGA_LCD_CLK

PCH_LCD_CLK

VGA_LCD_DAT DHMI_IN_NV_DAT PCH_LCD_DATA

DGPU_EDIDSEL_R#

U613

6 5 4 3

10 11 12 13

1

SN74CB3Q3253PWR_TSSOP16

16

1B1

VCC

1B2

14

1B3

S0

2

S1

1B4

7

2B1

1A

9

2B2

2A

2B3

15

2B4

2OE

8

1OE

GND

+3VS

0.1U_0402_16V4Z~D

1

2

HDMI_IN_SELECT#DHMI_IN_NV_CLK DGPU_EDIDSEL_R#

I2CC_SCL I2CC_SDA

0

1 1

CV48

S1 S0 Output

B B

1

0

1 1

LCD POWER

+LCDVDD

+5VALW+LCDVDD

47K_0402_5%~D

4.7U_0805_10V4Z~D

0.1U_0402_16V4Z~D

CV1

1

2

A A

LCDVDD_ON

EC_ENVDD24,44

12

RV3

CV2

1

2

6

D

2

G

QV2A

S

QV2A

DMN66D0LDW-7_ SOT363-6~D

1

RV160_0402_5%~D RV160_0402_5%~D

1 2

RV60_0402_5%~D @RV60 _0402_5%~D @

1 2

5

12

100K_0402_5%~D

RV7

100_0402_5%~D

0.1U_0402_16V4Z~D

4.7U_0805_10V4Z~D

12

RV4

3

D

5

G

S

4

DMN66D0LDW-7_ SOT363-6~D

CV3

W=60mils

SI2301CDS-T1-GE3_SOT23-3~D

1

2

RV5

12

220K_0402_1%

QV2B

QV1

1 3

D

100K_0402_5%~D

12

2

1

2

RV48

B1=B3

B2

B1=B3

B4

S

G

.047U_0402_16V7K~D

CV6

100K_0402_5%~D

12

B1=B3

4.7U_0805_10V4Z~D

RH141

+3VS

B2

B4

CV4

4

12

RV13

@RV13

@

10K_0402_5%~D

DGPU_BKL_PWM_SEL# 19

INV_PWM 24 ENBKL 44

Y

HDMI IN (D)

DSC1000

HDMI IN (I)

UMA

+3VS

1

2

4

3

PCH/GPU MUX & 6038 MUX SW for LVDS

U42

Y

HDMI IN (D)

DSC1000

HDMI IN (I)

UMA

DGPU_ENVDD14

HDMI_IN_ENVDD31

PCH_ENVDD17,44

LVDS_MUX_TXOUT0-25 LVDS_MUX_TXOUT0+25

SYS_TXOUT0-25 SYS_TXOUT0+25

LVDS_MUX_TXOUT1-25 LVDS_MUX_TXOUT1+25

SYS_TXOUT1-25 SYS_TXOUT1+25

LVDS_MUX_TXOUT2-25 LVDS_MUX_TXOUT2+25

SYS_TXOUT2-25 SYS_TXOUT2+25

LVDS_MUX_TXCLK-25 LVDS_MUX_TXCLK+25

SYS_TXCLK-25 SYS_TXCLK+25

LVDS_MUX_TZOUT0-25 LVDS_MUX_TZOUT0+25

SYS_TZOUT0-25 SYS_TZOUT0+25

LVDS_MUX_TZOUT1-25 LVDS_MUX_TZOUT1+25

SYS_TZOUT1-25 SYS_TZOUT1+25

LVDS_MUX_TZOUT2-25 LVDS_MUX_TZOUT2+25

SYS_TZOUT2-25 SYS_TZOUT2+25

LVDS_MUX_TZCLK-25 LVDS_MUX_TZCLK+25

SYS_TZCLK-25 SYS_TZCLK+25

LCDVDD_ON

G

2

S

QV4

QV4 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

SN74CB3Q3253PWR_TSSOP16

6 5 4 3

10 11 12 13

1

LVDS_MUX_TXOUT0LVDS_MUX_TXOUT0+

SYS_TXOUT0SYS_TXOUT0+

LVDS_MUX_TXOUT1LVDS_MUX_TXOUT1+

SYS_TXOUT1SYS_TXOUT1+

LVDS_MUX_TXOUT2LVDS_MUX_TXOUT2+

SYS_TXOUT2SYS_TXOUT2+

LVDS_MUX_TXCLKLVDS_MUX_TXCLK+

SYS_TXCLKSYS_TXCLK+

LVDS_MUX_TZOUT0LVDS_MUX_TZOUT0+ TZOUT0+

SYS_TZOUT0SYS_TZOUT0+

LVDS_MUX_TZOUT1LVDS_MUX_TZOUT1+

SYS_TZOUT1SYS_TZOUT1+

LVDS_MUX_TZOUT2LVDS_MUX_TZOUT2+

SYS_TZOUT2SYS_TZOUT2+

LVDS_MUX_TZCLKLVDS_MUX_TZCLK+

SYS_TZCLKSYS_TZCLK+

+3VS

12

RV32

100K_0402_5%~D

D

13

U610

16

1B1

VCC

1B2

14

1B3

S0

2

S1

1B4

7

2B1

1A

9

2B2

2A

2B3

15

2B4

2OE

8

1OE

GND

2

0B1

1

1B1

80

0B2

79

1B2

78

2B1

77

3B1

76

2B2

75

3B2

73

4B1

72

5B1

71

4B2

70

5B2

68

6B1

67

7B1

66

6B2

65

7B2

64

8B1

63

9B1

62

8B2

61

9B2

60

10B1

59

11B1

58

10B2

57

11B2

56

12B1

55

13B1

54

12B2

53

13B2

51

14B1

50

15B1

49

14B2

48

15B2

46

16B1

45

17B1

44

16B2

43

17B2

42

18B1

41

19B1

40

18B2

39

19B2

3

GND1

13

GND2

20

GND3

21

GND4

31

GND5

38

GND6

52

GND7

74

GND8

25

OE2#

7

OE1#

PI3LVD1012BE_BQSOP80

+3VS +3VS

1

CV67

0.1U_0402_16V4Z~D

2

DGPU_SELECT#

LCDVDD_ON

PI3LVD1012BE_BQSOP80

12

RV112

@RV112

@

10K_0402_5%~D

HDMI_IN_SELECT#

LCDVDD_ON 24,25

YA YBS0S1

0

0 A0 B0

1 DSC

0

0111

A1 B1

A2 B2

A3 B3

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

+3VS

12

10K_0402_5%~D

16

SLE1

5

A0

6

A1

8

A2

9

A3

11

A4

12

A5

14

A6

15

A7

17

A8

18

A9

34

SEL2

23

A10

24

A11

26

A12

27

A13

29

A14

30

A15

32

A16

33

A17

35

A18

36

A19

4

VDD1

10

VDD2

19

VDD3

22

VDD4

28

VDD5

37

VDD6

47

VDD7

69

VDD8

DGPU_SELECT# 1 8,23,25,27,28

Y

HDMI IN

UMA

RV62

TXOUT0TXOUT0+

TXOUT1TXOUT1+

TXOUT2TXOUT2+

TXCLKTXCLK+

TZOUT0-

TZOUT1TZOUT1+

TZOUT2TZOUT2+

TZCLKTZCLK+

1

2

@RV62

@

R1741

0_0402_5%~D

1 2

0.1U_0402_16V4Z~D

CV34

2

SEL

L H

+3VS

0.1U_0402_16V4Z~D

CV35

1

2

HDMI_IN_SELECT# 24,35,44

Y

B1

B2

LVDS Conn.

JLVDS1

55

GND11

54

GND10

53

GND9

52

GND8

51

GND7

50

GND6

49

GND5

48

GND4

47

4.7U_0603_6.3V6K~D

CV33

GND3

46

GND2

45

GND1

JAE_FI-TD44SB-E-R750_44P

Link Done

1

D49

1

V I/O

USB20_N3 DMIC_CLK

0.1U_0402_16V4Z~D

2

1

EN_CAM44

Ground2V BUS

3

V I/O

IP4223CZ6_SO6~D

SI2301CDS-T1-GE3_SOT23-3~D

100K_0402_5%~D

12

C1747

R1652

SSM3K7002F_SC59-3~D

1

D

Q26

2

G

S

3

V I/O

DMIC0USB20_P3

6

5

4

Q43

S

D

13

G

2

1

EN_CAM control circuit

+LCDVDD

0.1U_0402_16V4Z~D

CV36

1

2

+3VS +LCDVDD

@

LV1

1 2

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

+3VS

0.1U_0402_16V4Z~D

CV15

1

2

Close to JLVDS1

BKOFF#44

TXOUT0TXOUT0+

TXOUT1TXOUT1+

TXOUT2TXOUT2+

TXCLKTXCLK+

TZOUT0TZOUT0+

TZOUT1TZOUT1+

TZOUT2TZOUT2+

TZCLKTZCLK+

I2CC_SCL I2CC_SDA

USB20_N3 USB20_P3

CAM_DET# DMIC_CLK DMIC0 DISPOFF# INV_PWM LVDS_CAB_DET#

LCD_TEST

W=60mils

W=80mils

1 2

RV12 0_0402_5%~DRV12 0_0402_5%~D

USB20_N3 18 USB20_P3 18

CAM_DET# 16,24 DMIC_CLK 24,34 DMIC0 24,3 4

DISPOFF# 24

LVDS_CAB_DET# 1 9

+3VS_CAM

LCD_TEST 44

+INVPWR_B+ B+

FBMA-L11-201209- 221LMA30T_0805

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LVDS SW- 6038/SYSTEM & CONN

LA-6601P

1

26 63Tuesday, November 30, 2010

+5VS

+3VS_CAM+3VS

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D 10U_0805_10V4Z~D

10U_0805_10V4Z~D

CV5

C1748

1

2

10U_0805_10V4Z~D

CV7

1

2

DISPOFF#BKOFF#

1.0

A

B

C

D

E

VGA SW for PCH / GPU

10U_0805_10V4Z~D

1

C10

+3VS

1 1

VGA_CRT_VSYNC14 VGA_CRT_HSYNC14

VGA_CRT_R14 VGA_CRT_G14

VGA_CRT_B14 VGA_DDC_DATA14 VGA_DDC_CLK14

PCH_CRT_VSYNC17 PCH_CRT_HSYNC17

PCH_CRT_RED17 PCH_CRT_GRN17

PCH_CRT_BLU17 PCH_CRT_DDC_DAT17 PCH_CRT_DDC_CLK17

2 2

CRT_G

CRT_B

12

3 3

CV27 0.1U_0402_16V4Z~DCV27 0.1U_0402_16V4Z~D

1 2

CRT_HSYNC

CV30 0.1U_0402_16V4Z~DCV30 0.1U_0402_16V4Z~D

1 2

4 4

A

PI3V712-AZLEX_TQFN32_6X3~D

150_0402_1%

12

RV23

RV22

RV24

+CRT_VCC

5

P

A2Y

G

74AHCT1G125GW_SOT353-5

3

CRT_VSYNC CRT_VSYNC_1

4 16 23 29 32

27 25 22 20 18 12 14

26 24 21 19 17 13 15

1

OE#

VDD VDD VDD VDD VDD

0B1 1B1 2B1 3B1 4B1 5B1 6B1

0B2 1B2 2B2 3B2 4B2 5B2 6B2

UV8

4

+CRT_VCC

A2Y

U2

1

2

5

P

G

3

CRT_VSYNC

1

A0

CRT_HSYNC

2

A1 A2 A3 A4

SEL1

A5 A6

SEL2

GND GND GND GND

GPAD

8P_0402_50V8D~D

CV20

1

UV9

OE#

74AHCT1G125GW_SOT353-5

B

CRT_R

5

CRT_G

6

CRT_B

7

DGPU_SELECT#_CRT

8

CRT_DDC_DATA

9

CRT_DDC_CLK

10

30

3 11 28 31 33

8P_0402_50V8D~D

1

CV21

2

RV27 10K_0402_5%~DRV27 10K_0402_5%~D

4

+3VS

LV2

1 2

BLM18BB600SN1D_0603~D

LV3

1 2

BLM18BB600SN1D_0603~D

LV4

1 2

BLM18BB600SN1D_0603~D

CV22

12

CRT_HSYNC_1

C10

2

RV20 0_0402_5%~DRV20 0_0402_5%~D

DAN217T146_SC59-3

2

3

1

8P_0402_50V8D~D

1

CV23

2

MBC1608121YZF_0603

0.1U_0402_16V4Z~D

1

C12

C11

2

12

ChanelSEL1/SEL2

0

1

@

DV2

LV5

1 2

LV6

1 2

A=B2

DAN217T146_SC59-3

2

3

@DV3

@

DV3

1

8P_0402_50V8D~D

1

CV24

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

+3VS

0.01U_0402_16V7K~D

1

C13

C14

2

DGPU_SELECT# 18,23,25,26,28

Source

GPUA=B1

PCH

DAN217T146_SC59-3

2

3

@

DV4

1

CRT_R_2CRT_R

CRT_G_2

CRT_B_2

8P_0402_50V8D~D

1

CV25

2

CRT_HSYNC_2

10P_0402_50V8J~D

CV31

1

2

CRT_VSYNC_2

10P_0402_50V8J~D

CV32

1

2

C15

+5VS

2 1

RB491D_SC59-3

DV5

W=40mils

FV1

@FV1

@

1 2

5A_125V_R451005.MRL~D

1 2

R1961

0_1206_5%~D

CRT_DET#19

CRT_UART_TX

CRT_UART_RX

68P_0402_50V8J~D

1

2

+3VS

G

2

D_DDCDATA

CRT_DDC_DATA

DMN66D0LDW-7_SOT363-6~D

CRT_DDC_CLK

DMN66D0LDW-7_SOT363-6~D

R932

UART_TX32 UART_RX32

+CRT_VCC+ R_CRT_VCC

1

0.1U_0402_16V4Z~D

2

CRT Connector

D_DDCDATA

RV25 2.2K_0402_5%~DRV25 2.2K_0402_5%~D

D_DDCCLK

68P_0402_50V8J~D

1

CV28

2

RV26 2.2K_0402_5%~DRV26 2.2K_0402_5%~D

CV29

R932 R986

R986

CV19

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070112HR015M270ZR

CONN@

Link Done

1 2

1

S

Q274A

1 2 1 2

16 17

+CRT_VCC

D

Q274B

6

4

S

G

5

3

D

0_0402_5%~D

0_0402_5%~D 0_0402_5%~D

0_0402_5%~D

D_DDCCLK

CRT_UART_TX CRT_UART_RX

100P_0402_50V8J~D

CV26

1

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT SW

LA-6601P

27 63Tuesday, November 30, 2010

E

1.0

5

CV38

R972

0_0402_5%~D

1 2

R981 619_0402_ 1%~DR981 619_0402_1%~D

12

R44 499_0402_1%~DR44 499_0402_1%~D

12

+3V_MXM

MBK1608221YZF_2P

1 2

BAV99-7-F_SOT23-3

1

2

3

+5VS

R984 619_0402_ 1%~DR984 619_0402_1%~D

12

R45 499_0402_1%~DR45 499_0402_1%~D

12

D2

@D2

@

+5VS_SEL

L3

R1964 0_0603_5%~DR19 64 0_0603_5%~D

+3VS

+3V_MXM

D D

+5VS +HDMI_5V_OUT

3

1U_0603_10V6K~D

1

2

C C

TMDS_B_DATA2#17 TMDS_B_DATA217 TMDS_B_DATA1#17 TMDS_B_DATA117 TMDS_B_DATA0#17 TMDS_B_DATA017 TMDS_B_CLK#17 TMDS_B_CLK17

GPU_HDMI_TXD2-14 GPU_HDMI_TXD2+14 GPU_HDMI_TXD1-14 GPU_HDMI_TXD1+14 GPU_HDMI_TXD0-14 GPU_HDMI_TXD0+14 GPU_HDMI_TXC-14 GPU_HDMI_TXC+14

B B

A A

2 1

D28

BAT1000-7-F_SOT23-3~D

@

CV39

DGPU_HPD_INT#19

MMST3904-7-F_SOT323-3~D

HDMI_SW_DETECT

HDMIDAT_NB

R262.2K_0402_5%~D R262.2K_0402_5%~D

12

HDMICLK_NB

R272.2K_0402_5%~D R272.2K_0402_5%~D

12

GPU_HDMI_SDATA

R294.7K_0402_5%~D R294.7K_0402_5%~D

12

GPU_HDMI_SCLK

R314.7K_0402_5%~D R314.7K_0402_5%~D

12

W=40mils

NC

+HDMI_5V

TMDS_B_DATA2# TMDS_B_DATA2 TMDS_B_DATA1# TMDS_B_DATA1 TMDS_B_DATA0# TMDS_B_DATA0 TMDS_B_CLK# TMDS_B_CLK

GPU_HDMI_TXD2+ GPU_HDMI_TXD1GPU_HDMI_TXD1+ GPU_HDMI_TXD0GPU_HDMI_TXD0+ GPU_HDMI_TXCGPU_HDMI_TXC+

SSM3K7002F_SC59-3~D

+3VS

C

Q275

@

Q275

@

E

3 1

10K_0402_5%~D

R925

1 2

5

5A_125V_R451005.MRL~D

DGPU_HPD_INT#

2

B

R58 0_0402_5%~DR58 0_0402_5%~D

@

+5VS

+3VS

FV2

@ FV2

@

1 2

C1783 .1U_0402_16V7K~DC1783 .1U_0402_16V7K~D

1 2

C1784 .1U_0402_16V7K~DC1784 .1U_0402_16V7K~D

1 2

C1785 .1U_0402_16V7K~DC1785 .1U_0402_16V7K~D

1 2

C1786 .1U_0402_16V7K~DC1786 .1U_0402_16V7K~D

1 2

C1787 .1U_0402_16V7K~DC1787 .1U_0402_16V7K~D

1 2

C1788 .1U_0402_16V7K~DC1788 .1U_0402_16V7K~D

1 2

C1789 .1U_0402_16V7K~DC1789 .1U_0402_16V7K~D

1 2

C1790 .1U_0402_16V7K~DC1790 .1U_0402_16V7K~D

1 2

C20 .1U_0402_16V7K~DC20 .1U_0402_16 V7K~D C21 .1U_0402_16V7K~DC21 .1U_0402_16 V7K~D C22 .1U_0402_16V7K~DC22 .1U_0402_16 V7K~D C23 .1U_0402_16V7K~DC23 .1U_0402_16 V7K~D C24 .1U_0402_16V7K~DC24 .1U_0402_16 V7K~D C25 .1U_0402_16V7K~DC25 .1U_0402_16 V7K~D C26 .1U_0402_16V7K~DC26 .1U_0402_16 V7K~D C27 .1U_0402_16V7K~DC27 .1U_0402_16 V7K~D

1

Q11

3

R566

@R566

@

200K_0402_5%

1 2

R1965 0_0603_5%~D@ R1965 0_0603_5%~D@

1 2

1U_0603_10V4Z~D

1

2

R18960_1206_5%~D

12

+3VS

12 12 12 12 12 12 12 12

D

2

G

S

200K_0402_5%

R33

1 2

.1U_0402_16V7K~D

C186

1

2

GPU_HDMI_SDATA14

100K_0402_5%~D

12

R973

R975 619_0402_ 1%~DR975 619_0402_1%~D

12

R46 499_0402_1%~DR46 499_0402_1%~D

12

R52

1 2

0_0402_5%~D

4

.1U_0402_16V7K~D

C187

1

2

GPU_HDMI_SCLK14

HDMICLK_NB17

HDMIDAT_NB17

VGA_HDMI_DET14

TMDS_B_HPD17

D

2

G

S

R977 619_0402_ 1%~DR977 619_0402_1%~D

R976 619_0402_ 1%~DR976 619_0402_1%~D

12

R48 499_0402_1%~DR48 499_0402_1%~D

R47 499_0402_1%~DR47 499_0402_1%~D

12

100K_0402_5%~D

12

HDMI_SINK_HPD

220P_0402_50V7K~D

C16

1

2

4

SEL

0

1

16

2 3 5

6 11 10 14 13

SN74CBT3257CPWR _TSSOP16~D

SSM3K7002F_SC59-3~D

1

Q99

3

R974 619_0402_ 1%~DR974 619_0402_1%~D

R982 619_0402_ 1%~DR982 619_0402_1%~D

R983 619_0402_ 1%~DR983 619_0402_1%~D

12

R50 499_0402_1%~DR50 499_0402_1%~D

R51 499_0402_1%~DR51 499_0402_1%~D

R49 499_0402_1%~DR49 499_0402_1%~D

12

SSM3K7002F_SC59-3~D

1

D

2

G

S

3

@

R53

+3VS

12

1

D

2

G

S

3

Y

B1

B2

U37

Vcc

4

1A

7

1B1

2A

9

1B2

3A

12

2B1

4A

2B2

15

3B1

OE#

1

S

3B2 4B1

8

GND

4B2

PCH_HDMI_C_TXD2PCH_HDMI_C_TXD2+ PCH_HDMI_C_TXD1PCH_HDMI_C_TXD1+ PCH_HDMI_C_TXD0PCH_HDMI_C_TXD0+ PCH_HDMI_C_TXCPCH_HDMI_C_TXC+

HDMI_C_TX2-GPU_HDMI_TXD2HDMI_C_TX2+ HDMI_C_TX1HDMI_C_TX1+ HDMI_C_TX0HDMI_C_TX0+ HDMI_C_CLKHDMI_C_CLK+

+1.5VS_HDMI

10U_0603_6.3V6M~D

C1163

1

2

Q13

R1950

R1950 100K_0402_5%~D

100K_0402_5%~D

HDMI_OE#

QV11

SSM3K7002F_SC59-3~D

3

Close to UV2 VCC pins

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D

1

CV51

2

DVI_SCLK_L DVI_SDATA_L

HDMI_SW_DETECT

DGPU_EDIDSEL#_R

RV55 4.7K_0402_5%~DRV55 4.7K_0402_5%~D

+3VS

RV14 4.7K_0402_5%~D@R V14 4.7K_0402_5%~D@

1 2

RV15 4.7K_0402_5%~D@R V15 4.7K_0402_5%~D@

1 2

RV50 4.7K_0402_5%~DRV50 4.7K_0402_5%~D

1 2

RV54 4.7K_0402_5%~D@R V54 4.7K_0402_5%~D@

1 2

RV52 4.7K_0402_5%~DRV52 4.7K_0402_5%~D

1 2

U3

22

D3-_B

23

D3+_B

24

D2-_B

25

D2+_B

26

D1-_B

27

D1+_B

28

D0-_B

29

D0+_B

31

D3-_A

32

D3+_A

33

D2-_A

34

D2+_A

35

D1-_A

36

D1+_A

37

D0-_A

38

D0+_A

39

VSS

41

VSS

21

VSS

.1U_0402_16V7K~D

19

VSS

17

VSS

13

VSS

10

C1208

+1.5VS_HDMI +VCCAFDI_VRM

VSS

5

VSS

1

VSS

PI3HDMI412FT-BZHE_TQFN42_9X3P5

RH254 0_0603_5%~DRH254 0_0603_5%~D

UART_TX_603831 UART_RX_603831

VDD VDD VDD VDD VDD VDD VDD VDD

D3-

D3+

D2-

D2+

D1-

D1+

D0-

D0+

SEL

GND_PAD

12

R931 0_0402_5%~DR931 0 _0402_5%~D

1 2

R985 0_0402_5%~DR985 0 _0402_5%~D

1 2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

0.1U_0402_16V4Z~D

1

CV53

2

1 2

42 40 30 20 18 16 8 2

15 14 12 11 7 6 4 3

DGPU_SELECT#_R

9

43

1

CV54

2

+3VS

DVI_TXD2DVI_TXD2+ DVI_TXD1DVI_TXD1+ DVI_TXD0DVI_TXD0+ DVI_TXCDVI_TXC+

+1.5VS_HDMI

0.01U_0402_16V7K~D

CV52

HDMI_SINK_HPD_R

HDMI_OE#

DVI_SDATA_R DVI_SCLK_R

499_0402_1%~D

1 2

DVI_SDATA_R DVI_SCLK_R

HDMI_UART_TX HDMI_UART_RX

DVI_TXD2DVI_TXD2+ DVI_TXD1DVI_TXD1+ DVI_TXD0DVI_TXD0+ DVI_TXCDVI_TXC+

RV53

HDMI_CFG1 HDMI_CFG0

PC_0 PC_1

PC_2

1

2

.1U_0402_16V7K~D

1

C19

2

38 39 41 42 44 45 47 48

2

30

26

32

25

8 9

34 35

3 4

1

6

10

2.2U_0402_6.3V6M~D

CV55

+3VS

.1U_0402_16V7K~D

1

C18

2

SEL0Y

1

+HDMI_5V_OUT

2.2K_0402_5%~D

12

R54

FOR HDMI 1.4 :TO BE UPDATE:

pin 14 Utility / HEAC+ pin 17 DDC / CEC GND / HEAC Shield pin 19 Hot Plug Detect / HEAC-

2

+3VS+3VS

33

46

11

15

Repeater

OUT

GND15GND2

12

DGPU_SELECT#_R

21

VCC4

VCC540VCC6

VCC1

VCC2

VCC3

OUT1p OUT1n OUT2p OUT2n OUT3p OUT3n OUT4p OUT4n

HPD

SDAZ

IN

SCLZ

GND7

GND424GND631GND5

GND3

GND837GND9

GND10

PS121QFN48G_QFN48_7X7

36

27

18

43

49

DGPU_SEL#29,30

+3VS

36K_0402_1%

12

R1736

680K_0402_1%

12

R1735

UV2

IN1p IN1n IN2p IN2n IN3p IN3n IN4p IN4n

POW

HPD_SINK

I2C_CTL_EN#

NC/DDCBUF_EN#

NC/OE#

SDA SCL

SDA_CTL/CFG1 SCL_CTL/CFG0

I2C_ADDR0/PC0 I2C_ADDR1/PC1

GND/PC2

REXT

CEXT

10U_0603_6.3V6M~D

C17

1

2

A

B

R55

Place LC Filter closed to JHDMI1

L8 FCM2012CF-800T06 _2PL8 FCM2012CF-800T06_2P

1 2

L9 FCM2012CF-800T06 _2PL9 FCM2012CF-800T06_2P

1 2

2

1

R34 0_ 0402_5%~D@R 34 0_0402_5%~D@

1 2

WCM-2012-900T_4P

DVI_TXC-_R

DVI_TXC+_R

WCM-2012-900T_4P

2

L4

3

1 2

R36 0_ 0402_5%~D@R 36 0_0402_5%~D@

R37 0_ 0402_5%~D@R 37 0_0402_5%~D@

1 2

WCM-2012-900T_4P

3

L5

2

1 2

R38 0_ 0402_5%~D@R 38 0_0402_5%~D@

R39 0_ 0402_5%~D@R 39 0_0402_5%~D@

1 2

WCM-2012-900T_4P

2

L6

3

1 2

R41 0_ 0402_5%~D@R 41 0_0402_5%~D@

R42 0_ 0402_5%~D@R 42 0_0402_5%~D@

1 2

WCM-2012-900T_4P

3

L7

2

1 2

R43 0_0402_5%~D@ R43 0_0402_5%~D@

23 22 20 19 17 16 14 13

HDMI_SINK_HPD

7

29 28

DVI_TXD2-_R DVI_TXD2+_R DVI_TXD1-_R DVI_TXD1+_R DVI_TXD0-_R DVI_TXD0+_R DVI_TXC-_R DVI_TXC+_R

DVI_SDATA_L DVI_SCLK_L

DVI_TXD2+_R

DVI_TXD1-_R

DVI_TXD1+_R

DVI_TXD0+_R

DVI_TXD0-_R

Reserve for EMI please close to JHDMI2

R40 0_ 0402_5%~D@R 40 0_0402_5%~D@

1 2

+3VS

CV56

12

0.01U_0402_16V7K~D

DGPU_SEL#

1 2

R1737 30K_0402_1%~DR1737 30K_0402_1%~D

DGPU_EDIDSEL#_R29,30

CV57

12

0.01U_0402_16V7K~D

DGPU_EDIDSEL#_R

10P_0402_50V8J~D

1

2

4

HDMI_SINK_HPD_R

DVI_SDATA DVI_SCLK

10P_0402_50V8J~D

HDMI_UART_TX

1

2

C30

HDMI_UART_RX C_DVI_R_TXC-

C_DVI_R_TXC+ C_DVI_R_TXD0-

C_DVI_R_TXD0+ C_DVI_R_TXD1-

C_DVI_R_TXD1+ C_DVI_R_TXD2-

C_DVI_R_TXD2+

C29

5

P

IN1

4

O

IN2

G

3

SN74AHC1G08DCKR_SC70-5

R57 0_0402_5%~D@R5 7 0_0402_5%~D@

1 2

+3VS

5

1

P

IN1

O

2

IN2

G

U624

3

SN74AHC1G08DCKR_SC70-5

+HDMI_5V_OUT

1

DGPU_SELECT# 18,23,25,26,27

GPIO30

2

U623

DGPU_EDIDSEL# 19,23,26

GPIO30 1 7

HDMI Connector

JHDMI2

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042GR019M23UZL

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HDMI SW

LA-6601P

1

4

1

4

1

DGPU_SELECT#DGPU_SEL#

DGPU_EDIDSEL#

GND GND GND GND

C_DVI_R_TXD2+

C_DVI_R_TXD2-

C_DVI_R_TXD2-DVI_TXD2-_R

C_DVI_R_TXD1-

C_DVI_R_TXD1+

C_DVI_R_TXD0+

C_DVI_R_TXD0-

C_DVI_R_TXC-

C_DVI_R_TXC+

20 21 22 23

Link Done

28 63Tuesday, November 30, 2010

1.0

A

B

C

D

E

+3VS

12

R1706

@R1706

@

4.7K_0402_1%~D

DP_IN1_PEQ#

12

1 1

2 2

3 3

4 4

R1707

@R1707

@

4.7K_0402_1%~D

INy_PEQ(y = 1, 2),Programmable input equalization level setting L:Low EQ setting (LEQ), default H:High EQ setting (HEQ) M:No EQ

+3VS

R1702 4.7K_0402_1%~D@R1702 4.7K_0402_1%~D@

R1703 4.7K_0402_1%~D@R1703 4.7K_0402_1%~D@

INy_AEQ# (y=1, 2),Automatic RX equalization enable L:Disable input automatic equalization H:Enable input automatic equalization

+3VS

1 2

RV28 2.2K_0402_5 %~DRV28 2.2K_0402_5%~D

1 2

RV29 2.2K_0402_5 %~DRV29 2.2K_0402_5%~D

R509 100K_0402_5%~DR509 100K_0402_5%~D

VGA_DPC_AUXP/DDC14 VGA_DPC_AUXN/DDC14

PCH_DPC_AUXP17 PCH_DPC_AUXN17

MXM_MFG_SEL

0

1

4.7K_0402_1%~D

1 2

12

VGA_DPC_P014 VGA_DPC_N014 VGA_DPC_P114 VGA_DPC_N114 VGA_DPC_P214 VGA_DPC_N214 VGA_DPC_P314 VGA_DPC_N314

PCH_DPC_P017 PCH_DPC_N017 PCH_DPC_P117 PCH_DPC_N117 PCH_DPC_P217 PCH_DPC_N217 PCH_DPC_P317 PCH_DPC_N317

GPU Source

NVDIA

ATI

R1704

@R1704

@

R1705

@R1705

@

4.7K_0402_1%~D

DP_IN1_AEQ#

DP_IN2_AEQ#

PCH_DPC_CLK

PCH_DPC_DAT

DP_HPD

C297 0.1U_ 0402_10V6K~DC297 0.1U_0402_10V6K~D C298 0.1U_ 0402_10V6K~DC298 0.1U_0402_10V6K~D

VGA_DPC_AUXP/DDC

VGA_DPC_AUXN/DDC

R507

100K_0402_5%~D

A

D

S

+3VS+3V S

R1709

4.7K_0402_1%~D

1 2

CFG_HPDDP_IN2_PEQ#

12

R1710

@R1710

@

4.7K_0402_1%~D

CFG_HPD,HPD switching configuration L:HPD is switched by SW_ML H:HPD is switched by SW_AUX M:HPD is switched with overlap

0.1U_0402_16V4Z~D

C56

1

C60

2

DP_IN2_PEQ# DP_IN1_PEQ# DP_IN1_AEQ#

Near to NV

PCH_DPC_CLK17

PCH_DPC_DAT17

VGA_DPC_HPD14

DP_HPD17

12

100K_0402_5%~D

12

6

D

G

DMN66D0LDW-7_SOT363-6~D

S

1

3

5

G

4

Q278B

DMN66D0LDW-7_SOT363-6~D

DP_IN2_AEQ#

DISP_C_A0P

C680.1U_0402_10V6K~D C680.1U_0402_10V6K~D

12

DISP_C_A0N

C690.1U_0402_10V6K~D C690.1U_0402_10V6K~D

12

DISP_C_A1P

C650.1U_0402_10V6K~D C650.1U_0402_10V6K~D

12

DISP_C_A1N

C670.1U_0402_10V6K~D C670.1U_0402_10V6K~D

12

DISP_C_A2P

C630.1U_0402_10V6K~D C630.1U_0402_10V6K~D

12

DISP_C_A2N

C640.1U_0402_10V6K~D C640.1U_0402_10V6K~D

12

DISP_C_A3P

C570.1U_0402_10V6K~D C570.1U_0402_10V6K~D

12

DISP_C_A3N

C660.1U_0402_10V6K~D C660.1U_0402_10V6K~D

12

VGA_DPC_AUXP/DDC_C

12

VGA_DPC_AUXN/DDC_C

12

PCH_DPC_C_P0

C4260.1U_0402_10V6K~D C4260.1U_0402_10V6K~D

12

PCH_DPC_C_N0

C4270.1U_0402_10V6K~D C4270.1U_0402_10V6K~D

12

PCH_DPC_C_P1

C4160.1U_0402_10V6K~D C4160.1U_0402_10V6K~D

12

PCH_DPC_C_N1

C4170.1U_0402_10V6K~D C4170.1U_0402_10V6K~D

12

PCH_DPC_C_P2

C3690.1U_0402_10V6K~D C3690.1U_0402_10V6K~D

12

PCH_DPC_C_N2

C3700.1U_0402_10V6K~D C3700.1U_0402_10V6K~D

12

PCH_DPC_C_P3

C1210.1U_0402_10V6K~D C1210.1U_0402_10V6K~D

12

PCH_DPC_C_N3 CAB_DET_SINK

C3670.1U_0402_10V6K~D C3670.1U_0402_10V6K~D

12

PCH_DPC_AUXP_C

C2990.1U_0402_10V6K~D C2990.1U_0402_10V6K~D

12

PCH_DPC_AUXN_C

C3000.1U_0402_10V6K~D C3000.1U_0402_10V6K~D

12

PCH_DPC_CLK PCH_DPC_DAT

VGA_DPC_HPD DP_HPD

R529

2

Q278A

+3VS

R1708

@R1708

@

4.7K_0402_1%~D

1 2

CFG_OUTPUT

12

R1711

4.7K_0402_1%~D

CFG_OUTPUT: output configuration L:Output is tracking DPCD register setting (auto interception) H:Output swing level fixed at 600mV and no pre-emphasis M:Output swing level is fixed at 400mV and no pre-emphasis

+3VS

PCH/GPU AUX&LANE SW for DPB

U129

54

VDD

31

VDD

49

IN2_PEQ/SDA_CTL

50

IN1_PEQ/SCL_CTL

3

IN1_AEQ#

51

IN2_AEQ#

52

IN1_D0p

53

IN1_D0n

55

IN1_D1p

56

IN1_D1n

1

IN1_D2p

2

IN1_D2n

4

IN1_D3p

5

IN1_D3n

24

IN1_AUXp

23

IN1_AUXn

20

IN1_SCL

19

IN1_SDA

7

IN2_D0p

8

IN2_D0n

10

IN2_D1p

11

IN2_D1n

13

IN2_D2p

14

IN2_D2n

15

IN2_D3p

16

IN2_D3n

26

IN2_AUXp

25

IN2_AUXn

22

IN2_SCL

21

IN2_SDA

6

IN1_HPD

9

IN2_HPD

PS8321QFN56GTR-A0_QFN56_7X7

0

1

DP_MXM_CARD_SEL 23,44

B

OUT_AUXp_SCL OUT_AUXn_SDA

I2C_CTL_EN

CFG_OUTPUT

OUT2_D2p OUT2_D2n

SW_ML/I2C_ADDR

CFG_HPD OUT_HPD

ChanelSW_ML/I2C_ADDR

IN2

SW_AUX

AC_AUXp AC_AUXn

CA_DET

OUT_D0p OUT_D0n OUT_D1p OUT_D1n

OUT_D3p OUT_D3n

Source

GPUIN1

PCH

REXT CEXT

GND GND Epad

PD

DGPU_EDIDSEL#_R

47

DISP_AUXP

28

DISP_AUXN

27

DISP_AUXP_RC

30

DISP_AUXN_RC

29

37

CFG_OUTPUT

34

DP_RP_CAB_DET

44

DISP_A0P_L

42

DISP_A0N_L

41

DISP_A1P_L

39

DISP_A1N_L

38

DISP_A2P_L

36

DISP_A2N_L

35

DISP_A3P_L

33

DISP_A3N_L

32

DGPU_SEL#

48

CFG_HPD

46

DP_RP_HPD

43

18 17

45 12 57 40

DP Redriver

0.1U_0402_16V4Z~D

C32

ChanelSW_AUX

IN2

+3VS

12

CAB_DET_SINK#

13

D

Q12

Q12 BSS138_SOT23~D

BSS138_SOT23~D

S

D4

@8D4

@

1

2

4

5

3

8

RCLAMP0524P.TCT~D

PCH_DISP_A0P_C PCH_DISP_A0N_C

PCH_DISP_A1P_C PCH_DISP_A1N_C

PCH_DISP_A2P_C PCH_DISP_A2N_C

PCH_DISP_A3P_C PCH_DISP_A3N_CDISP_A3N_L

DP_RP_CAB_DET DP_RP_HPD

CAB_DET_SINK DISP_HPD_SINK

Source

GPUIN1

PCH

DISP_AUXP DISP_AUXN

10

9

7

6

1 2

3 4

6 7

9

10

12 13

14 15

16

DP_CBL_DET18

Place close JDP1

DISP_A2P

DISP_A2N

DISP_A3PDISP_A3P

DISP_A0P_L

C35 0.1U_0402_10V6K~DC35 0.1U_0402_10V6K~D

DISP_A0N_L

DISP_A1P_L DISP_A1N_L

DISP_A2P_L DISP_A2N_L

DISP_A3P_L

12

C36 0.1U_0402_10V6K~DC36 0.1U_0402_10V6K~D

12

C37 0.1U_0402_10V6K~DC37 0.1U_0402_10V6K~D

12

C38 0.1U_0402_10V6K~DC38 0.1U_0402_10V6K~D

12

C40 0.1U_0402_10V6K~DC40 0.1U_0402_10V6K~D

12

C45 0.1U_0402_10V6K~DC45 0.1U_0402_10V6K~D

12

C48 0.1U_0402_10V6K~DC48 0.1U_0402_10V6K~D

12

C49 0.1U_0402_10V6K~DC49 0.1U_0402_10V6K~D

12

0

1

DGPU_EDIDSEL#_R 28,30

100K_0402_5%~D

R1473

CAB_DET_SINK

DGPU_SEL# 28,30

2.2U_0402_6.3V6M~D

4.99K_0402_1%

12

C1801

R1701

1

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

2

G

DISP_A2P

DISP_A2N

DISP_A3N DISP_A3N

+1.5VS+3VS

1

2

5

36

U5

D0+ D0-

VCC33

D1+ D1-

D2+ D2-

D3+ D3-

CAD HPDSRC

CAD_SINK HPD_SINK

NC

GND

8

18

U75

2

1A 2A51B

1

1OE#

7

2OE#

SN74CBTD3306CPW R_TSSOP8~D

12

DISP_A0P

DISP_A0N

DISP_A1P

DISP_A1N

11

17

21

29

VDD15

GND

24

VCC

2B

GND

R651M_0402_5%~D R651M_0402_5%~D

R645.1M_0402_5% R645.1M_0402_5%

R621M_0402_5%~D R621M_0402_5%~D

D0+A

D0-A

D1+A

D1-A

D2+A

D2-A

D3+A

D3-A

AUX_SINK+

AUX_SINK-

AUXSRC+

AUXSRC-

DDCSDA

DDCSCL

GND

PI2EQXDP101ZFEX_TQFN36_6X5

37

+5VS

0.1U_0402_16V4Z~D

C53

1

2

8

DISP_AUXP_R

3

DISP_AUXN_R

6 4

1 2

DISP_CEC

DISP_HPD_SINK

D5

@8D5

@

1

2

4

5

3

8

RCLAMP0524P.TCT~D

D

28 27

26 25

23 22

20 19

31 30

33 32

35 34

R610_0402_5%~D R610_0402_5%~D

0.1U_0402_16V4Z~D

1

2

DISP_A0P_C DISP_A0N_C

DISP_A1P_C DISP_A1N_C

DISP_A2P_C DISP_A2N_C

DISP_A3P_C DISP_A3N_C

DISP_A0P

10

DISP_A0N

9

DISP_A1P

7

DISP_A1N

6

0.1U_0402_16V4Z~D

1

C34

C41

C33

2

12

1 2

0.1U_0402_16V4Z~D

1

C62

2

JMDP1

1

GND

2

HOT PLUG

3

LANE0_P

4

CONFIG1

5

LANE0_N

6

CONFIG2

7

GND

8

GND

9

LANE1_P

10

LANE3_P

11

LANE1_N

12

LANE3_N

13

GND

14

GND

15

LANE2_P

16

AUX_CH_P

17

LANE2_N

18

AUX_CH_N

19

GND DP_PWR20GND4

JAE_DP2R020JQ2-1-CP

CONN@

Link Done

E

DISP_A0P DISP_A0N

DISP_A1P DISP_A1N

DISP_A2P DISP_A2N

DISP_A3P DISP_A3N

DISP_AUXP_RC DISP_AUXN_RC

100K_0402_5%~D

+3VS_DP

0.1U_0402_10V6K~D

22U_0805_6.3VAM~D

1

C70

2

29 63Tuesday, November 30, 2010

C42 0.1U_0402_10V6K~DC42 0.1U_0402_10V6K~D

12

C43 0.1U_0402_10V6K~DC43 0.1U_0402_10V6K~D

12

C39 0.1U_0402_10V6K~DC39 0.1U_0402_10V6K~D

12

C44 0.1U_0402_10V6K~DC44 0.1U_0402_10V6K~D

12

C46 0.1U_0402_10V6K~DC46 0.1U_0402_10V6K~D

12

C47 0.1U_0402_10V6K~DC47 0.1U_0402_10V6K~D

12

C50 0.1U_0402_10V6K~DC50 0.1U_0402_10V6K~D

12

C51 0.1U_0402_10V6K~DC51 0.1U_0402_10V6K~D

12

DISP_CLK_AUXP_CONN DISP_DAT_AUXN_CONN

C54 0.1U_0402_10V7K~DC54 0.1U_0402_10V7K~D

12

C55 0.1U_0402_10V7K~DC55 0.1U_0402_10V7K~D

DISP_AUXN DISP_AUXP

DISP_DAT_AUXN_CONN

DISP_CLK_AUXP_CONN

+3VS

4.7K_0402_1%~D

R1959

R1958

1 2

DISP_HPD_SINK DISP_A0P CAB_DET_SINK DISP_A0N DISP_CEC

DISP_A1P DISP_A3P DISP_A1N DISP_A3N

DISP_A2P DISP_CLK_AUXP_CONN DISP_A2N DISP_DAT_AUXN_CONN

Title

Size Document Number Rev

Date: Sheet of

12

R56

R59 100K_0402_5%~DR59 100K_0402_5%~D

+3VS

1.5A_6V_1206L150PR~DF21.5A_6V_1206L150PR~D

0_1206_5%~D

12

@

R60

F2

1 2

10U_0603_6.3V6M~D

1

C61

2

Compal Electronics, Inc.

DP SW for mDP CONN

LA-6601P

C71

GND1 GND2 GND3

+3VS_DP

21 22 23 24

1.0

5

4

3

2

1

D D

PCH_DPD_CLK PCH_DPD_DAT DMC_PWDN DMC_CFG_HPD DMC_DDCBUF

+3VS

0.1U_0402_16V4Z~D

10U_0603_6.3V6M~D

+3V_MXM

1 2

R169 2.2K_0402_5%~DR169 2.2K_0402_5%~D

1 2

R170 2.2K_0402_5%~DR170 2.2K_0402_5%~D

C C

B B

VGA_DPD_AUXP/DDC

VGA_DPD_AUXN/DDC

VGA_DMC_HPD14

PCH_DMC_HPD17 VGA_DPD_AUXP/DDC14 VGA_DPD_AUXN/DDC14

PCH_DPD_CLK17

PCH_DPD_DAT17

C213 0.1U_0402_10V6K~DC213 0.1U_0402_10V6K~D

VGA_DPD_P014 VGA_DPD_N014 VGA_DPD_P114 VGA_DPD_N114 VGA_DPD_P214 VGA_DPD_N214 VGA_DPD_P314 VGA_DPD_N314

PCH_DPD_P017 PCH_DPD_N017 PCH_DPD_P117 PCH_DPD_N117 PCH_DPD_P217 PCH_DPD_N217 PCH_DPD_P317 PCH_DPD_N317

1 2

C214 0.1U_0402_10V6K~DC214 0.1U_0402_10V6K~D

1 2

C211 0.1U_0402_10V6K~DC211 0.1U_0402_10V6K~D

1 2

C212 0.1U_0402_10V6K~DC212 0.1U_0402_10V6K~D

1 2

C209 0.1U_0402_10V6K~DC209 0.1U_0402_10V6K~D

1 2

C210 0.1U_0402_10V6K~DC210 0.1U_0402_10V6K~D

1 2

C207 0.1U_0402_10V6K~DC207 0.1U_0402_10V6K~D

1 2

C208 0.1U_0402_10V6K~DC208 0.1U_0402_10V6K~D

1 2

C327 0.1U_0402_16V4Z~DC327 0.1U_0402_16V4Z~D

1 2

C330 0.1U_0402_16V4Z~DC330 0.1U_0402_16V4Z~D

1 2

C199 0.1U_0402_16V4Z~DC199 0.1U_0402_16V4Z~D

1 2

C198 0.1U_0402_16V4Z~DC198 0.1U_0402_16V4Z~D

1 2

C217 0.1U_0402_10V7K~DC217 0.1U_0402_10V7 K~D

1 2

C218 0.1U_0402_10V7K~DC218 0.1U_0402_10V7 K~D

1 2

C215 0.1U_0402_10V7K~DC215 0.1U_0402_10V7 K~D

1 2

C216 0.1U_0402_10V7K~DC216 0.1U_0402_10V7 K~D

1 2

R175 10K_0402_5%~DR175 10K_0402_5%~D R174 10K_0402_5%~DR174 10K_0402_5%~D

12 12

DGPU_EDIDSEL#_R28,29 DGPU_SEL#28,29

VGA_DPD_SW_P0 VGA_DPD_SW_N0 VGA_DPD_SW_P1 VGA_DPD_SW_N1 VGA_DPD_SW_P2 VGA_DPD_SW_N2 VGA_DPD_SW_P3 VGA_DPD_SW_N3

PCH_DPD_SW_P0 PCH_DPD_SW_N 0 PCH_DPD_SW_P1 PCH_DPD_SW_N 1 PCH_DPD_SW_P2 PCH_DPD_SW_N 2 PCH_DPD_SW_P3 PCH_DPD_SW_N 3

VGA_DMC_HPD_R PCH_DMC_HPD_R

DGPU_EDIDSEL#_R

DGPU_SEL#

DMC_IN1_PEQ DMC_IN2_PEQ

2.2U_0603_6.3V6K~D

C1821

1

2

PCH/GPU AUX&LANE SW for DPB

U58

44

IN1_D1n

45

IN1_D1p

47

IN1_D2n

48

IN1_D2p

1

IN1_D3n

2

IN1_D3p

4

IN1_D4n

5

IN1_D4p

8

IN2_D1n

9

IN2_D1p

11

IN2_D2n

12

IN2_D2p

13

IN2_D3n

14

IN2_D3p

16

IN2_D4n

17

IN2_D4p

46

IN1_HPD

10

IN2_HPD

41

IN1_SCL

42

IN1_SDA

19

IN2_SCL

20

IN2_SDA

22

SW_DDC

21

SW_MAIN

3

IN1_PEQ

15

IN2_PEQ

23

CEXT

24

499_0402_1%~D

12

R1875

REXT

18

GND

43

GND

49

PAD

PS8271QFN48GTR-A1_QFN48_7X7

VDD VDD

PWDN_ASQ

CFG_HPD

DDCBUF PRE_EMI

RTERM

OUT_D1n OUT_D1p OUT_D2n OUT_D2p OUT_D3n OUT_D3p OUT_D4n OUT_D4p

OUT_HPD

OUT_SCL

OUT_SDA

6 31

25

28

40 34 7

36 35 33 32 30 29 27 26

39 38 37

DMC_PWDN

DMC_CFG_HPD

DMC_DDCBUF DMC_PRE_EMI

DMC_SW_P0 DMC_SW_N0 DMC_SW_P1 DMC_SW_N1 DMC_SW_P2 DMC_SW_N2 DMC_SW_P3 DMC_SW_N3

10U_0603_6.3V6M~D

1

2

R970

R970 R969

R969 R968

R968 R967

R967 R966

R966 R965

R965 R964

R964 R963

R963

DP_DMC_HPD DP_DMC_AUXP DP_DMC_AUXN

C188

2

1

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

C197

0_0402_5%~D

0_0402_5%~D 0_0402_5%~D

0_0402_5%~D

DP_DMC_HPD 38 DP_DMC_AUXP 38 DP_DMC_AUXN 38

DMC_PRE_EMI DMC_IN1_PEQ DMC_IN2_PEQ

DMC_PWDN

DMC_CFG_HPD

DMC_DDCBUF

DMC_PRE_EMI

DMC_IN1_PEQ

DMC_IN2_PEQ

DP_DMC_ML0P DP_DMC_ML0N DP_DMC_ML1P DP_DMC_ML1N DP_DMC_ML2P DP_DMC_ML2N DP_DMC_ML3P DP_DMC_ML3N

RV30 2.2K_0402_5%~DRV30 2.2K_0402_5%~D RV31 2.2K_0402_5%~DRV31 2.2K_0402_5%~D R1861 4.7K_0402_5%~D@R1861 4.7K_0402_5%~D@

1 2

R1863 4.7K_0402_5%~D@R1863 4.7K_0402_5%~D@

1 2

R1865 4.7K_0402_5%~DR1865 4.7K_0402_5%~D

1 2

R1867 4.7K_0402_5%~D@R1867 4.7K_0402_5%~D@

1 2

R1871 4.7K_0402_5%~D@R1871 4.7K_0402_5%~D@

1 2

R1873 4.7K_0402_5%~D@R1873 4.7K_0402_5%~D@

1 2

R1862 4.7K_0402_5%~D@R1862 4.7K_0402_5%~D@

1 2

R1864 4.7K_0402_5%~D@R1864 4.7K_0402_5%~D@

1 2

R1866 4.7K_0402_5%~D@R1866 4.7K_0402_5%~D@

1 2

R1868 4.7K_0402_5%~D@R1868 4.7K_0402_5%~D@

1 2

R1872 4.7K_0402_5%~D@R1872 4.7K_0402_5%~D@

1 2

R1874 4.7K_0402_5%~D@R1874 4.7K_0402_5%~D@

1 2

DP_DMC_ML0P 38 DP_DMC_ML0N 38 DP_DMC_ML1P 38 DP_DMC_ML1N 38 DP_DMC_ML2P 38 DP_DMC_ML2N 38 DP_DMC_ML3P 38 DP_DMC_ML3N 38

12 12

+3VS

SEL0Y

IN1

IN2

1

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HDMI SW for DMC

LA-6601P

30 63Tuesday, November 30, 2010

1

1.0

5

L10

1 2

BLM18BD601SN1D_0603~D

+3VS +3.3V_DVDD

L14

1 2

D D

BLM18BD601SN1D_0603~D

+3.3V_AVDD+3VS

0.1U_0603_25V7K~D

22U_0805_6.3VAM~D

C72

1

2

C74

C73

1

0.1U_0603_25V7K~D

22U_0805_6.3VAM~D

2

1

C94

C93

1

2

Close to respective power Pins

+3.3V_AVDD_RPLL

10P_0402_50V8J~D

1

C97

2

1 2

27MHZ_10PF_X3S027000BA1H-U~D

C C

+3.3V_DVDD

2.2K_0402_5%~D

R75

4700P_0402_25V7K~D

C1780

B B

HDMI_R_CK-

R1688 10_0402_5%~DR1688 10_0402_5%~D

HDMI_R_CK+

R1689 10_0402_5%~DR1689 10_0402_5%~D

HDMI_R_D0-

R1690 10_0402_5%~DR1690 10_0402_5%~D

HDMI_R_D0+

R1691 10_0402_5%~DR1691 10_0402_5%~D

HDMI_R_D1-

R1692 10_0402_5%~DR1692 10_0402_5%~D

HDMI_R_D1+

R1693 10_0402_5%~DR1693 10_0402_5%~D

HDMI_R_D2-

R1694 10_0402_5%~DR1694 10_0402_5%~D

HDMI_R_D2+

R1695 10_0402_5%~DR1695 10_0402_5%~D

+3.3V_AVDD

I2S_DAT/SPDIF_IN34

BS_RESERVED35 BS_SPI_FUN_SEL35 BS_I2C_SRC_SEL35

BS_I2C_ON_SPI_EN35

A A

BS_INTERFACE_SEL1 BS_INTERFACE_SEL0 BS_UART_FUNCTION_SEL HDMI_SPI_SI

10P_0402_50V8J~D

C98

1

2

Y3

G1

1 2

1

2

R87 249_0402_1%~DR87 249_0402_1%~D

XTALTCLK

3 4

G2

HDMI_RST#

R70 10K_0402_5%~DR70 10K_0402_5%~D

1 2

C1793 0.1U _0402_16V4Z~DC 1793 0.1U_0402_16V4Z~D C1794 0.1U _0402_16V4Z~DC 1794 0.1U_0402_16V4Z~D C1795 0.1U _0402_16V4Z~DC 1795 0.1U_0402_16V4Z~D C1796 0.1U _0402_16V4Z~DC 1796 0.1U_0402_16V4Z~D C1797 0.1U _0402_16V4Z~DC 1797 0.1U_0402_16V4Z~D C1798 0.1U _0402_16V4Z~DC 1798 0.1U_0402_16V4Z~D C1799 0.1U _0402_16V4Z~DC 1799 0.1U_0402_16V4Z~D C1800 0.1U _0402_16V4Z~DC 1800 0.1U_0402_16V4Z~D

C1781 0.1U _0402_16V4Z~DC 1781 0.1U_0402_16V4Z~D

1 2 1 2

+1.2V_AVDD

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

R156 0_0402_5%~D@ R156 0_0402_5%~D@

1 2

R153 0_0402_5%~DR 153 0_0402_5%~D

1 2

R164 0_0402_5%~DR164 0_0402_5%~D

1 2

R168 0_0402_5%~DR168 0_0402_5%~D

1 2

R171 0_0402_5%~DR171 0_0402_5%~D

1 2

R149 0_0402_5%~DR149 0_0402_5%~D

1 2

R150 0_0402_5%~DR150 0_0402_5%~D

1 2

R151 0_0402_5%~DR151 0_0402_5%~D

1 2

5

+3.3V_AVDD_RPLL

+3.3V_AVDD_LVTX

+3.3V_AVDD

+3.3V_DVDD

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2

R1876 0_0402_5%~D@ R1876 0_0402_5%~D@ R1877 0_0402_5%~D@ R1877 0_0402_5%~D@

1 2

R76 300_0402_1%R76 300_0402_1%

HDMI_IN_SW_HPD

+3.3V_AVDD +1.2VS_HDMI

L32

0.1U_0603_25V7K~D

2

C75

1

0.1U_0603_25V7K~D

2

C95

C96

1

+3.3V_DVDD

EC_HDMI_DAT EC_HDMI_CLK HDMI_SW_DAT HDMI_SW_CLK

HDMI_R_SW_CKHDMI_R_SW_CK+ HDMI_R_SW_D0HDMI_R_SW_D0+ HDMI_R_SW_D1HDMI_R_SW_D1+ HDMI_R_SW_D2HDMI_R_SW_D2+

BS_RESERVED_R

BS_SPI_R BS_I2C_SRC_R BS_I2C_ON_R HDMI_IN_SW_HPD

HDMI_SPI_CS# HDMI_SPI_CLK HDMI_SPI_SO

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

2

C76

Can not place large capacitor to

1

prevent pulse happened when LVDS power switch off/on

+3.3V_AVDD

1 2

BLM18BD601SN1D_0603~D

AVDD_RPLL pin10 C610 0.1uF to AVSS_RPLL pin7

EC_SMB_CK2_R44

EC_SMB_DA2_R44

U7

10

VDDA_3V3

11

AVDD_OUT_33

23

AVDD_OUT_33

80

HDMI_VDDA_3V3

86

HDMI_VDDA_3V3

90

ADC_AVDD_3V3

100

ADC_AVDD_3V3

38

RVDD_33

109

RVDD_33

128

RVDD_33

XTAL

8

XTAL

TCLK

9

TCLK

36

NC

4

RESETn

125

STI_TM2

92

ADC_A_N

93

ADC_A_P

95

ADC_B_N

96

ADC_B_P

98

ADC_C_N

99

ADC_C_P

105

HSYNC_IN

106

VSYNC_IN

70

VEDID_VDD_3V3

71

A_I2C_SDA

72

A_I2C_SCL

73

D1_I2C_SDA / GPIO_28

74

D1_I2C_SCL / GPIO_29

44

D2_I2C_SDA / GPIO_24

45

D2_I2C_SCL / GPIO_25

111

GPIO_44 / S_I2C_SCL

112

GPIO_43 / S_I2C_SDA

48

DPRX_AUXN

49

DPRX_AUXP

53

DPRX_ML_L0P

54

DPRX_ML_L0N

56

DPRX_ML_L1P

57

DPRX_ML_L1N

59

DPRX_ML_L2P

60

DPRX_ML_L2N

62

DPRX_ML_L3P

63

DPRX_ML_L3N

51

DPRX_REXT

43

DPRX_HPD_OUT / GPO_5

75

HDMI_RXCN

76

HDMI_RXCP

78

HDMI_RX0N

79

HDMI_RX0P

81

HDMI_RX1N

82

HDMI_RX1P

84

HDMI_RX2N

85

HDMI_RX2P

87

HDMI_REXT

113

HDMI_HPD / GPIO_22

114

HDMI_CEC / GPIO_23

39

I2S_0 (S/PDIF) / GPO_12(BS_RESERVED)

40

I2S_AUMCLK / GPO_13(BS_SPI_FUN_SEL)

41

I2S_WS / GPO_14(BS_I2C_SRC_SEL)

42

I2S_SCLK / GPO_15(BS_I2C_ON_SPI_EN)

65

SPI_CSn / IRQ_IN / GPO_8

66

SPI_CLK / GPO_9(BS_INTERFACE_SEL1)

67

SPI_DI / GPO_10(BS_INTERFACE_SEL0)

68

SPI_DO / GPO_11(BS_UART_FUNCTION_SEL)

47

DPRX_VSSD

55

DPRX_VSSA

61

DPRX_VSSA

77

HDMI_VSSA

83

HDMI_VSSA

STDP6038-AC_PQFP128_20X14~D

L11

R1700 22_0402_5%R1700 22_0402_5%

1 2

R1714 22_0402_5%R1714 22_0402_5%

1 2

LVDS

GPO_2 / TTL_D7 / PWM2(BS_OCM_BOOT_SEL)

UART_TX / TTL_SYNC1 / GPO_7(BS_XTAL_TCLK_SEL)

HDMI

4

+3.3V_AVDD_LVTX

0.1U_0603_25V7K~D

2

1

+3.3V_AVDD_RPLL

22U_0805_6.3VAM~D

1

2

0.1U_0603_25V7K~D

2

C182

C87

GPO_0 / PWM0 / TTL_D5(BS_OSC_SEL)

TTL_CKOUT / GPIO16(BS_EXTKEY_EN)

C78

C77

1

+1.2VS_HDMI +1.2V_DVDD

0.1U_0603_25V7K~D

2

C90

1

EC_HDMI_CLK EC_HDMI_DAT

ADC_DVDD_1V2

DPRX_VDDD_1V2

DPRX_VDDA_1V2 DPRX_VDDA_1V2 DPRX_VDDA_1V2

O_CH0N_LV / TTL_D29 / GPIO_67 O_CH0P_LV / TTL_D28 / GPIO_66 O_CH1N_LV / TTL_D27 / GPIO_65 O_CH1P_LV / TTL_D26 / GPIO_64 O_CH2N_LV / TTL_D25 / GPIO_63 O_CH2P_LV / TTL_D24 / GPIO_62 O_CLKN_LV / TTL_D23 / GPIO_61 O_CLKP_LV / TTL_D22 / GPIO_60 O_CH3N_LV / TTL_D21 / GPIO_59 O_CH3P_LV / TTL_D20 / GPIO_58

E_CH0N_LV / TTL_D19 / GPIO_57 E_CH0P_LV / TTL_D18 / GPIO_56 E_CH1N_LV / TTL_D17 / GPIO_55 E_CH1P_LV / TTL_D16 / GPIO_54 E_CH2N_LV / TTL_D15 / GPIO_53 E_CH2P_LV / TTL_D14 / GPIO_52 E_CLKN_LV / TTL_D13 / GPIO_51

E_CLKP_LV / TTL_D12 / GPIO_50 E_CH3N_LV / TTL_D11 / GPIO_49 E_CH3P_LV / TTL_D10 / GPIO_48

PBIAS / TTL_D9 / GPO_4

PPOWER / TTL_D8 / GPO_3

STI_TM1 / PWM1 / TTL_D6 / GPO_1

TTL_D4 / GPIO_21(BS_I2C_DEV_ID2) TTL_D3 / GPIO_20(BS_I2C_DEV_ID1) TTL_D2 / GPIO_19(BS_I2C_DEV_ID0)

TTL_D1 / GPIO18 / M_I2C_SCL

TTL_D0 / GPIO17 / M_I2C_SDA

UART_RX / TTL_SYNC2 / GPO_6

VBUFC_RPLL

LBADC_IN4 / GPIO_35

LBADC_IN3 / GPIO_34 LBADC_IN2 / GPIO_33 / TTL_SYNC4 LBADC_IN1 / GPIO_32 / TTL_SYNC3

4

+1.2VS_HDMI

L12

1 2

BLM18BD601SN1D_0603~D

L13

1 2

BLM18AG601SN1D_0603~D

116

CVDD_12

108

CVDD_12

46

CVDD_12

35

CVDD_12

88

50

64 58 52

6

VDDA_1V2

33 32 31 30 29 28 27 26 25 24

21 20 19 18 17 16 15 14 13 12

3 2

1 127 126 124 123 122 121 120

119 118 117

5

103 104 101 102

110

GPIO_45

7

VSSA_33

34

LVVSS

22

LVVSS

115

CRVSS

107

CRVSS

69

CRVSS

37

CRVSS

97

ADC_VSSA

94

ADC_VSSA

91

ADC_VSSA

89

ADC_VSSD

0.1U_0603_25V7K~D

22U_0805_6.3VAM~D

2

1

C79

1

2

0.1U_0603_25V7K~D

22U_0805_6.3VAM~D

1

2

C85

C84

2

1

EC_HDMI_CLK 32

EC_HDMI_DAT 32

+1.2V_DVDD

+1.2V_AVDD

LVDS_6038_TXOUT0LVDS_6038_TXOUT0+ LVDS_6038_TXOUT1LVDS_6038_TXOUT1+ LVDS_6038_TXOUT2LVDS_6038_TXOUT2+ LVDS_6038_TXCLKLVDS_6038_TXCLK+

LVDS_6038_TZOUT0LVDS_6038_TZOUT0+ LVDS_6038_TZOUT1LVDS_6038_TZOUT1+ LVDS_6038_TZOUT2LVDS_6038_TZOUT2+ LVDS_6038_TZCLKLVDS_6038_TZCLK+

HDMI_IN_BKL_EN HDMI_IN_ENVDD

BS_OCM_BOOT_SEL HDMI_IN_AUD_CODEC HDMI_IN_PWM BS_I2C_DEV_ID2 BS_I2C_DEV_ID1

BS_I2C_DEV_ID0 DHMI_IN_NV_CLK_R DHMI_IN_NV_DAT_R

1 2

R1667 0_0402_5%~DR 1667 0_0402_5%~D

BS_EXTKEY_EN

UART_TX_6038

UART_RX_6038

R1668 10K_0402_5%~D

HDMI_PLUG_IN_CAB_DET

R1670 10K_0402_5%~D

R1670 10K_0402_5%~D R1671 10K_0402_5%~D

R1671 10K_0402_5%~D

R1842 0_0402_5%~DR1842 0_0402_5%~D

R1843 0_0402_5%~DR1843 0_0402_5%~D R1844 0_0402_5%~DR1844 0_0402_5%~D

BS_XTAL_TCLK_SEL

12

12 12

HDMI_TOGGLE 34,44

+5VS

0.1U_0402_16V4Z~D

C365

1

2

3

+1.2V_AVDD

0.1U_0603_25V7K~D

2

C80

1

0.1U_0603_25V7K~D

2

C86

1

HDMI_SPI_CS# HD MI_SPI_CS#_R HDMI_SPI_SO H DMI_SPI_SO_R

+3.3V_DVDD

LVDS_6038_TXOUT0- 25 LVDS_6038_TXOUT0+ 25 LVDS_6038_TXOUT1- 25 LVDS_6038_TXOUT1+ 25 LVDS_6038_TXOUT2- 25 LVDS_6038_TXOUT2+ 25 LVDS_6038_TXCLK- 25 LVDS_6038_TXCLK+ 25

LVDS_6038_TZOUT0- 25 LVDS_6038_TZOUT0+ 25 LVDS_6038_TZOUT1- 25 LVDS_6038_TZOUT1+ 25 LVDS_6038_TZOUT2- 25 LVDS_6038_TZOUT2+ 25 LVDS_6038_TZCLK- 25 LVDS_6038_TZCLK+ 25

HDMI_IN_BKL_EN 26 HDMI_IN_ENVDD 26

1 2

R1663 0_0402_5%~DR 1663 0_0402_5%~D

1 2 1 2

UART_TX_6038 28 UART_RX_6038 28

R333

4.7K_0402_5%~D

1 2

UART_RX_6038

0.1U_0603_25V7K~D

2

C81

2

1

C83

C82

1.2V TDC 0.52A

1

0.1U_0603_25V7K~D

Peak Current 0.73A OCP current 3.5A

0.1U_0603_25V7K~D

2

C89

C91

C88

C91

1

R1658

15_0402_5%~D

1 2

R1659 15_0402_5%~D

1 2

R1657 10K_0402_5%~DR1657 10K_0402_5%~D

HDMI_IN_PWM 26

BS_OSC_SEL

HDMI_PLUG_IN_CAB_DET

+HDMI_IN_5VS

3

0.1U_0603_25V7K~D

2

1

12

+3.3V_DVDD

1 2

HDMI_IN_AUDIO_CODEC 34

DHMI_IN_NV_CLK 26

DHMI_IN_NV_DAT 26

+3.3V_DVDD

1

3

2

+5VS

R1651 100K_0402_5%~DR1651 100K_0402_5%~D

1U_0402_6.3V6K~D

C1772

1

2

+3VS

12

R172

0_0402_5%~D

C92

1

C1775

2

10U_0805_4VAM~D

2Mbit SPI ROM

U612

1

/CS

2

DO_IO1

3

/WP

4

GND

W25X20BVSNIG_SO8

4.7K_0402_1%~D

12

@

R1744

EDID_WP

R168722_0402_5% R168722_0402_5%

10K_0402_5%~D

12

R1669

.1U_0402_16V7K~D

C1791

1

2

MBK1608221YZF_2P

BAV99-7-F_SOT23-3

BAV99-7-F_SOT23-3 D50

@D50

@

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

16KBit

NVRAM

U39

1

E0

2

E1

3

E2

4

VSS

M24C16-WMN6TP_SO8

MMST3904-7-F_SOT323-3~D

C

2

Q261

B

E

3 1

R330 33K_0402_5%

L101

12

1 2

U611

NC

VDD

VIN

VOUT

EN

ADJ

PGOOD

GND GND

RT9025-25PSP_SO8

+3.3V_DVDD

R1743 22_0402_5%R1743 22_0402_5% R1742 22_0402_5%R1742 22_0402_5%

1

221

1

C1792

2

U614

2Kbit

E0

VCC

E1

WC SCL

E2

SDA

VSS

M24C02-WMN6TP_SO8

M24C02

5

6

7

8 9

R165610K_0402_5%~D R 165610K_0402_5%~D

12

0.1U_0402_16V4Z~D

1

C445

2

1 2 1 2

1

221

D23 1SS355TE-17_SOD323-2D23 1SS355TE-17_SOD323-2

+5VS_HDMI_IN_EDID

4.7K_0402_1%~D

12

8 7

HDMI_SW_CLK

6

HDMI_SW_DAT

5

4

3

2

1

8

VCC

7

/HOLD

6

CLK

HDMI_SPI_SI_R HDMI_SPI_SI

5

DIO_IO0

8

VCC

7

WC

6

SCL

5

SDA

+HDMI_IN_5VS

D30

1SS355TE-17_SOD323-2

0.1U_0402_16V4Z~D

1 2 3 4

2KBit

HDMI_IN_CAB_DET# 44

DMN66D0LDW-7_SOT363-6~D

D

Q285A

S

2

12

HDMI_IN_HPDHDMI_IN_HPD

220P_0402_50V7K~D

1

C1782

2

HDMI_IN_CAB_DET#

HDMI_IN_CAB_DET# HDMI_IN_DET#

.1U_0402_16V7K~D

C183

12

+3.3V_DVDD

.1U_0402_16V7K~D

2

1

1 2 1 2

HDMI_SPI_CLK_R

+5VS

4.7K_0402_1%~D

12

R1683

R1684

+HDMI_IN_5VS

6

2

G

1

R1845 0_0402_5%~DR1845 0_0402_5%~D

1 2

L52

HDMI_SPI_CLKHDMI_SPI_CLK_R

12

1

4.7K_0402_1%~D

2

12

R1754

DHMI_IN_NV_CLK_R DHMI_IN_NV_DAT_R

1 2 1 2 1 2

100K_0402_5%~D

R1968

12

15_0402_5%~D

@R1662

@

R1662

15P_0402_50V8J~D

@

C1779

HDMI_IN_HPD

+HDMI_IN_5VS

BLM18AG601SN1D_0603~D

10K_0402_5%~D

12

R1653

20K_0402_5%~D

12

R1655

C1778

R166015_0402_5%~D

R166015_0402_5%~D R166115_0402_5%~D R166115_0402_5%~D

4.7K_0402_1%~D

12

R1753

R1685

R1686 22_0402_5%

R1686 22_0402_5% RC123 100_0402_1%~DRC123 100_0402_1%~D RC124 100_0402_1%~DRC124 100_0402_1%~D

12

1

+1.2VS_A+1.2VS

L31

12

22U_0805_6.3VAM~D

BLM18AG601SN1D_0603~D

For 4028

+3.3V_DVDD

R100 10K_0402_5%~DR100 10K_0402_5%~D

R99 10K_0402_5%~DR99 10K_0402_5%~D

R98 10K_0402_5%~DR98 10K_0402_5%~D

R90 10K_0402_5%~DR90 10K_0402_5%~D

R91 10K_0402_5%~DR91 10K_0402_5%~D

R92 10K_0402_5%~DR92 10K_0402_5%~D

R93 10K_0402_5%~DR93 10K_0402_5%~D

R103 10K_0402_5%~DR103 10K_0402_5%~D

R96 10K_0402_5%~DR96 10K_0402_5%~D

R89 10K_0402_5%~DR89 10K_0402_5%~D

R86 10K_0402_5%~DR86 10K_0402_5%~D

R84 10K_0402_5%~DR84 10K_0402_5%~D

R82 10K_0402_5%~DR82 10K_0402_5%~D

R79 10K_0402_5%~DR79 10K_0402_5%~D

R1665 10K_0402_5%~DR1665 10K_0402_5%~D

HDMI_R_CK+

HDMI_R_CK- HDMI_IN_CK-

HDMI_R_D0+ HDMI_IN_D0+

HDMI_R_D0-

HDMI_R_D1+ HDMI_IN_D1+

HDMI_R_D1- HDMI_IN_D1-

HDMI_R_D2+ HDMI_IN_D2+

HDMI_R_D2- HDMI_IN_D2-

EDID_WP HDMI_CLK HDMI_DAT

1 2

Title

Size Document N umber R ev

Date: Sheet of

22U_0805_6.3VAM~D

C433

1

2

1 2

R68 0_0402_5%~D@ R68 0_0402_5%~D@

1 2

L15

1

4

WCM2012F2S-900T04_0805

1 2

R69 0_0402_5%~D@ R69 0_0402_5%~D@

R71 0_0402_5%~D@ R71 0_0402_5%~D@

1 2

L16

1

4

WCM2012F2S-900T04_0805

1 2

R72 0_0402_5%~D@ R72 0_0402_5%~D@

R73 0_0402_5%~D@ R73 0_0402_5%~D@

1 2

L17

1

4

WCM2012F2S-900T04_0805

1 2

R74 0_0402_5%~D@ R74 0_0402_5%~D@

R77 0_0402_5%~D@ R77 0_0402_5%~D@

1 2

L18

1

4

WCM2012F2S-900T04_0805

R80 0_0402_5%~D@ R80 0_0402_5%~D@

+HDMI_IN_5VS

2

B

R168222_0402_5% R168222_0402_5%

HDMI_IN_DET# HDMI_DAT HDMI_CLK

HDMI_IN_CK-

HDMI_IN_CK+ HDMI_IN_D0-

HDMI_IN_D0+ HDMI_IN_D1-

HDMI_IN_D1+ HDMI_IN_D2-

HDMI_IN_D2+

Compal Electronics, Inc.

HDMI input - STDP6038

LA-6601P

1 2

R1681

1K_0402_1%~D

1 2

MMST3904-7-F_SOT323-3~D

C

E

3 1

1

BS_UART_FUNCTION_SEL

2

3

2

3

2

3

2

3

Q260

SUYIN_100042GR019M23UZL

BS_I2C_DEV_ID2

BS_I2C_DEV_ID1

BS_I2C_DEV_ID0

BS_RESERVED_R

BS_SPI_R

BS_I2C_SRC_R

BS_I2C_ON_R

BS_EXTKEY_EN

BS_OCM_BOOT_SEL

BS_INTERFACE_SEL1

BS_INTERFACE_SEL0

BS_XTAL_TCLK_SEL

BS_OSC_SEL

HDMI_IN_AUD_CODEC

Link Done

(pin 19) plug in 5V

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

CONN@

31 63Tuesday, November 30, 2010

HDMI_IN_CK+

HDMI_IN_D0-

GND GND GND GND

20 21 22 23

1.0

5

+1.2VS_A

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D R308 240_0402_1%R308 240_0402_1%

C390

2

1

D D

10P_0402_50V8J~D

2

1

TX_XTAL

1 2

G1

C C

B B

A A

G1

27MHZ_10PF_X3S027000BA1H-U~ D

LVDS_SW_TZOUT0-25 LVDS_SW_TZOUT0+25

LVDS_SW_TZOUT1-25 LVDS_SW_TZOUT1+25

LVDS_SW_TZOUT2-25 LVDS_SW_TZOUT2+25

LVDS_SW_TZCLK-25 LVDS_SW_TZCLK+25

LV_DP_A0N_L24 LV_DP_A0P_L24 LV_DP_A1N_L24 LV_DP_A1P_L24 LV_DP_A2N_L24 LV_DP_A2P_L24 LV_DP_A3N_L24 LV_DP_A3P_L24

+AVDD_3V3

2

C407

1

3 4

G2

Y4

DP_4028_HPD24

LV_DP_AUXN24 LV_DP_AUXP24

10P_0402_50V8J~D

C408

TX_TCLK

LVDS_SW_TZOUT0LVDS_SW_TZOUT0+

LVDS_SW_TZOUT1LVDS_SW_TZOUT1+

LVDS_SW_TZOUT2LVDS_SW_TZOUT2+

LVDS_SW_TZCLKLVDS_SW_TZCLK+

12

2.7K_0402_5%

47P_0402_50V8J~D

LV_DP_A0N_L LV_DP_A0P_L LV_DP_A1N_L LV_DP_A1P_L LV_DP_A2N_L LV_DP_A2P_L LV_DP_A3N_L LV_DP_A3P_L

+3VS

12

R331

2

C409

1

DP_4028_HPD

LV_DP_AUXN LV_DP_AUXP

TX_XTAL

TX_TCLK

RESET

SPI_DI_4028 SPI_DO_4028 SPI_CLK_4028 SPI_CSN_4028

IRQ/BOOT7

12

U606B

P8

O0_LVRX_CH0N_VIDIN23

N8

O0_LVRX_CH0P_VIDIN22

N9

O0_LVRX_CH1N_VIDIN21

M9

O0_LVRX_CH1P_VIDIN20

M10

O0_LVRX_CH2N_VIDIN19

L10

O0_LVRX_CH2P_VIDIN18

N11

O0_LVRX_CLKN_VIDIN17

M11

O0_LVRX_CLKP_VIDIN16

P12

O0_LVRX_CH3N_VIDIN15

N12

O0_LVRX_CH3P_VIDIN14

P13

O0_LVRX_CH4N_VIDIN3

N13

O0_LVRX_CH4P_VIDIN2

M13

O1_LVRX_CH0N_VIDIN23

M14

O1_LVRX_CH0P_VIDIN22

L12

O1_LVRX_CH1N_VIDIN21

L13

O1_LVRX_CH1P_VIDIN20

K12

O1_LVRX_CH2N_VIDIN19

K11

O1_LVRX_CH2P_VIDIN18

J12

O1_LVRX_CLKN_VIDIN17

J13

O1_LVRX_CLKP_VIDIN16

H13

O1_LVRX_CH3N_VIDIN15

H14

O1_LVRX_CH3P_VIDIN14

G13

O1_LVRX_CH4N_VIDIN3

G14

O1_LVRX_CH4P_VIDIN2

C11

C12

C10 D10

B6 C6 A7 B7 A8 B8 B9 C9

B4

C4

E6

D13 C14 E12

F10

G4

D12

R3090_0402_5%~D R3090_0402_5%~D

C3

R3100_0402_5%~D R3100_0402_5%~D

F3

R3110_0402_5%~D R3110_0402_5%~D

G3

U606C

DPTX_REXT

DPTX_HPD_IN/GPIO_23

DPTX_AUXN DPTX_AUXP

DPTX_ML_L0N DPTX_ML_L0P DPTX_ML_L1N DPTX_ML_L1P DPTX_ML_L2N DPTX_ML_L2P DPTX_ML_L3N DPTX_ML_L3P

TX_XTAL

TX_TCLK

RESETn

SPI_DI/HOST_D1/GPO_19 SPI_DO/HOST_D0/GPO_20 SPI_CLK/HOST_CLK/GPIO_18 SPI_CSn/HOST_CS/GPIO_17

IR_IN/GPIO_6

IRQ/BOOT7/GPIO_12

VBUFC_RPLL

TESTMODE0

TESTMODE1

4

AUX_I2C_SCL/GPIO_15

AUX_I2C_SDA_GPIO_16

UART_TX/BOOT1/GPIO_13

eDP

AUX_UART_TX/BOOT4/GPIO_21

AUX_UART_RX/GPIO_22

CLK_OUT/GPIO_5/BOOT0

SYS, Audio & DPTX

PWM0/GPIO_0/BOOT3

STDP4028-AB_LFBGA164

O0_LVRX_CH5N_VIDIN_CLK

O0_LVRX_CH5P_VIDIN_DE

O0_LVRX_CH6N_VIDIN24

O0_LVRX_CH6P_VIDIN25

O0 & O1 LVDS Input

O1_LVRX_CH5N_VIDIN_CLK

O1_LVRX_CH5P_VIDIN_DE

O1_LVRX_CH6N_VIDIN24

O1_LVRX_CH6P_VIDIN25

STDP4028-AB_LFBGA164

I2C_SCL/GPIO_24 I2C_SDA/GPIO_25

UART_RX/GPIO_14

I2S_0/GPIO_8

I2S_1/GPIO_9 I2S_2/GPIO_10 I2S_3/GPIO_11

I2S_BCLK/GPIO_7

I2S_WCLK/GPIO_4

NC1 NC2 NC3 NC4 NC5 NC6

GPIO_1/BOOT2

GPIO_2/BOOT5

GPIO_3/BOOT6

M8

L9

L11

M12

J10

H11

K10

J11

C13 B14

B13 A13

C2 B1

B12 A12

D2 F5 F4 D3

C1

E4

E3

F12 G12 D11 E11 B2 B3

E5

D4

G10

F11

LVDS_SW_TXOUT0-25 LVDS_SW_TXOUT0+25

LVDS_SW_TXOUT1-25 LVDS_SW_TXOUT1+25

LVDS_SW_TXOUT2-25 LVDS_SW_TXOUT2+25

LVDS_SW_TXCLK-25 LVDS_SW_TXCLK+25

EC_HDMI_CLK_R EC_HDMI_DAT_R

I2C_SCL I2C_SDA

UART_TX UART_RX

AUX_UART_TX AUX_UART_RX

3D_VIDEO

GPIO_0/BOOT3

GPIO_1/BOOT2

GPIO_2/BOOT5

GPIO_3/BOOT6

3

R335 0_0402_5%~D@ R335 0_0402_5%~D@ R341 0_0402_5%~D@ R341 0_0402_5%~D@

UART_TX 27 UART_RX 27

+3VS

R312 4.7K_0402_5%~DR312 4.7K_0402_5%~D R318 4.7K_0402_5%~DR318 4.7K_0402_5%~D R320 4.7K_0402_5%~DR320 4.7K_0402_5%~D R307 4.7K_0402_5%~DR307 4.7K_0402_5%~D R306 4.7K_0402_5%~DR306 4.7K_0402_5%~D R304 4.7K_0402_5%~DR304 4.7K_0402_5%~D R305 4.7K_0402_5%~DR305 4.7K_0402_5%~D

R315 4.7K_0402_5%~DR315 4.7K_0402_5%~D R317 4.7K_0402_5%~D@R317 4.7K_0402_5%~D@ R319 4.7K_0402_5%~DR319 4.7K_0402_5%~D R321 4.7K_0402_5%~DR321 4.7K_0402_5%~D R322 4.7K_0402_5%~DR322 4.7K_0402_5%~D R325 4.7K_0402_5%~D@R325 4.7K_0402_5%~D@ R327 4.7K_0402_5%~DR327 4.7K_0402_5%~D

0.1U_0402_16V4Z~D

C366

1

2

0.1U_0402_16V4Z~D

@

C364

1

2

1 2 1 2 1 2 1 2 1 2 1 2 1 2

12 12

+5VS

4.7K_0402_5%~D

R334

1 2

UART_RX

+5VS

4.7K_0402_5%~D

@

R332

1 2

AUX_UART_RX

VEGA STDP4028 DPTx BootStraps

LVDS_SW_TXOUT0-

LVDS_SW_TXOUT0+

LVDS_SW_TXOUT1-

LVDS_SW_TXOUT1+

LVDS_SW_TXOUT2-

LVDS_SW_TXOUT2+

LVDS_SW_TXCLKLVDS_SW_TXCLK+

P2

E0_LVRX_CH0N_VIDIN13

N2

E0_LVRX_CH0P_VIDIN12

P3

E0_LVRX_CH1N_VIDIN11

N3

E0_LVRX_CH1P_VIDIN10

N4

E0_LVRX_CH2N_VIDIN9

M4

E0_LVRX_CH2P_VIDIN8

M5

E0_LVRX_CLKN_VIDIN7

L5

E0_LVRX_CLKP_VIDIN6

N6

E0_LVRX_CH3N_VIDIN5

M6

E0_LVRX_CH3P_VIDIN4

P7

E0_LVRX_CH4N_VIDIN1

N7

E0_LVRX_CH4P_VIDIN0

G1

E1_LVRX_CH0N_VIDIN13

G2

E1_LVRX_CH0P_VIDIN12

H1

E1_LVRX_CH1N_VIDIN11

H2

E1_LVRX_CH1P_VIDIN10

J2

E1_LVRX_CH2N_VIDIN9

J3

E1_LVRX_CH2P_VIDIN8

K3

E1_LVRX_CLKN_VIDIN7

K4

E1_LVRX_CLKP_VIDIN6

L2

E1_LVRX_CH3N_VIDIN5

L3

E1_LVRX_CH3P_VIDIN4

M1

E1_LVRX_CH4N_VIDIN1

M2

E1_LVRX_CH4P_VIDIN0

+3VS

BLM18AG601SN1D_0603~D

EC_HDMI_CLK 31

EC_HDMI_DAT 31

+1.2VS_A +VDD_RPLL_1V2

L46

BLM18AG601SN1D_0603~D

+1.2VS_A

L48

BLM18AG601SN1D_0603~D

3D_VIDEO AUX_UART_TX GPIO_3/BOOT6 I2C_SCL

I2C_SDA EC_HDMI_DAT_R EC_HDMI_CLK_R

UART_TX

AUX_UART_TX

GPIO_0/BOOT3

GPIO_1/BOOT2

GPIO_2/BOOT5

GPIO_3/BOOT6

IRQ/BOOT7

U606A

E0_LVRX_CH5N_VIDIN_VSYNC E0_LVRX_CH5P_VIDIN_HSYNC

BLM18AG601SN1D_0603~D

12

1

2

12

1

2

E0_LVRX_CH6N_VIDIN26 E0_LVRX_CH6P_VIDIN27

LVDS

E0 & E1 LVDS Input

E1_LVRX_CH5N_VIDIN_VSYNC E1_LVRX_CH5P_VIDIN_HSYNC

E1_LVRX_CH6N_VIDIN26 E1_LVRX_CH6P_VIDIN27

STDP4028-AB_LFBGA164

22U_0805_6.3VAM~D

2

C391

1

+AVDD_LVRX_1V2

22U_0805_6.3VAM~D

2

C410

1

2

L45

12

0.1U_0603_25V7K~D

2

C392

1

0.1U_0603_25V7K~D

2

C411

1

M7 L6

M3 L4

J5 H4

J4 K5

0.1U_0603_25V7K~D

C393

+3VS

0.1U_0603_25V7K~D

C412

10K_0402_5%~D

22U_0805_6.3VAM~D

0.1U_0603_25V7K~D

1

2

C384

C383

2

1

+3VS

BLM18AG601SN1D_0603~D

1

2

R1666

L47

0.1U_0603_25V7K~D

22U_0805_6.3VAM~D

C413

2

C414

1

12

SPI_CSN_4028 SPI_DI_4028

+1.2VS

+3VS

G11

+1.2VS_A

B11

+AVDD_3V3

+VDD_RPLL_1V2

+AVDD_LVRX_1V2

+AVDD_OUT_LV_33

H12

N14

2

1

G5

0.1U_0603_25V7K~D

2

C385

1

12

1

2

+1.2VS_A

0.1U_0603_25V7K~D

C415

U606D

E7

PVDD1

E8

PVDD1

K6

PVDD1

K9

PVDD1

PVDD21

PVDD22

DPTX_VDDA_1V2

C7

DPTX_VDDA_1V2

C8

DPTX_VDDA_1V2

D9

DPTX_VDDA_1V2

D6

VDDA_3V3

D5

VDD33_TX

A3

VDD_RPLL

L7

AVDD_LVRX_12

STDP4028-AB_LFBGA164

AVDD_OUT_LVRX_33

H3

AVDD_OUT_LVRX_33

L8

AVDD_OUT_LVRX_33

N1

AVDD_OUT_LVRX_33 AVDD_OUT_LVRX_33

+AVDD_OUT_LV_33

0.1U_0603_25V7K~D

2

C387

C386

1

+AVDD_3V3

22U_0805_6.3VAM~D

0.1U_0603_25V7K~D

2

C400

C399

1

22U_0805_6.3VAM~D

0.1U_0603_25V7K~D

2

1

C403

C402

1

2

2Mbit

U607

1

S#

2

Q

RESET#

3

W#

4

VSS

M25PE20-VMN6TP_SO8N8

0.1U_0603_25V7K~D

2

C388

1

0.1U_0603_25V7K~D

2

C401

1

0.1U_0603_25V7K~D

2

1

VCC

C D

PWR & GND

AVSS_OUT_LVRX

AVSS_OUT_LVRX AVSS_OUT_LVRX AVSS_OUT_LVRX AVSS_OUT_LVRX AVSS_OUT_LVRX AVSS_OUT_LVRX

+1.2VS

C404

8 7 6 5

AVSS_LVRX_12

0.1U_0603_25V7K~D

C389

22U_0805_6.3VAM~D

1

C394

2

0.1U_0603_25V7K~D

2

C405

1

SPI_CLK_4028 SPI_DO_4028

DPTX_VSSA DPTX_VSSA DPTX_VSSA DPTX_VSSA

VSS_RPLL

VSSA_TX

0.1U_0402_16V4Z~D

PVSS3 PVSS3

PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3 PVSS3

1

0.1U_0603_25V7K~D

2

C395

1

0.1U_0603_25V7K~D

2

C406

1

20mils

C363

1

2

A1 A14

F6 F7 F8 F9 G6 G7 G8 G9 H6 H7 H8 H9 J6 J7 J8 J9

D7 D8 E9 E10

A2

C5

K7

P1

F2 F13 H10 H5 K8 P14

2

C398

C397

C396

1

+3VS

10K_0402_5%~D

12

R1673

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

4

DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LVDS transfer eDP-STDP4028

LA-6601P

32 63Tuesday, November 30, 2010

1

1.0

5

PLT_RST#5,18,35,38,39,44

12

PCIE_PRX_GLANTX_P3_C

PCIE_PRX_GLANTX_N3_C

PCIE_PTX_GLANRX_P3

PCIE_PTX_GLANRX_N3

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLKREQ_LAN#_R

PLT_RST#

PCIE_WAKE#

5.1K_0402_1%~D

RL16

1 2

1000P_0402_50V7K~D

1U_0603_10V6K~D

CL40

1

2

1

LAN_ACTIVITY# LAN_LINK# LAN_LED2#

+VDDCT_L LAN_MDIP3 LAN_MDIN3

LAN_MDIP2 LAN_MDIN2

LAN_MDIP1 LAN_MDIN1

LAN_MDIP0 LAN_MDIN0

TIMAG: S X'FORM_ IH-160 LAN , SP050006F00

BOTHHAND: S X'FORM_ GST5009-D LF LAN,SP050006B00

@CL41

@

CL41

CL2 .1U_0402_16V7K~DCL2 .1U_0402_16V7K~D

PCIE_PRX_GLANTX_P316

PCIE_PRX_GLANTX_N316

D D

C C

B B

LANCLK_REQ#16

15P_0402_50V8J~D

25MHZ_12PF_X5H025000DC1H -H

CL18

1

2

RL12 0_0402_5%~DRL12 0_0402_5%~D

YL1

1 2

+VDDCT

12

CL1 .1U_0402_16V7K~DCL1 .1U_0402_16V7K~D

12

PCIE_PTX_GLANRX_P316

PCIE_PTX_GLANRX_N316

CLK_PCIE_LAN16

CLK_PCIE_LAN#16

12

PCIE_WAKE#17,38,39,44

0_0402_5%~D

RL15

1 2

LAN_X2

15P_0402_50V8J~D

CL19

1

2

LL2

BLM18AG601SN1D_0603~D

close to LL2

W=40mils

+3VALW

SI3456DDV-T1-GE3_TSOP6~D

B+_BIAS +LAN_IO

300K_0402_5%~D

RL18

A A

EN_WOL#44

5

1 2

13

D

2

G

S

EN_WOL

QL2

QL2 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SI3456DDV-T1-GE3_TSOP6~D

6

1U_0402_6.3V6K~D

2

CL20

1

2

1

4

UL1

Atheros

Atheros AR8151-BL1A

AR8151-BL1A

TX_P

TX_N

RX_P

RX_N

REFCLK_P

REFCLK_N

CLKREQ#

PERST#

WAKE#

SMCLK SMDATA

NC TESTMODE GND

XTLO XTLI

LED_0 LED_1 LED_2

AR8151-BL1A-RL_QFN40_5X5

TRXP0 TRXN0 TRXP1 TRXN1 TRXP2 TRXN2 TRXP3 TRXN3

AVDDL AVDDL AVDDL AVDDL

AVDDL_REG

AVDDH AVDDH

AVDDH_REG

DVDDL

DVDDL_REG

VDD33

VDDCT

RBIAS

11 12 14 15 17 18 20 21

13 19 31 34 6

16 22 9

24 37

1

40

LX

5

10

LAN_X1 LAN_X2_R

30

29

35

36

33

32

4

2

3

25 26

28 27 41

7 8

38 39 23

Version A will be fail on 802.3a need to update to Version B

TS1

1

2

QL1

D

G

.1U_0402_16V7K~D

CL42

2

1

S

45

3

1.5M_0402_5%~D

1 2

TS1

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

350UH_GST5009-CLF

1000P_0402_50V7K~D

.1U_0402_16V7K~D

@CL43

@

1

CL43

2

close to TS1

0.1U_0402_25V6K~D

RL19

CL36

1

2

4

24

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19

MX2-

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

1000P_0402_50V7K~D

@CL45

@

CL44

2

CL45

1

W=40mils

1000P_0402_50V7K~D

CL31

1

2

RJ45_CT3 RJ45_MDI3+ RJ45_MDI3-

RJ45_CT2 RJ45_MDI2+ RJ45_MDI2-

RJ45_CT1 RJ45_MDI1+ RJ45_MDI1-

RJ45_CT0 RJ45_MDI0+ RJ45_MDI0-

1000P_0402_50V7K~D

.1U_0402_16V7K~D

CL46

2

1

2

1A

1U_0603_10V6K~D

.1U_0402_16V7K~D

CL32

1

2

close to Pin 1

RL21 75_0402_1%~D

1 2

RL22 75_0402_1%~D

1 2

RL23 75_0402_1%~DRL23 75_0402_1%~D

1 2

RL24 75_0402_1%~DRL24 75_0402_1%~D

1 2

.1U_0402_16V7K~D

@CL47

@

CL48

1

CL47

2

10U_0603_6.3V6M~D

CL33

10U_0603_6.3V6M~D

CL34

CL35

1

2

LAN_MDIP0 LAN_MDIN0 LAN_MDIP1 LAN_MDIN1 LAN_MDIP2 LAN_MDIN2 LAN_MDIP3 LAN_MDIN3

+AVDDL

+AVDDH

+DVDDL

W=40mils

+LX

+RBIAS

3

RL2 49.9_0402_1%RL2 49.9_0402_1% RL1 49.9_0402_1%RL1 49.9_0402_1% RL3 49.9_0402_1%RL3 49.9_0402_1% RL4 49.9_0402_1%RL4 49.9_0402_1% RL5 49.9_0402_1%RL5 49.9_0402_1% RL7 49.9_0402_1%RL7 49.9_0402_1% RL8 49.9_0402_1%RL8 49.9_0402_1% RL9 49.9_0402_1%RL9 49.9_0402_1%

12 12 12 12 12 12 12 12

+LAN0

CL3 1000P_0402_50V7K~DCL3 1000P_0402_50V7K~D

1 2

CL4 .1U_0402_16V7K~DCL4 .1U_0402_16V7K~D

1 2

+LAN1

CL5 1000P_0402_50V7K~DCL5 1000P_0402_50V7K~D

1 2

CL6 .1U_0402_16V7K~DCL6 .1U_0402_16V7K~D

1 2

+LAN2

CL7 1000P_0402_50V7K~DCL7 1000P_0402_50V7K~D

1 2

CL8 .1U_0402_16V7K~DCL8 .1U_0402_16V7K~D

1 2

+LAN3

CL9 1000P_0402_50V7K~DCL9 1000P_0402_50V7K~D

1 2

CL10 .1U_0402_16V7K~DCL10 .1U_0402_16V7K~D

1 2

2

close to Lan chip 1000p reserved for EMI

W=40mils W=20mils

LL1

1 2

.1U_0402_16V7K~D

10U_0603_6.3V6M~D

1000P_0402_50V7K~D

CL12

1

CL11

2

.1U_0402_16V7K~D

CL14

CL13

1

2

+LAN_IO

+LX

2.2UH_1225AS-H-2R2M-P2_1.3A_20%~D

close to Lan pin 40

+VDDCT

close to Lan pin5

12

2.37K_0402_1%~D

RL14

+AVDDH

1000P_1808_3KV7K~D

CL39

2

1

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

W=20mils W=20mils

close to Lan pin9

.1U_0402_16V7K~D

1U_0603_10V6K~D

.1U_0402_16V7K~D

CL21

1

2

close to Lan pin16

CL22

1

2

.1U_0402_16V7K~D

CL23

CL24

1

2

close to Lan pin22 close to Lan pin13

RL25 330_0402_5%RL25 330_04 02_5%

RL26 130_0402_1%~DRL26 130_0402_1%~D

1 2

+LAN_IO

RL20 0_0402_5%~DRL20 0_0402_5%~D

LAN_LED2#

RL27 330_0402_5%RL27 330_0402_5%

2

1 2

PLT_RST#

PCIE_WAKE#

CLKREQ_LAN#_R

RL10 4.7K_0402_5%~D@RL10 4.7K_0402_5%~D@

1 2

RL11 4.7K_0402_5%~D@RL11 4.7K_0402_5%~D@

1 2

RL13 4.7K_0402_5%~DRL13 4.7K_0402_5%~D

1 2

+DVDDL+VDDCT

1U_0603_10V6K~D

CL15

1

2

.1U_0402_16V7K~D

CL16

1

2

close to Lan pin37

close to Lan pin6 close to Lan pin31

+AVDDL

.1U_0402_16V7K~D

1U_0603_10V6K~D

CL25

1

2

.1U_0402_16V7K~D

CL26

CL27

1

2

CL27

1

2

close to Lan pin34

1

CL38

2

LAN_ACTIVITY_R#LAN_ACTIVITY#

RJ45_MDI3-

RJ45_MDI3+

RJ45_MDI1-

RJ45_MDI2-

RJ45_MDI2+

RJ45_MDI1+

RJ45_MDI0-

RJ45_MDI0+

LAN_LINK#_RLAN_LINK#

LAN_LED_VCC1

LAN_LED2#_R

1

CL49

2

470P_0402_50V7K~D

12

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet of

1

+LAN_IO

.1U_0402_16V7K~D

CL17

1

2

close to Lan pin24

close to Lan pin19

.1U_0402_16V7K~D

CL28

CL29

1

2

JLAN1

CONN@JLAN1

CONN@

Yellow LED-

Yellow LED+

PR4-

PR4+

PR2-

PR3-

PR3+

PR2+

PR1-

PR1+

Green LED-

LED+

ORANGE_LED-

TYCO_2041332-1

Link Done

LA-6601P

CL29

1

2

9

10

8

7

6

5

4

3

2

1

11

12

13

Compal Electronics, Inc.

GLAN AR8151 AL1A

.1U_0402_16V7K~D

CL30

1

2

15

SHLD2

14

SHLD1

33 63Tuesday, November 30, 2010

1

1.0

A

EAPD# SPK_MUTE#

EAPD#

EA_EC_SPK_MUTE#

HP_JD

HP1_JD

HP2_JD

+3VS

10K_0402_5%~D

R118

2

G

+3VS

R1902

2

G

HDMI_TOGGLE 31,44

SENSE_A

+3VS

100K_0402_5%~D

12

R133

Q16A

SPK_MUTE#

+3VS

1 2

5

U14

1

P

INB

2

INA

G

TC7SZ02FU_SSOP5

3

12

1

D

Q15

Q15 PMF3800SN_SC70-3~D

PMF3800SN_SC70-3~D

S

3

R1903

10K_0402_1%~D

12

5

G

6

D

S

1

Q284A

DMN66D0LDW-7_SOT363-6~D

39.2K_0402_1%

39.2K_0402_1% R132

R132

2

G

A

1

2

C124

Y

EA_EC_SPK_MUTE#

DMN66D0LDW-7_SOT363-6~D

12

6

D

S

1

SPK_MUTE#35,44

1 1

2 2

HP_JD

3 3

100K_0402_5%~D

4 4

HP1_JD

DMN66D0LDW-7_SOT363-6~D

+3VS

R10120K_0402_1%~D R10120K_0402_1%~D

12

R10410K_0402_5%~D R10410K_0402_5%~D

12

+3VS

C99 0.1U_0402_16V4Z~DC99 0.1U_0402_16V4Z~D

5

U8

1

P

IN1

O

2

IN2

G

74AHC1G08GW_SOT353-5~D

3

1 2

R112 0_0402_5%~D@R112 0_0402_5%~D@

+3VS

C114 0.1U_0402_1 0V6K~DC114 0.1U_0402_10V6K~D

1 2

5

P

IN1

4

O

IN2

G

U11

74AHC1G08GW_SOT353-5~D

3

DMIC_CLK24,26

DMIC024,26

0.1U_0402_10V6K~D

HP_JD

4

1

HP_JD#

12

3

D

S

4

Q284B

MIC_JD

20K_0402_1%~D

12

IN1

2

IN2

SENSE_B

+3VS +3VS

100K_0402_5%~D

12

R125

DMN66D0LDW-7_SOT363-6~D

Q6A

1

R1677

2

B

1 2

EA_EC_SPK_MUTE#

4

SPK_AMP_MUTE# 35

Reserve for EMI please close to U12

L102 FBMA-10-10050 5-301T_2PL102 FBMA-10-100505-301T_2P

1 2

R110 0_0402_5%~DR110 0_0402_5%~D

1 2

15P_0402_50V8J~D

C119

+3VS

C128 0.1U_0402_10V6K~DC 128 0.1U_0402_10V6K~D

1 2

5

P

HP_AMP_MUTE#

4

O

G

U15

3

74AHC1G08GW_SOT353-5~D

1000P_0402_50V7K~D

20K_0402_1%~D

39.2K_0402_1%

12

2

G

1000P_0402_50V7K~D

C142

12

R123

6

D

S

1

R131

1 2

5.1K_0402_1%~D

+3VS

100K_0402_5%~D

12

R1678

B

+AVDD_AUDIO

LINE_OUT_JD 35

1

R124

2

3

5

G

Q6B

4

DMN66D0LDW-7_SOT363-6~D

HDA_SPKR15

0_0603_5%~D

HDA_SDIN015

@

1

2

+3VS

12

HDA_RST_AUDIO#

1

2

1 2

5.1K_0402_1%~D

C134

12

BEEP#44

R102

1

2

4.7K_0402_1%~D

.1U_0402_16V7K~D

R122

100K_0402_5%~D

+DVDD_AUDIO+3VS

12

0.1U_0402_10V6K~D

1

2

HDA_BITCLK_AUDIO15

1 2

R107 33_0402_5%~DR107 33_0402_5%~D

HDA_SDOUT_AUDIO15

HDA_SYNC_AUDIO15

HDA_RST_AUDIO#15

15P_0402_50V8J~D

HDMI_IN_AUDIO_CODEC31

@

C120

I2S_DAT/SPDIF_IN31

R1680

C28

+AVDD_AUDIO

R126

HP2_JD

C137

2.2U_0805_10V7K~D

C136

2.2U_0805_10V7K~D

1 2

C144 0.1U_0402_16V4Z~DC144 0.1U_0402_16V4Z~D

1 2

C145 0.1U_0402_16V4Z~DC145 0.1U_0402_16V4Z~D

C

C101

1

2

HP2_CD_L1HP2_CD _L HP2_CD_R1HP2_CD_R

BEEP_C#

PCH_SPKR_C

C

1U_0402_6.3V6K~D

C102

+3VS

L49

+DVDD_CORE

BLM18BD601SN1D_0603~D

HDA_SDIN0_R

SENSE_A SENSE_B

PC_BEEP

12

10U_0603_6.3V6M~D

0.1U_0402_10V6K~D

1

C103

2

75mA

3

U12

6

BITCLK

8

SDI_CODEC

5

SDO

10

SYNC

11

RESET#

2

VOL_UP/DMIC_CLK/GPIO1

4

VOL_DN/DMIC_0/GPIO2

30

DMIC1/GPIO5

13

SENSE_A

34

SENSE_B

32

SENSE_C

12

PCBEEP

47

EAPD/SPDIF IN/GPIO0

18

PORTI_L

19

PORTI_C

20

PORTI_R

7

DVSS

26

AVSS1

42

AVSS2

92HD73C1X5PRGXC1X8_QFP48_7X7

Place under codec

R303 0_1206_5%~DR303 0_1206_5%~D

1 2

R316 0_1206_5%~DR316 0_1206_5%~D

1 2

R329 0_1206_5%~DR329 0_1206_5%~D

1 2

R340 0_1206_5%~DR340 0_1206_5%~D

1 2

GND AGND

C138

270P_0402_50V7K~D

R134

R135

1 2

C135

R129

2K_0402_1%~D

1 2 1 2

R128

2K_0402_1%~D

1 2

100K_0402_5%~D

1 2

100K_0402_5%~D

D

1

C104

2

DVDD_IO

HP2_CD_L2 HP2_CD_R2

+3VS_AVDD

D

9

DVDD_CORE1DVDD_CORE

SPDIF OUT1/GPIO3

C139

1U_0603_10V4Z~D

1 2

HP_AMP_MUTE#

1U_0603_10V4Z~D

PC_BEEP 35

R136

@R136

@

10K_0402_5%~D

1 2

1U_0402_6.3V6K~D

0.1U_0402_10V6K~D

C105

C106

1

2

132mA

38

AVDD125AVDD2

PORTA_L

PORTA_R

VREFOUT-A

PORTB_L

PORTB_R

VREFOUT-B

PORTC_L

PORTC_R

VREFOUT-C

PORTD_L

PORTD_R

PORTE_L PORTE_R

VREFOUT-E

PORTF_L PORTF_R

PORTG_L

PORTG_R

PORTH_L

PORTH_R

SPDIF OUT0

VREFFILT

CAP2

+3VS_AVDD +3VS

U16

1 3

6 8

5

MAX9724BETC+T_TQFN-EP12_3X3

C131

2

1

2

HP1_CD_L

39

HP1_CD_R

41 37

LINEOUT_L

21

LINEOUT_R

22 28

Int. Speaker and

23

Sub woofer

24

CODEC_EAPD# EAPD#

29

SPK_CD_L

35

SPK_CD_R

36

MIC_CD_L

14

MIC_CD_R

15 31

HP2_CD_L

16

HP2_CD_R

17

HDMI_IN_L

43

HDMI_IN_R

44

45 46

48 40

27 33

1

2

L51

BLM18AG601SN1D_0603~D

C1P

OUTR

C1N

OUTL

PVSS

INL

SVSS

INR

PGND

SHDN

SGND

VDD12GND

HDMI_IN_L HDMI_IN_R

2.2U_0603_10V7K~D

E

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

C107

+MIC1_VREFO

SDMK0340L-7-F_SOD323-2~D

1U_0402_6.3V6K~D

C126

10 11

4 9

2 7 13

2.2U_0603_10V7K~D

0.1U_0402_10V6K~D

C108

C109

1

2

LINEOUT_L 35 LINEOUT_R 35

1 2

D54 SDMK0340L-7-F_SOD323-2~DD54 SDMK0340L-7-F_SOD323-2~D

SPK_CD_L 35 SPK_CD_R 35

SPDIF_OUT 14,35

12

D7

1 2

R115 0_0402_5%~D@ R115 0_0402_5%~D@

10U_0603_6.3V6M~D

C127

1

2

12

HP2_AMP_R HP2_AMP_L

1U_0603_10V4Z~D

C143

1

2

C1841

1 2 1 2

C1842

E

1

2

F

+5VS+AVDD_AUDIO

LL3

BLM18AG601SN1D_0603~D

12

C115

2.2U_0805_10V7K~D

C112

2.2U_0805_10V7K~D

Front

68_0603_1%~D

HP1_AMP_L HP1_AMP_L1

HP1_AMP_R

68_0603_1%~D

HP1_AMP_L1_JK

HP1_AMP_R1_JK SPK_MUTE#

12

C1845

0.1U_0402_16V4Z~D

Setting the Turn-Off Time: Ton (ms) = 0.02 x Cset (pF)

R338

@R338

@

10K_0402_5%~D

1 2

+3VS

PACIN 49,50

Rear or MIC

MIC_CD_L

MIC_CD_R

SPK_MUTE#35,44

HP2_AMP_L HP2_AMP_L1

HP2_AMP_R

HDMI_L

R157 560_0402_5%~DR157 560_0402_5%~D

HDMI_R

R158 560_0402_5%~DR158 560_0402_5%~D

2700P_0402_50V7~D

C1838

1

2

1 2

C129 2.2U_0603_10V7K~DC129 2.2U_0603_10V 7K~D

1 2

C130 2.2U_0603_10V7K~DC130 2.2U_0603_10V 7K~D

HP2_AMP_L1_JK

HP2_AMP_R1_JK

12

C1844

0.1U_0402_16V4Z~D

Setting the Turn-Off Time: Ton (ms) = 0.02 x Cset (pF)

Center

1 2

R127 68_0603_1%~DR127 68_0603_1%~D

1 2

R130 68_0603_1%~DR130 68_0603_1%~D

1 2 1 2

2700P_0402_50V7~D

C1839

F

HP1_CD_L1HP1_CD_L HP1_CD_R1HP1_CD_R

R111

1 2

R113

A1

A3 B1

B3

+MIC1_VREFO

R116

4.7K_0402_5%~D

MIC_CD_L1

MIC_CD_R1

A1

A3 B1

B3

HP2_AMP_R1

G

C113

270P_0402_50V7K~D

R106

2K_0402_1%~D

1 2 1 2

R105

2K_0402_1%~D

HP1_AMP_R1

U621

INL

INR /MUTE

SET

12

BLM18BD601SN1D_0603~D

U620

INL

INR /MUTE

SET

L23 BLM 18BD601SN1D_0603~DL23 BLM 18BD601SN1D_0603~D

L24 BLM 18BD601SN1D_0603~DL24 BLM 18BD601SN1D_0603~D

HDMI_IN_AUD_L 35 HDMI_IN_AUD_R 35

1 2

C111

270P_0402_50V7K~D

1 2

L19

BLM18BD601SN1D_0603~D

1 2

L20

BLM18BD601SN1D_0603~D

+3VS

B2

VDD

GND

A2

MAX9892ERT+T_UCSP6~D

+MIC1_VREFO W=10 mil

C125

1 2

1000P_0402_50V7K~D

R117

4.7K_0402_5%~D

L21

BLM18BD601SN1D_0603~D

1 2

MIC_CD_L1_JK

L22

MIC_CD_R1_JK

+3VS

B2

VDD

GND

A2

MAX9892ERT+T_UCSP6~D

HP2_AMP_L1_JK

HP2_AMP_R1_JK

Title

Size Document Number Rev

Date: Sheet of

G

C116

1U_0603_10V4Z~D

1 2

HP1_CD_L2 HP1_CD_R2

HP_AMP_MUTE#

+3VS_AVDD

HP1_AMP_L1_JK

HP1_AMP_R1_JK

1000P_0402_50V7K~D

C123

1

2

220P_0402_50V7K~D

C133

1

2

MAX9724BETC+T_TQFN-EP12_3X3

1U_0603_10V4Z~D

2

C100

1

HP1_JD

1000P_0402_50V7K~D

C122

1

2

1

PJDLC05C_SOT23-3

MIC_JD

220P_0402_50V7K~D

C132

1

2

PJDLC05C_SOT23-3

1

Place close to Jack

HP2_JD

220P_0402_50V7K~D

C140

C141

1

2

PJDLC05C_SOT23-3

1

Compal Electronics, Inc.

HD Audio_IDT92HD73C

LA-6601P

H

U9

1

C1P

OUTR

3

C1N

OUTL

6

PVSS

INL

8

SVSS

INR

5

PGND

SHDN

SGND

VDD12GND

Link Done

CONN@

JHP1

6 1 2

3 4

5

TYCO_2041187-1~D

Place close to Jack

3

2

D6

@D6

@

Link Done

CONN@

JMIC1

6 1 2

3 4

5

TYCO_2041187-1~D

D8

@D8

@

@D9

@

6 1 2

3 4

5

D9

MIC_CD_L1_JK

3

MIC_CD_R1_JK

2

Link Done

CONN@

JHP2

TYCO_2041187-1~D

HP2_AMP_L1_JK

3

HP2_AMP_R1_JK

2

Place close to Jack

34 63Tuesday, November 30, 2010

H

HP1_AMP_R

10

HP1_AMP_L

11

4 9

2 7 13

G

G G

G

HP1_AMP_L1_JK

HP1_AMP_R1_JK

7

G

8

G

G G

G

1U_0603_10V4Z~D

C117

1

2

7 8

1.0

5

D D

R139

SPK_CD_L1

SPK_CD_L34

PC_BEEP34

SPK_CD_R34

1 2

C153 1U_0603_10V6K~DC153 1U_0603_10V6K~D

PC_BEEP

C156 0.1U_0402_10V6K~DC156 0.1U_0402_10V6K~D

SPK_CD_R SPK_CD_R4

C157 1U_0603_10V6K~DC157 1U_0603_10V6K~D

PC_BEEP PC_BEEP_2

PC_BEEP_1

1 2

C161 0.1U_0402_10V6K~DC161 0.1U_0402_10V6K~D

R139

1 2

16.5K_0402_1%

R141

1 2

182K_0402_1%

R144

1 2

16.5K_0402_1%

R146

1 2

182K_0402_1%

SPK_CD_L2

R140 20K_0402_1%~DR140 20K_0402_1%~D

SPK_CD_R2

R145 20K_0402_1%~DR145 20K_0402_1%~D

High-Pass Filiter,16dB, Av=6.3V/V

D12

C C

SPK_AMP_MUTE#34

BS_SPI_FUN_SEL31

BS_I2C_ON_SPI_EN31

BS_I2C_SRC_SEL31 BS_RESERVED31

B B

HDMI_IN_SELECT#24,26,44

A A

+3VS

HDMI_IN_SELECT#

PCIE_PTX_CARDRX_P416

PCIE_PTX_CARDRX_N416

PCIE_PRX_CARDTX_P416

PCIE_PRX_CARDTX_N416

1 2

SDMK0340L-7-F_SOD323-2~D

R148

1 2

330K_0402_5%

BS_SPI_FUN_SEL BS_I2C_ON_SPI_EN BS_I2C_SRC_SEL BS_RESERVED SPDIF_PLUG#

R1883 10K_0402_5%~DR1883 10K_0402_5%~D

1 2

R1884 10K_0402_5%~DR1884 10K_0402_5%~D

1 2

D

2

G

S

Card Reader/B CONN

PCIE_PTX_CARDRX_P4

PCIE_PTX_CARDRX_N4

PCIE_PRX_CARDTX_P4

PCIE_PRX_CARDTX_N4

CLK_PCIE_CD16

CLK_PCIE_CD#16

PLT_RST#5,18,33,38,39,44

CDCLK_REQ#16

CLK_PCIE_CD

CLK_PCIE_CD#

PLT_RST#

CDCLK_REQ#

2

C165

2.2U_0603_10V6K~D

1

active low

1

Q10

SSM3K7002F_SC59-3~D

3

+3VS

SPK_AMP_MUTE_R#

U4

MCLK10AVDD

9

LINEVDD

BCLK

8

LRCLK

7

DACDAT

12

AIFMODE

11

MUTE

LINEVOUTL LINEVOUTR

CPVOUTN

13

AGND

4

LINEGND

WM8524GEDT-R_TSSOP16

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

21 22

Link Done

5

4

B+

2

C146

1

16.2K_0402_1%~D

C154

0.022U_0402_25V7K~D

1 2

R142

1 2

16.2K_0402_1%~D

C158

0.022U_0402_25V7K~D

SPK_CD_R3SPK_CD_R1

1 2

+3VS

15 6

1 2

5

CPCA

3

CPCB

1 16 2

14

VMID

JIO2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

GND1 GND2

HRS_FH28E-20S-0.5SH(11)

CONN@JIO2

CONN@

1

2

4

22U_1210_25V6K~D

1 2

0.022U_0402_25V7K~D

1

2

22U_1210_25V6K~D

0.1U_0603_50V4Z~D

22U_1210_25V6K~D

2

C150

1

R137

C155

1 2

C159

1 2

For filterless modualation/spread-spectrum mode

Mono Select. Set MONO high for mono mode.

1

C166

2

4.7U_0603_6.3V6K~D

C1826

C1828

1U_0603_10V4Z~D

2.2U_0603_6.3V6K~D

C1829

1

2

0.1U_0603_50V4Z~D

2

1

C147

C148

1

2

SPKER_CD_L2_FBL

1 2

182K_0402_1%

SPK_CD_R2_FBL

1 2

182K_0402_1%

R147 0_0402_5%~DR147 0_0402_5%~D

1 2

Internal Regulator Output.

Internal 2V Bias.

1U_0603_25V6-K~D

1

C168

C167

2

+3VS_DAC

BLM18AG601SN1D_0603~D

4.7U_0603_6.3V6K~D

C1827

1

2

25.5_0402_1%~D

12

R154

1U_0402_6.3V6K~D

C1830

.1U_0402_16V7K~D

1

C1831

2

0.1U_0603_50V4Z~D

1

C149

2

R138

SPK_CD_L4SPK_CD_L3SPK_CD_L

R143

SPK_AMP_MUTE# SPK_AMP_MUTE_R#

1U_0603_25V6-K~D

1

C164

0.1U_0603_50V4Z~D

2

L50

12

25.5_0402_1%~D

12

R155

.1U_0402_16V7K~D

1

C1832

2

U17

27

PVDD1

30

PVDD2

28

PGND2

29

PGND1

5

FB_L

6

IN_L

19

FB_R

18

IN_R

10

SHDN#

11

REGEN

9

MUTE#

20

MODE

4

MONO

16

VS

15

REG

12

COM

21

C1N

22

C1P

13

AGND

14

AGND

MAX9736AETJ+T_TQFN32_7X7

+3VS

HDMI_IN_AUD_L 34 HDMI_IN_AUD_R 34

3

L25

AMP_SPKL-

1

OUTL-1

2

OUTL-2

31

OUTL+1

32

OUTL+2

7

NC1

8

NC2

17

NC3

25

OUTR+1

26

OUTR+2

AMP_SPKR-

23

OUTR-1

24

OUTR-2

3

BOOT

1U_0805_25V4Z~D

33

EP

@D24

@

LINEOUT_R

LINEOUT_L

LINE_OUT_JD

D24

LINE2-R

3

LINE2-L

2

SPDIF_PLUG#

3

SPDIF_OUT

2

D25

LINEOUT_R34

LINEOUT_L34

LINE_OUT_JD34

1

PJDLC05C_SOT23-3

1

PJDLC05C_SOT23-3

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, A ND OTHER PROPRI ETARY INFORMATI ON OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION O F DELL. IN ADDI TION, NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT .

3

L25

1 2

BLM18PG181SN1_0603~D

L26

1 2

BLM18PG181SN1_0603~D

L28

1 2

BLM18PG181SN1_0603~D

L30

1 2

BLM18PG181SN1_0603~D

C163

12

B+

+

C738 220U_6.3V_M

1 2

+

C739 220U_6.3V_M

1 2

R1650 0_0402_5%~DR1650 0_0402_5%~D

1 2

SPK_MUTE#34,44

Setting the Turn-Off Time: Ton (ms) = 0.02 x Cset (pF)

2

AMP_SPK_JK_L-

330P_0402_50V7K~D

1

C151

2

AMP_SPKL+_LAMP_SPKL+

22UH_LQH55PN220MR0L_0.85A_20%~D

330P_0402_50V7K~D

1

C152

2

AMP_SPKR+_R

22UH_LQH55PN220MR0L_0.85A_20%~D

330P_0402_50V7K~D

C160

1

2

AMP_SPK_JK_R-

330P_0402_50V7K~D

C162

1

2

12

C1843

0.1U_0402_16V4Z~D

2

A1

A3 B1

B3

L27

1 2

L29

1 2

U619

INL

INR /MUTE

SET

SPDIF_OUT14,34

AMP_SPK_JK_L+

AMP_SPK_JK_R+AMP_SPKR+

AMP_SPK_JK_LAMP_SPK_JK_L+ AMP_SPK_JK_RAMP_SPK_JK_R+

PJSOT24C_SOT23-3

20K_0402_5%~D

R1674

R1675

1 2

+3VS

B2

VDD

GND

MAX9892ERT+T_UCSP6~D

A2

1

Speaker amp impedance of JBL is 4 ohm.

Speaker Connector

JSPK1

15 mils trace

2

3

2

3

D10

1

LINE2-R

LINE2-L

+5VS

100P_0402_50V8J~D

1

C741

2

Title

Speaker AMP / CardReader_B conn

Size Document Number Rev

Date: Sheet of

PJSOT24C_SOT23-3

1

9 6 1 4

5

7 8 3

10

2

0.1U_0402_16V4Z~D

2

C735

1

Compal Electronics, Inc.

LA-6601P

1

JSPK1

1

2

3

4

MOLEX_53398-0471~D

CONN@

Link Done

D11

SPDIF OUT JACK

JSPD1

CONN@

JSPD1

CONN@

G

TYCO_1775792-1

Link Done

35 63Tuesday, November 30, 2010

5

G5

6

G6

1.0

A

1 1

+3VS

1

2

B

CS6 0.01U_0402_16V7K~DC S6 0.01U_0402_16V7K~D

SATA_PTX_DRX_P015 SATA_PTX_DRX_N015

SATA_PRX_DTX_N015 SATA_PRX_DTX_P015

+5VS

Close to JHDD1

1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

CS1

0.1U_0402_16V4Z~D

1U_0402_6.3V4Z~D

10U_0805_10V4Z~D

CS4

1

CS2

2

1

CS5

CS3

CS5

2

1 2

CS7 0.01U_0402_16V7K~DC S7 0.01U_0402_16V7K~D

1 2

CS9 0.01U_0402_16V7K~DC S9 0.01U_0402_16V7K~D

1 2

CS10 0.01U_0402_16V7K~DCS10 0.01U_0402_16V7K ~D

1 2

C

JHDD1

CONN@JHDD1

CONN@

1

SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0_C

SATA_PRX_DTX_N0_C SATA_PRX_DTX_P0_C

+3VS

+5VS

FFS_INT2_CONN37

FFS_INT2_CONN

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

MOLEX_47662-2100

GND1 GND2

23 24

D

E

2 2

3 3

4 4

HDD Redriver

SATA_PTX_DRX_P115 SATA_PTX_DRX_N115

SATA_PRX_DTX_N115 SATA_PRX_DTX_P115

+3VS

+5VS

1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

1

2

1000P_0402_50V7K~D

1

CS19

2

RS18 0_0402_5%~DRS18 0_0402_5%~D

1 2

RS20 5.1K_0402_1%~DRS20 5.1K_0402_1%~D

1 2

RS23 4.3K_0402_5%RS23 4.3K_0402_5%

1 2 1 2

1 2

CS29 0.01U_0402_16V7K~DCS29 0.01U_0402_16V7K ~D CS31 0.01U_0402_16V7K~DCS31 0.01U_0402_16V7K ~D

CS33 0.01U_0402_16V7K~DCS33 0.01U_0402_16V7K ~D CS35 0.01U_0402_16V7K~DCS35 0.01U_0402_16V7K ~D

Close to JHDD2

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

CS21

1

CS20

2

10U_0805_10V4Z~D

1U_0402_6.3V4Z~D

CS23

CS22

1

2

A2_EQ A2_EM A2_OS

SATA_PTX_DRX_P1_R SATA_PTX_DRX_N1_R

SATA_PRX_DTX_N1_RC SATA_PRX_DTX_P1_RC

US2

6

DNC

VDD3P3

16

DNC

VDD3P3

3

A_EN#

B_EN#

17 18 19

21

B_EQ

A_EQ

B_EM

A_EM

B_OS

A_OS

1

AI+

2

4 5

AO+

AI-

AO-

BO-

BI-

BO+

BI+

EP

PI3EQX6701ZDEX_TQFN20_4X4~D

HDD2_DETECT#19

+3VS

0.1U_0402_16V4Z~D

1

2

10 20

13

B2_EQ

7

B2_EM

8

B2_OS

9

SATA_PTX_DRX_P1_RC

15

SATA_PTX_DRX_N1_RC

14

SATA_PRX_DTX_N1_R

12

SATA_PRX_DTX_P1_R

11

SATA_PTX_DRX_P1_C SATA_PTX_DRX_N1_C

SATA_PRX_DTX_N1_C SATA_PRX_DTX_P1_C

+3VS

+5VS

FFS_INT2_CONN

CS27

RS19 0_0402_5%~DRS19 0_0402_5%~D RS21 5.1K_0402_1%~DRS21 5.1K_0402_1%~D RS24 4.3K_0402_5%RS24 4.3K_0402_5%

12 12 12

CS30 0.01U_0402_16V7K~DCS30 0.01U_0402_16V7K ~D

1 2

CS32 0.01U_0402_16V7K~DCS32 0.01U_0402_16V7K ~D

1 2

CS34 0.01U_0402_16V7K~DCS34 0.01U_0402_16V7K ~D

1 2

CS36 0.01U_0402_16V7K~DCS36 0.01U_0402_16V7K ~D

1 2

JHDD2

CONN@JHDD 2

CONN@

1

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

GND1

VCC12

GND2

MOLEX_47662-2100

23 24

SATA_PTX_DRX_P1_C SATA_PTX_DRX_N1_C

SATA_PRX_DTX_N1_C SATA_PRX_DTX_P1_C

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

A

B

DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

SATA HDD1 & HDD2

LA-6601P

36 63Tuesday, November 30, 2010

E

1.0

A

1 1

B

C

D

E

+3VS

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

C190

C189

1

2

2 2

PCH_SMBDATA5,10,11,12,13,16,38

FFS_INT1 connect to PCH GPIO & EC discuss with BIOS to use which pin

+3VS

G

2

3 3

FFS_INT2 FFS_INT2_CONN

SSM3K7002FU_SC70-3~D

13

D

S

D

S

Q17

2

21

FFS_INT1 FFS_INT2

PCH_SMBDATA PCH_SMBCLK

+5VS

12

R159

@R159

@

100K_0402_5%~D

FFS_INT118 FFS_INT219

PCH_SMBCLK5,10,11,12,13,16,38

D14 SDM10U45-7_SOD523-2~DD14 SDM10U45-7_SOD523-2~D

Free Fall Sensor

U19

DE351DLTR

1

VDD_IO

6

VDD

8

INT 1 INT 29GND

12

SDO

13

SDA / SDI / SDO

14

SCL / SPC

7

CS

DE351DLTR8_LGA14_3X5~D

2

GND

4

GND

5

GND

10

3

RSVD

11

RSVD

FFS_INT2_CONN 36

+3VS

ODD power

300K_0402_5%~D

ODD_EN#19

SATA_PRX_DTX_P215 SATA_PRX_DTX_N215

SATA_PTX_DRX_N215 SATA_PTX_DRX_P215

+5VS_ODD

1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

CS37

CS38

1

2

B+_BIAS

RS26

2

G

ODD_DA#18

CS45 0.01U_0402_16V7K ~DCS45 0.01U_0402_16V7K~D

1 2

CS44 0.01U_0402_16V7K ~DCS44 0.01U_0402_16V7K~D

1 2

CS43 0.01U_0402_16V7K ~DCS43 0.01U_0402_16V7K~D

1 2

CS42 0.01U_0402_16V7K ~DCS42 0.01U_0402_16V7K~D

1 2

1U_0402_6.3V4Z~D

10U_0805_10V4Z~D

CS39

1

2

+5VS

1 2

ODD_EN

13

D

QS2

QS2 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

R173 0_0402_5%~D@R173 0_0402_5%~D@

1 2

ODD_DETECT#19

CS40

1U_0402_6.3V6K~D

1

2

QS1

SI3456DDV-T1-GE3_TSOP6~D

D

6

2

CS41

1

G

+5VS_ODD

SATA_PRX_DTX_P2_C SATA_PRX_DTX_N2_C

SATA_PTX_DRX_N2_C SATA_PTX_DRX_P2_C

S

3

1.5M_0402_5%~D

1 2

+5VS_ODD

45

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D CS46

CS46

1

RS27

2

SATA ODD Conn.

ODD_DA#_R

JODD1

CONN@JODD1

CONN@

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

FCI_10089708-016010LF~D

15

GND

1616GND

17 18

Link Done

Placea caps. near ODD CONN.

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

A

B

DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

SATA HDD3 & ODD & FFS

LA-6601P

37 63Tuesday, November 30, 2010

E

1.0

A

+1.5VS

0.1U_0402_16V4Z~D

4.7U_0805_10V4Z~D

CE12

1

WLAN

1 1

2 2

PCIE_WAKE#17,33,39,44

PCIE_WAKE# COEX2 COEX1

MINI1CLK_REQ#16

CLK_PCIE_MINI1#16 CLK_PCIE_MINI116

PCIE_PRX_WLANTX_ N116 PCIE_PRX_WLANTX_ P116

PCIE_PTX_WLANRX_ N116 PCIE_PTX_WLANRX_ P116

RE12 0_0402_5%~D@ RE12 0_0402_5%~D@

1 2

R160 0_0402_5%~DR160 0_0402_5%~D

1 2

R161 0_0402_5%~DR161 0_0402_5%~D

1 2

MINI1CLK_REQ#

CLK_PCIE_MINI1# CLK_PCIE_MINI1

PCIE_PRX_WLANTX_ N1 PCIE_PRX_WLANTX_ P1

PCIE_PTX_WLANRX_ N1 PCIE_PTX_WLANRX_ P1

+3VS

BT_ON#18

2

BT_ON#

2

Display Mini Card (DMC)

PCIE_WAKE# COEX2 COEX1

MINI2CLK_REQ#16

CLK_PCIE_MINI2#16

3 3

E51TXD_P80DATA44

E51RXD_P80CLK44

4 4

CLK_PCIE_MINI216

PCIE_PRX_WANTX_N 216 PCIE_PRX_WANTX_P 216

PCIE_PTX_WANRX_N 216 PCIE_PTX_WANRX_P 216

RE35 0_0402_5%~DRE35 0_0402_5 %~D

1 2

RE36 0_0402_5%~DRE36 0_0402_5 %~D

1 2

DMC_PCH_DET#16 DP_DMC_AUXN30 DP_DMC_AUXP30

A

RE30 0_0402_5%~D@ RE30 0_0402_5%~D@ R163 0_0402_5%~DR163 0_0402_5%~D R162 0_0402_5%~DR162 0_0402_5%~D

MINI2CLK_REQ#

CLK_PCIE_MINI2# CLK_PCIE_MINI2

PCIE_PRX_WANTX_N 2 PCIE_PRX_WANTX_P 2

PCIE_PTX_WANRX_N 2 PCIE_PTX_WANRX_P 2

+3VS_DMC

DP_DMC_ML2N30 DP_DMC_ML2P30

DP_DMC_ML0N30 DP_DMC_ML0P30

1 2 1 2 1 2

EC_TX_DAT EC_RX_CLK

DMC_PCH_DET# DP_DMC_AUXN DP_DMC_AUXP

DP_DMC_ML2N UICC_VPP UICC_RESET DP_DMC_ML2P

DP_DMC_ML0N DP_DMC_ML0P

B

0.1U_0402_16V4Z~D

CE13

CE14

1

2

Link Done

JMINI1

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

+3VS

JDMC1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

GND1

LOTES_AAA-PCI-112-K01

Link Done

B

+3VS

0.1U_0402_16V4Z~D

4.7U_0805_10V4Z~D

CE15

1

2

CONN@JMINI1

CONN@

2

4

6

8

10

12 14 16

18 20 22

+3VS_WLAN

24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

G153G254G355G3

56

LOTES_AAA-PCI-073-P02-A

L93

BLM18PG330SN1D_2P~D

CONN@JDMC1

CONN@

GND2

12

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

CE16

+3VS_DMC

0.1U_0402_16V4Z~D

CE17

1

2

+3VS_DMC

1

2

+1.5VS_DMC

DMC_RADIO_OFF# PLT_RST#

MINI2_SMBCLK MINI2_SMBDATA

USB20_N5 USB20_P5

DP_DMC_HPD

DP_DMC_ML3N DP_DMC_ML3P

DP_DMC_ML1N DP_DMC_ML1P

+3VS

+1.5VS

WL_OFF# PLT_RST#

RE22 0_0603_5%~DRE22 0_0603_5%~D

1 2

RE23 0_0603_5%~D@R E23 0_0603_5%~D@

1 2

MINI1_SMBCLK MINI1_SMBDATA

USB20_N4 USB20_P4

4.7U_0805_10V4Z~D

CE23

UICC_DATA UICC_CLK UICC_RESET UICC_VPP

RE24 0_0402_5%~D@RE24 0_0402_5%~D@ RE25 0_0402_5%~D@RE25 0_0402_5%~D@

+1.5VS

BLM18AG601SN1D_0603~D

0.1U_0402_16V4Z~D

CE19

1

2

RE33 0_0402_5%~D@RE33 0_0402_5%~D@ RE34 0_0402_5%~D@RE34 0_0402_5%~D@

+UICC_PWR

1 2 1 2

C

WL_OFF# 18 PLT_RST# 5,18,33,35,39,44

+3VS

1 2 1 2

USB20_N4 18 USB20_P4 18

L94

DMC_RADIO_OFF# 18

1M_0402_5%~D

1 2

DP_DMC_ML3N 30

DP_DMC_ML3P 30

DP_DMC_ML1N 30

DP_DMC_ML1P 30

+3VALW

PCH_SMBCLK 5,10,11,12,13,16,37

PCH_SMBDATA 5,10,11,12,13,16,37

+1.5VS_DMC

12

4.7U_0805_10V4Z~D

0.1U_0402_16V4Z~D

CE20

1

2

PCH_SMBCLK PCH_SMBDATA

USB20_N5 18

USB20_P5 18

R165

DP_DMC_HPD 30

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

0.1U_0402_16V4Z~D

CE21

CE22

1

2

Reserve for SIM card does not meet rise time and pull-up is needed.

+UICC_PWR

10K_0402_5%~D

1 2

10K_0402_5%~D

12

@

@R95

@

R88

R95

D

RU1

BT_ON#18

1 2

10K_0402_5%~D

Bluetooth

BT_DET#16

BT_RADIO_DIS#19

USB20_N818 USB20_P818

UICC_RESET

UICC_CLK

COEX1

BT_RADIO_DIS#

COEX2

33P_0402_50V8J~D

C192

1

2

For ESD

Cap close to JSIM1

3

2

1

CM1293A-04SO_SOT23-6~D

SIM Connector

JSIM1

5

GND

6

VPP

7

I/O

8

NC

4

NC

MOLEX_475531001~D

D

+3VS

1

3

S

G

2

100P_0402_50V8J~D

10K_0402_5%~D

12

R167

@C193

@

C193

1

2

U41

@U41

@

+UICC_PWR

CONN@JSIM1

CONN@

1

VCC

2

RST

3

CLK

10

GND

9

GND

Title

Size Document Number Rev

Date: Sheet of

2

QU1

QU1 AO3413_SOT23-3~D

AO3413_SOT23-3~D

D

1

W=40mils

4.7U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D CU5

CU5

1

@

CU4

2

+3VS_BT

C191

1 2

0.1U_0402_16V4Z~D

10 11 12

13 14

UICC_VPP

6

5

UICC_DATA

4

UICC_CLKUICC_DATA

Compal Electronics, Inc.

Mini Card WLAN / DMC / BT

E

1U_0603_10V4Z~D

CU2

+3VS_BT

300_0603_5%

12

RU2

+3VS_BT_D

1

D

QU2

QU2 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

2

G

S

3

JBT

CONN@JBT

CONN@

1

2

3

4

5

6

7

8

9

9 10 11 12

GND GND

AMPHE_G846A12211EU

Link Done

0.1U_0402_16V4Z~D

+UICC_PWR

1

C431

2

SIM card board 4.7uF change to 1uF for Tiger detect issue.

4.7U_0603_6.3V6K~D

0.1U_0402_16V4Z~D

1U_0402_6.3V4Z~D

1

@

C428

2

LA-6601P

E

0.1U_0402_16V4Z~D

1

@

C429

2

38 63Tuesday, November 30, 2010

C430

@

1.0

5

+1.5V_3.0+5VALW

10U_0603_6.3V6M~D

1U_0603_10V6K~D

C219

C220

1

2

Vout=0.8(1+10K/32.4K)

D D

1.042 ~ 1.0469 ~ 1.0519V Spec: 0.9975 ~ 1.05 ~ 1.1025

+5VALW

2

+1.5V to +1.05V Transfer

+5VALW

+1.5V_3.0

SYSON

R177

5.1K_0402_1%~D

5.1K_0402_1%~D APL5930KAI-TRG_SO8

APL5930KAI-TRG_SO8

U23

6

VCNTL

5

VIN

VOUT

9

VIN

VOUT

8

EN

7

12

POK

FB

GND

1

1A

3 4

2

R178

1 2

10K_0402_1%~D

12

R1957

32.4K_0402_1%~D

+1.05V

+3VALW to +3V Transfer

+3V_3.0 +3V

SYSON44,47,54

CLK_PCIE_USB3016 CLK_PCIE_USB30#16

PCIE_PRX_USB3TX_P616 PCIE_PRX_USB3TX_N616

PCIE_PTX_USB3RX_P616 PCIE_PTX_USB3RX_N616

C C

R188 10K_0402_1%~DR188 10K_0402_1%~D

+3V

B B

A A

1 2

1

221

D17

1SS355TE-17_SOD323-2

USB30_CLKREQ#16

+3VALW

10K_0402_1%~D

R1555

1 2

SPI_CLK_USB USB_SO_SPI_SI

12P_0402_50V8J~D

24MHZ_12PF_X5H024000DC1H

C259

1

2

Pin compare table for support USB remote wakeup or not

AUXDET(Pin J2)

Support USB remote wakeup

Not support USB remote wakeup

pull high 10k to VDD33

Tied to GND

U24

3

VIN

4

VIN/CE

2

GND

RT9701-PB_SOT23-5

USB3_SMI#18

1 2

C254

1U_0603_10V6K~D

+3V

2

G

1 3

D

S

D

S

Q19

SSM3K7002FU_SC70-3~D

.1U_0402_16V7K~D

C257

1

2

U28

8 7 6 5

MX25L5121EMC-20G_SO8

Y2

1 2

VCC NC SCLK SI

USB3_XT2_R

5

WP# GND

CS#

1

VOUT

5

VOUT

0.2A

CLK_PCIE_USB30 CLK_PCIE_USB30#

C246 .1U_0402_16V7K~DC246 .1U_0402_ 16V7K~D

1 2

C250 .1U_0402_16V7K~DC250 .1U_0402_ 16V7K~D

1 2

PCIE_PTX_USB3RX_P6 PCIE_PTX_USB3RX_N6

PLT_RST#5,18,33,35,38,44

PCIE_WAKE#17,33,38,44

+3V

10K_0402_1%~D

1 2

CLKREQ_USB3

1 2

SO

3 4

USB3_XT1 USB3_XT2

12

100_0402_5%~D

12P_0402_50V8J~D

1

2

CSEL(Pin P6)

Tied to GND

pull high to VDD33

R181 0_0402_5%~DR181 0_0402_5%~D R182 0_0402_5%~DR182 0_0402_5%~D

R185 10K_0402_1%~DR185 10K_0402_1%~D

R189

R198

C260

10K_0402_1%~D

1 2

+3V

+3VALW

R192

R186 100_0402_1%~D@R186 100 _0402_1%~D@ R187 10K_0402_1%~DR187 10K_0402_1%~D R201 0_0402_5%~D@ R201 0_0402_5%~D@ R202 0_0402_5%~DR202 0_0402_5%~D

SPI_CLK_USB SPI_CS_USB# USB_SO_SPI_SI USB_SI_SPI_SO

47K_0402_5%~D

R193

1 2

SPI_CS_USB#

USB_SI_SPI_SO

Place as close as possibile to U3.N14 and U3.M 14

CLK

Must use 24MHz crystal: mount Y1,R19,C40,C41

Can use either 48MHz or 24MHz When use 48MHz clock: mount R22,R25

PCIE_PRX_USB3TX_C_P6 PCIE_PRX_USB3TX_C_N6

1 2 1 2

CLKREQ_USB3

1 2 1 2 1 2 1 2 1 2

1 2

R337 0_0402_5%~DR337 0_040 2_5%~D

+3V

0_0402_5%~D

12

R196

@

0_0402_5%~D

R207

1 2

USB3_XT1 USB3_XT2

4

Close to U50.D7 Close to U50.P13

+1.5V_3.0

1 2

+1.5V

R1962 0_0603_5%~DR1962 0_0603_5%~D

+1.5VS

10U_0603_6.3V6M~D

C242

1

+3VALW

C14

N14 M14

C10 C11

K13 K14

A11 A13 A14

B11 B13 B14

B2 B1

D2 D1

F2 F1

H2 K1 K2

H1 P4

P5

M2

N2 N1

M1

J13

P6

A1 A2 A3 A4 A5 A7 A9

B3 B4 B5 B7 B9

C1 C2 C3

J2 J1

+3VS

U50

PECLKP PECLKN

PETXP PETXN

PERXP PERXN

PERSTB PEWAKEB PECREQB

AUXDET PSEL SMI SMIB

PONRSTB

SPISCK SPISCB SPISI SPISO

GND GND GND

GND

XT1 XT2

CSEL

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

4

2

1 2

R1963 0_0603_5%~D@R1963 0_0603_5%~D@

1 2

R1966 0_0603_5%~DR1966 0_0603_5%~D

1 2

R1967 0_0603_5%~D@R1967 0_0603_5%~D@

+3V

D10

F13

F14

VDD33

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

+3V_3.0

R180

0_0805_5%

1 2

+1.05V

L10

L13

L14

VDD33

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

SPEC Max:+3V---200mA;+1.05V---800mA

Idle mode:0.489W:

+3V---43mA;+1.05V---328mA D3 mode:0.066W: +3V---5.4mA;+1.05V---45mA

PCI Express/ExpressCard select signal 1:others 0:Express Card or Mini card

P/N: SA000048H0L (S IC UPD720200AF1-DAP-A FBGA 176P USB3.0) A version

GND

GNDD3GNDD4GND

C12

C13

D11

D12

GND

D13

D14

8/11 update

GNDE1GNDE2GND

GND

GNDF4GNDF6GNDF7GNDF8GNDF9GND

E13

F11

E14

UPD720200AF1DAPA_FBGA176P-NH ~D

+3VA +3VA

1

2

Can be attach to EC, either.

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

G9

F12

G11

G12

3

0.01U_0402_16V7K~D

C241

1

2

+3VA

C245

U3TXDP2_L

1 2

U3TXDN2_L

1 2

C251

.1U_0402_16V7K~D

R183

10K_0402_5%~D

1 2 1 2

R184

10K_0402_5%~D

C252

.1U_0402_16V7K~D

U3TXDP1_LU3TX_C_DP1

1 2

U3TXDN1_L

1 2

C253

.1U_0402_16V7K~D

1 2

+USB3_VCCA

U2DN2 U2DP2

U3RXDN2 U3RXDP2

U3TXDN2 U3TXDP2

+USB3_VCCB

U2DN1 U2DP1

U3RXDN1 U3RXDP1

U3TXDN1 U3TXDP1

0.01U_0402_16V7K~D

C235

1

2

10U_0603_6.3V6M~D

C792

1

2

1 2 3 4 5 6 7 8 9

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D 8P_0402_50V8D~D

1

2

+1.05VR

8P_0402_50V8D~D

C221

@

1

C223

2

E11

E12

VDD10

.1U_0402_16V7K~D

C226

.1U_0402_16V7K~D

C240

1

2

VDD10H3VDD10H4VDD10L5VDD10

0.01U_0402_16V7K~D

C227

1

2

H11

K11

K12

L8

VDD10

1

2

+3VA +3V

VDD10

U3TXDP2

U3TXDN2

U3RXDP2

U3RXDN2

U3TXDP1

U3TXDN1

U3RXDP1

U3RXDN1

As short as possible

GNDH6GND

GNDH7GNDH8GNDH9GND

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

H12

G13

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

GND

J11

J12

GNDK3GNDK4GNDL1GNDL2GNDL3GND

8P_0402_50V8D~D

@

C234

D7

U3AVDO33

U2DM2

U2DP2

OCI2B OCI1B

PPON2 PPON1

U2DM1

U2DP1

RREF

U2AVSS

U2PVSS

U3AVSS

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

L4

P13

U2AVDD10

0.01U_0402_16V7K~D

C229

C228

1

2

L39

BLM18AG601SN1D_2P

1 2

.1U_0402_16V7K~D

U3TX_C_DP2

B6

U3TX_C_DN2

A6

U2DN2_L

N8

U2DP2_L

P8

U3RXDP2_L

B8

U3RXDN2_L

A8

OCI2B

G14

OCI1B

H13

H14 J14

B10

U3TX_C_DN1

A10

U2DN1_L

N10

U2DP1_L

P10

U3RXDP1_L

B12

U3RXDN1_L

A12

R191 1.6K_0402_1%~DR191 1.6K_0402_1%~D

P12 N12

N11

D6

P14 P11 P9 P7 P2 P1 N13 N9 N7 N3 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 L12 L11 L7 L6

0.01U_0402_16V7K~D

2

+1.05VR+3V

.1U_0402_16V7K~D

0.01U_0402_16V7K~D

C236

C224

1

2

0.01U_0402_16V7K~D

C237

1

2

For EMI request

L33

U3TXDP2_L U3TXDP2

U3TXDN2_L U3T XDN2

U3RXDP2_L U3RXDP2

U2DP2_L

+3V

U2DN2_L

U3RXDN2 U3RXDP2 U3TXDN2 U3TXDP2

USB_PWR_EN#40,44

JUSB1

VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+

SUYIN_020052GR009M2126L

Link Done

JUSB2

1

VBUS

2

D-

3

D+

4

GND

5

SSRX-

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

SUYIN_020052GR009M2126L

Link Done

2

L33

3 4

DLW21SN670HQ2L_4P

L35

3 4

DLW21SN670HQ2L_4P

L37

3

2

WCM-2012-670T_4P

For ESD request

D15

1

R-

2

R+

3

T-

4

T+

LXES4XBAA6-027_MSOP8

C255

.1U_0402_16V7K~D

1 2

USB_PWR_EN#

C256

.1U_0402_16V7K~D

1 2

USB_PWR_EN#

CONN@JUSB 1

CONN@

10

GND

11

GND

CONN@JUSB 2

CONN@

10

GND

11

GND

VCC

GND

+5VALW +USB3_VCCA

+5VALW

USBGND1

USBGND2

1

0.01U_0402_16V7K~D

.1U_0402_16V7K~D

0.01U_0402_16V7K~D

C230

.1U_0402_16V7K~D

C222

C225

1

2

0.01U_0402_16V7K~D

.1U_0402_16V7K~D

C231

C238

1

2

0.01U_0402_16V7K~D

C239

1

2

0.01U_0402_16V7K~D

C232

1

2

For EMI request

L34

U3TXDN1_L

12

U3RXDN2U3RXDN2_L

12

U2DP2

4

U2DN2

1

+USB3_VCCA

8 7

U2DN2

6

D-

U2DP2

5

D+

For ESD request

R199 0_0603_5%~DR199 0_0603_5%~D

R200 0_0603_5%~DR200 0_0603_5%~D

C258 .1U_0402_16V7K~DC258 .1U_0402_16V7K~D

For ESD request

R204 0_0603_5%~DR204 0_0603_5%~D

R205 0_0603_5%~DR205 0_0603_5%~D

C329 .1U_0402_16V7K~DC329 .1U_0402_16V7K~D

Title

Size Document Number Rev

Date: Sheet of

U3TXDP1_L U3TXDP1

U3RXDP1_L U3RXDP1

U2DP1_L

U2DN1_L

U3RXDN1 U3RXDP1 U3TXDN1

2.0A

U26

1

GND

OC1#

2

IN

OUT1

3

OUT2

EN1#

4

OC2#

EN2#

TPS2062ADR_SO8~D

2.0A

U27

1

GND

OC1#

2

IN

OUT1

3

OUT2

EN1#

4

OC2#

EN2#

TPS2062ADR_SO8~D

1 2

Compal Electronics, Inc.

USB3.0 PD720200

L34

3 4

DLW21SN670HQ2L_4P

L36

3 4

DLW21SN670HQ2L_4P

L38

3

2

WCM-2012-670T_4P

For ESD request

D16

1

R-

2

R+

3

T-

4

T+

LXES4XBAA6-027_MSOP8

8 7 6 5

+USB3_VCCB

8 7 6 5

LA-6601P

1

10K_0402_5%~D

VCC

GND

D-

D+

W=60mils

R190

1 2

W=60mils

R195

1 2

+USB3_VCCA

150U_D _10VM_R40M~D

1

+

2

+USB3_VCCB

150U_D _10VM_R40M~D

1

+

2

U3TXDN1

12

U3RXDN1U3RXDN1_L

12

4

1

+USB3_VCCB

8 7 6 5

OCI2B

OCI1B

C247

1

2

C244

1

2

39 63Tuesday, November 30, 2010

C233

U2DP1

U2DN1

U2DN1 U2DP1U3TXDP1

10U_0603_6.3V6M~D

C793

10U_0603_6.3V6M~D

C794

1.0

A

1 1

Power share

U30

PWRSHARE_EN # SW_USB20_N9 SW_USB20_P9

2 2

SATA_PTX_DRX_P415 SATA_PTX_DRX_N415

SATA_PRX_DTX_N415 SATA_PRX_DTX_P415

+5VALW

3 3

USB_PWR_EN#39,44

0.1U_0402_16V4Z~D

10U_1206_16V4Z

C273

C272

1

2

+5VALW

USB_PWR_EN#

0.1U_0402_16V4Z~D

10U_1206_16V4Z

C275

C274

1

2

4 4

U30

1

CEN

2

DM

3 4 9

MAX14566EETA+_TDFN-EP8_2X 2~D

CS11 0.01U_0402_16V7K~DCS11 0.01U_0402_16V7K~D

1 2

CS13 0.01U_0402_16V7K~DCS13 0.01U_0402_16V7K~D

1 2

CS15 0.01U_0402_16V7K~DCS15 0.01U_0402_16V7K~D

1 2

CS17 0.01U_0402_16V7K~DCS17 0.01U_0402_16V7K~D

1 2

2.0A

U32

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

2.0A

U33

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

TDM DP GND

VCC GND

RS11 150K_0402_1%~D@RS11 15 0K_0402_1%~D@ RS6 0_0402_5%~DRS6 0_0402_5%~D RS8 5.1K_0402_1%~DRS8 5.1K_0402_1%~D

+5V_USB2_A

8

OC1#

7

OUT1

6

OUT2

5

OC2#

+5V_USB2_B

8

OC1#

7

OUT1

6

OUT2

5

OC2#

USB power

CB

TDP

PWRSHARE_OE#

8

USB20_N9

7

USB20_P9

6 5

12 12 12

SATA_PTX_DRX_P0_R SATA_PTX_DRX_N0_R

SATA_PRX_DTX_N0_RC SATA_PRX_DTX_P0_RC

USB_OC0# 18

USB_OC1# 18

+5VALW

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D C261

C261

2

1

MODE A1_EQ A1_EM

B

PWRSHARE_OE# 44

USB20_N9 18 USB20_P9 18

S Function

OE#

H

X

Disconnect

D=1D

L

L H

D=2D

L

US3

6

NC

16

3 17 18 19

1

2

4

5

21

VDD VDD

NC

NC EN

MODE(VDD)

B_EQ

A_EQ A_EM

B_EM

AI+

AO+ AO-

AI-

BO-

BI-

BO+

BI+

HEATGND

PI3EQX4951STZDEX_TQFN20_4X4~D

USB20_N018

USB20_P018

USB20_N118

USB20_P118

PWRSHARE_OE#

PWRSHARE_EN #

10 20

13 7

B1_EQ

8

B1_EM

9

SATA_PTX_DRX_P0_R4

15

SATA_PTX_DRX_N0_R4

14

SATA_PRX_DTX_N0_R4

12

SATA_PRX_DTX_P0_R4

11

R203 100K_0402_5%~DR203 100K_0402_5%~D

1 2

R97 10 K_0402_5%~DR97 10K_0402_5%~D

1 2

+3VS

0.1U_0402_16V4Z~D

1

CS8

2

RS7 0_0402_5%~DRS7 0_0402_5%~D RS9 15K_0402_1%~DRS9 15 K_0402_1%~D

12 12

ESATA repeater

R212 0_0402_5%~D@ R212 0_0402_5%~D@

1 2

L41

USB20_N0

USB20_P0

USB20_N1

USB20_P1

L41

1

4

WCM2012F2S-900T04_0805

R213 0_0402_5%~D@ R213 0_0402_5%~D@

1 2

R214 0_0402_5%~D@ R214 0_0402_5%~D@

1 2

L42

1

4

WCM2012F2S-900T04_0805

R215 0_0402_5%~D@ R215 0_0402_5%~D@

1 2

L41, L42 close to JUSB3, JUSB4

C

+5VALW

10U_1206_16V4Z

0.1U_0402_16V4Z~D

USB charger Power

C263

1

C262

2

PWRSHARE_EN # PWRSHARE_EN_R#

PWRSHARE_EN _EC#44

1 2

R1699 10K_0402_5%~DR1699 10K_0402_5%~D

221

D31

1SS355TE-17_SOD323-2

SW_USB20_P9

SW_USB20_N9

1

R206 0_0402_5%~D@ R206 0_0402_5%~D@

1

4

R209 0_0402_5%~D@ R209 0_0402_5%~D@

1 2

L40

1

4

WCM2012F2S-900T04_0805

1 2

L40 close to JESA1

6

V I/O

+5VALW

5

V BUS

4

V I/O

IP4223CZ6_SO6~D

D18 close to JESA1

SATA_PTX_DRX_P0_R4 SATA_PTX_DRX_N0_R4 SATA_PTX_DRX_N4_C

SATA_PRX_DTX_N0_R4

D22

@D22

USB20_N0_CONN

2

USB20_P0_CONN

3

USB20_N1_CONN

2

USB20_P1_CONN

3

+5VALW

@

4

I/O 3

5

VDD

6

I/O 4

IP4223CZ6_SO6-6

D29

@D29

@

4

I/O 3

5

VDD

6

I/O 4

IP4223CZ6_SO6-6

D

2.0A

U29

1

GND

OC1#

2

IN

OUT1

3

OUT2

EN1#

4

OC2#

EN2#

TPS2062ADR_SO8~D

USB20_P9_CONN

2

USB20_N9_CONN

3

D18

CU6 0.01U_0402_16V 7K~DCU6 0.01U_0402_16V7K~D CU7 0.01U_0402_16V 7K~DCU7 0.01U_0402_16V7K~D

CU8 0.01U_0402_16V 7K~DCU8 0.01U_0402_16V7K~D CU9 0.01U_0402_16V 7K~DCU9 0.01U_0402_16V7K~D

GND

V I/O

Ground

V I/O

I/O 2

I/O 1

I/O 2

I/O 1

1 2 1 2

3

2

1

3

2

1

2

3

USB20_N9_CONNU SB20_P9_CONN

USB20_N0_CONN

USB20_P0_CONN

USB20_N1_CONN

USB20_P1_CONN

+5V_CHGUSB

8 7 6 5

USB_OC2# 18

+5V_CHGUSB

150U_B2_6.3V-M~D

1

C264

+

2

USB20_N9_CONN USB20_P9_CONN

SATA_PTX_DRX_P4_C

SATA_PRX_DTX_N4_C SATA_PRX_DTX_P4_CSATA_PRX_DTX_P0_R4

+5V_USB2_A

1

+

2

+5V_USB2_B

1

+

2

1

2

2.0A

150U_B2_6.3V-M~D

C269

2.0A

150U_B2_6.3V-M~D

C268

0.1U_0402_16V4Z~D

C265

2.0A

USB/ESATA CONN

JESAT1

CONN@

JESAT1

CONN@

USB

1

USB_V

2

USB_D-

3

USB_D+

4

USB_GND

5

GND

6

A+

ESATA

7

A-

8

GND

9

B-

GND

10

B+

GND

11

GND

TYCO_1759599-3~D

Link Done

USB20_N0_CONN USB20_P0_CONN

0.1U_0402_16V4Z~D

1

C271

2

USB20_N1_CONN USB20_P1_CONN

0.1U_0402_16V4Z~D

1

C270

2

SUYIN_020133MR004M25GZL

E

12 13 14 15

USB CONN

JUSB3

CONN@JUSB3

CONN@

1

+5V

2

D-

3

D+

GND

GND4GND

Link Done

JUSB4

CONN@JUSB4

CONN@

1

+5V

2

D-

3

D+

GND

GND4GND

Link Done

6 5

Place near USB connector

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

A

B

DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

USB/ESATA TS3USB221RSER

LA-6601P

40 63Tuesday, November 30, 2010

E

1.0

5

D D

C C

PM_SLP_S3#17,44

B B

A A

BATT_CHG_LED#44

5

R1572 0_0603_5%~DR15 72 0_0603_5%~D

+5VALW

+5VS

1 2

R1575 0_0603_5%~D@R1575 0_0603_5%~D@

1 2

Cloase to JP1

2

ACIN14,17,44,50

2

+3.3V_F347

1

2

+3.3V_F347

D

G

S

+3.3V_F347

D

G

S

+3.3V_F347

D

G

S

1U_0805_10V7

0.1U_0402_16V4Z

C1730

12

R1586

100K_0402_1%~D

SLP_S3

1

Q210

Q210 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

3

12

R1588

100K_0402_1%~D

ACIN#

1

Q213

Q213 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

3

12

R1592

100K_0402_1%~D

BATT_CHG_LED

1

Q216

Q216 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

3

W=40mils

+3.3V_F347

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D C1712

C1712

C1711

1

2

GND1 GND2

CONN@

AMPHE_G846A06201EU

JP1

1 2 3 4 5 6

+3.3V_F347

4

1U_0805_10V7

C1705

1

2

1 2

R1577

1K_0402_1%~D

+3.3V_F347

1 2 3 4 5 6

7 8

PM_SLP_S5#17,44

BATT_LOW_LED#44

4

1

2

0_0603_5%~D

0.1U_0402_16V4Z~D

C1706

R1569

1 2

USB20_P618 USB20_N618

@

C1715 0.1U_0402_16V4Z~D@C1715 0.1U_0402_16V4Z~D

C1719 0.1U_0402_16V4Z~D@C1719 0.1U_0402_16V4Z~D

1

2

+3.3V_F347

@

C1720 0.1U_0402_16V4Z~D@C1720 0.1U_0402_16V4Z~D

1

2

+3.3V_F347

2

G

+3.3V_F347

2

G

+3.3V_F347_R

0.1U_0402_16V4Z~D

22P_0402_50V8J~D

C1707

1

2

1

USB20_P6 USB20_N6

@

C1721 0.1U_0402_16V4Z~D@C1721 0.1U_0402_16V4Z~D

C1717 0.1U_0402_16V4Z~D@C1717 0.1U_0402_16V4Z~D

C1716 0.1U_0402_16V4Z~D@C1716 0.1U_0402_16V4Z~D

1

2

12

R1587

100K_0402_1%~D

SLP_S5

1

D

Q211

Q211 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

12

R1664

100K_0402_1%~D

BATT_LOW_LED

1

D

Q249

Q249 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

C1708

U602

6

4 5

7 8

9

10

18 17 16 15 14 13 12

@

C1718 0.1U_0402_16V4Z~D@C1718 0.1U_0402_16V4Z~D

C1722 0.1U_0402_16V4Z~D@C1722 0.1U_0402_16V4Z~D

We are Green SA00003IR20

1

2

P0.0

VDD

P0.1 P0.2

D+

P0.3

D-

P0.4 P0.5

REGIN

P0.6

VBUS

P0.7

RST#/C2CK

P1.0

P3.0/C2D

P1.1 P1.2

P2.0

P1.3

P2.1

P1.4

P2.2

P1.5

P2.3

P1.6

P2.4

P1.7

P2.5 P2.6 P2.711GND

C8051F347-GQ_LQFP32_7X7

3V_F347_ON44

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2 1 32 31 30 29 28 27

26 25 24 23 22 21 20 19

3

SPI_MOCLK SPI_MOSO SPI_MOSI SPI_MOCS# I2C_DAT I2C_CLK

C1710 0.1U_0402_16V4Z~D@C1710 0.1U_0402_16V4Z~D@

SLP_S3 BATT_CHG_LED ACIN# LID_SW_IN#_D BATT_LOW_LED

SLP_S5

C1713 0.1U_0402_16V4Z~D@C1713 0.1U_0402_16V4Z~D@ C1714 0.1U_0402_16V4Z~D@C1714 0.1U_0402_16V4Z~D@

place R1564 as close as U602

1 2

R1564 0_0402_5%~DR1564 0_0402_5%~D

1 2

SDMK0340L-7-F_SOD323-2~D

+3.3V_F347

+3VALW +3.3V_F347

B+_BIAS

+3VALW

12

R1590

100K_0402_1%~D

1

D

Q215

Q215 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

2

G

S

3

100K_0402_1%~D

1 2 1 2

R1593

12

2

I2C_DAT

R184110K_0402_5% R184110K_0402_5%

12

LID_SW_IN#

I2C_CLK

+3.3V_F347

SPI_MOCS#

0.1U_0402_16V4Z~D

1

2

SPI_MOCLK_R

I2C_DAT 42,43

I2C_CLK 42,43

R1576 1K_0402_5%~DR157 6 1K_0402_5%~D

1 2

12

D70

SPI_MOCLK_R

1 2

R1580 10K_0402_5%~DR1580 10K_0402_5%~D

1 2

R1582 10K_0402_5%~DR1582 10K_0402_5%~D

1 2

R1581 10K_0402_5%~DR1581 10K_0402_5%~D

+3.3V_F347

MAXIM - LED MAXIM - GPIO 0100 001b I2C EEPROM

J11

@J11

@

2

112

JUMP_43X118

Q212

SI3456DDV-T1-GE3_TSOP6~D

D

6

S

45 2 1

R1632

100K_0402_1%~D

1 2

2

G

0.1U_0402_25V6K~D

G

C1726

1

3

2

SSM3K7002F_SC59-3~D

1

D

Q214

S

3

2

+3.3V_F347

LID_SW_IN# 16,42,44

R158415_0402_5% R158415_0402_5%

12

R158315_0402_5% R158315_0402_5%

12

C1723

1

2

SMBUS ADDRESSDEVICE 0100 000b

1010 000b

100K_0402_1%~D

R1589

300K_0402_5%~D

R1815

1

2

1 2

1

+3.3V_F347

R15704.7K_0402_5%~D R15704.7K_0402_5%~D

12

R15714.7K_0402_5%~D R15714.7K_0402_5%~D

12

U604

5

DI

6

CLK

1

CS

7

HOLD

3

WP

8

VCC

22P_0402_50V8J~D

EN25F80-75HCP_SO8

C1724

4.7U_0603_6.3V6M~D

12

1

2

R1585 15_0402_5%R1585 15_0402_5%

2

SO

4

VSS

C1725

1 2

+3.3V_F347 behavior

SPI_MOSOSPI_MOSI

STATE

S0 S3 S4 S5

0.1U_0402_25V6K~D

C1727

AC IN

BAT only

ON ON ON ON

ON ON OFF OFF

AC mode battery full in S5:turn off ELC controller

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

ELC (1)

LA-6601P

1

1.0

41 63Tuesday, November 30, 2010

1.0

5

7313_INT#43

+3.3V_F347

R1595

1 2

4.7K_0402_1%~D

12

R1594

7313_INT#

4.7K_0402_1%~D

12

R1601

I2C_CLK41,43

I2C_DAT41,43

TP_LED_R_DRV# TP_LED_G_DRV# TP_LED_B_DRV#

D D

4.7K_0402_1%~D

12

R1596

R1597

+3.3V_F347

4.7K_0402_1%~D

12

R1599

C C

B B

PCH_SATALED#15

12

R1598

R1600

+5VS

100K_0402_5%~D

12

R1602

SATA_LED_ACT

SSM3K7002F_SC59-3~D

1

D

Q219

2

G

S

3

L/R Headlight, Logo

U605

22

INT#/O16

I2C_CLK

19

I2C_DAT

AD0_0 AD0_1 AD0_2

20

18 23 24

14 15 16 17

MAX7313DATG+T_TQFN-EP24_4X4~D

SCL SDA

AD0 AD1 AD2

P12 P13 P14 OSC

GND9GND

V+

P0 P1 P2 P3 P4 P5 P6 P7 P8

P9 P10 P11

CAP, Media, Eyes, Rim

U608

22

I2C_CLK I2C_DAT

AD2_0 AD2_1 AD2_2

HDD_R_7313# HDD_G_7313# HDD_B_7313#

2

G

2

G

2

G

INT#/O16

19

SCL

20

SDA

18

AD0

23

AD1

24

AD2

14

P12

15

P13

16

P14

17

OSC

GND9GND

MAX7313DATG+T_TQFN-EP24_4X4~D

HDD_B

1

D

Q217

Q217 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

HDD_B_7313#

HDD_R

1

D

Q218

Q218 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

HDD_R_7313#

HDD_G

1

D

Q220

Q220 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

HDD_G_7313#

V+

P0 P1 P2 P3 P4 P5 P6 P7 P8

P9 P10 P11

Reference AD2 AD1 AD0 MAX7313

21

LSPK_LED_R_DRV#

1

LSPK_LED_G_DRV#

2

LSPK_LED_B_DRV#

3

RSPK_LED_R_DRV#

4

RSPK_LED_G_DRV#

5

RSPK_LED_B_DRV#

6 7 8 10

LOGO_LED_R_DRV#

11

LOGO_LED_G_DRV#

12

LOGO_LED_B_DRV#

13 25

21

1 2 3 4 5 6 7 8 10 11 12 13 25

4

+3.3V_F347

1

2

LED_R_7313#_1 LED_G_7313#_1 LED_B_7313#_1

PWR_R_7313# PWR_G_7313# PWR_B_7313#

LID_SW_IN#16 ,41,44

3

0.1U_0402_16V4Z~D

C1728

1

2

1

PJSOT05C_SOT23-3

0.1U_0402_16V4Z

0.1U_0402_16V4Z C1733

C1733

PJSOT05C_SOT23-3

+5VS +5VS_TP_LED

0.1U_0402_16V4Z~D

1

2

TP_CLK TP_DATA

LID_SW_IN# TP_LED_R_DRV# TP_LED_G_DRV# TP_LED_B_DRV#

0.1U_0402_16V4Z~D

C555

TP_CLK44 TP_DATA44

D71

1

2

+3VALW

0.1U_0402_16V4Z~D

3

2

C554

TP_CLK

TP_DATA

Touchpad LED CONN

JTPMB

1

2

3

4

5

6

7

8

9

10

11

12

13

14

GND1

15

GND2

MOLEX_53398-1371~ D

CONN@

Link Done

KSI24 4,46 KSI44 4,46 KSI64 4,46 KSO344,46

2

0.1U_0402_16V4Z

1

2

LED_R_7313#_1 LED_G_7313#_1

KSI2 KSI4 KSI6 KSO3 LID_SW PWR_R_7313#

+5VS

C1745

JMEDIA

CONN@JMEDIA

CONN@

1

1 3 5 7 9 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930

G131G2

2 4 6 8

10

3 5 7 9

AMPHE_G846A302101EU

Link Done

20mil

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

32

+5VALW

0.1U_0402_16V4Z

1

2

LED_B_7313#_1 WLES ON/OFF LED#

KSI3 KSI5 KSI7 KSO9 PWR_G_7313# PWR_B_7313#

1

C1744

WLES ON/OFF LED# 44

KSI3 44,46 KSI5 44,46 KSI7 44,46 KSO9 44,46

Media Board CONN

+5VS +5VS +5VS

0.1U_0402_16V4Z

LID_SW

2

G

2

G

+5VALW

100K_0402_5%~D

12

R1603

LID_SW

1

D

Q222

Q222 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

SATA_LED_ACT

1

D

Q221

Q221 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

0.1U_0402_16V4Z

C1729

1

2

LED_R_7313#_1 LED_B_7313#_1 LED_G_7313#_1

CAPS_LED#44 NUM_LED#44 SCR_LED#44

CAPS_LED# NUM_LED# SCR_LED#

JCAP

1

2

3

4

5

6

7

8

9

GND1

10

GND2

FOX_HS8108E

CONN@

Link Done

0.1U_0402_16V4Z

1

2

LID_SW LOGO_LED_R_DRV# LOGO_LED_G_DRV# LOGO_LED_B_DRV#

C1732

20mil

1 2 3 4 5 6

MOLEX_53398-0671~ D

Link Done

Num LED CONN LOGO Board CONN

B+_BIAS + 5VS +5VS_TP_LED

300K_0402_5%~D

R166

1 2

EN_TPLED

SSM3K7002FU_SC70-3~D

13

D

EN_TPLED#44

2

G

Q44

S

1

2

Q45

SI3456DDV-T1-GE3_TSOP6~D

D

6

0.1U_0402_16V4Z

2 1

C1746

G

1.5M_0402_5%~D

1.5M_0402_5%~D R1654

R1654

12

S

45

3

0.1U_0402_25V6K~D

1

C185

2

1U_0603_10V4Z~D

C184

1

2

CONN@

JLOGO

1 2 3 4 5 6

7

G7

8

G8

ON/OFFBTN#46

0.1U_0402_16V4Z

C1736

C1735

1

2

LSPK_LED_R_DRV# LSPK_LED_G_DRV# LSPK_LED_B_DRV# RSPK_LED_R_DRV# RSPK_LED_G_DRV# RSPK_LED_B_DRV#

JSPK2

1

2

3

4

5

11

6

12

7

8

9

10

FOX_HS6110E-M~D

CONN@

Link Done

11 12

SPK LED Board CONN

+5VS

0.1U_0402_16V4Z

C1737

1

2

ON/OFFBTN# HDD_R HDD_G HDD_B

JBTN

CONN@JBTN

CONN@

1

2

3

4

7

5

G7

5

8

6

G8

6

MOLEX_53398-0671~ D

Link Done

U605

A A

0 1 0

L/R Headlight , Logo, TP

Num, CAP , SCR EJECT, REV, PLAY/PAUSE FFWD, Vol_DWN, Vol_UP

U608

0 1 1

5

Wireless ON/OFF AWCC Button Alien Adrenaline Power Button Eyes Power Button Rim

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

4

DELL'S EXPRESS WRITTEN CONSENT.

3

Touchpad LED circuit PWR BTN Board CONN

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ELC (2)

LA-6601P

1

1.0

42 63Tuesday, November 30, 2010

1.0

5

+3.3V_F347

4.7K_0402_1%~D

12

R1605

12

R1608

4.7K_0402_1 %~D

4.7K_0402_1%~D

12

4.7K_0402_1%~D

12

R1613

R1619

R1625

R1631

R1606

7313_INT#42

I2C_CLK41, 42

I2C_DAT41,42

R1609

+3VS

12

5

+3VS

12

5

+3VS

12

5

+3VS

12

5

4.7K_0402_1%~D

D D

4.7K_0402_1%~D

C C

KB_LED_R1_DRV#

KB_LED_G1_DRV#

B B

KB_LED_B1_DRV#

A A

KB_LED_B3_DRV#

K/B Backlight

AD2 AD1 AD0 0 0 1

I2C_CLK I2C_DAT

AD3_0 AD3_1 AD3_2

+3VS

G

+3VS

G

+3VS

G

+3VS

G

22

19 20

18 23 24

14 15 16 17

MAX7313DATG+T_TQFN-EP24 _4X4~D

12

R1612

4.7K_0402_1 %~D

KB_LED_R1_DRV

3

D

S

4

Q270B

DMN66D0LDW -7_SOT363-6~D

12

R1618

4.7K_0402_1 %~D

KB_LED_G1_DRV

3

D

Q271B

S

4

DMN66D0LDW -7_SOT363-6~D

12

R1624

4.7K_0402_1 %~D

KB_LED_B1_DRV

3

D

S

4

DMN66D0LDW -7_SOT363-6~D

12

R1630

4.7K_0402_1 %~D

KB_LED_B3_DRV

3

D

Q273B

S

4

DMN66D0LDW -7_SOT363-6~D

U609

INT#/O16

SCL SDA

AD0 AD1 AD2

P12 P13 P14 OSC

GND9GND

Q272B

21

V+

1

P0

2

P1

3

P2

4

P3

5

P4

6

P5

7

P6

8

P7

10

P8

11

P9

12

P10

13

P11

25

2

G

6

D

2

G

S

1

6

D

2

G

S

1

6

D

2

G

S

1

4

+3.3V_F347

0.1U_0402_16V4Z

C1749

1

2

KB_LED_R1_DRV# KB_LED_G1_DRV# KB_LED_B1_DRV# KB_LED_R2_DRV# KB_LED_G2_DRV# KB_LED_B2_DRV# KB_LED_R3_DRV# KB_LED_G3_DRV# KB_LED_B3_DRV# KB_LED_R4_DRV# KB_LED_G4_DRV# KB_LED_B4_DRV#

KB_LED_R1_DRV# _A#

6

D

S

1

Q270A

DMN66D0LDW -7_SOT363-6~D

KB_LED_G1_DRV#_ A#

Q271A

DMN66D0LDW -7_SOT363-6~D

KB_LED_B1_DRV# _A#

Q272A

DMN66D0LDW -7_SOT363-6~D

KB_LED_B3_DRV# _A#

Q273A

DMN66D0LDW -7_SOT363-6~D

4

R1607

4.7K_0402_1 %~D

KB_LED_R2_DRV#

4.7K_0402_1 %~D

KB_LED_G2_DRV#

4.7K_0402_1 %~D

KB_LED_B2_DRV#

4.7K_0402_1 %~D

KB_LED_R3_DRV#

4.7K_0402_1 %~D

KB_LED_G3_DRV#

3

+3VS

12

+3VS

12

R1611

+3VS

12

R1617

+3VS

12

R1623

+3VS

12

R1629

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

12

R1604

4.7K_0402_1 %~D

KB_LED_R2_DRV

3

D

5

G

S

4

DMN66D0LDW -7_SOT363-6~D

+3VS

12

R1610

4.7K_0402_1 %~D

KB_LED_G2_DRV

3

D

5

G

S

Q263B

4

DMN66D0LDW -7_SOT363-6~D

+3VS

12

R1616

4.7K_0402_1 %~D

KB_LED_B2_DRV

3

D

5

G

S

4

DMN66D0LDW -7_SOT363-6~D

+3VS

12

R1622

4.7K_0402_1 %~D

KB_LED_R3_DRV

3

D

5

G

S

4

+3VS

12

R1628

4.7K_0402_1 %~D

KB_LED_G3_DRV

3

D

5

G

S

4

DMN66D0LDW -7_SOT363-6~D

3

2

G

Q262B

2

G

2

G

Q267B

2

G

Q268B

DMN66D0LDW -7_SOT363-6~D

2

G

Q269B

KB_LED_R2_DRV# _A#

6

D

S

1

Q262A

DMN66D0LDW -7_SOT363-6~D

KB_LED_G2_DRV#_ A#

6

D

Q263A

S

1

DMN66D0LDW -7_SOT363-6~D

KB_LED_B2_DRV# _A#

6

D

Q267A

S

1

DMN66D0LDW -7_SOT363-6~D

KB_LED_R3_DRV# _A#

6

D

S

Q268A

1

DMN66D0LDW -7_SOT363-6~D

KB_LED_G3_DRV#_ A#

6

D

Q269A

S

1

DMN66D0LDW -7_SOT363-6~D

2

+5VS

0.5A_13.2V_N ANOSMDC050F-13.2-2

4.7K_0402_1 %~D

KB_LED_R4_DRV#

4.7K_0402_1 %~D

KB_LED_G4_DRV#

4.7K_0402_1 %~D

KB_LED_B4_DRV#

2

1

R1615

R1621

R1627

K/B Backlight CONN

KB_LED_R1_DRV# _A# KB_LED_G1_DRV#_ A# KB_LED_B1_DRV# _A# KB_LED_R2_DRV# _A# KB_LED_G2_DRV#_ A# KB_LED_B2_DRV# _A# KB_LED_R3_DRV# _A# KB_LED_G3_DRV#_ A# KB_LED_B3_DRV# _A# KB_LED_R4_DRV# _A# KB_LED_G4_DRV#_ A#

21

+3VS

12

+3VS

12

+3VS

12

KB_LED_B4_DRV# _A#

+5VS_KBBL+5VS_KBBL

1

C1750

0.1U_0402_1 6V4Z

2

+3VS

12

4.7K_0402_1 %~D

3

D

5

G

S

4

DMN66D0LDW -7_SOT363-6~D

+3VS

12

4.7K_0402_1 %~D

3

D

5

G

S

4

+3VS

12

4.7K_0402_1 %~D

3

D

5

G

S

4

R1614

KB_LED_R4_DRV

Q264B

R1620

KB_LED_G4_DRV

Q265B

DMN66D0LDW -7_SOT363-6~D

R1626

KB_LED_B4_DRV

Q266B

DMN66D0LDW -7_SOT363-6~D

F4

JKBBL1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

GND

18

GND

TYCO_1-2041070-6~ D

Link Done

2

G

2

G

2

G

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Documen t Number Re v

Date: Sheet of

Compal Electronics, Inc.

ELC (3)

LA-6601P

1

CONN@JKBBL1

CONN@

KB_LED_R4_DRV# _A#

6

D

Q264A

S

1

DMN66D0LDW-7_SOT363-6~D

KB_LED_G4_DRV#_ A#

6

D

Q265A

S

1

DMN66D0LDW-7_SOT363-6~D

KB_LED_B4_DRV# _A#

6

D

Q266A

S

1

DMN66D0LDW-7_SOT363-6~D

43 63Tuesday, November 30, 2010

1.0

5

KSI[0..7]42,46

KSO[0..15]42,46

+3VS

R217 10K_0402_5%~DR217 10K_0402_5%~D

1 2

R218 10K_0402_5%~DR218 10K_0402_5%~D

1 2

R220 10K_0402_5%~DR220 10K_0402_5%~D

1 2

R244 2.2K_0402_5%~DR244 2.2K_0402_5%~D

D D

C C

1 2

R247 2.2K_0402_5%~DR247 2.2K_0402_5%~D

1 2

+3VALW +3VALW

47K_0402_5%~D

R221

1 2

EC_RST#

0.1U_0402_16V4Z~D

C285

1

2

EC_ESB_CLK EC_ESB_CLK_R

+3VALW

R229 2.2K_0402_5%~DR229 2.2K_0402_5%~D R230 2.2K_0402_5%~DR230 2.2K_0402_5%~D R231 47K_0402_5%~DR231 47K_0402_5%~D R232 47K_0402_5%~DR232 47K_0402_5%~D R238 10K_0402_5%~D@ R238 10K_0402_5%~D@ R239 1K_0402_1%~D@ R239 1K_0402_1%~D@ R241 10K_0402_5%~D@ R241 10K_0402_5%~D@ R242 4.7K_0402_5%~DR242 4.7K_0402_5%~D R243 4.7K_0402_5%~DR243 4.7K_0402_5%~D R1679 10K_0402_5%~DR1679 10K_0402_5%~D R1698 10K_0402_5%~DR1698 10K_0402_5%~D

PCH_PWR_EN H_PROCHOT#_EC need add

TH_OVERT#14

B B

H_PROCHOT#5,49

KSI[0..7]

KSO[0..15]

BKOFF# EC_SCI# M_THERMAL# EC_SMB_CK2 EC_SMB_DA2

47K_0402_5%~D

12

R248

RST#

.1U_0402_16V7K~D

2

C292

1

1 2

R252 0_0402_5%~DR252 0_0402_5%~D

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

1 2

R255 0_0402_5%~DR255 0_0402_5%~D

H_PROCHOT#

TH_OVERT#_EC

1 2

R256 0_0402_5%~DR256 0_0402 _5%~D

1

D

H_PROCHOT#_EC

2

G

S

Q22

3

SSM3K7002F_SC59-3~D

EC_SMB_CK1 EC_SMB_DA1 KSO1 KSO2 EC_MUTE EC_SMI# SPK_MUTE# EC_ESB_CLK EC_ESB_DAT LID_SW_IN# EN_WOL#

+3VALW

EC_SMB_CK114,48

EC_SMB_DA114,48

EC_SMB_CK2_R31

EC_SMB_DA2_R31

PM_SLP_S3#17,41 PM_SLP_S5#17,41

VR_HOT# 56

R216 0_0805_5%R216 0_0805_5%

1 2

CLK_PCI_LPC

12

R226

@R226

@

33_0402_5%~D

22P_0402_50V8J~D

1

@

C284

2

Reserve for EMI please close to U36

PCH_DPWROK17

R245 0_0402_5%~DR245 0 _0402_5%~D R246 0_0402_5%~DR246 0 _0402_5%~D

R249 0_0402_5%~DR249 0 _0402_5%~D R250 0_0402_5%~DR250 0 _0402_5%~D

SYSTEM_FAN_FB45 MXM1_FAN_FB45

E51TXD_P80DATA38

E51RXD_P80CLK38

SUSCLK_R17

+3VALW

0.1U_0402_16V4Z~D

1Mb SPI ROM

C295

1

R258

0_0402_5%~D

SPI_FSEL#FSEL#

1 2

FRD# SPI_SO

A A

R265 0_0402_5%~DR265 0_0402_5%~D

12

U36

1

CS#

2 3 4

VCC

SO

HOLD#

WP#

SCLK

GND

MX25L1005AMC-12G_SO8

SI

8 7 6 5

P/N: SA00002C100

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

5

DELL'S EXPRESS WRITTEN CONSENT.

2

SPI_CLK_R SPI_CLK SPI_FWR# FW R#

PCH_DPWROK

1 2 1 2

EC_SMB_CK245

EC_SMB_DA245

1 2 1 2

EC_SMI#19

SUSWARN#17

SG_AMD_BKL17,26

NUM_LED#42

1

2

LPC_FRAME#15

CLK_PCI_LPC18

PS_ID49

ON/OFF46

R253

1 2

0_0402_5%~D

4

0.1U_0402_16V4Z~D

LPC_AD315 LPC_AD215 LPC_AD115 LPC_AD015

PLT_RST#5,18,33,35,38,39

4

C277

GATEA2019 KB_RST#19 SERIRQ15

EC_SCI#19 EN_CAM26

+3VALW_EC

0.1U_0402_16V4Z~D

C276

1

2

EC_SMI# PS_ID EC_ESB_CLK_R EC_ESB_DAT SUSWARN#

SYSTEM_FAN_FB MXM1_FAN_FB E51TXD_P80DATA E51RXD_P80CLK ON/OFF SG_AMD_BKL NUM_LED#

100K_0402_5%~D

R152

R2590_0402_5%~D R2590_0402_5%~D

12

R2600_0402_5%~D R2600_0402_5%~D

12

0.1U_0402_16V4Z~D

C278

1

2

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_LPC PLT_RST# EC_RST# EC_SCI# EN_CAM

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3#_R PM_SLP_S5#_R

EC_CRY1 EC_CRY2

20P_0402_50V8J~D

C1846

1

2

1 2

Close to U34

1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

C279

1

2

C280

2

1

U34

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LPC_FRAME#/LFRAME#

5

LPC_AD3/LAD3

7

LPC_AD2/LAD2

8

LPC_AD1/LAD1

10

LPC_AD0/LAD0

12

CLK_PCI_EC/PCICLK

13

PCIRST#/GPIO05

37

EC_RST#/ECRST#

20

EC_SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/SCL0/GPIO44

78

EC_SMB_DA1/SDA0/GPIO45

79

EC_SMB_CK2/SCL1/GPIO46

80

EC_SMB_DA2/SDA1/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

SUS_PWR_DN_AC K/GPIO0D

25

INVT_PWM/PWM 2/GPIO11

28

FAN_SPEED1/FANFB0/GPIO14

29

FANFB1/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLK1

123

XCLK0

KB930QF-A1_LQFP128_14X14

FBMA-L11-160808-800LMT_0603

1000P_0402_50V7K~D

2

C281

1

9

LPC & MISC

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

1 2

22

33

96

111

VCC

PWM Output

DA Output

SPI Device I/F

SPI Flash ROM

GPIO

GND

11

24

35

94

3

L43

+EC_VCCA

67

125

VCC

AVCC

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

ACOFF/FANPWM1/GPIO13

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD Input

DAC_BRIG/DA0/GPO3C

EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B

CAP_INT#/PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXIOA00

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

LID_SW#/GPXIOD00

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

PWR_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

GPO

RF_OFF#/GPXIOA09

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

EAPD/GPXIOD03

GPI

EC_THERM#/GPXIOD04

SUSP#/GPXIOD05

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

AGND

GND

69

20mil

113

ECAGND

L44

L44 FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1 2

Title

Size Document Number Rev

Date: Sheet of

3

0.1U_0402_16V4Z~D

C282

1

2

ECAGND

CPU1.5V_S3_GATE

PWM0/GPIO0F

SPICLK/GPIO58

H_PECI/GPIO41

SYSON/GPIO56

AC_IN/GPIO59

21

BEEP#

23

SYSTEM_FAN_PWM

26

MXM1_FAN_PWM

27

BATT_TEMP

63

PM_SLP_SUS#

64

ADP_I

65

AD_BID0

66

AD3/GPI3B

75

AD4/GPI42 AD5/GPI43

DA3/GPO3F

SPIDI/MISO

SPIDO/MOSI

SPICS#

GPIO40

GPXIOA10 GPXIOA11

V18R

IMON

76

H_PROCHOT#_EC

68

AC_SEL

70

IREF

71

CHGVADJ

72

EC_MUTE_R

83

SA_PGOOD

84

LCD_BKL_EN

85

PWRSHARE_EN _EC#

86

TP_CLK

87

TP_DATA

88

SYSTEM_PWROK

97

EN_WOL#

98

HDA_SDO

99

LID_SW_IN#

109

119 120 126 128

PCH_VREG_EN#

73

EC_PECI

74

FSTCHG

89

BATT_CHG_LED#

90

CAPS_LED#

91

BATT_LOW_LED#

92

PCH_PWR_EN

93

SYSON

95

VR_ON

121

ACIN

127

PCH_RSMRST#

100 101

EC_ON

102

3S/4S#

103

PCH_PWROK

104

BKOFF#

105

SCR_LED#

106

PCH_APWROK

107

EC_LID_OUT#

108

PM_SLP_S4#_R

110

ENBKL

112

M_THERMAL#

114

ACOFF

115

SUSP#

116

PBTN_OUT#

117

PCIE_WAKE#_EC

118

+V18R

124

Compal Electronics, Inc.

EC ENE-KB930

LA-6601P

CPU1.5V_S3_GATE 9 BEEP# 34 SYSTEM_FAN_PWM 45 MXM1_FAN_PWM 45

BATT_TEMP 48 PM_SLP_SUS# 17 ADP_I 49,50

IMON 56

AC_SEL 49 IREF 50 CHGVADJ 50

R228 0_0402_5%~DR228 0_0402_5%~D

SA_PGOOD 55 LCD_BKL_EN 24 PWRSHARE_EN _EC# 40 TP_CLK 42

SYSTEM_PWROK 5,17 EN_WOL# 33

HDA_SDO 15 LID_SW_IN# 16,41,42

R234 33_0402_5%~DR234 33_0402_5%~D

1 2

R236 33_0402_5%~DR236 33_0402_5%~D

1 2

R237 33_0402_5%~DR237 33_0402_5%~D

1 2

PCH_VREG_EN# 21

FSTCHG 50 BATT_CHG_LED# 41 CAPS_LED# 42 BATT_LOW_LED# 41 PCH_PWR_EN 47 SYSON 3 9,47,54 VR_ON 56 ACIN 14,17,41,50

12

C550 100P_0402_50V8J~DC550 100P_0402_50V8J~D

PCH_RSMRST# 17

EC_ON 46,51 3S/4S# 50

PCH_PWROK 5,17 BKOFF# 26 SCR_LED# 42 PCH_APWROK 1 7 EC_LID_OUT# 16

R480 0_0402_5%~DR480 0 _0402_5%~D

1 2

R266 0_0402_5%~DR266 0_0402_5%~D

4.7U_0805_10V4Z~D

1

C293

2

HDMI_TOGGLE31,34

USB_PWR_EN#39,40

HDMI_IN_SELECT#24 ,26,35

HDMI_IN_CAB_DET#31

DYN_TURBO_SEL49

DRAMRST_CNTRL_EC6

EC_INV_PWM26

PCH_ENVDD17,26

44 63Tuesday, November 30, 2010

2

12

TP_DATA 42

ENBKL 26

M_THERMAL# 10,11,12,13

ACOFF 49,50 SUSP# 9,20,47,52,53,54 PBTN_OUT# 5,17

EC_ESB_CLK

RST#

EC_ESB_DAT

HDMI_IN_SELECT#

1.0

2

ECAGND

12

C286 100P_0402_50V8J~DC286 100P_0402_50V8J~D

EC_MUTE

FRD# FWR# SPI_CLK FSEL#

R240 43_0402_1%R240 43_0402_1%

1 2

Please place R240 close to EC with in 750mil

PM_SLP_S4# 17

PCIE_WAKE# 17,33,38,39

USB_PWR_EN#

U35

1

2

3

4

5

6

7

8

9

10

11

12

KC3810_QFN24_4X4

ESB_CLK

GPIO00

RST#

ESB_DAT

GPIO01

GPIO02

GPIO03

GPIO04

GPIO05

GPIO06

GPIO07/CAS_CLK

GND

TP_CLK

TP_DATA

EC_MUTE

H_PECI 5,19

Reserve for EMI please close to U36

TEST_EN#

GPIO08/CAS_DAT

GPIO0C/PWM0

GPIO0D/PWM1

GPIO0E/PWM2

GPIO0F/PWM3

GPIO10/ESB_RUN#

GPIO11/BaseAddOpt

1

15P_0402_50V8J~D

EC_CRY1

@

C287

1

2

@

2

X1

32.768KHZ_12.5PF_Q13MC14610002

SPK_MUTE#

1

D

2

G

10K_0402_5%~D

S

SSM3K7002F_SC59-3~D

3

R519

1 2

Board ID

+3VALW

100K_0402_5%~D

Ra

1 2

R225

56K_0402_5%

Rb

1 2

R219

AD_BID0

EC_CRY2

OSC4OSC

NC3NC

Q21

15P_0402_50V8J~D

1

2

1

2

Analog Board ID definition,Please see page 3.

SPI_CLK_R

R257

@R257

@

33_0402_5%~D

22P_0402_50V8J~D

1 2

@

C296

1

2

GPIO09

GPIO0A

GPIO0B

VCC

GND

25

13

14

15

16

17

18

19

20

21

22

23

24

EC_ESB_CLK

R251

@R251

@

33_0402_5%~D

1 2

22P_0402_50V8J~D

1

2

Reserve for EMI please close to U35

EC_ENVDD 24,26

EN_TPLED# 42

CP_SEL 50

PWRSHARE_OE# 40

WLES ON/OFF LED# 42

EC_AC_BAT# 14

TH_OVERT#_EC

DP_MXM_CARD_SEL 23,29

LCD_TEST 26

3V_F347_ON 41

+3VALW

0.1U_0402_16V4Z~D

60 mil

C294

1

2

1

C291

+5VS

R2234.7K_0402_5%~D R2234.7K_0402_5%~D

12

R2244.7K_0402_5%~D R2244.7K_0402_5%~D

12

@

C288

SPK_MUTE# 34,35

0.1U_0402_16V4Z~D

C283

@

A

System FAN Controller

100P_0402_50V8J~D

1 1

2 2

@C1814

@

C1814

1

2

Diode circuit s used for skin temp sensor (placed between CPU and MXM). Place C1814 close to Q276 as possible.

C

2

B

E

Q276

3 1

MMBT390 4WT1G_SC7 0-3~D

B

SENSOR_ DIODE_N1

R1796 0_ 0402_5%~DR1796 0_0 402_5%~D

1 2

R1797 0_ 0402_5%~DR1797 0_0 402_5%~D

1 2

R1798 4.7K _0402_5%~DR1798 4.7K_040 2_5%~D

+3VS

MAINPW ON48,49,51

SSM3K70 02FU_SC70-3~D

SYSTEM_FA N_PWM44

SYSTEM_FA N_FB44

REMOTE_ P1SENSOR_ DIODE_P1

1

C1815

470P_04 02_50V7K~D

2

REMOTE_ N1

1 2

Q282

+3VS

SYSTEM_FA N_PWM

SYSTEM_FA N_FB

C

D

1 3

2

D

+3VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D C1816

C1816

1

2

S

+3VS

G

10K_0402_5%~D

1 2

U617

1

VDD

2

DP

3

DN

THERM#/ADDR4GND

EMC1412 -A-ACZL-TR_MSOP 8

10K_0402_5%~D

R1800

R1801

1 2

12

D65

SDMK034 0L-7-F_SOD323-2 ~D

SMDATA

+5VS

1 2

SMCLK

ALERT

10K_0402_5%~D

R1802

EC_SMB_ CK2

8

EC_SMB_ DA2

7

6

5

22U_0805_6.3VAM~D

C243

1

2

JFAN1

CONN@JF AN1

CONN@

1

2

3

G5

4

G6

MOLEX_5 3398-0471~D

EC_SMB_ CK2 44

5 6

EC_SMB_ DA2 44

E

Link Done

+3VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D C1819

C1819

MXM1 FAN Controller

100P_0402_50V8J~D

C1818

1

2

@

3 3

4 4

@

C

2

B

E

Q279

3 1

MMBT390 4WT1G_SC7 0-3~D

SENSOR_ DIODE_P2

SENSOR_ DIODE_N2

R1806 0_ 0402_5%~DR1806 0_0 402_5%~D

1 2

R1807 0_ 0402_5%~DR1807 0_0 402_5%~D

1 2

R1808 6.8K _0402_5%~DR1808 6.8K_040 2_5%~D

+3VS

MXM1_FA N_PWM4 4

MXM1_FA N_FB4 4

1

470P_04 02_50V7K~D

2

1 2

MAINPW ON

+3VS

REMOTE_ P2

C1817

REMOTE_ N2

1 3

MXM1_FA N_PWM MXM1_FA N_FB

1

2

D

S

D

S

Q283

SSM3K70 02FU_SC70-3~D

G

2

+3VS

1 2

U618

1

VDD

2

DP

3

DN

THERM#/ADDR4GND

EMC1412 -A-ACZL-TR_MSOP 8

10K_0402_5%~D

R1810

R1813

1 2

D66

SDMK034 0L-7-F_SOD323-2 ~D

SMCLK

SMDATA

ALERT

+5VS

10K_0402_5%~D

R1811

1 2

12

EC_SMB_ DA2

7

6

5

22U_0805_6.3VAM~D

C249

1

2

JFAN2

CONN@JF AN2

CONN@

1

2

3

G5

4

G6

MOLEX_5 3398-0471~D

5 6

EC_SMB_ CK2

8

Link Done

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

D

Title

Size Document Nu mber Rev

Date: Sheet o f

Compal Electronics, Inc.

Thermal Sensor & FAN

LA-6601P

45 63Tuesday, November 30 , 2010

E

1.0

A

B

C

FD1

@

1

FIDUCIAL_C40M80

FD2

1

FIDUCIAL_C40M80

@

D

FD3

@

1

FIDUCIAL_C40M80

FD4

@

1

FIDUCIAL_C40M80

E

1 1

KB_DET#

C434 100P_0402_50V8J~D@ C434 100P_0402_50V8J~D@

KSO15

C302 100P_0402_50V8J~D@ C302 100P_0402_50V8J~D@

1

H3

@H3

@

H_2P8

H13

@H13

@

H_2P8

H23

@H23

@

H_3P3

C304 100P_0402_50V8J~D@ C304 100P_0402_50V8J~D@

C306 100P_0402_50V8J~D@ C306 100P_0402_50V8J~D@

C308 100P_0402_50V8J~D@ C308 100P_0402_50V8J~D@

C310 100P_0402_50V8J~D@ C310 100P_0402_50V8J~D@

C312 100P_0402_50V8J~D@ C312 100P_0402_50V8J~D@

C314 100P_0402_50V8J~D@ C314 100P_0402_50V8J~D@

C316 100P_0402_50V8J~D@ C316 100P_0402_50V8J~D@

C318 100P_0402_50V8J~D@ C318 100P_0402_50V8J~D@

C320 100P_0402_50V8J~D@ C320 100P_0402_50V8J~D@

C322 100P_0402_50V8J~D@ C322 100P_0402_50V8J~D@

C324 100P_0402_50V8J~D@ C324 100P_0402_50V8J~D@

1

H5

@H5

@

H_2P8

H14

@H14

@

H_2P8

H24

@H24

@

H_3P8

1 2

@H6

@

H_2P8

1

@H15

@

H_3P2

1

@H25

@

H_3P3

1

H7

@H7

@

H6

H_2P8

1

H16

@H16

@

H15

H_3P2

1

H25

@H26

@

H_2P8

1

H8

@H8

@

H_2P5N

H17

@H17

@

H_3P2

H27

@H27

@1H26

H_2P8

1

@H10

@

H_3P3

@H28

@

H_2P8

H9

@H9

@

H_4P0X2P5N

1

H19

@H19

@

H10

H_2P8

1

H28

1

@H18

@

H_3P3

H20

@H20

@

H_2P8

1

ZZZ1

PCB-MB

H18

1

KSO14

KSO13

KSO12

KSI0

KSO11

KSO10

KSI1

KSI2

KSO9

KSI3

KSO8

2 2

H2

@H2

@

H1

@H1

@

H_2P8

1

H12

@H12

@

H11

@H11

@

H_2P8

H_3P2

1

H22

@H22

@

H21

@H21

@

H_3P8

H_2P8

1

3 3

4 4

KSO7

KSO6

KSO5

KSO4

KSO3

KSI4

KSO2

KSO1

KSO0

KSI5

KSI6

KSI7

1 2

C303 100P_0402_50V8J~D@ C303 100P_0402_50V8J~D@

1 2

C305 100P_0402_50V8J~D@ C305 100P_0402_50V8J~D@

1 2

C307 100P_0402_50V8J~D@ C307 100P_0402_50V8J~D@

1 2

C309 100P_0402_50V8J~D@ C309 100P_0402_50V8J~D@

1 2

C311 100P_0402_50V8J~D@ C311 100P_0402_50V8J~D@

1 2

C313 100P_0402_50V8J~D@ C313 100P_0402_50V8J~D@

1 2

C315 100P_0402_50V8J~D@ C315 100P_0402_50V8J~D@

1 2

C317 100P_0402_50V8J~D@ C317 100P_0402_50V8J~D@

1 2

C319 100P_0402_50V8J~D@ C319 100P_0402_50V8J~D@

1 2

C321 100P_0402_50V8J~D@ C321 100P_0402_50V8J~D@

1 2

C323 100P_0402_50V8J~D@ C323 100P_0402_50V8J~D@

1 2

C325 100P_0402_50V8J~D@ C325 100P_0402_50V8J~D@

1 2

1

ON/OFFBTN#42

INT_KBD Conn.

KSI[0..7]

KSO[0..15]

KB_DET#16

KB_DET# KSO7 KSO0 KSI1 KSI7 KSO9 KSI6 KSI5 KSO3 KSI4 KSI2

KSO1 KSI3 KSI0 KSO13 KSO5 KSO2 KSO4 KSO8 KSO6 KSO11 KSO10 KSO12 KSO14 KSO15

59 57 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11

9 7 5 3 1

AMPHE_G28301021AHR

JKB1

59

60

57

58

55

56

53

54

51

52

49

50

47

48

45

46

43

44

41

42

39

40

37

38

35

36

33

34

31

32

29

30

27

28

25

26

23

24

21

22 20

19

181817 161615 141413 121211 10109

887 665 4

3

221

CONN@

Link Done

KSI[0..7] 42,44

KSO[0..15] 42,44

KB_DET#

60

KSO7

58

KSO0

56

KSI1

54

KSI7

52

KSO9

50

KSI6

48

KSI5

46

KSO3

44

KSI4

42

KSI2

40

KSO1

38

KSI3

36

KSI0

34

KSO13

32

KSO5

30

KSO2

28

KSO4

26

KSO8

24

KSO6

22

KSO11

20

KSO10 KSO12 KSO14 KSO15

4

Fiducial Mark

Power Button

D26

0.1U_0402_25V6K~D

1

2

ON/OFFBTN#

C326

EC_ON44,51

2

3

1

@

D27

PSOT24C_SOT23

EC_ON

100K_0402_5%~D

R263

1 2

DAN202UT106_SC70-3

2

1

3

2

G

IR SENSOR connector

+5VS

0.1U_0402_16V4Z~D

C446

1

2

USB20_N718 USB20_P718

USB20_N7 USB20_P7

AMPHE_G846A06211EU

+3VALW

R262

100K_0402_5%~D

1 2

1

D

Q23

Q23 SSM3K7002F_SC59-3~D

SSM3K7002F_SC59-3~D

S

3

JIR1

CONN@JIR1

CONN@

1

2

3

4

5

6

7

GND

8

GND

Link Done

ON/OFF 44

51ON# 49

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

A

B

DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

KB & Power Button & IR

LA-6601P

46 63Tuesday, November 30, 2010

E

1.0

A

DC to DC

B

C

D

E

+5VALW to +5VS

+5VALW

10U_0805_10V4Z~D

C336

C335

1

1 1

B+_BIAS

1

2

1 2

R270

102K_0402_1%

SUSP

2

5

G

Q24

SI4800BDY-T1-E3_SO8~D

8 7

5

+5VS_GATE

DMN66D0LDW-7_SOT363-6~D

3

D

Q25B

S

4

1

2

+5VS

1 2

10U_0805_10V4Z~D

1U_0603_10V4Z~D

36

0.1U_0603_25V7K~D

0_0402_5%~D

C340

@

R273

1 2

1U_0603_10V4Z~D

C337

C338

1

2

B+_BIAS

+3VALW to +3VS

+3VALW

10U_0805_10V4Z~D

C346

C345

1

1 2

R279

102K_0402_1%

SUSP

1

2

+3VS_GATE

SSM3K7002F_SC59-3~D

1

D

Q29

2

G

S

3

2 2

B+_BIAS

Q27

SI4800BDY-T1-E3_SO8~D

8 7

5

4

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D 0_0402_5%~D

0_0402_5%~D

1

12

C354

2

+3VS

1 2 36

@

R281

1U_0603_10V4Z~D

10U_0805_10V4Z~D

C347

1

C348

1

2

SUSP

Discharge Circuit

+1.5V

12

R289

470_0603_5%

3 3

SYSON#

PCH_PWR_EN#

4 4

2

Q34

R298

470_0603_5%

2

G

+3V_PCH

+1.5V_D

13

D

S

SSM3K7002FU_SC70-3~D

12

+3V_D

DMN66D0LDW-7_SOT363-6~D

6

D

Q5A

S

1

Q25A

SUSP

R267

470_0603_5%

2

G

470_0603_5%

+5VS

1 2

+5VS_D

6

D

S

1

DMN66D0LDW-7_SOT363-6~D

+3VS

12

R299

+3VS_D

3

D

5

G

S

4

DMN66D0LDW-7_SOT363-6~D

Q5B

R296

470_0603_5%

SUSP

2

+1.5VS

12

+1.5VS_D

DMN66D0LDW-7_SOT363-6~D

6

D

Q4A

G

Q4A

S

1

RUN_ON_CPU1.5VS3#5,9

SUSP

R297

470_0603_5%

5

G

+VCCP

+3VMXM

12

+VCCP_D

DMN66D0LDW-7_SOT363-6~D

3

D

Q4B

S

4

2

G

Q37

R268

470_0603_5%

1 2

+3VMXM_D

SUSP

220_0603_5%~D

12

R292

+1.5V_CPU_VDDQ_CHG

SSM3K7002FU_SC70-3~D

13

D

S

3

5

G

Q7B

+0.75VS+1.5V_CPU_VDDQ

2

G

+3VALW to +3V_PCH

+3VALW

SI4800BDY-T1-E3_SO8~D

8

1

2

1 2

102K_0402_1%

PCH_PWR_EN#

10U_0805_10V4Z~D

C349

1

2

R280

7

10U_0805_10V4Z~D

5

C350

+3V_PCH_GATE

SSM3K7002F_SC59-3~D

1

D

Q30

2

G

S

3

+1.5V To +1.5VS

+1.5V +1.5VS

AO4728L_SO8~D

100K_0402_5%~D

2

G

D

S

4

22_0603_5%~D

12

+DDR_CHG

13

D

S

B+_BIAS

12

R283

13

D

Q31

Q31 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

DMN66D0LDW-7_SOT363-6~D

SUSP

R293

SSM3K7002FU_SC70-3~D

Q38

10U_0805_10V4Z~D

10K_0402_5%~D

1

C448

2

R284

1 2

470_0603_5%

Q8B

R274

5

G

AO4728L_SO8~D

8 7 6 5

+5VMXM

1 2

+5VMXM_D

3

Q40

4

0.1U_0603_25V7K~D

1

2

+3V_PCH

1 2

10U_0805_10V4Z~D

36

0_0402_5%~D

C355

12

1U_0603_10V4Z~D

C351

1

C352

2

@

R282

+3VALW to +3VMXM Transfer

R269

200K_0402_5%

DGPU_PWR_EN#

Q7A

1 2

B+_BIAS

DMN66D0LDW-7_SOT363-6~D

+3VALW +3VMXM

10U_0805_10V4Z~D

C333

1

2

+3VMXM_GATE

6

D

2

G

S

1

U18

SI4800BDY-T1-E3_SO8~D

8 7

5

4

0.1U_0603_25V7K~D

12

C341

1

2

1

2

40mil(1A)

10U_0805_10V4Z~D

C447

0.1U_0402_16V4Z~D

1

C339

2

1 2 36

0_0402_5%~D

@

R272

+5VALW to +5VMXM

+5VALW

U40

SI4800BDY-T1-E3_SO8~D

U20

1 2 3

4

0.1U_0603_25V7K~D

C358

1

2

DMN66D0LDW-7_SOT363-6~D

D

S

4

10U_0805_10V4Z~D

.1U_0402_16V7K~D

C357

1

C356

2

R300

PCH_PWR_EN#21

SYSON#

12

0.1U_0603_25V7K~D

1

2

B+_BIAS

DGPU_PWR_EN#

DMN66D0LDW-7_SOT363-6~D

100K_0402_5%~D

12

1

@

R302

2

+5VALW

12

100K_0402_5%~D

1

D

2

G

S

@

C361

3

100K_0402_5%~D

12

R285

+3VALW

R286

10K_0402_5%~D

1 2

PCH_PWR_EN44

SYSON39,44,54

100K_0402_5%~D

Q8A

2

G

0.1U_0603_25V7K~D

C359

R295

SSM3K7002F_SC59-3~D

Q35

R275

200K_0402_5%

1 2

2

G

+5VALW

12

100K_0402_5%~D

1

D

S

3

@

10U_0805_10V4Z~D

R287

SSM3K7002F_SC59-3~D

Q32

DGPU_PWR_EN18

1

C342

2

6

D

S

1

SI4800BDY-T1-E3_SO8~D

8 7

5

+5VMXM_GATE

1

2

100K_0402_5%~D

4

0.1U_0603_25V7K~D

12

C353

SUSP#9,20,44,52,53,54

DGPU_PWR_EN#

12

R301

+5VMXM

100mil(2.5A)

1 2 36

0_0402_5%~D

@

R278

100K_0402_5%~D

12

R291

1

2

+5VALW

2

G

0.1U_0603_25V7K~D

1

@

C362

2

10U_0805_10V4Z~D

1

C343

2

+5VALW

SUSP

2

G

0.1U_0603_25V7K~D

@

C360

R294

100K_0402_5%~D

1 2

SSM3K7002F_SC59-3~D

1

D

Q36

S

3

0.1U_0402_16V4Z~D

1

C344

2

12

R288

100K_0402_5%~D

SSM3K7002F_SC59-3~D

1

D

Q33

S

3

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWINGS AND SPECIFICATIONS CONTAINS CONFIDENTIAL, TRADE SECRET, AND OTHER PROPRIETARY INFORMATION OF DELL. ("DELL"). THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT

A

B

DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DC/DC Interface

LA-6601P

47 63Tuesday, November 30, 2010

E

1.0

5

4

3

2

1

PD1

@PD1

PL1

C8B BPH 8 53025_2P

BATT+

12

C8B BPH 8 53025_2P

1 2

PL2

C8B BPH 8 53025_2P

1 2

PC3

0.01U_0402_25V7K~D

SUYIN_200275 GR013G10PZR

12

BATT++

PC1

1000P_0402_50V7K~D

JMBTY

@J MBTY

@

GND GND

BATT++

12

PC4

100P_0402_50V8J~D

15 14 13

13

12

11

10

CLK_SMB

9

DAT_SMB

8

BATT_PR S

7

SYS_PRS

6

5

4

3

2

1

PR10

100_040 2_5%~D

1 2

12

PR6

PR6 0_0402_ 5%~D

0_0402_ 5%~D

2

PR12

100_040 2_5%~D

1 2

BATT+

D D

12

PC2

100P_0402_50V8J~D

JIMBTY battery connector

SMART

SMARTSMART Battery:

Battery:

Battery:Battery:

13.BAT+

13.BAT+13.BAT+

12.BAT+

12.BAT+12.BAT+

11.BAT+

11.BAT+11.BAT+

10.BAT+

10.BAT+10.BAT+

09.CLK_SMB

09.CLK_SMB09.CLK_SMB

08.DAT_SMB

08.DAT_SMB08.DAT_SMB

07.BATT_PRS

07.BATT_PRS07.BATT_PRS

C C

06.SYS_PRES

06.SYS_PRES06.SYS_PRES

05.BAT_ALERT

05.BAT_ALERT05.BAT_ALERT

04.GND

04.GND04.GND

03.GND

03.GND03.GND

02.GND

02.GND02.GND

01.GND

01.GND01.GND

@

PESD24V S2UT_SOT23-3

3

EC_SMB_CK1 14,44

EC_SMB_DA1 14,44

PR11

100_040 2_5%~D

1 2

1

PD2 PESD24V S2UT_SOT23-3

PESD24V S2UT_SOT23-3

2

3

10K_040 2_1%~D

1 2

PR7

@PD2

@

BATT_TEMP 44

+3VALW

PC201

VL

PR235

PC200

1000P_0402_50V7K

PR235

47K_040 2_1%

1 2

5

+

6

-

PR237

12

100K_04 02_1%

PR233

PR233 100K_04 02_1%

100K_04 02_1%

VL

8

P

G

4

12

PH6

100K_0402_1%_TSM0B104F4251RZ

PR238

13.7K_04 02_1%

1 2

TM_REF1

12

PR234

0.22U_0603_25V7K

12

16.9K_0402_1%

7

O

PU1B

LM393DG _SO8

12

VL

PR236

PR236 47K_040 2_1%

47K_040 2_1%

1 2

MAINPWON 45

61

PQ67A

2

DMN66D0LDW-7 2N SOT363-6

PQ1

TP0610K -T1-E3_SOT23-3

JRTC1

13

2

B+_BIAS

12

PC9

@ PC9

@

0.1U_060 3_25V7K~D

2

G

PC10

@

0.1U_0402_16V7K~D

B+

PR14

22K_040 2_1%~D

1 2

13

D

PQ2

S

SSM3K70 02FU_SC70-3

12

PR13

PC8

@

100K_0402_1%~D

0.22U_0603_25V7K~D

B B

+5VALW

PR15

100K_04 02_1%~D

PR16

1 2

0_0402_ 5%~D

SPOK

1 2

12

JRTC1

2

-

SUYIN_060003 FA002G202NL

CONN@

+RTCBAT T

1

+

PD18

@P D18

@

1 2

RB751V-4 0_SOD323-2

+RTCBATT

+3VLP

A A

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Size Document Nu mber Rev

Date: Sheet o f

Compal Electronics, Inc.

BATTERY CONN/OTP

LA-6601P

48 63Tuesday, November 30 , 2010

0.3

A

B

C

D

+3VALW+5VALW

PL4

PL4 FBM-L11-160808-601LM T 0603~D

FBM-L11-160808-601LM T 0603~D

JDCIN

@J DCIN

@

6

ID

GND

1 1

7

V+

GND

V+

8

GND

V-

9

GND

V-

FOX_JPD23L-D4672- 7H

VIN

PreCHG

2 2

ACOFF44,50

+5VALW

3 3

Dyn_Turbo_Sel44

H_PROCHOT#5,44

1

2

3

4

5

PR23

@PR2 3

@

1K_1206_5%~D

1 2

PR25

@PR2 5

@

1K_1206_5%~D

1 2

PR26

@PR2 6

@

1K_1206_5%~D

1 2

PR27

@PR2 7

@

1K_1206_5%~D

1 2

@

DC_IN_S1

@PD1 9

@

2

3

BAS40CW _SOT323

PR36

0_0402_5%~D

PR39

0_0402_5%~D

B+_MXM

1

+

4 4

+

PC203

2

PD19

100U_25V_M~D

12

DOCK_PSID

12

PC11

1000P_0402_50V7K~D

PD7

@PD7

@

BAS32L_SOD80C

12

@

1

2

10K_0402_1%~D

3

PQ67B

4

DMN66D0LDW-7 2N SOT363-6

1

2

ADPIN

12

PR28

@

100K_0402_5%~D

13

@

+3VALW

12

PR38

5

PR239

0.004_2512_1%

C8B BPH 853025_2P

12

PC12

100P_0402_50V8J~D

TP0610K-T1-E3_SOT23- 3

12

PR29

100K_0402_5%~D

PQ6

2

DDTC115EUA-7-F_SOT323

1

PU1A

LM393DG_SO8

4

3

PL3

1 2

PQ5

@PQ 5

@

2

12

PR30

@

13

PR35

@PR3 5

@

0_0402_5%~D

VL

8

P

+

O

-

G

4

SMB3025500YA_2P

1 2

12

PC13

13

100K_0402_5%~D

PQ7

@PQ 7

@

DDTC115EUA-7-F_SO T323

12

3

2

PL6

VIN

PR17

@PR1 7

@

1 2

0_0402_5%~D

12

PC14

1000P_0402_50V7K~D

100P_0402_50V8J~D

1000P_0402_50V7K~D

B+

ACIN

Precharge detector

DOCK_PSID

PD5

@PD5

@

SM24_SOT23

2

3

PR20

1

PR20

PR22

100K_0402_1%~D

1 2

15K_0402_1%~D

FDV301N_NL_SOT23-3~D

BAS32L_SOD80C

BATT+

PD9

D

1 3

PQ3

2

B

G

2

C

E

3 1

12

Min. typ. Max. H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V

BATT ONLY

Precharge detector

Min. typ. Max. H-->L 4.92V 6.1V 5.25V

100K_0402_5%~D

22K_0402_5%~D

51ON#46

PR33

PR34

1 2

12

L-->H 6.062V 6.244V 6.43V

PR271

0_0603_5%~D

+3VLP

12

PC19

@

PR37

PR37 0_0402_5%~D

0_0402_5%~D

1000P_0402_50V7K~D

1 2

PR40

12

0_0402_5%~D

PC18

@

1000P_0402_50V7K~D

ADP_I 44,50

12

AC_SEL 44

MAINPWON45

ACON

1 2

PD10

@PD1 0

@ 2

3

RB715F_SOT323-3

+CHGRTC

12

PC17

@

4.7U_0603_6.3V6K

VL

12

PR135

@

100K_0402_1%~D

1

12

LM393DR_SO8

@PU1 3A

@

PC84

@

0.1U_0603_25V7K~D

+CHGRTC

33_0402_5%~D

S

1 2

PQ4

MMST3904-7-F_SOT323~D

Pre_V

PC15

1 2

PU2

@

MAX1615EUK+_SOT23-5~ D

3

OUT

4

5/3+

PR42 2.2M_0402_5%~ D@PR42 2.2M_ 0402_5%~D@

VS

8

P

+

1

O

-

G

PU13A

4

PR119

@PR1 19

@

34K_0402_1%~D

PR19

0.22U_0603_25V7K~D

#SHDN

GND

2

3

2

B+

1

+

PC209

2

100U_25V_M~D

3

PD4

DA204U_SOT323~D

PQ8

TP0610K-T1-E3_SOT23- 3

1

IN

5

12

PC206

@

1000P_0402_50V7K~D

2

1

+5VALW

PR21

2

12

@

12

PR24

@PR2 4

@

10K_0402_1%~D

1 2

10K_0402_1%~D

PR31

68_1206_5%~D

13

PR41

PR41 200_0805_5%@

200_0805_5%@

1 2

12

@

PRG++

13

D

S

PQ10

RHU002N06_SOT323-3

PR18

@

VIN

1 2

12

PR156

191K_0402_1%~D

2

G

@

1 2

2.2K_0402_5%~D

+5VALW

2

3

PD6

DA204U_SOT323~D

1

PD8

BAS32L_SOD80C

12

PR32

PR32 68_1206_5%~D

68_1206_5%~D

PC16

0.1U_0603_25V7K~D

12

PC83

@

499K_0402_1%~D

47K_0402_5%~D

13

PQ9

DTC115EUA_SC70-3

PSID_DISABLE#

VS

1U_0603_25V6K

B+

12

PR155

@PR1 55

@

12

PR121

@PR1 21

@

PR122

@PR1 22

@

2

PACIN

12

PS_ID 44

12

PC85

@

0.01U_0402_25V7K~D

+5VALW

PACIN 34,50

VIN+14VIN-14

Add MXM power net for HW request.

A

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

B

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DCIN & DETECTOR

LA-6601P

D

49 63Tuesday, November 30, 2010

0.3

A

PD11

@PD1 1

@

B540C-13-F_SMC2~D

PQ13

AOD403_TO252-3

D

S

VIN

12

1 1

PR114

3.3_1210_5%~D

12

PR113

PR44

3.3_1210_5%~D

PDTA144EU PNP_SOT 323

200K_0402_1%~D

1 2

PC36

2.2U_0805_25V6K

V1

61

PQ66A

2

2 2

PACIN34,49

ACON

ACOFF4 9

3 3

1 3

G

2

AOD403_TO252-3

D

1 3

G

2

DMN66D0LDW-7 2N SOT363-6

PR63

47K_0402_5%~D

PACIN

1 2

ACOFF

2

S

PQ16

2

13

PQ32

12

PC22

1 3

PR55

150K_0402_1%~D

PQ17

PQ17 DDTC115EUA-7-F_SO T323

DDTC115EUA-7-F_SO T323

3S/4S# signal

3

High Low

PQ66B

5

4

DMN66D0LDW-7 2N SOT363-6

13

PQ25

DDTC115EUA-7-F_SOT323

0.1U_0603_25V7K~D

CP_SEL

1 150W

0

240W

CP mode

Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05)

P2

12

PR46

12

3S/4S#

IREF

6251VREF

200K_0402_1%~D

6251VDD

PQ11

PQ11 AOD403_TO252-3

AOD403_TO252-3

S

G

2

PQ14

PQ14 AOD403_TO252-3

AOD403_TO252-3

S

G

2

FSTCHG

1 2

PR53

47K_0402_5%~D

4S3S

PR64

40.2K_0402_1%~D

PR67

100K_0402_1%~D

11.5K_0402_1%~D

CP_SEL44

D

13

D

13

PC25

5600P_0402_25V7K~D

13

2

PQ19

PC35

1 2

0.01U_0402_25V7K~D

ADP_I44,49

12

PC42

1 2

PR69

PR132

2

G

PQ63

SSM3K7002FU_SC70-3

Iada=0~12.3A(240W)

P3

1 2

1SS355_SOD323

1 2

10K_0402_5%~D

0.1U_0402_16V7K~D

DDTC115EUA-7-F_SOT323

PR59 10K_0402_1%~DPR59 10K _0402_1%~D

1 2

PC38

1 2

0.1U_0402_16V7K~D

12

0.01U_0402_25V7K~D

12

0_0402_5%~D

13

D

S

Vaclim=2.87*((11.5K//152K)/((2.87K//152K)+(11.5K//152K)))

B

ADP_I = 19.9*Iadapter*Rsense

PR43

0.005_2512_1%

1

2

ACSETIN

PD14

PR52

1 2

PC28

PC33 6800P_0402_25V7K~DPC33 6800P _0402_25V7K~D

12

1.3K_0402_1%~D

57.6K_0402_1%~D

CHGVADJ

6251VDD

12

PR54

1 2

PR61

100_0402_1%~D

1 2

6251VREF

6251aclim

PR70

PR71

1 2

PR72

100K_0402_1%~D

4

3

100K_0402_1%~D

PC26

2.2U_0603_6.3V6K~D

6251_EN

12

10

11

12

PU3

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

ACLIM

VADJ

GND

ISL6251AHAZ-T_QSOP24

PD12

RB751V-40_SOD323-2

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

PR73

47K_0402_1%~D

ACPRN

B+

FBMA-L18-453215-900LM A90T_1812

CSIN

VIN

PR48

10_1206_5%~D

24

PC29 0.1U_0603_25V7K~ DPC 29 0.1U_0603_25 V7K~D

23

22

21

20

19

18

17

BST_CHG BST_C HGA

16

6251VDDP

15

DL_CHG

14

13

12

2

CSIP

PreCHG

1 2

PR230

12

0_0402_5%~D

1 2 12

DCIN

LX_CHG

DH_CHG

12

PC27

1000P_0402_25V8J~D

12

ACPRN

PR56 20_0603_5%PR56 20_0603_5%

PC30

0.047U_0603_16V7K~D

1 2

PR57

20_0603_5%

PR58 20_0603_5%PR58 20_ 0603_5%

PC34 0.1U _0603_25V7K~DPC 34 0.1U_0603_25V7K~D

1 2

PR66

2.2_0603_5%~D

1 2

PC44

1 2

4.7U_0805_6.3V6K~D

6251VDD

12

10K_0402_1%~D

PR74

13

PQ26

PQ26 DDTC115EUA-7-F_SO T323

DDTC115EUA-7-F_SO T323

PJP10

@PJ P10

@

2

112

JUMP_43X118

JUMP_43X118 PL7

@PL7

@

1 2

PR232

@PR2 32

@

0_0402_5%~D

PR45

PR45 191K_0402_1%~D

191K_0402_1%~D

ACSETIN

PR49

15.4K_0402_1%~D

1 2

12

PR60

2.2_0603_5%~D

0.1U_0603_25V7K~D

12

PD16

PD16 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

PR68

4.7_0603_5%~D

12

C

12

PC23

10U_0805_25V5K~D

CSON

CSOP

PC37

12

6251VDD

PR75

10K_0402_1%~D

1 2

PACIN

PR76

14.3K_0402_1%~D

47K_0402_1%~D

PD13

@PD1 3

@

PD15

PQ60

@

SSM3K7002FU_SC70-3

4

3

D

PR47

1 2

ACOFF

200K_0402_1%~D

12

PC32

0.1U_0603_25V7K~D

PC39

10U_0805_25V5K~D

VIN

PR51

@PR5 1

@

1 2

@

SSM3K7002FU_SC70-3

13

D

G

S

12

PC40

10U_0805_25V5K~D

2

PQ22

PACIN

PC41

VIN

BATT+

12

10U_0805_25V5K~D

12

PC82

PC46

10U_0805_25V5K~D

PD17

@

B540C-13-F_SMC2~D

1 2

CHG_B+

PQ15

PQ15 AOD403_TO252-3

AOD403_TO252-3

S

12

PC24

10U_0805_25V5K~D

PC20

0.1U_0603_25V7K~D

ACIN 14, 17,41,44

PC21

4

2200P_0402_25V7K~D

10K_0402_1%~D

PQ18

786

5

PQ21

123

10UH_PCMB104T-100MS _6A_20%

786

5

PQ24

123

PR50

DDTC115EUA-7-F_SOT323

V1

100K_0402_1%~D

AO4466L_SO8~D

ACPRN

AO4712L_SO8~D

1 2 13

PR231

1 2

12

PR65

4.7_1206_5%~D

12

PC43

680P_0402_50V7K~D

2

12

PL8

S

D

G

2

PC31

PQ12

D

AOD403_TO252-3

13

G

2

13

1 2

1SS355_SOD323

1 2

12

13

D

2

2200P_0402_25V7K~D

G

S

PR62 0.02_2512_1%PR62 0.02_2512_1%

CHG

1

2

1SS355_SOD323

@PD1 5

@

CC=0.22~5.04A

4 4

IREF=1*Icharge

CHGVADJ CV mode

0V

4V per cell

IREF=0.22V~3.294V

Compal Electronics, Inc.

1.882V

-

3.3V

A

4.2V per cell

4.35V per cell

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

B

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CHARGER

LA-6601P

D

50 63Tuesday, November 30, 2010

0.3

5

4

3

2

1

2VREF_RT8209E

Note: Use TPS51125 IC can remove RTC refernece LDO Use TPS51427 IC must keep RTC refernece LDO

D D

PR77

13K_040 2_1%~D

BST_3V

UG_3V

LX_3V

LG_3V

12

100K_0402_1%~D

112

1 2

PR79

20K_040 2_1%~D

1 2

PR81

47K_040 2_1%~D

1 2

PU4

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

12

PC64

RT8205E_B+

1U_0603_25V6K~D

2VREF_RT8209E

3

+3VALWP

RT8205E_B+

B+

PC81

0.1U_0603_25V7K~D

C C

+3VALWP

B B

ACPRN

A A

1 2

PL25

FBMA-L11 -453215-121LMA 90T_2

12

MAINPWON45

VS

PR112

200K_04 02_1%~D

1 2

EC_ON46

2

PC47

PL10

2.2UH_FD VE1040-2R2M=P 3_14.2A_20%~D

1

+

PC58

2

330U_D_6.3VM_R18M~D

PR93

1 2

100K_04 02_1%~D

13

5

PL10

1 2

VL

1 2

PR264

PR264 0_0402_ 5%~D

0_0402_ 5%~D

13

D

2

G

S

PQ62

PQ62 DDTC115 EUA-7-F_SOT323

DDTC115 EUA-7-F_SOT323

12

PC49

PC48

0.1U_0603_25V7K~D

4.7U_0805_25V6-K~D

PQ61

SSM3K7002FU_SC70-3

12

PC50

4.7U_0805_25V6-K~D

12

PR85

12

4.7_1206_5%~D

PQ31B

DMN66D0LDW-7 2N SOT363-6

100K_04 02_1%~D

12

PR94

40.2K_0402_1%~D

2200P_0402_50V7K~D

3

4

PR92

12

5

PQ27

4

123

SIR472DP-T1-GE3_POWERPAK8-5~D

PQ29

4

PC60

PC67

123 5

680P_0402_50V7K~D

FDMS0310S_POWER56-8~D

ENTRIP2ENTRIP1

61

PQ31A

5

12

2

2.2U_0603_16V5K~D

PQ31A

2

13

PQ33

PQ33 DDTC115 EUA-7-F_SOT323

DDTC115 EUA-7-F_SOT323

4

Typ: 175mA

+3VLP

12

PC54

4.7U_0805_10V6K~D

PC56

0.1U_060 3_25V7K~D

1 2

12

PR83

0_0603_ 5%~D

1 2

PR272

@P R272

@

0_0402_ 5%~D

PR88

DMN66D0LDW-7 2N SOT363-6

MAINPWON45

Pre_V

B+

VS

PR87

499K_04 02_1%~D@

1 2

PR90

499K_04 02_1%~D

1 2

PR91

499K_04 02_1%~D@

1 2

3.3VALWP TDC 7.2A Peak Current 10A OCP current 12A

PJP5

2

JUMP_43 X118@

PJP6

+3VALW P +3 VALW

2

JUMP_43 X118@

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PC45

1U_0603_10V6K~D

ENTRIP2

5

6

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

1 2

PR89

0_0402_ 5%@

12

PR78

30K_040 2_1%~D

1 2

PR80

20K_040 2_1%~D

1 2

PR82

60.4K_04 02_1%~D

ENTRIP1

1 2

2

3

4

15

1

FB1

REF

TONSEL

ENTRIP1

24

VO1

23

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

12

PC65

12

22U_0805_6.3VAM~D

PC66

BST_5V

22

21

20

19

RT8205E GQW_W QFN24_4X4

UG_5V

LX_5V

LG_5V

1 2

PR84

0_0603_ 5%~D

VL

Typ: 175mA

5VALWP TDC 8.9A

SPOK

PC57

0.1U_060 3_25V7K~D

12

PQ28

4

PQ30

4

+5VALWP

12

PC51

4.7U_0805_25V6-K~D

5

123

123 5

4.7U_0805_25V6-K~D

SIR472DP-T1-GE3_POWERPAK8-5~D

2.2UH_FD VE1040-2R2M=P 3_14.2A_20%~D

12

PR86

12

4.7_1206_5%~D

FDMS0310S_POWER56-8~D

12

PC52

PC55

4.7U_0805_25V6-K~D

PL11

1 2

PC61

680P_0402_50V7K~D

RT8205E_B+

12

PC53

2200P_0402_50V7K~D

1

+

2

12

PC80

0.1U_0603_25V7K~D

+5VALWP

PC63

330U_D_6.3VM_R18M~D

12

4.7U_0805_25V6-K~D

Peak Current 12.8A

0.1U_0603_25V7K~D

OCP current 15.3A

2

PJP3

2

112

JUMP_43 X118@

JUMP_43 X118@ PJP4

PJP4

+5VALW P +5VALW

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

Date: Sheet o f

Compal Electronics, Inc.

2

112

JUMP_43 X118@

+5VALWP/+3VALWP

LA-6601P

51 63Tuesday, November 30 , 2010

1

0.3

A

1 1

PR96

0_0402_5%~D

SUSP#9,20,47,54

2 2

+5VALW

+5VS

PR108

@PR108

@

10K_0402_5%~D

PR117

@PR1 17

@

0_0402_5%~D

1 2

3 3

VCCP_PWRCTRL

10K_0402_5%~D

1 2

PR110

10K_0402_5%~D

@

12

PR111

@

1 2

300K_0402_5%~D

10_0603_5%

1 2

1U_0603_10V6K~D

2

G

12

G

1

PC79

@

2

100K_0402_5%~D

0.01U_0402_16V7K~D

PR267

@PR2 67

@

PR100

13

D

S

12

PC75

PR103

@PR1 03

@

35.7K_0402_1%~D

1 2

PQ36

@

SSM3K7002FU_SC70-3

12

PC71

@PC71

@

0.1U_0402_16V7K~D

PC77

@PC7 7

@

47P_0402_50V8J~D

1 2

PR104

4.02K_0402_1%~D

1 2

12

PR105

10K_0402_1%~D

PR95

267K_0402_1%~D

1 2

2

3

4

5

6

VTTPWR GOOD

B

PU5

TON

VOUT

VDD

FB

PGOOD

1 2

1

EN/DEM

VFB=0.75V

GND7PGND

VCCP_AGND

PR102

0_0402_5%

1 2

PR109

1 2

10K_0402_1%~D

PR229

@PR2 29

@

10K_0402_1%~D

14NC15

BOOT

UGATE

PHASE

LGATE

RT8209BGQW _WQFN14_3P5X3P5

8

VDDP

CS

+3VS

13

12

11

10

9

BST_VCCP

DH_VCCP

LX_VCCP

DL_VCCP

PR97

0_0603_5%~D

1 2

12

BST_VCCP-1

PR101

4.99K_0402_1%~D

PC72

0.1U_0603_25V7K~D

+5VALW

12

PC76

4.7U_0805_10V6K~D

0_0402_5%~D

1 2

12

PR106

C

VCCP_AGND

VCCP_RT8290B_B+

12

PC62

0.1U_0603_25V7K~D

2.2UH_FDVE1040-2R2M =P3_14.2A_20%~D

12

PR98

12

PC78

680P_0402_50V7K~D

VCCIO_SENSE 8VSSIO_SENSE8

12

PQ34

4

PQ35

4

5

123

SIR472DP-T1-GE3_POWERPAK8-5~D

AON6784L-1N_DFN8~D

123 5

PR107

0_0402_5%~D

VCCP TDC 8.8A Peak Current 12.5A OCP current 15A

12

PC59

2200P_0402_50V7K~D

PL12

1 2

4.7_1206_5%~D

D

PJP22

@ PJP2 2

@

2

112

JUMP_43X118

1 2

PL26

FBMA-L11-453215-121LM A90T_2

12

PC68

4.7U_0805_25V6-K~D

12

PC69

PC198

@

4.7U_0805_25V6-K~D

B+

+VCCPP

12

PR99

PR99 10_0402_5%~D

10_0402_5%~D

1

+

PC73

2

330U 2.5V Y D2 LESR9M~D

PJP7

2

112

JUMP_43X118@

+VCCPP +VCCP

4 4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

JUMP_43X118@ PJP8

PJP8

2

112

JUMP_43X118@

PJP9

2

112

JUMP_43X118@

Title

Size Document Number Rev

Date: Sheet of

+1.05VS

Compal Electronics, Inc.

+VCCPP

LA-6601P

D

52 63Tuesday, November 30, 2010

0.3

A

1 1

2 2

PR123

PR123 0_0402_5%~D

0_0402_5%~D

SUSP#9,20,47,54

+5VALW

3 3

1 2

PR268

@PR2 68

@

300K_0402_5%~D

PR116

10_0603_5%

1 2

PC90

1U_0603_10V6K~D

12

VDD_1.8VSP

FB_1.8VSP

PC88

@PC8 8

@

47P_0402_50V8J~D

1 2

PR154

14.3K_0402_1%~D

1 2

12

PR151

10K_0402_1%~D

12

PC91

@PC91

@

0.1U_0402_16V7K~D

TON_1.8VSP

B

PR153

267K_0402_1%~D

1 2

PR158

1

PU7

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

14NC15

BOOT

UGATE

EN/DEM

PHASE

VFB=0.75V

LGATE

GND7PGND

RT8209BGQW _WQFN14_3P5X3P5

8

VDDP

BST_1.8VSP

DH_1.8VSP

13

LX_1.8VSP

12

11

CS

10

DL_1.8VSP

9

PR158

0_0603_5%~D

1 2

12

PR125

2.87K_0402_1%~D

BST_1.8VSP-1

+5VALW

12

PC89

4.7U_0805_10V6K~D

PC92

0.1U_0603_25V7K~D

C

1.8VSP_RT8290B_B+

12

PC74

0.1U_0603_25V7K~D

786

5

PQ58

4

AO4466L_SO8~D

12

123

786

5

PQ59

4

AO4712L_SO8~D

123

0.1U_0603_25V7K~D

3.3UH_PCMB064T-3R 3MS_7A_20%

12

PR115

12

PC86

680P_0402_50V7K~D

PC87

2200P_0402_50V7K~D

PL14

1 2

4.7_1206_5%~D

PC70

4.7U_0805_25V6-K~D

D

PJP25

2

112

JUMP_43X118@

B+

+1.8VSP

1

+

PC93

2

220U_6.3VM_R15

1.8VSP TDC 1A Peak Current 1.45A OCP current 1.7A

PJP13

+1.8VSP +1.8VS

4 4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

2

112

JUMP_43X118@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

+1.8VSP

LA-6601P

D

53 63Tuesday, November 30, 2010

0.3

A

PR127

0_0402_5%~D

+5VALW

PQ64A

12

PR250

10K_0402_5%~D

1 2

1U_0603_10V6K~D

2

12

PC618

0.01UF_0402_25V7K

PR269

@PR2 69

@

300K_0402_5%~D

PR130

10_0603_5%

1 2

PC105

PR248

150K_0402_1%~D

1 2

61

DMN66D0LDW-7 2N SOT363-6

12

PC101

@PC101

@

0.1U_0402_16V7K~D

12

47P_0402_50V8J~D

10K_0402_1%~D

1 2

12

PR134

10K_0402_1%~D

12

PR249

75K_0402_1%~D

1 1

+3VALW

PR240

PR240 10K_0402_5%~D

10K_0402_5%~D

2 2

1.5VDDR_VID0

12

PR244

PR244 10K_0402_5%~D

10K_0402_5%~D

1 2

12

PR246

@

10K_0402_5%~D

PQ64B

12

5

PC616

+3VALW

12

3

4

0.01UF_0402_25V7K

SYSON39,47

PR242

PR242 10K_0402_5%~D

10K_0402_5%~D

@

DMN66D0LDW-7 2N SOT363-6

PC107

@PC1 07

@

1 2

PR133

B

PR126

267K_0402_1%~D

1 2

PR128

0_0603_5%~D

1 2

12

PR131

5.9K_0402_1%~D

BST_1.5VP_2

+5VALW

12

2

3

4

5

6

PU8

TON

VOUT

VDD

FB

PGOOD

1

14NC15

BOOT

UGATE

EN/DEM

PHASE

VFB=0.75V

LGATE

GND7PGND

RT8209BGQW _WQFN14_3P5X3P5

8

VDDP

BST_1.5VP

DH_1.5VP

13

LX_1.5VP

12

CS_1.5VP

11

CS

10

DL_1.5VP

9

C

PC102

0.1U_0603_25V7K~D

12

PC106

4.7U_0805_10V6K~D

PQ37

4

PQ38

4

1.5VP_RT8290B_B+

5

PC94

123

SIR472DP-T1-GE3_POWERPAK8-5~D

123 5

AON6784L-1N_DFN8~D

12

PC95

2200P_0402_50V7K~D

0.1U_0603_25V7K~D

2.2UH_FDVE1040-2R2M =P3_14.2A_20%~D

12

PR129

4.7_1206_5%~D

12

PC108 680P_0402_50V7K~D

680P_0402_50V7K~D

PC98

4.7U_0805_25V6-K~D

1 2

@PR129

@

@PC108

@

PC99

PL16

D

PL27

FBMA-L11-453215-121LM A90T_2

1 2

PJP23

@PJ P23

12

PC100

@

4.7U_0805_25V6-K~D

@

12

2

112

PC168

JUMP_43X118

4.7U_0805_25V6-K~D

PC168

B+

12

0.1U_0603_25V7K~D

+1.5VP

1

+

2

PC103

220U_6.3VM_R15

1.5VP TDC 10.3A Peak Current 14.7A OCP current 17.8A

DDR GPIO Output Voltage Selection

+3VALW

12

PR243

PQ65B

PC617

5

0.01UF_0402_25V7K

PR243 10K_0402_5%~D

10K_0402_5%~D

3

4

DMN66D0LDW-7 2N SOT363-6

12

PR251

@

+3VALW

PR241

PR241 10K_0402_5%~D

10K_0402_5%~D

1.5VDDR_VID1

3 3

4 4

12

PR245

PR245 10K_0402_5%~D

10K_0402_5%~D

1 2

PR247

@PR2 47

@

10K_0402_5%~D

12

10K_0402_5%~D

PQ65A

12

61

2

DMN66D0LDW-7 2N SOT363-6

PC619

0.01UF_0402_25V7K

PJP15

@PJ P15

@

+1.5VP

+0.75VSP

112

JUMP_43X118

12

PC112

4.7U_0805_6.3V6K~D

2

+3VALW

12

PR252

1.2K_0402_1%~D

12

PR253

PR253 1K_0402_1%~D

1K_0402_1%~D

12

PC110

PC109

@

4.7U_0805_6.3V6K~D

12

PC113

@

4.7U_0805_6.3V6K~D

RT9026_MSOP10

1

VDDQSNS

2

VLDOIN

3

VTT

5

VTTSNS

4

PU9

PGND

GND

VTTREF

GND

11

10

VIN

8 6

S5

S3

7

10K_0402_1%~D

1 2

12

PC115

.1U_0402_16V7K~D

PR136

9

12

+3VALW

12

PC111

1U_0603_10V6K~D

PC114

0.1U_0402_16V7K~D

SUSP# 9,20,44,47,52,53

0.75VSP TDC 1.4A Peak Current 2A

bit2 = 1.5DDR_VID0 DDR Voutbit1 = 1.5DDR_VID1

0

1

0

1

0

1 1

+1.5VP

1.65V

1.6V

1.55V

1.5V (Default)

PJP14

@ PJP1 4

@

JUMP_43X118

112

PJP16

@ PJP1 6

@

JUMP_43X118

112

@

PJP20

PJP20 JUMP_43X118

JUMP_43X118

112

PJP17

2

112

JUMP_43X118@

2

+1.5V

+0.75VS+0.75VSP

OCP current 3A

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

+1.5VSP/0.75VSP

LA-6601P

D

54 63Tuesday, November 30, 2010

0.3

5

D D

+VCCP

PR256

@PR256

@

10K_0402_1%~D

1 2

PR259

PR257

PR262

@PR262

@

1 2

+VCCP

1 2

PR259

1 2

0_0402_5%~D

PR258

1 2

0_0402_5%~D

PR263

@ PR263

@

10K_0402_1%~D

VID1_SA

VID0_SA

PR146

2.67K_0402_1%~D

1 2

4.7K_0402_1%~D

PC122

0.068U_0402_16V7K

PR266

@PR266

@

H_FC_C229

VID[0]

C C

VCCSA_SEL9

VID[1]

B B

1 2

0_0402_5%~D

10K_0402_1%~D

PR254

1 2

0_0402_5%~D

4

+5VALW

PC121

1U_0603_10V6K~D

1

PU10

2

PGND

3

GND

4

RTN

VID1_SA

5

PR261

1 2

PR120

1 2

16.5K_0402_1%~D

1 2

PR145

1 2

12

0_0402_5%~D

PR143

PR143 715K_0402_1%~D

715K_0402_1%~D

VID0_SA

PR150

1 2

130K_0402_1%~D

PR147

1 2

4.7K_0402_1%~D

VID1

6

VID0

7

SREF

8

SET0

9

SET1

12

LGATE

FB10OCSET

PR139

2.67K_0402_1%~D

20

PVCC

UGATE

PHASE

PGOOD

11

PR144

1 2

0_0603_5%~D

VCC

BOOT

EN

FSEL

VO

ISL95870AHRUZ_UTQFN20_1P8X3P2

PR124

2.2_0603_1%~D

1 2

19

PR152

0_0603_5%~D

1 2

18

17

16

15

1 2

0_0402_5%~D

14

13

1 2

0_0402_5%~D

12

PR118

PR141

PC117

12

1U_0603_10V6K~D

3

12

PC119

.1U_0402_16V7K~D

PC118

0.1U_0603_25V7K~D

12

VTTPWRGOOD

10K_0402_1%~D

1 2

PR255

PR140

PR140 0_0402_5%~D

0_0402_5%~D

1 2

SA_PGOOD

+3VS

2

PL24

1 2

FBMA-L11-453215-121LMA90T_2

12

123

12

PC96

0.1U_0603_25V7K~D

SI4128DY_SO8~D

2.2UH_FDVE0630-2R2M_8.3A_20%~D

12

PR148

4.7_1206_5%~D

AO4710L_SO8

12

PC123

680P_0402_50V7K~D

PR142

12

20K_0402_1%~D

PC126

2200P_0402_50V7K~D

12

0.01U_0603_16V7K~D

PC125

PR138

PL13

PC120

4.7U_0805_25V6-K~D

15.4K_0402_1%~D

1 2

PC194

PC127

4.7U_0805_25V6-K~D

4.7U_0805_25V6-K~D 1000P_0402_50VX7R~D

1000P_0402_50VX7R~D

12

PR137

10_0402_5%~D

578

PQ40

3 6

241

786

5

PQ39

4

B+

1

+

PC104

2

220U_6.3VM_R15

12

PR149

10_0402_5%~D

PC116

+VCCSAP

12

4.7U_0805_6.3V6K~D

1

PR260

1 2

0_0402_5%~D

Note: RTN pin need reference output GND

VID[0] VID[1] VCCSA Vout Required 0 0 0.9V Yes Yes 0 1 0.8V Yes Yes

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

VCCSA_SENSE 9

PR265

PR265 0_0402_5%~D

0_0402_5%~D

1 2

+VCCSAP TDC 4.2A Peak Current 6A OCP current 7.2 A

PJP26

@ PJP26

@

2

JUMP_43X118

Title

Size Document N umber R ev

Date: Sheet of

2

Date: Sheet of

VSSSA_SENSE

112

Compal Electronics, Inc.

PWR-VCCSA_COREP

LA-6601P

+VCCSA+VCCSAP

1

0.3

55 63Tuesday, November 30, 2010

0.3

5

12

PR270

PR270 2K_0402_1%

2K_0402_1%

12

PC204

PC204 330P_0402_50V7K~D

330P_0402_50V7K~D

D D

PR167

@

499K_0402_1%~D

IMONG

VSS_AXG_SENSE9

VR_SVID_DAT8

VR_SVID_ALRT#8

VR_SVID_CLK8

Alert# PU resister need close CPU, so the PU resister in HW schematic. but DAT and CLK need close PWM-IC,

C C

so the PU resister in POWER schematic.

VSSSENSE

12

PC160

PR197

IMON

VR_HOT#

PR198

@PR198

@

1 2

+VCCP

499_0402_1%~D

B B

A A

19.1K_0402_1%~D

1 2

PR211

@PR211

@

499K_0402_1%~D

.047U_0603_25V7~D

12

150P_0402_50V8J~D

+3VS

VGATE5

12

PC164

43P_0603_50V8

12

PR203

150P_0402_50V8J~D

12

PR163

8.06K_0402_1%~D

39P_0402_50V7K~D

39P_0402_50V7K~D PC147

PC147

12

PR179

18.2K_0402_1%~D

VR_ON

1 2

PR199

1 2

3.83K_0402_1%~D

12

PC173

8.06K_0402_1%~D

PC180

39P_0402_50V7K~D

12

316K_0402_1%~D

12

PC184

12

PC139

1000P_0402_50V7K~D

PC142

12

PR175

475K_0402_1%~D

12

PC151

.047U_0603_25V7~D

PC153

@

.1U_0402_16V7K~D

PR195

1.91K_0402_1%~D

PC165

@PC165

@

12

470P_0402_50V7K~D

1 2

470K_0402_5%_ERTJ0EV474J~D

PR200

27.4K_0402_1%~D

1000P_0402_50V7K~D

499_0402_1%~D

PR215

12

PR220

PR220 2K_0402_1%

2K_0402_1%

12

PC202

PC202 560P_0402_50V7K~D

560P_0402_50V7K~D

422_0402_1%~D

12

1 2

PH4

12

PR212

12

PR216

3.57K_0402_1%

+VCC_CORE

VCCSENSE8

VSSSENSE8

PR168

12

PR176

2.32K_0402_1%~D

+VCCP

12

PR183

PR184

130_0402_1%~D

VGATEG

PR194

0_0402_5%~D

PC182

12

470P_0402_50V7K~D

12

10_0402_1%~D

PC143

680P_0402_50V7K~D

12

+3VS

54.9_0402_1%~D

12

PR185

SVID_SDA

SVID_ALERT#

SVID_SCLK

PR218

12

10_0402_1%~D

PR221

12

1.91K_0402_1%~D

VSUM-

4

1

VWG

2

IMONG

3

PGOODG

4

SDA

5

ALERT#

6

SCLK

7

VR_ON

8

PGOOD

9

IMON

10

VR_HOT#

11

NTC

12

VW

3.83K_0402_1%~D

PR162

12

47

48

49

FBG

GND

COMPG

PC132

@PC132

@

470P_0402_50V7K~D

470K_0402_5%_ERTJ0EV474J~D

1 2

27.4K_0402_1%~D

PC144

45

46

VSENG

ISL95831CRZ-T_TQFN48_6X6

COMP13FB14ISEN3/ FB215ISEN216ISEN117VSEN18RTN19ISUMN20ISUMP21VDD22VIN23PROG1

PC175

@PC175

@

10P_0402_25V8J

12

ISEN2

12

PC191

ISEN1

ISEN3

PC193

12

PC179

0.22U_0402_6.3V6K~D

PC181

0.22U_0402_6.3V6K~D

PC183

0.22U_0402_6.3V6K~D

330P_0402_50V7K~D

PC192

0.01U_0402_16V7K~D

12

PH2

PR164

12

330P_0402_50V7K~D

0.01U_0402_16V7K~D

330P_0402_50V7K~D

ISPG

ISNG

43

44

ISPG

RTNG

12

330P_0402_50V7K~D

12

ISNG

PC141

1 2

PC145

NTCG

PR180

@

42

NTCG

12

BOOTG

0_0402_5%~D

1 2

40

41

PROG2

BOOTG

12

@

PR219

909_0402_1%

PHASEG

UGATEG

38

39

PHG

UGG

BOOT2

BOOT1

24

PC176

1U_0603_10V6K~D

12

PC199

0.068U_0402_16V7K~D

12

NTCG

+VCC_GFXCORE_AXG

PR165

10_0402_1%~D

VCC_AXG_SENSE 9

VSS_AXG_SENSE 9

PR177

12

10_0402_1%~D

LGATEG

37

LGG

36

35

UG2

34

PH2

33

VSSP2

32

LG2

31

VDDP

30

PWM3

29

LG1

28

VSSP1

27

PH1

26

UG1

25

PU12

PR201

0_0603_5%~D

1 2

PR205 1_0603_5%~DPR205 1_0603_5%~D

12

PC177

0.22U_0603_25V7K~D

12

PC186

PC185

0.47U_0603_16V7K~D

12

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

12

CPU_B+

+5VALW

0.022U_0402_16V7K~D

3

UGATEG

PHASEG

BOOTG

2.2_0603_5%~D

12

PR174

0_0603_5%~D

PR186

12

PR202

PR202 0_0402_5%~D

0_0402_5%~D

12

PR217

11K_0402_1%~D

12

PC195

PC140

0.1U_0603_25V7K~D

12

PR166

LGATEG

+5VS

12

PC149

1U_0603_10V6K~D

PU11

5

VCC

BOOT

6

FCCM

UGATE

2

PWM

PHASE

3

LGATE

GND

12

0_0603_5%~D

12

PC161

VSUM+

PR214

2.61K_0402_1%~D

PH5

PH5 10KB_0402_5%_ERTJ0ER103J~D

10KB_0402_5%_ERTJ0ER103J~D

VSUM-

.1U_0402_16V7K~D

PGND

ISL6208ACRZ-T_QFN8_3X3

PR190

@PR190

@

0_0603_5%~D

1 2

PR192

PR192 0_0603_5%~D

0_0603_5%~D

12

PC162

1U_0603_10V6K~D

UGATE2

PHASE2

BOOT2

LGATE2

UGATE1

PHASE1

BOOT1

2.2_0603_5%~D

LGATE1

5

PQ42

4

1

0.1U_0603_25V7K~D

8

7

4

9

+5VS

PR204

2.2_0603_5%~D

PR222

CPU_B+

4

AON6414AL-1N_DFN

123

5

PQ43

AON6702L-1N_DFN8

213

PR181

2.2_0603_5%~D

PC154

PC174

0.1U_0603_25V7K~D

12

PC196

0.1U_0603_25V7K~D

12

PQ41

4

12

PQ44

2

5

12

AON6414AL-1N_DFN

123

PC130 0.1U_0603_25V7K~DPC1 30 0.1U_0603_25V7K~D

PC131 0.1U_0603_25V7K~DPC1 31 0.1U_0603_25V7K~D

5

12

PR169

4.7_1206_5%~D

AON6702L-1N_DFN8

12

213

12

PC148

CPU_B+

5

PQ45

4

AON6414AL-1N_DFN

123

5

PQ47

4

AON6702L-1N_DFN8

213

5

PQ49

4

AON6414AL-1N_DFN

123

5

PQ51

4

5

PQ53

4

AON6702L-1N_DFN8

213

5

PQ54

4

AON6414AL-1N_DFN

123

5

PQ55

4

PQ56

4

AON6702L-1N_DFN8

213

PC129 0.1U_0603_25V7K~DPC1 29 0.1U_0603_25V7K~D

680P_0402_50V7K~D

4

PQ50

PQ52

5

12

PQ46

4

CPU_B+

123

213

12

PC97 0.1U_0603_25V7K~DPC97 0.1U_0 603_25V7K~D

PC124 0.1U_0603_25V7K~DPC1 24 0.1U_0603_25V7K~D

PC128 0.1U_0603_25V7K~DPC1 28 0.1U_0603_25V7K~D

5

PC155

10U_0805_25V5K~D

AON6414AL-1N_DFN

123

5

PQ48

AON6702L-1N_DFN8

213

CPU_B+

5

PC169

AON6414AL-1N_DFN

123

12

5

12

AON6702L-1N_DFN8

213

PC187

10U_0805_25V5K~D

AON6414AL-1N_DFN

12

PR223

4.7_1206_5%~D

12

AON6702L-1N_DFN8

12

PC135 10U_0805_25V5K~DPC135 1 0U_0805_25V5K~D

12

PC156

PC157

10U_0805_25V5K~D

12

PR188

4.7_1206_5%~D

12

PC159

680P_0402_50V7K~D

12

PC170

10U_0805_25V5K~D

PR206

4.7_1206_5%~D

ISEN2

PC178

680P_0402_50V7K~D

12

PC189

PC188

10U_0805_25V5K~D

ISEN1

PC197

VSUM+

680P_0402_50V7K~D

VSUM-

12

PC137

PC136

@

10U_0805_25V5K~D

0.36UH_ETQP4LR36AFC_28A_20%~D

PR170

10K_0603_1%~D

PR172

1 2

7.5K_0402_1%~D

@

12

PC158

10U_0805_25V5K~D

ISPG

0.36UH_ETQP4LR36AFC_28A_20%~D

PR189

ISEN3

1 2

10K_0603_1%~D

PR193

VSUM+

1 2

3.65K_0603_1%~D

@

12

PC171

PC172

10U_0805_25V5K~D

0.36UH_ETQP4LR36AFC_28A_20%~D

PR207

1 2

10K_0603_1%~D

PR209

VSUM+

1 2

3.65K_0603_1%~D

VSUM-

@

12

PC190

10U_0805_25V5K~D

0.36UH_ETQP4LR36AFC_28A_20%~D

PR224

1 2

10K_0603_1%~D

PR226

1 2

3.65K_0603_1%~D

1

HCB4532KF-800T90_1812

1 2

PL19

12

PC138

@

4

3

12

10KB_0402_5%_ERTJ0ER103J~D

PC167

.033U_0402_16V7K~D

4

3

VSUM-

1_0402_5%~D

PC205

10U_0805_25V5K~D

PL20

1

2

PH3

1 2

PR173 11K_0402_1%~DPR173 11K_0402_1%~D

PC150

1 2

.1U_0402_16V7K~D

1 2

PR182

442_0402_1%~D

PL21

1

2

PR196

12

1_0402_5%~D

1

+

PC166

PC166 220U_25V_M

220U_25V_M

2

PL22

4

3

PR213

12

PL23

1

4

3

2

PR228

12

PC133

470P_0402_50V7K~D

+VCC_GFXCORE_AXG

12

PR171

PR171 1_0402_5%~D

1_0402_5%~D

PC146

.1U_0402_16V7K~D

@PR178

@

1 2

100_0402_1%~D

12

ISNG

PR187

10K_0402_1%~D

PR191

10K_0402_1%~D

1

+

PC163

@+PC163

@

220U_25V_M

2

1

2

PR208

10K_0402_1%~D

PR210

10K_0402_1%~D

+VCC_CORE

PR225

10K_0402_1%~D

PR227

10K_0402_1%~D

12

PC134

680P_0402_50V7K~D

1 2

PR178

PC152

@

+VCC_CORE

ISEN1

12

ISEN2

12

+VCC_CORE

ISEN1

12

ISEN2

12

ISEN3

12

470P_0402_50V7K~D

ISEN3

B+

12

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT D ELL'S EXPRESS W RITTEN CONSENT.

5

4

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Compal Electronics, Inc.

PWR-CPU_CORE

LA-6601P

56 63Tuesday, November 30, 2010

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Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 1

Page 1Page 1

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

1 56 CPU_CORE 10'06/17 Compal_A lvin Improve therm al compensation . Change PR164 fr om 0ohm to 27.4 Kohm.

D D

2 51-57 all DC-DC schemati c 10 '06/17 Impro ve dc to dc pow er efficiency.

3 50 Charger 10'07/22 Voltage rating en hancement. Change PR49 for m 14.3K to 15K. X01

4 50 Charger 10'07/22 Output capacitor rating enhancem ent. Add PC46 10uF 0 805 to output. X01

5 51 +5VALWP/+3VALWP 10'07/22 Enhan ce Input capaci tor rating and switch waveform . Add PC80 4.7uF 0805 to input a nd change low s ide to FDMS0310 S.

6 56 CPU_CORE 10'07/22 Improve EM C solution. Add PC97, PC124 , PC128, PC129, PC130, PC131 0 .1uF 0603. X01

C C

7 51 +5VALWP/+3VALWP 10'07/22 Impro ve EMC solution . Add PC80 0.1uF 0603. X01

8 54 +1.5VP/0.75VSP 1 0'07/22 Impro ve EMC solution . Add PC168 0.1uF 0603. X01

9 55 VCCSAP 10'07/22 Improve EMC solution. Add PL24 120 ohm bead, and P C194 1000pF 040 2. X01

10 53 +1 .8VSP 10'07/ 22 Improve lo w side switchin g waveform. Change P Q59 from AO4466 to AO4712L X01

11 49 10'08/03 Co mpal_Alvin Add dyn matic trubo fun ction to contro l trubo. Add dynamatic t rubo function. X01

DCIN/DECTOR

Compal_Alvin

Delete all snub er for all dc-d c. Delete PR85, PR 86, PR98, PR115 , PR129, PR148, PR169, PR188, PR206, PR223. Delete PC60, PC 61, PC78, PC86, PC108, PC123, PC148, PC159, P C178, PC197.

X00

X01

B B

12 52 +V CCPP 10'08/ 10 Compal_ Alvin

13 56 CP U_CORE 10 '08/10 Comp al_Alvin Adjust the CPU loadline a nd transient to met Intel SPEC . PC167 and PC1 86.

14 56 CP U_CORE 10 '09/28 Comp al_Alvin Improve CP UCore PWRGOOD s ignal. Change VDD powe r rail from 5VS to 5VALW and a dd PR220 and PC 202.

15 55 VC CSAP 10'09/ 28 Compal_ Alvin Improve VCCSA PWRGOOD signal . Change VCC pow er rail from 5V S to 5VALW.

16 49/50

51/52/54 +5VALWP/+3V ALWP

17

A A

DCIN/DECTOR BATTERY CONN/OT P

+VCCPP +1.5VP/0.75VSP

5

10'09/28 Co mpal_Alvin Saving S4/S5 power con sumption. Change PU1 P in8 from Pre_V to VL. X02

10'10/12 Co mpal_Alvin For EMI solution.

For met Intel S PEC. Change VCCPP ou tput CAP to 470 uF.

PR216, PR219, P R202, PR180, PR 176, PR179, PR1 82, PR167, PR18 6.

Add PL25, PL26, PL27 P/N:SM010 00DJ00 (S SUPPR E_ FBMA-L11-453 215-121LMA90T 1 812) Add 10uF PC205 and change PC23 , PC24 to 10uF. Pop PC133 and P C134.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

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X01

X02

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

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Compal Electronics, Inc.

PWR-PIR

LA-6601P

57 63Tuesday, November 30, 2010

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C C

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51-56 all DC -DC schematic 10'10 /13 EMI solut ion. X02Compal_Alvin

18

19 50 Ch arger 10'11/ 02 Compal_A lvin Precharger sch ematic bom chan ge for old solu tion

Title

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2

Page 1

Page 1Page 1

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

Add all snuber for all dc-dc. Add PR85, PR86, PR98, PR115, P R129, PR148, PR 169, PR188, PR2 06, PR223. Add PC60, PC61, PC78, PC86, PC 108, PC123, PC1 48, PC159, PC17 8, PC197.

Delete PD13, PD 15, PR51, PQ22, PC32. Add PQ60, PR231 .

1

Rev.Page#

Rev.Rev.

X02

B B

A A

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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PWR-PIR

LA-6601P

58 63Tuesday, November 30, 2010

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Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

1 29 DP SW for mDP CONN 10'07/ 22 Compal_Y ungmao Mini DP no func tion Modified JMDP1 pin d efine

D D

L33 swap pin3 w ith pin4, net U 3TXDN2_L, U3TXD N2

2 39 USB 3.0 PD720200 10'08/ 10 USB3.0 tra nsfer speed is too low

3 31 HDMI input - STDP60 38 10'07/22 HDMI-IN no function Change U7 pin11 1, 112 to U7 pi n72,pin71 X00

4 34-35 HD Audio_IDT92HD73 C 10 '08/3 S/PDIF ja ck no function net LINE_OUT_JD connect to R16 77 pin2

5 38 Min i Card -WLAN / DMC / BT 10'08/11 Install Bluetooth modul e might be caus e system can't bootable remove net name BT_ACT IVE

6 33 GLAN AR8151 AL1A 10'08/9 LOM can' t work in 1000M bps speed and n o LED is on swap JLAN 1 pin11 with pi n13, net LAN_L INK#, LAN_LED2# X00

C C

7 34 HD Audio_IDT92HD73C 10'08/10 Audio left and right chan nel reverse swap U9, U16 pi n6 with pin8 X00

8

9 X00

10

11

14 MXMIII Connector A 10 '07/22 add R1817, R181 6, Q281

5 for EMI/EDS req uirement add RC121,RC125 ,RC126,RC127,RC 128PROCESSOR(2/6) PM,XDP,CLK 10'07/15 Comp al_Yungmao

10~13 DDRIII DIMMA ~ DDRIII DIMMD 10'07/15 Compal_Yungmao for DDR3 module can sele ct serial addre ss add R D35,RD36,RD37,R D38,RD39,RD47,RD 49

USB/ESATA TS3US B221RSER40 change D18 from +5VS to +5VALW10'08/3 Compal_Yungma o

Compal_Yungmao

-9% of 3.3V (3. 003) will cause no display whe n system power on

L34 swap pin3 w ith pin4, net U 3TXDP1_L, U3TXD P1 L35 swap pin3 w ith pin4, net U 3RXDN2_L, U3RXD N2 L36 swap pin3 w ith pin4, net U 3RXDP1_L, U3RXD P1

delete R721, R7 22, C740

X00

X00USB charging De vice can't be c harging in S4/S 5 with" AC and Battery " mode

X00

B B

12

13

14

15

16

17

A A

14 for MXM3.0 modu le power saving

25

LVDS SW- 1 to 2 & GPU/PCH

PROCESSOR(6/6)04

14 MXMIII Connector Compal_Ray battery can't charge

17

26

PCH (3/8) Compal_Ray can't boot when plug bluetooth module.

LVDS SW & CONN Compal_Ray Web CAM can't work.

5

10'09/20

Compal_Yungmao10'08/4MXMIII Connecto r A

STDP6038 chipse t vendor requir e to add for de bug used

Compal_Ray derating fail

4

add R1818, R181 9 pull high

add R313, R31410'07/13 Co mpal_Yungmao

QC4 change to SB00000090L

R1818, R1819 depop, change connection EC_SMB_DA1 to VGA_SMB_DA1

pop RH95

Change CAM power to 3VS

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

EE PIR(1)

LA-6601P

X00

X02

1.0

59 63Tuesday, November 30, 2010

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3

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Page 2Page 2

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

17

D D

18

19

20

21

22

C C

23

24

25

26

27

28

40 USB/ESATA

PCH (1/8)15

39

15

17

PCH (3/8)

10'09/20

10'09/2040 USB/ESATA Compal_Ray

10'09/27

Compal_RayHDMI SW

Compal_RayHDMI SW for DMC30

Compal_Ray

Compal_Ray depop R201, pop R202 0 ohmUSB3.0 can't workUSB3.0 PD720200

Compal_Ray

Follow A18 +HDMI_5V_OUT circuit remove QV5,CV40,RV35,QV6,RV34,Add R1896

Change UV2 HPD connectionHDMI can't work

DP can't work

eSATA can't work remove RS12

update for eSATA power share function

ME position redifned for HDD.

AV17 doesn't support deep sleep mode pop RH126, add RH159 and depop itPCH (3/8)17

Add HDA BUS ON/OFF control circuit, add CH17,UH9,RH30,RH50,QH10,RH267PCH (1/8)15

follow Design guide

follow Design guide Add R1687 for PCH_RSMRST# pull down

pop R1865 add R1958,R1959, remove C52,C53

PWRSHARE_EN# GPIO assign to EC pin 86 Add R97 for PWRSHARE_EN# pull down add R1699,D31

Swap HDD1(Port 1) ,HDD2(Port 0)Compal_Ray10'09/20

depop RH139 ,RH134

Add RH47 for BBS_BIT0_RPCH (1/8)

X02

B B

28

29

30

31

32

33

A A

PROCESSOR(6/6) derating fail04 Compal_Ray QC4 change to SB00000090L

HD Audio34 to solve backdrive issue on +3VS add D54

5

10'09/27

Compal_Ray

Compal_RayHD Audio Add HDMI IN audio sense circuit. add Q284 R1902,R190334

Compal_Ray

Change ACIN connection Remove RH150 ,RH137,Add R1900,R1899,QH11 PCH (3/8)17

To solve po noise when HDMI IN toggling add Q10Speaker AMP35

follow DG1.5 recommand15 PCH (1/8) Add R1960Compal_Ray

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

EE PIR(2)

LA-6601P

X02

1.0

60 63Tuesday, November 30, 2010

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1.0

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Issue DescriptionIssue Description

3

Page 2

Page 2Page 2

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

34

D D

C C

B B

16 PCH (4/8) PLTREST_VGA issue Add R28 D13 and change RH170 to 0 ohm

36

35 Speaker AMP Add U619 ,C1843add mute siwtch to solve po noise issue

37

38

15 PCH Compal_Ray10'10/07 Rename location Change CLIP1 to COMS1 and CLIP2 to ME1

39

39 USB 3.0 10'10/07 Add power option Add R1964,R1965,R1966,R1967 for U37 power option

40

31 HDMI 10'10/07 For double pull high Remove R81,R83

41

15 PCH 10'10/07 Change RTC circuit

42

33 10'10/07 Crystal EA result

43

9,10,11 10'10/07CPU Remove XDP 0 ohm resistor

44

45

5 CPU 10'10/07 Compal_Ray Follow Design guide 1.5

GLAN AR8151 AL1A

10'09/27

10'10/0135

10'10/01

10'10/07 Crystal EA resultCompal_RayPCH16 Change YH2 to X5H025000DC1H-H, CH23,CH24 to 12pF by

Compal_Ray

Addd R58 for HMI_SW_DETECT bypass direct due to it's desn't need level shift to 5V

Change CL39 to 3KV spec for Hi-port test change CL39 to 1000P_1808_3KV7K~D33 GLAN AR8151 AL1A

Add R5828 HDMI SW

Change RTC circuit and change DH1 to CHN202UPT,Reomve RH250

Change CL18,CL19 to 15pF by crystal EA result

CPU XDP depop, Remove:RC68~RC71, Change to depop RC59,RC61~RC67,RC121,RC121,RC125~RC128,RC50,RC51 Add T51~T54

crystal EA result

Add RC113 to reserve PCH_PWROK for VDDPWRGOOD

X02

31 ST6038 10'10/07 Compal_Ray Derating issue

46

47

9 CPU 10'10/07 Compal_Ray S3 issue Reserve CC178 for CPU1.5V_S3_GATE timing delay

48

31 ST6038 10'10/07 Compal_Ray By vendor review Follow vendor to depop R1744

49

32 ST4028 10'10/07 Compal_Ray By vendor review Change U607 to M25PE20

50

A A

31 ST6038 10'10/08 Compal_Ray Timing issue Add R172 for LDO timing enable timing delay

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

Change L13 to BLM18AG601SN1D for derating issue

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

EE PIR(2)

LA-6601P

X02

1.0

61 63Tuesday, November 30, 2010

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Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 2

Page 2Page 2

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

51

D D

55 Audio35

56

C C

57

58

61 15 PCH 2010/10/22 Compal_Ray Pop RH50 for ME lock issue Pop RH50

16 Codec Mute issue Add U620,C1844,U621,C1845 for mute

52

28 MXM

53

35 USB3.0 Change L33~L38 to DLW21SN670HQ2LEMI issue

54

PCH15 2010/10/12 Compal_Ray Reserve o ohm for HDA_SDOUT Add RH51

44 ENE 2010/10/12 Compal_Ray Change GPIO Change GPIO46 to VGA_ON and depop RH118

24,44 ENE 2010/10/12 Compal_Ray Change GPIO, and add backlight control circuit

29 DP 2010/10/12 Compal_Ray DP dual mode can't display Remove C301,C30859

35 Audio 2010/10/1260 Compal_Ray To reach 16dB

2010/10/8

2010/10/12 Compal_Ray By Maxim review result Change C154,C158 to .022uF and R140,R145 to 20K

Compal_Ray

Follow A18

Remove resistor for double pull high Remove R323 ,R32626 LVDS SW

Change AC_BATT# to EC_AC_BAT# , and remove R1817,D72, add U622,C1823

Change VGA_ON to LCD_BKL_EN, and add backlight control circuit, add Q39,C332,R422,R423,Q28,C331

Change R137,R142 to 16.2K

X02

A00

B B

62 ODD37 2010/10/22 Compal_Ray Re define ODD pin For ODD power require, add one more power pin

2010/10/2237 ODD Compal_Ray Remove zero power ODD switch. Remove SW1 and add R173 0 ohm for ODD_DA#63

46 power switch 2010/10/22 Compal_Ray64 Remove reserve power switch Remove SW4,SW5

65 24,44 LCD 2010/10/22 Compal_Ray Correct net name Rename LCD_BKL_EN# to LCD_BKL_EN

66 44 BID 2010/10/22 Compal_Ray Change BID Change BID, R225 to 56K

67 34 BID 2010/10/22 Compal_Ray HDMI in audio issue. change HDMI_IN_SELECT# to HDMI_TOGGLE

A A

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

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Compal Electronics, Inc.

EE PIR(2)

LA-6601P

A00

1.0

62 63Tuesday, November 30, 2010

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Issue DescriptionIssue Description

3

Page 2

Page 2Page 2

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

68 Compal_Ray

D D

C C

26 AMD AMD MXM card Brightness Contrl Hot/Key issue add RV46 and connect to SG_AMD_BKL.

17,28,

69

29,30

70

27 CRT Change C13~C15 to 0.01uF.CRT switch high EOS failure rate

71

72 ENE44 Compal_Ray Crystal remove for ENE Add C1846 for not use crystal for ENE

73 24 EDP Compal_Ray Remove RV39 Remove RV39 for LCDVDD_ON double pull down2010/10/29

74 36 HDD 2010/10/30 Compal_Ray Left HDD pin to NC Left JHDD2 Pin 20,21,22 to NC

NV

2010/10/22

Compal_Ray

Meet NV Optimus V1.2

HDMI in cable detect issue Add R1968,Q285,R184531 HDMI

Change AC_BATT# to EC_AC_BAT# , and remove R1817,D72, add U622,C1823

A00

B B

A A

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

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4

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2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

EE PIR(2)

LA-6601P

63 63Tuesday, November 30, 2010

1

1.0

COMPAL LA-6601P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual