Compal LA-6411P PAU10 Schematic
A
1 1
B
C
D
E
Compal Confidential
2 2
Churchill 13.3" M/B Schematics Document
Intel Arrandale SFF Processor with DDRIII + Ibex Peak-M
3 3
2010-03-31
REV:0.1
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2010/3/31 2011/3/31
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
D
Date: Sheet
Compal Electronics, Inc.
Cover Page
LA-6411P
E
0.1
of
143Wednesday , March 31, 20 10
A
B
C
D
E
Compal Confidential
Model Name : PAU10
Fan Control
page 4
File Name : LA-6411P
1 1
Clock Generator
IDT: 9LRS3199AKLFT
SILEGO: SLG8SP587
133/120/100/96/14.318MHZ to P CH
48MHZ to CardReader
2 2
HDMI Conn.
page 24
HDMI
Level shift
page 24
LCD Conn.
PCI-Express x 8 (PCIE1 2.5GT/S)
page 12
100MHz
2.7GT/s
LVDS
page 30
HDMI
100MHz
port 3 port 2
MINI Card -1
WLAN
w/ Bluetooth
3 3
page 28
LAN(GbE)
Realtek RTL8111E
page 26
RJ45
page 35
RTC CKT.
page 36
Power On/Off CKT.
page 40
TPM
page 32
LPC BUS
33MHz
Intel
Arrandale SFF
Processor
BGA1288
page 4,5,6,7,8,9
Intel
Ibex Peak-M
PCH
BGA 1071pins
page 13,14,15,16,17
18,19,20,21
SPI ROM(SYS)
DMI x4FDI x8
100MHz
1GB/s x4
ENE KB926 E0
DC/DC Interface CKT.
page 44,45
Power Circuit DC/DC
4 4
page 46~58
Power OK CKT.
page 30
Touch Pad
CONN.
page 30
page 29
Int. KBD
page 30
SPI ROM(EC)
page 29
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 800/1066/1333
6.4G/8.5G/10.6G
100M/133M/166M(CFD)
USB port1,9
USB port10
USB 2.0
3.3V 48MHz
HD Audio
3.3V 24MHz
SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)
100MHz
USB port12
SPI
page 13
ALS
page 30
204pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3
USB conn x 2
Camera
Mini Card-2
WWAN
Audio CKT
ALC269Q-VB
page 23
port 0
page 10,11
page 27
page 22
page 28
SATA HDD Conn.
page 19
SIM CONN
page 25
DMIC
page 22
Audio Jack / Speaker
page 23
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2010/3/31 2011/3/31
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
D
Date: Sheet
Compal Electronics, Inc.
Block Diagrams
LA-6411P
E
0.1
of
243Wednesday , March 31, 20 10
A
B
C
D
E
Voltage Rails
1 1
State +1.5V_CPU
S0
S3 / DC
S3 / AC
2 2
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery
don't exist
( O MEANS ON X MEANS OFF )
+RTCVCC
power
plane
OO
OOO
O
O
O
B+
+5VALW
+3VALW
+1.5V
O
OOOO
O
O
X
O
X
XXX
+5VS
+3VS
+1.5VS
+VGFX_CORE
+VCCP
+CPU_CORE
+1.05VS
+1.8VS
+0.75VS
OO
X
O
X
XX
X
X
Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build
CONN@ : means ME part.
Install below 45 level BOM structure for ver. 0.1
45@ : means just put it in the BOM of 45 level.
Install below 43 level BOM structure for ver. 0.1
SMBUS Control Table
3 3
SMB_EC_CK1
SMB_EC_DA1
SMBCLK
SMBDATA
SML1CLK
SML1DATA
4 4
SOURCEECBATT
Calpella
Calpella
A
V
X
X
SODIMM CLKGEN
XX
V
X
V
X
G-SENSOR
V
X
X
B
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2010/3/31 2011/3/31
Compal Secret Data
Deciphered Date
Custom
D
Date: Sheet
Title
Size Document Number Rev
Compal Electronics, Inc.
Notes List
LA-6411P
E
of
343Wednesday , March 31, 20 10
0.1
1
Layout ruleΚ10mil width trace
length < 0.5", spacing 20mil
H
_COMP3
R
H_CATERR#
H_PECI
H_PROCHOT#
H_THERMTRIP#_R
0_0402_5%
H_CPURST#
H_PM_SYNC_R
0_0402_5%
VCCPW RGOOD_1
0_0402_5%
VCCPW RGOOD_0
0_0402_5%
PM_DRAM_PWRGD_R
0_0402_5%
H_VTTPWRGD
H_PWRGD_XDP_R
0_0402_5%
120_0402_1%
H
_COMP2
R
320_0402_1%
_COMP1
H
R
549.9_0402_1%
H
_COMP0
649.9_0402_1%
R
BUF_PLT_RST#_R
12
R25
750_0402_1%
1 2
1 2
1 2
H_PECI18
H_VTTPWRGD
1 2
R11
1 2
R15
1 2
R16
1 2
R17
1 2
R18
1 2
1 2
R22
1 2
1.5K_0402_1%
A A
to power; PU to VCCP at power side also
H_PROCHOT#29
H_THERMTRIP#18
H_PM_SYNC15
B B
H_CPUPWRGD18
VCCP_POK
From Power VCCP PWRGOOD
C C
H_CPUPWRGD
PM_DRAM_PWRGD15
H_PWRGD_XDP
T12 R21
PLT_RST#17,26,28,29,32
R26
1 2
1K_0402_1%
12
R28
560_0402_5%
U
1B
AD71
C
OMP3
AC70
C
OMP2
AD69
C
OMP1
AE66
OMP0
C
M71
P
ROC_DETECT
N61
CATERR#
N19
PECI
N67
PROCHOT#
N17
THERMTRIP#
N70
RESET_OBS#
M17
PM_SYNC
AM7
VCCPW RGOOD_1
Y67
VCCPW RGOOD_0
AM5
SM_DRAMPWROK
H15
VTTPWR GOOD
Y70
TAPPWRGOOD
G3
RSTIN#
AUBURNDALE SFF_BGA1288
CPU for LOAD BOM
U1
Celeron_U3400
U3400@
PWM FAN
+5VS
R336
1 2
0_0805_5%
1
C6
10U_0805_10V4Z
2
EC_FAN_PWM29
D D
EC_FAN_PWM FAN_PWM_R
R170
1 2
0_0402_5%
REV1.0
40mil
2
Misc
B
P
D
PLL_REF_SSCLK
DPLL_REF_SSCLK#
Clocks
Thermal Power Management
DDR3
Misc
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
JTAG & MBP
U1
I3-330UM
I3@
+5VS_FAN
JFAN1
1
1
2
4
2
G1
3
5
3
G2
ACES_85204-03001
CONN@
B
B
CLK#
B
CLK_ITP
CLK_ITP#
P
EG_CLK
EG_CLK#
PRDY#
PREQ#
TMS
TRST#
TDO
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
CLK
TCK
3
C
LK_CPU_BCLK
AK7
C
LK_CPU_BCLK#
AK8
LK_CPU_XDP
C
K71
C
LK_CPU_XDP#
J70
C
LK_CPU_DMI
L21
C
LK_CPU_DMI#
J21
Y2
W4
SM_DRAMRST#
BJ12
SM_RCOMP0
BV33
SM_RCOMP1
BP39
SM_RCOMP2
BV40
PM_EXTTS#0
AV66
PM_EXTTS#1
AV64
XDP_PRDY#
U71
XDP_PREQ#
U69
XDP_TCK
T67
XDP_TMS
N65
XDP_TRST#
P69
XDP_TDI
T69
TDI
XDP_TDO
T71
XDP_TDI_M
P71
T70
XDP_DBRESET#
W71
XDP_BPM#0
J69
XDP_BPM#1
J67
XDP_BPM#2
J62
XDP_BPM#3
K65
XDP_BPM#4
K62
XDP_BPM#5
J64
XDP_BPM#6
K69
XDP_BPM#7
M69
T
1
T
2
S
upport integrated graphics but without eDP,
Can be connected to GND directly.
T3
R10
1 2
0_0402_5%
T4
XDP_DBRESET# 15
T5
T6
T7
T8
T9
T10
T11
T13
LK_CPU_BCLK 18
C
C
LK_CPU_BCLK# 18
C
LK_CPU_DMI 14
C
LK_CPU_DMI# 14
from DDR
PM_EXTTS#0_1 10,11
5
PM_DRAM_PWRGD_R
VCCP_POK
4
12
R23
1.5K_0402_1%
12
R27
750_0402_1%
+5VALW
1 2
13
2
G
Y
D
S
P
M_EXTTS#0
P
M_EXTTS#1
S
SM_RCOMP1
SM_RCOMP2
H_CATERR#
H_PROCHOT#
H_CPURST#
+3VALW
C1
1 2
5
0.1U_0402_16V7K
U2
2
P
B
1
A
G
3
NC7SZ08P5X_NL_SC70-5
R29
10K_0402_5%
Q2
SSM3K7002FU_SC70-3
M_RCOMP0
VCCP_POK
4
R
2 10K_0402_5%
1 2
R
4 10K_0402_5%
DR3 Compensation Signals
D
R
R8 24.9_0402_1%
R9 130_0402_1%
Layout Note:Please these
resistors near Processor
Processor Pullups
1 2
7 100_0402_1%
1 2
1 2
1 2
R12 49.9_0402_1%
1 2
R13 68_0402_5%
1 2
R14 68_0402_5%@
1 2
VCCP_POK 38
6
S3_0.75V_EN 37
+
3
SM_DRAMRST#
100K_0402_5%
RST_GATE18
VCCP
+VCCP
R19 0_0402_5%@
1 2
Q1
S
12
G
R24
2
RST_GATE
CPU XDP Signal
XDP_DBRESET#
XDP_TDO
XDP_PREQ#
XDP_TMS
XDP_TDI
XDP_TRST#
XDP_TCK
D
DIMM_DRAMRST#
13
BSH111_SOT23
C2
470P_0402_50V8J
R30 1K_0402_5%
1 2
R31 51_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
R32 51_0402_5%@
R33 51_0402_5%@
R34 51_0402_5%@
R35 51_0402_5%
R36 51_0402_5%@
+1.5V
12
5
R20
1K_0402_5%
+3VS
+VCCP
DIMM_DRAMRST# 10,11
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/3/31 2011/3/31
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
4
Date: Sheet
Compal Electronics, Inc.
ARD-SFF(1/6)-Thermal/XDP
LA-6411P
5
0.1
of
443Wednesday , March 31, 20 10
1
U
1A
REV1.0
D
MI_CRX_PTX_N015
D
MI_CRX_PTX_N115
D
MI_CRX_PTX_N215
D
A A
B B
C C
MI_CRX_PTX_N315
MI_CRX_PTX_P015
D
MI_CRX_PTX_P115
D
D
MI_CRX_PTX_P215
MI_CRX_PTX_P315
D
DMI_CTX_PRX_N015
DMI_CTX_PRX_N115
DMI_CTX_PRX_N215
DMI_CTX_PRX_N315
DMI_CTX_PRX_P015
DMI_CTX_PRX_P115
DMI_CTX_PRX_P215
DMI_CTX_PRX_P315
FDI_CTX_PRX_N015
FDI_CTX_PRX_N115
FDI_CTX_PRX_N215
FDI_CTX_PRX_N315
FDI_CTX_PRX_N415
FDI_CTX_PRX_N515
FDI_CTX_PRX_N615
FDI_CTX_PRX_N715
FDI_CTX_PRX_P015
FDI_CTX_PRX_P115
FDI_CTX_PRX_P215
FDI_CTX_PRX_P315
FDI_CTX_PRX_P415
FDI_CTX_PRX_P515
FDI_CTX_PRX_P615
FDI_CTX_PRX_P715
FDI_FSYNC015
FDI_FSYNC115
FDI_INT15
FDI_LSYNC015
FDI_LSYNC115
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
F7
D
MI_RX#[0]
J8
D
MI_RX#[1]
K8
D
MI_RX#[2]
J4
MI_RX#[3]
D
F9
D
MI_RX[0]
J6
MI_RX[1]
D
K9
D
MI_RX[2]
J2
D
MI_RX[3]
H17
DMI_TX#[0]
K15
DMI_TX#[1]
J13
DMI_TX#[2]
F10
DMI_TX#[3]
G17
DMI_TX[0]
M15
DMI_TX[1]
G13
DMI_TX[2]
J11
DMI_TX[3]
L2
FDI_TX#[0]
N7
FDI_TX#[1]
M4
FDI_TX#[2]
P1
FDI_TX#[3]
N10
FDI_TX#[4]
R7
FDI_TX#[5]
U7
FDI_TX#[6]
W8
FDI_TX#[7]
K1
FDI_TX[0]
N5
FDI_TX[1]
N2
FDI_TX[2]
R2
FDI_TX[3]
N9
FDI_TX[4]
R8
FDI_TX[5]
U6
FDI_TX[6]
W10
FDI_TX[7]
AC7
FDI_FSYNC[0]
AC9
FDI_FSYNC[1]
AB5
FDI_INT
AA1
FDI_LSYNC[0]
AB2
FDI_LSYNC[1]
AUBURNDALE SFF_BGA1288
2
E
XP_ICOMPI
EG_ICOMPI
P
EG_RBIAS
EG_RX#[0]
P
EG_RX#[1]
P
P
EG_RX#[2]
EG_RX#[3]
P
P
EG_RX#[4]
P
EG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
B12
A13
D12
B11
G40
G38
H34
P34
G28
H25
H24
D29
B26
D26
B23
D22
A20
D19
A17
B14
F40
J38
G34
M34
J28
G25
K24
B28
A27
B25
A24
B21
B19
B18
B16
D15
N40
L38
M32
D40
A38
G32
B33
B35
L30
A31
B32
L28
N26
M24
G21
J20
L40
N38
N32
B39
B37
H32
A34
D36
J30
B30
D33
N28
M25
N24
F21
L20
E
XP_RBIAS
P
P
EG_ICOMPO
P
EG_RCOMPO
DMI Intel(R) FDI
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
R
38
1 2
R
39
1 2
3
Layout ruleΚtrace
length < 0.5"
49.9_0402_1%
750_0402_1%
R40 0_0402_5%@
1 2
@
1 2
R42 0_0402_5%
CFG0
CFG3
CFG4
1E
U
AL4
CFG[0]
AM2
CFG[1]
AK1
CFG[2]
AK2
CFG[3]
AK4
CFG[4]
AJ2
CFG[5]
AT2
CFG[6]
AG7
CFG[7]
AF4
CFG[8]
AG2
CFG[9]
AH1
CFG[10]
AC2
CFG[11]
AC4
CFG[12]
AE2
CFG[13]
AD1
CFG[14]
AF8
CFG[15]
AF6
CFG[16]
AB7
CFG[17]
AU1
RSVD_TP[0]
T4
RSVD15
T2
RSVD16
U1
RSVD17
V2
RSVD18
AV71
RSVD19
AW70
RSVD20
AY69
RSVD21
BB69
RSVD22
D8
RSVD23
B7
RSVD24
A10
RSVD26
B9
RSVD27
C5
RSVD_NCTF[7]
A6
RSVD_NCTF[8]
E3
RSVD_NCTF[6]
F1
RSVD_NCTF[5]
AUBURNDALE SFF_BGA1288
REV1.0
RESERVED
SVD32
R
R
SVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD_NCTF[3]
RSVD_NCTF[4]
RSVD_NCTF[2]
RSVD_NCTF[1]
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
RSVD_TP[2]
RSVD_TP[1]
RSVD62
RSVD63
RSVD64
RSVD65
DC_TEST_BV71
DC_TEST_BV69
DC_TEST_BV68
DC_TEST_BV5
DC_TEST_BV3
DC_TEST_BV1
DC_TEST_BT71
DC_TEST_BT69
DC_TEST_BT3
DC_TEST_BT1
DC_TEST_BR71
DC_TEST_BR1
DC_TEST_E71
DC_TEST_E1
DC_TEST_C71
DC_TEST_C69
DC_TEST_C3
DC_TEST_A71
DC_TEST_A69
DC_TEST_A68
DC_TEST_A5
4
W66
W64
AC69
AC71
AA71
AA69
R66
R64
BT5
BR5
BV6
BV8
AV69
AK71
AN69
AP66
AH66
AK66
AR71
AM66
AK69
AU71
AT70
AR69
AU69
AT67
AP2
AN7
AV4
AU2
R41 0_0402_5%@
BE69
BE71
R43 0_0402_5%
TP_DC_TEST_BV71_BV69
BV71
BV69
TP_DC_TEST_BV68
BV68
TP_DC_TEST_BV5
BV5
TP_DC_TEST_BV3_BT3
BV3
TP_DC_TEST_BV1_BT1
BV1
TP_DC_TEST_BT71_BT69
BT71
BT69
BT3
BT1
TP_DC_TEST_BR71
BR71
TP_DC_TEST_BR1
BR1
TP_DC_TEST_E71
E71
TP_DC_TEST_E1
E1
TP_DC_TEST_C71_A71
C71
TP_DC_TEST_C69_A69
C69
TP_DC_TEST_C3
C3
A71
A69
TP_DC_TEST_A68
A68
TP_DC_TEST_A5
A5
33
T
T
34
T35
T36
1 2
1 2
5
@
T14
T15
T16
T17
T18
T19
T20
T21
T22
CFG Straps for PROCESSOR
CFG0
R44 3.01K_0402_1%@
1 2
PCI-Express Configuration Select
CFG0
Not applicable for Clarksfield Processor
CFG3
CFG3-PCI Express Static Lane Reversal
CFG3
D D
CFG4
CFG4-Display Port Presence
CFG4
1: Single PEG
0: Bifurcation enabled
R45 3.01K_0402_1%@
1 2
1: Normal Operation
0: Lane Numbers Reversed
15 -> 0, 14 ->1, .....
@
R46 3.01K_0402_1%
1 2
1: Disabled; No Physical Display Port
attached to Embedded Display Port
0: Enabled; An external Display Port
device is connected to the Embedded
Display Port
1
12.11
Security Classification
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Package Daisy Chain:
1: BR71 - pkg - BT71- board - BT69 - pkg - BV71 - board - BV69 - pkg - BV68
2: A68 - pkg - A69 - board - C69 - pkg - A71 - board - C71 - pkg - E71
3: A5 - pkg - C3
4: BR1 - pkg - BT1 - board - BV1 - pkg - BT3 - board - BV3 - pkg - BV5
Issued Date
3
2010/3/31 2011/3/31
Daisy Chain Recommendation for SMT Connectivity
Compal Secret Data
Deciphered Date
4
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
ARD-SFF(2/6)-DMI/PEG/CFG
LA-6411P
5
of
543Wednesday , March 31, 20 10
0.1
1
U
1C
A A
D
DR_A_D[0..63]10
B B
C C
DDR_A_BS010
DDR_A_BS110
DDR_A_BS210
DDR_A_CAS#10
DDR_A_RAS#10
DDR_A_WE#10
D
DR_A_D0
DR_A_D1
D
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
BF11
BE11
BH13
BN11
BG17
BK15
BG15
BH17
BK17
BN20
BN17
BK25
BH25
BJ20
BH21
BG24
BG25
BJ40
BM43
BF47
BF48
BN40
BH43
BN44
BN47
BN48
BN51
BH53
BJ55
BH48
BJ48
BM53
BN55
BF55
BN57
BN65
BJ61
BF57
BJ57
BK64
BK61
BJ63
BF64
BB64
BB66
BJ66
BF65
AY64
BC70
BT38
BH38
BF21
BK43
BL38
BF38
AT8
AT6
BB5
BB9
AV7
AV6
BE6
BE8
BK5
BF9
BF6
BK7
BN8
BN9
BK9
S
A_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
REV1.0
DDR SYSTEM MEMORY A
S
A_CK[0]
A_CK#[0]
S
S
A_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
2
BM34
BP35
BF20
BK36
BH36
BK24
BH40
BJ47
BF43
BL47
BB10
BJ10
BM15
BN24
BG44
BG53
BN62
BH59
AY5
BJ7
BN13
BL21
BH44
BK51
BP58
BE62
AY7
BJ5
BL13
BN21
BK44
BH51
BM60
BE64
BT36
BP33
BV36
BG34
BG32
BN32
BK32
BJ30
BN30
BF28
BH34
BH30
BJ28
BF40
BN28
BN25
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
D
DR_A_CLK0 10
D
DR_A_CLK0# 10
D
DR_A_CKE0 10
DDR_A_CLK1 10
DDR_A_CLK1# 10
DDR_A_CKE1 10
DDR_A_CS0# 10
DDR_A_CS1# 10
DDR_A_ODT0 10
DDR_A_ODT1 10
DDR_A_DM [0..7] 10
DDR_A_DQS#[0..7] 10
DDR_A_DQS[0..7] 10
DDR_A_MA[0..15] 10
3
U
1D
DR_B_D[0..63]11
D
DDR_B_BS011
DDR_B_BS111
DDR_B_BS211
DDR_B_CAS#11
DDR_B_RAS#11
DDR_B_WE#11
D
DR_B_D0
D
DR_B_D1
D
DR_B_D2
D
DR_B_D3
DR_B_D4
D
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AW2
BD1
BC2
BH2
BG4
BG1
BR6
BR8
BU9
BV10
BR10
BT12
BT15
BV15
BV12
BP12
BV17
BU16
BP15
BU19
BV22
BT22
BP19
BV19
BV20
BT20
BT48
BV48
BV50
BP49
BT47
BV52
BV54
BT54
BP53
BU53
BT59
BT57
BP56
BT55
BU60
BV59
BV61
BP60
BR66
BR64
BR62
BT61
BN68
BL69
BJ71
BF70
BG71
BC67
BK70
BK67
BD71
BD69
BV43
BV41
BV24
BU46
BT40
BT41
BA2
S
B_DQ[0]
B_DQ[1]
S
S
B_DQ[2]
BE4
S
B_DQ[3]
AY1
SB_DQ[4]
SB_DQ[5]
BF2
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
BJ4
SB_DQ[12]
BK2
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
4
REV1.0
BU33
B_CK[0]
S
BV34
B_CK#[0]
S
BT26
S
B_CKE[0]
BV38
S
B_CK[1]
BU39
SB_CK#[1]
BT24
SB_CKE[1]
BP46
SB_CS#[0]
BT43
SB_CS#[1]
BV45
SB_ODT[0]
BU49
SB_ODT[1]
DDR_B_DM0
BB4
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
DDR SYSTEM MEMORY - B
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
BL4
BT13
BP22
BV47
BV57
BU65
BF67
BE2
BM3
BU12
BT19
BT52
BV55
BU63
BG69
BD4
BN4
BV13
BT17
BT50
BU56
BV62
BJ69
BT34
BP30
BV29
BU30
BV31
BT33
BT31
BP26
BV27
BT27
BU42
BU26
BT29
BT45
BV26
BU23
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
5
DR_B_CLK0 11
D
DR_B_CLK0# 11
D
D
DR_B_CKE0 11
D
DR_B_CLK1 11
DDR_B_CLK1# 11
DDR_B_CKE1 11
DDR_B_CS0# 11
DDR_B_CS1# 11
DDR_B_ODT0 11
DDR_B_ODT1 11
DDR_B_DM[0..7] 11
DDR_B_DQS#[0..7] 11
DDR_B_DQS[0..7] 11
DDR_B_MA[0..15] 11
AUBURNDALE SFF_BGA1288
D D
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/3/31 2011/3/31
Compal Secret Data
AUBURNDALE SFF_BGA1288
Deciphered Date
Title
Size Document Number Rev
Custom
4
Date: Sheet
Compal Electronics, Inc.
ARD-SFF(3/6)-DDR3
LA-6411P
5
0.1
of
643Wednesday , March 31, 20 10
1
U1G
VCC_AXG_SENSE39
VSS_AXG_SENSE39
AF12
AF10
VAXG_SENSE
VSSAXG_SENSE
REV1.0
SENSE
GFXVR_VID_039
GFXVR_VID_139
GFXVR_VID_239
GFXVR_VID_339
A A
GFXVR_EN39
GFXVR_DPRSLPVR
GFXVR_IMON39
+1.5V_CPU
C18
B B
+VCCP
+VCCP
1
C59
C60
C C
2
22U_0805_6.3V6M
D D
GFXVR_VID_439
GFXVR_VID_539
GFXVR_VID_639
0_0402_5%
R49
R50
0_0402_5%
Current =3A
1
GFXVR_EN
1
C19
2
30ohm@100MHz
1
2
Follow checklist pg20
C20
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Decoupling Cap on CPU Bottom
C28
@
L1
MPZ1608S300AT_2P
1 2
C51
1
C62
C61
2
22U_0805_6.3V6M
10U_0603_6.3V6M
1 2
R56 4.7K_0402_5%
1
1
2
1
+
2
1
2
1
2
GFXVR_EN_R
12
GFX_DPRSLPVR_R
12
GFX_IMON
1
C21
2
1U_0402_6.3V6K
1
C29
2
330U_X_2VM_R6M
1
C52
2
1U_0402_6.3V6K
1
C63
2
10U_0603_6.3V6M
C22
1U_0402_6.3V6K
C30
22U_0805_6.3V6M
+VCCP0_DDR
C53
1U_0402_6.3V6K
C64
1U_0402_6.3V6K
AF71
GFX_VID[0]
AG67
GFX_VID[1]
AG70
GFX_VID[2]
AH71
GFX_VID[3]
AN71
GFX_VID[4]
AM67
GFX_VID[5]
AM70
GFX_VID[6]
AH69
GFX_VR_EN
AL71
GFX_DPRSLPVR
AL69
GFX_IMON
BU40
VDDQ1
BU35
VDDQ2
BU28
1
2
1
2
1
2
1
2
VDDQ3
BN38
VDDQ4
BM25
VDDQ5
BL30
VDDQ6
BJ38
VDDQ7
BH32
1U_0402_6.3V6K
VDDQ8
BH28
VDDQ9
BG43
VDDQ10
BF16
VDDQ11
BF15
VDDQ12
BD35
VDDQ13
BD33
VDDQ14
BD32
VDDQ15
BD30
VDDQ16
BD28
VDDQ17
BD26
VDDQ18
BD24
VDDQ19
BD23
VDDQ20
BD21
VDDQ21
22U_0805_6.3V6M
BD19
VDDQ22
BD17
VDDQ23
BD15
VDDQ24
BB35
VDDQ25
BB33
VDDQ26
BB32
VDDQ27
BB30
VDDQ28
BB28
VDDQ29
BB26
VDDQ30
BB24
VDDQ31
BB23
VDDQ32
BB21
VDDQ33
BB19
VDDQ34
BB17
VDDQ35
BB15
VDDQ36
AW32
VTT0_DDR
AW30
VTT0_DDR[1]
AW28
VTT0_DDR[2]
AW26
VTT0_DDR[3]
AW24
VTT0_DDR[4]
AW23
VTT0_DDR[5]
AW21
VTT0_DDR[6]
AW19
1U_0402_6.3V6K
VTT0_DDR[7]
AW17
VTT0_DDR[8]
AW15
VTT0_DDR[9]
AD15
VTT1_12
AD14
VTT1_13
AD12
VTT1_14
AB12
VTT1_15
AA12
VTT1_16
W17
VTT1_17
W15
VTT1_18
W14
1U_0402_6.3V6K
VTT1_19
W12
VTT1_20
R15
VTT1_21
AUBURNDALE SFF_BGA1288
+VGFX_CORE
C65
+VGFX_CORE
C77
1
2
1
2
GRAPHICS VIDs
DDR3 - 1.5V RAILS
1
C66
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C78
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Place on CPU Bottom side Place near CPU
LINES
POWER
1
C67
2
1
C79
2
2
GRAPHICS
PEG & DMI
1
C68
2
1U_0402_6.3V6K
1
C80
2
1U_0402_6.3V6K
2
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VTT1_1
VTT1_2
VTT1_3
VTT1_4
VTT1_5
VTT1_6
VTT1_7
VTT1_8
VTT1_9
VTT1_10
VTT1_11
VCAP2_1
VCAP2_2
VCAP2_3
VCAP2_4
VCAP2_5
VCAP2_6
VCAP2_7
VCAP2_8
VCAP2_9
VCAP2_10
VCAP2_11
VCAP2_12
VCAP2_13
VCAP2_14
VCAP2_15
VCAP2_16
VCAP2_17
VCAP2_18
VCAP2_19
C69
1U_0402_6.3V6K
C81
1U_0402_6.3V6K
3
1U_0402_6.3V6K
1U_0402_6.3V6K
+VCCP
C40
10U_0603_6.3V6M
+VCAP2
C50
1U_0402_6.3V6K
C8
C13
C23
C31
1
2
22U_0805_6.3V6M
C41
1
2
C54
1U_0402_6.3V6K
+VGFX_CORE
1
C73
2
+VGFX_CORE
1
+
C76
2
+VCCP
1
C9
2
1U_0402_6.3V6K
1
C14
2
1U_0402_6.3V6K
1
C24
2
1U_0402_6.3V6K
1
C32
2
1U_0402_6.3V6K
1
C42
2
22U_0805_6.3V6M
1
C55
2
10U_0603_6.3V6M
+VCCP
R54 0_0402_5%
R55 0_0402_5%
1
C74
2
10U_0603_6.3V6M
10U_0603_6.3V6M
330U_X_2VM_R6M
1
2
1
2
1
2
1
2
1
2
1
2
+VGFX_CORE
AN32
AN30
Current =12A
AN28
AN26
AN24
AN23
AN21
AN19
AL32
AL30
AL28
AL26
AL24
AL23
AL21
AL19
AK14
AK12
AJ10
AH14
AH12
AF28
AF26
AF24
AF23
AF21
AF19
AF17
AF15
AF14
AD28
AD26
AD24
AD23
AD21
AD19
AD17
W21
W19
U21
U19
U17
U15
U14
U12
R21
R19
R17
AK62
AK60
AK59
AH60
AH59
AF60
AF59
AD60
AD59
AB60
AB59
AA60
AA59
W60
W59
U60
U59
R60
R59
1
C70
2
1U_0402_6.3V6K
1
C82
2
1U_0402_6.3V6K
1
1
C37
C36
2
2
1U_0402_6.3V6K
1
1
C46
C47
2
2
1U_0402_6.3V6K
+VCAP2 Don't connect to any other power
rail, this is package decoulpling
1
C71
2
1U_0402_6.3V6K
1
C83
2
1U_0402_6.3V6K
1
1
C38
C39
2
2
1U_0402_6.3V6K
10U_0603_6.3V6M
1
1
C48
C49
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
C72
2
2
1U_0402_6.3V6K
1
1
C84
2
2
1U_0402_6.3V6K
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Current =16A
1
1
C10
2
1U_0402_6.3V6K
1
C15
2
1U_0402_6.3V6K
1
C25
2
1U_0402_6.3V6K
1
C33
2
1U_0402_6.3V6K
1
C43
2
22U_0805_6.3V6M
1
C56
2
10U_0603_6.3V6M
1 2
1 2
1
C75
2
2010/3/31 2011/3/31
C12
C11
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C16
C17
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C26
C27
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C35
C34
2
1U_0402_6.3V6K
1U_0402_6.3V6K
22U_0805_6.3V6M
1
C57
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
Compal Secret Data
1
2
1
2
1
2
1
2
+VTT0_72
+VTT0_73
+VCCP
C85
AW14
AW12
AU60
AU59
AU12
1U_0402_6.3V6K
AR60
AR59
AR12
AN60
AN59
AN35
AN33
AN17
AN15
AN14
AN12
AM10
1U_0402_6.3V6K
AL60
AL59
AL17
AL15
AL14
AL12
AK35
AK33
AF39
AF37
AF35
AF33
1U_0402_6.3V6K
AF32
AF30
AD39
BF60
BF59
BD60
BD59
BB60
BB59
AY60
AW60
AW35
1U_0402_6.3V6K
AW33
AD37
AD35
AD33
AD32
AD30
W35
W33
W32
W30
W28
W26
W24
W23
U35
U33
U32
U30
U28
U26
U24
U23
R35
R33
R32
R30
R28
R26
R24
R23
AY10
AN9
1
+
C86
2
330U_X_2VM_R6M
Deciphered Date
4
U1F
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_43
VTT0_44
VTT0_45
VTT0_46
VTT0_47
VTT0_48
VTT0_49
VTT0_50
VTT0_51
VTT0_52
VTT0_53
VTT0_54
VTT0_55
VTT0_56
VTT0_57
VTT0_58
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT0_63
VTT0_64
VTT0_65
VTT0_66
VTT0_67
VTT0_68
VTT0_69
VTT0_70
VTT0_71
VTT0_72
VTT0_73
AUBURNDALE SFF_BGA1288
1
+
2
330U_X_2VM_R6M
12/11
1.1V RAIL POWER
+CPU_CORE
4
REV1.0
SENSE LINESCPU VIDS
POWER
12
R57
100_0402_1%
VCCSENSE
VSSSENSE
R58
100_0402_1%
1 2
5
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VTT_SELECT[1]
PROC_DPRSLPVR
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
1.8V
VCCPLL1
VCCPLL2
VCCPLL3
VCCPLL4
VCCPLL5
VDDQ_CK[1]
VDDQ_CK[2]
H_DPRSLPVR
H_PSI#
H_PSI#
H_DPRSLPVR
H_PSI#
F68
PSI#
A61
D61
D62
A62
B63
D64
D66
AN1
H_DPRSLPVR
F66
A41
VCCSENSE_R
F64
VSSSENSE_R
F63
N13
R12
Current =1.35A
W39
W37
U37
R39
R37
BB14
BB12
R47 1K_0402_5%
1 2
R48 1K_0402_5%@
1 2
R1516 1K_0402_5%
1 2
R1517 1K_0402_5%@
1 2
R51 0_0402_5%
1 2
1 2
R52
0_0402_5%
R53
1 2
0_0402_5%
+1.8VS
1
1
C45
C44
1
1U_0402_6.3V6K
2
2
2
22U_0805_6.3V6M
+1.5V_CPU+1.5V_VDDQ_CK
L2
1 2
1UH_GLFR1608T1R0M-LR_20%
C58
1uH_230mA
H_VID0 40
H_VID1 40
H_VID2 40
H_VID3 40
H_VID4 40
H_VID5 40
H_VID6 40
VTT_SELECT 38
IMVP_IMON 40
4.7U_0603_6.3V6K
Place close to CPU
Route VCCSENSE and VSSSENSE trace at
27.4 ohms, 7 mils spacing
Title
Size Document Number Rev
Custom
Date: Sheet
Compal Electronics, Inc.
ARD-SFF(4/6)-PWR
LA-6411P
5
VCCSENSE 40
VSSSENSE 40
VTT_SENSE 38
of
743Wednesday , March 31, 20 10
+VCCP
0.1
1
+CPU_CORE
1
C87
1U_0402_6.3V6K
2
A A
B B
1
C92
1U_0402_6.3V6K
2
1
C102
1U_0402_6.3V6K
2
1
C112
1U_0402_6.3V6K
2
1
C119
1U_0402_6.3V6K
2
1
C88
1U_0402_6.3V6K
2
1
C93
1U_0402_6.3V6K
2
1
C103
1U_0402_6.3V6K
2
1
C113
1U_0402_6.3V6K
2
1
C120
1U_0402_6.3V6K
2
1
C89
1U_0402_6.3V6K
2
1
C94
1U_0402_6.3V6K
2
1
C104
1U_0402_6.3V6K
2
1
C114
1U_0402_6.3V6K
2
1
C121
1U_0402_6.3V6K
2
1
C90
1U_0402_6.3V6K
2
1
C95
1U_0402_6.3V6K
2
1
C105
1U_0402_6.3V6K
2
1
C115
1U_0402_6.3V6K
2
1
C122
1U_0402_6.3V6K
2
High-Frequency Decoupling 25x on CPU Bottom side
+CPU_CORE
1
C129
22U_0805_6.3V6M
2
1
C139
22U_0805_6.3V6M
2
C C
1
C146
22U_0805_6.3V6M
2
1
C130
22U_0805_6.3V6M
2
1
C140
22U_0805_6.3V6M
2
1
C147
22U_0805_6.3V6M
2
1
C131
22U_0805_6.3V6M
2
1
C141
22U_0805_6.3V6M
2
1
C148
22U_0805_6.3V6M
2
1
C132
22U_0805_6.3V6M
2
1
C142
22U_0805_6.3V6M
2
1
C149
22U_0805_6.3V6M
2
Mid-Frequency Decoupling 15x on Bottom
Side between inductors and package
+CPU_CORE
330U_X_2VM_R6M
1
+
C153
D D
2
C154
330U_X_2VM_R6M
1
+
2
C151
330U_X_2VM_R6M
1
+
2
C152
@
2
3
4
5
Current =27A
1
C91
1U_0402_6.3V6K
2
1
C96
1U_0402_6.3V6K
2
1
C106
1U_0402_6.3V6K
2
1
C116
1U_0402_6.3V6K
2
1
C123
1U_0402_6.3V6K
2
1
C133
22U_0805_6.3V6M
2
1
C143
22U_0805_6.3V6M
2
1
C150
22U_0805_6.3V6M
2
330U_X_2VM_R6M
1
+
2
+CPU_CORE
AF57
VCC_1
AF55
VCC_2
AF53
VCC_3
AF51
VCC_4
AF50
VCC_5
AF48
VCC_6
AF46
VCC_7
AF44
VCC_8
AF42
VCC_9
AF41
VCC_10
AD55
VCC_11
AD51
VCC_12
AD48
VCC_13
AD44
VCC_14
AD41
VCC_15
AB55
VCC_16
AB51
VCC_17
AB48
VCC_18
AB44
VCC_19
AB41
VCC_20
AA55
VCC_21
AA51
VCC_22
AA48
VCC_23
AA44
VCC_24
AA41
VCC_25
W55
VCC_26
W51
VCC_27
W48
VCC_28
W44
VCC_29
W41
VCC_30
U55
VCC_31
U51
VCC_32
U48
VCC_33
U44
VCC_34
U41
VCC_35
R55
VCC_36
R51
VCC_37
R48
VCC_38
R44
VCC_39
R41
VCC_40
P60
VCC_41
N55
VCC_42
N51
VCC_43
N48
VCC_44
N44
VCC_45
N42
VCC_46
M60
VCC_47
M51
VCC_48
M44
VCC_49
L55
VCC_50
K60
VCC_51
K51
VCC_52
K44
VCC_53
J55
VCC_54
H60
VCC_55
H51
VCC_56
H44
VCC_57
G60
VCC_58
G55
VCC_59
G51
VCC_60
G44
VCC_61
F55
VCC_62
E60
VCC_63
E57
VCC_64
E53
VCC_65
E50
VCC_66
E46
VCC_67
E42
VCC_68
D59
VCC_69
D57
VCC_70
D55
VCC_71
D54
VCC_72
D52
VCC_73
D50
VCC_74
D48
VCC_75
D47
VCC_76
D45
VCC_77
D43
VCC_78
B60
VCC_79
B56
VCC_80
B53
VCC_81
B49
VCC_82
B46
VCC_83
B42
VCC_84
A57
VCC_85
A54
VCC_86
A50
VCC_87
A47
VCC_88
A43
VCC_89
Low-Frequency
Bulk 4x on
Bottom Side,
1x on Top
REV1.0
POWER
CPU CORE SUPPLY
AUBURNDALE SFF_BGA1288
U1H
VCAP0_1
VCAP0_2
VCAP0_3
VCAP0_4
VCAP0_5
VCAP0_6
VCAP0_7
VCAP0_8
VCAP0_9
VCAP0_10
VCAP0_11
VCAP0_12
VCAP0_13
VCAP0_14
VCAP0_15
VCAP0_16
VCAP0_17
VCAP0_18
VCAP0_19
VCAP0_20
VCAP0_21
VCAP0_22
VCAP0_23
VCAP0_24
VCAP0_25
VCAP0_26
VCAP0_27
VCAP1_1
VCAP1_2
VCAP1_3
VCAP1_4
VCAP1_5
VCAP1_6
VCAP1_7
VCAP1_8
VCAP1_9
VCAP1_10
VCAP1_11
VCAP1_12
VCAP1_13
VCAP1_14
VCAP1_15
VCAP1_16
VCAP1_17
VCAP1_18
VCAP1_19
VCAP1_20
VCAP1_21
VCAP1_22
VCAP1_23
VCAP1_24
VCAP1_25
VCAP1_26
VCAP1_27
BD55
BD51
BD48
BB55
BB51
BB48
AY57
AY53
AY50
AW57
AW53
AW50
AU55
AU51
AU48
AR55
AR51
AR48
AN57
AN53
AN50
AL57
AL53
AL50
AK57
AK53
AK50
BD44
BD41
BD37
BB44
BB41
BB37
AY46
AY42
AY39
AW46
AW42
AW39
AU44
AU41
AU37
AR44
AR41
AR37
AN46
AN42
AN39
AL46
AL42
AL39
AK46
AK42
AK39
+VCAP0
Don't connect to any other power
rail, this is package decoulpling
1
C97
1U_0402_6.3V6K
2
1
C107
1U_0402_6.3V6K
2
1
C117
1U_0402_6.3V6K
2
+VCAP1
Don't connect to any other power
1
C98
1U_0402_6.3V6K
2
1
C108
1U_0402_6.3V6K
2
1
C118
1U_0402_6.3V6K
2
1
2
1
2
rail, this is package decoulpling
1
C124
1U_0402_6.3V6K
2
1
C134
1U_0402_6.3V6K
2
1
C144
1U_0402_6.3V6K
2
1
C125
1U_0402_6.3V6K
2
1
C135
1U_0402_6.3V6K
2
1
C145
1U_0402_6.3V6K
2
1
2
1
2
C99
1U_0402_6.3V6K
C109
1U_0402_6.3V6K
C126
1U_0402_6.3V6K
C136
1U_0402_6.3V6K
1
C100
1U_0402_6.3V6K
2
1
C110
1U_0402_6.3V6K
2
1
C127
1U_0402_6.3V6K
2
1
C137
1U_0402_6.3V6K
2
1
C101
1U_0402_6.3V6K
2
1
C111
1U_0402_6.3V6K
2
1
C128
1U_0402_6.3V6K
2
1
C138
1U_0402_6.3V6K
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/3/31 2011/3/31
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
4
Date: Sheet
Compal Electronics, Inc.
ARD-SFF(5/6)-Bypass
LA-6411P
5
0.1
of
843Wednesday , March 31, 20 10
5
U1I
BU62
VSS1
BU58
VSS2
BU55
VSS3
BU51
VSS4
BU48
VSS5
BU44
VSS6
BU37
VSS7
BU32
VSS8
BU25
VSS9
BU21
VSS10
BU18
VSS11
BU14
D D
C C
B B
A A
VSS12
BU11
VSS13
BU7
VSS14
BP42
VSS15
BN64
VSS16
BN6
VSS17
BM70
VSS18
BM51
VSS19
BM44
VSS20
BM32
VSS21
BM24
VSS22
BM17
VSS23
BL57
VSS24
BL55
VSS25
BL48
VSS26
BL40
VSS27
BL28
VSS28
BL20
VSS29
BK63
VSS30
BK60
VSS31
BK53
VSS32
BK34
VSS33
BK10
VSS34
BJ64
VSS35
BJ21
VSS36
BJ9
VSS37
BJ1
VSS38
BH70
VSS39
BH57
VSS40
BH55
VSS41
BH47
VSS42
BH24
VSS43
BH20
VSS44
BH15
VSS45
BG51
VSS46
BG36
VSS47
BF62
VSS48
BF30
VSS49
BF13
VSS50
BF8
VSS51
BE70
VSS52
BE65
VSS53
BE9
VSS54
BE1
VSS55
BD57
VSS56
BD53
VSS57
BD50
VSS58
BD46
VSS59
BD42
VSS60
BD39
VSS61
BD14
VSS62
BB71
VSS63
BB62
VSS64
BB57
VSS65
BB53
VSS66
BB50
VSS67
BB46
VSS68
BB42
VSS69
BB39
VSS70
BB7
VSS71
BB1
VSS72
BA70
VSS73
AY71
VSS74
AY66
VSS75
AY62
VSS76
AY59
VSS77
AY55
VSS78
AY51
VSS79
AY48
VSS80
AR42
VSS140
AR39
VSS141
AR35
VSS142
AR33
VSS143
AR32
VSS144
AR30
VSS145
AR28
VSS146
AR26
VSS147
AR24
VSS148
AR23
VSS149
AR21
VSS150
AR19
VSS151
AR17
VSS152
AR15
VSS153
AR14
VSS154
AR4
VSS155
AR1
VSS156
AP70
VSS157
AP64
VSS158
AN62
VSS159
AN55
VSS160
AY44
VSS81
AY41
VSS82
AY37
VSS83
AY35
VSS84
AY33
VSS85
AY32
VSS86
AY30
VSS87
AY28
VSS88
AY26
VSS89
AUBURNDALE SFF_BGA1288
REV1.0
VSS
4
AY24
VSS90
AY23
VSS91
AY21
VSS92
AY19
VSS93
AY17
VSS94
AY15
VSS95
AY14
VSS96
AY12
VSS97
AY8
VSS98
AY4
VSS99
AW67
VSS100
AW62
VSS101
AW59
VSS102
AW55
VSS103
AW51
VSS104
AW48
VSS105
AW44
VSS106
AW41
VSS107
AW37
VSS108
AV9
VSS109
AV1
VSS110
AU70
VSS111
AU62
VSS112
AU57
VSS113
AU53
VSS114
AU50
VSS115
AU46
VSS116
AU42
VSS117
AU39
VSS118
AU35
VSS119
AU33
VSS120
AU32
VSS121
AU30
VSS122
AU28
VSS123
AU26
VSS124
AU24
VSS125
AU23
VSS126
AU21
VSS127
AU19
VSS128
AU17
VSS129
AU15
VSS130
AU14
VSS131
AU4
VSS132
AT64
VSS133
AT10
VSS134
AR62
VSS135
AR57
VSS136
AR53
VSS137
AR50
VSS138
AR46
VSS139
AN51
VSS161
AN48
VSS162
AN44
VSS163
AN41
VSS164
AN37
VSS165
AN5
VSS166
AN4
VSS167
AM64
VSS168
AM8
VSS169
AL62
VSS170
AL55
VSS171
AL51
VSS172
AL48
VSS173
AL44
VSS174
AL41
VSS175
AL37
VSS176
AL35
VSS177
AL33
VSS178
AL1
VSS179
AK70
VSS180
AK64
VSS181
AK55
VSS182
AK51
VSS183
AK48
VSS184
AK44
VSS185
AK41
VSS186
AK37
VSS187
AK32
VSS188
AK30
VSS189
AK28
VSS190
AK26
VSS191
AK24
VSS192
AK23
VSS193
AK21
VSS194
AK19
VSS195
AK17
VSS196
AK15
VSS197
AJ70
VSS198
AH62
VSS199
AH57
VSS200
AH55
VSS201
BV66
VSS202
BV64
VSS203
BT68
VSS204
BR69
VSS205
BR68
VSS206
BR3
VSS207
BN71
VSS208
BN1
VSS209
BL71
VSS210
BL1
VSS211
R14
VSS212
H71
VSS213
F71
VSS214
E69
VSS215
E68
VSS216
A66
VSS217
A64
VSS218
E5
VSS219
C68
VSS220
3
U1J
AH53
VSS202
AH51
VSS203
AH50
VSS204
AH48
VSS205
AH46
VSS206
AH44
VSS207
AH42
VSS208
AH41
VSS209
AH39
VSS210
AH37
VSS211
AH35
VSS212
AH33
VSS213
AH32
VSS214
AH30
VSS215
AH28
VSS216
AH26
VSS217
AH24
VSS218
AH23
VSS219
AH21
VSS220
AH19
VSS221
AH17
VSS222
AH15
VSS223
AH4
VSS224
AG64
VSS225
AG9
VSS226
AG6
VSS227
AF69
VSS228
AF62
VSS229
AF1
VSS230
AE70
VSS231
AE64
VSS232
AD62
VSS233
AD57
VSS234
AD53
VSS235
AD50
VSS236
AD46
VSS237
AD42
VSS238
AD4
VSS239
AC67
VSS240
AC64
VSS241
AC10
VSS242
AC5
VSS243
AC1
VSS244
AB70
VSS245
AB62
VSS246
AB57
VSS247
AB53
VSS248
AB50
VSS249
AB46
VSS250
AB42
VSS251
AB39
VSS252
AB37
VSS253
AB35
VSS254
AB33
VSS255
AB32
VSS256
AB30
VSS257
AB28
VSS258
AB26
VSS259
AB24
VSS260
AB23
VSS261
AB21
VSS262
AB19
VSS263
AB17
VSS264
AB15
VSS265
AB14
VSS266
AB9
VSS267
AA66
VSS268
AA64
VSS269
AA62
VSS270
AA57
VSS271
AA53
VSS272
AA50
VSS273
AA46
VSS274
AA42
VSS275
AA39
VSS276
AA37
VSS277
AA35
VSS278
AA33
VSS279
AA32
VSS280
AA30
VSS281
AA28
VSS282
AA26
VSS283
AA24
VSS284
AA23
VSS285
AA21
VSS286
AA19
VSS287
F20
VSS374
F4
VSS375
E37
VSS376
E33
VSS377
E30
VSS378
E16
VSS379
E12
VSS380
D41
VSS381
D38
VSS382
D34
VSS383
D31
VSS384
D27
VSS385
D24
VSS386
D20
VSS387
D17
VSS388
D13
VSS389
D10
VSS390
D6
VSS391
B65
VSS392
B40
VSS415
AUBURNDALE SFF_BGA1288
REV1.0
VSS
VSS404
VSS405
VSS406
VSS407
VSS408
VSS409
VSS410
VSS411
VSS412
VSS413
VSS393
VSS394
VSS395
VSS396
VSS397
VSS398
VSS399
VSS400
VSS401
VSS402
VSS403
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
VSS361
VSS362
VSS363
VSS364
VSS365
VSS366
VSS367
VSS368
VSS369
VSS370
VSS371
VSS372
VSS373
2
A40
A36
A33
A29
A26
A22
A19
A15
A12
A8
B62
B58
B55
B51
B48
B44
A59
A55
A52
A48
A45
AA17
AA15
AA14
AA4
W69
W62
W57
W53
W50
W46
W42
W6
W1
V70
U64
U62
U57
U53
U50
U46
U42
U39
U9
U4
T1
R70
R62
R57
R53
R50
R46
R42
R5
P4
N63
N57
N53
N50
N46
N30
N21
N15
M53
M42
M36
M1
L70
L57
L48
L47
L13
K64
K53
K43
K36
K34
K32
K25
K17
K11
K6
K4
J65
J57
J48
J47
J40
J9
H53
H43
H36
H1
G70
G57
G53
G48
G47
G43
G30
G24
G20
G15
F61
F48
F47
F28
1
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/3/31 2011/3/31
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
2
Date: Sheet
Compal Electronics, Inc.
ARD-SFF(6/6)-GND
LA-6411P
1
0.1
of
943Wednesday , March 31, 20 10
5
DDR_A_DQS#[0..7]6
DDR_A_D[0..63]6
DDR_A_DM[0..7]6
DDR_A_DQS[0..7]6
DDR_A_MA[0..15]6
D D
M1: Arrandale
4
C C
Layout Note:
Place near JDIMM1
B B
+1.5V
1
C160
C161
2
10U_0603_6.3V6M
Layout Note:
Place near JDIMM1.203 & JDIMM1.204
+0.75VS
A A
2
C172
C173
1
1U_0603_10V6K
1
1
C162
C163
2
2
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
2
C175
C174
1
1U_0603_10V6K
1U_0603_10V6K
5
1
1
C164
2
2
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C176
2
1U_0603_10V6K
+1.5V
12
R59
1K_0402_1%
R60
1K_0402_1%
C165
10U_0603_6.3V6M
VREF_DQ_DIMMA
12
1
C155
2
Layout Note: Place these 4 Caps near Command
and Control signals of DIMMA
1
1
C167
C166
2
2
0.1U_0402_16V7K
10U_0603_6.3V6M
4
VREF_DQ_DIMMA
DDR_A_D0
DDR_A_D1
DDR_A_DM0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
DDR_A_CKE06
DDR_A_BS26
1
C156
2
2.2U_0603_16V6K
0.1U_0402_16V7K
1
1
C168
2
0.1U_0402_16V7K
4
1
C169
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2.2U_0603_16V6K
C159
DDR_A_CLK06
DDR_A_CLK0#6
DDR_A_BS06
DDR_A_WE#6
DDR_A_CAS#6 DDR_A_ODT0 6
DDR_A_CS1#6
1
+
2
330U_X_2VM_R6M
+3VS
C170
1
C171
2
DDR_A_CKE0
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_CLK0
DDR_A_CLK0#
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS# DDR_A_ODT0
DDR_A_MA13
DDR_A_CS1#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
1 2
R63
1
2
0.1U_0402_16V7K
3
+1.5V +1.5V
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
10K_0402_5%
+0.75VS
12
R64
10K_0402_5%
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
FOX_AS0A626-U2SN-7F
2010/3/31 2011/3/31
VSS3
DQS#0
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DM1
DQ14
DQ15
DQ20
DQ21
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
VTT2
2
4
DQ4
6
DQ5
8
10
12
14
16
DQ6
18
DQ7
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
A11
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
CK1
104
106
108
BA1
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
SCL
204
206
G2
Compal Secret Data
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_DM1
DIMM_DRAMRST#
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_CKE1
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_CLK1
DDR_A_CLK1#
DDR_A_BS1
DDR_A_RAS#
DDR_A_CS0#
DDR_A_ODT1
DDR_VREF_CA_DIMMA
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_EXTTS#0_1
Deciphered Date
+0.75VS
2
DIMM_DRAMRST# 4,11
DDR_A_CKE1 6
DDR_A_CLK1 6
DDR_A_CLK1# 6
DDR_A_BS1 6
DDR_A_RAS# 6
DDR_A_CS0# 6
DDR_A_ODT1 6
1
C157
2
PM_EXTTS#0_1 4,11
PCH_SMBDATA 11,12,14
PCH_SMBCLK 11,12,14
DDR3 SO-DIMM A
Standard Type
2
1K_0402_1%
1
1K_0402_1%
C158
2
2.2U_0603_16V6K
0.1U_0402_16V7K
Custom
Date: Sheet
1
+1.5V
12
R61
12
R62
Title
Size Document Number Rev
Compal Electronics, Inc.
DDRIII SO-DIMM A
LA-6411P
1
of
10 43Wednesday , March 31, 20 10
0.1
5
DDR_B_DQS#[0..7]6
DDR_B_D[0..63]6
DDR_B_DM[0..7]6
DDR_B_DQS[0..7]6
DDR_B_MA[0..15]6
D D
M1: Arrandale
4
C C
Layout Note:
Place near JDIMM2
B B
A A
+1.5V
1
1
C182
C183
2
10U_0603_6.3V6M
Layout Note:
Place near JDIMM2.203 & JDIMM2.204
+0.75VS
2
C195
C194
1
1U_0603_10V6K
1
C185
C184
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
2
2
C196
C197
1
1
5
1U_0603_10V6K
1U_0603_10V6K
1
1
C186
2
2
10U_0603_6.3V6M
2
C198
1
1U_0603_10V6K
R65
1K_0402_1%
R66
1K_0402_1%
C187
10U_0603_6.3V6M
1
2
10U_0603_6.3V6M
+1.5V
12
VREF_DQ_DIMMB
12
C177
Layout Note: Place these 4 Caps near Command
and Control signals of DIMMB
1
C188
2
10U_0603_6.3V6M
4
DDR_B_BS26
1
1
C178
2
2
0.1U_0402_16V7K
2.2U_0603_16V6K
1
C189
2
0.1U_0402_16V7K
4
1
1
2
0.1U_0402_16V7K
C190
C191
2
0.1U_0402_16V7K
1
2
C181
0.1U_0402_16V7K
1
+
2
330U_X_2VM_R6M
+3VS
2.2U_0603_16V6K
DDR_B_CLK06
DDR_B_CLK0#6
DDR_B_BS06
DDR_B_WE#6
DDR_B_CAS#6 DDR_B_ODT0 6
DDR_B_CS1#6
1
C192
2
3
+1.5V
VREF_DQ_DIMMB
DDR_B_D0
DDR_B_D1
DDR_B_DM0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_CLK0
DDR_B_CLK0#
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_B_CS1#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
R69 10K_0402_5%
1 2
R70 10K_0402_5%
1 2
1
C193
0.1U_0402_16V7K
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+0.75VS
2010/3/31 2011/3/31
JDIMM2
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
FOX_AS0A626-U2RN-7F
Compal Secret Data
2
4
DQ4
6
DQ5
8
VSS3
10
DQS#0
12
DQS0
14
VSS6
16
DQ6
18
DQ7
20
VSS8
22
DQ12
24
DQ13
26
VSS10
28
DM1
30
32
34
DQ14
36
DQ15
38
40
DQ20
42
DQ21
44
46
DM2
48
VSS17
50
DQ22
52
DQ23
54
VSS19
56
DQ28
58
DQ29
60
VSS21
62
64
DQS3
66
68
DQ30
70
DQ31
72
74
CKE1
76
VDD2
78
A15
80
A14
82
VDD4
84
A11
86
A7
88
VDD6
90
A6
92
A4
94
VDD8
96
A2
98
A0
100
VDD10
102
CK1
104
CK1#
106
VDD12
108
BA1
110
RAS#
112
VDD14
114
S0#
116
ODT0
118
VDD16
120
ODT1
122
NC2
124
VDD18
126
VREF_CA
128
VSS28
130
DQ36
132
DQ37
134
VSS30
136
DM4
138
VSS31
140
DQ38
142
DQ39
144
VSS33
146
DQ44
148
DQ45
150
VSS35
152
DQS#5
154
DQS5
156
VSS38
158
DQ46
160
DQ47
162
VSS40
164
DQ52
166
DQ53
168
VSS42
170
DM6
172
VSS43
174
DQ54
176
DQ55
178
VSS45
180
DQ60
182
DQ61
184
VSS47
186
DQS#7
188
DQS7
190
VSS50
192
DQ62
194
DQ63
196
VSS52
198
EVENT#
200
SDA
202
SCL
204
VTT2
206
G2
Deciphered Date
2
+1.5V
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
DIMM_DRAMRST#
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_B_CKE1DDR_B_CKE0
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_CLK1
DDR_B_CLK1#
DDR_B_BS1
DDR_B_RAS#
DDR_B_CS0#
DDR_B_ODT0
DDR_B_ODT1
DDR_VREF_CA_DIMMB
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PM_EXTTS#0_1
2
+0.75VS
DIMM_DRAMRST# 4,10
DDR_B_CKE1 6DDR_B_CKE06
DDR_B_CLK1 6
DDR_B_CLK1# 6
DDR_B_BS1 6
DDR_B_RAS# 6
DDR_B_CS0# 6
DDR_B_ODT1 6
1
C179
C180
2
2.2U_0603_16V6K
PM_EXTTS#0_1 4,10
PCH_SMBDATA 10,12,14
PCH_SMBCLK 10,12,14
DDR3 SO-DIMM B
Reverse Type
Custom
Date: Sheet
1
+1.5V
12
R67
1K_0402_1%
1
1K_0402_1%
2
0.1U_0402_16V7K
Title
Size Document Number Rev
LA-6411P
12
R68
Compal Electronics, Inc.
DDRIII SO-DIMM B
1
11 43Wednesday , March 31, 20 10
of
0.1
A
B
C
D
E
F
G
H
+1.05VS
1 1
L4
FBMA-L11-201209-221LMA30T_0805
1
C206
10U_0603_6.3V6M
2
12
+CLK_VDDSRC
1
C207
2
C208
10U_0603_6.3V6M
1
1
C209
2
2
0.1U_0402_16V7K
+1.5VS
0.1U_0402_16V7K
Integrated 33ohm Resistor
CLK_BUF_DREF_96M14
CLK_BUF_DREF_96M#14
CLK_BUF_DREF_96M
CLK_BUF_DREF_96M#
Integrated 33ohm Resistor
CLK_BUF_PCIE_SATA14
CLK_BUF_PCIE_SATA#14
CLK_BUF_CPU_DMI14
2 2
CLK_BUF_CPU_DMI#14
CLK_BUF_PCIE_SATA
CLK_BUF_PCIE_SATA#
CLK_BUF_CPU_DMI
CLK_BUF_CPU_DMI#
+3VS
R72 0_0402_5%
1 2
R74 0_0402_5%
1 2
R75 0_0402_5%
1 2
R77 0_0402_5%
1 2
R79 0_0402_5%
1 2
R80 0_0402_5%
1 2
Silego Have Internal Pull-Up
R82 10K_0402_5%
1 2
H_STP_CPU#
CLK_BUF_DREF_96M#_R
+CLK_VDD
CLK_48M_CR_R
CLK_BUF_PCIE_SATA_R
CLK_BUF_PCIE_SATA#_R
CLK_BUF_CPU_DMI_R
CLK_BUF_CPU_DMI#_R
H_STP_CPU#
L5
FBMA-L11-201209-221LMA30T_0805
1
C210
10U_0603_6.3V6M
2
+CLK_1.5VDD
12
U4
1
VDD_DOT
2
VSS_DOT
3
DOT_96
4
DOT_96#
5
VDD_27
6
27MHZ
7
27MHZ_SS
8
VSS_27
9
VSS_SATA
10
SRC_1/SATA
11
SRC_1#/SATA#
12
VSS_SRC
13
SRC_2
14
SRC_2#
15
VDD_SRC_IO
16
CPU_STOP#
RTM890N-631-VB-GRT_QFN32_5X5
+CLK_1.5VDD
1
1
C212
C211
2
2
10U_0603_6.3V6M
Clock Generator
REF_0/CPU_SEL
1
C213
2
0.1U_0402_16V7K
SCL
SDA
VDD_REF
XTAL_IN
XTAL_OUT
VSS_REF
CKPWRGD/PD#
VDD_CPU
CPU_0
CPU_0#
VSS_CPU
CPU_1
CPU_1#
VDD_CPU_IO
VDD_SRC
TGND
1 2
0_0603_5%
0.1U_0402_16V7K
R71
@
+CLK_VDD
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
33
+CLK_VDD
+3VS
REF_0/CPU_SELCLK_BUF_DREF_96M_R
CLK_XTAL_IN
CLK_XTAL_OUT
CK505_PWRGD
CLK_BUF_CPU_BCLK_R
CLK_BUF_CPU_BCLK#_R
+CLK_VDDSRC+CLK_VDDSRC
+CLK_1.5VDD
L3
FBMA-L11-201209-221LMA30T_0805
1
C199
10U_0603_6.3V6M
2
R73 33_0402_5%
1 2
R76 0_0402_5%
1 2
R78 0_0402_5%
1 2
Integrated 33ohm Resistor
+3VS
R81
10K_0402_5%
1 2
CK505_PWRGD
Q3
13
D
2
G
S
SSM3K7002FU_SC70-3
12
+CLK_VDD
C200
CLK_EN# 40
1
1
C201
2
2
10U_0603_6.3V6M
PCH_SMBCLK 10,11,14
PCH_SMBDATA 10,11,14
CLK_BUF_ICH_14M 14
CLK_BUF_CPU_BCLK
CLK_BUF_CPU_BCLK#
C202
0.1U_0402_16V7K
1
2
0.1U_0402_16V7K
CLK_BUF_CPU_BCLK 14
CLK_BUF_CPU_BCLK# 14
2
2
0.1U_0402_16V7K
1
1
C204
C203
C205
0.1U_0402_16V7K
1
2
0.1U_0402_16V7K
IDT Have Internal Pull-Down
R83 10K_0402_5%
3 3
1 2
(Default)
0 133MHz
1
REF_0/CPU_SEL
CPU_1PIN 30 CPU_0
133MHz
100MHz 100MHz
CLK_48M_CR_R
R84
@
1 2
0_0402_5%
14.318MHZ_20PF_X5H01431ADK1H-H
CLK_XTAL_IN
Y1
CLK_XTAL_OUT
12
C214
22P_0402_50V8J
12
C215
22P_0402_50V8J
12
PIN8 IS GND FOR ICS3197
PIN8 IS 48MHz FOR ICS3199
4 4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2010/3/31 2011/3/31
E
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Custom
F
Date: Sheet
Compal Electronics, Inc.
Clock Generator
LA-6411P
G
0.1
of
12 43Wednesday , March 31, 20 10
H
5
R85
R86
R90
PCH_RTCRST#
RC Delay 18~25mS
close to RAM door
PCH_SRTCRST#
RC Delay 18~25mS
close to RAM door
HIGH=No Reboot
LOW=Default
PCH_SPKR
SERIRQ
+3VALW
32.768K 12.5PF Q13MC1461005000
check list 0111
HDA_BITCLK23
HDA_SYNC23
HDA_RST#23
HDA_SDOUT23
+RTCVCC
D D
+RTCVCC
C C
+3VS
R102 1K_0402_5%@
R105 10K_0402_5%
B B
1 2
20K_0402_1%
@
1 2
10K_0603_5%
C217
1 2
1U_0603_10V6K
R88
1 2
20K_0402_1%
@
1 2
10K_0603_5%
C219
1 2
1U_0603_10V6K
NO Reboot STRAP
1 2
1 2
4
C216
18P_0402_50V8J
12
Y2
OSC
NC
OSC
NC
C218
1 2
1 2
1 2
1 2
1 2
HDA_SDIN023
1 2
1 2
1 2
1 2
12
0119
4
1
PCH_SPKR23
ME_EN#29
3
2
18P_0402_50V8J
+RTCVCC
R89 1M_0402_5%
R91 330K_0402_5%
INTVRMEN - Integrate d SUS 1.1V VRM Enable
High - Enable Interna l VRs
R92 33_0402_5%
R93 33_0402_5%
R94 33_0402_5%
R95 33_0402_5%
1 2
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SO_SPI_SI
PCH_SI_SPI_SO
R97 0_0402_5%
R98 0_0402_5%
R100 0_0402_5%
R103 0_0402_5%
PCH_RTCX1
R87
10M_0402_5%
PCH_RTCX2
HDA_BITCLK_PCH
HDA_SYNC_PCH
PCH_SPKR
HDA_RST#_PCH
HDA_SDOUT_PCH
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
12
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
ME_EN#
PCH_SPI_CLK_R
PCH_SPI_CS0#_R
PCH_SO_SPI_SI_R
PCH_SI_SPI_SO_R
U5A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IBEXPEAK-M_FCBGA107
3
REV1.0
RTCIHDA
SPI JTAG
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ1# / GPIO23
LPC
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
LDRQ0#
SERIRQ
LPC_AD0
D33
LPC_AD1
B33
LPC_AD2
C32
LPC_AD3
A32
LPC_FRAME#
C34
A34
F34
SERIRQ
AB9
SATA_PRX_DTX_N0
AK7
SATA_PRX_DTX_P0
AK6
SATA_PTX_DRX_N0
AK11
SATA_PTX_DRX_P0
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
PCH_SATALED#
T3
PCH_GPIO21
Y9
PCH_GPIO19
V1
2
LPC_AD0 28,29,32
LPC_AD1 28,29,32
LPC_AD2 28,29,32
LPC_AD3 28,29,32
LPC_FRAME# 28,29,32
SERIRQ 29,32
SATA_PTX_DRX_N0 25
SATA_PTX_DRX_P0 25
SATA2, SATA3 not support on HM55
SATA_COMP
R96 37.4_0402_1%
R99 10K_0402_5%
1 2
1 2
PCH_SATALED#
R101 10K_0402_5%
R104 10K_0402_5%
SATA_PRX_DTX_N0 25
SATA_PRX_DTX_P0 25
+1.05VS
+3VS
1 2
1 2
1
SATA for HDD
+3VS
R106 200_0402_5%@
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_RST#
PCH_JTAG_TCK
A A
1 2
R107 100_0402_5%@
1 2
R108 200_0402_5%@
1 2
R109 100_0402_5%@
1 2
R110 200_0402_5%@
1 2
R111 100_0402_5%@
1 2
R113 20K_0402_5%@
1 2
R114 10K_0402_5%@
1 2
R115 51_0402_5%
1 2
2010-03-30 Intel Review & Recommend
+RTCVCC
1
C221
0.1U_0402_16V7K
2
5
R118
1 2
510_0603_5%
Enable iTPM: SPI_MOSI Pull High
PCH_SO_SPI_SI_R
Enable=Stuff Disable=No Stuff
+RTCBATT
R112 1K_0402_5%@
1 2
4
+3VS
SYS BIOS ROM
+3VS
R116
3.3K_0402_5%
PCH_SPI_CS0#
PCH_SI_SPI_SO
SPI_WP#
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
U6
1
/CS
2
DO
3
/WP
4
GND
W25Q64BVSSIG_SOP8P
200 MIL SO8 64Mb Flash ROM
2010/3/31 2011/3/31
Compal Secret Data
VCC
/HOLD
CLK
DIO
Deciphered Date
C220 0.1U_0402_16V7K
12
3.3K_0402_5%
8
7
PCH_SPI_CLK
6
PCH_SO_SPI_SI
5
1 2
R117
Custom
2
Date: Sheet
Title
Size Document Number Rev
Compal Electronics, Inc.
PCH (1/9)SATA,HDA,SPI,LPC
LA-6411P
1
of
13 43Wednesday , March 31, 20 10
0.1
5
PCIE_PRX_LANTX_N226
For LAN
D D
For WLAN
PCIE_PRX_LANTX_P226
PCIE_PTX_C_LANRX_N226
PCIE_PTX_C_LANRX_P226
PCIE_PRX_WLANTX_N328
PCIE_PRX_WLANTX_P328
PCIE_PTX_C_WLANRX_N328
PCIE_PTX_C_WLANRX_P328
C222 0.1U_0402_16V7K
C223 0.1U_0402_16V7K
C224 0.1U_0402_16V7K
C225 0.1U_0402_16V7K
12
12
12
12
PCIE7, PCIE8 not support on HM55
R120 0_0402_5%
CLK_PCIE_LAN#26
C C
For LAN
For Wireless LAN
B B
WCARD_CLKREQ#_R
PCH_GPIO20
PCH_SMBCLK
PCH_SMBDATA
CLK_PCIE_LAN26
LAN_CLKREQ#26
CLK_PCIE_WCARD#28
CLK_PCIE_WCARD28
WCARD_CLKREQ#28
R128 10K_0402_5%
1 2
R130 10K_0402_5%
1 2
R132 10K_0402_5%
1 2
R134 10K_0402_5%
1 2
R121 0_0402_5%
R122 0_0402_5%
R123 0_0402_5%
R124 0_0402_5%
R125 0_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
EC_LID_OUT#
SMBCLK
SMBDATA
PCH_GPIO60
PCH_SML1CLK
PCH_SML1DAT
PCH_GPIO74
4
PCIE_PRX_LANTX_N2
PCIE_PRX_LANTX_P2
PCIE_PTX_LANRX_N2
PCIE_PTX_LANRX_P2
PCIE_PRX_WLANTX_N3
PCIE_PRX_WLANTX_P3
PCIE_PTX_WLANRX_N3
PCIE_PTX_WLANRX_P3
CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R
LAN_CLKREQ#_R
CLK_PCIE_WCARD#_R
CLK_PCIE_WCARD_R
WCARD_CLKREQ#_R
PCH_GPIO20
PCH_GPIO25
PCH_GPIO26
PCH_GPIO44
PCH_GPIO56
R129 10K_0402_5%
1 2
R131 2.2K_0402_5%
1 2
R133 2.2K_0402_5%
1 2
R135 10K_0402_5%
1 2
R136 2.2K_0402_5%
1 2
R137 2.2K_0402_5%
1 2
R138 10K_0402_5%
1 2
U5B
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0# / GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1# / GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2# / GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4# / GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5# / GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ# / GPIO56
IBEXPEAK-M_FCBGA107
+3VALW+3VS
REV1.0
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1ALERT# / GPIO74
SMBus
SML1DATA / GPIO75
PCI-E*
Link
Controller
PEG_A_CLKRQ# / GPIO47
PEG
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
From CLK BUFFER
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
Clock Flex
3
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO58
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
EC_LID_OUT#
B9
SMBCLK
H14
SMBDATA
C8
PCH_GPIO60
J14
C6
G8
PCH_GPIO74
M14
PCH_SML1CLK
E10
PCH_SML1DAT
G12
T13
T11
T9
PEG_CLKREQ#_R
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
CLK_BUF_ICH_14M
P41
J42
XTAL25_IN
AH51
XTAL25_OUT
AH53
XCLK_RCOMP
AF38
T45
P43
T42
N50
without DP
EC_LID_OUT# 29
R119
1 2
10K_0402_5%
CLK_CPU_DMI# 4
CLK_CPU_DMI 4
CLK_BUF_CPU_DMI# 12
CLK_BUF_CPU_DMI 12
CLK_BUF_CPU_BCLK# 12
CLK_BUF_CPU_BCLK 12
CLK_BUF_DREF_96M# 12
CLK_BUF_DREF_96M 12
CLK_BUF_PCIE_SATA# 12
CLK_BUF_PCIE_SATA 12
CLK_BUF_ICH_14M 12
CLK_PCI_FB 17
R126 90.9_0402_1%
1 2
CLK_BUF_ICH_14M
12
R355
0_0402_5%
@
1
C468
22P_0402_50V8J
@
2
For EMI
2
+1.05VS
R127
1M_0402_5%
Q4A
2N7002DWH_SOT363-6
SMBCLK
6 1
+3VS
Q4B
2N7002DWH_SOT363-6
SMBDATA
3 4
+3VS
Q5A
2N7002DWH_SOT363-6
PCH_SML1CLK
PCH_SML1DAT
12
6 1
+3VS
Q5B
2N7002DWH_SOT363-6
3 4
+3VS
C226
27P_0402_50V8J
1 2
Y3
25MHz_12P_20PPM_X5H025000DC1H-H
1 2
1 2
C227
27P_0402_50V8J
2
5
PCH_SMBCLK
PCH_SMBDATA
EC_SMB_CK2
2
EC_SMB_DA2
5
1
PCH_SMBCLK 10,11,12
PCH_SMBDATA 10,11,12
EC_SMB_CK2 29
EC_SMB_DA2 29
PCH_GPIO44
A A
5
PCH_GPIO56
PCH_GPIO26
LAN_CLKREQ#_R
PCH_GPIO25
R139 10K_0402_5%
R140 10K_0402_5%
R141 10K_0402_5%
R142 10K_0402_5%
R143 10K_0402_5%
1 2
1 2
1 2
1 2
1 2
4
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRA WING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/3/31 2011/3/31
Compal Secret Data
Deciphered Date
Custom
2
Date: Sheet
Title
Size Document Number Rev
Compal Electronics, Inc.
PCH (2/9) PCIE, SMBUS, CLK
LA-6411P
1
of
14 43Wednesday , March 31, 20 10
0.1
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