Compal LA-6321P NCL60, LA-6321PNCL61 Schematic

A

ZZZ

ZZZ

LA-6321P

LA-6321P

PCB@

PCB@

DA80000 IV00

1 1

DA80000 IV00

B

C

D

E

NCL60/61

2 2

LA-6321P Schematic

3 3

Intel Processor ARD/ PCH HM55/NV N11M GE2, N11P-LP,

REV 0.2

N11P-LP1(optimus)

2010-03-18 Rev 0.2

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

1 59Thursday, March 18, 2010

1 59Thursday, March 18, 2010

1 59Thursday, March 18, 2010

E

0.1

0.1

0.1

A

B

C

D

E

Clock Generator

RTM890N

page 23

Intel Arrandale

Fan Control

APL5607

page 6

VGA Thermal Sensor

ADM1032ARMZ-2

page 14

PCIE-Express 16X 2.5GHz

1 1

rPGA-989

page 5~10

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066/1333 MT/s

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12

N11M-GE2 /N11P LP

N11M GE2, 64*16 512MB,128*16 1GB
N11P-LP1/N11P-LP 64*16*8 1GB
Optimus

page 13~24

2 2

HDMI Conn.

page 27

RJ45

w/o LED

page 38

RTL8111E-GR
QFN48_6X6

RTS5160-GR
LQFP 48P

3 3

CRT

LVDS Conn.

Level Shifter

PCIe port 1

page 38

USB port12

page 41

page 26

page 25

page 25

PCIe 1x

1.5V 2.5GHz(250MB/s)

USB

5V 480MHz

FDI X8

2.7GHz

Intel Ibex Peak

BGA-1071

DMI X4

2.5GHz

page 28~36

USB

5V 480MHz

USB

5V 480MHz

PCIe 1x

1.5V 2.5GHz(250MB/s)

LPC BUS

3.3V 33 MHz

SATA port 1

5V 3GHz(300MB/s)

SATA port 4

5V 3GHz(300MB/s)

USB/B Right Left USB

USB port 0,1

page 37

USB port 2

page 37

BT conn

USB port 5

page 38

PCIeMini Card

USB port 13PCIe port 2

page 39

SATA HDD

SATA port 1

page 37

SATA ODD

SATA port 4

page 37

Int. Camera

USB port 11

page 25

HD Audio

3.3V/1.5V 24MHz

HDA Codec

SPI ROM
(4MB)

page 28

ENE KB926 D3/E0

page 43

ALC272

page 42

RTC CKT.

page 45

DC/DC Interface CKT.

page 44

4 4

Touch Pad

page 45

Int.KBD

page 44

EC ROM
(256KB)

page 44

MIC Conn

page 23

SPK ConnInt.

page 42

JPIO
(HP & MIC)

page 42

Power Circuit DC/DC

page 47,48,49,50,51,52
53,54,55,56

Power On/Off CKT.

page 43

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

2 59Thursday, March 18, 2010

2 59Thursday, March 18, 2010

2 59Thursday, March 18, 2010

E

0.1

0.1

0.1

5

4

3

2

1

B+

Ipeak=5A, Imax=3.5A, Iocp min=7.9

DESIGN CURRENT 5A

+5VALW

SUSP

D D

N-CHANNEL

DESIGN CURRENT 4A

+5VS

SI4800

TPS51125RGER

Ipeak=5A, Imax=3.5A, Iocp min=7.7

WOL_EN#

P-CHANNEL

AO-3413

SUSP

N-CHANNEL

SI4800

P-CHANNEL

C C

AO-3413

P-CHANNEL

AO-3413

P-CHANNEL

AO-3413

VR_ON

ISL62883

SUSP#

ISL6268

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

VGA_ENVDD

DESIGN CURRENT 1.5A

BT_PWR#

DESIGN CURRENT 180mA

PCIE_OK

DESIGN CURRENT 100mA

DESIGN CURRENT 52A

DESIGN CURRENT 26A

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+BT_VCC

+3VS_DELAY

+CPU_CORE

+VGA_CORE

VTTP_EN#

B B

ISL6268

SYSON

ISL6268

Ipeak=18A, Imax=12.6A, Iocp min=19.8

Ipeak=15A, Imax=10.5A, Iocp min=16.5

SUSP

N-CHANNEL

SUSP

SUSP#

SI4856

APL5913

PCIE_OK

G2992F1U

TPS51117RGYR

A A

TPS51117RGYR

5

4

SUSP#

Ipeak=7A, Imax=4.9A, Iocp min=7.7

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

DESIGN CURRENT 18A

DESIGN CURRENT 15A

DESIGN CURRENT 12A

DESIGN CURRENT 1.5A

DESIGN CURRENT 2A

DESIGN CURRENT 8A

DESIGN CURRENT 7A

2

+VTT

+1.5V

+1.5V_CPU

+1.5VS

+0.75VS

+1.1VS

+1.8VS

+1.05VS

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power Tree

Power Tree

Power Tree

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

3 59Thursday, March 18, 2010

3 59Thursday, March 18, 2010

3 59Thursday, March 18, 2010

1

0.1

0.1

0.1

A

B

C

D

E

Voltage Rails

State

S0

S1

S3

S5 S4/AC

power
plane

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

EC SM Bus1 address

3 3

+3VL

Device

EC KB926 D3

Smart Battery+3VL

( O MEANS ON X MEANS OFF )

+RTCVCC

O

O

O

O

O

O

+B

O

O

O

O

O

X

+5VL

+3VL

O

O

O

O

O

X

+5VALW

+3VALW

+VSB

O

O

O

O

X

X

EC SM Bus2 address

Address Address

0001 011x b

PowerPower

+3VS

+3VS

+3VALW

Device

EC KB926 D3

AMD GPU Thermal Sensor

PCH

+1.5V

O

X X

X

X X

1001 101x b

1001 011x b

+5VS

+3VS

+1.5VS

+VGA_CORE

+CPU_CORE

+VTT

+1.05VS

+1.8VS

+1.1VS

+0.75VS

OO

OO

X

X

Platform

Calpella

SKU CPU

UMA

DIS
(OPT@)

Arrandale

HM55

Arrandale HM55 N11M-GE2

PCH

BOM configu table

SKU Description Bom configu

UMA W/O TPM W/HDMI

1

UMA W/O TPM W/O HDMI

2

DIS(N11M) W/HDMI W/TPM 1G VRAM

3

DIS(N11M) W/HDMI W/OTPM 1G VRAM

4

DIS(N11M) W/HDMI W/TPM 512MB VRAM

5

DIS(N11M) W/HDMI W/O TPM 512M VRAM

6

DIS(N11P) W/HDMI WTPM 1GB VRAM

7

DIS(N11P) W/HDMI W/O TPM 1GB VRAM8

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

SIGNAL

SLP_S3# SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

LOW LOW

HIGH HIGHHIGH

HIGH

LOW LOWLOW

HIGH

HIGH

UMA@/PCB@/HDMI@/NTPM@

UMA@/PCB@/NHDMI@/NTPM@ 45188030L02

NTPM@/PCB@/OPT@/N11M@/HY1G@/HDMI@

TPM@/PCB@/OPT@/N11M@/HY512@/HDMI@/512@/8PCS@

VGA
N/A

45188030L01

45188030L12

45188030L11

PCH SM Bus address

Power

Device

PCH

+3VALW

Clock Generator

+3VS

DDR DIMMA

+3VS

DDR DIMMB

+3VS

WLAN

+3VS

4 4

A

Address

1101 001x b

1001 000x b

1001 010x b

Reserved for
common design.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

4 59Thursday, March 18, 2010

4 59Thursday, March 18, 2010

4 59Thursday, March 18, 2010

E

0.1

0.1

0.1

5

@

@

@

@

D D

+VTT

R10

R10
68_0402_5%

68_0402_5%

@

@

1 2

H_CPURST#

+1.5V

C C

R29

R29
750_0402_1%

750_0402_1%

R28

R28

1.1K_0402_1%

1.1K_0402_1%

@

@

1 2

R29

R29
3K_0402_1%

3K_0402_1%

@

@

1 2

C4871000P_0402_50V7K

C4871000P_0402_50V7K

12

C4881000P_0402_50V7K

C4881000P_0402_50V7K

12

DRAMPWROK

DRAMPWROK

VTTPWROK_CPU

H_PWRGOOD33

BUF_PLT_RST#32,38

+VTT

1 2

R18 49.9_0402_1%R18 49.9_0402_1%

PECI33

Power has removed VR_TT#

H_THERMTRIP#33

PMSYNCH30

DRAMPWROK30

VTTPWROK_CPU51

+VTT

1 2

R9 68_0402_5%R9 68_0402_5%

1 2

4

1 2

R1 20_0402_1%R1 20_0402_1%

1 2

R2 20_0402_1%R2 20_0402_1%

1 2

R4 49.9_0402_1%R4 49.9_0402_1%

1 2

R3 49.9_0402_1%R3 49.9_0402_1%

T41PAD T41PAD

H_PWRGOOD1_R

12

R250_0402_5% R250_0402_5%

H_PWRGOOD

DRAMPWROK

VTTPWROK_CPU

BUF_PLT_RST#_R

R301.5K_0402_1% R301.5K_0402_1%

R31

R31

750_0402_1%

750_0402_1%

H_COMP3

H_COMP2

H_COMP1

H_COMP0

TP_SKTOCC#

CATERR#

PECI

H_PROCHOT#

H_THERMTRIP#

H_CPURST#

PMSYNCH

12

JCPUB

JCPUB

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R0P9 CONN@

IC,AUB_CFD_rPGA,R0P9 CONN@

MISC THERMAL

MISC THERMAL

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

3

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

PRDY#
PREQ#

TCK
TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TDI

CLK_CPU_BCLK

A16

CLK_CPU_BCLK#

B16

AR30
AT30

CLK_PEG

E16

CLK_PEG#

D16

A18
A17

SM_DRAMRST#_CPU

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#_R

AP15

AT28
AP27

AN28
AP28
AT27

XDP_TDI_R

AT29

XDP_TDO_R

AR27

XDP_TDI_M

AR29

XDP_TDO_M

AP29

XDP_DBRESET#

AN25

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

2

CLK_CPU_BCLK 33
CLK_CPU_BCLK# 33

CLK_PEG 29
CLK_PEG# 29

Unused by Clarksfield rPGA989

R6 100_0402_1%R6 100_0402_1%

1 2

R7 24.9_0402_1%R7 24.9_0402_1%

1 2

R8 130_0402_1%R8 130_0402_1%

1 2

12

R12 0_0402_5%R12 0_0402_5%

Routed as a single daisy chain

R312 1K_0402_5%R312 1K_0402_5%

DDR3 Compensation Signals
Layout Note:Please these
resistors near Processor

PM_EXTTS# 11,12

12

+3VS

XDP_DBRESET# 30

Close to CPU for EMI

1

+VTT

PM_EXTTS#0

PM_EXTTS#_R

XDP_TDO

XDP_TDI_R XDP_TDI

XDP_TDO_M

XDP_TDI_M

XDP_TDO_R

R15 10K_0402_5%R15 10K_0402_5%

R13 10K_0402_5%R13 10K_0402_5%

R162 51_0402_5%R162 51_0402_5%

1 2

1 2

R20 0_0402_5%R20 0_0402_5%

@

@

1 2

R21 0_0402_5%

R21 0_0402_5%

12

R23

R23

0_0402_5%

0_0402_5%

@

@

1 2

R26 0_0402_5%

R26 0_0402_5%

1 2

R27 0_0402_5%R27 0_0402_5%

12

12

XDP_TDO

JTAG MAPPING

Scan Chain
(Default)

CPU Only

GMCH Only

STUFF -> R20, R23, R27
NO STUFF -> R21, R26

STUFF -> R20, R21
NO STUFF -> R23, R26, R27

STUFF -> R26, R27
NO STUFF -> R20, R21, R23

B B

VTTPWROK46,51

A A

VTTPWROK

5

For S3 CPU Power Saving

+3VALW

1 2

C163 0.1U_0402_16V4ZC163 0.1U_0402_16V4Z

5

U10

U10

1

P

IN1

4

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

3

@

@

12

R52 0_0402_5%

R52 0_0402_5%

R33 1.5K_0402_1%R33 1.5K_0402_1%

12

DRAMPWROK

SM_DRAMRST#_CPU

4

@

@

12

R19 0_0402_5%

R19 0_0402_5%

D

S

D

S

12

R123

R123

100K_0402_5%

100K_0402_5%

Add C140 for RST_GATE Glitch issue

13

G

G

Q41

Q41

2

2N7002_SOT23-3

2N7002_SOT23-3

1

C140

C140

0.047U_0402_25V6K

0.047U_0402_25V6K

2

SM_DRAMRST# 11,12

RST_GATE 33

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU_CLK/MISC/JTAG/XDP

CPU_CLK/MISC/JTAG/XDP

CPU_CLK/MISC/JTAG/XDP

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

1

5 57Friday, March 19, 2010

5 57Friday, March 19, 2010

5 57Friday, March 19, 2010

0.1

0.1

0.1

5

4

3

+5VS

2

FAN Control Circuit

1

1A

JFAN

2

1

1

JFAN

1

1

2

2

3

3

4

GND

5

GND

ACES_85205-03001

ACES_85205-03001

CONN@

CONN@

R34 10K_0402_5%R34 10K_0402_5%

12

+3VS

FAN_SPEED1 43

6 57Friday, March 19, 2010

6 57Friday, March 19, 2010

6 57Friday, March 19, 2010

0.1

0.1

0.1

2

C3

C3

10U_0805_10V4Z

D D

EN_DFAN143

JCPUA

JCPUA

DMI_PTX_CRX_N030
DMI_PTX_CRX_N130
DMI_PTX_CRX_N230
DMI_PTX_CRX_N330

DMI_PTX_CRX_P030
DMI_PTX_CRX_P130
DMI_PTX_CRX_P230
DMI_PTX_CRX_P330

DMI_CTX_PRX_N030

C C

B B

A A

DMI_CTX_PRX_N130
DMI_CTX_PRX_N230
DMI_CTX_PRX_N330

DMI_CTX_PRX_P030
DMI_CTX_PRX_P130
DMI_CTX_PRX_P230
DMI_CTX_PRX_P330

FDI_CTX_PRX_N030
FDI_CTX_PRX_N130
FDI_CTX_PRX_N230
FDI_CTX_PRX_N330
FDI_CTX_PRX_N430
FDI_CTX_PRX_N530
FDI_CTX_PRX_N630
FDI_CTX_PRX_N730

FDI_CTX_PRX_P030
FDI_CTX_PRX_P130
FDI_CTX_PRX_P230
FDI_CTX_PRX_P330
FDI_CTX_PRX_P430
FDI_CTX_PRX_P530
FDI_CTX_PRX_P630
FDI_CTX_PRX_P730

FDI_FSYNC030
FDI_FSYNC130

FDI_INT30

FDI_LSYNC030
FDI_LSYNC130

5

DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N3

DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD_rPGA,R0P9 CONN@

IC,AUB_CFD_rPGA,R0P9 CONN@

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]

PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

4

PEG_COMP

B26
A26
B27

PEG_RBIAS

A25

PCIE_GTX_C_CRX_N15

K35

PCIE_GTX_C_CRX_N14

J34

PCIE_GTX_C_CRX_N13

J33

PCIE_GTX_C_CRX_N12

G35

PCIE_GTX_C_CRX_N11

G32

PCIE_GTX_C_CRX_N10

F34

PCIE_GTX_C_CRX_N9

F31

PCIE_GTX_C_CRX_N8

D35

PCIE_GTX_C_CRX_N7

E33

PCIE_GTX_C_CRX_N6

C33

PCIE_GTX_C_CRX_N5

D32

PCIE_GTX_C_CRX_N4

B32

PCIE_GTX_C_CRX_N3

C31

PCIE_GTX_C_CRX_N2

B28

PCIE_GTX_C_CRX_N1

B30

PCIE_GTX_C_CRX_N0

A31

PCIE_GTX_C_CRX_P15

J35

PCIE_GTX_C_CRX_P14

H34

PCIE_GTX_C_CRX_P13

H33

PCIE_GTX_C_CRX_P12

F35

PCIE_GTX_C_CRX_P11

G33

PCIE_GTX_C_CRX_P10

E34

PCIE_GTX_C_CRX_P9

F32

PCIE_GTX_C_CRX_P8

D34

PCIE_GTX_C_CRX_P7

F33

PCIE_GTX_C_CRX_P6

B33

PCIE_GTX_C_CRX_P5

D31

PCIE_GTX_C_CRX_P4

A32

PCIE_GTX_C_CRX_P3

C30

PCIE_GTX_C_CRX_P2

A28

PCIE_GTX_C_CRX_P1

B29

PCIE_GTX_C_CRX_P0

A30

PCIE_CTX_GRX_N15

L33

PCIE_CTX_GRX_N14

M35

PCIE_CTX_GRX_N13

M33

PCIE_CTX_GRX_N12

M30

PCIE_CTX_GRX_N11

L31

PCIE_CTX_GRX_N10

K32

PCIE_CTX_GRX_N9

M29

PCIE_CTX_GRX_N8

J31

PCIE_CTX_GRX_N7

K29

PCIE_CTX_GRX_N6

H30

PCIE_CTX_GRX_N5

H29

PCIE_CTX_GRX_N4

F29

PCIE_CTX_GRX_N3

E28

PCIE_CTX_GRX_N2

D29

PCIE_CTX_GRX_N1

D27

PCIE_CTX_GRX_N0

C26

PCIE_CTX_GRX_P15

L34

PCIE_CTX_GRX_P14

M34

PCIE_CTX_GRX_P13

M32

PCIE_CTX_GRX_P12

L30

PCIE_CTX_GRX_P11

M31

PCIE_CTX_GRX_P10

K31

PCIE_CTX_GRX_P9

M28

PCIE_CTX_GRX_P8

H31

PCIE_CTX_GRX_P7

K28

PCIE_CTX_GRX_P6

G30

PCIE_CTX_GRX_P5

G29

PCIE_CTX_GRX_P4

F28

PCIE_CTX_GRX_P3

E27

PCIE_CTX_GRX_P2

D28

PCIE_CTX_GRX_P1

C27

PCIE_CTX_GRX_P0

C25

1 2

R38 49.9_0402_1%R38 49.9_0402_1%

1 2

R39 750_0402_1%R39 750_0402_1%

C39 0.1U_0402_16V7KOPT@C39 0.1U_0402_16V7KOPT@
C40 0.1U_0402_16V7KOPT@C40 0.1U_0402_16V7KOPT@
C41 0.1U_0402_16V7KOPT@C41 0.1U_0402_16V7KOPT@
C42 0.1U_0402_16V7KOPT@C42 0.1U_0402_16V7KOPT@
C43 0.1U_0402_16V7KOPT@C43 0.1U_0402_16V7KOPT@
C44 0.1U_0402_16V7KOPT@C44 0.1U_0402_16V7KOPT@
C45 0.1U_0402_16V7KOPT@C45 0.1U_0402_16V7KOPT@
C46 0.1U_0402_16V7KOPT@C46 0.1U_0402_16V7KOPT@
C47 0.1U_0402_16V7KOPT@C47 0.1U_0402_16V7KOPT@
C48 0.1U_0402_16V7KOPT@C48 0.1U_0402_16V7KOPT@
C49 0.1U_0402_16V7KOPT@C49 0.1U_0402_16V7KOPT@
C50 0.1U_0402_16V7KOPT@C50 0.1U_0402_16V7KOPT@
C51 0.1U_0402_16V7KOPT@C51 0.1U_0402_16V7KOPT@
C52 0.1U_0402_16V7KOPT@C52 0.1U_0402_16V7KOPT@
C53 0.1U_0402_16V7KOPT@C53 0.1U_0402_16V7KOPT@
C54 0.1U_0402_16V7KOPT@C54 0.1U_0402_16V7KOPT@

C55 0.1U_0402_16V7KOPT@C55 0.1U_0402_16V7KOPT@
C56 0.1U_0402_16V7KOPT@C56 0.1U_0402_16V7KOPT@
C57 0.1U_0402_16V7KOPT@C57 0.1U_0402_16V7KOPT@
C58 0.1U_0402_16V7KOPT@C58 0.1U_0402_16V7KOPT@
C59 0.1U_0402_16V7KOPT@C59 0.1U_0402_16V7KOPT@
C60 0.1U_0402_16V7KOPT@C60 0.1U_0402_16V7KOPT@
C61 0.1U_0402_16V7KOPT@C61 0.1U_0402_16V7KOPT@
C62 0.1U_0402_16V7KOPT@C62 0.1U_0402_16V7KOPT@
C63 0.1U_0402_16V7KOPT@C63 0.1U_0402_16V7KOPT@
C64 0.1U_0402_16V7KOPT@C64 0.1U_0402_16V7KOPT@
C65 0.1U_0402_16V7KOPT@C65 0.1U_0402_16V7KOPT@
C66 0.1U_0402_16V7KOPT@C66 0.1U_0402_16V7KOPT@
C67 0.1U_0402_16V7KOPT@C67 0.1U_0402_16V7KOPT@
C68 0.1U_0402_16V7KOPT@C68 0.1U_0402_16V7KOPT@
C69 0.1U_0402_16V7KOPT@C69 0.1U_0402_16V7KOPT@
C70 0.1U_0402_16V7KOPT@C70 0.1U_0402_16V7KOPT@

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

Issued Date

Issued Date

Issued Date

PCIE_GTX_C_CRX_N[0..15] 13

PCIE_GTX_C_CRX_P[0..15] 13

PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N10

PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N0

PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P10

PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P0

Compal Secret Data

Compal Secret Data

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

Compal Secret Data

+FAN1

10mil

Deciphered Date

Deciphered Date

Deciphered Date

1

C5

C5
10U_0805_10V4Z

10U_0805_10V4Z

2

PCIE_CTX_C_GRX_N[0..15] 13

PCIE_CTX_C_GRX_P[0..15] 13

U1

U1

1

EN

GND

2

VIN

GND

3

VOUT

GND

4

VSET

GND

APL5607KI-TRG_SO8

APL5607KI-TRG_SO8

2

10U_0805_10V4Z

1

8
7
6
5

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

+FAN1

2

C4

C4
1000P_0402_25V8J

1000P_0402_25V8J

@

@

1

C6

0.01U_0402_16V7K

0.01U_0402_16V7K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

C6

@

@

CPU_DMI/FDI/PEG/FAN

CPU_DMI/FDI/PEG/FAN

CPU_DMI/FDI/PEG/FAN

5

JCPUC

JCPUC

DDR_A_D[0..63]11

4

3

JCPUD

JCPUD

DDR_B_D[0..63]12

2

1

DDRA_CLK0

AA6

SA_CK[0]

SA_CK#[0]

DDR_A_D0
DDR_A_D1

D D

C C

B B

DDR_A_BS011
DDR_A_BS111
DDR_A_BS211

DDR_A_CAS#11
DDR_A_RAS#11

DDR_A_WE#11

DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

A10

C10

B10

D10

E10

F10

H10

G10

AH5
AF5
AK6
AK7
AF6
AG5

AJ7
AJ6

AJ10

AJ9
AL10
AK12

AK8

AL7
AK11

AL8

AN8
AM10
AR11

AL11

AM9

AN9

AT11

AP12
AM12
AN12
AM13

AT14

AT12

AL13
AR14

AP14

AC3
AB2

AE1
AB3
AE9

C7
A7

A8
D8

E6
F7
E9
B7
E7
C6

G8

K7
J8

G7

J7

J10

L7
M6
M8

L9

L6

K8

N8

P9

U7

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

DDRA_CLK0#

AA7

DDRA_CKE0

P7

DDRA_CLK1

Y6

DDRA_CLK1#

Y5

DDRA_CKE1

P6

DDRA_SCS0# DDRB_SCS0#

AE2

DDRA_SCS1#

AE8

DDRA_ODT0 DDRB_ODT0

AD8

DDRA_ODT1

AF9

Unused by Clarksfield rPGA989

DDR_A_DM0

B9

DDR_A_DM1

D7

DDR_A_DM2

H7

DDR_A_DM3

M7

DDR_A_DM4

AG6

DDR_A_DM5

AM7

DDR_A_DM6

AN10

DDR_A_DM7

AN13

DDR_A_DQS#0

C9

DDR_A_DQS#1

F8

DDR_A_DQS#2

J9

DDR_A_DQS#3

N9

DDR_A_DQS#4

AH7

DDR_A_DQS#5

AK9

DDR_A_DQS#6

AP11

DDR_A_DQS#7

AT13

DDR_A_DQS0

C8

DDR_A_DQS1

F9

DDR_A_DQS2

H9

DDR_A_DQS3

M9

DDR_A_DQS4

AH8

DDR_A_DQS5

AK10

DDR_A_DQS6

AN11

DDR_A_DQS7

AR13

DDR_A_MA0

Y3

DDR_A_MA1

W1

DDR_A_MA2

AA8

DDR_A_MA3

AA3

DDR_A_MA4

V1

DDR_A_MA5

AA9

DDR_A_MA6

V8

DDR_A_MA7

T1

DDR_A_MA8

Y9

DDR_A_MA9

U6

DDR_A_MA10

AD4

DDR_A_MA11

T2

DDR_A_MA12

U3

DDR_A_MA13

AG8

DDR_A_MA14

T3

DDR_A_MA15

V9

DDRA_CLK0 11 DDRB_CLK0 12
DDRA_CLK0# 11
DDRA_CKE0 11 DDRB_CKE0 12

DDRA_CLK1 11
DDRA_CLK1# 11
DDRA_CKE1 11

DDRA_SCS0# 11
DDRA_SCS1# 11 DDRB_SCS1# 12

DDRA_ODT0 11 DDRB_ODT0 12
DDRA_ODT1 11 DDRB_ODT1 12

DDR_A_DM[0..7] 11

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11

DDR_B_BS012
DDR_B_BS112
DDR_B_BS212

DDR_B_CAS#12
DDR_B_RAS#12

DDR_B_WE#12

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

AF3
AG1

AK1
AG4
AG3

AH4
AK3

AK4
AM6
AN2

AK5

AK2
AM4
AM3

AP3
AN5

AT4
AN6
AN4
AN3

AT5

AT6
AN7

AP6

AP8

AT9

AT7

AP9

AR10
AT10

AB1

AC5

AC6

AJ3

AJ4

W5

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2

J6

J3
G1
G5

J2

J1

J5
K2

L3
M1
K5
K4
M4
N5

R7

Y7

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

DDRB_CLK0

W8

DDRB_CLK0#

W9
M3

V7
V6
M2

AB8
AD6

AC7
AD1

DDRB_CKE0

DDRB_CLK1
DDRB_CLK1#
DDRB_CKE1

DDRB_SCS1#

DDRB_ODT1

DDRB_CLK0# 12

DDRB_CLK1 12
DDRB_CLK1# 12
DDRB_CKE1 12

DDRB_SCS0# 12

Unused by Clarksfield rPGA989

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8

DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

DDR_B_DM[0..7] 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

DDR_B_MA[0..15] 12

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9

CONN@

CONN@

A A

Security Classification

Security Classification

Security Classification

200910/9 2010/01/23

200910/9 2010/01/23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9

CONN@

CONN@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU_DDR3

CPU_DDR3

CPU_DDR3

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

7 57Friday, March 19, 2010

7 57Friday, March 19, 2010

7 57Friday, March 19, 2010

1

0.1

0.1

0.1

5

4

3

2

1

Material Note (+VTT):

JCPUF

JCPUF

+CPU_CORE

D D

C C

B B

A A

Clarksfield: 65A Clarksfield: 21A

Auburndale:48A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

SENSE LINES

SENSE LINES

Auburndale:18A

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31

1.1V RAIL POWER

1.1V RAIL POWER

VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VTT_SELECT

ISENSE

VCC_SENSE

VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

G15

AN35

AJ34
AJ35

B15
A15

390uF/ 10mohm, number are 3,
power x1, HW x2

(Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)

C144 330U_D2_2V_Y

C144 330U_D2_2V_Y

1 2

+

+

C267 330U_D2_2V_Y

C267 330U_D2_2V_Y

1 2

+

+

C87 22U_0805_6.3V6MC87 22U_0805_6.3V6M

1 2

C91 22U_0805_6.3V6MC91 22U_0805_6.3V6M

1 2

H_PSI#

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

H_DPRSLPVR_R

H_VTTSELECT

IMVP_IMON

VCCSENSE_R
VSSSENSE_R

VTT_SENSE
VSS_SENSE_VTT

1 2

R62 0_0402_5%R62 0_0402_5%

R65 0_0402_5%R65 0_0402_5%

1 2

R66 0_0402_5%R66 0_0402_5%

1 2

T64 PADT64 PAD

VTT_SENSE 51

H_PSI# 54

CPU_VID0 54
CPU_VID1 54
CPU_VID2 54
CPU_VID3 54
CPU_VID4 54
CPU_VID5 54
CPU_VID6 54

H_DPRSLPVR 54

IMVP_IMON 54

+VTT

C81 10U_0805_10V4KC81 10U_0805_10V4K

1 2

C83 10U_0805_10V4KC83 10U_0805_10V4K

1 2

C85 10U_0805_10V4KC85 10U_0805_10V4K

1 2

C89 10U_0805_10V4KC89 10U_0805_10V4K

1 2

C88 10U_0805_10V4KC88 10U_0805_10V4K

1 2

C90 10U_0805_10V4KC90 10U_0805_10V4K

1 2

C92 10U_0805_10V4KC92 10U_0805_10V4K

1 2

C94 10U_0805_10V4K

C94 10U_0805_10V4K

1 2

@

@

CRB default setting:
VID[6:0]=[0100111]

VTT Rail

Auburndale +1.1VS_VTT=1.05V
Clarksfield +1.1VS_VTT=1.1V

H_VTTSELECT = low, 1.1V

H_VTTSELECT = high, 1.05V

1 2

R64 100_0402_1%R64 100_0402_1%

VCCSENSE
VSSSENSE

1 2

R67 100_0402_1%R67 100_0402_1%

Close to CPU

VCCSENSE 54
VSSSENSE 54

+CPU_CORE

+CPU_CORE

10U_0805_10V4K

10U_0805_10V4K

1

C71

C71

2

10U_0805_10V4K

10U_0805_10V4K

1

C72

C72

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C73

C73

2

1

2

1

C75

C75

C74

C74

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C76

C76

2

10U_0805_10V4K

10U_0805_10V4K

(Place these capacitors under CPU socket, top layer)

+CPU_CORE

10U_0805_10V4K

10U_0805_10V4K

1

C98

C98

2

10U_0805_10V4K

10U_0805_10V4K

1

C99

C99

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C100

C100

2

1

C101

C101

2

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

10U_0805_10V4K

1

C102

C102

2

(Place these capacitors on CPU cavity, Bottom Layer)

+CPU_CORE

22U_0805_6.3V6M

1

1

C107

C107

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C113

C113

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C108

C108

C109

C109

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C114

C114

C115

C115

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C110

C110

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C116

C116

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C106

C106

C105

C105

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C112

C112

C111

C111

2

22U_0805_6.3V6M

22U_0805_6.3V6M

TOP side (under inductor)

+CPU_CORE

330U_D2_2V_Y

330U_D2_2V_Y

1

+

+

C121

C121

2

+

+

1

C122

C122

2

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

330U_D2_2V_Y

1

+

+

C123

C123

2

1

+

+

C124

C124

2

330U_D2_2V_Y

330U_D2_2V_Y

Check list:

+CPU_CORE: 6x 470uF, 12x 22uF, 17x 10uF

+VTT: 4x 330uF, 7x 22uF, 8x 10uF

10U_0805_10V4K

10U_0805_10V4K

1

1

C77

C77

2

2

1

1

C103

C103

C104

C104

2

2

10U_0805_10V4K

10U_0805_10V4K

1

C78

C78

C79

C79

2

10U_0805_10V4K

10U_0805_10V4K

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9

CONN@

CONN@

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU_POWER-1

CPU_POWER-1

CPU_POWER-1

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

1

8 57Friday, March 19, 2010

8 57Friday, March 19, 2010

8 57Friday, March 19, 2010

0.1

0.1

0.1

5

4

3

2

1

For EMI

+GFX_CORE

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

12

C279

C279

@

D D

330U_D2_2VM_R6M

330U_D2_2VM_R6M

C C

B B

A A

47P_0402_50V8J

47P_0402_50V8J

C271

C271

@

+GFX_CORE

1

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

47P_0402_50V8J

12

C280

C280

@

@

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C249

C249

2

C281

C281

@

@

1

C266

C266

2

12

C272

C272

@

@

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C247

C247

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C286

C286

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C141

C141

C146

C146

10U_0805_6.3V6M

10U_0805_6.3V6M

C250

C250

+VTT

1

2

+VTT

1

2

1

C248

C248

2

1

C142

C142

22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C147

C147

22U_0805_6.3V6M

22U_0805_6.3V6M

2

12

47P_0402_50V8J

47P_0402_50V8J

(Place these capacitors under CPU socket, top layer)

JCPUG

JCPUG

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16

AJ21
AJ19
AJ18

AJ16
AH21
AH19
AH18
AH16

H25

VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

J24

VTT1_45

J23

VTT1_46
VTT1_47

22A

GRAPHICS

GRAPHICS

Clarksfield: 5A

Auburndale:3A

FDI PEG & DMI

FDI PEG & DMI

SENSE

LINES

SENSE

LINES

GRAPHICS VIDs

GRAPHICS VIDs

POWER

POWER

Clarksfield: 21A

Auburndale:18A

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

Clarksfield: 1.35A

Auburndale:1.35A

IC,AUB_CFD_rPGA,R0P9 CONN@

IC,AUB_CFD_rPGA,R0P9 CONN@

VCC_AXG_SENSE_R

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

1U_0402_6.3V4Z

1U_0402_6.3V4Z

VSS_AXG_SENSE_R

GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6

GFXVR_EN

GFXVR_DPRSLPVR
GFXVR_IMON

+1.8VS_H_PLL

VAXG_SENSE

VSSAXG_SENSE

GFX_DPRSLPVR

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

1.1V1.8V

1.1V1.8V

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C133

C133

C134

C134

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VTT

1

C143

C143

10U_0805_10V4K

10U_0805_10V4K

2

1

C145

C145

22U_0805_6.3V6M

22U_0805_6.3V6M

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C151

C151

2

Close to CPU

R117 0_0402_5%R117 0_0402_5%

1 2

R142 0_0402_5%R142 0_0402_5%

1 2

GFXVR_VID_0 55
GFXVR_VID_1 55
GFXVR_VID_2 55
GFXVR_VID_3 55
GFXVR_VID_4 55
GFXVR_VID_5 55
GFXVR_VID_6 55

GFXVR_EN 55

T54 PADT54 PAD

GFXVR_IMON 55

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C135

C135

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

C136

C136

1

C137

C137

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1 2

R509 100_0402_1%R509 100_0402_1%

1 2

R510 100_0402_1%R510 100_0402_1%

Change R136 to 330 ohm
for GFX issue

1 2

R136 330_0402_5%R136 330_0402_5%

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C138

C138

C139

C139

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+GFX_CORE

VCC_AXG_SENSE 55
VSS_AXG_SENSE 55

1

1

+

+

C216

C216

2

2

330U_D2_2V_Y

330U_D2_2V_Y

+1.5V_CPU

(Place these capacitors under CPU socket Edge, top layer)

+VTT

(Place these capacitors under CPU socket, top layer)

4.7U_0603_6.3V6K

1

C152

C152

2

4.7U_0603_6.3V6K

1

C153

C153

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

C154

C154

R71 0_0805_5%R71 0_0805_5%

1

C155

C155

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+1.8VS

12

R424

R424

470_0603_5%

470_0603_5%

Q46B

Q46B

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

1

C179

C179
10U_0805_10V4K

10U_0805_10V4K

1 2

2

3

0.1U_0402_25V6

0.1U_0402_25V6

4

C476

C476

1

2

For S3 CPU Power Saving

1
2
3
4

FDS6676AS_SO8

FDS6676AS_SO8

12

R418

R418
820K_0402_5%

820K_0402_5%

PJ30

2

JUMP_43X79

JUMP_43X79

PJ31

2

JUMP_43X79

JUMP_43X79

Q33

Q33

S
S
S
G

@PJ30

@

112

@PJ31

@

112

8

D

7

D

6

D

5

D

R419

R419

1 2

220K_0402_5%

220K_0402_5%

61

Q46A

Q46A

SUSPSUSP

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+1.5V

@

@

1

C257

C257

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5V+1.5V_CPU

+VSB

SUSP 46,53

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU_POWER-2

CPU_POWER-2

CPU_POWER-2

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

1

9 57Friday, March 19, 2010

9 57Friday, March 19, 2010

9 57Friday, March 19, 2010

0.1

0.1

0.1

5

JCPUI

JCPUI

K27

VSS161

K9

VSS162

K6

VSS163

D D

C C

B B

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

IC,AUB_CFD_rPGA,R0P9 CONN@

IC,AUB_CFD_rPGA,R0P9 CONN@

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

H_NCTF1
H_NCTF2

H_NCTF6
H_NCTF7

PADT4PAD
PADT5PAD

PADT6PAD
PADT7PAD

4

JCPUH

JCPUH

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

T4
T5

T6
T7

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

IC,AUB_CFD_rPGA,R0P9 CONN@

IC,AUB_CFD_rPGA,R0P9 CONN@

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

3

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

2

PADT9PAD

T9

PADT8PAD

T8

WW41 Recommend not pull down
PCIE2.0 Jitter is over on ES1

R743.01K_0402_1% @R743.01K_0402_1% @

1 2

R753.01K_0402_1% R753.01K_0402_1%

1 2

R763.01K_0402_1% @R763.01K_0402_1% @

1 2

Reserve via for test

CFG0 - PCI-Express Configuration Select

*1:Single PEG
0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

*1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

*1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11

CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

JCPUE

JCPUE

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

RSVD9

H17

RSVD10

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,AUB_CFD_rPGA,R0P9

IC,AUB_CFD_rPGA,R0P9

CONN@

CONN@

(SA_DIMM_VREF)
(SB_DIMM_VREF)

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD_NCTF_37

RSVD38
RSVD39

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD58

RSVD_TP_59
RSVD_TP_60

RESERVED

RESERVED

RSVD62

RSVD63

RSVD64

RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

KEY

VSS

1

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2
D15
C15
AJ15
AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

*:Default

A A

Security Classification

Security Classification

Security Classification

200910/9 2010/01/23

200910/9 2010/01/23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU_GND/RESERVED

CPU_GND/RESERVED

CPU_GND/RESERVED

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

10 57Thursday, March 18, 2010

10 57Thursday, March 18, 2010

10 57Thursday, March 18, 2010

1

0.1

0.1

0.1

5

+VREF_DQA

1

C157

C157

C156

C156

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

D D

Close to JDDRL.1

DDR_A_D0
DDR_A_D1

1

DDR_A_DM0

2

DDR_A_D2
DDR_A_D3

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

+1.5V +1.5V

JDIMM1

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

RESET#

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21
DQS#3

DQS3

VSS24

DQ30
DQ31

VSS26

4

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12
14

DDR_A_D6

16

DDR_A_D7

18
20

DDR_A_D12

22

DDR_A_D13

24
26

DDR_A_DM1

28

SM_DRAMRST#

30
32

DDR_A_D14

34

DDR_A_D15

36
38

DDR_A_D20

40

DDR_A_D21

42
44

DDR_A_DM2

46
48

DDR_A_D22

50

DDR_A_D23

52
54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64
66

DDR_A_D30

68

DDR_A_D31

70
72

+1.5V

12

R80

R80

1K_0402_1%

1K_0402_1%

For S3 CPU Power Saving

3

SM_DRAMRST# 5,12

DDR_A_DQS[0..7] 7

DDR_A_DQS#[0..7] 7

DDR_A_D[0..63] 7

DDR_A_DM[0..7] 7

DDR_A_MA[0..15] 7

2

M1@: Arrandale

+VREF_DQA

+VREF_DQB

12

R920_0402_5% R920_0402_5%

12

R930_0402_5% R930_0402_5%

1

+V_DDR3_DIMM_REF

+1.5V

12

1K_0402_1%

1K_0402_1%

12

1K_0402_1%

1K_0402_1%

R79

R79

R81

R81

DDRA_CKE0

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

DDRA_CLK0
DDRA_CLK0#

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13
DDRA_SCS1#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

R90

R90

1 2

10K_0402_5%

10K_0402_5%

1

2

R91

R91

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

+0.75VS

12

10K_0402_5%

10K_0402_5%

+3VS

C181

C181

DDRA_CKE07

DDR_A_BS27

DDRA_CLK07
DDRA_CLK0#7

DDR_A_BS07

DDR_A_WE#7

DDR_A_CAS#7

DDRA_SCS1#7

1

C182

C182

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

C C

B B

A A

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

VREF_CA

EVENT#

TYCO_2-2013289-1

TYCO_2-2013289-1

CONN@

CONN@

CKE1
VDD2

A15
A14

VDD4

A11

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

SDA

SCL

VTT2

A7

A6
A4

A2
A0

G2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDRA_CKE1

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDRA_CLK1
DDRA_CLK1#

DDR_A_BS1
DDR_A_RAS#

DDRA_SCS0#
DDRA_ODT0

DDRA_ODT1

+DDR_VREF_CA_DIMMA

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

PM_EXTTS#
PM_SMBDATA
PM_SMBCLK

+0.75VS

4

DDRA_CKE1 7

DDRA_CLK1 7
DDRA_CLK1# 7

DDR_A_BS1 7
DDR_A_RAS# 7

DDRA_SCS0# 7
DDRA_ODT0 7

DDRA_ODT1 7

1

C161

C161

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

close to JDDRL.126

PM_EXTTS#
PM_SMBDATA
PM_SMBCLK

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+V_DDR3_DIMM_REF

R89

R89

1 2

0_0402_5%

0_0402_5%

1

C162

C162

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PM_EXTTS# 5,12

PM_SMBDATA 12,25,29,39
PM_SMBCLK 12,25,29,39

Issued Date

Issued Date

Issued Date

Layout Note:
Place near JDDRL

+1.5V

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

3

C218

C218

1 2

+

+

330U_D2_2V_Y

330U_D2_2V_Y

C166 10U_0805_6.3V6MC166 10U_0805_6.3V6M

1 2

C168 10U_0805_6.3V6MC168 10U_0805_6.3V6M

1 2

C171 10U_0805_6.3V6MC171 10U_0805_6.3V6M

1 2

C174 10U_0805_6.3V6MC174 10U_0805_6.3V6M

1 2

C176 10U_0805_6.3V6MC176 10U_0805_6.3V6M

1 2

C178 10U_0805_6.3V6MC178 10U_0805_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMA

+1.5V +0.75VS

C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z

C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z

C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z

C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z

1 2

1 2

1 2

1 2

2

Layout Note:
Place near JDDRL1.203 and 204

C165 10U_0805_6.3V6MC165 10U_0805_6.3V6M

1 2

C169 1U_0402_6.3V4ZC169 1U_0402_6.3V4Z

12

C172 1U_0402_6.3V4ZC172 1U_0402_6.3V4Z

12

C175 1U_0402_6.3V4ZC175 1U_0402_6.3V4Z

12

C177 1U_0402_6.3V4ZC177 1U_0402_6.3V4Z

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM0

DDRIII-SODIMM0

DDRIII-SODIMM0

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

11 57Friday, March 19, 2010

11 57Friday, March 19, 2010

11 57Friday, March 19, 2010

1

0.1

0.1

0.1

A

JDIMM2

+VREF_DQB

1

2

C183

1 1

C183

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

close to JDDRH.1

DDR_B_D0
DDR_B_D1

DDR_B_DM0

1

DDR_B_D2
DDR_B_D3

2

DDR_B_D8

C184

C184

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

DQ4

DQ5
VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

RESET#

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21
DQS#3

DQS3

VSS24

DQ30
DQ31

VSS26

B

+1.5V+1.5V

2

DDR_B_D4

4

DDR_B_D5

6
8

DDR_B_DQS#0

10

DDR_B_DQS0

12
14

DDR_B_D6

16

DDR_B_D7

18
20

DDR_B_D12

22

DDR_B_D13

24
26

DDR_B_DM1

28

SM_DRAMRST#

30
32

DDR_B_D14

34

DDR_B_D15

36
38

DDR_B_D20

40

DDR_B_D21

42
44

DDR_B_DM2

46
48

DDR_B_D22

50

DDR_B_D23

52
54

DDR_B_D28

56

DDR_B_D29

58
60

DDR_B_DQS#3

62

DDR_B_DQS3

64
66

DDR_B_D30

68

DDR_B_D31

70
72

SM_DRAMRST# 5,11

C

DDR_B_DQS#[0..7] 7

DDR_B_DQS[0..7] 7

DDR_B_D[0..63] 7

DDR_B_DM[0..7] 7

DDR_B_MA[0..15] 7

D

E

R98

R98
10K_0402_5%

10K_0402_5%

R99

R99

1 2

10K_0402_5%

10K_0402_5%

A

DDRB_CKE0

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

DDRB_CLK0
DDRB_CLK0#

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDRB_SCS1#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

1 2

+0.75VS +0.75VS

+3VS

DDRB_CKE07

DDR_B_BS27

DDRB_CLK07
DDRB_CLK0#7

DDR_B_BS07

DDR_B_WE#7
DDR_B_CAS#7

DDRB_SCS1#7

1

C207

C207

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C208

C208

2

2 2

3 3

4 4

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-2013310-1_204P

TYCO_2-2013310-1_204P

CONN@

CONN@

CKE1
VDD2

A15
A14

VDD4

A11

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL

VTT2

A7

A6
A4

A2
A0

G2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDRB_CKE1

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

DDRB_CLK1
DDRB_CLK1#

DDR_B_BS1
DDR_B_RAS#

DDRB_SCS0#
DDRB_ODT0

DDRB_ODT1

+DDR_VREF_CA_DIMMB

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

PM_EXTTS#
PM_SMBDATA
PM_SMBCLK

B

DDRB_CKE1 7

DDRB_CLK1 7
DDRB_CLK1# 7

DDR_B_BS1 7
DDR_B_RAS# 7

DDRB_SCS0# 7
DDRB_ODT0 7

DDRB_ODT1 7

1 2

0_0402_5%

0_0402_5%

1

1

2

C187

C187

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2

C188

C188

0.1U_0402_16V4Z

0.1U_0402_16V4Z

close to JDDRH.126

PM_EXTTS# 5,11

PM_SMBDATA 11,25,29,39
PM_SMBCLK 11,25,29,39

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+V_DDR3_DIMM_REF

R97

R97

Layout Note:
Place near JDDRH

+1.5V

200910/9 2010/01/23

200910/9 2010/01/23

200910/9 2010/01/23

C

@

@

+

+

C189 330U_B2_2.5VM_R15M

C189 330U_B2_2.5VM_R15M

1 2

C192 10U_0805_6.3V6MC192 10U_0805_6.3V6M

1 2

C194 10U_0805_6.3V6MC194 10U_0805_6.3V6M

1 2

C197 10U_0805_6.3V6MC197 10U_0805_6.3V6M

1 2

C200 10U_0805_6.3V6MC200 10U_0805_6.3V6M

1 2

C202 10U_0805_6.3V6MC202 10U_0805_6.3V6M

1 2

C204 10U_0805_6.3V6MC204 10U_0805_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMB

C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z

C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z

1 2

1 2

1 2

1 2

D

Layout Note:
Place near JDDRH.203 and 204

+0.75VS+1.5V

C191 10U_0805_6.3V6MC191 10U_0805_6.3V6M

1 2

C195 1U_0402_6.3V4ZC195 1U_0402_6.3V4Z

12

C198 1U_0402_6.3V4ZC198 1U_0402_6.3V4Z

12

C201 1U_0402_6.3V4ZC201 1U_0402_6.3V4Z

12

C203 1U_0402_6.3V4ZC203 1U_0402_6.3V4Z

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM1

DDRIII-SODIMM1

DDRIII-SODIMM1

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

12 57Friday, March 19, 2010

12 57Friday, March 19, 2010

12 57Friday, March 19, 2010

E

0.1

0.1

0.1

5

LV1

OPT@LV1

OPT@

+1.05VS_DGPU

D D

+1.05VS_DGPU

C C

1 2

100NH_LQW18ANR10J00D_5%_0603

100NH_LQW18ANR10J00D_5%_0603

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

LV2

OPT@LV2

OPT@

1 2

100NH_LQW18ANR10J00D_5%_0603

100NH_LQW18ANR10J00D_5%_0603

OPT@

OPT@

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

CV9

CV9

OPT@

OPT@

2

1

CV7

CV7

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV11

CV11

CV10

CV10

OPT@

OPT@

OPT@

OPT@

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

50mA

+SP_PLLVDD

1

CV8

CV8

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P11 PCIE_GTX_CRX_P11
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15

1

2

+PLLVDD

1

CV12

CV12

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CV13 0.1U_0402_16V7KOPT@CV13 0.1U_0402_16V7KOPT@
CV14 0.1U_0402_16V7KOPT@CV14 0.1U_0402_16V7KOPT@
CV15 0.1U_0402_16V7KOPT@CV15 0.1U_0402_16V7KOPT@
CV16 0.1U_0402_16V7KOPT@CV16 0.1U_0402_16V7KOPT@
CV17 0.1U_0402_16V7KOPT@CV17 0.1U_0402_16V7KOPT@
CV18 0.1U_0402_16V7KOPT@CV18 0.1U_0402_16V7KOPT@
CV19 0.1U_0402_16V7KOPT@CV19 0.1U_0402_16V7KOPT@
CV20 0.1U_0402_16V7KOPT@CV20 0.1U_0402_16V7KOPT@
CV21 0.1U_0402_16V7KOPT@CV21 0.1U_0402_16V7KOPT@
CV22 0.1U_0402_16V7KOPT@CV22 0.1U_0402_16V7KOPT@
CV23 0.1U_0402_16V7KOPT@CV23 0.1U_0402_16V7KOPT@
CV24 0.1U_0402_16V7KOPT@CV24 0.1U_0402_16V7KOPT@
CV25 0.1U_0402_16V7KOPT@CV25 0.1U_0402_16V7KOPT@
CV26 0.1U_0402_16V7KOPT@CV26 0.1U_0402_16V7KOPT@
CV27 0.1U_0402_16V7KOPT@CV27 0.1U_0402_16V7KOPT@
CV28 0.1U_0402_16V7KOPT@CV28 0.1U_0402_16V7KOPT@
CV29 0.1U_0402_16V7KOPT@CV29 0.1U_0402_16V7KOPT@
CV30 0.1U_0402_16V7KOPT@CV30 0.1U_0402_16V7KOPT@
CV31 0.1U_0402_16V7KOPT@CV31 0.1U_0402_16V7KOPT@
CV32 0.1U_0402_16V7KOPT@CV32 0.1U_0402_16V7KOPT@
CV33 0.1U_0402_16V7KOPT@CV33 0.1U_0402_16V7KOPT@
CV34 0.1U_0402_16V7KOPT@CV34 0.1U_0402_16V7KOPT@
CV35 0.1U_0402_16V7KOPT@CV35 0.1U_0402_16V7KOPT@
CV36 0.1U_0402_16V7KOPT@CV36 0.1U_0402_16V7KOPT@
CV37 0.1U_0402_16V7KOPT@CV37 0.1U_0402_16V7KOPT@
CV38 0.1U_0402_16V7KOPT@CV38 0.1U_0402_16V7KOPT@
CV39 0.1U_0402_16V7KOPT@CV39 0.1U_0402_16V7KOPT@
CV40 0.1U_0402_16V7KOPT@CV40 0.1U_0402_16V7KOPT@
CV41 0.1U_0402_16V7KOPT@CV41 0.1U_0402_16V7KOPT@
CV42 0.1U_0402_16V7KOPT@CV42 0.1U_0402_16V7KOPT@
CV43 0.1U_0402_16V7KOPT@CV43 0.1U_0402_16V7KOPT@
CV44 0.1U_0402_16V7KOPT@CV44 0.1U_0402_16V7KOPT@

Differential signal

B B

@

@

27M_SSC25

Add Level Shifter for
CLK_REQ_VGA# at DVT

A A

CLK_REQ_VGA#29

RV105 0_0402_5%

RV105 0_0402_5%

DGPU_PWR_EN33,46,56

5

1 2

1 2

RV110 0_0402_5%

RV110 0_0402_5%

RV124

RV124
10K_0402_5%

10K_0402_5%

OPT@

OPT@

1 2
2

G

G

QV2

OPT@

QV2

OPT@

1 3

D

S

D

S

2N7002_SOT23-3

2N7002_SOT23-3

@

@

XTALSSIN

+3VS_DGPU

PLTRST_VGA#32

27M_CLK25

RV26

RV26

10K_0402_5%

10K_0402_5%

OPT@

OPT@

RV118

RV118
10K_0402_5%

10K_0402_5%

OPT@

OPT@

1 2

CLK_REQ_GPU#

RV123

RV123
10K_0402_5%

10K_0402_5%

@

@

1 2

150mA

12

4

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

CLK_PCIE_VGA29

CLK_PCIE_VGA#29

RV16 200_0402_1%

RV16 200_0402_1%

RV103 0_0402_5%OPT@RV103 0_0402_5%OPT@

1 2

CRT

4

@

@

1 2

OPT@

OPT@

1 2

RV18 0_0402_5%

RV18 0_0402_5%

OPT@

OPT@

1 2

RV19 2.49K_0402_1%

RV19 2.49K_0402_1%

+PLLVDD

RV25 10K_0402_5%

RV25 10K_0402_5%

SMB_CLK_GPU14
SMB_DATA_GPU14

VGA_DDCCLK26
VGA_DDCDATA26

3

UV1A

PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15

PCIE_GTX_CRX_P0PCIE_GTX_C_CRX_P0
PCIE_GTX_CRX_N0
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N10

PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N15

CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_REQ_GPU#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

PLTRST_VGA_R#

+SP_PLLVDD

XTALIN

XTALOUT
XTALSSIN

OPT@

OPT@

12

SMB_CLK_GPU
SMB_DATA_GPU

VGA_DDCCLK
VGA_DDCDATA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

UV1A

AP17

PEX_RX0

AN17

PEX_RX0_N

AN19

PEX_RX1

AP19

PEX_RX1_N

AR19

PEX_RX2

AR20

PEX_RX2_N

AP20

PEX_RX3

AN20

PEX_RX3_N

AN22

PEX_RX4

AP22

PEX_RX4_N

AR22

PEX_RX5

AR23

PEX_RX5_N

AP23

PEX_RX6

AN23

PEX_RX6_N

AN25

PEX_RX7

AP25

PEX_RX7_N

AR25

PEX_RX8

AR26

PEX_RX8_N

AP26

PEX_RX9

AN26

PEX_RX9_N

AN28

PEX_RX10

AP28

PEX_RX10_N

AR28

PEX_RX11

AR29

PEX_RX11_N

AP29

PEX_RX12

AN29

PEX_RX12_N

AN31

PEX_RX13

AP31

PEX_RX13_N

AR31

PEX_RX14

AR32

PEX_RX14_N

AR34

PEX_RX15

AP34

PEX_RX15_N

AL17

PEX_TX0

AM17

PEX_TX0_N

AM18

PEX_TX1

AM19

PEX_TX1_N

AL19

PEX_TX2

AK19

PEX_TX2_N

AL20

PEX_TX3

AM20

PEX_TX3_N

AM21

PEX_TX4

AM22

PEX_TX4_N

AL22

PEX_TX5

AK22

PEX_TX5_N

AL23

PEX_TX6

AM23

PEX_TX6_N

AM24

PEX_TX7

AM25

PEX_TX7_N

AL25

PEX_TX8

AK25

PEX_TX8_N

AL26

PEX_TX9

AM26

PEX_TX9_N

AM27

PEX_TX10

AM28

PEX_TX10_N

AL28

PEX_TX11

AK28

PEX_TX11_N

AK29

PEX_TX12

AL29

PEX_TX12_N

AM29

PEX_TX13

AM30

PEX_TX13_N

AM31

PEX_TX14

AM32

PEX_TX14_N

AN32

PEX_TX15

AP32

PEX_TX15_N

AR16

PEX_REFCLK

AR17

PEX_REFCLK_N

AR13

PEX_CLKREQ_N

AJ17

PEX_TSTCLK_OUT

AJ18

PEX_TSTCLK_OUT_N

AM16

PEX_RST_N

AG21

PEX_TERMP

AE9

PLLVDD

AF9

SP_PLLVDD

AD9

VID_PLLVDD

B1

XTAL_IN

B2

XTAL_OUT

D1

XTAL_OUTBUFF

D2

XTAL_SSIN

E2

I2CS_SCL

E1

I2CS_SDA

E3

I2CC_SCL

E4

I2CC_SDA

G3

I2CB_SCL

G2

I2CB_SDA

G1

I2CA_SCL

G4

I2CA_SDA

F6

I2CH_SCL

G6

I2CH_SDA

N11P-GE1-A3 BGA 969P @

N11P-GE1-A3 BGA 969P @

Part 1 of 7

Part 1 of 7

GPIO

GPIO

DVO

DVO

PCI EXPRESS

PCI EXPRESS

MIOACAL_PD_VDDQ

MIOACAL_PU_GND

MIOBCAL_PD_VDDQ

MIOBCAL_PU_GND

CLK

CLK

DACs

DACs

I2C

I2C

Compal Secret Data

Compal Secret Data

2009/01/01 2010/01/01

2009/01/01 2010/01/01

2009/01/01 2010/01/01

3

Compal Secret Data

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23

MIOA_D0
MIOA_D1
MIOA_D2
MIOA_D3
MIOA_D4
MIOA_D5
MIOA_D6
MIOA_D7
MIOA_D8

MIOA_D9
MIOA_D10
MIOA_D11
MIOA_D12
MIOA_D13
MIOA_D14

MIOB_D0

MIOB_D1

MIOB_D2

MIOB_D3

MIOB_D4

MIOB_D5

MIOB_D6

MIOB_D7

MIOB_D8

MIOB_D9
MIOBD_10
MIOB_D11
MIOB_D12
MIOB_D13
MIOB_D14

MIOA_HSYNC

MIOA_VSYNC

MIOB_HSYNC

MIOB_VSYNC

MIOA_DE

MIOA_CTL3

MIOA_VREF

MIOB_DE

MIOB_CTL3

MIOB_VREF

MIOA_CLKIN

MIOA_CLKOUT

MIOB_CLKIN

MIOB_CLKOUT

MIOA_CLKOUT_N
MIOB_CLKOUT_N

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC
DACA_VSYNC

DACA_VDD
DACA_VREF
DACA_RSET

DACB_RED

DACB_GREEN

DACB_BLUE

DACB_HSYNC
DACB_VSYNC

DACB_VDD
DACB_VREF
DACB_RSET

Deciphered Date

Deciphered Date

Deciphered Date

K1
K2
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6

N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6

Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6

N3
L3

W1
W2

N2
P5
N5

Y5
W3
AF1

N4
R4

AE1
V4

T4
W4

U5
T5

AA7
AA6

AM15
AM14
AL14

AM13
AL13

AJ12
AK12
AK13

AK4
AL4
AJ4

AM1
AM2

AG7
AK6
AH7

+DACB_VDD

VGA_BL_PWM
VGA_ENVDD
VGA_ENBKL
GPU_VID0
GPU_VID1

THERM#_VGA

1 2

RV15 10K_0402_5%@RV15 10K_0402_5%@

1 2

RV17 10K_0402_5%@RV17 10K_0402_5%@

+DACA_VDD

1U_0402_6.3V4Z

1U_0402_6.3V4Z

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

VGA_CRT_HSYNC
VGA_CRT_VSYNC

+DACA_VDD
+DACA_VREF
DACA_RSET

RV27

RV27

124_0402_1%

124_0402_1%

CRT@

CRT@

RV31 10K_0402_5%

RV31 10K_0402_5%

OPT@

OPT@

TV1TV1
TV6TV6

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

12

2

GPU_VID0 56
GPU_VID1 56

THERM#_VGA 14

CV81

CV81

CRT@

CRT@

1

2

12

2

1

2

CV47

CV47

120mA

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

CV73

CV73

CV72

CV72

CRT@

CRT@

CRT@

CRT@

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VGA_CRT_R 26
VGA_CRT_G 26
VGA_CRT_B 26

VGA_CRT_HSYNC 26
VGA_CRT_VSYNC 26

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CRT@

CRT@

1

PCIE_GTX_C_CRX_P[0..15]6

PCIE_GTX_C_CRX_N[0..15]6

PCIE_CTX_C_GRX_P[0..15]6

PCIE_CTX_C_GRX_N[0..15]6

CV50

CV50
10K_0402_5%

10K_0402_5%

4700P_0402_25V7K

4700P_0402_25V7K

1

CV80

CV80

CV48

CV48

CRT@

CRT@

CRT@

CRT@

2

470P_0402_50V7K

470P_0402_50V7K

VGA_ENVDD

VGA_ENBKL

VGA_BL_PWM

SMB_CLK_GPU

SMB_DATA_GPU

THERM#_VGA

VGA_DDCDATA

VGA_DDCCLK

OPT@

OPT@

1

CV50

CV50

CRT@

CRT@

2

PCIE_GTX_C_CRX_P[0..15]

PCIE_GTX_C_CRX_N[0..15]

PCIE_CTX_C_GRX_P[0..15]

PCIE_CTX_C_GRX_N[0..15]

@

@

1 2

RV1 10K_0402_5%

RV1 10K_0402_5%

@

@

12

RV2 10K_0402_5%

RV2 10K_0402_5%

@

@

12

RV3 10K_0402_5%

RV3 10K_0402_5%

OPT@

OPT@

1 2

RV8 2.2K_0402_5%

RV8 2.2K_0402_5%

OPT@

OPT@

1 2

RV9 2.2K_0402_5%

RV9 2.2K_0402_5%

OPT@

OPT@

1 2

RV10 100K_0402_5%

RV10 100K_0402_5%

@

@

1 2

RV13 2.2K_0402_5%

RV13 2.2K_0402_5%

@

@

1 2

RV14 2.2K_0402_5%

RV14 2.2K_0402_5%

LV3

CRT@LV3

CRT@

1 2

MMZ1608D301BT_0603

MMZ1608D301BT_0603

1

CV51

CV51

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

CRT@

CRT@

2

+3VS_DGPU

+3VS_DGPU

1

CV49

CV49

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

CRT@

CRT@

2

Close to GPUInternal Thermal Sensor

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCIE/DAC/GPIO

PCIE/DAC/GPIO

PCIE/DAC/GPIO

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

CRT@

CRT@

1 2

RV20 150_0402_1%

RV20 150_0402_1%

CRT@

CRT@

1 2

RV21 150_0402_1%

RV21 150_0402_1%

CRT@

CRT@

1 2

RV23 150_0402_1%

RV23 150_0402_1%

UV1

OPT@

UV1

OPT@

N11M-GE2-B-B1 BGA 969P

N11M-GE2-B-B1 BGA 969P

1

13 59Friday, March 19, 2010

13 59Friday, March 19, 2010

13 59Friday, March 19, 2010

0.1

0.1

0.1

5

D D

C C

4

UV1D

AM11
AM12

AM8

AM10

AM9

AK10

AL10

AK11

AL11

AP13
AN13

AN8

AP8
AP10
AN10
AR11
AR10
AN11
AP11

AM7

AM6

AM5

AM3

AM4

AP1

AR2

AR8

AR7

AP7

AN7

AN5

AP5

AR5

AR4

AH6

AH5

AH4

AG4

AE6

AE5

AH1

AH2

AH3

AL8

AL5

AF4
AF5

AL2
AL3
AJ3
AJ2
AJ1

UV1D

IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N

IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N

IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N

IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N

IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N

IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N

Part 4 of 7

Part 4 of 7

LVDS/TMDS

LVDS/TMDS

3

NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26

NC

NC

NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48

VDD_SENSE_0
VDD_SENSE_1
VDD_SENSE_2

GND_SENSE_0
GND_SENSE_1
GND_SENSE_2

A2
A7
B7
C5
C7
D5
D6
D7
E5
E7
F4
G5
G11
G12
G14
G15
G27
G28
G24
G25
H32
J18
J19
J25
J26
L29
M7
M29
P6
P29
R29
U7
V6
Y4
AA4
AB4
AB7
AC5
AD6
AD29
AE29
AF6
AG6
AG20
AG29
AH29
AJ5
AK15
AL7

D35
P7
AD20

AD19
E35
R7

VDD_SENSE

THERM_D+

THERM_D-

@

@

1 2

RV37 0_0402_5%

RV37 0_0402_5%

VDD_SENSE 56

2

External VGA Thermal Sensor

+3VS_DGPU

OPT@

OPT@

12

CV53 0.1U_0402_16V4Z

CV53 0.1U_0402_16V4Z

CV54

CV54

1 2

OPT@

OPT@

2200P_0402_50V7K

2200P_0402_50V7K

+1.05VS_DGPU

UV2

UV2

1

VDD

2

3

2.2K_0402_5%

2.2K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

SCLK

D+

SDATA

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

ADM1032ARMZ-2REEL_MSOP8

OPT@

OPT@

+3VS_DGPU

RV22

RV22

RV24

RV24

2.2K_0402_5%

OPT@

OPT@

2.2K_0402_5%

OPT@

OPT@

1 2

1 2

OPT@

OPT@

QV1A

QV1A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

VGA_SMB_CK2 EC_SMB_CK2

VGA_SMB_DA2

RV35 0_0402_5%

RV35 0_0402_5%

RV36 0_0402_5%

RV36 0_0402_5%

8

7

6

5

2

@

@

1 2

@

@

1 2

Internal Thermal Sensor

RV33

RV33

0_0402_5%

0_0402_5%

@

@

VGA_SMB_CK2

VGA_SMB_DA2

THERM#_VGA

OPT@

OPT@

1 2

RV54 10K_0402_5%

RV54 10K_0402_5%

+3VS_DGPU

5

OPT@

OPT@

QV1B

QV1B

3

4

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

EC_SMB_DA2

12

12

RV34

RV34
0_0402_5%

0_0402_5%

@

@

Address: 0x9A H

THERM#_VGA 13

EC_SMB_CK2 29,43

EC_SMB_DA2 29,43

1

SMB_CLK_GPU 13

SMB_DATA_GPU 13

+3VS_DGPU

AP2

IFPC_AUX_I2CW_SCL

AN3

B B

OPT@

OPT@

+3VS_DGPU

STRAP024
STRAP124
STRAP224

A A

5

1 2

RV49 10K_0402_5%

RV49 10K_0402_5%

STRAP0
STRAP1
STRAP2

4

IFPC_AUX_I2CW_SDA_N

AP4

IFPD_AUX_I2CX_SCL

AN4

IFPD_AUX_I2CX_SDA_N

AE4

IFPE_AUX_I2CY_SCL

AD4

IFPE_AUX_I2CY_SDA_N

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

GENERAL

A4

BUFRST_N

AB5

CEC

W5

STRAP0

W7

STRAP1

V7

STRAP2

N11P-GE1-A3 BGA 969P @

N11P-GE1-A3 BGA 969P @

GENERAL

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

TEST

TEST

TESTMODE

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST_N

SERIAL

SERIAL

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

MULTI_STRAP_REF0_GND

MULTI_STRAP_REF1_GND

Issued Date

Issued Date

Issued Date

NC/SPDIF

THERMDP
THERMDN

3

TESTMODE

AP35
AP14
AN14
AN16
AR14
AP16

1 2

RV41 10K_0402_5%@RV41 10K_0402_5%@

C3

ROM_SI

D3

ROM_SO

C4

ROM_SCLK

D4

A5

N9

1 2

RV48 40.2K_0402_1%

RV48 40.2K_0402_1%

M9

1 2

RV50 40.2K_0402_1%

RV50 40.2K_0402_1%

THERM_D+

B5

THERM_D-

B4

2009/01/01 2010/01/01

2009/01/01 2010/01/01

2009/01/01 2010/01/01

OPT@

OPT@

OPT@

OPT@

Compal Secret Data

Compal Secret Data

Compal Secret Data

TV2TV2
TV3TV3
TV4TV4
TV5TV5

ROM_SI 24
ROM_SO 24
ROM_SCLK 24

Deciphered Date

Deciphered Date

Deciphered Date

12

RV47

RV47

OPT@

OPT@

10K_0402_5%

10K_0402_5%

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LVDS/HDMI/DP/THM

LVDS/HDMI/DP/THM

LVDS/HDMI/DP/THM

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

14 59Friday, March 19, 2010

14 59Friday, March 19, 2010

14 59Friday, March 19, 2010

1

0.4

0.4

0.4

5

4

3

2

1

N11P-GS1 Performance Mode

Mode

D D

C C

B B

NVCLK (MHz) MCLK (MHz) +VGA_CORE

P0

P8

450

405

135

UV1G

UV1G

AB11

VDD_0

AB13

VDD_1

AB15

VDD_2

AB17

VDD_3

AB19

VDD_4

AB21

VDD_5

AB23

VDD_6

AB25

VDD_7

AC11

VDD_8

AC12

VDD_9

AC13

VDD_10

AC14

VDD_11

AC15

VDD_12

AC16

VDD_13

AC17

VDD_14

AC18

VDD_15

AC19

VDD_16

AC20

VDD_17

AC21

VDD_18

AC22

VDD_19

AC23

VDD_20

AC24

VDD_21

AC25

VDD_22

AD12

VDD_23

AD14

VDD_24

AD16

VDD_25

AD18

VDD_26

AD22

VDD_27

AD24

VDD_28

L11

VDD_29

L12

VDD_30

L13

VDD_31

L14

VDD_32

L15

VDD_33

L16

VDD_34

L17

VDD_35

L18

VDD_36

L19

VDD_37

L20

VDD_38

L21

VDD_39

L22

VDD_40

L23

VDD_41

L24

VDD_42

L25

VDD_43

M12

VDD_44

M14

VDD_45

M16

VDD_46

M18

VDD_47

M20

VDD_48

M22

VDD_49

M24

VDD_50

P11

VDD_51

P13

VDD_52

P15

VDD_53

P17

VDD_54

P19

VDD_55

N11P-GE1-A3 BGA 969P @

N11P-GE1-A3 BGA 969P @

790 0.90 V

324 0.85 V

135 0.80 V

Part 7 of 7

Part 7 of 7

POWER

POWER

VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73
VDD_74
VDD_75
VDD_76
VDD_77
VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98

VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110

P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24

+VGA_CORE+VGA_CORE

Mode

29A for N11P-GS1
28A for N11P-GE1
16A for N11M-GE1

N11P-GE1 Performance Mode

NVCLK (MHz) MCLK (MHz) +VGA_CORE

P0

P8

575

405

790 0.95 V

324 0.85 V

P12 135 135 0.80 V P12

+VGA_CORE

1

1

+

+

+

CV59

CV59

10U_0603_6.3V6M

10U_0603_6.3V6M

OPT@

OPT@

CV66

CV66

OPT@

0.047U_0402_25V6K

0.047U_0402_25V6K

OPT@

CV74

0.01U_0402_25V7K

0.01U_0402_25V7K

CV74

+VGA_CORE

2

1

+VGA_CORE

1

2

+VGA_CORE

1

OPT@

OPT@

2

CV57

CV57

OPT@

330U_D2_2.5VM_R9M

330U_D2_2.5VM_R9M

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

CV60

CV60

OPT@

OPT@

1

10U_0603_6.3V6M

10U_0603_6.3V6M

0.047U_0402_25V6K

0.047U_0402_25V6K

1

CV67

CV67

OPT@

OPT@

2

0.047U_0402_25V6K

0.047U_0402_25V6K

0.01U_0402_25V7K

0.01U_0402_25V7K

1

CV75

CV75

OPT@

OPT@

2

0.01U_0402_25V7K

0.01U_0402_25V7K

+

2

1

2

1

2

1

2

CV58

CV58

OPT@

OPT@

330U_D2_2.5VM_R9M

330U_D2_2.5VM_R9M

2

CV61

CV61

N11M@

N11M@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

CV68

CV68

OPT@

OPT@

2

0.022U_0402_25V7K

0.022U_0402_25V7K

1

CV76

CV76

OPT@

OPT@

2

0.01U_0402_25V7K

0.01U_0402_25V7K

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

CV212

CV212

OPT@

OPT@

2

0.022U_0402_25V7K

0.022U_0402_25V7K

CV69

CV69

OPT@

OPT@

0.01U_0402_25V7K

0.01U_0402_25V7K

CV77

CV77

OPT@

OPT@

Mode

1

CV62

CV62

OPT@

OPT@

2

4700P_0402_25V7K

4700P_0402_25V7K

1

CV70

CV70

OPT@

OPT@

2

0.022U_0402_25V7K

0.022U_0402_25V7K

Add CV123
and CV124 for N11P-LP1

1

CV78

CV78

OPT@

OPT@

2

0.01U_0402_25V7K

0.01U_0402_25V7K

N11M-GE1 Performance Mode

NVCLK (MHz) MCLK (MHz) +VGA_CORE

P0

P8

1

2

1

2

CV71

CV71

OPT@

OPT@

CV79

CV79

OPT@

OPT@

625

405

135

4700P_0402_25V7K

4700P_0402_25V7K

CV64

CV63

CV63

OPT@

OPT@

0.01U_0402_25V7K

0.01U_0402_25V7K

CV64

OPT@

OPT@

1

CV65

CV65

OPT@

OPT@

0.022U_0402_25V7K

0.022U_0402_25V7K

2

1

CV123

CV123

N11P@

N11P@

2

0.01U_0402_25V7K

0.01U_0402_25V7K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

1

CV124

CV124

N11P@

N11P@

2

790 1.03 V

405 0.85 V

135 0.85 VP12

CV64

N11P@

CV64

N11P@

0.1U_0402_16V7K

0.1U_0402_16V7K

12

CV1

CV1

OPT@

OPT@

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

Add CV1
and CV2

12

CV2

CV2

OPT@

OPT@

A A

Security Classification

Security Classification

Security Classification

2009/01/01 2010/01/01

2009/01/01 2010/01/01

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/01 2010/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VGA CORE

VGA CORE

VGA CORE

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

15 59Thursday, March 18, 2010

15 59Thursday, March 18, 2010

15 59Thursday, March 18, 2010

1

0.1

0.1

0.1

5

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

+VRAM_1.5VS

CV82

CV82

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

D D

+VRAM_1.5VS

0.047U_0402_25V6K

0.047U_0402_25V6K

CV99

CV99

OPT@

OPT@

1

2

4.7U_0603_6.3V6K

1

2

0.047U_0402_25V6K

0.047U_0402_25V6K

1

CV100

CV100

OPT@

OPT@

2

0.047U_0402_25V6K

0.047U_0402_25V6K

1

CV83

CV83

OPT@

OPT@

2

1

CV101

CV101

OPT@

OPT@

2

0.1U_0402_16V4Z

1

CV84

CV84

OPT@

OPT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_25V7K

0.01U_0402_25V7K

1

CV102

CV102

OPT@

OPT@

2

0.01U_0402_25V7K

0.01U_0402_25V7K

1

2

1

2

CV85

CV85

OPT@

OPT@

CV103

CV103

OPT@

OPT@

Close to Pin

C C

1 2

RV96

RV96

RV107 10K_0402_5%OPT@RV107 10K_0402_5%OPT@
RV51 1K_0402_1%@RV51 1K_0402_1%@

1 2

RV109 10K_0402_5%OPT@RV109 10K_0402_5%OPT@

RV99 10K_0402_5%OPT@RV99 10K_0402_5%OPT@
RV52 1K_0402_1%@RV52 1K_0402_1%@

1 2

RV97 10K_0402_5%OPT@RV97 10K_0402_5%OPT@

RV101 10K_0402_5%OPT@RV101 10K_0402_5%OPT@
RV53 1K_0402_1%@RV53 1K_0402_1%@

1 2

RV113 10K_0402_5%OPT@RV113 10K_0402_5%OPT@

B B

+1.05VS_DGPU

BLM18PG181SN1D_0603

BLM18PG181SN1D_0603

1

CV117

CV117

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

@

@

2

LV5

LV5

@

@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V4Z

1

2

CV118

CV118

@

@

1U_0402_6.3V4Z

1

CV119

CV119

@

@

2

1

CV120

CV120

@

@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

200mA

+IFPAB_PLLVDD

1

CV121

CV121

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

2

CV120

CV120
10K_0402_5%

10K_0402_5%

1

2

1

2

0.01U_0402_25V7K

0.01U_0402_25V7K

12

12

12

12

12

12

OPT@

OPT@

4

CV86

CV86

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.01U_0402_25V7K

0.01U_0402_25V7K

1

CV104

CV104

CV218

CV218

OPT@

OPT@

OPT@

OPT@

2

1K_0402_1%@

1K_0402_1%@

3.5A

+IFPAB_PLLVDD

+IFPAB_IOVDD

+IFPC_PLLVDD

+IFPC_IOVDD

+IFPD_PLLVDD

+IFPD_IOVDD

+IFPEF_PLLVDD

+IFPE_IOVDD

UV1E

UV1E

Part 5 of 7

J23

FBVDDQ_0

J24

FBVDDQ_1

J29

FBVDDQ_2

AA27

FBVDDQ_3

AA29

FBVDDQ_4

AA31

FBVDDQ_5

AB27

FBVDDQ_6

AB29

FBVDDQ_7

AC27

FBVDDQ_8

AD27

FBVDDQ_9

AE27

FBVDDQ_10

AJ28

FBVDDQ_11

B18

FBVDDQ_12

E21

FBVDDQ_13

G17

FBVDDQ_14

G18

FBVDDQ_15

G22

FBVDDQ_16

G8

FBVDDQ_17

G9

FBVDDQ_18

H29

FBVDDQ_19

J14

FBVDDQ_20

J15

FBVDDQ_21

J16

FBVDDQ_22

J17

FBVDDQ_23

J20

FBVDDQ_24

J21

FBVDDQ_25

J22

FBVDDQ_26

N27

FBVDDQ_27

P27

FBVDDQ_28

R27

FBVDDQ_29

T27

FBVDDQ_30

U27

FBVDDQ_31

U29

FBVDDQ_32

V27

FBVDDQ_33

V29

FBVDDQ_34

V34

FBVDDQ_35

W27

FBVDDQ_36

Y27

FBVDDQ_37

AK9

IFPAB_PLLVDD

AJ11

IFPAB_RSET

AG9

IFPA_IOVDD

AG10

IFPB_IOVDD

AJ9

IFPC_PLLVDD

AK7

IFPC_RSET

AJ8

IFPC_IOVDD

AC6

IFPD_PLLVDD

AB6

IFPD_RSET

AK8

IFPD_IOVDD

AJ6

IFPEF_PLLVDD

AL1

IFPEF_RSET

AE7

IFPE_IOVDD

AD7

IFPF_IOVDD

N11P-GE1-A3 BGA 969P @

N11P-GE1-A3 BGA 969P @

Part 5 of 7

3

1600mA

PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24

500mA

PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4

POWER

POWER

110mA

PEX_PLLVDD

PEX_SVDD_3V3_0
PEX_SVDD_3V3_1

VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4

MIOA_VDDQ_0
MIOA_VDDQ_1
MIOA_VDDQ_2
MIOA_VDDQ_3

MIOB_VDDQ_0
MIOB_VDDQ_1
MIOB_VDDQ_2
MIOB_VDDQ_3

2000mA

AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16

AK16
AK17
AK21
AK24
AK27

AG14

AG19
F7

J10
J11
J12
J13
J9

P9
R9
T9
U9

AA9
AB9
W9
Y9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

120mA

+PEX_PLLVDD

120mA

120mA

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Close to Pin

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV87

CV87

OPT@

OPT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV93

CV93

OPT@

OPT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV217

CV217

OPT@

OPT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

240mA

CV116

CV116

N11M@

N11M@

1

CV88

CV88

OPT@

OPT@

2

1

CV94

CV94

OPT@

OPT@

2

Close to Pin

1

CV105

CV105

@

@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV216

CV216

OPT@

OPT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

CV112

CV112

OPT@

OPT@

2

1 2

CV125

CV125

N11M@

N11M@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV90

CV89

CV89

OPT@

OPT@

CV95

CV95

OPT@

OPT@

CV106

CV106

N11M@

N11M@

CV90

OPT@

OPT@

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

CV96

CV96

OPT@

OPT@

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

CV107

CV107

OPT@

OPT@

@

@

2

+3VS_DGPU

1

1

CV114

CV114

CV113

CV113

OPT@

OPT@

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

2

LV6 100NH_LQW18ANR10J00D_5%_0603

LV6 100NH_LQW18ANR10J00D_5%_0603

CV115

CV115
10K_0402_5%

10K_0402_5%

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV91

CV91

OPT@

OPT@

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

CV97

CV97

OPT@

OPT@

2

100NH_LQW18ANR10J00D_5%_0603

100NH_LQW18ANR10J00D_5%_0603

1 2

LV4

1

CV108

CV108

OPT@

OPT@

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

CV110

CV110

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

N11P_LP@

N11P_LP@

2

+3VS_DGPU+MIO_VDDQ

1

2

CV92

CV92

OPT@

OPT@

1

CV3

CV3

OPT@

OPT@

22U_0805_6.3V6M

22U_0805_6.3V6M

2

Add CV3 and CV4

1

2

CV98

CV98

OPT@

OPT@

OPT@LV4

OPT@

+3VS_DGPU

1

CV111

CV111

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

@

@

1

CV4

CV4

OPT@

OPT@

22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

CV109

CV109

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

1

+1.05VS_DGPU

+1.05VS_DGPU

+1.05VS_DGPU

LV9

+3VS_DGPU

+1.8VS

A A

BLM18PG181SN1D_0603

BLM18PG181SN1D_0603

1

CV132

CV132

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

@

@

2

LV9

BLM18PG181SN1D_0603

BLM18PG181SN1D_0603

@

@

LV8

LV8

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

12

@

@

12

1

CV133

CV133

@

@

2

5

+IFPAB_IOVDD

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

CV134

CV134

@

@

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

285mA

+IFPAB_IOVDD

1

1

CV213

CV213

CV135

CV135

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

@

2

@

2

CV213

CV213
10K_0402_5%

10K_0402_5%

OPT@

OPT@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/01 2010/01/01

2009/01/01 2010/01/01

2009/01/01 2010/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

POWER

POWER

POWER

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

16 59Thursday, March 18, 2010

16 59Thursday, March 18, 2010

16 59Thursday, March 18, 2010

1

0.1

0.1

0.1

5

D D

C C

B B

A A

4

UV1F

UV1F

Part 6 of 7

B3

GND_0

B6

GND_1

B9

GND_2

B12

GND_3

B15

GND_4

B21

GND_5

B24

GND_6

B27

GND_7

B30

GND_8

B33

GND_9

C2

GND_10

C34

GND_11

E6

GND_12

E9

GND_13

E12

GND_14

E15

GND_15

E18

GND_16

E24

GND_17

E27

GND_18

E30

GND_19

F2

GND_20

F31

GND_21

F34

GND_22

F5

GND_23

J2

GND_24

J5

GND_25

J31

GND_26

J34

GND_27

K9

GND_28

L9

GND_29

M2

GND_30

M5

GND_31

M11

GND_32

M13

GND_33

M15

GND_34

M17

GND_35

M19

GND_36

M21

GND_37

M23

GND_38

M25

GND_39

M31

GND_40

M34

GND_41

N11

GND_42

N12

GND_43

N13

GND_44

N14

GND_45

N15

GND_46

N16

GND_47

N17

GND_48

N18

GND_49

N19

GND_50

N20

GND_51

N21

GND_52

N22

GND_53

N23

GND_54

N24

GND_55

N25

GND_56

P12

GND_57

P14

GND_58

P16

GND_59

P18

GND_60

P20

GND_61

P22

GND_62

P24

GND_63

R2

GND_64

R5

GND_65

R31

GND_66

R34

GND_67

T11

GND_68

T13

GND_69

T15

GND_70

T17

GND_71

T19

GND_72

T21

GND_73

T23

GND_74

T25

GND_75

U11

GND_76

U12

GND_77

U13

GND_78

U14

GND_79

U15

GND_80

U16

GND_81

U17

GND_82

U18

GND_83

U19

GND_84

U20

GND_85

U21

GND_86

U22

GND_87

U23

GND_88

U24

GND_89

U25

GND_90

V2

GND_91

V5

GND_92

V9

GND_93

V12

GND_94

V14

GND_95

V16

GND_96

N11P-GE1-A3 BGA 969P @

N11P-GE1-A3 BGA 969P @

Part 6 of 7

GND

GND

3

GND_97
GND_98

GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192

V18
V20
V22
V24
V31
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
AA2
AA5
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD2
AD5
AD11
AD13
AD15
AD17
AD21
AD23
AD25
AD31
AD34
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG5
AG31
AG34
AK2
AK5
AK14
AK31
AK34
AL6
AL9
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AN2
AN34
AP3
AP6
AP9
AP12
AP15
AP18
AP21
AP24
AP27
AP30
AP33

2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/01 2010/01/01

2009/01/01 2010/01/01

2009/01/01 2010/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

GND

GND

GND

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

17 59Thursday, March 18, 2010

17 59Thursday, March 18, 2010

17 59Thursday, March 18, 2010

1

0.1

0.1

0.1

5

D D

C C

RV55

RV55

1.1K_0402_1%

1.1K_0402_1%

RV56

RV56

1.1K_0402_1%

B B

+1.05VS_DGPU

CV147

CV147

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1.1K_0402_1%

MMZ1608D301BT_0603

MMZ1608D301BT_0603

1 2

LV11

1

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

OPT@LV11

OPT@

CV148

CV148

OPT@

OPT@

+VRAM_1.5VS

12

@

@

12

@

@

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

MDA[0..63]20,21

12mil

1

CV146

CV146

0.01U_0402_25V7K

0.01U_0402_25V7K

@

@

2

1

CV149

CV149

OPT@

OPT@

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

20 mil

1

CV150

CV150

@

@

2

MDA[0..63]

+FB_VREF

+VRAM_1.5VS

4

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8

MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

+FB_AVDD

+FB_VREF

12

RV57 10K_0402_5%

RV57 10K_0402_5%

OPT@

OPT@

UV1B

UV1B

Part 2 of 7

L32

FBA_D0

N33

FBA_D1

L33

FBA_D2

N34

FBA_D3

N35

FBA_D4

P35

FBA_D5

P33

FBA_D6

P34

FBA_D7

K35

FBA_D8

K33

FBA_D9

K34

FBA_D10

H33

FBA_D11

G34

FBA_D12

G33

FBA_D13

E34

FBA_D14

E33

FBA_D15

G31

FBA_D16

F30

FBA_D17

G30

FBA_D18

G32

FBA_D19

K30

FBA_D20

K32

FBA_D21

H30

FBA_D22

K31

FBA_D23

L31

FBA_D24

L30

FBA_D25

M32

FBA_D26

N30

FBA_D27

M30

FBA_D28

P31

FBA_D29

R32

FBA_D30

R30

FBA_D31

AG30

FBA_D32

AG32

FBA_D33

AH31

FBA_D34

AF31

FBA_D35

AF30

FBA_D36

AE30

FBA_D37

AC32

FBA_D38

AD30

FBA_D39

AN33

FBA_D40

AL31

FBA_D41

AM33

FBA_D42

AL33

FBA_D43

AK30

FBA_D44

AK32

FBA_D45

AJ30

FBA_D46

AH30

FBA_D47

AH33

FBA_D48

AH35

FBA_D49

AH34

FBA_D50

AH32

FBA_D51

AJ33

FBA_D52

AL35

FBA_D53

AM34

FBA_D54

AM35

FBA_D55

AF33

FBA_D56

AE32

FBA_D57

AF34

FBA_D58

AE35

FBA_D59

AE34

FBA_D60

AE33

FBA_D61

AB32

FBA_D62

AC35

FBA_D63

AG27

FB_DLLAVDD

AF27

FB_PLLAVDD

J27

FB_VREF

T30

FBA_DEBUG

N11P-GE1-A3 BGA 969P @

N11P-GE1-A3 BGA 969P @

Part 2 of 7

MEMORY INTERFACE

MEMORY INTERFACE

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

A

A

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

3

V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29

P32
H34
J30
P30
AF32
AL32
AL34
AF35

L35
G35
H31
N32
AD32
AJ31
AJ35
AC34

L34
H35
J32
N31
AE31
AJ32
AJ34
AC33

T32
T31

AC31
AC30

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7

DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7

CLKA0
CLKA0#

CLKA1
CLKA1#

CMDA0
CMDA1
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14

CMDA16
CMDA17
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22

CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30

CMDA0 20
CMDA1 20,21
CMDA2 20
CMDA3 20,21
CMDA4 20,21
CMDA5 20,21
CMDA6 20,21
CMDA7 20,21
CMDA8 20,21
CMDA9 20,21
CMDA10 20,21
CMDA11 21
CMDA12 20,21
CMDA13 20,21
CMDA14 20,21

CMDA16 21
CMDA17 20,21
CMDA18 20,21
CMDA19 20,21
CMDA20 20,21
CMDA21 20,21
CMDA22 20,21

CMDA24 20,21
CMDA25 20
CMDA26 20,21
CMDA27 21
CMDA28 20,21
CMDA29 20,21
CMDA30 20,21

CLKA0 20
CLKA0# 20

CLKA1 21
CLKA1# 21

DQMA[7..0] 20,21

DQSA#[7..0] 20,21

DQSA[7..0] 20,21

2

1

Mode C - Mirror Mode Mapping

Address

CMD0 CKE_L

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

0..31

A8

CS0#_L

A7

A2

A11

A5

A0

CAS#

BA1

A9

BA0

BA2

A3

A4

A13

WE#

A1

A10

A12

CS1#_L

RAS#

ODT_L

A6

RST

A14

A15

DATA Bus

32..63

A8

A6

A1

A9

A4

A12

CAS#CMD8

A3

A11

CS0#_H

BA0

A15

BA1

CS1#_H

ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7

CKE_H

RST

A13

BA2

A A

Security Classification

Security Classification

Security Classification

2009/01/01 2010/01/01

2009/01/01 2010/01/01

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/01 2010/01/01

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

MEM Interface A

MEM Interface A

MEM Interface A

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

NCL60/61 LA-6321P M/B

18 59Friday, March 19, 2010

18 59Friday, March 19, 2010

18 59Friday, March 19, 2010

1

0.1

0.1

0.1