Compal LA-6232P NIUM1 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

NIUM1

U260 12.5" M/B Schematics Document

Intel Arrandale SFF Processor with DDRIII + Ibex Peak-M

LA6232P

3 3

2010-10-22

REV:2.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/12/10 2010/12/10

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-6231P

E

2.0

1 41Sunday, October 24, 2010

2.0

A

B

C

D

E

Fun/B:LS-6231P

Compal Confidential

Model Name : NIUM1

Fan Control

page 4

File Name : LA-6232P

1 1

Clock Generator

Realtek:RTM890N-631-VB-GRT

Intel

Arrandale SFF

133/100/96 MHZ to PCH

page 11

(ULV)

Memory BUS(DDRIII)

Sigle Channel

1.5V DDRIII 800

100M/133M

USB port 1, 9

page 29

204pin DDRIII-SO-DIMM X1

BANK 0, 1

USB conn x 2

page 10

page 26,

Processor

USB/B:LS-6233P

page 26

BGA1288

page 4,5,6,7,8,9

USB port11

Bluetooth

page 26

DMI x4FDI x8

HDMI Conn.

page 23

2 2

RTC CKT.

Power On/Off CKT.

3 3

Power Circuit DC/DC

HDMI Level shift

page 23

page 32

page 29

page 32~39

CRT Conn.

page 22

CPU XDP

133MHz

page 4

Power OK CKT.

page 31

LCD Conn.

page 21

PCI-Express x 8 (PCIE1 2.5GT/S)

port 3 port 2

MINI Card -1

WLAN

page 27

LVDS

RGB

DPC(UMA)

LAN(GbE)

AR8151

page 25

RJ45

page 25

100MHz

2.7GT/s

100MHz

LPC BUS

33MHz

Intel

Ibex Peak-M

PCH

page 12,13,14,15,16 ,17, 18,19,20

SPI ROM(SYS)

100MHz

1GB/s x4

SPI

page 12

USB port2

USB 2.0

3.3V 48MHz

HD Audio

3.3V 24MHz

SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

100MHz

USB port8

Camera/Digital MIC

Mini Card-1 WLAN

page 21

page 27

Audio CKT ALC269

page 30

port 0

SATA HDD Conn.

Audio Jack / Speaker

page 30

page 24

ENE KB926 E0

page 28

Sub board

HP/Mic Jack

USB Conn

Kill switch

4 4

LED

Page 26,29

Int. KBD

page 29

Touch Pad CONN.

A

B

page 29

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SPI ROM(EC)

C

page 28

Compal Secret Data

2009/12/10 2010/12/10

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

LA-6232P

E

2 41Sunday, October 24, 2010

2.0

A

Voltage Rails

Power Plane Description

VIN

B+

+CPU_CORE

1 1

+0.75VS 0.75V switched power rail for DDR terminator

+1.05VS

+VCCP 1.1V switched power rail (1.05 for AUB CPU) ON OFF OFF

+1.5V ON ON OFF

+1.5VS

+1.8VS 1.8V switched power rail

+3VALW 3.3V always on power rail

+3V

+3V_LAN

+3VS

+5VALW

+5VS

+5V 5V power rail for PCH

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.05V switched power rail for PCH

1.5V power rail for DDRIII

1.5V switched power rail

3.3V power rail for PCH

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

B

S1

S3 S5

N/A N/A N/A

ON

ON OFF OFF

ON

ON ON

ON

ON ON ON

N/AN/AN/A

OFF

ON

OFF

ON ON*

ON

ON*

OFF

ON

ON*

OFFON

OFF

ONONON

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

S4 (Suspend to Disk)

S5 (Soft OFF)

LOW LOW LOW LOW

BTO Option Table

BTO Item BOM Structure

D

SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

OFF

ON

OFF

LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

ON ON

ON

OFF

E

LOW

OFF

2 2

PCIE PORT LIST

DEVICEPORT

1

External PCI Devices

Device IDSEL#

REQ#/GNT#

Interrupts

2 3

LAN 4 5 6 7 8

SATA PORT LIST

EC SM Bus1 address

3 3

Device

Smart Battery

Address Address

0001 011X b

EC SM Bus2 address

Device

Ambient Light Se nsor

HEX

70/72,R/W0111 000X b0111 001X b

DEVICEPORT

HDD

0 1

USB PORT LIST

DEVICEPORT

0

USB Conn.

1WLAN

Camera

2 3 4 5 6 7

MiniCard-1 (WLAN)

8

USB Conn.

9 10

Bluetooth

11 12 13

2,3 4 5

Ibex SM Bus address

Device

Clock Generator (9LRS3199AKLFT, SLG8SP 587)

DDR DIMM0

DDR DIMM2

ISL90727 ISL90728

4 4

Address

1101 0010b

1010 0000b

1010 0100b

0101 1100b 0111 1100b

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/12/10 2010/12/10

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-6232P

E

2.0

3 41Sunday, October 24, 2010

2.0

1

Layout rule：10mil width trace length < 0.5", spacing 20mil

H_COMP3

R120_0402_1% R120_0402_1%

12

H_COMP2

R320_0402_1% R320_0402_1%

12

H_COMP1

R549.9_0402_1% R549.9_0402_1%

12

H_COMP0

R649.9_0402_1% R649.9_0402_1%

R11

1 2

0_0402_5%

R15

1 2

0_0402_5%

R16

1 2

R17

1 2

R18

1 2

R22

1 2

12

H_CATERR#

H_PECI

H_PROCHOT#

H_THERMTRIP#_R

H_CPURST#

H_PM_SYNC_R

VCCPWRGOOD_1

0_0402_5%

VCCPWRGOOD_0

0_0402_5%

PM_DRAM_PWR GD_R

0_0402_5%

H_VTTPWRGD

H_PWRGD_XDP

BUF_PLT_RST#_R

12

R26

R26 750_0402_1%

750_0402_1%

A A

H_PECI17

to power; PU to VCCP at power side also

H_PROCHOT#28

H_THERMTRIP#17

H_PM_SYNC14

B B

H_CPUPWRGD17

VCCP_POK

From Power VCCP PWRGOOD

C C

PM_DRAM_PWR GD14

R27

1 2

1K_0402_1%

H_CPUPWRGD

PLT_RST#16,25,27,28

12

R30

R30 560_0402_5%

560_0402_5%

H_VTTPWRGD

T35@T35@

1.5K_0402_1%

U1B

AD71

COMP3

AC70

COMP2

AD69

COMP1

AE66

COMP0

M71

PROC_DETECT

N61

CATERR#

N19

PECI

N67

PROCHOT#

N17

THERMTRIP#

N70

RESET_OBS#

M17

PM_SYNC

AM7

VCCPWRGOOD_1

Y67

VCCPWRGOOD_0

AM5

SM_DRAMPWR OK

H15

VTTPWRGOOD

Y70

TAPPWRGOOD

G3

RSTIN#

AUBURNDALE SFF_BGA1288

U5400 1.2G

PWM FAN

+5VS

R2079 0_0402_5%R2079 0_0402_5%

1 2

EC_TACH28

EC_FAN_PWM28

2

C3

C3 10U_0805_10V4Z

10U_0805_10V4Z

D D

1

EC_TACH

EC_FAN_PWM

2

REV1.0

U1

L02@

I5-560UM 1.33G

JFAN1

1

2

3

4

5

G1

6

G2

ACES_85204-04001

CONN@

SP02000CW00

Misc

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

Clocks

Thermal Power Management

U1

L03@

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

DDR3

Misc

DDR3

Misc

JTAG & MBP

U1

I5-470UM 1.33G

AK7

BCLK

AK8

BCLK#

K71

BCLK_ITP

J70

BCLK_ITP#

L21

PEG_CLK

J21

PEG_CLK#

Y2 W4

BJ12

BV33 BP39 BV40

AV66 AV64

U71

PRDY#

U69

PREQ#

T67

TCK

N65

TMS

P69

TRST#

T69

TDI

T71

TDO

P71

TDI_M

T70

TDO_M

W71

DBR#

J69

BPM#[0]

J67

BPM#[1]

J62

BPM#[2]

K65

BPM#[3]

K62

BPM#[4]

J64

BPM#[5]

K69

BPM#[6]

M69

BPM#[7]

U1

L04@

I3-380UM 1.33G

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CLK_BCLK CLK_BCLK#

CLK_CPU_XDP CLK_CPU_XDP#

CLK_CPU_DMI CLK_CPU_DMI#

Support integrated graphics but without eDP, Can be connected to GND directly.

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PM_EXTTS#0 PM_EXTTS#1

XDP_PRDY# XDP_PREQ#

XDP_TCK XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO XDP_TDI_M

XDP_DBRESET#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

L05@

T21@T21@ T29@T29@

T1@T1@

R10

1 2

0_0402_5%

@

T2@T2

XDP_DBRESET# 14

@

T4@T4

@

T5@T5

@

T6@T6

@

T7@T7

@

T8@T8

@

T9@T9

@

T10@T10

@

T11@T11

R2065

PM_DRAM_PWR GD_R

VCCP_POK

Compal Secret Data

2009/12/10 2010/12/10

Compal Secret Data

CLK_CPU_BCLK 17 CLK_CPU_BCLK# 17

CLK_CPU_DMI 13 CLK_CPU_DMI# 13

from DDR

PM_EXTTS#0_1 10

5

+1.5V_CPU

12

@

1.1K_0402_1%

2

G

Deciphered Date

4

Y

12

R24

1.5K_0402_1%

12

R29

R29 750_0402_1%

750_0402_1%

+5VALW

R416

R416 10K_0402_5%

10K_0402_5%

1 2

13

D

S

+3VALW

PM_EXTTS#0

PM_EXTTS#1

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

H_CATERR# H_PROCHOT# H_CPURST#

C1

1 2

0.1U_0402_16V7K

5

U2

VCCP_POK

2

P

B

1

A

G

3

NC7SZ08P5X_NL_SC70-5

Q61

Q61 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4

R2 10K_0402_5%R2 10K_0402_5%

1 2

R4 10K_0402_5%R4 10K_0402_5%

1 2

DDR3 Compensation Signals

R7 100_0402_1%R7 100_0402_1%

1 2

R8 24.9_0402_1%R8 24.9_0402_1%

1 2

R9 130_0402_1%R9 130_0402_1%

1 2

Layout Note:Please these resistors near Processor

Processor Pullups

R12 49.9_0402_1%R12 49.9_0402_1%

1 2

R13 68_0402_5%R13 68_0402_5%

1 2

R14 68_0402_5%@R14 68_0402_5%@

1 2

VCCP_POK 37

SM_DRAMRST#

100K_0402_5%

6

S3_0.75V_EN 3 6

Title

Size Document Number Rev

Custom

Date: Sheet

+VCCP

3

R19 0_0402_5%@R19 0_0402_5%@

1 2

Q1

S

12

G

R25

RST_GATE17

2

RST_GATE

1

2

CPU XDP Signal

XDP_DBRESET#

XDP_TDO

XDP_PREQ#

XDP_TMS

XDP_TDI

XDP_TRST#

XDP_TCK

Compal Electronics, Inc.

ARD-SFF(1/6)-Thermal/XDP

LA-6232P

+1.5V

D

DIMM_DRAMRST#

13

BSH111_SOT23

check value if S3 fail.

C2

0.047U_0402_16V7K

R31 1K_0402_5%R31 1K_0402_5%

1 2

R32 51_0402_5%R32 51_0402_5%

1 2

R33 51_0402_5%@R33 51_0402_5%@

1 2

R34 51_0402_5%@R34 51_0402_5%@

1 2

R35 51_0402_5%@R35 51_0402_5%@

1 2

R36 51_0402_5%R36 51_0402_5%

1 2

R37 51_0402_5%@R37 51_0402_5%@

1 2

4 41Sunday, October 24, 2010

of

5

12

R20

R20 1K_0402_5%

1K_0402_5%

+VCCP

DIMM_DRAMRST# 10

+3VS

2.0

1

2

3

4

5

1

U1A

REV1.0

DMI_CRX_PTX_N014 DMI_CRX_PTX_N114 DMI_CRX_PTX_N214

A A

B B

C C

DMI_CRX_PTX_N314

DMI_CRX_PTX_P014 DMI_CRX_PTX_P114 DMI_CRX_PTX_P214 DMI_CRX_PTX_P314

DMI_CTX_PRX_N014 DMI_CTX_PRX_N114 DMI_CTX_PRX_N214 DMI_CTX_PRX_N314

DMI_CTX_PRX_P014 DMI_CTX_PRX_P114 DMI_CTX_PRX_P214 DMI_CTX_PRX_P314

FDI_CTX_PRX_N014 FDI_CTX_PRX_N114 FDI_CTX_PRX_N214 FDI_CTX_PRX_N314 FDI_CTX_PRX_N414 FDI_CTX_PRX_N514 FDI_CTX_PRX_N614 FDI_CTX_PRX_N714

FDI_CTX_PRX_P014 FDI_CTX_PRX_P114 FDI_CTX_PRX_P214 FDI_CTX_PRX_P314 FDI_CTX_PRX_P414 FDI_CTX_PRX_P514 FDI_CTX_PRX_P614 FDI_CTX_PRX_P714

FDI_FSYNC014 FDI_FSYNC114

FDI_INT14

FDI_LSYNC014 FDI_LSYNC114

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

F7

DMI_RX#[0]

J8

DMI_RX#[1]

K8

DMI_RX#[2]

J4

DMI_RX#[3]

F9

DMI_RX[0]

J6

DMI_RX[1]

K9

DMI_RX[2]

J2

DMI_RX[3]

H17

DMI_TX#[0]

K15

DMI_TX#[1]

J13

DMI_TX#[2]

F10

DMI_TX#[3]

G17

DMI_TX[0]

M15

DMI_TX[1]

G13

DMI_TX[2]

J11

DMI_TX[3]

L2

FDI_TX#[0]

N7

FDI_TX#[1]

M4

FDI_TX#[2]

P1

FDI_TX#[3]

N10

FDI_TX#[4]

R7

FDI_TX#[5]

U7

FDI_TX#[6]

W8

FDI_TX#[7]

K1

FDI_TX[0]

N5

FDI_TX[1]

N2

FDI_TX[2]

R2

FDI_TX[3]

N9

FDI_TX[4]

R8

FDI_TX[5]

U6

FDI_TX[6]

W10

FDI_TX[7]

AC7

FDI_FSYNC[0]

AC9

FDI_FSYNC[1]

AB5

FDI_INT

AA1

FDI_LSYNC[0]

AB2

FDI_LSYNC[1]

AUBURNDALE SFF_BGA1288

2

EXP_ICOMPI

PEG_RBIAS

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B12 A13 D12 B11

G40 G38 H34 P34 G28 H25 H24 D29 B26 D26 B23 D22 A20 D19 A17 B14

F40 J38 G34 M34 J28 G25 K24 B28 A27 B25 A24 B21 B19 B18 B16 D15

N40 L38 M32 D40 A38 G32 B33 B35 L30 A31 B32 L28 N26 M24 G21 J20

L40 N38 N32 B39 B37 H32 A34 D36 J30 B30 D33 N28 M25 N24 F21 L20

EXP_RBIAS

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

DMI Intel(R) FDI

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

R38

1 2

R39

1 2

3

Layout rule：trace length < 0.5"

49.9_0402_1%

750_0402_1%

R40 0_0402_5%@R40 0_0402_5%@

1 2

@

1 2

R42 0_0402_5%

CFG0

CFG3 CFG4

U1E

AL4

CFG[0]

AM2

CFG[1]

AK1

CFG[2]

AK2

CFG[3]

AK4

CFG[4]

AJ2

CFG[5]

AT2

CFG[6]

AG7

CFG[7]

AF4

CFG[8]

AG2

CFG[9]

AH1

CFG[10]

AC2

CFG[11]

AC4

CFG[12]

AE2

CFG[13]

AD1

CFG[14]

AF8

CFG[15]

AF6

CFG[16]

AB7

CFG[17]

AU1

RSVD_TP[0]

T4

RSVD15

T2

RSVD16

U1

RSVD17

V2

RSVD18

AV71

RSVD19

AW70

RSVD20

AY69

RSVD21

BB69

RSVD22

D8

RSVD23

B7

RSVD24

A10

RSVD26

B9

RSVD27

C5

RSVD_NCTF[7]

A6

RSVD_NCTF[8]

E3

RSVD_NCTF[6]

F1

RSVD_NCTF[5]

AUBURNDALE SFF_BGA1288

REV1.0

RESERVED

RSVD32 RSVD33

RSVD34 RSVD35

RSVD36 RSVD37

RSVD38 RSVD39

RSVD_NCTF[3] RSVD_NCTF[4]

RSVD_NCTF[2] RSVD_NCTF[1]

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD54 RSVD55 RSVD56 RSVD57 RSVD58

RSVD_TP[2] RSVD_TP[1]

RSVD62 RSVD63

RSVD64 RSVD65

DC_TEST_BV71 DC_TEST_BV69 DC_TEST_BV68

DC_TEST_BV5 DC_TEST_BV3

DC_TEST_BV1 DC_TEST_BT71 DC_TEST_BT69

DC_TEST_BT3

DC_TEST_BT1 DC_TEST_BR71

DC_TEST_BR1

DC_TEST_E71

DC_TEST_E1 DC_TEST_C71 DC_TEST_C69

DC_TEST_C3

DC_TEST_A71 DC_TEST_A69 DC_TEST_A68

DC_TEST_A5

4

W66

T36T36

W64

T37T37

AC69 AC71

T38T38

AA71

Add test points for Intel debug-0202

AA69

R66 R64

BT5 BR5

BV6 BV8

AV69 AK71 AN69 AP66 AH66 AK66 AR71 AM66 AK69 AU71 AT70 AR69 AU69 AT67

AP2 AN7

AV4 AU2

R41 0_0402_5%@R41 0_0402_5%@

BE69 BE71

BV71 BV69 BV68 BV5 BV3 BV1 BT71 BT69 BT3 BT1 BR71 BR1 E71 E1 C71 C69 C3 A71 A69 A68 A5

1 2

@

1 2

R43 0_0402_5%

TP_DC_TEST_BV71_BV69

TP_DC_TEST_BV68 TP_DC_TEST_BV5 TP_DC_TEST_BV3_BT3 TP_DC_TEST_BV1_BT1 TP_DC_TEST_BT71_BT69

TP_DC_TEST_BR71 TP_DC_TEST_BR1 TP_DC_TEST_E71 TP_DC_TEST_E1 TP_DC_TEST_C71_A71 TP_DC_TEST_C69_A69 TP_DC_TEST_C3

TP_DC_TEST_A68 TP_DC_TEST_A5

5

T12T12 T13T13

T14T14 T15T15 T16T16 T17T17

T18T18

T19T19 T20T20

CFG Straps for PROCESSOR

CFG0

R44 3.01K_0402_1%@R44 3.01K_0402_1%@

1 2

PCI-Express Configuration Select

CFG0

Not applicable for Clarksfield Processor

CFG3

CFG3-PCI Express Static Lane Reversal

CFG3

D D

CFG4

CFG4-Display Port Presence

CFG4

1: Single PEG 0: Bifurcation enabled

R45 3.01K_0402_1%@R45 3.01K_0402_1%@

1 2

1: Normal Operation 0: Lane Numbers Reversed

15 -> 0, 14 ->1, .....

@

R46 3.01K_0402_1%

1 2

1: Disabled; No Physical Display Port attached to Embedded Display Port

0: Enabled; An external Display Port device is connected to the Embedded Display Port

1

12.11

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Package Daisy Chain:

1: BR71 - pkg - BT71- board - BT69 - pkg - BV71 - board - BV69 - pkg - BV68

2: A68 - pkg - A69 - board - C69 - pkg - A71 - board - C71 - pkg - E71

3: A5 - pkg - C3

4: BR1 - pkg - BT1 - board - BV1 - pkg - BT3 - board - BV3 - pkg - BV5

2009/12/10 2010/12/10

Issued Date

3

2009/12/10 2010/12/10

Daisy Chain Recommendation for SMT Connectivity

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ARD-SFF(2/6)-DMI/PEG/CFG

LA-6232P

5

5 41Sunday, October 24, 2010

2.0

1

U1C

A A

AT8

SA_DQ[0]

AT6

SA_DQ[1]

BB5

SA_DQ[2]

BB9

SA_DQ[3]

AV7

SA_DQ[4]

AV6

SA_DQ[5]

BE6

SA_DQ[6]

BE8

SA_DQ[7]

BF11

SA_DQ[8]

BE11

SA_DQ[9]

BK5

SA_DQ[10]

BH13

SA_DQ[11]

BF9

SA_DQ[12]

BF6

SA_DQ[13]

BK7

SA_DQ[14]

BN8

SA_DQ[15]

BN11

SA_DQ[16]

BN9

SA_DQ[17]

BG17

SA_DQ[18]

BK15

SA_DQ[19]

BK9

SA_DQ[20]

BG15

SA_DQ[21]

BH17

SA_DQ[22]

BK17

SA_DQ[23]

BN20

SA_DQ[24]

BN17

SA_DQ[25]

BK25

SA_DQ[26]

BH25

SA_DQ[27]

BJ20

B B

C C

BH21 BG24 BG25

BJ40

BM43

BF47

BF48 BN40 BH43 BN44 BN47 BN48 BN51 BH53

BJ55 BH48

BJ48 BM53 BN55

BF55 BN57 BN65

BJ61

BF57

BJ57 BK64 BK61

BJ63

BF64 BB64 BB66

BJ66

BF65

AY64 BC70

BT38 BH38

BF21

BK43

BL38

BF38

SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

REV1.0

DDR SYSTEM MEMORY A

SA_CK[0]

SA_CK#[0]

SA_CKE[0]

SA_CK[1]

SA_CK#[1]

SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

2

BM34 BP35 BF20

BK36 BH36 BK24

BH40 BJ47

BF43 BL47

BB10 BJ10 BM15 BN24 BG44 BG53 BN62 BH59

AY5 BJ7 BN13 BL21 BH44 BK51 BP58 BE62

AY7 BJ5 BL13 BN21 BK44 BH51 BM60 BE64

BT36 BP33 BV36 BG34 BG32 BN32 BK32 BJ30 BN30 BF28 BH34 BH30 BJ28 BF40 BN28 BN25

3

U1D

DDR_B_D[0..63]10

DDR_B_BS010 DDR_B_BS110 DDR_B_BS210

DDR_B_CAS#10 DDR_B_RAS#10 DDR_B_WE#10

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AW2

BD1

BC2

BH2 BG4 BG1 BR6 BR8

BU9 BV10 BR10

BT12

BT15 BV15 BV12 BP12 BV17 BU16 BP15 BU19 BV22

BT22 BP19 BV19 BV20

BT20

BT48 BV48 BV50 BP49

BT47 BV52 BV54

BT54 BP53 BU53

BT59

BT57 BP56

BT55 BU60 BV59 BV61 BP60 BR66 BR64 BR62

BT61 BN68

BL69

BJ71

BF70 BG71 BC67 BK70 BK67 BD71 BD69

BV43 BV41 BV24

BU46

BT40

BT41

BA2

SB_DQ[0] SB_DQ[1] SB_DQ[2]

BE4

SB_DQ[3]

AY1

SB_DQ[4] SB_DQ[5]

BF2

SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11]

BJ4

SB_DQ[12]

BK2

SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

4

REV1.0

BU33

SB_CK[0]

BV34

SB_CK#[0]

BT26

SB_CKE[0]

BV38

SB_CK[1]

BU39

SB_CK#[1]

BT24

SB_CKE[1]

BP46

SB_CS#[0]

BT43

SB_CS#[1]

BV45

SB_ODT[0]

BU49

SB_ODT[1]

DDR_B_DM0

BB4

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0]

DDR SYSTEM MEMORY - B

SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

BL4 BT13 BP22 BV47 BV57 BU65 BF67

BE2 BM3 BU12 BT19 BT52 BV55 BU63 BG69

BD4 BN4 BV13 BT17 BT50 BU56 BV62 BJ69

BT34 BP30 BV29 BU30 BV31 BT33 BT31 BP26 BV27 BT27 BU42 BU26 BT29 BT45 BV26 BU23

DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

5

DDR_B_CLK0 10 DDR_B_CLK0# 10 DDR_B_CKE0 10

DDR_B_CLK1 10 DDR_B_CLK1# 10 DDR_B_CKE1 10

DDR_B_CS0# 10 DDR_B_CS1# 10

DDR_B_ODT0 10 DDR_B_ODT1 10

DDR_B_DM[0..7] 10

DDR_B_DQS#[0..7] 10

DDR_B_DQS[0..7] 10

DDR_B_MA[0..15] 10

AUBURNDALE SFF_BGA1288

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/10 2010/12/10

Compal Secret Data

AUBURNDALE SFF_BGA1288

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

4

Date: Sheet of

Compal Electronics, Inc.

ARD-SFF(3/6)-DDR3

LA-6232P

5

2.0

6 41Sunday, October 24, 2010

2.0

1

U1G

VCC_AXG_SENSE38

VSS_AXG_SENSE38

GFXVR_VID_038 GFXVR_VID_138 GFXVR_VID_238 GFXVR_VID_338

GFXVR_EN38

1

C14

2

MPZ1608S300AT_2P

30ohm@100MHz

1

C56

2

GFXVR_EN

GFXVR_VID_438 GFXVR_VID_538 GFXVR_VID_638

T30T30

Current =3A

1

C15

1U_0402_6.3V6K

1 2

C57

22U_0805_6.3V6M

1 2

R58 4.7K_0402_5%R58 4.7K_0402_5%

1

C16

C17

2

Decoupling Cap on CPU Bottom

L1

1

2

C17

2

1U_0402_6.3V6K

C25

1

C48

C47

2

1U_0402_6.3V6K

1

C59

C58

2

10U_0603_6.3V6M

GFXVR_EN GFX_DPRSLPVR GFX_IMON

1

C18

2

1U_0402_6.3V6K

1

C26

2

22U_0805_6.3V6M

+VCCP0_DDR

1

C49

2

1U_0402_6.3V6K

1

C60

2

1U_0402_6.3V6K

A A

GFXVR_IMON38

+1.5V_CPU

B B

+VCCP

1

C55

C C

2

22U_0805_6.3V6M

Follow checklist pg20

D D

1

AF12

VAXG_SENSE

AF10

VSSAXG_SENSE

AF71

GFX_VID[0]

AG67

GFX_VID[1]

AG70

GFX_VID[2]

AH71

GFX_VID[3]

AN71

GFX_VID[4]

AM67

GFX_VID[5]

AM70

GFX_VID[6]

AH69

GFX_VR_EN

AL71

GFX_DPRSLPVR

AL69

GFX_IMON

BU40

VDDQ1

BU35

VDDQ2

BU28

1

2

1

2

1

2

1

2

BN38 BM25

BL30 BJ38

BH32

1U_0402_6.3V6K

BH28 BG43

BF16

BF15 BD35 BD33 BD32 BD30 BD28 BD26 BD24 BD23 BD21

22U_0805_6.3V6M

BD19 BD17 BD15 BB35 BB33 BB32 BB30 BB28 BB26 BB24 BB23 BB21 BB19 BB17 BB15

AW32 AW30 AW28 AW26 AW24 AW23 AW21 AW19

1U_0402_6.3V6K

AW17 AW15

AD15 AD14 AD12 AB12 AA12

W17 W15 W14

1U_0402_6.3V6K

W12

R15

AUBURNDALE SFF_BGA1288

C61

C75

VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36

VTT0_DDR VTT0_DDR[1] VTT0_DDR[2] VTT0_DDR[3] VTT0_DDR[4] VTT0_DDR[5] VTT0_DDR[6] VTT0_DDR[7] VTT0_DDR[8] VTT0_DDR[9]

VTT1_12 VTT1_13 VTT1_14 VTT1_15 VTT1_16 VTT1_17 VTT1_18 VTT1_19 VTT1_20 VTT1_21

+VGFX_CORE

1

2

+VGFX_CORE

1

2

REV1.0

SENSE

GRAPHICS VIDs

DDR3 - 1.5V RAILS

1

C62

2

1U_0402_6.3V6K

1

C76

2

1U_0402_6.3V6K

Place on CPU Bottom side Place near CPU

LINES

POWER

1

C63

2

1

C77

2

GRAPHICS

PEG & DMI

VCAP2_10 VCAP2_11 VCAP2_12 VCAP2_13 VCAP2_14 VCAP2_15 VCAP2_16 VCAP2_17 VCAP2_18 VCAP2_19

1

C64

2

1U_0402_6.3V6K

1

C78

2

1U_0402_6.3V6K

2

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8

VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37

VTT1_1 VTT1_2 VTT1_3 VTT1_4 VTT1_5 VTT1_6 VTT1_7 VTT1_8

VTT1_9 VTT1_10 VTT1_11

VCAP2_1 VCAP2_2 VCAP2_3 VCAP2_4 VCAP2_5 VCAP2_6 VCAP2_7 VCAP2_8 VCAP2_9

C65

1U_0402_6.3V6K

C79

1U_0402_6.3V6K

+VGFX_CORE

AN32 AN30

Current =12A

AN28 AN26 AN24 AN23 AN21 AN19 AL32 AL30 AL28 AL26 AL24 AL23 AL21 AL19 AK14 AK12 AJ10 AH14 AH12 AF28 AF26 AF24 AF23 AF21 AF19 AF17 AF15 AF14 AD28 AD26 AD24 AD23 AD21 AD19 AD17

W21 W19 U21 U19 U17 U15 U14 U12 R21 R19 R17

AK62 AK60 AK59 AH60 AH59 AF60 AF59 AD60 AD59 AB60 AB59 AA60 AA59 W60 W59 U60 U59 R60 R59

1

C66

2

1U_0402_6.3V6K

1

C80

2

1U_0402_6.3V6K

1

C33

C32

C42

+VCAP2 Don't connect to any other power rail, this is package decoulpling

1

2

1

2

C34

2

1U_0402_6.3V6K

1

C44

C43

2

1U_0402_6.3V6K

1

C67

2

1U_0402_6.3V6K

1

C81

2

1U_0402_6.3V6K

3

+VCCP

1

C5

C4

C9

C19

+VCCP

C27

1

C36

C35

2

10U_0603_6.3V6M

1

C45

2

1U_0402_6.3V6K

1

C68

2

1

C82

2

22U_0805_6.3V6M

10U_0603_6.3V6M

C37

+VCAP2

1

C46

2

C50

1U_0402_6.3V6K

+VGFX_CORE

1

C69

2

1U_0402_6.3V6K

+VGFX_CORE

1

+

C72

2

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1U_0402_6.3V6KC41U_0402_6.3V6K

1

C10

2

1U_0402_6.3V6KC91U_0402_6.3V6K

1

C20

2

1U_0402_6.3V6K

1

C28

2

1U_0402_6.3V6K

1

C38

2

22U_0805_6.3V6M

1

C51

2

10U_0603_6.3V6M

+VCCP

R56 0_0402_5%R56 0_0402_5% R57 0_0402_5%R57 0_0402_5%

1

C70

2

10U_0603_6.3V6M

330U_D2_2.5V_LESR9M

Current =16A

U1F

1

2

1

2

1

2

1

2

+VTT0_72 +VTT0_73

AW14 AW12

AU60 AU59 AU12

1U_0402_6.3V6KC81U_0402_6.3V6K

AR60 AR59 AR12 AN60 AN59 AN35 AN33 AN17 AN15 AN14 AN12

AM10

1U_0402_6.3V6K

AL60 AL59 AL17 AL15 AL14

AL12 AK35 AK33 AF39 AF37 AF35 AF33

1U_0402_6.3V6K

AF32 AF30 AD39 BF60 BF59 BD60 BD59 BB60 BB59 AY60

AW60 AW35

1U_0402_6.3V6K

AW33

AD37 AD35 AD33 AD32 AD30

W35 W33 W32 W30 W28 W26 W24 W23 U35 U33 U32 U30 U28 U26 U24 U23 R35 R33 R32 R30 R28 R26 R24 R23

AY10

AN9

+VCCP

+

C583

Deciphered Date

VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_43 VTT0_44 VTT0_45 VTT0_46 VTT0_47 VTT0_48 VTT0_49 VTT0_50 VTT0_51 VTT0_52 VTT0_53 VTT0_54 VTT0_55 VTT0_56 VTT0_57 VTT0_58 VTT0_59 VTT0_60 VTT0_61 VTT0_62 VTT0_63 VTT0_64 VTT0_65 VTT0_66 VTT0_67 VTT0_68 VTT0_69 VTT0_70 VTT0_71 VTT0_72 VTT0_73

AUBURNDALE SFF_BGA1288

1

2

330U_D2_2.5V_LESR9M

12/11

C6

2

1U_0402_6.3V6KC51U_0402_6.3V6K

1

C11

2

1U_0402_6.3V6K

1

C21

2

1U_0402_6.3V6K

1

C29

2

1U_0402_6.3V6K

1

C39

2

22U_0805_6.3V6M

1

C52

2

10U_0603_6.3V6M

1 2 1 2

1

C71

2

2009/12/10 2010/12/10

C8

2

1U_0402_6.3V6KC71U_0402_6.3V6K

1U_0402_6.3V6KC61U_0402_6.3V6K

1

C13

C12

2

1U_0402_6.3V6K

1

C22

C23

2

1U_0402_6.3V6K

1

C31

C30

2

1U_0402_6.3V6K

22U_0805_6.3V6M

1

C53

2

10U_0603_6.3V6M

Compal Secret Data

1

C7

4

1.1V RAIL POWER

+CPU_CORE

4

REV1.0

SENSE LINESCPU VIDS

POWER

12

R59

R59 100_0402_1%

100_0402_1%

VCCSENSE VSSSENSE

R60

R60 100_0402_1%

100_0402_1%

1 2

5

H_DPRSLPVR H_PSI# H_DPRSLPVR H_PSI#

H_PSI#

F68

PSI#

A61

VID[0]

D61

VID[1]

D62

VID[2]

A62

VID[3]

B63

VID[4]

D64

VID[5]

D66

VID[6]

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

AN1

F66

A41

F64 F63

N13

R12

H_DPRSLPVR

VCCSENSE VSSSENSE

VTT_SELECT[1]

PROC_DPRSLPVR

VSS_SENSE_VTT

Current =1.35A

1.8V

W39

VCCPLL1

W37

VCCPLL2

U37

VCCPLL3

R39

VCCPLL4

R37

VCCPLL5

BB14

VDDQ_CK[1]

BB12

VDDQ_CK[2]

Title

ARD-SFF(4/6)-PWR

Size Document Number Rev

Custom

LA-6232P

Date: Sheet of

R47 1K_0402_5%R47 1K_0402_5%

1 2

R48 1K_0402_5%@R48 1K_0402_5%@

1 2

R49 1K_0402_5%@R49 1K_0402_5%@

1 2

R50 1K_0402_5%R50 1K_0402_5%

1 2

H_VID0 39 H_VID1 39 H_VID2 39 H_VID3 39 H_VID4 39 H_VID5 39 H_VID6 39

VTT_SELECT 37

IMVP_IMON 39

+1.8VS

1

C40

1

1U_0402_6.3V6K

2

Compal Electronics, Inc.

1

C41

2

22U_0805_6.3V6M

4.7U_0603_6.3V6M

+1.5V_CPU+1.5V_VDDQ_CK

L2

1 2

1UH_GLFR1608T1R0M-LR_20%

C54

1uH_230mA

5

VCCSENSE 39 VSSSENSE 39

VTT_SENSE 37

7 41Sunday, October 24, 2010

+VCCP

2.0

1

+CPU_CORE

1

C83

C83 1U_0402_6.3V6K

1U_0402_6.3V6K

2

A A

B B

1

C88

C88 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C98

C98 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C108

C108 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C115

C115 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C84

C84 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C89

C89 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C99

C99 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C109

C109 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C116

C116 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C85

C85 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C90

C90 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C100

C100 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C110

C110 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C117

C117 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C86

C86 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C91

C91 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C101

C101 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C111

C111 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C118

C118 1U_0402_6.3V6K

1U_0402_6.3V6K

2

High-Frequency Decoupling 25x on CPU Bottom side

+CPU_CORE

1

C125

C125 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C135

C135 22U_0805_6.3V6M

22U_0805_6.3V6M

2

C C

1

C142

C142 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C126

C126 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C136

C136 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C143

C143 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C127

C127 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C137

C137 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C144

C144 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C128

C128 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C138

C138 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C145

C145 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Mid-Frequency Decoupling 15x on Bottom Side between inductors and package

+CPU_CORE

330U_D2_2.5V_LESR9M

C150

1

+

@X76

+

2

D D

330U_D2_2.5V_LESR9M

C151

1

+

2

@X76

1

@X76

330U_D2_2.5V_LESR9M

C147

1

+

2

@X76

2

3

4

5

Current =27A

1

C87

C87 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C92

C92 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C102

C102 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C112

C112 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C119

C119 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C129

C129 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C139

C139 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C146

C146 22U_0805_6.3V6M

22U_0805_6.3V6M

2

330U_D2_2.5V_LESR9M

C148

ZZZ

2

ZZZ

BulkCap

1

+

2

+CPU_CORE

AF57

VCC_1

AF55

VCC_2

AF53

VCC_3

AF51

VCC_4

AF50

VCC_5

AF48

VCC_6

AF46

VCC_7

AF44

VCC_8

AF42

VCC_9

AF41

VCC_10

AD55

VCC_11

AD51

VCC_12

AD48

VCC_13

AD44

VCC_14

AD41

VCC_15

AB55

VCC_16

AB51

VCC_17

AB48

VCC_18

AB44

VCC_19

AB41

VCC_20

AA55

VCC_21

AA51

VCC_22

AA48

VCC_23

AA44

VCC_24

AA41

VCC_25

W55

VCC_26

W51

VCC_27

W48

VCC_28

W44

VCC_29

W41

VCC_30

U55

VCC_31

U51

VCC_32

U48

VCC_33

U44

VCC_34

U41

VCC_35

R55

VCC_36

R51

VCC_37

R48

VCC_38

R44

VCC_39

R41

VCC_40

P60

VCC_41

N55

VCC_42

N51

VCC_43

N48

VCC_44

N44

VCC_45

N42

VCC_46

M60

VCC_47

M51

VCC_48

M44

VCC_49

L55

VCC_50

K60

VCC_51

K51

VCC_52

K44

VCC_53

J55

VCC_54

H60

VCC_55

H51

VCC_56

H44

VCC_57

G60

VCC_58

G55

VCC_59

G51

VCC_60

G44

VCC_61

F55

VCC_62

E60

VCC_63

E57

VCC_64

E53

VCC_65

E50

VCC_66

E46

VCC_67

E42

VCC_68

D59

VCC_69

D57

VCC_70

D55

VCC_71

D54

VCC_72

D52

VCC_73

D50

VCC_74

D48

VCC_75

D47

VCC_76

D45

VCC_77

D43

VCC_78

B60

VCC_79

B56

VCC_80

B53

VCC_81

B49

VCC_82

B46

VCC_83

B42

VCC_84

A57

VCC_85

A54

VCC_86

A50

VCC_87

A47

VCC_88

A43

VCC_89

Low-Frequency Bulk 4x on Bottom Side, 1x on Top

REV1.0

U1H

+VCAP0

Don't connect to any other power

U1H

rail, this is package decoulpling

BD55

VCAP0_1

BD51

VCAP0_2

BD48

VCAP0_3

BB55

VCAP0_4

BB51

VCAP0_5

BB48

VCAP0_6

AY57

VCAP0_7

AY53

VCAP0_8

AY50

VCAP0_9

AW57

VCAP0_10

AW53

VCAP0_11

AW50

VCAP0_12

AU55

VCAP0_13

AU51

VCAP0_14

AU48

VCAP0_15

AR55

VCAP0_16

AR51

VCAP0_17

AR48

VCAP0_18

AN57

VCAP0_19

AN53

VCAP0_20

AN50

POWER

CPU CORE SUPPLY

AUBURNDALE SFF_BGA1288

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VCAP0_21

AL57

VCAP0_22

AL53

VCAP0_23

AL50

VCAP0_24

AK57

VCAP0_25

AK53

VCAP0_26

AK50

VCAP0_27

+VCAP1

BD44

VCAP1_1

BD41

VCAP1_2

BD37

VCAP1_3

BB44

VCAP1_4

BB41

VCAP1_5

BB37

VCAP1_6

AY46

VCAP1_7

AY42

VCAP1_8

AY39

VCAP1_9

AW46

VCAP1_10

AW42

VCAP1_11

AW39

VCAP1_12

AU44

VCAP1_13

AU41

VCAP1_14

AU37

VCAP1_15

AR44

VCAP1_16

AR41

VCAP1_17

AR37

VCAP1_18

AN46

VCAP1_19

AN42

VCAP1_20

AN39

VCAP1_21

AL46

VCAP1_22

AL42

VCAP1_23

AL39

VCAP1_24

AK46

VCAP1_25

AK42

VCAP1_26

AK39

VCAP1_27

Compal Secret Data

2009/12/10 2010/12/10

Compal Secret Data

1

C93

C93 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C103

C103 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C113

C113 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C94

C94 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C104

C104 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C114

C114 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Don't connect to any other power rail, this is package decoulpling

1

2

1

2

1

2

Deciphered Date

C120

C120 1U_0402_6.3V6K

1U_0402_6.3V6K

C130

C130 1U_0402_6.3V6K

1U_0402_6.3V6K

C140

C140 1U_0402_6.3V6K

1U_0402_6.3V6K

1

C121

C121 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C131

C131 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C141

C141 1U_0402_6.3V6K

1U_0402_6.3V6K

2

PROCESSOR Power Rail Table (EDS V1.0)

Voltage Rail

VAXG

VccPLL

VCORE 480.75

VDDR

VTT

4

1

C95

C95 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C105

C105 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C122

C122 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C132

C132 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Voltage

1.5

1.8

1.5

1.05

Title

Size Document Number Rev

Custom

Date: Sheet of

1

C96

C96 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C106

C106 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C123

C123 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C133

C133 1U_0402_6.3V6K

1U_0402_6.3V6K

2

S0 Iccmax Current (A)

22

1.35

3

18

Compal Electronics, Inc.

ARD-SFF(5/6)-Bypass

LA-6232P

5

1

C97

C97 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C107

C107 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C124

C124 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C134

C134 1U_0402_6.3V6K

1U_0402_6.3V6K

2

8 41Sunday, October 24, 2010

2.0

5

U1I

BU62

VSS1

BU58

VSS2

BU55

VSS3

BU51

VSS4

BU48

VSS5

BU44

VSS6

BU37

VSS7

BU32

VSS8

BU25

VSS9

BU21

VSS10

BU18

VSS11

BU14

D D

C C

B B

A A

VSS12

BU11

VSS13

BU7

VSS14

BP42

VSS15

BN64

VSS16

BN6

VSS17

BM70

VSS18

BM51

VSS19

BM44

VSS20

BM32

VSS21

BM24

VSS22

BM17

VSS23

BL57

VSS24

BL55

VSS25

BL48

VSS26

BL40

VSS27

BL28

VSS28

BL20

VSS29

BK63

VSS30

BK60

VSS31

BK53

VSS32

BK34

VSS33

BK10

VSS34

BJ64

VSS35

BJ21

VSS36

BJ9

VSS37

BJ1

VSS38

BH70

VSS39

BH57

VSS40

BH55

VSS41

BH47

VSS42

BH24

VSS43

BH20

VSS44

BH15

VSS45

BG51

VSS46

BG36

VSS47

BF62

VSS48

BF30

VSS49

BF13

VSS50

BF8

VSS51

BE70

VSS52

BE65

VSS53

BE9

VSS54

BE1

VSS55

BD57

VSS56

BD53

VSS57

BD50

VSS58

BD46

VSS59

BD42

VSS60

BD39

VSS61

BD14

VSS62

BB71

VSS63

BB62

VSS64

BB57

VSS65

BB53

VSS66

BB50

VSS67

BB46

VSS68

BB42

VSS69

BB39

VSS70

BB7

VSS71

BB1

VSS72

BA70

VSS73

AY71

VSS74

AY66

VSS75

AY62

VSS76

AY59

VSS77

AY55

VSS78

AY51

VSS79

AY48

VSS80

AR42

VSS140

AR39

VSS141

AR35

VSS142

AR33

VSS143

AR32

VSS144

AR30

VSS145

AR28

VSS146

AR26

VSS147

AR24

VSS148

AR23

VSS149

AR21

VSS150

AR19

VSS151

AR17

VSS152

AR15

VSS153

AR14

VSS154

AR4

VSS155

AR1

VSS156

AP70

VSS157

AP64

VSS158

AN62

VSS159

AN55

VSS160

AY44

VSS81

AY41

VSS82

AY37

VSS83

AY35

VSS84

AY33

VSS85

AY32

VSS86

AY30

VSS87

AY28

VSS88

AY26

VSS89

AUBURNDALE SFF_BGA1288

REV1.0

VSS

4

AY24

VSS90

AY23

VSS91

AY21

VSS92

AY19

VSS93

AY17

VSS94

AY15

VSS95

AY14

VSS96

AY12

VSS97

AY8

VSS98

AY4

VSS99

AW67

VSS100

AW62

VSS101

AW59

VSS102

AW55

VSS103

AW51

VSS104

AW48

VSS105

AW44

VSS106

AW41

VSS107

AW37

VSS108

AV9

VSS109

AV1

VSS110

AU70

VSS111

AU62

VSS112

AU57

VSS113

AU53

VSS114

AU50

VSS115

AU46

VSS116

AU42

VSS117

AU39

VSS118

AU35

VSS119

AU33

VSS120

AU32

VSS121

AU30

VSS122

AU28

VSS123

AU26

VSS124

AU24

VSS125

AU23

VSS126

AU21

VSS127

AU19

VSS128

AU17

VSS129

AU15

VSS130

AU14

VSS131

AU4

VSS132

AT64

VSS133

AT10

VSS134

AR62

VSS135

AR57

VSS136

AR53

VSS137

AR50

VSS138

AR46

VSS139

AN51

VSS161

AN48

VSS162

AN44

VSS163

AN41

VSS164

AN37

VSS165

AN5

VSS166

AN4

VSS167

AM64

VSS168

AM8

VSS169

AL62

VSS170

AL55

VSS171

AL51

VSS172

AL48

VSS173

AL44

VSS174

AL41

VSS175

AL37

VSS176

AL35

VSS177

AL33

VSS178

AL1

VSS179

AK70

VSS180

AK64

VSS181

AK55

VSS182

AK51

VSS183

AK48

VSS184

AK44

VSS185

AK41

VSS186

AK37

VSS187

AK32

VSS188

AK30

VSS189

AK28

VSS190

AK26

VSS191

AK24

VSS192

AK23

VSS193

AK21

VSS194

AK19

VSS195

AK17

VSS196

AK15

VSS197

AJ70

VSS198

AH62

VSS199

AH57

VSS200

AH55

VSS201

BV66

VSS202

BV64

VSS203

BT68

VSS204

BR69

VSS205

BR68

VSS206

BR3

VSS207

BN71

VSS208

BN1

VSS209

BL71

VSS210

BL1

VSS211

R14

VSS212

H71

VSS213

F71

VSS214

E69

VSS215

E68

VSS216

A66

VSS217

A64

VSS218

E5

VSS219

C68

VSS220

3

U1J

AH53

VSS202

AH51

VSS203

AH50

VSS204

AH48

VSS205

AH46

VSS206

AH44

VSS207

AH42

VSS208

AH41

VSS209

AH39

VSS210

AH37

VSS211

AH35

VSS212

AH33

VSS213

AH32

VSS214

AH30

VSS215

AH28

VSS216

AH26

VSS217

AH24

VSS218

AH23

VSS219

AH21

VSS220

AH19

VSS221

AH17

VSS222

AH15

VSS223

AH4

VSS224

AG64

VSS225

AG9

VSS226

AG6

VSS227

AF69

VSS228

AF62

VSS229

AF1

VSS230

AE70

VSS231

AE64

VSS232

AD62

VSS233

AD57

VSS234

AD53

VSS235

AD50

VSS236

AD46

VSS237

AD42

VSS238

AD4

VSS239

AC67

VSS240

AC64

VSS241

AC10

VSS242

AC5

VSS243

AC1

VSS244

AB70

VSS245

AB62

VSS246

AB57

VSS247

AB53

VSS248

AB50

VSS249

AB46

VSS250

AB42

VSS251

AB39

VSS252

AB37

VSS253

AB35

VSS254

AB33

VSS255

AB32

VSS256

AB30

VSS257

AB28

VSS258

AB26

VSS259

AB24

VSS260

AB23

VSS261

AB21

VSS262

AB19

VSS263

AB17

VSS264

AB15

VSS265

AB14

VSS266

AB9

VSS267

AA66

VSS268

AA64

VSS269

AA62

VSS270

AA57

VSS271

AA53

VSS272

AA50

VSS273

AA46

VSS274

AA42

VSS275

AA39

VSS276

AA37

VSS277

AA35

VSS278

AA33

VSS279

AA32

VSS280

AA30

VSS281

AA28

VSS282

AA26

VSS283

AA24

VSS284

AA23

VSS285

AA21

VSS286

AA19

VSS287

F20

VSS374

F4

VSS375

E37

VSS376

E33

VSS377

E30

VSS378

E16

VSS379

E12

VSS380

D41

VSS381

D38

VSS382

D34

VSS383

D31

VSS384

D27

VSS385

D24

VSS386

D20

VSS387

D17

VSS388

D13

VSS389

D10

VSS390

D6

VSS391

B65

VSS392

B40

VSS415

AUBURNDALE SFF_BGA1288

REV1.0

VSS

VSS404 VSS405 VSS406 VSS407 VSS408 VSS409 VSS410 VSS411 VSS412 VSS413 VSS393 VSS394 VSS395 VSS396 VSS397 VSS398 VSS399 VSS400 VSS401 VSS402 VSS403 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS326 VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS334 VSS335 VSS336 VSS337 VSS338 VSS339 VSS340 VSS341 VSS342 VSS343 VSS344 VSS345 VSS346 VSS347 VSS348 VSS349 VSS350 VSS351 VSS352 VSS353 VSS354 VSS355 VSS356 VSS357 VSS358 VSS359 VSS360 VSS361 VSS362 VSS363 VSS364 VSS365 VSS366 VSS367 VSS368 VSS369 VSS370 VSS371 VSS372 VSS373

2

A40 A36 A33 A29 A26 A22 A19 A15 A12 A8 B62 B58 B55 B51 B48 B44 A59 A55 A52 A48 A45 AA17 AA15 AA14 AA4 W69 W62 W57 W53 W50 W46 W42 W6 W1 V70 U64 U62 U57 U53 U50 U46 U42 U39 U9 U4 T1 R70 R62 R57 R53 R50 R46 R42 R5 P4 N63 N57 N53 N50 N46 N30 N21 N15 M53 M42 M36 M1 L70 L57 L48 L47 L13 K64 K53 K43 K36 K34 K32 K25 K17 K11 K6 K4 J65 J57 J48 J47 J40 J9 H53 H43 H36 H1 G70 G57 G53 G48 G47 G43 G30 G24 G20 G15 F61 F48 F47 F28

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/10 2010/12/10

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ARD-SFF(6/6)-GND

LA-6232P

1

2.0

9 41Sunday, October 24, 2010

2.0

5

DDR_B_DQS#[0..7]6

DDR_B_D[0..63]6

DDR_B_DM[0..7]6

DDR_B_DQS[0..7]6

DDR_B_MA[0..15]6

D D

C C

B B

A A

M1: Arrandale

4

Layout Note: Place near JDIMM1

+1.5V_DDR

1

C211

2

10U_0603_6.3V6M

Layout Note: Place near JDIMM1.203 & JDIMM1.204

+0.75VS

10U_0603_6.3V6M

@

C224

C223

1

2

C212

10U_0603_6.3V6M

C213

2

10U_0603_6.3V6M

1U_0402_6.3V6K

10U_0603_6.3V6M

@

C225

C227

C226

1

2

1

5

10U_0603_6.3V6M

2

1

C214

1U_0402_6.3V6K

C228

R75

1K_0402_1%

R76

1K_0402_1%

1

2

10U_0603_6.3V6M

1U_0402_6.3V6K

C229

2

1

+1.5V_DDR

C215

1U_0402_6.3V6K

2

1

12

VREF_DQ_DIMMB

12

C206

1

C216

2

10U_0603_6.3V6M

+1.5V +1.5V_DDR

1

C207

2

0.1U_0402_16V7K

2.2U_0603_10V6K

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

1

C218

C217

@

2

0.1U_0402_16V7K

10U_0603_6.3V6M

4

J505

2

112

JUMP_43X118@

DDR_B_CKE06

DDR_B_BS26

DDR_B_CLK06 DDR_B_CLK0#6

DDR_B_BS06

DDR_B_WE#6 DDR_B_CAS#6

DDR_B_CS1#6

1

C219

C220

@

2

0.1U_0402_16V7K

@

2

0.1U_0402_16V7K

4

1

2

0.1U_0402_16V7K

+3VS

2.2U_0603_10V6K

1

+

C210

C210 220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

2

1

C221

2

VREF_DQ_DIMMB

DDR_B_D0 DDR_B_D1

DDR_B_DM0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2

DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_B_CKE0

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_CLK0 DDR_B_CLK0#

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_B_CS1#

T22T22

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

R79 10K_0402_5%R79 10K_0402_5%

1 2

R80

1 2

1

10K_0402_5%

C222

2

0.1U_0402_16V7K

3

+1.5V_DDR +1.5V_DDR

+0.75VS

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4RN-7F

CONN@

VSS3

DQS#0

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5 VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

DM6

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7 VSS50

DQ62

DQ63 VSS52

EVENT#

SDA

VTT2

DQ4 DQ5

DQ6 DQ7

A15 A14

A11

CK1

BA1

S0#

SCL

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

G2

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 DIMM_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_B_CKE1

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

DDR_B_CLK1 DDR_B_CLK1#

DDR_B_BS1 DDR_B_RAS#

DDR_B_CS0# DDR_B_ODT0

DDR_B_ODT1

VREF_CA_DIMMB

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_EXTTS#0_1

+0.75VS

2

DIMM_DRAMRST# 4

DDR_B_CKE1 6

DDR_B_CLK1 6 DDR_B_CLK1# 6

DDR_B_BS1 6 DDR_B_RAS# 6

DDR_B_CS0# 6 DDR_B_ODT0 6

DDR_B_ODT1 6

1

C208

2

2.2U_0603_10V6K

PM_EXTTS#0_1 4 PCH_SMBDATA 11,13 PCH_SMBCLK 1 1,13

DDR3 SO-DIMM A Reverse Type

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/10 2010/12/10

Compal Secret Data

Deciphered Date

2

C209

1

+1.5V_DDR

12

R77

1K_0402_1%

1

2

1K_0402_1%

0.1U_0402_16V7K

12

R78

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDRIII SO-DIMM B

LA-6232P

1

2.0

10 41Sunday, October 24, 2010

2.0

A

B

C

D

E

F

G

H

R266 0_0603_5%R266 0_0603_5%

+1.05VS

1 1

1 2

1

C237

@C237

@

10U_0603_6.3V6M

2

+CLK_VDDSRC

1

C238

2

C239

10U_0603_6.3V6M

1

C240

2

0.1U_0402_16V7K

+1.5VS

0.1U_0402_16V7K

Integrated 33ohm Resistor

CLK_BUF_DREF_96M13 CLK_BUF_DREF_96M#13

CLK_BUF_DREF_96M CLK_BUF_DREF_96M#

Integrated 33ohm Resistor

CLK_BUF_PCIE_SATA13 CLK_BUF_PCIE_SATA#13

CLK_BUF_CPU_DMI13

2 2

CLK_BUF_CPU_DMI#13

CLK_BUF_PCIE_SATA CLK_BUF_PCIE_SATA#

CLK_BUF_CPU_DMI CLK_BUF_CPU_DMI#

R82 0_0402_5%R82 0_0402_5%

1 2

R84 0_0402_5%R84 0_0402_5%

1 2

R85 0_0402_5%R85 0_0402_5%

1 2

R87 0_0402_5%R87 0_0402_5%

1 2

R89 0_0402_5%R89 0_0402_5%

1 2

R90 0_0402_5%R90 0_0402_5%

1 2

CLK_BUF_DREF_96M#_R

+CLK_VDD

CLK_48M_CR_R

CLK_BUF_PCIE_SATA_R CLK_BUF_PCIE_SATA#_R

CLK_BUF_CPU_DMI_R CLK_BUF_CPU_DMI#_R

H_STP_CPU#

@

R304 0_0603_5 %

1 2

1

C241

@C241

@

10U_0603_6.3V6M

2

change to standard voltage of clock gen 7/23 non-stuff R304, stuff R81 change U12 to SA00003ET00

+CLK_1.5VDD

U12

1

VDD_DOT

2

VSS_DOT

3

DOT_96

4

DOT_96#

5

VDD_27MHZ

6

27MHZ

7

27MHZ_SS

8

USB48M

9

VSS_SATA

10

SATA_T

11

SATA_C

12

VSS_SRC

13

SRC_1T

14

SRC_1C

15

VDD_SRC_IO

16

CPU_STOP#

RTM875N-631-GRT_QFN32_5X5

Realtek: SA00003ET00, S IC RTM875N-631-GRT QFN 32P CLK GEN

+3VS

Silego Have Inte rnal Pull-Up

R92 10K_0402_5%R92 10K_0402_5%

1 2

H_STP_CPU#

+CLK_1.5VDD

1

C242

1

C243

2

10U_0603_6.3V6M

Clock Generator

REF_0/CPU_SEL

1

C244

2

0.1U_0402_16V7K

SCL SDA

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

CKPWRGD/PD#

VDD_CPU

CPU_0T CPU_0C

VSS_CPU

CPU_1T CPU_1C

VDD_CPU_IO

VDD_SRC

TGND

1 2

0_0603_5%

0.1U_0402_16V7K

R81

+CLK_VDD

32 31 30 29 28 27 26 25

24 23 22 21 20 19 18 17

33

+CLK_VDD

R81

+3VS

REF_0/CPU_SELCLK_BUF_DREF_96M_R

CLK_XTAL_IN CLK_XTAL_OUT

CK505_PWRGD

CLK_BUF_CPU_BCLK_R CLK_BUF_CPU_BCLK#_R

+CLK_VDDSRC+CLK_VDDSRC +CLK_1.5VDD

R307 0_0603_5 %R307 0_0603_5%

1

2

R83 33_0402_5%R83 33_0402_5%

1 2

C230

@C230

@

10U_0603_6.3V6M

1 2

R86 0_0402_5%R86 0_0402_5%

1 2

R88 0_0402_5%R88 0_0402_5%

1 2

Integrated 33ohm Resistor

+3VS

R91

R91 10K_0402_5%

10K_0402_5%

1 2

CK505_PWRGD

Q2

13

D

2

G

S

SSM3K7002FU_SC70-3

+CLK_VDD

C231

@C231

@

CLK_EN# 39

@

1

C233

C232

2

0.1U_0402_16V7K

10U_0603_6.3V6M

PCH_SMBCLK 1 0,13 PCH_SMBDATA 10,13

CLK_BUF_ICH_14M 13

CLK_BUF_CPU_BCLK CLK_BUF_CPU_BCLK#

1

C234

2

0.1U_0402_16V7K

@

C235

0.1U_0402_16V7K

@

1

C236

2

0.1U_0402_16V7K

1

2

CLK_BUF_CPU_BCLK 13 CLK_BUF_CPU_BCLK# 13

1

2

0.1U_0402_16V7K

C245

12

C245

33P_0402_50V8J

12

C246

33P_0402_50V8J

12

IDT Have Interna l Pull-Down

R93 10K_0402_5%R93 10K_0402_5%

3 3

1 2

(Default)

0 133MHz

1

REF_0/CPU_SEL

CPU_1PIN 30 CPU_0

133MHz

100MHz 100MHz

CLK_48M_CR_R

R95

@R95

@

1 2

0_0402_5%

14.318MHZ_20PF_X5H01431ADK1H -H

CLK_XTAL_IN

Y1

CLK_XTAL_OUT

PIN8 IS GND FOR ICS3197 PIN8 IS 48MHz FOR ICS3199

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/12/10 2010/12/10

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

Clock Generator

LA-6232P

G

2.0

11 41Sunday, October 24, 2010

H

2.0

5

R96

R101

HDA_BITCLK

PCH_RTCRST#

RC Delay 18~25mS

close to RAM door

PCH_SRTCRST#

RC Delay 18~25mS

close to RAM door

C576

@

1 2

22P_0402_50V8J

PCH_SPKR

SERIRQ

+3VALW

32.768KHZ_12.5PF_Q13MC1461005000

12.04

HDA_BITCLK30

HDA_SYNC30

HDA_RST#30

HDA_SDOUT30

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SO_SPI_SI

PCH_SI_SPI_SO

+RTCVCC

D D

+RTCVCC

C C

+3VS

R115 1K_040 2_5%@R115 1K_040 2_5%@

R118 10K_04 02_5%R118 10K_0402_5%

B B

1 2

20K_0402_1%

JOPEN1

1 2

JOPEN

C248

1 2

1U_0603_10V6K

1U_0603_10V6K R99

R99

1 2

20K_0402_1%

@ R101

@

1 2

10K_0603_5%

C250

1 2

1U_0603_10V6K

NO Reboot STRAP

1 2

4

C247

12P_0402_50V8J

12

3

OSC

NC

2

OSC

NC

C249

12

12P_0402_50V8J

+RTCVCC

R100 1M_ 0402_5%R100 1M_0402_5%

1 2

R102 330K_0 402_1%R102 330K_0 402_1%

1 2

INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs

R103 33_0402_5%R103 33_0402_5%

1 2

R104 33_0402_5%R104 33_0402_5%

1 2

R105 33_0402_5%R105 33_0402_5%

1 2

HDA_SDIN030

R106 33_0402_ 5%R106 33_0402_5%

1 2

R110 0_0402_5%R110 0_0402_5%

1 2

R111 0_0402_5%R111 0_0402_5%

1 2

R113 0_0402_5%R113 0_0402_5%

1 2

R116 0_0402_5%R116 0_0402_5%

1 2

Y2

PCH_SPKR30

4

10M_0402_5%

1

ME_EN#28

PCH_RTCX1

R98

PCH_RTCX2

12

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BITCLK_PCH

HDA_SYNC_PCH

PCH_SPKR

HDA_RST#_PCH

HDA_SDOUT_PCH

ME_EN#

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_RST#

PCH_SPI_CLK_R

PCH_SPI_CS0#_R

PCH_SO_SPI_SI_R

PCH_SI_SPI_SO_R

U13A

REV1.0

A13

RTCX1

C13

RTCX2

B16

RTCRST#

J15

SRTCRST#

G15

INTRUDER#

E11

INTVRMEN

E27

HDA_BCLK

E29

HDA_SYNC

U1

SPKR

C29

HDA_RST#

B28

HDA_SDIN0

J29

HDA_SDIN1

A29

HDA_SDIN2

D28

HDA_SDIN3

G29

HDA_SDO

E33

HDA_DOCK_EN#/GPIO33

A33

HDA_DOCK_RST#/GPIO13

J5

JTAG_TCK

J3

JTAG_TMS

L5

JTAG_TDI

G1

JTAG_TDO

J1

TRST#

AL5

SPI_CLK

AL7

SPI_CS0#

AL9

SPI_CS1#

AN7

SPI_MOSI

AN5

SPI_MISO

IBEXPEAK-M SFF_FCBGA1045

3

RTC IHDA

SPIJTAG

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN SATA1RXP SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA LPC

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

LDRQ0#

SERIRQ

E31 D32 C31 B32

G33

A31 G31

W7

AJ7 AJ5 AG11 AG9

AE1 AE3 AG3 AG1

AE11 AE9 AE7 AE5

AC9 AC11 AC5 AC7

AC3 AC1 AA3 AA1

AA11 AA9 AA5 AA7

AF10

AF12

U7

T4

V2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATA_COMP

PCH_SATALED#

PCH_GPIO21

PCH_GPIO19

2

LPC_AD0 28 LPC_AD1 28 LPC_AD2 28 LPC_AD3 28

LPC_FRAME# 28

SERIRQ 28

SATA_PRX_DTX_N0 24

SATA_PRX_DTX_P0 24 SATA_PTX_DRX_N0 24 SATA_PTX_DRX_P0 24

R108 37.4_0402_1%R108 37.4_0402_1%

1 2

R112 10K_04 02_5%R112 10K_0402_5%

1 2

PCH_SATALED# 2 9

R114 10K_04 02_5%R114 10K_0402_5%

1 2

R117 10K_04 02_5%R117 10K_0402_5%

1 2

1

SATA for HDD1

+1.05VS

+3VS

R119 200_0402 _5%@R119 200_0402_5%@

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_RST#

PCH_JTAG_TCK

A A

1 2

R120 100_0402 _5%@R120 100_0402_5%@

1 2

R121 200_0402 _5%@R121 200_0402_5%@

1 2

R122 100_0402 _5%@R122 100_0402_5%@

1 2

R123 200_0402 _5%@R123 200_0402_5%@

1 2

R124 100_0402 _5%@R124 100_0402_5%@

1 2

R126 20K_04 02_5%@R126 20K_0402_5%@

1 2

R127 10K_04 02_5%@R127 10K_0402_5%@

1 2

R128 51_0402_ 5%R128 51_0402_5%

1 2

5

Enable iTPM: SPI _MOSI Pull High

PCH_SO_SPI_SI_R

+RTCVCC

R131

1 2

510_0603_5%

1

C252

0.1U_0402_16V7K

2

+RTCBATT

4

R125 1K_040 2_5%@R125 1K_040 2_5%@

1 2

+3VS

SYS BIOS ROM

+3VS

R129

3.3K_0402_5%

PCH_SPI_CS0#

PCH_SI_SPI_SO

SPI_WP#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

U14

1

/CS

2

DO

3

/WP

4

GND

MX25L3205DM2I-12G_SO8

2009/12/10 2010/12/10

C251 0.1U_0402_16V7KC251 0.1U_0 402_16V7K

8

VCC

7

/HOLD

CLK

DIO

Compal Secret Data

6

5

Deciphered Date

PCH_SPI_CLK

PCH_SO_SPI_SI

1 2

12

R130

3.3K_0402_5%

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH-SFF (1/9) SATA,HDA,SPI

LA-6232P

1

12 41Sunday, October 24, 2010

2.0

5

PCIE_PRX_WLANTX_ N227

For WLAN

D D

For PCIE LAN

C C

For Wireless LAN

For PCIE LAN

B B

PCIE_PRX_WLANTX_ P227 PCIE_PTX_C_WLANR X_N227 PCIE_PTX_C_WLANR X_P227

PCIE_PRX_LANTX_N325

PCIE_PRX_LANTX_P325 PCIE_PTX_C_LANRX_N325 PCIE_PTX_C_LANRX_P325

for BIOS common design-1225

CLK_PCIE_WCARD#27 CLK_PCIE_WCARD27

WCARD_CLKREQ#27

CLK_PCIE_LAN#25 CLK_PCIE_LAN25

LAN_CLKREQ#25

C253 0.1U_0402_16V7KC253 0.1U_0402_16V7K

12

C254 0.1U_0402_16V7KC254 0.1U_0402_16V7K

12

C255 0.1U_0402_16V7KC255 0.1U_0402_16V7K

12

C256 0.1U_0402_16V7KC256 0.1U_0402_16V7K

12

switch port for BIOS common design-1225

R136 0_0402_5 %R136 0_0402_5%

1 2

R137 0_0402_5 %R137 0_0402_5%

1 2

R138 0_0402_5 %R138 0_0402_5%

1 2

R133 0_0402_5 %R133 0_0402_5%

1 2

R134 0_0402_5 %R134 0_0402_5%

1 2

R135 0_0402_5 %R135 0_0402_5%

1 2

4

PCIE_PRX_WLANTX_ N2 PCIE_PRX_WLANTX_ P2 PCIE_PTX_WLANRX_ N2 PCIE_PTX_WLANRX_ P2

PCIE_PRX_LANTX_N3 PCIE_PRX_LANTX_P3 PCIE_PTX_LANRX_N3 PCIE_PTX_LANRX_P3

PCH_GPIO73

CLK_PCIE_WCARD# _R

CLK_PCIE_WCARD_ R

WCARD_CLKREQ#_R

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

LAN_CLKREQ#_R

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

U13B

BA25

PERN1

AW25

PERP1

BC25

PETN1

BE25

PETP1

BE27

PERN2

BC27

PERP2

AU25

PETN2

AR25

PETP2

AW27

PERN3

BA27

PERP3

AU27

PETN3

AR27

PETP3

BD28

PERN4

BB28

PERP4

AU29

PETN4

AR29

PETP4

AW29

PERN5

BA29

PERP5

BE29

PETN5

BC29

PETP5

AU33

PERN6

AR33

PERP6

BA31

PETN6

AW31

PETP6

BE31

PERN7

BC31

PERP7

AR31

PETN7

AU31

PETP7

BD32

PERN8

BB32

PERP8

BE33

PETN8

BC33

PETP8

AM48

CLKOUT_PCIE0N

AM50

CLKOUT_PCIE0P

K4

PCIECLKRQ0#/GPIO73

AW49

CLKOUT_PCIE1N

AW51

CLKOUT_PCIE1P

R11

PCIECLKRQ1#/GPIO18

AT48

CLKOUT_PCIE2N

AT50

CLKOUT_PCIE2P

N1

PCIECLKRQ2#/GPIO20

AU49

CLKOUT_PCIE3N

AU51

CLKOUT_PCIE3P

D8

PCIECLKRQ3#/GPIO25

AR49

CLKOUT_PCIE4N

AR51

CLKOUT_PCIE4P

C3

PCIECLKRQ4#/GPIO26

AL49

CLKOUT_PCIE5N

AL51

CLKOUT_PCIE5P

G3

PCIECLKRQ5#/GPIO44

AH48

CLKOUT_PEG_B_N

AH50

CLKOUT_PEG_B_P

A9

PEG_B_CLKRQ# /GPIO56

REV1.0

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ#/GPIO47

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N

CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N/CKSSCD_N

CLKIN_SATA_P/CKSSCD_P

Clock Flex

IBEXPEAK-M SFF_FCBGA1045

3

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

J11

L11

A11

E9

B8

J9

E7

B12

A17

U11

T10

P10

R9

AG49 AG51

AL3 AL1

AN3 AN1

BA23 AW23

AP4 AP2

G17 E17

AG5 AG7

R47

A43

AD50 AD48

AE49

N51

R41

R43

N45

EC_LID_OUT#

SMBCLK

SMBDATA

PCH_GPIO60

PCH_SML0CLK

PCH_SML0DAT

PCH_GPIO74

PCH_SML1CLK

PCH_SML1DAT

PEG_CLKREQ#_R

without DP

XTAL25_IN XTAL25_OUT

XCLK_RCOMP

EC_LID_OUT# 28

check list CRB pull down.12/11

CLK_CPU_DMI# 4 CLK_CPU_DMI 4

CLK_BUF_CPU_DMI# 11 CLK_BUF_CPU_DMI 11

CLK_BUF_CPU_BCLK# 11 CLK_BUF_CPU_BCLK 11

CLK_BUF_DREF_96M# 11 CLK_BUF_DREF_96M 11

CLK_BUF_PCIE_SATA# 11 CLK_BUF_PCIE_SATA 11

CLK_BUF_ICH_14M 11

CLK_PCI_FB 16

R139 90.9_0402_1%R139 90.9_0402_1%

1 2

2

12

+1.05VS

CLK_PCI_MINI 27

R132

R132 10K_0402_5%

10K_0402_5%

@

1M_0402_5%

R140

Q4A

2N7002DWH_SOT363-6

SMBCLK

6 1

+3VS

Q4B

2N7002DWH_SOT363-6

SMBDATA

3 4

+3VS

Q5A

2N7002DWH_SOT363-6

PCH_SML1CLK

6 1

+3VS

Q5B

2N7002DWH_SOT363-6

PCH_SML1DAT

3 4

+3VS

C257

C257 12P_0402_50V8J

12P_0402_50V8J

1 2

12

Y3

Y3 25MHz_12P_20PPM_X5H025000DC1H -H

25MHz_12P_20PPM_X5H025000DC1H -H

1 2

C258

C258 15P_0402_50V8J

15P_0402_50V8J

2

5

2

5

PCH_SMBCLK

PCH_SMBDATA

EC_SMB_CK2

EC_SMB_DA2

1

PCH_SMBCLK 1 0,11

PCH_SMBDATA 10,11

EC_SMB_CK2 28,29

EC_SMB_DA2 28,29

WCARD_CLKREQ#_R

PCH_SMBCLK PCH_SMBDATA

LAN_CLKREQ#_R

A A

R141 10K_04 02_5%R141 10K_0402_5%

1 2

R145 10K_04 02_5%R145 10K_0402_5%

1 2

R147 10K_04 02_5%R147 10K_0402_5%

1 2

R155 10K_04 02_5%R155 10K_0402_5%

1 2

5

EC_LID_OUT#

SMBCLK SMBDATA

PCH_GPIO60

PCH_SML1CLK PCH_SML1DAT

PCH_GPIO74

PCH_GPIO73

PCH_GPIO44 PCH_GPIO56

PCH_GPIO26

PCH_GPIO25

PCH_SML0CLK PCH_SML0DAT

R142 10K_04 02_5%R142 10K_0402_5%

1 2

R144 2.2K_0402_5 %R144 2.2K_0402_5%

1 2

R146 2.2K_0402_5 %R146 2.2K_0402_5%

1 2

R148 10K_04 02_5%R148 10K_0402_5%

1 2

R149 2.2K_0402_5 %R149 2.2K_0402_5%

1 2

R150 2.2K_0402_5 %R150 2.2K_0402_5%

1 2

R151 10K_04 02_5%R151 10K_0402_5%

1 2

R143 10K_04 02_5%R143 10K_0402_5%

1 2

R152 10K_04 02_5%R152 10K_0402_5%

1 2

R153 10K_04 02_5%R153 10K_0402_5%

1 2

R154 10K_04 02_5%R154 10K_0402_5%

1 2

R156 10K_04 02_5%R156 10K_0402_5%

1 2

R2080 2.2K_0402_5%R2080 2.2K_0402_5%

1 2

R2081 2.2K_0402_5%R2081 2.2K_0402_5%

1 2

+3VALW+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/10 2010/12/10

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH-SFF (2/9) PCIE,SMB,CLK

LA-6232P

1

2.0

13 41Sunday, October 24, 2010

2.0

Compal LA-6232P NIUM1 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual