A
ZZZ1
ZZZ1
LA5972P_LS5971P_LS5083P
1 1
LA5972P_LS5971P_LS5083P
B
ZZZ3
ZZZ3
LA5972P
LA5972P
DAZ@
DAZ@
ZZZ4
ZZZ4
LS5971P
LS5971P
DAZ@
DAZ@
ZZZ5
ZZZ5
LS5083P
LS5083P
DAZ@
DAZ@
C
D
E
Compal Confidential
2 2
NAWA2 Schematics Document
AMD Tigris: Caspian Processor with RS880M/SB710/Park-S3 & M93-S3
3 3
4 4
A
B
2009-11-26
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-5972P
LA-5972P
LA-5972P
E
1 49Thursday, December 10, 2009
1 49Thursday, December 10, 2009
1 49Thursday, December 10, 2009
1.0
1.0
1.0
A
B
C
D
E
Tigris
Compal Confidential
Model Name : NAWA1
1 1
LCD (LED BL)
page 21
VRAM 512MB
64M16 x 4
page 19
DDR3 800MHz
ATI PARK-S3 & M93-S3
uFCBGA-631
Page 14,15,16,17,18
Fan Control
page 37
PCI-Express 16x
Gen2
CRT
page 22
PCI-Express 1x
AMD S1G3 Processor
uPGA-638 Package
Caspian
Hyper Transport Link
16 x 16
page 4,5,6,7
ATI RS880M
uFCBGA-528
page 10,11,12,13
Memory BUS(DDRII)
Dual Channel
1.8V DDRII 667 (800)
Thermal Sensor
ADM1032
WINBOND
page 32 page 32 page 31 page 32 page 31
200pin DDRII-SO-DIMM X2
BANK 0, 1, 2, 3
page 8,9
Clock Generator
page 6 page 20
SLG8SP626VTR
5 in 1 socket
page 29
Card Reader
RTS5138
page 29
MINI Card x1
WL AN
page 31
2 2
LAN(10/100)/1000
AR8131/AR8132
port 3port 2
page 30
A link Express2
ATI SB710
RJ45
page 30
uFCBGA-528
page 23,24,25,26,27
LPC BUS
conn
X 2
USB port 0,1
3.3V 48MHz
3.3V 24.576MHz/48M hz
S-ATA
SATA HDD
Conn.
page 28
port 0
USB
CMOS
Camera
USB port 7 USB port 8 USB port 3 USB port 5
USB
CDROM
Conn.
page 28
port 1
Bluetooth
Conn
HD Aud io
USB
conn
X 1
Mini
card
(WL)X1
HDA Codec
CX20671
page 36
Phone Jack x2
page 36
USB port 2
MIC
page 36
ENE KB926
3 3
Touch Pad
page 34
Power Board
page 35
DC/DC Interface.
page 38
page 33
Int.KBD
page 34
BIOS
page 34
Power Circuit
4 4
page 39,40,41,42,43,
44,45,46,47,48
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
2 49Thursday, December 10, 2009
2 49Thursday, December 10, 2009
2 49Thursday, December 10, 2009
1.0
A
Voltage Rails
Power Plane Description
VIN
B+
+CPU_CORE_0
+CPU_CORE_1 Core voltage for CPU (0.7-1.2V)
+CPU_CORE_NB Volta ge for On-die Northbridge of CPU(0.8-1.1V ) ON OFF OFF
1 1
+0.9V 0.9V switched power rail for DDR terminator
+1.1VS
+1.2V_HT 1.2V switched power rail ON OFF OFF
+VGA_CORE OFFOFFON
+1.5VS
+1.8V
+1.8VS 1.8V switched power rail
+2.5VS
+3 VA LW
+3V_LAN 3.3V power rail for LAN ON ON ON
+3 VS
+5 VA LW
+5 VS
+VSB VSB always on power rail ON ON *
+RTCVCC RTC power
2 2
Note : ON* means that this po wer plane is ON only with AC power available, otherwise it is OFF .
Adapter power s upply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU (0.7-1.2V)
1.1V switched power rail for NB VDDC & VGA
0.95-1.2V switched power rail
1.5V power rail for PCIE Card
1.8V power rail for CPU VDDIO and DDR
2.5V for CPU_VDDA
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
B
S1 S3 S5
N/A N/A N/A
ON OFF
ON OFF OFF
ON
ON OFF OFF
ON
ON
ON
ON
ON
ON
ON
ON
ON
N/AN/AN/A
OFF
OFF
ON
OF F OFF
OF F
ON
OF F
OFF
OFF
OFF
ON ON*
OFF
OFF
ON
ON*
OFF
OFFON
ONON
C
BTO Option Table
BTO Item BOM Structure
Discrete
PARK PARK@
M93 M93@
HDT debug HDT@
UMA UMA@
Wireless LAN WLAN@
Blue Tooth BT@
Camera CMOS@
New Card New Card@
VRAM X76@
UNPON @
VGA@
D
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
HIGH HIGH HIGH HIGH
LOW
LOW
LOW
HIGH
LOWLOWLOW
HIGHHIGHHIGH
HIGH
HIGH
LOW LOW LOW LOW
ON
ON
ON
ON
ON
ON
OFF
ON
OFF
NAWA1_UMA : UMA@/WLAN@/BT@/CMOS@/NEW CARD@
NAWA1_DIS : VGA@/M93@/WLAN@/BT@/NEW CARD@/CMOS@/X76@
PARK-S3 power on sequence
+3VS_VGA
+VGA_CPRE
+1.1VS_VGA
+1.8VS_VGA
E
ON ON
ON
OFF
OFF
OFF
LOW
OFF
OFF
OFF
External PCI Devices
Device IDSEL#
REQ#/GNT#
Interrupts
+3VS
(AVDD, VDD33)
RS880M power on sequence
+1.8VS
+1.1VS PLL Rails
(PLLVDD, IOPLLVDD)
+NB_CORE
3 3
EC SM Bus1 address
Device
Smart Batter y
Address Address
HEX
16H
SB710
SM Bus 0 address
Device
Clock Generator
(SILEGO SLG8SP626)
DDR DIMM1
DDR DIMM2
Mini c ard
4 4
A
Address
1101 001Xb
1001 000Xb
1001 010Xb
HEX
D2
90
94
EC SM Bus2 address
Device
ADI ADM1032 (CPU)
GMT G781-1 (GP U)
SB-Temp Sensor
1001 100X b0001 011X b
1001 101X b
SB710
SM Bus 1 address
Device Address
New card
B
HEX
98H
9AH
9CH
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-5972P
LA-5972P
LA-5972P
E
3 49Thursday, December 10, 2009
3 49Thursday, December 10, 2009
3 49Thursday, December 10, 2009
1.0
1.0
1.0
A
1 1
B
C
D
E
+1.2V_HT
250 mil
1
C755
H_CADIP[0..15](10)
H_CADIP[0..15]
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADOP[0..15] (10)
H_CADON[0..15] (10)H_CADIN[0..15](10)
C755
10U_0805_6.3V4Z
10U_0805_6.3V4Z
2
1
C727
C727
10U_0805_6.3V4Z
10U_0805_6.3V4Z
2
1
C666
C666
10U_0805_6.3V4Z
10U_0805_6.3V4Z
2
VLDT CAP.
1
C725C725
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
1
2
C726C726
0.22U_0603_16V4Z0.22U_0603_16V4Z
1
C722
C722
180P_0402_50V8J
180P_0402_50V8J
2
1
C668
C668
180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket
+1.2V_HT
2 2
VLDT=1.5A
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
3 3
H_CLKIP0(10)
H_CLKIN0(10)
H_CLKIP1(10)
H_CLKIN1(10)
H_CTLIP0(10)
H_CTLIP1(10) H_CTLOP1 (10)
H_CTLIN1(10)
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
D1
D2
D3
D4
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
J3
J2
J5
K5
N1
P1
P3
P4
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
6090022100G_B
6090022100G_B
JCPU1A
JCPU1A
HT LINK
HT LINK
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
ME@
ME@
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
+1.2V_HT
1 2
C664 10U_0805_6.3V4ZC664 10U_0805_6.3V4Z
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
H_CLKOP0 (10)
H_CLKON0 (10)
H_CLKOP1 (10)
H_CLKON1 (10)
H_CTLOP0 (10)
H_CTLON0 (10)H_CTLIN0(10)
H_CTLON1 (10)
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
AMD CPU S1G3 HT I/F
AMD CPU S1G3 HT I/F
AMD CPU S1G3 HT I/F
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
4 49Thursday, December 10, 2009
4 49Thursday, December 10, 2009
4 49Thursday, December 10, 2009
1.0
A
B
C
D
E
PLACE CLOSE TO PROCESSOR
WITHIN 1.2 INCH
AD10
AF10
AE10
AA16
D10
C10
B10
H16
T19
V22
U21
V19
T20
U19
U20
V20
N19
N20
E16
F16
Y1 6
P19
P20
N21
M20
N22
M19
M22
M24
K22
R21
K20
V24
K24
K19
R20
R23
R19
T22
T24
J22
J20
L20
L21
L19
L22
J21
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
VTT1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT2
VTT3
VTT4
MEMZP
MEMZN
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CLK_H2
MA_CLK_L2
MA_CLK_H3
MA_CLK_L3
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
6090022100G_B
6090022100G_B
ME@
ME@
JCPU1B
JCPU1B
1
2
1
2
1
2
1
2
VTT5
VTT6
VTT7
VTT8
VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
C888C888
1.5P_0402_50V9C1.5P_0402_50V9C
C891C891
1.5P_0402_50V9C1.5P_0402_50V9C
C890C890
1.5P_0402_50V9C1.5P_0402_50V9C
C889C889
1.5P_0402_50V9C1.5P_0402_50V9C
W10
AC10
AB10
AA10
A10
Y1 0
W17
B18
W26
W23
Y2 6
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
+0.9V+0.9V
VTT_SENSE
+MCH_REF
DDRB_ODT0
DDRB_ODT1
DDRB_SCS1#
DDRB_CKE0
DDRB_CKE1
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#DDRA_CLK1#
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
T4PAD T4PAD
DDRB_ODT0 ( 9)
DDRB_ODT1 ( 9)
DDRB_SCS1# (9)
DDRB_CKE0 (9)
DDRB_CKE1 (9)
DDRB_CLK0 (9)
DDRB_CLK0# (9)
DDRB_CLK1 (9)
DDRB_CLK1# (9)
DDRB_SBS0# (9)
DDRB_SBS1# (9)
DDRB_SBS2# (9)
DDRB_SRAS# (9)
DDRB_SCAS# (9)
DDRB_SWE# (9)
1 1
2 2
3 3
4 4
+1.8V
R78
R78
1K_0402_1%
1K_0402_1%
1 2
+MCH_REF
1
R79
R79
1K_0402_1%
1K_0402_1%
Place them close to CPU within 1"
1
2
1 2
C177C177
C178C178
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
1000P_0402_25V8J1000P_0402_25V8J
VTT=0.75A
R77 39.2_0402_1%R77 39.2_0402_1%
1 2
+1.8V
DDRA_ODT0(8 )
DDRA_ODT1(8 )
DDRA_SCS0#(8)
DDRA_SCS1#(8) DDRB_SCS0# (9)
DDRA_CKE0( 8)
DDRA_CKE1( 8)
DDRA_CLK0(8)
DDRA_CLK0#( 8)
DDRA_CLK1(8)
DDRA_CLK1#( 8)
DDRA_SMA[15..0](8) DDRB_SMA[15..0] (9)
DDRA_SBS0#(8 )
DDRA_SBS1#(8 )
DDRA_SBS2#(8 )
DDRA_SRAS#(8 )
DDRA_SCAS#(8 )
DDRA_SWE#(8 )
1 2
R76 39.2_0402_1%R76 39.2_0402_1%
DDRA_ODT0
DDRA_ODT1
DDRA_SCS0#
DDRA_SCS1# DDRB_SCS0#
DDRA_CKE0
DDRA_CKE1
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
DDRB_SDQ[63..0](9)
DDRB_SDM[7..0](9) DDRA_SDM[7..0] ( 8)
DDRB_SDQS0(9)
DDRB_SDQS0#(9)
DDRB_SDQS1(9)
DDRB_SDQS1#(9)
DDRB_SDQS2(9)
DDRB_SDQS2#(9)
DDRB_SDQS3(9)
DDRB_SDQS3#(9)
DDRB_SDQS4(9)
DDRB_SDQS4#(9)
DDRB_SDQS5(9)
DDRB_SDQS5#(9)
DDRB_SDQS6(9)
DDRB_SDQS6#(9)
DDRB_SDQS7(9)
DDRB_SDQS7#(9)
Processor DDR2 Memory Interface
JCPU1C
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
AE14
AF14
AF11
AD11
AB26
AE22
AC16
AD12
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
Y1 1
A12
B16
A22
E25
C12
B12
D16
C16
A24
A23
F26
E26
JCPU1C
6090022100G_B
6090022100G_B
ME@
ME@
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MEM:DATA
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y2 4
AB24
AB22
AA21
W22
W21
Y2 2
AA22
Y2 0
AA20
AA18
AB18
AB21
AD21
AD19
Y1 8
AD17
W16
W14
Y1 4
Y1 7
AB17
AB15
AD15
AB13
AD13
Y1 2
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y1 9
AB16
Y1 3
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y1 5
W15
W12
W13
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQ[63..0] (8)
DDRA_SDQS0 (8)
DDRA_SDQS0# (8)
DDRA_SDQS1 (8)
DDRA_SDQS1# (8)
DDRA_SDQS2 (8)
DDRA_SDQS2# (8)
DDRA_SDQS3 (8)
DDRA_SDQS3# (8)
DDRA_SDQS4 (8)
DDRA_SDQS4# (8)
DDRA_SDQS5 (8)
DDRA_SDQS5# (8)
DDRA_SDQS6 (8)
DDRA_SDQS6# (8)
DDRA_SDQS7 (8)
DDRA_SDQS7# (8)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
AMD CPU S1G3 DDRII I/F
AMD CPU S1G3 DDRII I/F
AMD CPU S1G3 DDRII I/F
LA-5972P
LA-5972P
LA-5972P
5 49Thursday, December 10, 2009
5 49Thursday, December 10, 2009
5 49Thursday, December 10, 2009
E
1.0
1.0
1.0
A
+2.5VS
1
+
+
C918
C918
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
1 1
CLK_CPU_BCLK(20)
CLK_CPU_BCLK#(20)
+1.8VS
R557
R557
300_0402_5%
300_0402_5%
1 2
LDT_RST#(23)
2 2
H_PWRGD(23)
LDT_STOP#(11,23)
3 3
+3VS
1
C206
C206
4 4
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C194
C194
1 2
3300P_0402_50V7K
3300P_0402_50V7K
<BOM Structure>
<BOM Structure>
LDT_RST#
1
C721
C721
0.01U_0402_16V7K
0.01U_0402_16V7K
@
@
2
+1.8VS
R558
R558
300_0402_5%
300_0402_5%
1 2
H_PWRGD
1
C720
C720
0.01U_0402_16V7K
0.01U_0402_16V7K
@
@
2
+1.8VS
R556
R556
300_0402_5%
300_0402_5%
1 2
LDT_STOP#
1
C719
C719
0.01U_0402_16V7K
0.01U_0402_16V7K
@
@
2
THERMDA_CPU
THERMDC_CPU
1
2
3
Address
A
2
C723
C723
C724 3900P _0402_50V7KC724 3900P _0402_50V7K
U10
U10
VDD
SCLK
D+
SDATA
ALERT#
D-
THERM#4GND
ADM1032ARMZ_MSOP8
ADM1032ARMZ_MSOP8
1001 100X b
1 2
1 2
8
7
6
5
1 2
MBK1608221YZF_0603
MBK1608221YZF_0603
1
C296
C296
2
180P_0402_50V8J
180P_0402_50V8J
close to L35
3900P_0402_50V7K
3900P_0402_50V7K
12
R455
R455
169_0402_1%
169_0402_1%
EC_SMB_CK2
EC_SMB_DA2
L63
L63
B
+2.5VDDA
3300P_0402_50V7K
3300P_0402_50V7K
1
C9414.7U_0805_10V4Z C9414.7U_0805_10V4Z
2
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
2
+1.8V
R70 390_0402_5%R70
+1.8V
R71 390_0402_5%@R71 390_0402_5%@
R82 44.2_0402_1%R82 44.2_0402_1%
R89 44.2_0402_1%R89 44.2_0402_1%
+1.2V_HT
EC_SMB_CK2 (33)
EC_SMB_DA2 (33)
B
1
C938
C938
2
1
12
1 2
1 2
CPU_VDD0_FB_H(47)
CPU_VDD0_FB_L(47)
CPU_VDD1_FB_H(47)
CPU_VDD1_FB_L(47)
VDDA=0.25A
1
C880C880
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
LDT_RST#
H_PWRGD
LDT_STOP#
390_0402_5%
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
T44 PADT44 PAD
T25 PADT25 PAD
T26 PADT26 PAD
T37 PADT37 PAD
T33 PADT33 PAD
T43 PADT43 PAD
T42 PADT42 PAD
T3 PADT3 PAD
T41 PADT41 PAD
R227 0_0402_5%R227 0_0402_5%
1 2
T2 PADT2 PAD
C
JCPU1D
JCPU1D
CPU_SIC
CPU_SID
CPU_HTREF0
CPU_HTREF1
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_VDD1_FB_H
CPU_VDD1_FB_L
CPU_TEST23
CPU_TEST18
CPU_TEST19
CPU_TEST25H
CPU_TEST25L
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27
CPU_TEST6
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_HE6VDDIO_FB_H
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
6090022100G_B
6090022100G_B
ME@
ME@
THERMTRIP_L
PROCHOT_L
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
KEY1
KEY2
SVC
SVD
MEMHOT_L
THERMDC
THERMDA
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
M11
W18
CPU_SVC
A6
CPU_SVD
A4
CPU_THERMTRIP#_R
AF6
H_PROCHOT#
AC7
AA8
THERMDC_CPU
W7
THERMDA_CPU
W8
W9
Y9
H6
G6
E10
AE9
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
T5PAD T5PAD
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_DBREQ#
CPU_TDO
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
CPU_TEST7
CPU_TEST10
CPU_TEST8
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
+1.8V
R117220_0402_5%
R117220_0402_5%
12
CPU_DBREQ#
CPU_DBRDY
@
@
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
CPU_SVC (47)
CPU_SVD (47)
VDDIO (43)
R118220_0402_5%
R118220_0402_5%
R119220_0402_5%
R119220_0402_5%
12
12
@
@
@
@
CPU_VDDNB_FB_H (47)
CPU_VDDNB_FB_L (47)
R555300_0402_5%R555300_0402_5%
R120300_0402_5%
R120300_0402_5%
12
1 2
@
@
+1.8V
MP(Remove)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
+1.8V
T24PAD T24PAD
T21PAD T21PAD
T34PAD T34PAD
T36PAD T36PAD
T32PAD T32PAD
T38PAD T38PAD
T31PAD T31PAD
T18PAD T18PAD
T67PAD T67PAD
T39PAD T39PAD
T35PAD T35PAD
@ SAMTEC_ASP-68200-07
@
D
1 2
R66 10K_0402_5%R66 10K_0402_5%
1 2
R67 300_0402_5%R67 300_0402_5%
CPU_THERMTRIP#_R
1 2
+1.8V
R69 300_0402_5%R69 300_0402_5%
H_PROCHOT#
CPU_SVC
CPU_SVD
CPU_TEST25H
CPU_TEST25L
CPU_TEST10
CPU_TEST18
CPU_TEST19
CPU_TEST22
CPU_TEST21
CPU_TEST24
CPU_TEST20
CPU_TEST23
CPU_TEST25H
CPU_TEST25L
JP1
JP1
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
2423
26
SAMTEC_ASP-68200-07
MP(mask)
E
B
B
2
Q9
Q9
E
E
3 1
C
C
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
R456 1K_0402_5%R456 1K_0402_5%
1 2
1 2
R549 1K_0402_5%R549 1K_0402_5%
@
@
1 2
R144 510_0402_5%
R144 510_0402_5%
1 2
R143 510_0402_5%R143 510_0402_5%
1 2
R101 0_0603_5%@R101 0_0603_5%@
1 2
R950 0_0603_5%@R950 0_0603_5%@
1 2
R951 0_0603_5%@R951 0_0603_5%@
1 2
R952 0_0603_5%@R952 0_0603_5%@
1 2
R75 300_0402_5%R75 300_0402_5%
1 2
R74 300_0402_5%R74 300_0402_5%
1 2
R73 300_0402_5%R73 300_0402_5%
1 2
R72 300_0402_5%R72 300_0402_5%
1 2
R136 510_0402_5%R136 510_0402_5%
1 2
R135 510_0402_5%
R135 510_0402_5%
@
@
HDT_RST#
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
R65
R65
1 2
0_0402_5%
0_0402_5%
R68
R68
1 2
0_0402_5%
0_0402_5%
+1.8V
R140
R140
1 2
0_0402_5%@
0_0402_5%@
+3VS
MP(Remove)
5
U15
U15
4
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
AMD CPU S1G3 CTRL
AMD CPU S1G3 CTRL
AMD CPU S1G3 CTRL
2
P
B
Y
1
A
G
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
@
@
LA-5972P
LA-5972P
LA-5972P
H_PROCHOT_R# (23,33)
+1.8V
E
H_THERMTRIP# (24)
LDT_RST#
SB_PWRGD (11,24,33)
6 49Thursday, December 10, 2009
6 49Thursday, December 10, 2009
6 49Thursday, December 10, 2009
1.0
1.0
1.0
A
VDD(+CPU_CORE) decoupling.
+CPU_CORE_0
1
+
+
C939
1 1
C939
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
+
+
C661
C661
330U_X_2VM_R6M
330U_X_2VM_R6M
2
Near CPU Socket
+CPU_CORE_0
1
C914
C914
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE_0
1
C887C887
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
2 2
1
C911
C911
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C276C276
0.01U_0402_16V7K0.01U_0402_16V7K
2
1
C273
C273
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C921
C921
180P_0402_50V8J
180P_0402_50V8J
2
1
C915
C915
22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
VDDIO decoupling.
+1.8V
1
C195
C195
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C228
C228
22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
1
C222
C222
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C886
C886
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
B
+CPU_CORE_1
+CPU_CORE_1
1
C214
C214
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C919
C919
180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C96
C96
330U_X_2VM_R6M
330U_X_2VM_R6M
2
+CPU_CORE_1
1
C274
C274
180P_0402_50V8J
180P_0402_50V8J
2
1
C238
C238
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C882C882
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
C
VDD0 = 18A VDD1 =18A
JCPU1E
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
K16
M16
P16
T16
V16
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
6090022100G_B
6090022100G_B
Athlon 64 S1
Processor Soc ket
ME@
ME@
JCPU1E
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
1
+
+
C643
C643
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
C227
C227
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C9C9
0.01U_0402_16V7K0.01U_0402_16V7K
2
1
C215
C215
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C230
C230
180P_0402_50V8J
180P_0402_50V8J
2
+CPU_CORE_0
VDDNB=4A
(For Tigris)
VDDNB=3A
+CPU_CORE_NB
+1.8V
VDDIO=3A
+CPU_CORE_NB decoupling.
+CPU_CORE_NB
1
C207
C207
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C910
C910
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C913
C913
22U_0805_6.3V6M
22U_0805_6.3V6M
2
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
D
JCPU1F
JCPU1F
AA4
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y2 5
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+CPU_CORE_1
+1.8V
AA11
AA13
AA15
AA17
AA19
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
AB2
AB7
AB9
AD6
AD8
B11
B13
B15
B17
B19
B21
B23
B25
D11
D13
D15
D17
D19
D21
D23
D25
H21
H23
B4
B6
B8
B9
D6
D8
D9
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
J4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
6090022100G_B
6090022100G_B
Athlon 64 S1
Processor Soc ket
ME@
ME@
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
E
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y2 1
Y2 3
N6
3 3
4 4
+1.8V
1
C301C301
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
+1.8V +1.8V
1
C309C309
0.01U_0402_16V7K0.01U_0402_16V7K
2
+1.8V
1
2
Between CPU Socket and DIMM
C211C211
4.7U_0805_10V4Z4.7U_0805_10V4Z
1
C302C302
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
1
C307C307
0.01U_0402_16V7K0.01U_0402_16V7K
2
1
C209C209
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
1
C303C303
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
1
C218
C218
180P_0402_50V8J
180P_0402_50V8J
2
1
C208C208
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
1
C300C300
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
1
C308
C308
180P_0402_50V8J
180P_0402_50V8J
2
1
C210C210
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
1
C310
C310
180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C226
C226
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
C219
C219
180P_0402_50V8J
180P_0402_50V8J
2
VTT decoupling.
220U_D2_4VM_R15
220U_D2_4VM_R15
+0.9V
1
C943C943
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
+0.9V
1
C942C942
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
1
C945C945
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
Near CPU Socket Right side.
1
C944C944
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
1
C883C883
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
1
C884C884
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
+0.9V
Near Power Supply
1
C937
C937
C: Change to NPO CAP
+
+
2
1
C885C885
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
1
C881C881
0.22U_0603_16V4Z0.22U_0603_16V4Z
2
1
C912
C912
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C893
C893
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C718
C718
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C892
C892
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C717
C717
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C920
C920
180P_0402_50V8J
180P_0402_50V8J
2
1
C716
C716
180P_0402_50V8J
180P_0402_50V8J
2
1
C922
C922
180P_0402_50V8J
180P_0402_50V8J
2
1
C715
C715
180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket Left side.
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
AMD CPU S1G3 PWR & GND
AMD CPU S1G3 PWR & GND
AMD CPU S1G3 PWR & GND
LA-5972P
LA-5972P
LA-5972P
7 49Thursday, December 10, 2009
7 49Thursday, December 10, 2009
7 49Thursday, December 10, 2009
E
1.0
1.0
1.0
A
+1.8V +1.8V
JDIMM1
JDIMM1
+V_DDR_MCH_REF
DDRA_SDQS0#(5)
1 1
2 2
3 3
4 4
DDRA_SDQS0(5)
DDRA_SDQS1#(5)
DDRA_SDQS1(5)
DDRA_SDQS2#(5)
DDRA_SDQS2(5)
DDRA_CKE0( 5)
DDRA_SBS2#(5 )
DDRA_SBS0#(5 )
DDRA_SWE#(5 )
DDRA_SCAS#(5)
DDRA_SCS1#(5)
DDRA_ODT1(5 )
DDRA_SDQS4#(5)
DDRA_SDQS4(5)
DDRA_SDQS6#(5)
DDRA_SDQS6(5)
SB_SMBDATA(9,20,24,31)
SB_SMBCLK(9,20,24,31)
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25 DDRA_SDQ29
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
SB_SMBDATA
SB_SMBCLK
+3VS
+3VS
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
GND
TYCO_292527-4
TYCO_292527-4
ME@
ME@
DQ12
DQ13
CK0#
DQ14
DQ15
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQS3#
DQS3
DQ30
DQ31
NC/CKE1
NC/A15
NC/A14
RAS#
ODT 0
NC/A13
DQ36
DQ37
DQ38
DQ39
DQ44
DQ45
DQS5#
DQS5
DQ46
DQ47
DQ52
DQ53
CK1#
DQ54
DQ55
DQ60
DQ61
DQS7#
DQS7
DQ62
DQ63
GND
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
VSS
DM1
VSS
CK0
VSS
VSS
VSS
VSS
DM2
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
BA1
VDD
VDD
VSS
VSS
DM4
VSS
VSS
VSS
VSS
VSS
VSS
CK1
VSS
DM6
VSS
VSS
VSS
VSS
VSS
SAO
SA1
B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
NC
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
A11
92
A7
94
A6
96
98
A4
100
A2
102
A0
104
106
108
110
S0#
112
114
116
118
120
NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDM0
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDM1
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDM2
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ28
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1DDRA_CKE0
DDRA_SMA15
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_SMA13
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQ62
DDRA_SDQ63
R39 10K_0402_5%R39 10K_0402_5%
1 2
R36 10K_0402_5%R36 10K_0402_5%
1 2
DDRA_CLK0 (5)
DDRA_CLK0# (5)
DDRA_SDQS3# (5)
DDRA_SDQS3 (5)
DDRA_CKE1 (5)
DDRA_SBS1# (5)
DDRA_SRAS# (5)
DDRA_SCS0# (5)
DDRA_ODT0 ( 5)
DDRA_SDQS5# (5)
DDRA_SDQS5 (5)
DDRA_CLK1 (5)
DDRA_CLK1# (5)
DDRA_SDQS7# (5)
DDRA_SDQS7 (5)
C
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]
+1.8V
+V_DDR_MCH_REF
1
1
C894C894
2
C923C923
2
1U_0402_6.3V4Z1U_0402_6.3V4Z
1000P_0402_25V8J1000P_0402_25V8J
Check layout place
DDRA_SDQ[0..63] (5)
DDRA_SDM[0..7] (5 )
DDRA_SMA[0..15] (5)
R147
R147
1K_0402_1%
1K_0402_1%
1 2
R148
R148
1K_0402_1%
1K_0402_1%
1 2
+V_DDR_MCH_REF
D
DDRA_SMA6
DDRA_SMA7
DDRA_SMA15
DDRA_SMA11
DDRA_CKE0
DDRA_SBS2#
DDRA_SBS1#
DDRA_SMA0
DDRA_SMA2
DDRA_SMA4
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SMA13
DDRA_ODT0
DDRA_SCS0#
DDRA_SRAS#
DDRA_CKE1
DDRA_SMA14
+0.9V
RP10
RP10
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP13
RP13
47_0804_8P4R_5%
47_0804_8P4R_5%
RP8
RP8
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP9
RP9
47_0804_8P4R_5%
47_0804_8P4R_5%
RP7
RP7
47_0804_8P4R_5%
47_0804_8P4R_5%
RP4
RP4
47_0804_8P4R_5%
47_0804_8P4R_5%
RP3
RP3
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
R987 47_0402_5%R987 47_0402_5%
1 2
R988 47_0402_5%R988 47_0402_5%
1 2
EMI
+1.8V
C13 0.1U_0402_16V4Z
C13 0.1U_0402_16V4Z
C175 0.1U_0402_16V 4Z
C175 0.1U_0402_16V 4Z
C176 0.1U_0402_16V 4Z
C176 0.1U_0402_16V 4Z
C16 0.1U_0402_16V4ZC16 0.1U_0402_16V4Z
C198 0.1U_0402_16V 4ZC198 0.1U_0402_16V 4Z
18
C225 0.1U_0402_16V 4ZC225 0.1U_0402_16V 4Z
27
36
C223 0.1U_0402_16V 4ZC223 0.1U_0402_16V 4Z
45
C159 0.1U_0402_16V 4ZC159 0.1U_0402_16V 4Z
C167 0.1U_0402_16V 4ZC167 0.1U_0402_16V 4Z
18
C179 0.1U_0402_16V 4ZC179 0.1U_0402_16V 4Z
27
36
C17 0.1U_0402_16V4ZC17 0.1U_0402_16V4Z
45
18
C169 0.1U_0402_16V 4ZC169 0.1U_0402_16V 4Z
27
36
C15 0.1U_0402_16V4ZC15 0.1U_0402_16V4Z
45
18
C157 0.1U_0402_16V 4ZC157 0.1U_0402_16V 4Z
27
36
C142 0.1U_0402_16V 4ZC142 0.1U_0402_16V 4Z
45
C145 0.1U_0402_16V 4ZC145 0.1U_0402_16V 4Z
C18 0.1U_0402_16V4ZC18 0.1U_0402_16V4Z
1 2
@
@
1 2
@
@
1 2
@
@
E
+1.8V
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1
C14
C14
C936
C936
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2.2U_0805_10V6K
2.2U_0805_10V6K
A
1
2
DIMM1 REV H:5.2mm (BOT)
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRII SO-DIMM 1
DDRII SO-DIMM 1
DDRII SO-DIMM 1
LA-5972P
LA-5972P
LA-5972P
E
8 49Thursday, December 10, 2009
8 49Thursday, December 10, 2009
8 49Thursday, December 10, 2009
1.0
1.0
1.0
A
B
C
D
E
+V_DDR_MCH_REF
1
C933
C933
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1 1
2 2
3 3
4 4
DDRB_SDQS0#(5)
DDRB_SDQS0(5)
DDRB_SDQS1#(5)
DDRB_SDQS1(5)
DDRB_SDQS2#(5)
DDRB_SDQS2(5)
DDRB_CKE0(5)
DDRB_SBS2#(5 )
DDRB_SBS0#(5 )
DDRB_SWE#(5 )
DDRB_SCAS#(5 )
DDRB_SCS1#(5)
DDRB_ODT1(5 )
DDRB_SDQS4#(5)
DDRB_SDQS4(5)
DDRB_SDQS6#(5)
DDRB_SDQS6(5)
SB_SMBDATA(8,20,24,31)
SB_SMBCLK(8,20,24,31)
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26 DDRB_SDQ30
DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
SB_SMBDATA
SB_SMBCLK
+3VS
+1.8V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
JDIMM2
JDIMM2
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
NC/CKE1
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
FOX_AS0A426-NARN-7F~N
FOX_AS0A426-NARN-7F~N
ME@
ME@
DIMM2 REV H:9.2mm (BOT)
A
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
VDD
NC/A15
NC/A14
VDD
VDD
VDD
RAS#
VDD
ODT 0
NC/A13
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
CK0
BA1
CK1
SA1
+1.8V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
NC
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
A11
92
A7
94
A6
96
98
A4
100
A2
102
A0
104
106
108
110
S0#
112
114
116
118
120
NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
B
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDM0
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDM2
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQ31
DDRB_CKE1
DDRB_SMA15
DDRB_SMA14
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQ62
DDRB_SDQ63
R37 10K_0402_5%R37 10K_0402_5%
1 2
R35 10K_0402_5%R35 10K_0402_5%
1 2
DDRB_CLK0 (5)
DDRB_CLK0# (5)
DDRB_SDQS3# (5)
DDRB_SDQS3 (5)
DDRB_CKE1 (5)
DDRB_SBS1# (5)
DDRB_SRAS# (5)
DDRB_SCS0# (5)
DDRB_ODT0 (5)
DDRB_SDQS5# (5)
DDRB_SDQS5 (5)
DDRB_CLK1 (5)
DDRB_CLK1# (5)
DDRB_SDQS7# (5)
DDRB_SDQS7 (5)
+3VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..15]
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
DDRB_SDQ[0..63] (5)
DDRB_SDM[0..7] (5 )
DDRB_SMA[0..15] (5)
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1#
DDRB_SMA14
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA15
DDRB_CKE1
DDRB_SMA12
DDRB_SMA9
DDRB_SMA5
DDRB_SMA8
DDRB_SBS0#
DDRB_SMA10
DDRB_SMA3
DDRB_SMA1
DDRB_ODT1
DDRB_SCS1#
DDRB_SWE#
DDRB_SCAS#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_SBS2#
DDRB_CKE0
D
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP12
RP12
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP14
RP14
47_0804_8P4R_5%
47_0804_8P4R_5%
RP11
RP11
47_0804_8P4R_5%
47_0804_8P4R_5%
RP5
RP5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP1
RP1
47_0804_8P4R_5%
47_0804_8P4R_5%
RP2
RP2
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
R989 47_0402_5%R989 47_0402_5%
1 2
R990 47_0402_5%R990 47_0402_5%
1 2
C171 0.1U_0402_16V 4ZC171 0.1U_0402_16V 4Z
C201 0.1U_0402_16V 4ZC201 0.1U_0402_16V 4Z
C180 0.1U_0402_16V 4ZC180 0.1U_0402_16V 4Z
C20 0.1U_0402_16V4ZC20 0.1U_0402_16V4Z
18
C200 0.1U_0402_16V 4ZC200 0.1U_0402_16V 4Z
27
36
C231 0.1U_0402_16V 4ZC231 0.1U_0402_16V 4Z
45
18
C21 0.1U_0402_16V4ZC21 0.1U_0402_16V4Z
27
36
C197 0.1U_0402_16V 4ZC197 0.1U_0402_16V 4Z
45
18
C146 0.1U_0402_16V 4ZC146 0.1U_0402_16V 4Z
27
36
C19 0.1U_0402_16V4ZC19 0.1U_0402_16V4Z
45
18
C122 0.1U_0402_16V 4ZC122 0.1U_0402_16V 4Z
27
36
C117 0.1U_0402_16V 4ZC117 0.1U_0402_16V 4Z
45
C147 0.1U_0402_16V 4ZC147 0.1U_0402_16V 4Z
C118 0.1U_0402_16V 4ZC118 0.1U_0402_16V 4Z
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+0.9V
RP6
RP6
+1.8V
12
1 2
12
1 2
12
1 2
12
1 2
12
1 2
12
1 2
12
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDRII SO-DIMM 2
DDRII SO-DIMM 2
DDRII SO-DIMM 2
LA-5972P
LA-5972P
LA-5972P
1.0
1.0
9 49Thursday, December 10, 2009
9 49Thursday, December 10, 2009
9 49Thursday, December 10, 2009
E
1.0
A
B
C
D
E
PCIE_GTX_C_MRX_P[0..15](14)
PCIE_GTX_C_MRX_N[0..15](14)
1 1
2 2
PCIE_PTX_C_IRX_P1(31)
PCIE_PTX_C_IRX_N1(31)
PCIE_PTX_C_IRX_P2(30)
PCIE_PTX_C_IRX_N2(30)
PCIE_PTX_C_IRX_P4(31)
PCIE_PTX_C_IRX_N4(31)
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
SB_RX0P(23)
SB_RX0N(23)
SB_RX1P(23)
SB_RX1N(23)
SB_RX2P(23)
SB_RX2N(23)
SB_RX3P(23)
SB_RX3N(23)
U20B
U20B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS880M_FCBGA528
RS880M_FCBGA528
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_P0
A5
B5
PCIE_MTX_GRX_P1
A4
PCIE_MTX_GRX_N1 PCIE_MTX_C_GRX_N1
B4
PCIE_MTX_GRX_P2
C3
PCIE_MTX_GRX_N2
B2
PCIE_MTX_GRX_P3
D1
PCIE_MTX_GRX_N3
D2
PCIE_MTX_GRX_P4 PCIE_MTX_C_GRX_P4
E2
PCIE_MTX_GRX_N4
E1
PCIE_MTX_GRX_P5
F4
PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_N5
F3
PCIE_MTX_GRX_P6
F1
PCIE_MTX_GRX_N6
F2
PCIE_MTX_GRX_P7
H4
PCIE_MTX_GRX_N7 PCIE_MTX_C_GRX_N7
H3
PCIE_MTX_GRX_P8
H1
PCIE_MTX_GRX_N8
H2
PCIE_MTX_GRX_P9
J2
PCIE_MTX_GRX_N9
J1
PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_P10
K4
PCIE_MTX_GRX_N10
K3
PCIE_MTX_GRX_P11
K1
PCIE_MTX_GRX_N11
K2
PCIE_MTX_GRX_P12
M4
PCIE_MTX_GRX_N12
M3
PCIE_MTX_GRX_P13
M1
PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N13
M2
PCIE_MTX_GRX_P14
N2
PCIE_MTX_GRX_N14
N1
PCIE_MTX_GRX_P15
P1
PCIE_MTX_GRX_N15 PCIE_MTX_C_GRX_N15
P2
AC1
AC2
PCIE_ITX_PRX_P1
AB4
PCIE_ITX_PRX_N1
AB3
PCIE_ITX_PRX_P2
AA2
PCIE_ITX_PRX_N2
AA1
Y1
Y2
PCIE_ITX_PRX_P4
Y4
PCIE_ITX_PRX_N4
Y3
V1
V2
SB_TX0P_C
AD7
SB_TX0N_C
AE7
SB_TX1P_C
AE6
SB_TX1N_C
AD6
SB_TX2P_C
AB6
SB_TX2N_C
AC6
SB_TX3P_C
AD5
SB_TX3N_C
AE5
AC8
AB8
R32 1.27K_0402_1%R32 1.27K_0402_1%
R267 2K_0402_1%R267 2K_0402_1%
RS780M Display Port Support (muxed on GFX)
DP0
3 3
4 4
DP1
GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
C646 0.1U_0402_10V7KVGA@C646 0.1U_0402_10V7KVGA@
1 2
C648 0.1U_0402_10V7KVGA@C648 0.1U_0402_10V7KVGA@
1 2
C650 0.1U_0402_10V7KVGA@C650 0.1U_0402_10V7KVGA@
1 2
C652 0.1U_0402_10V7KVGA@C652 0.1U_0402_10V7KVGA@
1 2
C356 0.1U_0402_10V7KVGA@C356 0.1U_0402_10V7KVGA@
1 2
C657 0.1U_0402_10V7KVGA@C657 0.1U_0402_10V7KVGA@
1 2
C365 0.1U_0402_10V7KVGA@C365 0.1U_0402_10V7KVGA@
1 2
C641 0.1U_0402_10V7KVGA@C641 0.1U_0402_10V7KVGA@
1 2
C636 0.1U_0402_10V7KVGA@C636 0.1U_0402_10V7KVGA@
1 2
C635 0.1U_0402_10V7KVGA@C635 0.1U_0402_10V7KVGA@
1 2
C632 0.1U_0402_10V7KVGA@C632 0.1U_0402_10V7KVGA@
1 2
C360 0.1U_0402_10V7KVGA@C360 0.1U_0402_10V7KVGA@
1 2
C627 0.1U_0402_10V7KVGA@C627 0.1U_0402_10V7KVGA@
1 2
C623 0.1U_0402_10V7KVGA@C623 0.1U_0402_10V7KVGA@
1 2
C624 0.1U_0402_10V7KVGA@C624 0.1U_0402_10V7KVGA@
1 2
C361 0.1U_0402_10V7KVGA@C361 0.1U_0402_10V7KVGA@
1 2
WLAN@
WLAN@
WLAN@
WLAN@
C614 0.1U_0402_10V7K
C614
1 2
C362 0.1U_0402_10V7K
C362 0.1U_0402_10V7K
1 2
C357 0.1U_0402_10V7KC357 0.1U_0402_10V7K
1 2
C618 0.1U_0402_10V7KC618 0.1U_0402_10V7K
1 2
C964 0.1U_0402_10V7K
C964 0.1U_0402_10V7K
1 2
C965 0.1U_0402_10V7K
C965 0.1U_0402_10V7K
1 2
NEWCARD@
NEWCARD@
NEWCARD@
NEWCARD@
C352 0.1U_0402_10V7KC352 0.1U_0402_10V7K
1 2
C609 0.1U_0402_10V7KC609 0.1U_0402_10V7K
1 2
C38 0.1U_0402_10V7KC38 0.1U_0402_10V7K
1 2
C33 0.1U_0402_10V7KC33 0.1U_0402_10V7K
1 2
C37 0.1U_0402_10V7KC37 0.1U_0402_10V7K
1 2
C32 0.1U_0402_10V7KC32 0.1U_0402_10V7K
1 2
C610 0.1U_0402_10V7KC610 0.1U_0402_10V7K
1 2
C616 0.1U_0402_10V7KC616 0.1U_0402_10V7K
1 2
1 2
1 2
C358 0.1U_0402_10V7KVGA@C358 0.1U_0402_10V7KVGA@
C649 0.1U_0402_10V7KVGA@C649 0.1U_0402_10V7KVGA@
C651 0.1U_0402_10V7KVGA@C651 0.1U_0402_10V7KVGA@
C653 0.1U_0402_10V7KVGA@C653 0.1U_0402_10V7KVGA@
C366 0.1U_0402_10V7KVGA@C366 0.1U_0402_10V7KVGA@
C876 0.1U_0402_10V7KVGA@C876 0.1U_0402_10V7KVGA@
C658 0.1U_0402_10V7KVGA@C658 0.1U_0402_10V7KVGA@
C364 0.1U_0402_10V7KVGA@C364 0.1U_0402_10V7KVGA@
C638 0.1U_0402_10V7KVGA@C638 0.1U_0402_10V7KVGA@
C637 0.1U_0402_10V7KVGA@C637 0.1U_0402_10V7KVGA@
C634 0.1U_0402_10V7KVGA@C634 0.1U_0402_10V7KVGA@
C631 0.1U_0402_10V7KVGA@C631 0.1U_0402_10V7KVGA@
C629 0.1U_0402_10V7KVGA@C629 0.1U_0402_10V7KVGA@
C363 0.1U_0402_10V7KVGA@C363 0.1U_0402_10V7KVGA@
C359 0.1U_0402_10V7KVGA@C359 0.1U_0402_10V7KVGA@
C621 0.1U_0402_10V7KVGA@C621 0.1U_0402_10V7KVGA@
0.1U_0402_10V7K
+1.1VS
PCIE_MTX_C_GRX_P[0..15] (14)
PCIE_MTX_C_GRX_N[0..15] (14)
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PCIE_ITX_C_PRX_P1 (31)
PCIE_ITX_C_PRX_N1 (31)
PCIE_ITX_C_PRX_P2 (30)
PCIE_ITX_C_PRX_N2 (30)
PCIE_ITX_C_PRX_P4 (31)
PCIE_ITX_C_PRX_N4 (31)
SB_TX0P (23)
SB_TX0N (23)
SB_TX1P (23)
SB_TX1N (23)
SB_TX2P (23)
SB_TX2N (23)
SB_TX3P (23)
SB_TX3N (23)
PCIE_MTX_C_GRX_N0PCIE_MTX_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
WLAN
LAN
New Card
H_CLKOP0( 4)
H_CLKON0(4)
H_CLKOP1( 4)
H_CLKON1(4)
H_CTLOP0(4)
H_CTLON0( 4)
H_CTLON1( 4)
R56
R56
1 2
301_0402_1%
0718 Place within 1"
layout 1:2
301_0402_1%
PART 1 OF 6
PART 1 OF 6
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
H_CADIP[0..15]H_CADOP[0..15]
H_CADIN[0..15]
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
H_CADOP[0..15](4)
H_CADON[0..15](4) H_CADIN[0..15] (4)
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
H_CADON[0..15]
U20A
U20A
Y2 5
HT_RXCAD0P
Y2 4
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y2 2
HT_RXCAD11P
Y2 3
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
RS880M_FCBGA528
RS880M_FCBGA528
H_CADIP[0..15] (4)
H_CADIP0
D24
H_CADIN0
D25
H_CADIP1
E24
H_CADIN1
E25
H_CADIP2
F24
H_CADIN2
F25
H_CADIP3
F23
H_CADIN3
F22
H_CADIP4
H23
H_CADIN4
H22
H_CADIP5
J25
H_CADIN5
J24
H_CADIP6
K24
H_CADIN6
K25
H_CADIP7
K23
H_CADIN7
K22
H_CADIP8
F21
H_CADIN8
G21
H_CADIP9
G20
H_CADIN9
H21
H_CADIP10
J20
H_CADIN10
J21
H_CADIP11
J18
H_CADIN11
K17
H_CADIP12
L19
H_CADIN12
J19
H_CADIP13
M19
H_CADIN13
L18
H_CADIP14
M21
H_CADIN14
P21
H_CADIP15
P18
H_CADIN15
M18
H24
H25
L21
L20
H_CTLIP0
M24
H_CTLIN0
M25
H_CTLIP1
P19
H_CTLIN1
R18
B24
B25
0718 Place within 1"
layout 1:2
SA00002DR30 S IC 216-0674026 A13 RS780MN FCBGA 0FA
H_CLKIP0 (4)
H_CLKIN0 (4)
H_CLKIP1 (4)
H_CLKIN1 (4)
H_CTLIP0 ( 4)
H_CTLIN0 (4)
H_CTLIP1 ( 4)H_CTLOP1(4)
H_CTLIN1 (4)
R51
R51
1 2
301_0402_1%
301_0402_1%
SA000032710 S IC 216-0752001 A11 RS880M FCBGA528 0FA
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
RS880-HT/PCIE
RS880-HT/PCIE
RS880-HT/PCIE
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
10 49Thursday, December 10, 2009
10 49Thursday, December 10, 2009
10 49Thursday, December 10, 2009
1.0
A
For RS780M A13
RED: Connected to GND through two separate 140ohm 1% resistor
UMA@
UMA@
1 2
R45 140_0402_1%
R45
UMA@
UMA@
1 2
R49 150_0402_1%
R49
UMA@
UMA@
1 2
R50 150_0402_1%
1 1
+1.1VS
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+1.8VS
FBMA-L11-160808-221LMT_0603
2 2
3 3
+3VS
12
4 4
12
FBMA-L11-160808-221LMT_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+1.8VS
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
CLK_NB_14.318M
12
R477
R477
100_0402_5%
100_0402_5%
@
@
1
C854
C854
100P_0402_50V8J
100P_0402_50V8J
2
@
@
+3VS
R460
R460
10K_0402_5%
10K_0402_5%
@
@
POWER_SEL
R1008
R1008
2K_0402_5%
2K_0402_5%
R563 4.7K_0402_5%
R563
R565 4.7K_0402_5%
R565 4.7K_0402_5%
PLLVDD=65mA
L59
L59
L13
L13
L9
L9
L14
L14
ALLOW_LDTSTOP(23)
+NB_PLLVDD
12
1
C645
C645
2
PLLVDD18=20mA
+NB_HTPVDD+1.8VS
12
1
C93
C93
2
VDDA18HTPLL=20mA
+VDDA18HTPLL
12
1
C934
C934
2
VDDA18PCIEPLL=0.12A
+VDDA18PCIEPLL
12
1
C87
C87
2
+1.1VS
UMA@
UMA@
4.7K_0402_5%
1 2
1 2
UMA@
UMA@
A
1
C663
C663
1U_0402_6.3V4Z@
1U_0402_6.3V4Z@
2
1
C84
C84
1U_0402_6.3V4Z@
1U_0402_6.3V4Z@
2
1
C924
C924
1U_0402_6.3V4Z@
1U_0402_6.3V4Z@
2
1
C86
C86
1U_0402_6.3V4Z@
1U_0402_6.3V4Z@
2
4.7K_0402_5%
4.7K_0402_5%
1 2
R564
R564
GMCH_LCD_CLK
GMCH_LCD_DATA
R50
NB_PWRGD
SB_PWRGD(6,24,33)
1 2
R566
R566
4.7K_0402_5%
4.7K_0402_5%
GMCH_CRT_R
140_0402_1%
GMCH_CRT_G
150_0402_1%
GMCH_CRT_B
150_0402_1%
+1.8VS
+1.8VS
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+1.8VS
2
1
PLT_RST#(13,14,23,30,31,33)
NB_PWRGD(24)
+1.8VS
R283 300_0402_5%R283 300_0402_5%
+1.8VS
R60
R60
1K_0402_5%
1K_0402_5%
1 2
R59 0_0402_5%R59 0_0402_5%
1 2
B
+3VS
AVDDDI=20mA
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AVDDQ=4mA
L8
L8
12
1
C935
C935
2
U42
U42
5
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
P
B
4
Y
A
G
3
12
CLK_NBGFX(20)
CLK_NBGFX#(20)
CLK_SBLINK_BCLK(20)
CLK_SBLINK_BCLK#(20)
GMCH_LCD_CLK(21)
GMCH_LCD_DATA(21)
POWER_SEL
HIGH 1.0V
B
AVDD=0.11A
L15
L15
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
1U_0402_6.3V4Z@
L10
L10
+AVDDQ
GMCH_CRT_HSYNC(13,22)
GMCH_CRT_VSYNC(13,22)
R107 0_0402_5%R107 0_0402_5%
1 2
1 2
R511 0_0402_5%@R511 0_0402_5%@
POWER_SEL(45)
1U_0402_6.3V4Z@
12
1
C22
C22
2
1
C875
C875
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
@
@
GMCH_CRT_R(22)
GMCH_CRT_G(22)
GMCH_CRT_B(22)
GMCH_CRT_CLK(22)
GMCH_CRT_DATA(22)
R42 715_0402_1%R42 715_0402_1%
+NB_PLLVDD
+NB_HTPVDD
+VDDA18HTPLL
+VDDA18PCIEPLL
CLK_NBHT(20)
CLK_NBHT#(20)
CLK_NB_14.318M(20)
1.1VLOW
NB_ALLOW_LDTSTOP
12
C874
C874
+AVDD2
1 2
NB_ALLOW_LDTSTOP
CLK_NB_14.318M
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_HDMI_DATA_R2
GMCH_HDMI_CLK_R2
GMCH_HDMI_CLK
GMCH_HDMI_DATA
POWER_SEL
AUX_CAL(13)
Strap pin
+AVDD1
1
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
2
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
GMCH_CRT_CLK
GMCH_CRT_DATA
+NB_PLLVDD
+NB_HTPVDD
NB_RESET#
NB_PWRGD_R
NB_LDTSTOP#
C
C94
C94
U20C
U20C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT _GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT _GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N(NC)
A8
DDC_CLK0/AUX0P(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS880M_FCBGA528
RS880M_FCBGA528
LDT_STOP#(6,23)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PART 3 OF 6
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
0_0402_5%
0_0402_5%
1 2
R280
R280
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
C
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
SUS_STAT#(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
NB_LDTSTOP#
Compal Secret Data
Compal Secret Data
Compal Secret Data
HPD(NC)
TESTMODE
Deciphered Date
Deciphered Date
Deciphered Date
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
4.7K_0402_5%
4.7K_0402_5%
D9
D10
D12
AE8
AD8
D13
+VDDLTP18
+VDDLT18
12
R469
R469
1 2
R106 0_0402_5%R106 0_0402_5%
1 2
R279
R279
1.8K_0402_5%
1.8K_0402_5%
D
GMCH_TXOUT0+ (21)
GMCH_TXOUT0- (21)
GMCH_TXOUT1+ (21)
GMCH_TXOUT1- (21)
GMCH_TXOUT2+ (21)
GMCH_TXOUT2- (21)
GMCH_TXCLK+ (21)
GMCH_TXCLK- (21)
@
@
R441
R441
1 2
D
R744 0_0402_5%R744 0_0402_5%
1 2
R29
R29
@
@
1 2
1.27K_0402_1%
1.27K_0402_1%
1.27K_0402_1%
1.27K_0402_1%
SUS_STAT# (24)
SUS_STAT_R# (13)
E
VDDLTP18=15mA
+VDDLTP18
1U_0402_6.3V4Z@
1U_0402_6.3V4Z@
VDDLT18=0.3A
+VDDLT18
0.1U_0402_16V4Z
0.1U_0402_16V4Z
UMA_ENVDD_R (21)
UMA_VARIBL (21,33)
ENBKL (33)
C665
C665
C90
C90
1
1
2
2
1
1
2
2
L56
L56
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
C644C644
2.2U_0603_6.3V4Z2.2U_0603_6.3V4Z
L12
L12
1 2
MBK1608221YZF_0603
MBK1608221YZF_0603
C95
C95
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+1.8VS
+1.8VS
Strap pin
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
RS880 VEDIO/CLK GEN
RS880 VEDIO/CLK GEN
RS880 VEDIO/CLK GEN
LA-5972P
LA-5972P
LA-5972P
11 49Thursday, December 10, 2009
11 49Thursday, December 10, 2009
11 49Thursday, December 10, 2009
E
1.0
1.0
1.0
A
1 1
2 2
FOR Version A11 pop 1.35VS A12
use 1.2V_HT
3 3
4 4
+1.1VS
MBK2012221YZF_0805
MBK2012221YZF_0805
+1.2V_HT
MBK2012221YZF_0805
MBK2012221YZF_0805
+1.8VS
MBK2012221YZF_0805
MBK2012221YZF_0805
MBK2012221YZF_0805
MBK2012221YZF_0805
L4
L4
12
L5
L5
4.7U_0805_10V4Z
4.7U_0805_10V4Z
L71
L71
4.7U_0805_10V4Z
4.7U_0805_10V4Z
L11
L11
12
C940
C940
4.7U_0805_10V4Z
4.7U_0805_10V4Z
VDDHTTX=0.68A
VDDA18PCIE=0.7A
12
C45
C45
VDDHTRX+VDDHT=1.3A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
1
1
C341
C344
C344
2
1
C85
C85
C336
C336
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C49
C49
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C40
C40
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C341
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C931
C931
2
1
C50
C50
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C51
C51
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
C89
C89
C612
C612
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C31
C31
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C47
C47
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C928
C928
2
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C342
C342
C925
C925
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C345
C345
C48
C48
2
2
VDD18=10mA
1
2
VDDHTRX=0.7A
+VDDHTRX
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VDDHT
+VDDHTTX
1
2
+VDDA18PCIE
1
2
B
VDDHT=0.6A
U20E
U20E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y2 0
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDD18_1
G9
VDD18_2
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS880M_FCBGA528
RS880M_FCBGA528
PART 5/6
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
POWER
POWER
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
C
VDDPCIE=2.5A
+VDDA11PCIE
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y1 1
AD10
AB10
AC10
H11
H12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
C30 10U_0805_10V4ZC30 10U_0805_10V4Z
C28 10U_0805_10V4ZC28 10U_0805_10V4Z
C29 4.7U_0805_10V4ZC29 4.7U_0805_10V4Z
C930 1U_0402_6.3V4ZC930 1U_0402_6.3V4Z
C929 1U_0402_6.3V4ZC929 1U_0402_6.3V4Z
C88 0.1U_0402_16V4ZC88
C339 0.1U_0402_16V4ZC339
NB_CORE=10A
C430.1U_0402_16V4Z C430.1U_0402_16V4Z
C230.1U_0402_16V4Z C230.1U_0402_16V4Z
C350.1U_0402_16V4Z C350.1U_0402_16V4Z
C340.1U_0402_16V4Z C340.1U_0402_16V4Z
1
1
1
1
1
C3430.1U_0402_16V4Z C3430.1U_0402_16V4Z
2
2
2
2
2
1
C24C24
C338
C338
2
L3
L3
1 2
1 2
1 2
1 2
1 2
1
1
C260.1U_0402_16V4Z C260.1U_0402_16V4Z
1
1
1
C3400.1U_0402_16V4Z C3400.1U_0402_16V4Z
C3370.1U_0402_16V4Z C3370.1U_0402_16V4Z
2
2
2
VDD33=60mA
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C3610U_0805_10V4Z C3610U_0805_10V4Z
C250.1U_0402_16V4Z C250.1U_0402_16V4Z
1
1
2
2
+3VS
D
U20F
U20F
A25
VSSAHT1
D23
VSSAHT2
E22
VSSAHT3
G22
VSSAHT4
G24
VSSAHT5
G25
VSSAHT6
H19
VSSAHT7
J22
VSSAHT8
L17
VSSAHT9
L22
VSSAHT10
L24
VSSAHT11
+1.1VS
+NB_CORE
C27 330U_D2E_2.5VM+C27 330U_D2E_2.5VM
1
C4410U_0805_10V4Z C4410U_0805_10V4Z
1
+
2
2
L25
VSSAHT12
M20
VSSAHT13
N22
VSSAHT14
P20
VSSAHT15
R19
VSSAHT16
R22
VSSAHT17
R24
VSSAHT18
R25
VSSAHT19
H20
VSSAHT20
U22
VSSAHT21
V19
VSSAHT22
W22
VSSAHT23
W24
VSSAHT24
W25
VSSAHT25
Y2 1
VSSAHT26
AD25
VSSAHT27
L12
VSS11
M14
VSS12
N13
VSS13
P12
VSS14
P15
VSS15
R11
VSS16
R14
VSS17
T12
VSS18
U14
VSS19
U11
VSS20
U15
VSS21
V12
VSS22
W11
VSS23
W15
VSS24
AC12
VSS25
AA14
VSS26
Y1 8
VSS27
AB11
VSS28
AB15
VSS29
AB17
VSS30
AB19
VSS31
AE20
VSS32
AB21
VSS33
K11
VSS34
RS780M_FCBGA528
RS780M_FCBGA528
U20D
U20D
AB12
MEM_A0(NC)
AE16
MEM_A1(NC)
V11
MEM_A2(NC)
AE15
MEM_A3(NC)
AA12
MEM_A4(NC)
AB16
MEM_A5(NC)
AB14
MEM_A6(NC)
AD14
MEM_A7(NC)
AD13
MEM_A8(NC)
AD15
MEM_A9(NC)
AC16
MEM_A10(NC)
AE13
MEM_A11(NC)
AC14
MEM_A12(NC)
Y1 4
MEM_A13(NC)
AD16
MEM_BA0(NC)
AE17
MEM_BA1(NC)
AD17
MEM_BA2(NC)
W12
MEM_RASb(NC)
Y1 2
MEM_CASb(NC)
AD18
MEM_WEb(NC)
AB13
MEM_CSb(NC)
AB18
MEM_CKE(NC)
V14
MEM_ODT(NC)
V15
MEM_CKP(NC)
W14
MEM_CKN(NC)
AE12
MEM_COMPP(NC)
AD12
MEM_COMPN(NC)
RS780M_FCBGA528
RS780M_FCBGA528
VSSAPCIE1
PART 6/6
PART 6/6
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
GROUND
GROUND
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
+1.8VS=W/S=20/10mil For Memory PLL power
+1.1VS=W/S=20/10mil For Memory PLL power
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
E
AA18
AA20
AA19
Y1 9
V17
AA17
AA15
Y1 5
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y1 7
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
15mA
+1.8VS
+1.1VS
26mA
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
RS880 PWR/GND
RS880 PWR/GND
RS880 PWR/GND
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
12 49Thursday, December 10, 2009
12 49Thursday, December 10, 2009
12 49Thursday, December 10, 2009
1.0
A
B
C
D
E
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
GMCH_CRT_VSYNC(11,22)
1 1
12
R560 3K _0402_5%R560 3K_0402_5%
12
R559 3K _0402_5%@R559 3K_0402_5%@
+3VS
Enables the Test Debug Bus using GPIO. (VSYNC)
1 : Disable (RS880m)
0 : Enable (RS880M)
DFT_GPIO1: LOAD_EEPROM_STRAPS
AUX_CAL(11)
RS780 DFT_GPIO1
2 2
SUS_STAT_R#(11) PLT_RST# (11,14,23,30,31,33)
1 2
R284 150_0402_1%@R284 150_0402_1%@
D29
D29
CH751H-40_SC76@
CH751H-40_SC76@
2 1
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
RS780 use HSYNC to enable SIDE PORT
RS780 use HSYNC to enable SIDE PORT
GMCH_CRT_HSYNC(11,22)
12
R281 3K _0402_5%R281 3K_0402_5%
@
@
12
R282 3K _0402_5%
R282 3K _0402_5%
+3VS
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
0. Enable (RS880M)
1 : Disable(RS880M)
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
RS880 STRAPS
RS880 STRAPS
RS880 STRAPS
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
13 49Thursday, December 10, 2009
13 49Thursday, December 10, 2009
13 49Thursday, December 10, 2009
1.0
5
U40A
U40A
4
3
2
PCIE_GTX_C_MRX_P[0..15](10)
PCIE_GTX_C_MRX_N[0..15](10)
PCIE_MTX_C_GRX_P[0..15](10)
PCIE_MTX_C_GRX_N[0..15](10)
1
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P0
D D
C C
B B
CLK_PCIE_VGA(20)
CLK_PCIE_VGA#(20)
A A
VGA_PWROK(44)
PLT_RST#
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
CLK_PCIE_VGA
CLK_PCIE_VGA#
PARK@
PARK@
R293 10K_0402_5%
R293 10K_0402_5%
5
R127
R127
1 2
0_0402_5%@
0_0402_5%@
PLT_RST#
12
AF30
PCIE_RX0P
AE31
PCIE_RX0N
AE29
PCIE_RX1P
AD28
PCIE_RX1N
AD30
PCIE_RX2P
AC31
PCIE_RX2N
AC29
PCIE_RX3P
AB28
PCIE_RX3N
AB30
PCIE_RX4P
AA31
PCIE_RX4N
AA29
PCIE_RX5P
Y2 8
PCIE_RX5N
Y3 0
PCIE_RX6P
W31
PCIE_RX6N
W29
PCIE_RX7P
V28
PCIE_RX7N
V30
PCIE_RX8P
U31
PCIE_RX8N
U29
PCIE_RX9P
T28
PCIE_RX9N
T30
PCIE_RX10P
R31
PCIE_RX10N
R29
PCIE_RX11P
P28
PCIE_RX11N
P30
PCIE_RX12P
N31
PCIE_RX12N
N29
PCIE_RX13P
M2 8
PCIE_RX13N
M3 0
PCIE_RX14P
L31
PCIE_RX14N
L29
PCIE_RX15P
K30
PCIE_RX15N
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
N10
PWRGOOD
AL27
PERSTB
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
PARK@
PARK@
CLOCK
CLOCK
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
4
PCIE_GTX_MRX_P0
AH30
PCIE_GTX_MRX_N0
AG31
PCIE_GTX_MRX_P1
AG29
PCIE_GTX_MRX_N1
AF28
PCIE_GTX_MRX_P2
AF27
PCIE_GTX_MRX_N2
AF26
PCIE_GTX_MRX_P3
AD27
PCIE_GTX_MRX_N3
AD26
PCIE_GTX_MRX_P4
AC25
PCIE_GTX_MRX_N4
AB25
PCIE_GTX_MRX_P5
Y2 3
PCIE_GTX_MRX_N5
Y2 4
PCIE_GTX_MRX_P6
AB27
PCIE_GTX_MRX_N6
AB26
PCIE_GTX_MRX_P7
Y2 7
PCIE_GTX_MRX_N7
Y2 6
PCIE_GTX_MRX_P8
W24
PCIE_GTX_MRX_N8
W23
PCIE_GTX_MRX_P9
V27
PCIE_GTX_MRX_N9
U26
PCIE_GTX_MRX_P10
U24
PCIE_GTX_MRX_N10
U23
PCIE_GTX_MRX_P11
T26
PCIE_GTX_MRX_N11
T27
PCIE_GTX_MRX_P12
T24
PCIE_GTX_MRX_N12
T23
PCIE_GTX_MRX_P13
P27
PCIE_GTX_MRX_N13
P26
PCIE_GTX_MRX_P14
P24
PCIE_GTX_MRX_N14
P23
PCIE_GTX_MRX_P15
M2 7
PCIE_GTX_MRX_N15
N26
Issued Date
Issued Date
Issued Date
1 2
1 2
Y2 2
AA22
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C131 0.1U_0402_10V7K VGA@C131 0.1U_0402_10V7K VGA@
1 2
1 2
C102 0.1U_0402_10V7K
C102 0.1U_0402_10V7K
C126 0.1U_0402_10V7K VGA@C126 0.1U_0402_10V7K VGA@
1 2
1 2
C130 0.1U_0402_10V7K
C130 0.1U_0402_10V7K
C101 0.1U_0402_10V7K VGA@C101 0.1U_0402_10V7K VGA@
1 2
1 2
C107 0.1U_0402_10V7K
C107 0.1U_0402_10V7K
C112 0.1U_0402_10V7K VGA@C112 0.1U_0402_10V7K VGA@
1 2
1 2
C129 0.1U_0402_10V7K
C129 0.1U_0402_10V7K
C124 0.1U_0402_10V7K VGA@C124 0.1U_0402_10V7K VGA@
1 2
1 2
C83 0.1U_0402_10V7K
C83 0.1U_0402_10V7K
C123 0.1U_0402_10V7K VGA@C123 0.1U_0402_10V7K VGA@
1 2
1 2
C98 0.1U_0402_10V7K
C98 0.1U_0402_10V7K
C103 0.1U_0402_10V7K VGA@C103 0.1U_0402_10V7K VGA@
1 2
1 2
C105 0.1U_0402_10V7K
C105 0.1U_0402_10V7K
C110 0.1U_0402_10V7K VGA@C110 0.1U_0402_10V7K VGA@
1 2
1 2
C125 0.1U_0402_10V7K
C125 0.1U_0402_10V7K
C133 0.1U_0402_10V7K VGA@C133 0.1U_0402_10V7K VGA@
1 2
1 2
C135 0.1U_0402_10V7K
C135 0.1U_0402_10V7K
C128 0.1U_0402_10V7K VGA@C128 0.1U_0402_10V7K VGA@
1 2
1 2
C132 0.1U_0402_10V7K
C132 0.1U_0402_10V7K
C108 0.1U_0402_10V7K VGA@C108 0.1U_0402_10V7K VGA@
1 2
1 2
C113 0.1U_0402_10V7K
C113 0.1U_0402_10V7K
C127 0.1U_0402_10V7K VGA@C127 0.1U_0402_10V7K VGA@
1 2
1 2
C99 0.1U_0402_10V7K
C99 0.1U_0402_10V7K
C134 0.1U_0402_10V7K VGA@C134 0.1U_0402_10V7K VGA@
1 2
1 2
C104 0.1U_0402_10V7K
C104 0.1U_0402_10V7K
C109 0.1U_0402_10V7K VGA@C109 0.1U_0402_10V7K VGA@
1 2
1 2
C136 0.1U_0402_10V7K
C136 0.1U_0402_10V7K
C106 0.1U_0402_10V7K VGA@C106 0.1U_0402_10V7K VGA@
1 2
1 2
C111 0.1U_0402_10V7K
C111 0.1U_0402_10V7K
C97 0.1U_0402_10V7K VGA@C97 0.1U_0402_10V7K VGA@
1 2
1 2
C100 0.1U_0402_10V7K
C100 0.1U_0402_10V7K
R1591.27K_0402_1% VG A@ R1591.27K_0402_1% VGA@
R3332K_0402_5% VGA@ R3332K_0402_5% VGA@
+VGA_PCIE
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
3
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
VGA@
VGA@
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
VGA@
VGA@
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
VGA@
VGA@
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
VGA@
VGA@
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
VGA@
VGA@
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
VGA@
VGA@
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
VGA@
VGA@
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
VGA@
VGA@
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
VGA@
VGA@
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
VGA@
VGA@
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
VGA@
VGA@
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
VGA@
VGA@
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
VGA@
VGA@
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
VGA@
VGA@
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
VGA@
VGA@
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
VGA@
VGA@
Compal Secret Data
Compal Secret Data
Compal Secret Data
U40
U40
M93-S3
M93-S3
M93@
M93@
Deciphered Date
Deciphered Date
Deciphered Date
U40F
U40F
LVDS CONTROL
LVDS CONTROL
LVTMDP
LVTMDP
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
PARK@
PARK@
VARY_BL
DIGON
TXCLK_UP_DPF3 P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N
2
R292VGA@ R292VGA@
1 2
10K_0402_5%
10K_0402_5%
AB11
AB12
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
R128VGA@ R128VGA@
1 2
0_0402_5%
0_0402_5%
R907VGA@ R907VGA@
1 2
10K_0402_5%
10K_0402_5%
VGA_VARIBL (21,33)
VGA_ENVDD (21)
add at 8/11
change at 8/11
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PARK-S3 PCIE/LVDS
PARK-S3 PCIE/LVDS
PARK-S3 PCIE/LVDS
LA-5972P
LA-5972P
LA-5972P
VGA_TXCLK+ (21)
VGA_TXCLK- (21)
VGA_TXOUT0+ (21)
VGA_TXOUT0- ( 21)
VGA_TXOUT1+ (21)
VGA_TXOUT1- ( 21)
VGA_TXOUT2+ (21)
VGA_TXOUT2- ( 21)
1
14 49Thursday, December 10, 2009
14 49Thursday, December 10, 2009
14 49Thursday, December 10, 2009
1.0
1.0
1.0
5
L40
L40
+1.8VS_VGA
D D
+VGA_PCIE
+1.8VS_VGA
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
C C
B B
add at 8/11
+1.8VS_VGA +DPLL_PVDD
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
CLK_XTALIN 27MCLK_SSIC
A A
27MCLK_SSIC
XTALOUT_XTL
08/11
Spread Spectrum For EMI
12
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
PARK@
PARK@
L23
L23
12
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
VGA@
VGA@
L24
L24
12
VGA@
VGA@
L83
L83
12
VGA@
VGA@
C951
C951
R843
R843
1 2
0_0402_5%
@ 0_0402_5%@
U46
U46
1
REFOUT
2
MODOUT
XOU T
3
XIN/CLKIN
ASM3P2872AF-06OR_TSOT-23-6@
ASM3P2872AF-06OR_TSOT-23-6@
R_27M_SSC
PARK@
PARK@
1
C322
C322
2
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
1
C324
C324
2
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
1
C323
C323
2
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.8VS_VGA
VGA@
VGA@
VGA@
VGA@
1
1
C952
C952
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
6
VSS
5
4
VDD
R841
R841
1 2
33_0402_1% @
33_0402_1% @
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
5
PARK@
PARK@
1
C695
C695
2
VGA@
VGA@
1
C694
C694
2
VGA@
VGA@
1
C696
C696
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+3VS_VGA
ACIN(25,33, 39)
VGA@
VGA@
1
C953
C953
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
27M_CLK(20)
C949
C949
C950
C950
+DPC_VDD18
PARK@
PARK@
1
130mA
C56
C56
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
+DPC_VDD10
VGA@
VGA@
1
200mA
C57
C57
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
+DPC_PVDD
VGA@
VGA@
1
20mA
C55
C55
2
0.1U_0402_10V6K
0.1U_0402_10V6K
VGA_LCD_CLK(21)
VGA_LCD_DATA(21)
R300
1 2
10K_0402_5%
10K_0402_5%
D4
VGA_ENBKL(33)
VGA_PWRSEL(44)
27M_SSC(20)
GPIO21_BBEN(17)
TEST_EN(16)
R481
R481
1 2
499_0402_1%
499_0402_1%
VGA@
VGA@
249_0402_1%
249_0402_1%
0.1U_0402_10V6K
0.1U_0402_10V6K
R582 82.5_0402_1%
R582
+3VS_VGA
1
1
2
2
@
@
@
@
@R300
@
RB751V_SOD323@D4RB751V_SOD323@
VGA@
VGA@
R332
R332
@
@
R842
R842
1 2
+1.8VS_VGA
AE9
N9
AE8
AD9
AC10
AD7
AC8
AC7
AB9
AB8
AB7
AB4
VRAM_ID2
VRAM_ID2(16)
VRAM_ID1(16)
VRAM_ID0(16)
+DPC_PVDD
+DPC_VDD18
+DPC_VDD10
VGA_LCD_CLK
VGA_LCD_DATA
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO3
GPU_GPIO4
21
VGA_ENBKL
GPU_GPIO8
GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
VGA_PWRSEL
R840
R840
1 2
THM_ALERT#
@ 0_0402_5%@
R301
1 2
10K_0402_5%
10K_0402_5%
GPIO21_BBEN TEST_EN
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
TEST_EN
+VREFG_GPU
VGA@
VGA@
1
12
C58
C58
2
+DPLL_PVDD
0.1U_0402_10V6K
0.1U_0402_10V6K
+DPLL_VDDC
82.5_0402_1%
12
12
R160
R160
100_0402_1%
100_0402_1%
@
@
GPU_THERMAL_D+
GPU_THERMAL_D-
T69 PADT69 PAD
@
@
1
C1040
C1040
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CLK_XTALOUTXTALOU T_XTL
@
@
1
C1041
C1041
2
0_0402_5%@
0_0402_5%@
VRAM_ID1
VRAM_ID0
R_27M_SSC
0_0402_5%
@R301
@
120mA
300mA
CLK_XTALIN
VGA@
VGA@
1
C1042
C1042
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AB2
Y8
Y7
W6
V6
AC6
AC5
AA5
AA6
U1
W1
U3
Y6
AA1
R1
R3
U6
U10
T10
U8
U7
T9
T8
T7
P10
P4
P2
N6
N5
N3
Y9
N1
M4
R6
W10
M2
P8
P7
N8
N7
K4
AF2 4
AB13
W8
W9
W7
AD10
AC14
AC16
AF1 4
AE14
AD14
AM28
AK28
AC22
AB22
T4
T2
R5
AD17
AC17
0.1U_0402_10V6K
0.1U_0402_10V6K
4
U40B
U40B
M93-S3/M92-S2
M93-S3/M92-S2
DVCNTL_0/ DVPDATA_18
L9
DVCNTL_1 / NC
DVCNTL_2 / TESTEN#2
DVDATA_12 / DVPDAT A_16
DVDATA_11 / DVPDAT A_20
DVDATA_10 / DVPDAT A_22
DVDATA_9 / DVPDAT A_12
DVDATA_8 / DVPDAT A_14
DVDATA_7 / DVPCNTL_0
DVDATA_6 / DVPDAT A_8
DVDATA_5 / DVPDAT A_6
DVDATA_4 DVPDAT A_4
DVDATA_3 / DVPDAT A_19
DVDATA_2 / DVPDAT A_21
DVDATA_1 / DVPDAT A_2
DVDATA_0 / DVPDAT A_0
DVO
DVO
M93-S3/M92-S2
M93-S3/M92-S2
DPC_PVDD / DVPDATA_ 11
DPC_PVSS / GND
DPC_VDD18#1/DVPDAT10
DPC_VDD18#2/DVPDAT23
DPC_VDD10#1/DVPDAT15
DPC_VDD10#2/DVPDAT17
DPC_VSSR#1 / DVPCLK
DPC_VSSR#2 / DVPDAT 5
DPC_VSSR#3 / GND
DPC_VSSR#4 / GND
DPC_VSSR#5/ DVPCNT L_MV0
SCL
I2C
I2C
SDA
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
JTAG_TDO
TESTEN
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
HPD1
VREFG
PLL/CLOCK
PLL/CLOCK
DPLL_PVDD
DPLL_PVSS
DPLL_VDDC
XTALIN
XTALOUT
NC#2/XO_IN
NC#1/XO_IN2
THERMAL
THERMAL
DPLUS
DMINUS
TS_FDO
TSVDD
TSVSS
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
PARK@
PARK@
4
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
DPA
DPA
TX0M_DPA2N
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
DPB
DPB
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
M92-S2/M93-S3
M92-S2/M93-S3
DVPDATA_3/TXCC P_DPC3P
DVPCNTL_2/TXCCM_DPC3N
DVPDATA_7 / T X0P_DPC2P
DVPDATA_1 / T X0M_DPC2N
DVPCNTL_MV1 / T X1P_DPC1P
DVPDATA_9 / T X1M_DPC1N
DVPDATA_13 / T X2P_DPC0P
DVPCNTL_1 / TX2M_DPC0N
VDDR4 / DPCD_CALR
DPC
DPC
DAC1
DAC1
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
M92-S2/M93-S3
M92-S2/M93-S3
R2 / NC
R2B / NC
G2 / NC
G2B / NC
B2 / NC
B2B / NC
C / NC
DAC2
DAC2
Y / NC
COMP / NC
H2SYNC
V2SYNC
VDD2DI / NC
VSS2DI / NC
A2VDD / NC
A2VDDQ / NC
A2VSSQ
R2SET / NC
M92-S2/M93-S3M92-S2/M93-S3
M92-S2/M93-S3M92-S2/M93-S3
DDC1CLK
DDC1DATA
AUX1P
DDC/AUX
DDC/AUX
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
NC/DDCCLK_AUX3P
NC/DDCDATA_AUX3N
3
CLK_XTALIN
12
R972
R972
1M_0402_5%
1M_0402_5%
VGA@
VGA@
1
C1022
C1022
2
22P_0402_50V8J VGA@
22P_0402_50V8J VGA@
12
VGA@
VGA@
1
C1000
C1000
2
12
VGA@
VGA@
1
C1001
C1001
2
12
PARK@
PARK@
1
C1007
C1007
2
+DPLL_VDDC+VGA_PCIE
VGA@
VGA@
1
C1013
C1013
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
CLK_XTALOUT
EMI request
add at 8/17
12
12
12
12
12
12
12
12
12
12
12
12
12
12
VGA@
VGA@
1
C998
C998
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
1
C1002
C1002
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
PARK@
PARK@
1
C1008
C1008
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
AF2
AF4
AG3
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
V4
U5
W3
V2
Y4
W5
AA3
Y2
AA12
AM26
R
AK26
RB
AL25
G
AJ2 5
GB
AH24
B
AG2 5
BB
AH26
AJ2 7
AD22
AG2 4
AE22
AE23
AD23
AM12
AK12
AL11
AJ1 1
AK10
AL9
AH12
AM10
AJ9
AL13
AJ1 3
AD19
AC19
AE20
AE17
AE19
AG1 3
AE6
AE5
AD2
AD4
AC11
AC13
AD13
AD11
AE16
AD16
AC1
AC3
AD20
AC20
70mA
45mA
50mA
130mA
1.5mA
12
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_CRT_HSYNC
VGA_CRT_VSYNC
R482
1 2
499_0402_1%
499_0402_1%
+AVDD
+VDD1DI
VGA_CRT_HSYNC2
VGA_CRT_VSYNC2
+VDD2DI
+A2VDD
+A2VDDQ
R908
1 2
715_0402_1%
715_0402_1%
VGA_CRT_CLK
VGA_CRT_DATA
R310
R310
150_0402_1%
150_0402_1%
VGA@
VGA@
VGA@R482
VGA@
VGA@R908
VGA@
add at 8/11
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
Y6
Y6
1 2
27MHZ_20P_7A27000010
27MHZ_20P_7A27000010
1
VGA@
VGA@
C1021
C1021
2
22P_0402_50V8J VGA@
22P_0402_50V8J VGA@
STRAPS
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO8
GPU_GPIO9
GPIO21_BBEN
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_VSYNC2
VGA_CRT_HSYNC2
GPU_GPIO8
VGA_CRT_R (22)
VGA_CRT_G (22)
VGA_CRT_B (22)
VGA_CRT_HSYNC (22)
VGA_CRT_VSYNC (22)
+1.8VS_VGA
+1.8VS_VGA
+1.8VS_VGA
VGA_CRT_CLK (22)
VGA_CRT_DATA (22)
L101
L101
VGA@
VGA@
3
R232 10K_0402_5%VGA@R232 10K_0402_5%VGA@
R228 10K_0402_5%@R228 10K_0402_5%@
R215 10K_0402_5%@R215 10K_0402_5%@
R233 10K_0402_5%@R233 10K_0402_5%@
R231 10K_0402_5%@R231 10K_0402_5%@
R216 10K_0402_5%@R216 10K_0402_5%@
R217 10K_0402_5%VGA@R217 10K_0402_5%VGA@
R236 10K_0402_5%@R236 10K_0402_5%@
R234 10K_0402_5%@R234 10K_0402_5%@
R229 10K_0402_5%@R229 10K_0402_5%@
R230 10K_0402_5%@R230 10K_0402_5%@
R235 10K_0402_5%@R235 10K_0402_5%@
R108 10K_0402_5%@R108 10K_0402_5%@
R1018 10K_0402_5%@ R1018 10K_0402_5%@
L96
L96
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
VGA@
VGA@
L97
L97
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
VGA@
VGA@
L99
L99
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
PARK@
PARK@
add at 8/11
12
VGA@
VGA@
VGA@
VGA@
1
1
C1014
C1014
C1015
C1015
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
+3VS_VGA
VIP_DEVICE_STRAP_ENA V2SYN C IGNORE VIP DEVICE STRAPS
+3VS_VGA
+AVDD
VGA@
VGA@
1
C999
C999
2
0.1U_0402_10V6K
0.1U_0402_10V6K
+1.8VS_VGA
+VDD1DI
VGA@
VGA@
1
C1003
C1003
2
0.1U_0402_10V6K
0.1U_0402_10V6K
+VDD2DI
PARK@
PARK@
1
C1009
C1009
2
0.1U_0402_10V6K
0.1U_0402_10V6K
VGA_SMB_CK2_R
VGA_SMB_DA2_R
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
1
CONFIGURATION STRAPS
STRAPS
BIF_GEN2_EN_A
BIOS_ROM_EN
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMI TTER DE-EMPHASIS ENABLED
GPIO2
GPIO8
GPIO9 VGA EN ABLEDBIF_VGA DIS
GPIO21
GPIO_22_ROMCSB
GPIO[13:11]ROMIDCFG(2:0)
H2SYNC
GENERICC
HSYNCAUD[1]
VSYNCAUD[0]
DESCRIPTION OF DEFAULT SETTINGSPIN
PCIE GNE2 ENABLED
ENABLE EXTERNAL BIOS ROM
SERIAL ROM TYPE OR MEMORY APERT URE SIZE SELECT
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
H2SYNC
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
L98
L98
12
PARK@
L100
L100
12
+3VS_VGA
12
12
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2
PARK@
1
C1004
C1004
2
10U_0603_6.3V6M
10U_0603_6.3V6M
PARK@
PARK@
1
C1010
C1010
2
10U_0603_6.3V6M
10U_0603_6.3V6M
R713
R713
10K_0402_5%
10K_0402_5%
VGA@
VGA@
VGA@
VGA@
VGA Thermal Sensor G781-1P8F
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C708
1 2
2200P_0402_50V7K
2200P_0402_50V7K
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
PARK@
PARK@
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
PARK@
PARK@
R714
R714
10K_0402_5%
10K_0402_5%
VGA@
VGA@
Closed to GPU
GPU_THERMAL_D+ VGA_SMB_DA2_R
GPU_THERMAL_D-
Deciphered D ate
Deciphered D ate
Deciphered D ate
+A2VDD
PARK@
PARK@
PARK@
PARK@
1
1
C1006
C1006
C1005
C1005
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
+A2VDDQ
PARK@
PARK@
PARK@
PARK@
1
1
C1012
C1012
C1011
C1011
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
+3VS_VGA
2
61
5
Q54A
Q54A
4
Q54B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+3VS_VGA
C137
C137
VGA@
VGA@
VGA@C708
VGA@
2
1
GENERICC
GPIO21_BB_EN
+3VS_VGA
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
8
7
6
5
LA-5972P
LA-5972P
LA-5972P
GPU_GPIO3
GPU_GPIO4
VGA_PWRSEL
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
VGA_LCD_DATA
VGA_LCD_CLK
VGA_SMB_CK2_R
1
R303 10K_0402_5%@R303 10K_0402_5%@
1 2
R297 10K_0402_5%@R297 10K_0402_5%@
1 2
R287 10K_0402_5%@R287 10K_0402_5%@
1 2
R302 10K_0402_5%@R302 10K_0402_5%@
1 2
R305 10K_0402_5%@R305 10K_0402_5%@
1 2
R294 10K_0402_5%@R294 10K_0402_5%@
1 2
R299 10K_0402_5%@R299 10K_0402_5%@
1 2
R298 10K_0402_5%@R298 10K_0402_5%@
1 2
R483 5.11K_0402_1%@R483 5.11K_0402_1%@
1 2
R341 4.7K_0402_5%VGA@R341 4.7K_0402_5%VGA@
12
R342 4.7K_0402_5%VGA@R342 4.7K_0402_5%VGA@
12
VGA_SMB_CK2 (33)
3
VGA@Q54B
VGA@
VGA_SMB_DA2 (33)
U26
U26
1
VDD1
SCLK
2
D+
SDATA
3
ALERT#
D-
THERM#4GND
G780P81U_MSOP8
G780P81U_MSOP8
VGA@
VGA@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
PARK-S3 Main Generic/MSIC
PARK-S3 Main Generic/MSIC
PARK-S3 Main Generic/MSIC
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
RECOMMENDED SETTINGS
0
0
0
0
0
0
0
001
0
0
0
11
R315
R315
10K_0402_5%
10K_0402_5%
VGA@
VGA@
1 2
12
12
R311
R311
R309
R309
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
THM_ALERT#
12
+3VS_VGA
R3404.7K_0402_5% VGA@ R3404. 7K_0402_5% VGA@
15 49Thursday, December 10, 2009
15 49Thursday, December 10, 2009
15 49Thursday, December 10, 2009
12
R308
R308
150_0402_1%
150_0402_1%
1.0
1.0
1.0
5
M_DA[63..0](19)
M_MA[13..0](19)
M_DQM[7..0](19)
M_DQS[7..0](19)
+1.8VS_VGA
12
12
+1.8VS_VGA
12
12
M_DQS#[7..0](19)
MVREFDA
1
C295
C295
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VGA@
VGA@
MVREFSA
1
C313
C313
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VGA@
VGA@
R486
R486
4.7K_0402_5%
4.7K_0402_5%
M93@
M93@
D D
R164
R164
100_0402_5%
100_0402_5%
VGA@
VGA@
R163
R163
100_0402_5%
100_0402_5%
VGA@
VGA@
C C
R166
R166
100_0402_5%
100_0402_5%
VGA@
VGA@
R165
R165
100_0402_5%
100_0402_5%
VGA@
VGA@
R485
R485
B B
4.7K_0402_5%
4.7K_0402_5%
M93@
M93@
M_DA[63..0]
M_MA[13..0]
M_DQM[7..0]
M_DQS[7..0]
M_DQS#[7..0]
R312
R312
240_0402_1%
240_0402_1%
M93@
M93@
C311
C311
0_0402_5%
0_0402_5%
M93@
M93@
C312
C312
0_0402_5%
0_0402_5%
M93@
M93@
M93-S3 PARK-S3
R330
R130
R312
R331
A A
R485
R486
C311
C312
NC
240
NC 0/short
240
NC
150
240
M93-S3 PARK-S3
4.7K
51.1
4.7K 51.1
0/short
0/short
5
0.1uF
0.1uF
+1.8VS_VGA
TEST_EN(15)
PARK@
PARK@
R486 51.1_0402_1%
R486 51.1_0402_1%
1 2
1 2
R485 51.1_0402_1%
R485 51.1_0402_1%
PARK@
PARK@
4
M_ D A 0
M_ D A 1
M_ D A 2
M_ D A 3
M_ D A 4
M_ D A 5
M_ D A 6
M_ D A 7
M_ D A 8
M_ D A 9
M_DA10
M_DA11
M_DA12
M_DA13
M_DA14
M_DA15
M_DA16
M_DA17
M_DA18
M_DA19
M_DA20
M_DA21
M_DA22
M_DA23
M_DA24
M_DA25
M_DA26
M_DA27
M_DA28
M_DA29
M_DA30
M_DA31
M_DA32
M_DA33
M_DA34
M_DA35
M_DA36
M_DA37
M_DA38
M_DA39
M_DA40
M_DA41
M_DA42
M_DA43
M_DA44
M_DA45
M_DA46
M_DA47
M_DA48
M_DA49
M_DA50
M_DA51
M_DA52
M_DA53
M_DA54
M_DA55
M_DA56
M_DA57
M_DA58
M_DA59
M_DA60
M_DA61
M_DA62
M_DA63
MVREFDA
MVREFSA
1 2
R330 240_0402_1%
R330 240_0402_1%
1 2
R130 0_0402_5%PARK@R130 0_0402_5% PARK@
1 2
R312 150_0402_1%
R312 150_0402_1%
1 2
R331 240_0402_1%PAR K@R331 240_0402_1%PARK@
DRAM_RST
PARK@
PARK@
C311 0.1U_0402_16V4Z
C311 0.1U_0402_16V4Z
1 2
1 2
C312 0.1U_0402_16V4Z
C312 0.1U_0402_16V4Z
PARK@
PARK@
4
3
U40C
U40C
K27
DQA_0
J29
DQA_1
H30
DQA_2
H32
DQA_3
G29
DQA_4
F28
DQA_5
F32
DQA_6
F30
DQA_7
C30
DQA_8
F27
DQA_9
A28
DQA_10
C28
DQA_11
E27
DQA_12
G26
DQA_13
D26
DQA_14
F25
DQA_15
A25
DQA_16
C25
DQA_17
E25
DQA_18
D24
DQA_19
E23
DQA_20
F23
DQA_21
D22
DQA_22
F21
DQA_23
E21
DQA_24
D20
DQA_25
F19
DQA_26
A19
DQA_27
D18
DQA_28
F17
DQA_29
A17
DQA_30
C17
DQA_31
E17
DQA_32
D16
DQA_33
F15
DQA_34
A15
DQA_35
D14
DQA_36
F13
DQA_37
A13
DQA_38
C13
DQA_39
E11
DQA_40
A11
DQA_41
C11
DQA_42
F11
DQA_43
A9
DQA_44
C9
DQA_45
F9
DQA_46
D8
DQA_47
E7
DQA_48
A7
DQA_49
C7
DQA_50
F7
DQA_51
A5
DQA_52
E5
DQA_53
C3
DQA_54
E1
DQA_55
G7
DQA_56
G6
DQA_57
G1
DQA_58
G3
DQA_59
J6
DQA_60
J1
DQA_61
J3
DQA_62
J5
DQA_63
K26
MVREFDA
J26
PARK@
PARK@
PARK@
PARK@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MVREFSA
J25
MEM_CALRN0
K7
NC/TESTEN#2
J8
MEM_CALRP1/DPC_CALR
K25
MEM_CALRP0
L10
DRAM_RST
K8
CLKTESTA
L7
CLKTESTB
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
PARK@
PARK@
Issued Date
Issued Date
Issued Date
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
MEMORY INTERFACE
MEMORY INTERFACE
RDQSA_0
RDQSA_1
RDQSA_2
RDQSA_3
RDQSA_4
RDQSA_5
RDQSA_6
RDQSA_7
WDQSA_0
WDQSA_1
WDQSA_2
WDQSA_3
WDQSA_4
WDQSA_5
WDQSA_6
WDQSA_7
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
ODTA0
ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
PX_EN
RSVD#2
RSVD#3
3
K17
J20
H23
G23
G24
H24
J19
K19
J14
K14
J11
J13
H11
G11
J16
L15
E32
E30
A21
C21
E13
D12
E3
F4
H28
C27
A23
E19
E15
D10
D6
G5
H27
A27
C23
C19
C15
E9
C5
H4
L18
K16
H26
H25
G9
H9
G22
G17
G19
G16
H22
J22
G13
K13
K20
J17
G25
H10
AB16
G14
G20
Compal Secret Data
Compal Secret Data
Compal Secret Data
M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_BA2
M_BA0
M_BA1
M_DQM0
M_DQM1
M_DQM2
M_DQM3
M_DQM4
M_DQM5
M_DQM6
M_DQM7
M_ D Q S0
M_ D Q S1
M_ D Q S2
M_ D Q S3
M_ D Q S4
M_ D Q S5
M_ D Q S6
M_ D Q S7
M_DQS#0
M_DQS#1
M_DQS#2
M_DQS#3
M_DQS#4
M_DQS#5
M_DQS#6
M_DQS#7
M_ O D T0
M_ O D T1
M_CLK0
M_CLK#0
M_CLK1
M_CLK#1
M_RAS#0
M_RAS#1
M_CAS#0
M_CAS#1
M_CS#0
M_CS#1
M_CKE0
M_CKE1
M_WE#0
M_WE#1
M_MA13
Deciphered Date
Deciphered Date
Deciphered Date
M_BA2 (19)
M_BA0 (19)
M_BA1 (19)
M_ O D T0 (19)
M_ O D T1 (19)
M_CLK0 (19)
M_CLK#0 (19)
M_CLK1 (19)
M_CLK#1 (19)
M_RAS#0 (19)
M_RAS#1 (19)
M_CAS#0 (19)
M_CAS#1 (19)
M_CS#0 (19)
M_CS#1 (19)
M_CKE0 (19)
M_CKE1 (19)
M_WE#0 (19)
M_WE#1 (19)
2
Hynix H5TQ1G63BFR-12C
Samsung K4W1G1646E-HC12
2
1
+1.8VS_VGA
R834 10K_0402_5%H@R834 10K_0402_5%H@
1 2
R835 10K_0402_5%S@R835 10K_0402_5%S@
1 2
R836 10K_0402_5%S@R836 10K_0402_5%S@
1 2
R837 10K_0402_5%H@R837 10K_0402_5%H@
1 2
R838 10K_0402_5%@R838 10K_0402_5%@
1 2
R839 10K_0402_5%R839 10K_0402_5%
1 2
VRAM_ID0
VRAM_ID1
VRAM_ID2
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2
1
0 0
1
M93-S3 PARK-S3
R306
R579
NA
0/short 680
R320
C287
R579
R579
0_0402_5%
0_0402_5%
M93@
M93@
R579
DRAM_RST
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
12
R306
R306
10K_0402_5%
10K_0402_5%
PARK@
PARK@
R579
PARK@
PARK@
680_0402_5%
680_0402_5%
2.2nF 68pF
C287
C287
2200P_0402_50V7K
2200P_0402_50V7K
M93@
M93@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PARK-S3 MEM Interface
PARK-S3 MEM Interface
PARK-S3 MEM Interface
+VGA_CORE
1
C287
C287
68P_0402_50V8J
68P_0402_50V8J
PARK@
PARK@
2
LA-5972P
LA-5972P
LA-5972P
12
R320
R320
2.2K_0402_5%
2.2K_0402_5%
M93@
M93@
1
VRAM_ID0 (15)
VRAM_ID1 (15)
VRAM_ID2 (15)
00
10K
NA2.2K
DRAM_RST# (19)
16 49Thursday, December 10, 2009
16 49Thursday, December 10, 2009
16 49Thursday, December 10, 2009
1.0
1.0
1.0
5
DPE_VDD10
DPF_VDD10
+1.8VS_VGA
L30
L30
12
VGA@
BLM15BD121SN1D_0402
D D
C C
BLM15BD121SN1D_0402
VGA@
VGA@
+VGA_PCIE
VGA@
1
C327
C327
2
MBK1608121YZF_0603
MBK1608121YZF_0603
Park-S3: TMDS/DP=110mA@1.0V : LVDS=120mA@1.0V
M9X-S2/S3: TMDS/DP=170mA@1.1V LVDS=100mA@1.1V
200mA
VGA@
VGA@
VGA@
VGA@
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C64
C64
C402
C402
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
L31
L31
1 2
VGA@
VGA@
VGA@
VGA@
1
C401
C401
2
+DPF_VDD10
VGA@
VGA@
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C62
C62
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
1
C328
C328
2
4
U40G
U40G
+DPE_VDD18
AG15
DPE_VDD18#1
AG16
AG20
AG21
AG14
AH14
AM14
AM16
AM18
AF16
AG17
AF22
AG22
AF23
AG23
AM20
AM22
AM24
DPE_VDD18#2
DPE_VDD10#1
DPE_VDD10#2
DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5
DPF_VDD18#1
DPF_VDD18#2
DPF_VDD10#1
DPF_VDD10#2
DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5
+DPF_VDD10
0.12A
0.11A
+DPE_VDD18
+DPF_VDD10
0.11A
10U_0603_6.3V6M
10U_0603_6.3V6M
3
DP A/B POWERDP E/F POWER
DP A/B POWERDP E/F POWER
DPA_VDD18#1
DPA_VDD18#2
DPA_VDD10#1
DPA_VDD10#2
DPB_VDD18#1
DPB_VDD18#2
DPB_VDD10#1
DPB_VDD10#2
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
130mA
AE11
AF11
AF6
AF7
AE1
AE3
AG1
AG6
AH5
130mA
AE13
AF13
AF8
AF9
AF10
AG9
AH8
AM6
AM8
+DPA_VDD18
+DPA_VDD10+DPA_VDD10
+DPB_VDD18
+VPB_VDD10
@
@
PARK-S3 1.0V@110mA
M93-S3 1.1V@200mA
VGA@
VGA@
VGA@
VGA@
C326
C326
VGA@
VGA@
1
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
C400
C400
1
C60
C60
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PARK-S3 1.0V@110mA
M93-S3 1.1V@200mA
@
@
@
C325
C325
@
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
C404
C404
0.1U_0402_10V6K
0.1U_0402_10V6K
1
1
C63
C63
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
L25
L25
1 2
VGA@
VGA@
0.1U_0402_10V6K
0.1U_0402_10V6K
MBK1608121YZF_0603
MBK1608121YZF_0603
L28
L28
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
@
@
+1.8VS_VGA
MBK1608121YZF_0603
MBK1608121YZF_0603
+VGA_PCIE
+1.8VS_VGA
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
+VGA_PCIE
12
L84
L84
1 2
PARK@
PARK@
L85
L85
@
@
1
PARK@
PARK@
PARK@
PARK@
1
1
C954
C954
C955
C955
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
12
C956
C956
@
@
@
@
1
1
C957
C957
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
+DPA_VDD18
PARK@
PARK@
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C91
C91
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+DPB_VDD18
@
@
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C958
C958
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
add at 8/11
+1.8VS_VGA
B B
R131
R131
VGA@
VGA@
1 2
0_0402_5%
+VGA_CORE
A A
GPIO21_BBEN(15)
0_0402_5%
Q37A
Q37A
@
@
2N7002DW T/R7_SOT-363-6
2N7002DW T/R7_SOT-363-6
2
5
61
VGA@
VGA@
L26
L26
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
+BBP
D
D
1 3
5
12
R289
R289
10K_0402_5%
10K_0402_5%
@
@
12
S
S
G
G
2
3
Q37B
Q37B
2N7002DW T/R7_SOT-363-6
2N7002DW T/R7_SOT-363-6
@
@
4
+DPE_PVDD
VGA@
VGA@
1
C403
C403
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+DPE_VDD18 +DPE_PVDD
+1.8VS_VGA
Q7
Q7
AO3413_SOT23-3
AO3413_SOT23-3
@
@
R168
R168
1 2
100K_0402_5%
100K_0402_5%
@
@
VGA@
VGA@
1
C65
C65
2
VGA@
VGA@
1
C331
C331
2
0.1U_0402_10V6K
0.1U_0402_10V6K
R846
R846
@
@
1 2
0_0402_5%
0_0402_5%
+5VS
4
R314
R314
150_0402_1%
150_0402_1%
VGA@
VGA@
R844 0_0402_5%R844 0_0402_5%
1 2
1 2
R845 0_0402_5%VGA@R845 0_0402_5%VGA@
10U_0603_6.3V6M
10U_0603_6.3V6M
add at 8/11
AF17
12
VGA@
VGA@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DPEF_CALR
AG18
DPE_PVDD
AF19
DPE_PVSS
AG19
DPF_PVDD
AF20
DPF_PVSS
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
PARK@
PARK@
DP PLL POWER
DP PLL POWER
20mA 20mA
20mA
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
20mA
3
DPAB_CALR
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
AE10
AG8
AG7
AG10
AG11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
R313VGA@
R313VGA@
1 2
150_0402_1%
150_0402_1%
+DPA_PVDD
M93@
M93@
M93@
M93@
1
C330
C330
2
10U_0603_6.3V6M
10U_0603_6.3V6M
+DPB_PVDD
@
@
C405
C405
1
2
C329
C329
0.02A
M93@
M93@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
@
@
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C61
C61
2
0.02A
@
@
1
1
C59
C59
C406
C406
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+1.8VS_VGA
L27
L27
12
M93@
M93@
+1.8VS_VGA
L29
L29
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
0.1U_0402_10V6K
0.1U_0402_10V6K
12
@
@
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
+DPB_PVDD +DPA_PVDD
+VPB_VDD10 +DPA_VDD10
+DPB_VDD18
+DPA_PVDD
+DPB_PVDD
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PARK-S3 DPX Power
PARK-S3 DPX Power
PARK-S3 DPX Power
LA-5972P
LA-5972P
LA-5972P
R996
0_0402_5%
0_0402_5%
R847
0_0603_5%
0_0603_5%
R848
0_0603_5%
0_0603_5%
R849
0_0402_5%
0_0402_5%
R850
0_0402_5%
0_0402_5%
1
12
12
12
12
12
M93@R996
M93@
VGA@R847
VGA@
PARK@R848
PARK@
PARK@R849
PARK@
PARK@R850
PARK@
+DPA_VDD18
add at 8/11
17 49Thursday, December 10, 2009
17 49Thursday, December 10, 2009
17 49Thursday, December 10, 2009
1.0
1.0
1.0
5
+1.5VS
2.2A
VGA@
VGA@
C430
C430
1
2
D D
+1.8VS_VGA
C419
C419
C425
C425
C411
C411
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
L94
L94
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
VGA@
VGA@
add at 8/11
1
2
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
C410
C410
C593
C593
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
C332
C332
1
2
VGA@
VGA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
C431
C431
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.136A
VGA@
VGA@
C418
C418
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C592
C592
C596
C596
VGA@
VGA@
1
2
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VDDC_CT
VGA@
VGA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
C376
C376
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
C67
C67
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
VGA@
VGA@
VGA@
0.1U_0402_10V6K
0.1U_0402_10V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
C74
C74
1
2
VGA@
VGA@
C372
C372
1
2
+3VS_VGA
VGA@
C70
C70
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
VGA@
VGA@
C371
C371
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C73
C73
C374
C374
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.5VS
VGA@
VGA@
C381
C381
1
2
0.06A
VGA@
VGA@
VGA@
C600
C600
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
C428
C428
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
VGA@
VGA@
C415
C415
C335
C335
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
C414
C414
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
C72
C72
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
L33
L33
M93@
M93@
VGA@
VGA@
VGA@
VGA@
C71
C71
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+BBP
0.1U_0402_10V6K
0.1U_0402_10V6K
+VDDR
M93@1U_0402_6.3V4Z
M93@
12
VGA@
VGA@
C416
C416
1
2
C407
C407
+PCIE_PVDD
+MPV18
+SPV18
+SPV10
VGA@
VGA@
VGA@
VGA@
C413
C413
C383
C383
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
C C
+VGA_PCIE
+VGA_CORE
B B
+1.8VS_VGA
A A
PARK@ L38
PARK@
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
M93@
M93@
add at 8/11
L87
PARK@ L87
PARK@
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
L88
PARK@ L88
PARK@
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
L95
PARK@ L95
PARK@
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
+1.8VS_VGA
+1.8VS_VGA
1 2
BLM15BD121SN1D_0402
BLM15BD121SN1D_0402
L38
VGA@
VGA@
C333
C333
L86
L86
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
PARK@
PARK@
PARK@
PARK@
C959
C959
C960
C960
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PARK@
PARK@
PARK@
PARK@
C961
C961
C962
C962
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PARK@
PARK@
PARK@
PARK@
C996
C996
C997
C997
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C422
C422
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
VGA@
VGA@
1
2
VGA@
VGA@
VGA@
VGA@
C370
C370
1
2
+1.5VS
L32
L32
VGA@
VGA@
C69
C69
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
+MPV18
+SPV18
+VDDR
add at 8/11
5
C66
C66
C369
C369
VGA@
VGA@
1
2
VGA@
VGA@
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_10V6K
0.1U_0402_10V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
+VDDC_CT
0.04A
+VDDRHA
R971
R971
0_0402_5%
0_0402_5%
M93@
M93@
VGA@
VGA@
C68
C68
1
2
40mA
75mA
50mA
100mA
0.1U_0402_10V6K
0.1U_0402_10V6K
4
17mA
120mA
4
U40D
U40D
H13
H16
H19
J10
J23
J24
J9
K10
K23
K24
K9
L11
L12
L13
L20
L21
L22
AA20
AA21
AB20
AB21
M93-S3/M92-S2
M93-S3/M92-S2
AA17
AA18
AB17
AB18
V12
Y12
U12
AA11
Y11
V11
U11
L17
L16
AM30
L8
H7
H8
J7
M1 1
M1 2
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
PARK@
PARK@
MEM I/O
MEM I/O
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
LEVEL
LEVEL
TRANSLATION
TRANSLATION
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
VDDR3#1
I/O
I/O
VDDR3#2
VDDR3#3
VDDR3#4
VDDR4#1 / VDDR5
VDDR4#2
VDDR4#3 / VDDR5
NC#1 / VDDR4
DVCLK / VDDR4
NC#3 / VDDR5
TESTEN#2 / VD DR5
MEM CLK
MEM CLK
VDDRHA
VSSRHA
PLL
PLL
PCIE_PVDD
MPV18
SPV18
SPV10
SPVSS
BACK BIAS
BACK BIAS
BBP#1
BBP#2
PCIE
PCIE
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
VDDC#1
CORE
CORE
VDDC#2
VDDC#3
POWER
POWER
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#20
VDDC#21
VDDC#22
VDDC#23 /BIF_VDDC
VDDC#19/BIF_VDDC
ISOLATED
ISOLATED
CORE I/O
CORE I/O
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
AB23
AC23
AD24
AE24
AE25
AE26
AF2 5
AG2 6
L23
L24
L25
L26
M2 2
N22
N23
N24
R22
T22
U22
V22
AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
R21
U21
M1 3
M1 5
M1 6
M1 7
M1 8
M2 0
M2 1
N20
3
+PCIE_GDDR
VGA@
VGA@
VGA@
C434
C434
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+PCIE_VDDC
C439
C439
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
VGA@
VGA@
1
2
VGA@
C424
C424
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
C433
C433
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C408
C408
C423
C423
VGA@
VGA@
1
2
VGA@
VGA@
1
2
9A(RMS)/14A(Peak)
VGA@
VGA@
VGA@
C590
C590
1
2
VGA@
VGA@
C382
C382
1
2
+VDDCI
VGA@
VGA@
VGA@
C417
C417
C436
C436
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C380
C380
C373
C373
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2A(RMS)/3A(Peak)
VGA@
VGA@
VGA@
VGA@
C437
C437
C591
C591
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
3
2
0.4A
VGA@
VGA@
C409
C409
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C377
C377
VGA@
VGA@
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2
MBK1608221YZF_0603
MBK1608221YZF_0603
VGA@
VGA@
add at 8/11
2A
VGA@
VGA@
VGA@
VGA@
C435
C435
C378
C378
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
VGA@
VGA@
C427
C427
1
2
VGA@
VGA@
C379
C379
1
2
VGA@
VGA@
C595
C595
1
2
VLDT_EN#(38)
Issued Date
Issued Date
Issued Date
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
VGA@
VGA@
C426
C426
C438
C438
1
1
2
2
1U_0402_6.3V4Z
C375
C375
SUSP#(31,33,38, 41,44,46)
C334
C334
VGA@
VGA@
1
2
VGA@
VGA@
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
VGA@
VGA@
C598
C598
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VLDT_EN#
R339 174K_0402_1%
R339 174K_0402_1%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS_VGA
L93
L93
+VGA_PCIE
+VGA_CORE
VGA@
C432
C432
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C420
C420
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VGA_CORE
1 3
VGA@
VGA@
VGA@
C421
C421
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VGA_CORE
VGA@
VGA@
VGA@
VGA@
C412
C412
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Q8
Q8
D
S
D
S
AO3413_SOT23-3
AO3413_SOT23-3
VGA@
VGA@
G
G
2
3VS_VGA_ENSUSP#
C52
C52
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
R132
R132
1 2
VGA@
VGA@
0_0402_5%
0_0402_5%
2
0.1U_0402_25V5K
0.1U_0402_25V5K
Deciphered D ate
Deciphered D ate
Deciphered D ate
+3VS+3VS_VGA
R211
R211
100K_0402_5%
100K_0402_5%
VGA@
VGA@
1 2
13
D
D
Q36
Q36
2
VGA@
VGA@
G
G
2N7002_SOT23
2N7002_SOT23
S
S
2
VGA@
VGA@
VGA@
VGA@
C597
C597
C594
C594
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C599
C599
C429
C429
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
R923
R923
1 2
@
@
0_0402_5%
0_0402_5%
1 2
VGA@
VGA@
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
1
U40E
U40E
AA27
PCIE_VSS#1
AB24
PCIE_VSS#2
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF3 2
AG2 7
AH32
K28
K32
L27
M3 2
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32
M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U9
V13
V16
V18
Y10
Y15
Y17
Y20
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
PARK@
PARK@
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#3 / EVDDQ#2
GND#6 / EVDDQ#3
GND
GND
Title
Title
Title
PARK-S3 Power
PARK-S3 Power
PARK-S3 Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
A3
GND#1
A30
GND#2
AA13
AA16
GND#4
AB10
GND#5
AB15
AB6
GND#7
AC9
GND#8
AD6
GND#9
AD8
GND#10
AE7
GND#11
AG1 2
GND#12
AH10
GND#13
AH28
GND#14
B10
GND#15
B12
GND#16
B14
GND#17
B16
GND#18
B18
GND#19
B20
GND#20
B22
GND#21
B24
GND#22
B26
GND#23
B6
GND#24
B8
GND#25
C1
GND#26
C32
GND#27
E28
GND#28
F10
GND#29
F12
GND#30
F14
GND#31
F16
GND#32
F18
GND#33
F2
GND#34
F20
GND#35
F22
GND#36
F24
GND#37
F26
GND#38
F6
GND#39
F8
GND#40
G10
GND#41
G27
GND#42
G31
GND#43
G8
GND#44
H14
GND#45
H17
GND#46
H2
GND#47
H20
GND#48
H6
GND#49
J27
GND#50
J31
GND#51
K11
GND#52
K2
GND#53
K22
GND#54
K6
GND#55
T11
GND#85
R11
GND#86
A32
VSS_MECH#1
AM1
VSS_MECH#2
AM32
VSS_MECH#3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LA-5972P
LA-5972P
LA-5972P
1
1.0
1.0
18 49Thursday, December 10, 2009
18 49Thursday, December 10, 2009
18 49Thursday, December 10, 2009
1.0
5
M_DA[63..0](16)
M_MA[13..0](16)
M_DQM[7..0](16)
M_DQS[7..0](16)
M_DQS#[7..0](16)
D D
ZZZ2
ZZZ2
Hynix
Hynix
X76H@
X76H@
U21
U21
SAMSUNG VRAM
SAMSUNG VRAM
S@
S@
U23
U23
C C
SAMSUNG VRAM
SAMSUNG VRAM
S@
S@
M_DA[0..63]
M_MA[13..0]
M_DQM[7..0]
M_DQS[7..0]
M_DQS#[7..0]
X76-S
X76-S
Samsung
Samsung
X76S@
X76S@
U22
U22
SAMSUNG VRAM
SAMSUNG VRAM
S@
S@
U24
U24
SAMSUNG VRAM
SAMSUNG VRAM
S@
S@
M_BA0(16)
M_BA1(16)
M_BA2(16)
M_CLK0(16)
M_CLK#0(16)
M_CKE0(16)
M_ODT0(16)
M_CS#0(16)
M_RAS#0(16)
M_CAS#0(16)
M_WE#0(16)
DRAM_RST#(16)
R329
R329
240_0402_1%
240_0402_1%
VGA@
VGA@
U21
U21
VREFC_A1
M9
VREFCA
H2
VREFDQ
M_MA0
N4
A0
M_MA1
P8
A1
M_MA2
P4
A2
M_MA3
N3
A3
M_MA4
P9
A4
M_MA5
P3
A5
M_MA6
R9
A6
M_MA7
R3
A7
T9
A8
M_MA9
R4
A9
M_MA10
L8
A10/AP
M_MA11 M_DA3
R8
A11
M_MA12
N8
A12
M_MA13
T4
A13
T8
A14
M8
A15/BA3
M_BA0
M3
BA0
M_BA1
N9
BA1
M_BA2
M4
BA2
M_CLK0
J8
CK
M_CLK#0
K8
CK
M_CKE0
K10
CKE/CKE0
M_ODT0
K2
ODT/ODT0
M_CS#0
L3
CS
M_RAS#0
J4
RAS
M_CAS#0
K4
CAS
M_WE#0
L4
WE
F4
DQSL
C8
DQSU
E8
DML
D4
DMU
G4
DQSL
B8
DQSU
T3
RESET
L9
ZQ/ZQ0
J2
NC/ODT1
L2
NC/CS1
J10
NC/CE1
L10
NCZQ1
A1
NC
A11
NC
T1
NC
T11
NC
100-BALL
100-BALL
SDRAM DDR3
SDRAM DDR3
64MX16 H5TQ1G63BFR-12C FBGA
64MX16 H5TQ1G63BFR-12C FBGA
H@
H@
12
VREFD_Q1
M_DQS2
M_DQS0
M_DQM2
M_DQM0
M_DQS#2
M_DQS#0
4
U22
M_BA0
M_BA1
M_BA2
M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
K10
J10
L10
A11
T11
U22
M9
VREFCA
H2
VREFDQ
N4
A0
P8
A1
P4
A2
N3
A3
P9
A4
P3
A5
R9
A6
R3
A7
T9
A8
R4
A9
L8
A10/AP
R8
A11
N8
A12
T4
A13
T8
A14
M8
A15/BA3
M3
BA0
N9
BA1
M4
BA2
J8
CK
K8
CK
CKE/CKE0
K2
ODT/ODT0
L3
CS
J4
RAS
K4
CAS
L4
WE
F4
DQSL
C8
DQSU
E8
DML
D4
DMU
G4
DQSL
B8
DQSU
T3
RESET
L9
ZQ/ZQ0
J2
NC/ODT1
L2
NC/CS1
NC/CE1
NCZQ1
A1
NC
NC
T1
NC
NC
100-BALL
100-BALL
SDRAM DDR3
SDRAM DDR3
64MX16 H5TQ1G63BFR-12C FBGA
64MX16 H5TQ1G63BFR-12C FBGA
H@
H@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M_DA16
E4
DQL0
M_DA23
F8
DQL1
M_DA19
F3
DQL2
M_DA21 M_DA49
F9
DQL3
M_DA17
H4
DQL4
M_DA18
H9
DQL5
M_DA22
G3
DQL6
M_DA20
H8
DQL7
M_DA0
D8
DQU0
M_DA4M_MA8
C4
DQU1
M_DA1
C9
DQU2
M_DA6
C3
DQU3
A8
DQU4
M_DA7
A3
DQU5
M_DA2
B9
DQU6
M_DA5
A4
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.5VS
B3
D10
G8
K3
K9
N2
N10
R2
R10
A2
A9
C2
C10
D3
E10
F2
H3
H10
A10
B4
E2
G9
J3
J9
M2
M1 0
P2
P10
T2
T10
B2
B10
D2
D9
E3
E9
F10
G2
G10
+1.5VS
R326
R326
240_0402_1%
240_0402_1%
VGA@
VGA@
VREFC_A2
VREFD_Q2
M_CLK0
M_CLK#0
M_CKE0
M_ODT0
M_CS#0
M_RAS#0
M_CAS#0
M_WE#0
M_DQS3
M_DQS1
M_DQM3
M_DQM1
M_DQS#3
M_DQS#1
DRAM_RST#
12
3
U23
M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_BA0
M_BA1
M_BA2
M_CLK1
M_CLK#1
M_CKE1
M_ODT1
M_CS#1
M_RAS#1
M_CAS#1
M_WE#1
M9
M8
M3
M4
K10
G4
J10
L10
A11
T11
U23
DQL0
VREFCA
H2
N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
N9
J8
K8
K2
L3
J4
K4
L4
F4
C8
E8
D4
B8
T3
L9
J2
L2
A1
T1
64MX16 H5TQ1G63BFR-12C FBGA
64MX16 H5TQ1G63BFR-12C FBGA
H@
H@
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
BA0
BA1
BA2
CK
CK
CKE/CKE0
ODT/ODT0
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
NC
NC
NC
NC
100-BALL
100-BALL
SDRAM DDR3
SDRAM DDR3
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
M_DA38
E4
M_DA34
F8
M_DA33
F3
M_DA37
F9
M_DA35
H4
M_DA39
H9
M_DA32
G3
M_DA36
H8
M_DA44
D8
M_DA42
C4
M_DA47
C9
M_DA40
C3
M_DA45
A8
M_DA43
A3
M_DA46
B9
M_DA41
A4
B3
VDD
D10
VDD
G8
VDD
K3
VDD
K9
VDD
N2
VDD
N10
VDD
R2
VDD
R10
VDD
A2
A9
C2
C10
D3
E10
F2
H3
H10
A10
VSS
B4
VSS
E2
VSS
G9
VSS
J3
VSS
J9
VSS
M2
VSS
M1 0
VSS
P2
VSS
P10
VSS
T2
VSS
T10
VSS
B2
B10
D2
D9
E3
E9
F10
G2
G10
M_DA25
E4
M_DA27
F8
M_DA24
F3
M_DA31
F9
M_DA26
H4
M_DA30
H9
M_DA28
G3
M_DA29
H8
M_DA14
D8
M_DA10
C4
M_DA15
C9
M_DA11
C3
M_DA12
A8
M_DA8
A3
M_DA13
B9
M_DA9
A4
+1.5VS
B3
D10
G8
K3
K9
N2
N10
R2
R10
+1.5VS
A2
A9
C2
C10
D3
E10
F2
H3
H10
A10
B4
E2
G9
J3
J9
M2
M1 0
P2
P10
T2
T10
B2
B10
D2
D9
E3
E9
F10
G2
G10
VREFC_A3
VREFD_Q3
M_CLK1(16)
M_CLK#1(16)
M_CKE1(16)
M_ODT1(16)
M_CS#1(16)
M_RAS#1(16)
M_CAS#1(16)
M_WE#1(16)
M_DQS4
M_DQS5
M_DQM4
M_DQM5
M_DQS#4
M_DQS#5
DRAM_RST# DRAM_RST#
12
R328
R328
240_0402_1%
240_0402_1%
VGA@
VGA@
+1.5VS
+1.5VS
R327
R327
240_0402_1%
240_0402_1%
VGA@
VGA@
2
VREFC_A4
VREFD_Q4
M_CLK1
M_CLK#1
M_CKE1
M_ODT1
M_CS#1
M_RAS#1
M_CAS#1
M_WE#1
M_DQS6
M_DQS7
M_DQM6
M_DQM7
M_DQS#6
M_DQS#7
12
M_BA0
M_BA1
M_BA2
M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M9
H2
N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8
M3
N9
M4
J8
K8
K10
K2
L3
J4
K4
L4
F4
C8
E8
D4
G4
B8
T3
L9
J2
L2
J10
L10
A1
A11
T1
T11
U24
U24
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
BA0
BA1
BA2
CK
CK
CKE/CKE0
ODT/ODT0
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU
RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
NC
NC
NC
NC
100-BALL
100-BALL
SDRAM DDR3
SDRAM DDR3
64MX16 H5TQ1G63BFR-12C FBGA
64MX16 H5TQ1G63BFR-12C FBGA
H@
H@
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
1
M_DA54
E4
M_DA52
F8
M_DA53
F3
F9
M_DA51
H4
M_DA50
H9
M_DA55
G3
M_DA48
H8
M_DA57
D8
M_DA58
C4
M_DA60
C9
M_DA61
C3
M_DA63
A8
M_DA62
A3
M_DA56
B9
M_DA59
A4
+1.5VS
B3
VDD
D10
VDD
G8
VDD
K3
VDD
K9
VDD
N2
VDD
N10
VDD
R2
VDD
R10
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.5VS
A2
A9
C2
C10
D3
E10
F2
H3
H10
A10
B4
E2
G9
J3
J9
M2
M1 0
P2
P10
T2
T10
B2
B10
D2
D9
E3
E9
F10
G2
G10
B B
12
R356
R356
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
VREFD_Q1
12
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C80
VGA@
VGA@
C80
2
M_CLK1
R574 56_0402_1%VGA@R574 56_0402_1%VGA@
M_CLK#1
R575 56_0402_1%VGA@R575 56_0402_1%VGA@
R346
R346
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
M_CLK0
1 2
R576 56_0402_1%VGA@R576 56_0402_1%VGA@
M_CLK#0
1 2
A A
R489 56_0402_1%VGA@R489 56_0402_1%VGA@
5
1
C53
C53
0.01U_0402_16V7K
0.01U_0402_16V7K
VGA@
VGA@
2
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
1 2
1 2
VGA@
VGA@
VGA@
VGA@
R355
R355
R347
R347
+1.5VS+1.5VS
12
12
VGA@
VGA@
1
2
4
VREFC_A1
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C78
C78
2
+1.5VS
C54
C54
0.01U_0402_16V7K
0.01U_0402_16V7K
VGA@
VGA@
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
1
C386
C386
2
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
C387
C387
R345
R345
R348
R348
+1.5VS+1.5VS +1.5VS+1.5VS +1.5VS+1.5VS
12
VREFC_A2 VREFD_Q2 VREFD_Q3VREFC_A3 VREFC_A4 VREFD_Q4
12
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C82
C82
VGA@
VGA@
2
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
VGA@
VGA@
1
1
C389
C389
C385
C385
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
R351
R351
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
R349
R349
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
10U_0603_6.3V6M
10U_0603_6.3V6M
VGA@
VGA@
1
C388
C388
2
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C79
C79
VGA@
VGA@
2
+1.5VS
VGA@
VGA@
1
1
C384
C384
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
3
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
C604
C604
1
2
Issued Date
Issued Date
Issued Date
12
R354
R354
VGA@
VGA@
12
R358
R358
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C682
C682
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
R350
R350
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
0.1U_0402_10V6K
0.1U_0402_10V6K
R353
R353
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C120
C120
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
VGA@
VGA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C681
C681
C686
C686
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Compal Secret Data
Compal Secret Data
Compal Secret Data
1
C81
C81
2
VGA@
VGA@
C602
C602
C607
C607
1
2
Deciphered D ate
Deciphered D ate
Deciphered D ate
+1.5VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C76
C76
VGA@
VGA@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C676
C676
C606
C606
C601
C601
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
C675
C675
C684
C684
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
R357
R357
VGA@
VGA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
C685
C685
1
2
12
R352
R352
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
12
VGA@
VGA@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C608
C608
1
1
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C75
C75
2
VGA@
VGA@
C680
C680
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
4.99K_0402_1%
4.99K_0402_1%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
C679
C679
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C603
C603
12
R359
R359
4.99K_0402_1%
4.99K_0402_1%
VGA@
VGA@
0.1U_0402_10V6K
0.1U_0402_10V6K
12
1
C77
R344
R344
VGA@
VGA@
VGA@
VGA@
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C77
VGA@
VGA@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C677
C677
C605
C605
C678
C678
1
1
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
PARK-S3 DDR3 VRAM
PARK-S3 DDR3 VRAM
PARK-S3 DDR3 VRAM
LA-5972P
LA-5972P
LA-5972P
1
19 49Thursday, December 10, 2009
19 49Thursday, December 10, 2009
19 49Thursday, December 10, 2009
1.0
1.0
1.0
5
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
D D
C518
C518
27P_0402_50V8J
27P_0402_50V8J
C C
+VDDCLK_IO
L66
L66
1 2
1
2
1
C909
C909
2
10U_0805_6.3V4Z
10U_0805_6.3V4Z
CLK_XTAL_OUT
CLK_XTAL_IN
Y1
Y1
12
14.31818MHZ_20P_6X14300202
14.31818MHZ_20P_6X14300202
1
C517
C517
27P_0402_50V8J
27P_0402_50V8J
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C471
C471
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C475
C475
1 2
10U_0805_6.3V4Z
10U_0805_6.3V4Z
+3VS_CLK
+3VS_CLK
1
C516
C516
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L67
L67
C500 0.1U_0402_16V 4ZC500 0.1U_0402_16V 4Z
+3VS_CLK
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C530
C530
2
+3VS_CLKVDDA
1
C463
C463
2
+VDDCLK_IO
Routing the trace at least 10mil
FBMA-L11-160808-601LMT 0603
1 2
1 2
R176 8.2K_0402_5%R176 8.2K_0402_5%
R175 8.2K_0402_5%R175 8.2K_0402_5%
NEW CARD
Mini Card1
B B
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
A A
CLK_NB_14.318M
1.1V 158R/90.0RRS780
+3VS_CLK
R200
R200
@
@
1 2
R186
R186
1 2
EXP_CLKREQ#(31)
MINI1_CLKREQ#(31)
CLK_NB_14.318M(11)
R198
R198
8.2K_0402_5%
8.2K_0402_5%
1 2
1 2
SEL_SATA
27M_SEL
R979
R979
8.2K_0402_5%
8.2K_0402_5%
@
@
For Tigris
SB710_CLK_14M(23)
1 2
R187 90.9_0402_1%R187 90.9_0402_1%
CLK_48M_CR(29)
CLK_48M_USB(24)
FBMA-L11-160808-601LMT 0603
R185 33_0402_5%R185 33_0402_5%
1 2
R201 158_0402_1%R201 158_0402_1%
R676 47_0402_5%R676 47_0402_5%
R209 47_0402_5%R209 47_0402_5%
4
1
C529
C529
remove C527 at 8/12
2
1
C473
C473
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
100mA
12
100mA
100mA
L70
L70
1 2
27M_SEL
SEL_SATA
12
CLK_14.318M
CLK_48MHZ
1 2
CLK_48M
1 2
CLK_XTAL_IN
CLK_XTAL_OUT
3
+3VS_CLK
L68
L68
1 2
U5
U5
100mA
49
VDDA
48
GNDA
62
VDDREF
66
GNDREF
12
VDDSRC_IO
18
VDDSRC_IO
28
VDDATIG_IO
37
VDDSB_SRC_IO
53
VDDCPU_IO
3
VDDDOT
17
VDDSRC
29
VDDATIG
38
VDDSB_SRC
44
VDDSATA
54
VDDCPU
61
VDDHTT
69
VDD48
24
CLKREQ0 #
51
CLKREQ1#
50
CLKREQ2#
43
CLKREQ3#
42
CLKREQ4#
63
REF2/SEL_27
64
REF1/SEL_SATA
65
REF0/SEL_HTT66
71
48MHz_0
70
48MHz_1
67
X1
68
X2
6
GNDDOT
11
GNDSRC
19
GNDSRC
27
GNDATIG
36
GNDSB_SRC
47
GNDSATA
52
GNDCPU
58
GNDHTT
72
GND48
73
GNDPAD
SLG8SP626VTR_QFN72_10x10
SLG8SP626VTR_QFN72_10x10
+3VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
ICS 9LPRS488
ICS 9LPRS488
HTT0T_LPRS / 66 M
HTT0C_LPRS / 66 M
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
SRC7T_LPRS/27MHz_SS
SRC7C_LPRS/27MHz_NS
SMBCLK
SMBDAT
SB_SRC_SLOW#
CPUKG0T_LPRS
CPUKG0C_LPRS
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
SRC5T_LPRS
SRC5C_LPRS
PD#
1
C483
C483
10U_0805_6.3V4Z
10U_0805_6.3V4Z
2
1
2
41
56
55
60
59
40
39
35
34
33
32
31
30
26
25
23
22
21
20
16
15
14
13
10
9
8
7
46
45
5
4
57
1
C476
C476
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SB_SMBCLK
SB_SMBDATA
SRC_SLOW
R953 0_0402_5%R953 0_0402_5%
R954 0_0402_5%R954 0_0402_5%
R955 0_0402_5%R955 0_0402_5%
R956 0_0402_5%R956 0_0402_5%
R957 0_0402_5%
R957 0_0402_5%
R958 0_0402_5%
R958
R959 0_0402_5%R959 0_0402_5%
R960 0_0402_5%R960 0_0402_5%
R961 0_0402_5%@R961 0_0402_5%@
R962 0_0402_5%
R962 0_0402_5%
R963 0_0402_5%R963 0_0402_5%
R964 0_0402_5%R964 0_0402_5%
R965 0_0402_5%R965 0_0402_5%
R966 0_0402_5%R966 0_0402_5%
R967 0_0402_5%R967 0_0402_5%
R968 0_0402_5%R968 0_0402_5%
CLK_SRC7T
CLK_SRC7C
R573 8.2K_0402_5%R573 8.2K_0402_5%
R986 0_0402_5%
R986 0_0402_5%
1 2
1st (SILEGO) : S A00001Z310 S IC SLG8SP626VTR QFN 72P CLK GEN
2nd (ICS) : SA 000023H10 S IC ICS9LPRS488C KLFT MLF 72P CLK GEN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1 2
1 2
1 2
1 2
VGA@
VGA@
1 2
1 2
VGA@
VGA@
1 2
1 2
1 2
1 2
@
@
1 2
1 2
1 2
1 2
1 2
1 2
R210 0_0402_5%@R210 0_0402_5%@
1 2
R461 0_0402_5%
R461 0_0402_5%
1 2
12
@
@
1
C480
C480
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SB_SMBCLK (8,9,24,31)
SB_SMBDATA (8,9,24,31)
0_0402_5%
@
@
+3VS_CLK
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C526
C526
1
C479
C479
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CLK_CPU_BCLK (6)
CLK_CPU_BCLK# (6)
CLK_NBHT (11)
CLK_NBHT# (11)
CLK_NBGFX (11)
CLK_NBGFX# (11)
CLK_PCIE_VGA (14)
CLK_PCIE_VGA# (14)
CLK_PCIE_LAN (30)
CLK_PCIE_LAN# (30)
CLK_PCIE_EXP (31)
CLK_PCIE_EXP# (31)
CLK_PCIE_MINI1 (31)
CLK_PCIE_MINI1# (31)
CLK_SBLINK_BCLK (11)
CLK_SBLINK_BCLK# (11)
CLK_SBSRC_BCLK (23)
CLK_SBSRC_BCLK# (23)
27M_SSC (15)
27M_CLK (15)
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C498
C498
2
1
C511
C511
2
CPU
NB GFX
VGA
LAN
MiniCard_1
NB A LINK
SB RCLK
VGA (Spread spectrum)
VGA (Non spread spectrum)
1
1
C477
C477
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C474
C474
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
remove C508 & C528 at 8/12
1U CLOSE PIN 69
SRC_SLOW
NB CLOCK INPUT TABLE
NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK
GPP_REFCLK
GPPSB_REFCLK 100M DIFF 100M DIFF
RS740 RX780 RS780
66M SE(SINGLE END)
NC
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
NC NC vref
100M DIFF
NC
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF
+3VS_CLK
12
@
@
12
@
@
100M DIFF
100M DIFF
100M DIFF(IN /OUT)*
NC
R178
R178
8.2K_0402_5%
8.2K_0402_5%
R177
R177
8.2K_0402_5%
8.2K_0402_5%
SEL_HTT66
SEL_SATA
* default
1
single-ended 6 6MHz HTT ou tput
*01differenti al 100MHz H TT output
NON SPREAD 100M SATA SRC6 output
SPREAD 100M SATA SRC6 output
*0
5
27M_SEL
NON SPREAD 27M and SPREAD 27M output1 *
0 dif ferential spread S RC_7 output
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Clock generator
Clock generator
Clock generator
LA-5972P
LA-5972P
LA-5972P
1
20 49Thursday, December 10, 2009
20 49Thursday, December 10, 2009
20 49Thursday, December 10, 2009
1.0
1.0
1.0
5
4
3
2
1
+UMA_LCDVDD
R254
R254
150_0603_1%
150_0603_1%
UMA@
D D
2N7002_SOT23
2N7002_SOT23
UMA@
UMA@
R512 0_0402_5%
R512 0_0402_5%
UMA_ENVDD_R(11)
C C
L16
L16
UMA@UMA@
BKOFF#
PANEL_PWM(33)
UMA_VARIBL(11,33)
12
4.7U_0805_10V4Z4.7U_0805_10V4Z
BKOFF#(33)
B B
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
(60 MIL)
+UMA_LCDVDD
A A
1 2
1
1
C114C114
C46
C46
UMA@
UMA@
0.1U_0402_25V6
2
0.1U_0402_25V6
2
280mA
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
B+
400mA
5
UMA@ C579C579
13
D
D
Q63
Q63
UMA@
UMA@
S
S
D24
D24
RB751V_SOD323
RB751V_SOD323
UMA@
UMA@
12
R256
R256
10K_0402_5%
10K_0402_5%
UMA@
UMA@
R1002 0_0402_5%
R1002 0_0402_5%
1 2
2
1
@
@
R1000
1 2
+LCDVDD_L
(60 MIL)
12
L17
L17
UMA@
UMA@
4.7U_0805_25V6-K UMA@
4.7U_0805_25V6-K UMA@
LCD POWER CIRCUIT
+3VALW
12
R252
R252
100K_0402_5%
100K_0402_5%
UMA@
UMA@
2
G
G
2
12
R508
R508
2.7K_0402_5%
2.7K_0402_5%
UMA@
UMA@
21
@
@
+3VS
5
P
B
A
G
3
UMA@
UMA@
GMCH_TXCLK-(11)
GMCH_TXCLK+(11)
GMCH_TXOUT0-(11)
GMCH_TXOUT0+(11)
GMCH_TXOUT1-(11)
GMCH_TXOUT1+(11)
GMCH_TXOUT2-(11)
GMCH_TXOUT2+(11)
C858
C858
Y
0_0402_5%R1000
0_0402_5%
1
IN
3
U49
U49
4
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
+3VS
+UMA_LEDVDD
1
2
1 2
62K_0402_5%
62K_0402_5%
OUT
Q65
Q65
DTC124EKAT146_SC59-3
DTC124EKAT146_SC59-3
GND
UMA@
UMA@
CLOSE TO JLVDS1
700mA 700mA 700mA 700mA
GMCH_TXCLKÂGMCH_TXCLK+
GMCH_TXOUT0-
GMCH_TXOUT0+
GMCH_TXOUT1-
GMCH_TXOUT1+
GMCH_TXOUT2-
GMCH_TXOUT2+
R253
R253
UMA@
UMA@
+3VS
12
R255
R255
10K_0402_5%
10K_0402_5%
UMA@
UMA@
UMA_PWM
+3VS
W=60mils
S
S
G
G
AO3413_SOT23-3
AO3413_SOT23-3
2
Q33
Q33
D
D
UMA@
2
C578
C578
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
UMA@UMA@
UMA_DISPOFF#
UMA@
1 3
+UMA_LCDVDD
BKOFF#
DAC_BRIG
PANEL_PWM
UMA_DISPOFF#
VGA_DISPOFF#
LCD/PANEL BD. Conn.
JLVDS1
JLVDS1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
4
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
GND31GND
ACES_87142-3041-BS
ACES_87142-3041-BS
ME@
ME@
DAC_BRIG
UMA_DISPOFF#
GMCH_LCD_DATA
GMCH_LCD_CLK
+DIS_LCDVDD
R702
R702
150_0603_1%
1
UMA@
UMA@
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
2N7002_SOT23
2N7002_SOT23
W=60mils
VGA_ENVDD(14)
1 2
C1026 220P_0402_50V7K@C1026 220P_0402_50V7K@
1 2
C1027 220P_0402_50V7K@C1027 220P_0402_50V7K@
1 2
C587 220P_0402_50V7KC587 220P_0402_50V7K
1 2
C586 220P_0402_50V7KC586 220P_0402_50V7K
1 2
C588 220P_0402_50V7KC588
C1023 220P_0402_50V7KC1023
+UMA_LEDVDD
220P_0402_50V7K
UMA@
UMA@
1 2
220P_0402_50V7K
VGA@
VGA@
PANEL_PWM(33)
VGA_VARIBL(14,33)
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
+DIS_LCDVDD
+3VS
DAC_BRIG (33)
GMCH_LCD_DATA (11)
GMCH_LCD_CLK (11)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
(60 MIL)
3
L42
L42
12
VGA@VGA@
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
VGA@
VGA@
R695 0_0402_5%
R695 0_0402_5%
1 2
BKOFF#(33)
1
C164C164
VGA@
VGA@
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
150_0603_1%
VGA@
VGA@ R698
13
D
D
Q64
Q64
VGA@
VGA@
S
S
R1001 0_0402_5%
R1001 0_0402_5%
R999
1
C162C162
VGA@
VGA@
0.1U_0402_25V60.1U_0402_25V6
2
VGA_TXOUT0-(14)
VGA_TXOUT0+(14)
VGA_TXOUT1-(14)
VGA_TXOUT1+(14)
VGA_TXOUT2-(14)
VGA_TXOUT2+(14)
Deciphered Date
Deciphered Date
Deciphered Date
2
G
G
2
12
R699
R699
10K_0402_5%
10K_0402_5%
@
@
1 2
2
1
1 2
VGA_TXCLK-(14)
VGA_TXCLK+(14)
@
@
@
@
+3VS
B
A
VGA@
VGA@
IN
5
P
G
3
+3VS
+3VALW
12
R698
100K_0402_5%
100K_0402_5%
VGA@
VGA@
1
OUT
Q66
Q66
DTC124EKAT146_SC59-3
DTC124EKAT146_SC59-3
GND
VGA@
VGA@
3
D13
D13
RB751V_SOD323
RB751V_SOD323
21
VGA@
VGA@
12
R690
R690
10K_0402_5%
10K_0402_5%
VGA@
VGA@
CLOSE TO JLVDS2
U50
U50
4
Y
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
0_0402_5%R999
0_0402_5%
VGA_TXCLKÂVGA_TXCLK+
VGA_TXOUT0ÂVGA_TXOUT0+
VGA_TXOUT1ÂVGA_TXOUT1+
VGA_TXOUT2ÂVGA_TXOUT2+
2
R701
R701
1 2
62K_0402_5%
62K_0402_5%
VGA@
VGA@
+3VS
W=60mils
1
C163C163
VGA@
VGA@
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
C160
C160
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
VGA@VGA@
2
G
G
+3VS
S
S
AO3413_SOT23-3
AO3413_SOT23-3
Q34
Q34
D
D
VGA@
VGA@
1 3
12
R691
R691
10K_0402_5%
10K_0402_5%
VGA@
VGA@
+DIS_LCDVDD
VGA_DISPOFF#
2
W=60mils
(60 MIL)
VGA_PWM
JLVDS2
JLVDS2
2
1
2
4
3
4
6
5
6
8
7
8
10
9
10
12
111112
14
131314
16
151516
18
171718
20
191920
22
212122
24
232324
26
252526
28
272728
30
292930
32
GND31GND
ACES_87142-3041-BS
ACES_87142-3041-BS
ME@
ME@
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
B+
VGA@
VGA@
1
3
5
7
DAC_BRIG
9
VGA_LCD_DATA
VGA_LCD_CLK
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LVDS Connector
LVDS Connector
LVDS Connector
VGA_PWMUMA_PWM
VGA_DISPOFF#
LA-5972P
LA-5972P
LA-5972P
+DIS_LEDVDD
12
L41
L41
4.7U_0805_25V6-K VGA@
4.7U_0805_25V6-K VGA@
VGA_LCD_DATA (15)
VGA_LCD_CLK (15)
1
+DIS_LEDVDD
1
C166
C166
2
+3VS
DAC_BRIG (33)
21 49Thursday, December 10, 2009
21 49Thursday, December 10, 2009
21 49Thursday, December 10, 2009
1.0
1.0
1.0
A
B
C
D
E
CRT CONNECTOR
DDCDATA
HSYNC
VSYNC
DDCCLK
C622
C622
+CRT_VCC+5VS
1
2
JCRT1
JCRT1
6
11
1
7
12
2
8
13
3
9
14
16
G
G
4
17
G
G
10
15
5
ALLTO_C10534-91507-L
ALLTO_C10534-91507-L
ME@
ME@
D28
D28
DAN217_SC59
DAN217_SC59
@
@
1 1
10P_0402_50V8J
10P_0402_50V8J
C662
C662
1
2
L57 FCM2012C-800_0805L57 FCM2012C-800_0805
1 2
L54 FCM2012C-800_0805L54 FCM2012C-800_0805
1 2
L52 FCM2012C-800_0805L52 FCM2012C-800_0805
1 2
C948
C948
10P_0402_50V8J
10P_0402_50V8J
UMA@
UMA@
GMCH_CRT_R(11)
GMCH_CRT_G(11)
GMCH_CRT_B(11)
DVT
VGA_CRT_R(15)
VGA_CRT_G(15)
VGA_CRT_B(15)
2 2
12
R439 0_0402_5%
R439 0_0402_5%
UMA@
UMA@
12
R277 0_0402_5%
R277 0_0402_5%
UMA@
UMA@
12
R274 0_0402_5%
R274 0_0402_5%
VGA@
VGA@
12
R493 0_0402_5%
R493 0_0402_5%
VGA@
VGA@
12
R495 0_0402_5%
R495 0_0402_5%
VGA@
VGA@
12
R494 0_0402_5%
R494 0_0402_5%
CRT_R
CRT_G
CRT_B
12
R285
R285
R285
R285
150_0402_1%
150_0402_1%
VGA@
VGA@
R276
R276
140_0402_1%
140_0402_1%
UMA@
UMA@
1
R273
R273
150_0402_1%
150_0402_1%
2
1
150_0402_1%
150_0402_1%
2
C633
C633
1
1
C640
C640
2
2
10P_0402_50V8J
10P_0402_50V8J
D27
D27
DAN217_SC59
DAN217_SC59
@
@
1
2
3
1
1
C660
C660
2
2
10P_0402_50V8J
10P_0402_50V8J
1
2
CRT_R_1
CRT_G_1
CRT_B_1
C639
C639
10P_0402_50V8J
10P_0402_50V8J
3
D26
D26
DAN217_SC59
DAN217_SC59
@
@
1
2
1
2
10P_0402_50V8J
10P_0402_50V8J
+5VS
3
+R_CRT_VCC
D25
D25
2 1
RB491D_SC59-3
RB491D_SC59-3
+CRT_VCC
W=40mils
F1
F1
21
1.1A_6VDC_FUSE
1.1A_6VDC_FUSE
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Place closed to chipset
+3VS_VGA
R938
R938
0_0402_5%
+CRT_VCC
1 2
0_0402_5%
VGA@
VGA@
DVT
3 3
GMCH_CRT_HSYNC(11,13)
VGA_CRT_HSYNC(15)
GMCH_CRT_VSYNC(11,13)
VGA_CRT_VSYNC(15)
4 4
A
C351C351
0.1U_0402_16V4Z0.1U_0402_16V4Z
UMA@
UMA@
1 2
R491 0_0402_5%
R491 0_0402_5%
VGA@
VGA@
1 2
R490 0_0402_5%
R490 0_0402_5%
C628C628
0.1U_0402_16V4Z0.1U_0402_16V4Z
UMA@
UMA@
1 2
R513 0_0402_5%
R513 0_0402_5%
VGA@
VGA@
1 2
R492 0_0402_5%
R492 0_0402_5%
1 2
1 2
+CRT_VCC
1
5
P
4
OE#
A2Y
G
U25
U25
SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
3
1
5
P
4
OE#
A2Y
G
U27
U27
SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
3
R775
R775
1 2
1K_0402_5%
1K_0402_5%
HSYNC_L
VSYNC_L VSYNC
L50 FCM1608C-121T_0603L50 FCM1608C-121T_0603
1 2
L51 FCM1608C-121T_0603L51 FCM1608C-121T_0603
1 2
B
HSYNC
2.2K_0402_5%
2.2K_0402_5%
DDCDATA
DDCCLK
Security Classification
Security Classification
Security Classification
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
C
DDCDATA_R
R57
R57
12
DDCCLK_R
R44
R44
12
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
12
R54
R54
12
R46
R46
2.2K_0402_5%
2.2K_0402_5%
2
6 1
Q57A
Q57A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
VGA@
VGA@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
5
3
4
Q57B
Q57B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
VGA@
VGA@
D
R55
R55
10K_0402_5%
10K_0402_5%
VGA@
VGA@
12
12
R48
R48
10K_0402_5%
10K_0402_5%
VGA@
VGA@
R939R939
12
VGA@
VGA@
0_0402_5%0_0402_5%
R940
R940
12
0_0402_5%
0_0402_5%
VGA@
VGA@
R941R941
12
UMA@
UMA@
0_0402_5%0_0402_5%
R942
R942
12
0_0402_5%
0_0402_5%
UMA@
UMA@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
CRT Connector
CRT Connector
CRT Connector
LA-5972P
LA-5972P
LA-5972P
VGA_CRT_DATA (15)
VGA_CRT_CLK (15)
GMCH_CRT_DATA (11)
GMCH_CRT_CLK (11)
E
1.0
1.0
22 49Thursday, December 10, 2009
22 49Thursday, December 10, 2009
22 49Thursday, December 10, 2009
1.0
A
1 1
PCIE_CALRP=W/S=4/8(55ohm impedance), <1"
PCIE_CALRN=W/S=4/8(55ohm impedance), <1"
+3VALW
C798
C798
12
5
U29
0.1U_0402_16V4Z
R426
R426
8.2K_0402_5%
8.2K_0402_5%
@
@
1 2
0.1U_0402_16V4Z
A_RST#
2 2
3 3
2
B
1
A
1 2
R980 0_0603_5%@R980 0_0603_5%@
U29
P
4
Y
G
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
PLT_RST#
SB_RX0P(10)
SB_RX0N(10)
SB_RX1P(10)
SB_RX1N(10)
SB_RX2P(10)
SB_RX2N(10)
SB_RX3P(10)
SB_RX3N(10)
SB_TX0P(10)
SB_TX0N(10)
SB_TX1P(10)
SB_TX1N(10)
SB_TX2P(10)
SB_TX2N(10)
SB_TX3P(10)
SB_TX3N(10)
+PCIE_VDDR
L78
+1.2V_HT
PLT_RST# (11,13,14,30,31,33)
L78
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
C853 100P _0402_50V8J@C853 100P_0402_50V8J@
SB710_CLK_14M(20)
Close to SB
R380 20M_0402_5%@R380 20M_0402_5%@
1 2
C779
C779
1 2
15P_0402_50V8J
15P_0402_50V8J
20M_0603_5%
20M_0603_5%
12P_0402_50V8J
12P_0402_50V8J
4 4
R382
R382
C787
C787
1 2
H_PWRGD
12
+1.8VS
G
G
S
S
Q35
Q35
Y4
Y4
4
OUT
1
IN
32.768KHZ_12.5P_1TJS125BJ4A421P
32.768KHZ_12.5P_1TJS125BJ4A421P
+3VS
2
FDV301N_NL_SOT23-3
FDV301N_NL_SOT23-3
1 2
13
D
D
NC
NC
R567
R567
4.7K_0402_5%
4.7K_0402_5%
SB_32KHI
3
2
SB_32KHO
H_PWRGD_L (47)
level shift to ISL6265
A
B
C468 0.1U_0402_10V7KC468 0.1U_0402_10V7K
1 2
C465 0.1U_0402_10V7KC465 0.1U_0402_10V7K
1 2
C459 0.1U_0402_10V7KC459 0.1U_0402_10V7K
1 2
C354 0.1U_0402_10V7KC354 0.1U_0402_10V7K
1 2
C355 0.1U_0402_10V7KC355 0.1U_0402_10V7K
1 2
C353 0.1U_0402_10V7KC353 0.1U_0402_10V7K
1 2
C460 0.1U_0402_10V7KC460 0.1U_0402_10V7K
1 2
C464 0.1U_0402_10V7KC464 0.1U_0402_10V7K
1 2
R572 562_0402_1%R572 562_0402_1%
R173 2.05K_0402_1%R173 2.05K_0402_1%
PCIE_PVDD=43mA
12
1
C757
C757
CLK_SBSRC_BCLK(20)
CLK_SBSRC_BCLK#(20)
12
1
C762C762
1U_0402_6.3V4Z1U_0402_6.3V4Z
2
2
@
@
12
R470 100_0402_5%
R470 100_0402_5%
For Tigris
ALLOW_LDTSTOP(11)
H_PROCHOT_R#(6,33)
H_PWRGD( 6)
LDT_STOP#(6,11)
LDT_RST#(6)
B
C
U30A
A_RST#
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
12
12
+SB_PCIEVDD
SB_32KHI
SB_32KHO
H_PROCHOT_R#
U30A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
SB700
SB700
Part 1 of 5
Part 1 of 5
PCI CLKS
PCI CLKS
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCI INTERFACE
PCI INTERFACE
CLOCK GENERATOR
CLOCK GENERATOR
LPC
LPC
LDRQ1#/GNT5#/GPIO68
CPU
CPU
BMREQ#/REQ5#/GPIO65
INTRUDER_ALERT#
RTC
RTC
RTC XTAL
RTC XTAL
SA00001S570 S IC 218S7EBLA12FG SB700 BGA 528P SB 0FA
SA000030740 S IC 218-0660017 A14 SB710 FCBGA HF 0FA
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
P4
PCICLK0
P3
PCICLK1
P1
PCICLK2
P2
PCICLK3
T4
PCICLK4
PCIRST#
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
GNT 0#
GNT 1#
GNT 2#
CLKRUN#
LOCK#
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
VBAT
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
T3
N1
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
AD3
AC4
AE2
AE3
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
C3
C2
B2
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
CLK_LPC_EC
@
@
1 2
R403 1M _0402_5%
R403 1M _0402_5%
C795
C795
Compal Secret Data
Compal Secret Data
Compal Secret Data
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C794
C794
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Deciphered Date
Deciphered Date
Deciphered Date
T68PAD T68PAD
PCI_AD23 (27)
PCI_AD24 (27)
PCI_AD25 (27)
PCI_AD26 (27)
PCI_AD27 (27)
PCI_AD28 (27)
T10PAD T10PAD
T9PAD T9PAD
T12PAD T12PAD
T11PAD T11PAD
1 2
R973 22_0402_5%@R973 22_0402_5%@
1 2
R551 0_0402_5%R551 0_0402_5%
LPC_AD0 (31,33)
LPC_AD1 (31,33)
LPC_AD2 (31,33)
LPC_AD3 (31,33)
LPC_FRAME# (31,33)
SERIRQ (33)
RTC_CLK (27)
+RTCBATT
1 2
R400 510_0402_5%R400 510_0402_5%
W=20mils
for Clear CMOS
D
PCICLK5/GPIO41
REQ3#/GPIO70
REQ4#/GPIO71
GNT3#/GPIO72
GNT4#/GPIO73
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
CLK_PCI_EC
STRAP PIN
+RTCBATT
12
J7
J7
JOPEN
JOPEN
@
@
E
PCI_CLK2 (27)
PCI_CLK3 (27)
PCI_CLK4 (27)
PCI_CLK5 (27)
CLK_PCI_DB (31)
CLK_PCI_EC (27,33)
LPCCLK1 (27)
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
STRAP PIN
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SB710-PCIE/PCI/ACPI/LPC/RTC
SB710-PCIE/PCI/ACPI/LPC/RTC
SB710-PCIE/PCI/ACPI/LPC/RTC
LA-5972P
LA-5972P
LA-5972P
23 49Thursday, December 10, 2009
23 49Thursday, December 10, 2009
23 49Thursday, December 10, 2009
E
1.0
1.0
1.0
A
1 1
+3VS
2 2
1 2
R405 4.7K_0402_5%R405 4.7K_0402_5%
1 2
R404 2.2K_0402_5%R404 2.2K_0402_5%
1 2
R1019 10K_0402_5%@R1019 10K_0402_5%@
+3VS
R183 2.2K_0402_5%R183 2.2K_0402_5%
1 2
R179 2.2K_0402_5%R179 2.2K_0402_5%
1 2
SUS_STAT#
EC_RSMRST#
GPU_SEL
SB_SMBCLK
SB_SMBDATA
R1009
R1009
10K_0402_5%
10K_0402_5%
@
@
SB_PCIE_WAKE#(31)
H_THERMTRIP#(6)
+3VALW
12
NB_PWRGD(11)
SB_SPKR=W/S=4/4(55ohm impedance)
+3VALW
1 2
R1020 10K_0402_5%@R1020 10K_0402_5%@
1 2
R388 10K _0402_5%R388 10K_0402_5%
@
@
1 2
R379 100K _0402_5%
R379 100K _0402_5%
HDA_BITCLK_AUDIO(36)
HDA_SDOUT_AUDIO(36)
HDA_SDIN0(36)
3 3
GPU_SEL
SB_PCIE_WAKE#
EC_LID_OUT#
R414 33_0402_5%R414 33_0402_5%
R416 33_0402_5%R416 33_0402_5%
HDA_SYNC_AUDIO(36)
HDA_RST_AUDIO#(36)
@
@
R969 10K _0402_5%
R969 10K _0402_5%
1 2
1 2
1 2
R970 10K _0402_5%
R970 10K _0402_5%
HDA_RST#(27)
1 2
@
@
R412 33_0402_5%R412 33_0402_5%
R408 33_0402_5%R408 33_0402_5%
HDA_BITCLK
HDA_SDOUT
1 2
1 2
STRAP PIN
B
demo circuit LID use RI#
PM_SLP_S3#(33)
PM_SLP_S5#(33)
PBTN_OUT#(33)
SB_PWRGD(6,11,33)
SUS_STAT#(11)
T14 PADT14 PAD
T13 PADT13 PAD
T15 PADT15 PAD
GATEA20(33)
KB_RST#(33)
EC_SCI#(33)
EC_SMI#(33)
EC_RSMRST#(33)
SB700 has internal PD
SB_SPKR(36)
SB_SMBCLK(8,9,20,31)
SB_SMBDATA(8,9,20,31)
USB_OC#6(32)
EC_LID_OUT#(33)
USB_OC#1(32)
USB_OC#0(32)
HDA_SDIN0
SUS_STAT#
SB_PCIE_WAKE#
H_THERMTRIP#
NB_PWRGD
EC_RSMRST#
GPU_SEL
SB_SPKR
SB_SMBCLK
SB_SMBDATA
USB_OC#6
EC_LID_OUT#
USB_OC#1
USB_OC#0
AMD (un-used)
HDA_SYNC
HDA_RST#
U30D
U30D
E1
PCI_PME#/GEVENT4#
E2
RI#/EXTEVNT0#
H7
SLP_S2/GPM9#
F5
SLP_S3#
G1
SLP_S5#
H2
PWR_BTN#
H1
PWR_GOOD
K3
SUS_STAT#
H5
TEST2
H4
TEST1
H3
TEST0
Y1 5
GA20IN/GEVENT0#
W15
KBRST#/GEVENT1#
K4
LPC_PME#/GEVENT3#
K24
LPC_SMI#/EXTEVNT1#
F1
S3_STATE/GEVENT5#
J2
SYS_RESET#/GPM7#
H6
WAKE#/GEVENT8#
F2
BLINK/GPM6#
J6
SMBALERT#/THRMTRIP#/GEVENT2#
W14
NB_PWRGD
D3
RSMRST#
AE18
SATA_IS0#/GPIO10
AD18
CLK_REQ3#/SATA_IS1#/GPIO6
AA19
SMARTVOLT1/SATA_IS2#/GPIO4
W17
CLK_REQ0#/SATA_IS3#/GPIO0
V17
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
W20
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21
SPKR/GPIO2
AA18
SCL0/GPOC0#
W18
SDA0/GPOC1#
K1
SCL1/GPOC2#
K2
SDA1/GPOC3#
AA20
DDC1_SCL/GPIO9
Y1 8
DDC1_SDA/GPIO8
C1
LLB#/GPIO66
Y1 9
SMARTVOLT2/SHUTDOWN#/GPIO5
G5
DDR3_RST#/GEVENT7#
B9
USB_OC6#/IR_TX1/GEVENT6#
B8
USB_OC5#/IR_TX0/GPM5#
A8
USB_OC4#/IR_RX0/GPM4#
A9
USB_OC3#/IR_RX1/GPM3#
E5
USB_OC2#/GPM2#
F8
USB_OC1#/GPM1#
E4
USB_OC0#/GPM0#
M1
AZ_BITCLK
M2
AZ_SDOUT
J7
AZ_SDIN0/GPIO42
J8
AZ_SDIN1/GPIO43
L8
AZ_SDIN2/GPIO44
M3
AZ_SDIN3/GPIO46
L6
AZ_SYNC
M4
AZ_RST#
L5
AZ_DOCK_RST#/GPM8#
H19
IMC_GPIO0
H20
IMC_GPIO1
H21
SPI_CS2#/IMC_GPIO2
F25
IDE_RST#/F_RST#/IMC_GPO3
D22
IMC_GPIO4
E24
IMC_GPIO5
E25
IMC_GPIO6
D23
IMC_GPIO7
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
C
Part 4 of 5
SB700
SB700
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
USB OC
USB OC
HD AUDIO
HD AUDIO
INTEGRATED uC
INTEGRATED uC
Part 4 of 5
USBCLK/14M_25M_48M_OSC
INTEGRATED uC
INTEGRATED uC
USB_RCOMP
USB_FSD13P
USB MISC
USB MISC
USB_FSD13N
USB_FSD12P
USB_FSD12N
USB 1.1
USB 1.1
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB 2.0
USB 2.0
USB_HSD4N
USB_HSD3P
USB_HSD3N
GPIO
GPIO
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
IMC_GPIO8
IMC_GPIO9
IMC_PW M0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PW M1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41
C8
USB_RCOMP
G8
E6
E7
F7
E8
H11
J10
USB20_P10
E11
USB20_N10
F11
USB20_P9
A11
USB20_N9
B11
USB20_P8
C10
USB20_N8
D10
USB20_P7
G11
USB20_N7
H12
E12
E14
USB20_P5
C12
USB20_N5
D12
B12
A12
USB20_P3
G12
USB20_N3
G14
USB20_P2
H14
USB20_N2
H15
A13
B13
USB20_P0
B14
USB20_N0
A14
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
G20
G21
D25
D24
C25
C24
B25
C23
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
D
1 2
R376 100_0402_5%
R376 100_0402_5%
1 2
R37011.8K_0402_1% R37011.8K_0402_1%
USB20_P10 (32)
USB20_N10 (32)
USB20_P9 (31)
USB20_N9 (31)
USB20_P8 (31)
USB20_N8 (31)
USB20_P7 (32)
USB20_N7 (32)
USB20_P5 (31)
USB20_N5 (31)
USB20_P3 (32)
USB20_N3 (32)
USB20_P2 (29)
USB20_N2 (29)
USB20_P0 (32)
USB20_N0 (32)
GPIO16 (27)
GPIO17 (27)
@
@
C775 100P_0402_50V8J
C775 100P_0402_50V8J
USB-10 Int USB
USB-9 New Card
USB-8 Bluetooth
USB-7 USB Camera
USB-5 MiniCard(W LAN)
USB-3 Int USB
USB-2 USB Card reader
USB-0 Int USB
STRAP PIN
STRAP PIN
@
@
1 2
CLK_48M_USB (20)
E
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SB710 USB/HD audio
SB710 USB/HD audio
SB710 USB/HD audio
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
1.0
of
24 49Thursday, December 10, 2009
24 49Thursday, December 10, 2009
24 49Thursday, December 10, 2009
A
1 1
SATA_STX_C_DRX_P0(28)
SATA_STX_C_DRX_N0(28)
HDD
SATA_DTX_C_SRX_N0(28)
SATA_DTX_C_SRX_P0(28)
SATA_STX_C_DRX_P1(28)
SATA_STX_C_DRX_N1(28)
ODD
SATA_DTX_C_SRX_N1(28)
SATA_DTX_C_SRX_P1(28)
2 2
3 3
4 4
C770
C770
12
27P_0402_50V8J
27P_0402_50V8J
C772
C772
12
27P_0402_50V8J
27P_0402_50V8J
+1.2V_HT
+3VS
Port Number
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
12
Y325MHZ_20PF_7A25000012 Y 325MHZ_20PF_7A25000012
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
Pri/SEC,Mas/Slave assignment SATA drive controlled by
Primary master
Secondary master
Primary slave
Secondary slave
Primary (Secondary) master
Primary (Secondary) slave
12
R371
R371
10M_0402_5%
10M_0402_5%
L82
L82
L81
L81
SATA_X1
SATA_X2
12
12
Close chip
C504 0.01U_0402_16V7KC504 0.01U_0402_16V7K
1 2
C507 0.01U_0402_16V7KC507 0.01U_0402_16V7K
1 2
C522 0.01U_0402_16V7KC522 0.01U_0402_16V7K
1 2
C519 0.01U_0402_16V7KC519 0.01U_0402_16V7K
1 2
SATA_CAL=W/S=9/20(35ohm impedance), <1"
+3VS
PLLVDD_SATA=93mA
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
XTLVDD_SATA=6mA
1U_0402_6.3V4Z
1U_0402_6.3V4Z
DVT
R375 1K_0402_1%R375 1K_0402_1%
R377 10K_0402_5%R377 10K_0402_5%
1 2
SATA_LED#(35)
+PLLVDD_SATA
1
C784
C784
2
+XTLVDD_SATA
2
C777
C777
1
SATA controler
SATA controler
SATA controler
SATA controler
PATA controler
PATA controler
B
SATA_STX_DRX_P0
SATA_STX_DRX_N0
SATA_STX_DRX_P1
SATA_STX_DRX_N1
12
1
C783C783
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
1
C776C776
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
SSS AAA TT T AA A _ _ _ CCC AA A L L L
SATA_X1
SATA_X2
U30B
U30B
AD9
SATA_TX0P
AE9
SATA_TX0N
AB10
SATA_RX0N
AC10
SATA_RX0P
AE10
SATA_TX1P
AD10
SATA_TX1N
AD11
SATA_RX1N
AE11
SATA_RX1P
AB12
SATA_TX2P
AC12
SATA_TX2N
AE12
SATA_RX2N
AD12
SATA_RX2P
AD13
SATA_TX3P
AE13
SATA_TX3N
AB14
SATA_RX3N
AC14
SATA_RX3P
AE14
SATA_TX4P
AD14
SATA_TX4N
AD15
SATA_RX4N
AE15
SATA_RX4P
AB16
SATA_TX5P
AC16
SATA_TX5N
AE16
SATA_RX5N
AD16
SATA_RX5P
V12
SATA_CAL
Y1 2
SATA_X1
AA12
SATA_X2
W11
SATA_ACT#/GPIO67
AA11
PLLVDD_SATA
W12
XTLVDD_SATA
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
SB700
SB700
Part 2 of 5
Part 2 of 5
SATA PWR SERIAL ATA
SATA PWR SERIAL ATA
HW MONITOR
HW MONITOR
C
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
ATA 66/100/133
ATA 66/100/133
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS1#/GPIO32
LAN_RST#/GPIO13
SPI ROM
SPI ROM
ROM_RST#/GP IO14
FANOUT0/GPIO3
FANOUT1/GPIO4 8
FANOUT2/GPIO4 9
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
AVDD
AVSS
AA24
AA25
Y2 2
AB23
Y2 3
AB24
AD25
AC25
AC24
Y2 5
Y2 4
AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
U15
J1
M8
M5
M7
P5
P8
R8
C6
B6
A6
A5
B5
A4
B4
C4
D4
D5
D6
A7
B7
F6
G7
+3VALW
AVDD=5mA
SB_SPI_DI
SB_SPI_DO
SB_SPI_CLK
SB_SPI_HOLD#
SB_SPI_CS1#
EC_THERM# (33)
2 1
D30 RB751V_SOD323D30 RB751V_SOD323
R369 100K_0402_5%R369 100K_0402_5%
R374 100K_0402_5%
R374 100K_0402_5%
+3VALW
@
@
12
12
SB_SPI_CS1#
SB_SPI_DI
+3VALW
1 2
D
+3VALW
+3VS
1 2
R101010K_0402_5% @ R101010K_0402_5% @
ACIN (15,33,39)
C1043 0.1U_0402_16V4Z
C1043 0.1U_0402_16V4Z
R10161K_0402_5% @ R10161K_0402_5% @
1
2
3
4
1 2
@
@
+SB_SPI_VCC
U51
U51
CS#
SO
WP#
GND
MX25L1605AM2C-12G_SO8
MX25L1605AM2C-12G_SO8
@
@
HOLD#
SCLK
VCC
SI
8
7
6
5
SB_SPI_HOLD#
@
@
1 2
R1012 0_0402_5%
R1012 0_0402_5%
12
R1013
R1013
22_0402_5%
22_0402_5%
@
@
C1044
C1044
33P_0402_50V8K
33P_0402_50V8K
@
@
E
R1011
R1011
4.7K_0402_5%@
4.7K_0402_5%@
12
SB_SPI_CLK
SB_SPI_DO
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SB710 SATA/IDE/SPI
SB710 SATA/IDE/SPI
SB710 SATA/IDE/SPI
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
25 49Thursday, December 10, 2009
25 49Thursday, December 10, 2009
25 49Thursday, December 10, 2009
1.0
A
+3VS
1 1
2 2
3 3
C472 22U_0805_6.3V6MC472 22U_0805_6.3V6M
C489 0.1U_0402_16V4ZC489 0.1U_0402_16V4Z
C499 0.1U_0402_16V4ZC499 0.1U_0402_16V4Z
C493 0.1U_0402_16V4ZC493 0.1U_0402_16V4Z
+3VS
+1.2V_HT
MBK2012221YZF_0805
MBK2012221YZF_0805
+1.2V_HT
MBK2012221YZF_0805
MBK2012221YZF_0805
+3VALW
MBK2012221YZF_0805
MBK2012221YZF_0805
VDDQ=131mA
1 2
1 2
1 2
1 2
VDD33=71mA
PCIE_VDDR=0.6A
L64
L64
12
C466 4.7U_0805_10V4ZC 466 4.7U_0805_10V4Z
1 2
C763 1U_0402_6.3V4ZC763 1U_0402_6.3V4Z
1 2
C759 0.1U_0402_16V4ZC 759 0.1U_0402_16V4Z
1 2
C497 0.1U_0402_16V4ZC 497 0.1U_0402_16V4Z
1 2
AVDD_SATA=567mA
L79
L79
12
C764 22U_0805_6.3V6MC764 22U_0805_6.3V6M
1 2
C766 1U_0402_6.3V4ZC766 1U_0402_6.3V4Z
1 2
C765 1U_0402_6.3V4ZC765 1U_0402_6.3V4Z
1 2
C767 0.1U_0402_16V4ZC 767 0.1U_0402_16V4Z
1 2
C768 0.1U_0402_16V4ZC 768 0.1U_0402_16V4Z
1 2
AVDDTX/RX=658mA
L65
L65
12
C461 10U_0805_10V4ZC461 10U_0805_10V4Z
1 2
C469 10U_0805_10V4ZC469 10U_0805_10V4Z
1 2
C495 1U_0402_6.3V4ZC495 1U_0402_6.3V4Z
1 2
C485 1U_0402_6.3V4ZC485 1U_0402_6.3V4Z
1 2
C481 0.1U_0402_16V4ZC 481 0.1U_0402_16V4Z
1 2
+PCIE_VDDR
+1.2V_SATA
+AVDD_USB
B
U30C
U30C
L9
VDDQ_1
M9
VDDQ_2
T15
VDDQ_3
U9
VDDQ_4
U16
VDDQ_5
U17
VDDQ_6
V8
VDDQ_7
W7
VDDQ_8
Y6
VDDQ_9
AA4
VDDQ_10
AB5
VDDQ_11
AB21
VDDQ_12
Y2 0
VDD33_18_1
AA21
VDD33_18_2
AA22
VDD33_18_3
AE25
VDD33_18_4
P18
PCIE_VDDR_1
P19
PCIE_VDDR_2
P20
PCIE_VDDR_3
P21
PCIE_VDDR_4
R22
PCIE_VDDR_5
R24
PCIE_VDDR_6
R25
PCIE_VDDR_7
AA14
AVDD_SATA_1
AB18
AVDD_SATA_4
AA15
AVDD_SATA_2
AA17
AVDD_SATA_3
AC18
AVDD_SATA_5
AD17
AVDD_SATA_6
AE17
AVDD_SATA_7
A16
AVDDTX_0
B16
AVDDTX_1
C16
AVDDTX_2
D16
AVDDTX_3
D17
AVDDTX_4
E17
AVDDTX_5
F15
AVDDRX_0
F17
AVDDRX_1
F18
AVDDRX_2
G15
AVDDRX_3
G17
AVDDRX_4
G18
AVDDRX_5
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
SB700
SB700
Part 3 of 5
Part 3 of 5
PCI/GPIO I/O
PCI/GPIO I/O
IDE/FLSH I/O
IDE/FLSH I/O
POWER
POWER
A-LINK I/O
A-LINK I/O
3.3V_S5 I/OCORE S5
3.3V_S5 I/OCORE S5
SATA I/O
SATA I/O
USB_PHY_1.2V_1
USB_PHY_1.2V_2
PLL CLKGEN I/O
PLL CLKGEN I/O
USB I/O
USB I/O
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
CORE S0
CORE S0
VDD_9
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
S5_1.2V_1
S5_1.2V_2
V5_VREF
AVDDCK_3.3V
AVDDCK_1.2V
AVDDC
VDD=0.51A
+1.2V_SB_CORE
L15
M12
M14
N13
P12
P14
R11
R15
T16
VDD=138mA
+1.2V_CKVDD
L21
L22
L24
L25
+S5_3V
A17
A24
B17
J4
J5
L1
L2
+S5_1.2V
G2
G4
USB_PHY_1.2V=197mA
+1.2_USB
A10
B10
+V5_VREF
AE7
+AVDDCK_3.3V
J16
+AVDDCK_1.2V
K17
+AVDDC
E9
AVDDC=17mA
C
1 2
R171 0_0805_5%R171 0_0805_5%
1 2
S5_3.3V=32mA
1 2
1 2
S5_1.2V=113mA
+1.2VALW
L80
L80
1 2
MBK1608221YZF_0603
MBK1608221YZF_0603
C771 10U_0805_10V4ZC771 10U_0805_10V4Z
1 2
C773 0.1U_0402_16V4ZC 773 0.1U_0402_16V4Z
12
C774 0.1U_0402_16V4ZC 774 0.1U_0402_16V4Z
12
V5_VREF=1mA
2
1
L69
L69
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
C46710U_0805_10V4Z C46710U_0805_10V4Z
C4781U_0402_6.3V4Z C4781U_0402_6.3V4Z
12
C4871U_0402_6.3V4Z C4871U_0402_6.3V4Z
12
C4940.1U_0402_16V4Z C4940.1U_0402_16V4Z
12
C4820.1U_0402_16V4Z C4820.1U_0402_16V4Z
12
+3VALW
C7692.2U_0603_6.3V4Z C7692.2U_0603_6.3V4Z
C4862.2U_0603_6.3V4Z C4862.2U_0603_6.3V4Z
C786
C786
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
12
12
+1.2V_HT
+1.2V_HT
C797 1U_0402_6.3V4ZC797 1U_0402_6.3V4Z
C796 1U_0402_6.3V4ZC796 1U_0402_6.3V4Z
12
D31
D31
21
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
+3VALW
C4842.2U_0603_6.3V4Z C4842.2U_0603_6.3V4Z
C4960.1U_0402_16V4Z C4960.1U_0402_16V4Z
D
U30E
U30E
SB700
SB700
T10
AVSS_SATA_1
U10
AVSS_SATA_2
U11
AVSS_SATA_3
U12
AVSS_SATA_4
V11
AVSS_SATA_5
V14
AVSS_SATA_6
W9
AVSS_SATA_7
Y9
AVSS_SATA_8
Y1 1
AVSS_SATA_9
Y1 4
AVSS_SATA_10
Y1 7
AVSS_SATA_11
AA9
AVSS_SATA_12
AB9
AVSS_SATA_13
AB11
AVSS_SATA_14
AB13
AVSS_SATA_15
AB15
AVSS_SATA_16
AB17
AVSS_SATA_17
AC8
AVSS_SATA_18
AD8
AVSS_SATA_19
AE8
AVSS_SATA_20
A15
AVSS_USB_1
B15
AVSS_USB_2
C14
AVSS_USB_3
D8
AVSS_USB_4
D9
AVSS_USB_5
D11
AVSS_USB_6
D13
AVSS_USB_7
D14
AVSS_USB_8
D15
AVSS_USB_9
E15
AVSS_USB_10
F12
AVSS_USB_11
F14
AVSS_USB_12
G9
AVSS_USB_13
H9
+1.2VALW
12
12
R3861K_0402_5% R3861K_0402_5%
+5VS
+3VS
AVSS_USB_14
H17
AVSS_USB_15
J9
AVSS_USB_16
J11
AVSS_USB_17
J12
AVSS_USB_18
J14
AVSS_USB_19
J15
AVSS_USB_20
K10
AVSS_USB_21
K12
AVSS_USB_22
K14
AVSS_USB_23
K15
AVSS_USB_24
H18
PCIE_CK_VSS_1
J17
PCIE_CK_VSS_2
J22
PCIE_CK_VSS_3
K25
PCIE_CK_VSS_4
M16
PCIE_CK_VSS_5
M17
PCIE_CK_VSS_6
M21
PCIE_CK_VSS_7
P16
PCIE_CK_VSS_8
F9
AVSSC
Part 5 of 5
Part 5 of 5
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
GROUND
GROUND
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
AVSSCK
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y2 1
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
E
AVDDCK_1.2V=62mA
+AVDDCK_1.2V
AVDDCK_3.3V=47mA
+AVDDCK_3.3V
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
L77
L77
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
12
L76
L76
12
+1.2V_HT
C7582.2U_0603_6.3V4Z C7582.2U_0603_6.3V4Z
12
C7610.1U_0402_16V4Z C7610.1U_0402_16V4Z
12
+3VS
C7562.2U_0603_6.3V4Z C7562.2U_0603_6.3V4Z
12
C7600.1U_0402_16V4Z C7600.1U_0402_16V4Z
12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SB710 power/GND
SB710 power/GND
SB710 power/GND
LA-5972P
LA-5972P
LA-5972P
E
26 49Thursday, December 10, 2009
26 49Thursday, December 10, 2009
26 49Thursday, December 10, 2009
1.0
1.0
1.0
A
B
C
D
E
REQUIRED STRAPS
PCI_CLK2
PULL
1 1
2 2
HIG H
PULL
LOW
PCI_CLK2(23)
PCI_CLK3(23)
PCI_CLK4(23)
PCI_CLK5(23)
CLK_PCI_EC(23,33)
LPCCLK1(23)
RTC_CLK(23)
HDA_RST#(24)
GPIO17(24)
GPIO16(24)
BOOTFAIL
TIMER
ENABLED
BOOTFAIL
TIMER
DISABLED
DEFAULT
R427
R427
@
@
R424
R424
PCI_CLK3
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT
+3VS +3VS +3VS +3VS +3VALW +3V ALW +3VALW +3VALW +3VALW +3VA LW
12
R425
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
R425
@
@
12
R422
R422
12
10K_0402_5%
10K_0402_5%
12
10K_0402_5%
10K_0402_5%
PCI_CLK4 PCI_CLK5
RESERVED
R423
R423
@
@
R420
R420
@
@
12
10K_0402_5%
10K_0402_5%
12
10K_0402_5%
10K_0402_5%
RESERVED
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
LPC_CLK0
CLK_PCI_EC
R421
R421
10K_0402_5%
10K_0402_5%
@
@
R398
R398
10K_0402_5%
10K_0402_5%
@
@
ENABLE PCI
MEM BOOT
DISABLE PCI
MEM BOO T
DEFAULT
12
R453
R453
@
@
12
R454
R454
12
10K_0402_5%
10K_0402_5%
12
10K_0402_5%
10K_0402_5%
CLKGEN
ENABLED
CLKGEN
DISABLED
DEFAULT
12
R361
R361
10K_0402_5%
10K_0402_5%
@
@
12
R452
R452
10K_0402_5%
10K_0402_5%
RTC_CLKLPC_CLK1
INTERNAL
RTC
DEFAULT
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
12
R401
R401
10K_0402_5%
10K_0402_5%
@
@
12
R402
R402
2.2K_0402_5%
2.2K_0402_5%
@
@
AZ_RST_CD#
EC
ENABLED
EC
DISABLED
DEFAULT
12
R411
R411
10K_0402_5%
10K_0402_5%
@
@
12
R410
R410
10K_0402_5%
10K_0402_5%
GP17
GP16
Internal pull up
H,H = Reserved
H,L = SPI ROM
L,H = LPC ROM (Def ault L,NC)
L,L = FWH ROM
12
12
R367
R367
R363
R363
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
@
@
12
12
R362
R362
R366
R366
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
@
@
DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
12
2.2K_0402_5%
2.2K_0402_5%
PCI_AD27 PCI_AD26
USE PCI
PLL
DEFAULT
BYPASS
PCI PLL
R393
R393
@
@
USE ACPI
BCLK
DEFAULT
BYPASS
ACPI
BCLK
12
R395
R395
2.2K_0402_5%
2.2K_0402_5%
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PCI_AD28
PULL
3 3
PCI_AD28(23)
PCI_AD27(23)
PCI_AD26(23)
PCI_AD25(23)
PCI_AD24(23)
PCI_AD23(23)
4 4
A
HIG H
PULL
LOW
B
USE
LONG
RESET
DEFAULT
USE
SHORT
RESET
R392
R392
@
@
12
2.2K_0402_5%
2.2K_0402_5%
C
PCI_AD25 PCI_AD24
USE IDE
PLL
DEFAULT
BYPASS IDE
PLL
R389
R389
@
@
USE DEFAULT
PCIE STRAPS
DEFAULT
USE EEPROM
PCIE STRAPS
12
R396
R396
2.2K_0402_5%
2.2K_0402_5%
@
@
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
12
2.2K_0402_5%
2.2K_0402_5%
PCI_AD23
RESERVED
12
R399
R399
2.2K_0402_5%
2.2K_0402_5%
@
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
SB710 STRAPS
SB710 STRAPS
SB710 STRAPS
LA-5972P
LA-5972P
LA-5972P
E
1.0
1.0
27 49Thursday, December 10, 2009
27 49Thursday, December 10, 2009
27 49Thursday, December 10, 2009
1.0
A
B
C
D
E
F
G
H
1 1
SATA_STX_C_DRX_P1(25)
SATA_STX_C_DRX_N1(25)
SATA_DTX_C_SRX_N1(25)
SATA_DTX_C_SRX_P1(25)
C513 0.01U_0402_16V7KC513 0.01U_0402_16V7K
1 2
C510 0.01U_0402_16V7KC510 0.01U_0402_16V7K
1 2
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1
+5VS
2A
Placea caps. near ODD CONN.
+5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2 2
2
1000P_0402_25V8J
1000P_0402_25V8J
C490
C490
C491
C491
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C492
C492
2
10U_0805_10V4Z
10U_0805_10V4Z
1
C505
C505
2
SATA ODD Conn.
JSATA1
JSATA1
1
2
3
4
5
6
7
8
9
10
11
12
13
OCTEK_SLS-13SD1G_NR
OCTEK_SLS-13SD1G_NR
ME@
ME@
GND
A+
AÂGND
BÂB+
GND
DP
+5V
+5V
MD
GND
GND
GND
GND
14
15
SATA HDD Conn.
JSATA2
JSATA2
1
SATA_STX_C_DRX_P0(25)
SATA_STX_C_DRX_N0(25)
3 3
SATA_DTX_C_SRX_N0(25)
SATA_DTX_C_SRX_P0(25)
C515 0.01U_0402_16V7KC515 0.01U_0402_16V7K
1 2
C521 0.01U_0402_16V7KC521 0.01U_0402_16V7K
1 2
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
Close conn
+3VS
+3VS
1
C792
C792
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C556
C556
2
1000P_0402_25V8J
1000P_0402_25V8J
1
C554
C554
2
1
C557
C557
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
C551
C551
2
1
C555
C555
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C552
C552
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+5VS
1A
for ESD issue
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
VCC3.3
9
VCC3.3
10
VCC3.3
11
GND
12
GND
13
GND
14
VCC5
15
VCC5
16
VCC5
17
GND
18
RESERVED
19
GND
20
VCC12
21
VCC12
22
VCC12
23
G1
24
G2
OCTEK_SAT-22SB1G_RV
OCTEK_SAT-22SB1G_RV
ME@
ME@
JALA0 (CL 9.2mm)
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
E
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
F
Date: Sheet of
Compal Electronics, Inc.
HDD & ODD Connector
HDD & ODD Connector
HDD & ODD Connector
LA-5972P
LA-5972P
G
LA-5972P
1.0
1.0
28 49Thursday, December 10, 2009
28 49Thursday, December 10, 2009
28 49Thursday, December 10, 2009
H
1.0
A
B
C
D
E
add at 8/11
EMI reserved
C748 100P_0402_50V8JC748 100P_0402_50V8J
1 2
R682
R682
6.19K_0402_1%
6.19K_0402_1%
+VCC_3IN1
12
USB20_N2(24)
USB20_P2(24)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C747
C747
USB20_N2
USB20_P2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
C752
C752
1
XD_CD#
XD_RDY_SD_WP_MS _CLK
R677
R677
12
XD_RE#_MS_INS#
0_0402_5%
0_0402_5%
XD_CE#_SD_D1
XD_CLE_SD_D0_MS_D7
XD_ALE_SD_D7_MS_D3 XD_WE#_SD_CD#
1 1
400mA
+3VALW
Trace width:20mil
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C746
C746
C751
C751
10U_0805_10V4Z
10U_0805_10V4Z
2
2
1
2
3
4
5
6
7
8
9
10
11
12
U7
U7
REF E
DM
DP
3V3_IN
CARD_3V3
V18
XD_CD#
SP1
SP2
SP3
SP4
SP5
GPIO0
CLK_IN
XD_D7
SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6
EPAD
RTS5138-GR_QFN24_4X4
RTS5138-GR_QFN24_4X4
25
Close to U7 pin24
@
@
1 2
17
24
23
22
21
20
19
18
16
15
14
13
CLK_48M_CR
XD_D7
XD_D6_MS_BS
XD_D5_SD_D2_MS_D5
XD_D4_SD_D3_MS_D1
XD_D3_SD_D4_MS_D4
XD_D2_SD_CMD
XD_D1_SD_D5_MD_D0
XD_D0_SD_CLK_MS_D2
XD_WP_SD_D6_MS_D6
R851
R851
22_0402_5%
22_0402_5%
CLK_48M_CR (20)
R678
R678
0_0402_5%
0_0402_5%
@ C963
@
12
C963
1 2
33P_0402_50V8K
33P_0402_50V8K
XD_D0_SD_CLK_MS_D2_R
XD_RDY_SD_WP_MS _CLK_R
XD_D0_SD_CLK_MS_D2_R
2 2
XD_RDY_SD_WP_MS _CLK_R
Card reader(XD/SD/MMC/MS/MS-Pro HD SD)
+VCC_3IN1
400mA
XD_D0_SD_CLK_MS_D2
XD_D1_SD_D5_MD_D0
XD_D2_SD_CMD
XD_D3_SD_D4_MS_D4
XD_D4_SD_D3_MS_D1
3 3
XD_D5_SD_D2_MS_D5
XD_D6_MS_BS
XD_D7
XD_WE#_SD_CD#
XD_WP_SD_D6_MS_D6
XD_ALE_SD_D7_MS_D3
XD_CD#
XD_RDY_SD_WP_MS _CLK
XD_RE#_MS_INS#
XD_CE#_SD_D1
XD_CLE_SD_D0_MS_D7
7 in 1 Card Reader
Trace width:20mil
JP2
JP2
3
XD-VCC
32
XD-D0
10
XD-D1
9
XD-D2
8
XD-D3
7
XD-D4
6
XD-D5
5
XD-D6
4
XD-D7
34
XD-WE
33
XD-WP
35
XD-ALE
40
XD-CD
39
XD-R/B
38
XD-RE
37
XD-CE
36
XD-CLE
11
7IN1 GND
31
7IN1 GND
41
7IN1 GND
42
7IN1 GND
TAITW_R015-B10-LM_N R
TAITW_R015-B10-LM_N R
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C745
C745
2
7 IN 1 CONN
7 IN 1 CONN
SD-VCC
MS-VCC
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CMD
SD-CD-SW
SD-WP-SW
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS - I N S
MS-BS
21
28
20
14
12
30
29
27
23
18
16
25
1
2
26
17
15
19
24
22
13
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R679
R679
@
@
1 2
100K_0402_1%
100K_0402_1%
XD_D0_SD_CLK_MS_D2_R
XD_CLE_SD_D0_MS_D7
XD_CE#_SD_D1
XD_D5_SD_D2_MS_D5
XD_D4_SD_D3_MS_D1
XD_D3_SD_D4_MS_D4
XD_D1_SD_D5_MD_D0
XD_WP_SD_D6_MS_D6
XD_ALE_SD_D7_MS_D3
XD_D2_SD_CMD
XD_WE#_SD_CD#
XD_RDY_SD_WP_MS _CLK
XD_RDY_SD_WP_MS _CLK_R
XD_D1_SD_D5_MD_D0
XD_D4_SD_D3_MS_D1
XD_D0_SD_CLK_MS_D2
XD_ALE_SD_D7_MS_D3
XD_RE#_MS_INS#
XD_D6_MS_BS
1
C744
C744
2
EMI reserved Close to JP1
12
@
@
R681
R681
10_0402_5%
10_0402_5%
1
@
@
C750
C750
10P_0402_50V8J
10P_0402_50V8J
2
12
@
@
R680
R680
10_0402_5%
10_0402_5%
1
@
@
C749
C749
10P_0402_50V8J
10P_0402_50V8J
2
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
RTS5138 Card Reader
RTS5138 Card Reader
RTS5138 Card Reader
LA-5972P
LA-5972P
LA-5972P
E
29 49Thursday, December 10, 2009
29 49Thursday, December 10, 2009
29 49Thursday, December 10, 2009
1.0
1.0
1.0
A
B
C
D
Place Close to LAN chip
@J4J4 @
JOPEN
JOPEN
C182
C182
+3VALW
R337
R337
@
@
@
@
@
@
12
2
1
D
D
1 3
2
13
D
D
S
S
12
S
S
AO3414_SOT23-3@
AO3414_SOT23-3@
G
G
PCIE_PTX_C_IRX_N2(10)
PCIE_PTX_C_IRX_P2(10)
PCIE_ITX_C_PRX_N2(10)
PCIE_ITX_C_PRX_P2(10)
Q5
Q5
EN_WOL
2
G
Q2
G
Q2
2N7002_SOT23
2N7002_SOT23
@
@
LAN_WAKE#(33)
1
1
C1029
C1029
C391
C391
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
2
2
8131@
8131@
Place Close to Pin 2
EN_WOL (33)
C315 0.1U_0402_16V4ZC315 0.1U_0402_16V4Z
C314 0.1U_0402_16V4ZC314 0.1U_0402_16V4Z
R689 4. 7K_0402_5%@R689 4. 7K_0402_5%@
1 2
+3V_LAN
R286
R286
1 2
+3V_LAN
+AVDDVCO1
1
C138
C138
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
+3VALW
1 1
33K_0402_5%
33K_0402_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.2_AVDDL
2 2
R157 0_0603_5%
1 2
R158
R158
0_0603_5%
0_0603_5%
R157 0_0603_5%
1 2
C138 close to Pin11 of U9
1 2
L18 0_0603_5%L18 0_0603_5%
If overclocking, R157 , L18 stuffed and R158 removed.
If not overclocking, R158 , L18 suffed and R157 removed.
AR8131:L18=0ohm (more power saving mode)
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C192
C192
2
C192 close to Pin11 of U42
+AVDDVCO2
+3V_LAN
60mil
1
1
C690
C690
C277
C277
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
85mA
+3V_LAN
12
12
PLT_RST#(11,13,14,23,31,33)
10K_0402_5%
10K_0402_5%
LAN_WAKE#
C317 0.1U_0402_10V7KC317 0.1U _0402_10V7K
1 2
C316 0.1U_0402_10V7KC316 0.1U _0402_10V7K
1 2
R323 2.37K_0402_1%R323 2.37K_0402_1%
1 2
+AVDD_CEN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C190
C190
1
2
L39 close to U9 pin1, C190 and C390 close to L39
U9
U9
60mil
+1.8_VDD/LX
+AVDD_CEN
+2.5V_VDDH
PLT_RST#
PCIE_IRX_C_PTX_N2
PCIE_IRX_C_PTX_P2
LAN_XTALI +1.2_AVDDL
LAN_XTALI
LAN_XTALO
1
VDDHO/VDD18O/VDD18O
2
VDD3V
6
VDD3V/VDDHO/VDDHO
5
VDDLO/CTR12/CTR12
3
PERSTn
7
VAUX_AVL/VBG1P18/VBG1P18
4
WAKEn
37
TX_N
38
TX_P
44
RX_N
43
RX_P
9
XTL O
10
XTL I
34
TESTMODE
35
NC
31
SMCL K
33
SMDATA
49
GND
12
RBIAS
S IC AR8132-AL1E_QFN48P_6X6
S IC AR8132-AL1E_QFN48P_6X6
8132@
8132@
L39
L39
1 2
S INDUC_ 4.7UH +-20% SIA4012-4R7M
S INDUC_ 4.7UH +-20% SIA4012-4R7M
1
C390
C390
10U_0805_10V4Z
10U_0805_10V4Z
2
SPI_CS/LED_DUPLEXn/LED_DUPLEXn
SPI_DI/NC/LED_Link1000n
AAAttthhheeerrro oosss
AAAttthhheeerrro oosss
AR8121/8131
AR8121/8131
DVDDL/AVDDL/AVDDL
AVDDL/DVDDL/DVDDL
SPI_CLK/DVDDL/DVDDL
SPI_DO/AVDDH/AVDDH
U9
U9
TWSI_DATA
TWSI_CLK
LED_LINK10_100n
LED_ACTn
REFCLKN
REFCLKP
TXN0/TXN0/TRXN0
TXP0/TXP0/T RXP0
RXN1/RXN1/TRXN1
RXP1/RXP1/TRXP1
NC/NC/TRXN2
NC/NC/TRXP2
NC/NC/TRXN3
NC/NC/TRXP3
AVDDL0
AVDDL1
AVDDL2
AVDDL3
AVDDL4
AVDDL5
DVDDL0
DVDDL1
AVDDH0
AVDDH1
+1.8_VDD/LX
+AVDD_CEN
30
29
48
47
27
26
40
41
14
13
18
17
21
20
24
23
42
39
36
22
16
11
8
46
45
32
28
25
19
15
add GIGA LAN resistor at 8/12
10/100_LINK_LED
ACTIVITY#
R693
R693
1 2
4.7K_0402_5%
4.7K_0402_5%
1000_LINK_LED
C844 0.1U_0402_10V7KC 844 0.1U_0402_10V7K
1 2
C843 0.1U_0402_10V7KC 843 0.1U_0402_10V7K
1 2
MDI0ÂMDI0+
MDI1ÂMDI1+
MDI2ÂMDI2+
MDI3ÂMDI3+
+AVDDVCO2LAN_XTALO
+AVDDVCO1
+1.2_AVDDL
+1.2_DVDDL
+2.5V_VDDH
MDI0+
MDI0-
MDI1+
MDI1-
MDI2+
MDI2-
MDI3+
MDI3-
R479 49. 9_0402_1%R479 49.9_0402_1%
1 2
R360 49. 9_0402_1%R360 49.9_0402_1%
1 2
R480 49. 9_0402_1%R480 49.9_0402_1%
1 2
R478 49. 9_0402_1%R478 49.9_0402_1%
1 2
R909 49. 9_0402_1%8131@ R909 49.9_0402_1%8131@
1 2
R910 49. 9_0402_1%8131@ R910 49.9_0402_1%8131@
1 2
R911 49. 9_0402_1%8131@ R911 49.9_0402_1%8131@
1 2
R912 49. 9_0402_1%8131@ R912 49.9_0402_1%8131@
1 2
+3V_LAN
CLK_PCIE_LAN# (20)
CLK_PCIE_LAN (20)
C181 0. 1U_0402_16V4ZC181 0.1U _0402_16V4Z
1 2
C139 0. 1U_0402_16V4ZC139 0.1U _0402_16V4Z
1 2
C1016 0.1U_0402_16V4Z
C1016 0.1U_0402_16V4Z
1 2
8131@
8131@
C1017 0.1U_0402_16V4Z
C1017 0.1U_0402_16V4Z
1 2
8131@
8131@
10/100_LINK_LED
1000_LINK_LED
C689 close to U9 pin15
C189 close to U9 pin19
C845 close to U9 pin25
C688, C184 close to U9 pin8
C187 close to U9 pin16
C140 close to U9 pin22
C141 close to U9 pin36
C846 close to U9 pin39
+1.2_AVDDL
C687 close U9 pin46
C193 close U9 pin45
C183 close U9 pin28
C185 close U9 pin32
C688
C688
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.2_DVDDL
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C687
C687
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C184
C184
1
2
+2.5V_VDDH
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C193
C193
D42
D42
2
3
CHP202UPT_SOT323-3
CHP202UPT_SOT323-3
C689
C689
1
C187
C187
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C183
C183
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C140
C140
2
1
2
C189
C189
C141
C141
1
2
LINK_LED
1
C845C845
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C185C185
0.1U_0402_16V4Z0.1U_0402_16V4Z
1
C846
C846
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RJ45 CONN
R694
AR8131
Y5
1 2
25MHZ_20PY525MHZ_20P
3 3
C191 close to R688
C191 1U_0603_10V4ZC191 1U_0603_10V4Z
1 2
C1018
1
C1018 close to Pin1
C1019
1
C1019 close to Pin4
C186 0.1U_0402_16V4ZC186 0.1U_0402_16V4Z
1 2
C186 close to Pin7
4 4
C188 0.1U_0402_16V4ZC188 0.1U_0402_16V4Z
1 2
C188 close to Pin10
0.1U_0402_16V4ZC1018 0.1U_0402_16V4Z
2
8131@
8131@
0.1U_0402_16V4ZC1019 0.1U_0402_16V4Z
2
8131@
8131@
+AVDD_CEN
12
R688
R688
0_0603_5%
0_0603_5%
MDI3+
MDI3-
MDI2+
MDI2-
MDI1+
MDI1-
U41
U41
MDI0+
1
C806
C806
27P_0402_50V8J
27P_0402_50V8J
2
10
11
U41
U41
1
TCT1
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
TCT4
TD4+
1
C805
C805
27P_0402_50V8J
27P_0402_50V8J
2
1:1
1:1
1:1
1:1
1:1
1:1
1:1
1:1
MC T 1
MC T 2
MC T 3
MC T 4
MX 1 +
MX 1 -
MX 2 +
MX 2 -
MX 3 +
MX 3 -
MX 4 +
AR8131
8131@
8131@
ACTIVITY#
220P_0402_50V7K
220P_0402_50V7K
C810
C810
C810 close to U9
MCT3
24
MDO3+
23
MDO3-
22
MCT2
21
MDO2+
20
R913 75_0402_5%8131@R913 75_0402_5%8131@
R914 75_0402_5%8131@R914 75_0402_5%8131@
12
+3V_LAN
C811
C811
220P_0402_50V7K
12
220P_0402_50V7K
C811 close to JRJ45
MDO2-
19
MCT1
18
MDO1+
17
MDO1-
16
MCT0
15
MDO0+
14
R581 75_0402_5%R581 75_0402_5%
12
R580 75_0402_5%R580 75_0402_5%
12
RJ45_PR
R694
5.1K_0402_5%
5.1K_0402_5%
12
R335
R335
510_0402_5%
510_0402_5%
12
LINK_LED
add signal at 8/12
R334
R334
510_0402_5%
510_0402_5%
12
RJ45_PR
1 2
C318
C318
1000P_1206_2KV7K
1000P_1206_2KV7K
2
1
1
2
MDO3-
MDO3+
MDO1-
MDO2-
MDO2+
MDO1+
MDO0-
MDO0+
JRJ45
JRJ45
12
Amber LED-
11
Amber LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
FOX_JM36113-P2221-7F
FOX_JM36113-P2221-7F
ME@
ME@
SHLD4
SHLD3
SHLD2
SHLD1
16
15
14
13
NS892404
NS892404
8132@
8132@
A
MDI0-
12
TD4-
350uH_NS892406
350uH_NS892406
8131@
8131@
MDO0-
13
MX 4 -
change to GIGA LAN transformer at 8/12
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
2008/04/16 2009/04/16
2008/04/16 2009/04/16
2008/04/16 2009/04/16
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered D ate
Deciphered D ate
Deciphered D ate
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Atheros AR8132 & LAN CONN
Atheros AR8132 & LAN CONN
Atheros AR8132 & LAN CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
LA-5972P
LA-5972P
LA-5972P
D
30 49Thursday, December 10, 2009
30 49Thursday, December 10, 2009
30 49Thursday, December 10, 2009
1.0
1.0
1.0
A
B
C
D
E
For Wireless LAN
3.3V
GND
1.5V
NC
NC
NC
NC
NC
GND
NC
PERST#
+3.3Vaux
GND
+1.5V
SMB_CLK
SMB_DATA
GND
USB_D-
USB_D+
GND
+1.5V
GND
+3.3V
GND
U48
U48
12
1.5Vin141.5Vout
1.5Vin
2
3.3Vin43.3Vout
3.3Vin
AUX_IN17AUX_OUT
6
SYSRST#
20
SHDN#
1
STBY#
10
CPPE#
9
CPUSB#
18
RCLKEN
P2231NL_QFN20
P2231NL_QFN20
NEWCARD@
NEWCARD@
+1.5VS_UMA
1
C825
C825
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
@
@
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
(MINI1_LED#)
46
48
50
52
54
1.5Vout
3.3Vout
OC#
PERST#
GND
PAD
1
C808
C808
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
@
@
WL_OFF#
PLT_RST#
+3V_WLAN
R458 0_0603_5%
R458 0_0603_5%
R459 0_0603_5%
R459 0_0603_5%
SB_SMBCLK
SB_SMBDATA
R547 0_0402_5%WLAN@R547 0_0402_5%WLAN@
+1.5VS_CARD1
11
13
+3VS_CARD1
3
5
+3VALW_CARD1
15
19
PERST#
8
16
NC
7
21
@
@
J3 JOPEN
J3 JOPEN
1 2
@
@
1 2
@
@
1 2
1
C823
C823
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
@
@
12
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
SB_SMBCLK (8,9,20,24)
SB_SMBDATA (8,9,20,24)
USB20_N5 (24)
USB20_P5 (24)
(9~16mA)
+3VS
+1.5VS_UMA
WL_OFF# (33)
PLT_RST# (11,13,14,23,30,33)
+3VS
+3VALW
WLAN_LED# (35)
BT_OFF#(33)
Reserve for SW mini-pcie debug card.
Series resistors closed to KBC side.
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
CLK_PCI_DB
add at 8/11
R974 0_0402_5%@R974 0_0402_5%@
1 2
R975 0_0402_5%@R975 0_0402_5%@
1 2
R976 0_0402_5%@R976 0_0402_5%@
1 2
R977 0_0402_5%@R977 0_0402_5%@
1 2
R978 0_0402_5%@R978 0_0402_5%@
1 2
+1.5VS_CARD1
40mil
60mil
+3VS_CARD1
40mil
+3VALW_CARD1
BT_LED#(35)
+5VALW
12
R1017
R1017
100K_0402_1%
100K_0402_1%
@
@
2
IN
BT@
BT@
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
+3VS +1.5VS_UMA
1
C985C985
@
@
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
Imax = 0.75A
1
NEWCARD@
NEWCARD@
C989
C989
10U_0805_10V4Z
10U_0805_10V4Z
2
1
NEWCARD@
NEWCARD@
C990
C990
10U_0805_10V4Z
10U_0805_10V4Z
2
1
@
@
C993
C993
10U_0805_10V4Z
10U_0805_10V4Z
2
1
C987
C987
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
NEWCARD@
NEWCARD@
Imax = 1.35A
1
C991
C991
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
NEWCARD@
NEWCARD@
Imax = 0.275A
1
C994
C994
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
NEWCARD@
NEWCARD@
1
OUT
GND
3
+5VS
12
R257
R257
100K_0402_1%
100K_0402_1%
BT@
BT@
1
OUT
Q42
Q42
DTC124EKAT146_SC59-3
DTC124EKAT146_SC59-3
GND
3
LPC_FRAME# (23,33)
LPC_AD3 (23,33)
LPC_AD2 (23,33)
LPC_AD1 (23,33)
LPC_AD0 (23,33)
CLK_PCI_DB (23)
1
@
@
C986
C986
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
Q41
Q41
DTC124EKAT146_SC59-3
DTC124EKAT146_SC59-3
2
IN
BT@
BT@
+3VS
S
S
G
G
R1014
R1014
1 2
100K_0402_1%
100K_0402_1%
BT@
BT@
SB_PCIE_WAKE#(24)
+3VALW_CARD1
CLK_PCIE_EXP#(20)
CLK_PCIE_EXP(20)
PCIE_ITX_C_PRX_N4(10)
PCIE_ITX_C_PRX_P4(10)
PCIE_PTX_C_IRX_N4(10)
PCIE_PTX_C_IRX_P4(10)
BT MODULE CONN
USB20_P8(24)
USB20_N8(24)
+3VS_BT
Q43
Q43
D
D
13
2
1
C1045
C1045
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
BT@
BT@
USB20_N9(24)
USB20_P9(24)
SB_SMBCLK(8,9,20,24)
SB_SMBDATA(8,9,20,24)
+1.5VS_CARD1
+3VS_CARD1
EXP_CLKREQ#(20)
30mils
AO3413_SOT23-3
AO3413_SOT23-3
BT@
BT@
1
2
change pin define
for new symbol (JP22)
on C test
USB20_N9
USB20_P9
CPUSB#
PERST#
CPUSB#
BTON_LED
WLAN_ACTIVE
BT_ACTIVE
USB20_P8
USB20_N8
C488
C488
0.1U_0402_16V4Z
0.1U_0402_16V4Z
BT@
BT@
10
JEXP1
JEXP1
1
GND
2
USB_D-
3
USB_D+
4
CPUSB#
5
RSV
6
RSV
7
SMB_CLK
8
SMB_DATA
9
+1.5V
10
+1.5V
11
WAKE#
12
+3.3VAUX
13
PERST#
14
+3.3V
15
+3.3V
16
CLKREQ#
17
CPPE#
18
REFCLK-
19
REFCLK+
20
GND
21
PERn0
22
PERp0
23
GND
24
PETn0
25
PETp0
26
GND
27
GND
28
GND
SANTA_130801-5_RT
SANTA_130801-5_RT
ME@
ME@
(NEW)
JP30
JP30
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND1
GND2
ACES_88231-08001
ACES_88231-08001
ME@
ME@
+3VS
1 2
PLT_RST#_R
CLK_PCI_DB
1
C813
C813
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
WLAN@
WLAN@
JP22
JP22
1
WAKE#
3
NC
5
NC
7
CLKREQ#
9
GND
11
REFCLK-
13
REFCLK+
15
GND
17
NC
19
NC
21
GND
23
PERn0
25
PERp0
27
GND
29
GND
31
PETn0
33
PETp0
35
GND
37
NC
39
NC
41
NC
LED_WWAN#
43
NC
LED_WLAN#
45
NC
LED_WPAN#
47
NC
49
NC
51
NC
53
GND
TAITW_PFPET0-AFGLBG1ZZ4N0
TAITW_PFPET0-AFGLBG1ZZ4N0
ME@
ME@
R983 0_0402_5%@R983 0_0402_5%@
1 2
WLAN@R709 WLAN@
1 2
WLAN@R710 WLAN@
1 2
@R711
@
1 2
WLAN@R712 WLAN@
0_0402_5%
0_0402_5%
1 2
1 2
1
C841
C841
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
WLAN@
WLAN@
R457 0_0402_5%@R457 0_0402_5%@
R103 0_0402_5%@R103 0_0402_5%@
1 2
R102 0_0402_5%@R102 0_0402_5%@
1 2
1 2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
EC_TX_P80_DATA_R
EC_RX_P80_CLK_R
1
C842
C842
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
WLAN@
PCIE_PTX_C_IRX_N1(10)
PCIE_PTX_C_IRX_P1(10)
PCIE_ITX_C_PRX_N1(10)
PCIE_ITX_C_PRX_P1(10)
WLAN@
MINI1_CLKREQ#(20)
CLK_PCIE_MINI1#(20)
CLK_PCIE_MINI1(20)
1 2
SB_PCIE_WAKE#
BT_ACTIVE
WLAN_ACTIVE
PLT_RST#
R709
R710
R711
R712
R432
R432
R935 0_0402_5%R935 0_0402_5%
R936
R936
100K_0402_5%
100K_0402_5%
@
@
1 1
SB_PCIE_WAKE#(24)
+3VS
+3VALW
EC_TX_P80_DATA(33)
EC_RX_P80_CLK(33)
2 2
add at 8/13
Mini Card Power Rating
Power
+3VS
+3V
+1.5VS
Primary Power (mA)
Peak Normal
1000
330
500
750
250
375
Auxiliary Power (mA)
Nor mal
250 (wake enable)
5 (Not wake enable)
add at 8/11
3 3
4 4
Express Card Power Switch
+1.5VS_UMA
1
C988
C988
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
NEWCARD@
NEWCARD@
+3VS
1
C992
C992
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
NEWCARD@
NEWCARD@
+3VALW
1
C995
C995
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
NEWCARD@
NEWCARD@
+3VALW
+3VS
R904
R904
NEWCARD@
NEWCARD@
1 2
0_1206_5%
0_1206_5%
PLT_RST#(11,13,14,23,30,33)
SYSON(33,38,43)
SUSP#(18,33,38,41,44,46)
R905 100K_0402_5%@R905 100K_0402_5%@
1 2
+1.5VS_UMA
+3VALW
PLT_RST#
SYSON
SUSP#
CPUSB#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
MINI CARD/BT/ NEW CARD
MINI CARD/BT/ NEW CARD
MINI CARD/BT/ NEW CARD
LA-5972P
LA-5972P
LA-5972P
31 49Thursday, December 10, 2009
31 49Thursday, December 10, 2009
31 49Thursday, December 10, 2009
E
1.0
1.0
1.0
A
B
C
D
E
USB20_N0(24)
EMI request
add at 8/14
+USB_VCCC
USB20_P0(24)
USB20_N10(24)
USB20_P10(24)
USB20_P3(24)
USB20_N3(24)
CMOS Camera Conn
+5VS
1 1
CMOS_OFF#(33)
2 2
+5VALW
3 3
C501 0.1U_0402_16V4ZC501 0.1U_0402_16V4Z
12
USB_ON#(33)
2
IN
1
2
3
4
12
R259
R259
100K_0402_5%
100K_0402_5%
CMOS@
CMOS@
1
OUT
CMOS@
CMOS@
GND
Q49
Q49
DTC124EKAT146_SC59-3
DTC124EKAT146_SC59-3
3
U43
U43
8
GND
VOUT
7
VOUT
VIN
6
VIN
VOUT
5
FLG
EN
APL3510BKI-TRGSO8
APL3510BKI-TRGSO8
R1015
R1015
1 2
100K_0402_5%
100K_0402_5%
CMOS@
CMOS@
USB20_N7(24)
USB20_P7(24)
+USB_VCCC
CMOS@
CMOS@
C1046
C1046
0.1U_0402_16V4Z
0.1U_0402_16V4Z
USB_OC#1 (24)
1
C502
C502
1000P_0402_25V8J
@1000P_0402_25V8J@
2
S
S
G
G
Q48
Q48
D
D
AO3413_SOT23-3
AO3413_SOT23-3
13
CMOS@
CMOS@
2
1
2
150mA
1
@
@
C1047
C1047
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
USB20_N7
USB20_P7
1
+
+
C503
C503
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
2
@
@
12
R258
R258
0_0603_5%
0_0603_5%
CMOS@
CMOS@
1
CMOS@
CMOS@
C553
C553
10U_0805_10V4Z
10U_0805_10V4Z
2
1
C545
C545
470P_0402_50V7K
470P_0402_50V7K
2
@
@
1
C550
C550
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CMOS@
CMOS@
1
2
3
4
5
6
7
JP31
JP31
1
2
3
4
5
GND1
GND2
ACES_88266-05001
ACES_88266-05001
ME@
ME@
+USB_VCCA
1
C946
C946
470P_0402_50V7K
470P_0402_50V7K
2
W=80mils
USB20_N0
USB20_P0
USB20_N10
USB20_P10
USB20_P3
USB20_N3
USB20_N0
USB20_P0
USB20_N10
USB20_P10
USB20_N3
USB20_P3
+USB_VCCA
WCM-2012-900T_4P
WCM-2012-900T_4P
4
4
1
1
L102
L102
WCM-2012-900T_4P
WCM-2012-900T_4P
4
4
1
1
L103
L103
4
4
1
1
L104
L104
WCM-2012-900T_4P
WCM-2012-900T_4P
R944 0_0402_5%R944 0_0402_5%
1 2
R945 0_0402_5%R945 0_0402_5%
1 2
R946 0_0402_5%R946 0_0402_5%
1 2
R947 0_0402_5%R947 0_0402_5%
1 2
R948 0_0402_5%R948 0_0402_5%
1 2
R949 0_0402_5%R949 0_0402_5%
1 2
USB20_P3_R
USB20_N3_R
USB20_N3_R
USB20_P3_R
EMI request
add at 8/14
W=80mils
1
C947
C947
470P_0402_50V7K
470P_0402_50V7K
2
@
@
@
@
@
@
3
3
2
2
3
3
2
2
3
3
2
2
USB20_N0_R
USB20_P0_R
USB20_N10_R
USB20_P10_R
USB20_N3_R
USB20_P3_R
JUSB3
JUSB3
8
GND
7
GND
6
6
5
5
4
4
3
3
2
2
1
1
ACES_85201-06051
ACES_85201-06051
ME@
ME@
D43
D43
2
3
PJDLC05_SOT23-3
PJDLC05_SOT23-3
@
@
USB20_N0_R
USB20_P0_R
USB20_N10_R
USB20_P10_R
USB20_P3_R
USB20_N3_R
1
+5VALW
JUSB1
JUSB1
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
SUYIN_020173MR004G579ZR
SUYIN_020173MR004G579ZR
ME@
ME@
D44
D44
2
3
PJDLC05_SOT23-3
PJDLC05_SOT23-3
@
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
USB20_N10_R
USB20_N10_R
1
D
USB20_P10_R
EMI request
add at 8/14
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
VOUT
VOUT
VOUT
FLG
+USB_VCCA
8
7
6
5
1
C547
C547
1000P_0402_25V8J
@1000P_0402_25V8J@
2
USB_OC#6 (24)
USB_OC#0 (24)
B
1
+
+
C548
C548
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
2
1
C549
C549
470P_0402_50V7K
470P_0402_50V7K
2
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
U45
U45
1
C546 0.1U_0402_16V4ZC546 0.1U_0402_16V4Z
4 4
12
USB_ON#(33)
A
GND
2
VIN
3
VIN
4
EN
APL3510BKI-TRGSO8
APL3510BKI-TRGSO8
USB20_N0_R USB20_P10_R
USB20_P0_R
USB20_N0_R
USB20_P0_R
EMI request
add at 8/14
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
JUSB2
JUSB2
1
VCC
2
D-
3
D+
4
GND
5
GND1
6
GND2
7
GND3
8
GND4
SUYIN_020173MR004G579ZR
SUYIN_020173MR004G579ZR
ME@
ME@
D45
D45
2
3
PJDLC05_SOT23-3
PJDLC05_SOT23-3
@
@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
BlueTooth / Int USB x2 /eSATA
BlueTooth / Int USB x2 /eSATA
BlueTooth / Int USB x2 /eSATA
1
LA-5972P
LA-5972P
LA-5972P
32 49Thursday, December 10, 2009
32 49Thursday, December 10, 2009
32 49Thursday, December 10, 2009
E
1.0
1.0
1.0
+3VALW
CLK_PCI_EC(23,27)
C742
PLT_RST#
+3VALW
1 2
R611 47K_0402_5%R611 47K_0402_5%
1 2
R612 47K_0402_5%R612 47K_0402_5%
1 2
R608 4.7K_0402_5%R608 4.7K_0402_5%
+5VALW
1 2
R610 4.7K_0402_5%R610 4.7K_0402_5%
1 2
R607 4.7K_0402_5%R607 4.7K_0402_5%
+3VS
R596 4.7K_0402_5%R596 4.7K_0402_5%
R600 4.7K_0402_5%R600 4.7K_0402_5%
1 2
R592 10K_0402_5%R592 10K_0402_5%
1 2
R928 10K_0402_5%R928 10K_0402_5%
1 2
R929 10K_0402_5%R929 10K_0402_5%
1 2
R930 10K_0402_5%R930 10K_0402_5%
1 2
R931 10K_0402_5%R931 10K_0402_5%
1 2
R932 10K_0402_5%R932 10K_0402_5%
add at 8/13
1 2
R1005 10K_0402_5%
R1005 10K_0402_5%
@
@
+5VS
1 2
R605 4.7K_0402_5%R605 4.7K_0402_5%
1 2
R604 4.7K_0402_5%R604 4.7K_0402_5%
1 2
R590 100K_0402_5%
R590 100K_0402_5%
1 2
@
@
R589 100K_0402_5%
R589 100K_0402_5%
1 2
@
@
R696 100K_0402_5%@R696 100K_0402_5%@
1 2
R697 100K_0402_5%@R697 100K_0402_5%@
1 2
R933 10K_0402_5%R933 10K_0402_5%
1 2
R934 10K_0402_5%R934 10K_0402_5%
1 2
R1006 10K_0402_5%R1006 10K_0402_5%
add at 8/13
VGA_SMB_CK2(15)
VGA_SMB_DA2(15)
+3VS
12
R595
@ R595
@
10K_0402_5%
10K_0402_5%
KB_RST#(24)
1 2
1 2
@C742
@
R603 33_0402_5%@R603 33_0402_5%@
22P_0402_50V8J
22P_0402_50V8J
ver 01:for EMC request
1 2
+3VALW
12
Ver02:add pull high resister
R613 47K_0402_5%R613 47K_0402_5%
R591
R591
100K_0402_5%
100K_0402_5%
KSO1
KSO2
LID_SW#
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
FAN_SPEED1 EC_SMB_DA2
SSD_DET#
MUTE_BTN#
VOLUME_UP#
DGPU_BTN#
EC_SEL
TP_CLK
TP_DATA
SUSP#
SYSON
KSO2
KSO3
VOUTX
VOUTY
EC_SEL
VGA@
VGA@
12
R9970_0402_5%
R9970_0402_5%
VGA@
VGA@
12
R9980_0402_5%
R9980_0402_5%
CLOSE TO U6
GATEA20(24)
SERIRQ(23)
LPC_FRAME#(23,31)
LPC_AD3(23,31)
LPC_AD2(23,31)
LPC_AD1(23,31)
LPC_AD0(23,31)
2
C729
C729
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
KSO[0..15](34)
KSI[0..7](34)
EC_SMB_CK1(40)
EC_SMB_DA1(40)
EC_SMB_CK2(6)
EC_SMB_DA2(6)
PM_SLP_S3#(24)
PM_SLP_S5#(24)
EC_SMI#(24)
PANEL_PWM(21)
FAN_SPEED1(37)
EC_TX_P80_DATA(31)
EC_RX_P80_CLK(31)
ON/OFF#(35)
H_PROCHOT_R#(6,23)
NUM_LED#(35)
1
C741
C741
27P_0402_50V8J
27P_0402_50V8J
32.768K_1TJS125BJ4A421P
32.768K_1TJS125BJ4A421P
EC_SMB_CK2
EC_SMB_DA2
2
LAN_WAKE#(30)
EC_SCI#(24)
KSO[0..15]
KSI[0..7]
X1
X1
2
+3VS
12
R700@
R700@
10K_0402_5%10K_0402_5%
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
EC_RST#
EC_SCI#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMI#
VOLUME_UP#
VOLUME_DOWN#VOLUME_DOWN#
EC_SEL
VGATE
PANEL_PWM
FAN_SPEED1
DGPU_BTN#
EC_TX_P80_DATA
EC_RX_P80_CLK
@
12
R9920_0402_5%@R9920_0402_5%
XCLKI
XCLKO
1
4IN1
C740
C740
27P_0402_50V8J
27P_0402_50V8J
2
OUT
NC3NC
10K_0402_5%
10K_0402_5%
1 2
R587 0_0402_5%R587 0_0402_5%
U6
U6
1
GA20/GPIO00
2
KBRST#/GPIO01
3
SERIRQ#
4
LFRAME#
5
LAD3
7
LAD2
8
LAD1
10
LAD0
12
PCICLK
13
PCIRST#/GPIO05
37
ECRST#
20
SCI#/GPIO0E
38
CLKRUN#/GPIO1D
55
KSI0/GPIO30
56
KSI1/GPIO31
57
KSI2/GPIO32
58
KSI3/GPIO33
59
KSI4/GPIO34
60
KSI5/GPIO35
61
KSI6/GPIO36
62
KSI7/GPIO37
39
KSO0/GPIO20
40
KSO1/GPIO21
41
KSO2/GPIO22
42
KSO3/GPIO23
43
KSO4/GPIO24
44
KSO5/GPIO25
45
KSO6/GPIO26
46
KSO7/GPIO27
47
KSO8/GPIO28
48
KSO9/GPIO29
49
KSO10/GPIO2A
50
KSO11/GPIO2B
51
KSO12/GPIO2C
52
KSO13/GPIO2D
53
KSO14/GPIO2E
54
KSO15/GPIO2F
81
KSO16/GPIO48
82
KSO17/GPIO49
77
SCL1/GPIO44
78
SDA1/GPIO45
79
SCL2/GPIO46
80
SDA2/GPIO47
6
PM_SLP_S3#/GPIO04
14
PM_SLP_S5#/GPIO07
15
EC_SMI#/GPIO08
16
LID_SW#/GPIO0A
17
SUSP#/GPIO0B
18
PBTN_OUT#/GPIO0C
19
EC_PME#/GPIO0D
25
EC_THERM#/GPIO11
28
FAN_SPEED1/FANFB1/GPIO14
29
FANFB2/GPIO15
30
EC_TX/GPIO16
31
EC_RX/GPIO17
32
ON_OFF/GPIO18
34
PWR_LED#/GPIO19
36
NUMLED#/GPIO1A
122
XCLK1
123
XCLK0
KB926QFE0_LQFP128
KB926QFE0_LQFP128
+3VALW
12
R593
R593
@
@
EC_PME#
LPC & MISC
LPC & MISC
Int. K/B
Int. K/B
Matrix
Matrix
VGATE(47)
SPOK(42,43)
9
22
33
VCC
VCC
PWM Output
PWM Output
DA Output
DA Output
PS2 Interface
PS2 Interface
SPI Device Interface
SPI Device Interface
SM Bus
SM Bus
GPIO
GPIO
GND
11
24
+EC_AVCC+3VALW
96
111
125
VCC
VCC
VCC
VCC
INVT_PW M/PWM1/GPIO0F
ACOFF/FANPWM2/GPIO13
BATT_TEMP/AD0/GPIO38
AD Input
AD Input
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
SPI Flash ROM
SPI Flash ROM
BATT_CHGI_LED#/GPIO52
GPIO
GPIO
BATT_LOW_LED#/GPIO54
VR_ON/XCLK32K/GPIO57
GPO
GPO
GPI
GPI
GND
GND
GND
GND
35
94
113
ECAGND
67
AVCC
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3 E
DA3/GPIO3F
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
CAPS_LED#/GPIO53
SUSP_LED#/GPIO55
SYSON/GPIO56
AC_IN/GPIO59
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
V18R
AGND
69
21
BEEP#
23
26
ACOFF
27
BATT_TEMP
63
BATT_OVP
64
65
VOUTX
66
VOUTY
75
76
DAC_BRIG
68
EN_FAN1
70
IRE F
71
72
83
USB_ON#
84
85
86
TP_CLK
87
TP_DATA
88
WL_OFF#
97
98
99
LID_SW#
109
FRD#SPI_SO
119
FWR#SPI_SI
120
SPI_CLK_R
126
FSEL#SPICS#
128
R1003
SSD_DET#
73
74
R1004 0_0402_5%@R1004 0_0402_5%@
89
CHARGE_LED0#
90
CAPS_LED#
91
CHARGE_LED1#
92
93
SYSON
95
121
R991 0_0402_5%R991 0_0402_5%
127
100
EC_LID_OUT#
101
EC_ON
102
103
SB_PWRGD_EC
104
105
106
107
MUTE_BTN#
108
110
ENBKL_R
112
114
EC_THERM#
115
SUSP#
116
PBTN_OUT#
117
EC_PME#
118
20mil
124
0_0402_5%
0_0402_5%
@R1003
@
1 2
1 2
VR_ON
1 2
UMA@
UMA@
1 2
R984 0_0402_5%
R984 0_0402_5%
ENBKL_R
1
C743C743
4.7U_0805_10V4Z4.7U_0805_10V4Z
2
1
C731C731
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
KILL_SW# (34)
BEEP# (36)
NOVO# (35)
ACOFF (39,41)
BATT_TEMP (40)
BATT_OVP (41)
ADP_I (41)
DAC_BRIG (21)
EN_FAN1 (37)
IRE F (41)
CHGVADJ (41)
EC_MUTE# (36)
TP_CLK (34)
TP_DATA (34)
WL_OFF# (31)
EN_WOL (30)
BATT_SEL_EC (41)
LID_SW# (34)
R985 0_0402_5%
R985 0_0402_5%
close to EC pin126 for RF request
FRD#SPI_SO (34)
FWR#SPI_SI (34)
1 2
R602 F BMA-10-100505-101T_0402R602 FBMA-10-100505-101T_0402
FSEL#SPICS# (34)
VGA_VARIBL (14,21)
UMA_VARIBL (11,21)
FSTCHG (41)
CHARGE_LED0# (35)
CAPS_LED# (35)
CHARGE_LED1# (35)
PWR_LED_SC# (35)
SYSON (31,38,43)
VR_ON (47)
ACIN (15,25,39)
EC_RSMRST# (24)
EC_LID_OUT# (24)
EC_ON (35)
CMOS_OFF# (32)
BKOFF# (21)
BT_OFF# (31)
VLDT_EN (38,44,45,46)
ENBKL (11)
EAPD (36)
EC_THERM# (25)
SUSP# (18,31,38,41,44,46)
PBTN_OUT# (24)
VGA@
VGA@
1 2
1
2
+3VALW
1
C739
C739
10P_0402_50V8J
10P_0402_50V8J
2
D8
D8
1 2
R609 0_0402_5%R609 0_0402_5%
VGA_ENBKL (15)
G3 state ICH_POK
D6 CH751H-40PT_SOD323-2@D6 CH751H-40PT_SOD323-2@
VGATE
D7 CH751H-40PT_SOD323-2@D7 CH751H-40PT_SOD323-2@
05/25
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SB_PWRGD
21
21
2009/04/23 2009/05
2009/04/23 2009/05
2009/04/23 2009/05
SB_PWRGD (6,11,24)
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C733C733
0.1U_0402_16V4Z0.1U_0402_16V4Z
12
R594
R594
10K_0402_5%
10K_0402_5%
05/25
SPI_CLK
RB751V_SOD323
RB751V_SOD323
21
@
@
1
C732C732
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
L19 FCM1608CF-121T03_2PL19 FCM1608CF-121T03_2P
L20 FCM1608CF-121T03_2PL20 FCM1608CF-121T03_2P
USB_ON# (32)
SPI_CLK (34)
SB_PWRGD
Ver02 :change from 4.7K to 2.2K
SUSP#
1
C730C730
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
1 2
1 2
BATT_OVP
BATT_TEMP
ACIN
@
@
R599 2.2K_0402_5%
R599 2.2K_0402_5%
1 2
R994 0_0402_5%
R994 0_0402_5%
@
@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
1
C734
C734
1000P_0402_25V8J
1000P_0402_25V8J
2
2
C728
C728
0.1U_0402_16V4Z
0.1U_0402_16V4Z
ECAGND
SB_PWRGD (6,11,24)
+3VS
1
2
BIOS & EC I/O Port
BIOS & EC I/O Port
BIOS & EC I/O Port
1
1 2
C737 100P _0402_50V8JC737 100P_0402_50V8J
1 2
C738 100P _0402_50V8JC738 100P_0402_50V8J
1 2
C736 100P _0402_50V8JC736 100P_0402_50V8J
2
G
G
C1030
C1030
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
+3VS
1 2
13
D
D
S
S
+EC_AVCC+3VALW
R993
R993
0_0402_5%
0_0402_5%
@
@
Q62
Q62
2N7002_SOT23
2N7002_SOT23
@
@
R995
R995
0_0402_5%
0_0402_5%
@
@
1 2
33 49Thursday, December 10, 2009
33 49Thursday, December 10, 2009
33 49Thursday, December 10, 2009
1
C735
C735
1000P_0402_25V8J
1000P_0402_25V8J
2
VR_ON
1.0
1.0
1.0
BIOS(SYS / EC / VGA)
U52
FSEL#SPICS#
FRD#SPI_SO
+3VALW
FSEL#SPICS#(33)
+3VALW
FRD#SPI_SO(33)
R207 4.7K_0402_5%R207 4.7K_0402_5%
1 2
FSEL#SPICS#
SPI_WP#
U52
1
CS#
2
DO
3
WP#
GND
MX25L2005CMI-12G SOP
MX25L2005CMI-12G SOP
@
@
C512 0.1U_0402_16V4ZC 512 0.1U_0402_16V4Z
1 2
+SPI_VCC
U38
U38
1
CS#
2
SO
3
WP#
4
GND
MX25L1605AM2C-12G_SO8
MX25L1605AM2C-12G_SO8
VCC
HOLD#
VCC
HOLD#
SCLK
CLK
DIO
SI
8
7
6
54
8
7
6
5
SPI_HOLD#
SPI_CLK_R
SPI_HOLD#
SPI_CLK_RSPI_WP#
FWR#SPI_SI
12
R206
R206
22_0402_5%
22_0402_5%
@
@
C524
C524
33P_0402_50V8K
33P_0402_50V8K
@
@
12
1 2
R208 0_0402_5%R208 0_0402_5%
R2044.7K_0402_5% R2044.7K_0402_5%
SPI_CLK (33)
FWR#SPI_SI (33)
INT_KBD Conn.
JP26
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
JP26
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
GND2
GND1
E-T_6905-E24N-01R
E-T_6905-E24N-01R
ME@
ME@
KSI[0..7]
KSO[0..15]
26
25
KSI[0..7] (33)
KSO[0..15] (33)
+3VALW
KILL_SW#(33)
+5VS
11mA
TP_CLK(33)
TP_DATA(33)
+5VS
2
1
SW3
SW3
EVQPLHA15_4P
EVQPLHA15_4P
TP_DATA
TP_CLK
C559
C559
0.1U_0402_16V4Z
0.1U_0402_16V4Z
TP_CLK
5
6
4
3
Kill Switch
12
R18 100K_0402_5%R18 100K_0402_5%
KILL_SW#
TP_CLK
TP_DATA
SW/L
SW/R
C560 100P_0402_50V8J@C560 100P_0402_50V8J@
C558 100P_0402_50V8J@C558 100P_0402_50V8J@
2
3
1
SW/RSW/L
SW4
SW4
3
2
1
1BS003-1211L_3P
1BS003-1211L_3P
JP27
JP27
1
1
2
2
3
3
4
4
5
5
6
6
7
GND
8
GND
ACES_85201-06051
ACES_85201-06051
ME@
ME@
1 2
1 2
TP_DATA
D40
D40
PJDLC05_SOT23-3
PJDLC05_SOT23-3
@
@
2
1
SW2
SW2
EVQPLHA15_4P
EVQPLHA15_4P
3
2
1
5
6
4
3
KSO15
C448 100P_0402_50V8J
C448 100P_0402_50V8J
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
1 2
C447 100P_0402_50V8J
C447 100P_0402_50V8J
1 2
C446 100P_0402_50V8J
C446 100P_0402_50V8J
1 2
C445 100P_0402_50V8J
C445 100P_0402_50V8J
1 2
C451 100P_0402_50V8J
C451 100P_0402_50V8J
1 2
C444 100P_0402_50V8J
C444 100P_0402_50V8J
1 2
C443 100P_0402_50V8J
C443 100P_0402_50V8J
1 2
C452 100P_0402_50V8J
C452 100P_0402_50V8J
1 2
C453 100P_0402_50V8J
C453 100P_0402_50V8J
1 2
C442 100P_0402_50V8J
C442 100P_0402_50V8J
1 2
C454 100P_0402_50V8J
C454 100P_0402_50V8J
1 2
C441 100P_0402_50V8J
C441 100P_0402_50V8J
1 2
KSO7
C440 100P_0402_50V8J
C440 100P_0402_50V8J
1 2
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
@
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7
@
C907 100P_0402_50V8J
C907 100P_0402_50V8J
1 2
@
@
C905 100P_0402_50V8J
C905 100P_0402_50V8J
1 2
@
@
C906 100P_0402_50V8J
C906 100P_0402_50V8J
1 2
@
@
C903 100P_0402_50V8J
C903 100P_0402_50V8J
1 2
@
@
C455 100P_0402_50V8J
C455 100P_0402_50V8J
1 2
@
@
C904 100P_0402_50V8J
C904 100P_0402_50V8J
1 2
@
@
C902 100P_0402_50V8J
C902 100P_0402_50V8J
1 2
@
@
C901 100P_0402_50V8J
C901 100P_0402_50V8J
1 2
@
@
C456 100P_0402_50V8J
C456 100P_0402_50V8J
1 2
@
@
C457 100P_0402_50V8J
C457 100P_0402_50V8J
1 2
@
@
C458 100P_0402_50V8J
C458 100P_0402_50V8J
1 2
@
@
+3VALW
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1 2
R317 0_0402_5%R317 0_0402_5%
C561
C561
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Lid Switch
+VCC_LID
1
2
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
R318 100K_0402_5%R318 100K_0402_5%
1 2
2
A3212ELHLT-T_SOT23W-3
A3212ELHLT-T_SOT23W-3
VDD
3
OUTPUT
GND
U39
U39
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
BIOS, I/O Port & K/B Connector
BIOS, I/O Port & K/B Connector
BIOS, I/O Port & K/B Connector
LA-5972P
LA-5972P
LA-5972P
2
C562
C562
10P_0402_50V8J
10P_0402_50V8J
1
34 49Thursday, December 10, 2009
34 49Thursday, December 10, 2009
34 49Thursday, December 10, 2009
LID_SW# (33)
1.0
1.0
1.0
A
B
C
D
E
Power Button
ON/OFF switch
TOP Side
1 1
J5 JOPEN@J5 JOPEN@
J6 JOPEN@J6 JOPEN@
12
12
Bottom Side
ON/OFFBTN#
+3VALW
D3
D3
2
1
DAN202UT106_SC70-3
DAN202UT106_SC70-3
3
R8
R8
100K_0402_5%
100K_0402_5%
1 2
ON/OFF# (33)
51_ON# (39)
D10
ON/OFFBTN#
NOVO_BTN# ON/OFFBTN#
D10
2
1
3
PJSOT24C_SOT23-3
PJSOT24C_SOT23-3
@
@
CAPS_LED#(33)
NUM_LED#(33)
+5VS
R14
R14
0_0603_5%
0_0603_5%
1 2
Name change at 8/12
2
C897
C897
1000P_0402_25V8J
1000P_0402_25V8J
1
@
@
13
D
EC_ON(33)
2 2
EC_ON
R6
R6
10K_0402_5%
10K_0402_5%
1 2
2
G
G
D
Q1
Q1
2N7002_SOT23
2N7002_SOT23
S
S
12
D1
D1
RLZ20A_LL34
RLZ20A_LL34
@
@
Switch Board Conn.
NOVO_BTN#
CAPS_LED#
NUM_LED#
done
ON/OFFBTN#
NOVO_BTN#
remove C585 at 8/12
ME@
ME@
ACES_85201-06051
ACES_85201-06051
8
GND
7
GND
6
6
5
5
4
4
3
3
2
2
1
1
JP33
JP33
1
C584
C584
2
@
@
0.1U_0402_25V6
0.1U_0402_25V6
@
@
2
C589
C589
1
0.1U_0402_25V6
0.1U_0402_25V6
+3VALW
LED Green
LED2
LED2
2 1
19-213A-T1D-CP2Q2HY-3T_WHITE
19-213A-T1D-CP2Q2HY-3T_WHITE
LED3
LED3
2 1
19-213A-T1D-CP2Q2HY-3T_WHITE
19-213A-T1D-CP2Q2HY-3T_WHITE
LED4
LED4
2 1
LED5
LED5
19-213A-T1D-CP2Q2HY-3T_WHITE
19-213A-T1D-CP2Q2HY-3T_WHITE
2 1
19-213A-T1D-CP2Q2HY-3T_WHITE
19-213A-T1D-CP2Q2HY-3T_WHITE
LED6
LED6
12
S LED 19-217/S2C-FM2P1VY/3T 0603 ORANGE
S LED 19-217/S2C-FM2P1VY/3T 0603 ORANGE
D
BT@
BT@
1 2
R24 0_0402_5%
R24 0_0402_5%
1 2
R25 0_0402_5%WLAN@R25 0_0402_5%WLAN@
Blu e
CHARGE_LED0#
7.3mA
Amb er
CHARGE_LED1#
BT_LED# (31)
WLAN_LED# (31)
SATA_LED# (25)
PWR_LED_SC# (33)
CHARGE_LED0# (33)
CHARGE_LED1# (33)
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Power BTN/LED
Power BTN/LED
Power BTN/LED
LA-5972P
LA-5972P
LA-5972P
E
35 49Thursday, December 10, 2009
35 49Thursday, December 10, 2009
35 49Thursday, December 10, 2009
1.0
1.0
1.0
+3VALW
+5VS+5VALW
1 2
R249 300_0402_5%R249 300_0402_5%
1 2
R244 432_0402_1%R244 432_0402_1%
1 2
R246 432_0402_1%R246 432_0402_1%
1 2
R247 432_0402_1%R247 432_0402_1%
R245
R245
1 2
499_0402_1%499_0402_1%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
R265
R265
100K_0402_5%
100K_0402_5%
NOVO#(33)
51_ON#(39)
3 3
4 4
A
NOVO#
51_ON#
1 2
D41
D41
2
3
DAN202UT106_SC70-3
DAN202UT106_SC70-3
1
NOVO_BTN#
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
A
CX20671
High Definition Audio Codec SoC
With Integrated Class-D Stereo
Amplifier.
An integrated 5 V to 3.3 V Low-dropout
voltage regulator (LDO).
An integrated 3.3 V to 1.8V Low-dropout
voltage regulator (LDO).
1 1
2 2
J8
2
JUMP_43X118@J8JUMP_43X118@
C282
C282
1 2
0_0402_5%0_0402_5%
C290
C290
1 2
0_0402_5%0_0402_5%
C283
C283
1 2
0_0402_5%0_0402_5%
C278
C278
1 2
0_0402_5%0_0402_5%
R126
R126
1 2
R124
R124
1 2
R123
R123
3 3
1 2
GND GNDA
+3VS
To suuport W ake-on-Jack or Wake-on-Ring, the CODEC
VAUX_3.3 & VDD_IO pins must be powerd by a rail that
is not removed unless AC power i s removed.
*DSH page42 has more detail.
+3VS
112
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
WM-64PCY_2P
WM-64PCY_2P
PC Beep
EC Beep
BEEP#(33)
4 4
0.1U_0402_16V4Z@
0.1U_0402_16V4Z@
SB_SPKR(24)
ICH Beep
C285
C285
C699
C699
1
1U_0603_10V4Z
1U_0603_10V4Z
2
1U_0603_10V4Z
1U_0603_10V4Z
A
C703
C703
12
1 2
560_0402_5%
560_0402_5%
R487
R487
12
1 2
560_0402_5%
560_0402_5%
10K_0402_5%
10K_0402_5%
R488
R488
R307
R307
2
B
B
12
B
12
R1550_0402_5% R1550_0402_5%
12
R1330_0402_5% R1330_0402_5%
HDA_RST_AUDIO#(24)
HDA_BITCLK_AUDIO(24)
HDA_SYNC_AUDIO(24)
HDA_SDOUT_AUDIO(24)
EAPD active low
0=power down ex AMP
1=power up ex AMP
EC_MUTE#(33)
R343
R343
4.7K_0402_5%
4.7K_0402_5%
MIC1
MIC1
1
GNDA
2
45@
45@
+3VS
12
R212
R212
10K_0402_1%
10K_0402_1%
C698
C698
12
12
1U_0603_10V4Z
1U_0603_10V4Z
R214
R214
10K_0402_1%
10K_0402_1%
1 2
R324 20K_0402_5%R324 20K_0402_5%
1
C
C
Q4
Q4
2SC2411KT146_SOT23-3
2SC2411KT146_SOT23-3
E
E
3
D5
@D5
@
RB751V_SOD323
RB751V_SOD323
2 1
B
+3VS
60mA
+VAUX_3.3
1
1
C291C291
C392C392
2
2
10U_0805_10V4Z10U_0805_10V4Z
1
1
C294C294
C700C700
2
2
1U_0603_10V4Z1U_0603_10V4Z
HDA_SDIN0(24)
EAPD(33)
+MICBIASB
EC_MUTE#
Internal SPEAKER
12
C704 2.2U_0603_10V7KC704 2.2U_0603_10V7K
1 2
C706 2.2U_0603_10V7K
C706 2.2U_0603_10V7K
1 2
@
@
C697 1U_0603_10V4ZC697 1U_0603_10V4Z
R325
R325
20K_0402_5%
20K_0402_5%
@
@
1 2
1
C399C399
C288C288
2
10U_0805_10V4Z10U_0805_10V4Z
0.1U_0402_16V4Z0.1U_0402_16V4Z
10K only needed if supply to VAUX_3.3
is removed during system re- start.
12
0.1U_0402_16V4Z0.1U_0402_16V4Z
R291
R291
HDA_RST_AUDIO#
HDA_BITCLK_AUDIO
HDA_SYNC_CODEC
R336 33_0402_5%R336 33_0402_5%
1 2
HDA_SDOUT_CODEC
PC_BEEP
1 2
SPK_L2+
SPK_L1-
SPK_R2+
SPK_R1-
12
1
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
1
C398C398
2
10K_0402_5%
10K_0402_5%
12
MIC_INR
MIC_INL
PC_BEEPPC_BEEP1
C
1
C279C279
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
1
C809C809
2
10U_0805_10V4Z10U_0805_10V4Z
0.1U_0402_16V4Z0.1U_0402_16V4Z
9
5
8
6
4
10
R1220_0402_5% R1220_0402_5%
38
37
R170_0402_5% R170_0402_5%
40
1
11
13
16
14
0_0603_5%0_0603_5%
1 2
1
C702C702
2
1U_0603_10V4Z1U_0603_10V4Z
3
U8
U8
RESET#
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
PC_BEEP
GPIO0/EAPD#
GPIO1/SPK_MUTE#
DMIC_CLK
DMIC_1/2
LEFT+
LEFT-
RIGHT+
RIGHT-
GND
41
R981
R981
1
C289C289
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
7
2
18
VDD_IO
FILT_1.8
VAUX_3.3
DVDD_3.3
29
FILT_1.65
CX20671-11Z_QFN40_6X6
CX20671-11Z_QFN40_6X6
Audio Jack
C
C395C395
27
28
26
AVDD_5V
AVDD_3.3
1
C281C281
2
10U_0805_10V4Z10U_0805_10V4Z
30mA
LPWR_5.0
RPWR_5.0
AVDD_HP
CLASS-D_REF
SENSE_A
PORTB_R
PORTB_L
B_BIAS
C_BIAS
PORTC_R
PORTC_L
PORTA_R
PORTA_L
AVEE
FLY_P
FLY_N
D
+LDO_OUT_3.3V
AVDD_3.3 pinis output of
1
internal LDO. NOT connect
to external supply.
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
1
C394C394
2
10U_0805_10V4Z10U_0805_10V4Z
2.5A
12
15
17
36
35
34
33
32
31
30
23
22
24
NC
25
NC
39
NC
21
19
20
C701 1U_0603_10V4ZC701 1U_0603_10V4Z
D
1
C293C293
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
C292C292
+MICBIASB
+MICBIASC
C707 2. 2U_0603_10V7KC 707 2.2U_0603_10V7K
C705 2. 2U_0603_10V7KC 705 2.2U_0603_10V7K
R919 15_0402_5%R919 15_0402_5%
R920 15_0402_5%R920 15_0402_5%
add at 8/12
1 2
+5VS
C284C284
1
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
1 2
1 2
1 2
1 2
E
Layout Note:Path from +5VS to LPWR_5.0
RPWR_5.0 must be very low
resistance (<0.01 ohms)
1
1
1
C280C280
2
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
1
C397C397
2
0.1U_0402_16V4Z0.1U_0402_16V4Z
2
C396C396
2
1
C1034C1034
10U_0805_10V4Z10U_0805_10V4Z
10U_0805_10V4Z10U_0805_10V4Z
Please bypass caps very close to device.
R484 5.11K_0402_1%R484 5.11K_0402_1%
1 2
R213 10K_0402_1%R213 10K_0402_1%
1 2
R338 39.2K_0402_1%R338 39.2K_0402_1%
MIC_INR
MIC_INL
Internal MIC
1 2
R321 2.2K_0402_5%R321 2.2K_0402_5%
R322 2.2K_0402_5%R322 2.2K_0402_5%
HP_OUTR
HP_OUTL
EMI
2
1
C1035C1035
1000P_0402_25V8J1000P_0402_25V8J
R161 100_0402_1%R161 100_0402_1%
R162 100_0402_1%R162 100_0402_1%
R15
R15
1 2
0_0603_5%
0_0603_5%
2200P_0402_50V7K2200P_0402_50V7K
F
+5VS
MIC_JD
PLUG_IN
+MICBIASC
EXT_MIC_R
EXT_MIC_L
+VAUX_3.3
1
C802
C802
2
@
@
22P_0402_50V8J
22P_0402_50V8J
Port C
Port A
Headphone
wide 20MIL
SPK_R1-
1
1
C393C393
C286C286
2
2
10U_0805_10V4Z10U_0805_10V4Z
0.1U_0402_16V4Z0.1U_0402_16V4Z
R316
@ R316
@
1K_0402_5%
1K_0402_5%
HP_OUTL
HP_OUTR
PLUG_IN
EXT_MIC_L
EXT_MIC_R
MIC_JD
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
E
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered D ate
Deciphered D ate
Deciphered D ate
SPK_R2+
SPK_L1- SPK_L1-_CONN
SPK_L2+
12
12
R319
@ R319
@
1K_0402_5%
1K_0402_5%
GNDA
GNDA
SM010022410
SM010022410
1 2
R584 FBMA-L10-160808-121LMT
R584 FBMA-L10-160808-121LMT
SM010022410
SM010022410
1 2
R586 FBMA-L10-160808-121LMT
R586 FBMA-L10-160808-121LMT
SM010022410
SM010022410
1 2
R583 FBMA-L10-160808-121LMT
R583 FBMA-L10-160808-121LMT
1
C826
C826
47P_0402_50V8J
47P_0402_50V8J
2
GNDA
SM010022410
SM010022410
1 2
R585 FBMA-L10-160808-121LMT
R585 FBMA-L10-160808-121LMT
1
C807
C807
47P_0402_50V8J
47P_0402_50V8J
2
GNDA
F
G
HDA_RST_AUDIO#
HDA_SYNC_CODEC
HDA_SDOUT_CODEC
1
1
C801
C801
C804
C804
2
2
@
@
@
@
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
Sense resistors must be
connected same power
that is used for VAUX_3.3
1 2
1
C803
C803
2
@
@
22P_0402_50V8J
22P_0402_50V8J
R1210_0402_5% @ R1210_0402_5% @
SPK_R1-_CONN
SPK_R2+_CONN
SPK_L1-_CONN
SPK_L2+_CONN
External MIC
L37 FBMA-L11-160808-121LMA30TL37 FBMA-L11-160808-121LMA30T
1 2
L35 FBMA-L11-160808-121LMA30TL35 FBMA-L11-160808-121LMA30T
1 2
L36 FBMA-L11-160808-121LMA30TL36 FBMA-L11-160808-121LMA30T
1 2
L34 FBMA-L11-160808-121LMA30TL34 FBMA-L11-160808-121LMA30T
1 2
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
1
C319
@C319
@
10P_0402_50V8J
10P_0402_50V8J
2
GNDA
EXT_MIC_R-2
1
C321
C321
10P_0402_50V8J
10P_0402_50V8J
2
GNDA
@
@
PL-OUT
PR-OUT
GNDA
220P_0402_50V7K
C799
C800
C800
1 2
@
@
1 2
1
C32010P_0402_50V8J@C32010P_0402_50V8J
@
2
GNDA
C799
1 2
R1007
R1007
0_0402_5%
0_0402_5%
EXT_MIC_L-2
GNDA
Title
Title
Title
HD Audio Codec ALC888S-VC
HD Audio Codec ALC888S-VC
HD Audio Codec ALC888S-VC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
G
H
EMI
HDA_BITCLK_AUDIO
2
2
2
1
1
C1036C1036
ACES_85204-0400N
ACES_85204-0400N
SPK_R1-_CONN
SPK_R2+_CONN
SPK_L2+_CONN
1
C1037C1037
C1038C1038
1000P_0402_25V8J1000P_0402_25V8J
1000P_0402_25V8J1000P_0402_25V8J
4
4
3
3
2
2
1
1
JSPK1
JSPK1
ME@
ME@
Headphone
JHP1
JHP1
1
2
6
3
4
5
FOX_JA6333L-B3S0-7F
FOX_JA6333L-B3S0-7F
ME@
ME@
Audio Jack
MIC IN
JMIC1
JMIC1
1
2
6
3
4
5
FOX_JA6333L-B3S0-7F
FOX_JA6333L-B3S0-7F
ME@
ME@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LA-5972P
LA-5972P
LA-5972P
36 49Thursday, December 10, 2009
36 49Thursday, December 10, 2009
36 49Thursday, December 10, 2009
H
C1039C1039
1000P_0402_25V8J1000P_0402_25V8J
EMI
2
1
1000P_0402_25V8J1000P_0402_25V8J
1.0
1.0
1.0
FAN1 Conn
+5VS
+VCC_FAN1
EN_FAN1(33)
R62 1K_0402_5%R62 1K_0402_5%
12
1
2
U31
U31
1
2
3
4
APL5605KI-TRL SOP 8P
APL5605KI-TRL SOP 8P
C350
C350
0.1U_0402_16V4Z
0.1U_0402_16V4Z
FAN_SPEED1(33)
C908 10U_0805_10V4ZC908 10U_0805_10V4Z
1 2
GND
GND
GND
GND
8
7
6
5
+3VS
12
1
2
VEN
VIN
VO
VSET
R450
R450
10K_0402_5%
10K_0402_5%
C670
C670
1000P_0402_25V8J
1000P_0402_25V8J
40mil
+VCC_FAN1
+5VS
12
D11
D11
1SS355_SOD323-2
1SS355_SOD323-2
@
@
1 2
@
@
10U_0805_10V4Z
10U_0805_10V4Z
1000P_0402_25V8J
1000P_0402_25V8J
D12
D12
BAS16_SOT23-3
BAS16_SOT23-3
C121
C121
1 2
C119
C119
1 2
ACES_85205-03001
ACES_85205-03001
ME@
ME@
JP13
JP13
H10
H10
H22
H21
H21
H_3P0
1
2
3
H_3P0
1
@
@
H7
H7
H_4P2
H_4P2
1
@
@
H20
H20
H_3P0
H_3P0
@
@
FD2
FD2
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
@
@
H14
H14
H_4P2
H_4P2
1
@
@
H12
H12
H_3P0
H_3P0
1
@
@
FIDUCIAL_C40M80
FIDUCIAL_C40M80
H_3P0
H_3P0
1
H22
H_3P3
H_3P3
1
1
@
@
@
@
H9
H9
H13
H13
H_4P2
H_4P2
H_4P2
H_4P2
1
1
@
@
@
@
H4
H4
H3
H3
H_3P0
H_3P0
H_3P0
H_3P0
1
1
@
@
@
@
FD3
FD3
1
FIDUCIAL_C40M80
FIDUCIAL_C40M80
@
@
H29
H29
H_3p2
H_3p2
1
@
@
H2
H2
H_3P0
H_3P0
1
@
@
H18
H18
H_3P6X6P1N
H_3P6X6P1N
1
@
@
FD1
FD1
1
@
@
H_3P2
H_3P2
H15
H15
H_2P8
H_2P8
@
@
H23
H23
1
@
@
H1
H1
H_3P0
H_3P0
1
@
@
FIDUCIAL_C40M80
FIDUCIAL_C40M80
H5
H5
H_3P0
H_3P0
1
@
@
H24
H24
H25
H16
H16
H17
H17
H_3P6N
H_3P6N
H_3P0
H_3P0
1
1
1
@
@
@
@
FD4
FD4
1
@
@
H_1p4x0p5
H_1p4x0p5
1
@
@
H25
H_1p4x0p5
H_1p4x0p5
1
@
@
H26
H26
H_1p4x0p5
H_1p4x0p5
1
@
@
H27
H27
H_1p4x0p5
H_1p4x0p5
1
@
@
H28
H28
H_1p4x0p5
H_1p4x0p5
1
@
@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Screw Hole
FAN & Screw Hole
FAN & Screw Hole
LA-5972P
LA-5972P
LA-5972P
37 49Thursday, December 10, 2009
37 49Thursday, December 10, 2009
37 49Thursday, December 10, 2009
1.0
1.0
1.0
A
+5VALW TO +5VS
+5VALW
1
1
C570
C570
C571
C571
10U_0805_10V4Z
1 1
B+
10U_0805_10V4Z
R239
R239
49.9K_0402_1%
49.9K_0402_1%
SUSP
2N7002_SOT23
2N7002_SOT23
2
12
Q29
Q29
2
10U_0805_10V4Z
10U_0805_10V4Z
5VS_GATE
13
D
D
2
G
G
S
S
U34
U34
8
D
7
D
6
D
5
D
SI4800BDY_SO8
SI4800BDY_SO8
0_0402_5%
0_0402_5%
R943
R943
S
S
S
G
4.305A
1
2
3
4
12
+5VS
1
C576
C576
10U_0805_10V4Z
10U_0805_10V4Z
2
1
C577
C577
0.1U_0603_25V7K
0.1U_0603_25V7K
2
1
C573
C573
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Q28
Q28
2N7002_SOT23
2N7002_SOT23
@
@
+3VALW TO +3VS
+3VALW +3VS
2 2
B+
1
C575
C575
10U_0805_10V4Z
10U_0805_10V4Z
2
R982
R982
100K_0402_5%
100K_0402_5%
SUSP
2N7002_SOT23
2N7002_SOT23
C574
C574
10U_0805_10V4Z
10U_0805_10V4Z
12
2
G
G
Q61
Q61
1
2
3VS_GATE
13
D
D
S
S
U33
U33
8
D
7
D
6
D
5
D
SI4800BDY_SO8
SI4800BDY_SO8
4.121A
S
S
S
G
1
2
3
4
1
C572
C572
10U_0805_10V4Z
10U_0805_10V4Z
2
1
C1024
C1024
0.1U_0603_25V7K
0.1U_0603_25V7K
2
1
C569
C569
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Q27
Q27
2N7002_SOT23
2N7002_SOT23
@
@
1 2
13
D
D
S
S
R243
R243
@
@
1 2
13
D
D
S
S
B
R238
R238
470_0603_5%
470_0603_5%
@
@
2
G
G
1
2
add at 8/12
470_0603_5%
470_0603_5%
SUSP
2
G
G
R921
R921
0_0402_5%
0_0402_5%
@
@
C1020C1020
@
@
0.1U_0603_25V7K0.1U_0603_25V7K
C
D
E
+5VALW
+1.2VALW TO +1.2V_HT
R169
2
G
G
2
G
G
2
G
G
1 2
13
+5VALW
1 2
13
+5VALW
1 2
13
R169
100K_0402_5%
100K_0402_5%
D
D
Q21
Q21
2N7002_SOT23
2N7002_SOT23
S
S
R242
R242
100K_0402_5%
100K_0402_5%
D
D
Q30
Q30
2N7002_SOT23
2N7002_SOT23
S
S
R167
R167
100K_0402_5%
100K_0402_5%
D
D
Q3
Q3
2N7002_SOT23
2N7002_SOT23
S
S
+1.2VALW
DVT
12
1
C509
C509
R202
R202
1K_0402_5%
1K_0402_5%
SUSP
12
B+
10U_0805_10V4Z
10U_0805_10V4Z
R196
R196
200K_0402_5%
200K_0402_5%
VLDT_EN#
2N7002_SOT23
2N7002_SOT23
2
12
2
G
Q23
G
Q23
U37
U37
8
D
7
D
6
D
5
D
SI4800BDY_SO8
SI4800BDY_SO8
1.2VS_GATE
13
D
D
S
S
S
S
S
G
3.265A
1
2
3
4
1
2
+1.2V_HT
1
C470
C470
10U_0805_10V4Z
10U_0805_10V4Z
2
C506
C506
0.1U_0603_25V7K
0.1U_0603_25V7K
1
C462
C462
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
D
D
S
S
1 2
13
R197
R197
470_0603_5%
470_0603_5%
@
@
VLDT_EN#
2
G
G
Q22
Q22
2N7002_SOT23
2N7002_SOT23
@
@
SUSP
SUSP#(18,31,33,41,44,46)
SYSON#
SYSON
R174
R174
100K_0402_5%
100K_0402_5%
1 2
C1028 220P_0402_50V7K@C1028 220P_0402_50V7K@
SUSP
R248
R248
10K_0402_5%
10K_0402_5%
@
@
VLDT_EN#
R290
R290
10K_0402_5%
10K_0402_5%
12
@
@
12
12
SYSON#(43)
SYSON(31,33,43)
VLDT_EN#(18)
VLDT_EN(33,44,45,46)
+1.8V to +1.8VS
+1.8V
1
1
C710
C710
C714
3 3
C714
10U_0805_10V4Z
10U_0805_10V4Z
B+
2
10U_0805_10V4Z
10U_0805_10V4Z
R271
R271
150K_0402_5%
150K_0402_5%
SUSP
2
12
2
G
G
U36
U36
8
D
7
D
6
D
5
D
SI4800BDY_SO8
SI4800BDY_SO8
1.8VS_GATE
13
D
D
Q47
Q47
2N7002_SOT23
2N7002_SOT23
S
S
S
S
S
G
6.988A
1
2
3
4
1
2
+1.8VS
1
C712
C712
10U_0805_10V4Z
10U_0805_10V4Z
2
C711
C711
0.1U_0603_25V7K
0.1U_0603_25V7K
1
C709
C709
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
D
D
S
S
1 2
13
R570
R570
470_0603_5%
470_0603_5%
@
@
SUSP
2
G
G
Q46
Q46
2N7002_SOT23
2N7002_SOT23
@
@
10U_0805_10V4Z
10U_0805_10V4Z
VLDT_EN#
1 2
R924 0_0402_5%
R924 0_0402_5%
SUSP
1 2
R407 20K _0402_5%
R407 20K _0402_5%
@
@
VGA@
VGA@
C565
C565
VGA@
VGA@
B+
0.1U_0402_16V4Z
0.1U_0402_16V4Z
add at 8/13
1
C563
C563
VGA@
VGA@
2
10U_0805_10V4Z
10U_0805_10V4Z
VGA@
VGA@
R154
R154
200K_0402_5%
200K_0402_5%
1.8VS_VGE_EN
C852
C852
VGA@
VGA@
+1.8V
U32
U32
8
S
D
7
S
D
6
S
D
5
1
2
12
2
G
G
1
2
G
D
SI4800BDY_SO8
SI4800BDY_SO8
VGA@
VGA@
1.8VS_VGA_GATE
13
D
D
Q19
Q19
S
S
2N7002_SOT23
2N7002_SOT23
VGA@
VGA@
4.556A
1
2
3
4
+1.8VS_VGA
1
C367
C367
10U_0805_10V4Z
10U_0805_10V4Z
2
VGA@
VGA@
1
C564
C564
0.1U_0603_25V7K
0.1U_0603_25V7K
2
VGA@
VGA@
1
C368
C368
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VGA@
VGA@
1 2
13
D
D
S
S
R115
R115
470_0603_5%
470_0603_5%
@
@
1.8VS_VGE_EN
2
G
G
Q14
Q14
2N7002_SOT23
2N7002_SOT23
@
@
+1.5VS_UMA +2.5VS +1.8V+0.9V
4 4
R241
R241
470_0603_5%
470_0603_5%
@
@
1 2
13
D
D
SUSP SUSP SYSON# SYSON#
2
G
G
Q26
Q26
S
S
2N7002_SOT23
2N7002_SOT23
@
@
R153
R153
470_0603_5%
470_0603_5%
@
@
1 2
13
D
D
S
S
2
G
G
Q18
Q18
2N7002_SOT23
2N7002_SOT23
@
@
A
R112
R112
470_0603_5%
470_0603_5%
@
@
1 2
13
D
D
S
S
2
G
G
Q11
Q11
2N7002_SOT23
2N7002_SOT23
@
@
R113
R113
470_0603_5%
470_0603_5%
@
@
1 2
13
D
D
S
S
2
G
G
Q12
Q12
2N7002_SOT23
2N7002_SOT23
@
@
+VGA_PCIE
R925
R925
470_0603_5%
470_0603_5%
@
@
1 2
13
D
D
S
S
B
1 2
R926 0_0402_5%
R926 0_0402_5%
2
1 2
G
G
R927 0_0402_5%@R927 0_0402_5%@
Q60
Q60
2N7002_SOT23
2N7002_SOT23
@
@
@
@
VLDT_EN#
add at 8/13
SUSP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
THIS SHEET OF EN GINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, IN C. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DC Interface
DC Interface
DC Interface
LA-5972P
LA-5972P
LA-5972P
E
38 49Thursday, December 10, 2009
38 49Thursday, December 10, 2009
38 49Thursday, December 10, 2009
1.0
1.0
1.0
A
DC030006J00
PF101
APDIN APDIN1
4
4
3
3
1 1
@
@
2
2
1
1
4602-Q04C-09R 4P P2.5
4602-Q04C-09R 4P P2.5
JDCIN
JDCIN
21
12
12
0.1U_0603_25V7K@
0.1U_0603_25V7K@
PC101
PC101
PC102PC102
PF101
7A_24VDC_429007.W RML
7A_24VDC_429007.W RML
12
1000P_0402_50V7K1000P_0402_50V7K
PL101
PL101
SMB3025500YA_2P
SMB3025500YA_2P
1 2
100P_0402_50V8J
100P_0402_50V8J
PC103
PC103
Vin Detector
Min. typ. Max.
B
ACIN
VIN
Precharge detector
Min. typ. Max.
L-->H 14.991V 15.381V 15.782V
H-->L 13.860V 14.247V 14.621V
12
12
12
PC104
PC104
0.1U_0603_25V7K@
0.1U_0603_25V7K@
100P_0402_50V8J
100P_0402_50V8J
PC105
PC105
PC106PC106
1000P_0402_50V7K1000P_0402_50V7K
VIN
PD101
PD101
12
LL4148_LL34-2
LL4148_LL34-2
C
D
BATT ONLY
Precharge detector
Min. typ. Max.
L-->H 7.196V 7.349V 7.505V
H-->L 6.138V 6.214V 6.056V
PR101
PR101
1K_1206_5%
1K_1206_5%
1 2
PR102
PR102
1K_1206_5%
1K_1206_5%
1 2
PR103
PR103
1K_1206_5%
1K_1206_5%
1 2
PR104
PR104
100K_0402_1%
100K_0402_1%
12
PQ101
PQ101
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
12
PR105
PR105
100K_0402_1%
100K_0402_1%
13
2
L-->H 17.430V 17.901V 18.384V
H-->L 16.976V 17.262V 17.728V
2
12
5
+
6
-
12
12
+RTCBATT
+CHGRTC
13
PQ102
PQ102
DTC115EUA_SC70-3
DTC115EUA_SC70-3
PC111PC111
1000P_0402_50V7K1000P_0402_50V7K
PR107
PR107
1M_0402_1%
1M_0402_1%
1 2
VINDE-2
3
+
2
-
PR115
PR115
10K_0402_5%
10K_0402_5%
12
12
PR126
PR126
VS
8
P
O
G
PU101A
PU101A
LM393DG_SO8
LM393DG_SO8
4
12
1 2
12
PC107PC107
0.01U_0402_25V7K0.01U_0402_25V7K
1
LLZ4V3B_LL34-2
LLZ4V3B_LL34-2
RTCVREF
3.3V
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
51ON-2
PC114PC114
0.22U_0603_25V7K0.22U_0603_25V7K
51ON-3
2 2
PC108PC108
3 3
VIN
12
PR108
PR108
84.5K_0402_1%
84.5K_0402_1%
PR111
PR111
22K_0402_1%
12
PR112
PR112
BATT+
51_ON#(35)
22K_0402_1%
1 2
20K_0402_1%
20K_0402_1%
CHGRTCP
VINDE-3
12
PC109PC109
0.1U_0402_16V7K0.1U_0402_16V7K
PD105
PD105
LL4148_LL34-2
LL4148_LL34-2
PR123
PR123
200_0603_5%
200_0603_5%
1 2
100K_0402_1%
100K_0402_1%
PR127
PR127
22K_0402_1%
22K_0402_1%
1 2
VINDE-1
12
0.068U_0603_16V7K0.068U_0603_16V7K
RTCVREF
PU102
4 4
+CHGRTC
A
PR130
PR130
560_0603_5%
560_0603_5%
1 2
3.3V
12
PC116
PC116
10U_0603_6.3V6M
10U_0603_6.3V6M
PU102
G920AT24U_SOT89-3
G920AT24U_SOT89-3
3
OUT
GND
1
IN
2
PD102
PD102
PQ104
PQ104
CHGRTCIN
VIN
1
PR109
PR109
2
2 1
68_1206_5%
68_1206_5%
2
12
PR128
PR128
200_0603_5%
200_0603_5%
12
PC117
PC117
1U_0805_25V4Z
1U_0805_25V4Z
10K_0805_5%
10K_0805_5%
PR121
PR121
13
PR110
PR110
10K_0402_1%
10K_0402_1%
1 2
1
PR114
PR114
10K_0402_5%
10K_0402_5%
2
VIN
PD104
PD104
LL4148_LL34-2
LL4148_LL34-2
1 2
51ON-1
12
12
PC115PC115
0.1U_0603_25V7K0.1U_0603_25V7K
B
PACIN
12
PR122
PR122
68_1206_5%
68_1206_5%
ACOFF(33,41)
ACIN (15,25,33)
PR113
PU101B
PU101B
7
O
PR113
2.2M_0402_5%
2.2M_0402_5%
8
P
G
4
PR124
PR124
10K_0402_5%
10K_0402_5%
PACIN (41)
VL
12
PR117
PD103
PD103
RB715F_SOT323-3
RB715F_SOT323-3
MAINPWON(40,42)
ACON(41)
2
3
PR117
100K_0402_1%
100K_0402_1%
1
LM393DG_SO8
LM393DG_SO8
12
PC113PC113
0.1U_0603_25V7K0.1U_0603_25V7K
RTCVREF
VS
PR129
JRTC
JRTC
- +
MAXEL_ML1220T10@
MAXEL_ML1220T10@
PR129
560_0603_5%
560_0603_5%
1 2
12
PD106
PD106
1 2
RB751V-40_SOD323-2
RB751V-40_SOD323-2
RTC Battery
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
2009/01/06 2010/01/06
2009/01/06 2010/01/06
2009/01/06 2010/01/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
12
PR106
PR106
100K_0402_1%
100K_0402_1%
13
2
12
PR118
PR118
PRG++
PQ105
PQ105
SSM3K7002F_SC59-3
SSM3K7002F_SC59-3
13
D
D
S
S
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: S heet of
Date: S heet of
Date: S heet of
205K_0402_1%
205K_0402_1%
2
G
G
Title
Title
Title
Custom
Custom
Custom
PQ103
PQ103
DTC115EUA_SC70-3
DTC115EUA_SC70-3
PR125
PR125
47K_0402_5%
47K_0402_5%
13
PQ106
PQ106
DTC115EUA_SC70-3
DTC115EUA_SC70-3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DCIN & DETECTOR
DCIN & DETECTOR
DCIN & DETECTOR
B+
12
PR116
PR116
499K_0402_1%
499K_0402_1%
12
12
PR119
PR119
PC112PC112
499K_0402_1%
499K_0402_1%
0.01U_0402_25V7K0.01U_0402_25V7K
12
PACIN (41)
2
D
+5VALW
39 49Thursday, December 10, 2009
39 49Thursday, December 10, 2009
39 49Thursday, December 10, 2009
1.0
1.0
1.0
A
1 1
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 92 degree C
JBATT
VMB2
JBATT
1
1
2
2
EC_SMCA
3
2 2
3 3
3
4
4
5
5
6
6
7
7
8
GND
9
GND
TYCO_1775789-1
TYCO_1775789-1
@
@
EC_SMDA
12
PR204
100_0402_1%
PR204
100_0402_1%
12
PR206
100_0402_1%
PR206
100_0402_1%
1 2
PR209
PR209
6.49K_0402_1%
6.49K_0402_1%
1 2
PR211
PR211
10K_0402_5%
10K_0402_5%
PF201
PF201
12A_65V_451012MRL
12A_65V_451012MRL
21
VMB
12
PC201
PC201
1000P_0402_50V7K
1000P_0402_50V7K
EC_SMB_CK1 (33)
EC_SMB_DA1 (33)
+3VALW
BATT_TEMP (33)
PL201
PL201
SMB3025500YA_2P
SMB3025500YA_2P
1 2
A/D
BATT+
12
PC202PC202
0.01U_0402_25V7K0.01U_0402_25V7K
100K_0402_1%_TSM0B104F4251RZ
100K_0402_1%_TSM0B104F4251RZ
PC206
PC206
Recovery at 56 degree C
VL
12
12
PC207
TM-1
12
0.01U_0402_25V7K@
0.01U_0402_25V7K@
PR205
PR205
13.7K_0402_1%
13.7K_0402_1%
PR207
PR207
15.4K_0402_1%
15.4K_0402_1%
PC207
1 2
PH201
PH201
12
12
PC203PC203
0.01U_0402_25V7K@
0.01U_0402_25V7K@
0.22U_0603_25V7K0.22U_0603_25V7K
TM_REF1
12
PC204PC204
1000P_0402_50V7K1000P_0402_50V7K
12
PC205PC205
0.01U_0402_25V7K0.01U_0402_25V7K
3
+
2
-
PR208
PR208
12
100K_0402_1%
100K_0402_1%
PR210
PR210
100K_0402_1%
100K_0402_1%
VS
8
P
G
4
TM-2
1
O
PU201A
PU201A
LM393DG_SO8
LM393DG_SO8
12
VL
PR203
PR203
47K_0402_1%
47K_0402_1%
1 2
VL
PR202
PR202
47K_0402_1%
47K_0402_1%
1 2
TM-3
5
+
6
-
8
P
O
G
LM393DG_SO8
LM393DG_SO8
4
2
G
G
7
PU201B
PU201B
MAINPWON (39,42)
13
D
D
PQ201
PQ201
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
4 4
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
A
B
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2010/01/062009/01/06
2010/01/062009/01/06
2010/01/062009/01/06
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: S heet of
Date: S heet of
Date: S heet of
Compal Electronics, Inc.
BATTERY CONN / OTP
BATTERY CONN / OTP
BATTERY CONN / OTP
40 49Thursday, December 10, 2009
40 49Thursday, December 10, 2009
D
40 49Thursday, December 10, 2009
1.0
1.0
1.0
5
PQ301
PQ301
FDS6675BZ_SO8
FDS6675BZ_SO8
DTA144EUA_SC70-3
DTA144EUA_SC70-3
13
2
PQ307
PQ307
PACIN
PQ311
PQ311
DTC115EUA_SC70-3
DTC115EUA_SC70-3
ACOFF
8
7
5
PQ304
PQ304
2
1 3
PQ305
PQ305
DTC115EUA_SC70-3
DTC115EUA_SC70-3
PR313
PR313
3K_0402_1%
3K_0402_1%
1 2
2
4
VIN
D D
C C
1
PR301
PR301
47K_0402_5%
47K_0402_5%
2
13
D
D
2
G
G
S
S
PACIN(39)
ACON(39)
ACOFF(33, 39)
2N7002KW_SOT323- 3
2N7002KW_SOT323- 3
P2
12
PR303
PR303
200K_0402_1%
200K_0402_1%
0.1U_0603_25V7K0.1U_0603_25V7K
12
PR309
PR309
150K_0402_1%
150K_0402_1%
PQ310
PQ310
13
D
D
2N7002KW_SOT323- 3
2N7002KW_SOT323- 3
S
S
1
2
3 6
1
2
36
12
PC301PC301
2
G
G
13
IR EF(33)
CHGVADJ=(Vcell-4)/0.10627
Vcell
B B
4V
4.2V
4.35V
CC=0.25A~3A
CHGVADJ
0V
1.882V
3.2935V
UMA CP mode
Vaclim=2.39*(1.4K/(1.4K+13.7K))=0.2376V
Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05)
where Vaclim=0.2376V, Iinput=2.75A
PQ302
PQ302
FDS6675BZ_SO8
FDS6675BZ_SO8
4
FSTCHG(33)
0.01U_0402_25V7K
0.01U_0402_25V7K
ADP_I(33)
PR318
PR318
154K_0402_1%
154K_0402_1%
PR322
PR322
100K_0402_1%
100K_0402_1%
Connect to EC A/D Pin.
IREF=1.016*Icharge
IREF=0.254V~3.048V
VCHLIM need over 95mV
PQ314 TP0610K-T1-E3_SOT23-3PQ314 TP0610K-T1-E3_SOT23-3
P3
A A
PR335
PR335
100K_0402_1%
100K_0402_1%
5
12
DIS CP mode
Vaclim=2.39*(3.9K/(3.9K+16.9K))=0.478V
Iinput=(1/0.015)((0.05*Vaclim)/2.39+0.05)
where Vaclim=0.478V, Iinput=4A
PR333
PR333
10_0603_5%
10_0603_5%
13
1 2
PR337
PR337
2
DTC115EUA_SC70-3
DTC115EUA_SC70-3
100K_0402_1%
100K_0402_1%
PQ315
PQ315
12
13
6251_DCIN
1
2
PD304
PD304
RB715F_SOT323-3
RB715F_SOT323-3
8
7
5
PC314
PC314
1 2
12
12
CHGVADJ(33)
4
P3
1 2
PC315
PC315
100P_0402_50V8J@
100P_0402_50V8J@
12
PC321PC321
0.01U_0402_25V7K0.01U_0402_25V7K
FSTCHG
2
SUSP#
3
4
PR302
PR302
0.15_1206_1%
0.15_1206_1%
1
2
PD301
PD301
RB751V-40TE17_SOD323-2
RB751V-40TE17_SOD323-2
1 2
10K_0402_1%
10K_0402_1%
1 2
0.1U_0402_16V7K
0.1U_0402_16V7K
PC312 6800P_0402_25V7KPC312 6800P_0402_25V7K
1 2
PR314 6.81K_0402_1%PR314 6.81K_0402_1%
1 2
PC316PC316
0.1U_0402_16V7K0.1U_0402_16V7K
6251_VREF
PR306
PR306
PC308
PC308
1 2
16.9K_0402_1%
16.9K_0402_1%
3.9K_0402_1%
3.9K_0402_1%
15.4K_0402_1%
15.4K_0402_1%
1 2
6251_VDD
12
1 2
PR316
PR316
100_0402_1%
100_0402_1%
PR321
PR321
1 2
PR324
PR324
PR325
PR325
31.6K_0402_1%
31.6K_0402_1%
PR307
PR307
VS
PU302B
PU302B
LM358DT_SO8@
LM358DT_SO8@
8
P
+
7
0
-
G
4
FSTCHG (33)
SUSP# (18,31,33,38,44,46)
3
B+
PJ301
PJ301
1
6251_DCIN
1 2
LX_CHG
DH_CHG
BST_CHG
6251_VDDP
DL_CHG
3
2
2
JUMP_43X118@
JUMP_43X118@
PC309
PC309
0.1U_0603_25V7K
0.1U_0603_25V7K
12
PC310PC310
0.047U_0402_16V7K0.047U_0402_16V7K
1 2
20_0402_5%
20_0402_5%
PC313
PC313
0.1U_0402_16V7K
0.1U_0402_16V7K
PR320
PR320
0_0402_5%
0_0402_5%
1 2
12
PR334
PR334
10K_0402_1%@
10K_0402_1%@
1 2
1
CSIN
CSIP
12
PR310
PR310
20_0402_5%
20_0402_5%
1 2
PR311
PR311
12
PR312
PR312
20_0402_5%
20_0402_5%
1 2
PR315
PR315
2.2_0402_5%
2.2_0402_5%
0.1U_0603_25V7K
0.1U_0603_25V7K
BST_CHGA
12
PD303
PD303
RB751V-40TE17_SOD323-2
RB751V-40TE17_SOD323-2
1 2
PC323PC323
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
PR323
PR323
4.7_0402_5%
4.7_0402_5%
4
3
12
PC307
PC307
12
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
6251_EN CSON
100K_0402_1%
100K_0402_1%
CELLS
6251_VREF
12
12
PR326
PR326
12
PC302PC302
470P_0603_50V8J470P_0603_50V8J
PU301
PU301
1
VDD
DCIN
2
ACSET
ACPRN
3
EN
CSON
4
CELLS
CSOP
5
ICOMP
CSIN
6
VCOMP
CSIP
7
PHASE
ICM
8
UGATE
VREF
9
CHLIM
BOOT
10
ACLIM
VDDP
11
VADJ
LGATE
12
PGND
GND
ISL6251AHAZ-T_QSOP24
ISL6251AHAZ-T_QSOP24
24
23
22
21
20
19
18
17
16
15
14
13
LI-3S :13.5V----BATT-OVP=1.5012V
BATT-OVP=0.1112*VMB
Per cell=3.5V
5
6
BATT_OVP(33)
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
1 2
PC306PC306
4.7U_1206_25V6K4.7U_1206_25V6K
CSOP
PC317
PC317
12
6251_VDD
PU302A
PU302A
LM358DT_SO8@
LM358DT_SO8@
Compal Secret Data
Compal Secret Data
Compal Secret Data
8
P
1
0
G
4
Deciphered Date
Deciphered Date
Deciphered Date
1 2
+
-
1 2
PC303PC303
4.7U_1206_25V6K4.7U_1206_25V6K
VS
12
3
2
PC304PC304
2
1 2
4.7U_1206_25V6K4.7U_1206_25V6K
CHG_B+
PC305PC305
2200P_0402_50V7K2200P_0402_50V7K
DTC115EUA_SC70-3
DTC115EUA_SC70-3
3 5
241
3 5
241
PR305
PR305
10K_0402_1%
10K_0402_1%
1 2
13
PQ306
PQ306
PQ308
PQ308
PL301
PL301
10U_LF919AS-100M-P3_4.5A_20%
10U_LF919AS-100M-P3_4.5A_20%
SIS412DN-T1-GE3_PAK1212-8
SIS412DN-T1-GE3_PAK1212-8
1 2
12
PR319
PR319
4.7_1206_5%@
PQ312
PQ312
4.7_1206_5%@
12
PC322
PC322
SI7716ADN-T1-GE3 _PAK1212-8
SI7716ADN-T1-GE3 _PAK1212-8
680P_0603_50V7K@
680P_0603_50V7K@
PQ303
PQ303
FDS6675BZ_SO8
FDS6675BZ_SO8
1
2
3 6
4
PR304
PR304
47K_0402_1%
47K_0402_1%
1 2
1
PD302
PD302
RB715F_SOT323-3
RB715F_SOT323-3
2
PR317
PR317
0.02_1206_1%
0.02_1206_1%
CCC HHH GGG
1
2
6251_VDD 6251_VDD
PC311PC311
8
7
5
3
2
0.1U_0603_25V7K0.1U_0603_25V7K
VIN
12
ACOFF
4
3
200K_0402_1%
200K_0402_1%
D
D
S
S
1
PR308
PR308
1 2
13
PACIN
2
G
G
PQ309
PQ309
2N7002KW_SOT323- 3
2N7002KW_SOT323- 3
12
PC318PC318
PC319PC319
10U_1206_25V6M10U_1206_25V6M
10U_1206_25V6M10U_1206_25V6M
VIN
BATT+
12
12
PC320PC320
10U_1206_25V6M10U_1206_25V6M
VMB2
PR327
12
PR329
PR329
340K_0402_1%@
340K_0402_1%@
12
PC324
PC324
PR332
PR332
499K_0402_1%@
499K_0402_1%@
0.01U_0402_25V7K@
0.01U_0402_25V7K@
12
PR336
PR336
105K_0402_1%@
105K_0402_1%@
2008/6/222007/6/22
2008/6/222007/6/22
2008/6/222007/6/22
2
CELLS
12
PR330
PR330
0_0402_5%@
0_0402_5%@
2N7002KDW-2N _SOT363-6
2N7002KDW-2N _SOT363-6
12
PC325
PC325
0.01U_0402_25V7K@
0.01U_0402_25V7K@
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: S heet of
Date: S heet of
Date: S heet of
PR327
100K_0402_1%
100K_0402_1%
1 2
61
2
PQ313A
PQ313A
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
CHARGER
PR328
PR328
100K_0402_1%
100K_0402_1%
1 2
34
5
PR331
PR331
0_0402_5%
0_0402_5%
BATT_SEL_EC(33)
PQ313B
PQ313B
2N7002KDW-2N _SOT363-6
2N7002KDW-2N _SOT363-6
41 49Thursday, December 10, 2009
41 49Thursday, December 10, 2009
41 49Thursday, December 10, 2009
1
12
1.0
1.0
1.0
5
4
3
2
1
ISL6237_B+
12
PC406PC406
PC404PC404
10U_1206_25V6M10U_1206_25V6M
PL402
PL402
4.7UH_PCMC063T-4R7MN_5.5A _20%
4.7UH_PCMC063T-4R7MN_5.5A _20%
12
PR404
PR404
4.7_1206_5%
4.7_1206_5%
5V_SNB
12
PC415
PC415
330P_0402_50V7K
330P_0402_50V7K
VL
12
PR422
PR422
100K_0402_1%
100K_0402_1%
SPOK (33,43)
PJ402
PJ402
2
2
JUMP_43X118@
JUMP_43X118@
PJ403
PJ403
2
2
JUMP_43X118@
JUMP_43X118@
12
12
PC422PC422
0.1U_0402_25V60.1U_0402_25V6
2200P_0402_50V7K2200P_0402_50V7K
+5VALWP
12
1
+
+
PC413
PC413
220U_6.3V_M
220U_6.3V_M
2
PR407
PR407
61.9K_0402_1%@
61.9K_0402_1%@
1 2
PR409
PR409
1 2
0_0402_5%
0_0402_5%
1
1
1
1
12
PR418
PR418
0_0402_5%
0_0402_5%
ISL6237_B+
PR412
PR412
100K_0402_1%
100K_0402_1%
1 2
12
3 5
241
3 5
241
PQ401
PQ401
SIS412DN-T1-GE3_PAK1212-8
SIS412DN-T1-GE3_PAK1212-8
BST3A-1
PC411PC411
<BOM Structure>
<BOM Structure>
0.1U_0603_25V7K0.1U_0603_25V7K
1 2
PQ403
PQ403
SI7716ADN-T1-GE3_PAK1212-8
SI7716ADN-T1-GE3_PAK1212-8
PC417PC417
0.22U_0603_25V7K0.22U_0603_25V7K
PR413
PR413
1 2
1 2
200K_0402_1%
200K_0402_1%
VL
PR417
PR417
1 2
806K_0603_1%
806K_0603_1%
12
PR401
PR401
0_0402_5%
0_0402_5%
1 2
PR403
PR403
2.2_0603_5%
2.2_0603_5%
2VREF_ISL6237
1 2
0.22U_0603_25V7K
0.22U_0603_25V7K
PR419
PR419
47K_0402_1%@
47K_0402_1%@
1 2
PC419PC419
0.047U_0402_16V7K0.047U_0402_16V7K
0.1U_0603_25V7K
0.1U_0603_25V7K
UG3
BST3A
12
SW3
LG3
FB3
VL
PC416
PC416
EN_LDO
3/5V_EN1
3/5V_EN2
1 2
12
2VREF_ISL6237
PC420
PC420
0.047U_0402_16V7K
0.047U_0402_16V7K
@
@
PC407
PC407
33
26
24
25
23
30
32
20
14
27
PR416
PR416
0_0402_5%
0_0402_5%
1 2
1
8
4
PU401
PU401
TP
DRVH2
VBST2
LL2
DRVL2
VOUT2
REFIN2
VREF2
LDOREFIN
NC
EN_LDO
EN1
EN2
PC418PC418
1U_0603_10V6K1U_0603_10V6K
VL
1 2
PC408PC408
3/5V_VIN
3/5V_VCC
3
6
VIN
V5FILT
TONSE
VREF3
2
5
3/5V_NC
12
3/5V_TON
12
PR420
PR420
0_0402_5%
0_0402_5%
12
1U_0603_10V6K1U_0603_10V6K
PC409PC409
7
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
19
V5DRV
LDO
15
DRVH1
17
VBST1
16
LL1
18
DRVL1
22
PGND
10
VOUT1
11
FB1
9
VSW
29
SKIPSEL
28
PGOOD2
13
PGOOD1
12
TRIP1
31
TRIP2
GND
SN0806081RHBR_QFN32_5X5
SN0806081RHBR_QFN32_5X5
21
PC410
PC410
1U_0603_10V6K
1U_0603_10V6K
1 2
HG5
BST5A
2.2_0603_5%
2.2_0603_5%
SW5
LG5
FB5
5V_SKIP
ILM 1
ILIM2
PR405
PR405
PC412PC412
0.1U_0603_25V7K0.1U_0603_25V7K
PR410
PR410
0_0402_5%@
0_0402_5%@
PR411
PR411
1 2
0_0402_5%0_0402_5%
PR421
PR421
0_0402_5%@
0_0402_5%@
BST5A-1
12
1 2
12
12
PR414
PR414
301K_0402_1%
301K_0402_1%
PR415
PR415
301K_0402_1%
301K_0402_1%
2VREF_ISL6237
12
12
PQ402
PQ402
SIS412DN-T1-GE3_PAK1212-8
SIS412DN-T1-GE3_PAK1212-8
3 5
241
3 5
241
PQ404
PQ404
SI7716ADN-T1-GE3_PAK1212-8
SI7716ADN-T1-GE3_PAK1212-8
VL
+3VALWP +3VALW
+5VALWP +5VALW
2VREF_ISL6237
B+
PJ401
PJ401
JUMP_43X118@
JUMP_43X118@
1
2
1
2
D D
+3VALWP
PC421
PC421
220U_6.3V_M
220U_6.3V_M
C C
B B
12
PC405PC405
330P_0402_50V7K330P_0402_50V7K
1
+
+
1 2
2
1 2
VS
12
12
PC423PC423
PC401PC401
10U_1206_25V6M10U_1206_25V6M
0.1U_0402_25V60.1U_0402_25V6
PL401
1 2
0_0402_5%
0_0402_5%
10K_0402_1%
10K_0402_1%
PD402
PD402
LLZ5V1B_LL34-2
LLZ5V1B_LL34-2
PL401
PR402
PR402
4.7_1206_5%
4.7_1206_5%
PC414
PC414
330P_0402_50V7K
330P_0402_50V7K
EN_LDO-1
21
MAINPWON (39,40)
1 2
1 2
4.7UH_PCMC063T-4R7MN_5.5A_20%
4.7UH_PCMC063T-4R7MN_5.5A_20%
PR406
PR406
PR408
PR408
@
@
PC403PC403
2200P_0402_50V7K2200P_0402_50V7K
12
3V_SNB
12
PD401
PD401
RB751V-40_SOD323-2
RB751V-40_SOD323-2
PD403
PD403
RB751V-40_SOD323-2
RB751V-40_SOD323-2
A A
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
5
4
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
3
2009/01/06 2010/01/06
2009/01/06 2010/01/06
2009/01/06 2010/01/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
3VALW/5VALW
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Thursday, December 10, 2009
Thursday, December 10, 2009
Thursday, December 10, 2009
Date: S heet of
Date: S heet of
2
Date: S heet of
42 49
42 49
42 49
1
1.0Custom
1.0Custom
1.0Custom
5
PR501
+5VALW
12
PC525
PC525
PR501
0_0402_5%
0_0402_5%
1 2
PR505
PR505
100_0603_1%
100_0603_1%
1 2
PC508
PC508
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PR522
PR522
0_0402_5%@
0_0402_5%@
1 2
PR511
PR511
0_0402_5%
0_0402_5%
1 2
PR514
PR514
100_0603_1%
100_0603_1%
1 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+1.8VP
1
1
2
2
12
13
D
D
2
G
G
PQ505
PQ505
S
S
SSM3K7002FU_SC70-3@
SSM3K7002FU_SC70-3@
12
@
@
12
PC520
PC520
PJ504
PJ504
JUMP_43X79@
JUMP_43X79@
PR519
PR519
1K_0402_1%
1K_0402_1%
PR521
PR521
1K_0402_1%
1K_0402_1%
PC501
PC501
0.01U_0402_25V7K
0.01U_0402_25V7K
PC509
PC509
47P_0402_50V8J@
47P_0402_50V8J@
1 2
PR508
PR508
13.7K_0402_1%
13.7K_0402_1%
1 2
12
PR509
PR509
20.5K_0402_1%
20.5K_0402_1%
12
PC517
PC517
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
12
47P_0402_50V8J@
47P_0402_50V8J@
1 2
31.6K_0402_1%
31.6K_0402_1%
1 2
12
PR518
PR518
22.1K_0402_1%
22.1K_0402_1%
0.9V_IN
12
0.9V_REF
12
PC527
PC527
0.1U_0402_16V7K
0.1U_0402_16V7K
PC521
PC521
PR517
PR517
D D
C C
B B
A A
SYSON#(38)
0.1U_0402_16V7K@
0.1U_0402_16V7K@
5
SPOK(33,42)
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PR520
PR520
0_0402_5%@
0_0402_5%@
1 2
PC528
PC528
+5VALW
VDDIO(6)
SYSON(31,33,38)
0.9V_EN
12
+3VALW
1 2
1 2
4
1.2V_TON
1.2V_EN
1.2V_V5FILT
1.2V_FB
PR507
PR507
100K_0402_1%
100K_0402_1%
1.8V_V5FILT
1.8V_FB
PR516
PR516
100K_0402_1%@
100K_0402_1%@
PU503
PU503
VIN1VCNTL
2
GND
3
VREF
4
VOUT
G2992F1U_SO8
G2992F1U_SO8
+0.9VP
12
PC529
PC529
10U_0603_6.3V6M
10U_0603_6.3V6M
4
1.8V_TON
1.8V_EN
12
PC522
PC522
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
1.2V_PWRO K
2
3
4
5
6
6
5
NC
7
NC
8
NC
9
TP
240K_0402_1%
240K_0402_1%
1 2
1
EN_PSV
GND7PGND
TON
VOUT
V5FILT
VFB
PGOOD
1.8V_PGOOD
PR502
PR502
BST_1.2V BST_1.2V-1
14TP15
VBST
13
DRVH
12
LL
11
TRIP
10
V5DRV
9
DRVL
8
PU501
PU501
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
PR510
PR510
240K_0402_1%
240K_0402_1%
1 2
BST_1.8V BST_1.8V-1
1
14TP15
VBST
EN_PSV
DRVH
LL
TRIP
V5DRV
DRVL
GND7PGND
8
PU502
PU502
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
+3VALW
12
PC526
PC526
1U_0402_6.3V6K
1U_0402_6.3V6K
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
PR503
PR503
0_0603_5%
0_0603_5%
1 2
UG_1.2V
1.2V_SW
1.2V_TRIP
1 2
PR506
PR506
10K_0402_1%
10K_0402_1%
LG_1.2V
1 2
PR512
PR512
2.2_0603_5%
2.2_0603_5%
13
12
11
10
9
Issued Date
Issued Date
Issued Date
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
UG_1.8V
1.8V_SW
1.8V_TRIP
1 2
PR515
PR515
8.45K_0402_1%
8.45K_0402_1%
LG_1.8V
3
SI4686DY-T1-E3_SO8
SI4686DY-T1-E3_SO8
PC505
PC505
+5VALW
SI4634DY-T1-E3_SO8
SI4634DY-T1-E3_SO8
12
1 2
PC516PC516
0.1U_0603_25V7K0.1U_0603_25V7K
+5VALW
3
PQ501
PQ501
PQ502
PQ502
4
PC510PC510
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
PQ503
PQ503
SI4686DY-T1-E3_SO8
SI4686DY-T1-E3_SO8
PQ504
PQ504
SI4634DY-T1-E3_SO8
SI4634DY-T1-E3_SO8
12
PC523PC523
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
1.2V_IN
1.2V_IN
578
3 6
5
4
Compal Secret Data
Compal Secret Data
Compal Secret Data
12
241
1.8UH_SIL104R-1R8PF_9.5A_30%
1.8UH_SIL104R-1R8PF_9.5A_30%
12
PR504
PR504
786
4.7_1206_5%
4.7_1206_5%
1.2V_SNB
12
PC511
PC511
123
680P_0402_50V7K
680P_0402_50V7K
1.8V_IN
578
3 6
241
786
5
123
Deciphered Date
Deciphered Date
Deciphered Date
2
2
12
12
PC502PC502
10U_1206_25V6M10U_1206_25V6M
PL501
PL501
1 2
12
PC512
PC512
10U_1206_25V6M@
10U_1206_25V6M@
1.8UH_SIL104R-1R8PF_9.5A_30%
1.8UH_SIL104R-1R8PF_9.5A_30%
12
PR513
PR513
4.7_1206_5%
4.7_1206_5%
1.8V_SNB
12
PC524
PC524
820P_0402_25V7
820P_0402_25V7
PC503PC503
0.1U_0402_25V60.1U_0402_25V6
12
PC513PC513
10U_1206_25V6M10U_1206_25V6M
PL502
PL502
1 2
PC504PC504
2200P_0402_50V7K2200P_0402_50V7K
12
2
PJ501
PJ501
JUMP_43X118@
JUMP_43X118@
PC514PC514
2010/01/062009/01/06
2010/01/062009/01/06
2010/01/062009/01/06
1
1
1
2
+1.2VALWP
1
12
+
+
PC506
PC506
2
220U_B2_2.5VM_R15M
220U_B2_2.5VM_R15M
PC507PC507
10U_0603_6.3V6M10U_0603_6.3V6M
PJ502
PJ502
1
2
1
2
JUMP_43X79
JUMP_43X79
@
@
12
PC515PC515
0.1U_0402_25V60.1U_0402_25V6
2200P_0402_50V7K2200P_0402_50V7K
+1.8VP
1
12
+
+
PC518
PC518
2
220U_6.3V_M
220U_6.3V_M
PC519PC519
10U_0603_6.3V6M10U_0603_6.3V6M
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: S heet of
Date: S heet of
Date: S heet of
B+
B+
PJ503
PJ503
1
+1.2VALWP +1.2VALW
+1.8VP +1.8V
2
1
2
JUMP_43X118@
JUMP_43X118@
PJ505
PJ505
1
2
1
2
JUMP_43X118@
JUMP_43X118@
PJ506
PJ506
1
2
1
2
JUMP_43X79@
JUMP_43X79@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1.2V/1.8V/0.9V
1.2V/1.8V/0.9V
1.2V/1.8V/0.9V
43 49Thursday, December 10, 2009
43 49Thursday, December 10, 2009
43 49Thursday, December 10, 2009
1
+0.9V+0.9VP
1.0
1.0
1.0
5
PR601
PR601
0_0402_5%
D D
C C
B B
A A
SUSP#(18,31,33,38,41,46)
+5VALW
VGA_PWRSEL(15)
0_0402_5%
1 2
PR605
PR605
100_0603_1%
100_0603_1%
1 2
PC609
PC609
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
VLDT_EN(33,38,45,46)
SUSP#(18,31,33,38,41,46)
+3VALW
12
PR626
PR626
10K_0402_1%@
10K_0402_1%@
PR628
PR628
10K_0402_1%
10K_0402_1%
12
PR630
PR630
10K_0402_1%@
10K_0402_1%@
5
12
PC601
PC601
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
12
12
+5VALW
VGA_PWROK(14)
PQ607
PQ607
2
12
G
G
PC610
PC610
47P_0402_50V8J@
47P_0402_50V8J@
1 2
PR608
PR608
21K_0402_1%
21K_0402_1%
1 2
PR609
PR609
21K_0402_1%
21K_0402_1%
PR622
PR622
0_0402_5%@
0_0402_5%@
PR612
PR612
1 2
100K_0402_1%
100K_0402_1%
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
13
D
D
S
S
2N7002KW_SOT323-3
2N7002KW_SOT323-3
12
PR616
PR616
100_0603_1%
100_0603_1%
1 2
1 2
PC619
PC619
0.1U_0402_16V7K@
0.1U_0402_16V7K@
+3VALW
12
PR625
PR625
12
PR629
PR629
1 2
PR607
PR607
100K_0402_1%@
100K_0402_1%@
+3VS
10K_0402_5%@
10K_0402_5%@
1 2
12
PC616
PC616
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
PC625
PC625
PR627
PR627
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%
10K_0402_1%@
10K_0402_1%@
1.5V_V5FILT
1.5V_FB
PR611
PR611
12
PWRSEL-1
12
1.5V_TON
1.5V_EN
12
PC611
PC611
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
+3VS
PR619
PR619
1 2
12
PC627PC627
0.022U_0402_16V7K0.022U_0402_16V7K
100K_0402_1%@
100K_0402_1%@
4
2
3
4
5
6
2
G
G
4
TON
VOUT
V5FILT
VFB
PGOOD
1.5V_PGOOD
47P_0402_50V8J@
47P_0402_50V8J@
1 2
PWRSEL-2
13
PR602
PR602
240K_0402_1%
240K_0402_1%
1 2
1
EN_PSV
GND7PGND
VGA_V5FILT
VGA_FB
PC626
PC626
1 2
1 2
PR621
PR621
2.67K_0402_1%
2.67K_0402_1%
1 2
PR623
PR623
10K_0402_1%
10K_0402_1%
PR624
PR624
20K_0402_1%
20K_0402_1%
D
D
PQ606
PQ606
S
S
2N7002KW_SOT323- 3
2N7002KW_SOT323- 3
BST_1.5V BST_1.5V-1
1 2
PR603
PR603
0_0603_5%
0_0603_5%
14TP15
DRVH
LL
TRIP
DRVL
VGA_TON
VGA_EN
13
12
11
10
9
2
3
4
5
6
UG_1.5V
1.5V_SW
1.5V_TRIP
1 2
PR606
PR606
17.8K_0402_1%
17.8K_0402_1%
LG_1.5V
TON
VOUT
V5FILT
VFB
PGOOD
205K_0402_1%
205K_0402_1%
1 2
1
EN_PSV
GND7PGND
VBST
V5DRV
8
PU601
PU601
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
SIS412DN-T1-GE3_PAK1212-8
SIS412DN-T1-GE3_PAK1212-8
1 2
PC606PC606
0.1U_0603_25V7K0.1U_0603_25V7K
+5VALW
12
PC612PC612
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
PR610
PR610
0_0603_5%
0_0603_5%
BST_VGA
1 2
14TP15
VBST
13
DRVH
12
LL
11
TRIP
10
V5DRV
9
DRVL
8
PU602
PU602
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
3
PQ601
PQ601
PR613
PR613
UG_VGA
SW_VGA
VGA_TRIP
1 2
9.1K_0402_1%
9.1K_0402_1%
LG_VGA
BST_VGA-1
PR617
PR617
3 5
241
3 5
241
PD601
PD601
1SS355_SOD323-2
1SS355_SOD323-2
1 2
PC617
PC617
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
+5VALW
1.5V_IN
12
12
PC602
PC602
PC603PC603
10U_1206_25V6M@
10U_1206_25V6M@
10U_1206_25V6M10U_1206_25V6M
PL601
PL601
2.2UH_PCMC063T-2R2MN_8A_20%
2.2UH_PCMC063T-2R2MN_8A_20%
1 2
12
PR604
PR604
4.7_1206_5%@
4.7_1206_5%@
1.5V_SNB
12
PC613
PC613
470P_0402_50V7K@
470P_0402_50V7K@
PQ602
PQ602
SI7716ADN-T1-GE3_PAK1212-8
SI7716ADN-T1-GE3_PAK1212-8
+5VALW
12
PC623PC623
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
578
5
4
12
PC604PC604
0.1U_0402_25V60.1U_0402_25V6
PQ603
PQ603
SI4686DY-T1-E3_SO8
SI4686DY-T1-E3_SO8
3 6
241
786
PQ604PQ604
123
VGA_IN
SI4634DY-T1-E3_SO8SI4634DY-T1-E3_SO8
2
PJ601
PJ601
1
2
1
2
JUMP_43X79
JUMP_43X79
@
@
12
PC605PC605
2200P_0402_50V7K2200P_0402_50V7K
+1.5VSP
1
12
+
+
PC607
PC607
2
220U_B2_2.5VM_R15M
220U_B2_2.5VM_R15M
PC608PC608
10U_0603_6.3V6M10U_0603_6.3V6M
12
12
PC614PC614
10U_1206_25V6M10U_1206_25V6M
786
5
4
PQ605PQ605
123
SI4634DY-T1-E3_SO8SI4634DY-T1-E3_SO8
M93
0
1
Core Voltage Level
1.2 V
0.95 V
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2010/01/062009/01/06
2010/01/062009/01/06
2010/01/062009/01/06
2
VGA_PWRSEL
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
3
1
B+
PJ602
PJ602
1
2
1
2
JUMP_43X79@
JUMP_43X79@
PJ603
PJ603
1
2
2
JUMP_43X79@
JUMP_43X79@
PC615PC615
10U_1206_25V6M10U_1206_25V6M
PL602
PL602
0.88UH +-20% PCMC104T- R88MN 20A
0.88UH +-20% PCMC104T- R88MN 20A
1 2
12
PR615
PR615
4.7_1206_5%
4.7_1206_5%
VGA_SNB
12
PC624PC624
680P_0402_50V7K680P_0402_50V7K
+VGA_COREP +VGA_CORE
B+
1
1
+
+
PC618
PC618
2
330U_D2_2.5VY_R15M
330U_D2_2.5VY_R15M
PJ604
PJ604
2
2
JUMP_43X118@
JUMP_43X118@
PJ605
PJ605
2
2
JUMP_43X118@
JUMP_43X118@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: S heet of
Date: S heet of
Date: S heet of
Compal Electronics, Inc.
12
12
PC621PC621
PC620PC620
10U_0805_6.3V6M10U_0805_6.3V6M
10U_0805_6.3V6M10U_0805_6.3V6M
1
1
1
1
1.5V/VGA_CORE
1.5V/VGA_CORE
1.5V/VGA_CORE
1
12
+1.5VS+1.5VSP
+VGA_COREP
PC622PC622
10U_0805_6.3V6M10U_0805_6.3V6M
44 49Thursday, December 10, 2009
44 49Thursday, December 10, 2009
44 49Thursday, December 10, 2009
1.0
1.0
1.0
5
D D
PR701
PR701
34.8K_0402_1%
34.8K_0402_1%
10K_0402_1%
10K_0402_1%
PR712
PR712
1 2
PR705
PR705
100_0603_1%
100_0603_1%
1 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PWRSEL-1
2
12
G
G
12
PC715PC715
0.1U_0402_25V60.1U_0402_25V 6
12
PC701PC701
0.1U_0402_16V7K0.1U_0402_16V7K
12
PC709
PC709
PR710
PR710
261K_0402_1%
261K_0402_1%
1 2
13
D
D
PQ703
PQ703
S
S
2N7002KW_SOT323- 3
2N7002KW_SOT323- 3
47P_0402_50V8J@
47P_0402_50V8J@
31.6K_0402_1%
31.6K_0402_1%
1 2
12
PR711
PR711
91K_0402_1%
91K_0402_1%
VLDT_EN(33,38,44,46)
POWER_SEL
+5VALW
HIGH 1.0V
1.1VLOW
C C
+5VALW
12
PR709
PR709
10K_0402_1%
10K_0402_1%
13
D
D
S
S
2N7002KW_SOT323-3
2N7002KW_SOT323-3
POWER_SEL
PR713
PR713
0_0402_5%
0_0402_5%
PQ704
PQ704
12
2
G
G
12
PC714PC714
0.01U_0402_25V7K0.01U_0402_25V7K
PC710
PC710
1 2
PR708
PR708
4
1 2
PR707
PR707
100K_0402_1%@
100K_0402_1%@
NB_CORE_TON
NB_CORE_EN
NB_CORE_V5FILT
NB_CORE_FB
12
PC711
PC711
0.1U_0402_16V7K
0.1U_0402_16V7K
@
@
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
NB_CORE_PGOOD
PR702
PR702
240K_0402_1%
240K_0402_1%
1 2
BST_NB_CORE BST_NB_CORE-1
PR703
PR703
0_0603_5%
1
EN_PSV
GND7PGND
0_0603_5%
14TP15
VBST
DRVH
LL
TRIP
V5DRV
DRVL
8
PU701
PU701
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
1 2
UG_NB_CORE
13
NB_CORE_SW
12
NB_CORE_TRIP
1 2
11
PR706
PR706
10K_0402_1%
10K_0402_1%
10
LG_NB_CORE
9
3
PC706PC706
0.1U_0603_25V7K0.1U_0603_25V7K
1 2
+5VALW
PQ701
PQ701
SI4686DY-T1-E3_SO8
SI4686DY-T1-E3_SO8
PQ702
PQ702
SI4634DY-T1-E3_SO8
SI4634DY-T1-E3_SO8
12
PC712PC712
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
2
PJ701
NB_CORE_IN
578
3 6
5
4
12
241
1.8UH_SIL104R-1R8PF_9.5A_30%
1.8UH_SIL104R-1R8PF_9.5A_30%
12
786
NB_CORE_SNB
12
123
PC702PC702
10U_1206_25V6M10U_1206_25V6M
1 2
PR704
PR704
4.7_1206_5%@
4.7_1206_5%@
PC713
PC713
470P_0402_50V7K@
470P_0402_50V7K@
PL701
PL701
12
12
PC704PC704
PC703PC703
10U_1206_25V6M10U_1206_25V6M
0.1U_0402_25V60.1U_0402_25V6
PJ701
1
2
1
2
JUMP_43X118@
JUMP_43X118@
12
PC705PC705
2200P_0402_50V7K2200P_0402_50V7K
+NB_COREP
1
12
+
+
PC707
PC707
2
220U_B2_2.5VM_R15M
220U_B2_2.5VM_R15M
PC708PC708
10U_0603_6.3V6M10U_0603_6.3V6M
+NB_COREP +NB_CORE
1
B+
PJ702
PJ702
1
2
1
2
JUMP_43X118@
JUMP_43X118@
PJ703
PJ703
1
2
1
2
JUMP_43X118@
JUMP_43X118@
B B
A A
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETA RY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
5
4
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
2009/01/06 2010/01/06
2009/01/06 2010/01/06
2009/01/06 2010/01/06
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: S heet of
Date: S heet of
2
Date: S heet of
Compal Electronics, Inc.
+NB_CORE
+NB_CORE
+NB_CORE
45 49Thursday, December 10, 2009
45 49Thursday, December 10, 2009
45 49Thursday, December 10, 2009
1
1.0
1.0
1.0
5
D D
PD801
PD801
1 2
RB751V-40_SOD323-2@
RB751V-40_SOD323-2@
VLDT_EN
0.1U_0402_16V7K@
0.1U_0402_16V7K@
1 2
PR801
PR801
0_0402_5%
0_0402_5%
PR805
PR805
10K_0402_1%@
10K_0402_1%@
1 2
PC810
PC810
VLDT_EN(33,38,44,45)
C C
SUSP#(18,31,33, 38,41,44)
+5VALW
4
+5VALW
PC801
@PC801
@
1U_0603_10V6K
1U_0603_10V6K
0_0402_5%@
0_0402_5%@
1 2
12
12
@
@
PR815
PR815
0_0402_5%
0_0402_5%
@
@
1 2
12
PR816
PR816
PR807
PR807
47K_0402_5%
47K_0402_5%
PC802
PC802
1U_0402_6.3V6K
1U_0402_6.3V6K
12
@
@
PR803
PR803
47K_0402_5%
47K_0402_5%
PU802
PU802
7
POK
8
EN
PU801
PU801
7
8
+5VALW
6
1
+5VALW
12
POK
EN
12
VIN
VOU T
VCNTL
VOU T
FB
VIN
GND
APL5915KAI-TRL_SO8@
APL5915KAI-TRL_SO8@
6
5
VIN
4
VOU T
VCNTL
3
VOU T
2
FB
9
VIN
GND
APL5912-KAC-TRL_SO8
APL5912-KAC-TRL_SO8
1
PC806
PC806
1U_0402_6.3V6K
@ 1U_0402_6.3V6K@
5
4
3
2
9
+1.8V
1
2
12
1.54K_0402_1%@
1.54K_0402_1%@
1
2
+1.2VALW
1
2
12
1.15K_0402_1%
1.15K_0402_1%
PJ803
PJ803
JUMP_43X79@
JUMP_43X79@
PC807
PC807
4.7U_0805_6.3V6K@
4.7U_0805_6.3V6K@
PR806
PR806
1
PJ801
JUMP_43X79
JUMP_43X79
2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PR802
PR802
PR804
PR804
3K_0402_1%
3K_0402_1%
12
12
@PJ801
@
PC803
PC803
12
12
PR808
PR808
1.74K_0402_1%
@1.74K_0402_1%@
3
12
PC808
PC808
0.01U_0402_25V7K@
0.01U_0402_25V7K@
12
PC804
PC804
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+1.1VSP
12
PC805PC805
22U_0805_6.3V6M22U_0805_6.3V6M
PJ802
PJ802
2
112
JUMP_43X118@
JUMP_43X118@
PJ804
PJ804
2
12
+1.5VSP_UMA
PC809
PC809
22U_0805_6.3V6M@
22U_0805_6.3V6M@
112
JUMP_43X79@
JUMP_43X79@
PJ805
PJ805
2
112
JUMP_43X79@
JUMP_43X79@
PJ807
PJ807
2
112
JUMP_43X118@
JUMP_43X118@
+1.1VS+1.1VSP
+1.5VS_UMA+1.5VSP_UMA
+2.5VS+2.5VSP
+VGA_PCIE+1.0VSP
1
PU803
PU803
APL5508-25DC-TRL_SOT89-3
APL5508-25DC-TRL_SOT89-3
PC812
PC812
PU804
PU804
7
8
+5VALW
12
PC816
PC816
1U_0402_6.3V6K
1U_0402_6.3V6K
POK
EN
2
IN
6
VOU T
VCNTL
VOU T
GND
APL5912-KAC-TRL_SO8
APL5912-KAC-TRL_SO8
1
+3VS
12
1U_0402_6.3V6K
B B
PD802
PD802
RB751V-40_SOD323-2@
RB751V-40_SOD323-2@
1 2
PR814
PR814
0_0402_5%@
0_0402_5%@
VLDT_EN
SUSP#
1 2
PR813
PR813
15K_0402_5%
15K_0402_5%
1 2
PD803
PD803
RB751V-40_SOD323-2
RB751V-40_SOD323-2
1 2
1U_0603_10V6K
1U_0603_10V6K
PC814
PC814
VLDT_EN(33,38,44,45)
SUSP#(18,31,33, 38,41,44)
A A
5
1U_0402_6.3V6K
+5VALW
12
PR817
PR817
0_0402_5%@
0_0402_5%@
12
12
PR810
PR810
47K_0402_5%@
47K_0402_5%@
4
3
12
OUT
GND
1
5
VIN
4
3
2
FB
9
VIN
+1.2VALW
1
1
2
2
12
1.15K_0402_1%
1.15K_0402_1%
4.53K_0402_1%
4.53K_0402_1%
PC811PC811
4.7U_0805_6.3V6K4.7U_0805_6.3V6K
PJ806
PJ806
JUMP_43X79
JUMP_43X79
@
@
PC815
PC815
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
PR812
PR812
PR811
PR811
12
PR809
@PR809
@
150_1206_5%
150_1206_5%
12
12
+2.5VSP
12
PC813
PC813
0.01U_0402_25V7K
0.01U_0402_25V7K
3
+1.0VSP
12
PC817PC817
22U_0805_6.3V6M22U_0805_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
2009/01/06 2010/01/06
2009/01/06 2010/01/06
2009/01/06 2010/01/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered D ate
Deciphered D ate
Deciphered D ate
2
PR811 4.53K 3K
Park M93
1.0VVGA_PCIE
1.1 V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1.1V/1.5V/2.5V/1.0V
1.1V/1.5V/2.5V/1.0V
1.1V/1.5V/2.5V/1.0V
46 49Thursday, December 10, 2009
46 49Thursday, December 10, 2009
1
46 49Thursday, December 10, 2009
1.0
1.0
1.0
8
H H
G G
F F
VGATE(33)
H_PWRGD_L(23)
E E
D D
C C
255_0402_1%
255_0402_1%
B B
PR940
PR940
CPU_SVD(6)
CPU_SVC(6)
VR_ON(33)
DIFF_0
PC928
PC928
4700P_0402_25V7K
4700P_0402_25V7K
12
PR942
PR942
1K_0402_5%
1K_0402_5%
12
105K_0402_1%
105K_0402_1%
PR925
PR925
21.5K_0402_1%
21.5K_0402_1%
12
7
PR913
PR913
12
FB_0
180P_0402_50V8J
180P_0402_50V8J
PR943
PR943
54.9K_0402_1%
54.9K_0402_1%
12
12
PR926
PR926
95.3K_0402_1%
95.3K_0402_1%
12
PC929
PC929
12
1200P_0402_50V7K
1200P_0402_50V7K
+5VS +3VS
12
PR910
PR910
0_0402_5%
0_0402_5%
PR914
PR914
10K_0402_1%@
10K_0402_1%@
PR918 0_0402_5%PR918 0_0402_5%
1 2
1 2
PR919 0_0402_5% @PR919 0_0402_5% @
12
PR921 0_0402_5%PR921 0_0402_5%
12
PR924 0_0402_5%PR924 0_0402_5%
12
CPU_VDD0_FB_H(6)
CPU_VDD0_FB_L(6)
CPU_VDD1_FB_L(6)
CPU_VDD1_FB_H(6)
VW0
COMP0
PC930
PC930
1000P_0402_50V7K
1000P_0402_50V7K
6.81K_0402_1%
6.81K_0402_1%
PC934
PC934
12
+5VS
CPU_B+
12
PR911
PR911
105K_0402_1%@
105K_0402_1%@
12
PR916
PR916
105K_0402_1%@
105K_0402_1%@
VSEN0
+CPU_CORE_0
12
PR944
PR944
12
6
PR902
PR902
2_0603_5%
2_0603_5%
1 2
PC908
PC908
0.1U_0603_16V7K
0.1U_0603_16V7K
1 2
PR907
PR907
2_0603_5%
2_0603_5%
PC912
PC912
0.1U_0603_16V7K
0.1U_0603_16V7K
PU901
PU901
1
OFS/VFIXEN
2
PGOOD
3
PW ROK
4
SVD
5
SVC
6
ENABLE
7
RBIAS
8
OCSET
9
VDIFF0
10
FB0
11
COMP0
12
VW 0
ISP0
ISN0
PR928
PR928
12
10_0402_5%
10_0402_5%
PR933 10_0402_5%PR933 10_0402_5%
12
RTN1
PR935 10K_0402_1%PR935 10K_0402_1%
+1.8V
+CPU_CORE_1
255_0402_1%
255_0402_1%
12
12
48
13
0_0402_5%
0_0402_5%
PR929PR929
1 2
PR938 1K_0402_1%@PR938 1K_0402_1%@
VSEN1
PR941
PR941
1K_0402_5%
1K_0402_5%
PR901
PR901
44.2K_0402_1%
44.2K_0402_1%
44
45
46
47
VIN
VCC
FB_NB
COMP_NB
ISL6265IRZ-T_QFN48_6X6~D
ISL6265IRZ-T_QFN48_6X6~D
RTN016ISN0
ISP0
15
14
12
12
PR927 0_0402_5%PR927 0_0402_5%
PR930
PR930
0_0402_5%
0_0402_5%
RTN0
12
12
PR939
PR939
10_0402_5%
10_0402_5%
12
DIFF_1
PC931
PC931
4700P_0402_25V7K
4700P_0402_25V7K
12
12
PR945
PR945
12
PC901
PC901
33P_0402_50V8J
33P_0402_50V8J
12
12
1200P_0402_50V7K
1200P_0402_50V7K
PC907
PC907
1000P_0402_50V7K
1000P_0402_50V7K
PR904
PR904
22K_0402_1%
22K_0402_1%
12
PR908
PR908
0_0402_5%
0_0402_5%
42
43
RTN_NB
FSET_NB
VSEN_NB
VDIFF1
RTN117VSEN0
19
18
12
PR931
0_0402_5%
PR931
0_0402_5%
PR946
PR946
54.9K_0402_1%
54.9K_0402_1%
5
12
PC902
PC902
12
12
PR906
PR906
10_0402_5%
10_0402_5%
1 2
PR909
PR909
11.3K_0402_1%
11.3K_0402_1%
39
40
41
PGND_NB
LGATE_NB
OCSET_NB
VW1
COMP121ISP1
FB120VSEN1
22
12
PC932
PC932
180P_0402_50V8J
180P_0402_50V8J
12
1200P_0402_50V7K
1200P_0402_50V7K
PC935
PC935
38
PHASE_NB
23
ISP1
VW1
COMP1FB_1
+CPU_CORE_NB
12
PR912
PR912
0_0402_5%
0_0402_5%
37
BOOT_NB
UGATE_NB
BOOT0
UGATE0
PHASE0
PGND0
LGATE0
LGATE1
PGND1
PHASE1
UGATE1
BOOT1
ISN1
24
ISN1
12
PHASE_NB
LGATE_NB
PHASE_NB
UGATE_NB
12
1 2
36
35
34
33
32
31
30
PVCC
29
28
27
26
25
TP
49
12
PC933
PC933
1000P_0402_50V7K
1000P_0402_50V7K
PR947
PR947
6.81K_0402_1%
6.81K_0402_1%
LGATE_NB
UGATE_NB
PHASE_NB
BOOT_NB
CPU_VDDNB_FB_H (6)
PR915
PR915
10_0402_5%
10_0402_5%
BOOT_NB
BOOT0
UGATE0
PHASE0
LGATE0
LGATE1
PHASE1
UGATE1
BOOT1
12
PR903
PR903
0_0603_5%
0_0603_5%
1 2
0.22U_0603_10V7K
0.22U_0603_10V7K
UGATE0
PHASE0
BOOT0
+5VS
12
PC920
PC920
1U_0603_10V6K
1U_0603_10V6K
UGATE1
PHASE1
BOOT1
4
PQ901
PQ901
8
G2
7
S2/D 1
6
S2/D 1
5
S2/D 1
AO4932_SO8
AO4932_SO8
1 2
PC909
PC909
CPU_VDDNB_FB_L (6)
PR917
PR917
2.2_0603_1%
2.2_0603_1%
1 2
PC917
PC917
0.22U_0603_10V7K
0.22U_0603_10V7K
SI4634DY-T1-E3_SO8
SI4634DY-T1-E3_SO8
PR932
PR932
2.2_0603_1%
2.2_0603_1%
1 2
0.22U_0603_10V7K
0.22U_0603_10V7K
SI4634DY-T1-E3_SO8
SI4634DY-T1-E3_SO8
1
D2
2
D2
3
G1
4
S1
3 5
PQ902
PQ902
LGATE0
LGATE1
241
786
5
4
3 5
241
786
5
4
1 2
1 2
PC925
PC925
PQ906
PQ906
3
CPU_B+
12
12
PC905PC905
PC904PC904
PC903PC903
10U_1206_25V6M10U_1206_25V6M
0.01U_0402_25V7K0. 01U_0402_25V7K
PL902
PL902
3.3UH_SIQB74B-3R3PF_5.9A_20%
3.3UH_SIQB74B-3R3PF_5.9A_20%
1 2
12
PR905
PR905
4.7_1206_5%
4.7_1206_5%
12
PC911
PC911
680P_0603_50V7K
680P_0603_50V7K
PQ903
PQ903
SI7686DP-T1-E3_SO8
SI7686DP-T1-E3_SO8
786
5
SI4634DY-T1-E3_SO8
SI4634DY-T1-E3_SO8
4
123
123
PQ905
PQ905
SI7686DP-T1-E3_SO8
SI7686DP-T1-E3_SO8
786
5
PQ907
PQ907
SI4634DY-T1-E3_SO8
SI4634DY-T1-E3_SO8
4
123
123
HCB4532KF-800T90_1812
HCB4532KF-800T90_1812
12
2200P_0402_50V7K2200P_0402_50V7K
PC915PC915
10U_1206_25V6M10U_1206_25V6M
PQ904
PQ904
PC921PC921
10U_1206_25V6M10U_1206_25V6M
PL901
PL901
1 2
1
+
+
2
CPU_B+
12
PC913PC913
10U_1206_25V6M10U_1206_25V6M
CPU_B+
12
PC922PC922
10U_1206_25V6M10U_1206_25V6M
PC906
PC906
220U_25V_M
220U_25V_M
+CPU_CORE_NB
PC910
PC910
220U_D2_4VM
220U_D2_4VM
12
12
PC916PC916
PC914PC914
0.01U_0402_25V7K0. 01U_0402_25V7K
2200P_0402_50V7K2200P_0402_50V7K
0.36UH_PCMC104T-R36MN1R 17_30A_20%
0.36UH_PCMC104T-R36MN1R 17_30A_20%
12
PR920
PR920
4.7_1206_5%
4.7_1206_5%
12
PC918
PC918
680P_0603_50V7K
680P_0603_50V7K
12
12
PC923PC923
PC924PC924
0.01U_0402_25V7K0. 01U_0402_25V7K
2200P_0402_50V7K2200P_0402_50V7K
0.36UH_PCMC104T-R36MN1R 17_30A_20%
0.36UH_PCMC104T-R36MN1R 17_30A_20%
12
PR934
PR934
4.7_1206_5%
4.7_1206_5%
12
PC926
PC926
680P_0603_50V7K
680P_0603_50V7K
2
1
+
+
2
12
16.2K_0402_1%
16.2K_0402_1%
1 2
ISP0
12
16.2K_0402_1%
16.2K_0402_1%
1 2
ISP1
+CPU_CORE_1
Design Current: 12.6A
Max current: 18A
OCP_min:24A
B+
+VDDNB
Design Current: 2.8A
Max current: 4A
OCP_min:5A
PL903
PL903
1 2
PR922
PR922
PR923
PR923
1 2
4.02K_0402_1%
4.02K_0402_1%
PC919
PC919
12
0.1U_0402_16V7K
0.1U_0402_16V7K
PL904
PL904
PR937
PR937
PC927
PC927
ISN0
12
ISN1
+CPU_CORE_0
Design Current: 12.6A
Max current: 18A
OCP_min:24A
1 2
PR936
PR936
1 2
4.02K_0402_1%
4.02K_0402_1%
0.1U_0402_16V7K
0.1U_0402_16V7K
1
+CPU_CORE_0
+CPU_CORE_1
A A
8
7
6
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
MAY BE USED BY OR DISC LOSED TO ANY THIRD PART Y WITHOUT PRIOR WR ITTEN CONSENT OF COM PAL ELECTRONICS, INC.
4
2009/01/06 2010/01/06
2009/01/06 2010/01/06
2009/01/06 2010/01/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered D ate
Deciphered D ate
Deciphered D ate
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
2
CPU_CORE
CPU_CORE
CPU_CORE
47 49Thursday, December 10, 2009
47 49Thursday, December 10, 2009
47 49Thursday, December 10, 2009
1
1.0
1.0
1.0
5
4
3
2
Version change list (P.I.R. List) Page 1 of 1
for PWR
Reason for change PG# Modify List Date PhaseItem
1
D D
1
Change PC108 from 1000pF to 0.068uF for issue solution
2
Add snubber R & C and modify boost resistor for 1.8VP PR512=2.2 ohm;PR513=4.7 ohm;PC524=820pF 2009.11.17 PVT
3
Adjust power sequence
4
PR831=15KAdjust power sequence for VGA_PCIE by HW request
P46
PC108=0.068uF
P39
P43
PR701=34.8K,PC701=0.1uF
P45
Un-pop PR520,PQ505
2009.10.27 EVT
PVT2009.11.17
PVT2009.12.03
5
6
C C
7
8
9
10
B B
11
12
13
14
15
16
A A
17
Security Cl assific ation
Security Cl assific ation
Security Cl assific ation
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
5
4
MAY BE USE D BY OR DISCLOS ED TO ANY THI RD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.
2009/01/06 2009/01/06
2009/01/06 2009/01/06
2009/01/06 2009/01/06
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
Date: S heet of
Date: S heet of
2
Date: S heet of
Compal Electronics, Inc.
PIR (PWR)
PIR (PWR)
PIR (PWR)
LA-5972P
LA-5972P
LA-5972P
1.0
1.0
48 49Thursday, December 10, 2009
48 49Thursday, December 10, 2009
48 49Thursday, December 10, 2009
1
1.0
5
4
3
2
1
1. change component AP2301GN to AO3413
2. remove R521, R517, R520 and R518, and reserve U49 , U50, R999, R1000, R1001 and R1002 for experiment Vari-bright function.
3. U6.18 add a pull up resistor R1005 and pull down resistor R1006 for check ENE KB926 version.
4. reserve R1003 and R1004 for Vari-bright test.
D D
5. add J8, C1034, C1035, C1036, C1037, C1038 and C1039 for EMI request.
6. Change R583, R584, R585 and R586 Bead from SM010018110 to SM010022410.
7. reserve R1007 for EMI request.
8. Change C633, C640, C662, C948, C660 and C639 to 10pF for EMI rquest.
C C
B B
A A
Security Classification
Security Classification
Security Classification
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2008/10/06 2009/10/06
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
HW PIR
HW PIR
HW PIR
LA-5972P
LA-5972P
LA-5972P
1
1.0
1.0
1.0
49 49Thursday, December 10, 2009
49 49Thursday, December 10, 2009
49 49Thursday, December 10, 2009
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