Compal LA-5941P NIMUA, IdeaPad U460, LA-5941P NIMUB Schematic

A

1 1

B

C

D

E

Compal Confidential

NIMUA/UB

2 2

Schematics Document

Arrandale

with Intel IBEX PEAK-M core logic

3 3

REV:0.3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

C

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Cover Sheet

Size Document Number Rev

Custom

LA-5941P

Date: Sheet

D

Date: Sheet

E

of

150Thursday, April 08, 2010

0.3

A

B

C

D

E

Compal confidential

File Name :

ZZZ

14.1W_PCB_LA5941P

DAZ0D500102

1 1

VRAM 64*16

DDR3*4

page20

PCI-E X16

Intel Arrandale (UMA/SG)

NVidia N11M-LP1

page19~23

level shift IC HDMI CONN

page24

CRT Connector

page26

2 2

LVDS Connector

page27

ASM1442

page25

SW1

SW2

100MHz

2.7GT/s

PCI Express Mini card Slot 2

page28

6*PCI-E BUS

Socket-rPGA989

37.5mm*37.5mm

page5~9

FDI *8

DMI *4

Intel Ibex Peak M

FCBGA 951

25mm*25mm

Thermal-sensor EMC1403

Clock Generator

SLG8LV597VTR

Dual Channel

DDR3-800(1.5V) DDR3-1067(1.5V)

AZALIA

14*USB2.0

page38

page12

DDR3-SO-DIMM X2

BANK 0, 1, 2, 3

Audio Codec

ALC259

CMOS Camera

POWER BD: LS-5941P POWER BT

SW BD: LS-5942P NOVO BT

UP TO 8G

page33

page 10,11

2Channel Speaker

DMIC_Int

Audio Jack CONN.

page27

CR BD: LS-5944P

Body-Detect BD: LS-5947P

Finger Print BD: LS-5943P U-pek TCS5D

page33

page37

USB(WLAN)

PCI Express Mini card Slot 3

3 3

page28

SPI ROM BIOS+ME

Atheros 8131/32

SIM Card

page28

USB(WWAN)

CAP SENSOR BD:

4 4

LS-5946P USER/SG MUTE Power Saving BUTTON & LED

A

10/100/1G LAN

RJ45 CONN

page30

USB/JACK BD: LS-5945P USB PORT1,2,3 HP JACK MIC JACK KILL SW

SPI

page29

page13

Touch Pad

B

page35

G-sensor

page38

page 13~18

LPC BUS

EC

ENE KB926E0

page34

Int.KBD

AD

Security Classification

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

SPI ROM EC

C

6*SATA serial

BlueTooth CONN

USB1 CONN.

USB2 CONN

USB3 CONN

WWAN/3G

page35

ESATA AND USB CONN

page36

SATA HDD CONN

Mini card Slot 1

SSD

Compal Secret Data

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

D

page37

page32

page28

page37

page28

Card Reader CONN

page38

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

MB Block Diagram

LA-5941P

250Thursday, April 08, 2010

of

E

of

0.3

A

B

C

D

E

DDR3 Voltage Rails

SMBUS Control Table

+5VS

+3VS

+1.5VS

plane

1 1

+B

State

+5VALW

+3VALW

+1.5V

+VCCPpower

+CPU_CORE

+VGA_CORE

+1.8VS

+0.75VS

+1.05VS

For SG

+3VS_DELAY

+1.8VS_VGA

+1.5VS_VGA

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

SOURCE

KB926

+3VALW

KB926

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

RAM M2

X V

X

V

+3VALW

X

BATT KB926 SODIMM CLK CHIP

+3VALW

X

V

+3VALW

X

VV

+3VS

X

V

X

+3VS

X

WLAN WWAN

N11x Thermal Sensor

X

V

+3VS

X

Cap sensor

EMC1403

board

X

+3VS

X

XXX XXX X

X

XV

X

ALS

X

V

+3VS

X

PCH

X

V

+3VALW

X

S0

S3

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O

X

O

X

O

XX

X

OO

X

XX X

@ FUNCTION

PVT NON-USE

45@

(45 BOM) 100@ 10/100 LAN GIGA@

UMA_HDMI@

HDMI@

3 3

3G@ X76@ ESATA@ CMOS@

GIGA LAN

FOR UMA HDMI components

FOR HDMI components

3G(WWAN) function

(X76 BOM)

ESATA function

Camera function SSD@ SSD w/ miniPCIE socket 10M@ 11M@ UMA@ DIS@

FOR 10M CHIP

FOR 11M CHIP

UMA only (Arranddale)

DIS only (Arranddale) VGA@ FOR NVIDIA PART

HYBRID@ FOR SWITCHABLE

HU@ HD@

SWITCHABLE or UMA only

SWITCHABLE or DIS only

SKU

PCH, I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

HEX

A0

D2

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

PCIE PORT LIST

NEW CARD

1 2 3

LAN

4

3G 5 6 7 8

SATA PORT LIST

HDD

0 1

SSD

HM55 disabled

2,3 4

E-SATA

5

DEVICEPORT

EC, I2C / SMBUS ADDRESSING

DEVICE

PCH

EMC1403 Thermal sensor

N-vidia Thermal sensor

ALS

HEX

96/98,R/W

9A 1 0 0 1 1 0 1 X

9E

70/72,R/W

USB PORT LIST

DEVICEPORT

USB 10 USB/ESATA

1WLAN

CMOS

2 3

USB 2 4 5

CARD READER 6 7

9 10 11 12 13

HM55 disabled

X

HM55 disabled

X

WIRELESS8

USB 3

FigerPrinter

BT

3G

ADDRESS

1 0 0 1 0 1 1 X

1 0 0 1 1 1 1 X

0 1 1 1 0 0 0 X 0 1 1 1 0 0 1 X

1 0 0 1 1 0 0 X

Arrandale(dGPU)

4 4

DIS only

Arrandale(iGPU)

UMA only

Arrandale(iGPU+dGPU)

SWITCHABLE

A

DIS@ / 100@ for EVT

UMA@ / 100@ for EVT

HYBRID@

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

MB Notes List

LA-5941P

350Thursday, April 08, 2010

of

E

of

0.3

A

B

C

D

E

VGA and DDR3 Voltage Rails (N11M GPIO)

GPIO I/O ACTIVE Function Description

GPIO0

GPIO1

GPIO2

1 1

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

2 2

GPIO14

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

GPIO20

GPIO21

GPIO22

GPIO23

3 3

N/A

IN

OUT

I/O

OUT

I/O

IN

OUT

IN

OUT

IN

I/O

N/A

-

H

-

L

-

HDMI_DETECT_VGA

NV_INVTPWM

VGA_ENVDD_R

VGA_ENABLT

GPU VID0

GPU VID1

Power Sequence

(+3VS)

(1.05VS)

(+VGA_CORE)

VDD33

PEX_VDD

NVVDD

(1.8VS)IFPAB_IOVDD

(1.5VS)

FBVDDQ

The ramp time for any rail must be more than 40us

PEX_VDD can ramp up any time

tNVVDD

tNV-IFPAB_IOVDD

tNV-FBVDDQ

GPIO6GPIO5

Device ID

N11M-LP1 (40nm)

0x0A6E

1

4 4

A

VGA_COREGPU_VID00GPU_VID1

00

1

0.8V

0.85V

0.86V

P-State

Deep P12

P8

P0

B

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

VGA Notes List

LA-5941P

450Thursday, April 08, 2010

of

E

of

0.3

5

D D

C C

VCCP_POK46

FROM POWER VTT POWER GOOD SIGNAL

B B

R184

1K_0402_1%

12

Layout ruleΚ10mil width trace length < 0.5", spacing 20mil

+VCCP

H_PROCHOT#34,48

H_THERMTRIP#16

+VCCP

H_PM_SYNC15

H_CPUPWRGD16

PM_DRAM_PWRGD15

R183

R183 560_0402_5%

560_0402_5%

1 2

BUF_PLT_RST#16,28,29

R564 0_0402_5%R564 0_0402_5%

H_PECI16

+VCCP

SVT

1.5K_0402_5%

4

1 2

TP_SKTOCC#

12

R16349.9_0402_1% R16349.9_0402_1%

H_PECI_ISO

1 2

R569 68_0402_5%R569 68_0402_5%

12

H_PROCHOT#

H_THERMTRIP#

@

H_CPURST#_R

12

R13568_0402_5%

H_PM_SYNC_R

R187

1 2

0_0402_5%

VCCPWRGOOD_1

R190

1 2

0_0402_5%

VCCPWRGOOD_0

R139

1 2

0_0402_5%

VDDPWRGOOD_R

R191

1 2

0_0402_5%

R185

PLT_RST#_R

1 2

R56020_0402_1% R56020_0402_1%

R55820_0402_1% R55820_0402_1%

R54849.9_0402_1% R54849.9_0402_1%

R55749.9_0402_1% R55749.9_0402_1%

H_CATERR#

VTT_POK

12

R186

R186 750_0402_1%

750_0402_1%

COMP3

COMP2

COMP1

COMP0

JCPU1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R1P0

ME@

3

MISC THERMAL

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY# PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDI

TDO

CLK_CPU_BCLK

A16

CLK_CPU_BCLK#

B16

CLK_CPU_ITP

AR30

CLK_CPU_ITP#

AT30

CLK_EXP

E16

CLK_EXP#

D16

A18 A17

SM_DRAMRST#

F6

SM_RCOMP0

AL1

SM_RCOMP1

AM1

SM_RCOMP2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#1

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCK

AN28

XDP_TMS

AP28

XDP_TRST#

AT27

XDP_TDI

AT29

XDP_TDO

AR27 AR29

R555 0_0402_5%R555 0_0402_5%

AP29

XDP_DBRESET#

AN25

XDP_BPM#0

AJ22

XDP_BPM#1

AK22

XDP_BPM#2

AK24

XDP_BPM#3

AJ24

XDP_BPM#4

AJ25

XDP_BPM#5

AH22

XDP_BPM#6

AK23

XDP_BPM#7

AH23

T17 PADT17 PAD T18 PADT18 PAD

3

1 2

R563 0_0402_5%R563 0_0402_5%

T19 PADT19 PAD

12

CLK_CPU_BCLK 16 CLK_CPU_BCLK# 16

CLK_EXP 14 CLK_EXP# 14

only for Arrandale

without EDP

PM_EXTTS#1_R 10,11

2

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

PM_EXTTS#0

PM_EXTTS#1

XDP_PREQ#

XDP_TMS

XDP_TDI

XDP_TDO

XDP_TCK

XDP_TRST#

XDP_DBRESET#

1 2

R567 100_0402_1%R567 100_0402_1%

1 2

R566 24.9_0402_1%R566 24.9_0402_1%

1 2

R565 130_0402_1%R565 130_0402_1%

Layout Note:Please these resistors near Processor

1 2

R561 10K_0402_5%R561 10K_0402_5%

1 2

R562 10K_0402_5%R562 10K_0402_5%

R136 51_0402_1%@R136 51_0402_1%@

1 2

R138 51_0402_1%@R138 51_0402_1%@

1 2

R556 51_0402_1%@R556 51_0402_1%@

1 2

R134 51_0402_5%R134 51_0402_5%

1 2

R57 51_0402_1%@R57 51_0402_1%@

1 2

R133 51_0402_5%R133 51_0402_5%

1 2

R137

1K_0402_5%@

1 2

1

+VCCP

+3VS

CHECK INTEL DOCUMENT #385422 Debug Port Design Guide Rev1.3

For Intel S3 Power Reduction.

5

+3VALW

5

U8

2

P

VCCP_POK

+5VALW

A A

VCCP_POK

5

R416

R416 10K_0402_5%

10K_0402_5%

1 2

13

D

Q61

2

G

2N7002_SOT23

S

B

1

A

G

3

S3_0.75V_EN 44

4

Y

NC7SZ08P5X_NL_SC70-5

4

R195

1 2

1.5K_0402_1%

750_0402_1%

+1.5V +1.5V

12

R193

1.1K_0402_1%

@

VDDPWRGOOD_RDRAM_PWRGD

12

R194

12

R192

R192 3K_0402_1%

3K_0402_1%

@

DDR3 CONNECTER

PCH GPIO CONTROL

DRAMRST_CNTRL_PCH16

6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

For Intel S3 Power Reduction.

R301

R301 1K_0402_1%

1K_0402_1%

1 2

DRAMRST#10,11

DRAMRST_CNTRL_R

1 2

R281 0_0402_5%R281 0_0402_5%

Compal Secret Data

2010/01/13 2011/01/13

Compal Secret Data

@

1 2

R3000_0402_5%@R3000_0402_5%

D

S

D

1 3

Q27

G

2

1

C338

0.047U_0402_16V7K

2

S

R283 100K_0402_5%R283 100K_0402_5%

SVT

DRAMRST# SM_DRAMRST#

2N7002_SOT23

Deciphered Date

12

Title

Size Doc ument Number Rev

Custom

Date: Sheet

3

Compal Electronics, Inc.

Arrandale(1/5)-Thermal/XDP

LA-5941P

1

550Thursday, April 08, 2010

0.3

of

5

JCPU1A

DMI_CRX_PTX_N015 DMI_CRX_PTX_N115 DMI_CRX_PTX_N215 DMI_CRX_PTX_N315

DMI_CRX_PTX_P015 DMI_CRX_PTX_P115

D D

DMI_CRX_PTX_P215 DMI_CRX_PTX_P315

DMI_CTX_PRX_N015 DMI_CTX_PRX_N115 DMI_CTX_PRX_N215 DMI_CTX_PRX_N315

DMI_CTX_PRX_P015 DMI_CTX_PRX_P115 DMI_CTX_PRX_P215 DMI_CTX_PRX_P315

FDI_CTX_PRX_N015 FDI_CTX_PRX_N115 FDI_CTX_PRX_N215 FDI_CTX_PRX_N315 FDI_CTX_PRX_N415 FDI_CTX_PRX_N515 FDI_CTX_PRX_N615 FDI_CTX_PRX_N715

FDI_CTX_PRX_P015 FDI_CTX_PRX_P115 FDI_CTX_PRX_P215 FDI_CTX_PRX_P315 FDI_CTX_PRX_P415 FDI_CTX_PRX_P515

C C

FDI_CTX_PRX_P615 FDI_CTX_PRX_P715

FDI_FSYNC015 FDI_FSYNC115

FDI_INT15

FDI_LSYNC015 FDI_LSYNC115

B B

A A

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

FDI_FSYNC0

FDI_FSYNC1

FDI_INT

FDI_LSYNC0

FDI_LSYNC1

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD_rPGA,R1P0

ME@

R532 1K_0402_5%HYBRID@R532 1K_0402_5%HYBRID@

1 2

R536 1K_0402_5%HYBRID@R536 1K_0402_5%HYBRID@

1 2

R534 1K_0402_5%HYBRID@R534 1K_0402_5%HYBRID@

1 2

R533 1K_0402_5%HYBRID@R533 1K_0402_5%HYBRID@

1 2

R535 1K_0402_5%HYBRID@R535 1K_0402_5%HYBRID@

1 2

PEG_RCOMPO

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

PEG_ICOMPI

PEG_ICOMPO

PEG_RBIAS

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

4

EXP_ICOMPI

1 2

EXP_RBIAS

1 2

PCIE_CRX_GTX_N15 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_N12 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_N10

PCIE_CRX_GTX_N9 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P15 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_P11 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_P9 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_P0

PCIE_CTX_GRX_C_N15 PCIE_CTX_GRX_C_N14 PCIE_CTX_GRX_C_N13 PCIE_CTX_GRX_C_N12 PCIE_CTX_GRX_C_N11 PCIE_CTX_GRX_C_N10 PCIE_CTX_GRX_C_N9 PCIE_CTX_GRX_C_N8 PCIE_CTX_GRX_C_N7 PCIE_CTX_GRX_C_N6 PCIE_CTX_GRX_C_N5 PCIE_CTX_GRX_C_N4 PCIE_CTX_GRX_C_N3 PCIE_CTX_GRX_C_N2 PCIE_CTX_GRX_C_N1 PCIE_CTX_GRX_C_N0

PCIE_CTX_GRX_C_P15 PCIE_CTX_GRX_C_P14 PCIE_CTX_GRX_C_P13 PCIE_CTX_GRX_C_P12 PCIE_CTX_GRX_C_P11 PCIE_CTX_GRX_C_P10 PCIE_CTX_GRX_C_P9 PCIE_CTX_GRX_C_P8 PCIE_CTX_GRX_C_P7 PCIE_CTX_GRX_C_P6 PCIE_CTX_GRX_C_P5 PCIE_CTX_GRX_C_P4 PCIE_CTX_GRX_C_P3 PCIE_CTX_GRX_C_P2 PCIE_CTX_GRX_C_P1 PCIE_CTX_GRX_C_P0

Layout ruleΚtrace length < 0.5"

R544 49.9_0402_1%R544 49.9_0402_1%

R545 750_0402_1%R545 750_0402_1%

PCIE_CRX_GTX_N[0..15] 19

PCIE_CRX_GTX_P[0..15] 19

PCIE Lane Numbers Reversed CFG3-PCI Express Static Lane Reversal

HYBRID@

C527 0.1U_0402_10V6KC527 0.1U_0402_10V6K

1 2

C540 0.1U_0402_10V6KC540 0.1U_0402_10V6K

1 2

C529 0.1U_0402_10V6KC529 0.1U_0402_10V6K

1 2

C542 0.1U_0402_10V6KC542 0.1U_0402_10V6K

1 2

C531 0.1U_0402_10V6KC531 0.1U_0402_10V6K

1 2

C544 0.1U_0402_10V6KC544 0.1U_0402_10V6K

1 2

C533 0.1U_0402_10V6KC533 0.1U_0402_10V6K

1 2

C546 0.1U_0402_10V6KC546 0.1U_0402_10V6K

1 2

C535 0.1U_0402_10V6KC535 0.1U_0402_10V6K

1 2

C562 0.1U_0402_10V6KC562 0.1U_0402_10V6K

1 2

C564 0.1U_0402_10V6KC564 0.1U_0402_10V6K

1 2

C555 0.1U_0402_10V6KC555 0.1U_0402_10V6K

1 2

C557 0.1U_0402_10V6KC557 0.1U_0402_10V6K

1 2

C561 0.1U_0402_10V6KC561 0.1U_0402_10V6K

1 2

C548 0.1U_0402_10V6KC548 0.1U_0402_10V6K

1 2

C559 0.1U_0402_10V6KC559 0.1U_0402_10V6K

1 2

C528 0.1U_0402_10V6KC528 0.1U_0402_10V6K

1 2

C541 0.1U_0402_10V6KC541 0.1U_0402_10V6K

1 2

C530 0.1U_0402_10V6KC530 0.1U_0402_10V6K

1 2

C543 0.1U_0402_10V6KC543 0.1U_0402_10V6K

1 2

C532 0.1U_0402_10V6KC532 0.1U_0402_10V6K

1 2

C545 0.1U_0402_10V6KC545 0.1U_0402_10V6K

1 2

C534 0.1U_0402_10V6KC534 0.1U_0402_10V6K

1 2

C547 0.1U_0402_10V6KC547 0.1U_0402_10V6K

1 2

C536 0.1U_0402_10V6KC536 0.1U_0402_10V6K

1 2

C563 0.1U_0402_10V6KC563 0.1U_0402_10V6K

1 2

C565 0.1U_0402_10V6KC565 0.1U_0402_10V6K

1 2

C556 0.1U_0402_10V6KC556 0.1U_0402_10V6K

1 2

C558 0.1U_0402_10V6KC558 0.1U_0402_10V6K

1 2

C560 0.1U_0402_10V6KC560 0.1U_0402_10V6K

1 2

C549 0.1U_0402_10V6KC549 0.1U_0402_10V6K

1 2

C550 0.1U_0402_10V6KC550 0.1U_0402_10V6K

1 2

PCIE_CTX_GRX_N15 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P15 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_P0

PCIE_CTX_GRX_N[0..15] 19

PCIE_CTX_GRX_P[0..15] 19

3

R59

@R59

@

1 2

3.01K_0402_1%

FOR ES1 SAMPLE ONLY

R547

R547 0_0402_5%

0_0402_5%

1 2 1 2

R546

R546 0_0402_5%

0_0402_5%

CFG Straps for PROCESSOR

CFG0

PCI-Express Configuration Select

CFG0

Not applicable for Clarksfield Processor

CFG[1:0] 11=1*16 PEG

CFG3

CFG3-PCI Express Static Lane Reversal

CFG4

CFG4-Display Port Presence

CFG4

@

1 2

R58 3.01K_0402_1%

1: Single PEG 0: Bifurcation enabled

10=2*8 PEG

1 2

R61 3.01K_0402_1%R61 3.01K_0402_1%

1: Normal Operation

0: Lane Numbers Reversed

CFG3

15 -> 0, 14 ->1, .....

@

1 2

R60 3.01K_0402_1%

1: Disabled; No Physical Display Port attached to Embedded Display Port

0: Enabled; An external Display Port device is connected to the Embedded Display Port

2

JCPU1E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

CFG0

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG3 CFG4

CFG7

H_RSVD17_R

@

H_RSVD18_R

@

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,AUB_CFD_rPGA,R1P0

ME@

RSVD_NCTF_37

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RESERVED

RSVD32 RSVD33

RSVD34 RSVD35

RSVD36

RSVD38 RSVD39

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53

RSVD58

RSVD_TP_59 RSVD_TP_60

RSVD62 RSVD63 RSVD64 RSVD65

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AP1 AT2

AT3 AR1

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32

E15 F15 A2

KEY

D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS

RSVD64_R RSVD65_R

R189

R189 0_0402_5%

0_0402_5%

R188

R188 0_0402_5%

0_0402_5%

1

@

12

@

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Arrandale(2/5)-DMI/PEG/FDI

LA-5941P

1

650Thursday, April 08, 2010

of

0.3

5

JCPU1C

4

3

JCPU1D

2

1

D D

DDR_A_D[0..63]10

C C

B B

DDR_A_BS010 DDR_A_BS110 DDR_A_BS210

DDR_A_CAS#10 DDR_A_RAS#10 DDR_A_WE#10

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ10

AL10

AK12

AK11

AM10 AR11 AL11

AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14

A10

SA_DQ[0]

C10

SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]

B10

SA_DQ[4]

D10

SA_DQ[5]

E10

SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15]

H10

SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20]

G10

SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31]

AH5

SA_DQ[32]

AF5

SA_DQ[33]

AK6

SA_DQ[34]

AK7

SA_DQ[35]

AF6

SA_DQ[36]

AG5

SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39] SA_DQ[40]

AJ9

SA_DQ[41] SA_DQ[42] SA_DQ[43]

AK8

SA_DQ[44]

AL7

SA_DQ[45] SA_DQ[46]

AL8

SA_DQ[47]

AN8

SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51]

AM9

SA_DQ[52]

AN9

SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

AC3

SA_BS[0]

AB2

SA_BS[1]

U7

SA_BS[2]

AE1

SA_CAS#

AB3

SA_RAS#

AE9

SA_WE#

DDR SYSTEM MEMORY A

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0]

SA_DM[1]

SA_DM[2]

SA_DM[3]

SA_DM[4]

SA_DM[5]

SA_DM[6]

SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]

SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 10 M_CLK_DDR#0 10 DDR_CKE0_DIMMA 10

M_CLK_DDR1 10 M_CLK_DDR#1 10 DDR_CKE1_DIMMA 10

DDR_CS0_DIMMA# 10 DDR_CS1_DIMMA# 10

M_ODT0 10 M_ODT1 10

DDR_A_DM[0..7] 10

DDR_A_DQS#[0..7] 10

DDR_A_DQS[0..7] 10

DDR_A_MA[0..15] 10

DDR_B_D[0..63]11

DDR_B_BS011 DDR_B_BS111 DDR_B_BS211

DDR_B_CAS#11 DDR_B_RAS#11 DDR_B_WE#11

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AR10

AT10

B5

SB_DQ[0]

A5

SB_DQ[1]

C3

SB_DQ[2]

B3

SB_DQ[3]

E4

SB_DQ[4]

A6

SB_DQ[5]

A4

SB_DQ[6]

C4

SB_DQ[7]

D1

SB_DQ[8]

D2

SB_DQ[9]

F2

SB_DQ[10]

F1

SB_DQ[11]

C2

SB_DQ[12]

F5

SB_DQ[13]

F3

SB_DQ[14]

G4

SB_DQ[15]

H6

SB_DQ[16]

G2

SB_DQ[17]

J6

SB_DQ[18]

J3

SB_DQ[19]

G1

SB_DQ[20]

G5

SB_DQ[21]

J2

SB_DQ[22]

J1

SB_DQ[23]

J5

SB_DQ[24]

K2

SB_DQ[25]

L3

SB_DQ[26]

M1

SB_DQ[27]

K5

SB_DQ[28]

K4

SB_DQ[29]

M4

SB_DQ[30]

N5

SB_DQ[31]

AF3

SB_DQ[32]

AG1

SB_DQ[33]

AJ3

SB_DQ[34]

AK1

SB_DQ[35]

AG4

SB_DQ[36]

AG3

SB_DQ[37]

AJ4

SB_DQ[38]

AH4

SB_DQ[39]

AK3

SB_DQ[40]

AK4

SB_DQ[41]

AM6

SB_DQ[42]

AN2

SB_DQ[43]

AK5

SB_DQ[44]

AK2

SB_DQ[45]

AM4

SB_DQ[46]

AM3

SB_DQ[47]

AP3

SB_DQ[48]

AN5

SB_DQ[49]

AT4

SB_DQ[50]

AN6

SB_DQ[51]

AN4

SB_DQ[52]

AN3

SB_DQ[53]

AT5

SB_DQ[54]

AT6

SB_DQ[55]

AN7

SB_DQ[56]

AP6

SB_DQ[57]

AP8

SB_DQ[58]

AT9

SB_DQ[59]

AT7

SB_DQ[60]

AP9

SB_DQ[61] SB_DQ[62] SB_DQ[63]

AB1

SB_BS[0]

W5

SB_BS[1]

R7

SB_BS[2]

AC5

SB_CAS#

Y7

SB_RAS#

AC6

SB_WE#

DDR SYSTEM MEMORY - B

SB_CK[0]

SB_CK#[0]

SB_CKE[0]

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

W8 W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

M_CLK_DDR2 11 M_CLK_DDR#2 11 DDR_CKE2_DIMMB 11

M_CLK_DDR3 11 M_CLK_DDR#3 11 DDR_CKE3_DIMMB 11

DDR_CS2_DIMMB# 11 DDR_CS3_DIMMB# 11

M_ODT2 11 M_ODT3 11

DDR_B_DM[0..7] 11

DDR_B_DQS#[0..7] 11

DDR_B_DQS[0..7] 11

DDR_B_MA[0..15] 11

IC,AUB_CFD_rPGA,R1P0

ME@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

IC,AUB_CFD_rPGA,R1P0

ME@

Compal Secret Data

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Arrandale(3/5)-DDR III

LA-5941P

1

0.3

of

750Thursday, A pril 08, 2010

5

+CPU_CORE

JCPU1F

D D

C C

B B

A A

48A 15A18A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R1P0

ME@

CPU CORE SUPPLY

5

1.1V RAIL POWER

POWER

PROC_DPRSLPVR

CPU VIDS

VTT_SELECT

VCC_SENSE VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

SENSE LINES

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

PSI#

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

ISENSE

AH14

10U_0805_6.3V6M

1

2

1

2

C201

10U_0805_6.3V6M

C271

1

2

1

2

H_PSI#_R

10U_0805_6.3V6M

C199

1

2

10U_0805_6.3V6M

C270

1

@

2

10U_0805_6.3V6M

C219

C217

1

2

+VCCP

10U_0805_6.3V6M

C209

C208

1

2

H_VID0 48 H_VID1 48 H_VID2 48 H_VID3 48 H_VID4 48 H_VID5 48 H_VID6 48

1 2

R56 0_0402_5%R56 0_0402_5%

1

2

1

2

AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34

G15

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 PM_DPRSLPVR_R

VTT_SELECT

H_VTTVID1 = Low, 1.1V FOR Clarksfiel

H_VTTVID1 = High, 1.05V FOR Auburndale

AN35

AJ34 AJ35

B15 A15

VCCSENSE VSSSENSE

@

IMVP_IMON 48

VTT_SENSE 46

T15PAD@T15PAD

10U_0805_6.3V6M

C198

10U_0805_6.3V6M

C216

10U_0805_6.3V6M

1

2

4

10U_0805_6.3V6M

C181

1

+

2

10U_0805_6.3V6M

C182

1

2

10U_0805_6.3V6M

C274

C207

1

2

SVT STRIP PIN

R551

1K_0402_1%

PSI_ON#34

Lenovo Request

VCCSENSE 48 VSSSENSE 48

4

+VCCP

330U_D2E_2.5VM_LESR9M

C554

C554 330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

10U_0805_6.3V6M

C200

+VCCP

H_PSI#_R

12

Q18

MMBT3906_SOT23-3

R182

1 2

10K_0402_5%

@

PROC_DPRSLPVR 48

VTT_SELECT 46

+GFX_CORE

C673

R282 0_0402_5%R282 0_0402_5%

12

@

C

123

E

B

2

B

CPU

22U_0805_6.3V6M

1

C161

C160

+

@

2

22U_0805_6.3V6M

R550

R550 1K_0402_1%

1K_0402_1%

@

1 2

C

Q51

Q51 MMST3904-7-F_SO T323-3

MMST3904-7-F_SO T323-3

E

@

3 1

1

C191

@

2

22U_0805_6.3V6M

1

SUSP39, 44,45

@

1

2

PSI# 48

SVT,timing

3

22U_0805_6.3V6M

C190

@

+5VALW

2

G

1

2

22U_0805_6.3V6M

1

C159

C591

C189

C591

2

10U_0805_6.3V6M

+VCCP

10U_0805_6.3V6M

C214

1

2

+1.5V +1.5V_DDR3

2

U11

8

D

7

D

6

D

5

12

13

D

SI4800BDY-T1-E3_SO 8

R268

R268 47K_0402_1%

47K_0402_1%

R267 0_0402_5%R267 0_0402_5%

1.5_SUS- 1.5V_DDR3_GATE

D

Q23

Q23 2N7002_SOT23

2N7002_SOT23

S

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10U_0805_6.3V6M

1

C592

2

+VCCP

10U_0805_6.3V6M

C215

J3

112

JUMP_43X118

@

J2

112

JUMP_43X118

@

S S S G

12

Issued Date

2

AS NO CONNECT

BUT A SMALL AMOUNT OF POWER

(~15MW) MAYBE WASTED

JCPU1G

AT21

VAXG1

AT19

VAXG2

1

2

10U_0805_6.3V6M

C210

1

2

10U_0805_6.3V6M

C272

1

2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

1

2

C211

C240

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD_rPGA,R1P0

ME@

GRAPHICS

FDI PEG & DMI

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GRAPHICS VIDs

3A

POWER

DDR3 - 1.5V RAILS

1.1V1.8V

0.6A

DESIGN GUIDE REV1.1

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

GFX_VR_EN

AR25 AT25

GFX_IMON_R

AM24

GFX_IMON

AJ1

VDDQ1

AF1

VDDQ2

AE7

VDDQ3

AE4

VDDQ4

AC1

VDDQ5

AB7

VDDQ6

AB4

VDDQ7

Y1

VDDQ8

W7

VDDQ9

W4

VDDQ10

U1

VDDQ11

T7

VDDQ12

T4

VDDQ13

P1

VDDQ14

N7

VDDQ15

N4

VDDQ16

L1

VDDQ17

H1

VDDQ18

P10

VTT0_59

N10

VTT0_60

L10

VTT0_61

K10

VTT0_62

J22

VTT1_63

J20

VTT1_64

J18

VTT1_65

H21

VTT1_66

H20

VTT1_67

H19

VTT1_68

L26

VCCPLL1

L27

VCCPLL2

M26

VCCPLL3

1

2

VCC_AXG_SENSE 47 VSS_AXG_SENSE 47

GFXVR_VID_0 47 GFXVR_VID_1 47 GFXVR_VID_2 47 GFXVR_VID_3 47 GFXVR_VID_4 47 GFXVR_VID_5 47 GFXVR_VID_6 47

R141 0_0402_5%R141 0_0402_5%

1 2

1U_0603_10V6K

C254

1

2

220U_B2_2.5VM_R35

10U_0805_6.3V6M

C268

1

+

2

1U_0603_10V6K

C149

C167

1

2

@

T16PAD@T16PAD

+1.5V_DDR3

1U_0603_10V6K

C255

C253

C256

1

2

C252

1

2

1

2

1

2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C168

C168

1

2

1

2

10U_0805_6.3V6M

C258

+VCCP

10U_0805_6.3V6M

C212

C273

1

2

+VCCP

10U_0805_6.3V6M

C213

C218

1

2

+1.8VS

4.7U_0603_6.3V6K

10U_0805_6.3V6M

C169

1

2

GFX_IMON_R

1U_0603_10V6K

C257

C170

1

R132

HYBRID@

DGPU_SELECT

GFX_VR_EN

GFXVR_EN 47

GFXVR_IMON 47

1K_0402_5%

12

R140

330_0402_5%

1 2

1

13

D

HYBRID@

2

G

Q58

G

Q58

2N7002_SOT23

S

For Intel S3 Power Reduction.

+1.5V

1 2 3 4

+1.5V_DDR3

1

C325

0.1U_0603_25V7K

2

2010/01/13 2011/01/13

0.1U_0402_10V6K

C289

C288

1

2

Compal Secret Data

0.1U_0402_10V6K

C287

1

2

Deciphered Date

2

C286

2

SUSP

For Intel S3 Power Reduction.

+1.5V_DDR3

C269

0.1U_0402_10V6K@C269

0.1U_0402_10V6K

1

@

12

R233

R233 220_0402_5%

2

220_0402_5%

13

D

Q19

2

G

2N7002_SOT23

S

Title

Size Doc ument Number Rev

Custom

Date: Sheet

PVT

Compal Electronics, Inc.

Arrandale(4/5)-PWR

LA-5941P

1

0.3

of

850Thursday, April 08, 2010

5

JCPU1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

D D

C C

B B

AR17 AR15 AR12

AP20 AP17 AP13 AP10

AN34 AN31 AN23 AN20

AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AL34

AL31

AL23

AL20

AL17

AL12

AK29 AK27 AK25 AK20 AK17

AJ31

AJ23

AJ20

AJ17

AJ14

AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AG10

AE35

VSS8 VSS9 VSS10 VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14 VSS15 VSS16 VSS17 VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75 VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

4

JCPU1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

NCTF

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

AT35 AT1 AR34 B34 B2 B1 A35

VSS_NCTF1_R VSS_NCTF2_R VSS_NCTF3_R VSS_NCTF4_R VSS_NCTF5_R VSS_NCTF6_R VSS_NCTF7_R

3

+CPU_CORE

2

1

CPU CORE

22U_0805_6.3V6M

C568

1

2

10U_0805_6.3V6M

C147

1

2

10U_0805_6.3V6M

C195

1

2

22U_0805_6.3V6M

C585

C580

1

2

1

2

1

2

C580

1

2

10U_0805_6.3V6M

C163

C162

1

2

10U_0805_6.3V6M

C88

C192

1

2

22U_0805_6.3V6M

C579

1

2

10U_0805_6.3V6M

C179

1

2

10U_0805_6.3V6M

C196

1

2

C573

C574

1

2

10U_0805_6.3V6M

C193

C166

1

2

10U_0805_6.3V6M

C180

C89

1

2

Under cavity

22U_0805_6.3V6M

C578

C584

1

2

10U_0805_6.3V6M

C165

C148

1

2

10U_0805_6.3V6M

C197

1

2

22U_0805_6.3V6M

C583

1

2

10U_0805_6.3V6M

C194

1

between Inductor and socket

2

330U_D2E_2.5VM_LESR9M

1

C75

+

2

PVT, change from 470uF 4.5mohm to 330uF 6mohm and 2nd 470uF 7mohm by power; '10 1/8 update main to 330uF 9m ohm

22U_0805_6.3V6M

C577

1

2

330U_D2E_2.5VM_LESR9M

1

C76

+

2

22U_0805_6.3V6M

C572

C571

1

2

1

2

C571

1

Inside cavity

2

330U_D2E_2.5VM_LESR9M

1

C92

C164

+

2

22U_0805_6.3V6M

C91

1

2

22U_0805_6.3V6M

C129

C90

C129

C87

1

2

IC,AUB_CFD_rPGA,R1P0

ME@

A A

5

IC,AUB_CFD_rPGA,R1P0

ME@

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Arrandale(5/5)-GND/Bypass

LA-5941P

1

of

950Thursday, April 08, 2010

0.3

5

+VREF_DQ_DIMMA

0.1U_0402_10V6K

2.2U_0603_6.3V6K

C303

1

2

D D

C C

B B

A A

2

DDR_CKE0_DIMMA7

DDR_A_BS27

M_CLK_DDR07 M_CLK_DDR#07

DDR_A_BS07

DDR_A_WE#7 DDR_A_CAS#7

DDR_CS1_DIMMA#7

+3VS

1

2

5

DDR_A_D0

C347

DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS# M_ODT0

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

1 2

10K_0402_5%

2.2U_0603_6.3V6K

0.1U_0402_10V6K

C608

C617

1

2

+1.5V +1.5V

4BA2/6W

4BA2/6W4BA2/6W

DDR3 SO-DIMM A

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

R571

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

R570

10K_0402_5%

12

DQ4 DQ5

VSS3

DQS#0

DQS0 VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

A15 A14

VDD4

A11

A7

VDD6

A6 A4

VDD8

A2 A0

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F ME@

ME@

G2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

4

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3

+0.75VS

1/76BA1/86W

1/76BA1/86W1/76BA1/86W

4

DRAMRST# 5,11

DDR_CKE1_DIMMA 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

DDR_A_BS1 7 DDR_A_RAS# 7

DDR_CS0_DIMMA# 7 M_ODT0 7

M_ODT1 7

0.1U_0402_10V6K

0.1U_0402_10V6K C346

C346

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

VREF =

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

PM_EXTTS#1_R 5,11

SMB_DATA_S3 11,12,14,28 SMB_CLK_S3 11,12,14,28

+VREF_DQ_DIMMA

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K C355

C355

1

2

DDR_A_D[0..63]7

DDR_A_DM[0..7]7

DDR_A_DQS[0..7]7

DDR_A_DQS#[0..7]7

DDR_A_MA[0..15]7

4*0402 1uf

1*0402 2.2uf

3

Layout Note: Place near DIMM

+1.5V

10U_0603_6.3V6M

C589

1

@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C586

C588

1

@

2

2010/01/13 2011/01/13

1

2

+0.75VS

C607

C605

1U_0603_10V6K

C605

1U_0603_10V6K

1

2

Compal Secret Data

C581

1

2

1U_0603_10V6K

10U_0603_6.3V6M

C310

1

2

C606

C300

1U_0603_10V6K

1

2

Deciphered Date

2

10U_0603_6.3V6M

C570

C309

1

2

C301

10U_0603_6.3V6M

C301

10U_0603_6.3V6M

1U_0603_10V6K

1

2

1

+1.5V

12

R297

1K_0402_1%

For Arranale only +VREF_DQ_ DIMMA supply from a exter nal 1.5V voltage div ide circuit. 07/17/2009

10U_0603_6.3V6M

C308

0.1U_0402_10V6K

C314

1

2

0.1U_0402_10V6K

C315

C317

1

2

C317

1

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

0.1U_0402_10V6K

0.1U_0402_10V6K C316

C316

R305

+VREF_DQ_DIMMA

12

1

+

C569

C569 220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

2

LA-5941P

1

0.3

of

10 50Thursday, April 08, 2010

5

+VREF_DQ_DIMMB

0.1U_0402_10V6K

2.2U_0603_6.3V6K

1

C382

+3VS

2

DDR_CKE2_DIMMB7

DDR_B_BS27

M_CLK_DDR27 M_CLK_DDR#27

DDR_B_BS07

DDR_B_WE#7 DDR_B_CAS#7

DDR_CS3_DIMMB#7

2.2U_0603_6.3V6K

1

2

D D

C C

B B

A A

+VREF_DQ_DIMMB

DDR_B_D0 DDR_B_D1

1

C384

DDR_B_DM0

2

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

1 2

10K_0402_5%

0.1U_0402_10V6K

C618

C616

1

2

5

+1.5V +1.5V

4BA2/6W

4BA2/6W4BA2/6W

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

DDR_B_MA9

R572

1 2

R573 10K_0402_5%R573 10K_0402_5%

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4RN-7F

ME@

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

2 4

DQ4

6

DQ5

8 10 12 14 16

DQ6

18

DQ7

20 22 24 26 28

DM1

30 32 34 36 38 40 42 44 46

DM2

48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102

CK1

104 106 108

BA1

110 112 114

S0#

116 118 120 122

NC2

124 126 128 130 132 134 136

DM4

138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170

DM6

172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

SDA

202

SCL

204

206

G2

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23DDR_B_D18

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3

1/76BA1/86W

1/76BA1/86W1/76BA1/86W

4

DDR_B_DQS#[0..7]7

DDR_B_D[0..63]7

DDR_B_DM[0..7]7

DDR_B_DQS[0..7]7

DDR_B_MA[0..15]7

DRAMRST# 5,10

DDR_CKE3_DIMMB 7

M_CLK_DDR3 7 M_CLK_DDR#3 7

DDR_B_BS1 7 DDR_B_RAS# 7

DDR_CS2_DIMMB# 7 M_ODT2 7

M_ODT3 7

1

2

0.1U_0402_10V6K

C385

+VREF_DQ_DIMMB

2.2U_0603_6.3V6K

C383

1

2

3

Layout Note: Place near DIMM

10U_0603_6.3V6M

C582

1

@

2

1K_0402_1%

For Arranale only +VREF_DQ_ DIMMB supply from a exter nal 1.5V voltage div ide circuit. 07/17/2009

+1.5V

10U_0603_6.3V6M

C576

10U_0603_6.3V6M

C311

1

2

10U_0603_6.3V6M

C587

1

@

2

C313

10U_0603_6.3V6M

C590

1

2

C575

10U_0603_6.3V6M

C312

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C304

C304

C307

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C306

C306

C305

1

2

R341

R340

1

+1.5V

12

+VREF_DQ_DIMMB

12

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

4*0402 1uf

1*0402 2.2uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

PM_EXTTS#1_R 5,10

SMB_DATA_S3 10,12,14,28 SMB_CLK_S3 10,12,14,28

+0.75VS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Issued Date

Layout Note: Place near DIMM

+0.75VS

1U_0603_10V6K

C596

1

2

1U_0603_10V6K

C595

C299

1

2

1U_0603_10V6K

C598

1

2

Compal Secret Data

Deciphered Date

2

1U_0603_10V6K

1

2

2010/01/13 2011/01/13

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

LA-5941P

1

of

11 50Thursday, April 08, 2010

of

11 50Thursday, April 08, 2010

of

11 50Thursday, April 08, 2010

0.3

5

4

3

2

1

Reserve for Low Power CLK GEN. RTM890N-632 SLG8LV597VTR

VDD_3V3_1V5+3VS_CK505

1 2

R2780_0603_5%@R2780_0603_5%

@

D D

+1.5VS

1 2

R2690_0603_5% R2690_0603_5%

1 PCS CAP(0.1u) BY 1 INPUT PIN

VDD_3V3_1V5

10U_0805_6.3V6M

0.1U_0402_10V6K

C336

1

2

C366

0.1U_0402_10V6K

0.1U_0402_10V6K C330

C330

C334

1

2

CLK GEN TO PCH

1. CLK_DMI

2. CLK_BUF_BCLK

3. CLK_BUF_CKSSCD

4. CLK_BUF_DOT96

5. CLK_14M_PCH

C C

CLK GEN TO VGA

1. 27M_CLK

1. 27M_CLK_SS

+1.05VS_CK505+1.05VS

1 2

R2770_0603_5% R2770_0603_5%

1

2

CLK_BUF_DOT9614

CLK_BUF_DOT96#14

CLK_BUF_CKSSCD14

CLK_BUF_CKSSCD#14

CLK_DMI14

CLK_DMI#14

CLK_BUF_DOT96 CLK_BUF_DOT96#

CLK_BUF_CKSSCD CLK_BUF_CKSSCD#

CLK_DMI CLK_DMI#

+3VS_CK505

R318 0_0402_5%R318 0_0402_5%

1 2 1 2

R319 0_0402_5%R319 0_0402_5%

CLOSE U27

R324 0_0402_5%R324 0_0402_5%

1 2

R308

1 2

R307 0_0402_5%R307 0_0402_5%

1 2

R306

1 2

R299

1 2

1 PCS CAP(0.1u) BY 1 INPUT PIN

10U_0805_6.3V6M

C333

0.1U_0402_10V6K

C331

C332

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C335

C335

C343

1

C1212

C1212 47P_0402_50V8J

47P_0402_50V8J

2

0_0402_5%

10K_0402_5%

VDD_3V3_1V5

L_CLK_BUF_DOT96 L_CLK_BUF_DOT96#

CLK_48M_CR_R

CLK_BUF_CKSSCD_R CLK_BUF_CKSSCD#_R

L_CLK_DMI L_CLK_DMI#

CPU_STOP#

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_SRC

+3VS_CK505 +1.05V S_CK505+3VS_CK505 +1.05VS_CK505

32

SCL

31

SDA

30 29 28 27 26 25

24 23 22 21 20 19 18 17

SMB_CLK_S3 SMB_DATA_S3 REF_0/CPU_SEL

CLK_XTAL_IN CLK_XTAL_OUT

CK_PWRGD

VDD_3V3_1V5 R_CLK_BUF_BCLK CLK_BUF_BCLK R_CLK_BUF_BCLK# CLK_BUF_BCLK#

VDD_3V3_1V5

R275 0_0402_5%R275 0_0402_5%

1 2 1 2

R276 0_0402_5%R276 0_0402_5%

U14

1

VDD_USB_48

2

VSS_48M

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

USB_48

9

VSS_27M

10

SATA

11

SATA#

12

VSS_SRC

13

SRC_1

14

SRC_1#

15

VDD_SRC_IO

16

CPU_STOP#

33

TGND

RTM890N-631-VB-GRT_Q FN32_5X5

REF_0/CPU_SEL

CKPWRGD/P D#

VDD_CPU_IO

SA00003HQ10 S IC RTM890N-631-VB-GRT QFN 32P CLK GEN

(SA00003HR00)S IC ICS9LVS3199AKLFT MLF 32P CLK GEN S IC SLG8SP587VTR QFN 32P CLK GEN (SA00002XY00)

CLK_48M_CR_R

12

R3230_0402_5%@R3230_0402_5%

@

R315

12

33_0402_1%

CK_PWRGD

CLK_14M_PCH

2N7002_SOT23-3

SMB_CLK_S3 10,11,14,28 SMB_DATA_S3 10,11,14,28

CLK_14M_PCH 14

CLK_BUF_BCLK 14 CLK_BUF_BCLK# 14

R298

1 2

10K_0402_5%

13

D

2

G

Q25

S

+3VS_CK505

CLK_EN# 48

PIN8 IS GND FOR ICS3197

RF 10/22

B B

+3VS

1 2

R2790_0603_5% R2790_0603_5%

+3VS_CK505

1 PCS CAP(0.1u) BY 1 INPUT PIN

0.1U_0402_10V6K

10U_0805_6.3V6M

C344

1

2

0.1U_0402_10V6K

1

2

C342

0.1U_0402_10V6K

C350

C367

1

C1213

C1213 47P_0402_50V8J

2

47P_0402_50V8J

2

C364

C365

EMI Capacitor

RF 10/22

+1.05VS

CPU_1PIN 30 CPU_0

(Default)

0 133MHz

1

A A

133MHz

100MHz 100MHz

1 2

R317 10K_0402_5%@R317 10K_0402_5%@

1 2

R316 10K_0402_5%R316 10K_0402_5%

PIN8 IS 48MHz FOR ICS3199

CLK_14M_PCH

12

10P_0402_50V8J@

REF_0/CPU_SEL

12

10P_0402_50V8J

SVT RF

REF_0/CPU_SEL

27P_0402_50V8J

Y1

14.318MHZ_20PF_7A14300003

1

C348

2

CLK_XTAL_OUT

CLK_XTAL_IN

12

1

C349

C349 27P_0402_50V8J

27P_0402_50V8J

2

PVT, resize 5032, CL27pF

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Date: Sheet

Compal Electronics, Inc.

CLOCK GENERATOR

LA-5941P

1

of

12 50Thursday, April 08, 2010

of

12 50Thursday, April 08, 2010

of

12 50Thursday, April 08, 2010

0.3

5

PCH_RTCX1

1 2

R154 10M_0402_5%R154 10M_0402_5%

PCH_RTCX2

4

3

2

1

1 4

2 3

D D

+RTCVCC

R144

1 2

100_0603_1%

2

C441

0.1U_0402_16V4Z

1

RF 1103 add

1

C1221

C C

C1221 12P_0402_50V8J

12P_0402_50V8J

2

@

+RTCBATT

15P_0402_50V8J

HDA_BITCLK_CODEC

HDA_SDOUT_CODEC

1

C1222

C1222 12P_0402_50V8J

12P_0402_50V8J

2

@

1

C171

2

EPSON Q13MC1461005000

6.9x1.4x1.3mm

+RTCVCC

R421

1 2

R420

1 2

HΚIntegrated VRM enable

*

Κ

L

Integrated VRM disable

+3VS

R452 1K _0402_5%@R452 1K_0402_5%@

PVT

1M_0402_5%

330K_0402_5%

1 2

GPIO33 = GPO , internal pull-up,should not be pulled low

flash ME core of strap pin pull down

+3VALW+3VALW +3VALW +3VALW +3VS

RefDesPCH Pin

R591

R590

R584

R583

R586

R580

R595

R594

12

@

R72

R72 200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_RST#PCH_JTAG_TDO PCH_JTAG_TDI

12

@

R115

R115 100_0402_1%

100_0402_1%

PCH JTAG Pre-Production

ES1 MPES2

No Install

200ohm

100ohm 100ohm

200ohm

100ohm 100ohm

51ohm

20Kohm 20Kohm

10Kohm 10Kohm

5

12

@

R74

R74 200_0402_5%

200_0402_5%

12

B B

@

R117

R117 100_0402_1%

100_0402_1%

A A

PCH_JTAG_TDI

PCH_JTAG_TCK

PCH_JTAG_RST#

12

@

R73

R73 200_0402_5%

200_0402_5%

12

@

R116

R116 100_0402_1%

100_0402_1%

PCH JTAG Production

*

200ohm

No Install

100ohm

No InstallPCH_JTAG_TDO

200ohm

No Install

No InstallPCH_JTAG_TMS

200ohm

No InstallR587

No Install

51ohm 51ohm

No Install

X1

32.768KHZ_12.5P_MC-146

1

C183

C183 15P_0402_50V8J

15P_0402_50V8J

2

SM_INTRUDER#

PCH_INTVRMEN

PCH_SPKR

+RTCVCC

HDA_BITCLK_CODEC33

HDA_SYNC_CODEC33

HDA_RST_CODEC#33

HDA_SDOUT_CODEC33

1U_0603_10V6K

1 2

R419 20K_0402_1%R419 20K_0402_1%

1 2

R422 20K_0402_1%R422 20K_0402_1%

1U_0603_10V6K

PCH_SPKR33

HDA_SDIN133

ME_FLASH34

+3VALW

C184

C202

1

2

1

2

R168 33_0402_5%R168 33_0402_5%

R167 33_0402_5%R167 33_0402_5%

R169 33_0402_5%R169 33_0402_5%

R166 33_0402_5%R166 33_0402_5%

(2009,07,07)

@

R75

R75 20K_0402_5%

20K_0402_5%

1 2

12

@

R118

R118 10K_0402_5%

10K_0402_5%

PCH_JTAG_TCK

R114 51_0402_5%R114 51_0402_5%

1 2

SPI_CLK_PCH

(2009,05,04)

FOR INTEL DPDG REV1.6 (MAY 2009)

4

12

CLRP3

SHORT PADS

12

CLRP2

SHORT PADS

1 2

R676 0_0402_5%

@

1 2

R677 0_0402_5%R677 0_0402_5%

1 2

SVT

1 2

R409 1K_0402_5%@R409 1K_0402_5%@

1 2

R425 0_0402_5%R425 0_0402_5%

1 2

R424 10K_0402_5%

1 2

@

GPIO13 = GPI,3.3V,SUS

R99

1 2

0_0402_5%

PCH_RTCX1 PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

BITCLK

HDA_SYNC

PCH_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1_RHDA_SDIN1

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

SPI_CLK_PCH_R

SPI_SB_CS0#

SPI_SI

SPI_SO_R

GPIO13

B13 D13

C14

D17

A16

A14

A30

D29

P1

C30

G30

F30

E32

F32

B29

H32

J30

M3

K3

K1

J2

J4

BA2

AV3

AY3

AY1

AV1

U7A

RTCX1 RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

TRST#

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

IBEXPEAK-M_FCBGA1071

RTCIHDA

SPI JTAG

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN SATA1RXP SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

LDRQ0#

SERIRQ

D33 B33 C32 A32

C34

A34 F34

AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

AF15

T3

Y9

V1

GPIO23

T7 PADT7 PAD

GPIO23 = NATIVE,3.3V,CORE

SERIRQ

SATA_ITX_C_DRX_N0 SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N1 SATA_ITX_C_DRX_P1

SATA_DTX_C_IRX_N4 SATA_DTX_C_IRX_P4

SATA_ITX_C_DRX_N4 SATA_ITX_C_DRX_P4

SATAICOMPPCH_JTAG_RST#

1 2

37.4_0402_1%

1 2

R453 10K_0402_5%R453 10K_0402_5%

GPIO21

GPIO19

LPC_AD0 28,34 LPC_AD1 28,34 LPC_AD2 28,34 LPC_AD3 28,34

LPC_FRAME# 28,34

SERIRQ 34

R500

+1.05VS

+3VS

HDD_LED# 38

GPIO21 = GPI,3.3V,CORE

GPIO19 = GPI,3.3V,CORE

SA00003N7A0 (MP)

+3VS

1 2

R101

15_0402_5%

SPI_WP#

3.3K_0402_5%

SPI_HOLD#

3.3K_0402_5%

12

R62

R102

R103

15_0402_5%

SPI_SB_CS0#

1 2

SPI_SO_R SPI_SO_L

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

2

12

R47910K_0402_5% R47910K_0402_5%

SPI_WP#

+3VS

C1400.01U_0402_16V7K C1400.01U_0402_16V7K

12

C1410.01U_0402_16V7K C1410.01U_0402_16V7K

12

12 12

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0

SATA_ITX_DRX_P0

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1

SATA_ITX_DRX_N4_CONN

C1420.01U_0402_16V7K C1420.01U_0402_16V7K

SATA_ITX_DRX_P4_CONN

C1430.01U_0402_16V7K C1430.01U_0402_16V7K

R447

10K_0402_5%

GPIO21

GPIO19

1 2

SATA_DTX_C_IRX_N0 32

SATA_DTX_C_IRX_P0 32 SATA_ITX_DRX_N0 32 SATA_ITX_DRX_P0 32

SATA_DTX_C_IRX_N1 28

SATA_DTX_C_IRX_P1 28 SATA_ITX_C_DRX_N1 28

SATA_ITX_C_DRX_P1 28

R482

R482 10K_0402_5%

10K_0402_5%

1 2

4M SPI ROM FOR HM55 (ME code & BIOS code) SA000021A00 MXIC SA00003K800 Winbond SA00003IN00 E-ON

U3

1

CS#

2

SO

3

WP#

4

GND

MX25L3205DM2I-12G_SO8

+3VS

C460

1 2

0.1U_0402_16V4Z

8

VCC

7

HOLD#

6

SCLK

5

SI

Title

Size Doc ument Number Rev

Custom

Date: Sheet

0.1U_0402_16V4Z

SPI_HOLD# SPI_CLK_PCH

SPI_SI

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

HDD

SSD

SATA_DTX_C_IRX_N4 37 SATA_DTX_C_IRX_P4 37 SATA_ITX_DRX_N4_CONN 37 SATA_ITX_DRX_P4_CONN 37

LA-5941P

1

E-SATA

SPI_CLK_PCH

R100

33_0402_5%

22P_0402_50V8J

13 50Thursday, April 08, 2010

12

@

C138

@

0.3

of

5

PCIE PORT LIST

DEVICEPORT

1

NEW CARD WLAN

2 3

LAN

4

D D

WLAN

LAN

3G

C C

WLAN

B B

LAN

3G

A A

3G

5

X

6

X

7

X

8

X

10/6 Remove Express card

PCIE_PRX_DTX_N228 PCIE_PRX_DTX_P228 PCIE_PTX_C_DRX_N228 PCIE_PTX_C_DRX_P228

PCIE_PRX_DTX_N329 PCIE_PRX_DTX_P329 PCIE_PTX_C_DRX_N329 PCIE_PTX_C_DRX_P329

PCIE_PRX_DTX_N428 PCIE_PRX_DTX_P428 PCIE_PTX_C_DRX_N428 PCIE_PTX_C_DRX_P428

C230 0.1U_0402_10V6KC230 0.1U_0402_10V6K

1 2

C229 0.1U_0402_10V6KC229 0.1U_0402_10V6K

1 2

C223 0.1U_0402_10V6KC223 0.1U_0402_10V6K

1 2

C222 0.1U_0402_10V6KC222 0.1U_0402_10V6K

1 2

C231 0.1U_0402_10V6K

1 2

C232 0.1U_0402_10V6K

1 2

3G@

3G@ 3G@

3G@

10/6 Remove Express card CLK

R431 10K_0402_5%R431 10K_0402_5%

+3VALW

CLK_PCIE_WLAN1#28 CLK_PCIE_WLAN128

WLAN_CLKREQ1#28

CLK_PCIE_LAN#29 CLK_PCIE_LAN29

CLKREQ_LAN#29

CLK_PCIE_CARD_PCH#28 CLK_PCIE_CARD_PCH28

PCIECLKREQ3#28

+3VALW

1 2

R196 0_0402_5%R196 0_0402_5%

1 2

R197 0_0402_5%R197 0_0402_5%

1 2

R454 10K_0402_5%R454 10K_0402_5%

1 2

+3VS

R220 0_0402_5%R220 0_0402_5%

1 2

R221 0_0402_5%R221 0_0402_5%

1 2

R113 10K_0402_5%R113 10K_0402_5%

1 2

+3VS

R223 0_0402_5%3G@R223 0_0402_5%3G@

1 2

R222 0_0402_5%3G@R222 0_0402_5%3G@

1 2

R120 10K_0402_5%R120 10K_0402_5%

1 2

R435 10K_0402_5%R435 10K_0402_5%

1 2

R434 10K_0402_5%R434 10K_0402_5%

1 2

R457 10K_0402_5%R457 10K_0402_5%

1 2

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

GPIO73 = NATIVE,3.3V,SUS

CLK_PCIE_WLAN1#_R CLK_PCIE_WLAN1_R

GPIO18 = NATIVE,3.3V,CORE

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

GPIO20 = NATIVE,3.3V,CORE

CLK_PCIE_CARD_PCH#_R CLK_PCIE_CARD_PCH_R

GPIO25 = NATIVE,3.3V,SUS

GPIO26 = NATIVE,3.3V,SUS

GPIO44 = NATIVE,3.3V,SUS

GPIO56 = NATIVE,3.3V,SUS

GPIO73

GPIO26

GPIO44

GPIO56

4

U7B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M_FCBGA1071

NEW CARD

WLAN

LAN

MINI1

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ# / GPIO47

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

3

LID_OUT#

B9

H14

C8

J14

C6

G8

M14

E10

G12

T13

T11

T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

P43

T42

N50

GPIO11 = NATIVE,3.3V,SUS

SMBCLK

SMBDATA

GPIO60 = NATIVE,3.3V,SUS

GPIO60

SML0CLK

SML0DATA

GPIO74 = NATIVE,3.3V,SUS

GPIO74

SML1CLK

R79

SML1DATA

R80

PEG_CLKREQ#

GPIO47 = 10Kohm PULL DOWN

CLKOUT_DP_N CLKOUT_DP_P

CLK_14M_PCH

CLK_PCI_FB

XTAL25_IN XTAL25_OUT

CLK_PCI_DB_R

GPIO67

1 2

CLK_PCIE_VGA#_R CLK_PCIE_VGA_R

CLK_EXP#_R CLK_EXP_R

R491 90.9_0402_1%R491 90.9_0402_1%

1 2

For CR 48M CLK

EC_LID_OUT# 34

R407

R407 0_0402_5%

0_0402_5%

DTS , read from EC

PEG_CLKREQ# 19

R41210K_0402_5% @R41210K_0402_5% @

R524 0_0402_5%R524 0_0402_5%

1 2

R525 0_0402_5%R525 0_0402_5%

1 2

R105 0_0402_5%R105 0_0402_5%

1 2

R106 0_0402_5%R106 0_0402_5%

1 2

T24 PADT24 PAD T25 PADT25 PAD

CLK_DMI# 12 CLK_DMI 12

CLK_BUF_BCLK# 12 CLK_BUF_BCLK 12

CLK_BUF_DOT96# 12 CLK_BUF_DOT96 12

CLK_BUF_CKSSCD# 12 CLK_BUF_CKSSCD 12

CLK_14M_PCH 12

CLK_PCI_FB 16

+1.05VS

R198

22_0402_5%

@

T9 PADT9 PAD

EC_SMB_CK2

EC_SMB_DA2

CLK_PCIE_VGA# CLK_PCIE_VGA

CLK_PCI_DB 28

SMB_CLK_S3

SMB_DATA_S3

5

3

Q8B

EC_SMB_CK2 31,34

EC_SMB_DA2 31,34

4

CLK_PCIE_VGA# 19

2N7002DW-T/R7_SOT363-6

CLK_EXP# 5 CLK_EXP 5

EMI REQUEST 0303

2

1 2

R121 10K_0402_5%R121 10K_0402_5%

1 2

R406 10K_0402_5%R406 10K_0402_5%

+3VS

2

6 1

2N7002DW-T/R7_SOT363-6

Q8A

EC_THERMAL

CLK_PCIE_VGA 19

Q7B

2N7002DW-T/R7_SOT363-6

R209

R209 22_0402_5%

22_0402_5%

@

1 2 2

C263

C263 10P_0402_50V8J

10P_0402_50V8J

1

@

HYBRID@

3

CLK_14M_PCHCLK_PCI_FB

SMB_CLK_S3

SMB_DATA_S3

SMBCLK

+3VS +3VALW

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

GPIO74

LID_OUT#

GPIO60

SMB_CLK_S3 10,11,12,28

SMB_DATA_S3 10,11,12,28

SMBDATA

+3VS_DELAY

2.2K_0402_5%

2

HYBRID@

Q7A

6 1

5

2N7002DW-T/R7_SOT363-6

4

R413

R413 22_0402_5%

22_0402_5%

SVT

1 2

RF

2

C439

C439 10P_0402_50V8J

10P_0402_50V8J

1

1 2

R123 2.2K_0402_5%R123 2.2K_0402_5%

1 2

R78 2.2K_0402_5%R78 2.2K_0402_5%

1 2

R148 2.2K_0402_5%R148 2.2K_0402_5%

1 2

R147 2.2K_0402_5%R147 2.2K_0402_5%

1 2

R404 2.2K_0402_5%R404 2.2K_0402_5%

1 2

R403 2.2K_0402_5%R403 2.2K_0402_5%

1 2

R399 10K_0402_5%R399 10K_0402_5%

1 2

R145 10K_0402_5%R145 10K_0402_5%

1 2

R400 10K_0402_5%R400 10K_0402_5%

R122

R122 0_0402_5%

0_0402_5%

@

1 2

@

1 2

0_0402_5%

0_0402_5% R119

R119

+3VS_DELAY

R124

HYBRID@

XTAL25_IN

XTAL25_OUT

Nvidia Thermal sensor

R82

2.2K_0402_5%

HYBRID@

SMB_EC_DA2_REC_SMB_DA2

SMB_EC_CK2_REC_SMB_CK2

1

DDR3*2 AND CLK GEN

SMB_CLK_S3SMBCLK

SMB_DATA_S3

SMB_EC_DA2_R 19

SMB_EC_CK2_R 19

1 2

R598 1M_0402_5%R598 1M_0402_5%

Y4

1 2

25MHZ_20PF_7A25000012

1

C630

C630 27P_0402_50V8J

27P_0402_50V8J

2

18->27pF, PVT Y4 resize 5032

C631

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

IBEX-M(2/6)-PCI-E/SMBUS/CLK

LA-5941P

1

of

14 50Thursday, April 08, 2010

0.3

5

4

3

2

1

D D

DMI_CTX_PRX_N06 DMI_CTX_PRX_N16 DMI_CTX_PRX_N26 DMI_CTX_PRX_N36

DMI_CTX_PRX_P06 DMI_CTX_PRX_P16 DMI_CTX_PRX_P26 DMI_CTX_PRX_P36

DMI_CRX_PTX_N06 DMI_CRX_PTX_N16 DMI_CRX_PTX_N26 DMI_CRX_PTX_N36

DMI_CRX_PTX_P06 DMI_CRX_PTX_P16 DMI_CRX_PTX_P26 DMI_CRX_PTX_P36

+1.05VS

1 2

R520 49.9_0402_1%R520 49.9_0402_1%

4mil width and place within 500mil of the PCH

C C

Checklist0.8ΚMEPWROK can be connect to PWROK if iAMT disable

VGATE34,48

ICH_POK34

R396 0.01U_0402_16V7KR396 0.01U_0402_16V7K

R398 0_0402_5%@R398 0_0402_5%@

R397 0_0402_5%@R397 0_0402_5%@

12

1 2

(2009,05,04)

PM_DRAM_PWRGD5

R401

+3VALW

SUS_PWR_DN_ACK34

+3VALW

R450 10K_0402_5%R450 10K_0402_5%

1 2

AC_PRESENT34

B B

+3VALW

R401

R437 10K_0402_5%R437 10K_0402_5%

1 2

R599 0_0402_5%R599 0_0402_5%

PBTN_OUT#34

GPIO31 = GPI,3.3V,SUS

R77 8.2K_0402_1%R77 8.2K_0402_1%

1 2

GPIO30 = GPI,3.3V,SUS

R165 10K_0402_5%R165 10K_0402_5%

1 2

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_IRCOMP

+3VS

R448

MP

10K_0402_5%

SYS_RST#

1 2

SYS_PWROK

R455

0_0402_5%

1 2

R146 10K_0402_5%R146 10K_0402_5%

1 2

PM_DRAM_PWRGD

PM_RSMRST#

12

10K_0402_5%

SUS_PWR_DN_ACK_ R

PBTN_OUT#

AC_PRESENT_R

1 2

R451 0_0402_5%R451 0_0402_5%

GPIO72

U7C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBEXPEAK-M_FCBGA1071

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_IN T

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_M#

System Power Management

PMSYNCH

SLP_LAN# / GPIO29

FDI_CTX_PRX_N1

BH17

FDI_CTX_PRX_N2

BD16

FDI_CTX_PRX_N3

BJ16

FDI_CTX_PRX_N4

BA16

FDI_CTX_PRX_N5

BE14

FDI_CTX_PRX_N6

BA14

FDI_CTX_PRX_N7

BC12

FDI_CTX_PRX_P0

BB18

FDI_CTX_PRX_P1

BF17

FDI_CTX_PRX_P2

BC16

FDI_CTX_PRX_P3

BG16

FDI_CTX_PRX_P4

AW16

FDI_CTX_PRX_P5

BD14

FDI_CTX_PRX_P6

BB14

FDI_CTX_PRX_P7

BD12

FDI_INT

BJ14

FDI_FSYNC0

BF13

FDI_FSYNC1

BH13

FDI_LSYNC0

BJ12

FDI_LSYNC1

BG14

PCIE_WAKE#

J12

GPIO32 = GPO,3.3V,CORE

Y1

GPIO61

P8

SUSCLK

F3

E4

H7

P12

K8

N2

TP23

BJ10

GPIO29 = GPO,3.3V,SUS

F6

FDI_CTX_PRX_N0

BA18

FDI_CTX_PRX_N0 6 FDI_CTX_PRX_N1 6 FDI_CTX_PRX_N2 6 FDI_CTX_PRX_N3 6 FDI_CTX_PRX_N4 6 FDI_CTX_PRX_N5 6 FDI_CTX_PRX_N6 6 FDI_CTX_PRX_N7 6

FDI_CTX_PRX_P0 6 FDI_CTX_PRX_P1 6 FDI_CTX_PRX_P2 6 FDI_CTX_PRX_P3 6 FDI_CTX_PRX_P4 6 FDI_CTX_PRX_P5 6 FDI_CTX_PRX_P6 6 FDI_CTX_PRX_P7 6

FDI_INT 6

FDI_FSYNC0 6

FDI_FSYNC1 6

FDI_LSYNC0 6

FDI_LSYNC1 6

1K_0402_5%

1 2

R108 10K_0402_5% @R108 10K_0402_5% @

1 2

R180 0_0402_5%R180 0_0402_5%

GPIO61 = NATIVE,3.3V,SUS

GPIO62 = NATIVE,3.3V,SUS

Can be left NC when IAMT is not support on the platfrom

If not using integrated LAN,signal may be left as NC.

R436

+3VALW

PCIE_WAKE# 28

SVT

+3VS

PVT

SUSCLK 34

PM_SLP_S5# 34

PM_SLP_S4# 34

PM_SLP_S3# 34

H_PM_SYNC 5

CLKRUN# 34

PCH_ENBKL27 PCH_ENVDD27

PCH_EDID_CLK27 PCH_EDID_DATA27

+3VS

12

12P_0402_50V8J

CRT_HSYNC26 CRT_VSYNC26

PCH_PWM27

R502

2.37K_0402_1%

LVDS_ACLK#27 LVDS_ACLK27

LVDS_A0#27 LVDS_A1#27 LVDS_A2#27

LVDS_A027 LVDS_A127 LVDS_A227

C1214

@

RF 10/22

DAC_BLU26 DAC_GRN26 DAC_RED26

CRT_DDC_CLK26 CRT_DDC_DATA26

R688

22_0402_5%

HYBRID@

HYBRID@ SD028220A80

SD028220A80

PCH_ENBKL PCH_ENVDD

EDID_CLK EDID_DATA

R497

1 2 1 2

R496 10K_0402_5%R496 10K_0402_5%

T10 PADT10 PAD

1

2

R688 33_0402_1%UMA@R688 33_0402_1%UMA@

R687 33_0402_1%UMA@R687 33_0402_1%UMA@

SVT

R687

22_0402_5%

HYBRID@

HYBRID@ SD028220A80

SD028220A80

10K_0402_5%

LVDS_ACLK# LVDS_ACLK

C1215

C1215 12P_0402_50V8J

12P_0402_50V8J

@

DAC_BLU DAC_GRN DAC_RED

CRT_DDC_CLK CRT_DDC_DATA

12 12

HSYNC VSYNC

CRT_IREF

1K_0402_0.5%

R492

12

U7D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M_FCBGA1071

LVDS

CRT

If CRT DAC is not used then a 5% resistor can be used. (checklist 1.6)

SDVO_INTN SDVO_INTP

DDPB_ AUXN DDPB_ AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_ AUXN DDPC_ AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_ AUXN DDPD_ AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40

2.2K_0402_5%

AW38 BA38

HDMICLK_NB

Y49

HDMIDAT_NB

AB49

BE44 BD44 AV40

TMDS_B_DATA2#_PCH

BE40

TMDS_B_DATA2_PCH

BD40

TMDS_B_DATA1#_PCH

BF41

TMDS_B_DATA1_PCH

BH41

TMDS_B_DATA0#_PCH

BD38

TMDS_B_DATA0_PCH

BC38

TMDS_B_CLK#_PCH

BB36

TMDS_B_CLK_PCH

BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

R510 100K_0402_5%R510 100K_0402_5%

R504

UMA@

R675 100K_0402_5%R675 100K_0402_5%

SDVO_T VCLKINN

SDVO_T VCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

12

+3VS

12

R503

2.2K_0402_5%

UMA@

HDMICLK_NB 25 HDMIDAT_NB 25

TMDS_B_HPD 25

C638 0.1U_0402_10V6KUMA@C638 0.1U_0402_10V6KUMA@

1 2

C639 0.1U_0402_10V6KUMA@C639 0.1U_0402_10V6KUMA@

1 2

C640 0.1U_0402_10V6KUMA@C640 0.1U_0402_10V6KUMA@

1 2

C641 0.1U_0402_10V6KUMA@C641 0.1U_0402_10V6KUMA@

1 2

C642 0.1U_0402_10V6KUMA@C642 0.1U_0402_10V6KUMA@

1 2

C643 0.1U_0402_10V6KUMA@C643 0.1U_0402_10V6KUMA@

1 2

C644 0.1U_0402_10V6KUMA@C644 0.1U_0402_10V6KUMA@

1 2

C645 0.1U_0402_10V6KUMA@C645 0.1U_0402_10V6KUMA@

1 2

SVT

HDMI

TMDS_B_DATA2# 25 TMDS_B_DATA2 25 TMDS_B_DATA1# 25 TMDS_B_DATA1 25 TMDS_B_DATA0# 25 TMDS_B_DATA0 25 TMDS_B_CLK# 25 TMDS_B_CLK 25

NC7SZ08P5X_NL_SC70-5

VGATE

ICH_POK

A A

3

1

G

A

Y

2

B

P

5

+3VS

Reserved (2009,09,08)

5

SYS_PWROK

4

U28

EC_RSMRST#34

RSMRST circuit

R402

@R402

@

0_0402_5%

1 2

E

BAV99DW-7_SOT363

D8B

R175

1 2

4.7K_0402_5%

PVT, Common design

E

B

1

2

4

5

6

3

4

C

PM_RSMRST#

123

Q14

Q14 MMBT3906_SOT23-3

MMBT3906_SOT23-3

1 2

R176 4.7K_0402_5%R176 4.7K_0402_5%

D8A

D8A BAV99DW-7_SOT363

BAV99DW-7_SOT363

+3VALW

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

DAC_BLU

DAC_GRN

DAC_RED

EDID_CLK

EDID_DATA

CRT OUT

R493 150_0402_1%R493 150_0402_1%

1 2

R495 150_0402_1%R495 150_0402_1%

1 2

R494 150_0402_1%R494 150_0402_1%

1 2

LVDS EDID

R458 2.2K_0402_5%R458 2.2K_0402_5%

R498 2.2K_0402_5%R498 2.2K_0402_5%

2010/01/13 2011/01/13

+3VS

Compal Secret Dat a

Deciphered Date

2

Compal Electronics, Inc.

Title

IBEX-M(3/6)-DMI/LVDS/DP/PM

Size Document Number Rev

Custom

Date: Sheet

LA-5941P

1

15 50Thursday, April 08, 2010

of

0.3

5

D D

PCI_PIRQA# PCI_PIRQB#

GPIO18 = NATIVE,5V,CORE GPIO52 = NATIVE,5V,CORE GPIO54 = NATIVE,5V,CORE

C C

DGPU_PWMSEL#27

GPIO2 = GPI,5V,CORE GPIO3 = GPI,5V,CORE GPIO4 = GPI,5V,CORE GPIO5 = GPI,5V,CORE

PCI_RST#28,34

R408 100K_0402_1%R408 100K _0402_1%

12

GNT2

Default-Internal pull up

Low=Configures DMI for ESI compatible operation(for servers only.Not for mobile/desktops)

T26

INTERNAL pull -H

CLK_PCI_LPC34 CLK_PCI_FB14

B B

PCI_REQ0#

PCI_PIRQF# PCI_REQ3#

PCI_REQ1# PCI_FRAME# PCI_TRDY# PCI_PIRQH#

PCI_STOP# PCI_IRDY# PCI_PIRQD# DGPU_SELECT#

PCI_GNT3#

A16 swap overide Strap/Top-Block Swap Override jumper

A A

PCI_GNT3#

T26 PAD

PAD

R199 22_0402_5%R199 22_0402_5%

1 2 1 2

R211 22_0402_5%R211 22_0402_5%

RP5

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP7

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP4

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

R200 1K_0402_5%@ R200 1K_0402_5%@

1 2

Low=A16 swap override/Top-Block Swap Override enabled High=Default

PCI_PIRQC# PCI_PIRQD#

PCI_REQ0# PCI_REQ1#

PCI_REQ3#

PCI_GNT0# PCI_GNT1#

PCI_GNT3#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_SERR# PCI_PERR#

PCI_IRDY#

*

PCI_DEVSEL# PCI_FRAME#

PCI_LOCK#

PCI_STOP# PCI_TRDY#

PLT_RST#

CLK_PCI_LPC_R CLK_PCI_FB_R

+3VS +3VS

*

5

H40 N34 C44 A38 C36

J34 A40 D45 E36 H48 E40 C40 M48 M45

F53 M40 M43

J36 K48

F40 C42 K46 M51

K51

L34

F42

J40 G46

F44 M47 H36

J50 G42 H47 G34

G38 H51 B37 A44

F51 A46 B45 M53

F48 K45

F36 H53

B41 K53 A36 A48

E44 E50

A42 H44

F46 C46

D49

D41 C48

N52 P53 P46 P51 P48

PCI_PIRQG# PCI_PIRQC#PCI_PIRQB# PCI_PIRQA# PCI_PIRQE#

PCI_DEVSEL# PCI_LOCK# PCI_SERR# PCI_PERR#

U7E

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22

J52

AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

PIRQA# PIRQB# PIRQC# PIRQD#

REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

K6

PCIRST#

SERR# PERR#

IRDY# PAR DEVSEL# FRAME#

PLOCK#

STOP# TRDY#

M7

PME#

D5

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

IBEXPEAK-M_FCBGA1071

RP3

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP6

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

BUF_PLT_RST#5,28,29

PLTRST_VGA#19

NVRAM

PCI

USB

0.1U_0402_16V4Z

0.1U_0402_16V4Z C646

C646

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AY9

NV_CE#0

BD1

NV_CE#1

AP15

NV_CE#2

BD8

NV_CE#3

AV9

NV_DQS0

BG8

NV_DQS1

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3

NV_ALE

AY6

NV_CLE

AU2

NV_RCOMP

AV7

NV_RB#

AY8 AY5

AV11 BF5

H18

USBP0N

J18

USBP0P

A18

USBP1N

C18

USBP1P

N20

USBP2N

P20

USBP2P

J20

USBP3N

L20

USBP3P

F20

USBP4N

G20

USBP4P

A20

USBP5N

C20

USBP5P

M22

USBP6N

N22

USBP6P

B21

USBP7N

D21

USBP7P

H22

USBP8N

J22

USBP8P

E22

USBP9N

F22

USBP9P

A22

USBP10N

C22

USBP10P

G24

USBP11N

H24

USBP11P

L24

USBP12N

M24

USBP12P

A24

USBP13N

C24

USBP13P

B25

USBRBIAS#

D25

USBRBIAS

N16 J16 F16 L16 E14 G16 F12 T15

PCI_GNT0#

PCI_GNT1#

Boot BIOS Strap

0

1

NC7SZ08P5X_NL_SC70-5

12

1

R155

R155 100K_0402_5%

100K_0402_5%

2

@

12

NC7SZ08P5X_NL_SC70-5

R173

R173 100K_0402_5%

100K_0402_5%

HYBRID@

4

GPIO8

Weak internal PU, don't PD

Check list Rev0.8 section1.23.2 If not implemented, the Braidwood interface signals can be left as No Connect (NC).

*

L Layer Security(TLS) chiper suite with no confidentiality

NV_CLE

within 500mil

NV_RCOMP

R104

1 2

32.4_0402_1%

@

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N5 USB20_P5

USB20_N8 USB20_P8 USB20_N9 USB20_P9

USB20_N11 USB20_P11

USB20_N13 USB20_P13

USBRBIAS

Within 500 mils minimum spacing to other signal is 15mil

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3_R USB_OC#4 USB_OC#5_R USB_OC#6 USB_OC#7

USB20_N0 37 USB20_P0 37 USB20_N1 37 USB20_P1 37 USB20_N2 27 USB20_P2 27 USB20_N3 37 USB20_P3 37

USB20_N5 37 USB20_P5 37

USB20_N8 28 USB20_P8 28 USB20_N9 37 USB20_P9 37 USB20_N10 38 USB20_P10 38 USB20_N11 37 USB20_P11 37

USB20_N13 28 USB20_P13 28

1 2

R164 22.6_0402_1%R164 22.6_0402_1%

1 2

R625 0_0402_5%R625 0_0402_5%

1 2

R626 0_0402_5%R626 0_0402_5%

GPIO27

Default

HighΚEnables the internal VccVRM to have a clean supply for analog rails. no need to use on board filter circuit.

GPIO1 = GPI,3.3V,CORE GPIO6 = GPI,3.3V,CORE GPIO7 = GPI,3.3V,CORE GPIO8 = GPO,3.3V,SUS GPIO12 = GPI,3.3V,SUS

Default-Internal pull up

R212 1K_0402_5%@R212 1K_0402_5%@

1 2

R210 1K_0402_5%@R210 1K_0402_5%@

1 2

4

PCI_GNT1#PCI_GNT0#

1 2

4

U5

Boot BIOS Location

LPC

0

1

Reserved(NAND)

0

PCI

11

SPI

R149 22_0402_5%

@

3

1

G

A

Y

2

B

P

5

+3VS

5

U15

4

Y

HYBRID@

3

P

G

B

A

*

PLT_RST#

2

1

DGPU_HOLD_RST#

+3VS

GPIO15

Intel ME Crypto Transport

Κ

HΚIntel ME Crypto Transport Layer Security(TLS) chiper suite with confidentiality

it have weak internal PU 20K

Do not connect(floating)

Κ

6

USB1

LEFT USB (COMBO)

USB Camera

USB2

CARD READER

WLAN

USB3

FP

Bluetooth

3G CARD

USB_OC#0 37 USB_OC#1 37

USB_OC#5 37

DRAMRST_CNTRL_PCH5

PCH_TEMP_ALERT#34DGPU_SELECT#26,27

DGPU_PWR_EN22,39,45

DGPU_HOLD_RST# GPIO16

DGPU_HPD_INT#24

HDMI HPD FOR PCH

EDIDSEL#

DGPU_EDIDSEL#26,27

Intel Anti-Theft Techonlogy

High=Enabled

NV_ALE

Low=Disable(floating)

NV_ALE

R515 1K_0402_5%@ R515 1K_0402_5%@

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal PU,Do not pull low

NV_CLE

R98 1K_0402_5%@ R98 1K_0402_5%@

3

GPIO0 = GPI,3.3V,CORE

EC_SCI#34

EC_SMI#34

+3VALW

GPIO27 if pull down to turn off 1.8V VR

+3VALW

DRAMRST_CNTRL_PCH GPIO46

+3VALW

HYBRID@

R614 0_0402_5%

1 2

@

R627 0_0402_5%

1 2

HYBRID@

R613 0_0402_5%

1 2

@

R628 0_0402_5%

1 2

HYBRID@

R609 0_0402_5%

1 2

@

R611 0_0402_5%

1 2

HYBRID@

R612 0_0402_5%

1 2

R48310K_0402_5% R48310K_0402_5%

1 2

R42810K_0402_5% R42810K_0402_5%

1 2

R42710K_0402_5% R42710K_0402_5%

EC_SCI#

EC_SMI#

T20

T20 PAD

PAD

1 2

R4331K_0402_5% R4331K_0402_5%

DGPU_PWROK

1 2

R44910K_0402_5% R44910K_0402_5%

@

12

R50710K_0402_5%@R50710K_0402_5%

1 2

R44610K_0402_5% R44610K_0402_5%

12

R43210K_0402_5% R43210K_0402_5%

12

R45610K_0402_5% R45610K_0402_5%

1 2

R48110K_0402_5% R48110K_0402_5%

1 2

R10910K_0402_5% R10910K_0402_5%

1 2

R11210K_0402_5% R11210K_0402_5%

1 2

R7610K_0402_5% R7610K_0402_5%

1 2

R48010K_0402_5% R48010K_0402_5%

PCH_TEMP_ALERT#

1 2

R415 10K_0402_5%R415 10K_0402_5%

GPIO36

GPIO0

GPIO35

GPIO6

GPIO15

GPIO1

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3_R

GPIO0

GPIO1

GPIO6

GPIO15

GPIO16

GPIO22

GPIO28

GPIO34

GPIO35

GPIO36

GPIO37

GPIO38

GPIO39

GPIO45

GPIO48

GPIO57

*

+1.8VS

USB_OC#4

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

USB_OC#5_R USB_OC#6 USB_OC#7

NV_ALE

Enable Intel Anti-Theft Technology

+3VS

Disable Intel Anti-Theft Technology

NV_CLE

DMI termination voltage. weak internal PU, don't PD

2010/01/13 2011/01/13

Κ

U7F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CT RL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M_FCBGA1071

RP1

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP2

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

8.2K PU to +3VS

floating(internal PD)

Compal Secret Data

VGA_PWROK45

Deciphered Date

2

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE 8N

CLKOUT_BCLK0_P / CLKOUT_PCI E8P

GPIO

CPU

NCTF

RSVD

+3VALW

+3VS

+3VALW

2

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

1 2

R429 10K_0402_5%R429 10K_0402_5%

PVT, timing

1 2

R485 1K_0402_1%R485 1K_0402_1%

1 2

PCH_TEMP_ALERT#

R484 10K_0402_5%R484 10K_0402_5%

12

R107 10K_0402_5%R107 10K_0402_5%

@

R426 10K_0402_5%

@

R414 10K_0402_5%

PVT

R5800_0402_5% R5800_0402_5%

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z C687

C687

@

1

AH45 AH46

+3VS

AF48 AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

R110

R110 10K_0402_5%

10K_0402_5%

1 2

H_PECI

KB_RST#

H_THERMTRIP#_LNV_ALE

56_0402_5%

56 5%-->checklist 1.6

54.9 1%-->CRB 1.0

+3VALW

INT3_3V#

TP24

GATEA20 34

CLK_CPU_BCLK# 5

CLK_CPU_BCLK 5

H_PECI 5

KB_RST# 34

H_CPUPWRGD 5

R518

1 2

R519

56_0402_5%

KB_RST#

H_THERMTRIP# 5

12

+VCCP

DRAMRST_CNTRL_PCH

12

R405 10K_0402_5%R405 10K_0402_5%

USB PORT LIST

+3VS

12

DEVICEPORT

DGPU_PWROK

GPIO36

GPIO16

1 2 3 4 5 6 7

USB10 USB/ESATA CMOS USB2

CARD READER

X X

WIRELESS8

9

USB3

10

EC_SCI#

EC_SMI#

DGPU_PWROK

1

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

IBEX-M(4/6)-PCI/USB/GPIO

FingerPrint

BT

11 12

3G

13

LA-5941P

1

of

16 50Thursday, April 08, 2010

R111

R111 10K_0402_5%

10K_0402_5%

0.3

5

4

3

2

1

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

+1.05VS

1U_0402_6.3V6K

C466

1

2

+3VALW

C224

1

2

+1.05VS

PCH_V5REF_SUS

PCH_V5REF_RUN

+3VS

1

C476

0.1U_0402_16V4Z

2

+3VS

1 2

C457 0.1U_0402_16V4ZC457 0.1U_0402_16V4Z

+PCH_VRM

+PCH_VCC1_1_20 +PCH_VCC1_1_21 +PCH_VCC1_1_22 +PCH_VCC1_1_23

1U_0402_6.3V6K

C435

1

2

0.1U_0402_16V4Z

+3VALW

0.1U_0402_16V4Z

C455

1

2

+1.05VS

1U_0402_6.3V6K

C483

1

2

R488 0_0402_5%R488 0_0402_5%

1 2

R487 0_0402_5%R487 0_0402_5%

1 2

R489 0_0402_5%R489 0_0402_5%

1 2

R490 0_0402_5%R490 0_0402_5%

1 2

R410 0_0402_5%R410 0_0402_5%

1 2

R411 0_0402_5%

1 2

@

+1.05VS

+3VALW

+1.5V

+1.05VS

C470

1

2

+1.05VS

C464

1

2

1U_0402_6.3V6K

C473

C474

1

2

+3VS

+PCH_VRM

+1.05VS

10uH inductor, 120mA

L26

1 2

10UH_LB2012T100MR_20%

C507

1 2

C507

C506

220U_B2_2.5VM_R35

10uH inductor, 120mA

L25

L25 10UH_LB2012T100MR_20%

10UH_LB2012T100MR_20%

220U_B2_2.5VM_R35

1U_0402_6.3V6K

+

10U_0603_6.3V6M

C502

1

2

1U_0402_6.3V6K

C462

1

2

10U_0603_6.3V6M

C514

1

2

1

C494

C494 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

C493

C493 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

U7G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IBEXPEAK-M_FCBGA1071

1

12

2

1

2

1.524A

0.042A

0.035A

6mA

+VCCADPLLA+1.05VS

R521

R521 0_0402_5%

0_0402_5%

@

+VCCADPLLB

POWER

VCC CORE

0.059A

DMI

PCI E*

NAND / SPI

FDI

0.069A

CRTLVDS

0.030A

HVCMOS

0.061A

0.156A

0.085A

VCCADAC[1]

VCCADAC[2]

VSSA_DAC[1]

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

VCCVRM[2]

VCCDMI[1]

VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

+3VS_DAC

10U_0805_6.3V6M

0.01U_0402_16V7K

AE50

C477

AE52

1

AF53

2

AF51

+VCCA_LVDS

AH38

AH39

AP43 AP45 AT46

+VCCTX_LVDS

AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

C485

0.01U_0402_16V7K

+3VS

C456 0.1U_0402_16V4ZC456 0.1U_0402_16V4Z

+PCH_VRM +1.8VS

+VCCP

C491 1U_0402_6.3V6KC491 1U_0402_6.3V6K

R423

10_0402_1%

1 2

+3VS

C262

1

2

1 2

C468

1

2

C467

1

2

12

1

2

1 2

0.1U_0402_16V4Z

C478

1

2

R214

R214 0_0402_5%

0_0402_5%

@

0.01U_0402_16V7K

C486

R509

R514 0_0402_5%@R514 0_0402_5%@

1 2

21

D6

CH751H-40PT_SOD323-2

PCH_V5REF_SUS

1

C447

C447 1U_0603_10V6K

1U_0603_10V6K

2

+3VS

PVT

R208

1 2

1_0603_5%

1

2

10U_0603_6.3V6M

0_0402_5%

R508 0_0402_5%R508 0_0402_5%

R501 0_0402_5%

0.01U_0402_16V7K

C490

1

@

2

R213 0.022_0805_1%R213 0.022_0805_1%

1 2

1

SVT

C505

2

10U_0603_6.3V6M

+1.5VS

1 2

@

10_0402_1%

SVT

+3VS

0.1uH inductor, 200mA

L28

0.1UH_MLF1608DR10KT_10%_1608

1

12

C492

R528

2

0_0402_5%

@

check

+1.8VS

+3VS

+5VS +3V S+3VALW+5VALW

21

D9

1 2

D9

CH751H-40PT_SOD323-2

PCH_V5REF_RUN

1

C448

C448 1U_0603_10V6K

1U_0603_10V6K

2

R438

+1.8VS

12

20 mils20 mils

U7J

POWER

0.035A

0.072A

0.073A

>1mA

POWER

0.163A

>1mA

0.357A

6mA

HDA

VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

VCCIO[56]

V5REF_SUS

>1mA

VCC3_3[8]

VCC3_3[9]

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1] VCCSATAPLL[2]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

VCCME[13] VCCME[14] VCCME[15] VCCME[16]

VCCSUSHDA

0.052A

0.344A

USB

1.998A

Clock and Miscellaneous

PCI/GPIO/LPC

3.208A

0.032A

SATA

PCI/GPIO/LPC

CPU

2mA

RTC

V5REF

DG1.1 no M3 support and not Intel LAN, VCCLAN Source=>GND

+1.05VS

R527 0_0402_5%

1 2

D D

C C

B B

A A

12

@

0_0402_5%

lsolate AF32,AF34,AH34 from AH35,AJ35 for Intel request 09.09.08

R486

UPDATE 0210

C516

1

C469

@C469

@

1U_0402_6.3V4Z

2

10U_0603_6.3V6M

C503

1

2

1 2

+RTCVCC

10U_0603_6.3V6M

C515

1

2

0.1U_0402_16V4Z

C453

0.1U_0402_16V4Z

C463

0.1U_0402_16V4Z

C454

0.1U_0402_16V4Z

C139

1

2

+1.05VS

C472

1 2

C461 0.1U_0402_16V4ZC461 0.1U_0402_16V4Z

+1.05VS

10U_0603_6.3V6M

C504

1

2

C452

1 2

0.1U_0402_16V4Z

+PCH_VRM

1U_0402_6.3V6K

C465

1

2

+V1.1A_INT_VCCSUS

+3VALW

+3VS

+VCCP

4.7U_0603_6.3V6K

C500

1

2

0.1U_0402_16V4Z

C442

1

2

T8PAD T8PAD

C471

10U_0603_6.3V6M

C475

+VCCRTCEXT

+VCCADPLLA

+VCCADPLLB

1U_0402_6.3V6K

C484

1

2

+VCCSST

1/3BA4/4W

1/3BA4/4W1/3BA4/4W

1/5BA4/4W

1/5BA4/4W1/5BA4/4W

1/2BA2/2W

1/2BA2/2W1/2BA2/2W

0.1U_0402_16V4Z

C501

1

2

3nBA4/4W

3nBA4/4W3nBA4/4W

C440

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

C489

1

2

0.1U_0402_16V4Z

AP51

AP53

AF23

AF24

Y20

AD38

AD39

AD41

AF43

AF41

AF42

V39

V41

V42

Y39

Y41

Y42

V9

AU24

BB51 BB53

BD51 BD53

AH23

AJ35

AH35

AF34

AH34

AF32

V12

Y22

P18

U19

U20

U22

V15

V16

Y16

AT18

0.1U_0402_16V4Z

AU18

A12

VCCACLK[1]

VCCACLK[2]

VCCLAN[1]

VCCLAN[2]

DCPSUSBYP

VCCME[1]

VCCME[2]

VCCME[3]

VCCME[4]

VCCME[5]

VCCME[6]

VCCME[7]

VCCME[8]

VCCME[9]

VCCME[10]

VCCME[11]

VCCME[12]

DCPRTC

VCCVRM[3]

VCCADPLLA[1] VCCADPLLA[2]

VCCADPLLB[1] VCCADPLLB[2]

VCCIO[21] VCCIO[22] VCCIO[23]

VCCIO[2]

VCCIO[3]

VCCIO[4]

DCPSST

DCPSUS

VCCSUS3_3[29]

VCCSUS3_3[30]

VCCSUS3_3[31]

VCCSUS3_3[32]

VCC3_3[5]

VCC3_3[6]

VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

IBEXPEAK-M_FCBGA1071

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

IBEX-M(5/6)-PWR

LA-5941P

1

17 50Thursday, April 08, 2010

0.3

of

5

U7I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

BG12

BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49

BC10 BC14 BC18

BC22 BC32 BC36 BC40 BC44 BC52

BD48 BD49

BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BF49

BF51 BG18 BG24

BG50

BH11

BH15

BH19

BH23

BH31

BH35

BH39

BH43

BH47

AF39

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

B7

VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179]

BB5

VSS[180] VSS[181] VSS[182] VSS[183]

BC2

VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190]

BH9

VSS[191] VSS[192] VSS[193]

BD5

VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208] VSS[209] VSS[210] VSS[211] VSS[212]

BG4

VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251] VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

D D

C C

B B

A A

4

H49

VSS[259]

H5

VSS[260]

J24

VSS[261]

K11

VSS[262]

K43

VSS[263]

K47

VSS[264]

K7

VSS[265]

L14

VSS[266]

L18

VSS[267]

L2

VSS[268]

L22

VSS[269]

L32

VSS[270]

L36

VSS[271]

L40

VSS[272]

L52

VSS[273]

M12

VSS[274]

M16

VSS[275]

M20

VSS[276]

N38

VSS[277]

M34

VSS[278]

M38

VSS[279]

M42

VSS[280]

M46

VSS[281]

M49

VSS[282]

M5

VSS[283]

M8

VSS[284]

N24

VSS[285]

P11

VSS[286]

AD15

VSS[287]

P22

VSS[288]

P30

VSS[289]

P32

VSS[290]

P34

VSS[291]

P42

VSS[292]

P45

VSS[293]

P47

VSS[294]

R2

VSS[295]

R52

VSS[296]

T12

VSS[297]

T41

VSS[298]

T46

VSS[299]

T49

VSS[300]

T5

VSS[301]

T8

VSS[302]

U30

VSS[303]

U31

VSS[304]

U32

VSS[305]

U34

VSS[306]

P38

VSS[307]

V11

VSS[308]

P16

VSS[309]

V19

VSS[310]

V20

VSS[311]

V22

VSS[312]

V30

VSS[313]

V31

VSS[314]

V32

VSS[315]

V34

VSS[316]

V35

VSS[317]

V38

VSS[318]

V43

VSS[319]

V45

VSS[320]

V46

VSS[321]

V47

VSS[322]

V49

VSS[323]

V5

VSS[324]

V7

VSS[325]

V8

VSS[326]

W2

VSS[327]

W52

VSS[328]

Y11

VSS[329]

Y12

VSS[330]

Y15

VSS[331]

Y19

VSS[332]

Y23

VSS[333]

Y28

VSS[334]

Y30

VSS[335]

Y31

VSS[336]

Y32

VSS[337]

Y38

VSS[338]

Y43

VSS[339]

Y46

VSS[340]

P49

VSS[341]

Y5

VSS[342]

Y6

VSS[343]

Y8

VSS[344]

P24

VSS[345]

T43

VSS[346]

AD51

VSS[347]

AT8

VSS[348]

AD47

VSS[349]

Y47

VSS[350]

AT12

VSS[351]

AM6

VSS[352]

AT13

VSS[353]

AM5

VSS[354]

AK45

VSS[355]

AK39

VSS[356]

AV14

VSS[366]

3

U7H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IBEXPEAK-M_FCBGA1071

2

AK30

VSS[80]

AK31

VSS[81]

AK32

VSS[82]

AK34

VSS[83]

AK35

VSS[84]

AK38

VSS[85]

AK43

VSS[86]

AK46

VSS[87]

AK49

VSS[88]

AK5

VSS[89]

AK8

VSS[90]

AL2

VSS[91]

AL52

VSS[92]

AM11

VSS[93]

BB44

VSS[94]

AD24

VSS[95]

AM20

VSS[96]

AM22

VSS[97]

AM24

VSS[98]

AM26

VSS[99]

AM28

VSS[100]

BA42

VSS[101]

AM30

VSS[102]

AM31

VSS[103]

AM32

VSS[104]

AM34

VSS[105]

AM35

VSS[106]

AM38

VSS[107]

AM39

VSS[108]

AM42

VSS[109]

AU20

VSS[110]

AM46

VSS[111]

AV22

VSS[112]

AM49

VSS[113]

AM7

VSS[114]

AA50

VSS[115]

BB10

VSS[116]

AN32

VSS[117]

AN50

VSS[118]

AN52

VSS[119]

AP12

VSS[120]

AP42

VSS[121]

AP46

VSS[122]

AP49

VSS[123]

AP5

VSS[124]

AP8

VSS[125]

AR2

VSS[126]

AR52

VSS[127]

AT11

VSS[128]

BA12

VSS[129]

AH48

VSS[130]

AT32

VSS[131]

AT36

VSS[132]

AT41

VSS[133]

AT47

VSS[134]

AT7

VSS[135]

AV12

VSS[136]

AV16

VSS[137]

AV20

VSS[138]

AV24

VSS[139]

AV30

VSS[140]

AV34

VSS[141]

AV38

VSS[142]

AV42

VSS[143]

AV46

VSS[144]

AV49

VSS[145]

AV5

VSS[146]

AV8

VSS[147]

AW14

VSS[148]

AW18

VSS[149]

AW2

VSS[150]

BF9

VSS[151]

AW32

VSS[152]

AW36

VSS[153]

AW40

VSS[154]

AW52

VSS[155]

AY11

VSS[156]

AY43

VSS[157]

AY47

VSS[158]

1

IBEXPEAK-M_FCBGA1071

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Doc ument Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

IBEX-M(6/6)-GND

LA-5941P

1

18 50Thursday, April 08, 2010

0.3

of

5

PCIE_CTX_GRX_N[0..15]6

PCIE_CTX_GRX_P[0..15]6

PCIE_CRX_GTX_N[0..15]6

PCIE_CRX_GTX_P[0..15]6

D D

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_N4 PCIE_CRX_C_GTX_N4 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_N5

C C

PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_P9 PCIE_CRX_GTX_N9 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_N10 PCIE_CRX_GTX_P11 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_N12 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_P15 PCIE_CRX_GTX_N15

PLTRST_VGA#16

B B

PCIE_CTX_GRX_N[0..15]

PCIE_CTX_GRX_P[0..15]

PCIE_CRX_GTX_N[0..15]

PCIE_CRX_GTX_P[0..15]

HYBRID@

C120 0.1U_0402_16V7KHYBRID@C120 0.1U_0402_16V7KHYBRID@ C119 0.1U_0402_16V7KHYBRID@C119 0.1U_0402_16V7KHYBRID@ C118 0.1U_0402_16V7KHYBRID@C118 0.1U_0402_16V7KHYBRID@ C117 0.1U_0402_16V7KHYBRID@C117 0.1U_0402_16V7KHYBRID@ C80 0.1U_0402_16V7KHYBRID@C80 0.1U_0402_16V7KHYBRID@ C79 0.1U_0402_16V7KHYBRID@C79 0.1U_0402_16V7KHYBRID@ C78 0.1U_0402_16V7KHYBRID@C78 0.1U_0402_16V7KHYBRID@ C77 0.1U_0402_16V7KHYBRID@C77 0.1U_0402_16V7KHYBRID@ C116 0.1U_0402_16V7KHYBRID@C116 0.1U_0402_16V7KHYBRID@ C115 0.1U_0402_16V7KHYBRID@C115 0.1U_0402_16V7KHYBRID@ C114 0.1U_0402_16V7KHYBRID@C114 0.1U_0402_16V7KHYBRID@ C113 0.1U_0402_16V7KHYBRID@C113 0.1U_0402_16V7KHYBRID@ C112 0.1U_0402_16V7KHYBRID@C112 0.1U_0402_16V7KHYBRID@ C111 0.1U_0402_16V7KHYBRID@C111 0.1U_0402_16V7KHYBRID@ C109 0.1U_0402_16V7KHYBRID@C109 0.1U_0402_16V7KHYBRID@ C110 0.1U_0402_16V7KHYBRID@C110 0.1U_0402_16V7KHYBRID@ C108 0.1U_0402_16V7KHYBRID@C108 0.1U_0402_16V7KHYBRID@ C107 0.1U_0402_16V7KHYBRID@C107 0.1U_0402_16V7KHYBRID@ C105 0.1U_0402_16V7KHYBRID@C105 0.1U_0402_16V7KHYBRID@ C106 0.1U_0402_16V7KHYBRID@C106 0.1U_0402_16V7KHYBRID@ C104 0.1U_0402_16V7KHYBRID@C104 0.1U_0402_16V7KHYBRID@ C103 0.1U_0402_16V7KHYBRID@C103 0.1U_0402_16V7KHYBRID@ C102 0.1U_0402_16V7KHYBRID@C102 0.1U_0402_16V7KHYBRID@ C101 0.1U_0402_16V7KHYBRID@C101 0.1U_0402_16V7KHYBRID@ C100 0.1U_0402_16V7KHYBRID@C100 0.1U_0402_16V7KHYBRID@ C99 0.1U_0402_16V7KHYBRID@C99 0.1U_0402_16V7KHYBRID@ C98 0.1U_0402_16V7KHYBRID@C98 0.1U_0402_16V7KHYBRID@ C97 0.1U_0402_16V7KHYBRID@C97 0.1U_0402_16V7KHYBRID@ C96 0.1U_0402_16V7KHYBRID@C96 0.1U_0402_16V7KHYBRID@ C95 0.1U_0402_16V7KHYBRID@C95 0.1U_0402_16V7KHYBRID@ C94 0.1U_0402_16V7KHYBRID@C94 0.1U_0402_16V7KHYBRID@ C93 0.1U_0402_16V7KHYBRID@C93 0.1U_0402_16V7KHYBRID@

12

R46

10K_0402_5%

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

PLTRST_VGA#

@

CLK_PCIE_VGA14 CLK_PCIE_VGA#14

+3VS_DELAY

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_P15 PCIE_CTX_GRX_N15

PCIE_CRX_C_GTX_P0 PCIE_CRX_C_GTX_N0 PCIE_CRX_C_GTX_P1 PCIE_CRX_C_GTX_N1 PCIE_CRX_C_GTX_P2 PCIE_CRX_C_GTX_N2 PCIE_CRX_C_GTX_P3 PCIE_CRX_C_GTX_N3 PCIE_CRX_C_GTX_P4

PCIE_CRX_C_GTX_P5 PCIE_CRX_C_GTX_N5 PCIE_CRX_C_GTX_P6 PCIE_CRX_C_GTX_N6 PCIE_CRX_C_GTX_P7 PCIE_CRX_C_GTX_N7 PCIE_CRX_C_GTX_P8 PCIE_CRX_C_GTX_N8 PCIE_CRX_C_GTX_P9 PCIE_CRX_C_GTX_N9 PCIE_CRX_C_GTX_P10 PCIE_CRX_C_GTX_N10 PCIE_CRX_C_GTX_P11 PCIE_CRX_C_GTX_N11 PCIE_CRX_C_GTX_P12 PCIE_CRX_C_GTX_N12 PCIE_CRX_C_GTX_P13 PCIE_CRX_C_GTX_N13 PCIE_CRX_C_GTX_P14 PCIE_CRX_C_GTX_N14 PCIE_CRX_C_GTX_P15 PCIE_CRX_C_GTX_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

1 2

R540 200_0402_5% @R540 200_0402_5% @

1 2

R541 2.49K_0402_1% HYBRID@R541 2.49K_0402_1% HYBRID@

HYBRID@

10K_0402_5%

1 2

R542

4

U22A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

AE9

PEX_CLKREQ_N

N11M-LP1_BGA533

HYBRID@

Part 1 of 5

PCI EXPRESS

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11

GPIO

GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

DACB_HSYNC DACB_VSYNC

DACB_RED

DACB_BLUE

DACB_GREEN

DACB_VREF DACB_RSET

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

TEST

TESTMODE

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL I2CC_SDA

I2C DACADACB

I2CH_SCL I2CH_SDA

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTAL_OUT

XTAL_IN

CLK

3

N1 G1 C1 M2 M3 K3 K2 J2 C2 M1 D2 D1 J3 J1 K1 F3 G3 G2 F1 F2

AD2 AD1

AE2 AD3 AE3

AF1 AE1

U6 U4

T5 R4 T4

R6 V6

AF3 AG4 AE4 AF4 AG3

AD25

R1 T3

R2 R3

A2 B1

A3 A4

T1 T2

1 2

R511 0_0402_5% HYBRID@R511 0_0402_5%HYBRID@

1 2

R512 0_0402_5% HYBRID@R512 0_0402_5%HYBRID@

1 2

R577 0_0402_5% HYBRID@R577 0_0402_5%HYBRID@

1 2

R579 0_0402_5% HYBRID@R579 0_0402_5%HYBRID@

VGA_GPIO11

VGA_GPIO14

VGA_CRT_R VGA_CRT_B VGA_CRT_G

DACA_VREF DACA_RSET

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N

TESTMODE

VGA_DDCCLK_C VGA_DDCDATA_C

I2CB_SCL I2CB_SDA

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

HDCP_SMB_CK1 HDCP_SMB_DAI

SMB_EC_CK2_R SMB_EC_DA2_R

HDMI_DETECT_VGA 24

VGA_ENVDD_R 27

VGA_ENABLT 27

VGA_HSYNC 26 VGA_VSYNC 26

VGA_CRT_R 26 VGA_CRT_B 26 VGA_CRT_G 26

12

C81 0.1U_0402_16V4Z

HYBRID@

R48 124_0402_1%HYBRID@R48 124_0402_1%HYBRID@

1 2

R539 10K_0402_5%HYBRID@R539 10K_0402_5%HYBRID@

1 2

R24 10K_0402_5%HYBRID@R24 10K_0402_5%HYBRID@

1 2

R2510K_0402_5% @R2510K_0402_5% @

R517 2.2K_0402_5%HYBRID@R517 2.2K_0402_5%HYBRID@

1 2

R516 2.2K_0402_5%

1 2

HYBRID@

I2CS is internal thermal sensor.

D11

E9

XTALOUT

E10

XTALIN

D10

GPU_VID0 GPU_VID1

PAD

T14

PAD

T13

PAD

T12

PAD

T11

+3VS_DELAY

SMB_EC_CK2_R 14 SMB_EC_DA2_R 14

10K_0402_5%

HYBRID@

10/01 Add

NV_INVTPWM 27

GPU_VID0 45 GPU_VID1 45

+3VS_DELAY

CRT OUT

+3VS_DELAY

2.2K_0402_5%

HYBRID@

I2CS is VDD33 power plane same as EC +3.3VS.

12

R42

12

R34

10K_0402_5%

HYBRID@

N11M-GE1/LP1 (40nm)

VGA_CRT_R VGA_CRT_G VGA_CRT_B

+3VS_DELAY

R499

2

VGA_GPIO11 VGA_GPIO14

R513

10K_0402_5%

@

R537 150_0402_1%HYBRID@R537 150_0402_1%HYBRID@ R538 150_0402_1%HYBRID@R538 150_0402_1%HYBRID@ R530 150_0402_1%HYBRID@R530 150_0402_1%HYBRID@

R478

2.2K_0402_5%

HYBRID@

Device ID

0x0A7D

12

1 2 1 2 1 2

12

R505

R505 10K_0402_5%

10K_0402_5%

@

1

GPIO6GPIO5

VGA_COREGPU_VID00GPU_VID1

00

1

VGA_LVDS_SCL_C

VGA_LVDS_SDA_C

Removed external HDCP. 07/17/2009

1

0.8V

0.85V

0.9V

R64 2.2K_0402_5%HYBRID@R64 2.2K_0402_5%HYBRID@

R63 2.2K_0402_5%HYBRID@R63 2.2K_0402_5%HYBRID@

12

P-State

Deep P12

P8

P0

+3VS_DELAY

+3VS

R543

Q50

10K_0402_5%

2N7002_SOT23

PEG_CLKREQ#14

A A

PEG_CLKREQ#

5

1 2

+3VS_DELAY

2N7002_SOT23

D

1 3

G

2

S

C69

20P_0402_50V8

HYBRID@

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Y2

4

OUT

GND

1

GND

IN

27MHZ_16PF_X7S027000BG1H-U

HYBRID@

1

2

2010/01/13 2011/01/13

3

2

1

C56

C56 20P_0402_50V8

20P_0402_50V8

2

HYBRID@

Compal Secret Data

VGA_DDCCLK_C VGA_DDCDATA_C

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

Deciphered Date

PVT, org SM010010710 121T03

L17 0_0603_5%HYBRID@L17 0_0603_5%HYBRID@

1 2 1 2

L18 0_0603_5%HYBRID@L18 0_0603_5%HYBRID@

L8

1 2 1 2

L7 0_0603_5%HYBRID@L7 0_0603_5%HYBRID@

12P_0402_50V8J

2

0_0603_5%HYBRID@L80_0603_5%HYBRID@

1

C450

@

1

C86

C451

@

2

12P_0402_50V8J

Size Document Number Rev

Date: Sheet

12P_0402_50V8J

Title

N10M-GE1 PCIE,GPIO,CLK

B

1

C85

@

2

12P_0402_50V8J

Compal Electronics, Inc.

LA-5941P

1

VGA_DDCCLK 26

VGA_DDCDATA 26

VGA_LVDS_SCL 27

VGA_LVDS_SDA 27

19 50Thursday, April 08, 2010

of

0.3

5

FBAA[0..13]23

FBBA[2..5]23

FBADQM[0..7]23

FBADQS[0..7]23

FBADQS#[0..7]23

FBAD[0..63]23

U22B

D D

C C

B B

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

U22B

D22

E24

E22 D24 D26 D27 C27

B27

A21

B21 C21 C19 C18 D18

B18 C16

E21

F21 D20

F20 D17

F18 D16

E16

A22 C24 D21

B22 C22

A25

B25

A26 U24

V24

V23 R24

T23 R23

P24

P22

AC24 AB23 AB24

W24

AA22

W23 W22

V22

AA25

W27 W26

W25 AB25 AB26 AD26 AD27

V25

R25

V26 V27

R26

T25 N25 N26

N11M-LP1_BGA533

HYBRID@

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBAA[0..13]

FBBA[2..5]

FBADQM[0..7]

FBADQS[0..7]

FBADQS#[0..7]

FBA_D[0..63]

Part 2 of 5

MEMORY INTERFACE

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FB_VREF

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

FBAA4

F26

FBARAS#

J24

FBAA5

F25

FBA_BA1

M23

FBBA2

N27

FBBA4

M27

FBBA3

K26 J25

FBBACS0#

J27

FBAA11

G23

FBACAS#

G26

FBAWE#

J23

FBA_BA0

M25

FBBA5

K27

FBAA12

G25

FBA_RST

L24

FBAA7

K23

FBAA10

K24 G22

FBAA0

K25

FBAA9

H22

FBAA6

M26

FBAA2

H24

FBAA8

F27

FBAA3

J26

FBAA1

G24

FBAA13

G27

FBA_BA2

M24

FBBAODT0

K22

FBAACS0#

J22

FBAAODT0

L22

FBADQM0

C26

FBADQM1

B19

FBADQM2

D19

FBADQM3

D23

FBADQM4

T24

FBADQM5

AA23

FBADQM6

AB27

FBADQM7

T26

FBADQS#0

D25

FBADQS#1

A18

FBADQS#2

E18

FBADQS#3

B24

FBADQS#4

R22

FBADQS#5

Y24

FBADQS#6

AA27

FBADQS#7

R27

FBADQS0

C25

FBADQS1

A19

FBADQS2

E19

FBADQS3

A24

FBADQS4

T22

FBADQS5

AA24

FBADQS6

AA26

FBADQS7

T27

FB_VREF1

A16

F24 F23

N24 N23

1 2

M22

10K_0402_5%HYBRID@

FBARAS# 23

FBA_BA1 23

FBBA_CKE

FBBACS0# 23

FBACAS# 23 FBAWE# 23 FBA_BA0 23

FBAA12 23

FBAA_CKE

FBAACS0# 23

1.27V~0.9V

FBACLK0 23 FBACLK0# 23

FBACLK1 23 FBACLK1# 23

R26

4

12

FBAA_CKE 23

R23

R23 10K_0402_5%

10K_0402_5%

HYBRID@

FBAAODT0 23

R15

R15 10K_0402_5%

10K_0402_5%

HYBRID@

+1.5VS_VGA

12

R22

R22 10K_0402_5%

10K_0402_5%

HYBRID@

12

R16

R16 10K_0402_5%

10K_0402_5%

HYBRID@

12

R18

R18 10K_0402_5%

10K_0402_5%

HYBRID@

10mil

1

C43

0.01U_0402_16V7K

@

2

FBBA_CKE 23

FBA_RST 23

FBA_BA2 23 FBBAODT0 23

+1.5VS_VGA

12

R30

1.3K_0402_1%

@

R29

1.3K_0402_1%

@

3

VGA_LVDS_ACLK# VGA_LVDS_ACLK

1

C1216

12P_0402_50V8J

1

C1217

C1217 12P_0402_50V8J

2

12P_0402_50V8J

2

@

2

1

RF 10/22

LVDS

R526

VGA_LVDS_ACLK VGA_LVDS_ACLK# VGA_LVDS_A0 VGA_LVDS_A0# VGA_LVDS_A1 VGA_LVDS_A1# VGA_LVDS_A2 VGA_LVDS_A2#

R531

4.7K_0402_5%

1 2

HYBRID@

VGA_LVDS_ACLK27 VGA_LVDS_ACLK#27 VGA_LVDS_A027 VGA_LVDS_A0#27 VGA_LVDS_A127 VGA_LVDS_A1#27 VGA_LVDS_A227 VGA_LVDS_A2#27

+3VS_DELAY

4.7K_0402_5%

HYBRID@

HDMI

VGA_HDMI_SCL24 VGA_HDMI_SDA24

VGA_HDMI_TX2+24

VGA_HDMI_TX2-24

VGA_HDMI_TX1+24

VGA_HDMI_TX1-24

VGA_HDMI_TX0+24

VGA_HDMI_TX0-24

VGA_HDMI_CLK+24

VGA_HDMI_CLK-24

U22C

AC4

IFPA_TXC

AD4

IFPA_TXC_N

V5

IFPA_TXD0

V4

IFPA_TXD0_N

AA5

IFPA_TXD1

AA4

IFPA_TXD1_N

W4

IFPA_TXD2

Y4

IFPA_TXD2_N

AB4

IFPA_TXD3

AB5

IFPA_TXD3_N

AB3

IFPB_TXC

AB2

IFPB_TXC_N

W1

IFPB_TXD4

V1

IFPB_TXD4_N

W3

IFPB_TXD5

W2

IFPB_TXD5_N

AA2

IFPB_TXD6

AA3

IFPB_TXD6_N

AB1

IFPB_TXD7

AA1

IFPB_TXD7_N

G4

IFPC_AUX_I2CW_SCL

G5

IFPC_AUX_I2CW_SDA_N

P4

IFPC_L0

N4

IFPC_L0_N

M5

IFPC_L1

M4

IFPC_L1_N

L4

IFPC_L2

K4

IFPC_L2_N

H4

IFPC_L3

J4

IFPC_L3_N

D3

IFPD_AUX_I2CX_SCL

D4

IFPD_AUX_I2CX_SDA_N

F5

IFPD_L0

F4

IFPD_L0_N

E4

IFPD_L1

D5

IFPD_L1_N

C3

IFPD_L2

C4

IFPD_L2_N

B3

IFPD_L3

B4

IFPD_L3_N

F7

IFPE_AUX_I2CY_SCL

G6

IFPE_AUX_I2CY_SDA_N

D6

IFPE_L0

C6

IFPE_L0_N

A6

IFPE_L1

A7

IFPE_L1_N

B6

IFPE_L2

B7

IFPE_L2_N

E6

IFPE_L3

E7

IFPE_L3_N

N11M-LP1_BGA533

HYBRID@

Part 3 of 5

NCRFU

LVDS / TMDS

GENERAL STRAPSERIAL

IFPAB_RSET

RFU_1 RFU_2 RFU_3 RFU_4 RFU_5

STRAP0

STRAP1

STRAP2

BUFRST_N

THERMDN

THERMDP

CEC

SPDIF

ROM_CS_N

ROM_SCLK

ROM_SI

ROM_SO

IFPC_RSET

IFPD_RSET

IFPE_RSET

C15

NC

D15

NC

J5

NC

T6 W6 Y6 AA6 N3

STRAP0

C7

B9

A9

N5

D8

D9

N2

F9

B10

C9

A10

C10

AB6

R5

M6

F8

STRAP1

STRAP2

PADT2PAD

T2

PADT3PAD

T3

SPDIF_IN

R32 36K_0402_5%

ROM_SCLK

ROM_SI

ROM_SO

R44 1K_0402_1%@R44 1K_0402_1%@

R39 1K_0402_1%HYBRID@R39 1K_0402_1%HYBRID@

R40 1K_0402_1%@R40 1K_0402_1%@

R477 1K_0402_1%@R477 1K_0402_1%@

HYBRID@

1 2

STRAP0 22

STRAP1 22

STRAP2 22

+3VS_DELAY

12

R445

R445 10K_0402_5%

10K_0402_5%

HYBRID@

ROM_SCLK 22

ROM_SI 22

ROM_SO 22

+3VS_DELAY

12

R468

R468 10K_0402_5%

10K_0402_5%

HYBRID@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

N10M-GE1 LVDS,Memory Bus

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

LA-5941P

20 50Thursday, April 08, 2010

1

0.3

of

5

NEAR BGA

+VGA_CORE

NEAR BALL

4.7U 6.3V K X5R 0603

1

C26

HYBRID@

D D

HYBRID@

2

0.1U_0402_10V7K

N10M-GS: 15.8A N11M-GE1:16.7A

C C

120mA

NEAR BGA

+1.8VS_VGA

NEAR BGA

L27

MBK1608121YZF_0603

1 2

HYBRID@

300mA

4.7U 6.3V K X5R 0603

B B

+1.05VS_VGA

L4

MBK1608121YZF_0603

1 2

HYBRID@

285mA

4.7U 6.3V K X5R 0603

NEAR BGA

+3VS_DELAY

A A

L6

HYBRID@L6

HYBRID@

1 2

MBK1608121YZF_0603

220mA

4.7U 6.3V K X5R 0603

+3VS_DELAY

1

2

4.7U 6.3V K X5R 0603

1U_0402_6.3V6K

1

C512

HYBRID@

2

1U_0402_6.3V6K

NEAR BGA

1U_0402_6.3V6K

1

C68

HYBRID@

2

1U_0402_6.3V6K

1

C73

HYBRID@

2

5

C84

HYBRID@

1

C499

HYBRID@

2

1

C498

HYBRID@

2

1

C67

HYBRID@

2

1

C72

HYBRID@

2

1U_0402_6.3V6K

1

2

NEAR BALL

0.1U_0402_10V7K

1

C50

HYBRID@

2

C459

HYBRID@

0.1U_0402_10V7K

NEAR BALL

1

C510

2

0.1U_0402_10V7K

1

C497

2

0.1U_0402_10V7K

1

C74

HYBRID@

2

0.1U_0402_10V7K

1

C62

HYBRID@

2

0.047U_0402_16V7K

1

C38

HYBRID@

2

0.01U_0402_16V7K

0.047U_0402_16V7K

1

C41

HYBRID@

2

0.01U_0402_16V7K

1

HYBRID@

2

0.01U_0402_16V7K

C36

0.01U_0402_16V7K

0.047U_0402_16V7K

NEAR BALL

0.1U_0402_10V7K

C44

HYBRID@

1

C511

HYBRID@

2

1

C496

HYBRID@

2

0.1U_0402_10V7K

1

C66

HYBRID@

2

1

C61

HYBRID@

2

0.1U_0402_10V7K

1

2

+IFPC_PLLVDD

1

2

0.1U_0402_10V7K

HYBRID@

0.1U_0402_10V7K

HYBRID@

NEAR BALL

C63

HYBRID@

1

C39

HYBRID@

2

1

C37

HYBRID@

2

1

C52

HYBRID@

2

C55

HYBRID@

0.1U_0402_10V7K

4

0.01U_0402_16V7K

1

C40

HYBRID@

2

0.01U_0402_16V7K

1

C29

HYBRID@

2

0.01U_0402_16V7K

1

C51

HYBRID@

2

1

C54

HYBRID@

2

+1.05VS_VGA

4

+PEX_SVDD_3V3

+IFPA_IOVDD

+IFPC_IOVDD

12

R4110K_0402_5%

HYBRID@

+IFPAB_PLLVDD

+IFPC_PLLVDD

1 2

R49 0_0402_5%

HYBRID@

@

12

R4710K _0402_5%@R4710K _0402_5%

HYBRID@

12

R4310K _0402_5%

NEAR BGA

L5

HYBRID@L5

HYBRID@

1 2

MBK1608121YZF_0603

220mA

4.7U 6.3V K X5R 0603

1

C82

HYBRID@

2

U22D

J9

VDD

J10

VDD

J12

VDD

J13

VDD

L9

VDD

M9

VDD

M11

VDD

M17

VDD

N9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R9

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

T9

VDD

T11

VDD

T17

VDD

U9

VDD

U19

VDD

W9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

A12

VDD33

B12

VDD33

C12

VDD33

D12

VDD33

E12

VDD33

F12

VDD33

AG9

PEX_SVDD_3V3

V3

IFPA_IOVDD

V2

IFPB_IOVDD

J6

IFPC_IOVD D

H6

IFPDE_IOVDD

AD5

IFPAB_PLLVDD

P6

IFPC_PLLVDD

N6

IFPD_PLLVDD

D7

IFPE_PLLVDD

N11M-LP1_BGA533

HYBRID@

1U_0402_6.3V6K

1

C71

HYBRID@

2

3

PLACE UNDER GPU

Part 4 of 5

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

POWER

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

FB_PLLAVDD

FB_DLLAVDD

FB_CAL_PD_VDDQ

VDD_SENSE

NEAR BALL

+PEX_SVDD_3V3

+IFPAB_PLLVDD

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PLLVDD

DACA_VDD

DACB_VDD

Issued Date

3

A13 B13 C13 D13 D14 E13 F13 F14 F15 F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7

AG7 AF7 AE7 AD8 AD7 AC9

+PEX_PLLVDD

AF9

K6

+SP_PLLVDD

L6

K5

R19

AC19

T19

+DACA_VDD

AG2

+DACB_VDD

W5

B15

R465 40.2_0402_1%HYBRID@R465 40.2_0402_1%HYBRID@

W15

E15

MBK1608121YZF_0603

1

C458

HYBRID@

2

0.1U_0402_10V7K

+DACA_VDD

0.01U_0402_16V7K

0.1U_0402_10V7K

R45 10K_0402_5%HYBRID@R45 10K_0402_5%HYBRID@

L30

12

HYBRID@

NEAR BALL NEAR BGA

1

2

470P_0402_50V7K

2010/01/13 2011/01/13

0.01U_0402_16V7K

1

2

NEAR BALL

1

2

NEAR BALL NEAR BGA

1

2

C53

HYBRID@

2

0.1U_0402_10V7K

1

C46

HYBRID@

2

0.1U_0402_10V7K

1

C47

HYBRID@

2

C28

HYBRID@

0.01U_0402_16V7K

C58

HYBRID@

C60

HYBRID@

0.1U_0402_10V7K

1

2

1

2

C27

HYBRID@

C59

HYBRID@

0.047U_0402_16V7K

1U_0402_6.3V6K

NEAR BALL

0.1U_0402_10V7K

+1.05VS_PLL

12~16mil

+FB_PLLAVDD

1 2

+1.5VS_VGA

The power is base on VRAM type.

+VGASENSE

+3VS_DELAY

0.1U_0402_10V7K

1

C480

HYBRID@

2

0.1U_0402_10V7K

+VGASENSE 45

+FB_PLLAVDD

1

C481

HYBRID@

2

+SP_PLLVDD

120mA

0.1U_0402_10V7K

1

C520

HYBRID@

2

0.1U_0402_10V7K

Deciphered Date

0.1U_0402_10V7K

1

C513

HYBRID@

2

0.1U_0402_10V7K

4700P_0402_25V7K

C523

HYBRID@

1

C522

HYBRID@

2

Compal Secret Data

2

CLOSE TO GPU

1

C42

C32

HYBRID@

2

NEAR BGA

1U_0402_6.3V6K

HYBRID@

2

0.047U_0402_16V7K

1

C83

HYBRID@

2

1U_0402_6.3V6K

1

C49

HYBRID@

2

1U_0402_6.3V6K

NEAR BGA

1U_0402_6.3V6K

NEAR BGA

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

C64

HYBRID@

2

NEAR BGA

1U_0402_6.3V6K

1

C30

HYBRID@

2

1U_0402_6.3V6K

1

C521

HYBRID@

2

0.047U_0402_16V7K

1

C31

HYBRID@

2

4.7U 6.3V K X5R 0603

1

C537

C35

HYBRID@

2

4.7U 6.3V K X5R 0603

1

2

C65

HYBRID@

4.7U 6.3V K X5R 0603

1

C48

HYBRID@

2

1

C45

HYBRID@

2

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

1

C482

HYBRID@

2

4.7U 6.3V K X5R 0603

1

C488

HYBRID@

2

1 2

MBK1608121YZF_0603

1

C23

HYBRID@

2

4.7U 6.3V K X5R 0603

1

C519

HYBRID@

2

4.7U 6.3V K X5R 0603

1

+1.5VS_VGA

4.7U 6.3V K X5R 0603

N11M-GE1:2.55A

1

C24

HYBRID@

2

+1.05VS_VGA

2A

22U_0805_6.3V6M

1

C538

C552

HYBRID@

2

10U_0805_6.3V6M

+1.05VS_VGA

1

C551

C553

HYBRID@

2

10U_0805_6.3V6M

1 2

MBK1608121YZF_0603

HYBRID@

C57

HYBRID@

120mA

L3

+1.05VS_VGA

L21

HYBRID@

12

VID_PLLVDD=45mA SP_PLLVDD=45mA PLLVDD=60mA

L24

1 2

MBK1608121YZF_0603

HYBRID@

L1

HYBRID@

+1.05VS_VGA

FB_PLLVDD=100mA FB_DLLVDD=100mA

L29

MBK1608121YZF_0603

1

C524

HYBRID@

2

Title

Size Document Number Rev

Custom

Date: Sheet

+3VS_DELAY

12

HYBRID@

120mA

Compal Electronics, Inc.

N10M-GE1 PWR

LA-5941P

1

21 50Thursday, April 08, 2010

0.3

of

5

4

3

2

1

A total of 8 signals are required for GB1 strapping this includes

2 reference signals

6 physical strapping pins

4 logical strapping bits

U22E

B2 B5 B8

B11 B14

D D

C C

N11M-GE1 LP1

B B

Memory/PKG

B17 B20 B23 B26

E2 E5 E8

E11 E17 E20 E23 E26

H2 H5

J11 J14 J17

K9

K19

L2 L5

L11 L12 L13 L14 L15 L16

L17 M12 M13 M14 M15 M16

P2 P5

P9 P19 P23 P26

T12 T13

W16

E14

N11M-LP1_BGA533

HYBRID@

Place Components Close to BGA

DDR3

HYBRID@

+1.5VS

Must be used 1% resister for driver calibration

HYBRID@

2N7002DW-T/R7_SOT363-6

DGPU_PWR_EN16,39,45

A A

Q36B

HYBRID@

+3VS_DELAY

R17

@R17

@

150_0603_1%

3

3VDELAY- DGPU_PWR_RC_EN#

5

4

Part 5 of 5

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND_SENSE

GND

FB_CAL_PU_GND

FB_CAL_TERM_GND

MULTI_STRAP_REF1_GND

MULTI_STRAP_REF0_GND

FB_CAL_PU_GND FBCAL_P D_VDDQ

+5VALW

12

R910

HYBRID@R910

HYBRID@

100K_0402_5%

PVT,timing

1 2

R958

R958 33K_0402_1%

61

2

Q36A

Q36A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

HYBRID@

33K_0402_1%

HYBRID@

1

2

U2

GND

U5

GND

U11

GND

U12

GND

U13

GND

U14

GND

U15

GND

U16

GND

U17

GND

U23

GND

U26

GND

V9

GND

V19

GND

W11

GND

W14

GND

W17

GND

Y2

GND

Y5

GND

Y23

GND

Y26

GND

AC2

GND

AC5

GND

AC6

GND

AC8

GND

AC11

GND

AC14

GND

AC17

GND

AC20

GND

AC23

GND

AC26

GND

AF2

GND

AF5

GND

AF8

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF26

GND

T16

GND

T15

GND

T14

GND

F6

GND

A15

B16

F11

F10

C1208

HYBRID@C1208

HYBRID@

0.1U_0402_16V4Z

R28 40.2_0402_1%HYBRID@R28 40.2_0402_1%HYBRID@

1 2

R27 60.4_0402_1%

1 2

HYBRID@

12

R463

40.2K_0402_1%

HYBRID@

FBCAL_TERM_GNDFBVDDQ

40.2 ohm

40.2/60.4 ohm40.2 ohm

DG-04642-001-V01(May 22, 2009)

+3VS

W=60mils

1

C597

@C597

@

4.7U_0805_10V4Z

S

G

2

PVT,chg AO3413 main

2

Q73

HYBRID@

Q73

HYBRID@

D

SI2301BDS-T1-E3_SOT23-3

1 3

+3VS_DELAY_R

+3VS_DELAY

R761

0_0603_5%

HYBRID@

12

R464

40.2K_0402_1%

HYBRID@

12

A total of 24 logical strapping bits are available

+3VS

12

R474

PVT DeviceID 0A6E

STRAP220 STRAP120 STRAP020 ROM_SCLK20

ROM_SI20

ROM_SO20

R474

34.8K_0402_1%

HYBRID@

STRAP2 STRAP1 STRAP0 ROM_SCLK ROM_SI ROM_SO

@

12

R475

@

24.9K_0402_1%

FB Memory (DDR3)

12

R911

R911 100K_0402_5%

100K_0402_5%

HYBRID@

VGA1.8EN-

2

K4W1G1646E-HC12

H5TQ1G63BFR-12C

DGPU_PWR_RC_EN#

R156

R156 0_0402_5%

0_0402_5%

@

1 2

PVT,timing

1 2

R959

R959 100K_0402_1%

100K_0402_1%

HYBRID@

61

Q59A

Q59A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

HYBRID@

LP1 (0x0A7D) 40nm

HYBRID@ 1021 add

Q59B

2N7002DW-T/R7_SOT363-6

Q59B

HYBRID@

DGPU_PWR_EN

+1.8VS_VGA

R86 150_0603_1%

150_0603_1%

3

4

Samsung 800MHz (defaul)

Hynix 800MHz

+5VALW

@R86

@

5

R472

34.8K_0402_1%

R471

34.8K_0402_1%

12

R473

HYBRID@

45.3K_0402_1%

12

R476

@

10K_0402_5%

ROM_SO

PD 10K

12

R51

@

4.99K_0402_1%

R50

HYBRID@

15K_0402_1%

12

R469

@

2K_0402_5%

12

R470

X76@

20K_0402_1%

PD 15K

12

R467

@

2K_0402_5%

12

R466

HYBRID@

10K_0402_5%

STRAP1 use for 3GIO_PADCFG to set 35K pull up. (PUN-04335-001_V10 HW9 update)

ROM_SIROM_SCLK STRAP0STRAP1STRAP2GPU

PU 30K

PD 15K64Mx16

PU 30K

PU 35KN11M-GE1

PU 35K

PU 45KPD 10K PD 20K64Mx16

PU 45K

X76

+1.8VS

W=60mils

1

C628

@C628

@

4.7U_0805_10V4Z

S

G

2

Q75

HYBRID@

Q75

HYBRID@

D

SI2301BDS-T1-E3_SOT23-3

1 3

+1.8VS_DELAY_R

R762

0_0603_5%

HYBRID@

+1.8VS_VGA

12

1

C1209

2

0.1U_0402_16V4Z

2

HYBRID@C1209

HYBRID@

PVT,chg AO3413 main

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

N10M-GE1 GND & STRAP

LA-5941P

22 50Thursday, April 08, 2010

of

1

of

0.3

5

N10x 40nm DDR3 MAPPING NVIDIA COCUMENT FOR DA-3978-001

FBAA[0..13]20

FBBA[2..5]20

FBADQM[0..7]20

FBADQS[0..7]20

FBADQS#[0..7]20

D D

FBAD[0..63]20

C C

FBAA[0..13]

FBBA[2..5]

FBADQM[0..7]

FBADQS[0..7]

FBADQS#[0..7]

FBAD[0..63]

+VRAM_VREFB

+VRAM_VREFA

FBAA0 FBAA1 FBAA2 FBAA3 FBAA4 FBAA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11 FBAA12 FBAA13

R12

R12 240_0402_1%

240_0402_1%

HYBRID@

FBA_BA0 FBA_BA1 FBA_BA2

FBAAODT0 FBAACS0# FBARAS# FBACAS# FBAWE#

FBADQS1 FBADQS3

FBADQM1 FBADQM3

FBADQS#1 FBADQS#3

FBA_RST

12

FBA_BA020 FBA_BA120 FBA_BA220

FBACLK0#20 FBACLK1#20 FBAA_CKE20

FBAAODT020 FBBAOD T020 FBAACS0#20 FBBACS0#20

FBARAS#20 FBACAS#20 FBAWE#20

FBA_RST20

FBAA_CKE

U21

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

4

+VRAM_VREFB

+VRAM_VREFA

FBAD9

E4

FBAD14

F8

FBAD8

F3

FBAD12

F9

FBAD10

H4

FBAD13

H9

FBAD11

G3

FBAD15

H8

FBAD26

D8

FBAD29

C4

FBAD24

C9

FBAD25

C3

FBAD28

A8

FBAD31

A3

FBAD27

B9

FBAD30

A4

+1.5VS_VGA

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

+1.5VS_VGA

VDD

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2 B10 D2 D9 E3 E9 F10 G2 G10

1

3

R21

R21 240_0402_1%

240_0402_1%

HYBRID@

FBAA0 FBAA1 FBAA2 FBAA3 FBAA4 FBAA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11 FBAA12 FBAA13

FBA_BA0 FBA_BA1 FBA_BA2

FBACLK0

FBAA_CKE

FBAAODT0 FBAACS0# FBARAS# FBACAS# FBAWE#

FBADQS2 FBADQS0

FBADQM2 FBADQM0

FBADQS#2 FBADQS#0

FBA_RST

12

U2

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E4 F8 F3 F9 H4 H9 G3 H8

D8 C4 C9 C3 A8 A3 B9 A4

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2 B10 D2 D9 E3 E9 F10 G2 G10

FBAD21 FBAD17 FBAD20 FBAD16

2

FBAD22 FBAD18 FBAD23 FBAD19

FBAD4 FBAD1 FBAD7 FBAD0 FBAD5

0

FBAD2 FBAD6 FBAD3

+1.5VS_VGA

3

+VRAM_VREFD

+VRAM_VREFC

U1

M9

VREFCA

H2

FBAA0 FBAA1 FBBA2 FBBA3 FBBA4 FBBA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11 FBAA12 FBAA13

FBA_BA0 FBA_BA1 FBA_BA2

R7

R7 240_0402_1%

240_0402_1%

HYBRID@

FBACLK1 FBACLK1#FBACLK0#

FBBA_CKE

FBBAODT0 FBBACS0#

FBARAS# FBACAS# FBAWE#

FBADQS4 FBADQS7

FBADQM4 FBADQM7

FBADQS#4 FBADQS#7

FBA_RST

12

FBACLK120FBACLK020

FBBA_CKE20

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

2

+VRAM_VREFD

+VRAM_VREFC

U23

FBAD37

E4

FBAD36

F8

FBAD35

F3

FBAD32

F9

FBAD39

H4 H9

FBAD38

G3

FBAD33

H8

FBAD61

D8

FBAD57

C4

FBAD56

C9

FBAD62

C3

FBAD58

A8

FBAD63

A3

FBAD59

B9

FBAD60

A4

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

+1.5VS_VGA

VDD

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2 B10 D2 D9 E3 E9 F10 G2 G10

FBAA0 FBAA1

45

FBBA2 FBBA3 FBBA4 FBBA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11

76

FBAA12 FBAA13

FBA_BA0 FBA_BA1 FBA_BA2

FBACLK1 FBACLK1# FBBA_CKE

FBBAODT0 FBBACS0# FBARAS# FBACAS# FBAWE#

FBADQS5 FBADQS6

FBADQM5 FBADQM6

FBADQS#5 FBADQS#6

FBA_RST

12

R523

R523 240_0402_1%

240_0402_1%

HYBRID@

U23

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E4 F8 F3 F9 H4 H9 G3 H8

D8 C4 C9 C3 A8 A3 B9 A4

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2 B10 D2 D9 E3 E9 F10 G2 G10

FBAD42 FBAD46 FBAD40 FBAD45 FBAD41 FBAD47FBAD34 FBAD44 FBAD43

FBAD50 FBAD52 FBAD49 FBAD53 FBAD48 FBAD54 FBAD51 FBAD55

+1.5VS_VGA

1

+1.5VS_VGA+1.5VS_VGA

FBACLK0

B B

A A

FBACLK0#

FBACLK1

FBACLK1#

5

1 2

12

HYBRID@

243_0402_1%

243_0402_1% R442

R442

R14

R14 243_0402_1%

243_0402_1%

HYBRID@

+1.5VS_VGA

220U_B2_2.5VM_R35

C436

1

+

2

HYBRID@

+1.5VS_VGA

10U_0603_6.3V6M

C21

HYBRID@

+1.5VS_VGA

HYBRID@

1U_0402_6.3V6K

+1.5VS_VGA

HYBRID@

1U_0402_6.3V6K

1

C518

HYBRID@

2

10U_0603_6.3V6M

1U_0402_6.3V6K

C517

1

HYBRID@

2

1U_0402_6.3V6K

C526

1

HYBRID@

2

4

1

HYBRID@

2

1

HYBRID@

2

1

HYBRID@

2

C509

C438

10U_0603_6.3V6M

1

C444

HYBRID@

2

10U_0603_6.3V6M

C128

1

HYBRID@

2

1U_0402_6.3V6K

C10

1

HYBRID@

2

1U_0402_6.3V6K

1

C3

HYBRID@

2

C5

1

2

1U_0402_6.3V6K

C9

1

HYBRID@

2

10U_0603_6.3V6M

1

C6

2

1U_0402_6.3V6K

1

HYBRID@

2

1

2

1U_0402_6.3V6K

1

C7 10U_0603_6.3V6M

HYBRID@

2

C487

C20

1

HYBRID@

2

1U_0402_6.3V6K

C17

C18

1

HYBRID@

2

1U_0402_6.3V6K

C479

1

2

C12

1

HYBRID@

2

1U_0402_6.3V6K

+1.5VS_VGA

12

R20

1.33K_0402_1%

HYBRID@

12MIL 12MIL

12

C22

R19

1.33K_0402_1%

HYBRID@

1U_0402_6.3V6K

C437

1

HYBRID@

2

1U_0402_6.3V6K

HYBRID@

2

C11

1

HYBRID@

2

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C445

HYBRID@

1U_0402_6.3V6K

C16

HYBRID@

1U_0402_6.3V6K

C446

1

2

C19

1

2

C525

1

HYBRID@

2

R9

1.33K_0402_1%

HYBRID@

R8

1.33K_0402_1%

HYBRID@

Compal Secret Dat a

2010/01/13 2011/01/13

Compal Secret Dat a

C22

+1.5VS_VGA

12

12MIL 12MIL

12

C8

Deciphered Dat e

+1.5VS_VGA

+VRAM_VREFA +VRAM_VREFB

0.1U_0402_10V6K

1

HYBRID@

2

1.33K_0402_1%

HYBRID@

1.33K_0402_1%

HYBRID@

R11

12

0.1U_0402_10V6K

1

C4

R10

C4

HYBRID@

2

12

R11

+1.5VS_VGA

12

R529

+VRAM_VREFC +VRAM_VREFD

0.1U_0402_10V6K

1

HYBRID@

2

1.33K_0402_1%

HYBRID@

1.33K_0402_1%

HYBRID@

R529

12

0.1U_0402_10V6K

R522

1

C495

HYBRID@

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

Compal Electronics, Inc.

VRAM DDR3

LA-5941P

1

0.3

23 50Thursday, April 08, 2010

0.3

of

5

4

3

2

1

From VGA

C284 0.1U_0402_16V7K HYBRID@C284 0.1U_0402_16V7K HYBRID@

VGA_HDMI_CLK+20 VGA_HDMI_CLK-20 VGA_HDMI_TX0+20 VGA_HDMI_TX0-20 VGA_HDMI_TX1+20

D D

VGA_HDMI_TX1-20 VGA_HDMI_TX2+20 VGA_HDMI_TX2-20

1 2

C283 0.1U_0402_16V7K HYBRID@C283 0.1U_0402_16V7K HYBRID@

1 2

C282 0.1U_0402_16V7K HYBRID@C282 0.1U_0402_16V7K HYBRID@

1 2

C281 0.1U_0402_16V7K HYBRID@C281 0.1U_0402_16V7K HYBRID@

1 2

C601 0.1U_0402_16V7K HYBRID@C601 0.1U_0402_16V7K HYBRID@

1 2

C600 0.1U_0402_16V7K HYBRID@C600 0.1U_0402_16V7K HYBRID@

1 2

C614 0.1U_0402_16V7K HYBRID@C614 0.1U_0402_16V7K HYBRID@

1 2

C599 0.1U_0402_16V7K HYBRID@C599 0.1U_0402_16V7K HYBRID@

1 2

Near L33,L34,L35,L36

From Level Shiftter

HDMI_CLK+_CK25

HDMI_CLK-_CK25 HDMI_TX0+_CK25 HDMI_TX0-_CK25 HDMI_TX1+_CK25 HDMI_TX1-_CK25 HDMI_TX2+_CK25 HDMI_TX2-_CK25

C C

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

B B

A A

NEAR CONNECT

HDMI_CLK+_CK

HDMI_CLK-_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_TX1+_CK

HDMI_TX1-_CK

HDMI_TX2+_CK

HDMI_TX2-_CK

HDMI_CLK+_CK HDMI_CLK-_CK HDMI_TX0+_CK HDMI_TX0-_CK HDMI_TX1+_CK HDMI_TX1-_CK HDMI_TX2+_CK HDMI_TX2-_CK

R585 499_0402_1%HYBRID@R585 499_0402_1%HYBRID@

R583 499_0402_1%HYBRID@R583 499_0402_1%HYBRID@

R589 499_0402_1%HYBRID@R589 499_0402_1%HYBRID@

R587 499_0402_1%HYBRID@R587 499_0402_1%HYBRID@

R593 499_0402_1%HYBRID@R593 499_0402_1%HYBRID@

R591 499_0402_1%HYBRID@R591 499_0402_1%HYBRID@

R597 499_0402_1%HYBRID@R597 499_0402_1%HYBRID@

R595 499_0402_1%HYBRID@R595 499_0402_1%HYBRID@

1

4

1

4

1

4

1

4

HDMI_CLK+_CK HDMI_CLK-_CK HDMI_TX0+_CK HDMI_TX0-_CK HDMI_TX1+_CK HDMI_TX1-_CK HDMI_TX2+_CK HDMI_TX2-_CK

1 2

L33

@L33

@

1

4

WCM-2012-900T_4P

L34

@L34

@

1

4

WCM-2012-900T_4P

L35

@L35

@

1

4

WCM-2012-900T_4P

L36

@L36

@

1

4

WCM-2012-900T_4P

R584 0_0402_5%R584 0_0402_5%

1 2

R582 0_0402_5%R582 0_0402_5%

1 2

R588 0_0402_5%R588 0_0402_5%

1 2

R586 0_0402_5%R586 0_0402_5%

1 2

R592 0_0402_5%R592 0_0402_5%

1 2

R590 0_0402_5%R590 0_0402_5%

1 2

R596 0_0402_5%R596 0_0402_5%

1 2

R594 0_0402_5%R594 0_0402_5%

1 2

5

2

3

2

3

2

3

2

3

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

13

D

HYBRID@

S

Q41

Q41 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

HDMI_CLK+_CONN

HDMI_CLK-_CONN HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_CLK+_CK HDMI_CLK-_CK HDMI_TX0+_CK HDMI_TX0-_CK HDMI_TX1+_CK HDMI_TX1-_CK HDMI_TX2+_CK HDMI_TX2-_CK

VGA_HDMI_SDA20

VGA_HDMI_SCL20

+3VS

HP_DET#25

R618 0_0402_5%

HYBRID@

Q52

Issued Date

1 2

HYBRID@

+3VS_DELAY

R617

R617 10K_0402_1%

10K_0402_1%

HYBRID@

1 2

13

D

2

G

S

+5VS +5VS

3

2

2010/01/13 2011/01/13

3

DGPU_HPD_INT#16

HDMI_DETECT_VGA19

2

+3VS

G

4

HDMI_DETECT_VGA

2N7002W-T/R7_SOT323-3

Security Classification

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HP_DET#DGPU_HPD_INT#

Q53

2N7002W-T/R7_SOT323-3

Q53

HDMIDAT_R

1

@

D24

D24 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

R615

R615 10K_0402_1%

10K_0402_1%

UMA@

1 2

13

D

2

G

S

3

2

Compal Secret Data

Deciphered Date

+3VS_DELAY

5

4

2

Q84A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

C678

1

0.1U_0402_16V4Z

2

HP_DET25

1

@

D25

D25 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

3

Q84B

HYBRID@Q84B

HYBRID@

2N7002DW-T/R7_SOT363-6

61

HYBRID@Q84A

HYBRID@

+5VS

HDMIDAT_R25 HDMICLK_R25

HDMICLK_R

R616

100K_0402_5%

1 2

W=40mils

PMEG2010ET SOT23

2.2K_0402_5%

HDMIDAT_R HDMICLK_R

2

HYBRID@

12P_0402_50V8J

HP_DET

D28

2 1

R249

1 2

HDMIDAT_R

HDMICLK_R

1

C611

C603

HYBRID@

2

12P_0402_50V8J

R581 0_0805_5%

@

F2

+5VS_HDMI_R

R257

2.2K_0402_5%

1 2

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

F2

2 1

1.1A_6V_SMD1812P110TF

R603 0_0805_5%

@

+5VS_HDMI

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

C627

1

0.1U_0402_16V4Z

2

HP_DET

HDMI CONN

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

FOX_QJ1119L-NVBT-7H

ME@

LA-5941P

GND1 GND2

1

PVT DIP type

20 21

24 50Thursday, April 08, 2010

0.3

of

5

4

3

2

1

P/N:SA00003GT00 (ASM1442)

FOR asmedia

R428 STUFF

RESERVE THE R668 PULL UP TO 3VS

D D

1442_VCC

12

R242

4.7K_0402_5%

UMA@

12

@

R243

R243 0_0402_5%

0_0402_5%

C C

1442_VCC

HDMICLK_R24

HDMIDAT_R24

R254 R255

TMDS_B_CLK15 TMDS_B_CLK#15

TMDS_B_DATA015 TMDS_B_DATA0#15

TMDS_B_DATA115 TMDS_B_DATA1#15

TMDS_B_DATA215 TMDS_B_DATA2#15

RESERVE THE R670 PULL DOWN TO GND

CHANGE R245 FROM 499 TO 3.4K OHM

U12

HP_DET#24

HP_DET24

4.7K_0402_5%

1 2 1 2

4.7K_0402_5%

R244

@R254

@ @R255

@

HP_DET#

HDMICLK_R

HDMIDAT_R

1 2

R256

4.7K_0402_5%

@

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

34

CFG0

35

CFG1

internal pull down

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

output

internal pull down

input

VCC VCC VCC VCC VCC VCC VCC VCC

PC1 PC0

REXT

HPD#

SDA

SCL

RT_EN#

OUT_D4+ OUT_D4-

OUT_D3+ OUT_D3-

OUT_D2+ OUT_D2-

OUT_D1+ OUT_D1-

1

UMA@

C280

0.1U_0402_16V4Z

2

2 11 15 21 26 33 40 46

4 3

internal pull down

R245 3.4K_0402_1%UMA@R245 3.4K_0402_1%UMA@

6

7

8

9

10

13 14

16 17

19 20

22 23

1 2

TMDS_B_HPD

R232 4.7K_0402_5%@R232 4.7K_0402_5%@

HDMI_CLK+_CK HDMI_CLK-_CK

HDMI_TX0+_CK HDMI_TX0-_CK

HDMI_TX1+_CK HDMI_TX1-_CK

HDMI_TX2+_CK HDMI_TX2-_CK

R332 0_0402_5%R332 0_0402_5% R333 0_0402_5%R333 0_0402_5%

R247

R334

1 2

1442_VCC

@R247

@

@R334

@

1 2 1 2

1

2

1

UMA@

C602

0.1U_0402_16V4Z

2

12 12

4.7K_0402_5%

1 2

4.7K_0402_5%

1 2

R246 4.7K_0402_5%UMA@R246 4.7K_0402_5%UMA@ R248 4.7K_0402_5%@R248 4.7K_0402_5%@

HDMI_CLK+_CK 24 HDMI_CLK-_CK 24

HDMI_TX0+_CK 24 HDMI_TX0-_CK 24

HDMI_TX1+_CK 24 HDMI_TX1-_CK 24

HDMI_TX2+_CK 24 HDMI_TX2-_CK 24

UMA@

C604

0.1U_0402_16V4Z

1442_VCC

TMDS_B_HPD 15

HDMIDAT_NB 15

HDMICLK_NB 15

1442_VCC

1

UMA@

C285

C285 10U_0805_10V4Z

10U_0805_10V4Z

2

1442_VCC

R559 0_0805_5%R559 0_0805_5%

1 2

TMDS_B_HPD

SVT CLOSE ASM1442

+3VS

R674 100K_0402_5%

12

HYBRID@

1

TMDS_B_CLK#

B B

SVT

12

R670

2.2K_0402_5%

UMA@

ASM1442_QFN48_7X7

UMA@

GND GND GND GND GND GND GND GND GND GND

PAD

5 12 18 24 27 31 36 37 43 49

12

R261

R261 0_0402_5%

0_0402_5%

R280

R280 0_0402_5%

0_0402_5%

1 2

R331

R331 0_0402_5%

0_0402_5%

1 2

FOR PS8171

Pin1 R331 NC Pin3 R248,R334 NC Pin4 R246,R247 NC Pin6 R245 499ohm Pin11 R332 NC Pin12 R280 NC

Pin27 R261 NC

Pin33 R333 NC Pin34 R254 4.7K ohm

A A

Security Classification

2010/01/13 2011/01/13

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Level Shiftter_ASM1442

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

LA-5941P

of

25 50Thursday, April 08, 2010

1

0.3

A

UMA ONLY BYPASS

1 1

DAC_RED

DAC_GRN

CRT_HSYNC

SVT

CRT_VSYNC

CRT_DDC_DATA

CRT_DDC_CLK

+3VS

From VGA

VGA_CRT_R19

2 2

VGA_CRT_G19 VGA_CRT_B19

VGA_HSYNC19

VGA_VSYNC19

VGA_DDCDATA19

VGA_DDCCLK19

DAC_RED15

DAC_GRN15

DAC_BLU15

CRT_HSYNC15

CRT_VSYNC15 CRT_DDC_DATA15 CRT_DDC_CLK15

VGA_DDCDATA VGA_DDCCLK

DAC_RED DAC_GRN

DAC_BLU CRT_HSYNC CRT_VSYNC

CRT_DDC_DATA CRT_DDC_CLK

From PCH

+3VS

12

R381

3 3

CRT_DDC_DATA CRT_DDC_CLK

VGA_DDCDATA VGA_DDCCLK

4 4

R381

2.2K_0402_5%

R159

2.2K_0402_5%

HYBRID@

+3VS_DELAY

12

1 2

R92 0_0402_5%UMA@R92 0_0402_5%UMA@

1 2

R91 0_0402_5%UMA@R91 0_0402_5%UMA@

1 2

R93 0_0402_5%UMA@R93 0_0402_5%UMA@

1 2

R129 33_0402_1%UMA@R129 33_0402_1%UMA@

1 2

R130 33_0402_1%UMA@R130 33_0402_1%UMA@

1 2

R322 0_0402_5%UMA@R322 0_0402_5%UMA@

1 2

R328 0_0402_5%UMA@R328 0_0402_5%UMA@

PVT

U38

HYBRID@U38

HYBRID@

4 16 23 29 32

27 25 22 20 18 12 14

26 24 21 19 17 13 15

PI3V712-AZLEX_TQFN32_6X3~D

R610

2.2K_0402_5%

R162

2.2K_0402_5%

HYBRID@

VDD VDD VDD VDD VDD

0B1 1B1 2B1 3B1 4B1 5B1 6B1

0B2 1B2 2B2 3B2 4B2 5B2 6B2

A0 A1 A2 A3 A4

SEL1

A5 A6

SEL2

GND GND GND GND

GPAD

PVT

DGPU_DDC_SEL#

HSYNC_G

VSYNC_G

CRT_DAT

CRT_CLK

1 2 5 6 7

8

9 10

DGPU_DDC_SEL#

30

3 11 28 31 33

CRT_R

CRT_G

CRT_BDAC_BLU

CRT_R CRT_G CRT_B HSYNC_G VSYNC_G

DGPU_SELECT#

CRT_DAT CRT_CLK

R441 0_0402_5%

1 2

R443 0_0402_5%R443 0_0402_5%

1 2

B

@

CRT_R

CRT_G

CRT_B

12

R153

R153 150_0402_1%

150_0402_1%

CLOSE TO CONN

Trace length <3.6' from switch to conn.

DGPU_SELECT# 16,27

4

2

Q99A

Q99A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

DGPU_SELECT#

DGPU_EDIDSEL# 16,27

12

R131

R131 150_0402_1%

150_0402_1%

L: A -> B1(VGA) H: A -> B2(PCH)

5

3

Q99B

Q99B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

C

12

R90

R90 150_0402_1%

150_0402_1%

2.2K_0402_5%

1

C158

2

10P_0402_50V8J

+CRT_VCC+3VS

12

R157

@

C178

100P_0402_50V8J

1

C146

2

10P_0402_50V8J

12

R158

2.2K_0402_5%

1

2

FCM1608CF-121T03 0603

1 2

L11

FCM1608CF-121T03 0603

1 2

L10

FCM1608CF-121T03 0603

1 2

L9

1

C137

C137 10P_0402_50V8J

10P_0402_50V8J

2

CRT_DDC_DAT_CONN

CRT_DDC_CLK_CONN

@

C177

C177 68P_0402_50V8K

68P_0402_50V8K

D

+5VS +5VS

3

1

2

@

D27

D27 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

R682 0_0603_5%R682 0_0603_5%

R_L

1 2

R683 0_0603_5%R683 0_0603_5%

G_L

1 2

R684 0_0603_5%R684 0_0603_5%

B_L

1 2

1

2

C809

@C809

@

22P_0402_50V8J

C810 22P_0402_50V8J

22P_0402_50V8J

+CRT_VCC

1

2

5

P

A2Y

G

3

+CRT_VCC

1

2

5

P

A2Y

G

3

SVT

@C810

@

2

C808

@C808

@

22P_0402_50V8J

C619

0.1U_0402_16V4Z

HSYNC_G

C620

0.1U_0402_16V4Z

VSYNC_G

3

2

@

D26

D26 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

1

C145

C145 10P_0402_50V8J

10P_0402_50V8J

C157

2

10P_0402_50V8J

RED

GREEN

BLUE

JVGA_VS

JVGA_HS CRT_DDC_DAT_CONN CRT_DDC_CLK_CONN

1

CRT_HSYNC_1

4

OE#

U26

U26 SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

R956

R956 1K_0402_5%

1K_0402_5%

1

OE#

U25

U25 SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

1 2

CRT_VSYNC_1 JVGA_VS

4

JVGA_VSJVGA_HS

1

RED

GREEN

BLUE

1

C136

C136 10P_0402_50V8J

10P_0402_50V8J

2

+5VS

D21

2 1

PMEG2010ET SOT23

W=40mils

1

2

+CRT_VCC_F

1 2

L32

FCM1608CF-121T03 0603

1 2

L31

FCM1608CF-121T03 0603

E

+CRT_VCC

21

F1

1.1A_6V_SMD1812P110TF

C629

0.1U_0402_16V4Z

CRT Connector

JCRT1

1

2

3

4

5

6

7

8

9

10

11

12

13

G1

14

G2

E&T_3703-E12N-03R

ME@

JVGA_HS

1

@

C626

C626 10P_0402_50V8J

10P_0402_50V8J

2

1

C625

@C625

@

10P_0402_50V8J

2

Security Classification

2010/01/13 2011/01/13

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT Connector

Custom

LA-5941P

0.3

of

26 50Thursday, April 08, 2010

E

5

+LCDVDD

13

D

Q3

2N7002_SOT23

D D

PCH_ENVDD15

VGA_ENVDD_R19

FROM VGA LVDS

C C

VGA_LVDS_A0#20

VGA_LVDS_A020

VGA_LVDS_ACLK20

VGA_LVDS_ACLK#20

VGA_LVDS_A220 VGA_LVDS_A2#20 VGA_LVDS_A1#20

VGA_LVDS_A120

VGA_LVDS_SCL19

VGA_LVDS_SDA19

FROM PCH LVDS

LVDS_A0#15

LVDS_A015

LVDS_ACLK15

LVDS_ACLK#15

LVDS_A215 LVDS_A2#15 LVDS_A1#15

LVDS_A115

PCH_EDID_CLK15 PCH_EDID_DATA15

B B

DGPU_EDID_SEL

2N7002W-T/R7_SOT323-3

@

Q42

DGPU_EDID_SEL#

+3VS

12

R33 1K_0402_1%

1K_0402_1%

13

D

S

100K_0402_5%

VGA_LVDS_A0# VGA_LVDS_A0 VGA_LVDS_ACLK VGA_LVDS_ACLK# VGA_LVDS_A2 VGA_LVDS_A2# VGA_LVDS_A1# VGA_LVDS_A1 VGA_LVDS_SCL VGA_LVDS_SDA

LVDS_A0# LVDS_A0 LVDS_ACLK LVDS_ACLK# LVDS_A2 LVDS_A2# LVDS_A1# LVDS_A1 PCH_EDID_CLK PCH_EDID_DATA

@R33

@

DGPU_EDID_SEL#

2

G

R37

PVT

+5VALW

12

R31

1

OUT

2

IN

GND

3

@R37

@

R65

100K_0402_5%

0B1 1B1 2B1 3B1 4B1 5B1 6B1 7B1 8B1 9B1

0B2 1B2 2B2 3B2 4B2 5B2 6B2 7B2 8B2 9B2

SEL2

NC NC NC

Thermal_GND

HYBRID@

R372 0_0402_5%

1 2

@

R371 0_0402_5%R371 0_0402_5%

1 2

R31 1K_0402_1%

1K_0402_1%

ENVDD#

Q95

DTC124EKAT146_SC59-3

12

R13

R13 150_0603_1%

150_0603_1%

2

G

12

LVDS switch1

PVT, change TI to ST main

48 47 43 42 37 36 32 31 22 23

46 45 41 40 35 34 30 29 25 26

54

52

5

51

57

ST3DV520EQTR_QFN_56P_11X5

LCD POWER CIRCUIT

SVT

D36 CH751H-40PT_SOD323-2D36 CH751H-40PT_SOD323-2

2 1

R38 220K_0402_5%R38 220K_0402_5%

1 2

1

OUT

2

IN

GND

@R65

@

3

U42

4

VCC

10

VCC

18

VCC

27

VCC

38

VCC

50

VCC

56

VCC

CONN_LVDS_A0#

2

A0

CONN_LVDS_A0

3

A1

CONN_LVDS_ACLK

7

A2

CONN_LVDS_ACLK#

8

A3

CONN_LVDS_A2

11

A4

CONN_LVDS_A2#

12

A5

CONN_LVDS_A1#

14

A6

CONN_LVDS_A1

15

A7

19

A8

20

A9

DGPU_SELECT#

17

SEL

1

GND

6

GND

9

GND

13

GND

16

GND

21

GND

24

GND

28

GND

33

GND

39

GND

44

GND

49

GND

53

GND

55

GND

DGPU_SELECT# 16,26

DGPU_EDIDSEL# 16,26

DTC124EKAT146_SC59-3

ENVDD#_R

1

C34

0.1U_0402_16V4Z

2

Q12

+3VS

HYBRID@

C898

0.1U_0402_16V4Z

CONN_LVDS_SCL CONN_LVDS_SDA

L: B1 -> A (VGA) H: B2 -> A (PCH)

@ C260

@

0.1U_0402_16V4Z

DGPU_EDID_SEL# DGPU_EDID_SEL

UMA SW BYPASS

PCH_ENBKL ENBKL

PCH_EDID_CLK

A A

PCH_EDID_DATA CONN_LVDS_SDA

LVDS_A0

LVDS_A0#

LVDS_A1

LVDS_A1#

LVDS_A2

LVDS_A2#

LVDS_ACLK

LVDS_ACLK#

5

R5750_0402_5% UMA@ R5750_0402_5% UMA@

12

R3930_0402_5% UMA@ R3930_0402_5% UMA@

12

R3940_0402_5% UMA@ R3940_0402_5% UMA@

12

R3830_0402_5% UMA@ R3830_0402_5% UMA@

12

R3820_0402_5% UMA@ R3820_0402_5% UMA@

12

R3890_0402_5% UMA@ R3890_0402_5% UMA@

12

R3880_0402_5% UMA@ R3880_0402_5% UMA@

12

R3860_0402_5% UMA@ R3860_0402_5% UMA@

12

R3870_0402_5% UMA@ R3870_0402_5% UMA@

12

R3840_0402_5% UMA@ R3840_0402_5% UMA@

12

R3850_0402_5% UMA@ R3850_0402_5% UMA@

12

CONN_LVDS_SCL

CONN_LVDS_A0 CONN_LVDS_A0#

CONN_LVDS_A1 CONN_LVDS_A1#

CONN_LVDS_A2 CONN_LVDS_A2#

CONN_LVDS_ACLK CONN_LVDS_ACLK#

4

+3VS

W=60mils

1

C539

4.7U_0805_10V4Z

S

G

Q4

D

SI2301BDS-T1-E3_SOT23-3

1 3

PVT,chg AO3413 main

+LCDVDD

HYBRID@

C899

4.7U_0805_10V4Z

2

1 2

4.7U_0805_10V4Z

2

FBMA-L11-201209-221LMA30T_0805

1

2

TO LVDS Connector

+3VS

1

C260

U16

1

5

2

NC7SZ14P5X_NL_SC70-5

P

NC

A2Y

G

3

Replace FET inverter Q42

4

@U16

@

4

L2

W=60mils

C33

+LCDVDD_CONN

1

C25

0.1U_0402_16V4Z

2

EDIDSEL#

L: VGA H: PCH

SVT

VGA_ENABLT19

PCH_ENBKL15

+3VS

+LCDVDD_CONN

VGA_LVDS_SCL

VGA_LVDS_SDA

PCH_EDID_CLK

PCH_EDID_DATA

R440 1K_0402_1%

1 2

HYBRID@

DGPU_BKL_SEL

3

LCD_COLOR_1

@

1

C370

2

470P_0402_50V7K

DCR_EN34

+3VS

LCD_COLOR_EN34

680P_0402_50V7K

W=60mils

+3VS

1

C14

@

2

DMIC

CMOS

DGPU_EDID_SEL

5

3

4

Q46B

@Q46B

@

2

2N7002DW-T/R7_SOT363-6

61

Q46A

@Q46A

@

2N7002DW-T/R7_SOT363-6

DGPU_EDID_SEL#

5

3

4

Q47B

@Q47B

@

2

2N7002DW-T/R7_SOT363-6

61

Q47A

@Q47A

@

2N7002DW-T/R7_SOT363-6

DGPU_SELECT#

1

5

P

4

OE#

A2Y

G

U18

U18 74AHC1G125GW_SOT353

74AHC1G125GW_SOT353

3

HYBRID@

DGPU_BKL_SEL

1

5

P

4

OE#

A2Y

G

U19

U19 74AHC1G125GW_SOT353

74AHC1G125GW_SOT353

3

HYBRID@

DGPU_SELECT#

2

G

1 3

D

S

D

S

Q64

Q64 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

HYBRID@

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPET ENT DIVISION OF R&D DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONT AINS

DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONT AINS

DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITH OUT PRIOR WRIT TEN CONSENT OF CO MPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITH OUT PRIOR WRIT TEN CONSENT OF CO MPAL ELECTRONICS, INC.

3

CONN_LVDS_SDA CONN_LVDS_SCL

INT_MIC_DATA33 INT_MIC_CLK33

CONN_LVDS_SCL

CONN_LVDS_SDA

CONN_LVDS_SCL

CONN_LVDS_SDA

ENBKL

1 2

2.2K_0402_5%

USB20_P216 USB20_N216

R970

R970 100K_0402_1%

100K_0402_1%

2010/01/13 2011/01/13

SVT

R370 680_0402_5%R370 680_0402_5%

1 2

+3VS

R395

R392

ENBKL 34

R395

2.2K_0402_5%

USB20_P2 USB20_N2

Compal Secret Data

+CMOS_PW

DGPU_PWMSEL

2N7002_SOT23

CMOS_EN34

+3VS

2N7002_SOT23

Q38

@

Q38

@

R69 100K_0402_5%

100K_0402_5%

Deciphered Date

2

+LEDVDD B+

DISPOFF#

INVPWM LCD_COLOR_1 CONN_LVDS_ACLK CONN_LVDS_ACLK#

CONN_LVDS_A2 CONN_LVDS_A2#

CONN_LVDS_A1 CONN_LVDS_A1#

CONN_LVDS_A0 CONN_LVDS_A0#

+3VS

12

R35

R35 1K_0402_1%

1K_0402_1%

13

D

Q43

S

NV_INVTPWM19

INVT_PWM34

PCH_PWM15

+CMOS_PW

D

S

@R69

@

R66

@R66

@ R270

150_0603_1%

13

2

G

2

12

+5VALW

IN

2

ACES_88341-3000B001

PVT

2

G

R259 0_0402_5%

1 2

@

R207 0_0402_5%

1 2

HYBRID@

12

CMOS@R270

CMOS@

100K_0402_5%

1 2

R54

CMOS@R54

CMOS@

1

220K_0402_5%

OUT

GND

Q21

CMOS@Q21

CMOS@

DTC124EKAT146_SC59-3

3

JLVDS1

680P_0402_50V7K

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

ME@

DGPU_PWMSEL# 16

CMOS_EN_RC#CAM_EN-

1

C326

CMOS@C326

CMOS@

0.1U_0402_16V4Z

2

Date: Sh eet

1

R549 0_0805_5%R549 0_0805_5%

1 2

1

C567

@

BKOFF#34

1

C566

4.7U_0805_25V6-K

2

INVPWM

DCR_EN

@

1

C13

2

470P_0402_50V7K

D12

CH751H-40PT_SOD323-2

DISPOFF#

@

1

C296

2

For EMI

+3VS

12

R250

4.7K_0402_5%

21

DISPOFF#

C15

@

1

2

470P_0402_50V7K

BKOFF#

PWMSEL#

R260 0_0402_5%

1 2

@

DGPU_PWMSEL#

+3VS

5

1

P

4

OE#

A2Y

G

U17

U17 74AHC1G125GW_SOT353

74AHC1G125GW_SOT353

3

HYBRID@

+3VS

R161 0_0402_5%

1 2

HYBRID@

DGPU_PWMSEL

5

1

P

4

OE#

A2Y

G

U6

U6 74AHC1G125GW_SOT353

74AHC1G125GW_SOT353

3

HYBRID@

UMA@

LOW COST

SVT 3V Vcc 1G125 BUFFER

OE# A Y

LLL LHH

ZHX

INVPWM

CMOS Camera

+3VS

W=40mils

1

C609

@C609

@

4.7U_0805_10V4Z

S

G

2

PVT,chg AO3413 main

Title

Size Document Number Rev

Custom

2

Q74

CMOS@

Q74

CMOS@

D

SI2301BDS-T1-E3_SOT23-3

1 3

+CMOS_PW_R

Compal Electronics, Inc.

LVDS/CAMERA

1 2

R304

CMOS@R304

CMOS@

0_0603_5%

LA-5941P

+CMOS_PW

1

C337 10U_0805_10V4Z

10U_0805_10V4Z

2

1

CMOS@C337

CMOS@

27 50Thursday, April 08, 2010

of

0.3

A

Mini-Express Card for WLAN/WiMAX(Half)

Mini-Express Card(WLAN/WiMAX)

PCIE_WAKE#15

WLAN_CLKREQ1#14

1 1

EC_TX_P80_DATA34,35 EC_RX_P80_CLK34,35

Mini-Express Card(WWAN 3G)

2 2

PCIECLKREQ3#14

CLK_PCIE_CARD_PCH#14

CLK_PCIE_CARD_PCH14

PCIE_PRX_DTX_N414 PCIE_PRX_DTX_P414

PCIE_PTX_C_DRX_N414 PCIE_PTX_C_DRX_P414

PCIE_WAKE# +JPCIE3_3.3

WLAN_CLKREQ1#

CLK_PCIE_WLAN1#14

CLK_PCIE_WLAN114

PCI_RST#_R

100_0402_1%

R274

1 2 1 2

R273

100_0402_1%

R336

R336 100K_0402_5%

100K_0402_5%

1 2

+JPCIE2_3.3

CLK_PCI_DB

+JPCIE3_3.3

H=1.7mm, P/N : DC040006S00

JPCIE2

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

54

GND2

BELLW_80053-1021

ME@

H=4.0mm, P/N : DC020910200

ME@

PCIE_PRX_DTX_N214 PCIE_PRX_DTX_P214

PCIE_PTX_C_DRX_N214 PCIE_PTX_C_DRX_P214

EC_TX_P80_DATA EC_RX_P80_CLK

PCIE_WAKE#

PCIECLKREQ3#

PVT

JPCIE3

112 334 556 778 9910 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

53

G1

54

G2

BELLW_80052-1021

ME@

10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

B

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 55

G3

56

G4

R353

3G@R353

3G@

0_0603_5%

+JPCIE2_3.3

2

4

6

8

10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

+UIM_PWR

UIM_DATA UIM_CLK UIM_RST UIM_VPP

R368 0_0402_5%3G@R368 0_0402_5%3G@

1 2

R367 0_0402_5%@R367 0_0402_5%@

1 2

R369 0_0402_5%@R369 0_0402_5%@

1 2

R366 0_0402_5%@R366 0_0402_5%@

1 2

R365 0_0402_5%@R365 0_0402_5%@

1 2

USB20_N13 USB20_P13

+3VS

R68

12

0_0603_5%

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R

R377 0_0402_5%R377 0_0402_5%

1 2

R376 0_0402_5%@R376 0_0402_5%@

1 2

R375 0_0402_5%R375 0_0402_5%

1 2

R374 0_0402_5%@R374 0_0402_5%@

1 2

R373 0_0402_5%@R373 0_0402_5%@

1 2

USB20_N8 16 USB20_P8 16

WIMAX_LED1# WLAN_LED_R1# MINIBT_LED1#

+3VS

12

JPCIE2_1.5

1

C417

0.1U_0402_16V4Z

2

3G@

BUF_PLT_RST#

SMB_CLK_S3 SMB_DATA_S3

USB20_N13 16 USB20_P13 16

WIMAX_WWAN_LED2#

+JPCIE2_3.3

1

C418

3G@C418

3G@

10U_0805_10V4Z

2

JPCIE3_1.5

+3VALW +3VS

WLAN_LED_R2#

1

C419

0.1U_0402_16V4Z

2

3G@

C

1

C421

0.1U_0402_16V4Z

2

WL_OFF# 34

BUF_PLT_RST# 5,16, 29 +3VALW +3VS

SMB_CLK_S3 10,11,12,14 SMB_DATA_S3 10,11,12,14

R88

3G@R88

3G@

12

0_0603_5%

3G_OFF# 34

R352

0_0603_5%

1

C423

0.1U_0402_16V4Z

2

+1.5VS

+3VALW

12

WLAN_LED_R1#

WIMAX_LED1#

MINIBT_LED1#

WLAN_LED_R2#

WIMAX_WWAN_LED2#

1

C422

@C422

@

0.1U_0402_16V4Z

2

D34

CH751H-40PT_SOD323-2

@

D35

CH751H-40PT_SOD323-2

@

+JPCIE3_3.3

1

C425

C425 10U_0805_10V4Z

10U_0805_10V4Z

2

D31

WLAN_LED#

21

CH751H-40PT_SOD323-2

@

D32

WLAN_LED#

21

CH751H-40PT_SOD323-2

@

D33

WLAN_LED#

21

CH751H-40PT_SOD323-2

@

WLAN_LED#

21

SVT

WLAN_LED#

21

D

Reserve for SW mini-pcie debug card. Series resistors closed to KBC side.

LPC_FRAME#_R

WLAN_LED# 34,38

SVT

UIM_VPP UIM_DATA

3G@

+UIM_PWR

LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R PCI_RST#_R CLK_PCI_DB

JSIM1

4 5 6 7

12

R151

10K_0402_5%

TAITW_PMPAT6-06GLBS7N14N0

ME@

GND VPP I/O DET

R284 0_0402_5%@R284 0_0402_5%@ R285 0_0402_5%@R285 0_0402_5%@ R286 0_0402_5%@R286 0_0402_5%@ R287 0_0402_5%@R287 0_0402_5%@ R288 0_0402_5%@R288 0_0402_5%@ R290 0_0402_5%@R290 0_0402_5%@

BT_LED#37

D4

@D4

@

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

SVT

CH4

Vp

CH3

1 2 1 2 1 2 1 2 1 2 1 2

4

5

6

VCC

RST CLK

GND GND

R672

1 2

0_0402_5%

@

1 2 3

8 9

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 PCI_RST#

WLAN_LED#

+3VS

+UIM_PWR UIM_RST UIM_CLK

E

40mil

10K_0402_5%

1

C188

2

3G@

LPC_AD3 13,34 LPC_AD2 13,34 LPC_AD1 13,34 LPC_AD0 13,34

@

4.7U_0805_10V4Z

LPC_FRAME# 13, 34

PCI_RST# 16,34

CLK_PCI_DB 14

+UIM_PWRUIM_DATA

12

R152

DAN217T146_SC59-3

1

@ D5

@

1

C176

0.1U_0402_16V4Z

2

3G@

+3VS

3

2

D5

3 3

SATA_DTX_C_IRX_P113 SATA_DTX_C_IRX_N113

SATA_ITX_C_DRX_N113 SATA_ITX_C_DRX_P113

4 4

Mini-Express Card( Only for SSD)

SATA_DTX_C_IRX_P1 SATA_DTX_C_IRX_N1

R506 0_0402_5%

SSD_DET#34

EVT 0324 SSD Pin Define please pull high by EC internal

A

0_0402_5%

+3VS

C426 0. 01U_0402_16V7K

1 2

C424 0. 01U_0402_16V7K

1 2

SSD@

SSD@ SSD@

SSD@

SATA_ITX_DRX_N1

C4270. 01U_0402_16V7K

12

SATA_ITX_DRX_P1

C4280. 01U_0402_16V7K

12

SSD@

+JPCIE1_3.3 SSD@

SSD@

T28T28

SSD@R506

SSD@

12

EC_RX_P80_CLK SSD_P80_CLK

1 2

SSD@

1 2

SSD@

PVT

R578

@R578

@

1 2

100K_0402_5%

DA/DSS_NEW

SSD_DET#_NEW

SSD_P80_DATEC_TX_P80_DATA

R339 0_0402_5%

R339 0_0402_5% R343 0_0402_5%

R343 0_0402_5%

SSD_DET#

1B+ 1B#

JPCIE1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND

54

GND

P-TWO_A54402-A0G16-N

ME@

+JPCIE1_3.3

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

STD H=4.0mm, P/N : SP01000KQ00

B

R128

0_0603_5%

+3VS

SSD@R128

SSD@

12

1

C386

0.1U_0402_16V4Z

2

SSD@

R380 0_0402_5%SSD@R380 0_0402_5%SSD@

1 2

DA/DSS

JPCIE1_1.5

SSD@

1

C431

0.1U_0402_16V4Z

2

SSD@

T27T27

1

C388

0.1U_0402_16V4Z

2

R177

0_0603_5%

SSD@R177

SSD@

+3VS

1

C387

0.1U_0402_16V4Z

2

SSD@

+1.5VS

12

SSD Pin Table

Pin Number

+JPCIE1_3.3

1

C372

0.1U_0402_16V4Z

2

SSD@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

11

13

17

19

23

25

30

45

31

32

33

DA/DSS

SSD_DET#

47

2010/01/13 2011/01/13

SATA Assignment

+B (port 1)

-B (port 1)

DA/DSS (NEW)

-A (port 1)

SSD_DET# (NEW)

+A (port 1)

Compal Secret Dat a

Deciphered Dat e

D

Compal Electronics, Inc.

Title

Mini-Card/Nwe Card/SIM

Size Document Number Rev

Date: Sheet

LA-5941P

E

of

28 50Thursday, April 08, 2010

of

28 50Thursday, April 08, 2010

of

28 50Thursday, April 08, 2010

0.3

A

B

C

D

+3V_LAN

@ R972

@

13

D

1 1

+AVDD_CEN

0.1U_0402_16V4Z

2 2

BUF_PLT_RST#5,16,28

R656

+3V_LAN

LAN_WAKE#34

3 3

1 2

4.7K_0402_5%

PCIE_PRX_DTX_N314

PCIE_PRX_DTX_P314

PCIE_PTX_C_DRX_N314 PCIE_PTX_C_DRX_P314

C676

close to L48

1

2

C594

C594 10U_0805_10V4Z

10U_0805_10V4Z

2

close to pin6

12

C667 0.1U_0402_16V4ZC667 0.1U_0402_16V4Z

1 2

C656 0.1U_0402_16V4ZC656 0.1U_0402_16V4Z

C246 0.1U_0402_16V7KC246 0.1U_0402_16V 7K

1 2

C247 0.1U_0402_16V7KC247 0.1U_0402_16V 7K

1 2

L48 S INDUC_ 4.7UH +-20% SIA4012-4R7ML48 S INDUC_ 4.7UH +-20% SIA4012-4R7M

1 2

+1.8_VDD/LX

close to pin1

+3V_LAN

+AVDD_CEN

CTR12

close to pin5

PCIE_IRX_C_PTX_N3 PCIE_IRX_C_PTX_P3 PCIE_PTX_C_DRX_N3 PCIE_PTX_C_DRX_P3

XTALO

R67 2.37K_0402_1%R67 2.37K_0402_1%

1 2

U30

1

VDDHO/VDD18O/VDD18O

2

VDD3V

6

VDD3V/VDDHO/VDDHO

5

VDDLO/CTR12/CTR12

3

PERSTn

7

VAUX_AVL/VBG1P18/VBG1P18

4

WAKEn

37

TX_N

38

TX_P

44

RX_N

43

RX_P

9

XTLO

10

XTLI

34

TESTMODE

35

NC

31

SMCLK

33

SMDATA

49

GND

12

RBIAS

AR8131L-AL1E_QFN48_6X6 GIGA @

SA000038N00 S IC AR8131L-AL 1E QFN 48P E-LAN CTRL

2N7002_SOT23

WOL_EN34

㪘㫋㪿㪼㫉㫆㫊

㪘㫋㪿㪼㫉㫆㫊㪘㫋㪿㪼㫉㫆㫊

AR8121/8131

D

Q96

@

Q96

@

S

R975

100K_0402_5%

SPI_CS/LED_DUPLEXn/LED_DUPLEXn

SPI_DI/NC/LED_Link1000n

DVDDL/AVDDL/AVDDL

AVDDL/DVDDL/DVDDL

SPI_CLK/DVDDL/DVDDL

SPI_DO/AVDDH/AVDDH

SA000031Z00

LAN_XTALI

XTALO

R391

R391 0_0402_5%

4 4

NBLG0_DVT

Y3

1 2

25MHZ_20PF_7A25000012

1

C665

C665 27P_0402_50V8J

27P_0402_50V8J

2

LAN_XTALO

A

0_0402_5%

1 2

1

C649

C649 27P_0402_50V8J

27P_0402_50V8J

2

+1.2_DVDDL

C251

1U_0402_6.3V4Z

close to pin46

1

2

C248

0.1U_0402_16V4Z

1

2

C244

0.1U_0402_16V4Z

1

C652

0.1U_0402_16V4Z

2

close to pin28

B

+5VALW

12

R973

R973 100K_0402_5%

R972 150_0603_1%

150_0603_1%

2

G

12

100K_0402_5%

R974

LAN_EN- WOL_EN_RC#

2

IN

@R975

@

R974

1 2

220K_0402_5%

1

OUT

GND

Q5

DTC124EKAT146_SC59-3

3

1

C1211

0.1U_0402_16V4Z

2

+3VALW

W=60mils

1

S

G

2

Q97

PVT,chg AO3413 main

2

SI2301BDS-T1-E3_SOT23-3

D

1 3

3VLANOUT

@

C1210

@

4.7U_0805_10V4Z

R726 0_0805_5%R726 0_0805_5%

1 2

C748

10U_0805_10V4Z

LAN Power Circuit & Soft start

+3V_LAN

TWSI_DATA

TWSI_CLK

LED_LINK10_100n

LED_ACTn

REFCLKN

REFCLKP

TXN0/TXN0/TRXN0

TXP0/TXP0/TRXP0 RXN1/RXN1/TRXN1 RXP1/RXP1/TRXP1

NC/NC/TRXN2 NC/NC/TRXP2 NC/NC/TRXN3 NC/NC/TRXP3

AVDDL0 AVDDL1 AVDDL2

AVDDL3 AVDDL4 AVDDL5

DVDDL0

DVDDL1

AVDDH0 AVDDH1

30 29 48 47

27

1 2

R601 0_0402_5%R601 0_0402_5%

26

40 41

14 13 18 17 21 20 24 23

42 39 36 22 16 11 8

46 45 32 28

25 19 15

10/100_LINK_LED

1000_LINK_LED

REFCLKN REFCLKP

MDI0MDI0+ MDI1MDI1+ MDI2MDI2+ MDI3MDI3+

+AVDDVCO2 +1.2_AVDDLLAN_XTALI

+AVDDVCO1

+1.2_AVDDL

+1.2_DVDDL

close to pin15

C663

1 2 1 2

C664 0.1U_0402_16V4ZC664 0.1U_0402_16V4Z

CTR12

C674

1U_0402_6.3V4Z

ACTIVITY# 30

MDI0- 30 MDI0+ 30 MDI1- 30 MDI1+ 30 MDI2- 30 MDI2+ 30 MDI3- 30 MDI3+ 30

12

0.1U_0402_16V4Z

close to pin40,41

close to pin19

C654

0.1U_0402_16V4Z

1

2

PVT

close to pin16

+1.2_AVDDL

1

GIGA@

C659

1U_0402_6.3V4Z

close to pin8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

C661

0.1U_0402_16V4Z

2010/01/13 2011/01/13

close to pin36

C648

0.1U_0402_16V4Z

1

2

C662

0.1U_0402_16V4Z

close to pin22

Compal Secret Data

C

SVT

R654

4.7K_0402_5%

@

CLKREQ_LAN# 14

CLK_PCIE_LAN# 14 CLK_PCIE_LAN 14

1

C650

0.1U_0402_16V4Z

2

close to pin25

C657

0.1U_0402_16V4Z

1

C647

0.1U_0402_16V4Z

2

Deciphered Date

W=60mils

1

2

1

C749

2

10U_0805_10V4Z

1

C750

0.1U_0402_16V4Z

2

1000P_0402_50V7K

Place Close to Pin 2

10/100_LINK_LED

1000_LINK_LED

D30 CH751H-40PT_SOD323-2D30 CH751H-40PT_SOD323-2

D29 CH751H-40PT_SOD323-2D29 CH751H-40PT_SOD323-2

MDI0+

MDI0-

MDI1+

MDI1-

MDI2+

MDI2-

MDI3+

MDI3-

+1.2_AVDDL

1 2

R390

R390 0_0603_5%

0_0603_5%

If overclocking, R602 , L37 stuffed and R390 removed.

If not overclocking, R390 , L37 suffed and R602 removed. AR8131:L37=0ohm (more power saving mode)

Size Document Number Rev

Date: Sheet of

Date: Sheet

+3V_LAN

1

C751

1

C1218

C1218 47P_0402_50V8J

2

47P_0402_50V8J

2

RF 10/22

21

PVT

LAN_SK# 30

Place Close to LAN chip

R150 49.9_0402_1%R150 49.9_0402_1%

1 2

R94 49.9_0402_1%R 94 49.9_0402_1%

1 2

R84 49.9_0402_1%R 84 49.9_0402_1%

1 2

R36 49.9_0402_1%R 36 49.9_0402_1%

1 2

R171 49.9_0402_1%R171 49.9_0402_1%

1 2

R85 49.9_0402_1%R 85 49.9_0402_1%

1 2

R170 49.9_0402_1%R170 49.9_0402_1%

1 2

R172 49.9_0402_1%R172 49.9_0402_1%

1 2

R602 0_0603_5%

1 2

1000P_0402_50V7K

1 2

L37 0_0603_5%L37 0_0603_5%

Title

Custom

@

Compal Electronics, Inc.

AR8131/ AR8132

C245 0.1U_0402_16V4ZC245 0.1U_0402_16V4Z

1 2

C243 0.1U_0402_16V4ZC243 0.1U_0402_16V4Z

1 2

C658 0.1U_0402_16V4ZC658 0.1U_0402_16V4Z

1 2

C238 0.1U_0402_16V4ZC238 0.1U_0402_16V4Z

1 2

close to pin11

1

C655

2

1

2

D

C660

0.1U_0402_16V4Z

1

C653

C653 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+AVDDVCO1

+AVDDVCO2

of

29 50Thursday, April 08, 2010

0.3

5

4

3

2

1

C666

1 2

1U_0402_6.3V4Z

D D

C C

Close to T20

GIGA@

C669 0.01U_0402_16V7K

12

GIGA@

C671 0.01U_0402_16V7K

12

C672 0.01U_0402_16V7KC672 0.01U_0402_16V7K

12

C668 0.01U_0402_16V7KC668 0.01U_0402_16V7K

12

1 2

R430

R430 0_0603_5%

0_0603_5%

Place close to TCT pin

B B

+AVDD_CEN

T22

1

TCT1

1:1

MDI3+

MDI3-

MDI2+

MDI2-

MDI1+

MDI1-

MDI0+

MDI0-

2

3

4

5

6

7

8

9

10

11

12

MDI3+29

MDI3-29

MDI2+29

MDI2-29

MDI1+29

MDI1-29

MDI0+29

MDI0-29

1:1

TD1+

TD1-

TCT2

1:1

TD2+

TD2-

TCT3

1:1

TD3+

TD3-

TCT4

1:1

TD4+

TD4-

350uH_NS892406

GIGA@

T22

NS892404

100@

MCT1

MX1+

MCT2

MX2+

MCT3

MX3+

MCT4

MX4+

MX1-

MX2-

MX3-

MX4-

MCT3

24

MDO3+

23

MDO3-

22

MCT2

21

MDO2+

20

MDO2-

19

MCT1

18

MDO1+

17

MDO1-

16

MCT0

15

MDO0+

14

MDO0-

13

R97 75_0402_5%GIGA@R97 75_0402_5%GIGA@

R126 75_0402_5%GIGA@R126 75_0402_5%GIGA@

R95 75_0402_5%R95 75_0402_5%

R96 75_0402_5%R96 75_0402_5%

12

1000P_1206_2KV7K

C670

40mil

1

2

RJ45 Conn.

SANTA_130452-D

12

Yellow LED+

11

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LE D+

9

Green LE D-

JRJ45

ME@

DC020910220

13

G1

14

G2

12

R125

5.1K_0402_5%

ACTIVITY#

ACTIVITY#29

close to LED

LAN_SK#29

LAN_SK#

R179 300_0402_5%R179 300_0402_5%

1

C249

C249 68P_0402_50V8K

68P_0402_50V8K

@

2

R600 300_0402_5%R600 300_0402_5%

1

C613

C613 68P_0402_50V8K

68P_0402_50V8K

2

@

12

MDO3-

MDO3+

MDO1-

MDO2-

MDO2+

MDO1+

MDO0-

MDO0+

+3V_LAN

12

A A

Security Classification

2010/01/13 2011/01/13

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

LA-5941P

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN Magnetic & RJ45

30 50Thursday, April 08, 2010

1

0.3

of

5

4

3

2

1

R460

10K_0402_5%

@

+3VS +3VS

12

R461

R461 10K_0402_5%

10K_0402_5%

@

EC_SMB_CK2 14,34

EC_SMB_DA2 14,34

REMOTE1+

@

C508

100P_0402_50V8J

REMOTE1-

REMOTE2+

@

C324

100P_0402_50V8J

REMOTE2-

1

2

B

2

E

1

2

B

2

E

Close to DDR

C

Q39

Q39 MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

3 1

Under WWAN

C

Q22

Q22 MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

3 1

REMOTE1,2+/-: Trace width/space:10/10 mil Trace length:<8"

SMSC thermal sensor placed near by VRAM

D D

0.1U_0402_16V4Z

Close U20

2200P_0402_50V7K

C C

2200P_0402_50V7K

C449

C651

C443

1

2

1

2

+3VS

2

1

REMOTE1+

REMOTE1-

REMOTE2+

REMOTE2-

REMOTE1+

REMOTE1-

REMOTE2+

REMOTE2-

U20

1

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-2-AIZL-TR_MSOP10

SMCLK

SMDATA

ALERT#

THERM#

GND

Address 1001_101xb P/N SA000029210

10

9

8

7

6

FAN1 Conn

+5VS

JFAN1

1

EC_TACH34

2

C593

C593 10U_0805_10V4Z

10U_0805_10V4Z

1

EC_FAN_PWM34

2

C714

10U_0805_10V4Z

B B

1

EC_TACH

EC_FAN_PWM

1

2

3

4

5

G1

6

G2

ACES_85204-04001

ME@

SP02000CW00

A A

Security Classification

2010/01/13 2011/01/13

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

EMC1403_Thermal sensor/FAN

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

LA-5941P

of

31 50Thursday, April 08, 2010

1

0.3

A

B

C

D

E

F

G

H

SATA HDD Conn.

JHDD1

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V 5V 5V GND Reserved GND 12V 12V 12V

ME@

GND

15 16 17 18 19 20 21 22

SUYIN_127043FB022G272ZR

23

24

+3VS

1

C122

C122 10U_0805_10V4Z

10U_0805_10V4Z

2

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0SATA_DTX_C_IRX_N0 SATA_DTX_IRX_P0

R574

1 2

0_0805_5%

+5VS_HDD

+3VS

1

2

+3VS_HDD

@

C121

0.1U_0402_16V4Z

SATA_ITX_DRX_P013 SATA_ITX_DRX_N013

C434 0.01U_0402_16V7KC434 0.01U_0402_16V7K

SATA_DTX_C_IRX_N013

1 1

+5VS

R576 0_0805_5%R576 0_0805_5%

1 2

2 2

SATA_DTX_C_IRX_P013

+5VS_HDD

1

C125

C125 1000P_0402_50V7K

1000P_0402_50V7K

2

SATA_DTX_C_IRX_P0

1

C126

0.1U_0402_16V4Z

2

1

C124

C124 1U_0603_10V6K

1U_0603_10V6K

2

1 2

C433 0.01U_0402_16V7KC433 0.01U_0402_16V7K

1 2

1

C123

C123 10U_0805_10V4Z

10U_0805_10V4Z

2

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2010/01/13 2011/01/13

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

F

Date: Sheet

Compal Electronics, Inc.

HDD/ODD Connector

LA-5941P

G

0.3

32 50Thursday, April 08, 2010

H

0.3

of

5

D D

+MIC1_VREFO_L

ESD 1102 near pin

+3VS

RA7

4.7K_0402_5%

@

1 2

HDA_RST_CODEC#13

C C

HDA_RST_CODEC#

2

CA13

CA13 100P_0402_50V8J

100P_0402_50V8J

1

@

INT_MIC_CLK

2

CA18

CA18 100P_0402_50V8J

100P_0402_50V8J

1

External MIC

Internal MIC

PVT

EMI

+MIC1_VREFO_R

1103 add

EXT_MIC_L37

EXT_MIC_R37

place close to chip

SENSE_A

MIC_JD37

PLUG_IN37

Sense Pin Impedance

39.2K

SENSE A

B B

20K

10K

5.1K

Codec Signals

PORT-I (PIN 32, 33)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

(PIN 48)

12

RA10 20K_0402_1%RA10 20K_0402_1%

RA21 39.2K_0402_1%RA 21 39.2K_0402_1%

Function

Headphone out

Ext. MIC

4

+3VS

RA8

RA12

4.7K_0402_5%

INT_MIC_DATA27

INT_MIC_CLK27

EC_MUTE#34

EC_MUTE# 259PD#

RA8

4.7K_0402_5%

1 2

PVT,realtek AP note.

RA23

12

0_0402_5%

CA47 0.1U_0603_50V 7KCA 47 0.1U_0603_50V7K

1 2

CA50 0.1U_0603_50V 7KCA 50 0.1U_0603_50V7K

1 2

RA18 0_0603_5%RA18 0_0603_5%

RA1

12

0_0603_5%

CA2

CA8

place close to chip

EC_MUTE#

1 2

CA12 100P_0402_50V8JCA12 100P_0402_50V 8J

PVTSVT,add

+MIC1_VREFO_L

1

10U_0805_10V4Z

2

1

10U_0805_10V4Z

2

CA214.7U_0805_10V4Z CA214.7U_0805_10V4Z

12 12

CA224.7U_0805_10V4Z CA224.7U_0805_10V4Z

SVT

@

HDA_RST_CODEC#

SENSE_A

CA15

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

CA1

0.1U_0402_16V4Z

CA7

MIC1_L MIC1_R

12

RA240_0402_5% RA240_0402_5%

21

D7CH751H-40PT_SOD323-2

PC_BEEP

1 2

DGND

3

1

+3VS_DVDD

2

1

2

1

9

DVDD

DVDD_IO

23

LINE1_L

24

LINE1_R

14

LINE2_L

15

LINE2_R

21

MIC1_L

22

MIC1_R

16

MIC2_L

17

MIC2_R

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

259PD#

4

PD#

11

RESET#

12

PCBEEP

13

SENSE A

18

SENSE B

36

CBP

35

CBN

31

MIC1_VREFO_L

43

PVSS2

42

PVSS1

49

DVSS2

7

DVSS1

ALC259-GR_QFN48_7X7

SVT change to SA00003QR10

+PVDD1

JA1

JUMP_43X39

+PVDD2

1

CA61

0.1U_0402_16V4Z

2

+AVDD

46

PVDD139PVDD2

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

VREF

JDREF

CPVEE

AVSS1 AVSS2

0.1U_0402_16V4Z

CA57

2

1

@

place close to chip

1

38

U43

CA3

AVDD125AVDD2

10U_0805_10V4Z

40 41

45 44

HP_OUT_L

32

HP_OUT_R

33

10

6

5

AZ_SDIN0_HD_R

8

47

48

20

29

30

LDO_CAP

28

AC_VREF2.5V

27

AC_JDREF

19

A_RVO

34

26 37

1

CA56

2

10U_0805_10V4Z

1

CA60

@ CA60

@

2

10U_0805_10V4Z

1

CA4

2

1 2

CA14 2.2U_0603_6.3V6KCA14 2.2U_0603_6.3V6K

1

CA5

2

0.1U_0402_16V4Z

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

RA4 75_0402_1%RA4 75_0402_1% RA5 75_0402_1%RA5 75_0402_1%

RA6 33_0402_5%RA6 33_0402_5%

RA22 0_0402_5%RA22 0_0402_5%

+MIC1_VREFO_R

RA9 20K_0402_1%RA9 20K_0402_1%

12

AGND

RA2

0.1U_0402_16V4Z

12

0_0603_5%

CA44

RA11

0.1U_0402_16V4Z

12

0_0603_5%

@

CA59

@

0.1U_0402_16V4Z

1

CA6

place close to chip

2

Internal SPEAKER

12

CA23 10U_0805_10V4ZCA23 10U_0805_10V4Z

1 2

1

CA17

2

0.1U_0402_16V4Z

place close to chip

1

2

1

2

RA3

0_0603_5%

2

+5VS

1

CA43

2

10U_0805_10V4Z

+5VS

1

CA58

@ CA58

@

2

10U_0805_10V4Z

12

+5VS

1

CA16

CA16 10U_0805_10V4Z

10U_0805_10V4Z

2

HP_OUTL 37 HP_OUTR 37

HDA_SYNC_CODEC 13

HDA_SDOUT_CODEC 13

HDA_SDIN1 13

EAPD 34

Headphone

1

2

Near PIN

RF 1022

1

C1219

C1219 22PF_0402_50V9

22PF_0402_50V9

@

HDA_BITCLK_CODEC 13

C

2

B

E

D15 RB751V_SOD323

RB751V_SOD323

2 1

+5VS

R326

R326 20K_0402_5%

20K_0402_5%

1 2

1

Q30

2SC2411KT146_SOT23-3

3

@D15

@

C374 1U_0603_10V6KC374 1U_0603_10V6K

R335

2.4K_0402_1%

1 2

wide 20MIL

JSPK1

SPK_R1SPK_R2+ SPK_L1SPK_L2+

PC_BEEPPC_BEEP1

12

4

L19 FBMA-L11-160808-121LMT_0603L19 FBMA-L11-160808-121LMT_0603

1 2

L20 FBMA-L11-160808-121LMT_0603L20 FBMA-L11-160808-121LMT_0603

1 2

L22 FBMA-L11-160808-121LMT_0603L22 FBMA-L11-160808-121LMT_0603

1 2

L23 FBMA-L11-160808-121LMT_0603L23 FBMA-L11-160808-121LMT_0603

1 2

EMI 1030

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SPK_R1-_CONN SPK_R2+_CONN SPK_L1-_CONN SPK_L2+_CONN

1

C633

C632

2

1000PF_0402_25V7

@

EMI 1030

Compal Secret Data

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

2

1

C634

2

1000PF_0402_25V7

@

SE074102K80

@

C635

1000PF_0402_25V7

Compal Electronics, Inc.

Title

ALC259 Codec

Size Document Number Rev

Custom

Date: Sheet

JSPK1

1

2

3

G1

4

G2

ACES_88266-04001

ME@

SP02000K200

LA-5941P

1

5 6

0.3

of

33 50Thursday, April 08, 2010

PC Beep

D16

RB751V_SOD323

EC Beep

BEEP#34

A A

0.1U_0402_16V4Z@

PCH_SPKR13

ICH Beep

C345

C351

1

1U_0603_10V6K

2

1U_0603_10V6K

5

C352

@

2 1

12

1 2

560_0402_5%

1 2

12

560_0402_5%

R311

R310

+3VS

10K_0402_5%

R309

1 2

L14

+3VALW +EC_AVCC

+3VALW

1 2

FBM-11-160808-601-T_0603

0.1U_0402_16V4Z

1 2

L13 FBM-11-160808-601-T_0603L13 FBM-11-160808-601-T_0603

12

C340 22P_0402_50V8J@C340 22P_0402_50V8J@

1 2

R266 47K_0402_5%R266 47K_0402_5%

0.1U_0402_16V4Z

+3VALW

R265 47K_0402_5%R265 47K_0402_5%

1 2

R263 47K_0402_5%R263 47K_0402_5%

1 2

WLAN_LED#28,38

+3VS

R226

2.2K_0402_5%

@

1

@

C291

C291 100P_0402_50V8J

100P_0402_50V8J

2

+3VS

PVT, Fan FB pull-up

12

EC_TACH

R345

R345 10K_0402_5%

10K_0402_5%

@

2

1

ECAGND

R289 10_0402_5%@R289 10_0402_5%@

2

1

1 2

R685 0_0402_5%R685 0_0402_5%

SUSCLK15

PVT

1

C294

1000P_0402_50V7K

2

12

CLKRUN#15

1 2

R671

R671 10K_0402_5%

10K_0402_5%

KSO[0..15]35

KSI[0..7]35

KSO1

KSO2

PVT, EC AP note

C322 15P_0402_50V8JC322 15P_0402_50V8J

EPSON Q13MC1461005000

6.9x1.4x1.3mm

32.768KHZ_12.5P_MC-146

C321 15P_0402_50V8JC321 15P_0402_50V8J

1 2

R329 0_0402_5%R329 0_0402_5%

1 2

R330 0_0402_5%R330 0_0402_5%

C293

C323

ENE UPDATE 08/10/21

SVT

R227

2.2K_0402_5%

EC_SMB_CK2 EC_SMB_DA2

1

@

C292

C292 100P_0402_50V8J

100P_0402_50V8J

2

ALS_CLK38 ALS_DATA38

C290

0.1U_0402_16V4Z

C290

0.1U_0402_16V4Z

GATEA2016 KB_RST#16

SERIRQ13

LPC_FRAME#13,28

LPC_AD313,28 LPC_AD213,28 LPC_AD113,28 LPC_AD013,28

CLK_PCI_LPC16

PCI_RST#16,28

EC_SCI#16

T23 PADT23 PAD

CLKRUN#

SVT

KSO[0..15]

KSI[0..7]

G_SELFTEST38

EC_SMB_CK141 EC_SMB_DA141 EC_SMB_CK214,31 EC_SMB_DA214,31

PM_SLP_S3#15 PM_SLP_S5#15

EC_SMI#16

PCH_TEMP_ALERT#16

ESB_CLK38 ESB_DAT38

SUS_PWR_DN_ACK15

INVT_PW M27

EC_TACH31

3G_OFF#28 EC_TX_P80_DATA28,35 EC_RX_P80_CLK28,35

ON/OFF#38

SUSP_LED#38

LCD_COLOR_EN27

1 2

R327 0_0402_5%

1 2

X2

2 3

1 2

0.1U_0402_16V4Z

1

2

@

1 4

+3VALW

C319

C339

0.1U_0402_16V4Z

C339

0.1U_0402_16V4Z

1

2

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

PCI_RST# EC_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 EC_RF_LED# G_SELFTEST

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# PCH_TEMP_ALERT# ESB_CLK ESB_DAT SUS_PWR_DN_ACK INVT_PW M

3G_OFF# EC_TX_P80_DATA EC_RX_P80_CLK ON/OFF# SUSP_LED# LCD_COLOR_EN

XCLKI XCLKO

XCLKO

12

R264

R264 10M_0402_5%

10M_0402_5%

XCLKI

1000P_0402_50V7K

C329

0.1U_0402_16V4Z

C329

0.1U_0402_16V4Z

1

2

1 2 3 4 5 7 8

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

C341

C327

1000P_0402_50V7K

C327

1000P_0402_50V7K

1

2

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1

LPC & MISC

LAD0

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO0 8 LID_SW# /GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GP IO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

KB926QFA1_LQFP128

SM Bus

ENE926E0 SA00001J5A0

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GND

11

24

35

94

113

67

AVCC

INVT_PW M/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GP IO43

DAC_BRIG/D A0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3 E

DA3/GPIO3F

PSCLK1/GPIO4 A PSDAT1/GPIO4B PSCLK2/GPIO4 C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SEL IO#/GPIO50

BATT_CHGI_ LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPI

AGND

69

ECAGND

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

U13

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

PIN91 change to TP_LOCK#

PIN36 change to LCD_COLOR_EN

11/09 change EC pin

EC_SMB_CK2 EC_SMB_DA2

Security Classification

10/17 add

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

TP_LOCK#

LED1

LTW-C193TS5 0603 WHITE SC 500005I00

21

R357 560_0402_5%R357 560_0402_5%

1 2

LED1

Touch Pad lock LED 10/20 add

GEN_EN BEEP# EC_FAN_PWM ACOFF

ADP_I

KILL_SW#

DCR_EN

IREF CHGVADJ

EC_MUTE# EC_USB_ON# NOVO# BT_EN TP_CLK TP_DATA

926C-STRAP WOL_EN ME_FLASH LID_SW#

FRD#SPI_SI FWR#SPI_SO SPI_CLK FSEL#SPICS#

BATT_SEL_EC CAP_INT FSTCHG BATT_CHG_LED# TP_LOCK# BATT_LOW_LED# PWR_LED# SYSON VR_ON ACIN

EC_RSMRST# EC_LID_OUT# EC_ON CMOS_EN ICH_POK_EC BKOFF# WL_OFF# AC_PRESENT CAP_RST#

PM_SLP_S4# ENBKL EAPD EC_PROCHOT SUSP# PBTN_OUT# EC_PME#

1

C320

4.7U_0603_6.3V6K

2

VR_ON

2010/01/13 2011/01/13

GEN_EN 38 BEEP# 33 EC_FAN_PWM 31 ACOFF 40,42

BATT_TEMP 41 SSD_DET# 28 ADP_I 42 VOUTX 38 VOUTY 38

KILL_SW# 37

DCR_EN 27 PSI_ON# 8 IREF 42 CHGVADJ 42

EC_MUTE# 33

NOVO# 38

BT_EN 37

TP_CLK 35

TP_DATA 35

T21 PADT21 PAD

WOL_EN 29

ME_FLASH 13

LID_SW# 38

FRD#SPI_SI 36

FWR#SPI_SO 36

FSEL#SPICS# 36

BATT_SEL_EC 42

CAP_INT 38

FSTCHG 42

BATT_CHG_LED# 38

BATT_LOW_LED# 38

PWR_LED# 38

SYSON 39,44 VR_ON 48 ACIN 40

EC_RSMRST# 15

EC_LID_OUT# 14 EC_ON 38

CMOS_EN 27

BKOFF# 27 WL_OFF# 28

AC_PRESENT 15

CAP_RST# 38

PM_SLP_S4# 15

ENBKL 27 EAPD 33

SUSP# 39,42,46

PBTN_OUT# 15

SUSP#

1

@

C318

C318 1000P_0402_50V7K

1000P_0402_50V7K

2

R459 10K_0402_5%

10K_0402_5%

1 2

Compal Secret Data

PVT, pull cpu_core nearby

@R459

@

Deciphered Date

FAN control by EC 09.09.08

PVT, for EC ROM fail

R978 0_0402_5%R978 0_0402_5%

1 2

1

C1220

C1220 22P_0402_50V8J

22P_0402_50V8J

2

@

RF 1103 add

1 2

R258 0_0402_5%R258 0_0402_5%

VGATE 15,48

1 2

R251 100K_0402_1%

@

ICH_POK

TP_CLK

R236 4.7K_0402_5%R 236 4.7K_0402_5%

+5VS

SPI_CLK_R 36

ICH_POK 15

EC_PROCHOT

Title

Size Document Number Rev

Custom

Date: Sheet

TP_DATA

EC_TACH

BATT_TEMP

ACIN

FRD#SPI_SI

FSEL#SPICS#

EC_SMB_CK1

EC_SMB_DA1

EC_USB_ON#

LID_SW#

EC_MUTE#

+3VS

ESB Bus for ENE cap. sensor only, not compatible with SMB bus

PVT

USB_ON#37

LAN_WAKE#29

13

D

2

G

Q17

G

Q17

2N7002_SOT23

S

Compal Electronics, Inc.

BIOS & EC I/O Port

1 2

R235 4.7K_0402_5%R 235 4.7K_0402_5%

1 2

C297 100P_0402_50V8JC 297 100P_0402_50V8J

1 2

C298 100P_0402_50V8JC 298 100P_0402_50V8J

1 2

C328 100P_0402_50V8JC 328 100P_0402_50V8J

R262

100K_0402_1%

R271

100K_0402_1%

R240

2.2K_0402_5%

R239

2.2K_0402_5%

1 2

R237

R237 10K_0402_5%

10K_0402_5%

R325

100K_0402_1%

1 2

R238 10K_0402_5%

10K_0402_5%

R291

1 2

4.7K_0402_5%

R294

1 2

4.7K_0402_5%

R241

1 2

10K_0402_5%

R344

R344 10K_0402_5%

10K_0402_5%

1 2

Q63

Q63 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

D

1 3

place it nearby Lan

1 2

R293 0_0402_5%R293 0_0402_5%

H_PROCHOT#

LA-5941P

+5VS

+3VALW

12

@R262

@

12

@R271

@

12

@R238

@

ESB_CLK

ESB_DAT

CAP_INT

+5VALW

EC_USB_ON#

S

+3VALW

G

2

+3V_LAN

R292

R292 10K_0402_5%

10K_0402_5%

@

1 2

EC_PME#

H_PROCHOT# 5,48

34 50Thursday, April 08, 2010

of

0.3

5

4

3

2

1

KB Matrix 10/30

JKB1

INT_KBD Conn.

KSI[0..7]

D D

C C

KSO[0..15]

KSO2

KSO15

KSO6

KSO8

KSO13

KSO12

KSO11

KSO10

KSO3

KSO4

KSI0

KSO0

C203 100P_0402_50V8J@C203 100P_0402_50V8J@

C153 100P_0402_50V8J@C153 100P_0402_50V8J@

C175 100P_0402_50V8J@C175 100P_0402_50V8J@

C185 100P_0402_50V8J@C185 100P_0402_50V8J@

C172 100P_0402_50V8J@C172 100P_0402_50V8J@

C173 100P_0402_50V8J@C173 100P_0402_50V8J@

C155 100P_0402_50V8J@C155 100P_0402_50V8J@

C154 100P_0402_50V8J@C154 100P_0402_50V8J@

C174 100P_0402_50V8J@C174 100P_0402_50V8J@

C187 100P_0402_50V8J@C187 100P_0402_50V8J@

C204 100P_0402_50V8J@C204 100P_0402_50V8J@

C227 100P_0402_50V8J@C227 100P_0402_50V8J@

1 2

KSI[0..7] 34

KSO[0..15] 34

KSO1

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

C205 100P_0402_50V8J@C205 100P_0402_50V8J@

1 2

C186 100P_0402_50V8J@C186 100P_0402_50V8J@

1 2

C226 100P_0402_50V8J@C226 100P_0402_50V8J@

1 2

C206 100P_0402_50V8J@C206 100P_0402_50V8J@

1 2

C225 100P_0402_50V8J@C225 100P_0402_50V8J@

1 2

C156 100P_0402_50V8J@C156 100P_0402_50V8J@

1 2

C236 100P_0402_50V8J@C236 100P_0402_50V8J@

1 2

C235 100P_0402_50V8J@C235 100P_0402_50V8J@

1 2

C228 100P_0402_50V8J@C228 100P_0402_50V8J@

1 2

C233 100P_0402_50V8J@C233 100P_0402_50V8J@

1 2

C234 100P_0402_50V8J@C234 100P_0402_50V8J@

1 2

C241 100P_0402_50V8J@C241 100P_0402_50V8J@

1 2

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

JKB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

GND2 GND1

E-T_6905-E24N-01R

ME@

EC DEBUG PORT

JP11

+3VALW EC_TX_P80_DATA28,34 EC_RX_P80_CLK28,34

26 25

EC_TX_P80_DATA EC_RX_P80_CLK

1

2

3

4

ACES_85205-0400

ME@

To TP/B Conn.

+5VS

C150

0.1U_0402_16V4Z

TP_CLK34 TP_DATA34

B B

1

@

C151

C151 100P_0402_50V8J

100P_0402_50V8J

2

TP_CLK TP_DATA

1

@

C152

C152 100P_0402_50V8J

100P_0402_50V8J

2

3

D22

D22 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

@

1

SCA00000G00

ME@

ACES_85201-04051

4

GND

3

GND

2

1

JTP1

SP01000KC00

6 5

ESD 1104 CHANGE

A A

Security Classification

2010/01/13 2011/01/13

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

KB /SW /LPC Debug Conn.

LA-5941P

1

of

35 50Thursday, April 08, 2010

0.3

FOR EC 256KB SPI ROM (150mil PACKAGE)

+3VALW

1

C265

0.1U_0402_16V4Z

2

FSEL#SPICS#34

FRD#SPI_SI34

FSEL#SPICS#

R218 15_0402_5%R218 15_0402_5%

1 2

20mils

U9

1

CS#

VCC

2

SO

HOLD#

3

WP#

SCLK

4

GND

SI

W25X20BVSNIG_SO8

SA00003GM10

8

7

6

5

HOLD#FRD#SPI_SI SPI_SI_R

SPI_CLK_L

SPI_SO_EC

12

R217

R217 10K_0402_5%

10K_0402_5%

Changed to BEAD for EMI. Close to EC after C1220

R215 FBMA-10-100505-101T 0402R215 FBMA-10-100505-101T 0402

1 2

15_0402_5%

1 2

R201

FWR#SPI_SO

SPI_CLK_R 34

FWR#SPI_SO 34

SPI_CLK_L

Colse to EC

C266

10P_0402_50V8J

1

2

R216

0_0402_5%

C264

12P_0402_50V8J

12

@

1

2

@

EMI 3G

H2

H1

HOLEAH2HOLEA

HOLEAH1HOLEA

1

G:H_3P2 X6

FD1FD1

1

A:H_2P8

H3

H4

HOLEAH3HOLEA

HOLEAH4HOLEA

1

H14

H13

HOLEA

1

1030 change to H_3P8 for thermal

H20

H19

H19 HOLEA

HOLEA

1

H20 HOLEA

HOLEA

1

H5 HOLEAH5HOLEA

H15

H15 HOLEA

HOLEA

FD4FD4

1

H6 HOLEAH6HOLEA

1

H16

H16 HOLEA

HOLEA

1

FD3FD3

FD2FD2

1

H8

H7

HOLEAH8HOLEA

HOLEAH7HOLEA

1

H17

H17 HOLEA

HOLEA

1

H10

H10 HOLEA

HOLEA

1

I:H_3P0 X1H_4P5X3P0N

H18

H18 HOLEA

HOLEA

1

H11

H11 HOLEA

HOLEA

1

H12

H12 HOLEA

HOLEA

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

EC SPI ROM

LA-5941P

36 50Thursday, April 08, 2010

of

0.3

A

TO USB BOARD/Audio Jet CONN

+3VALW

KILL_SW# 34

+USB_VCCB

USB POWER

L_USB20_N0 L_USB20_P0

USB20_N3 USB20_P3

USB20_N9 USB20_P9

Kill

STATUS 1,2(LOW) 2,3(HI) ON

MIC_JD 33

P-TWO_196054-30041

32 31

1 1

ME@

2 2

ME@

SP010804150

G2 G1

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

JUSB1

KILL_SW#

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9

9

8

7

6

5

4

3

2

1

KILL_SW#

R295

100K_0402_5%

12

USB20_N016

USB20_P016

USB20_N3 16 USB20_P3 16

+USB_VCCC

USB20_N9 16 USB20_P9 16

PLUG_IN 33

HP_OUTR 33

HP_OUTL 33

EXT_MIC_L 33 EXT_MIC_R 33

OFF

B

USB20_N0 USB20_P0

Audio Jet

GNDA

SVT EMI request

@

R680 0_0402_5%

1 2

R681 0_0402_5%

1 2

@

L39

1

4

WCM-2012-900T_4P

2

3

USB20_N3 USB20_P3

EMI request

USB20_N9

USB20_P9

EMI request

L_USB20_N0 L_USB20_P0

1

C802

1P_0402

@

2

1

C804

1P_0402

@

2

1

C806

1P_0402

@

2

C

D

E

ESATA and USB Conn.

+USB_VCCA

1

C803

1P_0402

@

2

1

C805

1P_0402

@

2

1

C807

1P_0402

@

2

C621 0.1U_0402_16V4ZC621 0.1U_0402_16V4Z

SATA_DTX_C_IRX_N413 SATA_DTX_C_IRX_P413

USB_ON#34

150U_B2_6.3VM_R35M

+5VALW

12

USB_ON#

+USB_VCCA

1

+

C615

2

SATA_DTX_C_IRX_P4

U27

1

GND

2

IN

3

IN

4

EN

APL3510BKI_SO8

Low Active

1

C622

C622 470P_0402_50V7K

470P_0402_50V7K

2

SATA_ITX_DRX_P4_CONN13 SATA_ITX_DRX_N4_CONN13

0.01U_0402_16V7K

+USB_VCCA

8

OUT

7

OUT

6

OUT

5

OC#

W=80mils

SATA_ITX_DRX_P4_CONN SATA_ITX_DRX_N4_CONN

SATA_DTX_IRX_ N4SATA_DTX_C_IRX_N4

C6240.01U_0402_16V7K C6240.01U_0402_16V7K

12

SATA_DTX_IRX_P4

C623

12

E-SATA COMBO LEFT USB PORT

USB_OC#1 16

1

C610

1000P_0402_50V7K@

2

USB20_N116 USB20_P116

L_USB20_N1 L_USB20_P1

USB20_N1 USB20_P1

JESAT1

USB

1

VBUS

2

D-

3

D+

4

GND0

5

GND1

6

A+

7

A-

8

GND2

9

B-

10

B+

11

GND3

12

GNDS1

13

GNDS2

14

GNDS3

15

GNDS4

TAIWI_EU091-117CRL-T

ME@

SVT EMI request

@

R678 0_0402_5%

1 2

R679 0_0402_5%

1 2

@

WCM-2012-900T_4P

4

1

L38

ESATA

3

2

USB A+ = RXP

A- = RXN

B- = TXN B+ = TXP

L_USB20_N1 L_USB20_P1

1

C800

1P_0402

@

2

1

C801

1P_0402

@

2

Q54

2N7002_SOT23

BT_EN34

R71 100K_0402_5%

100K_0402_5%

+3VS_BT

@

@R71

@

13

D

S

OUT OUT OUT OC#

+USB_VCCB+5VALW

8 7 6 5

1

C636

1000P_0402_50V7K@

2

+USB_VCCC+5VALW

8 7 6 5

1

C675

1000P_0402_50V7K@

2

USB_OC#0 16

USB_OC#5 16

U29

1

C637 0.1U_0402_16V4ZC637 0.1U_0402_16V4Z

3 3

C677 0.1U_0402_16V4ZC677 0.1U_0402_16V4Z

12

USB_ON# USB_OC#0

12

USB_ON# USB_OC#5

GND

2

IN

3

IN

4

EN

APL3510BKI_SO8

Low Active

U31

1

GND

2

IN

3

IN

4

EN

APL3510BKI_SO8

Low Active

CARD READER CONN

+3VALW

4 4

USB20_N516 USB20_P516

USB20_N5 USB20_P5

A

JCR1

1

2

3

5

3

GND

4

6

4

GND

ACES_85201-04051

ME@

SP01000KC00

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

C

R70

@R70

@

150_0603_1%

2

G

2

IN

12

+3VS

+5VALW

12

R979

BT@R979

BT@

100K_0402_5%

1 2

R55

BT@R55

BT@

1

220K_0402_5%

OUT

GND

Q31

BT@Q31

BT@

DTC124EKAT146_SC59-3

3

BT_LED#28

R234

1 2

10K_0402_5%

@

Compal Secret Data

BT_EN_RC#BTEN-

1

C353

0.1U_0402_16V4Z

2

BT_PRESENCE

Deciphered Date

G

2

BT@C353

BT@

PVT,chg AO3413 main

1

3

+3VS

W=40mils

1

S

2

Q32

BT@

Q32

BT@

D

SI2301BDS-T1-E3_SOT23-3

1 3

+3VS_BT_R

OUT

2

IN

GND

Q29

Q29 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

@

D

C612

@C612

@

4.7U_0805_10V4Z

1 2

R321

BT@R321

BT@

0_0603_5%

Blue Tooth Moudle

+3VS_BT

1

C354

BT@C354

BT@

2

0.1U_0402_16V4Z

USB20_P1116 USB20_N1116

Title

Size Document Number Rev

Custom

Date: Sheet

USB20_P11 USB20_N11 BTON_LED BT_PRESENCE

Compal Electronics, Inc.

USB ports/BT/E-SATA

LA-5941P

E

PVT

JBT1

1

2

3

4

5

G1

6

G2

ACES_87213-0600G

ME@

of

37 50Thursday, April 08, 2010

of

37 50Thursday, April 08, 2010

of

37 50Thursday, April 08, 2010

7 8

0.3

ON/OFF switch FOR DEBUG

Power Button

TOP Side

SW1

1

2

5

6

@

Bottom Side

ON/OFFBTN#

EC_ON

NOVO#

51_ON#

1

CG3

CG3 10U_0805_10V4Z

10U_0805_10V4Z

GEN@

2

CG2

GEN@CG2

GEN@

1U_0603_10V6K

+3VS_GEN

CG1

GEN@CG1

GEN@

0.1U_0402_16V4Z

EC_ON34

NOVO#34

1

2

G_SELFTEST34

3

4

SMT1-05_4P

1

BAV70W_SOT323-3

1 2

+3VALW

R296

R296 100K_0402_5%

100K_0402_5%

1 2

RG1

1 2

47_0402_5%

12

RG3

@RG3

@

10K_0402_5%

ST

12

RG6

GEN@RG6

GEN@

100K_0402_5%

D14

2

3

PVT

R302

R302 10K_0402_5%

10K_0402_5%

2

3

GEN@RG1

GEN@

+3VALW

R272

R272 100K_0402_5%

100K_0402_5%

1 2

ON/OFF#

51_ON#

13

D

Q28

2

G

2N7002_SOT23-3

S

PVT

D13

1

BAV70W_SOT323-3

+3VS_GEN_R

GEN_EN34

UG1

GEN@UG1

GEN@

2

ST

14

Vs

15

Vs

3

COM

5

COM

6

COM

7

COM

S IC LIS244ALTR LGA 16P G-SENSOR

NOVO_BTN#

QG2

2N7002_SOT23

ON/OFF# 34

51_ON# 40

+3VS_GEN

@

RG9 100K_0402_5%

100K_0402_5%

12

Xout

10

Yout

1

NC

4

NC

8

NC

9

NC

11

NC

13

NC

16

NC

Power Bottom Board Conn.4pin

NOVOBottom/ALS Board Conn.6pin

ALS_CLK34 ALS_DATA34

LID_SW#34

NOVO_BTN#

2

3

1

EMI REQUEST 1ST = SCA00000E00

+5VALW

RG7 150_0603_1%

150_0603_1%

13

D

S

@RG9

@

12

@RG7

@

RG2

GEN@RG2

GEN@

100K_0402_5%

1

OUT

IN

GND

DTC124EKAT146_SC59-3

3

RG4 56K_0402_5%

56K_0402_5%

1 2 1 2

RG5 56K_0402_5%

56K_0402_5%

1 2

RG8

GEN@RG8

GEN@

220K_0402_5%

QG3

GEN@QG3

GEN@

GEN@RG4

GEN@

GEN@RG5

GEN@

PVT

CG7

0.1U_0402_16V4Z

2

G

2

Y

PWR_LED#34

D19

D19 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

@

+3VALW

ON/OFFBTN#

NOVO_BTN#

3

1

2ST = SCA00000R00

APS G-Sensor

+3VS

S

G

GEN_EN_RC#GENEN-

1

CG4

0.1U_0402_16V4Z

2

GEN@CG7

GEN@

G

2

GEN@CG4

GEN@

PVT,chg AO3413 main

1

CG8

0.1U_0402_16V4Z

2

QG1

D

SI2301BDS-T1-E3_SOT23-3

1 3

+3VS_GEN_R

VOUTXX VOUTY

GEN@CG8

GEN@

+5VALW

JPW1

1

2

3

4

ACES_85201-04051

ME@

SP01000KC00

JFB1

1 2 3 4 5 6 7 8

ACES_85201-06051

ME@

SP01000B000

2

D20

D20 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

@

W=20mils

1

CG9

@CG9

@

4.7U_0805_10V4Z

2

GEN@

VOUTX 34 VOUTY 34

GND GND

1 2 3 4 5 6 GND GND

Cap Sensor Board Conn. 8pin

ENE SB3534

5 6

HDD_LED#13

CAP_RST#34 CAP_INT34

ESB_DAT34 ESB_CLK34

+3VS

+5VS

1 2

R349 0_0402_5%R349 0_0402_5%

1 2

R351 0_0402_5%R351 0_0402_5%

R3 0_0402_5%R3 0_0402_5%

1 2

R2 0_0402_5%R2 0_0402_5%

1 2

R1 0_0402_5%R1 0_0402_5%

1 2

2

@

C1

33P_0402_50V8J

1

PIN adjust

I2C_INT_R

2

@

C2

33P_0402_50V8J

1

+3VS_CAP+5VS_CAP

JCAP1

1

2

3

4

5

6

7

8

9

GND

10

GND

ACES_85201-0805N

ME@

SP01000H200

FP Board Conn 4 pin

Amber

Blue

+1.5VS_VGA

+5VALW

BATT_LOW_LED#34 BATT_CHG_LED#34

1

2

SUSP_LED#34

WLAN_LED#28,34

+3VS

C723

0.1U_0402_16V4Z

+5VALW

USB20_N1016

USB20_P1016

+5VS

+3VS

1

C724

0.1U_0402_16V4Z

2

+5VALW

1

2

USB20_N10 USB20_P10

WLAN_LED#

+3VS

C725

0.1U_0402_16V4Z

+3VALW

+3VS

+3VALW

JFP1

1

2

3

4

ACES_85201-04051

ME@

SP01000KC00

LED CONN 8 pin

JLED

1

2

3

4

5

6

7

8

9

GND

10

GND

ACES_85201-0805N

ME@

SP01000H200

1

C729

0.1U_0402_16V4Z

2

GND GND

5 6

+3VS

+5VS

+3VS

1

C720

0.1U_0402_16V4Z

2

+5VS

+3VS

1

C721

0.1U_0402_16V4Z

2

+1.05VS

+3VS

1

C722

0.1U_0402_16V4Z

2

+5VS

+3VS

1

C726

0.1U_0402_16V4Z

2

+VGA_CORE

+1.5VS_VGA

1

C727

0.1U_0402_16V4Z

2

+VGA_CORE

1

C728

0.1U_0402_16V4Z

2

Security Classification

2010/01/13 2011/01/13

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Audio Jack & SW connector

Size Document Number Rev

Custom

Date: Sheet

LA-5941P

of

38 50Thursday, April 08, 2010

0.3

A

B

C

D

E

+3VALW TO +3VS+5VALW TO +5VS

SVT,discharge

Q34

2N7002_SOT23

SUSP#

+1.5VS

12

13

D

S

+5VALW

U10 SI4800BDY-T1-E3_SO8U10 SI4800BDY-T1-E3_SO8

8 7

1

C279

10U_0805_10V4Z

SUSP

B+

2

G

1 1

2

R229

R229 20K_0402_5%

20K_0402_5%

5VS_GATE

13

D

Q20

Q20 2N7002_SOT23

2N7002_SOT23

S

5

R228

10K_0402_5%

12

R142

R142 470_0603_5%

470_0603_5%

13

D

2

G

Q10

S

2 2

S

SVT,discharge

2N7002_SOT23

1 2

1

36

C277

C277 10U_0805_10V4Z

10U_0805_10V4Z

4

5VS_GATE_R

12

+1.5V +VCCP+1.8VS +0.75VS

2

1

C278

0.1U_0603_25V7K

2

12

R342

R342 470_0603_5%

470_0603_5%

@

13

D

SYSON#

2

G

Q35

S

2N7002_SOT23

@

+5VS

1

C276

C276 1U_0603_10V6K

1U_0603_10V6K

2

12

R174

R174 470_0603_5%

470_0603_5%

@

13

D

S

12

R202

R202 470_0603_5%

470_0603_5%

13

D

SUSP SUSP

2

G

Q16

S

2N7002_SOT23

SVT,discharge SVT,discharge

10U_0805_10V4Z

SUSP

12

R568

R568 22_0603_5%

22_0603_5%

13

D

SUSP

2

G

Q15

Q15 2N7002_SOT23

2N7002_SOT23

@

S

SUSP

2

G

Q40

Q40 2N7002_SOT23

2N7002_SOT23

SVT,add

For Intel S3 Power Reduction.

+1.05VS to +1.05VS_VGA Transfer

C127

2

G

+3VALW

B+

1

2

12

R89

R89 47K_0402_5%

47K_0402_5%

13

D

Q9

Q9 2N7002_SOT23

2N7002_SOT23

S

+1.05VS

12

R143

R143 470_0603_5%

470_0603_5%

@

13

D

S

U4 SI4800BDY-T1-E3_SO8U4 SI4800BDY-T1-E3_SO8

8 7

5

4

3VS_GATE

SUSP

2

G

Q11

Q11 2N7002_SOT23

2N7002_SOT23

@

1 2

1

36

C134

C134 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C144

0.1U_0603_25V7K

2

SYSON

1 2

R673

SVT

10K_0402_5%

MUST CLOSE PR501,1.5V_EN

SYSON34,44

+3VS

1

C135

C135 1U_0603_10V6K

1U_0603_10V6K

2

12

R87

R87 470_0603_5%

470_0603_5%

13

D

Q6

S

2N7002_SOT23

100K_0402_5%

SYSON#

DTC124EKAT146_SC59-3

SYSON

2

G

+5VALW

12

@

R6

Q2

1

@

OUT

2

IN

GND

3

+1.5V to +1.5VS_VGA Transfer

R337

R337 470_0603_5%

470_0603_5%

2

G

2

12

R181

R181 100K_0402_5%

100K_0402_5%

+1.5VS_VGA+1.5V

+5VALW

IN

SUSP#34,42,46

+1.5V to +1.5VS

12

R178

R178 100K_0402_5%

100K_0402_5%

PVT,timing

1 2

R312

R312 15K_0402_1%

15K_0402_1%

1

OUT

GND

Q13

DTC124EKAT146_SC59-3

3

SUSP8,44,45

SUSPSUSP

DTC124EKAT146_SC59-3

12

@ R4

@

R_1.5VS_EN-1.5VS_EN-

1

C361

0.1U_0402_16V4Z

2

R4 100K_0402_5%

100K_0402_5%

Q1

2

IN

+1.5V

G

2

Q33

1 3

PVT,chg AO3413 main

+5VALWRTCVREF

12

MP

R5

R5 100K_0402_5%

100K_0402_5%

1

OUT

GND

3

W=60mils

1

C389

@C389

@

4.7U_0805_10V4Z

S

2

SI2301BDS-T1-E3_SOT23-3

D

W=60mils

1

C362

C362 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.5VS

1

C363

C363 1U_0603_10V6K

1U_0603_10V6K

2

1

C706

C706 10U_0805_10V4Z

10U_0805_10V4Z

HYBRID@

2

1

C684

0.1U_0402_16V4Z

HYBRID@

2

Q57A

2N7002DW-T/R7_SOT363-6

HYBRID@

Q57A

1 2

61

R624

470_0603_5%

HYBRID@

DGPU_PWR_EN#

2

1 2 36

C682

0.1U_0603_25V7K

HYBRID@

+1.05VS_VGA

100mil(1.5A)

1

C680

HYBRID@

10U_0805_10V4Z

2

2N7002DW-T/R7_SOT363-6

1

C679

0.1U_0402_16V4Z

HYBRID@

2

HYBRID@

Q24A

R621

1 2

61

470_0603_5%

HYBRID@

2

DGPU_PWR_EN#

C686

10U_0805_10V4Z

HYBRID@

SVT

U33

HYBRID@ U33

HYBRID@

AO4430L_SO8

8 7

1

C705

C705 10U_0805_10V4Z

10U_0805_10V4Z

HYBRID@

2

B+

PVT,timing

1 2

R623

R623 200K_0402_1%

200K_0402_1%

HYBRID@

DGPU_PWR_EN#

6 5

1.5VSDGPU_GATE

5

1 2 3

4

3

Q57B

Q57B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

HYBRID@

1

2

1

C683

0.1U_0603_25V7K

HYBRID@

2

250mil(6A)

C685

C685 10U_0805_10V4Z

10U_0805_10V4Z

HYBRID@

4

+VGA_1.05VS

HYBRID@

U34 SI4800BDY-T1-E3_SO8

3 3

B+

C681

10U_0805_10V4Z

HYBRID@

1 2

R622 510K_0402_1%

DGPU_PWR_EN#

8 7

1

5

2

1.05VSDGPU_GATE

3

Q24B

2N7002DW-T/R7_SOT363-6

5

HYBRID@

4

+5VALW

4

1

2

12

R52

R52 100K_0402_5%

100K_0402_5%

HYBRID@

4 4

DGPU_PWR_EN16,22,45

R127

R127 0_0402_5%

0_0402_5%

12

HYBRID@

12

R53

R53 100K_0402_5%

100K_0402_5%

HYBRID@

A

13

D

2

G

S

DGPU_PWR_EN#

Q56

Q56 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

HYBRID@

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PR OPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPET ENT DIVISION OF R&D

AND TRADE SECRET INF ORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPET ENT DIVISION OF R&D DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONT AINS

DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONT AINS

DEPARTMENT EXCEPT AS AU THORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NO R THE INFORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITH OUT PRIOR WRIT TEN CONSENT OF CO MPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITH OUT PRIOR WRIT TEN CONSENT OF CO MPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITH OUT PRIOR WRIT TEN CONSENT OF CO MPAL ELECTRONICS, INC.

C

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sh eet of

D

Date: Sh eet of

Compal Electronics, Inc.

DC Interface

LA-5941P

E

39 50Thursday, April 08, 2010

0.3

A

PF101

JDCIN1

1

1 1

2

3

4

GND

ACES_87302-0401-003

APDIN

1

2

3

4

5

6

7A_24VDC_429007.W RML

21

APDIN1

12

0.1U_0603_25V7K@

PC102

PC101

PF101

7A_24VDC_429007.W RML

12

1000P_0402_50V7K

PL101

SMB3025500YA_2P

1 2

100P_0402_50V8J

PC103

12

Vin Detector Min. typ. Max.

B

ACIN

VIN

Precharge detector

Min. typ. Max. L-->H 14.991V 15.381V 15.782V H-->L 13.860V 14.247V 14.621V

12

PC104

100P_0402_50V8J

0.1U_0603_25V7K@

PC106

PC105

1000P_0402_50V7K

VIN

PD102

PD102 RLS4148_LL34-2

RLS4148_LL34-2

C

D

BATT ONLY

Precharge detector

Min. typ. Max. L-->H 7.196V 7.349V 7.505V H-->L 6.138V 6.214V 6.056V

PR102

PR102 1K_1206_5%

1K_1206_5%

1 2

PR103

PR103 1K_1206_5%

12

1K_1206_5%

1 2

PR104

PR104 1K_1206_5%

1K_1206_5%

1 2

PR105

100K_0402_1%

12

PQ102

TP0610K-T1-E3_SOT23-3

12

PR106

100K_0402_1%

13

2

L-->H 17.430V 17.901V 18.384V H-->L 16.976V 17.262V 17.728V

2

12

5

+

6

-

12

+RTCBATT

+CHGRTC

13

PQ103

DTC115EUA_SC70-3

PC110

0.01U_0402_25V7K

PRG-

PC111

1000P_0402_50V7K

PRG+

PR101

PR101 1M_0402_1%

1M_0402_1%

1 2

VINDE-2

3

2

PR115

PR115 10K_0402_5%

10K_0402_5%

12

PR125

VS

8

P

+

-

G

4

12

PC107

1

O

PU102A

PU102A LM393DG_SO8

LM393DG_SO8

RTCVREF

TP0610K-T1-E3_SOT23-3

51ON-2

PC114

1 2

0.22U_0603_25V7K

51ON-3

0.01U_0402_25V7K

2 2

PC108

3 3

VIN

12

PR108

84.5K_0402_1%

PR111

PR111 22K_0402_1%

12

PR112

BATT+

51_ON#38

22K_0402_1%

1 2

20K_0402_1%

CHGRTCP

VINDE-3

12

PC109

0.1U_0402_16V7K

PD105

LL4148_LL34-2

PR124

200_0603_5%

1 2

100K_0402_1%

PR126

22K_0402_1%

1 2

VINDE-1

12

0.068U_0603_16V7K

RTCVREF

PU101

4 4

+CHGRTC

A

PR129

560_0603_5%

1 2

3.3V

12

PU101

APL5156-33DI-TRL_SOT89-3

3

VOUT

PC116

PC116 10U_0603_6.3V6M

10U_0603_6.3V6M

GND

2

VIN

1

PD101

LLZ4V3B_LL34-2

3.3V

PQ101

12

PR127

PR127 200_0603_5%

200_0603_5%

CHGRTCINRTCVREF-1

12

PC117

PC117 1U_0805_25V6K

1U_0805_25V6K

VIN

12

2 1

2

PR109

10K_0805_5%

PR120

68_1206_5%

13

PR110

PR110 10K_0402_1%

10K_0402_1%

1 2

12

PR114

10K_0402_5%

VIN

PD104

LL4148_LL34-2

1 2

51ON-1

12

PC115

0.1U_0603_25V7K

B

PACIN

12

PR121

PR121 68_1206_5%

68_1206_5%

ACOFF34,42

ACIN 34

PR113

PU102B

7

O

PR113

2.2M_0402_5%

VS

8

P

G

4

PR122

PR122 10K_0402_5%

10K_0402_5%

PACIN 42

VL

12

PR117

PD103

RB715F_SOT323-3

MAINPWON41,43

ACON42

2

3

100K_0402_1%

PRG-1

1

LM393DG_SO8

12

PC113

0.1U_0603_25V7K

RTCVREF

VS

PR128

JRTC1

-+

MAXEL_ML1220T10@

+RTCBATT-1

12

PR128

560_0603_5%

1 2

PD106

1 2

RB751V-40_SOD323-2

RTC Battery

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

C

12

PR107

100K_0402_1%

13

2

12

PR118

PRG++

PQ105

PQ105 2N7002KW_SOT323- 3

2N7002KW_SOT323- 3

13

D

S

PQ104

DTC115EUA_SC70-3

205K_0402_1%

PR123

PR123 47K_0402_5%

2

G

Title

Size Document Number Rev

Custom

Date: Sh eet

47K_0402_5%

13

PQ106

PQ106 DTC115EUA_SC70-3

DTC115EUA_SC70-3

Compal Electronics, Inc.

B+

12

PR116

499K_0402_1%

12

PC112

PR119

499K_0402_1%

0.01U_0402_25V7K

PACIN

12

2

DCIN & DETECTOR

+5VALW

D

0.3

of

40 50Thursday, April 08, 2010

of

40 50Thursday, April 08, 2010

of

40 50Thursday, April 08, 2010

A

1 1

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

JBATT

VMB2

JBATT

1

2

EC_SMCA

3

EC_SMDA

4

2 2

3 3

4

TS

5

6

7

8

GND

9

GND

SUYIN_200082MR007G100ZR@

12

PR201

12

100_0402_1%

PR202

100_0402_1%

PR202

100_0402_1%

1 2

PR208

6.49K_0402_1%

1 2

PR209

PR209 10K_0402_5%

10K_0402_5%

PF201

PF201 12A_65V_451012MRL

12A_65V_451012MRL

21

VMB

12

PC201

PC201 1000P_0402_50V7K

1000P_0402_50V7K

EC_SMB_CK1 34

EC_SMB_DA1 34

+3VALW

BATT_TEMP 34

PL201

SMB3025500YA_2P

1 2

A/D

BATT+

12

PC202

0.01U_0402_25V7K

0.1U_0603_25V7K

PC203

VL

12

PU201

1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

PR203

10K_0402_1%

8

7

6

5

G718_RHYST2

12

1 2

G718_TMSNS1

G718_RHYST1

G718_TMSNS2

PR207

47K_0402_1%@

1 2

PH202

PH202 100K_0402_1%_TSM0B104F4251RZ@

100K_0402_1%_TSM0B104F4251RZ@

12

PR204

21.5K_0402_1%

PR206

9.76K_0402_1%

1 2

12

PH201

PH201 100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

1 2

PR205

PR205 100K_0402_1%@

100K_0402_1%@

MAINPWON 40,43

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2011/01/132010/01/13

Title

Size Document Number Rev

Date: Sh eet

Compal Electronics, Inc.

BATTERY CONN / OTP

41 50Thursday, April 08, 2010

D

41 50Thursday, April 08, 2010

0.3

of

5

PQ301

FDS6675BZ_SO8

DTA144EUA_SC70-3

13

2

PQ307

PACIN

PQ311

DTC115EUA_SC70-3

8 7

5

PQ304

2

1 3

PQ305

DTC115EUA_SC70-3

PR313

3K_0402_1%

1 2

ACOFF

2

4

VIN

D D

C C

12

PR301

47K_0402_5%

13

2

G

PACIN40

ACON40

ACOFF34,40

D

2N7002KW_SOT323- 3

S

P2

1 2 36

12

PR303

PC301

200K_0402_1%

0.1U_0603_25V7K

P2-1

PQ302

FDS6675BZ_SO8

1 2 3 6

4

FSTCHG34

12

PR309

150K_0402_1%

P2-2

PQ310

13

D

2N7002KW_SOT323- 3

2

G

S

13

IREF34

0.01U_0402_25V7K

ADP_I34

PR319

154K_0402_1%

PR322

100K_0402_1%

Connect to EC A/D Pin.

CHGVADJ=(Vcell-4)/0.10627

B B

Vcell

4V

4.2V

4.35V

CHGVADJ

0V

1.882V

3.2935V

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

P3

12

DIS/UMA CP mode (55W) Vaclim=2.39*(2K/(2K+16.9K))=0.253V Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) where Vaclim=0.253V, Iinput=2.76A

PQ314 TP0610K-T1-E3_SOT23-3PQ314 TP0610K- T1-E3_SOT23-3

P3-1

13

PR333

10_0603_5%

1 2

6251_DCIN

8 7

5

PC313

1 2

12

CHGVADJ34

4

P3

FSTCHG

PC312 6800P_0402_25V7KPC312 6800P_0402_25V7K

6251_VCOMP-1

PC315

PC315 100P_0402_50V8J@

100P_0402_50V8J@

6251_VREF

12

PC321

0.01U_0402_25V7K

PR302

0.02_1206_1%

1

2

PD301

RB751V-40TE17_SOD323-2

1 2

10K_0402_1%

1 2

0.1U_0402_16V7K

1 2

PR314 6.81K_0402_1%PR314 6.81K_0402_1%

1 2

PC316

0.1U_0402_16V7K

PR306

PC308

1 2

PR321

16.9K_0402_1%

1 2

2K_0402_1%

PR325

15.4K_0402_1%

1 2

6251_VDD

12

1 2

PR316

PR316 100_0402_1%

100_0402_1%

PR324

31.6K_0402_1%

3

B+

PJ301

6251_DCIN

6251_CSON

12

PC310

0.047U_0402_16V7K

6251_CSOP

6251_CSIN

PC314

0.1U_0402_16V7K

6251_CSIP

1 2

LX_CHG

DH_CHG

2.2_0402_5%

BST_CHG

6251_VDDP

DL_CHG

2

112

JUMP_43X118@

PC309

0.1U_0603_25V7K

12

20_0402_5%

1 2

PR311

20_0402_5%

1 2

2.2_0402_5%

PR320

1 2

12

PC323

4.7U_0805_6.3V6K

CSIP

PR310

PR312

PR312 20_0402_5%

20_0402_5%

PR315

BST_CHGA

12

4

3

12

PC307

1

2.2U_0603_6.3V6K

2

6251_EN CSON

3

CELLS

4

5

6

6251_ICM

7

6251_VREF

8

9

10

6251_VADJ

11

12

PR308

12

PR326

100K_0402_1%

6251_ICOMP

6251_VCOMP

6251_CHLIM

6251_ACLIM

12

PC302

470P_0603_50V8J@

PU301

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

24

23

22

21

20

19

18

17

16

15

14

13

VDD

ACSET

EN

CELLS

ICOMP

VCOMP

ICM

VREF

CHLIM

ACLIM

VADJ

GND

ISL6251AHAZ-T_QSOP24

12

PC324

0.1U_0603_25V7K

1 2

CSOP

12

PC317

0.1U_0603_25V7K

PD303

PD303 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PR323

4.7_0402_5%

12

6251_VDD

2

CHG_B+

PC306

1 2

PC304

PC305

4.7U_0805_25V6-K

PC306

1 2

PC303

2200P_0402_50V7K

4.7U_0805_25V6-K

DTC115EUA_SC70-3

PQ308

3 5

241

SIS412DN-T1-GE3 _PAK1212-8

PQ312

3 5

241

SI7716ADN-T1-GE3 _PAK1212-8

DISCHG_GCSIN

PR305

10K_0402_1%

1 2

DISCHG_G-1

13

PQ306

PL301

10U_LF919AS-100M-P3_4.5A_20%

1 2

12

PR318

4.7_1206_5%

6251_SN

12

PC322

680P_0603_50V7K

4cell : PR327 3cell : PR330

CELLS

PQ303

FDS6675BZ_SO8

1 2 3 6

4

PR304

47K_0402_1%

1 2

1

PD302

PD302 RB715F_SOT323-3

RB715F_SOT323-3

2

0.02_1206_1%

CHGCHG

1

2

6251_VDD 6251_VDD

12

PR330

PR330 0_0402_5%@

0_0402_5%@

PQ313A

2N7002KDW-2N _SOT363-6@

8 7

5

VIN

3

2

PC311

0.1U_0603_25V7K

PR317

PR327

PR327 100K_0402_1%

100K_0402_1%

1 2

61

ACOFF

12

4

3

2

1

PR307

200K_0402_1%

1 2

13

D

PACIN

2

G

S

PQ309

2N7002KW_SOT323- 3

12

PC318

PC319

10U_1206_25V6M

PR328

PR328 100K_0402_1%@

100K_0402_1%@

1 2

34

PQ313B

2N7002KDW-2N _SOT363-6@

VIN

BATT+

12

PC320

10U_1206_25V6M

5

12

PR331

PR331 0_0402_5%@

0_0402_5%@

BATT_SEL_EC34

PR335

100K_0402_1%

A A

5

PR337

2

P3-2

100K_0402_1%

PQ315

DTC115EUA_SC70-3

P3-3

12

13

FSTCHG

1

PD304

RB715F_SOT323-3

2

SUSP#

3

4

SUSP# 34,39,46

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

2011/01/132010/01/13

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sh eet

Compal Electronics, Inc.

CHARGER

1

of

42 50Thursday, April 08, 2010

of

42 50Thursday, April 08, 2010

of

42 50Thursday, April 08, 2010

0.3

P3-4

2

5

4

3

2

1

ISL6237_B+

12

PC406

PC405

10U_1206_25V6M

2200P_0402_50V7K

PL402

4.7UH_FMJ-0630T-4R7 HF_5.5A_20%

12

PR405

4.7_1206_5%

5V_SNB

12

680P_0603_50V7K

PC416

12

PJ402

2

112

JUMP_43X118@

PJ403

2

112

JUMP_43X118@

12

PC407

0.1U_0402_25V6

PR407

61.9K_0402_1%@

1 2

PR409

1 2

0_0402_5%

+5VALWP

1

+

2

PC415

PC415 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

12

PR419

0_0402_5%

ISL6237_B+

PR412

100K_0402_1%

1 2

12

3 5

241

3 5

241

PQ401

PQ401 SIS412DN-T1-GE3_PAK1212-8

SIS412DN-T1-GE3_PAK1212-8

BST3A-1

PR403

2.2_0603_5%

PC413

0.1U_0603_25V7K

1 2

PQ403

PQ403 SI7716ADN-T1-GE3_PAK1212-8

SI7716ADN-T1-GE3_PAK1212-8

PC419

0.22U_0603_25V7K

PR414

1 2

200K_0402_1%

VL

PR418

1 2

806K_0603_1%

12

PR401

0_0402_5%

1 2

2VREF_ISL6237

1 2

0.22U_0603_25V7K

PR420

47K_0402_1%@

1 2

PC421

0.047U_0402_16V7K

PC408

0.1U_0603_25V7K

UG3

BST3A

12

SW3

LG3

FB3

VL

PC418

EN_LDO

3/5V_EN1

3/5V_EN2

1 2

12

2VREF_ISL6237

PC422

0.047U_0402_16V7K

@

1 2

33

26

24

25

23

30

32

1

8

20

4

14

27

PR417

PR417 0_0402_5%

0_0402_5%

PU401

TP

UGATE2

BOOT2

PHASE2

LGATE2

OUT2

FB2

REF

NC

SECFB

EN_LDO

EN1

EN2

PC420

VL

1 2

PC409

3/5V_VIN

3/5V_VCC

3

6

VIN

VCC

TON

NC

2

5

3/5V_NC

12

3/5V_TON

12

PR421

PR421 0_0402_5%

0_0402_5%

1U_0603_10V6K

12

1U_0603_10V6K

PC410

7

19

PVCC

LDO

15

UGATE1

17

BOOT1

16

PHASE1

18

LGATE1

22

PGND

10

OUT1

11

FB1

9

BYP

29

SKIP

28

POK2

13

POK1

12

ILIM1

31

ILIM2

GND

RT8206BGQW_Q FN32_5X5

21

4.7U_0805_6.3V6K

PC411

1U_0603_10V6K

1 2

HG5

BST5A

PR406

2.2_0603_5%

SW5

LG5

FB5

5V_SKIP

ILM1

ILIM2

BST5A-1

12

PC414

0.1U_0603_25V7K

PR410

PR410 0_0402_5%@

0_0402_5%@

1 2

PR411

PR411 0_0402_5%

0_0402_5%

PR413

PR413 0_0402_5%@

0_0402_5%@

PR415

PR415 301K_0402_1%

301K_0402_1%

PR416

PR416 301K_0402_1%

301K_0402_1%

1 2

12

2VREF_ISL6237

12

PQ402

PQ402 SIS412DN-T1-GE3_PAK1212-8

SIS412DN-T1-GE3_PAK1212-8

3 5

241

3 5

241

PQ404

PQ404 SI7716ADN-T1-GE3_PAK1212-8

SI7716ADN-T1-GE3_PAK1212-8

VL

+3VALWP +3VALW

+5VALWP +5VALW

2VREF_ISL6237

B+

PJ401

PJ401 JUMP_43X118@

JUMP_43X118@

2

D D

12

PC401

330P_0402_50V7K

+3VALWP

1

+

PC412

150U_B2_6.3VM_R45M

C C

B B

PC412

2

VS

112

12

PC402

PC403

10U_1206_25V6M

0.1U_0402_25V6

PL401

1 2

0_0402_5%

10K_0402_1%

PD402

LLZ5V1B_LL34-2

PL401

4.7_1206_5%

680P_0603_50V7K

21

MAINPWON40,41

4.7UH_FMJ-0630T-4R7 HF_5.5A_20%

PR404

1 2

PR408

1 2

@

12

PR402

PC417

PD401

1 2

RB751V-40_SOD323-2

EN_LDO-1

PD403

1 2

RB751V-40_SOD323-2

PC404

2200P_0402_50V7K

12

3V_SNB

12

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

3VALW/5VALW

Size Document Number Rev

Thursday, April 08, 2010

Date: Sh eet

2

Date: Sh eet

43 50

1

0.3Custom

of

5

D D

PR501

0_0402_5%

SYSON34,39

+5VALW

C C

1 2

PR505

100_0603_1%

1 2

PC509

4.7U_0603_6.3V6K

12

PC501

0.1U_0402_16V7K

@

12

PC510

47P_0402_50V8J@

1 2

PR508

31.6K_0402_1%

1 2

PR509

30.1K_0402_1%

4

1.5V_V5FILT

1.5V_FB

1.5V_TON

1.5V_EN

3

1.5V_IN

678

PR502

240K_0402_1%

1 2

BST_1.5V BST_1.5V-1

1 2

PR503

2.2_0603_5%

14

1

PU501

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

15

NC

BOOT

UGATE

EN/DEM

PHASE

VDDP

LGATE

GND7PGND

RT8209BGQW _WQFN14_3P5X3P5

8

UG_1.5V

13

SW_1.5V

12

1.5V_TRIP

11

CS

10

LG_1.5V

9

1 2

PR506

7.15K_0402_1%

1 2

PC506

0.1U_0603_25V7K

+5VALW

12

PC512

4.7U_0805_6.3V6K

35241

4

12

PC502

10U_1206_25V6M

PQ501

PQ501 SI4172DY-T1-GE3_SO8

SI4172DY-T1-GE3_SO8

1.0UH_PCMC104T-1R0MN_20A_20%

1 2

12

PR504

4.7_1206_5%

1.5V_SNB

12

PQ502

680P_0603_50V7K

123 5

TPCA8028-H_SOP-ADVANCE8-5

PL501

12

PC503

PC513

2

PJ501

2

112

JUMP_43X79@

12

PC504

PC505

10U_1206_25V6M

PC505

0.1U_0402_25V6

2200P_0402_50V7K

+1.5VP

Imax

13A

ΚΚΚΚ

1

+

PC507

2

220U_B2_2.5VM_R15M

Ipeak

12

OCP

PC508

10U_0603_6.3V6M

ΚΚΚΚ

30A

16.2A

1

B+

PJ504

+1.5VP +1.5V

B B

4.7U_0805_6.3V6K

PR523

PR523 0_0402_5%

0_0402_5%

S3_0.75V_EN5

SUSP8,39,45

A A

5

1 2

PR521

PR521 0_0402_5%@

0_0402_5%@

1 2

0.1U_0402_16V7K@

PC528

0.75V_EN

+1.5V

1

PJ503

1

JUMP_43X79@

2

12

PC525

1K_0402_1%

13

D

1K_0402_1%

2

G

12

4

PQ505

S

SSM3K7002FU_SC70-3

PR519

PR522

0.75V_IN

12

0.75V_REF

12

PC527

0.1U_0402_16V7K

12

PU503

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC529

10U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PC530

10U_0603_6.3V6M

NC

TP

+0.75VSP

3

6

5

7

8

9

+3VALW

12

PC526

PC526 1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Secret Data

Deciphered Date

2

112

JUMP_43X118@

PJ506

2

112

JUMP_43X79@

Title

2011/01/132010/01/13

Title

Size Document Number Rev

Date: Sh eet

+0.75VS+0.75VSP

Compal Electronics, Inc.

1.5V/0.75VS

1

0.3

of

44 50Thursday, April 08, 2010

of

44 50Thursday, April 08, 2010

of

44 50Thursday, April 08, 2010

5

D D

C C

DGPU_PW R_EN16,22,39

+5VALW

1 2

PR602

PR602 33K_0402_1%

33K_0402_1%

100_0603_1%

1 2

4.7U_0603_6.3V6K

0.1U_0402_16V7K

PR605

PC612

GVID1-2

1 2

12

PC606

+VGA_COREP

12

PR612

84.5K_0402_1%

PR604

PR604 0_0402_5%@

0_0402_5%@

1 2

PC615

PC615 47P_0402_50V8J@

47P_0402_50V8J@

PR610

6.81K_0402_1%

PR613

84.5K_0402_1%

1 2

4

PR601

PR601 205K_0402_1%

PU601

TON

VOUT

VDD

FB

PGOOD

VGA_PWROK 16

205K_0402_1%

1 2

BST_VGA

14

1

15

NC

BOOT

UGATE

EN/DEM

PHASE

LGATE

GND7PGND

RT8209BGQW _WQFN14_3P5X3P5

8

VDDP

VGA_TON

VGA_EN BST_VGA-1

VGA_VOUT SW_VGA

VGA_V5FILT

VGA_FB

PR609

1 2

0_0402_5%

12

2

3

4

5

6

PR603

2.2_0402_5%

1 2

CS

13

12

11

10

9

UG_VGA

VGA_TRIP

1 2

PR606

7.68K_0402_1%

LG_VGA

3

PC605

0.1U_0603_25V7K

1 2

+5VALW

12

PC614

4.7U_0805_6.3V6K

VGA_FB1

578

PQ601

PQ601 AO4466_SO8

AO4466_SO8

3 6

241

786

5

PQ602

PQ602 SI4634DY-T1-E3_SO8

SI4634DY-T1-E3_SO8

4

123

Rds=5.5~6.7mȍ

2

VGA_IN

12

PC602

PC601

10U_1206_25V6M

PL601

0.82UH_PCMC063T-R82MN_13A_20%

1 2

12

PR607

4.7_1206_5%

VGA_SNB

12

PC613

PC613 680P_0603_50V7K

680P_0603_50V7K

10U_1206_25V6M

PR608

100_0402_5%

PC603

1

PJ601

2

112

JUMP_43X79@

12

PC604

0.1U_0402_25V6

2200P_0402_50V7K

1

+

PR611

PR611 0_0402_5%

0_0402_5%

1 2

+

2

12

B+

ΚΚΚΚ

Imax

8.89A

ΚΚΚΚ

Ipeak OCP

12

PC607

PC609

10U_0603_6.3V6M

330U_D2_2.5VY_R9M

9.88A

ΚΚΚΚ

12.19~15.21A

+VGA_COREP

12

PC611

PC610

10U_0603_6.3V6M

+VGASENSE 21

10U_0603_6.3V6M

VFB=0.75V

61

GVID1-1

GPU_VID119

PR616

10K_0402_5%

PR614

12

10K_0402_1%

12

GPU_VID019

PR618

B B

PR618

10K_0402_5%@

N11M-GE1/LP1

A A

PQ603A

2

2N7002KDW-2N _SOT363-6

PC616

0.01UF_0402_25V7K

PR617

12

10K_0402_1%@

0 1

12

GPIO6GPIO5

GPU_VID1GPU_VID0

GVID0-1

12

00 1 1

@

12

GVID0-2

34

5

PC617

0.01UF_0402_25V7K

VGA_CORE

0.8V

0.86V

PR615

PR615 100K_0402_1%@

100K_0402_1%@

PQ603B

PQ603B 2N7002KDW-2N _SOT363-6

2N7002KDW-2N _SOT363-6

SUSP8,39,44

4.7U_0805_6.3V6K

PR620

33K_0402_1%

1 2

PC622

0.1U_0402_16V7K

PJ604

PJ604 JUMP_43X39@

JUMP_43X39@

PC618

LDO_1.8V_EN

12

+3VS

1

2

12

13

D

2

G

S

PR619

1K_0402_1%

PR621

1.24K_0402_1%

PQ604

PQ604 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

LDO_1.8V_IN

12

LDO_1.8V_REF

12

PC620

0.1U_0402_16V7K

PJ602

2

+VGA_COREP +VGA_CORE

PU602

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC621

10U_0603_6.3V6M

6

5

NC

TP

+1.8VSP

PC623

10U_0603_6.3V6M

12

7

8

9

112

JUMP_43X118@

PJ603

112

JUMP_43X39@

+5VS

PC619

PC619 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.8VS+1.8VSP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/01/132010/01/13

2

Title

Size Document Number Rev

Date: Sh eet

Compal Electronics, Inc.

VGA_CORE/1.8VS/1.1VS

45 50Thursday, April 08, 2010

1

0.3

of

5

PJ701

2

B+

D D

C C

112

JUMP_43X118@

SUSP#34,39,42

VTT_SELECT8

B B

VTT_B+

12

PC701

PC702

PC703

10U_1206_25V6M

0.1U_0402_25V6

PD701

PD701 RB751V-40_SOD323-2@

RB751V-40_SOD323-2@

1 2

47K_0402_1%

1 2

H_VTTVID1= Low, 1.1V H_VTTVID1= High, 1.05V

12

PR706

1 2

35.7K_0402_1%

PC704

PR713

2200P_0402_50V7K

VCCP_POK5

+5VS

12

PC707

2.2U_0603_6.3V6K

12

PC710

0.1U_0402_16V7K

VTT_VCC

VTT_EN-1

PC713

12

4

PR701

1K_0402_5%

1 2

PR703

0_0402_5%

1 2

PU701

3

VIN

4

VCC

5

EN

VTT_COMP

22P_0402_50V8J@

PC714

VFB=0.6V

1.1VS_PGOOD

2

8

GND

PGOOD

APW7138NITRL_SSOP 16

NC6FB7FSET

12

PR710

22.1K_0402_1%@

VTT_COMP-1

12

6800P_0402_25V7K@

1UG16

PHASE

VTT_FB

12

PR716

1.96K_0402_1%

SW_VTT

UG_VTT

9

VTT_FSET

12

PR711

42.2K_0402_1%

316KHz

VTT_BOOT

15

BOOT

PVCC

LG

PGND

ISEN

VO

10

12

PC712

0.01U_0402_25V7K

@

1 2

PR702

2.2_0603_5%

1 2

+5VALW

VTT_PVCC

14

LG_VTT

13

12

VTT_ISEN

11

PR714

1.58K_0402_1%

VTT_BOOT-1

12

PR704

PR704 0_0603_5%

0_0603_5%

PR705

4.7_0603_5%

1 2

PC706

2.2U_0603_6.3V6K

1 2

PR709

2.21K_0402_1%

VTT_FB-1

3

1 2

PC705

0.1U_0603_25V7K

VTT_VCC

5

PQ701

PQ701 TPCA8030-H_SOP-ADV8-5

TPCA8030-H_SOP-ADV8-5

4

123

4

PQ702

123 5

TPCA8028-H_SOP-ADVANCE8-5

Rds=1.15~1.6mȍ

2

PL701

0.36UH_PCMC104T-R36MN1R17_30A_20%

1 2

12

4

VTT_SNB

12

PQ703

123 5

TPCA8028-H_SOP-ADVANCE8-5

PR707

4.7_1206_5%

PC711

PC711 1000P_0603_50V7K

1000P_0603_50V7K

PR712

PR712 10_0402_5%

10_0402_5%

1 2

PR715

PR715 0_0402_5%

0_0402_5%

12

PJ702

+1.1V_VCCPP +VCCP

2

112

JUMP_43X118@

PJ703

2

112

JUMP_43X118@

1

Imax Ipeak

ΚΚΚΚ

OCP

1

+

2

PC709

330U_D2E_2VM_R6M

VTT_SENSE 8

ΚΚΚΚ

20A

22A

ΚΚΚΚ

30A

+1.1V_VCCPP

PJ705

2

112

JUMP_43X118@

PJ704

2

+VCCP +1.05VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

3

Compal Secret Data

Deciphered Date

2

1

+

2

Title

Size Document Number Rev

Custom

Date: Sh eet

112

JUMP_43X118@

PC708

330U_D2E_2VM_R6M

Compal Electronics, Inc.

+1.1VS_VTT

+VGA_1.05VS

1

0.3

of

46 50Thursday, April 08, 2010

5

4

8

GFXVR_EN

3

2

1

PR810 0_0402_5% PR810 0_0402_5%

VCC

BST

DRVH

SW

PVCC

DRVL

PGND

AGND

12

24

23

22

21

20

19

18

17

33

PC813

PC813 1000P_0402_50V7K

1000P_0402_50V7K

8

+5VS

PR811

PR811 10_0603_1%

10_0603_1%

1 2

12

PC804

PC804 1U_0603_16V6K

1U_0603_16V6K

GFX_VCC

GFX_BOOST

1 2

GFX_DRVH

GFX_SW

GFX_DRVL

12

Shortest the net trace

PR815

2.2_0603_5%

GFX_BOOST-1

2.2U_0603_10V6K

PH801

1 2

220K_0402_5%_ERTJ0EV224J~D

PR826

71.5K_0402_1%

PC814

PC814 560P_0402_50V7K

560P_0402_50V7K

678

PC805

0.22U_0603_25V7K

1 2

+5VS

12

PC808

Place RTH1 close to inductor on the same layer

GFX_CSCOMP-1

12

PR827

PR827 165K_0402_1%

165K_0402_1%

PR828

39K_0603_1%

35241

3 5

12

+GFX_B+

12

PC819

0.1U_0603_25V7K

SI4172DY-T1-GE3_SO8

12

PR816

4.7_1206_5%

GFX_SNB

12

PC812

PC812 680P_0603_50V7K

680P_0603_50V7K

0.1U_0603_25V7K

GFX_CSFB-1

PQ801

PQ802

TPCA8028_PSO8

241

12

PC802

1 2

PC802

PC818

10U_1206_25V6M

2200P_0402_50V7K

PL802

1

4

3

2

0.36UH_PCMC104T-R36MN1R 17_30A_20%

+GFX_COREP

PC803

10U_1206_25V6M

PL801

FBMA-L11-201209-121LMA50T_0805

1 2

1

+

PC811

2

330U_D2_2.5VY_R9M

PJ801

2

112

JUMP_43X118@

PJ802

2

112

JUMP_43X118@

+GFX_COREP

LL=7m ohm OCP=26A VID:0.3~1.25V Io(max)=22A

+GFX_CORE

B+

D D

GFXVR_VID_08GFXVR_VID_18GFXVR_VID_28GFXVR_VID_38GFXVR_VID_48GFXVR_VID_58GFXVR_VID_6

+3VS

12

PR802

0_0402_5%

GFX_PWRGD

47P_0402_50V8J

GFX_COMP-1

12

PC809

1 2

PR818

20K_0402_1%

12

PR819

10.7K_0402_1%

+GFX_B+

GFX_IMON

GFX_FBRTN

GFX_FB

GFX_COMP

GFX_VCC

GFX_ILIM

1 2

GFX_CSCOMP

GFXVR_PWRGD

+VCCP

12

PR812

PR812 300K_0402_1%@

300K_0402_1%@

12

1 2

PC807

PR817

PC801

0.056U_0402_16V7K

GFX_IMON

12

PR813

6.98K_0402_1%

1 2

PC810

470P_0402_50V8J

GFXVR_IMON8

12

PC806

1000P_0402_50V7K

C C

GFX_FB-1

220P_0402_50V7K

1 2

1K_0402_1%

Avoid high dV/dt

PR823

0_0402_5%

12

PR831

B B

PR831

100_0402_1%

PR824

PR824 0_0402_5%

0_0402_5%

1 2

12

PR830

100_0402_1%

Connect to input caps

8

+GFX_CORE

VSS_AXG_SENSE

VCC_AXG_SENSE

PR801

PR801 10K_0402_1%

10K_0402_1%

1

2

3

4

5

6

7

8

PR820

80.6K_0402_1%

PR829

1K_0402_1%

PR814 0_0402_5%@ PR814 0_0402_5%@

1 2

PR803 0_0402_5% PR803 0_0402_5%

PR804 0_0402_5% PR804 0_0402_5%

1 2

GFX_EN

GFX_VID0

GFX_VID1

32

EN

VID031VID130VID229VID328VID427VID526VID6

PWRGD

IMON

CLKEN#

FBRTN

ADP3211AMNR2G_QFN32_5X5

FB

COMP

GPU

ILIM

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

PR821

237K_0402_1%

GFX_RAMP-1

12

GFX_RPM

1 2

PC815

GFX_RT

PR822

1 2

340K_0402_1%

GFX_IREF

1 2

1000P_0402_50V7K

PR806 0_0402_5% PR806 0_0402_5%

PR805 0_0402_5% PR805 0_0402_5%

1 2

GFX_VID2

PU801

GFX_RAMP

12

PR807 0_0402_5% PR807 0_0402_5%

PR808 0_0402_5% PR808 0_0402_5%

1 2

GFX_VID3

GFX_VID4

GFX_CSREF

GFX_CSCOMP

PR825

422K_0402_1%

12

PR809 0_0402_5% PR809 0_0402_5%

1 2

GFX_VID5

GFX_VID6

25

16

GFX_CSFB

GFX_CSCOMP

PC816

PC816 1000P_0402_50V7K

1000P_0402_50V7K

(15A,600mils ,Via NO.= 30)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

Compal Secret Dat a

Deciphered Dat e

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

GFX_CORE

1

of

47 50Thursday, April 08, 2010

of

47 50Thursday, April 08, 2010

of

47 50Thursday, April 08, 2010

0.3

8

7

6

5

4

3

2

1

PROC_DPRSLPVR8

PSI#8

H H

G G

+3VS

12

PR914

0_0402_5%

VGATE15,34

PR916

@ PR 916

@

0_0402_5%

1 2

PC912 150P_0402_50V8JPC912 150P_0402_50V8J

1.65K_0402_1%

1 2

VCCSENSE-1

0_0402_5%

1 2

H_PROCHOT#5,34

PR922

PR927

12

1 2

+5VS

12

@

TTSENSE-1

12

CLK_EN#12

+VCCP

4.99K_0402_1%

12

PC910

PR926

PR926 0_0402_5%

0_0402_5%

PR920

12

1 2

F F

IMVP_IMON8

1000P_0402_50V7K

E E

D D

Avoid high dV/dt

C C

B B

A A

8

VR_ON34

PR901

3K_0402_5%

3212_CLK_EN#

PR915

0_0402_5%

PC901

0.082U_0402_16V7K

3212_FBRTN

3212_FB

3212_COMP-1

1 2

PC914

PC914 150P_0402_50V8J

150P_0402_50V8J

+5VS

+3VS

PR930

0_0402_5%@

12

D

PQ909

@

S

2N7002W-T/R7_SOT323-3

PR937

7.32K_0402_1%

PR940

PR940 0_0402_5%

0_0402_5%

PH901

@ PH901

@

100K +-1% NCP15WF104F03RC 0402

PR945

100_0402_1%

12

VCCSENSE

VSSSENSE

12

PR946

100_0402_1%

Layout note: Close CPU pin

H_VID68

H_VID58

H_VID48

H_VID38

H_VID28

H_VID18

H_VID08

+3VS

12

PR912

3K_0402_5%

PR913

0_0402_5%

12

PC913

PR923

39.2K_0402_1%

1 2

PR924 5.11K_0402_1% PR924 5.11K_0402_1%

12

PR928

@PR928

@

499_0402_1%

3212_VRTT-1

13

2

G

3212_EN

3212_PWRGD

IMVP_IMON

3212_CLK_EN#

12P_0402_50V8J

12

3212_COMP

3212_VRTT

TTSENSE

3212_VRTT

0_0402_5%

3212_TRDET#

12

Connect to input caps

TTSENSE

12

@

+CPU_CORE

VCCSENSE 8

VSSSENSE 8

7

+CPU_B+

PC921

0.01U_0402_50V7K

Layout note: Close Phase 1 MOS

3212_VID0

3212_VID1

3212_VID2

3212_VID33212_RAMP

3212_VID4

PU901

48

46

47

VID0

VID2

1

EN

2

PWRGD

3

IMON

4

CLKEN

5

FBRTN

6

FB

7

COMP

8

TRDET

9

VARFR

10

VRTT

11

TTSNS

12

GND

49

AGND

VID1

$'3015*B4)1B;

RT

RPM

IREF

15

14

13

3212_IREF

3212_RPM

3212_RT

12

PR933

PR934

PR935

80.6K_0402_1%

69.8K_0402_1%

PR939

12

1K_0402_1%

PC922

1000P_0402_50V7K

CSREF

1U_0603_16V6K

44

45

VID3

RAMP

17

16

12

3212_CSCOMP

162K_0402_1%

PR936

PR936 649K_0402_1%

649K_0402_1%

3212_RAMP-1

12

PC925

6

3212_VID5

43

VID4

LLINE

18

12

Shortest the net trace

VID5

CSREF

3212_VID6

3212_PSI#

42

41

PSI

VID6

CSSUM

CSCOMP

19

20

3212_CSSUM

3212_CSCOMP

PC923

PR944 137K_0603_1%PR944 137K_0603_1%

12

PR911 499_0402_1%PR911 499_0402_1%

3212_DPRSLP

39

38

40

PH0

DPRSLP

OD3

ILIM

23

21

22

3212_ILIM

12

PR938

1.91K_0402_1%

12

1 2

PC924

1200P_0402_50V7K

390P_0402_50V7K

PR943 137K_0603_1%PR943 137K_0603_1%

12

+5VS

12

PR902

PR902 10_0603_5%

10_0603_5%

12

3212_VCC

37

PH1

VCC

BST1

DRVH1

SW1

SWFB1

PVCC

DRVL1

PGND

DRVL2

SWFB2

SW2

DRVH2

BST2

PWM3

SWFB3

24

PR941

PR942

165K_0402_1%

1 2

3212_CS_PH1

3212_CS_PH2

0603 package at least

5

PC902

1U_0603_16V6K

3212_BST1

36

35

34

3212_SWFB1

33

32

31

30

29

3212_SWFB2

28

27

26

3212_BST2

25

12

71.5K_0402_1%

3212_CSCOMP-1

PH0 PH1 # of PH

0

01

11

2.2_0603_5%

3212_DRVH1

PR921

1 2

100_0402_1%

3212_DRVL1

3212_DRVL2

PR925

1 2

100_0402_1%

3212_DRVH2

PR929

2.2_0603_5%

Layout note: Boost Parts close

PH902

220K_0402_5%_ERTJ0EV224J~D

1 2

2

3

Layout note:

PR917

3212_BST1-1

12

3212_SW1

3212_SW2

3212_BST2-2

12

PC908

0.1U_0603_25V7K

12

3212_CS_PH1

12

PC911

4.7U_0603_6.3V6M

3212_CS_PH2

PC919

0.1U_0603_25V7K

12

+5VS

Auburndale SV: VID(0-5):001001

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Boost Parts close

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3212_SW1

TPCA8028-H_SOP-ADVANCE8-5

3212_DRVL1

Close IC

3212_SW2

TPCA8028-H_SOP-ADVANCE8-5

3212_DRVL2

Layout note: Close to PHASE 1 inductor on the same layer

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

PROC_DPRSLPVR

ULV: VID(0-5):001010

2010/01/13 2011/01/13

Auburndale 45W

Clarksfield SV

Clarksfield XE

PQ903

4

123 5

PQ907

4

123 5

PR947 1K_0402_5%@PR947 1K_0402_5%@

12

PR948 1K_0402_5%@PR948 1K_0402_5%@

12

PR949 1K_0402_5%PR949 1K_0402_5%

12

PR950 1K_0402_5%@PR950 1K_0402_5%@

12

PR951 1K_0402_5%@PR951 1K_0402_5%@

12

PR952 1K_0402_5%PR952 1K_0402_5%

12

PR953 1K_0402_5%@PR953 1K_0402_5%@

12

PR954 10K_0402_5%PR954 10K_0402_5%

12

Compal Secret Dat a

Deciphered Dat e

3

3212_DRVH1

3212_DRVL1

3212_DRVH2

3212_DRVL2

+VCCP

4

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

PROC_DPRSLPVR

HFM_Icc LL

HFM_VID

0.85

50

38

52

0.95 TBD

5

65

12

PC903

PC904

@

0.1U_0603_25V7K

PQ902

PQ902 TPCA8030-H_SOP-ADV8-5

TPCA8030-H_SOP-ADV8-5

123

PQ904

TPCA8028-H_SOP-ADVANCE8-5

123 5

+CPU_B+

12

PC916

@ PC916

@

0.1U_0603_25V7K

PQ906

PQ906 TPCA8030-H_SOP-ADV8-5

TPCA8030-H_SOP-ADV8-5

123

PQ908

TPCA8028-H_SOP-ADVANCE8-5

123 5

0.1U_0603_25V7K

PR955 1K_0402_5%PR955 1K_0402_5%

12

PR956 1K_0402_5%PR956 1K_0402_5%

12

PR957 1K_0402_5%@PR957 1K_0402_5%@

12

PR958 1K_0402_5%PR958 1K_0402_5%

12

PR959 1K_0402_5%PR959 1K_0402_5%

12

PR960 1K_0402_5%@PR960 1K_0402_5%@

12

PR961 1K_0402_5%PR961 1K_0402_5%

12

PR962 1K_0402_5%@PR962 1K_0402_5%@

12

2200P_0402_50V7K

PC917

2200P_0402_50V7K

2

Icc_TDC

Icc_Dyn

37

1.9m

12

PC905

12

PR918

CPU_SNB1

12

PC909

12

PR931

CPU_SNB2

12

PC920

Title

Size Document Number Rev

Date: Sheet

35

27

29Auburndale 35W

39

380.95

48

TBD

+CPU_B+

PL901

FBMA-L18-453215-900LMA90T_1812

12

4

3

4

CSREF-2

3

CSREF

CSREF-1

12

CSREF

12

PR932

10_0402_5%

1

+

2

PR919

PR919 10_0402_5%

10_0402_5%

1

12

PC906

10U_1206_25VAK

DCR=1.1mȍ ±7%

PL902

0.36UH_PCMC104T-R36MN1R 17_30A_20%

4.7_1206_5%

680P_0603_50V8J

PC918

0.36UH_PCMC104T-R36MN1R 17_30A_20%

4.7_1206_5%

680P_0603_50V8J

PL902

1

2

3212_CS_PH1

12

PC915

10U_1206_25VAK

DCR=1.1mȍ ±7%

PL903

1

2

3212_CS_PH2

LL=1.9m ohm OCP=60A VID:0.8~0.85V Io(max)=48A

Compal Electronics, Inc.

CPU_CORE

PC907

68U_25V_M_R0.36

of

48 50Thursday, April 08, 2010

of

48 50Thursday, April 08, 2010

of

48 50Thursday, April 08, 2010

B+

+CPU_CORE

0.3

5

4

3

2

9HUVLRQFKDQJHOLVW3,5/LVW 3DJHRI

IRU3:5

5HDVRQIRUFKDQJH 3* 0RGLI\/LVW 'DWH 3KDVH,WHP

1

D D





Add S3_0.75V_EN for 0.75 enable singal 44 Add PR523 and reserve PR521

Modify VGA GPIO table for NVIDIA SPEC.

45

Reserve PR615, PR617, PR618 and PC617 PR612, PR613 change to 84.5K from 100K

11/09

Before A









C C









B B













A A



Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2009/01/06

3

Compal Secret Data

Deciphered Date

2

20081022

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sh eet

Compal Electronics, Inc.

PIR (PWR)

<Doc>

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49 50Thursday, April 08, 2010

1

0.3

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Title

Size Document Number Rev

A3

Date: Sheet

1

HW PIR

LA-5941P 0.3

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50 50Thursday, April 08, 2010

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50 50Thursday, April 08, 2010

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50 50Thursday, April 08, 2010

1

Compal LA-5941P NIMUA, IdeaPad U460, LA-5941P NIMUB Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual