Compal LA-5941P NIMUA, IdeaPad U460, LA-5941P NIMUB Schematic

A

1 1

B

C

D

E

Compal Confidential

NIMUA/UB

2 2

Schematics Document

Arrandale

with Intel IBEX PEAK-M core logic

3 3

REV:0.3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Title

Title

Title

Cover Sheet

Cover Sheet

Cover Sheet

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-5941P

LA-5941P

LA-5941P

Date: Sheet

Date: Sheet

D

Date: Sheet

E

of

of

of

150Thursday, April 08, 2010

150Thursday, April 08, 2010

150Thursday, April 08, 2010

0.3

0.3

0.3

A

B

C

D

E

Compal confidential

File Name :

ZZZ

ZZZ

14.1W_PCB_LA5941P

14.1W_PCB_LA5941P

DAZ0D500102

DAZ0D500102

1 1

VRAM 64*16

DDR3*4

page20

PCI-E X16

Intel
Arrandale
(UMA/SG)

NVidia N11M-LP1

page19~23

level shift IC
HDMI
CONN

page24

CRT Connector

page26

2 2

LVDS
Connector

page27

ASM1442

page25

SW1

SW2

100MHz

2.7GT/s

PCI Express
Mini card Slot 2

page28

6*PCI-E BUS

Socket-rPGA989

37.5mm*37.5mm

page5~9

FDI *8

DMI *4

Intel Ibex Peak M

FCBGA 951

25mm*25mm

Thermal-sensor
EMC1403

Clock Generator

SLG8LV597VTR

Dual Channel

DDR3-800(1.5V)
DDR3-1067(1.5V)

AZALIA

14*USB2.0

page38

page12

DDR3-SO-DIMM X2

BANK 0, 1, 2, 3

Audio Codec

ALC259

CMOS Camera

POWER BD:
LS-5941P
POWER BT

SW BD:
LS-5942P
NOVO BT

UP TO 8G

page33

page 10,11

2Channel Speaker

DMIC_Int

Audio Jack CONN.

page27

CR BD:
LS-5944P

Body-Detect BD:
LS-5947P

Finger Print BD:
LS-5943P
U-pek TCS5D

page33

page33

page37

USB(WLAN)

PCI Express
Mini card Slot 3

3 3

page28

SPI ROM
BIOS+ME

Atheros 8131/32

SIM Card

page28

USB(WWAN)

CAP SENSOR BD:

4 4

LS-5946P
USER/SG
MUTE
Power Saving
BUTTON & LED

A

10/100/1G LAN

RJ45 CONN

page30

USB/JACK BD:
LS-5945P
USB PORT1,2,3
HP JACK
MIC JACK
KILL SW

SPI

page29

page13

Touch Pad

B

page35

G-sensor

page38

page 13~18

LPC BUS

EC

ENE KB926E0

page34

Int.KBD

AD

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Issued Date

Issued Date

SPI ROM
EC

C

6*SATA serial

BlueTooth CONN

USB1 CONN.

USB2 CONN

USB3 CONN

WWAN/3G

page35

ESATA AND USB CONN

page36

SATA HDD CONN

Mini card Slot 1

SSD

Compal Secret Data

Compal Secret Data

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

page37

page32

page28

page37

page37

page37

page37

page28

Card Reader
CONN

page38

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

MB Block Diagram

MB Block Diagram

MB Block Diagram

LA-5941P

LA-5941P

LA-5941P

250Thursday, April 08, 2010

250Thursday, April 08, 2010

250Thursday, April 08, 2010

of

of

E

of

0.3

0.3

0.3

A

B

C

D

E

DDR3 Voltage Rails

SMBUS Control Table

+5VS

+3VS

+1.5VS

plane

1 1

+B

State

+5VALW

+3VALW

+1.5V

+VCCPpower

+CPU_CORE

+VGA_CORE

+1.8VS

+0.75VS

+1.05VS

For SG

+3VS_DELAY

+1.8VS_VGA

+1.5VS_VGA

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

SOURCE

KB926

+3VALW

KB926

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

RAM
M2

X V

X

V

+3VALW

X

BATT KB926 SODIMM CLK CHIP

+3VALW

X

X

X

X

V

+3VALW

X

X

X

X

VV

+3VS

X

V

X

X

+3VS

X

WLAN
WWAN

N11x
Thermal
Sensor

X

X

X

X

X

V

+3VS

X

X

X

Cap sensor

EMC1403

board

X

+3VS

X

X

XXX XXX X

X

XV

X

X

X

ALS

X

V

+3VS

X

X

X

PCH

X

V

+3VALW

X

X

S0

S3

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

O

O

O

O

X

O

O

O

X

O

XX

X

OO

X

X

XX X

@ FUNCTION

PVT NON-USE

45@

(45 BOM)
100@ 10/100 LAN
GIGA@

UMA_HDMI@

HDMI@

3 3

3G@
X76@
ESATA@
CMOS@

GIGA LAN

FOR UMA HDMI components

FOR HDMI components

3G(WWAN) function

(X76 BOM)

ESATA function

Camera function
SSD@ SSD w/ miniPCIE socket
10M@
11M@
UMA@
DIS@

FOR 10M CHIP

FOR 11M CHIP

UMA only (Arranddale)

DIS only (Arranddale)
VGA@ FOR NVIDIA PART

HYBRID@ FOR SWITCHABLE

HU@
HD@

SWITCHABLE or UMA only

SWITCHABLE or DIS only

SKU

PCH, I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

HEX

A0

D2

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

PCIE PORT LIST

NEW CARD

1
2
3

LAN

4

3G
5
6
7
8

SATA PORT LIST

HDD

0
1

SSD

HM55 disabled

2,3
4

E-SATA

5

DEVICEPORT

DEVICEPORT

EC, I2C / SMBUS ADDRESSING

DEVICE

PCH

EMC1403 Thermal sensor

N-vidia Thermal sensor

ALS

HEX

96/98,R/W

9A 1 0 0 1 1 0 1 X

9E

70/72,R/W

USB PORT LIST

DEVICEPORT

USB 10
USB/ESATA

1WLAN

CMOS

2
3

USB 2
4
5

CARD READER
6
7

9
10
11
12
13

HM55 disabled

X

HM55 disabled

X

WIRELESS8

USB 3

FigerPrinter

BT

3G

ADDRESS

1 0 0 1 0 1 1 X

1 0 0 1 1 1 1 X

0 1 1 1 0 0 0 X 0 1 1 1 0 0 1 X

1 0 0 1 1 0 0 X

Arrandale(dGPU)

4 4

DIS only

Arrandale(iGPU)

UMA only

Arrandale(iGPU+dGPU)

SWITCHABLE

A

DIS@ / 100@ for EVT

UMA@ / 100@ for EVT

HYBRID@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

MB Notes List

MB Notes List

MB Notes List

LA-5941P

LA-5941P

LA-5941P

350Thursday, April 08, 2010

350Thursday, April 08, 2010

350Thursday, April 08, 2010

of

of

E

of

0.3

0.3

0.3

A

B

C

D

E

VGA and DDR3 Voltage Rails (N11M GPIO)

GPIO I/O ACTIVE Function Description

GPIO0

GPIO1

GPIO2

1 1

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

2 2

GPIO14

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

GPIO20

GPIO21

GPIO22

GPIO23

3 3

N/A

IN

OUT

OUT

OUT

OUT

OUT

OUT

I/O

OUT

OUT

I/O

IN

OUT

OUT

IN

OUT

IN

IN

IN

IN

IN

IN

I/O

N/A

-

H

H

H

-

-

-

L

L

L

-

-

-

-

-

-

-

-

-

-

-

HDMI_DETECT_VGA

NV_INVTPWM

VGA_ENVDD_R

VGA_ENABLT

GPU VID0

GPU VID1

Power Sequence

(+3VS)

(1.05VS)

(+VGA_CORE)

VDD33

PEX_VDD

NVVDD

(1.8VS)IFPAB_IOVDD

(1.5VS)

FBVDDQ

The ramp time for any rail must be more than 40us

PEX_VDD can ramp up any time

tNVVDD

tNV-IFPAB_IOVDD

tNV-FBVDDQ

GPIO6GPIO5

Device ID

N11M-LP1
(40nm)

0x0A6E

1

4 4

A

VGA_COREGPU_VID00GPU_VID1

00

1

1

0.8V

0.85V

0.86V

P-State

Deep P12

P8

P0

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRI OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

VGA Notes List

VGA Notes List

VGA Notes List

LA-5941P

LA-5941P

LA-5941P

450Thursday, April 08, 2010

450Thursday, April 08, 2010

450Thursday, April 08, 2010

of

of

E

of

0.3

0.3

0.3

5

D D

C C

VCCP_POK46

FROM POWER VTT
POWER GOOD SIGNAL

B B

R184

R184

1K_0402_1%

1K_0402_1%

12

Layout ruleΚ10mil width trace
length < 0.5", spacing 20mil

+VCCP

H_PROCHOT#34,48

H_THERMTRIP#16

+VCCP

H_PM_SYNC15

H_CPUPWRGD16

PM_DRAM_PWRGD15

R183

R183
560_0402_5%

560_0402_5%

1 2

BUF_PLT_RST#16,28,29

R564 0_0402_5%R564 0_0402_5%

H_PECI16

+VCCP

SVT

1.5K_0402_5%

1.5K_0402_5%

4

1 2

1 2

1 2

1 2

TP_SKTOCC#

12

R16349.9_0402_1% R16349.9_0402_1%

H_PECI_ISO

1 2

R569 68_0402_5%R569 68_0402_5%

12

H_PROCHOT#

H_THERMTRIP#

@

@

H_CPURST#_R

12

R13568_0402_5%

R13568_0402_5%

H_PM_SYNC_R

R187

R187

1 2

0_0402_5%

0_0402_5%

VCCPWRGOOD_1

R190

R190

1 2

0_0402_5%

0_0402_5%

VCCPWRGOOD_0

R139

R139

1 2

0_0402_5%

0_0402_5%

VDDPWRGOOD_R

R191

R191

1 2

0_0402_5%

0_0402_5%

R185

R185

PLT_RST#_R

1 2

R56020_0402_1% R56020_0402_1%

R55820_0402_1% R55820_0402_1%

R54849.9_0402_1% R54849.9_0402_1%

R55749.9_0402_1% R55749.9_0402_1%

H_CATERR#

VTT_POK

12

R186

R186
750_0402_1%

750_0402_1%

COMP3

COMP2

COMP1

COMP0

JCPU1B

JCPU1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

3

MISC THERMAL

MISC THERMAL

CLOCKS

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

PRDY#
PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TCK
TMS

TDI

TDO

CLK_CPU_BCLK

A16

CLK_CPU_BCLK#

B16

CLK_CPU_ITP

AR30

CLK_CPU_ITP#

AT30

CLK_EXP

E16

CLK_EXP#

D16

A18
A17

SM_DRAMRST#

F6

SM_RCOMP0

AL1

SM_RCOMP1

AM1

SM_RCOMP2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#1

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCK

AN28

XDP_TMS

AP28

XDP_TRST#

AT27

XDP_TDI

AT29

XDP_TDO

AR27
AR29

R555 0_0402_5%R555 0_0402_5%

AP29

XDP_DBRESET#

AN25

XDP_BPM#0

AJ22

XDP_BPM#1

AK22

XDP_BPM#2

AK24

XDP_BPM#3

AJ24

XDP_BPM#4

AJ25

XDP_BPM#5

AH22

XDP_BPM#6

AK23

XDP_BPM#7

AH23

T17 PADT17 PAD
T18 PADT18 PAD

3

1 2

R563 0_0402_5%R563 0_0402_5%

T19 PADT19 PAD

12

CLK_CPU_BCLK 16
CLK_CPU_BCLK# 16

CLK_EXP 14
CLK_EXP# 14

only for Arrandale

without EDP

PM_EXTTS#1_R 10,11

2

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

PM_EXTTS#0

PM_EXTTS#1

XDP_PREQ#

XDP_TMS

XDP_TDI

XDP_TDO

XDP_TCK

XDP_TRST#

XDP_DBRESET#

1 2

R567 100_0402_1%R567 100_0402_1%

1 2

R566 24.9_0402_1%R566 24.9_0402_1%

1 2

R565 130_0402_1%R565 130_0402_1%

Layout Note:Please these
resistors near Processor

1 2

R561 10K_0402_5%R561 10K_0402_5%

1 2

R562 10K_0402_5%R562 10K_0402_5%

R136 51_0402_1%@R136 51_0402_1%@

1 2

R138 51_0402_1%@R138 51_0402_1%@

1 2

R556 51_0402_1%@R556 51_0402_1%@

1 2

R134 51_0402_5%R134 51_0402_5%

1 2

R57 51_0402_1%@R57 51_0402_1%@

1 2

R133 51_0402_5%R133 51_0402_5%

1 2

R137

R137

1K_0402_5%@

1K_0402_5%@

1 2

1

+VCCP

+3VS

CHECK INTEL DOCUMENT #385422
Debug Port Design Guide Rev1.3

For Intel S3 Power Reduction.

5

+3VALW

5

U8

U8

2

P

VCCP_POK

+5VALW

A A

VCCP_POK

5

R416

R416
10K_0402_5%

10K_0402_5%

1 2

13

D

D

Q61

Q61

2

G

G

2N7002_SOT23

2N7002_SOT23

S

S

B

1

A

G

3

S3_0.75V_EN 44

4

Y

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

4

R195

R195

1 2

1.5K_0402_1%

1.5K_0402_1%

750_0402_1%

750_0402_1%

+1.5V +1.5V

12

R193

R193

1.1K_0402_1%

1.1K_0402_1%

@

@

VDDPWRGOOD_RDRAM_PWRGD

12

R194

R194

12

R192

R192
3K_0402_1%

3K_0402_1%

@

@

DDR3 CONNECTER

PCH GPIO CONTROL

DRAMRST_CNTRL_PCH16

6

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

For Intel S3 Power Reduction.

R301

R301
1K_0402_1%

1K_0402_1%

1 2

DRAMRST#10,11

DRAMRST_CNTRL_R

1 2

R281 0_0402_5%R281 0_0402_5%

Compal Secret Data

Compal Secret Data

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

@

1 2

R3000_0402_5%@R3000_0402_5%

D

S

D

1 3

Q27

Q27

G

G

2

1

C338

C338

0.047U_0402_16V7K

0.047U_0402_16V7K

2

2

S

R283 100K_0402_5%R283 100K_0402_5%

SVT

DRAMRST# SM_DRAMRST#

2N7002_SOT23

2N7002_SOT23

Deciphered Date

Deciphered Date

Deciphered Date

12

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Arrandale(1/5)-Thermal/XDP

Arrandale(1/5)-Thermal/XDP

Arrandale(1/5)-Thermal/XDP

LA-5941P

LA-5941P

LA-5941P

1

550Thursday, April 08, 2010

550Thursday, April 08, 2010

550Thursday, April 08, 2010

0.3

0.3

0.3

of

of

of

5

JCPU1A

JCPU1A

DMI_CRX_PTX_N015
DMI_CRX_PTX_N115
DMI_CRX_PTX_N215
DMI_CRX_PTX_N315

DMI_CRX_PTX_P015
DMI_CRX_PTX_P115

D D

DMI_CRX_PTX_P215
DMI_CRX_PTX_P315

DMI_CTX_PRX_N015
DMI_CTX_PRX_N115
DMI_CTX_PRX_N215
DMI_CTX_PRX_N315

DMI_CTX_PRX_P015
DMI_CTX_PRX_P115
DMI_CTX_PRX_P215
DMI_CTX_PRX_P315

FDI_CTX_PRX_N015
FDI_CTX_PRX_N115
FDI_CTX_PRX_N215
FDI_CTX_PRX_N315
FDI_CTX_PRX_N415
FDI_CTX_PRX_N515
FDI_CTX_PRX_N615
FDI_CTX_PRX_N715

FDI_CTX_PRX_P015
FDI_CTX_PRX_P115
FDI_CTX_PRX_P215
FDI_CTX_PRX_P315
FDI_CTX_PRX_P415
FDI_CTX_PRX_P515

C C

FDI_CTX_PRX_P615
FDI_CTX_PRX_P715

FDI_FSYNC015
FDI_FSYNC115

FDI_INT15

FDI_LSYNC015
FDI_LSYNC115

B B

A A

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

FDI_FSYNC0

FDI_FSYNC1

FDI_INT

FDI_LSYNC0

FDI_LSYNC1

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

R532 1K_0402_5%HYBRID@R532 1K_0402_5%HYBRID@

1 2

R536 1K_0402_5%HYBRID@R536 1K_0402_5%HYBRID@

1 2

R534 1K_0402_5%HYBRID@R534 1K_0402_5%HYBRID@

1 2

R533 1K_0402_5%HYBRID@R533 1K_0402_5%HYBRID@

1 2

R535 1K_0402_5%HYBRID@R535 1K_0402_5%HYBRID@

1 2

PEG_RCOMPO

DMI Intel(R) FDI

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_ICOMPI

PEG_ICOMPO

PEG_RBIAS

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

B26
A26
B27
A25

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

4

EXP_ICOMPI

1 2

EXP_RBIAS

1 2

PCIE_CRX_GTX_N15
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_N13
PCIE_CRX_GTX_N12
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_N10

PCIE_CRX_GTX_N9
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_N7
PCIE_CRX_GTX_N6
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_N4
PCIE_CRX_GTX_N3
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P15
PCIE_CRX_GTX_P14
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_P0

PCIE_CTX_GRX_C_N15
PCIE_CTX_GRX_C_N14
PCIE_CTX_GRX_C_N13
PCIE_CTX_GRX_C_N12
PCIE_CTX_GRX_C_N11
PCIE_CTX_GRX_C_N10
PCIE_CTX_GRX_C_N9
PCIE_CTX_GRX_C_N8
PCIE_CTX_GRX_C_N7
PCIE_CTX_GRX_C_N6
PCIE_CTX_GRX_C_N5
PCIE_CTX_GRX_C_N4
PCIE_CTX_GRX_C_N3
PCIE_CTX_GRX_C_N2
PCIE_CTX_GRX_C_N1
PCIE_CTX_GRX_C_N0

PCIE_CTX_GRX_C_P15
PCIE_CTX_GRX_C_P14
PCIE_CTX_GRX_C_P13
PCIE_CTX_GRX_C_P12
PCIE_CTX_GRX_C_P11
PCIE_CTX_GRX_C_P10
PCIE_CTX_GRX_C_P9
PCIE_CTX_GRX_C_P8
PCIE_CTX_GRX_C_P7
PCIE_CTX_GRX_C_P6
PCIE_CTX_GRX_C_P5
PCIE_CTX_GRX_C_P4
PCIE_CTX_GRX_C_P3
PCIE_CTX_GRX_C_P2
PCIE_CTX_GRX_C_P1
PCIE_CTX_GRX_C_P0

Layout ruleΚtrace
length < 0.5"

R544 49.9_0402_1%R544 49.9_0402_1%

R545 750_0402_1%R545 750_0402_1%

PCIE_CRX_GTX_N[0..15] 19

PCIE_CRX_GTX_P[0..15] 19

PCIE Lane Numbers Reversed
CFG3-PCI Express Static Lane Reversal

HYBRID@

C527 0.1U_0402_10V6KC527 0.1U_0402_10V6K

1 2

C540 0.1U_0402_10V6KC540 0.1U_0402_10V6K

1 2

C529 0.1U_0402_10V6KC529 0.1U_0402_10V6K

1 2

C542 0.1U_0402_10V6KC542 0.1U_0402_10V6K

1 2

C531 0.1U_0402_10V6KC531 0.1U_0402_10V6K

1 2

C544 0.1U_0402_10V6KC544 0.1U_0402_10V6K

1 2

C533 0.1U_0402_10V6KC533 0.1U_0402_10V6K

1 2

C546 0.1U_0402_10V6KC546 0.1U_0402_10V6K

1 2

C535 0.1U_0402_10V6KC535 0.1U_0402_10V6K

1 2

C562 0.1U_0402_10V6KC562 0.1U_0402_10V6K

1 2

C564 0.1U_0402_10V6KC564 0.1U_0402_10V6K

1 2

C555 0.1U_0402_10V6KC555 0.1U_0402_10V6K

1 2

C557 0.1U_0402_10V6KC557 0.1U_0402_10V6K

1 2

C561 0.1U_0402_10V6KC561 0.1U_0402_10V6K

1 2

C548 0.1U_0402_10V6KC548 0.1U_0402_10V6K

1 2

C559 0.1U_0402_10V6KC559 0.1U_0402_10V6K

1 2

C528 0.1U_0402_10V6KC528 0.1U_0402_10V6K

1 2

C541 0.1U_0402_10V6KC541 0.1U_0402_10V6K

1 2

C530 0.1U_0402_10V6KC530 0.1U_0402_10V6K

1 2

C543 0.1U_0402_10V6KC543 0.1U_0402_10V6K

1 2

C532 0.1U_0402_10V6KC532 0.1U_0402_10V6K

1 2

C545 0.1U_0402_10V6KC545 0.1U_0402_10V6K

1 2

C534 0.1U_0402_10V6KC534 0.1U_0402_10V6K

1 2

C547 0.1U_0402_10V6KC547 0.1U_0402_10V6K

1 2

C536 0.1U_0402_10V6KC536 0.1U_0402_10V6K

1 2

C563 0.1U_0402_10V6KC563 0.1U_0402_10V6K

1 2

C565 0.1U_0402_10V6KC565 0.1U_0402_10V6K

1 2

C556 0.1U_0402_10V6KC556 0.1U_0402_10V6K

1 2

C558 0.1U_0402_10V6KC558 0.1U_0402_10V6K

1 2

C560 0.1U_0402_10V6KC560 0.1U_0402_10V6K

1 2

C549 0.1U_0402_10V6KC549 0.1U_0402_10V6K

1 2

C550 0.1U_0402_10V6KC550 0.1U_0402_10V6K

1 2

PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P0

PCIE_CTX_GRX_N[0..15] 19

PCIE_CTX_GRX_P[0..15] 19

3

R59

@R59

@

1 2

3.01K_0402_1%

3.01K_0402_1%

FOR ES1 SAMPLE ONLY

R547

R547
0_0402_5%

0_0402_5%

1 2
1 2

R546

R546
0_0402_5%

0_0402_5%

CFG Straps for PROCESSOR

CFG0

PCI-Express Configuration Select

CFG0

Not applicable for Clarksfield Processor

CFG[1:0] 11=1*16 PEG

CFG3

CFG3-PCI Express Static Lane Reversal

CFG4

CFG4-Display Port Presence

CFG4

@

@

1 2

R58 3.01K_0402_1%

R58 3.01K_0402_1%

1: Single PEG
0: Bifurcation enabled

10=2*8 PEG

1 2

R61 3.01K_0402_1%R61 3.01K_0402_1%

1: Normal Operation

0: Lane Numbers Reversed

CFG3

15 -> 0, 14 ->1, .....

@

@

1 2

R60 3.01K_0402_1%

R60 3.01K_0402_1%

1: Disabled; No Physical Display Port
attached to Embedded Display Port

0: Enabled; An external Display Port
device is connected to the Embedded
Display Port

2

JCPU1E

JCPU1E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

CFG0

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG3
CFG4

CFG7

H_RSVD17_R

@

@

H_RSVD18_R

@

@

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

RSVD_NCTF_37

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RESERVED

RESERVED

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD38
RSVD39

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53

RSVD58

RSVD_TP_59
RSVD_TP_60

RSVD62
RSVD63
RSVD64
RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2

KEY

D15
C15
AJ15
AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

VSS

RSVD64_R
RSVD65_R

R189

R189
0_0402_5%

0_0402_5%

R188

R188
0_0402_5%

0_0402_5%

1

@

@

12

@

@

12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Arrandale(2/5)-DMI/PEG/FDI

Arrandale(2/5)-DMI/PEG/FDI

Arrandale(2/5)-DMI/PEG/FDI

LA-5941P

LA-5941P

LA-5941P

1

650Thursday, April 08, 2010

650Thursday, April 08, 2010

650Thursday, April 08, 2010

of

of

of

0.3

0.3

0.3

5

JCPU1C

JCPU1C

4

3

JCPU1D

JCPU1D

2

1

D D

DDR_A_D[0..63]10

C C

B B

DDR_A_BS010
DDR_A_BS110
DDR_A_BS210

DDR_A_CAS#10
DDR_A_RAS#10
DDR_A_WE#10

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AJ10

AL10

AK12

AK11

AM10
AR11
AL11

AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

A10

SA_DQ[0]

C10

SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]

B10

SA_DQ[4]

D10

SA_DQ[5]

E10

SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15]

H10

SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20]

G10

SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31]

AH5

SA_DQ[32]

AF5

SA_DQ[33]

AK6

SA_DQ[34]

AK7

SA_DQ[35]

AF6

SA_DQ[36]

AG5

SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39]
SA_DQ[40]

AJ9

SA_DQ[41]
SA_DQ[42]
SA_DQ[43]

AK8

SA_DQ[44]

AL7

SA_DQ[45]
SA_DQ[46]

AL8

SA_DQ[47]

AN8

SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]

AM9

SA_DQ[52]

AN9

SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

AC3

SA_BS[0]

AB2

SA_BS[1]

U7

SA_BS[2]

AE1

SA_CAS#

AB3

SA_RAS#

AE9

SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]

SA_DM[1]

SA_DM[2]

SA_DM[3]

SA_DM[4]

SA_DM[5]

SA_DM[6]

SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]

SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

M_CLK_DDR0 10
M_CLK_DDR#0 10
DDR_CKE0_DIMMA 10

M_CLK_DDR1 10
M_CLK_DDR#1 10
DDR_CKE1_DIMMA 10

DDR_CS0_DIMMA# 10
DDR_CS1_DIMMA# 10

M_ODT0 10
M_ODT1 10

DDR_A_DM[0..7] 10

DDR_A_DQS#[0..7] 10

DDR_A_DQS[0..7] 10

DDR_A_MA[0..15] 10

DDR_B_D[0..63]11

DDR_B_BS011
DDR_B_BS111
DDR_B_BS211

DDR_B_CAS#11
DDR_B_RAS#11
DDR_B_WE#11

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AR10

AT10

B5

SB_DQ[0]

A5

SB_DQ[1]

C3

SB_DQ[2]

B3

SB_DQ[3]

E4

SB_DQ[4]

A6

SB_DQ[5]

A4

SB_DQ[6]

C4

SB_DQ[7]

D1

SB_DQ[8]

D2

SB_DQ[9]

F2

SB_DQ[10]

F1

SB_DQ[11]

C2

SB_DQ[12]

F5

SB_DQ[13]

F3

SB_DQ[14]

G4

SB_DQ[15]

H6

SB_DQ[16]

G2

SB_DQ[17]

J6

SB_DQ[18]

J3

SB_DQ[19]

G1

SB_DQ[20]

G5

SB_DQ[21]

J2

SB_DQ[22]

J1

SB_DQ[23]

J5

SB_DQ[24]

K2

SB_DQ[25]

L3

SB_DQ[26]

M1

SB_DQ[27]

K5

SB_DQ[28]

K4

SB_DQ[29]

M4

SB_DQ[30]

N5

SB_DQ[31]

AF3

SB_DQ[32]

AG1

SB_DQ[33]

AJ3

SB_DQ[34]

AK1

SB_DQ[35]

AG4

SB_DQ[36]

AG3

SB_DQ[37]

AJ4

SB_DQ[38]

AH4

SB_DQ[39]

AK3

SB_DQ[40]

AK4

SB_DQ[41]

AM6

SB_DQ[42]

AN2

SB_DQ[43]

AK5

SB_DQ[44]

AK2

SB_DQ[45]

AM4

SB_DQ[46]

AM3

SB_DQ[47]

AP3

SB_DQ[48]

AN5

SB_DQ[49]

AT4

SB_DQ[50]

AN6

SB_DQ[51]

AN4

SB_DQ[52]

AN3

SB_DQ[53]

AT5

SB_DQ[54]

AT6

SB_DQ[55]

AN7

SB_DQ[56]

AP6

SB_DQ[57]

AP8

SB_DQ[58]

AT9

SB_DQ[59]

AT7

SB_DQ[60]

AP9

SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AB1

SB_BS[0]

W5

SB_BS[1]

R7

SB_BS[2]

AC5

SB_CAS#

Y7

SB_RAS#

AC6

SB_WE#

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_CK[0]

SB_CK#[0]

SB_CKE[0]

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

W8
W9
M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

M_CLK_DDR2 11
M_CLK_DDR#2 11
DDR_CKE2_DIMMB 11

M_CLK_DDR3 11
M_CLK_DDR#3 11
DDR_CKE3_DIMMB 11

DDR_CS2_DIMMB# 11
DDR_CS3_DIMMB# 11

M_ODT2 11
M_ODT3 11

DDR_B_DM[0..7] 11

DDR_B_DQS#[0..7] 11

DDR_B_DQS[0..7] 11

DDR_B_MA[0..15] 11

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

Compal Secret Data

Compal Secret Data

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Arrandale(3/5)-DDR III

Arrandale(3/5)-DDR III

Arrandale(3/5)-DDR III

LA-5941P

LA-5941P

LA-5941P

1

0.3

0.3

0.3

of

of

of

750Thursday, A pril 08, 2010

750Thursday, A pril 08, 2010

750Thursday, A pril 08, 2010

5

+CPU_CORE

JCPU1F

JCPU1F

D D

C C

B B

A A

48A 15A18A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

CPU CORE SUPPLY

CPU CORE SUPPLY

5

1.1V RAIL POWER

1.1V RAIL POWER

POWER

POWER

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VTT_SELECT

VCC_SENSE
VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

SENSE LINES

SENSE LINES

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

ISENSE

AH14

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

1

2

C201

C201

10U_0805_6.3V6M

10U_0805_6.3V6M

C271

C271

1

2

1

2

H_PSI#_R

10U_0805_6.3V6M

C199

C199

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C270

C270

1

@

@

@

@

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C219

C219

C217

C217

1

2

+VCCP

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C209

C209

C208

C208

1

2

H_VID0 48
H_VID1 48
H_VID2 48
H_VID3 48
H_VID4 48
H_VID5 48
H_VID6 48

1 2

R56 0_0402_5%R56 0_0402_5%

1

2

1

2

AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

G15

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PM_DPRSLPVR_R

VTT_SELECT

H_VTTVID1 = Low, 1.1V FOR Clarksfiel

H_VTTVID1 = High, 1.05V FOR Auburndale

AN35

AJ34
AJ35

B15
A15

VCCSENSE
VSSSENSE

@

IMVP_IMON 48

VTT_SENSE 46

T15PAD@T15PAD

10U_0805_6.3V6M

10U_0805_6.3V6M

C198

C198

10U_0805_6.3V6M

10U_0805_6.3V6M

C216

C216

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

4

10U_0805_6.3V6M

10U_0805_6.3V6M

C181

C181

1

1

+

+

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C182

C182

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C274

C274

C207

C207

1

2

SVT
STRIP PIN

R551

R551

1K_0402_1%

1K_0402_1%

PSI_ON#34

Lenovo Request

VCCSENSE 48
VSSSENSE 48

4

+VCCP

330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

C554

C554
330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

10U_0805_6.3V6M

10U_0805_6.3V6M

C200

C200

+VCCP

H_PSI#_R

12

Q18

Q18

MMBT3906_SOT23-3

MMBT3906_SOT23-3

R182

R182

1 2

10K_0402_5%

10K_0402_5%

@

@

PROC_DPRSLPVR 48

VTT_SELECT 46

+GFX_CORE

C673

C673

R282 0_0402_5%R282 0_0402_5%

12

@

@

C

C

123

E

E

B

B

2

B

B

CPU

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C161

C161

C160

C160

+

+

@

@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

R550

R550
1K_0402_1%

1K_0402_1%

@

@

1 2

C

C

Q51

Q51
MMST3904-7-F_SO T323-3

MMST3904-7-F_SO T323-3

E

E

@

@

3 1

1

C191

C191

@

@

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

SUSP39, 44,45

@

@

1

2

PSI# 48

SVT,timing

3

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C190

C190

@

@

+5VALW

2

G

G

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C159

C159

C591

C189

C189

C591

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

+VCCP

10U_0805_6.3V6M

10U_0805_6.3V6M

C214

C214

1

1

2

2

+1.5V +1.5V_DDR3

2

2

U11

U11

8

D

7

D

6

D

5

12

13

D

SI4800BDY-T1-E3_SO 8

SI4800BDY-T1-E3_SO 8

R268

R268
47K_0402_1%

47K_0402_1%

R267 0_0402_5%R267 0_0402_5%

1.5_SUS- 1.5V_DDR3_GATE

D

D

Q23

Q23
2N7002_SOT23

2N7002_SOT23

S

S

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10U_0805_6.3V6M

10U_0805_6.3V6M

1

C592

C592

2

+VCCP

10U_0805_6.3V6M

10U_0805_6.3V6M

C215

C215

J3

J3

112

JUMP_43X118

JUMP_43X118

@

@

J2

J2

112

JUMP_43X118

JUMP_43X118

@

@

S
S
S
G

12

Issued Date

Issued Date

Issued Date

2

AS NO CONNECT

BUT A SMALL AMOUNT OF POWER

(~15MW) MAYBE WASTED

JCPU1G

JCPU1G

AT21

VAXG1

AT19

VAXG2

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C210

C210

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C272

C272

1

2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

C211

C211

C240

C240

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

GRAPHICS

GRAPHICS

FDI PEG & DMI

FDI PEG & DMI

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GRAPHICS VIDs

GRAPHICS VIDs

3A

POWER

POWER

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

1.1V1.8V

1.1V1.8V

0.6A

DESIGN GUIDE REV1.1

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

GFX_VR_EN

AR25
AT25

GFX_IMON_R

AM24

GFX_IMON

AJ1

VDDQ1

AF1

VDDQ2

AE7

VDDQ3

AE4

VDDQ4

AC1

VDDQ5

AB7

VDDQ6

AB4

VDDQ7

Y1

VDDQ8

W7

VDDQ9

W4

VDDQ10

U1

VDDQ11

T7

VDDQ12

T4

VDDQ13

P1

VDDQ14

N7

VDDQ15

N4

VDDQ16

L1

VDDQ17

H1

VDDQ18

P10

VTT0_59

N10

VTT0_60

L10

VTT0_61

K10

VTT0_62

J22

VTT1_63

J20

VTT1_64

J18

VTT1_65

H21

VTT1_66

H20

VTT1_67

H19

VTT1_68

L26

VCCPLL1

L27

VCCPLL2

M26

VCCPLL3

1

2

VCC_AXG_SENSE 47
VSS_AXG_SENSE 47

GFXVR_VID_0 47
GFXVR_VID_1 47
GFXVR_VID_2 47
GFXVR_VID_3 47
GFXVR_VID_4 47
GFXVR_VID_5 47
GFXVR_VID_6 47

R141 0_0402_5%R141 0_0402_5%

1 2

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

C254

C254

1

1

2

2

220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

10U_0805_6.3V6M

10U_0805_6.3V6M

C268

C268

1

1

+

+

2

2

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

C149

C149

C167

C167

1

2

@

T16PAD@T16PAD

+1.5V_DDR3

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

C255

C255

C253

C253

C256

C256

1

1

2

C252

C252

1

2

1

2

1

2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K
C168

C168

1

2

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C258

C258

+VCCP

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C212

C212

C273

C273

1

2

+VCCP

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C213

C213

C218

C218

1

2

+1.8VS

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

10U_0805_6.3V6M

10U_0805_6.3V6M

C169

C169

1

1

2

2

GFX_IMON_R

1U_0603_10V6K

1U_0603_10V6K

C257

C257

C170

C170

1

R132

R132

HYBRID@

HYBRID@

DGPU_SELECT

GFX_VR_EN

GFXVR_EN 47

GFXVR_IMON 47

1K_0402_5%

1K_0402_5%

12

R140

R140

330_0402_5%

330_0402_5%

1 2

1

13

D

D

HYBRID@

HYBRID@

2

G

Q58

G

Q58

2N7002_SOT23

2N7002_SOT23

S

S

For Intel S3 Power Reduction.

+1.5V

1
2
3
4

+1.5V_DDR3

1

C325

C325

0.1U_0603_25V7K

0.1U_0603_25V7K

2

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C289

C289

C288

C288

1

1

2

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C287

C287

1

1

2

2

Deciphered Date

Deciphered Date

Deciphered Date

2

C286

C286

2

SUSP

For Intel S3 Power Reduction.

+1.5V_DDR3

C269

0.1U_0402_10V6K@C269

0.1U_0402_10V6K

1

@

12

R233

R233
220_0402_5%

2

220_0402_5%

13

D

D

Q19

Q19

2

G

G

2N7002_SOT23

2N7002_SOT23

S

S

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PVT

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Arrandale(4/5)-PWR

Arrandale(4/5)-PWR

Arrandale(4/5)-PWR

LA-5941P

LA-5941P

LA-5941P

1

0.3

0.3

0.3

of

of

of

850Thursday, April 08, 2010

850Thursday, April 08, 2010

850Thursday, April 08, 2010

5

JCPU1H

JCPU1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

D D

C C

B B

AR17
AR15
AR12

AP20
AP17
AP13
AP10

AN34
AN31
AN23
AN20

AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11

AL34

AL31

AL23

AL20

AL17

AL12

AK29
AK27
AK25
AK20
AK17

AJ31

AJ23

AJ20

AJ17

AJ14

AJ11

AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13

AG10

AE35

VSS8
VSS9
VSS10
VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14
VSS15
VSS16
VSS17
VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75
VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

4

JCPU1I

JCPU1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

VSS_NCTF1_R
VSS_NCTF2_R
VSS_NCTF3_R
VSS_NCTF4_R
VSS_NCTF5_R
VSS_NCTF6_R
VSS_NCTF7_R

3

+CPU_CORE

2

1

CPU CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C568

C568

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C147

C147

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C195

C195

1

2

22U_0805_6.3V6M

C585

C585

C580

1

2

1

2

1

2

C580

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C163

C163

C162

C162

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C88

C88

C192

C192

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C579

C579

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C179

C179

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C196

C196

1

1

2

2

C573

C573

C574

C574

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C193

C193

C166

C166

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C180

C180

C89

C89

1

2

Under cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C578

C578

C584

C584

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C165

C165

C148

C148

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C197

C197

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C583

C583

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C194

C194

1

between Inductor and socket

2

330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

1

C75

C75

+

+

2

PVT, change from 470uF 4.5mohm
to 330uF 6mohm and 2nd 470uF 7mohm by power;
'10 1/8 update main to 330uF 9m ohm

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C577

C577

1

2

330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

1

C76

C76

+

+

2

22U_0805_6.3V6M

C572

C572

C571

1

2

1

2

C571

1

Inside cavity

2

330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

330U_D2E_2.5VM_LESR9M

1

C92

C92

C164

C164

+

+

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C91

C91

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C129

C90

C90

C129

C87

C87

1

1

2

2

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

A A

5

IC,AUB_CFD_rPGA,R1P0

ME@

ME@

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Arrandale(5/5)-GND/Bypass

Arrandale(5/5)-GND/Bypass

Arrandale(5/5)-GND/Bypass

LA-5941P

LA-5941P

LA-5941P

1

of

of

of

950Thursday, April 08, 2010

950Thursday, April 08, 2010

950Thursday, April 08, 2010

0.3

0.3

0.3

5

+VREF_DQ_DIMMA

+VREF_DQ_DIMMA

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

C303

C303

1

1

2

D D

C C

B B

A A

2

DDR_CKE0_DIMMA7

DDR_A_BS27

M_CLK_DDR07
M_CLK_DDR#07

DDR_A_BS07

DDR_A_WE#7
DDR_A_CAS#7

DDR_CS1_DIMMA#7

+3VS

1

2

5

DDR_A_D0

C347

C347

DDR_A_D1

DDR_A_DM0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS# M_ODT0

DDR_A_MA13
DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

1 2

10K_0402_5%

10K_0402_5%

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C608

C608

C617

C617

1

2

+1.5V +1.5V

4BA2/6W

4BA2/6W

4BA2/6W4BA2/6W

DDR3 SO-DIMM A

JDIMM1

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

R571

R571

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

R570

R570

10K_0402_5%

10K_0402_5%

12

DQ4
DQ5

VSS3

DQS#0

DQS0
VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

A15
A14

VDD4

A11

A7

VDD6

A6
A4

VDD8

A2
A0

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35
DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47
DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL

VTT2

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F
ME@

ME@

G2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

4

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1
DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

+0.75VS

1/76BA1/86W

1/76BA1/86W

1/76BA1/86W1/76BA1/86W

4

DRAMRST# 5,11

DDR_CKE1_DIMMA 7

M_CLK_DDR1 7
M_CLK_DDR#1 7

DDR_A_BS1 7
DDR_A_RAS# 7

DDR_CS0_DIMMA# 7
M_ODT0 7

M_ODT1 7

0.1U_0402_10V6K

0.1U_0402_10V6K
C346

C346

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

VREF =

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

PM_EXTTS#1_R 5,11

SMB_DATA_S3 11,12,14,28
SMB_CLK_S3 11,12,14,28

+VREF_DQ_DIMMA

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K
C355

C355

1

2

DDR_A_D[0..63]7

DDR_A_DM[0..7]7

DDR_A_DQS[0..7]7

DDR_A_DQS#[0..7]7

DDR_A_MA[0..15]7

4*0402 1uf

1*0402 2.2uf

3

Layout Note:
Place near DIMM

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C589

C589

1

@

@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C586

C586

C588

C588

1

@

@

2

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

1

2

+0.75VS

C607

C607

C605

1U_0603_10V6K

C605

1U_0603_10V6K

1

1

2

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

C581

C581

1

2

1U_0603_10V6K

1U_0603_10V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C310

C310

1

2

C606

C606

C300

C300

1U_0603_10V6K

1U_0603_10V6K

1

2

Deciphered Date

Deciphered Date

Deciphered Date

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C570

C570

C309

C309

1

1

2

2

C301

10U_0603_6.3V6M

C301

10U_0603_6.3V6M

1U_0603_10V6K

1U_0603_10V6K

1

1

2

2

2

1

+1.5V

12

R297

R297

1K_0402_1%

1K_0402_1%

1K_0402_1%

1K_0402_1%

For Arranale only +VREF_DQ_ DIMMA
supply from a exter nal 1.5V voltage div ide
circuit.
07/17/2009

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C308

C308

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C314

C314

1

1

2

2

0.1U_0402_10V6K

C315

C315

C317

1

2

C317

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

0.1U_0402_10V6K

0.1U_0402_10V6K
C316

C316

R305

R305

+VREF_DQ_DIMMA

12

1

+

+

C569

C569
220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

2

LA-5941P

LA-5941P

LA-5941P

1

0.3

0.3

0.3

of

of

of

10 50Thursday, April 08, 2010

10 50Thursday, April 08, 2010

10 50Thursday, April 08, 2010

5

+VREF_DQ_DIMMB

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1

C382

C382

+3VS

2

DDR_CKE2_DIMMB7

DDR_B_BS27

M_CLK_DDR27
M_CLK_DDR#27

DDR_B_BS07

DDR_B_WE#7
DDR_B_CAS#7

DDR_CS3_DIMMB#7

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1

2

D D

C C

B B

A A

+VREF_DQ_DIMMB

DDR_B_D0
DDR_B_D1

1

C384

C384

DDR_B_DM0

2

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

1 2

10K_0402_5%

10K_0402_5%

0.1U_0402_10V6K

0.1U_0402_10V6K

C618

C618

C616

C616

1

2

5

+1.5V +1.5V

4BA2/6W

4BA2/6W

4BA2/6W4BA2/6W

JDIMM2

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1
VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

DDR_B_MA9

R572

R572

1 2

R573 10K_0402_5%R573 10K_0402_5%

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1
VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4RN-7F

FOX_AS0A626-U4RN-7F

ME@

ME@

VSS3

DQS0

VSS6

VSS8
DQ12
DQ13

VSS10

DQ14
DQ15

DQ20
DQ21

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

2
4

DQ4

6

DQ5

8
10
12
14
16

DQ6

18

DQ7

20
22
24
26
28

DM1

30
32
34
36
38
40
42
44
46

DM2

48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102

CK1

104
106
108

BA1

110
112
114

S0#

116
118
120
122

NC2

124
126
128
130
132
134
136

DM4

138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170

DM6

172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

SDA

202

SCL

204

206

G2

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D22
DDR_B_D23DDR_B_D18

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB#
M_ODT2

M_ODT3

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

1/76BA1/86W

1/76BA1/86W

1/76BA1/86W1/76BA1/86W

4

DDR_B_DQS#[0..7]7

DDR_B_D[0..63]7

DDR_B_DM[0..7]7

DDR_B_DQS[0..7]7

DDR_B_MA[0..15]7

DRAMRST# 5,10

DDR_CKE3_DIMMB 7

M_CLK_DDR3 7
M_CLK_DDR#3 7

DDR_B_BS1 7
DDR_B_RAS# 7

DDR_CS2_DIMMB# 7
M_ODT2 7

M_ODT3 7

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K

C385

C385

+VREF_DQ_DIMMB

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

C383

C383

1

2

3

Layout Note:
Place near DIMM

10U_0603_6.3V6M

10U_0603_6.3V6M

C582

C582

1

@

@

2

2

1K_0402_1%

1K_0402_1%

1K_0402_1%

1K_0402_1%

For Arranale only +VREF_DQ_ DIMMB
supply from a exter nal 1.5V voltage div ide
circuit.
07/17/2009

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C576

C576

10U_0603_6.3V6M

C311

C311

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C587

C587

1

@

@

2

C313

C313

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C590

C590

1

1

2

2

C575

C575

10U_0603_6.3V6M

10U_0603_6.3V6M

C312

C312

1

1

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
C304

C304

C307

C307

1

1

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
C306

C306

C305

C305

1

1

2

2

R341

R341

R340

R340

1

+1.5V

12

+VREF_DQ_DIMMB

12

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

4*0402 1uf

1*0402 2.2uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

PM_EXTTS#1_R 5,10

SMB_DATA_S3 10,12,14,28
SMB_CLK_S3 10,12,14,28

+0.75VS

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Issued Date

Issued Date

Issued Date

Layout Note:
Place near DIMM

+0.75VS

1U_0603_10V6K

1U_0603_10V6K

C596

C596

1

2

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

C595

C595

C299

C299

1

2

1U_0603_10V6K

C598

C598

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1U_0603_10V6K

1U_0603_10V6K

1

2

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

LA-5941P

LA-5941P

LA-5941P

1

of

11 50Thursday, April 08, 2010

of

11 50Thursday, April 08, 2010

of

11 50Thursday, April 08, 2010

0.3

0.3

0.3

5

4

3

2

1

Reserve for Low Power CLK GEN.
RTM890N-632
SLG8LV597VTR

VDD_3V3_1V5+3VS_CK505

1 2

R2780_0603_5%@R2780_0603_5%

@

D D

+1.5VS

1 2

R2690_0603_5% R2690_0603_5%

1 PCS CAP(0.1u) BY 1 INPUT PIN

VDD_3V3_1V5

10U_0805_6.3V6M

10U_0805_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K

C336

C336

1

1

2

2

C366

C366

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
C330

C330

C334

C334

1

1

2

2

CLK GEN TO PCH

1. CLK_DMI

2. CLK_BUF_BCLK

3. CLK_BUF_CKSSCD

4. CLK_BUF_DOT96

5. CLK_14M_PCH

C C

CLK GEN TO VGA

1. 27M_CLK

1. 27M_CLK_SS

+1.05VS_CK505+1.05VS

1 2

R2770_0603_5% R2770_0603_5%

1

2

CLK_BUF_DOT9614

CLK_BUF_DOT96#14

CLK_BUF_CKSSCD14

CLK_BUF_CKSSCD#14

CLK_DMI14

CLK_DMI#14

CLK_BUF_DOT96
CLK_BUF_DOT96#

CLK_BUF_CKSSCD
CLK_BUF_CKSSCD#

CLK_DMI
CLK_DMI#

+3VS_CK505

R318 0_0402_5%R318 0_0402_5%

1 2
1 2

R319 0_0402_5%R319 0_0402_5%

CLOSE U27

R324 0_0402_5%R324 0_0402_5%

1 2

R308

R308

1 2

R307 0_0402_5%R307 0_0402_5%

1 2

R306

R306

1 2

R299

R299

1 2

1 PCS CAP(0.1u) BY 1 INPUT PIN

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C333

C333

0.1U_0402_10V6K

0.1U_0402_10V6K

C331

C331

C332

C332

1

1

1

2

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
C335

C335

C343

C343

1

1

C1212

C1212
47P_0402_50V8J

47P_0402_50V8J

2

2

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

10K_0402_5%

10K_0402_5%

VDD_3V3_1V5

L_CLK_BUF_DOT96
L_CLK_BUF_DOT96#

CLK_48M_CR_R

CLK_BUF_CKSSCD_R
CLK_BUF_CKSSCD#_R

L_CLK_DMI
L_CLK_DMI#

CPU_STOP#

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_SRC

+3VS_CK505 +1.05V S_CK505+3VS_CK505 +1.05VS_CK505

32

SCL

31

SDA

30
29
28
27
26
25

24
23
22
21
20
19
18
17

SMB_CLK_S3
SMB_DATA_S3
REF_0/CPU_SEL

CLK_XTAL_IN
CLK_XTAL_OUT

CK_PWRGD

VDD_3V3_1V5
R_CLK_BUF_BCLK CLK_BUF_BCLK
R_CLK_BUF_BCLK# CLK_BUF_BCLK#

VDD_3V3_1V5

R275 0_0402_5%R275 0_0402_5%

1 2
1 2

R276 0_0402_5%R276 0_0402_5%

U14

U14

1

VDD_USB_48

2

VSS_48M

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

USB_48

9

VSS_27M

10

SATA

11

SATA#

12

VSS_SRC

13

SRC_1

14

SRC_1#

15

VDD_SRC_IO

16

CPU_STOP#

33

TGND

RTM890N-631-VB-GRT_Q FN32_5X5

RTM890N-631-VB-GRT_Q FN32_5X5

REF_0/CPU_SEL

CKPWRGD/P D#

VDD_CPU_IO

SA00003HQ10 S IC RTM890N-631-VB-GRT QFN 32P CLK GEN

(SA00003HR00)S IC ICS9LVS3199AKLFT MLF 32P CLK GEN
S IC SLG8SP587VTR QFN 32P CLK GEN (SA00002XY00)

CLK_48M_CR_R

12

R3230_0402_5%@R3230_0402_5%

@

R315

R315

12

33_0402_1%

33_0402_1%

CK_PWRGD

CLK_14M_PCH

2N7002_SOT23-3

2N7002_SOT23-3

SMB_CLK_S3 10,11,14,28
SMB_DATA_S3 10,11,14,28

CLK_14M_PCH 14

CLK_BUF_BCLK 14
CLK_BUF_BCLK# 14

R298

R298

1 2

10K_0402_5%

10K_0402_5%

13

D

D

2

G

G

Q25

Q25

S

S

+3VS_CK505

CLK_EN# 48

PIN8 IS GND FOR ICS3197

RF 10/22

B B

+3VS

1 2

R2790_0603_5% R2790_0603_5%

+3VS_CK505

1 PCS CAP(0.1u) BY 1 INPUT PIN

0.1U_0402_10V6K

10U_0805_6.3V6M

10U_0805_6.3V6M

C344

C344

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

C342

C342

0.1U_0402_10V6K

0.1U_0402_10V6K

C350

C350

C367

C367

1

1

1

C1213

C1213
47P_0402_50V8J

2

47P_0402_50V8J

2

2

C364

C364

C365

C365

EMI Capacitor

RF 10/22

+1.05VS

CPU_1PIN 30 CPU_0

(Default)

0 133MHz

1

A A

133MHz

100MHz 100MHz

1 2

R317 10K_0402_5%@R317 10K_0402_5%@

1 2

R316 10K_0402_5%R316 10K_0402_5%

PIN8 IS 48MHz FOR ICS3199

CLK_14M_PCH

12

10P_0402_50V8J@

10P_0402_50V8J@

REF_0/CPU_SEL

12

10P_0402_50V8J

10P_0402_50V8J

SVT RF

REF_0/CPU_SEL

27P_0402_50V8J

27P_0402_50V8J

Y1

Y1

14.318MHZ_20PF_7A14300003

14.318MHZ_20PF_7A14300003

1

C348

C348

2

CLK_XTAL_OUT

CLK_XTAL_IN

12

1

C349

C349
27P_0402_50V8J

27P_0402_50V8J

2

PVT, resize 5032, CL27pF

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

CLOCK GENERATOR

CLOCK GENERATOR

CLOCK GENERATOR

LA-5941P

LA-5941P

LA-5941P

1

of

12 50Thursday, April 08, 2010

of

12 50Thursday, April 08, 2010

of

12 50Thursday, April 08, 2010

0.3

0.3

0.3

5

PCH_RTCX1

1 2

R154 10M_0402_5%R154 10M_0402_5%

PCH_RTCX2

4

3

2

1

1 4

2 3

D D

+RTCVCC

R144

R144

1 2

100_0603_1%

100_0603_1%

2

C441

C441

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

RF 1103 add

1

C1221

C C

C1221
12P_0402_50V8J

12P_0402_50V8J

2

@

@

+RTCBATT

15P_0402_50V8J

15P_0402_50V8J

HDA_BITCLK_CODEC

HDA_SDOUT_CODEC

1

C1222

C1222
12P_0402_50V8J

12P_0402_50V8J

2

@

@

1

C171

C171

2

EPSON Q13MC1461005000

6.9x1.4x1.3mm

+RTCVCC

R421

R421

1 2

R420

R420

1 2

HΚIntegrated VRM enable

*

Κ

L

Integrated VRM disable

+3VS

R452 1K _0402_5%@R452 1K_0402_5%@

PVT

1M_0402_5%

1M_0402_5%

330K_0402_5%

330K_0402_5%

1 2

GPIO33 = GPO , internal pull-up,should not be pulled low

flash ME core of strap pin pull down

+3VALW+3VALW +3VALW +3VALW +3VS

RefDesPCH Pin

R591

R590

R584

R583

R586

R580

R595

R594

12

@

@

R72

R72
200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_RST#PCH_JTAG_TDO PCH_JTAG_TDI

12

@

@

R115

R115
100_0402_1%

100_0402_1%

PCH JTAG
Pre-Production

ES1 MPES2

No Install

No Install

200ohm

100ohm 100ohm

200ohm

100ohm 100ohm

51ohm

20Kohm 20Kohm

10Kohm 10Kohm

5

12

@

@

R74

R74
200_0402_5%

200_0402_5%

12

B B

@

@

R117

R117
100_0402_1%

100_0402_1%

A A

PCH_JTAG_TDI

PCH_JTAG_TCK

PCH_JTAG_RST#

12

@

@

R73

R73
200_0402_5%

200_0402_5%

12

@

@

R116

R116
100_0402_1%

100_0402_1%

PCH JTAG
Production

*

200ohm

No Install

100ohm

No InstallPCH_JTAG_TDO

200ohm

No Install

No InstallPCH_JTAG_TMS

200ohm

No InstallR587

No Install

51ohm 51ohm

No Install

No Install

X1

X1

32.768KHZ_12.5P_MC-146

32.768KHZ_12.5P_MC-146

1

C183

C183
15P_0402_50V8J

15P_0402_50V8J

2

SM_INTRUDER#

PCH_INTVRMEN

PCH_SPKR

+RTCVCC

HDA_BITCLK_CODEC33

HDA_SYNC_CODEC33

HDA_RST_CODEC#33

HDA_SDOUT_CODEC33

1U_0603_10V6K

1U_0603_10V6K

1 2

R419 20K_0402_1%R419 20K_0402_1%

1 2

R422 20K_0402_1%R422 20K_0402_1%

1U_0603_10V6K

1U_0603_10V6K

PCH_SPKR33

HDA_SDIN133

ME_FLASH34

+3VALW

C184

C184

C202

C202

1

2

1

2

R168 33_0402_5%R168 33_0402_5%

R167 33_0402_5%R167 33_0402_5%

R169 33_0402_5%R169 33_0402_5%

R166 33_0402_5%R166 33_0402_5%

(2009,07,07)

@

@

R75

R75
20K_0402_5%

20K_0402_5%

1 2

12

@

@

R118

R118
10K_0402_5%

10K_0402_5%

PCH_JTAG_TCK

R114 51_0402_5%R114 51_0402_5%

1 2

SPI_CLK_PCH

(2009,05,04)

FOR INTEL DPDG REV1.6 (MAY 2009)

4

12

CLRP3

CLRP3

SHORT PADS

SHORT PADS

12

CLRP2

CLRP2

SHORT PADS

SHORT PADS

1 2

1 2

1 2

R676 0_0402_5%

R676 0_0402_5%

@

@

1 2

R677 0_0402_5%R677 0_0402_5%

1 2

SVT

1 2

R409 1K_0402_5%@R409 1K_0402_5%@

1 2

R425 0_0402_5%R425 0_0402_5%

1 2

R424 10K_0402_5%

R424 10K_0402_5%

1 2

@

@

GPIO13 = GPI,3.3V,SUS

R99

R99

1 2

0_0402_5%

0_0402_5%

PCH_RTCX1
PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

BITCLK

HDA_SYNC

PCH_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1_RHDA_SDIN1

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

SPI_CLK_PCH_R

SPI_SB_CS0#

SPI_SI

SPI_SO_R

GPIO13

B13
D13

C14

D17

A16

A14

A30

D29

P1

C30

G30

F30

E32

F32

B29

H32

J30

M3

K3

K1

J2

J4

BA2

AV3

AY3

AY1

AV1

U7A

U7A

RTCX1
RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

TRST#

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

RTCIHDA

RTCIHDA

SPI JTAG

SPI JTAG

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

LPC

SATA0RXN
SATA0RXP
SATA0TXN

SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN

SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN

SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN

SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

LDRQ0#

SERIRQ

D33
B33
C32
A32

C34

A34
F34

AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16

AF15

T3

Y9

V1

GPIO23

T7 PADT7 PAD

GPIO23 = NATIVE,3.3V,CORE

SERIRQ

SATA_ITX_C_DRX_N0
SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_P1

SATA_DTX_C_IRX_N4
SATA_DTX_C_IRX_P4

SATA_ITX_C_DRX_N4
SATA_ITX_C_DRX_P4

SATAICOMPPCH_JTAG_RST#

1 2

37.4_0402_1%

37.4_0402_1%

1 2

R453 10K_0402_5%R453 10K_0402_5%

GPIO21

GPIO19

LPC_AD0 28,34
LPC_AD1 28,34
LPC_AD2 28,34
LPC_AD3 28,34

LPC_FRAME# 28,34

SERIRQ 34

R500

R500

+1.05VS

+3VS

HDD_LED# 38

GPIO21 = GPI,3.3V,CORE

GPIO19 = GPI,3.3V,CORE

SA00003N7A0 (MP)

+3VS

1 2

1 2

R101

R101

15_0402_5%

15_0402_5%

SPI_WP#

3.3K_0402_5%

3.3K_0402_5%

SPI_HOLD#

3.3K_0402_5%

3.3K_0402_5%

12

R62

R62

R102

R102

R103

R103

15_0402_5%

15_0402_5%

SPI_SB_CS0#

1 2

SPI_SO_R SPI_SO_L

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

12

R47910K_0402_5% R47910K_0402_5%

SPI_WP#

+3VS

C1400.01U_0402_16V7K C1400.01U_0402_16V7K

12

C1410.01U_0402_16V7K C1410.01U_0402_16V7K

12

12
12

SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0

SATA_ITX_DRX_P0

SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1

SATA_ITX_DRX_N4_CONN

C1420.01U_0402_16V7K C1420.01U_0402_16V7K

SATA_ITX_DRX_P4_CONN

C1430.01U_0402_16V7K C1430.01U_0402_16V7K

R447

R447

10K_0402_5%

10K_0402_5%

GPIO21

GPIO19

1 2

SATA_DTX_C_IRX_N0 32

SATA_DTX_C_IRX_P0 32
SATA_ITX_DRX_N0 32
SATA_ITX_DRX_P0 32

SATA_DTX_C_IRX_N1 28

SATA_DTX_C_IRX_P1 28
SATA_ITX_C_DRX_N1 28

SATA_ITX_C_DRX_P1 28

R482

R482
10K_0402_5%

10K_0402_5%

1 2

4M SPI ROM FOR HM55
(ME code & BIOS code)
SA000021A00 MXIC
SA00003K800 Winbond
SA00003IN00 E-ON

U3

U3

1

CS#

2

SO

3

WP#

4

GND

MX25L3205DM2I-12G_SO8

MX25L3205DM2I-12G_SO8

+3VS

C460

C460

1 2

0.1U_0402_16V4Z

8

VCC

7

HOLD#

6

SCLK

5

SI

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

0.1U_0402_16V4Z

SPI_HOLD#
SPI_CLK_PCH

SPI_SI

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

IBEX-M(1/6)-HDA/JTAG/SATA

IBEX-M(1/6)-HDA/JTAG/SATA

HDD

SSD

SATA_DTX_C_IRX_N4 37
SATA_DTX_C_IRX_P4 37
SATA_ITX_DRX_N4_CONN 37
SATA_ITX_DRX_P4_CONN 37

LA-5941P

LA-5941P

LA-5941P

1

E-SATA

SPI_CLK_PCH

R100

R100

33_0402_5%

33_0402_5%

22P_0402_50V8J

22P_0402_50V8J

13 50Thursday, April 08, 2010

13 50Thursday, April 08, 2010

13 50Thursday, April 08, 2010

12

@

@

C138

C138

@

@

0.3

0.3

0.3

of

of

of

5

PCIE PORT LIST

DEVICEPORT

1

NEW CARD
WLAN

2
3

LAN

4

D D

WLAN

LAN

3G

C C

WLAN

B B

LAN

3G

A A

3G

5

X

6

X

7

X

8

X

10/6 Remove Express card

PCIE_PRX_DTX_N228
PCIE_PRX_DTX_P228
PCIE_PTX_C_DRX_N228
PCIE_PTX_C_DRX_P228

PCIE_PRX_DTX_N329
PCIE_PRX_DTX_P329
PCIE_PTX_C_DRX_N329
PCIE_PTX_C_DRX_P329

PCIE_PRX_DTX_N428
PCIE_PRX_DTX_P428
PCIE_PTX_C_DRX_N428
PCIE_PTX_C_DRX_P428

C230 0.1U_0402_10V6KC230 0.1U_0402_10V6K

1 2

C229 0.1U_0402_10V6KC229 0.1U_0402_10V6K

1 2

C223 0.1U_0402_10V6KC223 0.1U_0402_10V6K

1 2

C222 0.1U_0402_10V6KC222 0.1U_0402_10V6K

1 2

C231 0.1U_0402_10V6K

C231 0.1U_0402_10V6K

1 2

C232 0.1U_0402_10V6K

C232 0.1U_0402_10V6K

1 2

3G@

3G@
3G@

3G@

10/6 Remove Express card CLK

R431 10K_0402_5%R431 10K_0402_5%

+3VALW

CLK_PCIE_WLAN1#28
CLK_PCIE_WLAN128

WLAN_CLKREQ1#28

CLK_PCIE_LAN#29
CLK_PCIE_LAN29

CLKREQ_LAN#29

CLK_PCIE_CARD_PCH#28
CLK_PCIE_CARD_PCH28

PCIECLKREQ3#28

+3VALW

+3VALW

+3VALW

+3VALW

1 2

R196 0_0402_5%R196 0_0402_5%

1 2

R197 0_0402_5%R197 0_0402_5%

1 2

R454 10K_0402_5%R454 10K_0402_5%

1 2

+3VS

R220 0_0402_5%R220 0_0402_5%

1 2

R221 0_0402_5%R221 0_0402_5%

1 2

R113 10K_0402_5%R113 10K_0402_5%

1 2

+3VS

R223 0_0402_5%3G@R223 0_0402_5%3G@

1 2

R222 0_0402_5%3G@R222 0_0402_5%3G@

1 2

R120 10K_0402_5%R120 10K_0402_5%

1 2

R435 10K_0402_5%R435 10K_0402_5%

1 2

R434 10K_0402_5%R434 10K_0402_5%

1 2

R457 10K_0402_5%R457 10K_0402_5%

1 2

PCIE_PRX_DTX_N2
PCIE_PRX_DTX_P2
PCIE_PTX_DRX_N2
PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4

GPIO73 = NATIVE,3.3V,SUS

CLK_PCIE_WLAN1#_R
CLK_PCIE_WLAN1_R

GPIO18 = NATIVE,3.3V,CORE

CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R

GPIO20 = NATIVE,3.3V,CORE

CLK_PCIE_CARD_PCH#_R
CLK_PCIE_CARD_PCH_R

GPIO25 = NATIVE,3.3V,SUS

GPIO26 = NATIVE,3.3V,SUS

GPIO44 = NATIVE,3.3V,SUS

GPIO56 = NATIVE,3.3V,SUS

GPIO73

GPIO26

GPIO44

GPIO56

4

U7B

U7B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

NEW CARD

WLAN

LAN

MINI1

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

SMBus

PCI-E*

PCI-E*

Link

Link

Controller

Controller

PEG_A_CLKRQ# / GPIO47

PEG

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

Clock Flex

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

3

LID_OUT#

B9

H14

C8

J14

C6

G8

M14

E10

G12

T13

T11

T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

GPIO11 = NATIVE,3.3V,SUS

SMBCLK

SMBDATA

GPIO60 = NATIVE,3.3V,SUS

GPIO60

SML0CLK

SML0DATA

GPIO74 = NATIVE,3.3V,SUS

GPIO74

SML1CLK

R79

R79

SML1DATA

R80

R80

PEG_CLKREQ#

PEG_CLKREQ#

GPIO47 = 10Kohm PULL DOWN

CLKOUT_DP_N
CLKOUT_DP_P

CLK_14M_PCH

CLK_PCI_FB

XTAL25_IN
XTAL25_OUT

CLK_PCI_DB_R

GPIO67

1 2

CLK_PCIE_VGA#_R
CLK_PCIE_VGA_R

CLK_EXP#_R
CLK_EXP_R

R491 90.9_0402_1%R491 90.9_0402_1%

1 2

1 2

For CR 48M CLK

EC_LID_OUT# 34

R407

R407
0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

DTS , read from EC

PEG_CLKREQ# 19

R41210K_0402_5% @R41210K_0402_5% @

R524 0_0402_5%R524 0_0402_5%

1 2

R525 0_0402_5%R525 0_0402_5%

1 2

R105 0_0402_5%R105 0_0402_5%

1 2

R106 0_0402_5%R106 0_0402_5%

1 2

T24 PADT24 PAD
T25 PADT25 PAD

CLK_DMI# 12
CLK_DMI 12

CLK_BUF_BCLK# 12
CLK_BUF_BCLK 12

CLK_BUF_DOT96# 12
CLK_BUF_DOT96 12

CLK_BUF_CKSSCD# 12
CLK_BUF_CKSSCD 12

CLK_14M_PCH 12

CLK_PCI_FB 16

+1.05VS

R198

R198

22_0402_5%

22_0402_5%

@

@

T9 PADT9 PAD

EC_SMB_CK2

EC_SMB_DA2

CLK_PCIE_VGA#
CLK_PCIE_VGA

CLK_PCI_DB 28

SMB_CLK_S3

SMB_DATA_S3

5

3

Q8B

Q8B

EC_SMB_CK2 31,34

EC_SMB_DA2 31,34

4

CLK_PCIE_VGA# 19

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

CLK_EXP# 5
CLK_EXP 5

EMI REQUEST 0303

2

1 2

R121 10K_0402_5%R121 10K_0402_5%

1 2

R406 10K_0402_5%R406 10K_0402_5%

+3VS

2

6 1

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Q8A

Q8A

EC_THERMAL

CLK_PCIE_VGA 19

Q7B

Q7B

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

R209

R209
22_0402_5%

22_0402_5%

@

@

1 2
2

C263

C263
10P_0402_50V8J

10P_0402_50V8J

1

@

@

HYBRID@

HYBRID@

3

CLK_14M_PCHCLK_PCI_FB

SMB_CLK_S3

SMB_DATA_S3

SMBCLK

+3VS +3VALW

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

GPIO74

LID_OUT#

GPIO60

SMB_CLK_S3 10,11,12,28

SMB_DATA_S3 10,11,12,28

SMBDATA

+3VS_DELAY

2.2K_0402_5%

2.2K_0402_5%

2

HYBRID@

HYBRID@

Q7A

Q7A

6 1

5

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

R413

R413
22_0402_5%

22_0402_5%

SVT

1 2

RF

2

C439

C439
10P_0402_50V8J

10P_0402_50V8J

1

1 2

R123 2.2K_0402_5%R123 2.2K_0402_5%

1 2

R78 2.2K_0402_5%R78 2.2K_0402_5%

1 2

R148 2.2K_0402_5%R148 2.2K_0402_5%

1 2

R147 2.2K_0402_5%R147 2.2K_0402_5%

1 2

R404 2.2K_0402_5%R404 2.2K_0402_5%

1 2

R403 2.2K_0402_5%R403 2.2K_0402_5%

1 2

R399 10K_0402_5%R399 10K_0402_5%

1 2

R145 10K_0402_5%R145 10K_0402_5%

1 2

R400 10K_0402_5%R400 10K_0402_5%

R122

R122
0_0402_5%

0_0402_5%

@

@

1 2

@

@

1 2

0_0402_5%

0_0402_5%
R119

R119

+3VS_DELAY

R124

R124

HYBRID@

HYBRID@

XTAL25_IN

XTAL25_OUT

Nvidia Thermal sensor

R82

R82

2.2K_0402_5%

2.2K_0402_5%

HYBRID@

HYBRID@

SMB_EC_DA2_REC_SMB_DA2

SMB_EC_CK2_REC_SMB_CK2

1

DDR3*2 AND CLK GEN

SMB_CLK_S3SMBCLK

SMB_DATA_S3

SMB_EC_DA2_R 19

SMB_EC_CK2_R 19

1 2

R598 1M_0402_5%R598 1M_0402_5%

Y4

Y4

1 2

25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012

1

C630

C630
27P_0402_50V8J

27P_0402_50V8J

27P_0402_50V8J

27P_0402_50V8J

2

18->27pF, PVT
Y4 resize 5032

C631

C631

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

IBEX-M(2/6)-PCI-E/SMBUS/CLK

IBEX-M(2/6)-PCI-E/SMBUS/CLK

IBEX-M(2/6)-PCI-E/SMBUS/CLK

LA-5941P

LA-5941P

LA-5941P

1

of

of

of

14 50Thursday, April 08, 2010

14 50Thursday, April 08, 2010

14 50Thursday, April 08, 2010

0.3

0.3

0.3

5

4

3

2

1

D D

DMI_CTX_PRX_N06
DMI_CTX_PRX_N16
DMI_CTX_PRX_N26
DMI_CTX_PRX_N36

DMI_CTX_PRX_P06
DMI_CTX_PRX_P16
DMI_CTX_PRX_P26
DMI_CTX_PRX_P36

DMI_CRX_PTX_N06
DMI_CRX_PTX_N16
DMI_CRX_PTX_N26
DMI_CRX_PTX_N36

DMI_CRX_PTX_P06
DMI_CRX_PTX_P16
DMI_CRX_PTX_P26
DMI_CRX_PTX_P36

+1.05VS

1 2

R520 49.9_0402_1%R520 49.9_0402_1%

4mil width and place
within 500mil of the PCH

C C

Checklist0.8ΚMEPWROK
can be connect to
PWROK if iAMT disable

VGATE34,48

ICH_POK34

R396 0.01U_0402_16V7KR396 0.01U_0402_16V7K

R398 0_0402_5%@R398 0_0402_5%@

R397 0_0402_5%@R397 0_0402_5%@

12

1 2

1 2

(2009,05,04)

PM_DRAM_PWRGD5

R401

+3VALW

SUS_PWR_DN_ACK34

+3VALW

R450 10K_0402_5%R450 10K_0402_5%

1 2

AC_PRESENT34

B B

+3VALW

R401

R437 10K_0402_5%R437 10K_0402_5%

1 2

1 2

R599 0_0402_5%R599 0_0402_5%

PBTN_OUT#34

GPIO31 = GPI,3.3V,SUS

R77 8.2K_0402_1%R77 8.2K_0402_1%

1 2

GPIO30 = GPI,3.3V,SUS

R165 10K_0402_5%R165 10K_0402_5%

1 2

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_IRCOMP

+3VS

R448

R448

MP

10K_0402_5%

10K_0402_5%

SYS_RST#

1 2

SYS_PWROK

R455

R455

0_0402_5%

0_0402_5%

1 2

R146 10K_0402_5%R146 10K_0402_5%

1 2

PM_DRAM_PWRGD

PM_RSMRST#

12

10K_0402_5%

10K_0402_5%

SUS_PWR_DN_ACK_ R

PBTN_OUT#

AC_PRESENT_R

1 2

R451 0_0402_5%R451 0_0402_5%

GPIO72

U7C

U7C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_IN T

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_M#

System Power Management

System Power Management

PMSYNCH

SLP_LAN# / GPIO29

FDI_CTX_PRX_N1

BH17

FDI_CTX_PRX_N2

BD16

FDI_CTX_PRX_N3

BJ16

FDI_CTX_PRX_N4

BA16

FDI_CTX_PRX_N5

BE14

FDI_CTX_PRX_N6

BA14

FDI_CTX_PRX_N7

BC12

FDI_CTX_PRX_P0

BB18

FDI_CTX_PRX_P1

BF17

FDI_CTX_PRX_P2

BC16

FDI_CTX_PRX_P3

BG16

FDI_CTX_PRX_P4

AW16

FDI_CTX_PRX_P5

BD14

FDI_CTX_PRX_P6

BB14

FDI_CTX_PRX_P7

BD12

FDI_INT

BJ14

FDI_FSYNC0

BF13

FDI_FSYNC1

BH13

FDI_LSYNC0

BJ12

FDI_LSYNC1

BG14

PCIE_WAKE#

J12

GPIO32 = GPO,3.3V,CORE

Y1

GPIO61

P8

SUSCLK

F3

E4

H7

P12

K8

N2

TP23

BJ10

GPIO29 = GPO,3.3V,SUS

F6

FDI_CTX_PRX_N0

BA18

FDI_CTX_PRX_N0 6
FDI_CTX_PRX_N1 6
FDI_CTX_PRX_N2 6
FDI_CTX_PRX_N3 6
FDI_CTX_PRX_N4 6
FDI_CTX_PRX_N5 6
FDI_CTX_PRX_N6 6
FDI_CTX_PRX_N7 6

FDI_CTX_PRX_P0 6
FDI_CTX_PRX_P1 6
FDI_CTX_PRX_P2 6
FDI_CTX_PRX_P3 6
FDI_CTX_PRX_P4 6
FDI_CTX_PRX_P5 6
FDI_CTX_PRX_P6 6
FDI_CTX_PRX_P7 6

FDI_INT 6

FDI_FSYNC0 6

FDI_FSYNC1 6

FDI_LSYNC0 6

FDI_LSYNC1 6

1K_0402_5%

1K_0402_5%

1 2

1 2

R108 10K_0402_5% @R108 10K_0402_5% @

1 2

R180 0_0402_5%R180 0_0402_5%

GPIO61 = NATIVE,3.3V,SUS

GPIO62 = NATIVE,3.3V,SUS

Can be left NC when IAMT is
not support on the platfrom

If not using integrated
LAN,signal may be left as NC.

R436

R436

+3VALW

PCIE_WAKE# 28

SVT

+3VS

PVT

SUSCLK 34

PM_SLP_S5# 34

PM_SLP_S4# 34

PM_SLP_S3# 34

H_PM_SYNC 5

CLKRUN# 34

PCH_ENBKL27
PCH_ENVDD27

PCH_EDID_CLK27
PCH_EDID_DATA27

+3VS

12

12P_0402_50V8J

12P_0402_50V8J

CRT_HSYNC26
CRT_VSYNC26

PCH_PWM27

R502

R502

2.37K_0402_1%

2.37K_0402_1%

LVDS_ACLK#27
LVDS_ACLK27

LVDS_A0#27
LVDS_A1#27
LVDS_A2#27

LVDS_A027
LVDS_A127
LVDS_A227

C1214

C1214

@

@

RF 10/22

DAC_BLU26
DAC_GRN26
DAC_RED26

CRT_DDC_CLK26
CRT_DDC_DATA26

R688

R688

22_0402_5%

22_0402_5%

HYBRID@

HYBRID@
SD028220A80

SD028220A80

PCH_ENBKL
PCH_ENVDD

EDID_CLK
EDID_DATA

R497

R497

1 2
1 2

R496 10K_0402_5%R496 10K_0402_5%

T10 PADT10 PAD

1

1

2

2

R688 33_0402_1%UMA@R688 33_0402_1%UMA@

R687 33_0402_1%UMA@R687 33_0402_1%UMA@

SVT

R687

R687

22_0402_5%

22_0402_5%

HYBRID@

HYBRID@
SD028220A80

SD028220A80

10K_0402_5%

10K_0402_5%

LVDS_ACLK#
LVDS_ACLK

LVDS_ACLK#
LVDS_ACLK

C1215

C1215
12P_0402_50V8J

12P_0402_50V8J

@

@

DAC_BLU
DAC_GRN
DAC_RED

CRT_DDC_CLK
CRT_DDC_DATA

12
12

HSYNC
VSYNC

CRT_IREF

1K_0402_0.5%

1K_0402_0.5%

R492

R492

12

U7D

U7D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

LVDS

LVDS

CRT

CRT

If CRT DAC is not used then
a 5% resistor can be used.
(checklist 1.6)

SDVO_INTN
SDVO_INTP

DDPB_ AUXN
DDPB_ AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_ AUXN
DDPC_ AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_ AUXN
DDPD_ AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40

2.2K_0402_5%

2.2K_0402_5%

AW38
BA38

HDMICLK_NB

Y49

HDMIDAT_NB

AB49

BE44
BD44
AV40

TMDS_B_DATA2#_PCH

BE40

TMDS_B_DATA2_PCH

BD40

TMDS_B_DATA1#_PCH

BF41

TMDS_B_DATA1_PCH

BH41

TMDS_B_DATA0#_PCH

BD38

TMDS_B_DATA0_PCH

BC38

TMDS_B_CLK#_PCH

BB36

TMDS_B_CLK_PCH

BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

R510 100K_0402_5%R510 100K_0402_5%

R504

R504

UMA@

UMA@

R675 100K_0402_5%R675 100K_0402_5%

SDVO_T VCLKINN

SDVO_T VCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

12

+3VS

12

12

12

R503

R503

2.2K_0402_5%

2.2K_0402_5%

UMA@

UMA@

HDMICLK_NB 25
HDMIDAT_NB 25

TMDS_B_HPD 25

C638 0.1U_0402_10V6KUMA@C638 0.1U_0402_10V6KUMA@

1 2

C639 0.1U_0402_10V6KUMA@C639 0.1U_0402_10V6KUMA@

1 2

C640 0.1U_0402_10V6KUMA@C640 0.1U_0402_10V6KUMA@

1 2

C641 0.1U_0402_10V6KUMA@C641 0.1U_0402_10V6KUMA@

1 2

C642 0.1U_0402_10V6KUMA@C642 0.1U_0402_10V6KUMA@

1 2

C643 0.1U_0402_10V6KUMA@C643 0.1U_0402_10V6KUMA@

1 2

C644 0.1U_0402_10V6KUMA@C644 0.1U_0402_10V6KUMA@

1 2

C645 0.1U_0402_10V6KUMA@C645 0.1U_0402_10V6KUMA@

1 2

SVT

HDMI

TMDS_B_DATA2# 25
TMDS_B_DATA2 25
TMDS_B_DATA1# 25
TMDS_B_DATA1 25
TMDS_B_DATA0# 25
TMDS_B_DATA0 25
TMDS_B_CLK# 25
TMDS_B_CLK 25

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

VGATE

ICH_POK

A A

3

1

G

A

Y

2

B

P

5

+3VS

Reserved
(2009,09,08)

5

SYS_PWROK

4

U28

U28

EC_RSMRST#34

RSMRST circuit

R402

@R402

@

0_0402_5%

0_0402_5%

1 2

E

BAV99DW-7_SOT363

BAV99DW-7_SOT363

D8B

D8B

R175

R175

1 2

4.7K_0402_5%

4.7K_0402_5%

PVT, Common design

E

B

B

1

2

4

5

6

3

4

C

C

PM_RSMRST#

123

Q14

Q14
MMBT3906_SOT23-3

MMBT3906_SOT23-3

1 2

R176 4.7K_0402_5%R176 4.7K_0402_5%

D8A

D8A
BAV99DW-7_SOT363

BAV99DW-7_SOT363

+3VALW

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHO RIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Issued Date

Issued Date

DAC_BLU

DAC_GRN

DAC_RED

EDID_CLK

EDID_DATA

CRT OUT

R493 150_0402_1%R493 150_0402_1%

1 2

R495 150_0402_1%R495 150_0402_1%

1 2

R494 150_0402_1%R494 150_0402_1%

1 2

LVDS EDID

R458 2.2K_0402_5%R458 2.2K_0402_5%

R498 2.2K_0402_5%R498 2.2K_0402_5%

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

+3VS

Compal Secret Dat a

Compal Secret Dat a

Compal Secret Dat a

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

IBEX-M(3/6)-DMI/LVDS/DP/PM

IBEX-M(3/6)-DMI/LVDS/DP/PM

IBEX-M(3/6)-DMI/LVDS/DP/PM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

LA-5941P

LA-5941P

LA-5941P

1

15 50Thursday, April 08, 2010

15 50Thursday, April 08, 2010

15 50Thursday, April 08, 2010

of

of

of

0.3

0.3

0.3

5

D D

PCI_PIRQA#
PCI_PIRQB#

GPIO18 = NATIVE,5V,CORE
GPIO52 = NATIVE,5V,CORE
GPIO54 = NATIVE,5V,CORE

C C

DGPU_PWMSEL#27

GPIO2 = GPI,5V,CORE
GPIO3 = GPI,5V,CORE
GPIO4 = GPI,5V,CORE
GPIO5 = GPI,5V,CORE

PCI_RST#28,34

R408 100K_0402_1%R408 100K _0402_1%

12

GNT2

Default-Internal pull up

Low=Configures DMI for ESI
compatible operation(for
servers only.Not for
mobile/desktops)

T26

INTERNAL pull -H

CLK_PCI_LPC34
CLK_PCI_FB14

B B

PCI_REQ0#

PCI_PIRQF#
PCI_REQ3#

PCI_REQ1#
PCI_FRAME#
PCI_TRDY#
PCI_PIRQH#

PCI_STOP#
PCI_IRDY#
PCI_PIRQD#
DGPU_SELECT#

PCI_GNT3#

A16 swap overide Strap/Top-Block
Swap Override jumper

A A

PCI_GNT3#

T26
PAD

PAD

R199 22_0402_5%R199 22_0402_5%

1 2
1 2

R211 22_0402_5%R211 22_0402_5%

RP5

RP5

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP7

RP7

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP4

RP4

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

R200 1K_0402_5%@ R200 1K_0402_5%@

1 2

Low=A16 swap
override/Top-Block
Swap Override enabled
High=Default

PCI_PIRQC#
PCI_PIRQD#

PCI_REQ0#
PCI_REQ1#

PCI_REQ3#

PCI_GNT0#
PCI_GNT1#

PCI_GNT3#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_SERR#
PCI_PERR#

PCI_IRDY#

*

PCI_DEVSEL#
PCI_FRAME#

PCI_LOCK#

PCI_STOP#
PCI_TRDY#

PLT_RST#

CLK_PCI_LPC_R
CLK_PCI_FB_R

+3VS +3VS

*

5

H40
N34
C44
A38
C36

J34
A40
D45
E36
H48
E40
C40
M48
M45

F53
M40
M43

J36
K48

F40
C42
K46
M51

K51

L34

F42

J40
G46

F44
M47
H36

J50
G42
H47
G34

G38
H51
B37
A44

F51
A46
B45
M53

F48
K45

F36
H53

B41
K53
A36
A48

E44
E50

A42
H44

F46
C46

D49

D41
C48

N52
P53
P46
P51
P48

PCI_PIRQG#
PCI_PIRQC#PCI_PIRQB#
PCI_PIRQA#
PCI_PIRQE#

PCI_DEVSEL#
PCI_LOCK#
PCI_SERR#
PCI_PERR#

U7E

U7E

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22

J52

AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

K6

PCIRST#

SERR#
PERR#

IRDY#
PAR
DEVSEL#
FRAME#

PLOCK#

STOP#
TRDY#

M7

PME#

D5

PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

RP3

RP3

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP6

RP6

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

BUF_PLT_RST#5,28,29

PLTRST_VGA#19

NVRAM

NVRAM

PCI

PCI

USB

USB

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C646

C646

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

AY9

NV_CE#0

BD1

NV_CE#1

AP15

NV_CE#2

BD8

NV_CE#3

AV9

NV_DQS0

BG8

NV_DQS1

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3

NV_ALE

AY6

NV_CLE

AU2

NV_RCOMP

AV7

NV_RB#

AY8
AY5

AV11
BF5

H18

USBP0N

J18

USBP0P

A18

USBP1N

C18

USBP1P

N20

USBP2N

P20

USBP2P

J20

USBP3N

L20

USBP3P

F20

USBP4N

G20

USBP4P

A20

USBP5N

C20

USBP5P

M22

USBP6N

N22

USBP6P

B21

USBP7N

D21

USBP7P

H22

USBP8N

J22

USBP8P

E22

USBP9N

F22

USBP9P

A22

USBP10N

C22

USBP10P

G24

USBP11N

H24

USBP11P

L24

USBP12N

M24

USBP12P

A24

USBP13N

C24

USBP13P

B25

USBRBIAS#

D25

USBRBIAS

N16
J16
F16
L16
E14
G16
F12
T15

PCI_GNT0#

PCI_GNT1#

Boot BIOS Strap

0

0

1

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

12

1

R155

R155
100K_0402_5%

100K_0402_5%

2

@

@

12

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

R173

R173
100K_0402_5%

100K_0402_5%

HYBRID@

HYBRID@

4

GPIO8

Weak internal PU, don't PD

Check list Rev0.8 section1.23.2
If not implemented, the
Braidwood
interface signals can be
left as No Connect (NC).

*

L
Layer Security(TLS) chiper suite
with no confidentiality

NV_CLE

within 500mil

NV_RCOMP

R104

R104

1 2

32.4_0402_1%

32.4_0402_1%

@

@

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3

USB20_N5
USB20_P5

USB20_N8
USB20_P8
USB20_N9
USB20_P9

USB20_N11
USB20_P11

USB20_N13
USB20_P13

USBRBIAS

Within 500 mils minimum spacing to other
signal is 15mil

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3_R
USB_OC#4
USB_OC#5_R
USB_OC#6
USB_OC#7

USB20_N0 37
USB20_P0 37
USB20_N1 37
USB20_P1 37
USB20_N2 27
USB20_P2 27
USB20_N3 37
USB20_P3 37

USB20_N5 37
USB20_P5 37

USB20_N8 28
USB20_P8 28
USB20_N9 37
USB20_P9 37
USB20_N10 38
USB20_P10 38
USB20_N11 37
USB20_P11 37

USB20_N13 28
USB20_P13 28

1 2

R164 22.6_0402_1%R164 22.6_0402_1%

1 2

R625 0_0402_5%R625 0_0402_5%

1 2

R626 0_0402_5%R626 0_0402_5%

GPIO27

Default

HighΚEnables the internal VccVRM
to have a clean supply for analog
rails. no need to use on board
filter circuit.

GPIO1 = GPI,3.3V,CORE
GPIO6 = GPI,3.3V,CORE
GPIO7 = GPI,3.3V,CORE
GPIO8 = GPO,3.3V,SUS
GPIO12 = GPI,3.3V,SUS

Default-Internal pull up

R212 1K_0402_5%@R212 1K_0402_5%@

1 2

R210 1K_0402_5%@R210 1K_0402_5%@

1 2

4

PCI_GNT1#PCI_GNT0#

1 2

4

U5

U5

Boot BIOS
Location

LPC

0

1

Reserved(NAND)

0

PCI

11

SPI

R149 22_0402_5%

R149 22_0402_5%

@

@

3

1

G

A

Y

2

B

P

5

+3VS

+3VS

5

U15

U15

4

Y

HYBRID@

HYBRID@

3

P

G

B

A

*

PLT_RST#

2

1

DGPU_HOLD_RST#

+3VS

GPIO15

Intel ME Crypto Transport

Κ

HΚIntel ME Crypto Transport
Layer Security(TLS) chiper suite
with confidentiality

it have weak internal PU 20K

Do not connect(floating)

Κ

6

USB1

LEFT USB (COMBO)

USB Camera

USB2

CARD READER

WLAN

USB3

FP

Bluetooth

3G CARD

USB_OC#0 37
USB_OC#1 37

USB_OC#5 37

DRAMRST_CNTRL_PCH5

PCH_TEMP_ALERT#34DGPU_SELECT#26,27

DGPU_PWR_EN22,39,45

DGPU_HOLD_RST# GPIO16

DGPU_HPD_INT#24

HDMI HPD FOR PCH

EDIDSEL#

DGPU_EDIDSEL#26,27

Intel Anti-Theft Techonlogy

High=Enabled

NV_ALE

Low=Disable(floating)

NV_ALE

R515 1K_0402_5%@ R515 1K_0402_5%@

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal
PU,Do not pull low

NV_CLE

R98 1K_0402_5%@ R98 1K_0402_5%@

3

GPIO0 = GPI,3.3V,CORE

EC_SCI#34

EC_SMI#34

+3VALW

GPIO27 if pull down to turn off 1.8V VR

+3VALW

+3VALW

DRAMRST_CNTRL_PCH GPIO46

+3VALW

HYBRID@

HYBRID@

R614 0_0402_5%

R614 0_0402_5%

1 2

@

@

R627 0_0402_5%

R627 0_0402_5%

1 2

HYBRID@

HYBRID@

R613 0_0402_5%

R613 0_0402_5%

1 2

@

@

R628 0_0402_5%

R628 0_0402_5%

1 2

HYBRID@

HYBRID@

R609 0_0402_5%

R609 0_0402_5%

1 2

@

@

R611 0_0402_5%

R611 0_0402_5%

1 2

HYBRID@

HYBRID@

R612 0_0402_5%

R612 0_0402_5%

1 2

1 2

R48310K_0402_5% R48310K_0402_5%

1 2

R42810K_0402_5% R42810K_0402_5%

1 2

R42710K_0402_5% R42710K_0402_5%

EC_SCI#

EC_SMI#

T20

T20
PAD

PAD

1 2

R4331K_0402_5% R4331K_0402_5%

DGPU_PWROK

1 2

R44910K_0402_5% R44910K_0402_5%

@

12

R50710K_0402_5%@R50710K_0402_5%

1 2

R44610K_0402_5% R44610K_0402_5%

12

R43210K_0402_5% R43210K_0402_5%

12

R45610K_0402_5% R45610K_0402_5%

1 2

R48110K_0402_5% R48110K_0402_5%

1 2

R10910K_0402_5% R10910K_0402_5%

1 2

R11210K_0402_5% R11210K_0402_5%

1 2

R7610K_0402_5% R7610K_0402_5%

1 2

R48010K_0402_5% R48010K_0402_5%

PCH_TEMP_ALERT#

1 2

R415 10K_0402_5%R415 10K_0402_5%

GPIO36

GPIO0

GPIO35

GPIO6

GPIO15

GPIO1

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3_R

GPIO0

GPIO1

GPIO6

GPIO15

GPIO16

GPIO22

GPIO28

GPIO34

GPIO35

GPIO36

GPIO37

GPIO38

GPIO39

GPIO45

GPIO48

GPIO57

*

+1.8VS

USB_OC#4

1 2

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

USB_OC#5_R
USB_OC#6
USB_OC#7

NV_ALE

Enable Intel Anti-Theft
Technology

+3VS

Disable Intel Anti-Theft
Technology

NV_CLE

DMI termination voltage.
weak internal PU, don't PD

2010/01/13 2011/01/13

2010/01/13 2011/01/13

2010/01/13 2011/01/13

Κ

Κ

U7F

U7F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CT RL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M_FCBGA1071

IBEXPEAK-M_FCBGA1071

RP1

RP1

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP2

RP2

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

8.2K PU to +3VS

floating(internal PD)

Compal Secret Data

Compal Secret Data

Compal Secret Data

VGA_PWROK45

Deciphered Date

Deciphered Date

Deciphered Date

2

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE 8N

CLKOUT_BCLK0_P / CLKOUT_PCI E8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

+3VALW

+3VS

+3VS

+3VALW

2

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

1 2

R429 10K_0402_5%R429 10K_0402_5%

PVT, timing

1 2

R485 1K_0402_1%R485 1K_0402_1%

1 2

1 2

1 2

PCH_TEMP_ALERT#

R484 10K_0402_5%R484 10K_0402_5%

12

R107 10K_0402_5%R107 10K_0402_5%

@

@

R426 10K_0402_5%

R426 10K_0402_5%

@

@

R414 10K_0402_5%

R414 10K_0402_5%

PVT

R5800_0402_5% R5800_0402_5%

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C687

C687

@

@

1

AH45
AH46

+3VS

AF48
AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

R110

R110
10K_0402_5%

10K_0402_5%

1 2

H_PECI

KB_RST#

H_THERMTRIP#_LNV_ALE

56_0402_5%

56_0402_5%

56 5%-->checklist 1.6

54.9 1%-->CRB 1.0

+3VALW

INT3_3V#

TP24

GATEA20 34

CLK_CPU_BCLK# 5

CLK_CPU_BCLK 5

H_PECI 5

KB_RST# 34

H_CPUPWRGD 5

R518

R518

1 2

R519

R519

56_0402_5%

56_0402_5%

KB_RST#

H_THERMTRIP# 5

12

+VCCP

DRAMRST_CNTRL_PCH

12

R405 10K_0402_5%R405 10K_0402_5%

USB PORT LIST

+3VS

12

DEVICEPORT

DGPU_PWROK

GPIO36

GPIO16

1
2
3
4
5
6
7

USB10
USB/ESATA
CMOS
USB2

CARD READER

X
X

WIRELESS8

9

USB3

10

EC_SCI#

EC_SMI#

DGPU_PWROK

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

IBEX-M(4/6)-PCI/USB/GPIO

IBEX-M(4/6)-PCI/USB/GPIO

IBEX-M(4/6)-PCI/USB/GPIO

FingerPrint

BT

11
12

3G

13

LA-5941P

LA-5941P

LA-5941P

1

of

of

of

16 50Thursday, April 08, 2010

16 50Thursday, April 08, 2010

16 50Thursday, April 08, 2010

R111

R111
10K_0402_5%

10K_0402_5%

0.3

0.3

0.3