Compal LA-5931P NAUR2 Schematic
A
1 1
B
C
D
E
Compal Confidential
2 2
NAUR2 Schematics Document
AMD Processor with RS780MN/SB710/M92-S2/S3 LP
3 3
2009-11-25
REV:1.0
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
E
C
C
C
of
of
of
143Friday, January 08, 2010
143Friday, January 08, 2010
143Friday, January 08, 2010
A
Compal Confidential
Model Name :
B
C
D
E
VRAM 512MB
1 1
LVDS Conn.
64M16 x 4
page 19
DDR3
ATI M93-S3 LP
PCI-Express 8x
CRT Conn.
Page 14,15,16,17,18
Gen1
AMD ASB1 Processor
page 4,5,6,7
Hyper Transport Link
16 x 16
ATI RS780MN
Memory BUS(DDRII)
Dual Channel
1.8V DDRII 667/800
Thermal Sensor
ADM1032
page 6 page 20
Clock Generator
SLG8SP626VTR
200pin DDRII-SO-DIMM X2
BANK 0, 1, 2, 3
page 8,9
uFCBGA-528
HDMI Conn.
PCI-Express 1x
page 10,11,12,13
page 32
4 in 1 socket
page 30
USB conn
page 31
2 2
A link Express2
ATI SB710
uFCBGA-528
X 1
USB
3.3V 48MHz
HD Audio
3.3V 24.576MHz/48Mhz
Card Reader
RTS5138
page 30
S-ATA
page 24,25,26,27,28
LPC BUS
HDA Codec
CX20671
page 32
Phone Jack x2
page 33
3 3
Golden finger
CPU/board to I/O board
LED
page 23
DC/DC Interface .
page 35
Power Circuit
page 35~40
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
page 29
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
E
of
of
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243Friday, January 08, 2010
243Friday, January 08, 2010
243Friday, January 08, 2010
C
C
C
A
Voltage Rails
Power Plane Description
VIN
B+
+CPU_CORE
1 1
+NB_CORE 1.0V switched power rail ON OFF
+0.9V 0.9V switched power rail for DDR terminator
+1.1VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU (0.7-1.2V)
1.1V switched power rail for NB VDDC & VGA
B
S1 S3 S5
N/A N/A N/A
N/AN/AN/A
ON OFF
OFF
OFF
ON
ON
OFF
ON OFF OFF
C
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3#
SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
HIGH
LOW
LOWLOWLOW
LOW LOW LOW LOW
HIGHHIGHHIGH
HIGH
HIGH
D
ON
ON
ON
OFF
OFF
ON ON
ON
OFF
OFF
OFF
LOW
OFF
OFF
OFF
ON
ON
ON
ON
ON
E
+1.2V_HT 1.2V switched power rail ON OFF OFF
+VGA_CORE
+1.5VS
+1.8V
+1.8VS 1.8V switched power rail
+2.5VS
+3VALW
0.90-0.95V switched power rail
1.5V power rail for PCIE Card
1.8V power rail for CPU VDDIO and DDR
2.5V for CPU_VDDA
3.3V always on power rail
ON
ON
ON
ON
ON
OFFOFFON
OFF OFF
ON
OFF
OFF
OFF
OFF
OFF
ON ON*
+3V_LAN 3.3V power rail for LAN ON ON ON
OFF
ON
OFF
OFF
ON*
OFFON
ONON
+3VS
+5VALW
+5VS
3.3V switched power rail
5V always on power rail
5V switched power rail
+VSB VSB always on power rail ON ON*
2 2
+RTCVCC RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON
ON
ON
ON
EC SM Bus1 address
Device
Smart Battery
Address Address
HEX
16H
EC SM Bus2 address
Device
ADI ADM1032 (CPU)
SB-Temp Sensor
1001 100X b0001 011X b
HEX
98H
9CH
SB710
SM Bus 0 address
Device
Clock Generator
3 3
4 4
(SILEGO SLG8SP626)
DDR DIMM1
DDR DIMM2
Address
1101 001Xb
1001 000Xb
1001 010Xb
HEX
D2
90
94
Device Address
IGP only mode
IGP only mode
PowerXpress mode
IGP only mode
PowerXpress mode
PX_GPIO0
dGPU_ResetFunction Description dGPU_PWR_Enable PX Mode Switch
PX_GPIO1
Enable +1.1VS_PXFunction Description PX MODE SWITCH Enable +3VS_DELAY
H : Enable Reserved
Trigger from SB to Enable (PX_GPIO1/PX_+3VS/PX_+1.8VS/PX_+VGA_CORE)Function Description
PX_GPIO1
XX
H : EnableH : Enable L : iGPU(DC) / H : dGPU(AC)
XX
KB926
PX_GPIO1_SB
X
H : Enable
RS780MNSB700 SB700
PX_GPIO2
X
KB926
PX_+3VSPX_GPIO2
X
H : Enable
DISPLAY OUTPUT
PX_+1.8VS
Enable +1.8VS_PX
X
H : Enable
LVDS / CRTPowerXpress mode
PX_+VGA_CORE
Enable +VGA_CORE
X
H : Enable
PX_GPIO2_NB
Trigger from SB
X
Reserved
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
E
of
of
of
343Friday, January 08, 2010
343Friday, January 08, 2010
343Friday, January 08, 2010
C
C
C
ZZZ
ZZZ
PCB
PCB
5
U1
U1
CPU
CPU
L325@
L325@
U1
U1
CPU
CPU
MV40@
MV40@
U1
U1
CPU
CPU
L335@
L335@
4
3
2
1
D D
VLDT=500mA
C C
H_CLKIP1<10>
H_CLKIN1<10>
H_CLKIP0<10>
11/24 update 11/24 update
B B
H_CLKIN0<10>
H_CTLIP1<10> H_CTLOP1 <10>
H_CTLIN1<10>
H_CTLIP0<10> H_CTLOP0 <10>
H_CTLIN0<10>
H_CADIP[0..15]
H_CADIN[0..15]
+1.2V_HT
H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0
H_CTLIP0
U1A
U1A
AL4
VLDT_B4
AL3
VLDT_B3
AL2
VLDT_B2
AL1
VLDT_B1
Y6
L0_CADIN_H15
Y5
L0_CADIN_L15
W7
L0_CADIN_H14
W6
L0_CADIN_L14
U6
L0_CADIN_H13
U5
L0_CADIN_L13
R7
L0_CADIN_H12
R6
L0_CADIN_L12
M8
L0_CADIN_H11
M7
L0_CADIN_L11
L6
L0_CADIN_H10
L5
L0_CADIN_L10
J6
L0_CADIN_H9
J5
L0_CADIN_L9
H4
L0_CADIN_H8
H3
L0_CADIN_L8
T3
L0_CADIN_H7
T4
L0_CADIN_L7
T2
L0_CADIN_H6
T1
L0_CADIN_L6
P3
L0_CADIN_H5
P4
L0_CADIN_L5
P2
L0_CADIN_H4
P1
L0_CADIN_L4
M2
L0_CADIN_H3
M1
L0_CADIN_L3
K3
L0_CADIN_H2
K4
L0_CADIN_L2
K2
L0_CADIN_H1
K1
L0_CADIN_L1
H2
L0_CADIN_H0
H1
L0_CADIN_L0
P6
L0_CLKIN_H1
P5
L0_CLKIN_L1
M3
L0_CLKIN_H0
M4
L0_CLKIN_L0
P8
L0_CTLIN_H1
P9
L0_CTLIN_L1
V2
L0_CTLIN_H0
V1
L0_CTLIN_L0
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
L625@
L625@
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
HT LINK
HT LINK
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
VLDT_A4
VLDT_A3
VLDT_A2
VLDT_A1
F4
F3
F2
F1
Y9
Y8
AB6
AB5
AC7
AC6
AE6
AE5
AE9
AE8
AH3
AH4
AK3
AK4
AK1
AK2
Y1
Y2
Y4
Y3
AB1
AB2
AB4
AB3
AD4
AD3
AF1
AF2
AF4
AF3
AH1
AH2
AF6
AF5
AD1
AD2
AB8
AB9
V4
V3
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0
H_CTLOP0
H_CTLON0H_CTLIN0
H_CADOP[0..15]
H_CADON[0..15]
1 2
C668 4.7U_0805_10V4ZC668 4.7U_0805_10V4Z
H_CLKOP1 <10>
H_CLKON1 <10>
H_CLKOP0 <10>
H_CLKON0 <10>
H_CTLON1 <10>
H_CTLON0 <10>
H_CADOP[0..15] <10>H_CADIP[0..15]<10>
H_CADON[0..15] <10>H_CADIN[0..15]<10>
+1.2V_HT
250 mil
VLDT CAP.
12
C669
C669
4.7U_0805_10V6K
4.7U_0805_10V6K
12
C670
C670
4.7U_0805_10V6K
4.7U_0805_10V6K
1
C671
C671
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C672
C672
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C673
C673
180P_0402_50V8J
180P_0402_50V8J
2
1
C674
C674
180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
1
C
C
C
of
of
of
443Friday, January 08, 2010
443Friday, January 08, 2010
443Friday, January 08, 2010
A
B
C
D
E
DDR_B_D[63..0]<9>
R523
R523
1K_0402_1%
1K_0402_1%
R521
R521
1K_0402_1%
1K_0402_1%
+1.8V
1 2
1
1
C675
C675
2
1 2
+1.8V
DDR_A_MA[15..0]<8>
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R524
R524
1 2
R522
R522
DDR_CS1_DIMMA#<8>
DDR_CS0_DIMMA#<8>
DDR_CS1_DIMMB#<9>
DDR_CS0_DIMMB#<9>
DDR_CKE1_DIMMB<9>
DDR_CKE0_DIMMB<9>
DDR_CKE1_DIMMA<8>
DDR_CKE0_DIMMA<8>
DDR_A_BS#2<8>
DDR_A_BS#1<8>
DDR_A_BS#0<8>
DDR_A_RAS#<8>
DDR_A_CAS#<8>
DDR_A_WE#<8>
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
DDR_A_CLK2
DDR_A_CLK#2
DDR_A_CLK1
DDR_A_CLK#1
C676
C676
1000P_0402_50V7K
1000P_0402_50V7K
+CPU_M_VREF
39.2_0402_1%
39.2_0402_1%
12
39.2_0402_1%
39.2_0402_1%
+CPU_M_VREF
+0.9V
VTT_SENSE
TP1TP1
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#
DDR_CKE1_DIMMB
DDR_CKE0_DIMMB
DDR_CKE1_DIMMA
DDR_CKE0_DIMMA
DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA0
DDR_A_BS#2
DDR_A_BS#1
DDR_A_BS#0
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
1
C677
C677
1.5P_0402_50V8C
1.5P_0402_50V8C
2
1
C679
C679
1.5P_0402_50V8C
1.5P_0402_50V8C
2
M_ZN
M_ZP
U1B
U1B
A12
VTT1
B12
VTT2
C12
VTT3
D12
VTT4
AK10
VTT5
AN10
VTT6
AL10
VTT7
AM10
VTT8
B11
VTT9
A11
MEMVREF
B10
VTT_SENSE
AG9
MEMZN
AH9
MEMZP
AH29
RSVD#AH29
AE29
RSVD#AE29
AK33
RSVD#AK33
AF33
RSVD#AF33
AH30
MA0_CS_L1
AF29
MA0_CS_L0
AJ32
MB0_CS_L1
AF31
MB0_CS_L0
N33
MB_CKE1
P32
MB_CKE0
M30
MA_CKE1
M28
MA_CKE0
P30
MA_ADD15
M29
MA_ADD14
AG28
MA_ADD13
P28
MA_ADD12
T30
MA_ADD11
AC28
MA_ADD10
P27
MA_ADD9
R26
MA_ADD8
R27
MA_ADD7
U28
MA_ADD6
V30
MA_ADD5
U27
MA_ADD4
Y30
MA_ADD3
AB29
MA_ADD2
W29
MA_ADD1
AC26
MA_ADD0
R29
MA_BANK2
AC29
MA_BANK1
AE28
MA_BANK0
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
AC27
MA_RAS_L
AF30
MA_CAS_L
AE27
MA_WE_L
L625@
L625@
RSVD#AH17
RSVD#AG17
RSVD#E20
RSVD#E19
RSVD#AB27
RSVD#AB26
RSVD#AN21
RSVD#AM21
RSVD#AN22
RSVD#A23
RSVD#AB33
RSVD#AB32
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MA0_CLK_H0
MA0_CLK_L0
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_CLK_H0
MB0_CLK_L0
MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS_L
MB_CAS_L
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_WE_L
1
C678
C678
1.5P_0402_50V8C
1.5P_0402_50V8C
2
1
C680
C680
1.5P_0402_50V8C
1.5P_0402_50V8C
2
AH17
AG17
E20
E19
AB27
AB26
AN21
AM21
A22
A23
AB33
AB32
AK18
AJ17
D18
F19
Y28
Y27
AN22
AM22
C22
B22
AA32
AA33
AK32
AH33
AJ30
AG29
P33
P31
AJ33
T32
T31
AD32
T33
V32
U33
V33
V31
W33
Y31
Y33
Y32
AC33
R33
AD33
AE33
AF32
AH32
AG33
DDR_A_CLK2
DDR_A_CLK#2
DDR_A_CLK1
DDR_A_CLK#1
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1
DDR_B_ODT1
DDR_B_ODT0
DDR_A_ODT1
DDR_A_ODT0
DDR_B_MA15
DDR_B_MA14
DDR_B_MA13
DDR_B_MA12
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA4
DDR_B_MA3
DDR_B_MA2
DDR_B_MA1
DDR_B_MA0
DDR_B_BS#2
DDR_B_BS#1
DDR_B_BS#0
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
DDR_A_CLK2 <8>
DDR_A_CLK#2 <8>
DDR_A_CLK1 <8>
DDR_A_CLK#1 <8>
DDR_B_CLK2 <9>
DDR_B_CLK#2 <9>
DDR_B_CLK1 <9>
DDR_B_CLK#1 <9>
DDR_B_ODT1 <9>
DDR_B_ODT0 <9>
DDR_A_ODT1 <8>
DDR_A_ODT0 <8>
DDR_B_MA[15..0] <9>
DDR_B_BS#2 <9>
DDR_B_BS#1 <9>
DDR_B_BS#0 <9>
DDR_B_RAS# <9>
DDR_B_CAS# <9>
DDR_B_WE# <9>
DDR_B_DM[7..0]<9> DDR_A_DM[7..0] <8>
DDR_B_DQS7<9>
DDR_B_DQS#7<9>
DDR_B_DQS6<9>
DDR_B_DQS#6<9>
DDR_B_DQS5<9>
DDR_B_DQS#5<9>
DDR_B_DQS4<9>
DDR_B_DQS#4<9>
DDR_B_DQS3<9>
DDR_B_DQS#3<9>
DDR_B_DQS2<9>
DDR_B_DQS#2<9>
DDR_B_DQS1<9>
DDR_B_DQS#1<9>
DDR_B_DQS0<9>
DDR_B_DQS#0<9>
4 4
3 3
2 2
1 1
DDR_B_D63
DDR_B_D62
DDR_B_D61
DDR_B_D60
DDR_B_D59
DDR_B_D58
DDR_B_D57
DDR_B_D56
DDR_B_D55
DDR_B_D54
DDR_B_D53
DDR_B_D52
DDR_B_D51
DDR_B_D50
DDR_B_D49
DDR_B_D48
DDR_B_D47
DDR_B_D46
DDR_B_D45
DDR_B_D44
DDR_B_D43
DDR_B_D42
DDR_B_D41
DDR_B_D40
DDR_B_D39
DDR_B_D38
DDR_B_D37
DDR_B_D36
DDR_B_D35
DDR_B_D34
DDR_B_D33
DDR_B_D32
DDR_B_D31
DDR_B_D30
DDR_B_D29
DDR_B_D28
DDR_B_D27
DDR_B_D26
DDR_B_D25
DDR_B_D24
DDR_B_D23
DDR_B_D22
DDR_B_D21
DDR_B_D20
DDR_B_D19
DDR_B_D18
DDR_B_D17
DDR_B_D16
DDR_B_D15
DDR_B_D14
DDR_B_D13
DDR_B_D12
DDR_B_D11
DDR_B_D10
DDR_B_D9
DDR_B_D8
DDR_B_D7
DDR_B_D6
DDR_B_D5
DDR_B_D4
DDR_B_D3
DDR_B_D2
DDR_B_D1
DDR_B_D0
DDR_B_DM7
DDR_B_DM6
DDR_B_DM5
DDR_B_DM4
DDR_B_DM3
DDR_B_DM2
DDR_B_DM1
DDR_B_DM0
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0
Processor DDR2 Memory Interface
U1C
U1C
AN13
MB_DATA63
AL14
MB_DATA62
AL16
MB_DATA61
AN17
MB_DATA60
AN12
MB_DATA59
AM12
MB_DATA58
AM16
MB_DATA57
AN16
MB_DATA56
AL18
MB_DATA55
AN19
MB_DATA54
AM24
MB_DATA53
AN24
MB_DATA52
AM18
MB_DATA51
AN18
MB_DATA50
AL22
MB_DATA49
AN23
MB_DATA48
AM25
MB_DATA47
AL26
MB_DATA46
AN28
MB_DATA45
AL28
MB_DATA44
AL24
MB_DATA43
AN25
MB_DATA42
AN27
MB_DATA41
AM28
MB_DATA40
AM29
MB_DATA39
AL30
MB_DATA38
AL32
MB_DATA37
AL33
MB_DATA36
AK28
MB_DATA35
AN29
MB_DATA34
AM31
MB_DATA33
AM32
MB_DATA32
E33
MB_DATA31
D31
MB_DATA30
B31
MB_DATA29
A31
MB_DATA28
F33
MB_DATA27
F31
MB_DATA26
C32
MB_DATA25
B32
MB_DATA24
C30
MB_DATA23
A29
MB_DATA22
B26
MB_DATA21
A26
MB_DATA20
B30
MB_DATA19
A30
MB_DATA18
A27
MB_DATA17
C26
MB_DATA16
A24
MB_DATA15
B24
MB_DATA14
C18
MB_DATA13
A18
MB_DATA12
A25
MB_DATA11
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
C24
MB_DATA10
C20
MB_DATA9
A19
MB_DATA8
C16
MB_DATA7
A16
MB_DATA6
B14
MB_DATA5
A13
MB_DATA4
B18
MB_DATA3
A17
MB_DATA2
C14
MB_DATA1
A14
MB_DATA0
K33
MB_CHECK7
K31
MB_CHECK6
G32
MB_CHECK5
F32
MB_CHECK4
L33
MB_CHECK3
K32
MB_CHECK2
H31
MB_CHECK1
G33
MB_CHECK0
H33
MB_DM8
AN15
MB_DM7
AN20
MB_DM6
AK26
MB_DM5
AN31
MB_DM4
C33
MB_DM3
C28
MB_DM2
A20
MB_DM1
D14
MB_DM0
J33
MB_DQS_H8
H32
MB_DQS_L8
AM14
MB_DQS_H7
AN14
MB_DQS_L7
AL20
MB_DQS_H6
AM20
MB_DQS_L6
AN26
MB_DQS_H5
AM26
MB_DQS_L5
AN30
MB_DQS_H4
AM30
MB_DQS_L4
D33
MB_DQS_H3
D32
MB_DQS_L3
B28
MB_DQS_H2
A28
MB_DQS_L2
A21
MB_DQS_H1
B20
MB_DQS_L1
B16
MB_DQS_H0
A15
MB_DQS_L0
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
L625@
L625@
DDRII: DATA
DDRII: DATA
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_DM8
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MA_DQS_H8
MA_DQS_L8
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AG11
AH11
AJ12
AJ14
AF11
AF12
AG12
AH12
AK14
AF15
AH19
AK20
AF14
AG14
AF17
AG19
AG20
AJ20
AF22
AK24
AF19
AF20
AJ23
AG23
AF23
AF25
AH27
AK30
AJ25
AG25
AJ26
AJ28
D28
G28
D26
E26
F30
E29
F27
H26
H25
D24
H22
E22
F26
G26
D22
G23
G22
G20
G15
F15
D20
F22
D16
E17
H15
H14
G12
H12
E15
E14
E11
F11
K30
J29
G29
F29
L28
L29
H29
H27
H30
AL12
AK16
AK22
AJ27
E27
E23
H19
G14
J27
J26
AJ11
AK12
AG15
AH15
AH22
AG22
AG26
AH26
E28
F28
E25
F25
G17
H17
E12
F12
DDR_A_D63
DDR_A_D62
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D55
DDR_A_D54
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D47
DDR_A_D46
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D39
DDR_A_D38
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D31
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D15
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D8
DDR_A_D7
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_DM7
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_D[63..0] <8>
DDR_A_DQS7 <8>
DDR_A_DQS#7 <8>
DDR_A_DQS6 <8>
DDR_A_DQS#6 <8>
DDR_A_DQS5 <8>
DDR_A_DQS#5 <8>
DDR_A_DQS4 <8>
DDR_A_DQS#4 <8>
DDR_A_DQS3 <8>
DDR_A_DQS#3 <8>
DDR_A_DQS2 <8>
DDR_A_DQS#2 <8>
DDR_A_DQS1 <8>
DDR_A_DQS#1 <8>
DDR_A_DQS0 <8>
DDR_A_DQS#0 <8>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Title
Title
Title
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
401814
401814
401814
543Friday, January 08, 2010
543Friday, January 08, 2010
543Friday, January 08, 2010
E
C
C
C
of
of
of
5
+1.8VS
4
3
2
1
R525
R525
300_0402_5%
300_0402_5%
1 2
LDT_RST#<24>
D D
H_PWRGD<24>
C C
B B
LDT_STOP#<11,24>
C691
C691
2200P_0402_50V7K
2200P_0402_50V7K
1
2
LDT_RST#
1
C685
C685
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
+1.8VS
1 2
H_PWRGD
1
C686
C686
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
+1.8VS
1 2
1
2
+3VS
CPU_THERMDA
CPU_THERMDC
@
@
R529
R529
300_0402_5%
300_0402_5%
@
@
R540
R540
300_0402_5%
300_0402_5%
LDT_STOP#
C689
C689
0.01U_0402_25V4Z
0.01U_0402_25V4Z
@
@
C690
C690
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
U2
U2
1
VDD
D+
SDATA
ALERT#
DÂTHERM#4GND
F75383M_MSOP8
SCLK
2
3
ADM1032ARMZ-2REEL_MSOP8
ADM1032ARMZ-2REEL_MSOP8
SMBus Address: 1001110X (b)
CLK_CPU_BCLK<20>
CLK_CPU_BCLK#<20>
8
7
6
5
+2.5VS
+1.8V
R542 510_0402_5%
R542 510_0402_5%
R543 510_0402_5%
R543 510_0402_5%
R544 300_0402_5%
R544 300_0402_5%
R545 300_0402_5%
R545 300_0402_5%
L124
L124
1 2
FCM2012CF-800T06_2P
FCM2012CF-800T06_2P
1
+
+
C681
C681
150U_B2_6.3VM
150U_B2_6.3VM
2
1 2
C687
C687
1 2
C688 3900P_0402_50V7KC688 3900P_0402_50V7K
12
12
12
12
EC_SMB_CK2 <15,29>
EC_SMB_DA2 <15,29>
+2.5VDDA
3300P_0402_50V7K
3300P_0402_50V7K
1
C682
C682
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+1.8V
R531 44.2_0402_1%R531 44.2_0402_1%
+1.2V_HT
R527 44.2_0402_1%R527 44.2_0402_1%
CPU_VCC_SENSE<39>
3900P_0402_50V7K
3900P_0402_50V7K
12
R537
R537
169_0402_1%
169_0402_1%
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
+1.8V
R551220_0402_5%@ R551220_0402_5%@
R552220_0402_5%@ R552220_0402_5%@
R550220_0402_5%@ R550220_0402_5%@
12
12
12
1
1
C684
C684
C683
C683
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
2
LDT_RST#
H_PWRGD
LDT_STOP#
R528
R528
1 2
1 2
Close to CPU within 1"
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
R553220_0402_5%@ R553220_0402_5%@
12
CPU_TDI
CPU_SIC
12
1K_0402_5%
1K_0402_5%
CPU_HTREF1
CPU_HTREF0
TP2TP2
TP3TP3
TP4TP4
CPU_THERMDC
CPU_THERMDA
U1D
U1D
A8
VDDA2
B8
VDDA1
AK6
RESET_L
AM2
PWROK
AM6
LDTSTOP_L
AN4
SIC
AN5
SID
V10
HT_REF1
V9
HT_REF0
E2
VDD_FB_H
E1
VDD_FB_L
AM9
VDDIO_FB_H
AK9
VDDIO_FB_L
A6
CLKIN_H
A7
CLKIN_L
AH8
DBRDY
AN8
TMS
AK8
TCK
AL8
TRST_L
AM8
TDI
A9
TEST25_H
B9
TEST25_L
A5
TEST19
B6
TEST18
AJ9
TEST13
H8
TEST9
J8
TEST17
C8
TEST16
D9
TEST15
H7
TEST14
AN3
TEST12
C6
TEST7
AH7
TEST6
AL6
THERMDC
AM5
THERMDA
AJ5
TEST3
AJ7
TEST2
M31
RSVD#M31
L32
RSVD#L32
M33
RSVD#M33
M32
RSVD#M32
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
W27
RSVD#W27
W26
RSVD#W26
AJ29
RSVD#AJ29
P26
RSVD#P26
M26
RSVD#M26
AH31
RSVD#AH31
AF27
RSVD#AF27
L625@
L625@
THERMTRIP_L
PROCHOT_L
CPU_PRESENT_L
MISC
MISC
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
RSVD#AB31
RSVD#AB30
RSVD#AK31
RSVD#AD31
RSVD#AD30
VID5
VID4
VID3
VID2
VID1
VID0
PSI_L
DBREQ_L
TDO
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD#L27
RSVD#B25
RSVD1
RSVD2
RSVD3
RSVD#E8
RSVD#G5
CPU_THERMTRIP#_R
AJ6
H_PROCHOT_R#
AN6
B2
C2
C1
D2
D1
D3
CPU_PRESENT#
AM3
E4
CPU_DBREQ#
AN9
AN7
CPU_TEST29_H_FBCLKOUT_P
E9
CPU_TEST29_L_FBCLKOUT_N
D10
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
AH6
AG8
AN11
F9
AM7
G11
H11
AJ8
CPU_TEST26_BURNIN#
AM4
D7
B5
L27
B25
G6
A10
B7
E8
G5
AB31
AB30
AK31
AD31
CPU_THERMTRIP#_R H_THERMTRIP#
AD30
+1.8V
CPU_VID5 <39>
CPU_VID4 <39>
CPU_VID3 <39>
CPU_VID2 <39>
CPU_VID1 <39>
CPU_VID0 <39>
PSI_L <39>CPU_VSS_SENSE<39>
R539
R539
220_0402_5%
220_0402_5%
TP5TP5
CPU_TEST21_SCANEN
+1.8V
12
R548
R548
300_0402_5%
300_0402_5%
12
R526
R526
300_0402_5%
300_0402_5%
12
R541
R541
80.6_0402_1%
80.6_0402_1%
1 2
TEST24
TEST22
TEST20
E
E
3 1
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
+1.8V
B
B
+1.8V
12
2
R546
R546
1K_0402_5%
1K_0402_5%
Q19
Q19
C
C
H_PROCHOT_R# <24,29>
CPU_VID1
CPU_PRESENT#
CPU_TEST26_BURNIN#
CPU_TEST21_SCANEN
TEST24
TEST22
TEST20
+3VALW
12
R549
R549
10K_0402_5%
10K_0402_5%
1 2
R530 300_0402_5%
R530 300_0402_5%
1 2
R532 1K_0402_5%
R532 1K_0402_5%
1 2
R533 300_0402_5%
R533 300_0402_5%
1 2
R534 300_0402_5%
R534 300_0402_5%
1 2
R535 300_0402_5%
R535 300_0402_5%
1 2
R536 300_0402_5%
R536 300_0402_5%
1 2
R538 300_0402_5%R538 300_0402_5%
+3VALW
12
R547
R547
1K_0402_5%@
1K_0402_5%@
B
B
2
Q20
Q20
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
E
E
3 1
C
C
@
@
H_THERMTRIP# <25>
+1.8V
MAINPWON <29,39>
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
+3VS
5
LDT_RST#
2
P
A A
5
4
HDT_RST#
B
4
Y
A
G
@ U3
@
3
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
1
U3
SB_PWRGD <11,25,29>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
1
C
C
C
of
of
of
643Friday, January 08, 2010
643Friday, January 08, 2010
643Friday, January 08, 2010
5
VDD(+CPU_CORE) decoupling.
+CPU_CORE
D D
1
+
+
C695
C695
330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
2
1
+
+
C692
C692
330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
2
1
+
+
C693
C693
330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
2
1
2
Near CPU Socket
+CPU_CORE
1
C696
C696
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE
1
C705
C705
0.22U_0603_16V4Z
C C
0.22U_0603_16V4Z
2
1
C697
C697
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C706
C706
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C698
C698
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE +CPU_CORE
1
C699
C699
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C707
C707
0.01U_0402_25V7K
0.01U_0402_25V7K
2
1
C700
C700
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C708
C708
180P_0402_50V8J
180P_0402_50V8J
2
VDDIO decoupling.
+1.8V
1
C709
C709
22U_0805_6.3V6M
22U_0805_6.3V6M
2
B B
+1.8V
1
C713
C713
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+1.8V +1.8V
1
C725
C725
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+1.8V
1
C731
A A
C731
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C710
C710
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C714
C714
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C726
C726
0.01U_0402_25V7K
0.01U_0402_25V7K
2
1
C732
C732
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+1.8V
1
C711
C711
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C715
C715
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
1
C727
C727
180P_0402_50V8J
180P_0402_50V8J
2
1
C733
C733
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C712
C712
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C716
C716
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C728
C728
180P_0402_50V8J
180P_0402_50V8J
2
1
C743
C743
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+
+
C694
C694
330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
1
C729
C729
180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C734
C734
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
2
4
1
C701
C701
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
2
1
C730
C730
180P_0402_50V8J
180P_0402_50V8J
2
C702
C702
22U_0805_6.3V6M
22U_0805_6.3V6M
+1.8V
+0.9V
1
2
+0.9V
1
2
1
C703
C703
22U_0805_6.3V6M
22U_0805_6.3V6M
2
U1F
U1F
Y29
VDDIO#Y29
U29
VDDIO#U29
R28
VDDIO#R28
P29
VDDIO#P29
W32
VDDIO#W32
W30
VDDIO#W30
W28
VDDIO#W28
U30
VDDIO#U30
N30
VDDIO#N30
U32
VDDIO#U32
R32
VDDIO#R32
R30
VDDIO#R30
N32
VDDIO#N32
U26
VDDIO#U26
Y26
VDDIO#Y26
M27
VDDIO#M27
AG32
VDDIO#AG32
AG30
VDDIO#AG30
AF28
VDDIO#AF28
AE30
VDDIO#AE30
AE26
VDDIO#AE26
AC32
VDDIO#AC32
AC30
VDDIO#AC30
AE32
VDDIO#AE32
AB28
VDDIO#AB28
AA30
VDDIO#AA30
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
L625@
L625@
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
C717
C717
4.7U_0805_10V4Z
4.7U_0805_10V4Z
Near CPU Right side.
C735
C735
4.7U_0805_10V4Z
4.7U_0805_10V4Z
Near CPU Left side.
1
2
1
2
1
C704
C704
22U_0805_6.3V6M
22U_0805_6.3V6M
2
POWER2
POWER2
C718
C718
4.7U_0805_10V4Z
4.7U_0805_10V4Z
C736
C736
4.7U_0805_10V4Z
4.7U_0805_10V4Z
3
+CPU_CORE +CPU_CORE
U1E
U1E
A3
VDDC#A3
A4
VDDC#A4
B3
VDDC#B3
B4
VDDC#B4
C3
VDDC#C3
C4
VDDC#C4
D4
VDDC#D4
D5
VDDC#D5
D6
VDDC#D6
E5
VDDC#E5
E6
VDDC#E6
E7
VDDC#E7
F5
VDDC#F5
F6
VDDC#F6
F7
VDDC#F7
F8
VDDC#F8
G8
VDDC#G8
G9
VDDC#G9
H9
VDDC#H9
J9
VDDC#J9
J10
VDDC#J10
J12
VDDC#J12
J14
VDDC#J14
J18
VDDC#J18
J20
VDDC#J20
J21
VDDC#J21
J23
VDDC#J23
K10
VDDC#K10
K12
VDDC#K12
K14
VDDC#K14
K18
VDDC#K18
K20
VDDC#K20
K21
VDDC#K21
K23
VDDC#K23
K25
VDDC#K25
L7
VDDC#L7
L9
VDDC#L9
L11
VDDC#L11
L13
VDDC#L13
M5
VDDC#M5
M10
VDDC#M10
M12
VDDC#M12
M25
VDDC#M25
N9
VDDC#N9
N11
VDDC#N11
N24
VDDC#N24
N25
VDDC#N25
P15
VDDC#P15
P18
VDDC#P18
P20
VDDC#P20
P24
VDDC#P24
P25
VDDC#P25
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
L625@
L625@
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
VTT decoupling.
1
C719
C719
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C737
C737
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C720
C720
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C744
C744
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C721
C721
1000P_0402_50V7K
1000P_0402_50V7K
2
1
C738
C738
1000P_0402_50V7K
1000P_0402_50V7K
2
VDDC#AA10
VDDC#AA12
VDDC#AA24
VDDC#AA25
VDDC#AB11
VDDC#AB13
VDDC#AC5
VDDC#AC10
VDDC#AC12
VDDC#AC24
VDDC#AC25
VDDC#AD9
VDDC#AD11
VDDC#AD12
VDDC#AD14
VDDC#AD18
VDDC#AD21
VDDC#AD25
VDDC#AE12
VDDC#AE14
VDDC#AE18
VDDC#AE21
VDDC#AE23
VDDC#V25
VDDC#V24
POWER1
POWER1
VDDC#Y19
VDDC#Y16
VDDC#Y14
VDDC#W20
VDDC#W18
VDDC#W15
VDDC#W5
VDDC#V19
VDDC#V16
VDDC#V14
VDDC#T20
VDDC#T18
VDDC#T15
VDDC#T10
VDDC#R19
VDDC#R16
VDDC#R14
VDDC#R5
AA10
AA12
AA24
AA25
AB11
AB13
AC5
AC10
AC12
AC24
AC25
AD9
AD11
AD12
AD14
AD18
AD21
AD25
AE12
AE14
AE18
AE21
AE23
V25
V24
Y19
Y16
Y14
W20
W18
W15
W5
V19
V16
V14
T20
T18
T15
T10
R19
R16
R14
R5
1
C722
C722
1000P_0402_50V7K
1000P_0402_50V7K
2
1
C739
C739
1000P_0402_50V7K
1000P_0402_50V7K
2
2
U1G
U1G
A32
AA1
AA2
AA4
AA9
AA11
AA22
AA23
AB10
AB12
AB21
AB22
AB23
AB24
AB25
AC11
AC1
AC2
AC4
AC8
AC9
AC13
AC21
AC22
AC23
AD10
AD13
AD16
AD20
AD22
AD23
AD24
AE1
AE2
AE4
AE7
AE10
AE11
AE13
AE16
AE20
AE22
AE24
AE25
AF7
AF8
AF9
AF26
AG1
AG2
AG4
AG6
AG7
AG27
AH5
AH14
AH20
AH23
AH25
AH28
1
C723
C723
180P_0402_50V8J
180P_0402_50V8J
2
1
C740
C740
180P_0402_50V8J
180P_0402_50V8J
2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
VSS54
VSS55
VSS56
VSS57
VSS58
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
VSS59
VSS60
L625@
L625@
1
C724
C724
180P_0402_50V8J
180P_0402_50V8J
2
1
C741
C741
180P_0402_50V8J
180P_0402_50V8J
2
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
GND1
GND1
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
G4
G2
G1
F23
F20
F14
E32
E30
D30
D29
D27
D25
D23
D21
D19
D17
D15
D13
D11
D8
C31
B33
B29
B27
B21
B19
B17
B15
B13
C10
AN32
AN2
AM33
AM27
AM23
AM19
AM17
AM15
AM13
AM11
AM1
AL31
AK29
AK27
AK25
AK23
AK21
AK19
AK17
AK15
AK13
AK11
AK7
AK5
AJ22
AJ19
AJ15
AJ4
AJ2
AJ1
+0.9V
1
U1H
U1H
G19
VSS121
G25
VSS123
G27
VSS124
G30
VSS125
H5
VSS126
H6
VSS127
H20
VSS128
H23
VSS129
H28
VSS130
J1
VSS131
J2
VSS132
J4
VSS133
J7
VSS134
J11
VSS135
J13
VSS136
J16
VSS137
J22
VSS138
J24
VSS139
J25
VSS140
J28
VSS141
J30
VSS142
J32
VSS143
K11
VSS144
K13
VSS145
K16
VSS146
A2
VSS147
K22
VSS148
K24
VSS149
K9
VSS150
L1
VSS151
L2
VSS152
L4
VSS153
L8
VSS154
L10
VSS155
L12
VSS156
L21
VSS157
L22
VSS158
L23
VSS159
L24
VSS160
L25
VSS161
L26
VSS162
L30
VSS163
M6
VSS164
M9
VSS165
M11
VSS166
M13
VSS167
M21
VSS168
M22
VSS169
M23
VSS170
M24
VSS171
N1
VSS172
N2
VSS173
N4
VSS174
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
N10
VSS175
N12
VSS176
N22
VSS177
N23
VSS178
P7
VSS179
TMZL625OAX5DY_BGA812
TMZL625OAX5DY_BGA812
P10
VSS180
P14
VSS181
P16
VSS182
P19
VSS183
L625@
L625@
Near Power Supply
1
C: Change to NBO CAP
+
+
C742
C742
150U_B2_6.3VM
150U_B2_6.3VM
2
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
GND2
GND2
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
R1
R2
R4
R8
R15
R18
R20
T9
T14
T16
T19
T24
T25
V15
V18
V20
U1
U2
U4
U7
U8
W1
W2
W4
W8
W14
W16
W19
Y7
Y10
Y15
Y18
Y20
Y24
Y25
F17
AB7
AG5
B23
B1
G7
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
1
C
C
C
of
of
of
743Friday, January 08, 2010
743Friday, January 08, 2010
743Friday, January 08, 2010
5
4
3
2
1
1
C747
C747
2
Issued Date
Issued Date
Issued Date
3
+1.8V+DIMM_VREF
12
R554
R554
1K_0402_1%
1K_0402_1%
12
R555
R555
1K_0402_1%
1K_0402_1%
DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_MA[0..15]
DDR_A_DQS#[0..7]
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA12
DDR_A_BS#2
DDR_CKE0_DIMMA
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_CS0_DIMMA#
DDR_A_MA5
DDR_A_MA8
DDR_A_MA9
DDR_A_BS#0
DDR_A_MA10
DDR_A_MA1
DDR_A_MA3
DDR_A_ODT1
DDR_CS1_DIMMA#
DDR_A_CAS#
DDR_A_WE#
DDR_A_RAS#
DDR_A_ODT0
DDR_A_MA13
DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_MA14
Compal Secret Data
Compal Secret Data
2005/10/11 2009/06/11
2005/10/11 2009/06/11
2005/10/11 2009/06/11
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
+0.9V
RP1
RP1
18
1 2
C745 0.1U_0402_16V4ZC745 0.1U_0402_16V4Z
27
1 2
36
C748 0.1U_0402_16V4ZC748 0.1U_0402_16V4Z
45
RP2
RP2
RP3
RP3
RP4
RP4
RP5
RP5
RP6
RP6
RP7
RP7
RP8
RP8
1 2
18
C750 0.1U_0402_16V4ZC750 0.1U_0402_16V4Z
27
1 2
36
C749 0.1U_0402_16V4ZC749 0.1U_0402_16V4Z
45
1 2
18
C751 0.1U_0402_16V4ZC751 0.1U_0402_16V4Z
27
36
1 2
C752 0.1U_0402_16V4ZC752 0.1U_0402_16V4Z
45
18
1 2
C754 0.1U_0402_16V4ZC754 0.1U_0402_16V4Z
27
1 2
36
C753 0.1U_0402_16V4ZC753 0.1U_0402_16V4Z
45
1 2
18
C755 0.1U_0402_16V4ZC755 0.1U_0402_16V4Z
27
36
1 2
C756 0.1U_0402_16V4ZC756 0.1U_0402_16V4Z
45
18
1 2
C758 0.1U_0402_16V4ZC758 0.1U_0402_16V4Z
27
36
1 2
C757 0.1U_0402_16V4ZC757 0.1U_0402_16V4Z
45
1 2
18
C759 0.1U_0402_16V4ZC759 0.1U_0402_16V4Z
27
1 2
36
C760 0.1U_0402_16V4ZC760 0.1U_0402_16V4Z
45
1 2
18
C761 0.1U_0402_16V4ZC761 0.1U_0402_16V4Z
27
1 2
36
C762 0.1U_0402_16V4ZC762 0.1U_0402_16V4Z
45
+1.8V
COMPAL Electronics，Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
1
C
C
C
of
of
of
843Friday, January 08, 2010
843Friday, January 08, 2010
843Friday, January 08, 2010
+1.8V
0.1U_0402_16V4Z
JDIMM1
JDIMM1
1
VREF
3
DDR_A_D0
D D
C C
DDR_CKE0_DIMMA<5>
DDR_A_BS#2<5>
DDR_A_BS#0<5>
DDR_A_WE#<5>
DDR_A_CAS#<5>
DDR_CS1_DIMMA#<5>
DDR_A_ODT1<5>
B B
A A
SB_CK_SDAT<9,20,25>
SB_CK_SCLK<9,20,25>
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18 DDR_A_D22
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_A_ODT1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43 DDR_A_D47
DDR_A_D48
DDR_A_D49 DDR_A_D53
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51 DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
SB_CK_SDAT
SB_CK_SCLK
+3VS
1
C763
C763
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
5
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
203
GND
P-TWO_A5652C-A0G16
P-TWO_A5652C-A0G16
ME@
ME@
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
JAWD0 used
+1.8V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
4
DDR_A_D4
DDR_A_D5
DDR_A_DM0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_DM1
DDR_A_CLK1
DDR_A_CLK#1
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6DDR_A_MA8
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_ODT0
DDR_A_MA13
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D52
DDR_A_CLK2
DDR_A_CLK#2
DDR_A_DM6
DDR_A_D54
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R556 10K_0402_5%R556 10K_0402_5%
1 2
R557 10K_0402_5%R557 10K_0402_5%
1 2
DDR_A_CLK1 <5>
DDR_A_CLK#1 <5>
DDR_CKE1_DIMMA <5>
DDR_A_BS#1 <5>
DDR_A_RAS# <5>
DDR_CS0_DIMMA# <5>
DDR_A_ODT0 <5>
DDR_A_CLK2 <5>
DDR_A_CLK#2 <5>
0.1U_0402_16V4Z
C746
C746
1
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
DDR_A_D[0..63]<5>
DDR_A_DM[0..7]<5>
DDR_A_DQS[0..7]<5>
DDR_A_MA[0..15]<5>
DDR_A_DQS#[0..7]<5>
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+3VS
1
2
DDR_B_D[0..63]<5>
DDR_B_DM[0..7]<5>
DDR_B_DQS[0..7]<5>
DDR_B_MA[0..15]<5>
DDR_B_DQS#[0..7]<5>
+DIMM_VREF
C766
C766
3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C767
C767
1
2
DDR_B_D[0..63]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]
Compal Secret Data
Compal Secret Data
2005/10/11 2009/06/11
2005/10/11 2009/06/11
2005/10/11 2009/06/11
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
DDR_B_MA4
DDR_B_MA2
DDR_B_BS#1
DDR_B_MA0
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_BS#2
DDR_CKE0_DIMMB
DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA12
DDR_B_BS#0
DDR_B_MA10
DDR_B_MA1
DDR_B_MA3
DDR_B_ODT1
DDR_CS1_DIMMB#
DDR_B_CAS#
DDR_B_WE#
DDR_CS0_DIMMB#
DDR_B_RAS#
DDR_B_MA13
DDR_B_ODT0
DDR_B_MA14
DDR_B_MA15
DDR_CKE1_DIMMB
RP9
RP9
47_0804_8P4R_5%
47_0804_8P4R_5%
RP10
RP10
47_0804_8P4R_5%
47_0804_8P4R_5%
RP11
RP11
47_0804_8P4R_5%
47_0804_8P4R_5%
RP12
RP12
47_0804_8P4R_5%
47_0804_8P4R_5%
RP13
RP13
47_0804_8P4R_5%
47_0804_8P4R_5%
RP14
RP14
47_0804_8P4R_5%
47_0804_8P4R_5%
RP15
RP15
47_0804_8P4R_5%
47_0804_8P4R_5%
RP16
RP16
47_0804_8P4R_5%
47_0804_8P4R_5%
+0.9V
18
C764 0.1U_0402_16V4ZC764 0.1U_0402_16V4Z
27
36
1 2
C765 0.1U_0402_16V4ZC765 0.1U_0402_16V4Z
45
18
C769 0.1U_0402_16V4ZC769 0.1U_0402_16V4Z
27
1 2
36
C768 0.1U_0402_16V4ZC768 0.1U_0402_16V4Z
45
18
C770 0.1U_0402_16V4ZC770 0.1U_0402_16V4Z
27
1 2
36
C771 0.1U_0402_16V4ZC771 0.1U_0402_16V4Z
45
18
C772 0.1U_0402_16V4ZC772 0.1U_0402_16V4Z
27
1 2
36
C773 0.1U_0402_16V4ZC773 0.1U_0402_16V4Z
45
18
C774 0.1U_0402_16V4ZC774 0.1U_0402_16V4Z
27
36
1 2
C775 0.1U_0402_16V4ZC775 0.1U_0402_16V4Z
45
18
C776 0.1U_0402_16V4ZC776 0.1U_0402_16V4Z
27
36
1 2
C777 0.1U_0402_16V4ZC777 0.1U_0402_16V4Z
45
18
C778 0.1U_0402_16V4ZC778 0.1U_0402_16V4Z
27
1 2
36
C779 0.1U_0402_16V4ZC779 0.1U_0402_16V4Z
45
18
C780 0.1U_0402_16V4ZC780 0.1U_0402_16V4Z
27
36
1 2
C781 0.1U_0402_16V4ZC781 0.1U_0402_16V4Z
45
12
12
12
12
12
12
12
12
+1.8V
COMPAL Electronics，Inc
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
1
C
C
C
of
of
of
943Friday, January 08, 2010
943Friday, January 08, 2010
943Friday, January 08, 2010
+1.8V
JDIMM2
JDIMM2
1
VREF
3
DDR_B_D0
DDR_B_D1
D D
C C
DDR_CKE0_DIMMB<5>
DDR_B_BS#2<5>
DDR_B_BS#0<5>
DDR_B_WE#<5>
DDR_B_CAS#<5>
DDR_CS1_DIMMB#<5>
DDR_B_ODT1<5>
B B
SB_CK_SDAT<8,20,25>
A A
SB_CK_SCLK<8,20,25>
5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18 DDR_B_D22
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
DDR_CKE0_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
DDR_CS1_DIMMB#
DDR_B_ODT1
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43 DDR_B_D47
DDR_B_D48
DDR_B_D49 DDR_B_D53
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51 DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
SB_CK_SDAT
SB_CK_SCLK
+3VS
1
C782
C782
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
203
GND
FOX_AS0A426-M2RN-7F
FOX_AS0A426-M2RN-7F
ME@
ME@
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
KAV10 used
4
+1.8V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
R558 10K_0402_5%R558 10K_0402_5%
198
R559 10K_0402_5%R559 10K_0402_5%
200
204
DDR_B_D4
DDR_B_D5
DDR_B_DM0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
DDR_B_CLK1
DDR_B_CLK#1
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE1_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6DDR_B_MA8
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#
DDR_B_ODT0
DDR_B_MA13
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D52
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_DM6
DDR_B_D54
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
1 2
1 2
DDR_B_CLK1 <5>
DDR_B_CLK#1 <5>
DDR_CKE1_DIMMB <5>
DDR_B_BS#1 <5>
DDR_B_RAS# <5>
DDR_CS0_DIMMB# <5>
DDR_B_ODT0 <5>
DDR_B_CLK2 <5>
DDR_B_CLK#2 <5>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
E
PCIE_GTX_C_MRX_P[0..15]<14>
PCIE_GTX_C_MRX_N[0..15]<14>
1 1
2 2
PCIE_PTX_C_IRX_P1<29>
PCIE_PTX_C_IRX_N1<29>
PCIE_PTX_C_IRX_P2<29>
PCIE_PTX_C_IRX_N2<29>
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
SB_RX0P<24>
SB_RX0N<24>
SB_RX1P<24>
SB_RX1N<24>
SB_RX2P<24>
SB_RX2N<24>
SB_RX3P<24>
SB_RX3N<24>
U4B
U4B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS780M_FCBGA528
RS780M_FCBGA528
PART 2 OF 6
PART 2 OF 6
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCIE_MTX_GRX_P0
A5
PCIE_MTX_GRX_N0
B5
PCIE_MTX_GRX_P1
A4
PCIE_MTX_GRX_N1
B4
PCIE_MTX_GRX_P2
C3
PCIE_MTX_GRX_N2
B2
PCIE_MTX_GRX_P3
D1
PCIE_MTX_GRX_N3
D2
E2
E1
F4
F3
F1
F2
H4
H3
PCIE_MTX_GRX_P8
H1
PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_N8
H2
PCIE_MTX_GRX_P9
J2
PCIE_MTX_GRX_N9
J1
PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_P10
K4
PCIE_MTX_GRX_N10
K3
PCIE_MTX_GRX_P11
K1
PCIE_MTX_GRX_N11
K2
PCIE_MTX_GRX_P12
M4
PCIE_MTX_GRX_N12
M3
PCIE_MTX_GRX_P13
M1
PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N13
M2
PCIE_MTX_GRX_P14
N2
PCIE_MTX_GRX_N14
N1
PCIE_MTX_GRX_P15
P1
PCIE_MTX_GRX_N15 PCIE_MTX_C_GRX_N15
P2
AC1
AC2
PCIE_ITX_PRX_P1
AB4
PCIE_ITX_PRX_N1
AB3
PCIE_ITX_PRX_P2
AA2
PCIE_ITX_PRX_N2
AA1
Y1
Y2
Y4
Y3
V1
V2
SB_TX0P_C
AD7
SB_TX0N_C
AE7
SB_TX1P_C
AE6
SB_TX1N_C
AD6
SB_TX2P_C
AB6
SB_TX2N_C
AC6
SB_TX3P_C
AD5
SB_TX3N_C
AE5
AC8
AB8
R560 1.27K_0402_1%R560 1.27K_0402_1%
R561 2K_0402_1%R561 2K_0402_1%
RS780M Display Port Support (muxed on GFX)
DP0
3 3
4 4
DP1
GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
C800 0.1U_0402_16V7KVGA@C800 0.1U_0402_16V7KVGA@
1 2
C802 0.1U_0402_16V7KVGA@C802 0.1U_0402_16V7KVGA@
1 2
C804 0.1U_0402_16V7KVGA@C804 0.1U_0402_16V7KVGA@
1 2
C806 0.1U_0402_16V7KVGA@C806 0.1U_0402_16V7KVGA@
1 2
C808 0.1U_0402_16V7KVGA@C808 0.1U_0402_16V7KVGA@
1 2
C810 0.1U_0402_16V7KVGA@C810 0.1U_0402_16V7KVGA@
1 2
C812 0.1U_0402_16V7KVGA@C812 0.1U_0402_16V7KVGA@
1 2
C814 0.1U_0402_16V7KVGA@C814 0.1U_0402_16V7KVGA@
1 2
C815 0.1U_0402_16V7KC815 0.1U_0402_16V7K
1 2
C816 0.1U_0402_16V7KC816 0.1U_0402_16V7K
1 2
C817 0.1U_0402_16V7KC817 0.1U_0402_16V7K
1 2
C818 0.1U_0402_16V7KC818 0.1U_0402_16V7K
1 2
C819 0.1U_0402_16V7KC819 0.1U_0402_16V7K
1 2
C820 0.1U_0402_16V7KC820 0.1U_0402_16V7K
1 2
C821 0.1U_0402_16V7KC821 0.1U_0402_16V7K
1 2
C822 0.1U_0402_16V7KC822 0.1U_0402_16V7K
1 2
C823 0.1U_0402_16V7KC823 0.1U_0402_16V7K
1 2
C824 0.1U_0402_16V7KC824 0.1U_0402_16V7K
1 2
C825 0.1U_0402_16V7KC825 0.1U_0402_16V7K
1 2
C826 0.1U_0402_16V7KC826 0.1U_0402_16V7K
1 2
1 2
1 2
C799 0.1U_0402_16V7KVGA@C799 0.1U_0402_16V7KVGA@
C801 0.1U_0402_16V7KVGA@C801 0.1U_0402_16V7KVGA@
C803 0.1U_0402_16V7KVGA@C803 0.1U_0402_16V7KVGA@
C805 0.1U_0402_16V7KVGA@C805 0.1U_0402_16V7KVGA@
C807 0.1U_0402_16V7KVGA@C807 0.1U_0402_16V7KVGA@
C809 0.1U_0402_16V7KVGA@C809 0.1U_0402_16V7KVGA@
C811 0.1U_0402_16V7KVGA@C811 0.1U_0402_16V7KVGA@
C813 0.1U_0402_16V7KVGA@C813 0.1U_0402_16V7KVGA@
+1.1VS
PCIE_MTX_C_GRX_P[0..15] <14>
PCIE_MTX_C_GRX_N[0..15] <14>
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PCIE_ITX_C_PRX_P1 <29>
PCIE_ITX_C_PRX_N1 <29>
PCIE_ITX_C_PRX_P2 <29>
PCIE_ITX_C_PRX_N2 <29>
SB_TX0P <24>
SB_TX0N <24>
SB_TX1P <24>
SB_TX1N <24>
SB_TX2P <24>
SB_TX2N <24>
SB_TX3P <24>
SB_TX3N <24>
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
WLAN
GLAN
H_CLKOP0<4>
H_CLKON0<4>
H_CLKOP1<4>
H_CLKON1<4>
H_CTLOP0<4>
H_CTLON0<4>
H_CTLOP1<4>
H_CTLON1<4>
R562
R562
1 2
301_0402_1%
0718 Place within 1"
layout 1:2
301_0402_1%
PCIE_MTX_GRX_N[0..3]
PCIE_MTX_GRX_P[0..3]
H_CADOP[0..15]<4>
H_CADON[0..15]<4> H_CADIN[0..15] <4>
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
H_CTLOP0
H_CTLON0
H_CTLOP1 H_CTLIP1
H_CTLON1
H_CADON[0..15]
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
M22
M23
R21
R20
C23
A24
PCIE_MTX_GRX_N[0..3] <22>
PCIE_MTX_GRX_P[0..3] <22>
U4A
U4A
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
RS780M_FCBGA528
RS780M_FCBGA528
H_CADIP[0..15]H_CADOP[0..15]
H_CADIN[0..15]
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
H_CADIP[0..15] <4>
H_CADIP0
D24
H_CADIN0
D25
H_CADIP1
E24
H_CADIN1
E25
H_CADIP2
F24
H_CADIN2
F25
H_CADIP3
F23
H_CADIN3
F22
H_CADIP4
H23
H_CADIN4
H22
H_CADIP5
J25
H_CADIN5
J24
H_CADIP6
K24
H_CADIN6
K25
H_CADIP7
K23
H_CADIN7
K22
H_CADIP8
F21
H_CADIN8
G21
H_CADIP9
G20
H_CADIN9
H21
H_CADIP10
J20
H_CADIN10
J21
H_CADIP11
J18
H_CADIN11
K17
H_CADIP12
L19
H_CADIN12
J19
H_CADIP13
M19
H_CADIN13
L18
H_CADIP14
M21
H_CADIN14
P21
H_CADIP15
P18
H_CADIN15
M18
H24
H25
L21
L20
H_CTLIP0
M24
H_CTLIN0
M25
P19
H_CTLIN1
R18
B24
B25
0718 Place within 1"
layout 1:2
301_0402_1%
301_0402_1%
SA00002DR30 S IC 216-0674026 A13 RS780MN FCBGA 0FA
H_CLKIP0 <4>
H_CLKIN0 <4>
H_CLKIP1 <4>
H_CLKIN1 <4>
H_CTLIP0 <4>
H_CTLIN0 <4>
H_CTLIP1 <4>
H_CTLIN1 <4>
R563
R563
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
E
C
C
C
of
of
of
10 43Friday, January 08, 2010
10 43Friday, January 08, 2010
10 43Friday, January 08, 2010
A
+1.1VS
1 2
MBK2012221YZF 0805
MBK2012221YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1 1
1 2
MBK2012221YZF 0805
MBK2012221YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+1.8VS
1 2
MBK2012221YZF 0805
MBK2012221YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
+1.8VS
1 2
MBK2012221YZF 0805
MBK2012221YZF 0805
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2 2
CLK_NB_14.318M
12
R571
R571
100_0402_5%
100_0402_5%
@
@
3 3
1
C842
C842
100P_0402_25V8K
100P_0402_25V8K
2
@
@
Mode
PX mode High
4 4
DIS Only High High
PLLVDD=65mA
L126
L126
L128
L128
L130
L130
L132
L132
+NB_PLLVDD
1
C828
C828
C831
C831
1
2
2
PLLVDD18=20mA
+NB_HTPVDD+1.8VS
1
1
2
2
VDDA18HTPLL=20mA
+VDDA18HTPLL
1
1
C834
C834
2
2
VDDA18PCIEPLL=0.12A
+VDDA18PCIEPLL
1
1
C838
C838
2
2
11/16 update
R665
R665
4.7K_0402_5%
4.7K_0402_5%
VGA@
GMCH_HDMI_DATA_R2
VGA@
PX_EN<24>
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
PX_EN
GMCH_HDMI_DATA_R2
X(Don't Care)
LOWIGP Only
ALLOW_LDTSTOP<24>
A
C829
C829
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C832
C832
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C835
C835
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C839
C839
1U_0402_6.3V4Z
1U_0402_6.3V4Z
PLT_RST#<13,14,24,29>
NB_PWRGD<25>
+1.8VS
R568 300_0402_5%R568 300_0402_5%
1 2
+1.1VS
R569
R569
4.7K_0402_5%
4.7K_0402_5%
+3VS
R575 4.7K_0402_5%@R575 4.7K_0402_5%@
1 2
R576 4.7K_0402_5%
R576 4.7K_0402_5%
1 2
@
@
+3VS
12
5
U27
U27
2
P
B
4
Y
1
A
G
3
VGA@
VGA@
High/LOW
+1.8VS
+1.8VS
FBM-L11-201209-300LMA30T_0805
FBM-L11-201209-300LMA30T_0805
1 2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
11/26 update
+1.8VS
U47
U47
5
NC7SZ08P5X_NL_SC70-5
NB_PWRGD
SB_PWRGD<6,25,29>
1 2
R570
R570
4.7K_0402_5%
4.7K_0402_5%
12
NC7SZ08P5X_NL_SC70-5
2
P
B
1
A
G
3
11/26 update
DDC2_DATA DDC2_DATA
+3VS
12
R590
R590
4.7K_0402_5%
4.7K_0402_5%
VGA@
VGA@
DP_SELECT <21,23>
+1.8VS
12
R586
R586
1K_0402_5%
1K_0402_5%
R589 0_0402_5%R589 0_0402_5%
1 2
B
For RS780M A13
RED: Connected to GND through two separate 140ohm 1% resistor
AVDD=0.11A
L125
L125
1 2
+AVDD2
1
2
GMCH_CRT_R<23>
GMCH_CRT_G<23>
GMCH_CRT_B<23>
R567
R567
715_0402_1%
715_0402_1%
+NB_PLLVDD
+NB_HTPVDD
+VDDA18HTPLL
+VDDA18PCIEPLL
NB_RESET#
NB_PWRGD_R
CLK_NBHT<20>
CLK_NBHT#<20>
POWER_SEL
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
+AVDD1
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
CRT_DDC_CLK
CRT_DDC_DATA
1 2
+NB_PLLVDD
+NB_HTPVDD
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
CLK_NB_14.318M
DDC2_CLKDDC2_CLK
GMCH_HDMI_DATA_R2
GMCH_HDMI_CLK_R1
GMCH_HDMI_DATA_R1
AUX_CAL<13>
Strap pin
1
2
DAC_RSET
C827
C827
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
U4C
U4C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N(NC)
A8
DDC_CLK0/AUX0P(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS780M_FCBGA528
RS780M_FCBGA528
1 2
R564 140_0402_1%R564 140_0402_1%
1 2
R565 150_0402_1%R565 150_0402_1%
1 2
R566 150_0402_1%R566 150_0402_1%
+3VS
FBM-L11-201209-300LMA30T_0805
FBM-L11-201209-300LMA30T_0805
AVDDDI=20mA
L127
L127
1 2
FBM-L11-201209-300LMA30T_0805
FBM-L11-201209-300LMA30T_0805
AVDDQ=4mA
L129
L129
C833
C833
4
Y
R974 0_0402_5%R974 0_0402_5%
1 2
1 2
R975 0_0402_5%@R975 0_0402_5%@
POWER_SEL<36>
C830
C830
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+AVDDQ
1
2
GMCH_CRT_HSYNC<13,23>
GMCH_CRT_VSYNC<13,23>
CRT_DDC_CLK<23,29>
CRT_DDC_DATA<23,29>
CLK_NB_14.318M<20>
CLK_NBGFX<20>
CLK_NBGFX#<20>
CLK_SBLINK_BCLK<20>
CLK_SBLINK_BCLK#<20>
DDC2_CLK<21,29>
DDC2_DATA<21,29>
POWER_SEL
HIGH 1.0V
1.1VLOW
NB_ALLOW_LDTSTOP
B
GMCH_HDMI_CLK<22>
GMCH_HDMI_DATA<22>
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
GMCH_HDMI_CLK
GMCH_HDMI_DATA GMCH_HDMI_DATA_R1
LDT_STOP#<6,24>
Issued Date
Issued Date
Issued Date
C
HPD(NC)
TESTMODE
Deciphered Date
Deciphered Date
Deciphered Date
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
4.7K_0402_5%
4.7K_0402_5%
D9
D10
D12
AE8
AD8
D13
PART 3 OF 6
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
R582 0_0402_5%UMA@R582 0_0402_5%UMA@
1 2
1 2
R583 0_0402_5%UMA@R583 0_0402_5%UMA@
0_0402_5%
0_0402_5%
1 2
R588
R588
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
C
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
SUS_STAT#(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
GMCH_HDMI_CLK_R1
NB_LDTSTOP#
Compal Secret Data
Compal Secret Data
Compal Secret Data
+VDDLTP18
+VDDLT18
12
R572
R572
1 2
R577 0_0402_5%R577 0_0402_5%
1 2
R579
R579
1.8K_0402_5%
1.8K_0402_5%
D
GMCH_TXOUT0+ <21>
GMCH_TXOUT0- <21>
GMCH_TXOUT1+ <21>
GMCH_TXOUT1- <21>
GMCH_TXOUT2+ <21>
GMCH_TXOUT2- <21>
GMCH_TXCLK+ <21>
GMCH_TXCLK- <21>
R573
R573
1 2
1.27K_0402_1%
1.27K_0402_1%
R639
R639
1 2
UMA@
UMA@
0_0402_5%
0_0402_5%
D
UMA_ENVDD
UMA_DPST
UMA_ENBKL
R574
R574
1 2
1.27K_0402_1%
1.27K_0402_1%
HDMI_DET <15,29>
SUS_STAT# <25>
SUS_STAT_R# <13>
UMA_ENVDD
UMA_DPST
UMA_ENBKL
E
VDDLTP18=15mA
+VDDLTP18
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDLT18=0.3A
+VDDLT18
C840
C840
0.1U_0402_16V4Z
0.1U_0402_16V4Z
UMA_ENVDD <21>
UMA_ENBKL <21>
C836
C836
1
1
2
2
1
1
2
2
L131
L131
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
C837
C837
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
L133
L133
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
C841
C841
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+1.8VS
+1.8VS
Strap pin
R581 0_0402_5%
R581 0_0402_5%
1 2
UMA@
UMA@
1 2
R584 0_0402_5%@R584 0_0402_5%@
R587 0_0402_5%
R587 0_0402_5%
1 2
UMA@
UMA@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
ENVDD <21,29>
DPST_PWM <29>
ENBKL <21,29>
E
of
of
of
11 43Friday, January 08, 2010
11 43Friday, January 08, 2010
11 43Friday, January 08, 2010
C
C
C
A
VDDHTRX+VDDHT=0.68A
0.1U_0402_16V4Z
L134
+1.1VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1 1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L137
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
FOR Version A11 pop 1.35VS A12
use 1.2V_HT
2 2
L137
+1.8VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L134
L136
L136
12
VDDA18PCIE=0.7A
L140
L140
12
C877
C877
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
12
1
C845
C845
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
1
C853
C853
C843
C843
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
VDDHTTX=0.68A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C858
C858
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C868
C868
2
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+1.8VS
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C846
C846
C859
C859
C869
C869
1
2
C881
C881
1
1
C847
C847
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C854
C854
C844
C844
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C860
C860
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C878
C878
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C848
C848
2
1
2
1
C861
C861
C862
C862
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C870
C870
C872
C872
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VDD18=10mA
+VDDHTRX
+VDDHTTX
1
2
+VDDA18PCIE
1
2
+VDDHT
B
U4E
U4E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDD18_1
G9
VDD18_2
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS780M_FCBGA528
RS780M_FCBGA528
PART 5/6
PART 5/6
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
POWER
POWER
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
C
VDDPCIE=1.1A
+1.1VS
1
C8630.1U_0402_16V4Z C8630.1U_0402_16V4Z
2
VDD33=60mA
C882
C882
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C849 10U_0603_6.3V6MC849 10U_0603_6.3V6M
C850 10U_0603_6.3V6MC850 10U_0603_6.3V6M
C851 4.7U_0805_10V4ZC851 4.7U_0805_10V4Z
C852 1U_0402_6.3V4ZC852 1U_0402_6.3V4Z
C855 1U_0402_6.3V4ZC855 1U_0402_6.3V4Z
C856 0.1U_0402_16V4ZC856 0.1U_0402_16V4Z
C857 0.1U_0402_16V4ZC857 0.1U_0402_16V4Z
VDDC=7.6A
1
C8640.1U_0402_16V4Z C8640.1U_0402_16V4Z
2
1
2
1
1
1
1
C8740.1U_0402_16V4Z C8740.1U_0402_16V4Z
C8790.1U_0402_16V4Z C8790.1U_0402_16V4Z
C8650.1U_0402_16V4Z C8650.1U_0402_16V4Z
C8730.1U_0402_16V4Z C8730.1U_0402_16V4Z
2
2
2
2
1
C883
C883
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1
C8660.1U_0402_16V4Z C8660.1U_0402_16V4Z
2
D
U4F
U4F
A25
VSSAHT1
D23
VSSAHT2
+1.1VS
+NB_CORE
C871 330U_D2E_2.5VM_R9M+C871 330U_D2E_2.5VM_R9M
1
1
C8750.1U_0402_16V4Z C8750.1U_0402_16V4Z
C8800.1U_0402_16V4Z C8800.1U_0402_16V4Z
2
2
+3VS
1
1
1
C87610U_0603_6.3V6M C87610U_0603_6.3V6M
C86710U_0603_6.3V6M C86710U_0603_6.3V6M
+
2
2
2
E22
VSSAHT3
G22
VSSAHT4
G24
VSSAHT5
G25
VSSAHT6
H19
VSSAHT7
J22
VSSAHT8
L17
VSSAHT9
L22
VSSAHT10
L24
VSSAHT11
L25
VSSAHT12
M20
VSSAHT13
N22
VSSAHT14
P20
VSSAHT15
R19
VSSAHT16
R22
VSSAHT17
R24
VSSAHT18
R25
VSSAHT19
H20
VSSAHT20
U22
VSSAHT21
V19
VSSAHT22
W22
VSSAHT23
W24
VSSAHT24
W25
VSSAHT25
Y21
VSSAHT26
AD25
VSSAHT27
L12
VSS11
M14
VSS12
N13
VSS13
P12
VSS14
P15
VSS15
R11
VSS16
R14
VSS17
T12
VSS18
U14
VSS19
U11
VSS20
U15
VSS21
V12
VSS22
W11
VSS23
W15
VSS24
AC12
VSS25
AA14
VSS26
Y18
VSS27
AB11
VSS28
AB15
VSS29
AB17
VSS30
AB19
VSS31
AE20
VSS32
AB21
VSS33
K11
VSS34
RS780M_FCBGA528
RS780M_FCBGA528
PART 6/6
PART 6/6
GROUND
GROUND
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
E
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
E
C
C
C
of
of
of
12 43Friday, January 08, 2010
12 43Friday, January 08, 2010
12 43Friday, January 08, 2010
A
B
C
D
E
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO. (VSYNC)
1 : Disable (RS780)
0 : Enable (Rs780)
1 1
GMCH_CRT_VSYNC<11,23>
12
R592 3K_0402_5%R592 3K_0402_5%
12
R593 3K_0402_5%@R593 3K_0402_5%@
+3VS
DFT_GPIO1: LOAD_EEPROM_STRAPS
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
AUX_CAL<11>
RS780 DFT_GPIO1
SUS_STAT_R#<11> PLT_RST# <11,14,24,29>
2 2
1 2
R594 150_0402_1%@ R594 150_0402_1%@
D1
CH751H-40_SC76@D1CH751H-40_SC76@
2 1
R595 3K_0402_5%@R595 3K_0402_5%@
12
RS780 use HSYNC to enable SIDE PORT
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
For E-Machine
disable side port
0. Enable (RS780)
1 : Disable(RS780)
RS780 use HSYNC to enable SIDE PORT
R985
R985
12
15mA
12
GMCH_CRT_HSYNC<11,23>
U4D
U4D
PAR 4 OF 6
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
MEM_CKP(NC)
MEM_CKN(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
AB12
AE16
3 3
4 4
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
AD16
AE17
AD17
W12
Y12
AD18
AB13
AB18
V14
V15
W14
AE12
AD12
RS780M_FCBGA528
RS780M_FCBGA528
+1.8VS=W/S=20/10mil For Memory PLL power
+1.1VS=W/S=20/10mil For Memory PLL power
26mA
R596 3K_0402_5%R596 3K_0402_5%
0_0603_5%
0_0603_5%
+1.1VS
+3VS
12/2 update
R984
R984
0_0603_5%
0_0603_5%
+1.8VS
12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
E
C
C
C
of
of
of
13 43Friday, January 08, 2010
13 43Friday, January 08, 2010
13 43Friday, January 08, 2010
5
U5A
U5A
4
3
2
PCIE_GTX_C_MRX_P[0..15]<10>
PCIE_GTX_C_MRX_N[0..15]<10>
PCIE_MTX_C_GRX_P[0..15]<10>
PCIE_MTX_C_GRX_N[0..15]<10>
1
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_N15
D D
C C
B B
CLK_PCIE_VGA<20>
CLK_PCIE_VGA#<20>
A A
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
CLK_PCIE_VGA
CLK_PCIE_VGA#
PARK@
PARK@
R601 10K_0402_5%
R601 10K_0402_5%
5
12
MXM_RST#
AF30
PCIE_RX0P
AE31
PCIE_RX0N
AE29
PCIE_RX1P
AD28
PCIE_RX1N
AD30
PCIE_RX2P
AC31
PCIE_RX2N
AC29
PCIE_RX3P
AB28
PCIE_RX3N
AB30
PCIE_RX4P
AA31
PCIE_RX4N
AA29
PCIE_RX5P
Y28
PCIE_RX5N
Y30
PCIE_RX6P
W31
PCIE_RX6N
W29
PCIE_RX7P
V28
PCIE_RX7N
V30
PCIE_RX8P
U31
PCIE_RX8N
U29
PCIE_RX9P
T28
PCIE_RX9N
T30
PCIE_RX10P
R31
PCIE_RX10N
R29
PCIE_RX11P
P28
PCIE_RX11N
P30
PCIE_RX12P
N31
PCIE_RX12N
N29
PCIE_RX13P
M28
PCIE_RX13N
M30
PCIE_RX14P
L31
PCIE_RX14N
L29
PCIE_RX15P
K30
PCIE_RX15N
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
N10
PWRGOOD
AL27
PERSTB
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
VGA@
VGA@
CLOCK
CLOCK
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
4
PEG_NRX_C_GTX_N15 PCIE_GTX_C_MRX_N15
AH30
PEG_NRX_C_GTX_P15 PCIE_GTX_C_MRX_P15
AG31
AG29
PEG_NRX_C_GTX_P14 PCIE_GTX_C_MRX_P14
AF28
PEG_NRX_C_GTX_N13 PCIE_GTX_C_MRX_N13
AF27
AF26
AD27
AD26
PEG_NRX_C_GTX_N11
AC25
AB25
PEG_NRX_C_GTX_N10
Y23
Y24
PEG_NRX_C_GTX_N9
AB27
PEG_NRX_C_GTX_P9
AB26
PEG_NRX_C_GTX_N8
Y27
PEG_NRX_C_GTX_P8
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
Y22
AA22
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
1 2
Issued Date
Issued Date
Issued Date
C884 0.1U_0402_16V7K
C884 0.1U_0402_16V7K
C885 0.1U_0402_16V7K
C885 0.1U_0402_16V7K
C886 0.1U_0402_16V7K
C886 0.1U_0402_16V7K
C887 0.1U_0402_16V7K
C887 0.1U_0402_16V7K
C888 0.1U_0402_16V7K
C888 0.1U_0402_16V7K
C889 0.1U_0402_16V7K
C889 0.1U_0402_16V7K
C890 0.1U_0402_16V7K
C890 0.1U_0402_16V7K
C891 0.1U_0402_16V7K
C891 0.1U_0402_16V7K
C893 0.1U_0402_16V7K
C893 0.1U_0402_16V7K
C894 0.1U_0402_16V7K
C894 0.1U_0402_16V7K
C892 0.1U_0402_16V7K
C892 0.1U_0402_16V7K
C895 0.1U_0402_16V7K
C895 0.1U_0402_16V7K
C896 0.1U_0402_16V7K
C896 0.1U_0402_16V7K
C897 0.1U_0402_16V7K
C897 0.1U_0402_16V7K
C898 0.1U_0402_16V7K
C898 0.1U_0402_16V7K
C899 0.1U_0402_16V7K
C899 0.1U_0402_16V7K
R6001.27K_0402_1% VGA@ R6001.27K_0402_1% VGA@
R6022K_0402_5% VGA@ R6022K_0402_5% VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
1 2
1 2
VGA@
VGA@
VGA@
VGA@
PLT_RST#<11,13,24,29>
DGPU_HOLD_RST#<24>
+1.1/1.0VS_VGA
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
PCIE_GTX_C_MRX_N14PEG_NRX_C_GTX_N14
PCIE_GTX_C_MRX_P13PEG_NRX_C_GTX_P13
PCIE_GTX_C_MRX_N12PEG_NRX_C_GTX_N12
PCIE_GTX_C_MRX_P12PEG_NRX_C_GTX_P12
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11PEG_NRX_C_GTX_P11
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10PEG_NRX_C_GTX_P10
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P8
+3VS_VGA
5
U26
U26
2
P
B
1
A
G
3
VGA@
VGA@
MXM_PWRGD<40>
Deciphered Date
Deciphered Date
Deciphered Date
Y
PEG_RST#
4
R976
R976
0_0402_5%
0_0402_5%
@
@
1 2
U5F
U5F
LVDS CONTROL
LVDS CONTROL
LVTMDP
LVTMDP
M9X-S2/S3 + Park-S3
M9X-S2/S3 + Park-S3
+3VS_VGA
5
U29
U29
2
P
B
Y
1
A
G
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
3
VGA@
VGA@
@ R977
@
1 2
0_0402_5%
0_0402_5%
2
@
@
R598
R598
1 2
10K_0402_5%
10K_0402_5%
R599
@ R599
@
1 2
AB11
VARY_BL
DIGON
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N
VGA@
VGA@
AB12
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
0_0402_5%
0_0402_5%
R671
R671
10K_0402_5%
10K_0402_5%
VGA@
VGA@
1 2
11/24 update
MXM_RST#
4
R977
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC A5931.
SCHEMATIC A5931.
SCHEMATIC A5931.
401814
401814
401814
MXM_RST# <21>
1
VGA_PWM <29>
ENVDD_R <21>
VGA_TXCLK+ <21>
VGA_TXCLK- <21>
VGA_TXOUT0+ <21>
VGA_TXOUT0- <21>
VGA_TXOUT1+ <21>
VGA_TXOUT1- <21>
VGA_TXOUT2+ <21>
VGA_TXOUT2- <21>
of
of
of
14 43Friday, January 08, 2010
14 43Friday, January 08, 2010
14 43Friday, January 08, 2010
C
C
C
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