Compal LA-5912P, Aspire 5251, Aspire 5552, Aspire 5552G, eMachines E440 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

NEWX5 / PEW56 M/B Schematics Document

AMD Danube Only UMA

AMD Champlain Processor with RS880M/SB820M

3 3

2010-06-17

LA5912P REV: 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

145Wednesday, June 30, 2010

E

C

A

B

C

D

E

Danube

Compal Confidential

Model Name : NEWX5 / PEW56 File Name : LA-5912P P/N : DA60000FZ10

1 1

LVDS

page 16

CRT

page 18

AMD S1G4 Processor

uPGA-638 Package Champlain

page 6,7,8,9

Hyper Transport Link 16 x 16

ATI RS880M

uFCBGA-528

page 12,13,14

Memory BUS(DDR3)

Dual Channel

1.5V DDRIII 1066~1333MHz

Thermal Sensor

ADM1032

page 28 page 16 page 28 page 27

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

Clock Generator

page 8 page 15

ICS9LPRS488

page 10,11

page 28

HDMI Conn.

page 17

2 2

MINI Card 1

WLAN

page 36

LAN(GbE)

Broadcom BCM57780

page 25

A link Express2

Gen1

ATI SB820M

uFCBGA-605

page 19,20,21,22,23

USB conn X 3

USB port 0,1,2

3.3V 48MHz

3.3V 24.576MHz/48Mhz

S-ATA

Gen2

CMOS Camera

USB port 5 USB port 12 USB port 8

Bluetooth Conn

USB

HD Audio

GPP0GPP1

RJ45

page 26

LED

3 3

page 30

RTC CKT.

page 19

LID SW / MEDIA/B

page 30

Fan Control

page 33

Extend Card/B

1. USB X2

2. Cardreader

Touch Pad

EC I/O Buffer

ENE KB926

page 30

LPC BUS

page 29

Int.KBD

BIOS

SATA HDD Conn.

port 0

page 30

page 24

SATA ODD Conn.

page 24

port 1

RTS5160

w/ 5IN1 Conn.

Power On/Off CKT.

page 33

w/ 2IN1 Conn.

DC/DC Interface CKT.

4 4

page 34

Mini card (WL)X1

HDA Codec ALC272X

page 31

Audio AMP

page 32

Phone Jack x2

page 32

PCB

ZZZ

LA-5912P REV1 M/B

LA-5912P REV1 M/B NEWX5@

NEWX5@

ZZZ1

LA-5912P REV1 M/B

LA-5912P REV1 M/B PEW56@

PEW56@

3G/GPS WWAN

Card Reader

USB port 9

USB port 6

NEWX5

LA-5912P MB Rev1: DA60000FZ10 LA-5912P MB DAZ0C600100

PEW56

LA-5912P MB Rev1: DA60000FZ10 LA-5912P MB DAZ0GJ00100

Power Circuit

page 35,36,37,38,39,40, 41,42,43

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

245Wednesday, June 30, 2010

E

C

5

D D

4

14.31818MHz

3

2

1

100MHz

CLK_48M_USB

CLK_SBLINK_BCLK

100MHz

CLK_NBGFX

100MHz

CLK_NBHT

100MHz

CLK_NB_14.318M

14.318MHZ

48MHz

AMD

ATI NB RS880M

MEM_MA_CLK1_P/N

C C

A_SODIMM

B_SODIMM

B B

CardReader

MEM_MA_CLK7_P/N

MEM_MB_CLK1_P/N MEM_MB_CLK7_P/N

CLK_48M_SD

48MHz

1066MHz

AMD

S1G4 CPU SOCKET

CLK_PCIE_WWAN

WWAN Mini PCI Socket

100MHz

CPU_CLKP/N 200MHz

CLK_PCIE_MINI1

WLAN Mini PCI Socket

100MHz

EXTERNAL CLK GEN. SLG8SP626 / ICS9LPRS488

CLK_PCIE_LAN

100MHz

GbE LAN BCM 57780

CLK_SBSRC_BCLK

ATI SB SB820M

RTC SATA

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

32.768K Hz

2009/10/06 2010/03/12

25MHz

Compal Secret Data

Deciphered Date

2

Title

SCHEMATICS, MB A5912

Size Document Number Rev

Custom

401829

Date: Sheet

345Wednesday, June 30, 2010

of

1

of

C

A

Voltage Rails

Power Plane Description

VIN

1 1

2 2

B+ +CPU_CORE +CPU_CORE_NB OFFOFFONVoltage for On-die Northbridge of CPU(0.8-1.1V) +CPU_VDDR 1.05V switched power rail ON OFF OFF +0.75V 0.75V switched power rail for DDR terminator +1.1VS +1.5V 1.5V power rail for CPU VDDIO and DDR ON OFFON

+2.5VS 2.5V for CPU_VDDA OFFOFFON +3VALW 3.3V always on power rail ON ON*ON +3VS 3.3V switched power rail OFFON OFF +3V_LAN 3.3V power rail for LAN ON ON ON +5VALW +5VS +VSB +RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU (1.375-1.5V)

1.1V switched power rail for NB VDDC & VGA

1.8V switched power rail+1.8VS OFFON OFF

5V always on power rail 5V switched power rail VSB always on power rail ON

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

B

S1 S3 S5

N/A N/A N/A

ON OFF

ON

ON ON OFF OFF

OFF OFF+1.5VS 1.5V power rail for MINI Card ON

ON

ON ON* OFFON OFF

ON

ON ON

ON

N/AN/AN/A OFF

OFF

ON*

C

SIGNAL

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VALW +V +VS Clock

LOW

HIGH

LOWLOWLOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

NEWX5 / PEW56 PVT stage (w/ pach code)

D

ON

HIGHHIGHHIGH

HIGH

V typ

AD_BID

ON

OFF

ON

OFF

ON

V

AD_BID

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

BTO Option Table

E

ON ON

LOW

ON

OFF

max

0.538 V

0.875 V

2.341 V

3.300 V

BTO Item BOM Structure

INT@Internal CLK

External CLK EXT@

VB@Vari-Bright

No Vari-Bright UNVB@

HDMI NEWX5 PEW56 NEW75/85 LED

NEW95/PEW56 LED

HDMI@ NEWX5@ PEW56@ 7585@ 9556@

Bluetooth BT@

3 3

EC SM Bus1 address

Device

Smart Battery

Address Address

HEX

EC SM Bus2 address

Device

ADI ADM1032 (CPU) SB-Temp Sensor

1001 100X b0001 011X b

HEX 98H16H 98H

Project ID Table

Board ID

0 1 2

PCB Revision

NEWX5 PEW56

3G 3G@

3 4

SB820 SM Bus 0 address

Device

Clock Generator (SILEGO SLG8SP626)

DDR DIMM1 DDR DIMM2 Mini card

4 4

Address

1101 001Xb

1001 000Xb 1001 010Xb

HEX

D2 90

94

SB820 SM Bus 1 address

Device Address

5 6 7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

445Wednesday, June 30, 2010

E

C

5

BATTERY

12.6V

AC ADAPTOR 19V 90W

D D

BATT+

VIN

PU5 CHARGER ISL6261AHAZ-T

PU15 ISL6265IRZ-T

B+

PU7 RT8209BGQW

4

+CPU_CORE +CPU_CORE_NB

+1.5V

3

PU16 APL5508-25DC

+2.5VS

PU12 APL5915

+1.05VS

2

+1.5V

+CPU_CORE

+CPU_CORE_NB

+1.05VS

+1.1VS

AMD CPU S1G4

0.7~1.3V

0.8~1.2V

2.5V

1.5V

1.05V

1.1V

VDD CORE 36A VDDNB 4A VDDA 250mA VDDIO 3A VDDR 1.5A VLDT 1.5A

RAM DDRIII SODIMMX2

1.5V

0.75V

VDD_MEM 4A VTT_MEM 0.5A

1

+0.75VS

PU10 APL5913

NorthBridge AMD RS880M

PU8 RT8209BGQW

+NB_CORE

+1.1VS

1.0~1.1V

1.1V_S0

1.8V_S0

+1.5VS

+1.1VALW

U36 SI4800BDY

+1.1VS

3.3V_S0

No Use

PU6 RT8209BGQW

C C

+1.1VALW

PU19 TSP51117RGYR

+1.5V

U35 SI4800BDY

VDDC 1.0V-1.1V 7.6A

VDDHTRX+HT 0.68A VDDPCIE 1.1A VDDHTTX 0.68A PLLs 0.23A

VDDA18 0.64A VDDG18 0.005A VDDLT18 0.22A PLLs 0.1A

VDDG33 0.06A AVDD 0.125A VDDLT33 0A

VDD18_MEM 1.8V 0.005A VDD_MEM 1.8V 0.23A

VGA ATI Madison / Park

PU17 APW7138NITRL

+INVPWR_B+

B B

LCD panel

15.6"

B+ 300mA +3.3 350mA

FAN Control APL5607

PU4 SN0806081 RHBR

+5VS 500mA

U25/U40 TPS2061DRG4

A A

USB X3

+5V Dual+1

2.5A

+USB_VCCA +USB_VCCB

5

Audio AMP TPA6017A2

+5V 25mA

SATA

+5V 3A +3.3V

Audio Codec ALC272

+5V 45mA +3.3VS 25mA

+GPU_CORE +VDDCI

+1.8VS

+3VALW

PU14 APL5913

+1.8VSP2

PU11 MP2121DQ

+5VALW

U34 SI4800BDY

Realtek RTS5159

4

EC ENE KB926

+3.3VALW 30mA +3.3VS 3mA

+1.8VSP1

+5VS

PU10 APL5913

LAN BCM 57780

+3.3VALW 500mA

+1VSG

U37 SI1800BDY

3

+1.5VS

+3VS

Delay

+1.1VALW

+3VALW

ICS9LPRS488B

+3.3V 400mA +1.1V

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Mini Card

+1.5VS 500mA +3.3VS 1A+3.3VS 300mA +3.3VALW 330mA

RTC Bettary

Compal Secret Data

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

2

+3VS_DELAY

0.85~1.1V

1.0V

1.5V

1.8V

3.3V

VDDC 29 A VDDCI 4 A

PCIE_VDDC 2 A DP[F:A]_VDD10 230 mA DPLL_VDDC 125 mA SPV10 100 mA

VDDR1 TBD A

PCIE_PVDD 40 mA PCIE_VDDR 400 mA TSVDD 5 mA VDDR4 TBD mA VDD_CT 17 mA DP[F:A]_PVDD 20 mA DP[F:A]_VDD18 330 mA AVDD 70 mA VDD1DI 45 mA A2VDDQ 1.5 mA VDD2DI 50 mA DPLL_PVDD 75 mA MPV18 150 mA SPV18 50 mA

VDDR3 60 mA A2VDD 130 mA

SouthBridge AMD SB820M

VDDCR_11 1.1V 0.5A VDDAN_11_PCIE 1A

1.1V_S0

1.1V_S5

3.3V_S0

3.3V_S5

No Use

BAT

VDDAN_11_SATA 0.8A VDDAN_11_CLK 0.4A

VDDCR_11_S 113mA VDDAN_11_USB_S 200mA VDDCR_11_USB_S 197mA VDDPL_11_SYS_S

VDDIO_33_PCIGP 0.020A VDDPL_33_PCIE 0.030A VDDPL_33_SATA 0.020A VDDPL_33_SYS

VDDIO_33_S VDDPL_33_USB_S VDDAN_33_USB_S 0.2A VDDAN_33_S VDDXL_33_S VDDIO_AZ_S

VDDCR_11_GBE_S VDDRF_GBE_S VDDIO_33_GBE_S VDDIO_GBE_S VDDIO_18_FC

VDDBT_RTC_G2.5~3.6V

Title

SCHEMATICS, MB A5912

Size Document Number Rev

Custom

401829

Date: Sheet

VRAM 1GB 64Mx16 (K4B1G1646E) * 8

1.5V 2.4 A

1

C

of

545Wednesday, June 30, 2010

of

545Wednesday, June 30, 2010

of

545Wednesday, June 30, 2010

A

1 1

B

C

D

E

+1.1VS

250 mil

2

C1

H_CADIP[0..15][12]

H_CADIP[0..15] H_CADIN[0..15]

H_CADOP[0..15] H_CADON[0..15]

H_CADOP[0..15] [12] H_CADON[0..15] [12]H_CADIN[0..15][12]

C1 10U_0805_10V4Z

10U_0805_10V4Z

1

2

C2

C2 10U_0805_10V4Z

10U_0805_10V4Z

1

VLDT CAP.

1

C3

0.22U_0603_16V4Z

2

1

2

C4

0.22U_0603_16V4Z

1

C5

C5 180P_0402_50V8J

180P_0402_50V8J

2

1

C6

C6 180P_0402_50V8J

180P_0402_50V8J

2

Near CPU Socket

+1.1VS

2 2

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12

3 3

H_CLKIP0[12] H_CLKIN0[12] H_CLKIP1[12] H_CLKIN1[12]

H_CTLIP0[12] H_CTLIP1[12] H_CTLOP1 [12]

H_CTLIN1[12]

H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

JCPU1A

TBD

D1

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

FOX_PZ63823-284S-41F_Champlian

HT LINK

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1 L0_CTLOUT_H0

L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1

+1.1VS

AE2 AE3 AE4 AE5

H_CADOP0

AD1

H_CADON0

AC1

H_CADOP1

AC2

H_CADON1

AC3

H_CADOP2

AB1

H_CADON2

AA1

H_CADOP3

AA2

H_CADON3

AA3

H_CADOP4

W2

H_CADON4

W3

H_CADOP5

V1

H_CADON5

U1

H_CADOP6

U2

H_CADON6

U3

H_CADOP7

T1

H_CADON7

R1

H_CADOP8

AD4

H_CADON8

AD3

H_CADOP9

AD5

H_CADON9

AC5

H_CADOP10

AB4

H_CADON10

AB3

H_CADOP11

AB5

H_CADON11

AA5

H_CADOP12

Y5

H_CADON12

W5

H_CADOP13

V4

H_CADON13

V3

H_CADOP14

V5

H_CADON14

U5

H_CADOP15

T4

H_CADON15

T3 Y1

W1 Y4 Y3

R2 R3 T5 R5

C7

12

10U_0805_10V4Z

H_CLKOP0 [12] H_CLKON0 [12] H_CLKOP1 [12] H_CLKON1 [12]

H_CTLOP0 [12] H_CTLON0 [12]H_CTLIN0[12]

H_CTLON1 [12]

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

645Wednesday, June 30, 2010

E

C

of

A

B

C

D

E

Processor DDR3 Memory Interface

JCPU1C

DDRB_SDQ[63..0][11]

1 1

AMD suggest

2 2

+1.5V

R410 0_0603_5%R410 0_0603_5%

10U_0805_10V4Z

3 3

+1.5V

R1

1K_0402_1%

1 2

R2

1K_0402_1%

1 2

12

1

C95

@

2

DDRA_SMA[15..0][10] DDRB_SMA[15..0] [11]

MEM_VREF

1

C9

2

MEM_MA_RST#[10]

DDRA_ODT0[10] DDRA_ODT1[10]

DDRA_SCS0#[10] DDRA_SCS1#[10] DDRB_SCS0# [11]

DDRA_CKE0[10] DDRA_CKE1[10]

DDRA_CLK0[10]

DDRA_CLK0#[10]

DDRA_CLK1[10]

DDRA_CLK1#[10]

DDRA_SBS0#[10] DDRA_SBS1#[10] DDRA_SBS2#[10]

DDRA_SRAS#[10] DDRA_SCAS#[10] DDRA_SWE#[10]

C8

2

0.01U_0402_25V7KC90.01U_0402_25V7K

Place them close to CPU within 1"

R4 39.2_0402_1%R4 39.2_0402_1%

1 2 1 2

R5 39.2_0402_1%R5 39.2_0402_1%

1000P_0402_50V7KC81000P_0402_50V7K

JCPU1B

1.5A

D10

VDDR1

MEM:CMD/CTRL/CLK

C10

VDDR2

B10

VDDR3

AD10

MEMZP

MEMZN MEM_MA_RST# DDRA_ODT0

DDRA_ODT1

DDRA_SCS0# DDRA_SCS1# DDRB_SCS0#

DDRA_CKE0 DDRA_CKE1

DDRA_CLK0 DDRA_CLK0#

DDRA_CLK1 DDRA_CLK1#

DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14 DDRA_SMA15

DDRA_SBS0# DDRA_SBS1# DDRA_SBS2#

DDRA_SRAS# DDRA_SCAS# DDRA_SWE#

VDDR4

AF10

MEMZP

AE10

MEMZN

H16

MA_RESET_L

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H5

N20

MA_CLK_L5

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H7

AA16

MA_CLK_L7

P19

MA_CLK_H4

P20

MA_CLK_L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

FOX_PZ63823-284S-41F_Champlian

VDDR_SENSE

MB_RESET_L

VDDR5 VDDR6 VDDR7 VDDR8 VDDR9

MEMVREF

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

+CPU_VDDR+CPU_VDDR

VDDR: DDR3 under 1033MHz set to 0.9V to save power

VTT_SENSE MEM_VREF MEM_MB_RST# DDRB_ODT0

DDRB_ODT1

DDRB_SCS1#

DDRB_CKE0 DDRB_CKE1

DDRB_CLK0 DDRB_CLK0#

DDRB_CLK1 DDRB_CLK1#

DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14 DDRB_SMA15

DDRB_SBS0# DDRB_SBS1# DDRB_SBS2#

DDRB_SRAS# DDRB_SCAS# DDRB_SWE#

T1PAD T1PAD

MEM_MB_RST# [11] DDRB_ODT0 [11]

DDRB_ODT1 [11]

DDRB_SCS1# [11]

DDRB_CKE0 [11] DDRB_CKE1 [11]

DDRB_CLK0 [11] DDRB_CLK0# [11]

DDRB_CLK1 [11] DDRB_CLK1# [11]

DDRB_SBS0# [11] DDRB_SBS1# [11] DDRB_SBS2# [11]

DDRB_SRAS# [11] DDRB_SCAS# [11] DDRB_SWE# [11]

DDRB_SDM[7..0][11] DDRA_SDM[7..0] [10]

DDRB_SDQS0[11] DDRB_SDQS0#[11] DDRB_SDQS1[11] DDRB_SDQS1#[11] DDRB_SDQS2[11] DDRB_SDQS2#[11] DDRB_SDQS3[11] DDRB_SDQS3#[11] DDRB_SDQS4[11] DDRB_SDQS4#[11] DDRB_SDQS5[11] DDRB_SDQS5#[11] DDRB_SDQS6[11] DDRB_SDQS6#[11] DDRB_SDQS7[11] DDRB_SDQS7#[11]

DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7 DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15 DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23 DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31 DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39 DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47 DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55 DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63

DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7

DDRB_SDQS0 DDRB_SDQS0# DDRB_SDQS1 DDRB_SDQS1# DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS3 DDRB_SDQS3# DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS5 DDRB_SDQS5# DDRB_SDQS6 DDRB_SDQS6# DDRB_SDQS7 DDRB_SDQS7#

JCPU1C

MEM:DATA

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MEM:DATA C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24

AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

Y11

AE14 AF14 AF11 AD11

A12 B16 A22 E25

AB26 AE22 AC16 AD12

C12 B12 D16 C16 A24 A23 F26 E26

AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

FOX_PZ63823-284S-41F_Champlian

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24 AC24 Y19 AB16 Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7 DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15 DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23 DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31 DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39 DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47 DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55 DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63

DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7

DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7#

DDRA_SDQ[63..0] [10]

DDRA_SDQS0 [10] DDRA_SDQS0# [10] DDRA_SDQS1 [10] DDRA_SDQS1# [10] DDRA_SDQS2 [10] DDRA_SDQS2# [10] DDRA_SDQS3 [10] DDRA_SDQS3# [10] DDRA_SDQS4 [10] DDRA_SDQS4# [10] DDRA_SDQS5 [10] DDRA_SDQS5# [10] DDRA_SDQS6 [10] DDRA_SDQS6# [10] DDRA_SDQS7 [10] DDRA_SDQS7# [10]

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

745Wednesday, June 30, 2010

E

C

A

L1

+2.5VS

+

1 1

CLK_CPU_BCLK[15]

CLK_CPU_BCLK#[15]

+1.5VS

R17

R17 300_0402_5%

300_0402_5%

1 2

LDT_RST#[19]

2 2

H_PWRGD[19]

NEWX5@

3 3

LDT_RST#

1

C17

0.01U_0402_25V4Z

0.01U_0402_25V4Z @

@

2

R21

R21 300_0402_5%

300_0402_5%

1 2

H_PWRGD

1

C19

0.01U_0402_25V4Z

0.01U_0402_25V4Z @

@

2

1

C20

2

1 2

@

LDT_STOP#[13,19]

THERMDA_CPU THERMDC_CPU

+1.5VS

+3VS

0.1U_0402_16V4Z

C21 100P_0402_50V8J

For MP

FBMA-L11-201209-221LMA30T_0805

12

C11

220U_6.3V_M

1 2

C16

1 2

C15 3900P_0402_50V7KC15 3900P_0402_50V7K

+1.5VS

1 2

LDT_STOP#

1

C18

0.01U_0402_25V4Z

2

NEWX5@

NEWX5@ U1

U1

1

VDD

2

D+

3

DTHERM#4GND

ADM1032ARMZ_MSOP8

Address

1 2

3900P_0402_50V7K

12

R10

R10 169_0402_1%

169_0402_1%

R18

R18 300_0402_5%

300_0402_5%

@

SCLK

SDATA

ALERT#

1001 100X b

L1

CPU internal thermal sensor

1 2

PEW56@

C22 0.1U_0402_16V4Z

R41

+3VS

PEW56@

31.6K_0402_1%

4 4

CPU_SID

CPU_SIC

C22 0.1U_0402_16V4Z

R42

12

PEW56@

30K_0402_5%

G

2

13

D

S

D

S

PEW56@

Q2 FDV301N_NL_SOT23-3

G

2

13

D

S

D

S

PEW56@

Q3 FDV301N_NL_SOT23-3

A

12

EC_SMB_DA

EC_SMB_CK

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

2.09V for Gate

@

1 2

R44 0_0402_5%

1 2

R45 0_0402_5%

PEW56@

@

1 2

R46 0_0402_5%

1 2

R47 0_0402_5%

PEW56@

EC_SMB_CK2

+1.5V +1.5V

+1.1VS

EC_SMB_CK2

8

EC_SMB_DA2

7 6 5

SB_SID EC_SMB_DA2

SB_SIC

B

+2.5VDDA

3300P_0402_50V7K

1

C124.7U_0805_10V4Z C124.7U_0805_10V4Z

C13

2

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

1 2

R12 1K_0402_5%R12 1K_0402_5%

1 2

R14 1K_0402_5%R14 1K_0402_5%

R15 44.2_0402_1%R15 44.2_0402_1%

1 2

R16 44.2_0402_1%R16 44.2_0402_1%

1 2

CPU_VDD0_FB_H[43] CPU_VDD0_FB_L[43]

CPU_VDD1_FB_H[43] CPU_VDD1_FB_L[43]

EC_SMB_CK2 [29]

EC_SMB_DA2 [29]

SB_SID [20]

SB_SIC [20]

B

VDDA=0.25A

1

C14

0.22U_0603_16V4Z

2

LDT_RST# H_PWRGD LDT_STOP#

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

1 2

R24 0_0402_5%R24 0_0402_5%

T0 SB TO EC

C

Champlain: C1E C1E: LDT_REQ# no connect CLMC: LDT_REQ# connect to NB

LDT_RES# / MEMHOT# no support in S1g4

JCPU1D

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

T2 PADT2 PAD

CPU_SIC CPU_SID

CPU_HTREF0 CPU_HTREF1

CPU_VDD0_FB_H CPU_VDD0_FB_L

CPU_VDD1_FB_H CPU_VDD1_FB_L

CPU_TEST23 CPU_TEST18

CPU_TEST19 CPU_TEST25H

CPU_TEST25L

CPU_TEST21 CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12 CPU_TEST27

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

FOX_PZ63823-284S-41F_Champlian

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

C

THERMTRIP_L

PROCHOT_L

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

M11

VSS

W18

RSVD11

MEMHOT_L

THERMDC THERMDA

DBREQ_L

TEST28_H TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST10

TEST29_H TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

CPU_SVC

A6

SVC

CPU_SVD

A4

SVD

AF6 AC7 AA8

THERMDC_CPU

W7

THERMDA_CPU

W8

W9 Y9

CPU_VDDNB_FB_H

H6

CPU_VDDNB_FB_L

G6

CPU_DBREQ#

E10

CPU_TDO

AE9

TDO

J7 H8

CPU_TEST17

D7

CPU_TEST16

E7

CPU_TEST15

F7

CPU_TEST14

C7 C3

TEST7

K8 C4

TEST8

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

H18 H19 AA7 D5 C5

+1.5V

R37220_0402_5%

R39300_0402_5%

R38220_0402_5%

R36220_0402_5%

12

@

2009/10/06 2010/03/12

CPU_SVC [43] CPU_SVD [43]

CPU_THERMTRIP#_R H_PROCHOT#

T3PAD T3PAD

T4PAD T4PAD T11PAD T11PAD

R40300_0402_5% R40300_0402_5%

1 2

Compal Secret Data

CPU_VDDNB_FB_H [43] CPU_VDDNB_FB_L [43]

T5PAD T5PAD T6PAD T6PAD T7PAD T7PAD T8PAD T8PAD

R25 80.6_0402_1%R25 80.6_0402_1%

JP2

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423 26

SAMTEC_ASP-68200-07

CONN@ SAMTEC_ASP-68200-07

CONN@

Deciphered Date

D

12

HDT_RST#

D

R7

1K_0402_5%

CPU_THERMTRIP#_R

1 2

+1.5V

R11 300_0402_5%R11 300_0402_5%

H_PROCHOT#

PROCHOT: Input: For HTC Function Output: Over Temperature Condition

@

U2

4

1 2

MMBT3904_NL_SOT23-3

CPU_SVC CPU_SVD

CPU_TEST25H

CPU_TEST25L

CPU_TEST27

For SCAN connect use

CPU_TEST12 CPU_TEST18 CPU_TEST19 CPU_TEST20 CPU_TEST21 CPU_TEST22 CPU_TEST24 CPU_TEST23

R43

1 2

0_0402_5%@

+3VS

5

2

P

B

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

E

+1.5V

12

R6

R6 10K_0402_5%

10K_0402_5% <BOM Structure>

B

2

Q1

E

3 1

1 2

R19 1K_0402_5%R19 1K_0402_5%

1 2

R20 1K_0402_5%R20 1K_0402_5%

1 2

R22 510_0402_5%R22 510_0402_5%

1 2

R23 510_0402_5%@R23 510_0402_5%@

1 2

R26 510_0402_5%@R26 510_0402_5%@

1 2

R27 510_0402_5%R27 510_0402_5%

1 2

R28 1K_0402_5%R28 1K_0402_5%

1 2

R29 1K_0402_5%R29 1K_0402_5%

1 2

R30 1K_0402_5%R30 1K_0402_5%

1 2

R31 1K_0402_5%R31 1K_0402_5%

1 2

R32 1K_0402_5%R32 1K_0402_5%

1 2

R33 1K_0402_5%R33 1K_0402_5%

1 2

R34 1K_0402_5%R34 1K_0402_5%

1 2

R35 1K_0402_5%R35 1K_0402_5%

1 2

R265 1K_0402_5%R265 1K_0402_5%

1 2

C

R8 0_0402_5%R8 0_0402_5%

1 2

R9 0_0402_5%@R9 0_0402_5%@

1 2

R13 0_0402_5%R13 0_0402_5%

LDT_RST#

SB_PWRGD [13,20,29]

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

E

+1.5V

H_THERMTRIP# [20]

MAINPWON [36,37,41]

H_PROCHOT_R# [19]

of

845Wednesday, June 30, 2010

C

A

VDD(+CPU_CORE) decoupling.

+CPU_CORE

1

+

C23

1 1

C23

330U_D2_2V_Y

330U_D2_2V_Y 2

Change as SGA19331D10 (ESR9 ohm) for PVT

+CPU_CORE

1

C28

C28 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE

1

C36

0.22U_0603_16V4Z

2

2 2

1

C29

C29 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C37

0.01U_0402_25V4Z

2

1

+

330U_D2_2V_Y

330U_D2_2V_Y 2

1

C30

C30 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C38

C38 180P_0402_50V8J

180P_0402_50V8J

2

C24

Near CPU Socket

1

C35

C35 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

VDDIO decoupling.

+1.5V

1

C44

C44 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C45

C45 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C46

0.22U_0603_16V4Z

0.22U_0603_16V4Z 2

Under CPU Socket

3 3

4 4

+1.5V

1

C51

0.22U_0603_16V4Z

2

+1.5V +1.5V

1

C64

0.01U_0402_25V4Z

2

+1.5V

1

2

Between CPU Socket and DIMM

C71

4.7U_0805_10V4Z

1

C52

0.22U_0603_16V4Z

2

1

C65

0.01U_0402_25V4Z

2

1

C72

4.7U_0805_10V4Z

2

1

C53

0.22U_0603_16V4Z

2

1

2

1

C47

0.22U_0603_16V4Z

0.22U_0603_16V4Z 2

1

C54

0.22U_0603_16V4Z

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

C66

0.1U_0402_16V7K

2

1

Change as SGA19331D10 (ESR9 ohm) for PVT

C73

4.7U_0805_10V4Z

1

2

1

+

C25

330U_D2_2V_Y

330U_D2_2V_Y 2

1

180P_0402_50V8J

180P_0402_50V8J 2

C67

0.1U_0402_16V7K

C74

4.7U_0805_10V4Z

B

+CPU_CORE

1

C31

C31 22U_0805_6.3V6M

22U_0805_6.3V6M

2

C48

1

C354

0.22U_0603_16V4Z

2

1

C68

C68 180P_0402_50V8J

180P_0402_50V8J

2

1

+

C75

330U_D2_2V_Y

2

1

+

C26

330U_D2_2V_Y

330U_D2_2V_Y 2

+CPU_CORE

1

C50

C50 180P_0402_50V8J

180P_0402_50V8J

2

1

C32

C32 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C39

0.22U_0603_16V4Z

2

1

C355

0.22U_0603_16V4Z

2

1

C69

C69 180P_0402_50V8J

180P_0402_50V8J

2

C

1

+

C27

C27 @

@

330U_D2_2V_Y

330U_D2_2V_Y 2

1

2

1

2

C33

C33 22U_0805_6.3V6M

22U_0805_6.3V6M

C40

0.01U_0402_25V4Z

1

C34

C34 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C41

C41 180P_0402_50V8J

180P_0402_50V8J

2

+CPU_CORE

+CPU_CORE_NB

+1.5V

4A

G4

H2

J9 J11 J13 J15

K6 K10 K12 K14

L4

L7

L9 L11 L13 L15

M2 M6 M8

M10

N7

N9 N11

K16

M16

P16 T16 V16

H25

J17 K18 K21 K23 K25 L17

M18 M21 M23 M25

N17

Athlon 64 S1

Processor Socket

+CPU_CORE_NB decoupling.

+CPU_CORE_NB

1

C42

C42 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C43

C43 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VDDR decoupling.

+CPU_VDDR

1

C57

4.7U_0805_10V4Z

2

+CPU_VDDR

1

C76

4.7U_0805_10V4Z

2

1

C58

4.7U_0805_10V4Z

2

Near CPU Socket Right side.

1

C77

4.7U_0805_10V4Z

2

1

2

1

C59

0.22U_0603_16V4Z

2

1

C78

0.22U_0603_16V4Z

2

C49

C49 22U_0805_6.3V6M

22U_0805_6.3V6M

+CPU_VDDR

Near Power Supply

12

+

C56 220U_6.3V_M

Change as SF000002N00(H4.4)For PVT

1

C60

0.22U_0603_16V4Z

2

1

C79

0.22U_0603_16V4Z

2

D

JCPU1E

VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

FOX_PZ63823-284S-41F_Champlian

1

C55

C55 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C61

C61 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C80

C80 1000P_0402_50V7K

1000P_0402_50V7K

2

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

1

C62

C62 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C81

C81 1000P_0402_50V7K

1000P_0402_50V7K

2

36A

TBD

+CPU_CORE

+1.5V

1

C63

C63 180P_0402_50V8J

180P_0402_50V8J

2

1

C82

C82 180P_0402_50V8J

180P_0402_50V8J

2

JCPU1F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

FOX_PZ63823-284S-41F_Champlian

Athlon 64 S1 Processor Socket

+1.5V

1

C70

C70 180P_0402_50V8J

180P_0402_50V8J

2

1

C83

C83 180P_0402_50V8J

180P_0402_50V8J

2

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

@

2

1

E

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

C97 0.1U_0402_16V7K@C97 0.1U_0402_16V7K

C98 0.1U_0402_16V7K@C98 0.1U_0402_16V7K

2

@

1

Reserve for EMI

C99 0.1U_0402_16V7K@C99 0.1U_0402_16V7K

C100 0.1U_0402_16V7K@C100 0.1U_0402_16V7K

C96 0.1U_0402_16V7K@C96 0.1U_0402_16V7K

C101 0.1U_0402_16V7K@C101 0.1U_0402_16V7K

2

@

1

Near CPU Socket Left side.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

945Wednesday, June 30, 2010

E

C

A

B

C

D

E

+VREF_DQ

DDRA_SDQ0 DDRA_SDQ1

DDRA_SDM0 DDRA_SDQ2

1 1

DDRA_SDQS1#[7] DDRA_SDQS1[7]

DDRA_SDQS2#[7] DDRA_SDQS2[7]

DDRA_CKE0[7]

2 2

3 3

4 4

2.2U_0805_10V6K

DDRA_SBS2#[7]

DDRA_CLK0[7] DDRA_CLK0#[7]

DDRA_SBS0#[7]

DDRA_SWE#[7]

DDRA_SCAS#[7] DDRA_ODT0 [7]

DDRA_SCS1#[7]

DDRA_SDQS4#[7] DDRA_SDQS4[7]

DDRA_SDQS6#[7] DDRA_SDQS6[7]

+3VS

1

C91

C90

0.1U_0402_16V4Z

2

A

DDRA_SDQ3 DDRA_SDQ8

DDRA_SDQ9 DDRA_SDQS1#

DDRA_SDQS1 DDRA_SDQ10

DDRA_SDQ11 DDRA_SDQ16

DDRA_SDQ17 DDRA_SDQS2#

DDRA_SDQS2 DDRA_SDQ18

DDRA_SDQ19 DDRA_SDQ24

DDRA_SDQ25 DDRA_SDM3 DDRA_SDQ26

DDRA_SDQ27

DDRA_CKE0

DDRA_SBS2# DDRA_SMA12

DDRA_SMA9 DDRA_SMA8

DDRA_SMA5 DDRA_SMA3

DDRA_SMA1 DDRA_CLK0

DDRA_CLK0# DDRA_SMA10

DDRA_SBS0# DDRA_SWE#

DDRA_SCAS# DDRA_ODT0 DDRA_SMA13

DDRA_SCS1#

DDRA_SDQ32 DDRA_SDQ33

DDRA_SDQS4# DDRA_SDQS4

DDRA_SDQ34 DDRA_SDQ35

DDRA_SDQ40 DDRA_SDQ41

DDRA_SDM5 DDRA_SDQ42

DDRA_SDQ43 DDRA_SDQ48

DDRA_SDQ49 DDRA_SDQS6#

DDRA_SDQS6 DDRA_SDQ50

DDRA_SDQ51 DDRA_SDQ56

DDRA_SDQ57 DDRA_SDM7 DDRA_SDQ58

DDRA_SDQ59

R50 10K_0402_5%R50 10K_0402_5%

+3VS

1

2

1 2

+1.5V +1.5V

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

12

R51

R51 10K_0402_5%

10K_0402_5%

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

DQS#0

VSS10

VSS17

VSS19

VSS21

VDD10

VDD12

VDD14

VDD16

VDD18

VREF_CA

VSS28

VSS30 VSS31

VSS33

VSS35

DQS#5

VSS38

VSS40

VSS42 VSS43

VSS45

VSS47

DQS#7

VSS50

VSS52

EVENT#

FOX_AS0A626-U8SN-7F

FOX_AS0A626-U8SN-7F CONN@

CONN@

DIMM_A STD H:8mm

<Address: 00>

DQ4 DQ5

VSS3

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQS3 DQ30

DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1#

RAS#

ODT0 ODT1

NC2

DQ36 DQ37

DM4

DQ38 DQ39

DQ44 DQ45

DQS5 DQ46

DQ47 DQ52

DQ53

DM6

DQ54 DQ55

DQ60 DQ61

DQS7 DQ62

DQ63

SDA

VTT2

2

DDRA_SDQ4

4

DDRA_SDQ5

6 8

DDRA_SDQS0#

10

DDRA_SDQS0

12 14

DDRA_SDQ6

16

DDRA_SDQ7

18 20

DDRA_SDQ12

22

DDRA_SDQ13

24 26

DDRA_SDM1

28

MEM_MA_RST#

30 32

DDRA_SDQ14

34

DDRA_SDQ15

36 38

DDRA_SDQ20

40

DDRA_SDQ21

42 44

DDRA_SDM2

46 48

DDRA_SDQ22

50

DDRA_SDQ23

52 54

DDRA_SDQ28

56

DDRA_SDQ29

58 60

DDRA_SDQS3#

62

DDRA_SDQS3

64 66

DDRA_SDQ30

68

DDRA_SDQ31

70 72

DDRA_CKE1

74 76

DDRA_SMA15

78

A15 A14

A11

A7 A6

A4 A2

A0

CK1

BA1

S0#

SCL

G2

DDRA_SMA14

80 82

DDRA_SMA11

84

DDRA_SMA7

86 88

DDRA_SMA6

90

DDRA_SMA4

92 94

DDRA_SMA2

96

DDRA_SMA0

98 100

DDRA_CLK1

102

DDRA_CLK1#

104 106

DDRA_SBS1#

108

DDRA_SRAS#

110 112

DDRA_SCS0#

114 116 118

DDRA_ODT1

120 122 124 126 128

DDRA_SDQ36

130

DDRA_SDQ37

132 134

DDRA_SDM4

136 138

DDRA_SDQ38

140

DDRA_SDQ39

142 144

DDRA_SDQ44

146

DDRA_SDQ45

148 150

DDRA_SDQS5#

152

DDRA_SDQS5

154 156

DDRA_SDQ46

158

DDRA_SDQ47

160 162

DDRA_SDQ52

164

DDRA_SDQ53

166 168

DDRA_SDM6

170 172

DDRA_SDQ54

174

DDRA_SDQ55

176 178

DDRA_SDQ60

180

DDRA_SDQ61

182 184

DDRA_SDQS7#

186

DDRA_SDQS7

188 190

DDRA_SDQ62

192

DDRA_SDQ63

194 196 198 200 202 204

206

B

T9PAD T9PAD

+0.75VS

DDRA_SDQS0# [7] DDRA_SDQS0 [7]

MEM_MA_RST# [7]

DDRA_SDQS3# [7] DDRA_SDQS3 [7]

DDRA_CKE1 [7]

DDRA_CLK1 [7] DDRA_CLK1# [7]

DDRA_SBS1# [7] DDRA_SRAS# [7]

DDRA_SCS0# [7]

DDRA_ODT1 [7]

+VREF_CA

1

C89

2

1000P_0402_50V7K

DDRA_SDQS5# [7] DDRA_SDQS5 [7]

DDRA_SDQS7# [7] DDRA_SDQS7 [7]

SB_SMDAT0 [11,15,20,27] SB_SMCLK0 [11,15,20,27]

DDRA_SDQ[0..63]

DDRA_SDM[0..7]

DDRA_SMA[0..15]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDRA_SDQ[0..63] [7]

DDRA_SDM[0..7] [7]

DDRA_SMA[0..15] [7]

1

C10

2

1000P_0402_50V7K

2

C88

1

0.1U_0402_16V4Z

1

C664

2

4.7U_0805_10V4Z

+1.5V

R48

R48 1K_0402_1%

1K_0402_1%

1 2

R49

R49 1K_0402_1%

1K_0402_1%

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

C644

1

C961

C691

0.01U_0402_16V7K

2

C640

1

0.1U_0402_16V4Z

2

C692

1

D

+VREF_DQ

1

2

C84

C85

@

2

+1.5V

2

C87

1

+0.75VS

2

C665

1

C690

12

@

0.1U_0402_16V4Z

0.01U_0402_25V7K

0.1U_0402_16V4Z

1

2

C643

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

1

Compal Secret Data

Deciphered Date

4.7U_0805_10V4Z

0.1U_0402_16V4Z

+1.5V +0.75VS

2009/10/06 2010/03/12

0.1U_0402_16V4Z

+1.5V

2

1

0.01U_0402_16V7K

1

2

4.7U_0805_10V4Z

2

C645

1

C693

+1.5V+VREF_CA

R310

R310 1K_0402_1%

1K_0402_1%

C680

2

C642

1

0.1U_0402_16V4Z

1 2

R315

R315 1K_0402_1%

1K_0402_1%

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

C647

1

+VREF_CA

0.01U_0402_25V7K

2

C235

C235 @

@

1

2

C641

1

0.1U_0402_16V4Z

1

C351

2

1000P_0402_50V7K

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

C646

1

Place near DIMM1

2

1

0.01U_0402_16V7K

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

E

C

10 45Wednesday, June 30, 2010

C

A

B

C

D

E

DQ4 DQ5

VSS3

VSS6

DQ6 DQ7

VSS8

DM1

DM2

CK1

CK1#

BA1

NC2

DM4

DM6

SDA SCL

VTT2

+1.5V+1.5V

2

DDRB_SDQ4

4

DDRB_SDQ5

6 8

DDRB_SDQS0#

10

DDRB_SDQS0

12 14

DDRB_SDQ6

16

DDRB_SDQ7

18 20

DDRB_SDQ12

22

DDRB_SDQ13

24 26

DDRB_SDM1

28

MEM_MB_RST#

30 32

DDRB_SDQ14

34

DDRB_SDQ15

36 38

DDRB_SDQ20

40

DDRB_SDQ21

42 44

DDRB_SDM2

46 48

DDRB_SDQ22

50

DDRB_SDQ23

52 54

DDRB_SDQ28

56

DDRB_SDQ29

58 60

DDRB_SDQS3#

62

DDRB_SDQS3

64 66

DDRB_SDQ30

68

DDRB_SDQ31

70 72

DDRB_CKE1

74 76

DDRB_SMA15

78

A15 A14

A11

A7 A6

A4 A2

A0

S0#

G2

DDRB_SMA14

80 82

DDRB_SMA11

84

DDRB_SMA7

86 88

DDRB_SMA6

90

DDRB_SMA4

92 94

DDRB_SMA2

96

DDRB_SMA0

98 100

DDRB_CLK1

102

DDRB_CLK1#

104 106

DDRB_SBS1#

108

DDRB_SRAS#

110 112

DDRB_SCS0#

114

DDRB_ODT0DDRB_SCAS#

116 118

DDRB_ODT1

120 122 124 126 128

DDRB_SDQ36

130

DDRB_SDQ37

132 134

DDRB_SDM4

136 138

DDRB_SDQ38

140

DDRB_SDQ39

142 144

DDRB_SDQ44

146

DDRB_SDQ45

148 150

DDRB_SDQS5#

152

DDRB_SDQS5

154 156

DDRB_SDQ46

158

DDRB_SDQ47

160 162

DDRB_SDQ52

164

DDRB_SDQ53

166 168

DDRB_SDM6

170 172

DDRB_SDQ54

174

DDRB_SDQ55

176 178

DDRB_SDQ60

180

DDRB_SDQ61

182 184

DDRB_SDQS7#

186

DDRB_SDQS7

188 190

DDRB_SDQ62

192

DDRB_SDQ63

194 196 198 200 202 204

206

T10PAD T10PAD

+0.75VS

DDRB_SDQS0# [7] DDRB_SDQS0 [7]

MEM_MB_RST# [7]

DDRB_SDQS3# [7] DDRB_SDQS3 [7]

DDRB_CKE1 [7]

DDRB_CLK1 [7] DDRB_CLK1# [7]

DDRB_SBS1# [7] DDRB_SRAS# [7]

DDRB_SCS0# [7] DDRB_ODT0 [7]

DDRB_ODT1 [7]

+VREF_CA

1

C94

2

1000P_0402_50V7K

DDRB_SDQS5# [7] DDRB_SDQS5 [7]

DDRB_SDQS7# [7] DDRB_SDQS7 [7]

SB_SMDAT0 [10,15,20,27] SB_SMCLK0 [10,15,20,27]

DDRB_SDQ[0..63] DDRB_SDM[0..7]

DDRB_SMA[0..15]

+VREF_DQ

+1.5V

2

1

0.1U_0402_16V4Z

+0.75VS

0.1U_0402_16V4Z

1

C92

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C677

0.1U_0402_16V4Z

2

C676

1

DDRB_SDQ[0..63] [7]

DDRB_SDM[0..7] [7]

DDRB_SMA[0..15] [7]

+VREF_DQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C93

2

C670

1

0.1U_0402_16V4Z

2

C675

1

4.7U_0603_6.3V6K

1

2

1000P_0402_50V7K

2

C666

1

C925

2

+VREF_CA

C682

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

C671

1

C352

2

4.7U_0805_10V4Z

2

C667

1

0.1U_0402_16V4Z

+1.5V

1

+

C86

330U_X_2VM_R6M@

2

+VREF_CA

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C353

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

C672

1

Place near DIMM2

1

C683

2

1000P_0402_50V7K

2

C668

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

C673

1

2

C669

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

C674

1

+VREF_DQ

DDRB_SDQ0 DDRB_SDQ1

DDRB_SDM0 DDRB_SDQ2

+3VS

DDRB_SDQ3 DDRB_SDQ8

DDRB_SDQ9 DDRB_SDQS1#

DDRB_SDQS1 DDRB_SDQ10

DDRB_SDQ11 DDRB_SDQ16

DDRB_SDQ17 DDRB_SDQS2#

DDRB_SDQS2 DDRB_SDQ18

DDRB_SDQ19 DDRB_SDQ24

DDRB_SDQ25 DDRB_SDM3 DDRB_SDQ26

DDRB_SDQ27

DDRB_CKE0

DDRB_SBS2# DDRB_SMA12

DDRB_SMA9 DDRB_SMA8

DDRB_SMA5 DDRB_SMA3

DDRB_SMA1 DDRB_CLK0

DDRB_CLK0# DDRB_SMA10

DDRB_SBS0# DDRB_SWE#

DDRB_SMA13 DDRB_SCS1#

DDRB_SDQ32 DDRB_SDQ33

DDRB_SDQS4# DDRB_SDQS4

DDRB_SDQ34 DDRB_SDQ35

DDRB_SDQ40 DDRB_SDQ41

DDRB_SDM5 DDRB_SDQ42

DDRB_SDQ43 DDRB_SDQ48

DDRB_SDQ49 DDRB_SDQS6#

DDRB_SDQS6 DDRB_SDQ50

DDRB_SDQ51 DDRB_SDQ56

DDRB_SDQ57 DDRB_SDM7 DDRB_SDQ58

DDRB_SDQ59

R52 10K_0402_5%R52 10K_0402_5%

1 2

12

R53

R53 10K_0402_5%

10K_0402_5%

1 1

DDRB_SDQS1#[7] DDRB_SDQS1[7]

DDRB_SDQS2#[7] DDRB_SDQS2[7]

DDRB_CKE0[7]

2 2

3 3

4 4

DDRB_SBS2#[7]

DDRB_CLK0[7] DDRB_CLK0#[7]

DDRB_SBS0#[7]

DDRB_SWE#[7]

DDRB_SCAS#[7]

DDRB_SCS1#[7]

DDRB_SDQS4#[7] DDRB_SDQS4[7]

DDRB_SDQS6#[7] DDRB_SDQS6[7]

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F CONN@

CONN@

DQS#0

DQS0

DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3 DQ30

DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30 VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42 VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

Security Classification

Issued Date

DIMM_B STD H:4mm

<Address: 01>

A

B

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

11 45Wednesday, June 30, 2010

E

C

A

U3B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GPP0P GPP0N

C2 C1

E5

F5 G5 G6 H5 H6

J6

J5

J7

J8

L5

L6 M8

L8

P7 M7

P5 M5 R8

P8 R6 R5

P4

P3

T4

T3

AE3 AD4 AE2 AD3 AD1 AD2

V5 W6 U5 U6 U8 U7

AA8

Y8

AA7

Y7

AA5 AA6

W5

Y5

GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N

GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N

SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N

RS780M_FCBGA528

1 1

PCIE_PTX_C_IRX_P0[25] PCIE_PTX_C_IRX_N0[25]

PCIE_PTX_C_IRX_P1[27]

2 2

PCIE_PTX_C_IRX_N1[27]

PCIE_PTX_C_IRX_P0 PCIE_PTX_C_IRX_N0

1 2

R56 0_0402_5%

1 2

R57 0_0402_5%

R56,R57 close to R54,R55 C131,C132 close to C127,C128

R54 0_0402_5%R54 0_0402_5% R55 0_0402_5%R55 0_0402_5%

@

@ @

@

SB_RX0P[19] SB_RX0N[19] SB_RX1P[19] SB_RX1N[19] SB_RX2P[19] SB_RX2N[19] SB_RX3P[19] SB_RX3N[19]

1 2 1 2

PCIE_PTX_C_IRX_N3

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

RS880 A11(SA000032710)

3 3

4 4

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

B

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2

PCIE_ITX_PRX_P1

AB4

PCIE_ITX_PRX_N1

AB3 AA2 AA1

PCIE_ITX_PRX_P3

Y1

PCIE_ITX_PRX_N3

Y2 Y4 Y3 V1 V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6

SB_TX2P_C

AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5 AC8

AB8

GMCH_HDMI_TXD2+ [17] GMCH_HDMI_TXD2- [17] GMCH_HDMI_TXD1+ [17] GMCH_HDMI_TXD1- [17] GMCH_HDMI_TXD0+ [17] GMCH_HDMI_TXD0- [17] GMCH_HDMI_TXC+ [17] GMCH_HDMI_TXC- [17]

C127 0.1U_0402_16V7KC127 0.1U_0402_16V7K

1 2

C128 0.1U_0402_16V7KC128 0.1U_0402_16V7K

1 2

C129 0.1U_0402_16V7KC129 0.1U_0402_16V7K

1 2

C130 0.1U_0402_16V7KC130 0.1U_0402_16V7K

1 2

C131 0.1U_0402_16V7K@C131 0.1U_0402_16V7K@

1 2

C132 0.1U_0402_16V7K@C132 0.1U_0402_16V7K@

1 2

C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K

1 2

C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K

1 2

C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K

1 2

C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K

1 2

C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K

1 2

C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K

1 2

C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K

1 2

C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K

1 2 1 2

1 2

R59 1.27K_0402_1%R59 1.27K_0402_1% R58 2K_0402_1%R58 2K_0402_1%

C

PCIE_ITX_C_PRX_P0PCIE_PTX_C_IRX_P3 PCIE_ITX_C_PRX_N0

+1.1VS

PCIE_ITX_C_PRX_P0 [25] PCIE_ITX_C_PRX_N0 [25] PCIE_ITX_C_PRX_P1 [27] PCIE_ITX_C_PRX_N1 [27]

Reserve for LAN debug

SB_TX0P [19] SB_TX0N [19] SB_TX1P [19] SB_TX1N [19] SB_TX2P [19] SB_TX2N [19] SB_TX3P [19] SB_TX3N [19]

GLAN WLAN

H_CADOP[0..15][6] H_CADON[0..15][6] H_CADIN[0..15] [6]

H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0[6]

H_CLKON0[6]

H_CLKOP1[6]

H_CLKON1[6]

H_CTLOP0[6] H_CTLON0[6]

H_CTLON1[6]

301_0402_1%~D

0718 Place within 1" layout 1:2

R60

1 2

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1

H_CADOP0

H_CADON0

H_CADOP1

H_CADON1

H_CADOP2

H_CADON2

H_CADOP3

H_CADON3

H_CADOP4

H_CADON4

H_CADOP5

H_CADON5

H_CADOP6

H_CADON6

H_CADOP7

H_CADON7

H_CADOP8

H_CADON8

H_CADOP9

H_CADON9

HT_RXCALP HT_RXCALN

D

H_CADON[0..15]

U3A

Y25

HT_RXCAD0P

Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25 AB25 AB24 AA24 AA25

Y22

Y23 W21 W20

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22 M23

R21

R20

C23

A24

RS780M_FCBGA528

HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

PART 1 OF 6

HYPER TRANSPORT CPU I/F

RS880 A11(SA000032710)

H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

H_CADIP[0..15] [6]

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18 H24

H25 L21 L20

H_CTLIP0

M24

H_CTLIN0

M25

H_CTLIP1

P19

H_CTLIN1

R18

HT_TXCALP

B24

HT_TXCALN

B25

0718 Place within 1" layout 1:2

E

H_CLKIP0 [6] H_CLKIN0 [6] H_CLKIP1 [6] H_CLKIN1 [6]

H_CTLIP0 [6]

H_CTLIN0 [6]

H_CTLIP1 [6]H_CTLOP1[6]

H_CTLIN1 [6]

1 2

301_0402_1%~D

R61

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

12 45Wednesday, June 30, 2010

E

C

of

A

B

C

D

E

+1.8VS+1.8VS +1.8VS

0.1U_0402_16V4Z

R417

+1.1VS

FBMA-L11-160808-221LMT 0603

1 1

FBMA-L11-160808-221LMT 0603

+1.8VS

FBMA-L11-160808-221LMT 0603

2 2

3 3

+1.8VS

FBMA-L11-160808-221LMT 0603

CLK_NB_14.318M[15] NB_DISP_CLKP[19] NB_DISP_CLKN[19]

+3VS

L2

1 2

2.2U_0603_6.3V4Z

L5

1 2

2.2U_0603_6.3V4Z

L7

1 2

2.2U_0603_6.3V4Z

L9

1 2

2.2U_0603_6.3V4Z

R77 4.7K_0402_5%R77 4.7K_0402_5%

1 2

R78 4.7K_0402_5%R78 4.7K_0402_5%

1 2

R79 4.7K_0402_5%

1 2

@

R80 4.7K_0402_5%

1 2

@

1

C141

2

1

C146

2

1

C150

2

1

C154

2

CLK_NB_14.318M

+NB_PLLVDD

1

C142

C142 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+NB_HTPVDD+1.8VS

1

C147

C147 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+VDDA18HTPLL

1

C151

C151 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+VDDA18PCIEPLL

1

C155

C155 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

close NB

1 2

R840 0_0402_5%EXT@R840 0_0402_5%EXT@

1 2

R110 0_0402_5%INT@R110 0_0402_5%INT@

1 2

R107 0_0402_5%INT@R107 0_0402_5%INT@

+1.1VS

GMCH_LCD_CLK

GMCH_LCD_DATA

GMCH_CRT_CLK

GMCH_CRT_DATA

1 2

R69

EXT@R69

EXT@

4.7K_0402_5%

+3VS

FBMA-L11-160808-221LMT 0603

+1.8VS

FBMA-L11-160808-221LMT 0603

+1.8VS

L6

1 2

FBMA-L11-160808-221LMT 0603

2.2U_0603_6.3V4Z

A_RST#[14,19,29]

NB_PWRGD[20]

+1.8VS

1 2

R70

4.7K_0402_5%

12

R68 300_0402_5%R68 300_0402_5%

EXT@R70

EXT@

POWER_SEL[40]

RS880

4.7U_0603_6.3V6K

L3

1 2

L4

1 2

0.1U_0402_16V4Z

+AVDDQ

1

C148

2

GMCH_CRT_R[18] GMCH_CRT_G[18] GMCH_CRT_B[18]

GMCH_CRT_HSYNC[14,18] GMCH_CRT_VSYNC[14,18]

GMCH_CRT_CLK[18]

GMCH_CRT_DATA[18]

R66 0_0402_5%R66 0_0402_5%

1 2 1 2

R67 0_0402_5%R67 0_0402_5%

CLK_NBGFX[15] CLK_NBGFX#[15]

CLK_SBLINK_BCLK[15] CLK_SBLINK_BCLK#[15]

GMCH_LCD_CLK[16] GMCH_LCD_DATA[16] GMCH_HDMI_DATA[17]

GMCH_HDMI_CLK[17]

POWER_SEL

C696

C679

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K C144

1

2.2U_0603_6.3V4Z

2

+AVDDDI

C144

C145

1

@

2

1

2

20mA

4mA

1

C149

C149 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

GMCH_CRT_HSYNC GMCH_CRT_VSYNC

GMCH_CRT_CLK GMCH_CRT_DATA

1 2

R65 715_0402_1%R65 715_0402_1% +NB_PLLVDD

+NB_HTPVDD

+VDDA18HTPLL

+VDDA18PCIEPLL

For PVT 0118

CLK_NBHT[15] CLK_NBHT#[15]

R83 4.7K_0402_5%

1 2

R106 4.7K_0402_5%

1 2

R82 2K_0402_5%R82 2K_0402_5%

POWER_SEL

+NB_PLLVDD +NB_HTPVDD

NB_LDTSTOP#

NB_ALLOW_LDTSTOP

NB_DISP_CLKP_R NB_DISP_CLKN_R

CLK_NBGFX

CLK_NBGFX CLK_NBGFX#

INT@

INT@ INT@

INT@

close NB

GMCH_LCD_CLK GMCH_LCD_DATA GMCH_HDMI_DATA GMCH_HDMI_CLK

1 2

R85 150_0402_1%R85 150_0402_1%

C143

1

2

1U_0402_6.3V4Z

DAC_RSET

NB_RESET# NB_PWRGD_R

+AVDD1

125mA

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

65mA

A12

PLLVDD(NC)

D14

20mA

PLLVDD18(NC)

B12

PLLVSS(NC)

20mA

H17

VDDA18HTPLL

120mA

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780M_FCBGA528

RS880 A11(SA000032710)

LDT_STOP#[8,19]

R417

300_0402_5%

PART 3 OF 6

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

CLOCKs PLL PWR

MIS.

1 2

C684

@

LVDS_DIGON(PCE_TCALRP)

LVDS_ENA_BL(PWM_GPIO2)

C684

2

1 2

TXOUT_L2N(DBG_GPIO0) TXOUT_L3N(DBG_GPIO2)

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)

LVDS_BLON(PCE_RCALRP)

SUS_STAT#(PWM_GPIO5)

B

1

A

1 2

R64 0_0402_5%@R64 0_0402_5%@

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

THERMALDIODE_P THERMALDIODE_N

TESTMODE

5

P

Y

G

U8

3

NC7SZ08P5X_NL_SC70-5

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

4

15mA 300mA

R73

R63

2.2K_0402_5%

1 2

+VDDLTP18

+VDDLT18

VARY_ENBKL

12

4.7K_0402_5%

R74

@

1 2

R81 0_0402_5%

1 2

R84

1.8K_0402_5%

NB_LDTSTOP#

AMD suggest

12

4.7K_0402_5%

R75

SB_PWRGD[8,20,29]

TXOUT0+ [16] TXOUT0- [16] TXOUT1+ [16] TXOUT1- [16] TXOUT2+ [16] TXOUT2- [16]

TZOUT0+ [16] TZOUT0- [16] TZOUT1+ [16] TZOUT1- [16] TZOUT2+ [16] TZOUT2- [16]

1U_0402_6.3V4Z

TXCLK+ [16] TXCLK- [16] TZCLK+ [16] TZCLK- [16]

R71 0_0402_5%UNVB@R71 0_0402_5%UNVB@

1 2

R72 0_0402_5%VB@R72 0_0402_5%VB@

1 2

R76 0_0402_5%VB@R76 0_0402_5%VB@

1 2

If support VB, pop VB@ and reserve R71

GMCH_HDMI_DET [17]

SUS_STAT# [20] SUS_STAT_R# [14]

1U_0402_6.3V4Z

0.1U_0402_16V4Z

To SB Strap pin

NB_PWRGD

+VDDLTP18

C152

+VDDLT18

C156

2 1

1

C153

2.2U_0603_6.3V4Z

2

1

4.7U_0805_10V4Z

2

GMCH_ENVDD [16] ENBKL [29] GMCH_INVT_PWM [16]

C157

+1.8VS

U4

5

NC7SZ08P5X_NL_SC70-5

P

B

NB_PWRGD_R

4

Y

A

G

@

3

For PVT 0118

L8

1 2

FBMA-L11-160808-221LMT 0603

L10

1 2

BLM18AG601SN1D_2P

+1.8VS

HIGH 0.95V

EMI

C158

@C158

100P_0402_25V8K

12

R91 0_0402_5%R91 0_0402_5%

1 2

@

1 2

NB_ALLOW_LDTSTOP

R86

@ R86

CLK_NB_14.318M

4 4

ALLOW_LDTSTOP[19]

@

1 2

100_0402_5%

R90

1K_0402_5%

A

+1.8VS

1.1VLOW

B

1 2

R87 140_0402_1%R87 140_0402_1%

1 2

R88 150_0402_1%R88 150_0402_1%

1 2

R89 150_0402_1%R89 150_0402_1%

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

13 45Wednesday, June 30, 2010

E

C

A

1U_0402_6.3V4Z

1

C159

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

C170

C161

2

0.1U_0402_16V4Z

1

C176

2

0.1U_0402_16V4Z

1

C185

2

0.1U_0402_16V4Z

+1.8VS

C197

1U_0402_6.3V4Z

1

C167

2

0.1U_0402_16V4Z

1

C201

2

0.1U_0402_16V4Z

1

C177

C178

2

1U_0402_6.3V4Z

1

C186

C190

2

0.1U_0402_16V4Z

1

2

C200

+VDDHTRX

0.1U_0402_16V4Z

12

C165

4.7U_0805_10V4Z

0.1U_0402_16V4Z

12

1

C164

2

4.7U_0805_10V4Z

2

C174

1

4.7U_0603_6.3V6K

1

C179

2

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

1

C166

2

1

C169

2

0.1U_0402_16V4Z

1

C175

2

0.1U_0402_16V4Z

1

C192

2

1U_0402_6.3V4Z

L11

L13

12

10U_0805_10V4Z

L15

4.7U_0603_6.3V6K

L11

C261

@

12

C181

1.3A

+1.1VS

FBMA-L11-201209-221LMA30T_0805

1 1

FBMA-L11-201209-221LMA30T_0805

L14

+1.1VS

FBMA-L11-201209-221LMA30T_0805

2 2

L14

+1.8VS

FBMA-L11-201209-221LMA30T_0805

+VDDHT

1

2

1

2

+VDDHTTX

1

C202

2

0.1U_0402_16V4Z

+VDDA18PCIE

1

2

B

600mA

U3E

J17

VDDHT_1

K16 L16

M16

P16

R16

T16

700mA

H18 G19

F20 E21

D22

B23 A23

680mA

AE25 AD24 AC23

1

AB22 AA21

700mA

10mA

5mA

AE11 AD11

W19 U17 R17 M17

M10

R10 AA9

AB9 AD9 AE9 U10

Y20 V18 T17 P17

J10 P10 K10

L10

W9

H9

T10

Y9

F9

G9

2

PART 5/6

VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)

RS780M_FCBGA528

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

RS880 A11(SA000032710)

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

C

2.5A

23mA

60mA

0.1U_0402_16V4Z

+VDDA11PCIE

10A

1

C1910.1U_0402_16V4Z C1910.1U_0402_16V4Z

2

C198

L12

1 2

FBMA-L11-201209-221LMA30T_0805

C160 10U_0805_10V4ZC160 10U_0805_10V4Z

1 2

C162 10U_0805_10V4ZC162 10U_0805_10V4Z

1 2

C163 4.7U_0805_10V4ZC163 4.7U_0805_10V4Z

1 2

C168 1U_0402_6.3V4ZC168 1U_0402_6.3V4Z

1 2

C171 1U_0402_6.3V4ZC171 1U_0402_6.3V4Z

1 2 1 2

C172 0.1U_0402_16V4ZC172 0.1U_0402_16V4Z

1 2

C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z

1

C1930.1U_0402_16V4Z C1930.1U_0402_16V4Z

C1940.1U_0402_16V4Z C1940.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

C1800.1U_0402_16V4Z C1800.1U_0402_16V4Z

C1880.1U_0402_16V4Z C1880.1U_0402_16V4Z

2

C1820.1U_0402_16V4Z C1820.1U_0402_16V4Z

C1870.1U_0402_16V4Z C1870.1U_0402_16V4Z

2

1

C199

2

D

U3F

A25

VSSAHT1

D23

VSSAHT2

+1.1VS

+NB_CORE

C189 220U_C6_6.3V_M_R15+C189 220U_C6_6.3V_M_R15

1

C1950.1U_0402_16V4Z C1950.1U_0402_16V4Z

C1830.1U_0402_16V4Z C1830.1U_0402_16V4Z

2

+3VS

1

C18410U_0805_10V4Z C18410U_0805_10V4Z

C19610U_0805_10V4Z C19610U_0805_10V4Z

+

2

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

W22

VSSAHT23

W24

VSSAHT24

W25

VSSAHT25

Y21

VSSAHT26

AD25

VSSAHT27

L12

VSS11

M14

VSS12

N13

VSS13

P12

VSS14

P15

VSS15

R11

VSS16

R14

VSS17

T12

VSS18

U14

VSS19

U11

VSS20

U15

VSS21

V12

VSS22

W11

VSS23

W15

VSS24

AC12

VSS25

AA14

VSS26

Y18

VSS27

AB11

VSS28

AB15

VSS29

AB17

VSS30

AB19

VSS31

AE20

VSS32

AB21

VSS33

K11

VSS34

RS780M_FCBGA528

PART 6/6

GROUND

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

E

RS880 A11(SA000032710)

U3D

3 3

Side port and Strap setting

Debug Mode

GMCH_CRT_VSYNC[13,18]

Load EEPROM Strap

SUS_STAT_R#[13]

4 4

Enable Side Port Memory

GMCH_CRT_HSYNC[13,18]

A

D1

@D1

@

CH751H-40_SC76

2 1

R264 3K_0402_5%@R264 3K_0402_5%@

12

R94 3K_0402_5%R94 3K_0402_5% R95 3K_0402_5%

R95 3K_0402_5%

12

R92 3K_0402_5%R92 3K_0402_5%

12

R93 3K_0402_5%@R93 3K_0402_5%@

A_RST# [13,19,29]

12

@

12

+3VS

DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. (VSYNC) 1 : Disable 0 : Enable

DFT_GPIO1: LOAD_EEPROM_STRAPS

Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

Enable Side Port Memory

RS880: HSYNC# 0: Enable 1 : Disable

B

Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

D

U3D

PAR 4 OF 6

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

SBD_MEM/DVO_I/F

Title

Size Document Number Rev

Custom

Date: Sheet of

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

RS780M_FCBGA528

RS880 A11(SA000032710)

AA18 AA20

401829

AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ12(NC)

MEM_DQS1P(NC)

MEM_DQS1N(NC)

MEM_DM0(NC) MEM_DM1/DVO_D8(NC)

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

Compal Electronics, Inc.

SCHEMATICS, MB A5912

15mA 26mA

E

+1.8VS

+1.1VS

14 45Wednesday, June 30, 2010

C

5

4

3

2

1

EXT@

+1.1VS

D D

1 2

FBMA-L11-201209-221LMA30T_0805

1

C515

C515 EXT@

EXT@

2

22U_0805_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C516

C516 EXT@

EXT@

2

0.1U_0402_16V4Z

1

C517

C517 EXT@

EXT@

2

1

C518

C518 EXT@

EXT@

2

0.1U_0402_16V4Z

1

C519

C519 EXT@

EXT@

2

0.1U_0402_16V4Z

1

2

C520

C520 EXT@

EXT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C521

C521 EXT@

EXT@

2

EXT@ L55

EXT@

+3VS

FBMA-L11-201209-221LMA30T_0805

+VDDCLK_IO

L54

EXT@ L54

L55

1 2

+3VS_CLK

1

C522

C522 EXT@

EXT@

2

22U_0805_6.3V6M

1

C523

C523 EXT@

EXT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C524

C524 EXT@

EXT@

2

1

C525

C525 EXT@

EXT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C526

C526 EXT@

EXT@

2

1

C527

C527 EXT@

EXT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C528

C528 EXT@

EXT@

2

1

C529

C529 EXT@

EXT@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C530

C530 EXT@

EXT@

2

1

C531

C531 EXT@

EXT@

2

0.1U_0402_16V4Z

1

C532

C532 EXT@

EXT@ 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1U CLOSE PIN 69

L56

EXT@L56

EXT@

1 2

+3VS

FBMA-L11-201209-221LMA30T_0805

22U_0805_6.3V6M

+3VS_CLK

EXT@

CLK_48M_USB[20]

+3VS_CLK

EXT@

1 2

R238 8.2K_0402_5%

R239 8.2K_0402_5%

0_0402_5%INT@

0_0402_5%INT@ 0_0402_5%INT@

0_0402_5%INT@

1 2

R243 90.9_0402_1%

EXT@

C C

LAN

Mini Card1

B B

A A

LAN_CLKREQ#[25]

MINI1_CLKREQ#[27]

LAN_CLKREQ#_I[20] MINI1_CLKREQ#_I[20]

5

R111

1 2 1 2

R112

CLK_NB_14.318M[13]

+3VS_CLKVDDA

1

C533

C534

EXT@

0.1U_0402_16V4Z

2

EXT@

12

C535 0.1U_0402_16V4Z

+VDDCLK_IO

+3VS_CLK

1 2

R244 158_0402_1%EXT@R244 158_0402_1%EXT@

12

R246 33_0402_5%EXT@R246 33_0402_5%EXT@

4

U17

EXT@

L57

1 2

BLM18AG601SN1D_2P

EXT@

27M_SEL SEL_SATA CLK_14.318M

CLK_48M

CLK_XTAL_IN CLK_XTAL_OUT

U17

ICS 9LPRS488

49 48

62 66

12 18 28 37 53

17 29 38 44 54 61 69

24 51 50 43 42

63 64 65

71 70

67 68

11 19 27 36 47 52 58 72 73

ICS 9LPRS488

VDDA GNDA

VDDREF GNDREF

VDDSRC_IO VDDSRC_IO VDDATIG_IO VDDSB_SRC_IO VDDCPU_IO

3

VDDDOT VDDSRC VDDATIG VDDSB_SRC VDDSATA VDDCPU VDDHTT VDD48

CLKREQ0 # CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

REF2/SEL_27 REF1/SEL_SATA REF0/SEL_HTT66

48MHz_0 48MHz_1

X1 X2

6

GNDDOT GNDSRC GNDSRC GNDATIG GNDSB_SRC GNDSATA GNDCPU GNDHTT GND48 GNDPAD

SLG8SP626VTR_QFN72_10x10

SLG8SP626VTR_QFN72_10x10 EXT@

EXT@

SMBCLK

SMBDAT

SB_SRC_SLOW#

CPUKG0T_LPRS

CPUKG0C_LPRS

HTT0T_LPRS / 66 M HTT0C_LPRS / 66 M

SB_SRC0T_LPRS SB_SRC0C_LPRS

SB_SRC1T_LPRS SB_SRC1C_LPRS

ATIG0T_LPRS ATIG0C_LPRS

ATIG1T_LPRS ATIG1C_LPRS

ATIG2T_LPRS ATIG2C_LPRS

SRC0T_LPRS

SRC0C_LPRS

SRC1T_LPRS

SRC1C_LPRS

SRC2T_LPRS

SRC2C_LPRS

SRC3T_LPRS

SRC3C_LPRS

SRC4T_LPRS

SRC4C_LPRS

SRC5T_LPRS

SRC5C_LPRS

SRC6T/SATAT_LPRS

SRC6C/SATAC_LPRS

SRC7T_LPRS/27MHz_SS

SRC7C_LPRS/27MHz_NS

1 2

41

56 55

60 59

40 39

35 34

33 32

31 30

26 25

23 22

21 20

16 15

14 13

10 9

8 7

46 45

5 4

57

PD#

1st (SILEGO) : SA00001Z310 S IC SLG8SP626VTR QFN 72P CLK GEN 2nd (ICS) : SA000023H10 S IC ICS9LPRS488CKLFT MLF 72P CLK GEN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SB_SMCLK0 [10,11,20,27] SB_SMDAT0 [10,11,20,27]

SRC_SLOW SRC_SLOW

R98 0_0402_5%INT@R98 0_0402_5%INT@

1 2

R108 0_0402_5%

1 2

INT@

R96 0_0402_5%INT@R96 0_0402_5%INT@

1 2

R97 0_0402_5%

1 2

INT@

R100 0_0402_5%INT@R100 0_0402_5%INT@

1 2

R101 0_0402_5%

1 2

INT@

R102 0_0402_5%INT@R102 0_0402_5%INT@

1 2

R103 0_0402_5%

1 2

INT@

CPU_HT_CLKP [19] CPU_HT_CLKN [19]

NB_HT_CLKP [19] NB_HT_CLKN [19]

GPP_CLK1P [19] GPP_CLK1N [19]

GPP_CLK3P [19] GPP_CLK3N [19]

CLK_CPU_BCLK [8] CLK_CPU_BCLK# [8]

CLK_NBHT [13] CLK_NBHT# [13]

CLK_NBGFX [13] CLK_NBGFX# [13]

CLK_PCIE_LAN [25] CLK_PCIE_LAN# [25]

CLK_PCIE_MINI1 [27] CLK_PCIE_MINI1# [27]

CPU

NB HT

NB GFX

GLAN

MiniCard_1

8.2K_0402_5%

R242

8.2K_0402_5%

8.2K_0402_5% EXT@

EXT@

+3VS_CLK

R240

INT@

change to SJ100009R00

CLK_SBLINK_BCLK [13] CLK_SBLINK_BCLK# [13]

CLK_SBSRC_BCLK [19] CLK_SBSRC_BCLK# [19]

EXT@

12

R249 8.2K_0402_5%

2009/10/06 2010/03/12

+3VS_CLK

Compal Secret Data

Deciphered Date

R105 0_0402_5%

R105 0_0402_5% R104 0_0402_5%

R104 0_0402_5%

R113 0_0402_5%

R113 0_0402_5% R114 0_0402_5%

R114 0_0402_5%

INT@

INT@ INT@

INT@

12 12

2

NB A LINK

SB RCLK

CLK_SBLINK_BCLK CLK_SBLINK_BCLK#

CLK_SBSRC_BCLK# CLK_SBSRC_BCLK

Date: Sheet of

Date: Sheet

14.318MHZ_16PF_7A14300003

1

C536

EXT@ C536

EXT@

22P_0402_50V8J

2

Routing the trace at least 10mil

1*

27M_SEL

SEL_HTT66

SEL_SATA

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

SCHEMATICS, MB A5912

NON SPREAD 27M and SPREAD 27M output

0 differential spread SRC_7 output

single-ended 66MHz HTT output

1

differential 100MHz HTT output

*0

NON SPREAD 100M SATA SRC6 output

1* 0

* default

SPREAD 100M SATA SRC6 output

401829

1 2

Y2

EXT@

1

+3VS_CLK

EXT@

INT@

12

R236

8.2K_0402_5%

12

R237

8.2K_0402_5%

R241

8.2K_0402_5%

8.2K_0402_5% EXT@

EXT@

1 2

SEL_SATA 27M_SEL

CLK_XTAL_OUT CLK_XTAL_IN

1

C537 22P_0402_50V8J

22P_0402_50V8J

2

EXT@C537

EXT@

CLK_NB_14.318M

1.1V 158R/90.0RRS880

of

15 45Wednesday, June 30, 2010

C

5

+LCDVDD

12

R250

R250 300_0603_5%

300_0603_5%

13

D

D D

2N7002_SOT23

GMCH_ENVDD[13]

+INVPWR_B+ B+

L58

FBMA-L11-201209-221LMA30T_0805

W=40mils

C544

C C

C544

680P_0402_50V7K

FBMA-L11-201209-221LMA30T_0805

L59

FBMA-L11-201209-221LMA30T_0805

1

C545

C545 68P_0402_50V8J

68P_0402_50V8J

2

EC_INVT_PWM[29]

GMCH_INVT_PWM[13]

GMCH_ENVDD

12

EC_INVT_PWM INVT_PWM

GMCH_INVT_PWM

D

Q11

S

R507

1 2

100K_0402_5%

1 2

R260 0_0402_5%

1 2

R262 0_0402_5%

LCD POWER CIRCUIT

+3VALW

12

2

G

13

D

Q23

2

G

2N7002_SOT23

S

BKOFF#[29]

UNVB@

VB@

4

R251

R251 100K_0402_5%

100K_0402_5%

R252 1K_0402_5%R252 1K_0402_5%

INVT_PWM

12

R319

R319 10K_0402_5%

10K_0402_5%

@

+3VS

G

12

C539

D9

D9 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2 @

@

R172 0_0402_5%R172 0_0402_5%

1 2

R171 10K_0402_5%R171 10K_0402_5%

1 2

2

1

0.047U_0402_16V7K

0.047U_0402_16V7K 2

21

1 3

1

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

+3VS

12

W=60mils

S

AO3413_SOT23-3

AO3413_SOT23-3 Q13

Q13

D

C540

R121

R121 @

@

4.7K_0402_5%

4.7K_0402_5% DISPOFF#DISPOFF#BKOFF#

1

2

+LCDVDD

1

2

C538

4.7U_0805_10V4Z

W=60mils

C541

0.1U_0402_16V4Z

3

+LCDVDD

1

2

C546

C546 10U_0805_10V4Z

10U_0805_10V4Z

DAC_BRIG INVT_PWM DISPOFF#

LCD/LED PANEL Conn.

1

C547

0.1U_0402_16V4Z

2

@

1 2

C542 220P_0402_50V7K

1 2

C543 220P_0402_50V7KC543 220P_0402_50V7K

1 2

C548 220P_0402_50V7KC548 220P_0402_50V7K

JLVDS1

41

G1

42

G2

43

G3

44

G4

45

G5

46

G6

IPEX_20143-040E-20F

IPEX_20143-040E-20F CONN@

CONN@

2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

+LCDVDD_L

INVT_PWM

DISPOFF# GMCH_LCD_CLK GMCH_LCD_DATA

TXOUT0-

TXOUT0+

TXOUT1-

TXOUT1+

TXOUT2-

TXOUT2+

TXCLK-

TXCLK+

TZOUT0-

TZOUT0+

TZOUT1-

TZOUT1+

TZOUT2-

TZOUT2+

TZCLK-

TZCLK+

USB20_CMOS_N5

USB20_CMOS_P5

+3VS

+INVPWR_B+

+LCDVDD +3VS

USB20_CMOS_P5

@

12

R841 0_0603_5%

GMCH_LCD_CLK [13] GMCH_LCD_DATA [13]

TXOUT0- [13] TXOUT0+ [13]

TXOUT1- [13] TXOUT1+ [13]

TXOUT2- [13] TXOUT2+ [13]

TXCLK- [13] TXCLK+ [13]

TZOUT0- [13] TZOUT0+ [13]

TZOUT1- [13] TZOUT1+ [13]

TZOUT2- [13] TZOUT2+ [13]

TZCLK- [13] TZCLK+ [13]

R256 0_0402_5%R256 0_0402_5% R257 0_0402_5%R257 0_0402_5%

6

5

4

DAC_BRIG [29]

R842 0_0402_5%@R842 0_0402_5%@

R843 0_0402_5%@R843 0_0402_5%@

+3VS

12 12

D14

@D14

@

CH3

CH2

Vp

CH4

CM1293-04SO_SOT23-6

Vn

CH1

3

2

1

+LCDVDD

12

USB20_N5 [20] USB20_P5 [20]

USB20_CMOS_N5

LOCAL_DIM [29]

COLOY_ENG_EN [29]

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

16 45Wednesday, June 30, 2010

1

C

of

5

4

3

2

1

+3VS

R274

R275

1 2

@

10K_0402_5%

1 2

10K_0402_5%

@

D D

GMCH_HDMI_CLK[13]

@

<5V tolerant>

GMCH_HDMI_DATA[13]

G

S

G

2

BSH111 1N_SOT23-3

13

D

S

D

S

Q17

BSH111 1N_SOT23-3

HDMI@

R278 0_0402_5%

HDMI@

R279 0_0402_5%

Check 5V tolerant

Place closed to JHDMI1

+HDMI_5V_OUT+3VS

D3

+HDMI_5V_OUT_1

2 1

12

HDMI@

4.7K_0402_5%

HDMI@ R277

R277

4.7K_0402_5%

HDMI_SCLK

HDMI_SDATA

HDMI@

R276

2

13

D

@

Q16

@

12

+5VS

RB491D_SC59-3

RB491D_SC59-3 HDMI@

HDMI@

1.1A_6VDC_FUSE

F1

HDMI@

+HDMI_5V_OUT

21

W=40mils

1

C549

0.1U_0402_16V4Z

0.1U_0402_16V4Z HDMI@

HDMI@

2

+HDMI_5V_OUT

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0HDMI_R_D0+

HDMI_R_D1HDMI_R_D1+

HDMI_R_D2HDMI_R_D2+

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11 10

9 8 7 6 5 4 3 2 1

GND

CK_shield

GND

CK+

GND

D0-

GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

SUYIN_100042MR019S153ZL

SUYIN_100042MR019S153ZL CONN@

CONN@

20 21 22 23

+3VS

HDMI@

12

R284

10K_0402_5%

HDMI@

HDMI@ R280

R280 0_0402_5%

0_0402_5%

1 2

C

2

B

R281 150K_0402_5%

E

HDMI@

3 1

Q18

Q18 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

12

HDMI@

1 2

HDMI_HPD

12

HDMI@

R283

R283 365K_0402_1%

365K_0402_1%

C681

1

@

2

+HDMI_5V_OUT

1 2

1

5

P

4

OE#

A2Y

G

3

SN74AHCT1G125GW_SOT353-5

U40

U40 @

@

R303 0_0402_5%

@

@ R304

R304

4.7K_0402_5%

4.7K_0402_5% 12

@

+3VS

GMCH_HDMI_DET

HDMI_HPD

Reserve

R411

100K_0402_5%

@

C687

1

0.1U_0402_16V7K

0.1U_0402_16V7K @

@

2

1 2

GMCH_HDMI_DET[13]

GMCH_HDMI_DET

R282 0_0402_5%

HDMI@

C C

0.1U_0402_16V7K

HDMI@

HDMI_C_CLK-

UMA 715 ohm

GMCH_HDMI_TXD2-[12]

B B

GMCH_HDMI_TXD2+[12] GMCH_HDMI_TXD1-[12]

GMCH_HDMI_TXD1+[12] GMCH_HDMI_TXD0-[12]

GMCH_HDMI_TXD0+[12] GMCH_HDMI_TXC-[12]

GMCH_HDMI_TXC+[12]

C550 0.1U_0402_16V7KHDMI@C550 0.1U_0402_16V7KHDMI@ C551 0.1U_0402_16V7KHDMI@C551 0.1U_0402_16V7KHDMI@

C552 0.1U_0402_16V7KHDMI@C552 0.1U_0402_16V7KHDMI@ C553 0.1U_0402_16V7KHDMI@C553 0.1U_0402_16V7KHDMI@

C554 0.1U_0402_16V7KHDMI@C554 0.1U_0402_16V7KHDMI@ C555 0.1U_0402_16V7KHDMI@C555 0.1U_0402_16V7KHDMI@

C556 0.1U_0402_16V7KHDMI@C556 0.1U_0402_16V7KHDMI@ C557 0.1U_0402_16V7KHDMI@C557 0.1U_0402_16V7KHDMI@

12 12

HDMI_C_TX2HDMI_C_TX2+

HDMI_C_TX1HDMI_C_TX1+

HDMI_C_TX0HDMI_C_TX0+

HDMI_C_CLKHDMI_C_CLK+

+HDMI_5V_OUT

HDMI@

R286 715_0402_1%HDMI@R286 715_0402_1%HDMI@

1 2

R287 715_0402_1%HDMI@R287 715_0402_1%HDMI@

1 2

R289 715_0402_1%HDMI@R289 715_0402_1%HDMI@

1 2

R290 715_0402_1%HDMI@R290 715_0402_1%HDMI@

1 2

R292 715_0402_1%HDMI@R292 715_0402_1%HDMI@

1 2

R293 715_0402_1%HDMI@R293 715_0402_1%HDMI@

1 2

R294 715_0402_1%HDMI@R294 715_0402_1%HDMI@

1 2

R295 715_0402_1%HDMI@R295 715_0402_1%HDMI@

1 2

R302

1 2

12

HDMI@

R298

R298 100K_0402_5%

100K_0402_5%

0_0402_5%

10mil

13

D

2N7002_SOT23

2

Q19

G

HDMI@

S

10mil

Place closed to JHDMI1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/06 2010/03/12

L60

L60 WCM-2012-900T_0805

WCM-2012-900T_0805 @

@

HDMI_C_CLK+

HDMI_C_TX0-

L61

L61 WCM-2012-900T_0805

WCM-2012-900T_0805 @

@

HDMI_C_TX0+

HDMI_C_TX1-

L62

L62 WCM-2012-900T_0805

WCM-2012-900T_0805 @

@

HDMI_C_TX1+

HDMI_C_TX2-

L63

L63 WCM-2012-900T_0805

WCM-2012-900T_0805 @

@

HDMI_C_TX2+

Compal Secret Data

Deciphered Date

HDMI@

R285 0_0402_5%

1 2

1

4

R288 0_0402_5%

1 2

HDMI@

R291 0_0402_5%HDMI@R291 0_0402_5%HDMI@

1 2

1

4

R296 0_0402_5%

1 2

HDMI@

R297 0_0402_5%HDMI@R297 0_0402_5%HDMI@

1 2

1

4

R299 0_0402_5%

1 2

HDMI@

R300 0_0402_5%HDMI@R300 0_0402_5%HDMI@

1 2

1

4

R301 0_0402_5%

1 2

HDMI@

2

3

2

3

2

3

2

3

2

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

17 45Wednesday, June 30, 2010

1

C

A

CRT Connector

1 1

GMCH_CRT_R[13]

GMCH_CRT_G[13]

GMCH_CRT_B[13]

2 2

GMCH_CRT_R

GMCH_CRT_G

GMCH_CRT_B

GMCH_CRT_HSYNC[13,14]

12

R407 0_0402_5%R407 0_0402_5%

12

R408 0_0402_5%R408 0_0402_5%

12

R409 0_0402_5%R409 0_0402_5%

C569 0.1U_0402_16V4ZC569 0.1U_0402_16V4Z

1 2

GMCH_CRT_HSYNC

GMCH_CRT_VSYNC[13,14]

C571 0.1U_0402_16V4ZC571 0.1U_0402_16V4Z

12

R305

140_0402_1%

+CRT_VCC

1

5

U18

P

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

1 2

GMCH_CRT_VSYNC

B

R307

150_0402_1%

4

C

2

3

D4

PJDLC05C_SOT23-3

@

CRT_R_1

CRT_G_1

CRT_B_1

12

R308

R308 150_0402_1%

150_0402_1%

R312 10K_0402_5%R312 10K_0402_5%

+CRT_VCC

5

P

A2Y

G

3

1

C559

C560

2

10P_0402_50V8J

12

CRT_HSYNC_1

1

U19

CRT_VSYNC_1

4

OE#

74AHCT1G125GW_SOT353-5

1

2

L64 FCM2012CF-800T06_2PL64 FCM2012CF-800T06_2P

1 2

L65 FCM2012CF-800T06_2PL65 FCM2012CF-800T06_2P

1 2

L66 FCM2012CF-800T06_2PL66 FCM2012CF-800T06_2P

1 2

1

C561

2

10P_0402_50V8J

C562

10P_0402_50V8J

1

C563

2

10P_0402_50V8J

L67

1 2

FCM2012CF-800T06_2P

FCM2012CF-800T06_2P L68

L68

1 2

FCM2012CF-800T06_2P

3

1

2

D5

PJDLC05C_SOT23-3

@

1

C564

2

10P_0402_50V8J

C566

10P_0402_50V8J

CRT_R_2

CRT_G_2

CRT_B_2

CRT_HSYNC_2

CRT_VSYNC_2

1

2

D

+5VS

1

C567

C567 10P_0402_50V8J

10P_0402_50V8J

2

W=40mils

D7

2 1

RB491D_SC59-3

1

2

F2

1.1A_6VDC_FUSE

0.1U_0402_16V4Z

C565

C565 100P_0402_50V8J

100P_0402_50V8J

1

2

C568

68P_0402_50V8J

C558

21

1

2

W=40mils

1

2

DSUB_12

DSUB_15

C570

C570 68P_0402_50V8J

68P_0402_50V8J

E

+CRT_VCC+R_CRT_VCC

JCRT1

6

11

1 7

12

2 8

13

3 9

14

G

4

G

10 15

5

C-H_13-12201513CP

C-H_13-12201513CP CONN@

CONN@

R311

R311 100K_0402_5%

100K_0402_5%

1 2

+CRT_VCC

16 17

CRT_DET# [20]

+CRT_VCC

Close to Conn side

3 3

4.7K_0402_5%

DSUB_12

DSUB_15

R317

12

R318

4.7K_0402_5%

R321 0_0402_5%R321 0_0402_5%

R323 0_0402_5%R323 0_0402_5%

Check 5V tolerant for DISO state

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VS

2

G

@

1 3

D

S

D

Q53

BSH111 1N_SOT23-3

S

2

G

1 3

D

Q65

BSH111 1N_SOT23-3

12

2009/10/06 2010/03/12

GMCH_CRT_DATA

@

GMCH_CRT_CLK

S

Compal Secret Data

Deciphered Date

GMCH_CRT_DATA [13]

GMCH_CRT_CLK [13]

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

18 45Wednesday, June 30, 2010

E

C

A

C572 150P_0402_50V8JC572 150P_0402_50V8J

1 2

A_RST#[13,14,29]

SB_RX0P[12] SB_RX0N[12] SB_RX1P[12] SB_RX1N[12] SB_RX2P[12] SB_RX2N[12] SB_RX3P[12]

+3VS

1 2

SB_RX3N[12]

SB_TX0P[12]

SB_TX0N[12]

SB_TX1P[12]

SB_TX1N[12]

SB_TX2P[12]

SB_TX2N[12]

SB_TX3P[12]

SB_TX3N[12]

R329

4.7K_0402_5%

1 1

+1.5VS

G

2

13

D

S

D

S

Q21

FDV301N_NL_SOT23-3

2 2

FDV301N_NL_SOT23-3

level shift to ISL6265

ISL6265 PWROK input, TTL level: 0.8V~2.0V When this pin is high, the SVI interface is

active and I2C protocol is running. While this pin is low, the SVC, SVD, and VFIXEN input states determine the pre-PWROK metal VID or VFIX mode voltage. This pin must be low prior to the ISL6265 PGOOD output going high

A_RST#

C579 0.1U_0402_16V7KC579 0.1U_0402_16V7K

1 2

C573 0.1U_0402_16V7KC573 0.1U_0402_16V7K

1 2

C574 0.1U_0402_16V7KC574 0.1U_0402_16V7K

1 2

C575 0.1U_0402_16V7KC575 0.1U_0402_16V7K

1 2

C576 0.1U_0402_16V7KC576 0.1U_0402_16V7K

1 2

C580 0.1U_0402_16V7KC580 0.1U_0402_16V7K

1 2

C577 0.1U_0402_16V7KC577 0.1U_0402_16V7K

1 2

C578 0.1U_0402_16V7KC578 0.1U_0402_16V7K

1 2

R326 590_0402_1%R326 590_0402_1%

+1.1VS_PCIE

H_PWRGD_L [43]

R327 2K_0402_1%R327 2K_0402_1%

CLK_SBSRC_BCLK[15] CLK_SBSRC_BCLK#[15]

NB_DISP_CLKP[13] NB_DISP_CLKN[13]

LAN

MINI

3 3

1 2

C689

C689 27P_0402_50V8J

27P_0402_50V8J

25MHZ_20PF_7A25000012

1 2

C688

C688 27P_0402_50V8J

27P_0402_50V8J

12

Y6

25M_CLK_X1

R426

R426 1M_0603_5%

1M_0603_5%

25M_CLK_X2

AMD suggest add Crystal for Internal CLK GEN

R332 20M_0402_5%@R332 20M_0402_5%@

1 2

C582

4 4

1 2

18P_0402_50V8J

R335

20M_0603_5%

C586

1 2

18P_0402_50V8J

12

A

Y3

1

OSC

NC

4

OSC

NC

32.768KHZ_12.5PF_Q13MC14610002

11/10 for DVT

2 3

SB_32KHI

Close to SB

SB_32KHO

B

R370

R370 33_0402_5%@

33_0402_5%@

12

33_0402_5%

12

R325

SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

12 12

NB_HT_CLKP[15] NB_HT_CLKN[15]

CPU_HT_CLKP[15] CPU_HT_CLKN[15]

GPP_CLK1P[15] GPP_CLK1N[15]

GPP_CLK3P[15] GPP_CLK3N[15]

25M_CLK_X1

25M_CLK_X2

B

U20A

P1

PCIE_RST#

L1

A_RST#

AD26

A_TX0P

AD27

A_TX0N

AC28

A_TX1P

AC29

A_TX1N

AB29

A_TX2P

AB28

A_TX2N

AB26

A_TX3P

AB27

A_TX3N

AE24

A_RX0P

AE23

A_RX0N

AD25

A_RX1P

AD24

A_RX1N

AC24

A_RX2P

AC25

A_RX2N

AB25

A_RX3P

AB24

A_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

SB820M_FCBGA605

Part 1 of 5

SB800

PCI CLKS

PCI EXPRESS INTERFACES

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT3#/CLK_REQ7#/GPIO46

LDRQ1#/CLK_REQ6#/GPIO49

CLOCK GENERATOR

ALLOW_LDTSTP/DMA_ACTIVE#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCICLK4/14M_OSC/GPO39

CPU

RTC

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

FRAME#

DEVSEL#

PCI INTERFACELPC

REQ1#/GPIO40

GNT1#/GPO44 GNT2#/GPO45

CLKRUN#

INTE#/GPIO32 INTF#/GPIO33

INTG#/GPIO34

INTH#/GPIO35

LPCCLK0 LPCCLK1

LFRAME#

LDRQ0#

SERIRQ/GPIO48

PROCHOT#

LDT_PG LDT_STP# LDT_RST#

RTCCLK

INTRUDER_ALERT#

VDDBT_RTC_G

C

CBE0# CBE1# CBE2# CBE3#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

GNT0#

LOCK#

LAD0 LAD1 LAD2 LAD3

32K_X1 32K_X2

D

W2 W1 W3 W4 Y1

V2

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

C1 C2 D2

B2 B1

2009/10/06 2010/03/12

PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29H_PWRGD

SB_32KHI

SB_32KHO

T26PAD T26PAD

CLKRUN# [29]

T21PAD T21PAD

C584

1

2

0.1U_0402_16V4Z

Compal Secret Data

PCI_CLK1 [23] PCI_CLK2 [23] PCI_CLK3 [23] PCI_CLK4 [23]

SB_GPIO_A_RST#[20]

PCI_AD23 [23] PCI_AD24 [21,23] PCI_AD25 [23] PCI_AD26 [23] PCI_AD27 [23] PCI_AD28 [23] PCI_AD29 [23]

1 2

R330 22_0402_5%R330 22_0402_5%

LPC_AD0 [29] LPC_AD1 [29] LPC_AD2 [29] LPC_AD3 [29] LPC_FRAME# [29]

SERIRQ [29]

ALLOW_LDTSTOP [13] H_PROCHOT_R# [8] H_PWRGD [8] LDT_STOP# [8,13] LDT_RST# [8]

R333 510_0402_5%R333 510_0402_5%

C585

1

2

for Clear CMOS

1U_0402_6.3V4Z

Deciphered Date

AMD suggest add GPIO control gate

A_RST#

PCI_AD24 : VDDR Voltage SW

LPC_CLK0_ECLPCCLK0

1 2

W=20mils

D

1 2

R427 0_0402_5%@R427 0_0402_5%@

1 2

R425 0_0402_5%R425 0_0402_5%

R328

8.2K_0402_5%

LPC_CLK0_EC [23,29]

LPC_CLK1 [23]

R334

@

0_0603_5%

1 2

E

+3VALW

C581

1 2

0.1U_0402_16V4Z

5

U21

2

P

B

1

A

12

@

+RTCVCC

1

C583

2

0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

PLT_RST#

4

Y

G

NC7SZ08P5X_NL_SC70-5

3

D8

3

2

BAS40-04_SOT23-3

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

PLT_RST# [25,27]

+RTCBATT

12

1

E

R331

R331 1K_0402_5%

1K_0402_5%

+CHGRTC

19 45Wednesday, June 30, 2010

C

of

A

+3VALW

R336

R336 100K_0402_5%

100K_0402_5%

1 2

CRT_DET

13

D

CRT_DET#[18]

1 1

+3VS

R340 2.2K_0402_5%@R340 2.2K_0402_5%@ R341 100K_0402_5%R341 100K_0402_5%

R415 2.2K_0402_5%@R415 2.2K_0402_5%@ R416 100K_0402_5%R416 100K_0402_5%

R418 2.2K_0402_5%VB@R418 2.2K_0402_5%VB@ R588 100K_0402_5%UNVB@R588 100K_0402_5%UNVB@

R402 2.2K_0402_5%R402 2.2K_0402_5%

2 2

3 3

4 4

R406

R406 R846 2.2K_0402_5%@R846 2.2K_0402_5%@

R847 100K_0402_5%R847 100K_0402_5%

+3VALW

2

G

S

2N7002_SOT23

1 2

R339 2.2K_0402_5%R339 2.2K_0402_5%

1 2 1 2

1 2

100K_0402_5%@

12

1 2

12

@

1 2

R349 10K_0402_5%

@

1 2

R350 10K_0402_5%

@

1 2

R351 10K_0402_5%

1 2

R355 10K_0402_5%R355 10K_0402_5%

@

1 2

R357 100K_0402_5%

1 2

R359 2.2K_0402_5%R359 2.2K_0402_5%

1 2

R360 2.2K_0402_5%R360 2.2K_0402_5%

1 2

R361 10K_0402_5%R361 10K_0402_5%

1 2

R362 2.2K_0402_5%R362 2.2K_0402_5%

1 2

R363 2.2K_0402_5%R363 2.2K_0402_5%

Q22

EC_RSMRST#

HDA_BITCLK_AUDIO[31]

HDA_SDOUT[23]

HDA_SDOUT_AUDIO[31]

HDA_SDIN0[31]

HDA_BITCLK HDA_SDIN0 HDA_SDIN1

SB_PCIE_WAKE#

EC_LID_OUT#

H_THERMTRIP#

A

SKU_ID

PX_FN

VB_EN

CLK_MODE

MUXLESS_SEL

HDA_SYNC_AUDIO[31]

HDA_RST_AUDIO#[31]

SB_SIC SB_SID

SB_SMCLK1 SB_SMDAT1

SKU ID: 1-> VGA 0-> UMA

PX Function: 1-> PX Enable 0-> PX Disable *

VB Function: 1-> VB Enable 0-> VB Disable *

LAY_SEL: 1-> 6L* 0-> 8L

MUXLESS SEL: 1->PX with Muxless 0->PX with Mux

+3VS

+3VALW

Cinfigure to output or Internal PU/PD

R345 33_0402_5%R345 33_0402_5%

1 2

R346 33_0402_5%R346 33_0402_5%

1 2

R342 2.2K_0402_5%R342 2.2K_0402_5%

1 2

R343 2.2K_0402_5%R343 2.2K_0402_5%

1 2

R344 4.7K_0402_5%R344 4.7K_0402_5%

1 2

R352 10K_0402_5%R352 10K_0402_5%

1 2

R420 10K_0402_5%@R420 10K_0402_5%@

1 2

R353 10K_0402_5%@R353 10K_0402_5%@

1 2

R428 10K_0402_5%R428 10K_0402_5%

1 2

R354 10K_0402_5%@R354 10K_0402_5%@

1 2

R429 10K_0402_5%R429 10K_0402_5%

1 2

R356 10K_0402_5%@R356 10K_0402_5%@

1 2

R430 10K_0402_5%R430 10K_0402_5%

1 2

R358 10K_0402_5%R358 10K_0402_5%

1 2

R431 10K_0402_5%@R431 10K_0402_5%@

1 2

B

PM_SLP_S3#[29] PM_SLP_S5#[29] PBTN_OUT#[29] SB_PWRGD[8,13,29] SUS_STAT#[13]

EC_KBRST#[29]

SB_PCIE_WAKE#[25,27]

H_THERMTRIP#[8]

NB_PWRGD[13]

EC_RSMRST#[29]

MINI1_CLKREQ#_I[15]

SB_GPIO_A_RST#[19]

SB_SPKR[31] SB_SMCLK0[10,11,15,27] SB_SMDAT0[10,11,15,27]

Check SW:

LAN_CLKREQ#_I[15]

EC_LID_OUT#[29]

USB_OC#2[28] USB_OC#1[28] USB_OC#0[28]

HDA_BITCLK

R347 33_0402_5%R347 33_0402_5%

1 2

R348 33_0402_5%R348 33_0402_5%

1 2

SB_SMCLK0 SB_SMDAT0

SUS_STAT#

GBE_MDIO

GBE_COL

GBE_CRS

GBE_RXERR

GBE_PHY_INTR

B

EC_SWI#[29]

EC_GA20[29] EC_SCI#[29]

EC_SMI#[29]

HDA_SDOUT HDA_SDIN0 HDA_SDIN1

CRT_DET

SUS_STAT#

T24 PADT24 PAD T22 PADT22 PAD T23 PADT23 PAD

H_THERMTRIP# NB_PWRGD

EC_RSMRST# CLK_MODE

SB_GPIO_A_RST#

SKU_ID MUXLESS_SEL PX_FN

SB_SMCLK0 SB_SMDAT0 SB_SMCLK1 SB_SMDAT1

VB_EN

EC_LID_OUT#

T27 PADT27 PAD

USB_OC#2 USB_OC#1 USB_OC#0

HDA_SYNC HDA_RST#

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR

T28 PADT28 PAD T29 PADT29 PAD

C

U20D

J2

PCI_PME#/GEVENT4#

K1

RI#/GEVENT22#

D3

SPI_CS3#/GBE_STAT1/GEVENT21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_BTN#

H5

PWR_GOOD

G6

SUS_STAT#

B3

TEST0

C4

TEST1/TMS

F6

TEST2

AD21

GA20IN/GEVENT0#

AE21

KBRST#/GEVENT1#

K2

LPC_PME#/GEVENT3#

J29

LPC_SMI#/GEVENT23#

H2

GEVENT5#

J1

SYS_RESET#/GEVENT19#

H6

WAKE#/GEVENT8#

F3

IR_RX1/GEVENT20#

J6

THRMTRIP#/SMBALERT#/GEVENT2#

AC19

NB_PWRGD

G1

RSMRST#

AD19

CLK_REQ4#/SATA_IS0#/GPIO64

AA16

CLK_REQ3#/SATA_IS1#/GPIO63

AB21

SMARTVOLT1/SATA_IS2#/GPIO50

AC18

CLK_REQ0#/SATA_IS3#/GPIO60

AF20

SATA_IS4#/FANOUT3/GPIO55

AE19

SATA_IS5#/FANIN3/GPIO59

AF19

SPKR/GPIO66

AD22

SCL0/GPIO43

AE22

SDA0/GPIO47

F5

SCL1/GPIO227

F4

SDA1/GPIO228

AH21

CLK_REQ2#/FANIN4/GPIO62

AB18

CLK_REQ1#/FANOUT4/GPIO61

E1

IR_LED#/LLB#/GPIO184

AJ21

SMARTVOLT2/SHUTDOWN#/GPIO51

H4

DDR3_RST#/GEVENT7#

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9#

G5

GBE_LED2/GEVENT10#

K3

GBE_STAT0/GEVENT11#

AA20

CLK_REQG#/GPIO65/OSCIN

H3

BLINK/USB_OC7#/GEVENT18#

D1

USB_OC6#/IR_TX1/GEVENT6#

E4

USB_OC5#/IR_TX0/GEVENT17#

D4

USB_OC4#/IR_RX0/GEVENT16#

E8

USB_OC3#/AC_PRES/TDO/GEVENT15#

F7

USB_OC2#/TCK/GEVENT14#

E7

USB_OC1#/TDI/GEVENT13#

F8

USB_OC0#/TRST#/GEVENT12#

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST#

V7

GBE_PHY_INTR

E23

PS2_DAT/SDA4/GPIO187

E24

PS2_CLK/SCL4/GPIO188

F21

SPI_CS2#/GBE_STAT2/GPIO166

G29

FC_RST#/GPO160

D27

PS2KB_DAT/GPIO189

F28

PS2KB_CLK/GPIO190

F29

PS2M_DAT/GPIO191

E27

PS2M_CLK/GPIO192

SB820M_FCBGA605

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SB800

Part 4 of 5

GBE LAN

C

HD AUDIO

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

GPIO

USB OC

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199 EC_PWM3/EC_TIMER3/GPIO200

EMBEDDED CTRL

2009/10/06 2010/03/12

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB 1.1 USB MISCEMBEDDED CTRL

USB 2.0

SCL2/GPIO193 SDA2/GPIO194

SCL3_LV/GPIO195

SDA3_LV/GPIO196

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

Compal Secret Data

USB_RCOMP

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9N

USB_HSD8N

USB_HSD7N

USB_HSD6N

USB_HSD5N

USB_HSD4N

USB_HSD3N

USB_HSD2N

USB_HSD1N

USB_HSD0N

USB_FSD1N

USB_FSD0N

USB_HSD9P

USB_HSD8P

USB_HSD7P

USB_HSD6P

USB_HSD5P

USB_HSD4P

USB_HSD3P

USB_HSD2P

USB_HSD1P

USB_HSD0P

Deciphered Date

A10 G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

D

USB_RCOMP

USB20_P14 USB20_N14

USB20_P9 USB20_N9

USB20_P8 USB20_N8

USB20_P7 USB20_N7

USB20_P6 USB20_N6

USB20_P5 USB20_N5

USB20_P2 USB20_N2

USB20_P1 USB20_N1

USB20_P0 USB20_N0

1 2

Check SW: Cinfigure to output or Internal PU/PD

D

@

1 2

R337 100_0402_5%

R33811.8K_0402_1% R33811.8K_0402_1%

USB20_P14 [28] USB20_N14 [28]

USB20_P9 [28] USB20_N9 [28]

USB20_P8 [27] USB20_N8 [27]

USB20_P7 [28] USB20_N7 [28]

USB20_P6 [28] USB20_N6 [28]

USB20_P5 [16] USB20_N5 [16]

USB20_P2 [28] USB20_N2 [28]

USB20_P1 [28] USB20_N1 [28]

USB20_P0 [28] USB20_N0 [28]

SB_SIC [8] SB_SID [8]

GPIO199 [23] GPIO200 [23]

E

@

C587 100P_0402_25V8K

1 2

CLK_48M_USB [15]

OHCI4

BT

EHCI13 / OHCI3

WWAN

Mini1-WLAN

For China WWAN Port7 and Port9 is disable for

CardReader

EHCI2 / OHCI2

2009 AMD platform

Camera

EHCI1 / OHCI1

Ext USB3

Ext USB2

Ext USB1

STRAP PIN

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

20 45Wednesday, June 30, 2010

E

C

A

1 1

HDD

ODD

2 2

SATA_STX_DRX_P0[24] SATA_STX_DRX_N0[24]

SATA_DTX_C_SRX_N0[24] SATA_DTX_C_SRX_P0[24]

SATA_STX_DRX_P1[24] SATA_STX_DRX_N1[24]

SATA_DTX_C_SRX_N1[24] SATA_DTX_C_SRX_P1[24]

+1.1VS_SATA

SATA_LED#[30]

R367 10K_0402_5%R367 10K_0402_5%

+3VS

B

R364 1K_0402_1%R364 1K_0402_1%

R365 931_0402_1%R365 931_0402_1%

1 2

12 12

SATA_CALRP SATA_CALRN

SATA_X1

SATA_X2

AH10

AJ10

AG10

AF10

AG12

AF12

AJ12

AH12 AH14

AJ14

AG14

AF14

AG17

AF17

AJ17

AH17

AJ18

AH18 AH19

AJ19

AB14 AA14

AD11

AD16

AC16

U20B

AH9

AJ9 AJ8

AH8

SATA_TX0P SATA_TX0N

SATA_RX0N SATA_RX0P

SATA_TX1P SATA_TX1N

SATA_RX1N SATA_RX1P

SATA_TX2P SATA_TX2N

SATA_RX2N SATA_RX2P

SATA_TX3P SATA_TX3N

SATA_RX3N SATA_RX3P

SATA_TX4P SATA_TX4N

SATA_RX4N SATA_RX4P

SATA_TX5P SATA_TX5N

SATA_RX5N SATA_RX5P

SATA_CALRP SATA_CALRN

SATA_ACT#/GPIO67

SATA_X1

SATA_X2

C

SB800

Part 2 of 5

SERIAL ATA

TEMPIN3/TALERT#/GPIO174

HW MONITOR

FC_CLK

FC_FBCLKOUT

FC_FBCLKIN

FC_OE#/GPIOD145

FC_AVD#/GPIOD146

FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150

FC_INT1/GPIOD144

FC_INT2/GPIOD147

FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140

FLASH

FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMP_COMM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

R366

@R366

@

1 2

0_0402_5%

MEM_1V5

D

EC_THERM# [29]

Check SW: Cinfigure to output or Internal PU/PD

E

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO163

K4

SPI_CLK/GPIO162

K9

SPI_CS1#/GPIO165

@

1 2

C588

C588 27P_0402_50V8J

3 3

27P_0402_50V8J

25MHZ_20PF_7A25000012

1 2

C589

C589 27P_0402_50V8J

27P_0402_50V8J

12

@

Y4

@

12

@

@ R368

R368 10M_0402_5%

10M_0402_5%

SATA_X1

SATA_X2

AMD Suggest Unpop Y4 For DVT 11/17

4 4

A

B

G2

ROM_RST#/GPIO161

SB820M_FCBGA605

SPI ROM

SB820 A12(SA00003IW10)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MEM_1V5 is for gating the glitch on PCI_AD24

PCI_AD24 1 : VDDR=1.05V 0 : VDDR=0.9V

C

2009/10/06 2010/03/12

G27

NC1

Y2

NC2

+3VS

C685

12

0.1U_0402_16V4Z

MEM_1V5

PCI_AD24[19,23]

1 2

R422 0_0402_5%R422 0_0402_5%

0.1U_0402_16V4Z 5

2

P

B

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

@

1 2

R423 0_0402_5%

U22

4

For PVT 0118

1 2

R424 33_0402_5%R424 33_0402_5%

2

C686

C686 150P_0402_50V8J

150P_0402_50V8J

1

VDDR_SW [40]

For VDDR Voltage Switch, AMD suggest

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

21 45Wednesday, June 30, 2010

E

C

A

1 2

R371 0_0402_5%R371 0_0402_5%

+VDDPL_3V_PCIE

+1.1VS_PCIE

12

+VDDPL_3V_SATA

+1.1VS_SATA

12

L72

12

131mA

567mA

+AVDD_USB

+1.1V_USB

+3VS

1 1

+1.1VS

2 2

+1.1VS

1 2 C591 22U_0805_6.3V6MC591 22U_0805_6.3V6M C592 0.1U_0402_16V4ZC592 0.1U_0402_16V4Z

1 2 C593 0.1U_0402_16V4ZC593 0.1U_0402_16V4Z

1 2 C599 0.1U_0402_16V4ZC599 0.1U_0402_16V4Z

1 2

L70

FBMA-L11-201209-221LMA30T_0805

L70

C604 22U_0805_6.3V6MC604 22U_0805_6.3V6M

1 2

C605 1U_0402_6.3V4ZC605 1U_0402_6.3V4Z

1 2

C606 0.1U_0402_16V4ZC606 0.1U_0402_16V4Z

1 2

C607 0.1U_0402_16V4ZC607 0.1U_0402_16V4Z

1 2

L71

C610 22U_0805_6.3V6MC610 22U_0805_6.3V6M

1 2

C611 1U_0402_6.3V4ZC611 1U_0402_6.3V4Z

1 2

C612 1U_0402_6.3V4ZC612 1U_0402_6.3V4Z

1 2

C613 0.1U_0402_16V4ZC613 0.1U_0402_16V4Z

1 2

C614 0.1U_0402_16V4ZC614 0.1U_0402_16V4Z

1 2

check 220ohm bead

+3VALW

FBMA-L11-201209-221LMA30T_0805

C617 10U_0805_10V4ZC617 10U_0805_10V4Z

1 2

C618 10U_0805_10V4ZC618 10U_0805_10V4Z

1 2

C619 1U_0402_6.3V4ZC619 1U_0402_6.3V4Z

1 2

C620 1U_0402_6.3V4ZC620 1U_0402_6.3V4Z

1 2

C621 0.1U_0402_16V4ZC621 0.1U_0402_16V4Z

1 2

L74

3 3

+1.1VALW

L74

FBMA-L11-160808-221LMT 0603

C625 2.2U_0603_6.3V4ZC625 2.2U_0603_6.3V4Z

12

C626 0.1U_0402_16V4ZC626 0.1U_0402_16V4Z

12

71mA

43mA

600mA

93mA

658mA

200mA

AH1

AC21

AC8

AA19

AF22 AE25 AF24 AC22

AE28

W22 W26

AD14

AJ20 AF18 AH20 AG19 AE18 AD18 AE16

V6 Y19 AE5

AA2 AB4

AA7 AA9 AF7

U26 V22 V26 V27 V28 V29

A18 A19 A20 B18 B19 B20 C18 C20 D18 D19 D20 E19

C11 D11

B

U20C

SB820M_FCBGA605

SB800

VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12

VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4

POWER

VDDPL_33_PCIE

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDPL_33_SATA VDDAN_11_SATA_1

VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7

VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12

VDDAN_11_USB_S_1 VDDAN_11_USB_S_2

Part 3 of 5

PCI/GPIO I/O

FLASH I/O

GBE LAN

PCI EXPRESSSERIAL ATA

CORE S5

USB I/O

PLL CLKGEN I/O

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7

CORE S03.3V_S5 I/O

VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDRF_GBE_S

VDDIO_33_GBE_S

VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2

VDDIO_GBE_S_1 VDDIO_GBE_S_2

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

VDDPL_33_SYS VDDPL_11_SYS_S VDDPL_33_USB_S

VDDAN_33_HWM_S

VDDXL_33_S

N13 R15 N17 U13 U17 V12 V18 W12 W18

K28 K29 J28 K26 J21 J20 K21 J22

V1 M10

L7 L9

M6 P8

A21 D21 B21 K10 L10 J9 T6 T8

F26 G26

M8 A11

B11

M21 L22 F19 D6 L20

510mA

400mA

R372 0_0402_5%R372 0_0402_5% R373 0_0402_5%R373 0_0402_5%

R374 0_0402_5%R374 0_0402_5%

R375 0_0402_5%R375 0_0402_5%

32mA

113mA TBD

197mA

47mA 62mA 17mA 5mA 197mA

+1.1VS_VDDC

+1.1VS_CKVDD

1 2 1 2

1 2

+VDDIO_AZ

+VDDPL_3V +VDDPL_11V +VDDPL_3V_USB +3V_HWM

C

1 2

R369 0_0805_5%R369 0_0805_5%

1 2

12 12 12 12

L69

FBMA-L11-201209-221LMA30T_0805

1 2

+3VALW

C6082.2U_0603_6.3V4Z C6082.2U_0603_6.3V4Z

1 2

C6092.2U_0603_6.3V4Z C6092.2U_0603_6.3V4Z

1 2

C615 1U_0402_6.3V4ZC615 1U_0402_6.3V4Z C616 1U_0402_6.3V4ZC616 1U_0402_6.3V4Z

+VDDCR_USB

L73 FBMA-L11-160808-221LMT 0603L73 FBMA-L11-160808-221LMT 0603 C622 10U_0805_10V4ZC622 10U_0805_10V4Z

1 2

C623 0.1U_0402_16V4ZC623 0.1U_0402_16V4Z C624 0.1U_0402_16V4ZC624 0.1U_0402_16V4Z

+VDDLX_3V

L75 FBMA-L11-160808-221LMT 0603L75 FBMA-L11-160808-221LMT 0603

C627 2.2U_0603_6.3V4ZC627 2.2U_0603_6.3V4Z

1 2

D

U20E

+1.1VS

C59010U_0805_10V4Z C59010U_0805_10V4Z

C5961U_0402_6.3V4Z C5961U_0402_6.3V4Z C5941U_0402_6.3V4Z C5941U_0402_6.3V4Z C5970.1U_0402_16V4Z C5970.1U_0402_16V4Z C5980.1U_0402_16V4Z C5980.1U_0402_16V4Z

12

12 12 12 12

12 12

+1.1VS

C59522U_0805_6.3V6M C59522U_0805_6.3V6M

C6001U_0402_6.3V4Z C6001U_0402_6.3V4Z C6011U_0402_6.3V4Z C6011U_0402_6.3V4Z C6020.1U_0402_16V4Z C6020.1U_0402_16V4Z C6030.1U_0402_16V4Z C6030.1U_0402_16V4Z

12 12

External Clock, connect to +1.1VS directly, no need thick trace

check can be removed?

+1.1VALW

12

+3VALW

12

U20E

Y14

VSSIO_SATA_1

Y16

VSSIO_SATA_2

AB16

VSSIO_SATA_3

AC14

VSSIO_SATA_4

AE12

VSSIO_SATA_5

AE14

VSSIO_SATA_6

AF9

VSSIO_SATA_7

AF11

VSSIO_SATA_8

AF13

VSSIO_SATA_9

AF16

VSSIO_SATA_10

AG8

VSSIO_SATA_11

AH7

VSSIO_SATA_12

AH11

VSSIO_SATA_13

AH13

VSSIO_SATA_14

AH16

VSSIO_SATA_15

AJ7

VSSIO_SATA_16

AJ11

VSSIO_SATA_17

AJ13

VSSIO_SATA_18

AJ16

VSSIO_SATA_19

A9

VSSIO_USB_1

B10

VSSIO_USB_2

K11

VSSIO_USB_3

B9

VSSIO_USB_4

D10

VSSIO_USB_5

D12

VSSIO_USB_6

D14

VSSIO_USB_7

D17

VSSIO_USB_8

E9

VSSIO_USB_9

F9

VSSIO_USB_10

F12

VSSIO_USB_11

F14

VSSIO_USB_12

F16

VSSIO_USB_13

C9

VSSIO_USB_14

G11

VSSIO_USB_15

F18

VSSIO_USB_16

D9

VSSIO_USB_17

H12

VSSIO_USB_18

H14

VSSIO_USB_19

H16

VSSIO_USB_20

H18

VSSIO_USB_21

J11

VSSIO_USB_22

J19

VSSIO_USB_23

K12

VSSIO_USB_24

K14

VSSIO_USB_25

K16

VSSIO_USB_26

K18

VSSIO_USB_27

H19

VSSIO_USB_28

Y4

EFUSE

D8

VSSAN_HWM

M19

VSSXL

P21

VSSIO_PCIECLK_1

P20

VSSIO_PCIECLK_2

M22

VSSIO_PCIECLK_3

M24

VSSIO_PCIECLK_4

M26

VSSIO_PCIECLK_5

P22

VSSIO_PCIECLK_6

P24

VSSIO_PCIECLK_7

P26

VSSIO_PCIECLK_8

T20

VSSIO_PCIECLK_9

T22

VSSIO_PCIECLK_10

T24

VSSIO_PCIECLK_11

V20

VSSIO_PCIECLK_12

J23

VSSIO_PCIECLK_13

SB820M_FCBGA605

SB800

Part 5 of 5

GROUND

VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52

VSSPL_SYS

E

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

+VDDPL_3V_PCIE +3VS

1

C628

0.1U_0402_16V4Z

4 4

0.1U_0402_16V4Z

2

+VDDPL_3V_SATA +3VS

1

C636

2

L79

C634

2.2U_0603_6.3V4Z

L81

C637

2.2U_0603_6.3V4Z

A

12

FBMA-L11-160808-221LMT 0603

1

2

FBMA-L11-160808-221LMT 0603

1

2

1

2

+VDDIO_AZ

1

2

L80

FBMA-L11-160808-221LMT 0603

C635

2.2U_0603_6.3V4Z

1 2

R376 0_0402_5%R376 0_0402_5%

C638

2.2U_0603_6.3V4Z

+3VS+VDDPL_3V

12

+3VALW

For 3V AZ device

B

+VDDPL_11V +1.1VALW +VDDPL_3V_USB +3VALW +3V_HWM +3VALW

L76

FBMA-L11-160808-221LMT 0603

1

C629

2.2U_0603_6.3V4Z

2

12

C630

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

R414 0_0603_5%R414 0_0603_5%

12

1

2

2009/10/06 2010/03/12

AMD

C631

2.2U_0603_6.3V4Z

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

C632

1

2

L78

FBMA-L11-160808-221LMT 0603

1

C633

2.2U_0603_6.3V4Z

2

D

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

22 45Wednesday, June 30, 2010

E

C

A

B

C

D

E

REQUIRED STRAPS

AZ_SDOUT

PULL

1 1

2 2

HIGH

PULL LOW

HDA_SDOUT[20]

PCI_CLK1[19] PCI_CLK2[19] PCI_CLK3[19] PCI_CLK4[19]

LPC_CLK0_EC[19,29]

LPC_CLK1[19] GPIO200[20] GPIO199[20]

LOW POWER MODE

Performance MODE

DEFAULT

R377

@

R386

PCI_CLK1

ALLOW PCIE GEN2

FORCE PCIE GEN1

DEFAULT

+VDDIO_AZ +3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW

12

10K_0402_5%

12

10K_0402_5%

R378

10K_0402_5%

@

R387

10K_0402_5%

12

Check Internal PU/PD

PCI_CLK2 PCI_CLK3

WATCHDOG TIMER ENABLE

WATCHDOG TIMER DISABLE

DEFAULT

R379

10K_0402_5%

@

R388

10K_0402_5%

USE DEBUG STRAP

IGNORE DEBUG STRAP

DEFAULT

R380

10K_0402_5%

@

R389

10K_0402_5%

12

PCI_CLK4

Inter CLK Gen Mode

Enable

Inter CLK Gen Mode

Disable

DEFAULT

12

R381

10K_0402_5%

INT@

12

R390

10K_0402_5%

EXT@

EC ENABLE

EC DISABLE

DEFAULT

12

R382

10K_0402_5%

@

12

R391

10K_0402_5%

LCP_CLK1LPC_CLK0

CLOCKGEN ENABLE

CLOCKGEN DISABLE

DEFAULT

12

R383

10K_0402_5%

INT@

12

R392

10K_0402_5%

EXT@

GPIO200

H,H = Reserved H,L = SPI ROM

L,H = LPC ROM (Default L,NC)

L,L = FWH ROM

12

R384

10K_0402_5%

@

12

R393

2.2K_0402_5%

R385

2.2K_0402_5%

R394

2.2K_0402_5%

12

GPIO199

@

+3VS+3VS

12

DEBUG STRAPS

SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

3 3

PULL HIGH

PULL LOW

PCI_AD27 PCI_AD26

DISABLE ILA

PLL

DEFAULT

BYPASS PCI PLL

AUTORUN

DEFAULT

ENABLE ILA AUTORUN

Check AD29,AD28 strap function

4 4

A

PCI_AD25 PCI_AD24

USE FC PLLUSE PCI

DEFAULT

BYPASS FC PLL

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

check default

B

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULT

ENABLE PCI MEM BOOT

PCI_AD29[19] PCI_AD28[19] PCI_AD27[19] PCI_AD26[19] PCI_AD25[19] PCI_AD24[19,21] PCI_AD23[19]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

12

R396

R395

10K_0402_5%

Compal Secret Data

Deciphered Date

R397

2.2K_0402_5%

@

12

R398

D

2.2K_0402_5%

@

12

R399

2.2K_0402_5%

@

12

R400

2.2K_0402_5%

@

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

12

R401

2.2K_0402_5%

@

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

23 45Wednesday, June 30, 2010

E

C

of

A

B

C

D

E

F

G

H

1 1

+3VS

+5VS_HDD

0.1U_0402_16V4Z

1

C662

2

1000P_0402_50V7K

SATA_STX_C_DRX_P0 SATA_STX_C_DRX_N0

SATA_DTX_SRX_N0 SATA_DTX_SRX_P0

C663

C656 0.01U_0402_16V7KC656 0.01U_0402_16V7K

SATA_STX_DRX_P0[21] SATA_STX_DRX_N0[21]

SATA_DTX_C_SRX_N0[21]

SATA_DTX_C_SRX_P0[21]

R405 0_0805_5%R405 0_0805_5%

+5VS

2 2

1 2

C658 0.01U_0402_16V7KC658 0.01U_0402_16V7K

1 2

C657 0.01U_0402_16V7KC657 0.01U_0402_16V7K

1 2

C659 0.01U_0402_16V7KC659 0.01U_0402_16V7K

1 2

+3VS

1

C639

0.1U_0402_16V4Z

2

10U_0805_10V4Z

1

C661

C660

2

1U_0402_6.3V4Z

SATA HDD Conn.

JHDD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

1

2

21

V12 V1222GND

SANTA_192301-1

SANTA_192301-1 CONN@

CONN@

GND

24 23

SATA ODD Conn.

JODD1

1

C648 0.01U_0402_16V7KC648 0.01U_0402_16V7K

SATA_STX_DRX_P1[21]

SATA_STX_DRX_N1[21]

SATA_DTX_C_SRX_N1[21] SATA_DTX_C_SRX_P1[21]

3 3

R404 0_0805_5%R404 0_0805_5%

+5VS

1 2

C649 0.01U_0402_16V7KC649 0.01U_0402_16V7K

1 2

C650 0.01U_0402_16V7KC650 0.01U_0402_16V7K

1 2

C651 0.01U_0402_16V7KC651 0.01U_0402_16V7K

1 2

10U_0805_10V4Z

1

C652

2

C653

1U_0402_6.3V4Z

R403 1K_0402_1%@R403 1K_0402_1%@

1

2

SATA_STX_C_DRX_P1 SATA_STX_C_DRX_N1

SATA_DTX_SRX_N1 SATA_DTX_SRX_P1

1 2

+5VS_ODD

0.1U_0402_16V4Z

1

C654

2

1000P_0402_50V7K

C655

1

2

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND GND13NC

OCTEK_SLS-13SB1G_RV

OCTEK_SLS-13SB1G_RV CONN@

CONN@

GND GND

NC

17 16 15 14

10/22 for DVT

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/10/06 2010/03/12

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

G

C

24 45Wednesday, June 30, 2010

H

C

A

U70

LAN_PME# LAN_RESET#

LAN_RDAC

42

VDDC

6

VDDC

15

VDDC

41

VDDC

27

AVDDL

33

AVDDL

39

AVDDL

24

GPHY_PLLVDDL

18

PCIE_PLLVDDL

21

PCIE_PLLVDDL

17

PCIE_TXD_P

16

PCIE_TXD_N

22

PCIE_RXD_P

23

PCIE_RXD_N

4

WAKE#

2

REST#

20

PCIE_REFCLK_P

19

PCIE_REFCLK_N

40

VMAIN_PRSINT

1

LOW_PWR

13

XTALO

12

XTALI

26

RDAC

3

CLKREQ#

BCM57780A0KMLG_QFN48_7X7

1

C905

2

0.1U_0402_16V4Z

+LAN_GPHYPLLVDDL

+LAN_PCIEPLLVDD

1 2 1 2

LAN_XTALO_R LAN_XTALI

R814

1 2

1.24K_0402_1%

+3V_LAN

1

2

+LAN_AVDDL

PCIE_PTX_IRX_P0 PCIE_PTX_IRX_N0

1 1

+1.2V_LAN

2 2

PCIE_PTX_C_IRX_P0[12] PCIE_PTX_C_IRX_N0[12] PCIE_ITX_C_PRX_P0[12] PCIE_ITX_C_PRX_N0[12]

SB_PCIE_WAKE#[20,27]

EC_PME#[29]

3 3

4 4

25MHZ_20PF_7A25000012

12

C923

33P_0402_50V8K

4.7U_0805_10V4Z

+3V_LAN

PLT_RST#[19,27]

CLK_PCIE_LAN#[15]

Y5

LAN_XTALO

1 2

C900

C907 0.1U_0402_16V7KC907 0.1U_0402_16V7K C908 0.1U_0402_16V7KC908 0.1U_0402_16V7K

R806 0_0402_5%@R806 0_0402_5%@ R807 0_0402_5%R807 0_0402_5% R808 4.7K_0402_5%R808 4.7K_0402_5%

CLK_PCIE_LAN[15]

+3VS

T12 PADT12 PAD T13 PADT13 PAD

TXC suggest change SE071330J80 For DVT

0.1U_0402_16V4Z

1

2

C903

C904

2

1

0.1U_0402_16V4Z

1 2 1 2

1 2 1 2 1 2

R809 0_0402_5%R809 0_0402_5%

1 2

R810 1K_0402_5%R810 1K_0402_5% R813 10K_0402_5%R813 10K_0402_5%

LAN_CLKREQ#[15]

LAN_XTALI

LAN_XTALO_R

12

R815

R815 200_0402_1%

200_0402_1%

12

C924

33P_0402_50V8K

A

B

+LAN_BIASVDDH

25

BIASVDDH

+LAN_XTALVDDH

14

XTALVDDH

+LAN_AVDDH

30

AVDDH

36

AVDDH

37

TRD3_N

38

TRD3_P

35

TRD2_N

34

TRD2_P

31

TRD1_N

32

TRD1_P

29

TRD0_N

28

TRD0_P

48

LINKLED#

SPD100LED# SPD1000LED# TRAFFICLED#

PAD

49

B

47 46 45

5

MODE

43

EEDATA

44

EECLK

11

SR_LX

8

SR_VFB

10

SR_VDDP

9

SR_VDD

7

NC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LAN_MIDI3LAN_MIDI3+

LAN_MIDI2LAN_MIDI2+

LAN_MIDI1LAN_MIDI1+

LAN_MIDI0LAN_MIDI0+

R801

R801 0_0402_5%

0_0402_5%

R805

R805 0_0402_5%

0_0402_5%

SPROM_DOUT SPROM_CLK

+1.2V_LAN_OUT

4.7UH_PG031B-4R7MS_1.1A_20%

2009/10/06 2010/03/12

12

L103

1 2

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

1

2

C

LAN_MIDI3- [26] LAN_MIDI3+ [26]

LAN_MIDI2- [26] LAN_MIDI2+ [26]

LAN_MIDI1- [26] LAN_MIDI1+ [26]

LAN_MIDI0- [26] LAN_MIDI0+ [26]

LAN_LINK# [26]

LAN_ACTIVITY# [26]

1

C913

2

1

C918

C917

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

C

+3VALW

+1.2V_LAN

1

C914

C914 10U_0805_10V4Z

10U_0805_10V4Z

2

+3V_LAN

R800

4.7U_0805_10V4Z

1 2

0_1206_5%

60mil

2

1

SPROM_CLK

SPROM_DOUT

D

+3V_LAN

1

C902

C901

2

0.1U_0402_16V4Z

SPROM_CLK

On chip

AT24C02

+3V_LAN

R802

R802 1K_0402_1%

1K_0402_1% @

@

1 2

R811

R811 1K_0402_1%

1K_0402_1%

1 2

20mil

+LAN_XTALVDDH

20mil

+LAN_BIASVDDH

20mil

+LAN_AVDDH

C911

0.1U_0402_16V4Z

20mil

+LAN_PCIEPLLVDD

0.1U_0402_16V4Z

20mil

+LAN_GPHYPLLVDDL

0.1U_0402_16V4Z

20mil

+LAN_AVDDL

0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

(EECLK)

R803

R803 1K_0402_1%

1K_0402_1%

1 2

R812

R812 1K_0402_1%

1K_0402_1% @

@

1 2

1

C909

0.1U_0402_16V4Z

2

1

C910

0.1U_0402_16V4Z

2

1

C912

0.1U_0402_16V4Z

2

1

C915

2

1

C919

2

1

C921

2

Compal Electronics, Inc.

SCHEMATICS, MB A5912

SCHEMATICS, MB A5912 401829

401829

SPROM_DOUT (EEDATA)

01

11

C906 0.1U_0402_16V4Z

1 2

@

U71

@U71

@ 8 7 6 5

L100

BLM18AG601SN1D_2P

L104

1 2

BLM18AG601SN1D_2P

2

C916

4.7U_0805_10V4Z

1

L105

1 2

BLM18AG601SN1D_2P

2

C920

4.7U_0805_10V4Z

1

L106

1 2

BLM18AG601SN1D_2P

2

C922

4.7U_0805_10V4Z

1

D

VCC WP SCL SDA

AT24C02_SO8

1 2

L101

1 2

L102

1 2

GND

A0 A1

NC

25 45Wednesday, June 30, 2010

1 2 3 4

+1.2V_LAN

of

+3V_LAN

C

5

D D

4

3

2

1

BH GS5009-D <SP050006B00>

T25

1

C931

2

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

350UH_IH-037-2

LAN_MIDI0+[25] LAN_MIDI0-[25]

LAN_MIDI1+[25] LAN_MIDI1-[25]

LAN_MIDI2+[25] LAN_MIDI2-[25]

LAN_MIDI3+[25] LAN_MIDI3-[25]

C C

LAN_MIDI0+ LAN_MIDI0-

LAN_MIDI1+ LAN_MIDI1-

LAN_MIDI2+ LAN_MIDI2-

LAN_MIDI3+ LAN_MIDI3-

1

C928

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C929

2

0.1U_0402_16V4Z

1

C930

0.1U_0402_16V4Z

2

Place close to TCT pin

B B

MCT1

MX1+

MX1-

MCT2

MX2+

MX2-

MCT3

MX3+

MX3-

MCT4

MX4+

MX4-

24 23 22

21 20 19

18 17 16

15 14 13

R819

75_0402_1%

12

R821

75_0402_1%

12

R820

R820 75_0402_1%

75_0402_1%

12

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI1+ RJ45_MIDI1-

RJ45_MIDI2+ RJ45_MIDI2-

RJ45_MIDI3+ RJ45_MIDI3-

12

R822

R822 75_0402_1%

75_0402_1%

RJ45_GND

40mil

+3V_LAN

LAN_ACTIVITY# LAN_LINK#

3

LAN_ACTIVITY#[25]

12

R823 1K_0402_5%R823 1K_0402_5%

1 2

C938 220P_0402_50V7KC938 220P_0402_50V7K

LAN_LINK#[25]

12

R824 1K_0402_5%R824 1K_0402_5%

1 2

C942 220P_0402_50V7KC942 220P_0402_50V7K

2

D40

PJDLC05_SOT23-3

PJDLC05_SOT23-3 @

@

1

RJ45_MIDI3RJ45_MIDI3+ RJ45_MIDI1RJ45_MIDI2RJ45_MIDI2+ RJ45_MIDI1+ RJ45_MIDI0RJ45_MIDI0+

RJ45_GND LANGND

LAN_ACTIVITY#

LAN_LINK#

LAN Connector

JRJ45

12

Yellow LED-

11

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

SANTA_130451-K

SANTA_130451-K CONN@

CONN@

1 2

C940

C940 1000P_1206_2KV7K

1000P_1206_2KV7K

C943 220P_0402_50V7KC943 220P_0402_50V7K

C944 220P_0402_50V7KC944 220P_0402_50V7K

1 2

1

2

0.1U_0402_16V4Z

C941

SHLD2 SHLD1

13 14

2

C939

4.7U_0805_10V4Z

1

@

R413 0_0805_5%

12

40mil

1 2

R412

R412 0_0805_5%

0_0805_5% @

@

A A

Security Classification

2009/10/06 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/06 2010/03/12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

26 45Wednesday, June 30, 2010

1

C

A

1 1

B

C

D

E

Mini-Express Card for WLAN

2

4

6

8

10

12 14 16

18 20 22 24 26 28 30 32 34 36 38 40

(MINI1_LED#)

42 44 46 48 50 52

ACES_88910-5204

56

CONN@

Height : 4mm

+1.5VS

1

C708

4.7U_0805_10V4Z

2

1

C709

0.1U_0402_16V4Z

2

WL_OFF# PLT_RST# +3V_WLAN

R441 0_0603_5%R441 0_0603_5%

R442 0_0603_5%@R442 0_0603_5%@ MINI1_SMBCLK MINI1_SMBDAT

WIMAX_LED# WLAN_LED#_L

1

C710

0.1U_0402_16V4Z

2

+3VS +1.5VS

WL_OFF# [29]

1 2 1 2

@

1 2

@

R443 0_0603_5%

1 2

R444 0_0603_5%

+3VS

PLT_RST# [19,25]

+3VS +3VALW

USB20_N8 [20] USB20_P8 [20]

@

1 2

R836 10K_0402_5%

SB_SMDAT0 [10,11,15,20] SB_SMCLK0 [10,11,15,20]

11/24 FOR WiMax/Wlan LED request

WIMAX_LED# WLAN_LED#_L

Power

+3VS +3V +1.5VS

0_0402_5%

R835

1 2

2 3

CHP202UPT_SOT323-3

D44

@D44

@

1 2

R837 0_0402_5%R837 0_0402_5%

Mini Card Power Rating Primary Power (mA) Peak Normal 1000 330 500

750 250 375

+3VS

12

R848

R848 100K_0402_5%

100K_0402_5%

1

(9~16mA)

Auxiliary Power (mA)

Normal

250 (wake enable) 5 (Not wake enable)

MINI1_LED# [29]

+3VS

1 2

1

C707

0.1U_0402_16V4Z

2

JMINI1

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

G153G254G355G3

+3VS

0_0402_5%

1 2

1

C706

0.1U_0402_16V4Z

2

R440 0_0402_5%@R440 0_0402_5%@

E51TXD_P80DATA_R E51RXD_P80CLK

1

C705

4.7U_0805_10V4Z

2

PCIE_PTX_C_IRX_N1[12] PCIE_PTX_C_IRX_P1[12]

PCIE_ITX_C_PRX_N1[12]

PCIE_ITX_C_PRX_P1[12]

MINI1_CLKREQ#[15]

CLK_PCIE_MINI1#[15]

CLK_PCIE_MINI1[15]

R445

1 2

SB_PCIE_WAKE#

R492

R492 100K_0402_5%

100K_0402_5%

@

SB_PCIE_WAKE#[20,25]

2 2

E51TXD_P80DATA[29]

E51RXD_P80CLK[29]

11/24 FOR DVT EC request

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

27 45Wednesday, June 30, 2010

E

C

of

A

B

C

D

E

1 2

R448 0_0402_5%@R448 0_0402_5%@

L83

1

4

WCM2012F2S-900T04_0805

1 2

R451 0_0402_5%@R451 0_0402_5%@

C718

0.1U_0402_16V4Z

BT@

C720

0.1U_0402_16V4Z

USB20_P14 [20] USB20_N14 [20]

+USB_VCCA

12

+

C711

220U_6.3V_M

2

3

2

1

PJUSB208_SOT23-6

+3VALW

BT@

4.7U_0805_10V4Z

1

2

470P_0402_50V7K

+3VS

BT@

S

G

2

D

1 3

1

C721

BT@C721

BT@

2

C712

W=80mils

USB20_N0_R USB20_P0_R

1

C719

C719 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

Q24

AO3413_SOT23-3

W=40mils

C722

0.1U_0402_16V4Z

JUSB1

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020133MB004S580ZL-C

SUYIN_020133MB004S580ZL-C CONN@

CONN@

BT@

+BT_VCC

12

BT@C722

BT@

BT@ R454

R454 300_0603_5%

300_0603_5%

BT@

13

D

Q25

2

2N7002_SOT23

G

S

+3VALW

SVPE, 4.4m, 17mohm

USB PW switch Change P/N SA00002XX00 For DVT

+5VALW

1 1

2 2

1

C713

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

SYSON#[34] USB20_N0[20]

+5VALW

1

C715

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

SYSON#

U24

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

EN

RT9715BGS_SO8

U25

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

EN

RT9715BGS_SO8

To USB/B Connector

+USB_VCCA

80mil

8 7 6 5

FLG

+USB_VCCB

80mil

8 7 6 5

FLG

To CardReader/B Connector

12

R446

R446 100K_0402_5%

100K_0402_5%

R447 10K_0402_5%R447 10K_0402_5%

1 2

C714

0.1U_0402_16V4Z

+3VALW

12

R450

R450 100K_0402_5%

100K_0402_5%

1 2

R452

R452 10K_0402_5%

10K_0402_5%

1

2

1

2

R449

R449 0_0402_5%

0_0402_5%

1 2

C716

0.1U_0402_16V4Z

USB_OC#0 [20]

USB_OC#2 [20]

USB_OC#1 [20]

USB20_N0

USB20_P0[20]

USB20_N0_R USB20_P0_R

+USB_VCCA

USB20_P0

D10

4

5

6

ESD Change P/N SC300000B00 For DVT

(Port 1,2)

JUSB2

13

GND

14

GND

ACES_85201-1205N

ACES_85201-1205N CONN@

CONN@

3 3

+USB_VCCB

10 9 8 7 6 5 4 3 2 1

+3VS

CLK_CR_48M

USB20_N6 USB20_P6

CLK_CR_48M

C717

4.7U_0805_10V4Z

1 2

USB20_N6 [20] USB20_P6 [20]

@ R504

@

0_0402_5%

5IN1_LED# [30]

R504

12

C782

@ C782

@

33P_0402_50V8K

Bluetooth Conn.

BT_ON#[29]

1 2

R453 10K_0402_5%

JCR1

1

2

3

4

5

6

7

8

9

10

11

12

USB20_N1 USB20_P1

USB20_N2 USB20_P2

USB20_N1 [20] USB20_P1 [20]

USB20_N2 [20]

USB20_P2 [20]

JCR1

GND GND

8 7 6 5 4 3 2 1

ACES_85201-08051

ACES_85201-08051 CONN@

CONN@

Reserve for EMI

To 3G Module Connect

+3VS_WWAN

(Port 9)

JP4

1 2 3 4 5 6 7 8 9

10

GND

ACES_87036-1001-CP

4 4

ACES_87036-1001-CP

GND

CONN@

+3VS_WWAN

1 2

WWAN_OFF#

3 4 5 6 7 8 9 10 11 12

R457

R457 100K_0402_5%

100K_0402_5%

1 2

WWAN_OFF# [29]

WWAN_LED# [29]

USB20_N9 [20] USB20_P9 [20]

USB20_N7 [20] USB20_P7 [20]

+3VS

3G@

1 2

R455 0_1206_5%

220U_C6_6.3V_M_R15

+3VS_WWAN

C723

1

2

+

Peak: 2.75A Normal: 1.1A

3G@

Close to WWAN CONN

JBT1

10

GND

9

GND

ACES_87213-0800G

ACES_87213-0800G CONN@

CONN@

+BT_VCC

8

7

6

5

4

3

2

1

11/25 for DVT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

28 45Wednesday, June 30, 2010

E

C

of

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z C725

C725

1

C724

2

CLKRUN#[19]

2

0.1U_0402_16V4Z

1 2

R99 0_0402_5%

4.7K_0402_5%

EC_SMB_CK1[36] EC_SMB_DA1[36] EC_SMB_CK2[8] EC_SMB_DA2[8]

PM_SLP_S3#[20] PM_SLP_S5#[20] EC_LID_OUT# [20]

LOCAL_DIM[16]

MINI1_LED#[27]

COLOY_ENG_EN[16]

EC_INVT_PWM[16]

FAN_SPEED1[33]

PWR_SUSP_LED[30]

WLAN_LED#[30]

EC_SMI#[20]

LPC_FRAME#[19]

R489

BT_ON#[28]

ON/OFF[33]

EC_KBRST#[20]

EC_GA20[20]

SERIRQ[19]

LPC_AD3[19] LPC_AD2[19] LPC_AD1[19] LPC_AD0[19]

A_RST#[13,14,19]

EC_SCI#[20]

@

0.1U_0402_16V4Z

@

1 2

KSO[0..17] KSI[0..7]

D D

C732

22P_0402_50V8J@

12

LPC_CLK0_EC[19,23]

+3VALW

+5VS

C C

R851

R851 0_0402_5%

0_0402_5% PEW56@

PEW56@

B B

R465 4.7K_0402_5%R465 4.7K_0402_5% R466 4.7K_0402_5%R466 4.7K_0402_5%

+3VS+3VALW

R852

R852 0_0402_5%

0_0402_5% NEWX5@

NEWX5@

1 2

R467 2.2K_0402_5%R467 2.2K_0402_5% R468 2.2K_0402_5%R468 2.2K_0402_5%

+3VALW

R471 2.2K_0402_5%R471 2.2K_0402_5% R472 2.2K_0402_5%R472 2.2K_0402_5% R473 47K_0402_5%R473 47K_0402_5% R474 47K_0402_5%R474 47K_0402_5% R475 100K_0402_5%R475 100K_0402_5% R476 10K_0402_5%

R476 10K_0402_5% R497 100K_0402_5%R497 100K_0402_5%

R488 100K_0402_5%R488 100K_0402_5% R844 100K_0402_5%R844 100K_0402_5% R845 100K_0402_5%R845 100K_0402_5%

R462 47K_0402_5%R462 47K_0402_5%

C733 0.1U_0402_16V4ZC733 0.1U_0402_16V4Z

1 2 1 2

03/02 for Pre-MP

1 2 1 2

1 2 1 2 1 2 1 2

12

@

1 2

12

12 12 12

KSO[0..17] [30] KSI[0..7] [30]

@

12

R461 33_0402_5%

12

TP_CLK TP_DATA

EC_SMB_CK2 EC_SMB_DA2

EC_SMB_CK1 EC_SMB_DA1

KSO1

KSO2 LID_SW# EC_PME#

PBTN_OUT#

For LED INV_PWM freq to 1K

ENBKL

LOCAL_DIM

COLOY_ENG_EN

For Low PWR panel use

EC_CRY1 EC_CRY2

2

C739

A A

C739

15P_0402_50V8J

1

2

5

2

C740

X1

OSC4OSC

NC3NC

C740 15P_0402_50V8J

15P_0402_50V8J

1

32.768KHZ_12.5PF_Q13MC14610002

4

0.1U_0402_16V4Z

1

C726

2

EC_GA20 EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

LPC_CLK0_EC

EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# LOCAL_DIM MINI1_LED#

COLOY_ENG_EN EC_INVT_PWM FAN_SPEED1 BT_ON# E51TXD_P80DATA E51RXD_P80CLK ON/OFF PWR_SUSP_LED WLAN_LED#

4

1

C727

2

EC_CRY1 EC_CRY2

2

C728

1000P_0402_50V7K

1

1 2 3 4 5 7 8

10 12

13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

2

1

U26

NEWX5@

U26

NEWX5@

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1

LPC & MISC

LAD0 PCICLK

PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

3

+3VALW

L84

1 2

BLM18AG601SN1D_2P

C729

C729 1000P_0402_50V7K

1000P_0402_50V7K

9

22

VCC

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

11

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_VCCA

1

2

ECAGND

33

96

111

125

67

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

DA Output

SPI Device Interface

GPIO

GND

24

EN_DFAN1/DA1/GPIO3D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Flash ROM

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

GPO

GPI

GND

AGND

GND

35

69

94

113

CIR_RLC_TX/GPIO41

CAPS_LED#/GPIO53 SUSP_LED#/GPIO55

ICH_PWROK/GPXO06

PM_SLP_S4#/GPXID1

KB926QFB1_LQFP128_14X14

20mil

ECAGND

C730

0.1U_0402_16V4Z

4.7K_0402_5%

21

BEEP#

23

SPIDI/RD#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

L85

26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64

ADP_I

65

AD_BID0

66

AD_PID0

75

MB_SL

76

DAC_BRIG

68

EN_DFAN1

70

IREF

71

CALIBRATE#

72

EC_MUTE#

83 84

WWAN_LED#

85

3G_LED#

86

TP_CLK

87

TP_DATA

88

3S/4S#

97

65W/90W#

98

VLDT_EN

99

LID_SW#

109

119 120 126 128

WWAN_OFF#

73 74 89

BATT_BLUE_LED#

90 91

BATT_AMB_LED#

92

PWR_LED

93

SYSON

95

VR_ON

121

ACIN

127

EC_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102

EC_SWI#

103

EC_PWROK

104

BKOFF#

105

WL_OFF#

106

EC_REV

107 108

VGATE

110

ENBKL

112

EAPD

114

EC_THERM#

115

SUSP#

116

PBTN_OUT#

117

EC_PME#

118 124

12

Compal Secret Data

1

C736

4.7U_0805_10V4Z

2

KB926 Rev:D3(SA00001J580) KB926 Rev:E0(SA00001J5A0)

Deciphered Date

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

ENBKL/GPXID2

BLM18AG601SN1D_2P

2009/10/06 2010/03/12

3

MB_SL

R491

BEEP# [31] ACOFF [38,41]

BATT_OVP [38] ADP_I [38]

DAC_BRIG [16] EN_DFAN1 [33] IREF [38] CALIBRATE# [38]

+3VS

1 2

EC_MUTE# [32] WWAN_LED# [28]

3G_LED# [30] TP_CLK [30]

TP_DATA [30]

3S/4S# [38] 65W/90W# [38]

VLDT_EN [34,40]

LID_SW# [30]

EC_SI_SPI_SO [30] EC_SO_SPI_SI [30]

EC_SPICS#/FSEL# [30]

WWAN_OFF# [28] FSTCHG [38]

BATT_BLUE_LED# [30] BATT_AMB_LED# [30]

PWR_LED [30] SYSON [34,39] VR_ON [40,43] ACIN [30,34,35]

EC_RSMRST# [20] EC_ON [33]

EC_SWI# [20] BKOFF# [16]

WL_OFF# [27]

VGA_ON [34,42]

VGATE [43]

ENBKL [13] EAPD [31] EC_THERM# [21]

SUSP# [34,38]

PBTN_OUT# [20] EC_PME# [25]

2

R109

R109 0_0402_5%

0_0402_5% @

@

12

C731 0.01U_0402_16V7KC731 0.01U_0402_16V7K

1 2

Reserve for EMI, close to EC

Delay SUSP# 10ms

U26

KB926QFB1_LQFP128_14X14

KB926QFB1_LQFP128_14X14 NEWX5@

NEWX5@

2

ECAGND

BATT_TEMP [36]

R419

R419 0_0402_5%

0_0402_5%

C783

C783 33P_0402_50V8K

33P_0402_50V8K @

@

1

For EC Tools

+3VALW

JP7

1

2

3

4

ACES_85205-0400

ACES_85205-0400 @

@

65W/90W# VR_ON 3S/4S#

Analog Project ID definition

+3VALW

Ra

Rb

Analog Board ID definition

EC_SPICLK [30]

Ra

Rb

12/03 for DVT

EC_REV

11/25 for DVT EC suggest

EC_PWROK

BATT_TEMP BATT_OVP ACIN

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

Place on MiniCard door

E51RXD_P80CLK E51TXD_P80DATA

1 2

AD_BID0

12 12

12 12 12

12 12

1

C734

0.1U_0402_16V4Z

2

1

C735

0.1U_0402_16V4Z

2

+3VS

1

R458 100K_0402_5%R458 100K_0402_5% R459 100K_0402_5%R459 100K_0402_5% R460 4.7K_0402_5%R460 4.7K_0402_5%

R463

R463 PEW56@

PEW56@ 100K_0402_5%

100K_0402_5%

1 2

AD_PID0

R464

R464 18K_0402_5%

18K_0402_5%

1 2

+3VALW

R469

R469 @

@ 100K_0402_5%

100K_0402_5%

1 2 12

R470

8.2K_0402_5%

PEW56@

R838 100K_0402_5%

R838 100K_0402_5% R839 100K_0402_5%NEWX5@R839 100K_0402_5%NEWX5@

1 2

R254 0_0402_5%R254 0_0402_5%

C737 100P_0402_50V8JC737 100P_0402_50V8J C738 100P_0402_50V8JC738 100P_0402_50V8J C741 100P_0402_50V8JC741 100P_0402_50V8J

401829

E51RXD_P80CLK [27] E51TXD_P80DATA [27]

+3VALW

Project_ID : 0-> NEW75/85/95 1-> PEW76/86/96 2-> PEW56(BA51)

Board_ID : 0-> w/ pach code 1-> wo/ pach code

EC_REV : 1-> D3 0-> E0

SB_PWRGD [8,13,20]

of

29 45Wednesday, June 30, 2010

C

KSO15 KSO14 KSO13 KSO12

KSI0 KSO11 KSO10 KSI1

KSI2 KSO9 KSI3 KSO8

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

ACES_88747-2601

ACES_88747-2601 CONN@

CONN@

C749 100P_0402_50V8JC749 100P_0402_50V8J

1 2

C751 100P_0402_50V8JC751 100P_0402_50V8J

1 2

C753 100P_0402_50V8JC753 100P_0402_50V8J

1 2

C755 100P_0402_50V8JC755 100P_0402_50V8J

1 2

C757 100P_0402_50V8JC757 100P_0402_50V8J

1 2

C759 100P_0402_50V8JC759 100P_0402_50V8J

1 2

C761 100P_0402_50V8JC761 100P_0402_50V8J

1 2

C763 100P_0402_50V8JC763 100P_0402_50V8J

1 2

C765 100P_0402_50V8JC765 100P_0402_50V8J

1 2

C767 100P_0402_50V8JC767 100P_0402_50V8J

1 2

C769 100P_0402_50V8JC769 100P_0402_50V8J

1 2

C771 100P_0402_50V8JC771 100P_0402_50V8J

1 2

EC_SPICS#/FSEL#[29]

+3VALW

JKB1

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

+3VALW

R480 4.7K_0402_5%R480 4.7K_0402_5%

1 2

R482 4.7K_0402_5%R482 4.7K_0402_5%

1 2

28

G2

27

G1

1 2

R479 0_0603_5%R479 0_0603_5%

EC_SPICS#/FSEL#

SPI_WP# SPI_HOLD#

EC_SPICS#/FSEL# +SPI_VCC SPI_HOLD#

C742 0.1U_0402_16V4ZC742 0.1U_0402_16V4Z

1 2

+SPI_VCC

U27

1

CS#

3 7 4

1 3 7 4

MX25L1005AMC-12G_SOP8

VCC

WP#

SCLK HOLD# GND

MX25L1605DM2I-12G SOP 8P

MX25L1605DM2I-12G SOP 8P SA00002TO00

SA00002TO00

U28

CE# WP# HOLD# VSS

SI

SO

@U28

@

VDD SCK

SI

SO

INT_KBD Conn.

KSI[0..7] KSO[0..17]

KSO16

C747 100P_0402_50V8JC747 100P_0402_50V8J

1 2

KSO17

C748 100P_0402_50V8JC748 100P_0402_50V8J

1 2

KSO7

C750 100P_0402_50V8JC750 100P_0402_50V8J

1 2

KSO6

C752 100P_0402_50V8JC752 100P_0402_50V8J

1 2

KSO5

C754 100P_0402_50V8JC754 100P_0402_50V8J

1 2

KSO4

C756 100P_0402_50V8JC756 100P_0402_50V8J

1 2

KSO3

C758 100P_0402_50V8JC758 100P_0402_50V8J

1 2

KSI4

C760 100P_0402_50V8JC760 100P_0402_50V8J

1 2

KSO2

C762 100P_0402_50V8JC762 100P_0402_50V8J

1 2

KSO1

C764 100P_0402_50V8JC764 100P_0402_50V8J

1 2

KSO0

C766 100P_0402_50V8JC766 100P_0402_50V8J

1 2

KSI5

C768 100P_0402_50V8JC768 100P_0402_50V8J

1 2

KSI6

C770 100P_0402_50V8JC770 100P_0402_50V8J

1 2

KSI7

C772 100P_0402_50V8JC772 100P_0402_50V8J

1 2

KSI[0..7] [29] KSO[0..17] [29]

8

EC_SPICLK_R

6

EC_SO_SPI_SI_R

5

EC_SI_SPI_SO_R

2

8

EC_SPICLK_RSPI_WP#

6

EC_SO_SPI_SI_R

5

EC_SI_SPI_SO_R

2

R481 0_0402_5%R481 0_0402_5% R483 0_0402_5%R483 0_0402_5% R484 0_0402_5%R484 0_0402_5%

33P_0402_50V8K

1 2 1 2 1 2

@ R4850_0402_5%@R4850_0402_5%

1 2

@

@ C746

C746

NEW95 / PEW56 LED Option

21

9556@21

9556@

R477 680_0402_5%

21

9556@21

9556@

R478 680_0402_5%

21

9556@21

9556@

R499 680_0402_5%

21

9556@21

9556@

R498 680_0402_5%

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

EC_SPICLK [29] EC_SO_SPI_SI [29] EC_SI_SPI_SO [29]

ACIN[29,34,35]

PWR_LED[29]

100K_0402_5%

Change Q26 as SB00000DH00 20100120

PWR_SUSP_LED[29]

100K_0402_5%

2009/10/06 2010/03/12

R487

R490

To TP/B Conn.

JTP1

7

GND

8

GND

ACES_85201-0605N

ACES_85201-0605N CONN@

CONN@

SW1

SW1 SMT1-05-A_4P

LEFT_BTN# RIGHT_BTN#

2

G

PWR_LED#

61

DMN66D0LDW-7_SOT363-6

2

Q26A

1 2

PWR_SUSP_LED#

34

DMN66D0LDW-7_SOT363-6

5

Q26B

1 2

Compal Secret Data

SMT1-05-A_4P

3 4

5

6

Left side Right side

For NEW75 NEW85 For NEW95

JLED2

1

LID_SW#

2

ACIN_LED# ACIN_LED#

3

3G_LED#

4

WLAN_LED#

5

MEDIA_LED#

6

7

PWR_LED#

8

ON/OFFBTN#

9

10

11

GND

12

GND

ACES_85201-1005N

ACES_85201-1005N CONN@

CONN@

ACIN_LED#

13

D

@

Q73

S

2N7002_SOT23

For MP Add @

Change R477/R499 to 2.2kohm Change R478/R498 to 3.9kohm 20100118

Deciphered Date

+5VS

1

2

3

LEFT_BTN#

4

RIGHT_BTN#

5

6

1 2

+3VALW

LID_SW# [29]

3G_LED# [29] WLAN_LED# [29]

+3VS +3VS

ON/OFFBTN# [33]

TP_CLK [29]

TP_DATA [29]

SW2

SW2 SMT1-05-A_4P

SMT1-05-A_4P

3 4

5

1 2

6

PJDLC05C_SOT23-3

JLED1

10 GND GND

ACES_85201-1005N

ACES_85201-1005N CONN@

CONN@

1

2

3

4

5

6

7

8

9

10 11 12

PIN define modify for 01/22

+3VS

+3VALW

For PVT

MEDIA_LED#

1 2

R477 2.2K_0402_5%

1 2

R478 3.9K_0402_5%

1 2

R499 2.2K_0402_5%

1 2

R498 3.9K_0402_5%

7585@

4

+3VS

5

U29

P

B

Y

A

G

NC7SZ08P5X_NL_SC70-5

3

LED1

LED1 HT-191NB5_BLUE

HT-191NB5_BLUE

2 1

LED2

LED2 HT-191UD5_AMBER

HT-191UD5_AMBER

2 1

LED3

LED3 HT-191NB5_BLUE

HT-191NB5_BLUE

2 1

LED4

LED4 HT-191UD5_AMBER

HT-191UD5_AMBER

2 1

Follow Intel Setting Change LED1, LED3 as SC591NB5A30 20100118

Title

Size Document Number Rev

B

Date: Sheet of

R486

R486 100K_0402_5%

100K_0402_5%

1 2

2 1

B

PWR_SUSP_LED#

A

BATT_BLUE_LED#

B

BATT_AMB_LED#

A

Compal Electronics, Inc.

SCHEMATICS, MB A5912

+5VS

RIGHT_BTN#

LEFT_BTN#

2

3

1

LID_SW# 3G_LED#

WLAN_LED# MEDIA_LED#

PWR_LED# ON/OFFBTN#

PWR_LED#

401829

C745

0.1U_0402_16V4Z

D11

PJDLC05C_SOT23-3

5IN1_LED# [28] SATA_LED# [21]

TP_CLK TP_DATA

2

3

D13

1

+3VALW

BATT_BLUE_LED# [29]

BATT_AMB_LED# [29]

30 45Wednesday, June 30, 2010

C

A

D38

C952

C946

D38

1 2

CH751H-40PT_SOD323-2

BEEP#[29]

CH751H-40PT_SOD323-2

1U_0402_6.3V4Z

1 1

SB_SPKR[20]

2 2

3 3

ALC272X

Sense Pin

SENSE A

4 4

SENSE B

Impedance Codec Signals

PORT-A (PIN 39, 41)39.2K 20K 10K

5.1K

39.2K 20K

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

PORT-D (PIN 35, 36)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17) 10K

5.1K

A

PORT-I (PIN 32, 33)

10K_0402_5%

2 1

1 2

560_0402_5%

1 2

560_0402_5%

R787

R788

B

R789

Function

LOUT2 MIC1 LINE1 LOUT1 LINE2 MIC2

HP

B

+VDDA

+3VS

12

1

C

2

B

E

3 2SC2411KT146_SOT23-3

2SC2411KT146_SOT23-3

D37

D37 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

2 1

+VDDA

MIC_PLUG#[32]

HP_PLUG#[32]

R783

R783 20K_0402_1%

20K_0402_1%

C936

1 2

1U_0402_6.3V4Z

Q72

R523 1K_0402_1%R523 1K_0402_1%

1 2 R786

R786

L86

1 2

BLM18AG601SN1D_2P

10U_0805_10V4Z

INT_MIC_2INT_MIC

12

MIC1_L[32] MIC1_R[32]

R794 20K_0402_1%R794 20K_0402_1% R795 5.11K_0402_1%R795 5.11K_0402_1%

EAPD[29]

C

MONO_IN

2.4K_0402_1%

0.1U_0402_16V4Z

1

C935

C950

2

C794 4.7U_0805_10V4ZC794 4.7U_0805_10V4Z

1 2 1 2

C797 4.7U_0805_10V4ZC797 4.7U_0805_10V4Z

MIC2_VREFO

MIC1_L

C934

MIC1_R

1 2 1 2

C932 4.7U_0805_10V4ZC932 4.7U_0805_10V4Z

HDA_RST_AUDIO#[20] HDA_SYNC_AUDIO[20]

HDA_SDOUT_AUDIO[20]

12 12

1 2

R796 0_0402_5%R796 0_0402_5%

C

1

2

0.1U_0402_16V4Z

MIC2_C_L MIC2_C_R

4.7U_0805_10V4Z

4.7U_0805_10V4Z MIC1_C_L

MIC1_C_R MONO_IN

SENSE_A SENSE_B

D

HD Audio Codec

+AVDD_HDA

40mil

1

C945

2

DGND

38

U82

AVDD125AVDD2

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

LINE1_VREFO

20

LINE2_VREFO

19

MIC2_VREFO

21

MIC1_L

22

MIC1_R

12

PCBEEP_IN

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

48

SPDIFO1

4

DVSS1

7

DVSS2

ALC272-VA2-GR_LQFP48_7X7

Change to ALC272X

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

10mil

1

DVDD

LOUT1_L

LOUT_R LOUT2_L LOUT2_R SPDIFO2

DMIC_CLK1/2

DMIC_CLK3/4

BITCLK

SDATA_IN

MONO_OUT

CBP

CPVEE

MIC1_VREFO

HPOUT_R

CBN

VREF

JDREF

HPOUT_L

AVSS1 AVSS2

0.1U_0402_16V4Z

9

DVDD_IO

35 36 39 41 45 46 43

NC

44

6

8 37 29 31 28 32 30 27 40 33 26

42

+5VS

HP_RIGHT

CODEC_VREF

HP_LEFT

AGND

E

L87

1 2

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805 L88

L88

1 2

FBMA-L11-201209-221LMA30T_0805

1

C953

C933

2

0.1U_0402_16V4Z

AMP_LEFT AMP_RIGHT

1 2

R792 0_0402_5%R792 0_0402_5%

1 2

R793 33_0402_5%R793 33_0402_5%

C951 2.2U_0805_10V6KC951 2.2U_0805_10V6K

1 2

10mil

MIC1_VREFO

+3VS_DVDD

1

C926

C926 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2

2

1

C948

C948 22P_0402_50V8J

22P_0402_50V8J

C954

2.2U_0805_10V6K

F

+5VAMP

C678 22U_0805_6.3V6M@C678 22U_0805_6.3V6M

C899 0.1U_0402_16V4ZC899 0.1U_0402_16V4Z

1

@

2

L82

L82 BLM18AG601SN1D_2P

BLM18AG601SN1D_2P

1 2

AMP_LEFT [32] AMP_RIGHT [32]

HDA_BITCLK_AUDIO [20]

HDA_SDIN0 [20]

1

2

For EMI

10mil

1

C927

1

C937

2

10U_0805_10V4Z

0.1U_0402_16V4Z

R797

12

20K_0402_1%

GND GNDA

Compal Secret Data

2009/10/06 2010/03/12

E

Compal Secret Data

Deciphered Date

F

1 2

R784 0_0805_5%R784 0_0805_5%

60mil

C947 0.1U_0402_16V4ZC947 0.1U_0402_16V4Z

+3VS

HP_RIGHT HP_LEFT

1 2

R798 0_0805_5%R798 0_0805_5%

1 2

R804 0_0805_5%R804 0_0805_5%

1 2

R818 0_0805_5%R818 0_0805_5%

G

U81

1

IN

2

GND

3

SHDN

G9191-475T1U_SOT23-5@

OUT

BYP

5

4

40mil

+VDDA

1 2

C949

0.01U_0402_25V7K

H

4.75V

(output = 300 mA)

MIC2_VREFO

12

R585

2.2K_0402_5%

INT_MIC

15mil

1

220P_0402_50V7K

C979

2

220P_0402_50V7K

C980

2

220P_0402_50V7K

2

3

EMI For PVT

D27

@D27

@

1 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

HP_RIGHT [32] HP_LEFT [32]

GND GNDA

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

G

Close to Conn

1

C808

C808 220P_0402_50V7K

220P_0402_50V7K

2

R8490_0603_5% R8490_0603_5% 1 2 1 2

R8500_0603_5% R8500_0603_5%

1 2

R799 0_0805_5%R799 0_0805_5%

1 2

R816 0_0805_5%R816 0_0805_5%

1 2

R817 0_0805_5%R817 0_0805_5%

401829

JP1

1

2

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001 CONN@

CONN@

31 45Wednesday, June 30, 2010

H

C

A

GAIN0

GAIN1

0

AV(inv) Ri 0 1

0 1

0

11

1 1

AMP_RIGHT[31]

AMP_LEFT[31]

15.6dB

21.6dB

C957 0.47U_0603_10V7K

C971 0.47U_0603_10V7K

6dB

10dB

1 2

90k 70k 45k 25k

C958 0.47U_0603_10V7KC958 0.47U_0603_10V7K

1 2

R830 0_0603_5%R830 0_0603_5%

C955 0.47U_0603_10V7KC955 0.47U_0603_10V7K

1 2

R828 0_0603_5%R828 0_0603_5%

AMP_C_RIGHT

AMP_C_LEFT

For PVT

2 2

EC_MUTE#[29]

3 3

4 4

EC_MUTE#

7

17

9

5

19

B

U83

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

GND5

21

+5VAMP

20

C959

10U_0805_10V4Z

16

15

6

VDD

PVDD1

PVDD2

ROUT+

LOUT+

BYPASS

GND41GND311GND213GND1

0.1U_0402_16V4Z

1

C960

2

GAIN0

3

GAIN1

18

14

ROUT-

4

8

LOUT-

12

NC

10

TPA6017A2_TSSOP20

MIC1_L[31] MIC1_R[31]

1

2

GAIN0 GAIN1

SPKR+

SPKR-

SPKL+

SPKL-

Keep 10 mil width

2

C956

0.47U_0603_10V7K

1

HP_LEFT[31] HP_RIGHT[31]

R694

1 2

R695

1 2

R827

100K_0402_5%

R825

@ R825

@

100K_0402_5%

1K_0603_1%

1K_0603_1% 1K_0603_1%

1K_0603_1%

C

12

MIC1_R_1

+5VAMP

10 dB

12

R829

@ R829

@ 100K_0402_5%

100K_0402_5%

12

R826

R826 100K_0402_5%

100K_0402_5%

R686 56.2_0603_1%R686 56.2_0603_1%

1 2

R685 56.2_0603_1%R685 56.2_0603_1%

1 2

CH751H-40PT_SOD323-2

L89

1 2

FBMA-L11-160808-700LMT_2P

L90

1 2

FBMA-L11-160808-700LMT_2P

220P_0402_50V7K

MIC1_VREFO MIC1_VREFO

D43

R692

4.7K_0402_5%

C780

HPOUT_L_1 HPOUT_R_1

21

12

1

2

D

SPKL+ SPKL-

20mil

SPKR+ SPKR-

20mil

330P_0402_50V7K

1 2

L94 FBMA-L11-160808-700LMT_2PL94 FBMA-L11-160808-700LMT_2P

1 2

L93 FBMA-L11-160808-700LMT_2PL93 FBMA-L11-160808-700LMT_2P

21

D42

D42 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

R693

4.7K_0402_5%

4.7K_0402_5% MIC1_L_RMIC1_L_1 MIC1_R_R

1

C781

C781 220P_0402_50V7K

220P_0402_50V7K

2

PJDLC05C_SOT23-3

HPOUT_L_2 HPOUT_R_2

2

3

1

Int. Speaker Conn.

R834 0_0603_5%R834 0_0603_5%

1 2

R833 0_0603_5%R833 0_0603_5%

1 2

PJDLC05C_SOT23-3

R831 0_0603_5%R831 0_0603_5%

1 2

R832 0_0603_5%R832 0_0603_5%

1 2

PJDLC05C_SOT23-3

2

C779

330P_0402_50V7K

1

HP_PLUG#[31]

3

1

@

@ D29

D29

MIC_PLUG#[31]

2

C774

1

HP_PLUG#

MIC_PLUG# HP_PLUG#

2

@

D24

PJDLC05C_SOT23-3

MIC_PLUG#

3

SPK_L+ SPK_L-

2

D39

1

SPK_R+ SPK_R-

2

D41

1

Headphone Out

JHP1

JHP1 1 2

3 4 5

6

SINGA_2SJ-0960-C01

CONN@

JMIC1

JMIC1 1 2

3 4 5

6

SINGA_2SJ-A960-C01

CONN@

E

JSPK2

1

2

Left

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001 CONN@

CONN@

JSPK1

1

2

Right

3

G1

4

G2

ACES_88266-02001

ACES_88266-02001 CONN@

CONN@

MIC JACK

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

32 45Wednesday, June 30, 2010

E

C

of

ON/OFF switch

Power Button

FAN1 Conn

40mil

+VCC_FAN1

+5VS

12

D25

D25 1SS355_SOD323-2@

1SS355_SOD323-2@

1 2

10U_0805_10V4Z

1000P_0402_50V7K

D26 BAS16_SOT23-3@D26 BAS16_SOT23-3@

C823

1 2

C824

1 2

JFAN1

1 2 3

CONN@

ACES_85205-03001

LDO FAN

SMT1-05-A_4P

SMT1-05-A_4P 1

2

+5VS

R566

R566 0_0603_5%

0_0603_5% @

@

1 2

+VCC_FAN1

EN_DFAN1[29]

1 2

R567 0_0402_5%R567 0_0402_5%

@

U35

U35 1 2 3 4

1

C822

APL5607KI-TRG_SO8

0.01U_0402_25V4Z

2

FAN_SPEED1[29]

C821 10U_0805_10V4ZC821 10U_0805_10V4Z

1 2

GND GND GND GND

8 7 6 5

+3VS

EN VIN VOUT VSET

12

R568

R568 10K_0402_5%

10K_0402_5%

1

C825

C825 1000P_0402_50V7K

1000P_0402_50V7K

2

SW3

@ SW3

@

5

6

For MP

TOP Side

1 2

R493 10K_0603_5%@R493 10K_0603_5%@

1 2

R494 10K_0603_5%@R494 10K_0603_5%@

Bottom Side

ON/OFFBTN#

3 4

EC_ON[29]

EC_ON

R496

10K_0402_5%

H1

H_3P0H1H_3P0

1

H11

H_3P0

1

ON/OFFBTN# [30]

H2

H_3P0H2H_3P0

H12

H_3P0

+3VALW

1 2

D12

2

1

H_3P0

3

13

2

G

H4

H_3P0H4H_3P0

1

H19

H24

H_3P0

1

H18

H_3P4

1

DAN202UT106_SC70-3

1 2

1

R495

R495 100K_0402_5%

100K_0402_5%

C773

C773 1000P_0402_50V7K

1000P_0402_50V7K

D

Q27

2N7002_SOT23

S

H5

H_3P0H5H_3P0

1

2

1

H6

H_3P0H6H_3P0

1

H20

H_4P2

1

H17

H_3P0X3P5N

1

H_4P2

H_3P0H7H_3P0

H21

H7

1

ON/OFF [29]

51ON# [35]

H8

H_3P0H8H_3P0

1

H22

H_4P2

1

H13

H_3P0N

1

H_4P2

H_3P0H9H_3P0

H23

H10

H9

H_3P0

1

FD2

FD1

1

FIDUCIAL_C40M80

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

FD2

1

FIDUCIAL_C40M80

FD3

1

FIDUCIAL_C40M80

Title

Size Document Number Rev

B

Date: Sheet of

FD4

1

FIDUCIAL_C40M80

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

C

33 45Wednesday, June 30, 2010

C

A

+5VALW TO +5VS

+5VALW

U36

8

S

D

7

S

D

6

S

D

1

C826

C828

10U_0805_10V4Z

2

10U_0805_10V4Z

1 1

1 2

+VSB

R574 100K_0402_5%R574 100K_0402_5%

SUSP

2N7002_SOT23

5

1

2

G

Q33

G

Q33

D

SI4800BDY_SO8

5VS_GATE

13

D

S

G

+3VALW TO +3VS

+3VALW

U39

D D D D

SI4800BDY_SO8

3VS_GATE

13

D

S

1

S

2

S

3

S

4

G

8 7 6

1

C840

C841

10U_0805_10V4Z

2

10U_0805_10V4Z

+VSB

2 2

12

R582 200K_0402_5%R582 200K_0402_5%

SUSP

2N7002_SOT23

5

1

2

Q38

G

1 2 3 4

1

2

+5VS

1

C827

C827 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C834

0.1U_0603_25V7K

2

+3VS

1

C842

C842 10U_0805_10V4Z

10U_0805_10V4Z

2

C843

0.1U_0603_25V7K

1

C829

2

1U_0402_6.3V4Z

1

C836

2

1U_0402_6.3V4Z

D

S

1 2 13

D

S

R571

470_0603_5%

1 2 13

2

G

Q31

2N7002_SOT23

R579

470_0603_5%

SUSP

2

G

Q36

2N7002_SOT23

B

SUSP

VGA_ON#

R577

1K_0402_5%

+VSB

R581 47K_0402_5%R581 47K_0402_5%

C830

10U_0805_10V4Z

+VSB

R575 100K_0402_5%R575 100K_0402_5%

R503 47K_0402_5%R503 47K_0402_5%

0.22U_0603_16V4Z

12

C837

10U_0805_10V4Z

1 2

VLDT_EN#

2N7002_SOT23

ACIN[29,30,35]

1

C831

2

10U_0805_10V4Z

1 2

12

2N7002_SOT23

1

C848

2

C

+1.1VALW TO +1.1VS

+1.1VALW

U38

D D D D

SI4800BDY_SO8

1.1VS_GATE

D

R595

@

S

2

G

U37

D D D D

SI4800BDY_SO8

1.5VSG_GATE

D

R596

@

S

2

G

1

S

2

S

3

S

4

G

12

510K_0402_5%

13

D

Q48

Q48 @

@ 2N7002_SOT23

2N7002_SOT23

S

1

S

2

S

3

S

4

G

12

510K_0402_5%

13

D

Q49

Q49 @

@ 2N7002_SOT23

2N7002_SOT23

S

C838

C838 10U_0805_10V4Z

10U_0805_10V4Z

1

C844

0.1U_0603_25V7K

2

C832

10U_0805_10V4Z

1

C835

0.1U_0603_25V7K

2

8 7 6 5

1

2

13

2

Q39

G

ACIN

+1.5V to +1.5VS

+1.5V

8 7 6 5

1

2

13

2

G

Q34

ACIN

+1.1VS

1

2

+1.5VS

1

2

1

C839

2

1U_0402_6.3V4Z

1

C833

2

1U_0402_6.3V4Z

R578

R578 470_0603_5%

470_0603_5%

1 2 13

D

S

1 2 13

D

S

VLDT_EN#

2

G

Q37

2N7002_SOT23

R572

470_0603_5%

VGA_ON#

2

G

Q32

Q32 2N7002_SOT23

2N7002_SOT23

D

SYSON#[28]

SYSON[29,39]

100K_0402_5%

SUSP[41]

SUSP#[29,38]

10K_0402_5%

VLDT_EN[29,40]

10K_0402_5%

R573

R580

VLDT_EN#

R584

SYSON#

2

12

SUSP

2

12

2

12

G

E

+5VALW

1 2

13

+5VALW

1 2

13

+5VALW

1 2

13

+5VALW

D

S

D

S

D

S

R570

R570 100K_0402_5%

100K_0402_5%

Q30

Q30 2N7002_SOT23

2N7002_SOT23

R576

R576 100K_0402_5%

100K_0402_5%

Q35

Q35 2N7002_SOT23

2N7002_SOT23

R583

R583 100K_0402_5%

100K_0402_5%

Q40

Q40 2N7002_SOT23

2N7002_SOT23

R587

R587 100K_0402_5%

3 3

VGA_ON[29,42]

+2.5VS +1.8VS+0.75VS

R590

R590 470_0603_5%

470_0603_5%

1 2 13

D

SUSP SUSP VGA_ON#

2

G

Q44

S

2N7002_SOT23

4 4

R591

R591 470_0603_5%

470_0603_5%

1 2 13

D

S

A

2

G

2N7002_SOT23

2N7002_SOT23 Q45

Q45

+CPU_VDDR

R604

R604 470_0603_5%

470_0603_5%

1 2 13

D

VLDT_EN# SYSON#VLDT_EN#

2

G

Q56

S

2N7002_SOT23

R610

R610 470_0603_5%

470_0603_5%

1 2 13

D

S

2

G

Q69

Q69 2N7002_SOT23

2N7002_SOT23

R592

R592 470_0603_5%

470_0603_5%

1 2 13

D

2

G

Q46

S

2N7002_SOT23

B

+1.5V+NB_CORE

R605

R605 470_0603_5%

470_0603_5%

1 2 13

D

S

2

G

Q57

Q57 2N7002_SOT23

2N7002_SOT23

+5VS

1

C972

2

0.1U_0402_16V4Z

1

C973

0.1U_0402_16V4Z

2

1

2

11/26 DVT for EMI request

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/06 2010/03/12

Compal Secret Data

Deciphered Date

1

C974

2

0.1U_0402_16V4Z

D

1

C975

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

1

C976

2

0.1U_0402_16V4Z

1

C978

C977

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

0.1U_0402_16V4Z

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

VGA_ON#

R586

10K_0402_5%

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

100K_0402_5%

1 2

13

D

Q42

2

G

2N7002_SOT23

12

S

C

of

34 45Wednesday, June 30, 2010

E

A

1 1

SP02000GC00

ACES_50305-00441-001

1

2

3

4

5

GND

6

GND

PJP1

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

PL1

SMB3025500YA_2P

1 2

12

PC4

100P_0402_50V8J

B

12

PC5

PC5 100P_0402_50V8J

100P_0402_50V8J

VIN

12

PC6

PC6 1000P_0402_50V7K

1000P_0402_50V7K

C

PR1

1M_0402_1%

1M_0402_1% 1 2

1

O

VS

8

PU1A

3

P

+

2

-

G

LM393DR_SO8

4

0.1U_0603_25V7K

PR4

22K_0402_5%

1 2

PC2

PR9

10K_0402_5%

1 2

12

PR2

10K_0402_5%

PR5

10K_0402_1%

ACIN[29,30,34]

1 2

10K_0402_5%

PR8

12

PD1

GLZ4.3B_LL34-2

PACINDC_IN_S1

12

D

VINVIN

12

PR3

84.5K_0402_1%

12

PR7

PR7 20K_0402_1%

20K_0402_1%

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

RTCVREF

PACIN[38,41]

Vin Dectector

Min. Typ Max. H-->L 16.976V 17.525V 17.728V

2 2

PBJ1

-+

12

ML1220T13RE

ML1220T13RE 45@

45@

+RTCBATT

PJ1

+3VALWP +3VALW

@PC7

@

0.1U_0402_16V7K

2

PC7

JUMP_43X118

(3.9A,160mils ,Via NO.= 8)

1 2

L-->H 17.430V 17.901V 18.384V

0.1U_0402_16V7K

112

0.1U_0402_16V7K

PC130

@PC130

@

PC71

@PC71

@

PJ29

2

112

JUMP_43X118

(3A,120mils ,Via NO.=6)

1 2

PJ22

2

112

JUMP_43X118

(3A,120mils ,Via NO.=6)

1 2

+1.8VS+1.8VSP2

+1.8VS+1.8VSP1

PJ26

PJ3

VIN

PD2

LL4148_LL34-2

PR10

68_1206_5%

13

1 2 12

12

PR11

PR11 68_1206_5%

68_1206_5%

12

PC14

0.1U_0603_25V7K

VS

PD3

3 3

BATT+

CHGRTCP

51ON#[33]

LL4148_LL34-2

PR12

200_0603_5%

1 2

100K_0402_1%

PR14

22K_0402_1%

1 2

PR13

12

PQ1

N1

12

PC13

0.22U_0603_25V7K

0.22U_0603_25V7K TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

2

+5VALWP

PC9

@PC9

@

0.1U_0402_16V7K

+VSBP +VSB

PC11

0.1U_0402_25V6

+NB_COREP +NB_CORE

PC15

@PC15

@

0.1U_0402_16V7K

PJ3

2

112

JUMP_43X118

(5A,200mils ,Via NO.= 10)

1 2

PJ5

2

112

JUMP_43X39

(120mA,40mils ,Via NO.= 2)

1 2

PJ8

2

112

JUMP_43X118

1 2

(7.09A,300mils ,Via NO.=16)

+1.1VALWP +1.1VALW+5VALW

@PC8

@

0.1U_0402_16V7K

@PC10

@

0.1U_0402_16V7K

@PC12

@

0.1U_0402_16V7K

+2.5VSP +2.5VS

@PC16

@

0.1U_0402_16V7K

RTCVREF

PR17

PR16

560_0603_5%

+CHGRTC

4 4

1 2

PR17

560_0603_5%

1 2

A

3.3V

12

3

PC17

PC17 10U_0805_10V4Z

10U_0805_10V4Z

PU2

OUT

GND

G920AT24U_SOT89-3

1

IN

12

PR15

PR15 200_0603_5%

200_0603_5%

N2

2

12

PC18

PC18 1U_0805_25V4Z

1U_0805_25V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2010/03/12

Compal Secret Data

Deciphered Date

C

0.1U_0402_16V7K

+CPU_VDDRP +CPU_VDDR

@PC70

@

0.1U_0402_16V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

PJ26

2

PC8

PC10

PC12

PC16

PC70

112

JUMP_43X118

(7A,280mils ,Via NO.=14)

1 2

PJ11

2

112

JUMP_43X118

(3A,120mils ,Via NO.=6)

1 2

PJ6

2

112

JUMP_43X118

JUMP_43X118 PJ19

PJ19

1 2

2

112

JUMP_43X118

(8.1A,320mils ,Via NO.=17)

PJ9

2

112

JUMP_43X39

1 2

PJ21

2

112

JUMP_43X39

(1.5A,40mils ,Via NO.= 3)

1 2

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

D

+0.75VS+0.75VSP

+1.5V+1.5VP

C

35 45Wednesday, June 30, 2010

C

A

B

C

D

PH1 thermal protection at 92 degree C Recovery at 56 degree C PH2 thermal protection at 85 degree C Recovery at 56 degree C

PC21

VL

12

PU3

1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

PR27

26.7K_0402_1%

1 2

8 7 6 5

PR169

1 2

12

PH2

100K_0402_1%_NCP15WF104F03RC

13.7K_0402_1%

12

PR28

21K_0402_1%

PR30

9.53K_0402_1%

1 2

12

PH1

PH1 100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

PR21 100K_0402_1%

100K_0402_1%

1 2

@PR21

@

MAINPWON [8,37,41]

10

GND

1 1

SUYIN_200275GR008G13GZR

2 2

GND

PJP2

CONN@

9 8

8

7

EC_SMDA

6

5

4

3

2

1

TH PI

<40,41>

VMB

PL2

BATT_S1

SMB3025500YA_2P

1 2

12

PC20

PC20 1000P_0402_50V7K

1000P_0402_50V7K

PL2

BATT+

12

PC19

0.01U_0402_25V7K

<40,41>

12

PR261

PR261 1K_0402_5%

1K_0402_5%

EC_SMCA

100_0402_1%

6.49K_0402_1%

12

PR33

PR33 1K_0402_1%

1K_0402_1%

PR32

PR24

PR29

PR29 100_0402_1%

100_0402_1%

1 2

12

EC_SMB_DA1 [29]

EC_SMB_CK1 [29]

+3VALWP

BATT_TEMP [29]

0.1U_0603_25V7K

PQ3

B+

100K_0402_1%

3 3

100K_0402_1%

VL

PR38

100K_0402_1%

SPOK[37,39]

4 4

A

1 2

PR39

PR39 0_0402_5%

0_0402_5%

12

PC27

@

13

D

2

G

S

0.1U_0402_16V7K

PQ4

PQ4 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PR34

1 2

PR36

22K_0402_1%

12

PC24

@

TP0610K-T1-E3_SOT23-3

0.22U_0603_25V7K

13

2

B

12

PC25

@

+VSBP

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2010/03/12

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

D

36 45Wednesday, June 30, 2010

C

5

4

3

2

1

TPS51427_B+

PR50

PL26

B+

D D

PC122

1 2

PC120

2200P_0402_25V7K

C C

+3.3VALWP Ipeak=5.9A ; Imax=4.1A;Iocp=6.6A Choke DCRmax=23m ohm, Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 294K)/10=147mV Ilimit=147mV/18m ~ 147mV/15m =8.17A ~ 9.8A Delta I=1.94A (Freq=300KHz) Iocp=Ilimit+Delta I/2 =9.14A ~ 10.77A

B B

2200P_0402_25V7K

+3VALWP

220U_6.3V_M

1 2

HCB4532KF-800T90_1812

1

+

PC39

2

4.7UH_SIL1045R-4R7PF_6.3A_30%

12

PR42

PR42 0_0402_5%

0_0402_5%

PR44

@PR44

@ 10K_0402_1%

10K_0402_1%

1 2

1SS355_SOD323-2

PC31

10U_1206_25V6M

PL3

1 2

680P_0402_50V7K

VS

PD16

PC45

2200P_0402_50V7K

PR41

4.7_1206_5%

PC37

PD17

GLZ5.1B_LL34-2

1 2

12

MAINPWON[8,36,41]

12

1 2

3 6

241

3 6

241

PR46

100K_0402_1%

578

PQ5

AO4466_SO8

578

PQ7

PQ7 AO4712_SO8

AO4712_SO8

PR58

1 2

200K_0402_5%

PR52

806K_0603_1%

PR54

0_0402_5%

PC44

0.22U_0603_25V7K

1 2

VL

1 2

12

PR50

0_0805_5%

1 2

PR40

2.2_0603_5%

PC43

0.1U_0603_25V7K

1 2

PC47 0.22U_0603_10V7KPC47 0.22U_0603_10V7K

PR56

@PR56

@ 0_0402_5%

0_0402_5%

PR55

@PR55

@ 47K_0402_5%

47K_0402_5%

1 2

0.047U_0402_16V7-K

0.047U_0402_16V7-K PC38

PC38

12

PC40

0.1U_0603_25V7K

DH3

BST3A

12

DL3

FB3

VL

2VREF_TPS51427

1 2

PR51

0_0402_5%

1 2

2VREF_TPS51427

12

PC46

@PC46

@

0.047U_0402_16V7K

33 26 24

25

23

30

32

1

8

20

4

14

27

1 2

6

PU4

VIN

TP DRVH2 VBST2

LL2

DRVL2

VOUT2

REFIN2

VREF2

LDOREFIN

NC

EN_LDO

EN1

EN2

VREF3

5

PC143

1 2

1U_0603_10V6K

1 2

PC41

1U_0603_10V6K

3

V5FILT

TONSE

2

12

PR53

PR53 0_0402_5%

0_0402_5%

2VREF_TPS51427

VL

12

PC29

7

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M 19

LDO

V5DRV DRVH1

VBST1

DRVL1

PGND

VOUT1

VSW

SKIPSEL

PGOOD2

PGOOD1

TRIP1

TRIP2

GND

21

DH5

15

BST5A

17

LX5LX3

16

LL1

DL5

18

22

10

FB5

11

FB1

9

29

28

13

12

ILIM2

31

SN0806081RHBR_QFN32_5X5

PC36

1U_0603_10V6K

1 2

PR47 2.2_0603_5%PR47 2.2_0603_5%

PC42

0.1U_0603_25V7K

PR59 0_0402_5%@PR59 0_0402_5%@

PR45 0_0402_5%PR45 0_0402_5%

1 2

578

PQ6

AO4466_SO8

3 6

241

578

PQ8

AO4712_SO8

12

1 2

12

PR60

330K_0402_1%

PR57

294K_0402_1%

+5VALWP Ipeak=7A ; Imax=5A;Iocp=8.4A Choke DCRmax=23m ohm Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 330K)/10=165mV Ilimit=165mV/18m ~ 165mV/15m =9.167A ~ 11A Delta I=1.96A (Freq=400KHz) Iocp=Ilimit+Delta I/2 =9.729A ~ 11.562A

3 6

241

VL

SPOK [36,39]

12

TPS51427_B+

PC28

10U_1206_25V6M

PL4

4.7UH_SIL1045R-4R7PF_6.3A_30%

12

PR43

4.7_1206_5%

4.7_1206_5% 12

PC34

680P_0402_50V7K

12

PC30

2200P_0402_50V7K

12

PR49

63.4K_0402_1%

PR48

10K_0402_1%

+5VALWP

1

+

PC35

PC35 220U_6.3V_M

1 2

220U_6.3V_M

2

PQ37

2

A A

5

4

PQ37 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

1 3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2010/03/12

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

37 45Wednesday, June 30, 2010

1

C

A

B

C

D

Iada=0~4.74A(90W/19V=4.736A)

1 2 36

12

13

P2

12

PC62

0.1U_0603_25V7K

12

13

D

PQ56

PQ56 2

G

S

PR94

PR94 200K_0402_1%

200K_0402_1%

PR69

PR69 150K_0402_1%

150K_0402_1%

IREF[29]

PQ15

PQ15 AO4407_SO8

AO4407_SO8

1 2 3 6

4

6251VDD

1 2

3S/4S#[29]

2N7002W-T/R7_SOT323-3

2

PR81

80.6K_0402_1%

PR83

100K_0402_1%

0.01U_0402_25V7K

8 7

5

1 2

PC56

5600P_0402_25V7K

FSTCHG

PR70 47K_0402_5%PR70 47K_0402_5%

13

1 2

PC55

ADP_I[29]

12

6251VREF 6251aclim

PC60

0.01U_0402_25V7K

PQ14

PQ14 AO4407_SO8

VIN

1 1

12

PR62

PR62 47K_0402_1%

47K_0402_1%

2

13

D

PQ22

2

2N7002W-T/R7_SOT323-3

G

2 2

S

ACON[41]

PACIN[35,41]

ACOFF[29,41]

AO4407_SO8

8 7

5

4

PQ19

47K

PQ19 PDTA144EU_SOT323-3

PDTA144EU_SOT323-3

1 3

PR79

22K_0402_5%

1 2

PQ53

2

47K

2

13

PQ21

PQ21 PDTC115EU_SOT323

PDTC115EU_SOT323

ACON CHGCHG

PACIN

PDTC115EU_SOT323

ACOFF

65W/90W#[29]

3 3

CP = 85%*Iada ; CP = 4.03A

P3

PR64

PD10

1 2

1SS355_SOD323-2

PR68 10K_0402_5%PR68 10K_0402_5%

1 2

.1U_0402_16V7K

PQ24

PQ24 PDTC115EU_SOT323

PDTC115EU_SOT323

PC54 6800P_0402_25V7KPC54 6800P_0402_25V7K

1 2

PR75 10K_0402_1%PR75 10K_0402_1%

1 2

PC57

100P_0402_50V8J@

PC58

1 2

.1U_0402_16V7K

PR84

1 2

12.1K_0402_1%

1 2

12

100K_0402_1%

PC67

PQ54

2

G

4

PR61

0.02_2512_1%

3

PQ17 TP0610K-T1-E3_SOT23-3PQ17 TP0610K-T1-E3_SOT23-3

2

6251VDD

PC49

12

PC49

12

PR71

100K_0402_1%

PR77

100_0402_1%

1 2

6251VREF

PR85

2.55K_0402_1%

PR85

2.55K_0402_1%

12

20K_0402_1%

PR87

12

13

D

2N7002W-T/R7_SOT323-3

S

B+

DCIN

13

PR66

12

100K_0402_1%

12

PU5

1

2.2U_0603_6.3V6K

6251_EN CSON

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

24

23

22

21

20

19

18

17

16

15

14

13

PJ23

2

JUMP_43X118

PQ18

PQ18 PDTC115EU_SOT323

PDTC115EU_SOT323

BST_CHG

DL_CHG

1

2

0.1U_0603_25V7K

DCIN

PC53

0.047U_0603_16V7K

0.047U_0603_16V7K 1 2

1 2

PC129

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

0_0603_5%

1 2

6251VDDP

PD9

BAS40CW_SOT323-3

PC127

20_0402_5%

PR82

1 2

112

CSIP

2 3

wrong Value

12

PR72

20_0402_5%

1 2

PR73

12

PR74

PR74 20_0402_5%

20_0402_5%

1 2

PR76

2_0402_5%

0.1U_0603_25V7K

BST_CHGA

12

PD12

RB751V-40_SOD323-2

1 2

PC64

4.7U_0805_6.3V6K

CSIN

FSTCHG

SUSP#

PC59

PR86

4.7_0603_5%

12

PC50

10U_1206_25V6M

CSOP

12

6251VDD

12

PC51

PC48

10U_1206_25V6M

0.1U_0603_25V7K

FSTCHG[29]

SUSP# [29,34]

CHG_B+

12

PC61

2200P_0402_25V7K

578

3 6

241

578

3 6

241

B+

PQ16

PQ16 AO4407_SO8

AO4407_SO8 1 2 3 6

4

PR65

10K_0402_1%

1 2 13

PQ20

PDTC115EU_SOT323

PQ55

PQ55 AO4466_SO8

AO4466_SO8

PL5

1 2

12

PR80

4.7_1206_5%

@

12

PC128

@

680P_0402_50V7K

PL5

10UH_PCMB104T-100MS_6A_20%

PQ57

PQ57 AO4466_SO8

AO4466_SO8

8 7

5

PR63

47K_0402_1%

1 2

2

1 2

VIN

PD8

1 2

1SS355_SOD323-2

200K_0402_1%

1 2

PD11

1SS355_SOD323-2

12

PC52

0.1U_0603_25V7K

PR78

4 3

0.02_1206_1%

PQ23

PR67

13

D

S

ACOFF

VIN

PACIN

2

2N7002W-T/R7_SOT323-3

G

<40,41>

12

PC68

10U_1206_25V6M

12

PC63

10U_1206_25V6M

BATT+

VMB

PR88

15.4K_0402_1%

Iada=0~4.74A(90W) CP= 85%*Iada; CP=4.03A Iada=0~3.42A(65W) CP= 85%*Iada; CP=2.91A

CALIBRATE#[29]

CP mode

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) where Vaclm=1.464V (90W), Iinput=4.03A PR84=12.1K;PR87=20K where Vaclm=0.391(65W), Iinput=2.91A PR84=12.1K;PR85=2.55K

CC=0.6~4.48A

IREF=1.016*Icharge

ADP_I = 19.9*3.42*0.95*0.02=1.29V

4 4

BATT Type

Normal 3S LI-ON Cells

Charging Voltage (0x15)

12600mV

CV mode

12.60V

IREF=0.43V~3.24V

-

A

1 2

B

PR90

31.6K_0402_1%

1 2

LI-3S :13.5V----BATT-OVP=1.5012V

VS

BATT-OVP=0.1112*VMB Per cell=3.5V

PR92

10K_0402_1%

BATT_OVP[29]

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

2007/09/20 2010/03/12

PU18B

LM358DT_SO8

7

0

Compal Secret Data

Deciphered Date

12

PC65

8

5

P

+

6

-

G

4

C

12

PR89

PR89 340K_0402_1%

340K_0402_1%

12

PR91

PR91 499K_0402_1%

499K_0402_1%

0.01U_0402_25V7K

12

PR93

105K_0402_1%

<40,41>

12

PC66

0.01U_0402_25V7K

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

D

C

38 45Wednesday, June 30, 2010

C

A

1 1

PR97

0_0402_5%

SPOK[36,37]

+5VALW

<Vo=1.1V> VFB=0.75V V=0.75*(1+4.7K/10K)=1.1V Fsw=280KHz

2 2

Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm. Ipeak=7.42A, Imax=5.2A, Iocp=8.9A Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A =>1/2Delta I=1.03A Vtripmax=Iocp*Rdson=8.9*5.6*1.3=0.065V Rcs=Vtrip/9uA=0.065V/9uA=7.2K choose Rcs=7.32K Iocpmax=((7.32K*11uA)/0.0045)+1.03A=19A Iocpmin=((7.32K*9uA)/(0.0056*1.3))+1.03A=10A Iocp=10A~19A

SYSON[29,34]

3 3

+5VALW

<Vo=1.5V> VFB=0.75V Vo=0.75*(1+10K/10K)=1.5V Fsw=335KHz

Cout ESR=17 mohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm Ipeak=13.5A, Imax=9.5A, Iocp=16.2A Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=3.9A =>1/2Delta I=1.95A

4 4

Vtripmax=Iocp*Rdson=16.2*5.6*1.3=0.118V Rcs=Vtrip/9uA=0.118V/9uA=13.1K choose Rcs=13K Iocpmax=((13K*11uA)/0.0045)+1.95A=32A Iocpmin=((13K*9uA)/(0.0056*1.3))+1.95A=18A Iocp=18A~32A

A

1 2

30K_0402_5%

30K_0402_5% @

@

PR101

100_0603_1%

1 2

4.7U_0603_6.3V6K

PR105 0_0402_5%PR105 0_0402_5%

1 2

PR109

@PR109

@

30K_0402_5%

PR111

100_0603_1%

1 2

4.7U_0603_6.3V6K

PR99

PC87

12

PC77

12

PC85

@PC85

@

0.1U_0402_16V7K

12

PC74

0.1U_0402_16V7K

@

12

47P_0402_50V8J@

1 2

10K_0402_1%

1 2

PR114

PR114 10K_0402_1%

10K_0402_1%

PC79

47P_0402_50V8J@

1 2

PR103

4.7K_0402_1%

4.7K_0402_1% 1 2

PR104

8.87K_0402_1%

PC89

PR113

B

PR96

255K_0402_1%

1 2

15

1

PU6

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

PU7

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

NC

EN/DEM

GND7PGND

PR106

226K_0402_1%

1 2

BST_1.5V

15

1

14

NC

BOOT

UGATE

EN/DEM

PHASE

LGATE

GND7PGND

RT8209BGQW_WQFN14_3P5X3P5

8

Issued Date

8

VDDP

PR98

2.2_0603_5%

BST_1.1VALW

1 2

14

13

BOOT

UGATE

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209BGQW_WQFN14_3P5X3P5

PR108

2.2_0603_5%

1 2

13 12 11

CS

10 9

BST_1.1VALW-1 DH_1.1VALW LX_1.1VALW

1 2

PR102

7.32K_0402_1%

7.32K_0402_1% DL_1.1VALW

BST_1.5V-1

DH_1.5V LX_1.5V

1 2

PR112

13K_0402_1%

DL_1.5V

2007/09/20 2010/03/12

0.1U_0603_25V7K

+5VALW

PC84

0.1U_0603_25V7K

0.1U_0603_25V7K 1 2

+5VALW

12

PC90

4.7U_0805_10V6K

Compal Secret Data

PC75

PC75 1 2

12

PC80

4.7U_0805_10V6K

Deciphered Date

C

PQ28

C

PQ25

PQ27

PQ26

578

3 6

578

3 6

578

3 6

578

3 6

241

12

AO4466_SO8

241

1UH_FDUE1040D-1R0M-P3_21.3A_20%

241

AO4456_SO8

AO4466_SO8

1UH_MMD-10DZ-1R0M-X1A_18A_20%

1UH_MMD-10DZ-1R0M-X1A_18A_20% <BOM Structure>

AO4456_SO8

12

PC139

2200P_0402_50V7K

1 2

12

PR100

4.7_1206_5%

12

PC78

PC78 680P_0603_50V7K

680P_0603_50V7K

12

PL7

1 2

12

PR110

4.7_1206_5%

12

PC88

PC88 680P_0603_50V7K

680P_0603_50V7K

1.1VALW_B+

PC72

10U_1206_25V6M

DCR= 7.5 mohm

PL6

FBMA-L11-322513-151LMA50T_1210

1.5V_B+

PC82

10U_1206_25V6M

12

PC83

2200P_0402_50V7K

1

+

PC86

PC86 330U_2.5V_M

330U_2.5V_M

2

Title

Size Document Number Rev

Custom

Date: Sheet

PL31

FBMA-L11-322513-151LMA50T_1210

12

+1.1VALWP

1

+

PC76

PC76 330U_6.3V_M

330U_6.3V_M

2

PL32

12

+1.5VP

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

D

B+

C

of

39 45Wednesday, June 30, 2010

D

A

B

C

D

VLDT_EN[29,34]

PR159

FB1_NB_COREP

2

G

12

+5VALW

PR158

11.8K_0402_1%

1 2 13

D

S

PQ44

SSM3K7002F_SC59-3

PR116

100K_0402_5%

1 2

PR118

@PR118

@

30K_0402_5%

PR120

100_0603_1%

1 2

4.7U_0603_6.3V6K

PC96

12

PC94

PC94 .1U_0402_16V7K

.1U_0402_16V7K

12

FB1_NB_COREP

PC98

47P_0402_50V8J@

1 2

PR122

2.37K_0402_1%

2.37K_0402_1% 1 2

12

PR123

8.87K_0402_1%

PL33

FBMA-L11-322513-151LMA50T_1210

1

PC218

100U_25V_M

2

1

+

PC95

PC95 330U_6.3V_M

330U_6.3V_M

2

+

12

+NB_COREP

NB_CORE_B+

12

PC91

578

PQ29

PR115

255K_0402_1%

1 2

15

1

PU8

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

NC

EN/DEM

GND7PGND

8

PR117

2.2_0603_5%

BST_NB_CORE

1 2

14

13

BOOT

UGATE

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209BGQW_WQFN14_3P5X3P5

BST_NB_CORE-1 DH_NB_CORE LX_NB_CORE

1 2

PR121

7.5K_0402_1%

7.5K_0402_1% DL_NB_CORE

PC93

1 2

0.1U_0603_25V7K

+5VALW

12

PC99

4.7U_0805_10V6K

PQ30

3 6

578

3 6

AO4466_SO8

241

1UH_FDUE1040D-1R0M-P3_21.3A_20%

241

AO4456_SO8

PC91

PC140

2200P_0402_50V7K

PL8

1 2

12

PR119

4.7_1206_5%

12

PC97

680P_0603_50V7K

10U_1206_25V6M

DCR= 7.5 mohm

B+

POWER_SEL

HIGH 0.95V

1.1VLOW

SSM3K7002F_SC59-3

PR157

PR157 0_0402_5%

0_0402_5%

PC126

SSM3K7002F_SC59-3

PQ43

2

G

12

G

1 1

POWER_SEL[13]

<Vo=1.1V> VFB=0.75V V=0.75*(1+4.7K/10K)=1.1V

2 2

Fsw=280KHz Cout ESR=15m ohm Rdson(max)=18m Rdson(typ)=15m

Ipeak=7.6A, Imax=5.4A, Iocp=9.2A Delta I=((19-1.1)*(1.1/19))/(L*Fsw)=2.06A =>1/2Delta I=1.03A Vtripmax=Iocp*Rdson=9.2*5.6*1.3=0.067V Rcs=Vtrip/9uA=0.067V/9uA=7.44K choose Rcs=7.5K Iocpmax=((7.5K*11uA)/0.0045)+1.03A=19.36A Iocpmin=((7.5K*9uA)/(0.018*1.3))+1.03A=10.3A Iocp=10.3A~19.36A

1 2

0.01U_0402_25V7K

PR131

10K_0402_1%

13

D

S

+5VALW

12

10K_0402_5%

1 2

PC125

0.1U_0402_25V6

+1.5V

PU16

APL5508-25DC-TRL_SOT89-3

2

PC114

GND

3

OUT

12

PC113

4.7U_0805_6.3V6K

PC113

1

4.7U_0805_6.3V6K

Title

Size Document Number Rev

Custom

Date: Sheet of

12

PR153

@PR153

@ 150_1206_5%

150_1206_5%

+2.5VSP

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

D

C

40 45Wednesday, June 30, 2010

C

IN

PU12

7

POK

8

EN

@PR152

@

10K_0402_1%

+5VALW

6

VIN

VOUT

VCNTL

VOUT

FB

VIN

GND

APL5915KAI-TRL_SO8

1

+5VALW

12

PR152

12

PR160

12

PC115

PC115 1U_0402_6.3V6K

1U_0402_6.3V6K

5 4 3 2 9

PR161

165K_0402_1%

SSM3K7002F_SC59-3

PQ58

2

G

1

PJ24

1

JUMP_43X79@

2

12

PC116

4.7U_0805_6.3V6K

PR154

31.6K_0402_1%

12

13

D

S

12

PR156

PR156 249K_0402_1%

249K_0402_1%

12

PC118

0.01U_0402_25V7K

B

+3VS

12

1U_0402_6.3V6K

PC119

22U_0805_6.3V6M

+CPU_VDDRP

12

VDDR_SW

HIGH 1.05V

0.9VLOW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2010/03/12

Compal Secret Data

Deciphered Date

C

3 3

PR162

VLDT_EN

PR162

10K_0402_1%

1 2

PR155

@PR155

@ 10K_0402_1%

10K_0402_1%

1 2

PC121

.1U_0402_16V7K

VDDR_SW[21]

12

PR188

@PR188

@

47K_0402_5%

A

VR_ON[29,43]

4 4

5

+1.5V

1

PJ17

PJ17 JUMP_43X79

JUMP_43X79

2

D D

4.7U_0805_6.3V6K

PR133

300K_0402_5%

SUSP[34]

1 2

PC104

0.22U_0402_10V4Z

2

PC100

1 2

13

D

PQ32

2

G

12

S

2N7002W-T/R7_SOT323-3

Change 300K / 0.22u delay

PR130

1K_0402_1%

PR134

1K_0402_1%

4

PU9

1

VIN

2

12

PC102

.1U_0402_16V7K

GND

3

VREF

4

VOUT

APL5336KAI-TRL_SOP8P8

+0.75VSP

12

PC103

PC103 22U_0805_6.3V6M

22U_0805_6.3V6M

VCNTL

8

NC

7

NC

6 5

NC

9

TP

3

+3VALW

12

PC101

PC101 1U_0603_6.3V6M

1U_0603_6.3V6M

VIN

PD13

12

LL4148_LL34-2

ACOFF[29,38]

2

PR124

1K_1206_5%

1 2

PR125

1K_1206_5%

1 2

PR126

1K_1206_5%

1 2

PR127

1K_1206_5%

1 2

1

PQ31

TP0610K-T1-E3_SOT23-3

12

PR128

PR129

100K_0402_5%

13

PQ33

PQ33 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

100K_0402_5%

2

12

PR132

100K_0402_5%

13

B+

13

PQ34

PQ34 DTC115EUA_SC70-3

DTC115EUA_SC70-3

Ipeak=1A, Imax=0.7A

C C

PR139

499K_0402_1%

47K_0402_5%

13

B+

12

PR136

PR136 499K_0402_1%

499K_0402_1%

12

PR141

12

PQ36

PQ36 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

PC107

0.01U_0402_25V7K

+5VALW

PACIN [35,38]

PR135

2.2M_0402_5%

7

2.2M_0402_5%

VS

8 PU1B

PU1B

P

+

O

G

LM393DR_SO8

4

PR140

34K_0402_1%

12

5 6

-

12

PC106

1000P_0402_50V7K

12

32.4

12

PR142

@PR142

@

66.5K_0402_1%

12

PR138

191K_0402_1%

PRG++

PQ35

13

D

S

2

G

VL

12

PR137

100K_0402_1%

PD14

MAINPWON[8,36,37]

B B

ACON[38]

PD14

2

1

3

BAS40CW_SOT323-3

12

PC105

0.1U_0603_25V7K

RTCVREF

ACIN

Precharge detector

Min. typ. Max. H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V

SSM3K7002FU_SC70-3

BATT ONLY

Precharge detector

A A

Min. typ. Max. H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2007/09/20 2010/03/12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

41 45Wednesday, June 30, 2010

1

C

of

5

D D

+1.8VSP1

PJ28

+5VALW

112

JUMP_43X79

C C

2

12

4

402K_0402_1%

12

PC157

0.1U_0402_25V6

PR147

12

.1U_0402_16V7K

PC123

PC154

1 2

10U_0805_10V4Z

316K_0402_1%

316K_0402_1% PR145

PR145

1 2

PC153

1 2

PR148

0_0402_5%

10U_0805_10V4Z

PU11

1

EN/SYNC

FB

2

GND

3 4 5

GND

SW

IN

POK

BS

MP2121DQ-LF-Z_QFN10_3X3

TP

+5VALW

3

PR144

200K_0402_1%

1 2

12

PC156

0.22U_0402_10V4Z

10 9 8 7 6 11

2.2UH_MSCDRI-74A-2R2M-E_6.5A_20%

12

PD15

@

B340A_SMA2

PL9

1 2

12

PR143

4.7_1206_5%

12

PC155

PC155 680P_0603_50V7K

680P_0603_50V7K

VGA_ON [29,34]

2

+1.8VSP1

12

PC124

PC117

22U_0805_6.3V6M

1

+3VALW

1

PJ18

@PJ18

@

1

JUMP_43X79

2

12

PC112

@PC112

@

4.7U_0603_6.3V6K

B B

PR151

@ PR151

@ 200K_0402_1%

VGA_ON

A A

5

4

200K_0402_1%

1 2

0.1U_0402_10V7K

PC150

@PC150

@

12

Security Classification

12

PC109

@PC109

@

1U_0402_6.3V6K

PU14

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

12

@

PR146

PR146 47K_0402_5%

47K_0402_5%

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

VOUT

4

VOUT

15K_0402_1%

2

FB

GND

APL5913-KAC-TRL_SO8

1

@

2008/08/10 2010/03/12

15K_0402_1%

12

PR149

@PR149

@

Compal Secret Data

12

PR150

@PR150

@

12K_0402_1%

Deciphered Date

PC108

@PC108

@

0.01U_0402_25V7K

12

PC111

22U_0805_6.3V6M

2

+1.8VSP2

@PC111

@

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

42 45Wednesday, June 30, 2010

1

C

A

B

C

D

E

F

G

H

1 2 3 4

5

4

TPCA8028-H_SOP-ADVANCE8-5

5

TPCA8030-H_SOP-ADV8-5

4

CPU_B+

12

PC185

PC187

PC186

10U_1206_25V6M

0.01U_0402_25V7K

2200P_0402_50V7K

PL16

3.3UH_SIQB74B-3R3PF_5.9A_20%

3.3UH_SIQB74B-3R3PF_5.9A_20% 1 2

12

PR217

4.7_1206_5%

12

PC193

PC193 680P_0603_50V7K

680P_0603_50V7K

PQ46

TPCA8030-H_SOP-ADV8-5

123

PQ47

PQ48

4

123 5

TPCA8028-H_SOP-ADVANCE8-5

PQ51

123

PQ52

PQ49

4

123 5

TPCA8028-H_SOP-ADVANCE8-5

CPU_VDDNB_FB_H [8]

PHASE_NB

LGATE_NB PHASE_NB UGATE_NB

12

PR226

PR226 10_0402_5%

10_0402_5%

1 2

36 35 34 33 32 31 30 29 28 27 26 25

TP

49

12

PC215

1000P_0402_50V7K

PR260

6.81K_0402_1%

6.81K_0402_1% 12

LGATE_NB

UGATE_NB

PHASE_NB

BOOT_NB

BOOT_NB BOOT0 UGATE0 PHASE0

LGATE0

LGATE1

PHASE1 UGATE1 BOOT1

PQ50

8

G2

7

S2/D1

6

S2/D1

5

S2/D1

AO4932_SO8

PR230

2.2_0603_5%

1 2

PC191

0.22U_0603_10V7K

CPU_VDDNB_FB_L [8]

UGATE0

PHASE0

PR229

2.2_0603_1%

BOOT0

1 2

0.22U_0603_10V7K

+5VS

12

PC202

PC202 1U_0603_16V6K

1U_0603_16V6K

UGATE1

PHASE1

PR243

2.2_0603_1%

BOOT1

1 2

0.22U_0603_10V7K

TPCA8028-H_SOP-ADVANCE8-5

PC199

D2 D2

G1

S1

1 2

LGATE0

1 2

PC207

LGATE1

PC183

33P_0402_50V8K

1 1

PR215

2_0603_5%

1 2

+5VS

12

PC190

0.1U_0603_16V7K

1 2

CPU_B+

PR219

2_0603_5%

12

PR223

PR223 105K_0402_1%@

105K_0402_1%@

12

PR228

PR228 105K_0402_1%@

105K_0402_1%@

12

0.1U_0603_16V7K

VSEN0

10_0402_5%

PR245 10_0402_5%PR245 10_0402_5%

2_0603_5%

PC194

1 2 3 4 5 6 7 8

9 10 11 12

PR241

12

RTN1

PR246 10K_0402_1%PR246 10K_0402_1%

+1.5VS

VSEN1

+CPU_CORE

12

PU15

OFS/VFIXEN PGOOD PWROK SVD SVC ENABLE RBIAS OCSET VDIFF0 FB0 COMP0 VW0

ISP0 ISN0

0_0402_5%

1 2

12

PR252 1K_0402_1%@PR252 1K_0402_1%@

PR254

255_0402_1%

48

47

VIN

ISP0

14

13

PR240

RTN0

12

PR251

PR251 10_0402_5%

10_0402_5%

DIFF_1

4700P_0402_25V7K

12

PR258

1K_0402_5%

VCC

PC213

46

FB_NB

VSEN0

15

PR242 0_0402_5%PR242 0_0402_5%

12

PR237 0_0402_5%PR237 0_0402_5%

PR231 0_0402_5% @PR231 0_0402_5% @

PR234 0_0402_5%PR234 0_0402_5%

PR236 0_0402_5%PR236 0_0402_5%

PR239

95.3K_0402_1%

CPU_VDD0_FB_H[8]

CPU_VDD0_FB_L[8]

12

PC211

180P_0402_50V8J

PC216

12

1200P_0402_50V7K

@PR262

@

+5VS +3VS

12

PR222

PR222 0_0402_5%

0_0402_5%

PR225

PR225 10K_0402_1%@

10K_0402_1%@

1 2 1 2

12

CPU_VDD1_FB_L[8]

COMP0

12

+CPU_CORE

CPU_VDD1_FB_H[8]

VW0

PC212

1000P_0402_50V7K

PR257

6.81K_0402_1%

+3VS

PR227

105K_0402_1%

2 2

VGATE[29]

H_PWRGD_L[19]

CPU_SVD[8]

CPU_SVC[8]

VR_ON[29,40]

PR238

12

21.5K_0402_1%

3 3

DIFF_0

PC210

PR253

4700P_0402_25V7K

255_0402_1%

12

PR255

1K_0402_5%

4 4

FB_0

12

PR256

54.9K_0402_1%

12

PR262 1K_0402_5%

1K_0402_5%

PR256

12

PC184

1200P_0402_50V7K

PC189

1000P_0402_50V7K

PR216

22K_0402_1%

12

PR220

PR220 0_0402_5%

0_0402_5%

42

43

44

RTN_NB

FSET_NB

VSEN_NB

VDIFF1

RTN1

19

17

18

12

PR250

0_0402_5%

PR250

0_0402_5%

PR244

PR259

54.9K_0402_1%

12

PR263 1K_0402_5%

1K_0402_5%

PC184

12

13.7K_0402_1%

40

41

OCSET_NB

FB120VSEN1

PC214

180P_0402_50V8J

@PR263

@

PR214

44.2K_0402_1%

45

COMP_NB

ISL6265AHRTZ-T_TQFN48_6X6

RTN016ISN0

12

0_0402_5%

12

PR218

10_0402_5%

1 2

PR221

38

39

PGND_NB

LGATE_NB

VW1

COMP121ISP1

22

23

ISP1

COMP1FB_1

12

PC217

12

1200P_0402_50V7K

12

37

PHASE_NB

UGATE_NB

ISN1

24

ISN1

VW1

12

+CPU_CORE_NB

PR224

0_0402_5%

BOOT_NB

BOOT0 UGATE0 PHASE0

PGND0 LGATE0

PVCC

LGATE1

PGND1 PHASE1 UGATE1

BOOT1

HCB4532KF-800T90_1812

1 2

12

PC196

PC195

10U_1206_25V6M

@PQ47

@

12

PC203

PC204

10U_1206_25V6M

@PQ52

@

PL15

1

+

PC192

PC192 220U_D2_4VM

220U_D2_4VM

2

CPU_B+

12

10U_1206_25V6M

12

CPU_B+

12

10U_1206_25V6M

12

1

+

PC188

100U_25V_M

2

+CPU_CORE_NB

12

PC197

PC198

0.01U_0402_25V7K

2200P_0402_50V7K

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR232

16.2K_0402_1%

PR233

4.7_1206_5%

PC200

PC200 680P_0603_50V7K

680P_0603_50V7K

PC205

0.01U_0402_25V7K

PR248

4.7_1206_5%

PC208

PC208 680P_0603_50V7K

680P_0603_50V7K

16.2K_0402_1%

1 2

ISP0

12

PC206

2200P_0402_50V7K

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR247

16.2K_0402_1%

1 2

ISP1

12

PC220

PC221

0.01U_0402_25V7K

2200P_0402_50V7K

ISN0

ISN1

12

PC222

0.01U_0402_25V7K

+CPU_CORE

12

PC219

2200P_0402_50V7K

+VDDNB Design Current: 2.8A Max current: 4A OCP_min:5A

PL17

1 2

PR235

1 2

4.02K_0402_1%

4.02K_0402_1% PC201

PC201

12

.1U_0402_16V7K

+CPU_CORE_0 Design Current: 25A Max current: 35A OCP_min:42A

PL18

1 2

PR249

1 2

4.02K_0402_1%

4.02K_0402_1% PC209

PC209

12

.1U_0402_16V7K

B+

1

12

+

PC343

220U_25V_M

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2008/04/16 2010/03/12

Compal Secret Data

Deciphered Date

F

Compal Electronics, Inc.

Title

SCHEMATICS, MB A5912

Size Document Number Rev

C

Wednesday, June 30, 2010

Date: Sheet

G

NAV71

43 45

H

of

C

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

Before modify to fault, we recognize that

D D

ADD 2 switch mos and remove 2 pull high resistance to modify VGA_CORE

1

switch level

VGAPWRSEL pin is open drain state. But after check with AMD AE regoer to clear the foul that VGAPWRSEL pin has driviing ability.so i take away 2 pull high resistance and add 2 switch mos to modify the switch level.

0.1 52

ADD PQ60 and PQ61 remove PR212(10K,0402) and PR213(10K.0402)

2009/08/21 EVT_NAV71

change thermister , tune PH1

2

protection and recovery set point

Add GPU voltagr sence net

3

change DC-IN connector part number to meet pin definition 0.1 43 change part number is SP020908120 2009/09/10 EVT_NEW75

4

change reistance PR81 value

5

C C

ADD switch circuit for 1.05V

6

Change enable signal of +CPU_VDDRP

7

8

change resistance size

change capacitor value for

0.75VSP request

9

Add snubber and boost resistance of 1.1Valw and 1.5V

10

B B

11

Add bead For reduce B+ noise 0.2 37,39,40

cause for component de-rating . Prevent the component break down when inrush current happen.

change thermister from 150K to 100K

Cause GPU have GCORE_SEN and FB_GND pin so power add receive net.

Cause meet battery Ki value setting from 1.106 to 0.7224. change PR81 from 154K(0402_1%) to 80.6K(0402_1%)

Cause follow AMD electrcial sheet, VDDIO/ VDDR voltage setting procedure. AMD processor will switch between 1.05V and 0.9V by VDDIO and VDDR

Cause follow HW demand

Cause follow HW request 0.1 41 Change PC103 value from 10u to 22u 2009/10/15 EVT_NEW75_6L

Cause follow EMI request 0.2 39

0.1 44 2009/08/27 EVT_NEW75

0.1 51

0.1 46 change resistance PR81 value from 154K to 80.6K 2009/09/22 EVT_NEW75

0.1 48

0.1 41 change +CPU_VDDR enable signal from VLDT_EN

0.1 39 change PR61 from (0.02_1206_1%) to (0.02_2512_1%) 2009/10/06 EVT_NEW75

thermister part number SL200000V00 and PR28 change to 21K, PR30 change to 9.53K

ADD GCORE_SEN and FB_GND net, also add PR296(0_0402_1%), PR297(10_0402_5%) and PR298(0_0402_5%)

ADD PR161 (165K_0402_1%), PQ58,PR152(10K_0402_5%),PR160(10K_0402_5%), PC131(0.1U_25V6) , change PR161 value from 100K to 249K, and ADD enable net name -VDDR_SW

to VR_ON

Add 4.7 ohm to PR100, add cap. 680p to PC78 and add 2.2 ohm toPR98. Add 4.7 ohm to PR110, add cap. 680p to PC88 and add 2.2 ohm toPR108

Add PL31,PL32,PL33(SM010020720 ) and PL26(SM010018210 )

2009/09/04 EVT_NEW75

2009/09/22 EVT_NEW75

2009/10/02 EVT_NEW75_6L

2009/11/23 EVT_NEW75_6L

12

13

14

15

A A

16

Change chock Cause A phase put wrong chock 0.2 37,39,40 Change PL9 from SH00000FK00 to SH000009Q00 2009/11/23 EVT_NEW75_6L

Change resistance value

Cause Hw request 1.1Valw need to set to 1.15V, so change divider resistance PR104

0.2 39

ADD capacitance Cause EMI request 0.2 43

change resistance value Cause NB_CORE need to switch 0.2 40

ADD Boost resistance Cause EMI request 0.2 37-43

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Change PR104 from SD000000680 (S RES 1/16W

8.45K +-1% 0402 ) to SD034887180 (S RES 1/16W 8.87K +-1% 0402)

ADD PC219 PC220 SE074222K80 (S CER CAP 2200P 50V K X7R 0402 ) and PC221 PC222 SE00000MJ00 ( S CER CAP 0.047U 25V K X7R 0402 )

change PR158 from SD034232280 (S RES 1/16W

23.2K +-1% 0402) to SD034118280 ( S RES 1/16W

11.8K +-1% 0402 )

ADD PR40, PR47,PR117 and PR230 from SD013000080 (S RES 1/10W 0 +-5% 0603) to SD013220B80 (S RES 1/10W 2.2 +-5% 0603 )

Compal Secret Data

2007/09/20 2010/03/12

Compal Secret Data

Deciphered Date

2

2009/12/01 EVT_NEW75_6L

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

1

C

44 45Wednesday, June 30, 2010

C

5

4

3

2

1

11/20

1. P.21 unstuff Y4, C588, C589, R368 for AMD suggest

2. P.19 Modify Y3 net connect

3. P.25 Change C923, C924 as 33pF for Y5

11/24

D D

1. P.13, P.15, P.20, P.23 Add Ext@ & Int@ option ; Modify CLK_SBLINK_BCLK net connect

2. P.13, P.16, P.20 Add VB@ & UNVB@ option

3. P.34 Change U38 as 4430(SB000007O10)

4. P.27 Add R835, R837 unstuff D44, R836 for WiMax/Wlan LED request ; change R492 as 100Komh for EC request

5. P.30 Change R477, R499 as 680ohm ; R478, R498 as 3.9kohm for LED brightness

11/25

1. P.19, P20 update SB GPIO PIN

2. P.29 Add R838, R839 for EC RevD3, E0

3. P.34 Add C972, C973, C974, C975, C976, C977, C978 for EMI Request

4. P.15 Remove R245, R247 for unSD CLK

5. P.13 Add R840 for CLK_NB_14.318

11/28

C C

1. P.30 JLED1, JLED2 Pin define modify; Add Q73

2. P.23 Add R841, R842, R843 ; P.29 Add R844, R845 for Panel Low Power

3. P.28 Change D10 P/N as SC300000B00 ; Stuff D41, D27, D39, D11, D13, D29, D24 For ESD Request

PVT

01/18

1. P.17 Add HDMI@

05/18 For Cost down

1. P.8, P.29, P.31, P.32 unstuff Q73, D24, D27, D29, U2, U40, C681, R304 ,C687, R411 stuff R283

2. P.19 Change C56 as SF000002N00(H4.4)

3. P.13 stuff R67, unstuff U4 for NB_PWRGD

4. P.21 stuff R424 for +CPU_VDDR

5. P.30 Change LED1, LED3 as SC591NB5A30 ; Change Resistance value for NEW75/85/95

B B

6. P.32 Change C957, C971 as 0.47UF

05/18 For PEW56

1. Modify SB GPIO64, B_ID, P_ID, LED, TSI BOM option

7. P.20 Unstuff R359, R360 for SB_SIC, SB_SID

01/25

1. P.30 Change Q26 as SB00000DH00

2. P.29 Define U26 Pin 36, Pin 17, Pin 85, Pin86 for WWAN & WLAN

3. P.31 Reserve C979, C980, R849, R850 for EMI solution

4. P.9 Change C23, C24, C25, C26, C75 as SGA19331D10 (ESR 9 ohm)

03/02

1. P.29 Add R851, unstuff R852

03/30 For MP

A A

1. P.8, P33 unstuff C21, SW3 for MP

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/06 2010/03/12

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A5912

401829

45 45Wednesday, June 30, 2010

1

of

C

Compal LA-5912P, Aspire 5251, Aspire 5552, Aspire 5552G, eMachines E440 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual