Compal LA-5811P NAP00 CULV (SFF), Alienware M11x Schematic

A

B

C

D

E

MODEL NAME: PCB NAME:

1 1

COMPAL P/N:

NAP00 LA-5811P MB DAA00001P00

Compal confidential

2 2

Penryn + Cantiga + ICH9-M

Schematics Document

Intel CULV (SFF)

DISCRETE VGA N11P-GS1 (Switchable Graphics)

3 3

2009-12-16

Rev: 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

LA-5811P

E

1.0

1 58Tuesday, December 29, 2009

1.0

A

B

C

D

E

ULV

1 1

EMC1402

Page4

Thermal Sensor

Mobile Penym

ULV Dual Core

uFCBGA-956 CPU - SFF

page 4,5,6,7

LCD Conn.

page29

LCD Switch

page28

LVDS

HDMI Conn.

2 2

page31

TMDS

DP Conn.

page32

HD Audio

NVIDIA

N11P-GS1

Engine 600MHz

VRAM DDR3 x 8 1GB(64Mx16)

page 21~27

3.3V 24.576MHz/48Mhz

HDA Codec

ALC665

IO Board IO Board

CRT Conn.

CRT Switch

Memory 900MHz

N11P HDA

page30

LVDS

PCI-Express

16X

port 0

SATA

H_A#(3..35) H_D#(0..63)

FSB

667/800/1066MHz 1.05V

Intel Cantiga

GS45

FCBGA 1363 - SFF

page 8,9,10,11,12,13

DMI X4

Intel ICH9-M

WBMMAP-569 - SFF

Page17,18.19,20

Dual Channel

USB

PCI-Express

SATA HDD

3 3

APA2031

Conn.

page32

LPC

Audio AMP

IO Board

ENE KB926

page37

Phone Jack x3

IO Board

Touch Pad

Int.KBD

page37page39

CK505

Clock Generator ICS9LPRS397

Page16

DDR3-SO-DIMM X 2DDR3 1066MHz 1.5V

BANK 0, 1, 2, 3

USB Conn x 2

IO Board

Power Share USB conn x1

page36

Bluetooth Conn

Card Reader

JMicron JMB380

MINI Card WWAN

Full length MC

MINI Card WLAN

802.11a/b/g/n 1/2 length MC

page33

page35 page35

page33

page 14,15

CMOS Camera 1.3M

Aline FX/ELC

Silion LABS C8051F347

3 IN 1 Conn.

page29

page38

page35

1394 Conn.

SIM Card Conn.

page33

Right light

LED board

Left light

LED board

Power light

Power key board

LOGO light

LOGO board

Function light

Function board

BIOS

4 4

A

B

page37

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/07/25 2010/07/25

Compal Secret Data

LAN(GbE)

Atheros AR8132

10/100 M

Deciphered Date

page34

D

RJ45

page34

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

LA-5811P

E

1.0

2 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

D D

Voltage Rails

( O MEANS ON X MEANS OFF )

B+

power plane

+5VALW

+3VALW

VL

+1.8V

+1.5V

+5VS

+3VS

+0.75VS

+VCCP

+CPU_CORE

I2C / SMBUS ADDRESSING

State

DEVICE

EC_SMB_CK1

C C

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O

X

O

X

O

X X

X

X X X

OO

X

EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

ICH_SMBCLK ICH_SMBDATA

Battery

CPU THERMAL SENSOR (EMC1402-1-ACZL)

GPU THERMAL SENSOR (ADM1032ARMZ)

GPU INTERNAL THERMAL SENSOR 9E 1 0 0 1 1 1 1 0

Free Fall Sensor 38 0 0 1 1 1 0 0 0

HEX ADDRESS

4C 0 1 0 0 1 1 0 0

4D 0 1 0 0 1 1 0 1

D2CLOCK GENERATOR (EXT.)

1 1 0 1 0 0 1 0

B B

Compal R1 PN CPU-->SA00003I91L(S IC AV80577UG0132M SLGS4 R0 1.3G FCBGA)----->SU4100

Symbol Note :

CPU-->SA00003IA1L(S IC AV80577UG0133M SLGS6 R0 1.3G FCBGA)----->SU7300 NB-->SA00002RQ1L(S IC AC82GS45 SLB92 B3 FCBGA 1363)----->45180131L03,45180131L04 SB-->SA00001YC4L(S IC AM82801IUX SLB8N A FCBGA 569P ICH9M)-->45180131L03,45180131L04

: means Digital Ground

VRAM-->SA00003240L(S IC D3 64M16 H5TQ1G63BFR-12C FBGA 96P)-->45180131L03,45180131L04 VRAM-->SA00003570L(S IC D3 64M16 K4W1G1646E-HC12 FBGA 96P)-->45180131L03,45180131L04 Compal R3 PN

: means Analog Ground

@ : means just reserve , no build CONN@ : means ME part. 45@ : means install after SMT.

A A

5

4

CPU-->SA00003I92L(S IC AV80577UG0132M SLGS4 R0 1.3G A31!)----->SU4100 CPU-->SA00003IA2L( S IC AV80577UG0133ML SLGYV R0 1.3G A31!)----->SU7300 NB-->SA00002RQ0L(S IC AC82GS45 SLB92 B3 FCBGA 1363 A31 !)----->45180131L01,45180131L02 SB-->SA00001YC3L(S IC AM82801IUX SLB8N A FCBGA ICH9M A31!)-->45180131L01,45180131L02 VRAM-->SA00003241L(S IC D3 64M16 H5TQ1G63BFR-12C FBGA A31!)-->45180131L01,45180131L02 VRAM-->SA00003571L(S IC D3 64M16 K4W1G1646E-HC12 FBGA A31!)-->45180131L01,45180131L02

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LA-5811P

Notes List

1

1.0

3 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

D D

+3VS

0.1U_0402_16V4Z

1

2

C1034

XDP_TDI

XDP_TMS

XDP_TDO

XDP_BPM#5

XDP_TRST#

XDP_TCK

H_THERMDA

H_THERMDC

THERM#

Place close to U1.

H_A#[3..16]8

C C

B B

H_A#[17..35]8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_ADSTB#08

H_REQ#08 H_REQ#18 H_REQ#28 H_REQ#38 H_REQ#48

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADSTB#18

H_A20M#18 H_FERR#18 H_IGNNE#18

H_STPCLK#18 H_INTR18 H_NMI18 H_SMI#18

U1A

P2

A[3]#

V4

A[4]#

W1

A[5]#

T4

A[6]#

AA1

A[7]#

AB4

A[8]#

T2

A[9]#

AC5

A[10]#

AD2

A[11]#

AD4

A[12]#

AA5

A[13]#

AE5

A[14]#

AB2

A[15]#

AC1

A[16]#

Y4

ADSTB[0]#

R1

REQ[0]#

R5

REQ[1]#

U1

REQ[2]#

P4

REQ[3]#

W5

REQ[4]#

AN1

A[17]#

AK4

A[18]#

AG1

A[19]#

AT4

A[20]#

AK2

A[21]#

AT2

A[22]#

AH2

A[23]#

AF4

A[24]#

AJ5

A[25]#

AH4

A[26]#

AM4

A[27]#

AP4

A[28]#

AR5

A[29]#

AJ1

A[30]#

AL1

A[31]#

AM2

A[32]#

AU5

A[33]#

AP2

A[34]#

AR1

A[35]#

AN5

ADSTB[1]#

C7

A20M#

D4

ICH

FERR#

F10

IGNNE#

F8

STPCLK#

C9

LINT0

C5

LINT1

E5

SMI#

V2

RSVD01

Y2

RSVD02

AG5

RSVD03

AL5

RSVD04

J9

RSVD05

F4

RSVD06

H8

RSVD07

PENRYN SFF_UFCBGA956

SU4100@

ADS# BNR#

BPRI#

ADDR GROUP 0 ADDR GROUP 1

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

CONTROL

LOCK#

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

HIT#

TCK

TDO TMS

M4 J5 L5

N5 F38 J1

M2

B40 D8

N1

G5 K2 H4 K4 L1

H2 F2

AY8 BA7 BA5 AY2 AV10 AV2 AV4 AW7

TDI

AU1 AW5 AV8 J7

H_ADS# 8 H_BNR# 8

H_BPRI# 8

H_DEFER# 8

H_DRDY# 8 H_DBSY# 8

H_BR0# 8

H_INIT# 18

H_LOCK# 8

H_RESET#

H_RS#0 8 H_RS#1 8 H_RS#2 8 H_TRDY# 8

H_HIT# 8 H_HITM# 8

XDP_BPM#5_R XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#_R XDP_DBRESET#

Place Close to U1.

D38

H_THERMDA_R

BB34

H_THERMDC_R

BD34

H_THERMTRIP#

B10

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

A35 C35

RESERVED

CLK_CPU_BCLK 16 CLK_CPU_BCLK# 16

+VCCP

@

R10

R10 51_0402_1%

51_0402_1%

1 2

R9

1 2

56_0402_5%R956_0402_5%

1

C1046

2

0.1U_0402_16V4Z

Add 0 ohm per EMI request.

R111 0_0402_5%R111 0_0402_5%

1 2

R22 68_0402_5%R22 68_0402_5%

1 2

R23 0_0402_5%R23 0_0402_5%

1 2

R24 0_0402_5%R24 0_0402_5%

1 2

0.1U_0402_16V4Z

R14

R14 0_0402_5%

0_0402_5%

1 2

H_PROCHOT# 51

H_THERMTRIP# 8,18

H_PROCHOT#

0.1U_0402_16V4Z

+VCCP

1

2

C1057

H_RESET# 8

@

XDP_BPM#5

H_THERMDA H_THERMDC

@

For EMI

XDP_DBRESET# 19

For ESD

+3VS

C1035

1 2

2200P_0402_50V7K

R306

1 2

10K_0402_5%

R1 54.9_0402_1%R1 54.9_0402_1%

1 2

R2 54.9_0402_1%R2 54.9_0402_1%

1 2

R3 54.9_0402_1%R3 54.9_0402_1%

1 2

R4 54.9_0402_1%R4 54.9_0402_1%

1 2

R6 51_0402_1%R6 51_0402_1%

1 2

R7 54.9_0402_1%R7 54.9_0402_1%

1 2

This shall place near CPU

U7

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

Address:100_1100

SMCLK

SMDATA

ALERT#

GND

+VCCP

8

7

6

1 2

5

EC_SMB_CK2 21,37

EC_SMB_DA2 21,37

10K_0402_5%

10K_0402_5% R305

R305

+3VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Penryn(1/4)-AGTL+/ITP-XDP

LA-5811P

1

1.0

4 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

H_D#[0..15]8

D D

H_DSTBN#08 H_DSTBP#08 H_DINV#08 H_D#[16..31]8

C C

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

H_DSTBN#18 H_DSTBP#18 H_DINV#18

V_CPU_GTLREF

T8T8

T9T9 T10T10

CPU_BSEL016 CPU_BSEL116 CPU_BSEL216

H_D#0 H_D#1

H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

TEST2

TEST5 TEST6

CPU_BSEL CPU_BSEL2 CPU_BSEL1

B B

166

200

0 1

0

1

U1B

F40

D[0]#

G43

D[1]#

E43

D[2]#

J43

D[3]#

H40

D[4]#

H44

D[5]#

G39

D[6]#

E41

D[7]#

L41

D[8]#

K44

D[9]#

N41

D[10]#

T40

D[11]#

M40

D[12]#

G41

D[13]#

M44

D[14]#

L43

D[15]#

K40

DSTBN[0]#

J41

DSTBP[0]#

P40

DINV[0]#

P44

D[16]#

V40

D[17]#

V44

D[18]#

AB44

D[19]#

R41

D[20]#

W41

D[21]#

N43

D[22]#

U41

D[23]#

AA41

D[24]#

AB40

D[25]#

AD40

D[26]#

AC41

D[27]#

AA43

D[28]#

Y40

D[29]#

Y44

D[30]#

T44

D[31]#

U43

DSTBN[1]#

W43

DSTBP[1]#

R43

DINV[1]#

AW43

GTLREF

E37

TEST1

D40

TEST2

C43

TEST3

AE41

TEST4

AY10

TEST5

AC43

TEST6

A37

BSEL[0]

C37

BSEL[1]

B38

BSEL[2]

PENRYN SFF_UFCBGA956

SU4100@

CPU_BSEL0

1

0

D[32]# D[33]# D[34]#

DATA GROUP 0

D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]#

DATA GROUP 2DATA GROUP 3

D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

DATA GROUP 1

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0]

MISC

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Cause CPU core power change to 1 phase, and not need support the pin, leave it as TP. 10/02

AR43 AH40 AF40 AJ43 AG41 AF44 AH44 AM44 AN43 AM40 AK40 AG43 AP40 AN41 AL41 AK44 AL43 AJ41

AV38 AT44 AV40 AU41 AW41 AR41 BA37 BB38 AY36 AT40 BC35 BC39 BA41 BB40 BA35 AU43 AY40 AY38 BC37

AE43 AD44 AE1 AF2

G7 B8 C41 E7 D10 BD10

H_PSI#

H_D#33 H_D#34H_D#2 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

COMP0 COMP1 COMP2 COMP3

H_D#32

AP44

H_DPRSTP# 8,18,51 H_DPSLP# 18 H_DPWR# 8 H_PWRGOOD 18 H_CPUSLP# 8

T11T11

H_D#[32..47] 8

H_DSTBN#2 8 H_DSTBP#2 8 H_DINV#2 8 H_D#[48..63] 8

H_DSTBN#3 8 H_DSTBP#3 8 H_DINV#3 8

R33

R32

R30

R31

12

27.4_0402_1%

54.9_0402_1%

27.4_0402_1%

Resistor placed within

0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils.

266 0 0 0

+VCC_CORE +VCC_CORE

U1C

F32

VCC[001]

G33

VCC[002]

H32

VCC[003]

J33

VCC[004]

K32

VCC[005]

L33

VCC[006]

M32

VCC[007]

N33

VCC[008]

P32

VCC[009]

R33

VCC[010]

T32

VCC[011]

U33

VCC[012]

V32

VCC[013]

W33

VCC[014]

Y32

VCC[015]

AA33

VCC[016]

AB32

VCC[017]

AC33

VCC[018]

AD32

VCC[019]

AE33

VCC[020]

AF32

VCC[021]

AG33

VCC[022]

AH32

VCC[023]

AJ33

VCC[024]

AK32

VCC[025]

AL33

VCC[026]

AM32

VCC[027]

AN33

VCC[028]

AP32

VCC[029]

AR33

VCC[030]

AT34

VCC[031]

AT32

VCC[032]

AU33

VCC[033]

AV32

VCC[034]

AY32

VCC[035]

BB32

VCC[036]

BD32

VCC[037]

B28

VCC[038]

B30

VCC[039]

B26

VCC[040]

D28

VCC[041]

D30

VCC[042]

F30

VCC[043]

F28

VCC[044]

H30

VCC[045]

H28

VCC[046]

D26

VCC[047]

F26

VCC[048]

H26

VCC[049]

K30

VCC[050]

K28

VCC[051]

M30

VCC[052]

M28

VCC[053]

K26

VCC[054]

M26

VCC[055]

P30

VCC[056]

P28

VCC[057]

T30

VCC[058]

T28

VCC[059]

V30

VCC[060]

V28

VCC[061]

P26

VCC[062]

T26

VCC[063]

V26

VCC[064]

Y30

VCC[065]

Y28

VCC[066]

AB30

VCC[067]

PENRYN SFF_UFCBGA956

SU4100@

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP_001 VCCP_002 VCCP_003 VCCP_004 VCCP_005 VCCP_006 VCCP_007 VCCP_008 VCCP_009 VCCP_010 VCCP_011 VCCP_012 VCCP_013 VCCP_014 VCCP_015 VCCP_016

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB28 AD30 AD28 Y26 AB26 AD26 AF30 AF28 AH30 AH28 AF26 AH26 AK30 AK28 AM30 AM28 AP30 AP28 AK26 AM26 AP26 AT30 AT28 AV30 AV28 AY30 AY28 AT26 AV26 AY26 BB30 BB28 BD30

J11 E11 G11 J37 K38 L37 N37 P38 R37 U37 V38 W37 AA37 AB38 AC37 AE37

B34 D34

BD8 BC7 BB10 BB8 BC5 BB4 AY4

VCCSENSE

BD12

VSSSENSE

BC13

Length match within 25 mils. The trace width/space/other is 20/7/25.

CPU_VID0 51 CPU_VID1 51 CPU_VID2 51 CPU_VID3 51 CPU_VID4 51 CPU_VID5 51 CPU_VID6 51

VCCSENSE 51

VSSSENSE 51

+VCCP

1

+

C5

C5 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

2

Change to 330u_R9, casue high limitation

1

2

0.01U_0402_16V7KC60.01U_0402_16V7K

Near pin B34

C7

C6

2

10U_0805_6.3V6MC710U_0805_6.3V6M

+1.5VS

Near pin D34

+VCC_CORE

R34

+VCCP

12

R36

R36 1K_0402_1%

V_CPU_GTLREF

A A

1K_0402_1%

12

R37

R37 2K_0402_1%

2K_0402_1%

1 2

100_0402_1%

R35

1 2

100_0402_1%

Close to CPU pin within 500mils.

VCCSENSE

VSSSENSE

Close to CPU pin AW43 within 500mils.

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Penryn(2/4)-AGTL+/ITP-XDP

LA-5811P

1

5 58Tuesday, December 29, 2009

1.0

5

D D

AL37

AN37

AP38

B32

C33

D32

E35

E33

F34

G35

F36

H36

J35

L35

N35

K36

R35

U35

P36

V36

W35

AA35

AC35

AB36

AE35

AG35

C C

VCCP_021

VCCP_022

VCCP_023

VCCP_024

VCCP_025

VCCP_026

VCCP_027

VCCP_028

VCCP_029

VCCP_030

VCCP_031

VCCP_032

VCCP_033

VCCP_034

VCCP_035

VCCP_036

VCCP_037

VCCP_038

VCCP_039

VCC_101

VCC_102

VCC_103

VCC_104

VCC_105

VCC_106

VCC_107

VCC_108

VCC_109

VCC_110

VCC_111

VCC_112

VCC_113

VCC_114

VCC_115

VCC_116

VCC_117

VCC_118

VCC_119

F24

F22

B22

B24

D22

D24

H24

BB26

BD28

BD26

H22

T24

K24

T22

K22

P24

P22

V24

M24

M22

AJ35

VCCP_040

VCCP_041

VCCP_042

VCCP_043

VCCP_044

VCCP_045

VCCP_046

VCC_120

VCC_121

VCC_122

VCC_123

VCC_124

VCC_125

VCC_126

V22

Y24

Y22

AB24

AB22

AD24

AD22

4

AF36

AL35

AN35

AK36

AP36

B12

B14

C13

D12

D14

E13

F14

F12

G13

H14

H12

J13

K14

K12

L13

L11

M14

N13

N11

K10

P14

P12

R13

R11

T14

U13

U11

V14

V12

VCCP_047

VCCP_048

VCCP_049

VCCP_050

VCCP_051

VCCP_052

VCCP_053

VCCP_054

VCCP_055

VCCP_056

VCCP_057

VCCP_058

VCCP_059

VCCP_060

VCCP_061

VCCP_062

VCCP_063

VCCP_064

VCCP_065

VCCP_066

VCCP_067

VCCP_068

VCCP_069

VCCP_070

VCCP_071

VCCP_072

VCCP_073

VCCP_074

VCCP_075

VCCP_076

VCCP_077

VCCP_078

VCCP_079

VCCP_080

VCCP_081

VCC_127

VCC_128

VCC_129

VCC_130

VCC_131

VCC_132

VCC_133

VCC_134

VCC_135

VCC_136

VCC_137

VCC_138

VCC_139

VCC_140

VCC_141

VCC_142

VCC_143

VCC_144

VCC_145

VCC_146

VCC_147

VCC_148

VCC_149

VCC_150

VCC_151

VCC_152

VCC_153

VCC_154

VCC_155

VCC_156

VCC_157

VCC_158

VCC_159

VCC_160

VCC_161

F18

F16

B16

B18

B20

AF24

AF22

AH24

AH22

AT24

AK24

AT22

AK22

AP24

AP22

AV24

AV22

AY24

AY22

AM24

AM22

BB24

D16

BB22

BD24

BD22

F20

K18

D18

K16

H18

H16

D20

H20

3

W13

W11

P10

V10

Y14

AA13

AA11

AB14

AB12

AC13

AC11

AD14

AB10

AE13

AE11

AF14

AF12

AG13

AG11

AH14

AJ13

AJ11

AF10

AK14

AK12

AL13

AL11

AN13

AN11

AP12

AR13

AR11

AK10

AP10

AU13

VCCP_082

VCCP_083

VCCP_084

VCCP_085

VCCP_086

VCCP_087

VCCP_088

VCCP_089

VCCP_090

VCCP_091

VCCP_092

VCCP_093

VCCP_094

VCCP_095

VCCP_096

VCCP_097

VCCP_098

VCCP_099

VCCP_100

VCCP_101

VCCP_102

VCCP_103

VCCP_104

VCCP_105

VCCP_106

VCCP_107

VCCP_108

VCCP_109

VCCP_110

VCCP_111

VCCP_112

VCCP_113

VCCP_114

VCCP_115

VCC_162

VCC_163

VCC_164

VCC_165

VCC_166

VCC_167

VCC_168

VCC_169

VCC_170

VCC_171

VCC_172

VCC_173

VCC_174

VCC_175

VCC_176

VCC_177

VCC_178

VCC_179

VCC_180

VCC_181

VCC_182

VCC_183

VCC_184

VCC_185

VCC_186

VCC_187

VCC_188

VCC_189

VCC_190

VCC_191

VCC_192

VCC_193

VCC_194

VCC_195

T18

T16

K20

P18

M18

M16

M20

T20

P16

V18

V16

P20

V20

Y18

Y16

Y20

AF18

AF16

AB18

AB16

AD18

AD16

AF20

AB20

AD20

AK18

AK16

AP18

AP16

AH18

AH16

AH20

AK20

AM18

AM16

2

AU11

VCCP_116

VCCP_117

VCCP_118L9VCCP_119L7VCCP_120N9VCCP_121N7VCCP_122R9VCCP_123R7VCCP_124U9VCCP_125U7VCCP_126W9VCCP_127W7VCCP_128

VCC_196

VCC_197

VCC_198

VCC_199

VCC_200

VCC_201

VCC_202

AT18

AT16

AP20

AV18

AV16

AY18

AM20

1

+VCCP

AA9

AA7

AC9

AC7

AE9

AE7

AG9

AG7

AJ9

AJ7

AL9

AL7

AN9

AN7

AR9

AR7

A33

A13

U1F

U1F PENRYN SFF_UFCBGA956

PENRYN SFF_UFCBGA956

SU4100@

VCCP_129

VCCP_130

VCCP_131

VCCP_132

VCCP_133

VCCP_134

VCCP_135

VCCP_136

VCCP_137

VCCP_138

VCCP_139

VCCP_140

VCC_203

VCC_204

VCC_205

VCC_206

VCC_207

VCC_208

VCC_209

VCC_210

VCC_211

VCC_212

VCC_213

VCC_214

VCC_215

VCC_216

VCC_217

VCC_218

VCC_219

VCC_220

AT20

AY16

AV20

AY20

BB18

BB16

AT14

BB20

AP14

AV14

AY14

BD18

BD16

BB14

BD20

BD14

AM14

SU4100@

VCCP_141

VCCP_142

VCCP_143

VCCP_144

VCCP_145

VCCP_020

VCCP_018

VCCP_019

VCCP_017

AJ37

AF38

AK38

AG37

+VCC_CORE +VC CP

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Penryn(3/4)-Power

LA-5811P

1

1.0

6 58Tuesday, December 29, 2009

1.0

5

U1D

B42

VSS[001]

F44

VSS[002]

D44

VSS[003]

D42

VSS[004]

F42

VSS[005]

H42

VSS[006]

K42

VSS[007]

M42

VSS[008]

P42

VSS[009]

T42

VSS[010]

V42

VSS[011]

Y42

D D

C C

B B

A A

VSS[012]

AB42

VSS[013]

AD42

VSS[014]

AF42

VSS[015]

AH42

VSS[016]

AK42

VSS[017]

AM42

VSS[018]

AP42

VSS[019]

AY44

VSS[020]

AV44

VSS[021]

AT42

VSS[022]

AV42

VSS[023]

AY42

VSS[024]

BA43

VSS[025]

BB42

VSS[026]

C39

VSS[027]

E39

VSS[028]

G37

VSS[029]

H38

VSS[030]

J39

VSS[031]

L39

VSS[032]

M38

VSS[033]

N39

VSS[034]

R39

VSS[035]

T38

VSS[036]

U39

VSS[037]

W39

VSS[038]

Y38

VSS[039]

AA39

VSS[040]

AC39

VSS[041]

AD38

VSS[042]

AE39

VSS[043]

AG39

VSS[044]

AH38

VSS[045]

AJ39

VSS[046]

AL39

VSS[047]

AM38

VSS[048]

AN39

VSS[049]

AR39

VSS[050]

AR37

VSS[051]

AT38

VSS[052]

AU39

VSS[053]

AU37

VSS[054]

AW39

VSS[055]

AW37

VSS[056]

BA39

VSS[057]

BC41

VSS[058]

BD40

VSS[059]

BD38

VSS[060]

B36

VSS[061]

H34

VSS[062]

D36

VSS[063]

K34

VSS[064]

M34

VSS[065]

M36

VSS[066]

P34

VSS[067]

T34

VSS[068]

V34

VSS[069]

T36

VSS[070]

Y34

VSS[071]

AB34

VSS[072]

AD34

VSS[073]

Y36

VSS[074]

AD36

VSS[075]

AF34

VSS[076]

AH34

VSS[077]

AH36

VSS[078]

AK34

VSS[079]

AM34

VSS[080]

AP34

VSS[081]

PENRYN SFF_UFCBGA956

SU4100@

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163]

5

AM36 AR35 AU35 AV34 AW35 AW33 AY34 AT36 AV36 BA33 BC33 BB36 BD36 C27 C29 C31 E29 E27 G29 G27 E31 G31 J29 J27 L29 L27 N29 N27 J31 L31 N31 R29 R27 U29 U27 R31 U31 W29 W27 W31 AA29 AA27 AC29 AC27 AA31 AC31 AE29 AE27 AG29 AG27 AJ29 AJ27 AE31 AG31 AJ31 AL29 AL27 AN29 AN27 AL31 AN31 AR29 AR27 AR31 AU29 AU27 AW29 AW27 AU31 AW31 BA29 BA27 BC29 BC27 BA31 BC31 C21 C23 C25 E25 E23 E21

U1E

G25

VSS_164

G23

VSS_165

G21

VSS_166

J25

VSS_167

J23

VSS_168

J21

VSS_169

L25

VSS_170

L23

VSS_171

L21

VSS_172

N25

VSS_173

N23

VSS_174

N21

VSS_175

R25

VSS_176

R23

VSS_177

R21

VSS_178

U25

VSS_179

U23

VSS_180

U21

VSS_181

W25

VSS_182

W23

VSS_183

W21

VSS_184

AA25

VSS_185

AA23

VSS_186

AA21

VSS_187

AC25

VSS_188

AC23

VSS_189

AC21

VSS_190

AE25

VSS_191

AE23

VSS_192

AE21

VSS_193

AG25

VSS_194

AG23

VSS_195

AG21

VSS_196

AJ25

VSS_197

AJ23

VSS_198

AJ21

VSS_199

AL25

VSS_200

AL23

VSS_201

AL21

VSS_202

AN25

VSS_203

AN23

VSS_204

AN21

VSS_205

AR25

VSS_206

AR23

VSS_207

AR21

VSS_208

AU25

VSS_209

AU23

VSS_210

AU21

VSS_211

AW25

VSS_212

AW23

VSS_213

AW21

VSS_214

BA25

VSS_215

BA23

VSS_216

BA21

VSS_217

BC25

VSS_218

BC23

VSS_219

BC21

VSS_220

C17

VSS_221

C19

VSS_222

E19

VSS_223

E17

VSS_224

G19

VSS_225

G17

VSS_226

J19

VSS_227

J17

VSS_228

L19

VSS_229

L17

VSS_230

N19

VSS_231

N17

VSS_232

R19

VSS_233

R17

VSS_234

U19

VSS_235

U17

VSS_236

W19

VSS_237

W17

VSS_238

AA19

VSS_239

AA17

VSS_240

AC19

VSS_241

AC17

VSS_242

AE19

VSS_243

AE17

VSS_244

AG19

VSS_245

AG17

VSS_246

AJ19

VSS_247

AJ17

VSS_248

AL19

VSS_249

AL17

VSS_250

AN19

VSS_251

AN17

VSS_252

AR19

VSS_253

AR17

VSS_254

AU19

VSS_255

AU17

VSS_256

AW19

VSS_257

AW17

VSS_258

BA19

VSS_259

BA17

VSS_260

BC19

VSS_261

BC17

VSS_262

C11

VSS_263

C15

VSS_264

E15

VSS_265

G15

VSS_266

H10

VSS_267

M12

VSS_268

J15

VSS_269

L15

VSS_270

N15

VSS_271

M10

VSS_272

T12

VSS_273

R15

VSS_274

U15

VSS_275

W15

VSS_276

T10

VSS_277

Y12

VSS_278

AD12

VSS_279

PENRYN SFF_UFCBGA956

SU4100@

VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 VSS_361 VSS_362 VSS_363 VSS_364 VSS_365 VSS_366 VSS_367 VSS_368 VSS_369 VSS_370 VSS_371 VSS_372 VSS_373 VSS_374 VSS_375 VSS_376 VSS_377 VSS_378 VSS_379 VSS_380 VSS_381 VSS_382 VSS_383 VSS_384 VSS_385 VSS_386 VSS_387 VSS_388 VSS_389 VSS_390 VSS_391 VSS_392 VSS_393 VSS_394 VSS_395

AA15 AC15 Y10 AD10 AH12 AE15 AG15 AJ15 AH10 AM12 AL15 AN15 AR15 AM10 AT12 AV12 AW13 AW11 AY12 AU15 AW15 AT10 BA13 BA11 BB12 BC11 BA15 BC15 B6 D6 E9 F6 G9 H6 K8 K6 M8 M6 P8 P6 T8 T6 V8 V6 U5 Y8 Y6 AB8 AB6 AD8 AD6 AF8 AF6 AH8 AH6 AK8 AK6 AM8 AM6 AP8 AP6 AT8 AT6 AU9 AV6 AU7 AW9 AY6 BA9 BB6 BC9 BD6 B4 C3 E3 G3 J3 L3 N3 R3 U3 W3 AA3 AC3 AE3 AG3 AJ3 AL3 AN3 AR3 AU3 AW3 BA3 BC3 D2 E1 G1 AW1 BA1 BB2 A41 A39 A29 A27 A31 A25 A23 A21 A19 A17 A11 A15 A7 A5 A9 BD4

4

+VCC_CORE

10U_0603_6.3V6MC810U_0603_6.3V6M

1

C8

2

+VCC_CORE

Mid Frequence Decoupling

10U_0603_6.3V6M

10U_0603_6.3V6MC910U_0603_6.3V6M

1

C10

C9

2

3

10U_0603_6.3V6M

1

C11

2

C13

C12

2

10U_0603_6.3V6M

1

C14

C15

2

C15

2

10U_0603_6.3V6M

1

C17

C16

2

10U_0603_6.3V6M

1

C18

2

10U_0603_6.3V6M

1

C19

C20

2

10U_0603_6.3V6M

1

C21

C22

2

10U_0603_6.3V6M

1

C23

2

10U_0603_6.3V6M

1

C24

C25

2

10U_0603_6.3V6M

1

2

C27

C26

2

1

10U_0603_6.3V6M

1

C29

C28

2

10U_0603_6.3V6M

1

2

1

C30

C31

2

High Frequence Decoupling

1U_0402_6.3V6K

1

C32

2

C34

C33

2

1U_0402_6.3V6K

1

2

1

C35

C36

C37

2

C37

2

1U_0402_6.3V6K

1

C38

C39

2

C39

2

1U_0402_6.3V6K

1

2

C41

C40

2

1U_0402_6.3V6K

1

2

1

C42

C43

C44

2

C44

2

1U_0402_6.3V6K

1

2

C46

C45

2

1U_0402_6.3V6K

1

C48

C47

2

1U_0402_6.3V6K

1

C50

C49

2

1U_0402_6.3V6K

1

C51

2

1U_0402_6.3V6K

1

C52

C53

2

1U_0402_6.3V6K

1

2

1

C55

C54

2

6/14 :Replace 12pcs 10uF_0805 to 24 pcs 1uF_0402 for CPU transient fail issue.

ESR <= 9m ohm (For CPU)

Near CPU CORE regulator

+VCC_CORE

220U_D2_2VK_R9

1

+

C56

C57

2

+VCCP

1U_0402_6.3V6K

1

C59

C60

C61

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

C61

2

1U_0402_6.3V6K

1

2

Compal Secret Data

C63

C62

2

Deciphered Date

1U_0402_6.3V6K

C64

220U_D2_2VK_R9

1

+

C58

2

1U_0402_6.3V6K

1

2

1

C65

C66

C67

2

C67

2

1U_0402_6.3V6K

1

C68

2

1U_0402_6.3V6K

1

2

1

C69

C70

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Penryn(4/4)-GND/Bypass

LA-5811P

1

1.0

7 58Tuesday, December 29, 2009

1.0

5

U3A

H_D#[0..63]5

D D

C C

H_RESET#4

H_CPUSLP#5

layout note:

B B

Route H_SCOMP a nd H_SCOMP# wit h trace width, spacing and imp edance (55 ohm) same as FSB da ta traces

trace width and spacing is 10/20

+VCCP

12

1K_0402_1%

12

R3372K_040 2_1% R3372K_0402_1%

A A

Trace < = 500mi ls

Layout Note: H_RCOMP / H_VREF / H_SWNG

R55

H_VREF

1

C78

2

0.1U_0402_16V4Z

@

within 100 mils from NB

H_SWNG H_RCOMP

H_VREF

12

24.9_0402_1%

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_RCOMP

R60

U3A

J7

H_D#_0

H6

H_D#_1

L11

H_D#_2

J3

H_D#_3

H4

H_D#_4

G3

H_D#_5

K10

H_D#_6

K12

H_D#_7

L1

H_D#_8

M10

H_D#_9

M6

H_D#_10

N11

H_D#_11

L7

H_D#_12

K6

H_D#_13

M4

H_D#_14

K4

H_D#_15

P6

H_D#_16

W9

H_D#_17

V6

H_D#_18

V2

H_D#_19

P10

H_D#_20

W7

H_D#_21

N9

H_D#_22

P4

H_D#_23

U9

H_D#_24

V4

H_D#_25

U1

H_D#_26

W3

H_D#_27

V10

H_D#_28

U7

H_D#_29

W11

H_D#_30

U11

H_D#_31

AC11

H_D#_32

AC9

H_D#_33

Y4

H_D#_34

Y10

H_D#_35

AB6

H_D#_36

AA9

H_D#_37

AB10

H_D#_38

AA1

H_D#_39

AC3

H_D#_40

AC7

H_D#_41

AD12

H_D#_42

AB4

H_D#_43

Y6

H_D#_44

AD10

H_D#_45

AA11

H_D#_46

AB2

H_D#_47

AD4

H_D#_48

AE7

H_D#_49

AD2

H_D#_50

AD6

H_D#_51

AE3

H_D#_52

AG9

H_D#_53

AG7

H_D#_54

AE11

H_D#_55

AK6

H_D#_56

AF6

H_D#_57

AJ9

H_D#_58

AH6

H_D#_59

AF12

H_D#_60

AH4

H_D#_61

AJ7

H_D#_62

AE9

H_D#_63

B6

H_SWING

D4

H_RCOMP

J11

H_CPURST#

G9

H_CPUSLP#

L17

H_AVREF

K18

H_DVREF

CANTIGA GMCH SFF_FCBGA1363

+VCCP

12

R56

221_0603_1%

12

R61

100_0402_1%

0.1U_0402_16V4Z

Near B6 pin

H_SWNG

1

C79

2

H_ADSTB#_0 H_ADSTB#_1

HOST

HPLL_CLK#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

layout note:

Place them clos e to U4 pin BC5 1.

Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK# H_TRDY#

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

PM_EXTTS#0

PM_EXTTS#1

4

H_A#3

L15

H_A#4

B14

H_A#5

C15

H_A#6

D12

H_A#7

F14

H_A#8

G17

H_A#9

B12

H_A#10

J15

H_A#11

D16

H_A#12

C17

H_A#13

D14

H_A#14

K16

H_A#15

F16

H_A#16

B16

H_A#17

C21

H_A#18

D18

H_A#19

J19

H_A#20

J21

H_A#21

B18

H_A#22

D22

H_A#23

G19

H_A#24

J17

H_A#25

L21

H_A#26

L19

H_A#27

G21

H_A#28

D20

H_A#29

K22

H_A#30

F18

H_A#31

K20

H_A#32

F20

H_A#33

F22

H_A#34

B20

H_A#35

A19

F10 A15 C19 C9 B8 C11 E5 D6 AH10 AJ11 G11 H2 C7 F8 A11 D8

L9 N7 AA7 AG3

K2 N3 AA3 AF4

L3 M2 Y2 AF2

J13 L13 C13 G13 G15

F4 F2 G7

+V_DDR3_DIMM_REF14,15

R62 10K_0402_5%R62 10K_0402_5%

R90 10K_0402_5%R90 10K_0402_5%

+V_DDR3_DIMM_REF

1 2

H_A#[3..35] 4

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BR0# 4 H_DEFER# 4 H_DBSY# 4 CLK_MCH_BCLK 16 CLK_MCH_BCLK# 16 H_DPWR# 5 H_DRDY# 4

H_HIT# 4 H_HITM# 4 H_LOCK# 4

H_TRDY# 4

H_DINV#0 5 H_DINV#1 5 H_DINV#2 5 H_DINV#3 5

H_DSTBN#0 5 H_DSTBN#1 5 H_DSTBN#2 5 H_DSTBN#3 5

H_DSTBP#0 5 H_DSTBP#1 5 H_DSTBP#2 5 H_DSTBP#3 5

H_REQ#0 4 H_REQ#1 4 H_REQ#2 4 H_REQ#3 4 H_REQ#4 4

H_RS#0 4 H_RS#1 4 H_RS#2 4

H_THERMTRIP#4,18 PM_DPRSLPVR19,51

0.1U_0402_16V4Z

+3VS

3

T12T12 T13T13 T14T14 T15T15 T16T16 T17T17 T18T18 T19T19 T20T20

R42

R42 1K_0402_1%

1K_0402_1%

R45

3.01K_0402_1%

R48

R48 1K_0402_1%

1K_0402_1%

MCH_CLKSEL016 MCH_CLKSEL116 MCH_CLKSEL216

T30T30 T31T31

CFG510 CFG610 CFG710

T32T32

CFG910 CFG1010

T33T33

CFG1210

CFG1310

T34T34 T35T35

CFG1610

T36T36 T37T37

CFG1910

CFG2010

PM_EXTTS#0 PM_EXTTS#1

1 2 1 2

1

C10560.1U_0402_16V4Z@ C10560.1U_0402_16V4Z@

2

TCK TDI TDO TMS

T21T21 T22T22

T23T23

T24T24

T25T25 T26T26 T27T27 T28T28

C750.1U_0402_16V4Z@ C750.1U_0402_16V4Z@

1

2

1K_0402_5%@

R39

1 2

R38

1 2

R40 4.7K_0402_5%@R40 4.7K_0402_5%@

1 2

R41 1K_0402_5%@R41 1K_0402_5%@

+3VS

+1.5V

C77

1

2

1 2

2.2U_0603_6.3V4Z

SMRCOMP_VOH

SMRCOMP_VOL

2.2U_0603_6.3V4Z

1 2

R51 0_0402_5%R51 0_0402_5%

12

R54

R54 10K_0402_1%

10K_0402_1%

12

R57

R57 10K_0402_1%

10K_0402_1%

1K_0402_5%@

4.7K_0402_5%@

+1.5V

1

C72

0.01U_0402_25V7K

2

1

C74

2

0.01U_0402_25V7K

PLT_RST#17,35,37

H_DPRSTP#

12

R49 0_0402_5%R49 0_0402_5% R50 100_0402_1%R50 100_0402_1%

C71

C73

PM_BMBUSY#19 H_DPRSTP#5,18,51 PM_EXTTS#014,15

PM_PWROK19,37,51

U3B

J43

RSVD1

L43

RSVD2

J41

RSVD3

L41

RSVD4

AN11

RSVD5

AM10

RSVD6

AK10

RSVD7

AL11

RSVD8

F12

RSVD9

AN45

RSVD10

AP44

RSVD11

AT44

RSVD12

AN47

RSVD13

C27

RSVD14

D30

RSVD15

J9

RSVD17

AW42

RSVD20

BB20

RSVD22

BE19

RSVD23

BF20

RSVD24

BF18

RSVD25

K26

CFG_0

G23

CFG_1

G25

CFG_2

J25

CFG_3

L25

CFG_4

L27

CFG_5

F24

CFG_6

D24

CFG_7

D26

CFG_8

J23

CFG_9

B26

CFG_10

A23

CFG_11

C23

CFG_12

B24

CFG_13

B22

CFG_14

K24

CFG_15

C25

CFG_16

L23

CFG_17

L33

CFG_18

K32

CFG_19

K34

CFG_20

J35

PM_SYNC#

F6

PM_DPRSTP#

J39

PM_EXT_TS#_0

L39

PM_EXT_TS#_1

AY39

PWROK

BB18

RSTIN#

K28

THERMTRIP#

K36

DPRSLPVR

A7

NC_1

A49

NC_2

A52

NC_3

A54

NC_4

B54

NC_5

D55

NC_6

G55

NC_7

BE55

NC_8

BH55

NC_9

BK55

NC_10

BK54

NC_11

BL54

NC_12

BL52

NC_13

BL49

NC_14

BL7

NC_15

BL4

NC_16

BL2

NC_17

BK2

NC_18

BK1

NC_19

BH1

NC_20

BE1

NC_21

G1

NC_22

CANTIGA GMCH SFF_FCBGA1363

2

CFGRSVD

PM

NC

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1

DMI

DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_DATA

CL_PWROK

CL_VREF

ME

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

HDA_BCLK HDA_RST#

HDA_SDO

HDA_SYNC

HDA

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

CL_CLK

CL_RST#

TSATN#

HDA_SDI

BB32 BA25 BA33 BA23

BA31 BC25 BC33 BB24

BC35 BE33 BE37 BC37

BK18 BK16 BE23 BC19

BJ17 BJ19 BC17 BE17

BL25 BK26

BK32 BL31

BC51 AY37 BH20 BA37

B42 D42 B50 D50

R49 P50

AG55 AL49 AH54 AL47

AG53 AK50 AH52 AL45

AG49 AJ49 AJ47 AG47

AF50 AH50 AJ45 AG45

G33 G37 F38 F36 G35

G39

AK52 AK54 AW40 AL53 AL55

F34 F32 B38 A37 C31 K42

D10

C29 B30 D28 A27 B28

SMRCOMP SMRCOMP#

SMRCOMP_VOH SMRCOMP_VOL

+V_DDR3_DIMM_REF SM_PWROK SM_REXT

R47 499_0402_1%R47 499_0402_1%

SM_DRAMRST#

CLK_MCH_DREFCLK 16 CLK_MCH_DREFCLK# 16 MCH_SSCDREFCLK 16 MCH_SSCDREFCLK# 16

CLK_MCH_3GPLL 16 CLK_MCH_3GPLL# 16

DMI_TXN0 19 DMI_TXN1 19 DMI_TXN2 19 DMI_TXN3 19

DMI_TXP0 19 DMI_TXP1 19 DMI_TXP2 19 DMI_TXP3 19

DMI_RXN0 19 DMI_RXN1 19 DMI_RXN2 19 DMI_RXN3 19

DMI_RXP0 19 DMI_RXP1 19 DMI_RXP2 19 DMI_RXP3 19

CL_VREF

TSATN#

R58 54.9_0402_1%R58 54.9_0402_1%

1 2

1

M_CLK_DDR0 14 M_CLK_DDR1 14 M_CLK_DDR2 15 M_CLK_DDR3 15

M_CLK_DDR#0 14 M_CLK_DDR#1 14 M_CLK_DDR#2 15 M_CLK_DDR#3 15

DDR_CKE0_DIMMA 14 DDR_CKE1_DIMMA 14 DDR_CKE2_DIMMB 15 DDR_CKE3_DIMMB 15

DDR_CS0_DIMMA# 14 DDR_CS1_DIMMA# 14 DDR_CS2_DIMMB# 15 DDR_CS3_DIMMB# 15

M_ODT0 14 M_ODT1 14 M_ODT2 15 M_ODT3 15

R43 80.6_0402_1%R43 80.6_0402_1%

1 2

R44 80.6_0402_1%R44 80.6_0402_1%

1 2

SM_DRAMRST# 14,15

CL_CLK0 19 CL_DATA0 19

M_PWROK 19

CL_RST# 19

1

C76

T38T38 T39T39

T56T56

CLKREQ#_B 16 MCH_ICH_SYNC# 19

C76

0.1U_0402_16V4Z

2

+1.5V

SM_PWROK 48

@

1

C190

0.1U_0402_16V4Z

2

+VCCP

12

R52

R52 1K_0402_1%

1K_0402_1%

12

R53

R53 499_0402_1%

499_0402_1%

+VCCP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga(1/6)-AGTL/DMI/DDR

LA-5811P

8 58Tuesday, December 29, 2009

1

1.0

5

D D

DDR_A_D[0..63]14 DDR_B_D[0..63]15

C C

B B

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

U3D

AP46

SA_DQ_0

AU47

SA_DQ_1

AT46

SA_DQ_2

AU49

SA_DQ_3

AR45

SA_DQ_4

AN49

SA_DQ_5

AV50

SA_DQ_6

AP50

SA_DQ_7

AW47

SA_DQ_8

BD50

SA_DQ_9

AW49

SA_DQ_10

BA49

SA_DQ_11

BC49

SA_DQ_12

AV46

SA_DQ_13

BA47

SA_DQ_14

AY50

SA_DQ_15

BF46

SA_DQ_16

BC47

SA_DQ_17

BF50

SA_DQ_18

BF48

SA_DQ_19

BC43

SA_DQ_20

BE49

SA_DQ_21

BA43

SA_DQ_22

BE47

SA_DQ_23

BF42

SA_DQ_24

BC39

SA_DQ_25

BF44

SA_DQ_26

BF40

SA_DQ_27

BB40

SA_DQ_28

BE43

SA_DQ_29

BF38

SA_DQ_30

BE41

SA_DQ_31

BA15

SA_DQ_32

BE11

SA_DQ_33

BE15

SA_DQ_34

BF14

SA_DQ_35

BB14

SA_DQ_36

BC15

SA_DQ_37

BE13

SA_DQ_38

BF16

SA_DQ_39

BF10

SA_DQ_40

BC11

SA_DQ_41

BF8

SA_DQ_42

BG7

SA_DQ_43

BC7

SA_DQ_44

BC9

SA_DQ_45

BD6

SA_DQ_46

BF12

SA_DQ_47

AV6

SA_DQ_48

BB6

SA_DQ_49

AW7

SA_DQ_50

AY6

SA_DQ_51

AT10

SA_DQ_52

AW11

SA_DQ_53

AU11

SA_DQ_54

AW9

SA_DQ_55

AR11

SA_DQ_56

AT6

SA_DQ_57

AP6

SA_DQ_58

AL7

SA_DQ_59

AR7

SA_DQ_60

AT12

SA_DQ_61

AM6

SA_DQ_62

AU7

SA_DQ_63

CANTIGA GMCH SFF_FCBGA1363

DDR SYSTEM MEMORY A

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

4

BC21 BJ21 BJ41

BH22 BK20 BL15

AT50 BB50 BB46 BE39 BB12 BE7 AV10 AR9

AR47 BA45 BE45 BC41 BC13 BB10 BA7 AN7 AR49 AW45 BC45 BA41 BA13 BA11 BA9 AN9

BC23 BF22 BE31 BC31 BH26 BJ35 BB34 BH32 BB26 BF32 BA21 BG25 BH34 BH18 BE25

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_A_BS0 14 DDR_A_BS1 14 DDR_A_BS2 14

DDR_A_RAS# 14 DDR_A_CAS# 14 DDR_A_WE# 14

DDR_A_DM[0..7] 14

DDR_A_DQS[0..7] 14

DDR_A_DQS#[0..7] 14

DDR_A_MA[0..14] 14

3

U3E

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9

DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

U3E

AP54 AM52 AR55 AV54

AM54

AN53 AT52 AU53

AW53

AY52 BB52 BC53 AV52

AW55

BD52 BC55 BF54 BE51 BH48 BK48 BE53 BH52 BK46

BJ47 BL45 BJ45

BL41 BH44 BH46 BK44 BK40

BJ39 BK10 BH10

BK6 BH6

BJ9

BL11

BG5

BJ5 BG3 BF4 BD4 BA3 BE5 BF2 BB4 AY4 BA1 AP2 AU1 AT2 AT4 AV4 AU3 AR3 AN1 AP4

AL3

AJ1 AK4 AM4 AH2 AK2

CANTIGA GMCH SFF_FCBGA1363

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

2

BJ13

SB_BS_0

BK12

SB_BS_1

BK38

SB_BS_2

BE21

SB_RAS#

BH14

SB_CAS#

BK14

SB_WE#

DDR_B_DM0

AP52

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

AY54 BJ49 BJ43 BH12 BD2 AY2 AJ3

AR53 BA53 BH50 BK42 BH8 BB2 AV2 AM2 AT54 BB54 BJ51 BH42 BK8 BC3 AW3 AN3

BJ15 BJ33 BH24 BA17 BF36 BH36 BF34 BK34 BJ37 BH40 BH16 BK36 BH38 BJ11 BL37

DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6

DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6

DDR_B_MA7 DDR_B_MA8

DDR_B_MA9

DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

1

DDR_B_BS0 15 DDR_B_BS1 15 DDR_B_BS2 15

DDR_B_RAS# 15 DDR_B_CAS# 15 DDR_B_WE# 15

DDR_B_DM[0..7] 15

DDR_B_DQS[0..7] 15

DDR_B_DQS#[0..7] 15

DDR_B_MA[0..14] 15

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga(2/6)-DDR2 A/B CH

LA-5811P

1

1.0

9 58Tuesday, December 29, 2009

1.0

DDC2_CLK

DDC2_DATA

3VDDCCL30 3VDDCDA30

CRT_HSYNC30

CRT_VSYNC30

5

IGPU_L_BKLT_EN28

DDC2_DATA28

M_BLUE30 M_GREEN30 M_RED30

3VDDCCL 3VDDCDA CRT_HSYNC

CRT_VSYNC

+3VS

DDC2_CLK28

ENAVDD29

LVDS_A_C-28 LVDS_A_C+28

LVDS_A_0-28 LVDS_A_1-28 LVDS_A_2-28

LVDS_A_0+28 LVDS_A_1+28 LVDS_A_2+28

M_BLUE M_GREEN M_RED

1 2

DPST_PWM28

R338 100K_0402_5%R338 100K_0402_5%

R340 0_0402_5%R340 0_0402_5%

R65 10K_0402_5%R65 10K_0402_5%

1 2

R66 10K_0402_5%R66 10K_0402_5%

1 2

DDC2_CLK DDC2_DATA

R67 2.37K_0402_1%R67 2.37K_0402_1%

1 2

T42T42

LVDS_A_CLVDS_A_C+

LVDS_A_0LVDS_A_1LVDS_A_2-

LVDS_A_0+ LVDS_A_1+ LVDS_A_2+

R68 75_0402_5%R 68 75_0402_5%

1 2

R69 75_0402_5%R69 75_0402_5%

1 2

R70 75_0402_5%R 70 75_0402_5%

1 2

R16

1 2

R15

150_0402_1%

1 2

150_0402_1%

R13

1 2

150_0402_1%

R71 3 0.1_0402_1%R71 3 0.1_0402_1%

R73 3 0.1_0402_1%R73 3 0.1_0402_1%

R342

R343

0_0402_5%

@

Close to pin D32 and keep 30mil space to other part/trace.

DPST_PWM

12

ENABLT_R

1.02K_0402_1%

R76

+3VS

R339

R341

2.2K_0402_5%

D D

For Crestline:2.4kohm For Calero: 1.5Kohm For Cantiga: 2.37Kohm

C C

B B

R341

2.2K_0402_5%

1 2

LVDS_IBG

4

U3C

D38

L_BKLT_CTRL

C37

L_BKLT_EN

K38

L_CTRL_CLK

L37

L_CTRL_DATA

J37

L_DDC_CLK

L35

L_DDC_DATA

B36

L_VDD_EN

F50

LVDS_IBG

H46

LVDS_VBG

P44

LVDS_VREFH

K46

LVDS_VREFL

D46

LVDSA_CLK#

B46

LVDSA_CLK

D44

LVDSB_CLK#

B44

LVDSB_CLK

G45

LVDSA_DATA#_0

F46

LVDSA_DATA#_1

G41

LVDSA_DATA#_2

C45

LVDSA_DATA#_3

F44

LVDSA_DATA_0

G47

LVDSA_DATA_1

F40

LVDSA_DATA_2

A45

LVDSA_DATA_3

B40

LVDSB_DATA#_0

A41

LVDSB_DATA#_1

F42

LVDSB_DATA#_2

D48

LVDSB_DATA#_3

D40

LVDSB_DATA_0

C41

LVDSB_DATA_1

G43

LVDSB_DATA_2

B48

LVDSB_DATA_3

J27

TVA_DAC

E27

TVB_DAC

G27

TVC_DAC

F26

TVA_RTN

B34

TV_DCONSEL_0

D34

TV_DCONSEL_1

J29

CRT_BLUE

G29

CRT_GREEN

F30

CRT_RED

E29

CRT_IRTN

D36

CRT_DDC_CLK

C35

CRT_DDC_DATA

J33

CRT_HSYNC

D32

CRT_TVO_IREF

G31

CRT_VSYNC

CANTIGA GMCH SFF_FCBGA1363

1 2

3

layout note: Place R64 <500mils to U4 pin U45&T44.

PEGCOMP trace width and spacing is 20/25 mils.

PEGCOMP

1 2

R64 49.9_0402_1%R64 49.9_0402_1%

PEG_TXN0

C1073 0.1U_0402_16V7KC1073 0.1U_0402_16V7K

PEG_TXN1

C1074 0.1U_0402_16V7KC1074 0.1U_0402_16V7K

PEG_TXN2

C1075 0.1U_0402_16V7KC1075 0.1U_0402_16V7K

PEG_TXN3

C1076 0.1U_0402_16V7KC1076 0.1U_0402_16V7K

PEG_TXN4

C1077 0.1U_0402_16V7KC1077 0.1U_0402_16V7K

PEG_TXN5

C1078 0.1U_0402_16V7KC1078 0.1U_0402_16V7K

PEG_TXN6

C1079 0.1U_0402_16V7KC1079 0.1U_0402_16V7K

PEG_TXN7

C1080 0.1U_0402_16V7KC1080 0.1U_0402_16V7K

PEG_TXN8

C1081 0.1U_0402_16V7KC1081 0.1U_0402_16V7K

PEG_TXN9

C1082 0.1U_0402_16V7KC1082 0.1U_0402_16V7K

PEG_TXN10

C1083 0.1U_0402_16V7KC1083 0.1U_0402_16V7K

PEG_TXN11

C1084 0.1U_0402_16V7KC1084 0.1U_0402_16V7K

PEG_TXN12

C1085 0.1U_0402_16V7KC1085 0.1U_0402_16V7K

PEG_TXN13

C1086 0.1U_0402_16V7KC1086 0.1U_0402_16V7K

PEG_TXN14

C1087 0.1U_0402_16V7KC1087 0.1U_0402_16V7K

PEG_TXN15

C1088 0.1U_0402_16V7KC1088 0.1U_0402_16V7K

PEG_TXP0

C1089 0.1U_0402_16V7KC1089 0.1U_0402_16V7K

PEG_TXP1

C1090 0.1U_0402_16V7KC1090 0.1U_0402_16V7K

PEG_TXP2

C1091 0.1U_0402_16V7KC1091 0.1U_0402_16V7K

PEG_TXP3

C1092 0.1U_0402_16V7KC1092 0.1U_0402_16V7K

PEG_TXP4

C1093 0.1U_0402_16V7KC1093 0.1U_0402_16V7K

PEG_TXP5

C1094 0.1U_0402_16V7KC1094 0.1U_0402_16V7K

PEG_TXP6

C1095 0.1U_0402_16V7KC1095 0.1U_0402_16V7K

PEG_TXP7

C1096 0.1U_0402_16V7KC1096 0.1U_0402_16V7K

PEG_TXP8

C1097 0.1U_0402_16V7KC1097 0.1U_0402_16V7K

PEG_TXP9

C1098 0.1U_0402_16V7KC1098 0.1U_0402_16V7K

PEG_TXP10

C1099 0.1U_0402_16V7KC1099 0.1U_0402_16V7K

PEG_TXP11

C1100 0.1U_0402_16V7KC1100 0.1U_0402_16V7K

PEG_TXP12

C1101 0.1U_0402_16V7KC1101 0.1U_0402_16V7K

PEG_TXP13

C1102 0.1U_0402_16V7KC1102 0.1U_0402_16V7K

PEG_TXP14

C1103 0.1U_0402_16V7KC1103 0.1U_0402_16V7K

PEG_TXP15

C1104 0.1U_0402_16V7KC1104 0.1U_0402_16V7K

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

U45 T44

D52 G49 K54 H50 M52 N49 P54 V46 Y50 V52 W49 AB54 AD46 AC55 AE49 AF54

E51 F48 J55 J49 M54 M50 P52 U47 AA49 V54 V50 AB52 AC47 AC53 AD50 AF52

L47 F52 P46 H54 L55 T46 R53 U49 T54 Y46 AB46 W53 Y54 AC49 AF46 AD54

J47 F54 N47 H52 L53 R47 R55 T50 T52 W47 AA47 W55 Y52 AB50 AE47 AD52

PEG_COMPI

PEG_COMPO

LVDS

TV

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_TX#_10

PCI-EXPRESS GRAPHICS

PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

VGA

PCIE_GTX_C_MRX_N0 21 PCIE_GTX_C_MRX_N1 21 PCIE_GTX_C_MRX_N2 21 PCIE_GTX_C_MRX_N3 21 PCIE_GTX_C_MRX_N4 21 PCIE_GTX_C_MRX_N5 21 PCIE_GTX_C_MRX_N6 21 PCIE_GTX_C_MRX_N7 21 PCIE_GTX_C_MRX_N8 21 PCIE_GTX_C_MRX_N9 21 PCIE_GTX_C_MRX_N10 21 PCIE_GTX_C_MRX_N11 21 PCIE_GTX_C_MRX_N12 21 PCIE_GTX_C_MRX_N13 21 PCIE_GTX_C_MRX_N14 21 PCIE_GTX_C_MRX_N15 21

PCIE_GTX_C_MRX_P0 21 PCIE_GTX_C_MRX_P1 21 PCIE_GTX_C_MRX_P2 21 PCIE_GTX_C_MRX_P3 21 PCIE_GTX_C_MRX_P4 21 PCIE_GTX_C_MRX_P5 21 PCIE_GTX_C_MRX_P6 21 PCIE_GTX_C_MRX_P7 21 PCIE_GTX_C_MRX_P8 21 PCIE_GTX_C_MRX_P9 21 PCIE_GTX_C_MRX_P10 21 PCIE_GTX_C_MRX_P11 21 PCIE_GTX_C_MRX_P12 21 PCIE_GTX_C_MRX_P13 21 PCIE_GTX_C_MRX_P14 21 PCIE_GTX_C_MRX_P15 21

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

+VCC_PEG

PCIE_MTX_C_GRX_N0 21 PCIE_MTX_C_GRX_N1 21 PCIE_MTX_C_GRX_N2 21 PCIE_MTX_C_GRX_N3 21 PCIE_MTX_C_GRX_N4 21 PCIE_MTX_C_GRX_N5 21 PCIE_MTX_C_GRX_N6 21 PCIE_MTX_C_GRX_N7 21 PCIE_MTX_C_GRX_N8 21 PCIE_MTX_C_GRX_N9 21 PCIE_MTX_C_GRX_N10 21 PCIE_MTX_C_GRX_N11 21 PCIE_MTX_C_GRX_N12 21 PCIE_MTX_C_GRX_N13 21 PCIE_MTX_C_GRX_N14 21 PCIE_MTX_C_GRX_N15 21

PCIE_MTX_C_GRX_P0 21 PCIE_MTX_C_GRX_P1 21 PCIE_MTX_C_GRX_P2 21 PCIE_MTX_C_GRX_P3 21 PCIE_MTX_C_GRX_P4 21 PCIE_MTX_C_GRX_P5 21 PCIE_MTX_C_GRX_P6 21 PCIE_MTX_C_GRX_P7 21 PCIE_MTX_C_GRX_P8 21 PCIE_MTX_C_GRX_P9 21 PCIE_MTX_C_GRX_P10 21 PCIE_MTX_C_GRX_P11 21 PCIE_MTX_C_GRX_P12 21 PCIE_MTX_C_GRX_P13 21 PCIE_MTX_C_GRX_P14 21 PCIE_MTX_C_GRX_P15 21

2

Strap Pin Table

CFG[2:0] FSB Freq select

CFG[4:3] Reserved

CFG5 (DMI select)

CFG6

CFG7 (Intel Management Engine Crypto strap)

CFG8

CFG9

(PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11

CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

1

000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved

0 = DMI x 2 1 = DMI x 4 0 = The iTPM Host Interface is enable

*

1 = The iTPM Host Interface is disable

0 =(TLS)chiper suite with no confidentiality

1 =(TLS)chiper suite with confidentiality

Reserved

0 = Reverse Lane,15->0, 14->1

1 = Normal Operation,Lane Number in order

0 = Enable

1 = Disable

Reserved

00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled

*

(Default)11 = Normal Operation

ReservedCFG[15:14]

0 = Disabled

1 = Enabled

*

ReservedCFG[18:17]

0 = Normal Operation

(Lane number in Order)

*

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.

1 = PCIE/SDVO are operating simu.

R72 2.21K_0402_1%@R72 2.21K_0402_1%@

CFG58

CFG68

CFG78

CFG98

CFG108

CFG128

CFG138

CFG168

1 2

R74 2.21K_0402_1%@R74 2.21K_0402_1%@

1 2

R75 2.21K_0402_1%@R75 2.21K_0402_1%@

1 2

R77 2.21K_0402_1%@R77 2.21K_0402_1%@

1 2

R78 2.21K_0402_1%@R78 2.21K_0402_1%@

1 2

R79 2.21K_0402_1%@R79 2.21K_0402_1%@

1 2

R80 2.21K_0402_1%@R80 2.21K_0402_1%@

1 2

R81 2.21K_0402_1%@R81 2.21K_0402_1%@

1 2

*

+3VS

R82 4.02K_0402_1%@R 82 4.02K_0402_1%@

CFG198

CFG208

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga(3/6)-VGA/LVDS/TV

LA-5811P

1 2

R83 4.02K_0402_1%@R83 4.02K_0402_1%@

1 2

1

1.0

10 58Tuesday, December 29, 2009

1.0

5

+3VS

BLM18PG181SN1D_0603

0.1U_0402_16V4Z

1

D D

C89

2

+1.5VS

C C

B B

+1.05VM_HPLL

+3VS_DAC_CRT

R86

12

10U_0603_6.3V

1

C91

C90

2

R94 0_0603_5%R94 0_0603_5%

1 2

+VCCP

C110

+1.05VM_PEGPLL

1

C125

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

+3VS

1

BLM18PG181SN1D_0603

C92

2

+1.5VS_PEG_BG

1

C105

0.1U_0402_16V4Z

1

+

2

R100 0_0603_5%R100 0_0603_5%

2

R97 0_0805_5%R97 0_0805_5%

1 2

150U_B2_6.3V-M~D

1 2

1

+1.8V

C126

2

0.1U_0402_16V4Z

+3VS_DAC_BG

R87

12

0.01U_0402_16V7K

22U_0805_6.3V

1

C94

C93

2

+1.8V_TXLVDS

1

C102

C102 1000P_0402_50V7K

1000P_0402_50V7K

2

+1.05VM_PEGPLL

+1.05VM_A_SM

4.7U_0805_10V4Z

10U_0805_6.3V6M

1

2

C112

C111

+1.05VM_A_SM_CK

10U_0805_6.3V6M

1

C119

2

R102 0_0603_5%R102 0_0603_5%

12

+1.05VM_DPLLA

+1.05VM_DPLLB

+1.05VM_HPLL

+1.05VM_MPLL

1U_0603_10V4Z

1

2

C113

0.1U_0402_16V4Z

1

C120

2

1U_0603_10V4Z

1

C127

2

+1.8V_LVDS

AF10

AJ43

AG43

AW24

AU24

AW22

AU22 AU21

AW20

AU19

AW18

AU18

AW16

AU16 AT16 AR16 AU15 AT15 AR15

AW14

AT24 AR24 AT22 AR22 AT21 AR21 AT19 AR19 AT18 AR18

AU27 AU28 AU29 AU31 AT31 AR31 AT29 AR29 AT28 AR28 AT27 AR27

AH12

AE43

4

J31

L31

M33

J45

L49

AE1

U43 U41

V44

M46

L45

U3H

VCCA_CRT_DAC

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_LVDS1 VCCA_LVDS2

VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_12 VCCA_SM_13 VCCA_SM_14 VCCA_SM_15 VCCA_SM_16 VCCA_SM_17

VCCA_SM_NCTF_1 VCCA_SM_NCTF_2 VCCA_SM_NCTF_3 VCCA_SM_NCTF_4 VCCA_SM_NCTF_5 VCCA_SM_NCTF_6 VCCA_SM_NCTF_7 VCCA_SM_NCTF_8 VCCA_SM_NCTF_9 VCCA_SM_NCTF_10

VCCA_SM_CK_4 VCCA_SM_CK_3 VCCA_SM_CK_2 VCCA_SM_CK_1 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8

VCCD_HPLL

VCCD_PEG_PLL

VCCD_LVDS_1 VCCD_LVDS_2

CANTIGA GMCH SFF_FCBGA1363

CRTPLLA PEGA SM

A LVDS

POWER

LVDS

VCCA_TV_DAC

TVD TV/CRT

HDA

VCCD_QDAC

VCCD_TVDAC

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4

PEG

DMI

VTTLF

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13

VTT

VCC_HDA

VCC_HV_1 VCC_HV_2

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3

VTTLF1 VTTLF2 VTTLF3

R13 T12 R11 T10 R9 T8 R7 T6 R5 T4 R3 T2 R1

K30

A31

N34

N32

M25 N24 M23

BK24 BL23 BJ23 BK22

T41

C33 A33

AB44 Y44 AC43 AA43

AM44 AN43 AL43

K14 Y12 P2

+VCC_HDA

+VTTLF1 +VTTLF2 +VTTLF3

3

0.47U_0603_10V7K

R92 0_0402_5%@R92 0_0402_5%@

1 2

+1.5VS_QDAC

+1.5VS_TVDAC

+VCC_HDA

0.1U_0402_16V4Z

+V1.05VM_AXF

+1.5V_SM_CK

+1.8V_TXLVDS

+VCC_PEG

+1.05VM_DMI

0.47U_0603_10V7K

1

C128

2

2.2U_0805_16V4Z

4.7U_0805_10V4Z

1

C87

2

C86

C85

Disable HDMI audio

R321 0_0603_5%R321 0_0603_5%

1 2

1

C1045

2

+3VS_HV

0.1U_0402_16V4Z

1

2

C121

0.47U_0603_10V7K

1

C129

C130

2

+VCCP

4.7U_0805_10V4Z

1

2

C88

+3VS_TVDAC

0.01U_0402_16V7K

1

C100

2

1

+

2

C84

330U_D2E_2.5VM_R9

1 2

BLM18PG181SN1D_0603

0.1U_0402_16V4Z

1

C101

2

+1.5VS

Enable HDMI audio

R91

+VCCP

+3VS

2

+1.05VM_DPLLA +VCCP

1

C81

2

0.1U_0402_16V4Z

+1.05VM_DPLLB

+3VS

2 1

D1 CH751H-40_SC76D1 CH751H-40_SC76

1

C96

2

0.1U_0402_16V4Z

+1.05VM_HPLL

1

2

C103

C104

0.1U_0402_16V4Z

4.7U_0805_10V4Z

+1.05VM_MPLL

1

C107

C106

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

+1.8V_TXLVDS +1.8V

1

2

C114

1000P_0402_50V7K

+1.05VM_PEGPLL

0.1U_0402_16V4Z

10U_0805_10V4Z

1

C122

C123

2

+VCCP_D

R103 10_0402_5%R103 10_0402_5%

+1.5VS_QDAC

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C131

C132

2

R84

1 2

BLM18PG181SN1D_0603

R88

1 2

BLM18PG181SN1D_0603

R93

1 2

BLM18PG181SN1D_0603

R95

1 2

BLM18PG181SN1D_0603

R98 0_0603_5%R98 0_0603_5%

1 2

L1

1 2

BLM18PG121SN1D_0603

1 2

BLM18PG181SN1D_0603

4.7U_0603_6.3V

1

C133

2

+VCCP

R105

1 2

+V1.05VM_AXF

10U_0805_10V4Z

1U_0603_10V4Z

1

C82

2

+VCCP

+1.5V_SM_CK

0.1U_0402_16V4Z

1

C97

10U_0805_6.3V6M

2

1

C99

2

+1.5VS_TVDAC

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C108

C109

2

+VCC_PEG

10U_0805_6.3V6M

4.7U_0805_10V4Z

220U_B2_2.5VM_R35

1

+

C118

C117

C116

2

+1.05VM_DMI

R101 0_0603_5%R101 0_0603_5%

1 2

0.1U_0402_16V4Z

1

C124

2

R104 0_0402_5%R104 0_0402_5%

1 2

+1.5VS

1

R85 0_0603_5%R85 0_0603_5%

1 2

1

C83

2

R89 0_0805_5%R89 0_0805_5%

1 2

10U_0805_6.3V6M

1

C98

2

R96

1 2

BLM18PG181SN1D_0603

1 2

R99 0_1206_5%R99 0_1206_5%

+VCCP

+3VS_HV

+VCCP

+1.5V

+1.5VS

+VCCP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga(4/6)-PWR

LA-5811P

1

1.0

11 58Tuesday, December 29, 2009

1.0

5

Extnal Graphic: 1210.34mA integrated Graphic: 1930.4mA

U3F

D D

0.22U_0402_10V4Z

220U_B2_2.5VM_R35

10U_0805_6.3V6M

1

+

C141

2

C C

B B

A A

0.22U_0402_10V4Z

C143

C142

1

2

1

2

+VCCP

AT41

VCC_1

AR41

VCC_2

AN41

VCC_3

AJ41

VCC_4

AH41

VCC_5

AD41

VCC_6

AC41

VCC_7

Y41

VCC_8

W41

VCC_9

0.1U_0402_16V4Z

C144

1

2

AT40

VCC_10

AM40

VCC_11

AL40

C145

VCC_12

AJ40

VCC_13

AH40

VCC_14

AG40

VCC_15

AE40

VCC_16

AD40

VCC_17

AC40

VCC_18

AA40

VCC_19

Y40

VCC_20

AN35

VCC_21

AM35

VCC_22

AJ35

VCC_23

AH35

VCC_24

AD35

VCC_25

AC35

VCC_26

W35

VCC_27

AM34

VCC_28

AL34

VCC_29

AJ34

VCC_30

AH34

VCC_31

AG34

VCC_32

AE34

VCC_33

AD34

VCC_34

AC34

VCC_35

AA34

VCC_36

Y34

VCC_37

W34

VCC_38

AM32

VCC_39

AL32

VCC_40

AJ32

VCC_41

AH32

VCC_42

AE32

VCC_43

AD32

VCC_44

AA32

VCC_45

AM31

VCC_46

AL31

VCC_47

AJ31

VCC_48

AH31

VCC_49

AM29

VCC_50

AL29

VCC_51

AM28

VCC_52

AL28

VCC_53

AJ28

VCC_54

AM27

VCC_55

AL27

VCC_56

AM25

VCC_57

AL25

VCC_58

AJ25

VCC_59

AM24

VCC_60

N36

VCC_61

CANTIGA GMCH SFF_FCBGA1363

4

VCC CORE

POWER

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31

VCC NCTF

VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38

AT38 AR38 AN38 AM38 AL38 AG38 AE38 AA38 Y38 W38 U38 T38 R38 AT37 AR37 AN37 AM37 AL37 AJ37 AH37 AG37 AE37 AD37 AC37 AA37 Y37 W37 U37 T37 R37 AT35 AR35 U35 AT34 AR34 U34 T34 R34

+VCCP

330U_D2E_2.5VM_R9

+1.5V

C146

3

+VCCP

3000mA

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42 VCC_AXG_43 VCC_AXG_44 VCC_AXG_45 VCC_AXG_46 VCC_AXG_47 VCC_AXG_48 VCC_AXG_49 VCC_AXG_50 VCC_AXG_51 VCC_AXG_52 VCC_AXG_53 VCC_AXG_54 VCC_AXG_55 VCC_AXG_56 VCC_AXG_57 VCC_AXG_58 VCC_AXG_59 VCC_AXG_60 VCC_AXG_61

VCC_AXG_SENSE VSS_AXG_SENSE

2

+VCCP

T32 U31 T31 R31 U29 T29 R29 U28 U27 T27 R27 U25 T25 R25 U24 U22 T22 R22 U21 T21 R21 AM19 AL19 AH19 AG19 AE19 AD19 AC19 W19 U19 AM18 AL18 AJ18 AH18 AG18 AE18 AD18 AC18 AA18 Y18 W18 U18 T18 R18

AJ16 AH16 AD16 AC16 AA16 U16 T16 R16 AM15 AL15 AJ15 AH15 AG15 AE15 AA15 Y15 W15 U15 T15

AU45 BF52 BB38 BA19 BE9 AU9 AL9

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

VCC SMVCC GFX

VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23

POWER

VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39

VCC GFX NCTF

VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44

VCC GFX

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8 VCC_AXG_NCTF_9

VCC_AXG_62 VCC_AXG_63 VCC_AXG_64 VCC_AXG_65 VCC_AXG_66 VCC_AXG_67 VCC_AXG_68 VCC_AXG_69 VCC_AXG_70 VCC_AXG_71 VCC_AXG_72 VCC_AXG_73 VCC_AXG_74 VCC_AXG_75 VCC_AXG_76 VCC_AXG_77 VCC_AXG_78 VCC_AXG_79 VCC_AXG_80

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

U3G

BB36 BE35

AW34

0.01U_0402_16V7K

10U_0805_6.3V6M

330U_D2E_2.5VM_R9

1

C137

+

2

1

+

2

1

C148

C147

2

10U_0805_6.3V

0.01U_0402_16V7K

10U_0805_6.3V6M

C138

C139

1

2

1

C149

C150

2

10U_0805_6.3V

1U_0603_10V4Z

6326.84mA

T43PAD T43PAD T44PAD T44PAD

AW32

BK30 BH30 BF30

C140

2

BD30 BB30

AW30

1

BL29

BJ29 BG29 BE29 BC29 BA29 AY29 BK28 BH28 BF28 BD28 BB28

BL27

BJ27 BG27 BE27 BC27 BA27 AY27

AW26

BF24

BL19 BB16

W32 AG31 AE31 AD31 AC31 AA31

Y31

W31 AH29

0.1U_0402_16V4Z

AG29 AE29 AD29 AC29 AA29

Y29

W29 AH28 AG28 AE28 AA28 AH27 AG27 AE27 AD27 AC27 AA27

Y27

W27 AH25 AD25 AC25

W25

AJ24 AH24 AG24 AE24 AD24 AC24 AA24

Y24

W24

AM22

AL22

AJ22 AH22 AG22 AE22 AD22 AC22 AA22

AM21

AL21

AJ21 AH21 AD21 AC21 AA21

Y21

W21

AM16

AL16

AG13 AE13

1

2

C134

0.1U_0402_16V4Z

C156 0.1U_0402_16V4ZC15 6 0.1U_0402_16V 4Z

1

2

1

2

C136

C135

4.7U_0805_10V4Z

0.22U_0402_10V4Z

C154 1U_0603_10V4ZC154 1U_0603_10V4Z

C152 0.22U_0603_10V7KC152 0.22U_0603_10V7K

C151 0.22U_0603_10V7KC151 0.22U_0603_10V7K

C153 0.47U_0402_6.3V6KC153 0.47U_0402_6.3V6K

C155 1U_0603_10V4ZC155 1U_0603_10V4Z

1

C157 0.1U_0402_16V4ZC15 7 0.1U_0402_16V 4Z

1

2

1

2

CANTIGA GMCH SFF_FCBGA1363

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga(5/6)-PWR/GND

LA-5811P

1

1.0

12 58Tuesday, December 29, 2009

1.0

5

U3I

BA55

VSS_1

AU55

VSS_2

AN55

VSS_3

AJ55

VSS_4

AE55

VSS_5

AA55

VSS_6

U55

VSS_7

N55

VSS_8

BD54

D D

C C

B B

A A

VSS_9

BG53

VSS_10

AJ53

VSS_11

AE53

VSS_12

AA53

VSS_13

U53

VSS_14

N53

VSS_15

J53

VSS_16

G53

VSS_17

E53

VSS_18

K52

VSS_19

BG51

VSS_20

BA51

VSS_21

AW51

VSS_22

AU51

VSS_23

AR51

VSS_24

AN51

VSS_25

AL51

VSS_26

AJ51

VSS_27

AG51

VSS_28

AE51

VSS_29

AC51

VSS_30

AA51

VSS_31

W51

VSS_32

U51

VSS_33

R51

VSS_34

N51

VSS_35

L51

VSS_36

J51

VSS_37

G51

VSS_38

C51

VSS_39

BK50

VSS_40

AM50

VSS_41

K50

VSS_42

BG49

VSS_43

E49

VSS_44

C49

VSS_45

BD48

VSS_46

BB48

VSS_47

AY48

VSS_48

AV48

VSS_49

AT48

VSS_50

AP48

VSS_51

AM48

VSS_52

AK48

VSS_53

AH48

VSS_54

AF48

VSS_55

AD48

VSS_56

AB48

VSS_57

Y48

VSS_58

V48

VSS_59

T48

VSS_60

P48

VSS_61

M48

VSS_62

K48

VSS_63

H48

VSS_64

BL47

VSS_65

BG47

VSS_66

E47

VSS_67

C47

VSS_68

A47

VSS_69

BD46

VSS_70

AY46

VSS_71

AM46

VSS_72

AK46

VSS_73

AH46

VSS_74

BG45

VSS_75

AE45

VSS_76

AC45

VSS_77

AA45

VSS_78

W45

VSS_79

R45

VSS_80

N45

VSS_81

E45

VSS_82

BD44

VSS_83

BB44

VSS_84

AV44

VSS_85

AK44

VSS_86

AH44

VSS_87

AF44

VSS_88

AD44

VSS_89

K44

VSS_90

H44

VSS_91

BL43

VSS_92

BG43

VSS_93

AY43

VSS_94

AR43

VSS_95

W43

VSS_96

R43

VSS_97

M43

VSS_98

E43

VSS_99

CANTIGA GMCH SFF_FCBGA1363

VSS

4

C43

VSS_100

A43

VSS_101

BD42

VSS_102

H42

VSS_103

BG41

VSS_104

AY41

VSS_105

AU41

VSS_106

AM41

VSS_107

AL41

VSS_108

AG41

VSS_109

AE41

VSS_110

AA41

VSS_111

R41

VSS_112

M41

VSS_113

E41

VSS_114

BD40

VSS_115

AU40

VSS_116

AR40

VSS_117

AN40

VSS_118

W40

VSS_119

U40

VSS_120

T40

VSS_121

R40

VSS_122

K40

VSS_123

H40

VSS_124

BL39

VSS_125

BG39

VSS_126

BA39

VSS_127

E39

VSS_128

C39

VSS_129

A39

VSS_130

BD38

VSS_131

AU38

VSS_132

H38

VSS_133

BG37

VSS_134

AU37

VSS_135

M37

VSS_136

E37

VSS_137

BD36

VSS_138

AW36

VSS_139

H36

VSS_140

BL35

VSS_141

BG35

VSS_142

AY35

VSS_143

AU35

VSS_144

AL35

VSS_145

AG35

VSS_146

AE35

VSS_147

AA35

VSS_148

Y35

VSS_149

M35

VSS_150

E35

VSS_151

A35

VSS_152

BD34

VSS_153

AU34

VSS_154

AN34

VSS_155

H34

VSS_156

BL33

VSS_157

BG33

VSS_158

AY33

VSS_159

E33

VSS_160

BD32

VSS_161

AU32

VSS_162

AN32

VSS_163

AG32

VSS_164

AC32

VSS_165

Y32

VSS_166

H32

VSS_167

B32

VSS_168

BJ31

VSS_169

BG31

VSS_170

AY31

VSS_171

AN31

VSS_172

M31

VSS_173

E31

VSS_174

N30

VSS_175

H30

VSS_176

AN29

VSS_177

AJ29

VSS_178

M29

VSS_179

A29

VSS_180

AW28

VSS_181

AN28

VSS_182

AD28

VSS_183

AC28

VSS_184

Y28

VSS_185

W28

VSS_186

H28

VSS_187

F28

VSS_188

AN27

VSS_189

AJ27

VSS_190

M27

VSS_191

BF26

VSS_192

BD26

VSS_193

N26

VSS_194

H26

VSS_195

BJ25

VSS_196

AY25

VSS_197

AU25

VSS_198

3

U3J

AN25

VSS_199

AG25

VSS_200

AE25

VSS_201

AA25

VSS_202

Y25

VSS_203

E25

VSS_204

A25

VSS_205

BD24

VSS_206

AN24

VSS_207

AL24

VSS_208

H24

VSS_209

BG23

VSS_210

AY23

VSS_211

E23

VSS_212

BD22

VSS_213

BB22

VSS_214

AN22

VSS_215

Y22

VSS_216

W22

VSS_217

H22

VSS_218

BL21

VSS_219

BG21

VSS_220

AY21

VSS_221

AN21

VSS_222

AG21

VSS_223

AE21

VSS_224

M21

VSS_225

E21

VSS_226

A21

VSS_227

BD20

VSS_228

H20

VSS_229

BG19

AY19

M19

BD18

BL17

BG17

AY17

M17

BD16 AN16 AG16 AE16

W16

BG15

AY15 AN15 AD15 AC15

M15

BD14

BL13 BG13

AY13 AU13 AR13

AJ13 AC13 AA13

W13

M13

BD12 AV12 AP12 AM12 AK12 AB12

BG11 AG11

BD10

AY10 AP10

BG9

BD8

E19

N18 H18

E17 A17

Y16

N16 H16

R15

E15

H14

U13

E13 A13

V12 P12 H12

E11

H10 BL9

E9 A9

BB8 AY8 AV8 AT8 AP8

VSS

VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299

CANTIGA GMCH SFF_FCBGA1363

VSS NCTF

VSS SCB

VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23

VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358

VSS_359 VSS_360 VSS_361 VSS_362

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5 VSS_SCB_6 VSS_SCB_7

2

AM8 AK8 AH8 AF8 AD8 AB8 Y8 V8 P8 M8 K8 H8 BJ7 E7 BF6 BC5 BA5 AW5 AU5 AR5 AN5 AL5 AJ5 AG5 AE5 AC5 AA5 W5 U5 N5 L5 J5 G5 C5 BH4 BE3 U3 E3 BC1 AW1 AR1 AL1 AG1 AC1 W1 N1 J1 AU43 BB42 AW38 BA35 L29 N28 N22 N20 N14 AL13 B10 AN13

N42 N40 N38 M39

AJ38 AH38 AD38 AC38 T35 R35 AT32 AR32 U32 R32 T28 R28 AT25 AR25 T24 R24 AN19 AJ19 AA19 Y19 T19 R19 AN18

BL55 BL1 A55 D1 B55 B2 A4

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga(6/6)-PWR/GND

LA-5811P

1

1.0

13 58Tuesday, December 29, 2009

1.0

5

DDR_A_DQS#[0..7]9

DDR_A_D[0..63]9

DDR_A_DM[0..7]9

DDR_A_DQS[0..7]9

DDR_A_MA[0..14]9

D D

+1.5V

1

C115

1000P_0402_50V7K

Layout Note:

C C

Layout Note: Place near JDIMM1.203 & JDIMM1.204

B B

A A

Place near JDIMM1

+1.5V

10U_0805_6.3V6M

1

C1106

C1107

2

+0.75VS

1U_0603_10V4Z

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

10U_0805_6.3V6M

1

C1108

C1109

2

1U_0603_10V4Z

2

C1120

C1119

1

5

10U_0805_6.3V6M

1

C1110

2

1U_0603_10V4Z

2

C1122

C1121

1

0.1U_0402_16V4Z

10U_0805_6.3V6M

1

C1111

2

10U_0805_6.3V6M

1

C1123

2

Add C115 for EMI request

2

0.1U_0402_16V4Z

C1112

C1113

1

2

4

+V_DDR3_DIMM_REF8,15

DDR_CKE0_DIMMA8

0.1U_0402_16V4Z

C1115

C1114

1

2

4

M_CLK_DDR08 M_CLK_DDR#08

DDR_A_CAS#9

DDR_CS1_DIMMA#8

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+V_DDR3_DIMM_REF

DDR_A_BS29

DDR_A_BS09

DDR_A_WE#9

1

C1125

C1124

2

2.2U_0603_6.3V4Z

3

+1.5V +1.5V

JDIMM1

VREF_DQ1VSS1

3

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

R347

1 2

10K_0402_5%

1

2

12

R348

10K_0402_5%

0.1U_0402_16V4Z

2009/07/25 2010/07/25

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-2013289-1

CONN@

Compal Secret Data

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

A15 A14

VDD4

A11

A7

VDD6

A6 A4

VDD8

A2 A0

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

G2

Deciphered Date

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

2

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 SM_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

DDR_VREF_CA_DIMMA

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_EXTTS#0 ICH_SMBDATA ICH_SMBCLK

+0.75VS

2

+0.75VS

1

SM_DRAMRST# 8,15

DDR_CKE1_DIMMA 8

M_CLK_DDR1 8 M_CLK_DDR#1 8

DDR_A_BS1 9 DDR_A_RAS# 9

DDR_CS0_DIMMA# 8 M_ODT0 8

M_ODT1 8

R346

1 2

0_0402_5%

PM_EXTTS#0 8,15

ICH_SMBDATA 15,16,19,33,36 ICH_SMBCLK 15,16,19,33,36

2.2U_0805_16V4Z

1

2

+V_DDR3_DIMM_REF

0.1U_0402_16V4Z

1

C1118

C1117

2

DDR3 SO-DIMM A

5.2H Standard

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDR3-SODIMM A

LA-5811P

1

1.0

14 58Tuesday, December 29, 2009

1.0

5

DDR_B_DQS#[0..7]9

DDR_B_D[0..63]9

DDR_B_DM[0..7]9

DDR_B_DQS[0..7]9

D D

Layout Note: Place near JDIMM2

+1.5V

10U_0805_6.3V6M

1

C1127

C1126

2

C C

B B

A A

2

Layout Note: Place near JDIMM2.203 & JDIMM2.204

+0.75VS

1U_0603_10V4Z

2

C1137

1

DDR_B_MA[0..14]9

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

0.1U_0402_16V4Z

10U_0805_6.3V6M

1

C1129

C1128

2

1U_0603_10V4Z

2

C1138

1

C1130

2

1U_0603_10V4Z

10U_0805_6.3V6M

2

1

C1140

C1139

1

2

5

10U_0805_6.3V6M

1

C1131

2

C1141

1000P_0402_50V7K

10U_0805_6.3V6M

C1132

1

2

+1.5V

1

C196

2

0.1U_0402_16V4Z

C1133

1

2

Add C196 for EMI request

4

+V_DDR3_DIMM_REF

+V_DDR3_DIMM_REF8,14

0.1U_0402_16V4Z

C1134

C1135

1

+3VS

DDR_CKE2_DIMMB8

DDR_B_BS29

M_CLK_DDR28 M_CLK_DDR#28

DDR_B_BS09

DDR_B_WE#9 DDR_B_CAS#9

DDR_CS3_DIMMB#8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

4

DDR_B_D0 DDR_B_D1

DDR_B_DM0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

10K_0402_5%

1

C1144

2

0.1U_0402_16V4Z

3

R350

1 2

R351

3

+1.5V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

10K_0402_5%

VTT1

205

G1

TYCO_2-2013310-1

CONN@

2009/07/25 2010/07/25

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

VSS24

DQ30 DQ31

VSS26

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

Compal Secret Data

2 4

DQ4

6

DQ5

8 10 12 14 16

DQ6

18

DQ7

20 22 24 26 28

DM1

30 32 34 36 38 40 42 44 46

DM2

48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102

CK1

104 106 108

BA1

110 112 114

S0#

116 118 120 122

NC2

124 126 128 130 132 134 136

DM4

138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170

DM6

172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

SDA

202

SCL

204

206

G2

Deciphered Date

+1.5V

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 SM_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_VREF_CA_DIMMB

+0.75VS

2

DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_EXTTS#0 ICH_SMBDATA ICH_SMBCLK

+0.75VS

2

SM_DRAMRST# 8,14

DDR_CKE3_DIMMB 8

M_CLK_DDR3 8 M_CLK_DDR#3 8

DDR_B_BS1 9 DDR_B_RAS# 9

DDR_CS2_DIMMB# 8 M_ODT2 8

M_ODT3 8

R349

0_0402_5%

1 2

PM_EXTTS#0 8,14

ICH_SMBDATA 14,16,19,33,36 ICH_SMBCLK 14,16,19,33,36

1

+V_DDR3_DIMM_REF

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1

C1143

C1142

2

DDR3 SO-DIMM B

9.2H Standard

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDR3-SODIMM B

LA-5811P

15 58Tuesday, December 29, 2009

1

1.0

5

MCH_CLKSEL1 8

R153

R153 10K_0402_5%

10K_0402_5%

1 2

R156

@

10K_0402_5%

1 2

+3VS

MCH_CLKSEL2 8

PCI

CLKSEL1

FSLA

CLKSEL0

MHz

FSLC1FSLB

CLKSEL2

CPU

0 1000 2660 33.3

1

0

D D

FSA

R130 2.2K_0402_5%R130 2.2K_0402_5%

CPU_BSEL05

C C

CPU_BSEL15

EC_FSB_SEL37

2N7002_SOT23

B B

FSC

CPU_BSEL25

A A

C233

22P_0402_50V8J

R146 10K_0402_5%R146 10K_0402_5%

14.318MHZ_16PF_X5H01431AFG1H-XY114.318MHZ_16PF_X5H01431AFG1H-X

Y1

2

1

200

166

12

1 2

R134 0_0402_5%R134 0_0402_5%

FSB

1 2

1K_0402_5%

1K_0402_5% R138

R138

13

D

2

G

Q59

S

12

1 2

R148 0_0402_5%R148 0_0402_5%

CLK_XTAL_OUT

CLK_XTAL_IN

12

2

C234

C234 22P_0402_50V8J

22P_0402_50V8J

1

5

SRC

FSB

MHz

1066

1000

800

100

667

+VCCP

R123

56_0402_5%@

1 2

R131 1K_0402_5%R131 1K_0402_5%

12

R135

1K_0402_5%@

+VCCP

R136

1K_0402_5%@

R137

1 2

1K_0402_5%

1 2

12

R141

0_0402_5%@

1 2

R147 1K_0402_5%R147 1K_0402_5%

12

R150

R150 0_0402_5%

0_0402_5%

MHz

33.30

33.3

+3VS

4

+3VM_CK505

1 2

R121 0_1206_5%R121 0_1206_5%

MCH_CLKSEL0 8

CLK_PCI_EC37

CLK_DEBUG_PORT_133

CLK_PCI_ICH17

CLK_48M_ICH19

CLK_14M_ICH19

+3VS +3VS

R154

@

10K_0402_5%

1 2

27_SELITP_EN

R157

R157 10K_0402_5%

10K_0402_5%

1 2

4

3

+1.05VM_CK505+VCCP

1 2

R122 0_1206_5%R122 0_1206_5%

1

2

C216

10U_0805_10V4Z

CLK_PCI_EC CLKREQ_CR#_R

CLK_PCI_ICH

1

2

C218

C217

0.1U_0402_16V4Z

CLK_48M_ICH

CLK_14M_ICH FSC

R155

R155 10K_0402_5%

10K_0402_5%

1 2

PCI2_TME

R158

@

10K_0402_5%

1 2

1

2

C220

C219

0.1U_0402_16V4Z

CLKREQ#_B_R CLKREQG_WWAN #_R

+1.05VM_CK505

1 2 1 2

1 2

1

2

C221

0.1U_0402_16V4Z

R14222_0402_5% R14222_0402_5% R35222_0402_5% R35222_0402_5%

R14533_0402_1% R14533_0402_1%

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

C222

0.1U_0402_16V4Z

0.1U_0402_16V4Z 47P_0402_50V8J~D

47P_0402_50V8J~D

C1069

@

R126 475_04 02_1%R126 475_0402_1% R127 475_04 02_1%R127 475_0402_1%

+3VM_CK505

+1.05VM_CK505

PCI_CLK1

PCI2_TME

27_SEL

ITP_EN

CLK_XTAL_IN

CLK_XTAL_OUT

FSA

R14915_0402_1% R14915_0402_1%

FSB

R15133_0402_1% R15133_0402_1%

3

12 12

6 12 19 23 27 55 72

31 38 52 62 66

13

14

15

16

17

5

4

20

2

7

59

18

22

26

30

69

34

42

3

2009/07/25 2010/07/25

R124 10K_0402_5%R124 10K_0402_5%

1 2

CLKREQ#_B 8

R132 10K_0402_5%R132 10K_0402_5%

U4

VDDREF VDDPCI VDD48 VDD96_IO VDDPLL3 VDDSRC VDDCPU

VDDPLL3_IO VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDCPU_IO

PCI

PCI2/TME

PCI3

PCI4/27_Select

PCI_F5/ITP_EN

X1

X2

USB_48MHz/FSLA

FSLB/TEST_MODE

FSLC/TEST_SEL/REF0

GNDSRC

GNDPCI

GND48

GND

GNDCPU

GNDSRC

GNDREF

ICS9LPRS397DKLFT MLF 72P

CLKREQ_WWA N# 33

1 2

CPUT2_ITP_LPR/SRCT8_LPR

CPUC2_ITP_LPR/SRCC8_LPR

SRCT0_LPR/DOTT_96_LPR

SRCC0_LPR/DOTC_96_LPR

27MHz_NonSS/SRCT1_LPR/SE1

27MHz_SS/SRCC1_LPR/SE2

Compal Secret Data

SRCT2_LPR/SATAT_LPR

SRCC2_LPR/SATAC_LPR

1

2

C224

C223

10U_0805_10V4Z

0.1U_0402_16V4Z

+3VS

PCI_STOP#

CPU_STOP#

CPUT0_LPR_F

CPUC0_LPR_F

CPUT1_LPR_F

CPUC1_LPR_F

SRCT7_LPR

SRCC7_LPR

SRCT6_LPR

SRCC6_LPR

SRCT10_LPR

SRCC10_LPR

SRCT11_LPR

SRCC11_LPR

SRCT9_LPR

SRCC9_LPR

SRCT4_LPR

SRCC4_LPR

SRCT3_LPR

SRCC3_LPR

CK_PWRGD/PD#

Deciphered Date

SCLK

SDATA

CR7#

CR#6

CR10#

CR#11

CR#9

CR#4

CR#3

CR#A

REF1

T_PAD

1

2

C225

0.1U_0402_16V4Z

NC

2

1

2

C226

10U_0805_10V4Z

11

10 9

54 53

71 70

68 67

CLKREQ#_B_R

65

64 63

61 60

58

57 56

CLKREQ_WLAN#_R

49

50 51

CLKREQG_WWAN #_R

46

48 47

43

44 45

41

39 40

37

35 36

32 33

24 25

28 29

1

CLKSATAREQ#_R

21

8

73

2

1

2

C227

C228

0.1U_0402_16V4Z

CLKREQ_WLAN#_R CLKSATAREQ#_R

ICH_SMBCLK 14,15,19,33,36

H_STP_PCI# 19 H_STP_CPU# 19

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK_MCH_BCLK 8 CLK_MCH_BCLK# 8

CLK_MCH_3GPLL 8 CLK_MCH_3GPLL# 8

CLK_PCIE_CR 35 CLK_PCIE_CR# 35

CLK_PCIE_WLAN 33 CLK_PCIE_WLAN# 33

CLK_PCIE_WW AN 33 CLK_PCIE_WW AN# 33

CLK_PCIE_VGA 21 CLK_PCIE_VGA# 21

CLKREQ_LAN# 3 4

CLK_PCIE_LAN 34 CLK_PCIE_LAN# 34

R_PCIE_ICH R_PCIE_ICH#

CLK_PCIE_SATA 18 CLK_PCIE_SATA# 18

CLK_MCH_DREFCLK 8 CLK_MCH_DREFCLK# 8

MCH_SSCDREFCLK 8 MCH_SSCDREFCLK# 8

CK_PWRGD 19

1

2

47P_0402_50V8J~D

C1070

@

Mount C157 & C166 tp solve

WWAN noise issue. 1/23

R128 475_0402_1%R128 475_0402_1% R129 475_0402_1%R129 475_0402_1%

ICH_SMBDATA 14,15,19,33,36

R218 10K_0402_5%R218 10K_0402_5%

VGA_CLKREQ# 21

RP28 0_0404_4P2R_5%RP28 0_0404_4P2R_5%

1 2

2 3 1 4

12 12

VGA_CLKREQ#VGA_CLKREQ#

ICS9LPRS387BKLFT(SA000020H10)

SLG8SP556VTR(SA000020K00)

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CLOCK GENERATOR

LA-5811P

1

C212

C213

1 2

C214

C229

Place close to U5

R125 10K_ 0402_5%R125 10K_ 0402_5%

1 2

R133 10K_ 0402_5%R133 10K_ 0402_5%

1 2

R353

1 2

10K_0402_5%

CLK_PCIE_ICH 19 CLK_PCIE_ICH# 19

1

CLK_48M_ICH

12

5P_0402_50V8C@

CLK_14M_ICH

12P_0402_50V8J

CLK_PCI_ICH

12

4.7P_0402_50V8C@

CLK_PCI_EC

12

4.7P_0402_50V8C@

CLKREQ_WLAN# 33 CLKSATAREQ# 19

+3VS

16 58Tuesday, December 29, 2009

+3VS

1.0

5

+3VS

1 2

R159 8.2K_0402_5%R159 8.2K_0402_5%

1 2

R160 8.2K_0402_5%R160 8.2K_0402_5%

1 2

R161 8.2K_0402_5%R161 8.2K_0402_5%

1 2

R162 8.2K_0402_5%R162 8.2K_0402_5%

D D

C C

1 2

R163 8.2K_0402_5%R163 8.2K_0402_5%

1 2

R164 8.2K_0402_5%R164 8.2K_0402_5%

1 2

R165 8.2K_0402_5%R165 8.2K_0402_5%

1 2

R166 8.2K_0402_5%R166 8.2K_0402_5%

+3VS

1 2

R167 8.2K_0402_5%R167 8.2K_0402_5%

1 2

R168 8.2K_0402_5%R168 8.2K_0402_5%

1 2

R169 8.2K_0402_5%R169 8.2K_0402_5%

1 2

R170 8.2K_0402_5%R170 8.2K_0402_5%

1 2

R171 8.2K_0402_5%R171 8.2K_0402_5%

1 2

R172 8.2K_0402_5%R172 8.2K_0402_5%

1 2

R173 8.2K_0402_5%R173 8.2K_0402_5%

R174 8.2K_0402_5%R174 8.2K_0402_5%

1 2

R175 8.2K_0402_5%R175 8.2K_0402_5%

1 2

R176 8.2K_0402_5%R176 8.2K_0402_5%

1 2

R178 8.2K_0402_5%R178 8.2K_0402_5%

1 2

R179 8.2K_0402_5%R179 8.2K_0402_5%

12

PCI_DEVSEL#

PCI_STOP#

PCI_TRDY#

PCI_FRAME#

PCI_PLOCK#

PCI_IRDY#

PCI_SERR#

PCI_PERR#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

ACCEL_INT#

PCI_PIRQF#

PCI_PIRQG#

PCI_PIRQH#

PCI_REQ0#

PCI_REQ1#

PCI_REQ2#

PCI_REQ3#

4

U5B

A11

AD0

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

B12 A10

C12

A8 A12 E10 C11

B9

D8

A4

E8

A3

D9

C8

C2

D7

B3 D11

B6

D5

D3

F4

E3

E4

B2

C4

C1

D1

E2

H2

F1

F5

F2

PCI

AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29

J4

AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C7PIRQH#/GPIO5

ICH9-M SFF ES_FCBGA569

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR# STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4

3

PCI_REQ0#

G4

PCI_GNT0#

E1

PCI_REQ1#

A9 E12

PCI_REQ2#

R354 0_0402_5%R354 0_0402_5%

DGPU_HOLD_RST#19

1 2

PLT_RST# 8,35,37 CLK_PCI_ICH 16 EC_PME# 34,37

ACCEL_INT# 36

PLT_RST#

R355

1 2

0_0402_5%

DGPU_SELECT# 28,29,30

B11 C10 D6 C6

D10 A5 E6 C9

C3 B1 T3 A7 D4 C5 H5 A6 A2 B8

A21 B5 T1

G3 G1 F3 H4

PCI_REQ3# PCI_GNT3#

PCI_IRDY#

PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#

PLT_RST# CLK_PCI_ICH EC_PME#

ACCEL_INT# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

2

+3VS

5

U10 N C7SZ08P5X_NL_SC70-5U10 NC7SZ08P5X_NL_SC70-5

2

P

B

4

Y

1

A

G

3

R356 100_0402_5%R356 100_0402_5%

12

R357

R357 100K_0402_5%

100K_0402_5%

1

12

PEG_RST# 21

For VGA/B

B B

PCI_GNT3#

A A

A16 swap override Strap

Low= A16 swap override Enble High= Default

PCI_GNT3#

5

*

12

R181

1K_0402_5%@

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

12

R182

R182 1K_0402_5%

1K_0402_5%

@

1

0

1

0

1

PCI_GNT0#

DEL J3. 9/29

4

Boot BIOS Location

SPI

PCI

LPC

*

KBC_SPI_CS1#19

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Place closely pin B10

CLK_PCI_ICH

12

R183

1K_0402_5%@

2009/07/25 2010/07/25

12

@

R180

R180 10_0402_5%

10_0402_5%

1

@

C235

8.2P_0402_50V

2

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ICH9(1/4)-PCI/INT

LA-5811P

17 58Tuesday, December 29, 2009

1

1.0

5

4

3

2

1

RTC Reset SW

PJP1

R189

@

+RTCVCC

HDA_BITCLK36 HDA_SYNC36

HDA_RST#36

HDA_SDOUT36

0_0402_5%

PJP1

112

JUMP_43X39@

1 2

+1.5VS

DGPU_EDIDSEL#28,30 DGPU_PWMSEL#28

SATA_LED#38

SATA_IRX_DTX_N0 SATA_IRX_DTX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

4

ICH_RTCRST#

2

1

C1145

0.01U_0402_50V7K

2

R318

R318 20K_0402_5%

20K_0402_5%

1U_0603_10V4Z

R198 24.9_0402_1%R198 24.9_0402_1%

R120 33_040 2_1%R120 33_0402_1% R8 33_0402_1%R8 33_0402_1%

R119 33_040 2_1%R119 33_0402_1%

HDA_SDIN036

R46 33_0402_1%R46 33_0402_1%

+3VS

C1051 0.01U_0402_16V7KC1051 0.01U_0402_16V7K C1052 0.01U_0402_16V7KC1052 0.01U_0402_16V7K

1

C1044

2

1 2

1 2 1 2

1 2

R358 0_0402 _5%R358 0_0402 _5% R359 0_0402 _5%R359 0_0402 _5%

R209 10K_0402_5%R209 10K_0402_5%

1 2 1 2

12

ICH_RTCX1 ICH_RTCX2

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

ICH_INTVRMEN LAN100_SLP

T47PAD T47PAD

GLAN_COMP

HDA_BITCLK_R HDA_SYNC_R

HDA_RST#_R

HDA_SDOUT_R

SATA_TXN0_R SATA_TXP0_R

U5A

F25

RTCX1

G25

RTCX2

G24

RTCRST#

C24

SRTCRST#

C23

INTRUDER#

E25

INTVRMEN

D25

LAN100_SLP

G22

GLAN_CLK

D14

LAN_RSTSYNC

A14

LAN_RXD0

D12

LAN_RXD1

B14

LAN_RXD2

D13

LAN_TXD0

C13

LAN_TXD1

A13

LAN_TXD2

D15

GPIO56

H22

GLAN_COMPI

H21

GLAN_COMPO

AE7

HDA_BIT_CLK

AB7

HDA_SYNC

AA7

HDA_RST#

AB6

HDA_SDIN0

AE6

HDA_SDIN1

AC6

HDA_SDIN2

AA5

HDA_SDIN3

AC7

HDA_SDOUT

AD8

HDA_DOCK_EN#/GPIO33

AB8

HDA_DOCK_RST#/GPIO34

AC9

SATALED#

AE14

SATA0RXN

AD14

SATA0RXP

AC15

SATA0TXN

AD15

SATA0TXP

AD13

SATA1RXN

AC13

SATA1RXP

AA14

SATA1TXN

AB14

SATA1TXP

ICH9-M SFF ES_FCBGA569

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT# INTR

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP11

SATA4RXN SATA4RXP

IHDA

SATA4TXN SATA4TXP

SATA5RXN SATA5RXP

SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATA

SATARBIAS#

SATARBIAS

1 2

10M_0402_5%

1

C24615P_0402_50V8 J C2461 5P_0402_50V8J

2

2009/07/25 2010/07/25

LPC_AD0

H3

LPC_AD1

J3

LPC_AD2

K5

LPC_AD3

L3

J2

H1 J1

GATEA20

N3 AB23

H_DPRSTP_R#

AE23 AE24

H_FERR#_R

AD25

AE22

AD23

AE21 AD24

KB_RST#

L1

AD21

H_SMI#

AC21

H_STPCLK#

AC25

THRMTRIP_ICH#

AC23

AC22

AD12 AE12 AB12 AA12

AC11 AD11 AB10 AA10

AC16 AB16

AD10 AE10

R215

2

Compal Secret Data

T48 PADT48 PAD

CLK_PCIE_SATA# CLK_PCIE_SATA

R212 24.9_0402_1%R212 24.9_0402_1%

Within 500 mils

ICH_RTCX1

ICH_RTCX2

C24712P_0402_50V8J C24712P_0402_50V8J Y2

4IN1

32.768KHZ_12.5P_1TJS125BJ2A251Y232.768KHZ_12.5P_1TJS125BJ2A251

1

OUT

2

NC3NC

Deciphered Date

LPC_AD[0..3] 33,37

LPC_FRAME# 33,37

T46 P ADT46 P AD

GATEA20 37 H_A20M# 4

R194 0_0402_5%R194 0_0402_5%

1 2

H_DPSLP# 5

R195 56_0402_5%R195 56_0402_5%

1 2

H_PWRGOOD 5

H_IGNNE# 4

H_INIT# 4 H_INTR 4 KB_RST# 37

H_NMI 4 H_SMI# 4

H_STPCLK# 4

R206 54.9_0402_1%R206 54.9_0402_1%

1 2

placed within 2 " from ICH9M

CLK_PCIE_SATA# 16 CLK_PCIE_SATA 16

1 2

2

+VCCP

R192

R192 56_0402_5%

H_DPRSTP# 5,8,51

H_FERR#

56_0402_5%

1 2

H_FERR# 4

Place Close to U8.

+VCCP

12

R201

R201 56_0402_5%

56_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet of

GATEA20

R196 10K_0402_5%R196 10K_0402_5%

KB_RST#

H_THERMTRIP# 4,8

Compal Electronics, Inc.

ICH9(2/4)_LAN,HD,IDE,LPC

LA-5811P

1 2

R197 10K_0402_5%R197 10K_0402_5%

1 2

1

18 58Tuesday, December 29, 2009

+3VS

1.0

D D

C C

C1047 12P_0402_50V8J@ C1047 12P_0402_50V8J@

HDA_BITCLK

1 2

SATA_IRX_DTX_N032

HDD

B B

+RTCVCC

1 2

R184 330K _0402_1%R184 330K_0402_1%

1 2

R185 1M _0402_5%R 185 1M_0402_5%

1 2

R186 330K _0402_1%R186 330K_0402_1%

1 2

R187 20K_ 0402_5%R187 20K_ 0402_5%

Change from 180K to 20K & 0.1u to 1u. 9/29

LAN100_SLP

SM_INTRUDER#

ICH_INTVRMEN

ICH_SRTCRST#

1U_0603_10V4Z

ICH_RSVD HDA_SDOUT_CODEC

0 0 0 1 1 1

A A

XOR CHAIN ENTRANCE STRAP:RSVD

+3VS

1 2

R191 1K_0402_5%@R191 1K_ 0402_5%@

1 2

R193 1K_0402_5%@R193 1K_ 0402_5%@

5

1 0

HDA_SDOUT

ICH_RSVD

SATA_IRX_DTX_P032 SATA_ITX_DRX_N032 SATA_ITX_DRX_P032

R188

1

C236

0_0402_5%

@

1 2

2

Description

RV

XOR Normal(D) PCIE Bit1

ICH_RSVD 19

1 2

+3VS

1 2

R271 10K_0402_5%R271 10K_0402_5%

1 2

R220 10K_0402_5%@R220 10K_0402_5%@

1 2

R222 10K_0402_5%R222 10K_0402_5%

1 2

R225 8.2K_0402_5%R225 8.2K_0402_5%

1 2

R227 8.2K_0402_5%@R227 8.2K_0402_5%@

1 2

R231 8.2K_0402_5%R231 8.2K_0402_5%

D D

C C

B B

A A

1 2

R233 8.2K_0402 _5%@R233 8.2K_0402_5%@

1 2

R237 10K_0402_5%R237 10K_0402_5%

1 2

R238 10K_0402_5%R238 10K_0402_5%

1 2

R239 10K_0402_5%@R239 10K_0402_5%@

1 2

R362 8.2K_0402_5%R362 8.2K_0402_5%

+3VALW

1 2

R244 10K_0402_5%R244 10K_0402_5%

1 2

R245 10K_0402_5%R245 10K_0402_5%

1 2

R246 10K_0402_5%R246 10K_0402_5%

1 2

R250 10K_0402_5%R250 10K_0402_5%

1 2

R252 10K_0402_5%R252 10K_0402_5%

1 2

R254 10K_0402_5%R254 10K_0402_5%

1 2

R256 10K_0402_5%R256 10K_0402_5%

1 2

R258 100K_0402_5%R258 100K _0402_5%

1 2

R259 10K_0402_5%R259 10K_0402_5%

1 2

R261 10K_0402_5%R261 10K_0402_5%

1 2

R367 10K_0402_5%R367 10K_0402_5%

+3VALW

RP29

10K_1206_8P4R_5%

RP30

10K_1206_8P4R_5%

1 2

R269 10K_0402_5%R269 10K_0402_5%

1 2

R270 10K_0402_5%R270 10K_0402_5%

1 2

R334 10K_0402_5%R334 10K_0402_5%

1 2

R336 10K_0402_5%R336 10K_0402_5%

1 2

R335 10K_0402_5%R335 10K_0402_5%

ICH_SMBDATA14,15,16,33,36

ICH_SMBCLK14,15,16,33,36

+3VS

R327 8.2K_0402 _5%@R327 8.2K_0402_5%@

R234 8.2K_0402_5%R234 8.2K_0402_5%

R262 8.2K_0402_5%R262 8.2K_0402_5%

R230 8.2K_0402_5%R230 8.2K_0402_5%

R328 8.2K_0402 _5%@R328 8.2K_0402_5%@

R330 8.2K_0402 _5%@R330 8.2K_0402_5%@

R331 8.2K_0402 _5%@R331 8.2K_0402_5%@

45 36 27 18

FFS_INT2

DP_HPD_SB

SERIRQ

PM_CLKRUN#

EC_THERM#

GPIO22

GPIO17

CR_CPPEN

DGPU_PWR_EN

GPIO57

DGPU_HOLD_RST#

LINKALERT#

PCIE_WAKE#

EC_SWI#

XDP_DBRESET#

S4_STATE#

ICH_LOW_BAT#

GPIO24

ACIN

ME__EC_CLK1

ME__EC_DATA1

GPIO9

USB_OC#7 USB_OC#5 USB_OC#0 USB_OC#4

USB_OC#1 USB_OC#6 GPIO44 USB_OC#2

EC_LID_OUT#

GPIO42

USB_OC#9

USB_OC#10

USB_OC#11

ICH_SMBDATA

1 2

5

R274

2.2K_0402_5%

GPIO39

HDD_DET#

GPIO38

GPIO19

GPIO38

GPIO39

5

+3VS

12

R275

12

2.2K_0402_5%

S

G

2

10K_0402_5%

@

H_STP_PCI#16 H_STP_CPU#16

VGATE37,51

DGPU_PWR_EN23,40,47,50

+3VS

Q8

Q8 RHU002N06_SOT323

RHU002N06_SOT323

D

ICH_SMB_DATA

13

D

S

D

S

ICH_SMB_CLKICH_SMBCLK

13

Q9

G

RHU002N06_SOT323

2

+3VS

12

R235

DGPU_PWR_EN

R264 1K_0402_5%@R264 1K_0402_5%@

1 2

LAN

WLAN

R236

10K_0402_5%

@

R247 0 _0402_5%R247 0_0402_5% R248 1 00K_0402_5%R248 100K_0402_5%

PCIE_IRX_WLANTX_N233 PCIE_IRX_WLANTX_P233 PCIE_ITX_WLANRX_N233 PCIE_ITX_WLANRX_P233

PCIE_IRX_WWAN TX_N433 PCIE_IRX_WWAN TX_P433 PCIE_ITX_WWAN RX_N433 PCIE_ITX_WWAN RX_P433

4

2.2K_0402_5%

EC_SWI#3 7

XDP_DBRESET#4

PM_BMBUSY#8

EC_LID_OUT#37

R325 0_0402 _5%R325 0_0402 _5%

1 2

PM_CLKRUN#37

PCIE_WAKE#33 SERIRQ37

1 2 1 2

MCH_ICH_SYNC#8

PCIE_IRX_LANTX_N134 PCIE_IRX_LANTX_P134 PCIE_ITX_LANRX_N134 PCIE_ITX_LANRX_P134

EC_THERM#37

DGPU_HOLD_RST#17

CLKSATAREQ#16

SB_SPKR36

ICH_RSVD18

WWAN

PCIE_IRX_CRTX_N535 PCIE_IRX_CRTX_P535 PCIE_ITX_CRRX_N535 PCIE_ITX_CRRX_P535

CARD READER

KBC_SPI_CS1#17

4

+3VALW

12

R223

R224

2.2K_0402_5%

ICH_SMB_CLK ICH_SMB_DATA LINKALERT# ME__EC_CLK1 ME__EC_DATA1

EC_SWI#

XDP_DBRESET#

PM_BMBUSY#

EC_LID_OUT#

H_STP_PCI#_R

PM_CLKRUN#

PCIE_WAKE# SERIRQ EC_THERM#

VRMPWRGD

PAD

T51

DP_HPD_SB32 CR_CPPEN35

EC_SMI#37 EC_SCI#37

R263 0 _0402_5%@R263 0_0402_5%@

FFS_INT232,36

R268

DP_HPD_SB CR_CPPEN

T52PAD T52PAD

EC_SCI#

GPIO17

1 2

DGPU_HOLD_RST# GPIO22

T53PAD T53PAD T54PAD T54PAD

GPIO38 GPIO39 FFS_INT2

1 2

GPIO57

SB_SPKR MCH_ICH_SYNC# ICH_RSVD

T59PAD T59PAD

C1071 0.1U_0402_10V7KC1071 0.1U_0402_10V7K

1 2

C1072 0.1U_0402_10V7KC1072 0.1U_0402_10V7K

1 2

C265 0.1U_0402_10V7KC265 0.1U_0402_ 10V7K

1 2

C266 0.1U_0402_10V7KC266 0.1U_0402_ 10V7K

1 2

C269 0.1U_0402_10V7KC269 0.1U_0402_10V7K

1 2

C270 0.1U_0402_10V7KC270 0.1U_0402_ 10V7K

1 2

C1146 0.1U_0402_10V7KC1146 0.1U_0402_10V7K

1 2

C1147 0.1U_0402_10V7KC1147 0.1U_0402_10V7K

1 2

USB_OC#036 USB_OC#136 USB_OC#236

0_0402_5%

12

R287

22.6_0402_1%

U5C

C18

SMBCLK

C15

SMBDATA

B21

LINKALERT#/GPIO60/CLGPIO4

E18

SMLINK0

A24

SMLINK1

C20

RI#

T5

SUS_STAT#/LPCPD#

C25

SYS_RESET#

L2

PMSYNC#/GPIO0

A23

SMBALERT#/GPIO11

B15

STP_PCI#/GPIO15

A20

STP_CPU#/GPIO25

M5

CLKRUN#/GPIO32

C21

WAKE#

L4

SERIRQ

AD20

THRM#

B24

VRMPWRGD

A19

TP12

AE16

GPIO1

AE18

GPIO6

AD18

GPIO7

B25

GPIO8

C14

GPIO12

D20

GPIO13

AE17

GPIO17

K3

GPIO18

AC8

GPIO20

AC19

SCLOCK/GPIO22

D17

GPIO27

E20

GPIO28

M4

SATACLKREQ#/GPIO35

AB18

SLOAD/GPIO38

AC18

SDATAOUT0/GPIO39

AB19

SDATAOUT1/GPIO48

AC20

GPIO49

A16

GPIO57/CLGPIO5

K4

SPKR

AB20

MCH_SYNC#

C19

TP3

AB17

TP8

AC17

TP9

AD17

TP10

ICH9-M SFF ES_FCBGA569

PCIE_C_TXN1 PCIE_C_TXP1

PCIE_C_TXN2 PCIE_C_TXP2

PCIE_C_TXN4 PCIE_C_TXP4

PCIE_C_TXN5 PCIE_C_TXP5

USB_OC#0 USB_OC#1 USB_OC#2 GPIO42 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 GPIO44 USB_OC#9 USB_OC#10 USB_OC#11

USBRBIAS

Within 500 mils

3

HDD_DET#

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

V25 V24 U24 U23

W23 W24 V21 V22

Y24 Y25 Y21 Y22

AB24 AB25 AA23 AA24

T21 T22

AB21 AB22

AE2 AD1 AD3 AD4 AC2 AC3 AC5 AB4 AB2 AB1 AA3 AA2 Y1 Y2 W2 W3 V1 V2 Y5 Y4 U3 U2 V4 V5

AE19

GPIO19

AA18 AE20

GPIO37

AA20

CLK_14M_ICH

K1

CLK_48M_ICH

AB5

ICH_SUSCLK

R3

SLP_S3#

D18

SLP_S4#

B20

SLP_S5#

D16

S4_STATE#

E14

D23

DPRSLPVR

M1

ICH_LOW_BAT#

C16

U4

LAN_RST

D22

PM_RSMRST#

D19

CK_PWRGD_R

U1

M_PWROK

T4

B23

CL_CLK0

C22 A18

CL_DATA0

E22 B18

CL_VREF0_ICH

F21 A17

CL_RST#

C17 B17

GPIO24

A22 E16

ACIN

A15 D21

GPIO9

1 2

R368 0_0402_5%R368 0_0402_5%

DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0

DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1

DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2

DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3

CLK_PCIE_ICH# CLK_PCIE_ICH

DMI_IRCOMP

Compal Secret Data

Deciphered Date

R363 0 _0402_5%R363 0_0402_5% R361 0 _0402_5%R361 0_0402_5%

R243 0_0402_5%R243 0_0402_5%

R253 0_0402_5%R253 0_0402_5%

USB20_N0 36 USB20_P0 36 USB20_N1 36 USB20_P1 36 USB20_N2 36 USB20_P2 36 USB20_N3 38 USB20_P3 38 USB20_N4 33 USB20_P4 33 USB20_N5 33 USB20_P5 33 USB20_N6 33 USB20_P6 33 USB20_N7 29 USB20_P7 29

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS GPIO

Power MGTController Link

GPIO

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

MISC

U5D

T25

PERN1

T24

PERP1

R24

LAN

PETN1

R23

PETP1

P25

PERN2

P24

PERP2

P21

WLAN

PETN2

P22

PETP2

N23

PERN3

N24

PERP3

M21 M22

M25 M24

G23

AE5 AD5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EXP

PETN3 PETP3

PERN4 PERP4

L24

WWAN

PETN4

L23

PETP4

K24

PERN5

K25

PERP5

K21

PETN5

K22

PETP5

H24

PERN6/GLAN_RXN

H25

PERP6/GLAN_RXP

J24

PETN6/GLAN_TXN

J23

PETP6/GLAN_TXP

E24

SPI_CLK

E23

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

F22

SPI_MOSI SPI_MISO

P4

OC0#/GPIO59

N4

OC1#/GPIO40

N1

OC2#/GPIO41

P5

OC3#/GPIO42

P1

OC4#/GPIO43

P2

OC5#/GPIO29

M3

OC6#/GPIO30

M2

OC7#/GPIO31

P3

OC8#/GPIO44

R1

OC9#/GPIO45

R4

OC10#/GPIO46

R2

OC11#/GPIO47

USBRBIAS USBRBIAS#

ICH9-M SFF ES_FCBGA569

3

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN

PCI-Express

DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USBP0N USBP0P USBP1N

GLAN

USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N

SPI

USBP5P USBP6N

USB

USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

2009/07/25 2010/07/25

2

HDD_DET# 32

1 2 1 2

CLK_14M_ICH 16 CLK_48M_ICH 16

T50 PADT50 PAD

SLP_S3# 37,38 SLP_S4# 37 SLP_S5# 37,38

R241 1 0K_0402_5%R241 10K_0402_5%

1 2

PBTN_OUT# 37

1 2

M_PWROK 8

CL_CLK0 8

CL_DATA0 8

CL_RST# 8

ACIN 37,38,43

DMI_RXN0 8 DMI_RXP0 8 DMI_TXN0 8 DMI_TXP0 8

DMI_RXN1 8 DMI_RXP1 8 DMI_TXN1 8 DMI_TXP1 8

DMI_RXN2 8 DMI_RXP2 8 DMI_TXN2 8 DMI_TXP2 8

DMI_RXN3 8 DMI_RXP3 8 DMI_TXN3 8 DMI_TXP3 8

CLK_PCIE_ICH# 16 CLK_PCIE_ICH 16

R276 24.9_0402_1 %R276 24.9_0402_1%

1 2

CK_PWRGD 16

HDMI_HPD# 31

USB Port0

USB Port1

USB Port2

ELC

WLAN

WWAN

BT

USB CAM

2

1

1 2

R221 0_0402_5%R221 0_0402_5%

DGPU_PRSNTGPIO36

DGPU_PWROK 50

PM_PWROK 8,37,51

PM_DPRSLPVR 8,51

1

2

C271

0.1U_0402_16V4Z

PM_RSMRST#

Within 500 mils

DGPU_PRSNT

R257

3.24K_0402_1%

1 2

12

R260

453_0402_1%

R326

10K_0402_5%

+1.5VS

Title

ICH9(3/4)_DMI,USB,GPIO,PCIE

Size Document Number Rev

Custom

LA-5811P

Date: Sheet of

R366 10K_ 0402_5%R366 10K_ 0402_5%

GPIO37

DGPU_PWROK

R251 0_0402_5%R251 0_0402_5%

Q20

@Q20

@

12

1

2

Compal Electronics, Inc.

1 2

R364 10K_ 0402_5%

1 2

R365 10K_0402_5%@R365 10K_0402_5%@

1 2

LAN_RST

+3VS

1 2

MMBT3906H_SOT23-3

1 3

2

1 2

R332 4.7K_0402_5%@R332 4.7K_0402_5%@

2

3

2

3

D8 BAV99_SOT23-3@D 8 BAV99 _SOT23-3@

@

R283

R283 10_0402_5%

10_0402_5%

@

C273

4.7P_0402_50V8C

1

M_PWROKPM_PWROK

@

+3VS_DELAY

12

R27310K_0402_5% R27310K_040 2_5%

EC_RSMRST# 37

+3VS

D7

@D7

@

1

BAV99_SOT23-3

1

12

@

R333

2.2K_0402_5%

Place closely pin H1Place closely pin AF3

CLK_14M_ICHCLK_48M_ICH

12

@

R284

R284 10_0402_5%

10_0402_5%

@

1

C274

4.7P_0402_50V8C

2

19 58Tuesday, December 29, 2009

1.0

5

+RTCVCC

C275

0.1U_0402_16V4Z

R289

BLM18PG181SN1D_0603

21

D5

CH751H-40_SC76

ICH_V5REF_RUN

1

C291

1U_0402_6.3V6K

2

1 2

MBK1608301YZF 0603

R298

C309

0.1U_0402_16V4Z

1 2

20 mils

R296

+1.5VS_USBPLL

1

2

C306

0.1U_0402_16V4Z

+1.5VS

1

2

5

C296

1U_0402_6.3V6K

1

2

C307

0.1U_0402_16V4Z

R304

R304 MBK1608301YZF 0603

MBK1608301YZF 0603

1 2

D D

C C

B B

+1.5VS

MBK1608301YZF 0603

A A

+1.5VS

+5VS +3VS +3VALW+5VALW

12

R293

100_0402_5%

+1.5VS

1 2

+3VS

R303

1 2

1

C276

2

220U_B2_2.5VM_R35

1

+

C282

2

R294

100_0402_5%

1

2

C297

C308

0.1U_0402_16V4Z

12

20 mils

+1.5VS_PCIE_ICH

0.1U_0402_16V4Z

40 mils

1

2

C280

C279

10U_0603_6.3V6M

12

+1.5VS

10U_0603_6.3V6M

+1.5VS_PCIE_ICH

1

2

C310

10U_0603_6.3V6M

ICH_V5REF_RUN

ICH_V5REF_SUS

1

2

C281

10U_0603_6.3V6M

2.2U_0402_6.3V6M

21

D6

CH751H-40_SC76

ICH_V5REF_SUS

20 mils

1

C292

1U_0402_6.3V6K

2

+1.5VS_VCCSATAPLL

1

2

C298

1U_0603_10V4Z

1

2

C299

1U_0603_10V4Z

1

2

C303

0.1U_0402_16V4Z

VCC_LAN1_05_INT_ICH

+1.5VS_GLAN

1

2

C311

10U_0603_6.3V6M

+3VS

4

U5F

G17

VCCRTC

G7

V5REF

U7

V5REF_SUS

J19

VCC1_5_B[01]

K18

VCC1_5_B[02]

K19

VCC1_5_B[03]

L18

VCC1_5_B[04]

L19

VCC1_5_B[05]

M18

VCC1_5_B[06]

M19

VCC1_5_B[07]

N18

VCC1_5_B[08]

N19

VCC1_5_B[09]

P18

VCC1_5_B[10]

R18

VCC1_5_B[11]

T18

VCC1_5_B[12]

T19

VCC1_5_B[13]

U18

VCC1_5_B[14]

U19

VCC1_5_B[15]

W17

VCCSATAPLL

U13

VCC1_5_A[01]

V13

VCC1_5_A[02]

W13

VCC1_5_A[03]

U12

VCC1_5_A[04]

V12

VCC1_5_A[05]

W12

VCC1_5_A[06]

W10

VCC1_5_A[07]

U15

VCC1_5_A[08]

V15

VCC1_5_A[09]

W18

VCC1_5_A[10]

G9

VCC1_5_A[11]

H9

VCC1_5_A[12]

V11

VCC1_5_A[13]

U11

VCC1_5_A[14]

U8

VCCUSBPLL

T9

VCC1_5_A[15]

U9

VCC1_5_A[16]

G11

VCCLAN1_05[1]

H11

VCCLAN1_05[2]

G12

VCCLAN3_3[1]

H13

VCCLAN3_3[2]

J17

VCCGLANPLL

H19

VCCGLAN1_5[1]

J18

VCCGLAN1_5[2]

K16

VCCGLAN3_3

ICH9-M SFF ES_FCBGA569

4

CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

PCI

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03]

VCCPSUSVCCPUSB

VCCSUS3_3[04]

VCCSUS3_3[05] VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

GLAN POWER

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

VCCDMIPLL

VCC_DMI[1] VCC_DMI[2]

V_CPU_IO[1] V_CPU_IO[2]

VCC3_3[01]

VCC3_3[02]

VCC3_3[03] VCC3_3[04] VCC3_3[05]

VCC3_3[06] VCC3_3[07] VCC3_3[08]

VCCHDA

VCCSUSHDA

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

L11 L12 L13 L14 L15 M11 M15 N11 N15 P11 P15 R11 R12 R13 R14 R15

P19

T17 U17

V16 U16

V18

AE9

AA9 V14 W14

G8 H7 H8

AD7

V10

T7 H15

H16

V7

G14 G15 H14

W8

J7 J8 K7 K8 L7 L8 M7 M8 N7 N8 P7 P8

G18

H17

J14 K14

+VCCP

+1.5VS_DMIPLL

VCCSUS1_05_ICH_1 VCCSUS1_05_ICH_2

VCCSUS1_5_ICH_1

VCCSUS1_5_ICH_2

VCCCL1_05_ICH

VCCCV1_5_ICH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

2

C277

C278

0.1U_0402_16V4Z

MBK1608301YZF 0603

1

2

C284

C283

1U_0603_10V4Z

0.01U_0402_16V7K

VCC_DMI

(DMI)

+3VS

1

2

C293

+3.3/1.5VCCSUS_HDA

+3VALW

C304

0.1U_0402_16V4Z

1 2

C305 1U_0402_6.3V6KC305 1U_0402_6.3V6K

+3VS

+3.3/1.5VCC_HDA

0.1U_0402_16V4Z

T60T60 T61T61

T62T62

T63T63

0.1U_0402_16V4Z

1

2

C302

4.7U_0603_6.3V6K

3

MBK1608301YZF 0603

0.1U_0402_16V4Z

1

2

C288

1

2

C295

0.1U_0402_16V4Z

R290

1 2

R292

1 2

0.1U_0402_16V4Z

1

2

C289

R322 0_0603 _5%@ R322 0_0603_5%@

R323 0_0603 _5%R323 0_0603 _5%

R319 180_0402_1%R319 180_0402_1%

1 2

12

1 2

R324 0_0603_5%@ R324 0_0603_5%@

R320

150_0402_1%

1

2

C300

C301

0.1U_0402_16V4Z

2009/07/25 2010/07/25

+1.5VS

VCC_DMI

1U_0603_10V4Z

+VCCP

0.1U_0402_16V4Z

+3VS

1

2

C290

1 2

+3VALW

+1.5VALW

+3VALW

If it support 3.3V audio signals POP:R322/R324, Depop R319/R320/R323

If it support 1.5V audio signals POP:R319/R320/R323, Depop R322/R324

Compal Secret Data

Deciphered Date

C285

0.1U_0402_16V4Z

1

2

1

2

C286

+3VS

+1.5VS

1

2

C294

+VCCP

C287

4.7U_0603_6.3V6K

1

2

U5E

B4

VSS[001]

B7

VSS[002]

B10

VSS[003]

B13

VSS[004]

B16

VSS[005]

B19

VSS[006]

B22

VSS[007]

D2

VSS[008]

D24

VSS[009]

E5

VSS[010]

E7

VSS[011]

E9

VSS[012]

E11

VSS[013]

E13

VSS[014]

E15

VSS[015]

E17

VSS[016]

E19

VSS[017]

E21

VSS[018]

F24

VSS[019]

G2

VSS[020]

G5

VSS[021]

G10

VSS[022]

G13

VSS[023]

G16

VSS[024]

G19

VSS[025]

G21

VSS[026]

H10

VSS[027]

H12

VSS[028]

H18

VSS[029]

H23

VSS[030]

J5

VSS[031]

J9

VSS[032]

J10

VSS[033]

J11

VSS[034]

J12

VSS[035]

J13

VSS[036]

J15

VSS[037]

J21

VSS[038]

J22

VSS[039]

J25

VSS[040]

K2

VSS[041]

K9

VSS[042]

K10

VSS[043]

K11

VSS[044]

K12

VSS[045]

K13

VSS[046]

K15

VSS[047]

K17

VSS[048]

K23

VSS[049]

L5

VSS[050]

L9

VSS[051]

L10

VSS[052]

L16

VSS[053]

L17

VSS[054]

L21

VSS[055]

L22

VSS[056]

L25

VSS[057]

M9

VSS[058]

M10

VSS[059]

M12

VSS[060]

M13

VSS[061]

M14

VSS[062]

M16

VSS[063]

M17

VSS[064]

M23

VSS[065]

N2

VSS[066]

N5

VSS[067]

N9

VSS[068]

N10

VSS[069]

N12

VSS[070]

N13

VSS[071]

N14

VSS[072]

N16

VSS[073]

N17

VSS[074]

N21

VSS[075]

N22

VSS[076]

N25

VSS[077]

P9

VSS[078]

P10

VSS[079]

P12

VSS[080]

P13

VSS[081]

P14

VSS[082]

P16

VSS[083]

P17

VSS[084]

P23

VSS[085]

R5

VSS[086]

R7

VSS[087]

R8

VSS[088]

R9

VSS[089]

R10

VSS[090]

R16

VSS[091]

R17

VSS[092]

R19

VSS[093]

R21

VSS[094]

R22

VSS[095]

R25

VSS[096]

T2

VSS[097]

T8

VSS[098]

T10

VSS[099]

T11

VSS[100]

T12

VSS[101]

T13

VSS[102]

T14

VSS[103]

T15

VSS[104]

T16

VSS[105]

T23

VSS[106]

ICH9-M SFF ES_FCBGA569

2

1

U5

VSS[107]

U10

VSS[108]

W11

VSS[109]

U14

VSS[110]

W16

VSS[111]

U21

VSS[112]

U22

VSS[113]

U25

VSS[114]

V3

VSS[115]

V8

VSS[116]

V19

VSS[117]

V23

VSS[118]

W1

VSS[119]

W4

VSS[120]

W5

VSS[121]

W7

VSS[122]

W9

VSS[123]

W15

VSS[124]

W19

VSS[125]

W21

VSS[126]

W22

VSS[127]

W25

VSS[128]

Y3

VSS[129]

Y23

VSS[130]

AA1

VSS[131]

AA4

VSS[132]

AA6

VSS[133]

AA8

VSS[134]

AA11

VSS[135]

AA13

VSS[136]

AA15

VSS[137]

AA16

VSS[138]

AA17

VSS[139]

AA19

VSS[140]

AA21

VSS[141]

AA22

VSS[142]

AA25

VSS[143]

AB3

VSS[144]

AB9

VSS[145]

AB11

VSS[146]

AB13

VSS[147]

AB15

VSS[148]

AC24

VSS[149]

AC1

VSS[150]

AC4

VSS[151]

AC10

VSS[152]

AC12

VSS[153]

AC14

VSS[154]

AD2

VSS[155]

AD6

VSS[156]

AD9

VSS[157]

AD16

VSS[158]

AD19

VSS[159]

AD22

VSS[160]

AE3

VSS[161]

AE4

VSS[162]

AE11

VSS[163]

AE13

VSS[164]

AE15

VSS[165]

V17

VSS[166]

AE8

VSS[167]

V9

VSS[168]

J16

VSS[169]

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04]

A1 A25 AE1 AE25

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ICH9(4/4)_POWER&GND

LA-5811P

1

1.0

20 58Tuesday, December 29, 2009

1.0

5

PCIE_MTX_C_GRX_N[0..15]10

PCIE_MTX_C_GRX_P[0..15]10

BLM18PG181SN1D_0603

L5

1

2

22U_0805_6.3V6M

SP_PLLVDD

1

C702

C703

2

2N7002DW-T/R7_SOT363-6

PCIE_GTX_C_MRX_N[0..15]10

PCIE_GTX_C_MRX_P[0..15]10

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4 PCIE_GTX_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6

PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 P CIE_GTX_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 P CIE_GTX_MRX_P15 PCIE_GTX_C_MRX_N15

12

1

C169

2

4.7U_0603_6.3V6M

1U_0402_6.3V6K

+3VS_DELAY

2

61

Q21A

2N7002DW-T/R7_SOT363-6

D D

C C

+1.05VSDGPU

C492

BLM18PG181SN1D_0603

+1.05VSDGPU

2.2K_0402_5%

EC_SMB_CK2_PX

EC_SMB_DA2_PX

BLM18PG181SN1D_0603

L54

+3VS_DELAY

12

R385

12

4.7U_0603_6.3V6M

R386

2.2K_0402_5%

5

B B

A A

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P[0..15]

C1148 0.1U_0402_16V7KC1148 0.1U_0402_16V7 K C1149 0.1U_0402_16V7KC1149 0.1U_0402_16V7 K C1150 0.1U_0402_16V7KC1150 0.1U_0402_16V7 K C1151 0.1U_0402_16V7KC1151 0.1U_0402_16V7 K C1152 0.1U_0402_16V7KC1152 0.1U_0402_16V7 K C1153 0.1U_0402_16V7KC1153 0.1U_0402_16V7 K C1154 0.1U_0402_16V7KC1154 0.1U_0402_16V7 K C1155 0.1U_0402_16V7KC1155 0.1U_0402_16V7 K C1156 0.1U_0402_16V7KC1156 0.1U_0402_16V7 K C1157 0.1U_0402_16V7KC1157 0.1U_0402_16V7 K C1158 0.1U_0402_16V7KC1158 0.1U_0402_16V7 K C1159 0.1U_0402_16V7KC1159 0.1U_0402_16V7 K C1160 0.1U_0402_16V7KC1160 0.1U_0402_16V7 K C1161 0.1U_0402_16V7KC1161 0.1U_0402_16V7 K C1162 0.1U_0402_16V7KC1162 0.1U_0402_16V7 K C1163 0.1U_0402_16V7KC1163 0.1U_0402_16V7 K C1164 0.1U_0402_16V7KC1164 0.1U_0402_16V7 K C1165 0.1U_0402_16V7KC1165 0.1U_0402_16V7 K C1166 0.1U_0402_16V7KC1166 0.1U_0402_16V7 K C1167 0.1U_0402_16V7KC1167 0.1U_0402_16V7 K C1168 0.1U_0402_16V7KC1168 0.1U_0402_16V7 K C1169 0.1U_0402_16V7KC1169 0.1U_0402_16V7 K C1170 0.1U_0402_16V7KC1170 0.1U_0402_16V7 K C1171 0.1U_0402_16V7KC1171 0.1U_0402_16V7 K C1172 0.1U_0402_16V7KC1172 0.1U_0402_16V7 K C1173 0.1U_0402_16V7KC1173 0.1U_0402_16V7 K C1174 0.1U_0402_16V7KC1174 0.1U_0402_16V7 K C1175 0.1U_0402_16V7KC1175 0.1U_0402_16V7 K C1176 0.1U_0402_16V7KC1176 0.1U_0402_16V7 K C1177 0.1U_0402_16V7KC1177 0.1U_0402_16V7 K C1178 0.1U_0402_16V7KC1178 0.1U_0402_16V7 K C1179 0.1U_0402_16V7KC1179 0.1U_0402_16V7 K

36 mA

1

C165

C167

2

1U_0402_6.3V6K

LCD

EC_SMB_CK2 4,37

5

3

4

Q21B

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

CLK_PCIE_VGA16 CLK_PCIE_VGA#16

1

C166

2

0.1U_0402_16V4Z

I2CC_SCL28

I2CC_SDA28

CRT

EC_SMB_DA2 4,37

PEG_RST#17

GPU_PLLVDDGPU_PLLVDD

VGA_DDC_CLK30

VGA_DDC_DATA30

0_0402_5%

4

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

PCIE_GTX_MRX_P0 PCIE_GTX_MRX_N0 PCIE_GTX_MRX_P1 PCIE_GTX_MRX_N1 PCIE_GTX_MRX_P2 PCIE_GTX_MRX_N2 PCIE_GTX_MRX_P3 PCIE_GTX_MRX_N3 PCIE_GTX_MRX_P4

PCIE_GTX_MRX_P5 PCIE_GTX_MRX_N5 PCIE_GTX_MRX_P6 PCIE_GTX_MRX_N6 PCIE_GTX_MRX_P7PCIE_GTX_C_MRX_P7 PCIE_GTX_MRX_N7 PCIE_GTX_MRX_P8 PCIE_GTX_MRX_N8 PCIE_GTX_MRX_P9 PCIE_GTX_MRX_N9 PCIE_GTX_MRX_P10 PCIE_GTX_MRX_N10 PCIE_GTX_MRX_P11 PCIE_GTX_MRX_N11 PCIE_GTX_MRX_P12 PCIE_GTX_MRX_N12 PCIE_GTX_MRX_P13 PCIE_GTX_MRX_N13

PCIE_GTX_MRX_N14

PCIE_GTX_MRX_N15

CLK_PCIE_VGA CLK_PCIE_VGA# VGA_CLKREQ#_R

R114

@R114

@

12

200_0402_1%

R373 0_0402_5%R373 0_0402_5%

PEG_RST#

1 2

12

R115 2.49K_ 0402_1%R115 2.49K _0402_1%

SP_PLLVDD

XTALOUT

XTAL_OUTBUFF

XTAL_SSIN

EC_SMB_CK2_PX EC_SMB_DA2_PX

LCDI2C_CLK

R4150_0 402_5% R4150_0402_5%

1 2

LCDI2C_DAT

1 2

R416

I2CB_SCL I2CB_SDA

VGA_DDC_CLK VGA_DDC_DATA

I2CH_SCL I2CH_SDA

VGA_CLKREQ#16

4

XTALIN

U11A

AP17

PEX_RX0

AN17

PEX_RX0_N

AN19

PEX_RX1

AP19

PEX_RX1_N

AR19

PEX_RX2

AR20

PEX_RX2_N

AP20

PEX_RX3

AN20

PEX_RX3_N

AN22

PEX_RX4

AP22

PEX_RX4_N

AR22

PEX_RX5

AR23

PEX_RX5_N

AP23

PEX_RX6

AN23

PEX_RX6_N

AN25

PEX_RX7

AP25

PEX_RX7_N

AR25

PEX_RX8

AR26

PEX_RX8_N

AP26

PEX_RX9

AN26

PEX_RX9_N

AN28

PEX_RX10

AP28

PEX_RX10_N

AR28

PEX_RX11

AR29

PEX_RX11_N

AP29

PEX_RX12

AN29

PEX_RX12_N

AN31

PEX_RX13

AP31

PEX_RX13_N

AR31

PEX_RX14

AR32

PEX_RX14_N

AR34

PEX_RX15

AP34

PEX_RX15_N

AL17

PEX_TX0

AM17

PEX_TX0_N

AM18

PEX_TX1

AM19

PEX_TX1_N

AL19

PEX_TX2

AK19

PEX_TX2_N

AL20

PEX_TX3

AM20

PEX_TX3_N

AM21

PEX_TX4

AM22

PEX_TX4_N

AL22

PEX_TX5

AK22

PEX_TX5_N

AL23

PEX_TX6

AM23

PEX_TX6_N

AM24

PEX_TX7

AM25

PEX_TX7_N

AL25

PEX_TX8

AK25

PEX_TX8_N

AL26

PEX_TX9

AM26

PEX_TX9_N

AM27

PEX_TX10

AM28

PEX_TX10_N

AL28

PEX_TX11

AK28

PEX_TX11_N

AK29

PEX_TX12

AL29

PEX_TX12_N

AM29

PEX_TX13

AM30

PEX_TX13_N

AM31

PEX_TX14

AM32

PEX_TX14_N

AN32

PEX_TX15

AP32

PEX_TX15_N

AR16

PEX_REFCLK

AR17

PEX_REFCLK_N

AR13

PEX_CLKREQ_N

AJ17

PEX_TSTCLK_OUT

AJ18

PEX_TSTCLK_OUT_N

AM16

PEX_RST_N

AG21

PEX_TERMP

AE9

PLLVDD

AF9

SP_PLLVDD

AD9

VID_PLLVDD

B1

XTAL_IN

B2

XTAL_OUT

D1

XTAL_OUTBUFF

D2

XTAL_SSIN

E2

I2CS_SCL

E1

I2CS_SDA

E3

I2CC_SCL

E4

I2CC_SDA

G3

I2CB_SCL

G2

I2CB_SDA

G1

I2CA_SCL

G4

I2CA_SDA

F6

I2CH_SCL

G6

I2CH_SDA

N11P-GS1-A2_BGA969~D

+3VS_DELAY

2

G

1 3

D

2N7002_SOT23-3

2N7002_SOT23-3 Q58

Q58

3

R404

10K_0402_5%~D

Part 1 of 7

GPIO

DVO

PCI EXPRESS

PCI EXPRESSCLK

MIOB_CLKOUT_N

MIOBCAL_PD_VDDQ

MIOBCAL_PU_GND

CLK

I2C

DACs

+3VS_DELAY

12

R389

2.2K_0402_5%

S

VGA_CLKREQ#_R

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23

MIOB_D0 MIOB_D1 MIOB_D2 MIOB_D3 MIOB_D4 MIOB_D5 MIOB_D6 MIOB_D7 MIOB_D8

MIOB_D9 MIOBD_10 MIOB_D11 MIOB_D12 MIOB_D13 MIOB_D14

MIOB_HSYNC MIOB_VSYNC

MIOB_DE MIOB_CTL3 MIOB_VREF

MIOB_CLKIN

MIOB_CLKOUT

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC DACA_VSYNC

DACA_VDD DACA_VREF DACA_RSET

DACB_RED

DACB_GREEN

DACB_BLUE

DACB_HSYNC DACB_VSYNC

DACB_VDD DACB_VREF DACB_RSET

K1 K2 K3 H3

DGPU_L_BKL_EN

H2 H1 H4 H5 H6 J7 K4 K5 H7 J4 J6 L1 L2 L4 M4 L7 L5 K6 L6 M6

N1

NC

P4

NC

P1

NC

P2

NC

P3

NC

T3

NC

T2

NC

T1

NC

U4

NC

U1

NC

U2

NC

U3

NC

R6

NC

T6

NC

N6

NC

N2

NC

N3

NC

L3

NC

P5

NC

N5

NC

N4

NC

R4

NC

U5

NC

T5

NC

T4

NC

Y1 Y2 Y3 AB3 AB2 AB1 AC4 AC1 AC2 AC3 AE3 AE2 U6 W6 Y6

W1 W2

Y5 W3 AF1

AE1 V4

W4

AA7 AA6

AM15 AM14 AL14

AM13 AL13

AJ12 AK12 AK13

AK4 AL4 AJ4

AM1 AM2

AG7

10K_0402_5%

AK6 AH7

124_0402_1%

HDMI_DET 31

ENVDD

DGPU_L_BKL_EN 28

GPU_VID0 GPU_VID1

R752 10K_ 0402_5%R75 2 10K_0402_5%

1 2

THM_ALERT#

1 2

R217 10K_0402 _5%R217 10K_0402_5%

R116 10K_ 0402_5%R11 6 10K_0402_5%

1 2

DP_HPD

DP_HPD 32

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

1 2

R732 10K_0402 _5%R732 10K_0402_5%

VGA_CRT_R VGA_CRT_G VGA_CRT_B

1 2

R143124_0 402_1% R143124_0402_1%

R733

12

R734

1 2

+3VS_DELAY

3

10K_0402_5%~D

1 2

R393 10K_0402_5%~ DR393 10K_0402_5%~D

1 2

+3VS_DELAY

R117

10K_0402_5%

1 2

R410 150_0402_1 %R410 150_ 0402_1%

1 2

R411 150_0402_1 %R411 150_ 0402_1%

1 2

R412 150_0402_1 %R412 150_ 0402_1%

VGA_CRT_R 30 VGA_CRT_G 30 VGA_CRT_B 30

VGA_CRT_HSYNC 30 VGA_CRT_VSYNC 30

DACA_VDD

0.1U_0402_16V4Z

1 2

C171

0.1U_0402_16V4Z

1 2

C172

1 2

R405 2.2K_0402_5%R405 2.2K_0402_5%

1 2

R390 2.2K_0402_5%R390 2.2K_0402_5%

12

R406 10K_0402_5%@R406 10K_0402_5%@

1 2

R394 4.7K_0402_5%R394 4.7K_0402_5%

1 2

R395 4.7K_0402_5%R395 4.7K_0402_5%

12

R420 10K_0402_5%R420 10K_0402_5%

12

R421 10K_0402_5%R421 10K_0402_5%

12

R422 10K_0402_5%R422 10K_0402_5%

12

R423 10K_0402_5%R423 10K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL E LECTRONICS, INC. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERI NG DRAWING IS THE PROPR IETARY PROPERTY OF COMPAL E LECTRONICS, INC. AND CON TAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRON ICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CO NTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRON ICS, INC.

C478

I2CC_SCL

I2CC_SDA

VGA_CLKREQ#_R

VGA_DDC_CLK

VGA_DDC_DATA

I2CB_SCL

I2CB_SDA

I2CH_SCL

I2CH_SDA

1

2

12

R391 10K_0402_5%R391 10K_0402_5%

VGA_PNL_PWM 28 ENVDD 29

GPU_VID0 50 GPU_VID1 50

12

@

R730

10K_0402_5%

External Spread Spectrum

OSC_OUT

If External Spread Spectrum not stuff then stuff resistor

150 mA

1

C487

C490

2

470P_0402_50V7K

4700P_0402_25V7K

2009/07/25 2010/07/25

2

DGPU_L_BKL_EN

GPIO5GPIO6

GPU_VID1 GPU_VID0 VGA_CORE

0 0 1

0.8V

0 1

0.85V

1

0.95V

N11P-GS1

U8

1

REFOUT

2

XOUT

3

XIN/CLKIN

ASM3P2872AF-06OR_TSOT-23-6@U8ASM3P2872AF-06OR_TSOT-23-6@

1

C704

2

1U_0402_6.3V6K

VGA Thermal Sensor ADM1032ARMZ

GPU_THERMAL_D+22

GPU_THERMAL_D-22

Compal Secret Data

6

VSS

5

MODOUT

4

VDD

1

2

4.7U_0603_6.3V6M

Closed to GPU

0.1U_0402_16V4Z

C1181

1 2

2200P_0402_50V7K

1 2

R388 4.7K_0402_5%R388 4.7K_0402_5%

Deciphered Date

2

+3VS_DELAY

GPIO I/O ACTIVE USAGE

IN

OUT

IN

IN THM_ALERT #

OUT

IN

OUT

XTALIN

20P_0402_50V8

OSC_OUT XTAL_OUTBUFF

OSC_SPREAD XTAL_SSIN

L49

VGA_CRT_VSYNC30 VGA_CRT_HSYNC30

VGA_CRT_VSYNC and VGA_CRT_HSYN C pull up to HDMI & DISPLAY PORT AUDIO funciton

U12

1

VDD

SCLK

2

D+

SDATA

3

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

Title

Size Document Number Rev

Date: Sheet of

OSC_SPREAD

+3VS_DELAY

1

@

C164

0.1U_0402_16V4Z

2

C1180

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

GPIO14

BLM18PG181SN1D_0603

+3VS_DELAY

2

1

1 2

1

H

N/A

L

N/A

HDMI Hot-plug

VGA_PNL_PWM

ENVDD

VGA_BKL_EN

NVVDD VID0

NVVDD VID1

N/A

L

N/A

DP Hot-plugIN HGPIO15

XTALOUT

Y3

3

1

C162

2

R59 22 _0402_5%@R59 22_040 2_5%@

R112 22_0402_5%@R112 22_0402_5%@

+3VS_DELAY

8

7

6

5

N11P-GS1(1/5)PCIE/STRAPS/THERM

LA-5811P

2

27MHZ_16PF_X7T027000BG1H-V

1 2

R380 10K_0402_5%@ R380 10K_0402_5%@ R381 10K_0402_5%@ R381 10K_0402_5%@

EC_SMB_CK2_PX

EC_SMB_DA2_PX

THM_ALERT#

1 2

R387 4.7K_0402_5%R387 4.7K_0402_5%

Compal Electronics, Inc.

4

OUT

GND

1

GND

IN

12

R63

R63 10K_0402_5%

10K_0402_5%

12

R113

R113 10K_0402_5%

10K_0402_5%

12 12

+3VS_DELAY

1

+3VS_DELAY

21 58Tuesday, December 29, 2009

C163

1

2

20P_0402_50V8

1.0

5

D D

+3VS_DELAY

1 2

R397 4.7K_0402_5%R397 4.7K_0402_5%

1 2

R399 4.7K_0402_5%R399 4.7K_0402_5%

HDMI_SCL

HDMI_SDA

LVDS

HDMI

C C

DP

HDMI

B B

A A

VGA_DVI_SCLK31

VGA_DVI_SDATA31

DP

4

U11D

STRAP0 STRAP1 STRAP2

AM11

IFPA_TXC

AM12

IFPA_TXC_N

AM8

IFPA_TXD0

AL8

IFPA_TXD0_N

AM10

IFPA_TXD1

AM9

IFPA_TXD1_N

AK10

IFPA_TXD2

AL10

IFPA_TXD2_N

AK11

IFPA_TXD3

AL11

IFPA_TXD3_N

AP13

IFPB_TXC

AN13

IFPB_TXC_N

AN8

IFPB_TXD4

AP8

IFPB_TXD4_N

AP10

IFPB_TXD5

AN10

IFPB_TXD5_N

AR11

IFPB_TXD6

AR10

IFPB_TXD6_N

AN11

IFPB_TXD7

AP11

IFPB_TXD7_N

AM7

IFPC_L0

AM6

IFPC_L0_N

AL5

IFPC_L1

AM5

IFPC_L1_N

AM3

IFPC_L2

AM4

IFPC_L2_N

AP1

IFPC_L3

AR2

IFPC_L3_N

AR8

IFPD_L0

AR7

IFPD_L0_N

AP7

IFPD_L1

AN7

IFPD_L1_N

AN5

IFPD_L2

AP5

IFPD_L2_N

AR5

IFPD_L3

AR4

IFPD_L3_N

AH6

IFPE_L0

AH5

IFPE_L0_N

AH4

IFPE_L1

AG4

IFPE_L1_N

AF4

IFPE_L2

AF5

IFPE_L2_N

AE6

IFPE_L3

AE5

IFPE_L3_N

AL2

NC

AL3

NC

AJ3

NC

AJ2

NC

AJ1

NC

AH1

NC

AH2

NC

AH3

NC

AP2

IFPC_AUX_I2CW_SCL

AN3

IFPC_AUX_I2CW_SDA_N

AP4

IFPD_AUX_I2CX_SCL

AN4

IFPD_AUX_I2CX_SDA_N

AE4

IFPE_AUX_I2CY_SCL

AD4

IFPE_AUX_I2CY_SDA_N

AF3

NC

AF2

NC

A7

DBG_DATA0

B7

DBG_DATA1

C7

DBG_DATA2

D6

DBG_DATA3

D7

DBG_DATA4

A4

BUFRST_N

AB5

NC

W5

STRAP0

W7

STRAP1

V7

STRAP2

N11P-GS1-A2_BGA969~D

VGA_TXCLK+28

VGA_TXCLK-28

VGA_TXOUT0+28

VGA_TXOUT0-28

VGA_TXOUT1+28

VGA_TXOUT1-28

VGA_TXOUT2+28

VGA_TXOUT2-28

VGA_DVI_TXD2+31

VGA_DVI_TXD2-31

VGA_DVI_TXD1+31

VGA_DVI_TXD1-31

VGA_DVI_TXD0+31

VGA_DVI_TXD0-31

VGA_DVI_TXC+31 VGA_DVI_TXC-31

DISP_A0P_VGA32 DISP_A0N_VGA32 DISP_A1P_VGA32 DISP_A1N_VGA32 DISP_A2P_VGA32 DISP_A2N_VGA32 DISP_A3P_VGA32 DISP_A3N_VGA32

HDMI_SCL

R4310_0402_5% R4310_0402_5%

12

HDMI_SDA

R4320_0402_5% R4320_0402_5%

12

DP_DDC_CLK32

DP_DDC_DATA3 2

DP_DDC_CLK DP_DDC_DATA

Part 4 of 7

LVDS/TMDS

DBG

GENERAL

MULTI_STRAP_REF0_GND

MULTI_STRAP_REF1_GND

3

NC

VDD_SENSE_0 VDD_SENSE_1 VDD_SENSE_2

GND_SENSE_0 GND_SENSE_1 GND_SENSE_2

TEST

TESTMODE

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

THERMDP

THERMDN

A2

NC

C5

NC

D5

NC

E5

NC

E7

NC

F4

NC

G5

NC

G11

NC

G12

NC

G14

NC

G15

NC

G27

NC

G28

NC

G24

NC

G25

NC

H32

NC

J18

NC

J19

NC

J25

NC

J26

NC

L29

NC

M7

NC

M29

NC

P6

NC

P29

NC

R29

NC

U7

NC

V6

NC

Y4

NC

AA4

NC

AB4

NC

AB7

NC

AC5

NC

AD6

NC

AD29

NC

AE29

NC

AF6

NC

AG6

NC

AG20

NC

AG29

NC

AH29

NC

AJ5

NC

AK15

NC

AL7

NC

R735 0_0402 _5%R735 0_0402 _5%

D35

R144 0_0402 _5%R144 0_0402 _5%

P7

R736 0_0402 _5%R736 0_0402 _5%

AD20

AD19 E35 R7

AP35 AP14 AN14 AN16 AR14 AP16

ROM_CS#

C3

ROM_SI

D3

ROM_SO

C4

ROM_SCLK

D4

A5

NC

N9

40.2K_0402_1%

M9

40.2K_0402_1%

B5 B4

1 2 1 2 1 2

R190 0_0402 _5%R190 0_0402 _5%

1 2

R737 0_0402 _5%R737 0_0402 _5%

1 2

R152 0_0402 _5%R152 0_0402 _5%

1 2

R739

1 2

10K_0402_5%

10K_0402_5% @

R199

R200

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST

R740

1 2

12

GPU_THERMAL_D+ 21

GPU_THERMAL_D- 21

+NVVDD_SENSE 50

PAD

PAD PAD

PAD

R738

12

10K_0402_5%

+3VS_DELAY

2

Straps

64MX16 Samsung

64MX16 Hynix

STRAP0 STRAP1 STRAP2 ROM_SI ROM_SO ROM_SCLK

@

1 2

R742 5.1K_0402_5%

@

1 2

R743 10K_0402_1%

@

1 2

R745 10K_0402_1%

R207 15K_0402_5%R207 15K_0402_5%

1 2

R208 10K_0402_1%R208 10K_0402_1%

R204 15K_0402_5%R204 15K_0402_5%

strap0

strap1 strap2 ROM_SI ROM_SO ROM_SCLK

H

45K

H 45K

H

35K

30K

H

35K

30K

SSI --> Hynix

PT --> Hynix

ST --> Hynix(main),Samsung(second)

Hynix:SA0000032400

Samsung:SA0000035700

@

T55

@

T41

@

T40

@

T49

@

T45

MULTI LEVEL STRAPS

1 2

R741 45.3K_0402_1%R741 45.3K_0402_1%

1 2

R744 35.7K_0402_1%R744 35.7K_0402_1%

1 2

R746 45.3K_0402_1%R746 45.3K_0402_1%

@

1 2

R202 5.1K_0402_5%

@

1 2

R203 5.1K_0402_5%

@

R205 15K_0402_5%

L

20K

10K

L

15K

10K

1

+3VS_DELAY

strap0

strap1

strap2

ROM_SI

ROM_SO

ROM_SCLK

L 15K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N11P-GS1(2/5) IO

LA-5811P

1

1.0

22 58Tuesday, December 29, 2009

1.0

5

+1.5VSDGPU

1

C199

C203

2

4.7U_0603_6.3V6M

1

2

0.1U_0402_16V4Z

BLM18PG181SN1D_0603

L51

12

1

2

4.7U_0603_6.3V6M

C203

C189

12

150mA

C208

220mA

2

4.7U_0603_6.3V6M

D D

+1.05VSDGPU

C C

+1.8VSDGPU

L7

BLM18PG181SN1D_0603

1

2

0.1U_0402_16V4Z

1

2

0.01U_0402_16V7K

1

2

0.01U_0402_16V7K

C201

C202

2

0.01U_0402_16V7K

1

C188

C192

2

0.047U_0402_16V7K

1

C195

C193

2

0.1U_0402_16V4Z

0.047U_0402_16V7K

follow the DS04644

1

C446

2

4.7U_0603_6.3V6M

1

C444

2

1U_0402_6.3V6K

1

C177

2

1U_0402_6.3V6K

FBVDDQ

1

C200

2

FBVDDQ

1

C191

2

FBVDDQ

1

C197

2

IFPAB_PLLVDD

1

C445

@

2

0.1U_0402_16V4Z

IFPA_IOVDD

IFPB_IOVDD

2

C206

1

0.1U_0402_16V4Z

150mA

1

C184

2

0.1U_0402_16V4Z

2

C209

1

470P_0402_50V7K

follow the DS04644

+3VS_DELAY

B B

+1.05VSDGPU

A A

1

C491

2

1U_0402_6.3V6K

1

C178

2

1U_0402_6.3V6K

BLM18PG181SN1D_0603

12

L4

BLM18PG181SN1D_0603

12

L50

4.7U_0603_6.3V6M

1 2

+5VS

DGPU_PWR_EN#40

440 mA

1

C185

2

0.1U_0402_16V4Z

4.7U_0603_6.3V6M

C205

C186

2

0.1U_0402_16V4Z

1

C187

2

0.1U_0402_16V4Z

570 mA

1

C486

2

R118

R118 68K_0402_1%

68K_0402_1%

DGPU_PWR_EN#

1

C488

C483

2

0.1U_0402_16V4Z

+1.8V to +1.8VSDGPU Transfer

+1.8V

D

1 3

2

G

Q34

2N7002_SOT23

5

C484

2

0.1U_0402_16V4Z

Q35

Q35 AO3414_SOT23-3

AO3414_SOT23-3

S

G

2

13

D

S

1

C496

2

0.1U_0402_16V4Z

300mA

1

C168

0.22U_0603_10V7K

2

1

2

0.1U_0402_16V4Z

C194

C497

0.1U_0402_16V4Z

+1.8VSDGPU

DGPU_PWR_EN19,40,47,50

1

C204

2

0.1U_0402_16V4Z

1

C498

2

0.1U_0402_16V4Z

220 mA

1K_0402_1%

220 mA

285 mA

220 mA

285 mA

1

C312

2

0.1U_0402_16V4Z

C499

R211 1K_0402_5%R211 1K_0402_5%

0.1U_0402_16V4Z~D

4

R748

@R748

@

12

R750 1K_0402_1%R750 1K_0402_1%

IFPC_PLLVDD

IFPC_IOVDD

+3VS

R213

100K_0402_5%

1 2

C207

4

FBVDDQ

IFPAB_PLLVDD

IFPAB_RSET

12

IFPA_IOVDD IFPB_IOVDD

IFPC_PLLVDD IFPC_RSET

IFPC_IOVDD

IFPC_PLLVDD

IFPD_RSET

R7491K_0402_1% @ R7491K_0402_1% @

12

IFPC_IOVDD

IFPC_PLLVDD

IFPE_RSET

R2161K_0402_1% R2161K_0402_1%

12

IFPC_IOVDD

1 2 3 5

1 2

3VS_Dgate

1

2

U11E

J23

FBVDDQ_0

J24

FBVDDQ_1

J29

FBVDDQ_2

AA27

FBVDDQ_3

AA29

FBVDDQ_4

AA31

FBVDDQ_5

AB27

FBVDDQ_6

AB29

FBVDDQ_7

AC27

FBVDDQ_8

AD27

FBVDDQ_9

AE27

FBVDDQ_10

AJ28

FBVDDQ_11

B18

FBVDDQ_12

E21

FBVDDQ_13

G17

FBVDDQ_14

G18

FBVDDQ_15

G22

FBVDDQ_16

G8

FBVDDQ_17

G9

FBVDDQ_18

H29

FBVDDQ_19

J14

FBVDDQ_20

J15

FBVDDQ_21

J16

FBVDDQ_22

J17

FBVDDQ_23

J20

FBVDDQ_24

J21

FBVDDQ_25

J22

FBVDDQ_26

N27

FBVDDQ_27

P27

FBVDDQ_28

R27

FBVDDQ_29

T27

FBVDDQ_30

U27

FBVDDQ_31

U29

FBVDDQ_32

V27

FBVDDQ_33

V29

FBVDDQ_34

V34

FBVDDQ_35

W27

FBVDDQ_36

Y27

FBVDDQ_37

AK9

IFPAB_PLLVDD

AJ11

IFPAB_RSET

AG9

IFPA_IOVDD

AG10

IFPB_IOVDD

AJ9

IFPC_PLLVDD

AK7

IFPC_RSET

AJ8

IFPC_IOVDD

AC6

IFPD_PLLVDD

AB6

IFPD_RSET

AK8

IFPD_IOVDD

AJ6

IFPEF_PLLVDD

AL1

IFPEF_RSET

AE7

IFPE_IOVDD

AD7

NC

N11P-GS1-A2_BGA969~D

+3VS_DELAY

Q11

Q11 SI7121DN-T1-GE3_POWERPAK8-5

SI7121DN-T1-GE3_POWERPAK8-5

4

13

D

Q10

SSM3K7002FU_SC70-3

S

SSM3K7002FU_SC70-3

G

Part 5 of 7

1380mA

POWER

470_0603_5%

Q12

PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14 PEX_IOVDDQ_15 PEX_IOVDDQ_16 PEX_IOVDDQ_17 PEX_IOVDDQ_18 PEX_IOVDDQ_19 PEX_IOVDDQ_20 PEX_IOVDDQ_21 PEX_IOVDDQ_22 PEX_IOVDDQ_23 PEX_IOVDDQ_24

PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4

PEX_PLLVDD

PEX_SVDD_3V3_0 PEX_SVDD_3V3_1

VDD33_0 VDD33_1 VDD33_2 VDD33_3 VDD33_4

MIOB_VDDQ_0 MIOB_VDDQ_1 MIOB_VDDQ_2 MIOB_VDDQ_3

+3VS_DELAY

R210

13

D

1 2

G

S

NC NC NC NC

2

AG11 AG12 AG13 AG15 AG16 AG17 AG18 AG22 AG23 AG24 AG25 AG26 AJ14 AJ15 AJ19 AJ21 AJ22 AJ24 AJ25 AJ27 AK18 AK20 AK23 AK26 AL16

AK16 AK17 AK21 AK24 AK27

AG14

AG19 F7

J10 J11 J12 J13 J9

P9 R9 T9 U9

AA9 AB9 W9 Y9

3VS_Dgate

3

PEX_IOVDDQ

PEX_IOVDD

PEX_PLLDVDD

PEX_SVDD_3V3

+3VS_DELAY

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PEX_IOVDDQ

1U_0402_6.3V6K

PEX_IOVDD

PEX_PLLDVDD

PEX_SVDD_3V3

+3VS_DELAY

+VGA_CORE

1

C232

2

0.01U_0402_25V7K

1

C241

2

0.01U_0402_25V7K

1

C261

2

0.047U_0402_16V7K

1

C179

2

22U_0805_6.3V6M

2009/07/25 2010/07/25

1

2

C215

C237

C262

C182

C249

4.7U_0603_6.3V6M

1

C251

2

0.1U_0402_16V4Z

1

C485

2

4.7U_0603_6.3V6M

0.1U_0402_16V4Z

1

2

0.01U_0402_25V7K

1

2

0.01U_0402_25V7K

1

2

0.047U_0402_16V7K

1

2

4.7U_0805_10V4Z

1

C459

2

0.1U_0402_16V4Z

1U_0402_6.3V6K

1

C243

2

C210

C211

C263

C181

Compal Secret Data

1

2

10U_0805_6.3V6M

1

C254

2

1

C489

2

1

C314

2

0.1U_0402_16V4Z

1

C268

2

0.1U_0402_16V4Z

1

2

0.01U_0402_25V7K

1

2

0.01U_0402_25V7K

1

2

0.047U_0402_16V7K

1

2

1U_0603_10V4Z

Deciphered Date

2

1

C244

2

0.1U_0402_16V4Z

1

C493

2

1U_0402_6.3V6K

12

L52

L52 LLQ1608-FR10G_0603

LLQ1608-FR10G_0603

1

C315

2

0.1U_0402_16V4Z

1

C173

2

0.1U_0402_16V4Z

1

C230

2

1

C240

2

1

C264

2

1

C180

2

C272

1U_0402_6.3V6K

4700P_0402_25V7K

0.022U_0402_16V7K

0.22U_0402_10V4Z

0.022U_0402_16V7K

1

2

0.1U_0402_16V4Z

C495

R214

R214 0_0603_5%

0_0603_5%

1

C176

2

C242

C239

C267

C183

1

+1.05VSDGPU

1

C248

2

0.1U_0402_16V4Z

1

C255

2

4.7U_0603_6.3V6M

22U_0805_6.3V6M

1

C245

2

10U_0805_6.3V6M

+1.05VSDGPU

1

1.920 Amps

C250

2

1U_0402_6.3V6K

1

C253

C252

2

22U_0805_6.3V6M

600 mA

+1.05VSDGPU

120mA

12

+3VS_DELAY

1

C174

C494

2

1U_0603_10V4Z

1

2

4700P_0402_25V7K

1

2

0.022U_0402_16V7K

1

2

0.22U_0402_10V4Z

1

2

0.022U_0402_16V7K

2

4.7U_0603_6.3V6M

U11G

AB11

VDD_0

Part 7 of 7

AB13 AB15 AB17 AB19 AB21 AB23 AB25 AC11 AC12 AC13 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC22 AC23 AC24 AC25 AD12 AD14 AD16 AD18 AD22 AD24

L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23 L24

L25 M12 M14 M16 M18 M20 M22 M24 P11 P13 P15 P17 P19

Part 7 of 7

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55

N11P-GS1-A2_BGA969~D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

N11P-GS1(3/5) POWER

LA-5811P

POWER

VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63 VDD_64 VDD_65 VDD_66 VDD_67 VDD_68 VDD_69 VDD_70 VDD_71 VDD_72 VDD_73 VDD_74 VDD_75 VDD_76 VDD_77 VDD_78 VDD_79 VDD_80 VDD_81 VDD_82 VDD_83 VDD_84 VDD_85 VDD_86 VDD_87 VDD_88 VDD_89 VDD_90 VDD_91 VDD_92 VDD_93 VDD_94 VDD_95 VDD_96 VDD_97 VDD_98

VDD_99 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110

1

+VGA_CORE

P21 P23 P25 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 T12 T14 T16 T18 T20 T22 T24 V11 V13 V15 V17 V19 V21 V23 V25 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23 W24 W25 Y12 Y14 Y16 Y18 Y20 Y22 Y24

1.0

23 58Wednesday, December 30, 2009

1.0

5

D D

C C

B B

A A

4

U11F

B3

GND_0

B6

GND_1

B9

GND_2

B12

GND_3

B15

GND_4

B21

GND_5

B24

GND_6

B27

GND_7

B30

GND_8

B33

GND_9

C2

GND_10

C34

GND_11

E6

GND_12

E9

GND_13

E12

GND_14

E15

GND_15

E18

GND_16

E24

GND_17

E27

GND_18

E30

GND_19

F2

GND_20

F31

GND_21

F34

GND_22

F5

GND_23

J2

GND_24

J5

GND_25

J31

GND_26

J34

GND_27

K9

GND_28

L9

GND_29

M2

GND_30

M5

GND_31

M11

GND_32

M13

GND_33

M15

GND_34

M17

GND_35

M19

GND_36

M21

GND_37

M23

GND_38

M25

GND_39

M31

GND_40

M34

GND_41

N11

GND_42

N12

GND_43

N13

GND_44

N14

GND_45

N15

GND_46

N16

GND_47

N17

GND_48

N18

GND_49

N19

GND_50

N20

GND_51

N21

GND_52

N22

GND_53

N23

GND_54

N24

GND_55

N25

GND_56

P12

GND_57

P14

GND_58

P16

GND_59

P18

GND_60

P20

GND_61

P22

GND_62

P24

GND_63

R2

GND_64

R5

GND_65

R31

GND_66

R34

GND_67

T11

GND_68

T13

GND_69

T15

GND_70

T17

GND_71

T19

GND_72

T21

GND_73

T23

GND_74

T25

GND_75

U11

GND_76

U12

GND_77

U13

GND_78

U14

GND_79

U15

GND_80

U16

GND_81

U17

GND_82

U18

GND_83

U19

GND_84

U20

GND_85

U21

GND_86

U22

GND_87

U23

GND_88

U24

GND_89

U25

GND_90

V2

GND_91

V5

GND_92

V9

GND_93

V12

GND_94

V14

GND_95

V16

GND_96

N11P-GS1-A2_BGA969~D

Part 6 of 7

3

GND

GND_97 GND_98

GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192

V18 V20 V22 V24 V31 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 AA2 AA5 AA11 AA12 AA13 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AA24 AA25 AA34 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AC9 AD2 AD5 AD11 AD13 AD15 AD17 AD21 AD23 AD25 AD31 AD34 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AG2 AG5 AG31 AG34 AK2 AK5 AK14 AK31 AK34 AL6 AL9 AL12 AL15 AL18 AL21 AL24 AL27 AL30 AN2 AN34 AP3 AP6 AP9 AP12 AP15 AP18 AP21 AP24 AP27 AP30 AP33

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N11P-GS1(4/5) GND

LA-5811P

1

1.0

24 58Tuesday, December 29, 2009

1.0

5

U11B

M32

M30

AG30 AG32 AH31 AF31 AF30 AE30 AC32 AD30 AN33

AL31

AM33

AL33 AK30 AK32

AJ30 AH30 AH33 AH35 AH34 AH32

AJ33

AL35

AM34 AM35

AF33 AE32 AF34 AE35 AE34 AE33 AB32 AC35

AG27 AF27

12

1

@

2

0.1U_0402_16V4Z

U11B

L32

FBA_D0

N33

FBA_D1

L33

FBA_D2

N34

FBA_D3

N35

FBA_D4

P35

FBA_D5

P33

FBA_D6

P34

FBA_D7

K35

FBA_D8

K33

FBA_D9

K34

FBA_D10

H33

FBA_D11

G34

FBA_D12

G33

FBA_D13

E34

FBA_D14

E33

FBA_D15

G31

FBA_D16

F30

FBA_D17

G30

FBA_D18

G32

FBA_D19

K30

FBA_D20

K32

FBA_D21

H30

FBA_D22

K31

FBA_D23

L31

FBA_D24

L30

FBA_D25 FBA_D26

N30

FBA_D27 FBA_D28

P31

FBA_D29

R32

FBA_D30

R30

FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FB_DLLAVDD FB_PLLAVDD

J27

FB_VREF

T30

FBA_DEBUG

N11P-GS1-A2_BGA969~D

1

C257

C260

2

1U_0402_6.3V6K

Part 2 of 7

MEMORY INTERFACE

A

MEMORY INTERFACE

A

1

C258

C259

@

2

4.7U_0603_6.3V6M

0.01U_0402_25V7K

MDA[0..63]26

D D

C C

B B

A A

MDA[0..63]

+1.5VSDGPU

FB_PLLAVDD

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

FB_PLLAVDD

FB_VREF

R226 10K_0402_5%@R22610 K_0402_5%@

4

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

12

L8

BLM18PG181SN1D_0603

V32 W31 U31 Y32 AB35 AB34 W35 W33 W30 T34 T35 AB31 Y30 Y34 W32 AA30 AA32 Y33 U32 Y31 U34 Y35 W34 V30 U35 U30 U33 AB30 AB33 T33 W29

P32 H34 J30 P30 AF32 AL32 AL34 AF35

L35 G35 H31 N32 AD32 AJ31 AJ35 AC34

L34 H35 J32 N31 AE31 AJ32 AJ34 AC33

T32 T31

AC31 AC30

+1.05VSDGPU

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MAA14 MAA15 MAA16 MAA17 MAA18 MAA19 MAA20 MAA21 MAA22 MAA23 MAA24 MAA25 MAA26 MAA27 MAA28 MAA29 MAA30

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

CLKA0 CLKA0#

CLKA1 CLKA1#

R229

1K_0402_1%

R228

1K_0402_1%

+1.5VSDGPU

12

@R 229

@

12

@R 228

@

MAA[0..30]

DQMA#[0..7]

QSA#[0..7]

QSA[0..7]

CLKA0 26 CLKA0# 26

CLKA1 26 CLKA1# 26

Rt

Rb

FB_VREF

1

2

0.1U_0402_16V4Z

3

MAA[0..30] 26

DQMA#[0..7] 26

QSA#[0..7] 26

QSA[0..7] 26

MDB[0..63]27

+1.5VSDGPU

Place Components Close to BGA

Memory/PKG

C256

@

DDR3 (11P)

+1.5VS

Must be used 1% resister for driver calibration

U11C

MDB[0..63]

R249 40.2_0402_1%R249 40.2_0402_1%

R242 40.2_0402_1%R242 40.2_0402_1%

R255 40.2_0402_1%R255 40.2_0402_1%

@

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

12

R758

60.4_0402_1%

U11C

B13

NC

D13

NC

A13

NC

A14

NC

C16

NC

B16

NC

A17

NC

D16

NC

C13

NC

B11

NC

C11

NC

A11

NC

C10

NC

C8

NC

B8

NC

A8

NC

E8

NC

F8

NC

F10

NC

F9

NC

F12

NC

D8

NC

D11

NC

E11

NC

D12

NC

E13

NC

F13

NC

F14

NC

F15

NC

E16

NC

F16

NC

F17

NC

D29

NC

F27

NC

F28

NC

E28

NC

D26

NC

F25

NC

D24

NC

E25

NC

E32

NC

F32

NC

D33

NC

E31

NC

C33

NC

F29

NC

D30

NC

E29

NC

B29

NC

C31

NC

C29

NC

B31

NC

C32

NC

B32

NC

B35

NC

B34

NC

A29

NC

B28

NC

A28

NC

C28

NC

C26

NC

D25

NC

B25

NC

A25

NC

K27

FBCAL_PD_VDDQ

L27

FBCAL_PU_GND

M27

FBCAL_TERM_GND

N11P-GS1-A2_BGA969~D

FBCAL_PU_GND FBCAL_PD_VDDQ

40.2 ohm

2

Part 3 of 7

FBCAL_TERM_GNDFBVDDQ

1

12

MAB[0..30]

DQMB#[0..7]

QSB#[0..7]

QSB[0..7]

CLKB0 27 CLKB0# 27

CLKB1 27 CLKB1# 27

+1.5VSDGPU

NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

NC NC NC NC NC NC NC NC

MEMORY INTERFACE C

NC NC NC NC NC NC NC NC

NC NC

NC

MAB1

B19

MAB2

D18

MAB3

F21

MAB4

A23

MAB5

D21

MAB6

B23

MAB7

E20

MAB8

G21

MAB9

F20

MAB10

F19

MAB11

F23

MAB12

A22

MAB13

C22

MAB14

B17

MAB15

F24

MAB16

C25

MAB17

E22

MAB18

C20

MAB19

B22

MAB20

A19

MAB21

D22

MAB22

D20

MAB23

E19

MAB24

D19

MAB25

F18

MAB26

C19

MAB27

F22

MAB28

C23

MAB29

B20

MAB30

A20

DQMB#0

A16

DQMB#1

D10

DQMB#2

F11

DQMB#3

D15

DQMB#4

D27

DQMB#5

D34

DQMB#6

A34

DQMB#7

D28

QSB#0

B14

QSB#1

B10

QSB#2

D9

QSB#3

E14

QSB#4

F26

QSB#5

D31

QSB#6

A31

QSB#7

A26

QSB0

C14

QSB1

A10

QSB2

E10

QSB3

D14

QSB4

E26

QSB5

D32

QSB6

A32

QSB7

B26

E17 D17

D23 E23

G19

CLKB0 CLKB0#

CLKB1 CLKB1#

R240 10K_0402_5%R240 10K_0402_5%

MAB0

C17

MAB[0..30] 27

DQMB#[0..7] 27

QSB#[0..7] 27

QSB[0..7] 27

40.2 ohm40.2 ohm

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N11P-GS1(5/5) MEMORY

LA-5811P

1

1.0

25 58Tuesday, December 29, 2009

1.0

5

MEM_VREF0

MAA19 MAA25 MAA22 MAA24 MAA0 MAA2 MAA21 MAA16 MAA23 MAA20

12

MAA17 MAA9 MAA14 MAA26

MAA12 MAA3 MAA27

CLKA0 CLKA0# MAA18

MAA30 MAA29 MAA1 MAA10 MAA11

QSA3 QSA1

DQMA#3 DQMA#1

QSA#3 QSA#1

MAA15

D D

MDA[63..0]25

MAA[30..0]25

QSA[7..0]25

QSA#[7..0]25

DQMA#[7..0]25

C C

B B

CLKA025

CLKA0#25

CLKA125

A A

CLKA1#25

MDA[63..0]

MAA[30..0]

QSA[7..0]

QSA#[7..0]

DQMA[7..0]

MAA7

R19 10K_0402_5%R19 10K_0402_5%

MAA18

R106 10K_ 0402_5%R106 10K_ 0402_5%

MAA28

R25 10K_0402_5%R25 10K_0402_5%

MAA30

R20 10K_0402_5%R20 10K_0402_5%

MAA15

R21 10K_0402_5%R21 10K_0402_5%

12

R403

R403 243_0402_1%

243_0402_1%

12

R407

R407 243_0402_1%

243_0402_1%

5

R761

R761 243_0402_1%~OK

243_0402_1%~OK

1 2 1 2 1 2 1 2 1 2

CLKA0

CLKA0#

CLKA1

CLKA1#

U54

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

+1.5VSDGPU

C770

1U_0402_6.3V6K~D

C770

1U_0402_6.3V6K~D

1

2

+1.5VSDGPU

C802

10U_0603_6.3V6M~D

C802

10U_0603_6.3V6M~D

1

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

C771

1U_0402_6.3V6K~D

C771

1U_0402_6.3V6K~D

1

2

C804

10U_0603_6.3V6M~D

C804

10U_0603_6.3V6M~D

C803

1

2

4

MDA24

E3

MDA27

F7

MDA25

F2

MDA29

F8

MDA26

H3

MDA31

H8

MDA28

G2 H7

MDA8

D7

MDA9

C3

MDA10

C8

MDA11

C2

MDA14

A7

MDA13

A2

MDA15

B8

MDA12

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU

12

R401

1K_0402_1%

12

R398

C407

1K_0402_1%

1U_0402_6.3V6K~D

1

2

1

2

C407

C773

1U_0402_6.3V6K~D

C773

1U_0402_6.3V6K~D

C772

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1

2

C806

10U_0603_6.3V6M~D

C806

10U_0603_6.3V6M~D

C805

1

2

4

MEM_VREF1

MAA19 MAA25 MAA22 MAA24 MAA0 MAA2 MAA21 MAA16 MAA23 MAA20 MAA17 MAA9 MAA14 MAA26

MAA12 MAA3 MAA27

CLKA0 CLKA0# MAA18

MAA30 MAA29 MAA1 MAA10 MAA11

QSA0 QSA2

DQMA#0 DQMA#2

QSA#0 QSA#2

MAA15

ZQ1

12

R756

R756 243_0402_1%~OK

243_0402_1%~OK

MEM_VREF0 MEM_VREF1 MEM_VREF3MEM_VREF2

0.1U_0402_10V6K~D

1

2

C774

C776

1U_0402_6.3V6K~D

C776

1U_0402_6.3V6K~D

C775

1U_0402_6.3V6K~D

C775

1U_0402_6.3V6K~D

1

2

U36

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

R17

1K_0402_1%

R11

1K_0402_1%

+1.5VSDGPU

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VRAM P/N : Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P) Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )

12

1

12

C158

2

C778

1U_0402_6.3V6K~D

C778

1U_0402_6.3V6K~D

1

2

3

MDA4

E3

MDA1

F7

MDA5

F2

MDA0

F8

MDA7

H3

MDA3

H8

MDA6

G2

MDA2

H7

MDA20

D7

MDA22

C3

MDA23

C8

MDA21

C2

MDA17

A7

MDA19

A2

MDA18

B8

MDA16

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

0.1U_0402_10V6K~D

C780

1U_0402_6.3V6K~D

C780

1U_0402_6.3V6K~D

C779

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

Issued Date

C781

1U_0402_6.3V6K~D

C781

1U_0402_6.3V6K~D

1

2

3

MEM_VREF2

R572

R572 243_0402_1%~OK

243_0402_1%~OK

1U_0402_6.3V6K~D

C782

1U_0402_6.3V6K~D

C782

1U_0402_6.3V6K~D

1

2

MAA19 MAA25 MAA4 MAA6 MAA5 MAA13 MAA21 MAA16 MAA23 MAA20 MAA17 MAA9 MAA14 MAA26

MAA12 MAA3 MAA27

CLKA1 CLKA1# MAA7

MAA28 MAA8 MAA1 MAA10 MAA11

QSA7 QSA4

DQMA#7 DQMA#4

QSA#7 QSA#4

MAA15

ZQ2 ZQ3ZQ0

12

C783

1

2

2009/07/25 2010/07/25

M8

H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2

J3 K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1 L1

J9 L9

+1.5VSDGPU

C784

1U_0402_6.3V6K~D

C784

1U_0402_6.3V6K~D

+1.5VSDGPU

1

2

U52

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4W1G1646E-HC12_FBGA96

C807

10U_0603_6.3V6M~D

C807

10U_0603_6.3V6M~D

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

C787

1U_0402_6.3V6K~D

C787

1U_0402_6.3V6K~D

C786

1U_0402_6.3V6K~D

C786

1U_0402_6.3V6K~D

1

2

C808

10U_0603_6.3V6M~D

C808

10U_0603_6.3V6M~D

C809

10U_0603_6.3V6M~D

C809

10U_0603_6.3V6M~D

1

2

Compal Secret Data

Deciphered Date

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

1K_0402_1%

C788

1U_0402_6.3V6K~D

C788

1U_0402_6.3V6K~D

1

2

C810

10U_0603_6.3V6M~D

C810

10U_0603_6.3V6M~D

1

2

MDA57 MDA63 MDA61 MDA58 MDA56 MDA60 MDA62 MDA59MDA30

MDA35 MDA39 MDA32 MDA36 MDA33 MDA38 MDA34 MDA37

+1.5VSDGPU

R18

R12

C789

1U_0402_6.3V6K~D

C789

1U_0402_6.3V6K~D

1

2

C811

10U_0603_6.3V6M~D

C811

10U_0603_6.3V6M~D

1

2

R616

R616 243_0402_1%~OK

243_0402_1%~OK

12

C159

C790

1U_0402_6.3V6K~D

C790

1U_0402_6.3V6K~D

1

2

0.1U_0402_10V6K~D

1

2

1U_0402_6.3V6K~D

1

2

MEM_VREF3

12

C791

MAA19 MAA25 MAA4 MAA6 MAA5 MAA13 MAA21 MAA16 MAA23 MAA20 MAA17 MAA9 MAA14 MAA26

MAA12 MAA3 MAA27

CLKA1 CLKA1# MAA7

MAA28 MAA8 MAA1 MAA10 MAA11

QSA5 QSA6

DQMA#5 DQMA#6

QSA#5 QSA#6

MAA15

1U_0402_6.3V6K~D

1

2

C792

U53

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

R402

1K_0402_1%

R400

1K_0402_1%

+1.5VSDGPU

Title

Size Document Number Rev

Date: Sheet of

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

12

0.1U_0402_10V6K~D

1

12

C412

2

C794

1U_0402_6.3V6K~D

C794

1U_0402_6.3V6K~D

C795

1U_0402_6.3V6K~D

C795

1U_0402_6.3V6K~D

1

2

Compal Electronics, Inc.

VRAM DDR3 / Channel A

LA-5811P

1

MDA40

E3

MDA41

F7

MDA43

F2

MDA44

F8

MDA45

H3

MDA47

H8

MDA42

G2

MDA46

H7

MDA48

D7

MDA53

C3

MDA50

C8

MDA54

C2

MDA51

A7

MDA55

A2

MDA49

B8

MDA52

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

C796

1U_0402_6.3V6K~D

C796

1U_0402_6.3V6K~D

1

2

C798

1U_0402_6.3V6K~D

C798

1U_0402_6.3V6K~D

C797

1U_0402_6.3V6K~D

C797

1U_0402_6.3V6K~D

1

2

1

C799

1U_0402_6.3V6K~D

C799

1U_0402_6.3V6K~D

C800

1U_0402_6.3V6K~D

C800

1U_0402_6.3V6K~D

1

2

1.0

26 58Tuesday, December 29, 2009

1.0

5

MEM_VREF4

MAB19 MAB25 MAB22 MAB24 MAB0 MAB2 MAB21 MAB16 MAB23

R782

CLKB0

CLKB0#

CLKB1

CLKB1#

12

MAB20 MAB17 MAB9 MAB14 MAB26

MAB12 MAB3 MAB27

CLKB0 CLKB0# MAB18

MAB30 MAB29 MAB1 MAB10 MAB11

QSB3 QSB1

DQMB#3 DQMB#1

QSB#3 QSB#1

MAB15

ZQ4

D D

MDB[63..0]25

MAB[30..0]25

QSB[7..0]25

QSB#[7..0]2 5

DQMB#[7..0]25

C C

B B

CLKB025

CLKB0#25

CLKB125

A A

CLKB1#25

MDB[63..0]

MAB[30..0]

QSB[7..0]

QSB#[7..0]

DQMB[7..0]

MAB7

R219 10K_ 0402_5%R219 10K_ 0402_5%

MAB18

R110 10K_ 0402_5%R110 10K_ 0402_5%

MAB28

R265 10K_ 0402_5%R265 10K_ 0402_5%

MAB30

R232 10K_ 0402_5%R232 10K_ 0402_5%

MAB15

R266 10K_ 0402_5%R266 10K_ 0402_5%

1 2 1 2 1 2 1 2 1 2

12

R417

R417 243_0402_1%

243_0402_1%

12

R418

R418 243_0402_1%

243_0402_1%

5

243_0402_1%~OK

U56

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

+1.5VSDGPU

C854

10U_0603_6.3V6M~D

C854

10U_0603_6.3V6M~D

1

2

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

C822

1U_0402_6.3V6K~D

C822

1U_0402_6.3V6K~D

1

2

C855

10U_0603_6.3V6M~D

C855

10U_0603_6.3V6M~D

1

2

1U_0402_6.3V6K~D

1

2

1

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

R409

1K_0402_1%

C823

1U_0402_6.3V6K~D

1

2

C856

10U_0603_6.3V6M~D

C856

10U_0603_6.3V6M~D

1

2

4

MDB27

E3

MDB26

F7

MDB29

F2

MDB25

F8

MDB30

H3

MDB28

H8

MDB31

G2

MDB24

H7

MDB15

D7 C3

MDB13

C8

MDB10

C2

MDB12

A7

MDB11

A2

MDB14

B8

MDB9

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5VSDGPU +1.5VSDGPU +1.5VSDGPU +1.5VSDGPU

12

MEM_VREF4 MEM_VREF5 MEM_VREF7M EM_VREF6

0.1U_0402_10V6K~D

1

12

C408

R408

C824

10U_0603_6.3V6M~D

2

C826

1U_0402_6.3V6K~D

C826

1U_0402_6.3V6K~D

C825

1U_0402_6.3V6K~D

C825

1U_0402_6.3V6K~D

1

2

C858

10U_0603_6.3V6M~D

C858

10U_0603_6.3V6M~D

C857

1

2

4

R771

243_0402_1%~OK

1U_0402_6.3V6K~D

C827

1U_0402_6.3V6K~D

C827

1U_0402_6.3V6K~D

1

2

MEM_VREF5

MAB19 MAB25 MAB22 MAB24 MAB0 MAB2 MAB21 MAB16 MAB23 MAB20 MAB17 MAB9 MAB14 MAB26

MAB12 MAB3 MAB27

CLKB0 CLKB0# MAB18

MAB30 MAB29 MAB1 MAB10 MAB11

QSB0 QSB2

DQMB#0 DQMB#2

QSB#0 QSB#2

MAB15

ZQ5 ZQ6

12

C828

R26

1K_0402_1%

R107

1K_0402_1%

+1.5VSDGPU+1.5VSDGPU

M8

H1

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2

J3 K3 L3

F3 C7

E7 D3

G3

B7

T2

L8

J1 L1

J9 L9

U55

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4W1G1646E-HC12_FBGA96

12

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

VRAM P/N : Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P) Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )

0.1U_0402_10V6K~D

1

C160

2

C830

1U_0402_6.3V6K~D

C830

1U_0402_6.3V6K~D

C831

1U_0402_6.3V6K~D

C831

1U_0402_6.3V6K~D

1

2

1

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MDB3

E3

MDB7

F7

MDB0

F2

MDB5

F8

MDB2

H3

MDB6

H8

MDB1

G2

MDB4

H7

MDB20

D7

MDB18MDB8

C3

MDB23

C8

MDB19

C2

MDB22

A7

MDB17

A2

MDB21

B8

MDB16

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

C832

1U_0402_6.3V6K~D

C832

1U_0402_6.3V6K~D

1

2

Issued Date

3

MEM_VREF6

MAB19 MAB25 MAB4 MAB6 MAB5 MAB13 MAB21 MAB16 MAB23 MAB20 MAB17 MAB9 MAB14 MAB26

MAB12 MAB3 MAB27

CLKB1 CLKB1# MAB7

MAB28 MAB8 MAB1 MAB10 MAB11

QSB7 QSB4

DQMB#7 DQMB#4

QSB#7 QSB#4

MAB15

12

R767

243_0402_1%~OK

C834

1U_0402_6.3V6K~D

C834

1U_0402_6.3V6K~D

C833

1U_0402_6.3V6K~D

C833

1U_0402_6.3V6K~D

1

2

3

C836

1U_0402_6.3V6K~D

C836

1U_0402_6.3V6K~D

C835

1U_0402_6.3V6K~D

C835

1U_0402_6.3V6K~D

1

2

+1.5VSDGPU

1

2

2009/07/25 2010/07/25

U57

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

C838

1U_0402_6.3V6K~D

C838

1U_0402_6.3V6K~D

1

2

C860

10U_0603_6.3V6M~D

C860

10U_0603_6.3V6M~D

C859

10U_0603_6.3V6M~D

C859

10U_0603_6.3V6M~D

1

2

Compal Secret Data

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

C839

1U_0402_6.3V6K~D

C839

1U_0402_6.3V6K~D

1

2

C861

10U_0603_6.3V6M~D

C861

10U_0603_6.3V6M~D

1

2

Deciphered Date

C840

C862

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1U_0402_6.3V6K~D

1

2

10U_0603_6.3V6M~D

1

2

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

R108

1K_0402_1%

R109

1K_0402_1%

C841

1U_0402_6.3V6K~D

1

2

C863

2

MDB57 MDB63 MDB58 MDB62 MDB56 MDB60 MDB59 MDB61

MDB35 MDB39 MDB32 MDB36 MDB33 MDB38 MDB34 MDB37

+1.5VSDGPU

12

1U_0402_6.3V6K~D

C842

1

2

C161

C843

R787

R787 243_0402_1%~OK

243_0402_1%~OK

0.1U_0402_10V6K~D

1

2

C844

1U_0402_6.3V6K~D

C844

1U_0402_6.3V6K~D

1

2

MEM_VREF7

MAB19 MAB25 MAB4 MAB6 MAB5 MAB13 MAB21 MAB16 MAB23 MAB20 MAB17 MAB9 MAB14 MAB26

MAB12 MAB3 MAB27

CLKB1 CLKB1# MAB7

MAB28 MAB8 MAB1 MAB10 MAB11

QSB5 QSB6

DQMB#5 DQMB#6

QSB#5 QSB#6

MAB15

ZQ7

12

R413

1K_0402_1%

12

R414

1K_0402_1%

+1.5VSDGPU+1.5VSDGPU

C846

1U_0402_6.3V6K~D

C846

1U_0402_6.3V6K~D

1

2

Title

Size Document Number Rev

Custom

LA-5811P

Date: Sheet of

U58

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

0.1U_0402_10V6K~D

1

C413

2

C847

1U_0402_6.3V6K~D

C847

1U_0402_6.3V6K~D

1

2

Compal Electronics, Inc.

VRAM DDR3 / Channel B

1

E3

DQL0

F7

DQL1

F2

DQL2

F8

DQL3

H3

DQL4

H8

DQL5

G2

DQL6

H7

DQL7

D7

DQU0

C3

DQU1

C8

DQU2

C2

DQU3

A7

DQU4

A2

DQU5

B8

DQU6

A3

DQU7

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1

VDDQ

A8

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H2

VDDQ

H9

VDDQ

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1

VSSQ

B9

VSSQ

D1

VSSQ

D8

VSSQ

E2

VSSQ

E8

VSSQ

F9

VSSQ

G1

VSSQ

G9

VSSQ

C850

1U_0402_6.3V6K~D

C850

1U_0402_6.3V6K~D

C849

1U_0402_6.3V6K~D

C849

1U_0402_6.3V6K~D

C848

1U_0402_6.3V6K~D

C848

1U_0402_6.3V6K~D

1

2

1

MDB40 MDB41 MDB43 MDB44 MDB45 MDB47 MDB42 MDB46

MDB51 MDB53 MDB48 MDB54 MDB49 MDB55 MDB50 MDB52

+1.5VSDGPU

C851

1U_0402_6.3V6K~D

C851

1U_0402_6.3V6K~D

1

2

27 58Tuesday, December 29, 2009

C852

1U_0402_6.3V6K~D

C852

1U_0402_6.3V6K~D

1

2

1.0

5

D D

SG For LVDS

U19

+3VS_SWITCH

4

VCC

10

VCC VCC VCC VCC VCC VCC

GND GND GND GND GND GND GND GND GND GND GND GND GND GND

18 27 38 50 56

LVDS_A_0-_R

2

A0

LVDS_A_0+_R

3

A1

LVDS_A_1-_R

7

A2

LVDS_A_1+_R

8

A3

LVDS_A_2-_R

11

A4

LVDS_A_2+_R

12

A5

LVDS_A_C-_R

14

A6

LVDS_A_C+_R

15

A7

19

A8

20

A9

17

SEL

1 6 9 13 16 21 24 28 33 39 44 49 53 55

12

VGA_TXOUT0VGA_TXOUT0+ VGA_TXOUT1VGA_TXOUT1+ VGA_TXOUT2VGA_TXOUT2+ VGA_TXCLKVGA_TXCLK+

LVDS_A_0LVDS_A_0+ LVDS_A_1LVDS_A_1+ LVDS_A_2LVDS_A_2+ LVDS_A_CLVDS_A_C+

VGA_TXOUT0-22 VGA_TXOUT0+22

C C

B B

VGA_TXOUT1-22 VGA_TXOUT1+22 VGA_TXOUT2-22 VGA_TXOUT2+22

VGA_TXCLK-22 VGA_TXCLK+22

LVDS_A_0-10 LVDS_A_0+10 LVDS_A_1-10 LVDS_A_1+10 LVDS_A_2-10 LVDS_A_2+10 LVDS_A_C-10 LVDS_A_C+10

0_0603_5%

R329

48

0B1

47

1B1

43

2B1

42

3B1

37

4B1

36

5B1

32

6B1

31

7B1

22

8B1

23

9B1

46

0B2

45

1B2

41

2B2

40

3B2

35

4B2

34

5B2

30

6B2

29

7B2

25

8B2

26

9B2

52

NC

5

NC

54

NC

51

NC

57

Thermal_GND

TS3DV520ERHUR_W QFN56_11X5

For SSI shortage issue

P/N from SA00001RM00 change to SA00001RM0L

0.5A

C1469

DGPU_SELECT#

4

0.1U_0402_16V4Z

1

2

+3VS

12

R489

0_0402_5%

1

C1470

4.7U_0603_6.3V6K

2

LVDS_A_0-_R 29 LVDS_A_0+_R 29 LVDS_A_1-_R 29 LVDS_A_1+_R 29 LVDS_A_2-_R 29 LVDS_A_2+_R 29 LVDS_A_C-_R 29 LVDS_A_C+_R 29

3

+3VS

C1464

1 2

0.1U_0402_16V4Z

5NC1

U20

R486

DGPU_EDIDSEL#18,30

1 2

0_0402_5%

DGPU_PWMSEL#18

VGA_PNL_PWM21

INV_PWM29,37

DPST_PWM10

U20

P

4

A2Y

G

NC7SZ14P5X_NL_SC70-5

3

DGPU_SELECT#

R493

R493 0_0402_5% @

0_0402_5% @

1 2

R494 0_0402_5%R494 0_0402_5%

R490

1 2

0_0402_5%

R491

1 2

0_0402_5%

@

+3VS_DELAY

12

I2CC_SDA21

I2CC_SCL21

DDC2_DATA10

DDC2_CLK10

R492

2.2K_0402_5%

@

2

2N7002DW-T/R7_SOT363-6

I2CC_SCL

DDC2_DATA

DDC2_CLK

4

2N7002DW-T/R7_SOT363-6

4

2N7002DW-T/R7_SOT363-6

+3VS

C1467 0.1U_040 2_16V4ZC1467 0.1U_04 02_16V4Z

1 2

5NC1

U23

P

A2Y

G

NC7SZ14P5X_NL_SC70-5

3

U24

2

1A

5

2A

1

1OE#

7

2OE#

SN74CBTD3306CPW R_TSSOP8

4

2

Q119A

5

Q119B

2

Q120A

5

Q120B

VCC

GND

61

3

61

3

8 3

1B

6

2B

4

LVDS_DDC2_DATAI2CC_SDA

LVDS_DDC2_CLK

LVDS_DDC2_DATA

LVDS_DDC2_CLK

IGPU_PWM_SELECT#

+5VS

C1471

1 2

0.1U_0402_16V4Z

LVDS_DDC2_DATA 29

LVDS_DDC2_CLK 29

1 2

R419 4.7K_0402_5%R419 4.7K_0402_ 5%

1 2

R392 4.7K_0402_5%R392 4.7K_0402_ 5%

1

+3VS

LVDS_INV_PWM 29

+3VS_DELAY

12

R497

2.2K_0402_5%

@

DGPU_L_BKL_EN21 IGPU_L_BKLT_EN10

DGPU_SELECT#17,29,30

IGPU_VCCEN_SEL#29

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

@

R498 0 _0402_5%R498 0_0402_5%

1 2

Compal Secret Data

Deciphered Date

U26

2

1A

5

2A

1

1OE#

7

2OE#

SN74CBTD3306CPW R_TSSOP8

2

VCC

GND

+5VS

C1472

1 2

0.1U_0402_16V4Z

8 3

1B

6

2B

4

1 2

R499 0_0402_5%R499 0_0402_5%

Title

Size Document Number Rev

Custom

LA-5811P

Date: Sheet of

ENABLT 37

Compal Electronics, Inc.

LVDS Switch

28 58W ednesday, December 30, 2009

1

1.0

5

4

3

2

1

+3VS

Q22

S

G

1

2

C1480

4.7U_0603_6.3V6K

2

R500

R500 110_0603_5%

110_0603_5%

8 3 6 4

R177 0_0402_5%@R1 77 0_0402_5 %@

@D 16

@

DMIC_DATA36

DMIC_CLK36

2

3

+LCDVDD

+LCDVDD_R

D

Q23

S

IGPU_VCCEN_SEL# 28

+5VS

C1484

1 2

0.1U_0402_16V4Z

1 2

W=40mils

W=60mils

LVDS_DDC2_CLK28

LVDS_DDC2_DATA28

LVDS_A_0+_R28 LVDS_A_0-_R28

LVDS_A_1+_R28

LVDS_A_1-_R28

LVDS_A_2+_R28 LVDS_A_2-_R28

LVDS_A_C+_R28 LVDS_A_C-_R28

2

3

W=20mils

DMIC_DATA

DMIC_CLK

12

+5VALW

0.1U_0402_16V4Z

R502

0.1U_0402_16V4Z

12

R501

100K_0402_5%

2

G

12

R510

100K_0402_5%

1 2

13

D

Q24

Q24 2N7002_SOT23

2N7002_SOT23

S

100K_0402_5%

13

2

G

LVDS and USB CAM connector

68P_0402_50V8J

C1494

12

0.1U_0603_25V7K

0.1U_0603_25V7K C1495

C1495

12

INVPWR_B+

+LCDVDD

DISPLAYOFF#

LCD_TEST37

C238

2.2P_0402_50V8C

USB20_P7_R USB20_N7_R

DMIC_DATA DMIC_CLK

+3VS_LCD

1 2

1

2

R728 0_0402 _5%R728 0_0402 _5%

1 2

R727 0_0402 _5%R727 0_0402 _5%

1 2

+5VS_CAM

GMCH_INV_PWM

R519 0_0402_5%R519 0_0402_5%

LVDS_DDC2_CLK LVDS_DDC2_DATA

LVDS_A_0+_R LVDS_A_0-_R

LVDS_A_1+_R LVDS_A_1-_R

LVDS_A_2+_R LVDS_A_2-_R

LVDS_A_C+_R LVDS_A_C-_R

C231

2.2P_0402_50V8C

LVDS_CONN37

STATUS_BOARD_CONN38

100P_0402_50V8J~D

C1492

1

2

C1493

1

2

+LCDVDD

0.1U_0402_16V4Z

1

C1473

2

10U_0805_10V4Z

D D

C C

10U_0805_10V4Z

DISPLAYOFF#

GMCH_INV_PWM

1

C1474

1800P_0402_50V7K

2

R503

4.7K_0402_5%

R505

@

1 2

R507 0_0402_5%R507 0_0402_5%

C1483

DISPLAYOFF#

C1485

B+

40mil

1000P_0402_50V7K~D

1

2

EN_INVPWR37

B B

USB20_P719

USB20_N719

A A

12

R513

C1486

R513 100K_0402_5%~D

100K_0402_5%~D

1 2

R515 100K_0402_5%~DR515 100K_0402_5%~D

USB20_P7 USB20_P7_R

1

C1476

C1475

+3VS

PWR_SRC_ON

C1476

390P_0402_50V7K

2

D15

1 2

2 1

CH751H-40PT_SOD323-2

0_0402_5%

220P_0402_50V7K

1 2

220P_0402_50V7K

1 2

SI3457BDV-T1-E3_TSOP6~D

S

4 5

G

3

L27

INV_PWM 28,37

LVDS_INV_PWM 28

D

1 3

R512 0_0402_5%R512 0_0402_5%

@L27

@

1

4

WCM2012F2S-900T04_0805

R516 0_0402_5%R516 0_0402_5%

+3VS

1

2

R504

1 2

0_0402_5%

Q25

6

2 1

1

C1487

0.1U_0603_50V4Z~D

2

Q26

S

G

2

2N7002W-7-F_SOT323-3~D

1 2

1

2

3

4

1 2

C1477

0.1U_0402_16V4Z

BKOFF# 37

40mil

INVPWR_B+

2

3

2N7002_SOT23

+3VS

C1482 0.1U_0402_16V4ZC1482 0.1U_0402_16V4Z

1 2

5NC1

U27

R506

1 2 1 2

1

2

D

13

CAM_ON/OFF

1 2

0_0402_5%

DGPU_VCCEN_SEL#

C399

0.1U_0402_16V4Z~D

W=20mils

+5VS_CAM+5VS

1

C1490

2

13

D

Q28

2

G

2N7002_SOT23-3

G

2N7002_SOT23-3

S

DGPU_SELECT#17,28,30

ENVDD21 ENAVDD10

+3VS +3VS_LCD

0.1U_0402_10V6K~D

1

C1491

2

USB20_N7_RUSB20_N7

R508 0_0402_5%R508 0_0402_5% R509 0_0402_5%R509 0_0402_5%

R729

1 2

0_0603_5%

Q27

SI2301BDS-T1-E3_SOT23-3

S

G

12

2

0.1U_0402_16V4Z

R517

R518

100K_0402_5%~D

1 2

1K_0402_5%~D

CAM_ON/OFF#37

U27

P

A2Y

G

NC7SZ14P5X_NL_SC70-5

3

U28

2

1A

5

2A

1

1OE#

7

2OE#

SN74CBTD3306CPW R_TSSOP8

LCD_VCC_TEST_EN37

4

VCC

GND

LCD_VCC_TEST_EN

1

D31 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

1B 2B

D16 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

@D31

@

Close to CONN

C1478

2

C1481

C1481 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

+LCDVDD

1

2

JLVDS1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

G1

31

G2

32

G3

33

G4

34

G5

35

G6

36

G7

37

G8

38

G9

39

G10

40

G11

I-PEX_20439-040E-01_40P

CONN@

SI2301BDS_SOT23

1 3

D

C1479

4.7U_0805_10V4Z

41 42 43 44 45 46 47 48 49 50 51

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LCD CONN

LA-5811P

29 58Tuesday, December 29, 2009

1

1.0

5

4

3

2

1

G

G G

G

Q29A

C1497

16 17

2

3

BLUE GREEN RED

+CRTVDD+RCRT_VCC+5VS

1

2

CRT Connector

+CRTVDD

CRT_DET#

+3VS+CRTVDD +CRTVDD

5

4

Q29B

1

D18

@D18

@

R523

R523 100K_0402_5%

100K_0402_5%

1 2

3VDDCDA_R

3VDDCCL_R

1

@D19

@

R528

0_0402_5%

R530

0_0402_5%

D19

CRT_DDC_DATA

12

CRT_DDC_CLK

12

1

D20

@D20

@

D17

1

2

DVSYNC

2 1

CH491D_SC59

RED

GREEN

BLUE

@

1

C1507

5P_0402_50V8C

2

D D

L30

1

2

L30

1 2

FCM2012CF-800T06_2P

FCM2012CF-800T06_2P L31

L31

1 2

FCM2012CF-800T06_2P

FCM2012CF-800T06_2P L32

L32

1 2

FCM2012CF-800T06_2P

R531

1 2

R532

1 2

C1501

10P_0402_50V8J

C1501

10P_0402_50V8J

1

2

0_0603_5%

C1503

10P_0402_50V8J

C1503

10P_0402_50V8J

C1502

10P_0402_50V8J

C1502

10P_0402_50V8J

1

2

@

1

C1506

5P_0402_50V8C

2

CRT_R

CRT_G

CRT_B

12

R522

150_0402_1%

R522

150_0402_1%

R521

150_0402_1%

R521

150_0402_1%

R520

150_0402_1%

R520

150_0402_1%

12

C C

R529

10K_0402_5%

CRT_HSYNC_R

CRT_VSYNC_R

R533

51K_0402_5%

+5VS +5VS

12

R534

R534 51K_0402_5%

51K_0402_5%

A2Y

C1498

10P_0402_50V8J

C1498

10P_0402_50V8J

12

C1504

0.1U_0402_16V4Z

1 2

1

5

U29

U29 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

P

4

OE#

G

3

C1500

10P_0402_50V8J

C1500

10P_0402_50V8J

C1499

10P_0402_50V8J

C1499

10P_0402_50V8J

1

2

C1505

0.1U_0402_16V4Z

1 2

HSYNC_G_A DHSYNC

1

5

U30

U30 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

P

VSYNC_G_A

4

OE#

A2Y

G

3

F1

1.1A_6VDC_FUSE

R524

2.2K_0402_5%

D_DDCDATA

D_DDCCLK

W=40mils

21

0.1U_0402_16V4Z

CONN@

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070546FR015M21TZR

12

R525

2.2K_0402_5%

6 1

2N7002DW-T/R7_SOT363-6

+CRTVDD

2

B B

A A

+3VS

0.1U_0402_16V4Z

1

C1508

2

5

1

C1509

2

+3VS

VGA_DDC_CLK2 1 VGA_DDC_DATA21

1

C1510

2

R527 2.2K_0402_5%R527 2.2K_0402_5%

1 2

R526 2.2K_0402_5%R526 2.2K_0402_5%

1 2

3VDDCCL10 3VDDCDA10

U61

+3VS

VGA_CRT_R21 VGA_CRT_G21

VGA_CRT_B21 VGA_CRT_HSYNC21 VGA_CRT_VSYNC21

M_RED10 M_GREEN10 M_BLUE10 CRT_HSYNC10 CRT_VSYNC10

4

4 16 23 29 32

27 25 22 20 18 12 14

26 24 21 19 17 13 15

PI3V712-AZLEX_TQFN32_6X3~D

VDD VDD VDD VDD VDD

0B1 1B1 2B1 3B1 4B1 5B1 6B1

0B2 1B2 2B2 3B2 4B2 5B2 6B2

SEL1

SEL2

GND GND GND GND

GPAD

A0 A1 A2 A3 A4

A5 A6

CRT_R

1

CRT_G

2

CRT_B

5

CRT_HSYNC_R

6

CRT_VSYNC_R

7

8

9 10

30

3 11 28 31 33

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CRT_DDC_CLK CRT_DDC_DATA

Issued Date

DGPU_SELECT# 17,28,29

DGPU_EDIDSEL# 18,28

3

NOTE: L : B1, EXT H: B2, INT

2009/07/25 2010/07/25

Place close to JCRT1

Compal Secret Data

Deciphered Date

3

2

3

DAN217_SC59

3

DAN217_SC59

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CRT CONN

LA-5811P

1

1.0

30 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

D D

+3VS_DELAY

12

DDC to HDMI CONN

2.2K_0402_5%

VGA_DVI_SDATA22

VGA_DVI_SCLK22

C C

VGA_DVI_TXD2-22 VGA_DVI_TXD2+22

VGA_DVI_TXD1-22 VGA_DVI_TXD1+22

VGA_DVI_TXD0-22 VGA_DVI_TXD0+22

VGA_DVI_TXC-22 VGA_DVI_TXC+22

B B

VGA_DVI_TXD2VGA_DVI_TXD2+

VGA_DVI_TXD1VGA_DVI_TXD1+

VGA_DVI_TXD0VGA_DVI_TXD0+

VGA_DVI_TXCVGA_DVI_TXC+

C1542 0.1U_0402_16V7KC1542 0.1U_0402_16V7K C1543 0.1U_0402_16V7KC1543 0.1U_0402_16V7K

C1544 0.1U_0402_16V7KC1544 0.1U_0402_16V7K C1545 0.1U_0402_16V7KC1545 0.1U_0402_16V7K

C1546 0.1U_0402_16V7KC1546 0.1U_0402_16V7K C1547 0.1U_0402_16V7KC1547 0.1U_0402_16V7K

C1548 0.1U_0402_16V7KC1548 0.1U_0402_16V7K C1549 0.1U_0402_16V7KC1549 0.1U_0402_16V7K

12 12

VGA_DVI_SDATA

VGA_DVI_SCLK

R583

499_0402_1%

R583

499_0402_1%

R582

499_0402_1%

R582

499_0402_1%

12

+3VS_DELAY

R585

R584

499_0402_1%

R584

499_0402_1%

12

R576

R586

499_0402_1%

R586

499_0402_1%

12

0_0402_5%

1 2

R593

100K_0402_5%

R594

12

R587

2.2K_0402_5%

499_0402_1%

12

R569

R589

12

DVI_TXD2-_R DVI_TXD2+_R

DVI_TXD1-_R DVI_TXD1+_R

DVI_TXD0-_R DVI_TXD0+_R

DVI_TXC-_R DVI_TXC+_R

499_0402_1%

R590

499_0402_1%

R590

499_0402_1%

12

2

G

Q33

Q33 2N7002_SOT23

2N7002_SOT23

12

13

D

S

@

R570

R570 0_0402_5%

0_0402_5%

1 2

+3VS +HDMI_5V_OUT

R571

2.2K_0402_5%

5

4

Q30B

2

2N7002DW-T/R7_SOT363-6

61

Q30A 2N7002DW-T/R7_SOT363-6Q30A 2N7002DW-T/R7_SOT363-6

1 2

@

R577

R577 0_0402_5%

0_0402_5%

2.2K_0402_5%

DVI_SDATA_L

3

DVI_SCLK_L

DVI_TXD2+_R C_DVI_R_TXD2+

DVI_TXD1+_R C_DVI_R_TXD1+

5V Level

12

R568

2.2K_0402_5%

1 2

L36

L36 FCM2012CF-800T06_2P

FCM2012CF-800T06_2P

1 2

L37

L37 FCM2012CF-800T06_2P

FCM2012CF-800T06_2P

Place closed to JHDMI1

1 2

R579 0_0402_5%@R579 0_0402_5%@

WCM-2012-900T_4P

2

3

1 2

R581 0_0402_5%@R581 0_0402_5%@

1 2

R591 0_0402_5%@R591 0_0402_5%@

WCM-2012-900T_4P

3

2

1 2

R595 0_0402_5%@R595 0_0402_5%@

1

4

L40

4

1

L41

C1539

+HDMI_5V_OUT

W=40mils

2 1

1

1.1A_6VDC_FUSE

C1536

0.1U_0402_16V4Z

DVI_SDATA

DVI_SCLK

10P_0402_50V8J

1

2

10P_0402_50V8J

1

C1538

2

C_DVI_R_TXD2-DVI_TXD2-_R

DVI_TXD0+_R C_DVI_R_TXD0+

C_DVI_R_TXD1-DVI_TXD1-_R

DVI_TXC+_R C_DVI_R_TXC+

HDMI_DET21

HDMI_HPD#19

WCM-2012-900T_4P

2

3

WCM-2012-900T_4P

3

2

1 2

R580 0_0402_5%@R580 0_0402_5%@

2

3

1 2

R588 0_0402_5%@R588 0_0402_5%@

1 2

R592 0_0402_5%@R592 0_0402_5%@

3

2

1 2

R596 0_0402_5%@R596 0_0402_5%@

+HDMI_5V_OUT

G

2

S

2N7002_SOT23

13

D

Q32

S

2N7002_SOT23

1

4

L39

4

1

L42

Q31

13

D

100K_0402_5%

2

G

R578

C_DVI_R_TXD0-DVI_TXD0-_R

C_DVI_R_TXC-DVI_TXC-_R

1.1A_6VDC_FUSE

2

1

12

2

3

+3VS

+HDMI_5V_OUT

HP_DETECT

DVI_SDATA DVI_SCLK

C_DVI_R_TXC-

C_DVI_R_TXC+ C_DVI_R_TXD0-

C_DVI_R_TXD0+ C_DVI_R_TXD1-

C_DVI_R_TXD1+ C_DVI_R_TXD2-

C_DVI_R_TXD2+

D21

F2

R574

1 2

10K_0402_5%

D22

D22 BAV99-7-F_SOT23-3

BAV99-7-F_SOT23-3

@

21

SS1040_SOD123

L38

L38 MBK1608221YZF_2P

MBK1608221YZF_2P

1 2

HDMI Connector

JHDMI1

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

LOTES_ABA-HDM-029-P01

+5VS

HP_DETECT

1

2

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

C1541

220P_0402_50V7K

20

GND

21

GND

22

GND

23

GND

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

HDMI

LA-5811P

1

31 58Wednesday, December 30, 2009

1.0

5

61

Q123A

2N7002DW -7-F_SOT363-6~D

2

DISP_DDC_EN

R599

0_0402_5% ~D

DP_DDC_CL K_R

12

R603

R603 100K_0402_ 1%~D

100K_0402_ 1%~D

1 2

R600

0_0402_5% ~D

DISP_DDC_EN

DP_DDC_DAT A_R

DP_DDC_CL K22

D D

DP_DDC_DAT A22

12

R602

100K_0402_ 1%~D

4

Q123B

5

2N7002DW -7-F_SOT363-6~D

0.1U_0402_ 10V6K~D

3

61

0.1U_0402_ 10V6K~D

Q124A

2

2N7002DW -7-F_SOT363-6~D

4

5

Q124B

2N7002DW -7-F_SOT363-6~D

3

C1554

C1557

Place close JDP1

D23

@8D23

@

1

2

C C

DISP_A3N DISP_A3N

DISP_A1P DISP_A1P

DISP_A1N DISP_A1N

DISP_A2P DISP_A2P

DISP_A2N DISP_A2N

4

5

3

8

RCLAMP0524P.T CT~D

D24

@8D24

@

1

2

4

5

3

8

RCLAMP0524P.T CT~D

4

12

R598

R598 100K_0402_ 1%~D

100K_0402_ 1%~D

12

DISP_A0NDISP_A0N

10

DISP_A0PDISP_A0P

9

DISP_A3PDISP_A3P

7

6

10

9

7

6

DISP_DDC_DAT_ C

12

R601

R601 100K_0402_ 1%~D

100K_0402_ 1%~D

+3VS_DELAY

3

DISP_A0N_VGA2 2 DISP_A0P_VGA22

DISP_A1N_VGA2 2 DISP_A1P_VGA22

DISP_A2N_VGA2 2 DISP_A2P_VGA22

DISP_A3N_VGA2 2 DISP_A3P_VGA22

DP_HPD21

DISP_DDC_EN

0.1U_0402_ 10V6K~D

R607 0_0402_ 5%~DR607 0_0402_5% ~D

1 2

C1552 0.1U_ 0402_10V6K~DC 1552 0.1U_0402_ 10V6K~D

12

C1553 0.1U_ 0402_10V6K~DC 1553 0.1U_0402_ 10V6K~D

12

C1555 0.1U_ 0402_10V6K~DC 1555 0.1U_0402_ 10V6K~D

12

C1556 0.1U_ 0402_10V6K~DC 1556 0.1U_0402_ 10V6K~D

12

C1558 0.1U_ 0402_10V6K~DC 1558 0.1U_0402_ 10V6K~D

12

C1559 0.1U_ 0402_10V6K~DC 1559 0.1U_0402_ 10V6K~D

12

C1560 0.1U_ 0402_10V6K~DC 1560 0.1U_0402_ 10V6K~D

12

C1561 0.1U_ 0402_10V6K~DC 1561 0.1U_0402_ 10V6K~D

12

+5VS

12

R614

R614 100K_0402_ 1%~D

100K_0402_ 1%~D

3

Q125B

1

2N7002DW -7-F_SOT363-6~D

C1562

MMBT3904_N L_SOT23-3

2N7002DW -7-F_SOT363-6~D

5

2

4

2N7002DW -7-F_SOT363-6~D

DP_HPD_SB19

+3VS_DELAY

Q37

C

E

3 1

12

R609

R609 10K_0402_5 %~D

10K_0402_5 %~D

2

B

Q125A

150K_0402_ 5%

1 2

DISP_A0N DISP_A0P

DISP_A1N DISP_A1PDISP_DDC_CLK _C

DISP_A2N DISP_A2P

DISP_A3N DISP_A3P

+5VS

12

61

R606

1M_0402_5 %~D

2

R613

100K_0402_ 1%~D

2

Close connect

R608

1

Co-lay

F3

+3VS

12

1 2

1.5A_6V_1206L15 0PR~D

R597 0_ 1206_5%~D@R597 0 _1206_5%~D@

DISP_A0P

DISP_A0N DISP_A1P

DISP_A1N DISP_A2P

DISP_A2N DISP_A3P

DISP_A3N DISP_EN DISP_CEC DISP_DDC_CLK _C

DISP_DDC_DAT_ C DISP_HD

12

R604 5.1M_0402_5%R604 5.1M_0402_5%

12

+3VS_DP

R605 1M_0402_5%~DR605 1M_0402_5%~D

12

+3VS_DP

C1550

10U_0805_10V4Z~D

C1550

10U_0805_10V4Z~D

C1551

0.1U_0402_16V4Z~D

C1551

0.1U_0402_16V4Z~D

1

2

JDP1

1

LANE0_P

2

GND

3

LANE0_N

4

LANE1_P

5

GND

6

LANE1_N

7

LANE2_P

8

GND

9

LANE2_N

10

LANE3_P

11

GND

12

LANE3_N

13

CONFIG1

14 15 16 17 18 19 20

21

C1563 0.1U_0402_10V6K~DC1563 0.1U_0402_10V6K~D

C1564 22U_0805_6.3V6M~DC1564 22U_0805_6.3V6M~D

1

2

22 23 24

CONFIG2

AUXCH_P

GND

AUXCH_N

HPD

RETURN

DP_PWR

GROUND

MOLEX_105088- 0001

CONN@

B B

A A

FAN_SPEED137

+FAN_POWER

40mil

FAN Control circuit

1

2

10U_1206_16V4Z

EN_DFAN137

5

C1565

2

1000P_0402_50V7K

EN_DFAN1

+3VS

12

1

C1577

0.01U_0402 _16V7K

2

C1566

R610

R610 10K_0402_5 %

10K_0402_5 %

+5VS

C1567

C1567 10U_1206_ 16V4Z

10U_1206_ 16V4Z

1 2

U37

1

VEN

2

VIN

3

VO

4

VSET

RT9027BPS S O 8P

+FAN_POWER

GND GND GND GND

40mil

8 7 6 5

1 2

Pin1 GND Pin2 CLK Pin3 DATA

JFAN1

1

4

2

G

5

33G

MOLEX_53398-0 371

4

HDD Connector

JHDD1

23

GND1

24

GND2

FOX_LD2122H-S4 SL6~D

CONN@

1

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

Near CONN side.

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_IRX_DTX_P0_C SATA_IRX_DTX_P0

HDD_DET#

+5VS

FFS_INT2_Q

3

C1568 0.01U_0402_ 16V7KC1568 0.01U_04 02_16V7K

SATA_IRX_DTX_N0SATA_IRX_DT X_N0_C

1 2 1 2

C1569 0.01U_0402_ 16V7KC1569 0.01U_04 02_16V7K

HDD_DET# 19

2

40 mils

Compal Secret Data

2009/07/25 2010/07/25

Compal Secret Data

@

J3

112

JUMP_43X118

Deciphered Date

SATA_ITX_DRX_P0 18 SATA_ITX_DRX_N0 18

SATA_IRX_DTX_N0 18 SATA_IRX_DTX_P0 18

FFS_INT219,36

SSM3K7002FU_ SC70-3~D

+3VS

1

C1634

C1628

@

2

10U_0805_10V4Z

0.1U_0402_16V4Z

2

+3VS

G

2

FFS_INT2 FFS_INT2_Q

13

D

S

D

S

Q118

SDM10U45-7 _SOD523-2~D

Pleace near HDD CONN (JHDD1)

+5VS

1

C1574

C1573

2

10U_0805_10V4Z

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DP/FAN/HDD

LA-5811P

+5VS

12

R344

@R344

@

100K_0402_ 5%~D

21

D10

1

C1575

C1576

2

0.1U_0402_16V4Z

C1576

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1000P_0402_25V8J

1000P_0402_25V8J

1.0

32 58Tuesday, December 29, 20 09

1

1.0

5

4

3

2

1

+1.5VS

1

C1514

WWAN PCIE MiniCard

JWWAN1

D D

EC_TX37

EC_RX37

C C

B B

A A

PCIE_WAKE#19

CLKREQ_WWA N#16

CLK_PCIE_WW AN#16 CLK_PCIE_WW AN16

PCIE_IRX_WWAN TX_N419 PCIE_IRX_WWAN TX_P419

PCIE_ITX_WWAN RX_N419 PCIE_ITX_WWAN RX_P419

R545 0 _0402_5%R545 0_0402_5% R546 0 _0402_5%R546 0_0402_5%

12

R657

R657 100K_0402_5%

100K_0402_5%

+3VS

PCIE_WAKE#19

CLKREQ_WLAN#16

CLK_PCIE_WLAN#16 CLK_PCIE_WLAN16

CLK_DEBUG_PORT_116

PCIE_IRX_WLANTX_N219 PCIE_IRX_WLANTX_P219

PCIE_ITX_WLANRX_N219 PCIE_ITX_WLANRX_P219

1 2 1 2

40 mils

R548

R548 0_1206_5%

0_1206_5%

COEX2_WLAN_ACTIVE BT_ACTIVE

PLT_RST#_Buff

5

PCIE_WAKE#

+3VS

+3V_WLAN

12

1

C1528

2

0.01U_0402_25V7K

PCIE_WAKE#

1 2 1 2

PCIE_IRX_WLANTX_N2 PCIE_IRX_WLANTX_P2

PCIE_ITX_WLANRX_N2 PCIE_ITX_WLANRX_P2

USB20_N4_R USB20_N4

USB20_P4_R USB20_P4

JWWAN1

1

3

5

7

9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

LOTES_AAA-PCI-041-K01

WLAN/WIMAX PCIE Mini Card

1

2

0.047U_0402_16V4Z~D

R551 0_0402 _5%R551 0_0402 _5% R549 0_0402 _5%R549 0_0402 _5%

R558 0_0402_5%R558 0_0402_5%

R559 0_0402_5%R559 0_0402_5%

+3V_WLAN

L35

1

C1529

0.1U_0402_16V4Z

1 2 1 2

R562 0_0402_5%R562 0_0402_5%

@L35

@

C1531

C1530

2

4.7U_0805_10V4Z

1 2

1

4

WCM2012F2S-900T04_0805

R563 0_0402_5%R563 0_0402_5%

1 2

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

@

C1116

2

47P_0402_50V8J~D

JWLAN1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

LOTES_AAA-PCI-041-K01

2

3

+1.5VS

0.01U_0402_25V7K

1

2

+1.5VS

+UIM_PWR

R542 0 _0402_5%R542 0_0402_5% R543 0 _0402_5%R543 0_0402_5%

R544 0_0402_5%R544 0_0402_5%

L33

@L33

@

1

4

WCM2012F2S-900T04_0805

R547 0_0402_5%R547 0_0402_5%

20 mils

C1532

+3V_WLAN

R552 0 _0402_5%R552 0_0402_5% R553 0 _0402_5%R553 0_0402_5% R554 0 _0402_5%R554 0_0402_5% R555 0 _0402_5%R555 0_0402_5% R556 0 _0402_5%R556 0_0402_5%

WLAN_RADIO_OFF#

PLT_RST#_Buff

WLAN_SMB_CLK_R WLAN_SMB_DAT_ R

USB20_N4_R USB20_P4_R

USB20_N4 19

USB20_P4 19

UIM_DATA UIM_CLK UIM_RESET UIM_VPP

WWAN_RA DIO_OFF# PLT_RST#_Buff

WWAN_SM B_CK_R WWAN_SM B_DA_R

USB20_N5_R USB20_P5_R

USB20_N5_R USB20_N5

USB20_P5_R USB20_P5

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

GND2

4

C1514

2

0.01U_0402_25V7K

0.047U_0402_16V4Z~D

1

C1518

2

WWAN_RA DIO_OFF# 37

1 2 1 2

1 2

1

2

3

4

1 2

1

C1533

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

For Compal LPC debug card

1 2 1 2 1 2 1 2 1 2

1

C1516

C1515

2

0.1U_0402_16V4Z

1

2

C1519

0.01U_0402_25V7K

2

3

PWR Rail

+3.3V

+3.3Vaux

+1.5V

1

C1534

2

0.047U_0402_16V4Z~D

WLAN_RADIO_OFF# 37 PLT_RST#_Buff 34,37

R560 0 _0402_5%R560 0_0402_5% R561 0 _0402_5%R561 0_0402_5%

2

4.7U_0805_10V4Z

0.047U_0402_16V4Z~D

1

2

C1520

0.1U_0402_16V4Z

4.7U_0805_10V4Z

ICH_SMBCLK 14,15,16,19,36

Voltage Tolerance

+-9%

+-5%

1

@

C1535

C1136

2

47P_0402_50V8J~D

LPC_LFRAME#CLKREQ_WLAN# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

1 2 1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@

C1184

C1517

2

47P_0402_50V8J~D

+3VS

1

+

2

C1521

330U_D2E_6.3VM_R25M

ICH_SMBDATA 14,15,16,19,36

C1522

USB20_N5 19

USB20_P5 19

110 mils

Primary Power Aux Power

Peak Normal Normal

1000 750

330

500

LPC_FRAME# 18,37

LPC_AD3 18,37 LPC_AD2 18,37 LPC_AD1 18,37 LPC_AD0 18,37

ICH_SMBCLK 14,15,16,19,36

ICH_SMBDATA 14,15,16,19,36

2009/07/25 2010/07/25

3

250 (Wake enable)

250

5 (Not wake enable)

375

NA

Compal Secret Data

Deciphered Date

USB20_P619

USB20_N619

BT_DET#37

BT_OFF#37

BT_RADIO_OFF#37

SIM Card

U34

@U34

@

UIM_RESET

UIM_CLK

33P_0402_50V8J~D

C1523

1

@

2

UIM_VPP UIM_DATA

USB20_P6

USB20_N6 USB20_N6_R

2

L34

BT_DET# COEX2_WLAN_ACTIVE BT_OFF# U SB20_P6_R BT_RADIO_OFF#

1

2

3

33P_0402_50V8J~D

C1524

1

SRV05-4.TCT_SOT23-6~D

2

5

GND

6

VPP

7

I/O

8

GND

9

GND

HB_5680629-SICR11

R550 0_0402 _5%R550 0_0402 _5%

1 2

@L34

@

1

4

WCM2012F2S-900T04_0805

R557 0_0402 _5%R557 0_0402 _5%

1 2

Bluetooth

JBT1

112 334 556 778 9910 111112 131314

GND15GND

HRS_DF12(3.0)-14DP-0.5V(86)~D

SP01000SL0L

SP01000SL0L CONN@

CONN@

Title

Size Document Number Rev

Custom

Date: Sheet of

6

5

4

C1525

1

@

2

+UIM_PWR

JSIM1

1

VCC

2

RST

3

CLK

4

NC

2

3

BT_ACTIVE

2 4 6

USB20_N6_R

8 10 12 14

16

LA-5811P

USB20_P6_R

Compal Electronics, Inc.

WLAN/WWAN/SIM/BT

+UIM_PWR

33P_0402_50V8J~D

C1526

@

UIM_RESET UIM_CLK

+3VS

UIM_VPP

UIM_DATA

33P_0402_50V8J~D

1

2

C1527

1

2

1

1U_0603_10V4Z~D

1.0

33 58Tuesday, December 29, 2009

1.0

5

C1631, C1632, L45 Close to pin 1 60mil

+3VS

CLKREQ_LAN#

12

R663 4.7K_04 02_5%R663 4.7K_0402_5%

D D

+AVDD_CEN

R661 close to TR1

C1633

CLK_PCIE_LAN

CLK_PCIE_LAN#

PCIE_ITX_LANRX_P1

PCIE_ITX_LANRX_N1

PCIE_IRX_LANTX_P1

PCIE_IRX_LANTX_N1

5

PLT_RST#_Buff EC_PME#

C1705 0.1U_0402 _16V7K~DC1705 0.1U_0402_16V7K~ D

C1706 0.1U_0402 _16V7K~DC1706 0.1U_0402_16V7K~ D

C1640 0.1U_0402 _16V7K~DC1640 0.1U_0402_16V7K~ D

Place Close to Chip

1

C1646

C1646 18P_0402_50V8J

18P_0402_50V8J

2

0.1U_0402_16V4Z~D

C1642 0.1U_0402 _16V7K~DC1642 0.1U_0402_16V7K~ D

C1647

LAN_ACTIVITY LAN_ACTIVITY_R

5.1K_0402_1%~D

PLT_RST#_Buff33,37

EC_PME#17,37

CLK_PCIE_LAN16

CLK_PCIE_LAN#16

PCIE_ITX_LANRX_P119

PCIE_ITX_LANRX_N119

PCIE_IRX_LANTX_P119

C C

B B

A A

PCIE_IRX_LANTX_N119

Y4

LAN_X1 LAN_X2

1

2

Pull down circuit: more power saving in no-overclocking mode vendor suggestion

Y4

1 2

25MHZ_12PF_X5H0250 00FC1H-H

C1645

C1645 15P_0402_50V8J

15P_0402_50V8J

C1631

1 2

R661

R661 0_0603_5%~D

0_0603_5%~D

1 2

0.1U_0402_16V4Z~D

12

+AVDD_CEN

1

C1648

2

R675

+3V_LAN

1

C1632

2

10U_0805_10V4Z~D

PCIE_IRX_LANTX_P1_C

PCIE_IRX_LANTX_N1_C

R671 2.37K_0402_1%~DR671 2.37K_0402 _1%~D

1

C1649

0.1U_0402_16V4Z~D

2

1U_0402_6.3V4Z~D

1 2

LAN_SK_LAN_LINK100#

LAN_SK_LAN_LINK10#

4

1 2

L45 4.7UH_10 08HC-472EJFS-A_5%_1008L45 4.7UH_1 008HC-472EJFS-A_5%_1008

1

2

0.1U_0402_16V4Z~D

the common mode voltage of the input pcie clock must be lower than 0.5V

+1.8_VDD/LX

+2.5V_VDDH/VDD17

+2.5V_VDDH

LAN_X1 LAN_X2

12

LAN_MDI1+ LAN_MDI1-

LAN_MDI0+ LAN_MDI0-

R674

R674 511_0402_1%~D

511_0402_1%~D

12

2

C1659

@

1

470P_0402_50V7K

R676

511_0402_1%~D

4

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

+3V_LAN_LED

12

+1.8_VDD/LX

30mil20mil

+2.5V_VDDH/VDD17

U44

1

LX

2

VDD3V

6

VDD17

5

VDD25V

3

PERSTn

4

WAKEn

7

SEL_25 MHz

41

REFCLKP

40

REFCLKN

43

RX_P

AR8132 10/100 LAN

44

RX_N

38

TX_P

37

TX_N

9

XTLO

10

XTLI

31

SMCLK

33

SMDATA

12

RBIAS

34

TESTMODE

49

GND

AR8132-AL1E_QFN48_6X6

TR1

1

RD+

RX+

2

RD-

RX-

3

CT

4

NC

5

NC

6

CT

7

TD+

TX+

TD-8TX-

350uH_NS0013LF

SP050001210

2

C1182

@

1

470P_0402_50V7K

Atheros

16 15 14 13 12 11 10 9

JLAN1

13

Yellow LED-

12

Yellow LED+

8

TX3-

7

TX3+

6

TX1-

5

TX2-

4

TX2+

3

TX1+

2

TX0-

1

TX0+

11

Orange LED-

9

Green LED-

10

Green-Orange LED+

SA000036Y00

RJ45_MIDI1+ RJ45_MIDI1RJ45_CT0

RJ45_CT1 RJ45_MIDI0+ RJ45_MIDI0-

TYCO_2041633-1

CONN@

TWSI_CLK

TWSI_DATA

LED0 LED1 LED2

CLKREQn

TRXP0 TRXN0 TRXP1 TRXN1

AVDD_ REG

AVDDL

DVDDL

DVDDL DVDD_REG DVDD_REG

VDD11_ REG

AVDDL

VDDHO

AVDDH

NC NC NC NC

NC

R672 75_0402_5%~DR672 75_0402_5%~D

1 2 1 2

R673 75_0402_5%~DR673 75_0402_5%~D

GND GND

Security Classification

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

29 30

LAN_ACTIVITY

47 48 26

27

R666 0_0402_5%~DR666 0_0 402_5%~D

13 14 17 18

11 42

+1.2_DVDDL

28 32 45 46

+1.2_AVDDL

8 16 22 36 39

15

+2.5V_VDDH

19 25

20 21 23 24

35

+TRCT

15 14

Issued Date

3

10K_0402_5%

1 2

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1-

AVDDVCO1 AVDDVCO2

1

2

+3V_LAN

12

R664

1

2

@

CLKREQ_LAN#

1

C1643

C1643 1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

2

C1636

0.1U_0402_16V4Z~D

R662

R662 10K_0402_5%

10K_0402_5%

@

LAN_SK_LAN_LINK100# LAN_SK_LAN_LINK10#

CLKREQ_LAN# 16

Place C1636 close to Pin19

C1654

C1654 1000P_1206_2KV7~D

1000P_1206_2KV7~D

C1662 0.1U_0402_16V4Z~DC1662 0.1U_0402_16V4Z~D

1 2

C1663 0.1U_0402_16V4Z~DC1663 0.1U_0402_16V4Z~D

1 2

Compal Secret Data

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

2

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1-

Place Close to Chip

R656 49.9_0402_1%~ DR656 49.9_0402_1%~D

1 2

R658 49.9_0402_1%~ DR658 49.9_0402_1%~D

1 2

R659 49.9_0402_1%~ DR659 49.9_0402_1%~D

1 2

R660 49.9_0402_1%~ DR660 49.9_0402_1%~D

1 2

+1.2_AVDDL

1 2

R667

R667 0_0603_5%~D

0_0603_5%~D

R668 0_0603_5%~D

1 2

Place C1641 close to Pin11

If overclocking, R668 stuffed and R667 removed. If not overclocking, R667 suffed and R668 removed. AR8132:C72=0.1uF.

1

C1629

0.1U_0402_16V4Z~D

2

Layout Notice : Place as close chip as possible.

10U_0805_10V4Z~D

1

C1637

C1638

C1638 1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

2

@

AVDDVCO1

1

C1641

0.1U_0402_16V4Z~D

2

AVDDVCO2

1

C1644

0.1U_0402_16V4Z~D

2

1

C1630

0.1U_0402_16V4Z~D

2

+3V_LAN

1

2

Place C1650 close to Pin8. C1651,C1652,C1653 close to Pin16, Pin36, Pin39

C1653

C1651

0.1U_0402_16V4Z~D

+1.2_AVDDL

Place C1655 close to Pin46. C1656,C1657,C1658 close to Pin28, Pin32, Pin45

+1.2_DVDDL

1U_0402_6.3V4Z~D

0.1U_0402_16V4Z~D

1

2

C1650

0.1U_0402_16V4Z~D

C1656

0.1U_0402_16V4Z~D

1

C1655

2

1

2

1

2

C1653

0.1U_0402_16V4Z~D

1

2

C1652

0.1U_0402_16V4Z~D

C1657

0.1U_0402_16V4Z~D

1

C1658

0.1U_0402_16V4Z~D

2

Place C1660 close to Pin15, C1661 close to Pin25

+2.5V_VDDH

1U_0402_6.3V4Z~D

Title

Size Document Number Rev

Custom

LA-5811P

Date: Sheet of

2

Date: Sheet of

1

C1660

2

Compal Electronics, Inc.

LAN

1

C1661

0.1U_0402_16V4Z~D

2

1

34 58Tuesday, December 29, 2009

C1639

0.1U_0402_16V4Z~D

1.0

5

4

3

2

1

3 in 1 Card Reader CONN

+3V_MCVCC

JCARD1

1

SD-WP-SW

2

SD-DAT1

3

SD-DAT0

4

SD-GND

5

MS-GND

6

MS-BS

7

SD-CLK

8

MS-DAT1

9

MS-DAT0

10

SD-VCC

11

MS-DAT2

12

SD-GND

13

MS-INS

14

MS-DAT3

15

SD-CMD

16

MS-SCLK

17

MS-VCC

18

SD-DAT3

19

MS-GND

20

SD-DAT2

21

SD-CD-SW

TAITW_R009-121-LK_RV

SP07000KT00

SP07000KT00 CONN@

CONN@

1 2

1394 CONN

J1

1

TPB-

2

TPB+

3

TPA-

4

TPA+

FOX_UV31413-WS23P-7F~D

DC235000T0L

CONN@

GND GND GND GND

GND1 GND2

+3V_MCVCC

+3VS

8 7 6 5

22 23

CLK_PCIE_CR#16 CLK_PCIE_CR16

PCIE_ITX_CRRX_N519 PCIE_ITX_CRRX_P519

1 2 1 2

PLT_RST#8,17,37

CR_CPPEN19

C1682

1

0.1U_0402_16V4Z

2

+1.8VS_APVDD+3VS

40mil

1

C1664

2

22U_0805_6.3V6M

R677

1 2

8.2K_0402_1%

1 2

C1679 0.1U_0402_16V7KC1679 0.1U_0402_16V7K

R684 0_0402 _5%@R684 0_0402_5%@

1 2

1

2

1

C1669

2

0.1U_0402_16V4Z

T71 PAD @T7 1 PAD @

0.1U_0402_16V4Z

PCIE_IRX_CRTX_N5_C PCIE_IRX_CRTX_P5_C

APREXT

APREXT 12 mil

XIN XOUT

+3VS

XDCD1#_MSCD# XDCD0#_SDCD#

+3V_MCPWR

1

C1670

C1671

2

0.1U_0402_16V4Z

U45

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

38

TXIN

39

TXOUT

30

TAV33

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB380-QGAZ0B_QFN48_7X7

1

C1672

2

1000P_0402_50V7K

JMB380

1

C1674

C1673

@

2

33_0402_1%

56.2_0402_1%~D

12

R695

220P_0402_50V8K

1

2

33_0402_1%

22P_0402_50V8J

56.2_0402_1%~D

12

4.99K_0402_1%

12

C1683

0.1U_0402_16V4Z

4.7U_0603_6.3V6M

APVDD

APV18

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

TPA1P

TPBIAS_1

TREXT

APGND

TCPS TPB1N TPB1P TPA1N

TPAD

5 10

19 20 44 18 37

48 47 46 45 43 42 41

MDIO7

40 29 28 27 26

MDIO12

25

MDIO13

23

MDIO14

22

IEEE1394_TPAP0

34

IEEE1394_TPBIAS0

35 36

6

24

IEEE1394_TPBN0

31

IEEE1394_TPBP0

32

IEEE1394_TPAN0

33

49

GND

+1.8VS_APVDD

+3VS

+1.8VS_APVDD

XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 SDCMD_MSBS_XDW E# MDIO5

R681 33_040 2_1%R681 33_0402_1%

XDWP_SDW P

1 2

R686 12K_0402_1%R686 12K_0402_1%

1 2

R689 10K_0402_1%R689 10K_0402_1%

Layout Note: Add GND shield for 1394.

IEEE1394_TPBN0

IEEE1394_TPBP0

IEEE1394_TPAN0

IEEE1394_TPAP0

R701

C1512

56.2_0402_1%~D

12

R696

R703

12

1

2

33_0402_1%

C1511

22P_0402_50V8J

XDCE_SDCLK_MSCLK

R698

56.2_0402_1%~D

R698

56.2_0402_1%~D

R697

12

IEEE1394_TPBIAS0

0.33U_0402_10V6K

1

C1684

Minimize this distance between

2

IC and terminating resistor.

40mil

1

C1665

D D

C C

C1665

2

0.1U_0402_16V4Z

C1677 22P_0402_50V8JC1677 22P_0402_50V8J

12

C1678 22P_0402_50V 8JC1678 22P_0402_50V8J

1

C1666

2

0.1U_0402_16V4Z

XIN

R678

Y5

1M_0402_5%

24.576MHZ_16P_X8A024576FG1H

1 2

XOUT

1

C1667

C1668

2

0.1U_0402_16V4Z

PCIE_IRX_CRTX_N519 PCIE_IRX_CRTX_P519

C1675 0.1U_0402_16V7KC1675 0.1U_0402_16V7K C1676 0.1U_0402_16V7KC1676 0.1U_0402_16V7K

GPIO PIN

+3VS

R688 4.7K_0402_1%R688 4.7K_0402_1%

1 2

R690 4.7K_0402_1%R690 4.7K_0402_1%

B B

Memory Card Power Switch

+3V_MCPWR

U46

@U46

@

1

GND

2

IN

3

IN

4

EN#

TPS2061DRG4_SO8

+3V_MCPWR

XDCD1#_MSCD#

XDCD0#_SDCD#

8

OUT

7

OUT

6

OUT

5

FLG

R700 300_0603_5%

300_0603_5%

2

G

+3V_MCVCC+3V S

@R700

@

12

13

D

Q44

Q44 2N7002_SOT23

2N7002_SOT23

S

40mil

C1680

C1681

1

4.7U_0805_10V4Z

2

0.1U_0402_16V4Z

@

XDWP_SDW P XD_SD_MS_D1 XD_SD_MS_D0

SDCMD_MSBS_XDW E# XDCE_SDCLK_MSCLK XD_SD_MS_D1 XD_SD_MS_D0

XD_SD_MS_D2

XDCD1#_MSCD# XD_SD_MS_D3 SDCMD_MSBS_XDW E# XDCE_SDCLK_MSCLK

12

XD_SD_MS_D3

R694

XD_SD_MS_D2 XDCD0#_SDCD#

1

2

R6910_0402_5%~DR6910_0402_5%~D

1 2

R6920_0402_5%~DR6920_0402_5%~D

1 2

DLW21SN121SQ2L_4P~D

@

4

1

L47

DLW21SN121SQ2L_4P~D

@

4

1

L48

1 2

R693 0_0402_5%~DR693 0_0402_5%~D

1 2

R699 0_0402_5%~DR699 0_0402_5%~D

Layout Note: Shield GND for IEEE1394_TPA and TPB

SDCMD_MSBS_XDW E#

XDWP_SDW P

MDIO7

MDIO13

MDIO12

MDIO14

IEEE1394_TPBN0_R

IEEE1394_TPBP0_R

IEEE1394_TPAN0_R

IEEE1394_TPAP0_R

R679 10K_ 0402_5%R679 10K_ 0402_5%

R680 10K_ 0402_5%R680 10K_ 0402_5%

R682 10K_ 0402_5%R682 10K_ 0402_5%

R683 1K_0 402_1%R683 1K_0402_1%

R685 200K _0402_1%R685 200K_0402_1%

R687 200K _0402_1%R687 200K_0402_1%

3

2

3

2

+3V_MCPWR

A A

1 2

R704 0_0805 _5%R704 0_0805 _5%

5

+3V_MCVCC

1

C1685

4.7U_0805_10V4Z

2

DELL CONFIDENTIAL/PROPRIETARY

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CARD READER/1394

LA-5811P

1

1.0

35 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

IO Board CONN

D D

+5VALW+3VS

EC_EAPD37

EC_MUTE#37

IO_BOARD_CONN38

HDA_BITCLK18

USB_EN_R#37

USB_OC#019 USB_OC#119

ICH_SMBDATA14,15,16,19,33

ICH_SMBCLK14,15,16,19,33

ACCEL_INT#17

FFS_INT219,32

+1.5VS

C C

+5V_CHGUSB

R302

1 2

R302 75K_0402_1%

75K_0402_1%

1 2

R309

49.9K_0402_1%~D

1 2

R301

43.2K_0402_1%~D

B B

R308

49.9K_0402_1%~D

JBTB1

+5VS

515152

49

47

45

43

41

39

37

35

33

31

29

27

25

23

21

19

17

15

13

11

9

7

5

3

1

E-T_1001-F50C-02R

52 50

50

48

46

44

42

40

38

36

34

32

30

28

26

24

22

20

18

16

14

12

10

8

6

4

2

USB20_P219

USB20_N219 PWRSHARE_OE# 37

USB_CHARGE_D+

USB_CHARGE_D-

BEEP# 37 HDA_SYNC 18

HDA_SDOUT 18

HDA_SDIN0 18 HDA_RST# 18 SB_SPKR 19

DMIC_CLK 29

DMIC_DATA 29

USB20_N0 19 USB20_P0 19

USB20_N1 19

USB20_P1 19

+3VALW

LID_SW# 37,38

U51

1

1D+

2

1D-

3

2D+

4

2D-

GND5OE#

TS3USB221RSER_QFN10_2x1P5~D

VCC

10

9

S

8

D+

7

D-

6

S Logic"1" Work from BKT

C466

0.1U_0402_16V4Z~D

1 2

+3VALW

PWRSHARE_OE#

USBP2_D+_C

USBP2_D-_C

S Function

OE#

X

L H

2.0A

OC1# OUT1 OUT2 OC2#

+5V_CHGUSB

8 7 6 5

USB_OC#2 19

+5VALW

PWRSHARE_EN #37

10U_1206_16V4Z

1

C1581

C1580

2

A A

2

0.1U_0402_16V4Z

U38

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

RTCVREF RTCVREF RTCVRE F R TCVREF

R1143

10K_0402_1%~D R1143

USB_DETECT#

12

H

Disconnect

D=1D

L

D=2D

L

10K_0402_1%~D

12

R307

R307 100K_0402_5%~D

100K_0402_5%~D

2.2U_0603_10V7K~D

C1105

220K_0402_5%

12

R1144

12

TC7SZ14FU_SSOP5~D

USBP2_D-_C USBP2_D-

USBP2_D+_C

D51

SDMK0340L-7-F

D51

SDMK0340L-7-F

2 1

1 2

U60

2 1

D52

D52 SDMK0340L-7-F

SDMK0340L-7-F

Power share

CLOSE TO U48

C1068

1

0.1U_0402_16V4Z~D

2

5

P

NC

4

Y

A

G

3

100K_0402_5%~D

R1145

12

fix +3VALW leakage on Batt mode

R617 0_0402 _5%R617 0_0402 _5%

1 2

L43

@L43

@

1

4

WCM2012F2S-900T04_0805

R618 0_0402 _5%R618 0_0402 _5%

1 2

2

3

13

D

2

G

S

R1238 0_0402_5%~D@R1238 0_0402_5%~D@

1 2

D58

D58 SDMK0340L-7-F

SDMK0340L-7-F

Q57

Q57 2N7002_SOT23

2N7002_SOT23

21

51ON# 39,43

USB_DET#_DELAY 37

USBP2_D+

PJDLC05C_SOT23-3

1

@

D25

+5V_CHGUSB

1

+

C1578

2

150U_B2_6.3V-M~D

2

3

2.0A

0.1U_0402_16V4Z

1

C1579

2

USB_DETECT#

JUSB1

1

VBUS

2

D-

3

D+

4

GND

7

GND

8

POS5GND POS

GND GND

9 10

6

FOX_UB1112C-RADAG-7F

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

USB/LID SW/IO CONN

LA-5811P

1

1.0

36 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

RSMRST circuit

RSMRST#POK

12

EC_RSMRST# 19

C1590 0.1U_0402_16V4Z@ C1590 0.1U_0402_16V4Z@

U40

@U40

@

5

MC74VHC1G08DFT2G SC70 5P

P

4

Y

G

3

12

POK45

R619

@ R619

@

KEYBOARD

D D

CONN.

KSI7 KSI6 KSI4 KSI2 KSI5 KSI1 KSI3 KSI0 KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2 KSO0 KSO12 KSO16 KSO15 KSO13 KSO14 KSO9

C C

KSO11 KSO10

PLT_RST#

PLT_RST#8,17,35

+3VALW

R636 10K_0402_5%R636 10K_0402_5%

1 2

R638 10K_0402_5%@ R638 10K_0402_5%@

1 2

R639 8.2K_0402_5%R639 8.2K_0402_5%

1 2

B B

A A

R642 8.2K_0402_5%R642 8.2K_0402_5%

+3VALW

R643 47K_0402_5%R643 47K_0402_5%

1 2

R644 47K_0402_5%R644 47K_0402_5%

+3VALW

R651 10K_0402_5%R651 10K_0402_5%

R665 10K_0402_5%@R665 10K_0402_5%@

+5VALW

1 2

R645 4.7K_0402_5%R645 4.7K_0402_5%

1 2

R646 4.7K_0402_5%R646 4.7K_0402_5%

+3VS

1 2

R648 2.2K_0402_5%R648 2.2K_0402_5%

1 2

R649 2.2K_0402_5%R649 2.2K_0402_5%

1 2

R650 4.7K_0402_5%R650 4.7K_0402_5%

R652 4.7K_0402_5%R652 4.7K_0402_5%

1 2

R653 10K_0402_5%R653 10K_0402_5%

0_0402_5%

JKB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

25 GND GND

ACES_88502-2501

SP01000MZ00

SP01000MZ00 CONN@

CONN@

EC_PME#

12

EC_MUTE#

EC_SMI#

EC_SCI#

KSO1

KSO2

12

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

BT_RADIO_OFF#

PLT_RST#

12

BT_DET#

12

R620 0_0402_5%R620 0_0402_5%

+5VS

KB_LED_R_DRV#38 KB_LED_G_DRV#38 KB_LED_B_DRV#38

27 26

+3VALW

2

B

1

A

R634 0 _0402_5%R634 0_0402_5%

LVDS_CONN

LID_SW#

5

CLK_PCI_EC

JKBBL1

8

GND

7

GND

6

5

4

3

2

1

TYCO_2041070-6~D

SP01000V80L

SP01000V80L CONN@

CONN@

+3VALW

12

47K_0402_5%

R624

2

C1589

0.1U_0402_16V4Z

1 2

PLT_RST#_Buff

1

1 2

20M_0603_5%@

32.768KHZ_12.5P_1TJE125DP1A000M

1 2

1

C1617

C1617 18P_0402_50V8J

18P_0402_50V8J

2

12

@ R621

@

1

@ C1582

@

2

PM_CLKRUN#19

12

R633

R633 100K_0402_5%

100K_0402_5%

EC_SMB_CK142 EC_SMB_DA142 EC_SMB_CK24,21 EC_SMB_DA24,21

BT_RADIO_OFF#33

FAN_SPEED132

CAM_ON/OFF#29

PWRSHARE_OE#36

R647

X1

+3VALW

R621

10_0402_5%

C1582

22P_0402_50V8J

GATEA2018 KB_RST#18 SERIRQ19

LPC_FRAME#1 8,33

LPC_AD318,33 LPC_AD218,33 LPC_AD118,33 LPC_AD018,33

CLK_PCI_EC16

EC_SCI#19

PLT_RST#_Buff 33,34

WLAN_BT_LED#38

SLP_S3#19,38 SLP_S5#19,38 EC_SMI#19 LID_SW#36,38

LVDS_CONN29

EC_PME#17,34

EC_FSB_SEL16

EC_TX33 EC_RX33

ON/OFF_EC#39 3V_F347_ON38

1

C1616

C1616 18P_0402_50V8J

18P_0402_50V8J

2

4

1

C1583

2

4.7U_0603_6.3V6K

GATEA20

KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST#_Buff EC_RST# EC_SCI#

1 2

R267 0_0402_5%@R267 0_0402_5%@

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI# LID_SW# BT_RADIO_OFF# LVDS_CONN EC_PME# EC_FSB_SEL FAN_SPEED1 CAM_ON/OFF# EC_TX EC_RX ON/OFF_EC# 3V_F347_ON PWRSHARE_OE#

XCLKI XCLKO

C1584

0.1U_0402_16V4Z

C1584

0.1U_0402_16V4Z

1

2

1 2 3 4 5 7 8

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

C1586

0.1U_0402_16V4Z

C1586

0.1U_0402_16V4Z

C1585

1

2

U39

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1

LPC & MISC

LAD0

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

KB926QFD3_LQFP128_14X14

9

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_AVCC

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

Issued Date

1

C1587

0.1U_0402_16V4Z

2

ECAGND

67

AVCC

INVT_PWM/PWM 1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

69

ECAGND

2009/07/25 2010/07/25

3

FBMA-L11-160808-601LMT_2P

1

C1588

4.7U_0603_6.3V6K

2

R623

INV_PWM

21

BEEP#

23 26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64

ADP_I

65

AD_BID

66

BT_DET#

75 76

68

EN_DFAN1

70

IREF

71

CHGVADJ

72

EC_MUTE#

83

USB_EN_R#

84 85

CHRG_STATE#

86

TP_CLK

87

TP_DATA

88

97

EN_WOL#

98

BT_OFF#

99

VGATE

109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

WLAN_RADIO_OFF#

73

USB_DET#_DELAY

74

FSTCHG

89

EN_INVPWR

90

CAPS_LED#

91

BATT_LOW_LED

92

LCD_TEST

93

SYSON

95

VR_ON

121

ACIN

127

RSMRST#

100

EC_LID_OUT#

101

EC_ON

102

EC_SWI#

103

PM_PWROK

104

BKOFF#

105

WWAN_RA DIO_OFF#

106

LCD_VCC_TEST_EN

107

PSID_DISABLE#

108

SLP_S4#

110

ENABLT

112

EC_EAPD

114

EC_THERM#

115

SUSP#

116

PBTN_OUT#

117

PS_ID

118

V18R

124

C1606

0.1U_0402_16V4Z

@

Compal Secret Data

L44

INV_PWM 28,29 BEEP# 36 PWRSHARE_EN # 36 ACOFF 43,44

BATT_TEMP 42 BATT_OVP 42 ADP_I 44

BT_DET# 33

EN_DFAN1 32 IREF 44 CHGVADJ 44

EC_MUTE# 36 USB_EN_R# 36

CHRG_STATE# 38

EN_WOL# 40 BT_OFF# 33 VGATE 19,51

2

1

C1607

1

2

4.7U_0603_6.3V6K

Deciphered Date

+3VALW

12

0_0402_5%

4.7K_0402_5%

WLAN_RADIO_OFF# 33

USB_DET#_DELAY 36 FSTCHG 44 EN_INVPWR 29 CAPS_LED# 38 BATT_LOW_LED 38 LCD_TEST 29 SYSON 40,48 VR_ON 51

ACIN 19,38,43

EC_LID_OUT# 19 EC_ON 39 EC_SWI# 19 PM_PWROK 8,19,51 BKOFF# 29 WWAN_RA DIO_OFF# 33 LCD_VCC_TEST_EN 29 PSID_DISABLE# 43

SLP_S4# 19 ENABLT 28 EC_EAPD 36 EC_THERM# 19 SUSP# 40,44,46,49 PBTN_OUT# 19 PS_ID 43

Board ID

AD_BID

R625

0_0402_5%

@

1 2

12

R626

@

9.09K_0402_1%

100K_0402_5%

12

R627

20K_0402_5%

R622

+3VALW

R628

37.4K_0402_1%

1 2

12

BOARD ID Table

RbRa

NC

9.09K 20K

37.4K

R629

12

+5VS

12

ID

0 1 2 3

R630

4.7K_0402_5%

BOARD ID

0.1(X00)

0.2(X01)

0.3(X02)

1.0(A00)

TP_CLK 39 TP_DATA 39

100K 100K 100K

System SPI Flash ROM (16Mb)

U41

1

CS#

2 3 4

ACIN

1

2

0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet of

VCC

SO

HOLD#

WP#

SCLK

GND

SI

MX25L1605AM2C-12G_SO8

Close EC pin 126

Compal Electronics, Inc.

EC/KB CONN

LA-5811P

R631 10K_0402_5%R631 10K_0 402_5%

8

1 2

7

SPI_CLK_R

6

SPI_SI

5

FSEL#SPICS#

R635 0_0402_5%R635 0_0402_5%

R637 0_0402_5%R637 0_0402_5%

FRD#SPI_SO

R640 0_0402_5%R640 0_0402_5%

SPI_CLK SPI_CLK_R

R641

33_0402_5%

1

2

+3VALW

INT_SPI_CS# SPI_SO

1 2

R632 10K_0402_5%R632 10K_0402_5%

KSO8

C1594 100P_0402_25V8K@ C1594 100P_0402_25V8K@

KSI3

C1596 100P_0402_25V8K@ C1596 100P_0402_25V8K@

KSO9

C1598 100P_0402_25V8K@ C1598 100P_0402_25V8K@

KSI2

C1600 100P_0402_25V8K@ C1600 100P_0402_25V8K@

KSI1

C1602 100P_0402_25V8K@ C1602 100P_0402_25V8K@

KSO10

C1604 100P_0402_25V8K@ C1604 100P_0402_25V8K@

KSO11

C1608 100P_0402_25V8K@ C1608 100P_0402_25V8K@

KSI0

C1611 100P_0402_25V8K@ C1611 100P_0402_25V8K@

KSO12

C1612 100P_0402_25V8K@ C1612 100P_0402_25V8K@

KSO13

C1614 100P_0402_25V8K@ C1614 100P_0402_25V8K@

KSO14

C1618 100P_0402_25V8K@ C1618 100P_0402_25V8K@

KSO15

C1620 100P_0402_25V8K@ C1620 100P_0402_25V8K@

KSO16

C1622 100P_0402_25V8K@ C1622 100P_0402_25V8K@

EC Team request

C1592

Ra

Rb

Vab

0V

0

0.25V

0.50V

0.82V

*

+3VALW

1

C1591

2

0.1U_0402_16V4Z

KSI7

KSI6

KSI5

KSO0

KSO1

KSO2

KSI4

KSO3

KSO4

KSO5

KSO6

KSO7

0.1U_0402_16V4Z

1.0

12

1

2

37 58Tuesday, December 29, 2009

INT_SPI_CS#

SPI_SIFWR#SPI_SI

SPI_SO

C1593

C1593 12P_0402_50V8J

12P_0402_50V8J

C1595100P_040 2_25V8K @C1595100P_0 402_25V8K @

C1597100P_040 2_25V8K @C1597100P_0 402_25V8K @

C1599100P_040 2_25V8K @C1599100P_0 402_25V8K @

C1601100P_040 2_25V8K @C1601100P_0 402_25V8K @

C1603100P_040 2_25V8K @C1603100P_0 402_25V8K @

C1605100P_040 2_25V8K @C1605100P_0 402_25V8K @

C1609100P_040 2_25V8K @C1609100P_0 402_25V8K @

C1610100P_040 2_25V8K @C1610100P_0 402_25V8K @

C1613100P_040 2_25V8K @C1613100P_0 402_25V8K @

C1615100P_040 2_25V8K @C1615100P_0 402_25V8K @

C1619100P_040 2_25V8K @C1619100P_0 402_25V8K @

C1621100P_040 2_25V8K @C1621100P_0 402_25V8K @

5

4

3

2

1

+3.3V_F347

1

C1846

1U_0805_10V7

D D

@

R279

R279 0_0603_5%

0_0603_5%

1 2

+5VALW

1 2

+5VS

R140

R140 0_0603_5%

0_0603_5%

C C

B B

A A

2

C1850

1U_0805_10V7

SLP_S3#19,37

ACIN19,37,43

CHRG_STATE#37

2

5

R139 0_0603 _5%R139 0_0603 _5%

C1842

0.1U_0402_16V4Z

W=40mils

+3.3V_F347

1

C1849

0.1U_0402_16V4Z

2

5

G1

6

G2

MOLEX_53398-0471~D

@

2

G

2

G

2

G

1 2

JP4

1

2

3

4

+3.3V_F347

12

13

+3.3V_F347

12

R763

R763 100K_0402_1%

100K_0402_1%

13

+3.3V_F347

12

R762

R762 100K_0402_1%

100K_0402_1%

13

1 2

R277

R277 1K_0402_1%

1K_0402_1%

+3.3V_F347

R760

R760 100K_0402_1%

100K_0402_1%

D

Q42

Q42 2N7002_SOT23

2N7002_SOT23

S

D

Q40

Q40 2N7002_SOT23

2N7002_SOT23

S

CHRG_STATE

D

Q38

Q38 2N7002_SOT23

2N7002_SOT23

S

C1843

0.1U_0402_16V4Z

SLP_S3

ACIN#

1

2

USB20_P319 USB20_N319

+3.3V_F347

1

2

C1867

0.1U_0402_16V4Z@C1867

0.1U_0402_16V4Z

1

@

2

1

C1863

0.1U_0402_16V4Z@C1863

0.1U_0402_16V4Z

@

1

2

SLP_S5#19,37

C313

C313 22P_0402_50V8J

22P_0402_50V8J

USB20_P3 USB20_N3

C1862

0.1U_0402_16V4Z@C1862

0.1U_0402_16V4Z

1

@

2

C1865

0.1U_0402_16V4Z@C1865

0.1U_0402_16V4Z

C1866

0.1U_0402_16V4Z@C1866

0.1U_0402_16V4Z

1

@

2

10K_0402_5%

3V_F347_ON37

0.1U_0402_16V4Z@C1861

0.1U_0402_16V4Z

R769

C1861

@

1

2

G

4

U42

6

VDD

4

D+

5

D-

7

REGIN

8

VBUS

9

RST#/C2CK

10

P3.0/C2D

18

P2.0

17

P2.1

16

P2.2

15

P2.3

14

P2.4

13

P2.5

12

P2.6 P2.711GND

C8051F347-GQ_LQFP32_7X7

C1860

0.1U_0402_16V4Z@C1860

0.1U_0402_16V4Z

1

@

2

C1864

0.1U_0402_16V4Z@C1864

0.1U_0402_16V4Z

@

12

R770

10K_0402_5%

+3.3V_F347

12

R759

R759 100K_0402_1%

100K_0402_1%

13

D

Q39

Q39 2N7002_SOT23

2N7002_SOT23

S

12

R774

R774 100K_0402_1%

100K_0402_1%

SLP_S5

+3VALW B+

2

G

P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7

12

R768

R768 10K_0402_5%

10K_0402_5%

SPI_MOCS#

+3VALW

12

R775

R775 100K_0402_1%

100K_0402_1%

13

D

Q55

Q55 2N7002_SOT23

2N7002_SOT23

S

SPI_MOCLK

2

SPI_MOSO

1

SPI_MOSI

32

SPI_MOCS#

31

I2C_DAT

30

I2C_CLK

29

C1857 0.1U_0402_16V4Z@C1857 0.1U_0402_16V4Z@

28 27

SLP_S3

26

CHRG_STATE

25

ACIN#

24

LID_SW#

23 22

SLP_S5

21

C1858 0.1U_0402_16V4Z@C1858 0.1U_0402_16V4Z@

20

C1859 0.1U_0402_16V4Z@C1859 0.1U_0402_16V4Z@

19

3

U59

1

CE#

3

WP#

7

HOLD#

4

VSS

MX25L8005M2C-15G_SOP8

2

SI3456BDV-T1-E3 1N TSOP6

6

2 1

R773

R773 100K_0402_1%

100K_0402_1%

1 2

@

J2

JUMP_43X118

2

G

+3.3V_F347

12

R777

4.7K_0402_1%

1 2

LID_SW# 36,37

BATT_LOW_LED 37

1 2 1 2

VDD SCK

SI

SO

112

Q49

D

S

45

G

1

3

2

13

D

Q43

Q43 2N7002_SOT23

2N7002_SOT23

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R778

4.7K_0402_1%

+3.3V_F347+3.3V_F347 +3.3V_F347

8

R764 1 5_0402_5%R764 15_0402_5%

6

R765 1 5_0402_5%R765 15_0402_5%

5

R766 1 5_0402_5%R766 15_0402_5%

2

1

C1851

C1851 22P_0402_50V8J~D

22P_0402_50V8J~D

2

+3.3V_F347

4.7U_0603_6.3V

C1853

0.1U_0402_16V4Z

3

+3.3V_F347

R776

R776 1K_0402_5%

1K_0402_5%

1 2

1

C1852

0.1U_0402_16V4Z

2

1 2 1 2 1 2

1

C170

1

2

12

R772

R772 100K_0402_1%

100K_0402_1%

2

C1854

0.1U_0402_16V4Z

2009/07/25 2010/07/25

SPI_MOCLK SPI_MOSI SPI_MOSO

Compal Secret Data

+3.3V_F347

12

R753

4.7K_0402_1%

R754

4.7K_0402_1%

R757

4.7K_0402_1%

12

R755

4.7K_0402_1%

D30

PESD5V2S2UT_SOT23-3~D

D30

+3.3V_F347 behavior

S0 S3 S4 S5

AC IN

BAT only

ON ON ON ON

ON ON OFF OFF

AC mode battery full in S5:turn off ELC controller

Reference AD2 AD1 AD0 MAX7313

DB

U6

Deciphered Date

0 1 0

0 1 1

0 0 1

2

K/B Backlight

AD2 AD1 AD0 0 0 1

INT#_1

I2C_CLK I2C_DAT

AD1_0 AD1_1 AD1_2

2

3

1

STATE

+3.3V_F347

U6

22

INT#/O16

19

SCL

20

SDA

18

AD0

23

AD1

24

AD2

14

P12

15

P13

16

P14

17

P15

GND9GND

MAX7313ATG+T_TQFN24_4X4

21

V+

1

P0

2

P1

3

P2

4

P3

5

P4

6

P5

7

P6

8

P7

10

P8

11

P9

12

P10

13

P11

25

KB_LED_R_DRV# 37 KB_LED_G_DRV# 37 KB_LED_B_DRV# 37

Status Board CONN

JP3

3

SMBUS ADDRESSDEVICE 0100 000b

1010 000b

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

FCI_10089708-016010LF~D

CONN@

15

GND

1616GND

17 18

Close to CONN

38 58Wednesday, December 30, 2009

1

+3.3V_F347

+5VALW

+5VS

LID_SW#

SATA_LED#18

I2C_DAT I2C_CLK

CAPS_LED#37

WLAN_BT_LED#37

ON/OFFBTN#39

STATUS_BOARD_CONN29

IO_BOARD_CONN36

PESD24VS2UT_SOT23-3~D

2

D33

1

MAXIM - LED MAXIM - GPIO 0100 001b I2C EEPROM

L/R Headlight , Logo

CAP , Wireless Power Button , Eyes/Rim

K/B Backlight

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ELC/STATUS CONN

LA-5811P

1.0

5

D D

Touch pad Connector

+5VS

C1623

1U_0402_6.3V4Z

C C

TP_CLK37

2

TP_DATA37

1

3

D26

@

1

PJDLC05C_SOT23-3

1

2

C1624

2

100P_0402_50V8J

4

JTP1

1

2

3

4

1

C1625

2

100P_0402_50V8J

5

G1

6

G2

P-TWO_196047-04041

CONN@

3

MB_Power On/Off SW

ON/OFFBTN#38

ON/OFFBTN#

0.1U_0402_25V6

C1626

1

2

EC_ON37

2

D27

2

1

R655

3

1 2

DAN202UT106_SC70-3

10K_0402_5%

100K_0402_5%

13

D

Q41

2

G

S

2N7002LT1G_SOT23-3

R654

+3VALW

12

ON/OFF_EC# 37

51ON# 36,43

@

1

C1627

C1627 1000P_0402_50V7K

1000P_0402_50V7K

2

1

12

@

D28

D28 RLZ20A_LL34

RLZ20A_LL34

For Debug Only

@

SW1

SW1 SMT1-05_4P

SMT1-05_4P

1

2

ON/OFFBTN#ON/OFFBTN#

3

4

5

6

B B

U1

S IC AV80577UG0133M SLGS6 R0 1.3G FCBGA

SU7300@

ZZZ

PCB-MB

@

H1

H1 H_2P3

H_2P3

H2

H2 H_2P3

H_2P3

@

1

H_3P8 *3 H_3P0 *1 H_3P0 *1 H_2P0X2P3N *1 H_2P0 *1

FD1

@

1

FIDUCIAL_C40M80

A A

FD2

@

1

FIDUCIAL_C40M80

5

FD3

@

1

FIDUCIAL_C40M80

FD4

@

1

FIDUCIAL_C40M80

H17

H18

H_2P3

H_3P8

@

1

4

H_2P3 *10 H_1P2 *2 H_4P2N *2

H13

H3

H3 H_2P3

H_2P3

1

H19

H19 H_3P8

H_3P8

1

@

H4

H4 H_2P3

H_2P3

1

H5

H6

H_2P3

@

1

H20

H20 H_3P0

H_3P0

@

1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

H7

H7 H_2P3

H_2P3

@

1

Issued Date

@

H8 H_2P3

H_2P3

1

3

H_2P3

@

1

H22

H22 H_3P0

H_3P0

@

1

2009/07/25 2010/07/25

H16

H11

H8

H13

H12

H_1P2

@

1

H24

H24 H_2P0X3P0N

H_2P0X3P0N

@

1

Compal Secret Data

Deciphered Date

H14

H_4P2N

@

H15

H_4P2N

@

1

H10

H10 H_2P0

H_2P0

@

1

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SW/TP/SCREW

LA-5811P

1

1.0

39 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

+3VALW to +3VS Transfer +5VALW to +5VS Transfer

U48

U47

SI4800BDY-T1-E3_SO8

8

10U_0805_10V4Z~D

B+_BIAS

330K_0402_5%

D D

SUSP

12

R705

RUNON 3VS_GATE

13

D

Q46

2

G

SSM3K7002FU_SC70-3

G

SSM3K7002FU_SC70-3

S

7

5

1

C1687

2

R707

1 2

100K_0402_5%

1 2 36

4

0.01U_0402_25V7K~D

1

C1696

2

+3VS+3VALW

0.1U_0402_16V7K~D

10U_0805_10V4Z~D

1

C1688

C1689

2

10U_0805_10V4Z~D

1

2

1 2

U48

SI4800BDY-T1-E3_SO8

8 7

5

C1686

R708

47K_0402_5%

4

5VS_GATERUNON

1

C1697

2

+1.5V to +1.5VSDGPU Transfer

SB54392008L EOL, P/N change to SB54800038L

10U_0805_10V4Z~D

C1699

1

2

D

Q50

PMF3800SN_SC70-3

S

RTCVREF

+1.5V

U49

8 7

5

SI4392DY-T1-E3_SO8~D

12

R714

2M_0402_5%~D

SYSON37,48 SUSP# 37,44,46,49

BATT1.1

12

R719

R719 1K_0402_5%~D

1K_0402_5%~D

2

3

1

C C

DGPU_PWR_EN#

B B

SUSP

2

G

A A

SUSP

2

G

B+_BIAS

R711

330K_0402_5%

2

G

+5VS

12

R718

470_0402_5%

13

D

Q52

SSM3K7002FU_SC70-3

S

+3VS

12

R726

470_0402_5%

13

D

Q56

S

SSM3K7002FU_SC70-3

12

13

5

+1.5VSDGPU

8A

3 2 16

4

1

C1702

0.01U_0402_25V7K~D

2

12

R715

100K_0402_5%

SYSON# SUSP

61

Q51A

SYSON

2

D29

D29 BAT54CW_SOT323-3~D

BAT54CW_SOT323-3~D

+RTCVCC

1

C1704

C1704 1U_0603_10V4Z

1U_0603_10V4Z

2

C1701

10U_0805_10V4Z~D

C1701

10U_0805_10V4Z~D

C1700

0.1U_0402_16V4Z~D

C1700

0.1U_0402_16V4Z~D

1

2

+5VALW+5VALW

12

R716

100K_0402_5%

3

Q51B

5

10K_0402_5%

4

2N7002DW-7-F_SOT363-6

SUSP#

1 2

4

DGPU_PWR_EN#23

SUSP#37,44,46,49

DGPU_PWR_EN19,23,47,50

R717

1 2 36

0.01U_0402_25V7K~D

R712

R712 100K_0402_5%

100K_0402_5%

+5VS+5VALW

0.1U_0402_16V7K~D

10U_0805_10V4Z~D

1

C1690

C1691

2

EN_WOL#37

+5VALW

R713

R713 100K_0402_5%

100K_0402_5%

1 2

DGPU_PWR_EN#

21

D13CH751H-40PT_SOD323-2 D13CH 751H-40PT_SOD323-2

12

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

13

D

2

G

Q48

S

2N7002_SOT23

R720

470_0402_5%

Q53A

SUSP SUSPSYSON#SUSP

2

Issued Date

3

+1.5VS

12

61

2N7002DW-7-F_SOT363-6

2009/07/25 2010/07/25

+3VALW to +3LAN Transfer

W=40mils

B+_BIAS

470K_0402_5%

12

13

D

2

G

S

330K_0402_5%

+VCCP

R721

470_0402_5%

Q53B

5

Compal Secret Data

+3VALW

1U_0603_10V6K~D

1

C1692

2

R709

EN_WOL

Q47

Q47 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

B+_BIAS

12

R724

SUSP

2

G

Q36

Q36 2N7002_SOT23

2N7002_SOT23

12

3

4

2N7002DW-7-F_SOT363-6

Deciphered Date

Q45

SI3456BDV-T1-E3 1N TSOP6

D

6

2 1

12

R710

1.5M_0402_5%

G

R706

S

45

1 2

0_0603_5%

3

C1698

1 2

2200P_0402_50V7K~D

+1.5V to +1.5VS Transfer

U13

SI4800BDY-T1-E3_SO8

8

10U_0805_10V4Z

12

R725

R725 2M_0402_5%~D

2M_0402_5%~D

12

61

2N7002DW-7-F_SOT363-6

2

7

5

C1185

+1.5VS_GATE

13

D

S

R722

470_0402_5%

Q54A

2

1

2

+1.8V

Q54B

5

W=40mils

4

1

2

+0.75VS

+3V_LAN

22U_0805_6.3V6M

0.1U_0402_16V7K~D

1

C1693

C1694

C1695

2

@

+1.5VS+1.5V

1 2 36

C1703

0.01U_0402_25V7K~D

12

R723

470_0402_5%

3

4

2N7002DW-7-F_SOT363-6

1

C1193

Title

DC/DC INTERFACE

Size Document Number Rev

Custom

LA-5811P

Date: Sheet of

1

C1183

2

0.1U_0402_16V4Z~D

10U_0805_10V4Z

Compal Electronics, Inc.

1

1.0

40 58Tuesday, December 29, 2009

1.0

5

4

3

2

1

D D

Battery OVP

Turn Off

DC IN

C C

Input Switch

Page 45

Power block

Page 43

B+

CPU OTP

Page 43

Turn Off

+3VALWP: TDC:5.1A +5VALWP: TDC:5.8A TPS51427

Page 46

Always

CHARGER CC:0A~3A CV:12.6V(3cell) ISL6251AHAZ-T

Page 45

+VCCP:TDC:13.57A

Battery

B B

TPS51218DSCR

+1.05VCCP:TDC:2.681A TPS51218DSCR

+1.8VP: Ipeak:0.42A RT9025

Page 47

DGPU_PWR_EN

Page 48

SUSP#

Page 50

SUSP#

DGPU_PWR_EN

VR_ON

A A

5

+VGA CORE TDC:21.525A TPS51218DSCR

CPU CORE Ipeak:19A ISL6261ACRE

+1.5VSP TDC:11.77A

SYSON

TPS51218DSCR

Page 51

+0.75VSP: TDC:0A RT9026

Page 52

4

3

Page 49

+3VALW

Page 50

Title

POWER BLOCK DIAGRAM

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

41 58Tuesday, December 29, 2009

1

5

4

3

2

1

CPU OTP

1

PD20

PD20 PJSOT24C_SOT23-3

D D

PJP31 battery connector

C C

BATT+

PL14

SMB3025500YA_2P

BATT+

1 2

12

PC195

0.01U_0402_25V7K~D

PC194

100P_0402_50V8J~D

SMART

SMARTSMART Battery:

Battery:

Battery:Battery:

11.BAT+

11.BAT+11.BAT+

10.BAT+

10.BAT+10.BAT+

9.BAT+

9.BAT+9.BAT+

8.ID

8.ID8.ID

7.B/I

7.B/I7.B/I

6.TS

6.TS6.TS

5.SMD

5.SMD5.SMD

4.SMC

4.SMC4.SMC

3.GND

3.GND3.GND

2.GND

2.GND2.GND

1.GND

1.GND1.GND

BATT++

12

PC193

PC193 1000P_0402_50V7K~D

1000P_0402_50V7K~D

MOLEX_87437-1173_11P-T

SP020907230

11 10

PJP31

BATT++

3S/4S#

+3VALWP

1 2

PR219

100_0402_5%~D

1 2

PR222

100_0402_5%~D

PR212

PR212 47K_0402_5%~D

47K_0402_5%~D

3S/4S# 44

12

PC196

100P_0402_50V8J~D

11 10 9

9

8

7

6

5

4

3

2

1

PJSOT24C_SOT23-3

@

2

3

EC_SMB_DA1 37

EC_SMB_CK1 37

PR217

1K_0402_5%~D

1

PD21

PD21 PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

@

2

3

Place clsoe to EC pin

BATT_TEMP

1 2

PR213

1K_0402_5%~D

12

1 2

PR215

6.49K_0402_1%~D

PC198

0.1U_0402_16V7K~D

1 2

@

+3VALWP

BATT_TEMP 37

PC22

1000P_0402_50V7K~D

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C Recovery at 50 +-3 degree C

VSVL

12

PR39

10.7K_0402_1%~D

PR43

61.9K_0402_1%~D

OTP_IN OTP_IN+

12

61.9K_0402_1%~D

1 2

VL

PR45

12

PH1

PH1 100K_0402_1%_NCP15WF104F0 3RC

100K_0402_1%_NCP15WF104F0 3RC

PR45

150K_0402_1%~D

PR47

PR40

147K_0402_1%~D

1 2

OTP_IN-

12

8

3

P

+

0

2

-

G

PU11A

4

LM358ADR_SO8

PC23

PC23 1U_0603_10V6K~D

1U_0603_10V6K~D

OTP_OUT

1

VL

1 2

PD11

1 2

1SS355TE-17_SOD323-2

PR41

PR41 205K_0402_1%~D

205K_0402_1%~D

MAINPWON 43,45

BATT+

12

PR223

PR223 453K_0402_1%~D

453K_0402_1%~D

VS

PC201

0.01U_0402_25V7K~D

12

PR224

499K_0402_1%~D

12

PR229

86.6K_0402_1%~D

12

PC203

0.01U_0402_25V7K~D

B B

A A

B+

+5VALW

PR228

PC204

0.1U_0603_25V7K~D

1 2

220K_0402_5%

12

PR225

1 2

100_0805_5%~D

PR226

12

PD22

1SS355TE-17_SOD323-2

PR230

1 2

220K_0402_5%

PQ65

TP0610K-T1-E3_SOT23-3

13

32.8

PC202

1 2

2

470K_0402_5%~D

13

D

PQ66

2

G

RHU002N06_SOT323-3

G

RHU002N06_SOT323-3

S

B+_BIAS

MOLEX_53261-0271~D

1 2

0.1U_0805_25V7M~D

MOLEX_53261-0271~D

PJP32

1 2

SP020009Z0L

1 2

BATT1.1

PR227

12

BATT_OVP37

10K_0402_1%~D

7

PU11B

LM358ADR_SO8

LI-3S :13.5V----BATT-OVP=1.126V LI-4S :18V----BATT-OVP=1.5V BATT-OVP=0.08338*BATT+

COIN RTC Battery

12

8

5

P

+

0

6

-

G

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN/OTP

42 58Tuesday, December 29, 2009

1

5

ADPIN

DC_IN_S1

D D

C C

PJPDC1

ACES_88299-0610

VIN

GND GND

1 2 3 4 5 6

1 2 3 4 5 6 7 8

PD2

RLS4148_LL34

12

PC2

1000P_0402_50V7K~D

PL2

FBM-L11-160808-601LMT 0603~D

PR9

1K_1206_5%~D

1 2

PR11

1K_1206_5%~D

12

1 2

PR14

1K_1206_5%~D

1 2

1K_1206_5%~D

1 2

ACOFF37,44

PR15

DOCK_PSID

12

PR16

PR18

100K_0402_5%~D

13

PQ4

PQ4 DTC115EUA_SC70-3

2

DTC115EUA_SC70-3

4

PL1

FBMJ4516HS720NT_1806~D

1 2

12

PC3

100P_0402_50V8J~D

PQ1

TP0610K-T1-E3_SOT23-3

2

100K_0402_5%~D

12

PR20

13

100K_0402_5%~D

2

12

PC4

100P_0402_50V8J~D

13

PQ5

PQ5 DTC115EUA_SC70-3

DTC115EUA_SC70-3

3

Vin Detector

Max. typ. Min.

VIN

L-->H 18.234 17.841 17.449 H-->L 17.597 17.210 16.813

12

PC5

1000P_0402_50V7K~D

B+

ACIN

Precharge detector

Min. typ. Max. H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V

BATT ONLY

Precharge detector

Min. typ. Max. H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V

PC8

0.1U_0402_16V7K~D

DOCK_PSID

12

2

1

VIN

12

N41

12

PR7

20.5K_0402_1%~D

3

@

PD4

PD4 SM24_SOT23

SM24_SOT23

PR3

82.5K_0402_1%~D

PR6

PR6 22K_0402_1%~D

22K_0402_1%~D

1 2

12

PC7

PC7 1000P_0402_50V7K~D

1000P_0402_50V7K~D

PR19

1 2

100K_0402_1%~D

PR22

1 2

15K_0402_1%~D

PC1

2200P_0402_50V7K~D

@

1 2

N40

N35

10K_0402_5%~D

2

56K_0402_5%~D

1 2

PR2

PR2 1M_0402_1%~N

1M_0402_1%~N

1 2

VS

8

PU1A

3

P

+

2

-

G

LM393DR_SO8

4

PR10

12

@ PR 12

@

1 2

0_0402_5%~D

D

1 3

2

B

PR1

@

12

PC6

0.01U_0402_25V7K~D

1

O

RLZ4.3B_LL34

RTCVREF

3.3V

PR12

33_0402_5%~D

S

PQ2

PQ2 FDV301N_NL_SOT23-3~D

FDV301N_NL_SOT23-3~D

G

2

C

PQ3

PQ3 MMST3904-7-F_SOT323~D

MMST3904-7-F_SOT323~D

E

3 1

VIN

PD1

PR17

1 2

12

PR5

PR5 10K_0402_5%~D

10K_0402_5%~D

12

3

PD3

DA204U_SOT323~D

1

2

+5VALW

PR4

PR4 10K_0402_1%~D

10K_0402_1%~D

1 2

12

PR8

PR8 10K_0402_5%~D

10K_0402_5%~D

12

PR21

10K_0402_1%~D

1 2

VIN

PR23

10K_0402_1%~D@

1

ACIN

ACIN 19,37,38

PACIN 44

+3VALW+5VALW

PR13

1 2

2.2K_0402_5%~D

+5VALW

3

PD5

@

DA204U_SOT323~D

PS_ID 37

2

1

PSID_DISABLE# 37

PD6

RLS4148_LL34-2

PD7

RLS4148_LL34-2

51ON#36,39

PU2

3

OUT

4

5/3+

2

12

PR28

200_0805_5%~D

1 2

PR30

100K_0402_5%~D

PR31

22K_0402_5%~D

1 2

MAX1615_IN

1

IN

MAX1615_#SHDN

5

#SHDN

GND

MAX1615EUK+_SOT23-5~D

2

12

N1CHGRTCP

12

PC9

0.22U_0603_25V7K~D

1 2

PR120 0_0402_5%~DPR120 0_0402_5%~D

68_1206_5%~D

PQ6

TP0610K-T1-E3_SOT23-3

2

12

PR34

PR34 200_0805_5%~D

200_0805_5%~D

12

PC15

PC15 1U_0805_25V4Z~D

1U_0805_25V4Z~D

Title

Size Document Number Rev

Custom

Date: Sheet of

13

B+

12

PR27

12

PR33

PR36

47K_0402_5%~D

12

PQ8

PQ8 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

BATT+

12

PC13

RTCVREF

0.01U_0402_25V7K~D

PACIN

+5VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

PC14

4.7U_0805_6.3V6K~D

Compal Secret Data

Deciphered Date

PR24

VS

7

O

PU1B

34K_0402_1%~D

PR24

2.2M_0402_5%~D

12

8

5

P

+

6

-

G

4

PR35

12

499K_0402_1%~D

12

PC12

1000P_0402_50V7K~D

12

499K_0402_1%~D

PR32

191K_0402_1%~D

PRG++

PQ7

13

D

RHU002N06_SOT323-3

2

G

S

4

B B

12

PR29

100K_0402_1%~D

PD8

ACON44

2

3

RB715F_SOT323-3

1

12

PC11

0.1U_0603_25V7K~D

LM393DR_SO8

MAINPWON4 2,45

RTCVREF

A A

5

VL

RLS4148_LL34-2

1 2

12

PR26

PR25

13

PR26 68_1206_5%~D

68_1206_5%~D

VS

12

PC10

0.1U_0603_25V7K~D

Compal Electronics, Inc.

DCIN/DETECTOR

1

43 58Tuesday, December 29, 2009

5

4

3

2

1

Iada=0~3.333A(65W)

ADP_I = 19.5*Iadapter*Rsense

PQ11

AO4407A_SO8

VIN

D D

12

PR58

PR58 47K_0402_1%~D

47K_0402_1%~D

DTA144EUA_SC70-3

13

2

13

D

2

C C

G

PQ21

S

RHU002N06_SOT323-3

PACIN

PACIN43

ACON43

ACOFF

ACOFF37,43

B B

CP mode

Iinput=(1/0.02) ((0.05*Vaclm)/2 .39+0.05)

8 7

5

PQ16

2

PQ17

PQ17 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR76

22K_0402_5%~D

1 2

ACON

AO4407A_SO8

1 3

2

4

150K_0402_1%~D

1 2 36

12

PC31

PR68

2

G

13

PQ25

PQ25 DTC115EUA_SC70-3

DTC115EUA_SC70-3

P2

12

0.1U_0603_25V7K~D

12

13

D

S

PR59

PQ23

PQ23 RHU002N06_SOT323-3

RHU002N06_SOT323-3

Vaclim=2.87*((1 1.5K//152K)/((2 .87K//152K)+(11 .5K//152K)))

CC=3.3A

IREF=1*Icharge

IREF=0.25V~3.3V

CHGVADJ

0V

PQ12

AO4407A_SO8

1 2 3 6

4

200K_0402_1%~D

6251VDD

1 2

PR66

47K_0402_5%~D

3S/4S#42

PR79

147K_0402_1%~D

IREF37

100K_0402_1%~D

CV mode

3.99V per cell

8 7

5

1 2

PC32

5600P_0402_25V7K~D

1SS355TE-17_SOD323-2

FSTCHG37

13

2

PC41

1 2

0.01U_0402_25V7K~D

ADP_I37

12

PR80

6251VREF

PC48

1 2

11.5K_0402_1%~D

P3

PR61

PD15

100K_0402_1%~D

1 2

PR65

10K_0402_5%~D

1 2

PC34

0.1U_0402_16V7K~D

PQ19

PQ19 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PC37

@PC37

@

680P_0402_50V7K~D

CSON

1 2

PC39 6800P_0402_25V 7K~DPC39 6800P_0402_25V7K~D

1 2

PR72 10K_0402_1%~DPR72 10K_0402_1%~D

1 2

PC42

100P_0402_50V8J~D

@

PC43

1 2

0.1U_0402_16V7K~D

12

0.01U_0402_25V7K~D

PR82

12

2.74K_0402_1%~D

CHGVADJ37

PR57

0.02_2512_1%

1

2

12

PR83

4

3

TP0610K-T1-E3_SOT23-3

6251VDD

12

PR67

100K_0402_1%~D

PR74

100_0402_1%~D

1 2

6251VREF

PR84

25.5K_0402_1%~D

1 2

PR85

43.2K_0402_1%~D

B+

CSIN

PQ14

2

12

PC33

2.2U_0603_6.3V6K~D

6251_EN CSON

6251aclim

12

PR107

PR107 10_1206_5%~D

10_1206_5%~D

1 2

13

PR62

12

100K_0402_1%~D

PU4

1

VDD

2

ACSET

ACPRN

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

DCIN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

DCIN

PQ15

13

DTC115EUA_SC70-3

RB715F_SOT323-3

DCIN

24

23

22

21

20

19

18

17

BST_CHG

16

6251VDDP

15

DL_CHG

14

13

CSIP

PD13

FSTCHG

2

1

1 2

LX_CHG

DH_CHG

SUSP#

3

PC35

0.1U_0603_25V7K~D

12

PR69

20_0603_5%

1 2

PC38

0.047U_0603_16V7K~D

1 2

PR70

20_0603_5%

12

PR71 20_0603_5 %PR71 20_0603_5%

PC40 0.1U_0603_25V7K~DPC 40 0.1U_0603_25V7 K~D

1 2

PR73

2.2_0603_5%~D

PR78

2.2_0603_5%~D

1 2

PC50

1 2

4.7U_0805_6.3V6K~D

BST_CHGA

12

SUSP# 37,40,46,49

PC44

0.1U_0603_25V7K~D

PD17

PD17 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

6251VDD

1 2

PR81

4.7_0603_5%~D

PQ13

AO4407A_SO8

CHG_B+

12

PC28

10U_1206_25V6M~D

12

PC29

0.1U_0603_25V7K~D

PQ22

SI4128DY_SO8

PQ24

SI4128DY_SO8

PC30

2200P_0402_25V7K~D

12

578

10K_0402_1%~D

DTC115EUA_SC70-3

3 6

241

4.7UH_PCMC063T-4R7MN_5.5A_20%

12

PR77

12

PC49

3 6

241

PC49

12

PC27

10U_1206_25V6M~D

CSOP

12

AO4407A_SO8

1 2 3 6

4

PR63

1 2

13

PQ18

PL4

1 2

4.7_1206_5%~D

680P_0402_50V7K~D

8 7

5

PR60

47K_0402_1%~D

1 2

1SS355TE-17_SOD323-2

1 2

PD16

1SS355TE-17_SOD323-2

2

1 2

0.02_2512_1%

CHG

1

2

PD14

PR75

PC36

0.1U_0603_25V7K~D

VIN

ACOFF

PR64

200K_0402_1%~D

1 2

13

D

12

S

4

3

PC45

10U_1206_25V6M~D

VIN

PQ20

PQ20 RHU002N06_SOT323-3

RHU002N06_SOT323-3

PACIN

2

G

12

PC74

PC80

PC46

10U_1206_25V6M~D

BATT+

12

PC47

10U_1206_25V6M~D

1.93V

3.3V

A A

5

4.2V per cell

4.35V per cell

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CHARGER

44 58Tuesday, December 29, 2009

1

5

4

3

2

1

TPS51427_B+

D D

B+

12

1000P_0402_50V7K~D

+3VALWP

C C

B B

+3.3VALWP

A A

Thermal Design current=5.1A OCP min=9.46A

2

12

PC144

PC145

1000P_0402_50V7K~D

12

PC200

0.1U_0402_10V7K~D

PJP7

112

JUMP_43X118 @

PJP6

112

JUMP_43X118 @

PJP9

112

JUMP_43X118 @

PJP8

112

JUMP_43X118 @

PJP5

112

JUMP_43X118

@

1

+

PC61

2

330U_D2E_6.3VM_R25M

2

12

PC51

PC199

4.7U_0805_25V6-K~D

0.1U_0603_25V7K~D

1 2

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

12

PR90

PR90 0_0402_5%~D

0_0402_5%~D

PR93

@PR93

@

10K_0402_1%~D

1 2

+3VALWP+3VALW

+5VALWP+5VALW

12

PC52

4.7U_0805_25V6-K~D

PL5

4.7_1206_5%~D

680P_0402_50V7K~D

RLZ5.1B_LL34-2

1 2

VS

12

PC64

PD18

PC53

PR87

2200P_0402_50V7K~D

PD19

12

BAS316_SOD323-2

MAINPWON42,43

PR97

100K_0402_1%~D

1 2

2

578

3 6

241

786

5

123

PR98

806K_0603_1%~D

0_0402_5%~D

1 3

PQ26

SI4800BDY-T1-E3_SO8~N

PQ28

4

SI4894BDY-T1-E3_SO8

PC68

0.22U_0603_25V7K~D

1 2

200K_0402_1%~D

VL

PR103

PR105

1 2

12

PQ30

TP0610K-T1-E3_SOT23-3

PR86

0_0805_5%~D

1 2

PR88 2.2_0603_5%~DPR88 2.2_0603_5%~D

PC62

0.1U_0603_25V7K~D

1 2

PC67

0.22U_0603_10V7K~D

@PR101

@

0_0402_5%~D

PR106

@PR106

@

47K_0402_5%~D

1 2

12

PC70

.1U_0603_25V7K~D

PC57

0.1U_0603_25V7K~D

DH3

BST3A BST5A

12

LX3

FB3

VL

2VREF_TPS51427

1 2

PR101

1 2

12

1 2

PU5

33

TP

26

UGATE2

24

BOOT2

25

PHASE2

DL3

23

LGATE2

30

OUT2

32

REFIN2

1

REF

8

LDOREFIN

20

NC

4

EN_LDO

14

EN1

27

EN2

PR102

1 2

0_0402_5%~D

PC69

2VREF_TPS51427

PC71

@PC71

@

0.047U_0402_16V7K~D

1 2

PC58

6

VIN

NC

5

1 2

1U_0603_10V6K~D

3

VCC

TON

2

12

PR104

PR104 0_0402_5%~D

0_0402_5%~D

2VREF_TPS51427

PC59

7

LDO

PVCC

UGATE1

BOOT1

PHASE1

LGATE1

PGND

OUT1

FB1

BYP

SKIP

POK2

POK1

ILIM1

ILIM2

GND

TPS51427_QFN32_5X5

21

VL

12

4.7U_0805_6.3V6K~D

19

DH5

15

17

0.1U_0603_25V7K~D

LX5

16

DL5

18

22

10

FB5

11

9

29

28

13

ILM1

12

ILIM2

31

PC60

1U_0603_10V6K~D

1 2

PR89 2.2_0603_5%~DPR89 2.2_0603_5%~D

12

PC63

PR95 0_04 02_5%~D@ PR95 0_0402_5%~D@

12

PR96 0_04 02_5%~D@ PR96 0_0402_5%~D@

1 2

PR108 0_0402_5%~DPR108 0_0402_5%~D

1 2

+5VALWP Thermal Design current=5.8A OCP min=10A Fsw=400KHZ

Low Side MOS RDS(on)=13m ohm(Typ) , 16m ohm(Max)

1 2

2VREF_TPS51427

PR99

PR99 267K_0402_1%~D

267K_0402_1%~D

12

PR100

PR100 255K_0402_1%~D

255K_0402_1%~D

PQ29

PQ27

SI4800BDY-T1-E3_SO8~N

4

SI4894BDY-T1-E3_SO8

578

3 6

241

786

5

VL

POK 37

123

TPS51427_B+

12

PC54

4.7U_0805_25V6-K~D

2.2UH_FDVE0630-H-2R2M=P3_8.3A_20%

12

PR91

4.7_1206_5%~D

12

PC65

680P_0402_50V7K~D

PC55

4.7U_0805_25V6-K~D

PL6

1 2

PC56

PC197

2200P_0402_50V7K~D

0.1U_0603_25V7K~D

PR92

@

1 2

61.9K_0402_1%~D

PR94

0_0402_5%~D

1 2

12

+5VALWP

1

12

+

PC66

2

PC206

0.1U_0402_10V7K~D

330U_D2E_6.3VM_R25M

Fsw=300KHZ

Low Side MOS RDS(on)=13m ohm(Typ) , 16m ohm(Max)

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

+5VALWP/+3VALWP

45 58Tuesday, December 29, 2009

1

5

D D

+3VALW

12

PR204

100K_0402_1%~D

PR206

69.8K_0402_1%~D

PC106

69.8K_0402_1%~D

1 2

12

PR207

C C

SUSP#37,40,44,49

PR207

0_0402_5%~D

1 2

@PC106

@

0.1U_0402_16V7K~D

PG_VCCPP

TRIP_VCCPP

EN_VCCPP

FB_VCCPP

RF_VCCPP

12

PR209

PR209 470K_0402_5%~D

470K_0402_5%~D

4

PU15

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR_SON10_3X3~D

VBST

DRVH

V5IN

DRVL

10

9

8

SW

7

6

11

TP

BST_VCCPP

UG_VCCPP

SW_VCCPP

V5IN_VCCPP

LG_VCCPP

PR205

2.2_0603_5%~D

1 2

1

PC179

2

PC178

0.22U_0603_10V7K~D

1 2

+5VALW

1U_0603_6.3V6M~D

3

+VCCPP_B+

12

PC174

2200P_0402_50V7K~D

678

PQ47

PQ47 SI4172DY-T1-GE3 1N SO8

SI4172DY-T1-GE3 1N SO8

35241

PL13

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

PQ48

4

123 5

12

4.7_1206_5%~D

PR208

12

680P_0402_50V7K~D

PC184

PL13

1 2

2

PJP28

2

112

JUMP_43X118

@

12

PC175

0.1U_0603_25V7K~D

PC177

PC176

10U_1206_25V6M~D

12

PC180

0.1U_0402_10V7K~D

@

12

PC185

10U_1206_25V6M~D

1

+

PC181

+

2

PC182

10U_0805_6.3V6M~D

PC182

220U_B2_2.5VM_R15M

1

+

2

PC183

PC412

220U_B2_2.5VM_R15M

1

B+

+VCCPP

SI7170DP-T1-GE3_POWERPAK8-5~D

PR211

PR210

20K_0402_1%~D

1 2

B B

PR211

10K_0402_5%~D

12

SI7170DP-T1-GE3_POWERPAK8-5~D

@

PJP29

PJP29 JUMP_43X118

JUMP_43X118

+VCCPP

112

PJP30

PJP30 JUMP_43X118

JUMP_43X118

112

@

2

+VCCP

+VCCPP Thermal Design current=13.57A OCPmin=25.2A Fsw=290KHZ

Low Side MOS RDS(on)=3.6m ohm(Typ) , 4.5m ohm(Max)

A A

+VCCPP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Tuesday, December 29, 2009

Date: Sheet of

2

Date: Sheet of

46 58

1

5

4

3

2

1

+1.05VSP Thermal Design current=2.681A OCPmin=4.979A

+1.05VSP_B+

Fsw=290KHZ

Low Side MOS RDS(on)=11.7m ohm(Typ) , 14.2m ohm(Max)

D D

12

PC191

PC189

PC188

2200P_0402_50V7K~D

+3VALW

12

PC214

0.22U_0603_10V7K~D

+5VALW

PC192

1U_0603_6.3V6M~D

PC214

1 2

PR231

2.2_0603_5%~D

UG_1.05VSP

SW_1.05VSP

V5IN_1.05VSP

LG_1.05VSP

2.2_0603_5%~D

1 2

1

2

PR232

100K_0402_1%~D

PU17

PR214

46.4K_0402_1%~D

PC150

46.4K_0402_1%~D

1 2

12

PR233

0_0402_5%~D

DGPU_PWR_EN19,23,40,50

C C

1 2

@PC150

@

0.1U_0402_16V7K~D

PG_1.05VSP

EN_1.05VSP

FB_1.05VSP

RF_1.05VSP

12

PR218

PR218 470K_0402_5%~D

470K_0402_5%~D

TRIP_1.05VSP

PU17

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR_SON10_3X3~D

VBST

DRVH

V5IN

DRVL

BST_1.05VSP

10

9

8

SW

7

6

11

TP

8

PQ49

D6D5D7D

AO4466_SO8

4

G

S

3

2

1

3.3UH_FDV0630-3R3M_4.3A_20%~D

786

5

PQ50

AO4710_SO8

4

AO4710_SO8

123

12

4.7_1206_5%~D

PR221

12

680P_0402_50V7K~D

PC215

2200P_0402_50V7K~D

PL15

1 2

PC189

0.1U_0603_25V7K~D

12

PC207

10U_1206_25V6M~D

1

12

PC190

2

PC187

0.1U_0402_10V7K~D

10U_0805_6.3V6M~D

1

+

2

PJP34

2

JUMP_43X118

@

PC418

220U_B2_2.5VM_R15M

112

1

+

2

PC419

220U_B2_2.5VM_R15M

B+

+1.05VSP

PR220

PR216

20K_0402_1%~D

1 2

B B

A A

5

PR220

10K_0402_5%~D

12

@

PJP35

PJP35 JUMP_43X118

JUMP_43X118

+1.05VSP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

2

112

PJP33

PJP33 JUMP_43X118

JUMP_43X118

112

@

+1.05VSDGPU

2

Compal Electronics, Inc.

Title

Size Document Number Rev

+1.05VSP

Custom

Tuesday, December 29, 2009

Date: Sheet of

1

47 58

5

4

3

2

1

+1.5VSP Thermal Design current=11.77A OCPmin=21.85A Fsw=290KHZ

Low Side MOS RDS(on)=3.6m ohm(Typ) , 4.5m ohm(Max)

D D

PJP16

+1.5VSP_B+

+1.5V

12

PC102

PL8

1 2

PC102

PR124

100K_0402_1%~D

@

PR140

PR140 0_0402_5%~D

0_0402_5%~D

1 2

12

100K_0402_1%~D

PG_1.5VSP

TRIP_1.5VSP

EN_1.5VSP

RF_1.5VSP

PR129

PR129 470K_0402_5%~D

470K_0402_5%~D

PU9

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR_SON10_3X3~D

VBST

DRVH

V5IN

DRVL

10

9

8

SW

7

6

11

TP

BST_1.5VSP

UG_1.5VSP

SW_1.5VSP

V5IN_1.5VSPFB_1.5VSP

LG_1.5VSP

PR125

2.2_0603_5%~D

1 2

1

PC109

2

PC107

0.22U_0603_10V7K~D

1 2

+5VALW

1U_0603_6.3V6M~D

5

PQ64

4

SIS412DN-T1-GE3_POWERPAK8-5

123

3

D

2

G

S

1

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

12

PR128

4.7_1206_5%

PQ71

4.7_1206_5%

12

PC114

PC114 680P_0402_50V7K~D

680P_0402_50V7K~D

PR139

0_0402_5%~D

SM_PWROK8

C C

PR127

0_0402_5%~D

SYSON37,40

1 2

0.1U_0402_16V7K~D

1 2

12

@

PC223

0.1U_0402_16V7K~D

PR126

61.9K_0402_1%~D

1 2

12

PC108

@PC108

@

12

PC103

0.1U_0805_50V7M~D

2200P_0402_50V7K~D

12

PC105

PC115

10U_1206_25V6M~D

1

12

PC111

2

PC110

0.1U_0402_10V7K~D

10U_0805_6.3V6M~D

PJP16

2

112

JUMP_43X118

@

12

1

+

2

PC416

220U_B2_2.5VM_R15M

1

+

2

PC417

PC420

220U_B2_2.5VM_R15M

B+

+1.5VP

SI7170DP-T1-GE3_POWERPAK8-5~D

PR131

PR130

10K_0402_1%~D

B B

A A

5

1 2

PR131

11.5K_0402_1%~D

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SI7170DP-T1-GE3_POWERPAK8-5~D

Compal Secret Data

Deciphered Date

@

PJP17

PJP17 JUMP_43X118

JUMP_43X118

+1.5VP

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

2

112

PJP18

PJP18 JUMP_43X118

JUMP_43X118

112

@

Compal Electronics, Inc.

+1.5V

2

+1.5VSP

Tuesday, December 29, 2009

1

48 58

5

4

3

2

1

D D

+3VALW

SUSP#37,40,44,46

C C

PJP24

PC169

10U_0805_10V6K~D

PJP24

112

JUMP_43X118

@

12

PC163

10U_0805_10V6K~D

+1.5V

B B

+0.75VSP

@

PJP20 JUM P_43X118

112

1 2

PR178 0_0402_5%~DPR178 0_0402_5%~D

PC153

0.1U_0402_16V7K~D

2

12

5

PU8 RT9025PU8 RT9025

NC

PGOOD

GND

8

6

7

ADJ

1

0.1U_0402_16V7K~D

PC154

@

12

PR180

3.01K_0402_1%~D

12

PR179

2.37K_0402_1%~D

+1.8VP

12

PC151

PC151 10U_1206_25V6M~D

10U_1206_25V6M~D

+1.8VP

PJP21

@PJP21

@

2 1

PAD-OPEN 2x2m~D

+1.8V

2

+5VALW

12

@

12

PC155

PC155 10U_1206_25V6M~D

10U_1206_25V6M~D

VIN3VOUT

2

EN

4

VDD

GND

12

PC152

PC152 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

9

+1.8VSP Imax=0.42A

RT9026_MSOP10

PU14

1

12

PC167

PC164

@

4.7U_0805_6.3V6K~D

2

3

5

VDDQSNS

VLDOIN

VTT

VTTSNS

4

PGND

GND

VTTREF

GND

11

10

VIN

PC165

8 6

9

S5

7

S3

PR182

12

0_0402_5%~D

PC168

0.1U_0402_16V7K~D

@

12

SUSP# 37,40,44,46

PC165

1U_0603_10V6K~D

12

PC166

0.1U_0402_16V7K~D

+3VALW

12

+0.75VSP Imax=0A

PJP14

2

112

JUMP_43X118@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+0.75VS+0.75VSP

Compal Secret Data

2009/07/25 20 10/07/25

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Custom

Tuesday, December 29, 2009

+1.8VP

Size Document Number Rev

Date: Sheet of

/ +0.75VSP

1

49 58

5

4

+VGA_COREP ThermalDesigncurrent=21.525A OCPmin=36.9A Fsw=290KHZ Low Side MOS RDS(on)=1.8m ohm(Typ) , 2.25m ohm(Max)

3

2

1

D D

C C

B B

A A

+VGA_COREP(N10P_GS1) PR122=41.2K ohm

+VGA_COREP 0.8V 0.85V 0.9V GPU_VID0 0 1 1 GPU_VID1 0 0 1

12

PC224

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D PR242

PR242

@ PC224

@

0_0402_5%~D

48.7K_0402_1%~D

12

+VGA_CORE

1 2

PR234

12

+VGA_COREP

DGPU_PWROK19

PR241

0_0402_5%~D

PJP38

@PJP38

@

JUMP_43X118

112

PJP36

@PJP36

@

JUMP_43X118

112

PJP39

@PJP39

@

JUMP_43X118

112

PJP40

@PJP40

@

JUMP_43X118

112

5

1 2

PC112

@PC112

@

0.1U_0402_16V7K~D

2

DGPU_PWR_EN19,23,40,47

+3VS

12

PR239

100K_0402_1%~D

TRIP_VGA

EN_VGA

FB_VGA

RF_VGA

PR236

PR236 470K_0402_5%~D

470K_0402_5%~D

PR240

2.2_0603_5%~D

UG_VGA

SW_VGA

V5IN_VGA

LG_VGA

12

100K_0402_5%~D

2.2_0603_5%~D

1 2

1

2

1

PC143

2

0.01U_0402_16V7K~D

BST_VGA

PU16

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51218DSCR_SON10_3X3~D

+3VS_DELAY

1 2

GPU_VID021 GPU_VID121

4

VBST

DRVH

SW

V5IN

DRVL

TP

PR134

10K_0402_5%~D

PR137

10K_0402_5%~D

10

9

8

7

6

11

12

PR135

PC216

0.22U_0603_10V7K~D

1 2

+5VALW

PC212

1U_0603_6.3V6M~D

12

PR136

37.4K_0402_1%~D

13

D

2

G

S

PQ33

PQ33 BSS138W-7-F_SOT323~D

BSS138W-7-F_SOT323~D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR138

PR138 0_0402_5%~D

0_0402_5%~D

PC149

@PC149

@

820P_0402_50V7K~D

3

2

G

2

G

+3VS_DELAY

10K_0402_5%~D

1 2

10K_0402_5%~D

3

D

S

1

3

D

S

1

PR123

@PR123

@

PR132

PJP37

+VGA_COREP_B+

@

12

PC210

PC209

PC208

2200P_0402_50V7K~D

SI7686DP-T1-E3_SO8

SI7170DP-T1-GE3

12

PR122

41.2K_0402_1%~D

13

D

2

G

S

0.01U_0402_16V7K~D

Deciphered Date

2200P_0402_50V7K~D

0.45UH_ETQP4LR45XFC_25A_-25+20%

12

PQ32

PQ32 BSS138W-7-F_SOT323~D

BSS138W-7-F_SOT323~D

3

D

PQ70

PQ67

2

SI7686DP-T1-E3_SO8

PQ68

2

SI7170DP-T1-GE3

12

PR133

PQ70

G

S

1

3

D

PQ69

G

S

1

PC142

2

100K_0402_5%~D

Compal Secret Data

PC209

0.1U_0603_25V7K~D

PL16

1 2

PR237

4.7_1206_5%~D

PR237

4.7_1206_5%~D

PC218

680P_0402_50V7K~D

PR119

PR119 261_0402_1%~D

261_0402_1%~D

PC116

@PC116

@

820P_0402_50V7K~D

2

12

PC213

10U_1206_25V6M~D

12

PC219

10U_1206_25V6M~D

12

PR121

10_0402_1%~D

12

PR238

2.74K_0402_1%~D

PR235

19.6K_0402_1%~D

1 2

@

Title

Size Document Number Rev

Custom

Date: Sheet of

PJP37

2

112

JUMP_43X118

@

1

12

PC186

0.1U_0402_10V7K~D

Compal Electronics, Inc.

+VGA_COREP

Tuesday, December 29, 2009

PC211

2

10U_0805_6.3V6M~D

+NVVDD_SENSE 22

+

2

B+

1

+

2

PC221

PC220

220U_B2_2.5VM_R15M

1

220U_B2_2.5VM_R15M

1

+

2

PC413

220U_B2_2.5VM_R15M

50 58

+VGA_COREP

1

+

2

PC414

220U_B2_2.5VM_R15M

+VCCP

5

4

3

2

1

D D

C C

B B

A A

PR143

68_0402_5%~D

PM_PWROK8,19,37

H_PROCHOT#4

1 2

H_PROCHOT#

VGATE19,37

0_0402_5%~D

PC148

@ PC148

@

1 2

0.1U_0402_10V7K~D

VCCSENSE5

VSSSENSE5

@

12

PR151

@

PR157

1 2

4.22K_0402_1%~D

PR159

6.81K_0402_1%~D

PC130

12

150P_0402_50V8J~D

5

PM_DPRSLPVR8,19

H_DPRSTP#5,8,18

+3VALW

@

12

PR154 147K_0402_1%~DPR154 147K_0402_1%~D

1 2

PH2

@ PH2

@

470K_0402_5%_TSM0B474J4702RE

1 2

0.015U_0603_25V7K

PR158

10K_0402_1%~D

1 2

PC129

1000P_0402_50V7K~D

1 2

PR160 464K_0402_1%~DPR160 464 K_0402_1%~D

1 2

PC131 47P_0402_50V8J~DPC131 47P_0402_50V8J~D

330_0402_1%~D

1 2

PR165

0_0402_5%~D

1 2

PR168

0_0402_5%~D

PC137

330P_0402_50V7K~D

0_0402_5%~D

1 2

12

PR149

PR171

1.91K_0402_1%~D

0_0402_5%~D

PC125

0.1U_0402_16V7K~D

@

PR15240.2K_04 02_1%~D

1 2

H_PROCHOT#

PC127

PR163

390P_0402_50V7K~D

PR164

2.21K_0402_1%~D

1 2

PC135 1000P_0603_50V7K~DPC135 1000P_0603_50V7K~D

1 2

12

PC136

PC136 1000P_0402_50V7K~D

1000P_0402_50V7K~D

12

1 2

PR169

1K_0402_1%~D

PC141

0.22U_0603_10V7K~D

1 2

PR145

0_0402_5%~D

1 2

PR148

12

PC122

40

41

PU10

PGOOD

1

FDE

GND PAD

2

PMON

3

RBIAS

4

VR_TT#

5

NTC

6

SOFT

7

OCSET

8

VW

9

COMP

10

FB

11

PC133

1 2

PC138 330P_0402_50V7K~DPC138 330P_0402_50V7K~D

1 2

PR170

7.87K_0402_1%~D

1 2

PR144

PR144 0_0402_5%~D

0_0402_5%~D

1U_0603_6.3V6M~D

39

3V3

VSEN12VDIFF

4

+5VALW

5

37

CPU_VID65CPU_VID55CPU_VID45CPU_VID3

VR_ON

12

PR150

0_0402_5%~D

34

35

36

37

38

VSUM

VIN

17

18

12

1 2

0.1U_0402_10V7K~D

PC139

VID331VID432VID533VID6

VID2

VID1

VID0

VCCP

LGATE

VSSP

PHASE

UGATE

BOOT

VSS

VDD

19

20

12

PC132

PC132 1U_0603_10V6K~D

1U_0603_10V6K~D

PR162

PR162 10_0603_5%~D

10_0603_5%~D

1 2

PC134

0.22U_0603_25V7K~D

.068U_0402_10V7K~D

PC140

VR_ON

CLK_EN

DPRSTP#

DPRSLPVR

DFB

VO

DROOP

RTN

15

16

14

13

CPU_VID25CPU_VID15CPU_VID0

30

29

28

27

LGATE_CPU1

26

25

PHASE_CPU1

24

UGATE_CPU1

23

BOOT_CPU1

22

21

NC

ISL6261ACRZ-T_QFN40_6X6

1 2

PR161

PR161 10_0603_5%~D

10_0603_5%~D

VSUM

12

4.53K_0402_1%~D

PR167

+CPU_B+

12

PR166

3.57K_0402_1%~D

PH3

10KB_0603_5%_ERTJ1VR103J

1 2

+VCC_F

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

2.2_0603_5%~D

+5VALW

PR153

5

3

12

PC123

0.01U_0402_16V7K~D

PC126

0.22U_0603_10V7K~D

1 2

PC124

1 2

12

1U_0603_10V6K~D

PR146

PR146 1_0603_5%~D

1_0603_5%~D

2

Compal Secret Data

G

3

D

PQ63

S

SI7686DP-T1-E3_SO8

1

3

D

PQ62

S

1

SI7170DP-T1-GE3-POWERPAK8-5

Deciphered Date

12

PC205

2200P_0402_50V7K~D

0.1U_0603_25V7K~D

12

PR155

4.7_1206_5%~D

12

PC128

PC128 680P_0402_50V7K~D

680P_0402_50V7K~D

2

PC117

+CPU_B+

12

PC118

1000P_0402_50V7K~D

12

PC120

PC119

4.7U_0805_25V6-K~D

0.45UH_ETQP4LR45XFC_25A_-25+20%

Title

Size Document Number Rev

Custom

Date: Sheet of

PL10

HCB2012KF-121T50_0805

1 2

12

PC121

4.7U_0805_25V6-K~D

PL11

4

3

12

PR156

7.68K_0805_1%~D

VSUM

Compal Electronics, Inc.

CPU_CORE

Tuesday, December 29, 2009

12

1000P_0402_50V7K~D

1

2

+VCC_F

1

12

PC146

PC147

1000P_0402_50V7K~D

+VCC_CORE

51 58

B+

5

R e qu est

Ite m

Ite m Issu e D es c rip t ion

Ite mI te m

P a ge # T itle

P a ge #P a ge #

Title

TitleTitle

D ate

D ateD at e

R e qu estRequ es t

O w ner

O w nerO w n er

4

V ersio n C hange L ist ( P . I. R . List )

V ersio n C hange L ist ( P . I. R . List )V ersio n C hange L ist ( P . I. R . List )

Issu e D es c rip t ionD ate

Issu e D es c rip t ionI ss ue D esc r i p tio n

3

Page 1

Page 1Pa ge 1

2

So lu tio n D es cr ip tio n

So lu tio n D es cr ip tio n R ev .

So lu tio n D es cr ip tio nSolu t ion D esc r ipt io n

1

R e v.P a ge #

R e v.R e v.

1

D D

2

3

4

C C

6

7

8

9

10

B B

50 VG A_COREP

50

505 VGA_COREP 8/17 Antony Outpu t voltage setti ng 0.85V (NVIDI A request) non-populate PR 123(reserve spa ce) X00

44 CH ARGER 9/10 Antony CP po int 90% setting Change PR83 fro m 2.87K ohm to 2.74K ohm X01

48

50 VG A_COREP 9/16 Antony Change V ID time sequen ce Change net name PR134.2 and PR 123.2 from +3VS to +3VS_DELAY X01

50

VGA_COREP

CHARGER44

+1.5VSP

VGA_COREP

8/17

9/16

9/16 Antony NVIDIA c ommand

Antony

Antony EE required that S M_PWROK should change to +1.5 V Change net name PR124.1 from + 3VALW to +1.5V

Change output v oltage

Charger voltage settingA ntony9 /10 Change PR85 from 200K ohm to 43.2K ohm X01

Change PR119 fr om SD02800008L( 0 ohm) to SD034 26108L(261 ohm )

Change PR122 fr om SD03424928L( 24.9K ohm) to S D03419128L(19. 1K ohm)

Change PR136 fr om SD03437428L( 37.4K ohm) to S D03440228L(40. 2K ohm)

Change PR238 fr om SD00000AP8L( 2.67K ohm) to S D03427418L(2.7 4K ohm)

interchange wit h PR121 and PR2 38

X00

X01

11

12

13

14 45 3VALWP/5VAL WP 9/24 Antony fol low PSL compone nt Change PD19 fro m CH355PT to BA S316 X01

15 51 CPU_CORE 9/24 Antony follow PSL c omponent Change P C127 to PSL com ponent X01

A A

50 VG A_COREP 9/16 Antony NVIDIA c ommand

9/24VGA_COREP50 Antony NVIDIA command Change PR121 fr om 19.1K ohm to 41.2K ohm X01

5

4

Delete PR139, + NVVDD_SENCE con nect to PR121.2 X01

Change PR121 fr om 0 ohm to 10 ohm

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

X01NVIDIA commandAntony9/16VGA_COREP50

Compal Electronics, Inc.

Title

PWR-PIR1

Size Document Number Rev

Date: Sheet of

Tuesday, December 29, 2009 5852

Date: Sheet of

Tuesday, December 29, 2009 5852

Date: Sheet of

Tuesday, December 29, 2009 5852

1

1.0

5

P a ge #

Ite m

Ite mI te m

D D

P a ge #

P a ge #P a ge #

16 +VCC PP46 X01Change PQ48 fro m SB00000FO0L t o SB00000FO00Change PN to 0 endAntony9/24

Title

TitleTitle

D ate

D ate Issu e D es c rip t ion

D ateD at e

4

V ersio n C hange L ist ( P . I. R . List )

V ersio n C hange L ist ( P . I. R . List )V ersio n C hange L ist ( P . I. R . List )

R e qu est

R e qu estRequ es t

O w ner

O w nerO w n er

Issu e D es c rip t ionIte m

Issu e D es c rip t ionI ss ue D esc r i p tio n

3

Page 2

Page 2Pa ge 2

2

So lu tio n D es cr ip tio n

So lu tio n D es cr ip tio nSolu t ion D esc r ipt io n

1

R e v.

R e v.So lu tio n D es cr ip tio n

R e v.R e v.

17 48

C C

22

23

24

25

26

B B

45

+1.5VP 9 /24 Antony Change PN t o 0 end Change PQ48 fro m SB00000FO0L t o SB00000FO00 X01

VGA_COREP18 50

EMC requestAntony10/5+1.5VP4819

Quality enhance mentAntony10/5CHARGER4420

CHARGER 10/5 Antony Quali ty enhancement

11/13BATTERY CONN/OTP42

11/1343 DC IN/DETECTOR

11/13

11/13+1.5VSP48

Antony

Change net name PR239.1 from + 3VALW to +3VSEE required tha t PU16.1 pull h igh should chan ge to +3VSAntony10/1

Reserve PQ22 fr om AO4466 to SI 4128DY

Reserve PQ24 fr om AO4466 to SI 4128DY21 44

Change PC9 to s ize 0603 X03Change component size

Change PR100 t o 255K ohmThe quality imp rovement sagges ts by PCP+5VALWP/+3VALWP45

X01

X01Reserve PC223 s pace

X01

X02Change PH1 100K ohm thermestorOTP meet settin gAnton y

X03Change PC68 to size 0603Change componen t size+5VALWP/+3VALWP

X03

X03Add PR139 0 ohm resistorReserve 0 ohm s paceAntony

27

28

29

30

A A

45

VGA_COREP50

+5VALWP/+3VALWP

+1.5VSP4831 12/23 Antony Reserve CCM mode r esistor Reserve PR140 s pace X04

5

11/1348 +1 .5VSP Change PQ64 to SIS412DNChange componen t size

11/13

12/21

Antony

Solve S3/S5 aco ustic noise iss ue

4

X03

Add PR242 0 ohm resistor and r eserve PC223 sp aceReserve RC space

PR96 de-populat e

Add PR108 0 ohm

Compal Electronics, Inc.

Title

PWR-PIR2

Size Document Number Rev

Date: Sheet of

Tuesday, December 29, 2009 5853

Date: Sheet of

Tuesday, December 29, 2009 5853

Date: Sheet of

3

2

Tuesday, December 29, 2009 5853

1

X03

1.0

5

4

3

2

1

Page 1 of 5Version change list (P.I.R. List)

Item Fixed Issue

01

D D

02

03

04

05

06

07

08

09

C C

10

11

12

13

14

15

16

Date

2009/09/07

2009/09/10

2009/09/16

2009/09/17

0.2

U3 pin SM_PWROK schematics error for DDR3

LVDS EDID can't switch select for panel

GMCH L_BKLT_CTRL isn't inverted before MUXed

Switch IC U4 pin1 can not enable

Change HDMI connector Change connector JHDMI1

Change Display port connector

Change D-SUB connector Change connector JCRT1

Change SIM,WWAN,WLAN,FAN connector

Change BTB connector

Q26 footprint error

Audio board move IHDA signal 33ohm to MB Add R8,R46,R119,R120 33ohm

LID switch move to audio board Delete U2,C2,C3,R5

Audio board ALC665 pin9 need +1.5VS Change JBTB1 pin5,pin7,pin9 to +1.5VS

Add +3VALW for ELC function LED power

LID SW move from MB to audio board

0.2

19

08

28

31

32

30

33

36

29

18

36

Mount R238 10K ohm pull highEnable N11P-GS1 +VGA_COREP when boot system

U3 pin SM_PWROK connect to +1.5V

Modify U20,Q119,Q120 schematics and +LCDVDD change to +3VS

Remove U25 for net DPST_PWM

Remove R491 0 ohm and add mount R490 0 ohm

Change connector JDP1

Change connector JSIM1,JWWAN1,JWLAN1,JFAN1

Change connector JBTB1

Change Q26 footprint

Change JBTB1 pin8,pin10,pin12 to +3VALW

Change JBTB1 pin6 to LID_SW#

Modify ListPG#Rev.

17

B B

A A

18

19

20

21

22

23

24

25

26

2009/09/17

2009/09/18

2009/09/22

5

Modify ELC schematics fllow DELL design

Change D16,D25,D26,D31 to PJDLC05C for EMI

DGPU +3VS_DELAY

漏漏

BOM mount L39,L40,L41,L42 for EMI request

JP3 pin6,pin7(I2C) add PJDLC05C for EMI Add D30 to JP3 pin6 and pin7

Add 0.1uF to SM_PWROK for EMI request

Modify JLAN1 GND for vender request for EMI

For JMicro vender request C1685 4.7uF near +3V_MCVCC

DGPU +3VS_DELAY

漏漏

4

0.2

38

29

21

35

31

Modify ELC schematics

Change BOM D16,D25,D26,D31 to SCA00001100

Modify Q21 schematics

Change BOM R681 from 22ohm to 33ohmChange R681 to 33ohm for EMI request

Change BOM R579,R580,R581,R588,R591,R592,R595,R596 to @

38

08

34

Add C190 0.1uF

Add C1162,C1163 0.1uF

35

21

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Add Q58 and R389 to net VGA_CLKREQ#_R

Compal Secret Data

2009/07/25 2010/07/25

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HW Changed-List History-1

LA-5811P

54 58Tuesday, December 29, 2009

1

1.0

5

4

3

2

1

Page 2 of 5Version change list (P.I.R. List)

DateItem Fixed Issue

27

D D

C C

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

2009/09/23

2009/09/24

2009/09/28

2009/09/29

2009/09/30

Modify screw H12,H13,H17 for ME request

Add 1000pF for EMI request

Change crystal X1 cap. to 27pF

Modify USB powershre schematics

Use the USB detect method for powershare

For CLKRUN# issue

Net SM_PWROK add 0.1uF near PU9 for EMC

Net SM_PWROK add 0.1uF near U3B for EMC

For RF request add 47pF for WLAN,WWAN +1.5VS

Intel request delete R27,R28,R29 for layout

Add JLVDS1 connector detect pin

Add JBTB1 connector detect pin

0.2

39

14

15

34

35

37

Modify screw H12,H13,H17

Change JP3 pin9 from GND to +5VSAdd +5VS for LED board power budget

Add C115 1000pFAdd 1000pF for EMI request

Add C196 1000pF

Add C1705,C1706 0.1uFAdd o.1uF on PCIE CLK for vender request

Add 33ohm and 22pF to JCARD1 pin7,pin16Add 33ohm and 22pF for EMI request

Change BOM C1616,C1617 from 15pF to 27pF(SE071270J8L)

36 Move L43,R617,R618 near JUSB1

36 BOM need mount U60,D52,D58

Add U39 pin38 net PM_CLKRUN#37

48 Net SM_PWROK add C198 0.1uF

08 Net SM_PWROK add C190 0.1uF

33

Add C1136,C1184 47pF to +1.5VS

Delete R27,R28,R2905

29

Add JLVDS1 pin32 LVDS_CONN,pin33 STATUS_BOARD_CONN

Add JBTB1 ppin33 IO_BOARD_CONN36

Modify ListPG#Rev.

43

B B

2009/09/30

Add JP3 connector detect pin

2009/09/3044EC add JLVDS1,JBTB1,JP3 connector detect pin

45

2009/10/01

46

2009/10/01

47

2009/10/05

48

2009/10/06

49

2009/10/06

50

2009/10/08

51

A A

2009/11/0536Change USB D+ and D-

52

2009/11/05

5

Add display port AUX schematics

Add a FET for CPU overclocking

Add I2CB,I2CH pull high for NVIDIA request

For Intel request change C1702 BOM

Change BOM error

Change Q35 Id to 300mA

Change location R263 to C271

4

0.2

0.2 37

0.2

0.2 40 Change C1702 from 0.01uF to 0.1uF

0.2 23 Change C191,C192,C197,C261,C262,C263 from SE00000JM00 to SE00000MM1M

0.2 23 Change Q35 from SB000008J00 to SB000003P10

0.3

38

Add JP3 pin15 STATUS_BOARD_CONN,pin16 IO_BOARD_CONN

Add LVDS_CONN to U39 pin18

32 Add Q123,Q124,Q125,R602,R603,R613,R614

U39 pin25 add a net EC_FSB_SEL06

15 Add R420,R421,R422,R423 pull high to +3VS_DELAY

Swap L43 USB signal USBP2_D-_C and USBP2_D+_C

Change location R263 to C271 for layout.19

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HW Changed-List History-2

LA-5811P

55 58Tuesday, December 29, 2009

1

1.0

5

4

3

2

1

Page 3 of 5Version change list (P.I.R. List)

DateItem Fixed Issue

53

D D

C C

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

2009/11/05

2009/11/09

2009/11/10

2009/11/11

2009/11/12

2009/11/16

2009/11/17

Add 100K pull low for EC debug request

Change BIOS ROM part to another PN

Change C189,C195,C202 BOM

Change C1105 BOM

Change C191,C192,C197,C261,C262,C263 BOM

Add 10K pull high for LAN LED leakage Add R662,R664 10K pull high to +3V_LAN

Reserved 10K pull high for LID_SW# Add R665 10K pull high to +3VALW

Modify board ID Mount R622 100K,R627 20K

Modify U4 pin13,pin14

Reserved GPIO49 for DGPU_PWR_EN Add R263,R268 0 ohm to net DGPU_PWR_EN

For ESD request change D30 PN Change D30 PN from SCA00001100 to SCA00000200

Change R500 to 110ohm for LCD panel EA Change R500 from 300ohm to 110ohm

Modify JTP1 footprint for layout

Change U42 pin8 from +5VS to +5VALW

0.3

0.3 16

0.3

0.31938

0.3 29

0.3

0.3 38

33

37

23

36

23

34

37

39

28

32

Add JWWAN1 pin49 R657 100K pull low to GND for net EC_TX

Change U41 BOM from SA00001IT0L to SA00002TO0L

Change C189,C195,C202 PN from SE00000IS0A to SE076104K80

Change C1105 PN from SE000000GK0 to SE00000GC0L

Change C191,C192,C197,C261,C262,C263 PN from SE00000MM1M to SE076473K8L

change R142,R352 to 22ohm,1%

Modify JTP1 footprint

U19 pin 57 add a R329 0ohm to GNDAdd a 0603 size 0ohm for LVDS SW thermal

Add a J3 to +3VS and C1628,C1634Reserved a jump for HDD 3.3V

Change U42 pin8 to +5VALW

Modify ListPG#Rev.

69

B B

A A

70

71

72

73

74

75

76

77

78

2009/11/20

2009/12/16

5

2009/11/18

Reserved 0.1uF,22P for U42 pin6

Net VGA_CLKREQ#_R

重重

pull H to +3VS_DELAY BOM delete R406 10K ohm

Change Q35 to AO3414 for +1.8VSDGPU 300mA Change BOM Q35 from SB000003P10 to SB000007600

Change Q11 to SI7121DN for +3VS_DELAY 1380mA

U42 reserved 0.1uF for RF request.

Change BOM error. Change C1702 from 0.1uF to 0.01uF

Modify board ID Mount R628 37.4K and delete R627 20K

For DGPU thermal error modify power sequence

For nVIDIA request change R571,R568 value

4

0.3 38

0.3

1.0

21

23

38

40

37

19

23

31

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Add R139,C1843,C313 to U42 pin6

Change Q11 from SB923010020 to SB00000KI00

Add C1857,C1858,C1859,C1860,C1861,C1862,C1863,C1864,C1865,C1866,C1867 0.1uF

BOM mount R268 0 ohm and delete R263 0 ohmChange DGPU_PWR_EN from GPIO18 to GPIO49

BOM mount R210,C207 and change R118 to 68K,C168 to 0.22uF

Change BOM R571,R568 from 10K(SD028100280) to 2.2K(SD028220180) or 4.7K

Compal Secret Data

2009/07/25 2010/07/25

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HW Changed-List History-3

LA-5811P

56 58W ednesday, December 30, 2009

1

1.0

5

4

3

2

1

Page 5 of 5Version change list (P.I.R. List)

DateItem Fixed Issue

103

D D

2009/12/28

Change BOM for DELL

禁禁禁

1.0

23

Change C1664,C1694,C179,C245,C252,C492,C1564,C1693

Modify ListPG#Rev.

from SC1H751H01L to SC1SS355010

104

105

106

107

108

109

2009/12/28

Change BOM for DELL

禁禁禁

1.0

11

34

20

08

Change C90 from SE000005T80 to SE000005T8L

Change C93 from SE000008L80 to SE000008L0L

Change C1117,C1142,C86 from SE049225Z80 to SE049225Z8L

Change C1654 from SE067102K80 to SE067102K8L

Change C286,C288,C289,C290,C293,C304 from SE070104Z80 to SE070104Z8L

Change C1514,C1519,C1528,C1532,C210,C211,C215,C232,C237 ,C241,C72,C74

from SE075103K80 to SE068103K8L

C C

110

111

112

2009/12/28

Change BOM for DELL

禁禁禁

Change BOM for RF team request

1.0

40

07

29

Change C1696,C1697 from SE075103ZN0 to SE068103K8L

Change C56,C57,C58 from SGA20221D40 to SGA20221E8L

Change C231,C238 from SE07150AC00 to SE07122AC8L

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW Changed-List History-5

LA-5811P

56 58W ednesday, December 30, 2009

1

1.0

5

4

3

2

1

Version change list (P.I.R. List)

Date Fixed IssueItem

79

D D

80

81

82

83

84

85

86

2009/12/17

2009/12/18

2009/12/20

2009/12/21

2009/12/16

Change L52 part number Change BOM L52 from SHI00006N0L to SHI00005V0L

Change Q11 Compal PN Change Q11 from SB00000KI00 to SB00000MK00

Change L39,L40,L41,L42 PN for EMI

Change C1616,C1617 to 18PF

Change BOM for cost

Change BOM for cost Change C153 from SE124474KT0 to SE124474K80

Change BOM for cost Change C153 from SE000000GK0 to SE000003H00

Change BOM for DELL

禁禁禁

Rev. PG# Modify List

1.0

23

31

37

11

12

23

Change L39,L40,L41,L42 from SM070000K00 to SM070000I00

Change C1616,C1617 from SE071270J8L to SE071180J80

Change C5,C84,C146 from SGA19331D10 to SGA00002680

Change C179,C245,C252,C492,C1664,C1693,C1694

Page 4 of 5

from SE000000I10 to SE00000110L

C C

87

88

89

90

2009/12/21

2009/12/22

Change BOM for DELL

禁禁禁

1.0

11

23

40

07

Change C93 from SE000008L80 to SE000008L0L

Change C72,C74,C210,C211,C215,C232,C237,C241,C258,C1514,C1519,C1528,C1532

from SE075103K80 to SE068103K8L

Change C1696,C1697 from SE075103ZN0 to SE068103K8L

Change C56,C57,C58 from SGA20221D40 to SGA20221E8L

91

2009/12/22

92

2009/12/22

93

B B

A A

94

95

96

97

98

99

100

101

102

2009/12/22

2009/12/23

2009/12/28

5

Change LVDS switch IC Change U19 from SA00001RM0L to SA00003O900

Modify JKB1 footprint for 2nd source DFX

Change BOM for DELL

禁禁禁

Change BOM for DELL

禁禁禁

4

1.0

28

32

37

17

29

23

28

19

29

40

11

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BOM @ C1628,C1634 Modify BOM for cost

Modify JKB1 LTCX0020V0L footprint to TYCO_2-2041084-5_25P-T

Change U10 from SA007080B9L to SA007080B90

Change Q23,Q34,Q36,Q59 from SB000008J00 to SB570020110

Change Q10,Q12,Q46,Q47,Q52,Q56 from SB000009610 to SB00000960L

Change Q119,Q120,Q21,Q29,Q30 from SB00000AR00 to SB57002528L

Change Q8,Q9 from SB502060000 to SB50206008L

Change Q28,Q58 from SB570020020 to SB57002008L

Change Q26 from SB570020400 to SB57002041LChange BOM for DELL

Change Q51,Q53,Q54 from SB570025280 to SB57002528L

Change D1,D13,D15,D5,D6 from SC1H751H01L to SC1SS355010

Compal Secret Data

2009/07/25 2010/07/25

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HW Changed-List History-4

LA-5811P

57 58W ednesday, December 30, 2009

1

1.0

5

4

3

2

1

NAP00 Power On Sequence

XDP_DBRESET#

(From Power Button)

ON/OFFBTN#

(to EC)

D D

PBTN_OUT#

(From EC to ICH)

SLP_S5#

SLP_S3#

SYSON

(From ICH to EC)

(From EC to control +1.5V)

+1.5V

+V_DDR3_DIMM_REF

(From EC to control VS Power)

DGPU Power Sequence

+3VS_DELAY

+VGA_CORE

+1.8VSDGPU

C C

+1.5VS_DGPU

SUSP#

+5VS

+3VS

DGPU_PWR_EN

(From ICH to control DGPU Powe r)

+3VS_DELAY

+VGA_CORE

ONLY FOR DGPU

+1.8VSDGPU

+1.5VS_DGPU

+1.05VSDGPU

(can ramp up anytime)

PEG_RST#

+1.8V

B B

+1.5VS

+0.75VS

+VCCP

EN_WOL#

+3V_LAN

(From EC to IMVP)

VR_ON

+VCC_CORE

(From IMVP to ICH & EC)

VGATE

(From EC to ICH)

PM_PWROK

A A

PLT_RST#_BUFF

H_RESET#

(From ICH to CPU)

(Output from CPU)

1.03s

1.01s

90.8us

156ms

984us

47.2ms

186ms

2.6ms

2.87ms

108ms

4.52us

940us

6.9ms

6.98ms

980us

1.2ms

1.33ms

768us

15.8us

980us

5.26ms

500us

58.8ms

568us

7.6ms

40.7ms

1.18ms

1ms

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/07/25 2010/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Power Sequence

LA-5811P

1

58 58Tuesday, December 29, 2009

1.0

Compal LA-5811P NAP00 CULV (SFF), Alienware M11x Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual