Compal LA-5751P, G460, IdeaPad Z460 Schematic

A

1 1

B

C

D

E

Compal Confidential

Schematics Document

2 2

NIWE1

Arrandale

3 3

4 4

with Intel IBEX PEAK-M core logic

REV:0.3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/03/25 2008/04/

C

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Cover Sheet

Size Document Number Rev

Custom

LA-5751

Date: Sheet

D

Date: Sheet

E

0.3

of

1 51Thursday, October 29, 2009

of

1 51Thursday, October 29, 2009

of

1 51Thursday, October 29, 2009

A

Compal confidential

File Name :

ZZZ1

14W_PCB_LA5751P

1 1

ZZZ

HYN@

X76_H512

HDMI CONN

page24

VRAM 64*16

DDR3*4

page23

NVidia N11M-GE1

page19~23

level shift IC

ASM1442

PCI-E X16

page25

B

Intel Arrandale (UMA/DIS)

C

POWER BD: POWER BTN NOVO BTN POWER MANAGE BTN

D

CAP SENSOR BD: VOLUME UP VOLUME DOWN MUTE

E

CARD READER BD: ENE UB6250/52 HP JACK MIC JACK

AUDIO ENHANCE

Clock Generator

BUTTON & LED

RTM890N

page12

Socket-rPGA989

100MHz

2.7GT/s

37.5mm*37.5mm

FDI *8

page5~9

DMI *4

Dual Channel

DDR3-800(1.5V) DDR3-1066(1.5V)

DDR3-SO-DIMM X2

BANK 0, 1, 2, 3

UP TO 8G

page 10,11

CRT Connector

page26

2 2

LVDS Connector

page27

PCI Express Mini card Slot 1

page28

6*PCI-E BUS

PCI Express Mini card Slot 2

SIM Card

3 3

page28

USB(WWAN)

SPI ROM BIOS

page13

RTL8103EL/8111DL

10/100/1G LAN

RJ45 CONN

page29

page30

EMC1403 Thermal Sensor

Intel Ibex Peak M

FCBGA 951

25mm*25mm

page 13~18

LPC BUS

EC

ENE KB926D

page34

Int.KBD

SPI ROM

page31

EC

AZALIA

14*USB2.0

6*SATA serial

page35

page36

Audio Codec

CONEXTAN CX20671

page33

CMOS Camera

BlueTooth CONN

USB CONN X1(Right)

USB PORT X1(Left)

New Card X1

WWAN

SATA HDD CONN

page32

page27

page37

page28

2Channel Speaker

Analog MIC_Int

page37

page33

Card Reader/Audio Jack SB CONN

ENE UB6250/52 MS/MS pro/SD/SD pro/mmc/XD

ESATA HDD AND USB CONN

HP X 1+ MIC_Ext X1

page38

page37

4 4

A

B

Touch Pad

page35

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Compal Secret Data

2008/03/24 2008/04/

C

Compal Secret Data

SATA ODD CONN

Deciphered Date

D

page32

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

MB Block Diagram

LA-5751

2 51Thursday, October 29, 2009

E

0.3

A

B

C

D

E

DDR3 Voltage Rails

SMBUS Control Table

N10x Thermal Sensor

X

X X

X

X X

X

V

+3VS

X

+3VS

X

WLAN WWAN

+5VS

power plane

1 1

+B

State

+5VALW

+3VALW

+1.5V

+3VS

+1.5VS

+VCCP

+CPU_CORE

+VGA_CORE

+1.8VS

+0.75VS

+1.05VS

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

SOURCE

KB926

+3VALW

KB926

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

RAM M2 BATT KE926 SODIMM CLK CHIP

X V

X

V

+3VALW

X

+3VALW

X

V

+3VALW

X

V V

+3VS

X

N10x

X

Cap sensor board

+3VS

NEW

PCH

CARD

X

XX

X

V

X X

X

V

+3VS

XXX X X X X X

V

+3VALW

X

S0

S3

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O

X

O

X

O

X X

X

X X X

OO

I2C / SMBUS ADDRESSING

X

DEVICE

DDR SO-DIMM 0

X

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

HEX

A0

D2

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

@ FUNCTION

DescriptionStructure

45@ BT@ 3G@ CAP@ CMOS@

3 3

ESATA@ E-SATA function HDMI@

45 BOM Blue Tooth function 3G function (WWAN) CAP Sensor function CMOS CAMERA function

HDMI function (UMA or DIS)

UMA_HDMI@ HDMI function (UMA only)

X76@ X76 BOM 100@ GIGA@ UMA@ DIS@

10/100 LAN function GIGA LAN function UMA only (Arrandale) DIS only (Arrandale)

SKU

Arrandale(dGPU)

4 4

DIS only

Arrandale(iGPU)

UMA only

A

DIS@

UMA@

B

NON-USE

PCIE PORT LIST

DEVICEPORT

1 2

LAN

3

3G

4

NEW CARD

5 6 7 8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/03/24 2008/04/

Compal Secret Data

Deciphered Date

D

USB PORT LIST

DEVICEPORT

RIGHT SIDE0

1WLAN

LEFT SIDE CMOS

2 3

LEFT SIDE

4

RIGHT SIDE

5

CARD READER

6 7

WIRELESS8 9

NEW CARD

10

BT

11 12

3G

13

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

MB Notes List

LA-5751

E

0.3

3 51Thursday, October 29, 2009

0.3

A

B

C

D

E

Performance Mode P0 TDP at Tj = 102 C* (DDR3)VGA and DDR3 Voltage Rails (N11x GPIO)

GPIO I/O ACTIVE Function Description

GPIO0

GPIO1

GPIO2

1 1

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

2 2

GPIO14

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

N/A

IN

OUT

I/O

OUT

I/O

IN

OUT

IN

OUT

IN

N/A

-

Hot plug detect for IFP link C

Panel Back-Light brightness(PWM capable)

H

Panel Power Enable

H

Panel Back-Light On/Off (PWM)

H

GPU VID0

-

GPU VID1

-

N/A

-

Reserve 10K pull low.

N/A

-

Reserve 10K pull low.

N/A

-

PAD

N/A

Products

N11M-GE1 64bit 512MB DDR3

N11M-GE1/LP1 (40nm)

Power Sequence

(+3VS)

GPU Mem NVCLK (4) (1,5) (6)

(W) (W)

14.02

/MCLK NVVDD

(V) (A) (W) (A) (W) (A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)

(MHz)

2.16

TBD TBD 12.9 12.26 0.66 0.99 1.3 1.95 530 84 0.15 38 0.130.56 140 0.15

GPIO6GPIO5

Device ID

GPU_VID0 VGA_CORE

0x0A7D

The ramp time for any rail must be more than 40us

GPU_VID1

0

1

VDD33

FBVDD

0

1

FBVDDQ PCI Express I/O and (GPU+Mem) (1.5V)(1.5V)

(1.05V)

P-State

Deep P12

0.8V

P8

0.85V

P0

1.03V

PLLVDD

I/O and PLLVDD

Other

(3.3V)(1.05V)(1.8V)

PEX_VDD can ramp up any time

(1.05VS)

3 3

(+VGA_CORE)

PEX_VDD

tNVVDD

NVVDD

tNV-IFPAB_IOVDD

(1.8VS)IFPAB_IOVDD

tNV-FBVDDQ

(1.5VS)

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

FBVDDQ

Compal Secret Data

2009/03/16 2010/03/15

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

VGA Notes List

LA-5751

4 51Thursday, October 29, 2009

E

0.3

5

D D

C C

VCCP_POK<46>

FROM POWER VTT POWER GOOD SIGNAL

B B

R184

1K_0402_1%

12

Layout rule：10mil width trace length < 0.5", spacing 20mil

+VCCP

H_PROCHOT#<34,48>

H_THERMTRIP#<16>

+VCCP

H_PM_SYNC<15>

H_CPUPWRGD<16>

PM_DRAM_PWRGD<15>

R183

R183 560_0402_5%

560_0402_5%

1 2

BUF_PLT_RST#<16,19,28,29>

R564 0_0402_5%R564 0_0402_5%

H_PECI<16>

+VCCP

1.5K_0402_5%

4

1 2

TP_SKTOCC#

12

R16349.9_0402_1% R16349.9_0402_1%

H_PECI_ISO

1 2

R569 68_0402_5%R569 68_0402_5%

12

H_PROCHOT#

H_THERMTRIP#

H_CPURST#_R

12

R13568_0402_5% R13568_0402_5%

H_PM_SYNC_R

R187

1 2

0_0402_5%

VCCPWRGOOD_1

R190

1 2

0_0402_5%

VCCPWRGOOD_0

R139

1 2

0_0402_5%

VDDPWRGOOD_R

R191

1 2

0_0402_5%

R185

PLT_RST#_R

1 2

R56020_0402_1% R56020_0402_1%

R55820_0402_1% R55820_0402_1%

R54849.9_0402_1% R54849.9_0402_1%

R55749.9_0402_1% R55749.9_0402_1%

H_CATERR#

VTT_POK

12

R186

R186 750_0402_1%

750_0402_1%

COMP3

COMP2

COMP1

COMP0

JCPU1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,AUB_CFD_rPGA,R1P0

ME@

3

MISC THERMAL

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY# PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDI

TDO

CLK_CPU_BCLK

A16

CLK_CPU_BCLK#

B16

CLK_CPU_ITP

AR30

CLK_CPU_ITP#

AT30

CLK_EXP

E16

CLK_EXP#

D16

A18 A17

SM_DRAMRST#

F6

SM_RCOMP0

AL1

SM_RCOMP1

AM1

SM_RCOMP2

AN1

PM_EXTTS#0

AN15

PM_EXTTS#1

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCK

AN28

XDP_TMS

AP28

XDP_TRST#

AT27

XDP_TDI

AT29

XDP_TDO

AR27 AR29

R555 0_0402_5%R555 0_0402_5%

AP29

XDP_DBRESET#

AN25

XDP_BPM#0

AJ22

XDP_BPM#1

AK22

XDP_BPM#2

AK24

XDP_BPM#3

AJ24

XDP_BPM#4

AJ25

XDP_BPM#5

AH22

XDP_BPM#6

AK23

XDP_BPM#7

AH23

T17 PADT17 PAD T18 PADT18 PAD

3

1 2

R563 0_0402_5%R563 0_0402_5%

T19 PADT19 PAD

12

CLK_CPU_BCLK <16> CLK_CPU_BCLK# <16>

CLK_EXP <14>

pins unused by Clarksfield on the rPGA989 Package

CLK_EXP# <14>

PM_EXTTS#1_R <10,11>

2

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

PM_EXTTS#0

PM_EXTTS#1

XDP_PREQ#

XDP_TMS

XDP_TDI

XDP_TDO

XDP_TCK

XDP_TRST#

XDP_DBRESET#

1 2

R567 100_0402_1%R567 100_0402_1%

1 2

R566 24.9_0402_1%R566 24.9_0402_1%

1 2

R565 130_0402_1%R565 130_0402_1%

Layout Note:Please these resistors near Processor

1 2

R561 10K_0402_5%R561 10K_0402_5%

1 2

R562 10K_0402_5%R562 10K_0402_5%

R136 51_0402_1%@R136 51_0402_1%@

1 2

R138 51_0402_1%@R138 51_0402_1%@

1 2

R556 51_0402_1%@R556 51_0402_1%@

1 2

R134 51_0402_5%R134 51_0402_5%

1 2

R57 51_0402_1%@R57 51_0402_1%@

1 2

R133 51_0402_5%R133 51_0402_5%

1 2

R137

1K_0402_5%@

1 2

1

+VCCP

+3VS

CHECK INTEL DOCUMENT #385422

Debug Port Design Guide Rev1.3

For Intel S3 Power Reduction. For Intel S3 Power Reduction.

5

+3VALW

5

U8

2

P

B

VCCP_POK<46>

A A

VCCP_POK

2N7002_SOT23

5

4

Y

1

A

G

MC74VHC1G08DFT2G SC70 5P

3

+5VALW

2

G

Q42

4

12

R610

R610 10K_0402_5%

10K_0402_5%

S3_0.75V_EN

13

D

S

R195

1 2

1.5K_0402_1%

750_0402_1%

12

R194

S3_0.75V_EN <44>

+1.5V

12

@

R193

1.1K_0402_1%

VDDPWRGOOD_RDRAM_PWRGD

12

@

R192

R192 3K_0402_1%

3K_0402_1%

DDR3 CONNECTER

DRAMRST#<10,11>

PCH GPIO CONTROL

DRAMRST_CNTRL_PCH<16>

DRAMRST_CNTRL_EC<34>

EC GPIO CONTROL

6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.5V

R301

R301 1K_0402_1%

1K_0402_1%

1 2

DRAMRST# SM_DRAMRST#

DRAMRST_CNTRL_R

1 2

R281 0_0402_5%R281 0_0402_5%

1 2

R282 0_0402_5%@R282 0_0402_5%@

Compal Secret Data

2008/10/31 2009/10/31

Compal Secret Data

1 2

D

1 3

Q27

2N7002_SOT23

C338

Deciphered Date

2

@

R3000_0402_5%@R3000_0402_5%

S

G

2

1

0.01U_0402_16V7K

2

12

R283 100K_0402_5%R283 100K_0402_5%

Custom

Date: Sheet of

3

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

Arrandale(1/5)-Thermal/XDP

LA-5751

1

5 51Friday, October 30, 2009

0.3

5

JCPU1A

DMI_CRX_PTX_N0<15> DMI_CRX_PTX_N1<15> DMI_CRX_PTX_N2<15> DMI_CRX_PTX_N3<15>

DMI_CRX_PTX_P0<15> DMI_CRX_PTX_P1<15>

D D

DMI_CRX_PTX_P2<15> DMI_CRX_PTX_P3<15>

DMI_CTX_PRX_N0<15> DMI_CTX_PRX_N1<15> DMI_CTX_PRX_N2<15> DMI_CTX_PRX_N3<15>

DMI_CTX_PRX_P0<15> DMI_CTX_PRX_P1<15> DMI_CTX_PRX_P2<15> DMI_CTX_PRX_P3<15>

FDI_CTX_PRX_N0<15> FDI_CTX_PRX_N1<15> FDI_CTX_PRX_N2<15> FDI_CTX_PRX_N3<15> FDI_CTX_PRX_N4<15> FDI_CTX_PRX_N5<15> FDI_CTX_PRX_N6<15> FDI_CTX_PRX_N7<15>

FDI_CTX_PRX_P0<15> FDI_CTX_PRX_P1<15> FDI_CTX_PRX_P2<15> FDI_CTX_PRX_P3<15> FDI_CTX_PRX_P4<15> FDI_CTX_PRX_P5<15>

C C

FDI_CTX_PRX_P6<15> FDI_CTX_PRX_P7<15>

FDI_FSYNC0<15> FDI_FSYNC1<15>

FDI_INT<15>

FDI_LSYNC0<15> FDI_LSYNC1<15>

B B

A A

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

FDI_FSYNC0

FDI_FSYNC1

FDI_INT

FDI_LSYNC0

FDI_LSYNC1

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD_rPGA,R1P0

ME@

R532 1K_0402_5%DIS@R532 1K_0402_5%DIS@

1 2

R536 1K_0402_5%DIS@R536 1K_0402_5%DIS@

1 2

R534 1K_0402_5%DIS@R534 1K_0402_5%DIS@

1 2

R533 1K_0402_5%DIS@R533 1K_0402_5%DIS@

1 2

R535 1K_0402_5%DIS@R535 1K_0402_5%DIS@

1 2

PEG_RCOMPO

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

PEG_ICOMPI

PEG_ICOMPO

PEG_RBIAS

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

4

EXP_ICOMPI

1 2

EXP_RBIAS

1 2

PCIE_CRX_GTX_N15 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_N12 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_N10

PCIE_CRX_GTX_N9 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P15 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_P11 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_P9 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_P0

PCIE_CTX_GRX_C_N15 PCIE_CTX_GRX_C_N14 PCIE_CTX_GRX_C_N13 PCIE_CTX_GRX_C_N12 PCIE_CTX_GRX_C_N11 PCIE_CTX_GRX_C_N10 PCIE_CTX_GRX_C_N9 PCIE_CTX_GRX_C_N8 PCIE_CTX_GRX_C_N7 PCIE_CTX_GRX_C_N6 PCIE_CTX_GRX_C_N5 PCIE_CTX_GRX_C_N4 PCIE_CTX_GRX_C_N3 PCIE_CTX_GRX_C_N2 PCIE_CTX_GRX_C_N1 PCIE_CTX_GRX_C_N0

PCIE_CTX_GRX_C_P15 PCIE_CTX_GRX_C_P14 PCIE_CTX_GRX_C_P13 PCIE_CTX_GRX_C_P12 PCIE_CTX_GRX_C_P11 PCIE_CTX_GRX_C_P10 PCIE_CTX_GRX_C_P9 PCIE_CTX_GRX_C_P8 PCIE_CTX_GRX_C_P7 PCIE_CTX_GRX_C_P6 PCIE_CTX_GRX_C_P5 PCIE_CTX_GRX_C_P4 PCIE_CTX_GRX_C_P3 PCIE_CTX_GRX_C_P2 PCIE_CTX_GRX_C_P1 PCIE_CTX_GRX_C_P0

Layout rule：trace length < 0.5"

R544 49.9_0402_1%R544 49.9_0402_1%

R545 750_0402_1%R545 750_0402_1%

PCIE_CRX_GTX_N[0..15] <19>

PCIE_CRX_GTX_P[0..15] <19>

PCIE Lane Numbers Reversed CFG3-PCI Express Static Lane Reversal

DIS@

C527 0.1U_0402_10V6KC527 0.1U_0402_10V6K

1 2

C540 0.1U_0402_10V6KC540 0.1U_0402_10V6K

1 2

C529 0.1U_0402_10V6KC529 0.1U_0402_10V6K

1 2

C542 0.1U_0402_10V6KC542 0.1U_0402_10V6K

1 2

C531 0.1U_0402_10V6KC531 0.1U_0402_10V6K

1 2

C544 0.1U_0402_10V6KC544 0.1U_0402_10V6K

1 2

C533 0.1U_0402_10V6KC533 0.1U_0402_10V6K

1 2

C546 0.1U_0402_10V6KC546 0.1U_0402_10V6K

1 2

C535 0.1U_0402_10V6KC535 0.1U_0402_10V6K

1 2

C562 0.1U_0402_10V6KC562 0.1U_0402_10V6K

1 2

C564 0.1U_0402_10V6KC564 0.1U_0402_10V6K

1 2

C555 0.1U_0402_10V6KC555 0.1U_0402_10V6K

1 2

C557 0.1U_0402_10V6KC557 0.1U_0402_10V6K

1 2

C561 0.1U_0402_10V6KC561 0.1U_0402_10V6K

1 2

C548 0.1U_0402_10V6KC548 0.1U_0402_10V6K

1 2

C559 0.1U_0402_10V6KC559 0.1U_0402_10V6K

1 2

C528 0.1U_0402_10V6KC528 0.1U_0402_10V6K

1 2

C541 0.1U_0402_10V6KC541 0.1U_0402_10V6K

1 2

C530 0.1U_0402_10V6KC530 0.1U_0402_10V6K

1 2

C543 0.1U_0402_10V6KC543 0.1U_0402_10V6K

1 2

C532 0.1U_0402_10V6KC532 0.1U_0402_10V6K

1 2

C545 0.1U_0402_10V6KC545 0.1U_0402_10V6K

1 2

C534 0.1U_0402_10V6KC534 0.1U_0402_10V6K

1 2

C547 0.1U_0402_10V6KC547 0.1U_0402_10V6K

1 2

C536 0.1U_0402_10V6KC536 0.1U_0402_10V6K

1 2

C563 0.1U_0402_10V6KC563 0.1U_0402_10V6K

1 2

C565 0.1U_0402_10V6KC565 0.1U_0402_10V6K

1 2

C556 0.1U_0402_10V6KC556 0.1U_0402_10V6K

1 2

C558 0.1U_0402_10V6KC558 0.1U_0402_10V6K

1 2

C560 0.1U_0402_10V6KC560 0.1U_0402_10V6K

1 2

C549 0.1U_0402_10V6KC549 0.1U_0402_10V6K

1 2

C550 0.1U_0402_10V6KC550 0.1U_0402_10V6K

1 2

PCIE_CTX_GRX_N15 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P15 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_P0

PCIE_CTX_GRX_N[0..15] <19>

PCIE_CTX_GRX_P[0..15] <19>

3

R59

@R59

@

1 2

3.01K_0402_1%

FOR ES1 SAMPLE ONLY

R547

R547 0_0402_5%

0_0402_5%

1 2 1 2

R546

0_0402_5%

CFG Straps for PROCESSOR

CFG0

PCI-Express Configuration Select

CFG0

Not applicable for Clarksfield Processor

CFG[1:0] 11=1*16 PEG

CFG3

CFG3-PCI Express Static Lane Reversal

CFG4

CFG4-Display Port Presence

CFG4

@

1 2

R58 3.01K_0402_1%

1: Single PEG 0: Bifurcation enabled

10=2*8 PEG

1 2

R61 3.01K_0402_1%R61 3.01K_0402_1%

1: Normal Operation

0: Lane Numbers Reversed

CFG3

15 -> 0, 14 ->1, .....

@

1 2

R60 3.01K_0402_1%

1: Disabled; No Physical Display Port attached to Embedded Display Port

0: Enabled; An external Display Port device is connected to the Embedded Display Port

2

JCPU1E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

CFG0

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG3 CFG4

CFG7

H_RSVD17_R

@

H_RSVD18_R

@

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,AUB_CFD_rPGA,R1P0

ME@

RSVD_NCTF_37

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RESERVED

RSVD32 RSVD33

RSVD34 RSVD35

RSVD36

RSVD38 RSVD39

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53

RSVD58

RSVD_TP_59 RSVD_TP_60

RSVD62 RSVD63 RSVD64 RSVD65

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AP1 AT2

AT3 AR1

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32

E15 F15 A2

KEY

D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS

RSVD64_R RSVD65_R

R189

R189 0_0402_5%

0_0402_5%

R188

R188 0_0402_5%

0_0402_5%

1

@

12

@

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Arrandale(2/5)-DMI/PEG/FDI

LA-5751

1

6 51Friday, October 30, 2009

0.3

5

JCPU1C

4

3

JCPU1D

2

1

D D

DDR_A_D[0..63]<10>

C C

B B

DDR_A_BS0<10> DDR_A_BS1<10> DDR_A_BS2<10>

DDR_A_CAS#<10> DDR_A_RAS#<10> DDR_A_WE#<10>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ10

AL10

AK12

AK11

AM10 AR11 AL11

AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14

A10

SA_DQ[0]

C10

SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]

B10

SA_DQ[4]

D10

SA_DQ[5]

E10

SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15]

H10

SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20]

G10

SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31]

AH5

SA_DQ[32]

AF5

SA_DQ[33]

AK6

SA_DQ[34]

AK7

SA_DQ[35]

AF6

SA_DQ[36]

AG5

SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39] SA_DQ[40]

AJ9

SA_DQ[41] SA_DQ[42] SA_DQ[43]

AK8

SA_DQ[44]

AL7

SA_DQ[45] SA_DQ[46]

AL8

SA_DQ[47]

AN8

SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51]

AM9

SA_DQ[52]

AN9

SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

AC3

SA_BS[0]

AB2

SA_BS[1]

U7

SA_BS[2]

AE1

SA_CAS#

AB3

SA_RAS#

AE9

SA_WE#

DDR SYSTEM MEMORY A

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0]

SA_DM[1]

SA_DM[2]

SA_DM[3]

SA_DM[4]

SA_DM[5]

SA_DM[6]

SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 <10> M_CLK_DDR#0 <10> DDR_CKE0_DIMMA <10>

M_CLK_DDR1 <10> M_CLK_DDR#1 <10> DDR_CKE1_DIMMA <10>

DDR_CS0_DIMMA# <10> DDR_CS1_DIMMA# <10>

M_ODT0 <10> M_ODT1 <10>

DDR_A_DM[0..7] <10>

DDR_A_DQS#[0..7] <10>

DDR_A_DQS[0..7] <10>

DDR_A_MA[0..15] <10>

DDR_B_D[0..63]<11>

DDR_B_BS0<11> DDR_B_BS1<11> DDR_B_BS2<11>

DDR_B_CAS#<11> DDR_B_RAS#<11> DDR_B_WE#<11>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AR10

AT10

B5

SB_DQ[0]

A5

SB_DQ[1]

C3

SB_DQ[2]

B3

SB_DQ[3]

E4

SB_DQ[4]

A6

SB_DQ[5]

A4

SB_DQ[6]

C4

SB_DQ[7]

D1

SB_DQ[8]

D2

SB_DQ[9]

F2

SB_DQ[10]

F1

SB_DQ[11]

C2

SB_DQ[12]

F5

SB_DQ[13]

F3

SB_DQ[14]

G4

SB_DQ[15]

H6

SB_DQ[16]

G2

SB_DQ[17]

J6

SB_DQ[18]

J3

SB_DQ[19]

G1

SB_DQ[20]

G5

SB_DQ[21]

J2

SB_DQ[22]

J1

SB_DQ[23]

J5

SB_DQ[24]

K2

SB_DQ[25]

L3

SB_DQ[26]

M1

SB_DQ[27]

K5

SB_DQ[28]

K4

SB_DQ[29]

M4

SB_DQ[30]

N5

SB_DQ[31]

AF3

SB_DQ[32]

AG1

SB_DQ[33]

AJ3

SB_DQ[34]

AK1

SB_DQ[35]

AG4

SB_DQ[36]

AG3

SB_DQ[37]

AJ4

SB_DQ[38]

AH4

SB_DQ[39]

AK3

SB_DQ[40]

AK4

SB_DQ[41]

AM6

SB_DQ[42]

AN2

SB_DQ[43]

AK5

SB_DQ[44]

AK2

SB_DQ[45]

AM4

SB_DQ[46]

AM3

SB_DQ[47]

AP3

SB_DQ[48]

AN5

SB_DQ[49]

AT4

SB_DQ[50]

AN6

SB_DQ[51]

AN4

SB_DQ[52]

AN3

SB_DQ[53]

AT5

SB_DQ[54]

AT6

SB_DQ[55]

AN7

SB_DQ[56]

AP6

SB_DQ[57]

AP8

SB_DQ[58]

AT9

SB_DQ[59]

AT7

SB_DQ[60]

AP9

SB_DQ[61] SB_DQ[62] SB_DQ[63]

AB1

SB_BS[0]

W5

SB_BS[1]

R7

SB_BS[2]

AC5

SB_CAS#

Y7

SB_RAS#

AC6

SB_WE#

DDR SYSTEM MEMORY - B

SB_CK[0]

SB_CK#[0]

SB_CKE[0]

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

W8 W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

M_CLK_DDR2 <11> M_CLK_DDR#2 <11> DDR_CKE2_DIMMB <11>

M_CLK_DDR3 <11> M_CLK_DDR#3 <11> DDR_CKE3_DIMMB <11>

DDR_CS2_DIMMB# <11> DDR_CS3_DIMMB# <11>

M_ODT2 <11> M_ODT3 <11>

DDR_B_DM[0..7] <11>

DDR_B_DQS#[0..7] <11>

DDR_B_DQS[0..7] <11>

DDR_B_MA[0..15] <11>

IC,AUB_CFD_rPGA,R1P0

ME@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

IC,AUB_CFD_rPGA,R1P0

ME@

Compal Secret Data

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Arrandale(3/5)-DDR III

LA-5751

1

0.3

7 51Friday, October 30, 2009

0.3

5

+CPU_CORE

JCPU1F

D D

C C

B B

A A

48A 15A18A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R1P0

ME@

CPU CORE SUPPLY

5

1.1V RAIL POWER

POWER

PROC_DPRSLPVR

CPU VIDS

VSS_SENSE_VTT

SENSE LINES

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VTT_SELECT

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

PSI#

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34

G15

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 PM_DPRSLPVR_R

VTT_SELECT

10U_0805_6.3V6M

C199

C201

1

2

10U_0805_6.3V6M

C271

C270

1

2

C270

1

@

2

10U_0805_6.3V6M

C208

1

2

R608 1K_0402_5%R608 1K_0402_5%

1 2

R56 0_0402_5%R56 0_0402_5%

1

2

1

2

+VCCP

C209

PSI# <48>

H_VID[0..6] <48>

H_VTTVID1 = Low, 1.1V FOR Clarksfiel

H_VTTVID1 = High, 1.05V FOR Auburndale

AN35

AJ34 AJ35

B15 A15

VCC_SENSE VSS_SENSE

IMVP_IMON <48>

0_0402_5%

R554

1 2 1 2

R553 0_0402_5%R553 0_0402_5%

VTT_SENSE <46>

@

T15PAD@T15PAD

Close to CPU

VCCSENSE

VSSSENSE

1 2

R552 100_0402_1%R552 100_0402_1%

1 2

R551 100_0402_1%R551 100_0402_1%

10U_0805_6.3V6M

C198

C216

VCCSENSE VSSSENSE

10U_0805_6.3V6M

1

2

10U_0805_6.3V6M

1

2

1

2

+CPU_CORE

C181

C182

10U_0805_6.3V6M

4

+VCCP

330U_D2_2.5VY_R9M

C554

1

+

2

10U_0805_6.3V6M

C200

1

2

10U_0805_6.3V6M

C219

1

2

PROC_DPRSLPVR <48>

VTT_SELECT <46>

VCCSENSE <48> VSSSENSE <48>

4

3

+GFX_CORE

22U_0805_6.3V6M

1

C160

C161

@

2

22U_0805_6.3V6M

12

R559

R559 0_0402_5%

0_0402_5%

DIS@

+VCCP

10U_0805_6.3V6M

C207

C274

C217

1

2

CPU

1

C191

@

2

22U_0805_6.3V6M

1

SUSP<39,44,45>

22U_0805_6.3V6M

1

C190

@

2

22U_0805_6.3V6M

1

@

2

22U_0805_6.3V6M

+5VALW

2

G

1

C189

UMA@

C591

C159

UMA@

2

10U_0805_6.3V6M

+VCCP

10U_0805_6.3V6M

C214

C215

1

2

+1.5V +1.5V_DDR3

R268

R268 20K_0402_5%

20K_0402_5%

1.5V_DDR3_GATE

13

D

S

3

C215

1

2

J3

2

JUMP_43X118

@

J2

2

JUMP_43X118

@

U11

8

D

7

D

6

D

5

D

SI4800BDY-T1-E3_SO8

Q23

Q23 2N7002_SOT23

2N7002_SOT23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_0805_6.3V6M

1

C592

UMA@

2

+VCCP

10U_0805_6.3V6M

C210

1

2

10U_0805_6.3V6M

C272

1

2

112

1

S

2

S

3

S

4

G

R267

R267 0_0402_5%

0_0402_5%

@

1 2

1

2

1

2

JCPU1G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

10U_0805_6.3V6M

C211

10U_0805_6.3V6M

C240

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD_rPGA,R1P0

ME@

GRAPHICS

FDI PEG & DMI

For Intel S3 Power Reduction.

0.1U_0402_10V6K

C289

1

2

+1.5V_DDR3

1

C325

0.1U_0603_25V7K

2

2008/10/31 2009/10/31

2

Compal Secret Data

POWER

+1.5V

0.1U_0402_10V6K

C288

C287

1

2

Deciphered Date

2

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

3A

0.6A

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

DDR3 - 1.5V RAILS

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65

1.1V1.8V

VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

2

0.1U_0402_10V6K

0.1U_0402_10V6K C286

C286

1

2

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

GFX_VR_EN

GFX_IMON

1

2

1

+

@

2

1U_0603_10V4Z

C167

1

2

@

SUSP

1U_0603_10V4Z

C254

220U_B2_2.5VM_R35

C268

1

2

0.1U_0402_10V6K

1

2

UMA@

1 2

1U_0603_10V4Z

1

2

22U_0805_6.3V6M

1

2

1U_0603_10V4Z

C149

1

2

+1.5V_DDR3

C269

2

G

C256

C252

12

13

VCC_AXG_SENSE <47> VSS_AXG_SENSE <47>

GFXVR_VID_0 <47> GFXVR_VID_1 <47> GFXVR_VID_2 <47> GFXVR_VID_3 <47> GFXVR_VID_4 <47> GFXVR_VID_5 <47> GFXVR_VID_6 <47>

R141 0_0402_5%

+1.5V_DDR3

1U_0603_10V4Z

C253

C255

1

2

22U_0805_6.3V6M

Modify for cost revew.

C258

1

09/16/2009

2

+VCCP

10U_0805_6.3V6M

C273

C212

1

2

+VCCP

10U_0805_6.3V6M

C213

C218

1

2

+1.8VS

10U_0805_6.3V6M

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C168

C168

C169

1

2

R233

R233 220_0402_5%

220_0402_5%

D

Q19

Q19 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

S

For Intel S3 Power Reduction.

Title

Size Document Number Rev

Custom

Date: Sheet of

1

R132

GFX_IMON

R132

DIS@

12

AS NO CONNECT

BUT A SMALL AMOUNT OF POWER

(~15MW) MAYBE WASTED

DESIGN GUIDE REV1.1

R140

GFX_VR_EN

GFXVR_EN <47> GFXVR_DPRSLPVR <47>

GFXVR_IMON <47>

1U_0603_10V4Z

C257

1

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K C170

C170

Compal Electronics, Inc.

Arrandale(4/5)-PWR

LA-5751

1

R140

1 2

UMA@

1

8 51Friday, October 30, 2009

1K_0402_5%

4.7K_0402_5%

0.3

5

JCPU1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

D D

C C

B B

AR17 AR15 AR12

AP20 AP17 AP13 AP10

AN34 AN31 AN23 AN20

AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AL34

AL31

AL23

AL20

AL17

AL12

AK29 AK27 AK25 AK20 AK17

AJ31

AJ23

AJ20

AJ17

AJ14

AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AG10

AE35

VSS8 VSS9 VSS10 VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14 VSS15 VSS16 VSS17 VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75 VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

4

JCPU1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

NCTF

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

AT35 AT1 AR34 B34 B2 B1 A35

VSS_NCTF1_R VSS_NCTF2_R VSS_NCTF3_R VSS_NCTF4_R VSS_NCTF5_R VSS_NCTF6_R VSS_NCTF7_R

3

+CPU_CORE

2

1

CPU CORE

22U_0805_6.3V6M

C585

C568

1

2

10U_0805_6.3V6M

C163

C147

1

2

10U_0805_6.3V6M

C192

C195

1

2

22U_0805_6.3V6M

C580

1

2

10U_0805_6.3V6M

C162

1

2

10U_0805_6.3V6M

C88

1

2

22U_0805_6.3V6M

C579

C574

1

2

1

2

1

2

C574

1

2

10U_0805_6.3V6M

C193

C179

1

2

10U_0805_6.3V6M

C196

C180

1

2

Under cavity

22U_0805_6.3V6M

C584

C578

C573

1

2

10U_0805_6.3V6M

C166

1

2

10U_0805_6.3V6M

C89

1

2

C578

1

2

10U_0805_6.3V6M

C148

C165

1

2

10U_0805_6.3V6M

C197

22U_0805_6.3V6M

C583

C577

1

2

1

2

1

2 3

C577

1

2

10U_0805_6.3V6M

C194

between Inductor and socket

470U_D2T_2VM

C76

C75

1

+

2 3

22U_0805_6.3V6M

C571

C572

1

2

470U_D2T_2VM

1

+

2 3

2

C92

1

+

2 3

Inside cavity

470U_D2T_2VM

C164

22U_0805_6.3V6M

C91

1

2

22U_0805_6.3V6M

C129

C90

C129

C87

1

2

470uF 4.5mohm

IC,AUB_CFD_rPGA,R1P0

ME@

A A

5

IC,AUB_CFD_rPGA,R1P0

ME@

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Arrandale(5/5)-GND/Bypass

LA-5751

1

9 51Thursday, October 29, 2009

0.3

5

+VREF_DQ_DIMMA

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K C303

C303

1

2

D D

C C

B B

A A

2

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7>

DDR_A_WE#<7> DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

+3VS

1

2

5

DDR_A_D0

C347

DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS# M_ODT0

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

1 2

10K_0402_5%

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

C608

C617

1

2

+1.5V +1.5V

3A@1.5V

3A@1.5V3A@1.5V

DDR3 SO-DIMM A

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

R570

10K_0402_5%

12

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

R571

VTT1

205

G1

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F ME@

ME@

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44

DQ45 VSS35 DQS#5

DQS5

VSS38

DQ46

DQ47 VSS40

DQ52

DQ53 VSS42

DM6

VSS43

DQ54

DQ55 VSS45

DQ60

DQ61 VSS47 DQS#7

DQS7

VSS50

DQ62

DQ63 VSS52

EVENT#

SDA

VTT2

A15 A14

A11

A7

A6 A4

A2 A0

CK1

BA1

S0#

NC2

SCL

G2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

4

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA#

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3

+0.75VS

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

4

DRAMRST# <5,11>

DDR_CKE1_DIMMA <7>

M_CLK_DDR1 <7> M_CLK_DDR#1 <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7> M_ODT0 <7>

M_ODT1 <7>

0.1U_0402_10V6K

0.1U_0402_10V6K C346

C346

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

VREF =

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

PM_EXTTS#1_R <5,11>

SMB_DATA_S3 <11,12,14,28> SMB_CLK_S3 <11,12,14,28>

DDR_A_D[0..63]<7>

DDR_A_DM[0..7]<7>

DDR_A_DQS[0..7]<7>

DDR_A_DQS#[0..7]<7>

DDR_A_MA[0..15]<7>

+VREF_DQ_DIMMA

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C355

C355

4*0402 1uf

1*0402 2.2uf

3

Layout Note: Place near DIMM

+1.5V

10U_0603_6.3V6M

C588

C589

1

@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

C586

1

2

+0.75VS

C607

C605

1U_0603_10V4Z

C605

1U_0603_10V4Z

1

2

Compal Secret Data

C581

1

2

1U_0603_10V4Z

10U_0603_6.3V6M

C310

1

2

C606

C300

1U_0603_10V4Z

1

2

Deciphered Date

2

10U_0603_6.3V6M

C570

C309

1

2

C301

1U_0603_10V4Z

C301

1U_0603_10V4Z

1

2

1

+1.5V

12

R297

1K_0402_1%

For Arranale only +VREF_DQ_DIMMA supply from a external 1.5V voltage divide circuit. 07/17/2009

10U_0603_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K C314

C308

1

2

C314

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C317

C317

C315

1

2

Title

Size Document Number Rev

Custom

Date: Sheet of

1

2

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

0.1U_0402_10V6K

0.1U_0402_10V6K C316

C316

R305

1

+

2

+VREF_DQ_DIMMA

12

C569

C569 220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

LA-5751

1

0.3

10 51Friday, October 30, 2009

0.3

5

+VREF_DQ_DIMMB

2.2U_0603_6.3V4Z

0.1U_0402_10V6K

1

C382

+3VS

2

DDR_CKE2_DIMMB<7>

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDR_CS3_DIMMB#<7>

2.2U_0603_6.3V4Z

1

2

D D

C C

B B

A A

+VREF_DQ_DIMMB

DDR_B_D0 DDR_B_D1

1

C384

DDR_B_DM0

2

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

1 2

10K_0402_5%

0.1U_0402_10V6K

C618

C616

1

2

5

+1.5V +1.5V

3A@1.5V

3A@1.5V3A@1.5V

JDIMM2

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

R572

1 2

R573 10K_0402_5%R573 10K_0402_5%

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

TYCO_2-2013297-2~D

ME@

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1#

VDD

RAS#

VDD

ODT0

VDD ODT1

VDD

VREF_CA

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

GND1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78

A15

80

A14

82 84

A11

86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102

CK1

104 106 108

BA1

110 112 114

S0#

116 118 120 122

NC

124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202

SCL

204

VTT

206

4

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23DDR_B_D18

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

4

DDR_B_DQS#[0..7]<7>

DDR_B_D[0..63]<7>

DDR_B_DM[0..7]<7>

DDR_B_DQS[0..7]<7>

DDR_B_MA[0..15]<7>

DRAMRST# <5,10>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7> M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7> M_ODT2 <7>

M_ODT3 <7>

1

2

0.1U_0402_10V6K

C385

+VREF_DQ_DIMMB

2.2U_0603_6.3V4Z

C383

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

4*0402 1uf

1*0402 2.2uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

PM_EXTTS#1_R <5,10>

SMB_DATA_S3 <10,12,14,28> SMB_CLK_S3 <10,12,14,28>

+0.75VS

3

Layout Note: Place near DIMM

+1.5V

10U_0603_6.3V6M

C587

C582

1

@

2

Layout Note: Place near DIMM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

10U_0603_6.3V6M

C576

1

2

+0.75VS

1U_0603_10V4Z

10U_0603_6.3V6M

C595

C596

1

2

2008/10/31 2009/10/31

10U_0603_6.3V6M

C311

1

2

1U_0603_10V4Z

C299

1

2

10U_0603_6.3V6M

C313

1

2

1U_0603_10V4Z

C598

1

2

Compal Secret Data

10U_0603_6.3V6M

C590

1

2

Deciphered Date

2

10U_0603_6.3V6M

C575

C312

1

2

1

+1.5V

12

R341

1K_0402_1%

For Arranale only +VREF_DQ_DIMMB supply from a external 1.5V voltage divide circuit. 07/17/2009

0.1U_0402_10V6K

0.1U_0402_10V6K C304

C304

C307

1

2

0.1U_0402_10V6K

C305

C306

1

2

C306

1

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

R340

+VREF_DQ_DIMMB

12

LA-5751

1

0.3

11 51Friday, October 30, 2009

0.3

5

4

3

2

1

Reserve for Low Power CLK GEN. RTM890N-631(SA00003HQ00) SLG8LV597VTR 9VLS3199 (SA00003HR00)

D D

+1.5VS

@

1 2

R2780_0603_5%@R2780_0603_5%

1 2

R2690_0603_5% R2690_0603_5%

VDD_3V3_1V5+3VS_CK505

1 PCS CAP(0.1u) BY 1 INPUT PIN

VDD_3V3_1V5

10U_0805_10V4Z

0.1U_0402_10V6K

C336

1

2

0.1U_0402_10V6K

C366

C330

C334

1

2

CLK GEN TO PCH

1. CLK_DMI

2. CLK_BUF_BCLK

3. CLK_BUF_CKSSCD

4. CLK_BUF_DOT96

5. CLK_14M_PCH

C C

CLK GEN TO VGA Unused

1. 27M_CLK

1. 27M_CLK_SS

+1.05VS_CK505+1.05VS

1 2

R2770_0603_5% R2770_0603_5%

1

2

CLK_BUF_DOT96<14>

CLK_BUF_DOT96#<14>

CLK_BUF_CKSSCD<14>

CLK_BUF_CKSSCD#<14>

CLK_DMI<14>

CLK_DMI#<14>

CLK_BUF_DOT96 CLK_BUF_DOT96#

CLK_BUF_CKSSCD CLK_BUF_CKSSCD#

CLK_DMI CLK_DMI#

+3VS_CK505

R318 0_0402_5%R318 0_0402_5%

1 2 1 2

R319 0_0402_5%R319 0_0402_5%

CLOSE U14

R324 0_0402_5%R324 0_0402_5%

1 2

R308

1 2

R307 0_0402_5%R307 0_0402_5%

1 2

R306

1 2

R299

1 2

1 PCS CAP(0.1u) BY 1 INPUT PIN

10U_0805_10V4Z

C333

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K C332

C332

C331

1

2

0.1U_0402_10V6K

C343

C335

1

2

unstuff 09.09.08

0_0402_5%

10K_0402_5%

CLK_48M_CR

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_SRC

+3VS_CK505 +1.05VS_CK505+3VS_CK505 +1.05VS_CK505

32

SCL

31

SDA

30 29 28 27 26 25

24 23 22 21 20 19 18 17

SMB_CLK_S3 SMB_DATA_S3 REF_0/CPU_SEL

CLK_XTAL_IN CLK_XTAL_OUT

CK_PWRGD

VDD_3V3_1V5 R_CLK_BUF_BCLK CLK_BUF_BCLK R_CLK_BUF_BCLK# CLK_BUF_BCLK#

VDD_3V3_1V5

L_CLK_BUF_DOT96 L_CLK_BUF_DOT96#

CLK_48M_CR_R

CLK_BUF_CKSSCD_R CLK_BUF_CKSSCD#_R

L_CLK_DMI L_CLK_DMI#

CPU_STOP#

U14

1

VDD_USB_48

2

VSS_48M

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

USB_48

9

VSS_27M

10

SATA

11

SATA#

12

VSS_SRC

13

SRC_1

14

SRC_1#

15

VDD_SRC_IO

16

CPU_STOP#

33

TGND

RTM890N-631-GRT QFN 32P

REF_0/CPU_SEL

CKPWRGD/PD#

VDD_CPU_IO

S IC SLG8SP587VTR QFN 32P CLK GEN (SA00002XY00) S IC ICS9LRS3199AKLFT MLF 32P CLK GEN (SA000030P00)

1 2

CLK_48M_CR_R

R32233_0402_1% @ R32233_0402_1% @

12

R3230_0402_5%@R3230_0402_5%

@

PIN8 IS GND FOR ICS3197

R315

12

33_0402_1%

R275 0_0402_5%R275 0_0402_5%

1 2 1 2

R276 0_0402_5%R276 0_0402_5%

CK_PWRGD

CLK_14M_PCH

2N7002_SOT23-3

SMB_CLK_S3 <10,11,14,28> SMB_DATA_S3 <10,11,14,28>

CLK_14M_PCH <14>

CLK_BUF_BCLK <14> CLK_BUF_BCLK# <14>

R298

1 2

10K_0402_5%

13

D

2

G

Q25

S

+3VS_CK505

CLK_EN# <48>

PIN8 IS 48MHz FOR ICS3199

B B

A A

+3VS

1 2

R2790_0603_5% R2790_0603_5%

+3VS_CK505

1 PCS CAP(0.1u) BY 1 INPUT PIN

10U_0805_10V4Z

0.1U_0402_10V6K

C344

1

2

(Default)

0 133MHz

1

0.1U_0402_10V6K

C342

C350

1

2

100MHz 100MHz

0.1U_0402_10V6K

0.1U_0402_10V6K C367

C367

CPU_1PIN 30 CPU_0

133MHz

+1.05VS

1 2

R317 10K_0402_5%@R317 10K_0402_5%@

1 2

R316 10K_0402_5%R316 10K_0402_5%

C364

12

10P_0402_50V8J@

C365

EMI Capacitor

REF_0/CPU_SEL

CLK_14M_PCH

REF_0/CPU_SEL

12

10P_0402_50V8J@

C348

22P_0402_50V8J

CLK_XTAL_OUT

CLK_XTAL_IN

Y1

12

14.31818MHZ_16PF_DSX840GAY114.31818MHZ_16PF_DSX840GA C349

C349 22P_0402_50V8J

22P_0402_50V8J

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CLOCK GENERATOR

LA-5751

1

12 51Friday, October 30, 2009

0.3

5

PCH_RTCX1

X1

1

2

32.768KHZ_12.5PF_9H03200413

PCH_RTCX2

C183

C183 15P_0402_50V8J

15P_0402_50V8J

HDA_BITCLK_CODEC<33>

1 2

R154 10M_0402_5%R154 10M_0402_5%

1

D D

+RTCVCC

2

1

R144

1 2

100_0603_1%

C441

0.1U_0402_16V4Z

+RTCBATT

12

CLRP1

SHORT PADS

+RTCVCC

+3VS

R421

R420

*

1

2

15P_0402_50V8J

1 2

1M_0402_5%

1 2

330K_0402_5%

H：Integrated VRM enable L：Integrated VRM disable

1 2

R452 1K_0402_5%@R452 1K_0402_5%@

C171

OSC4OSC

NC3NC

2

SM_INTRUDER#

PCH_INTVRMEN

PCH_SPKR

RF team request.

C C

GPIO33 = GPO , internal pull-up,should not be pulled low

flash ME core of strap pin pull down

(2009,07,07)

+3VALW+3VALW +3VALW +3VALW +3VS

12

@

R74

R74 200_0402_5%

200_0402_5%

12

B B

@

R117

R117 100_0402_1%

100_0402_1%

A A

PCH_JTAG_TDI

PCH_JTAG_TCK

PCH_JTAG_RST#

RefDesPCH Pin

R591

R590

R584

R583

R586

R580

R595

R594

12

@

R72

R72 200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_RST#PCH_JTAG_TDO PCH_JTAG_TDI

12

@

R115

R115 100_0402_1%

100_0402_1%

PCH JTAG Pre-Production

ES1 MPES2

No Install

200ohm

100ohm 100ohm

200ohm

100ohm 100ohm

51ohm

20Kohm 20Kohm

10Kohm 10Kohm

5

12

@

R73

R73 200_0402_5%

200_0402_5%

12

@

R116

R116 100_0402_1%

100_0402_1%

PCH JTAG Production

*

200ohm

No Install

100ohm

No InstallPCH_JTAG_TDO

200ohm

No Install

No InstallPCH_JTAG_TMS

200ohm

No InstallR587

No Install

51ohm 51ohm

No Install

@

R75

R75 20K_0402_5%

20K_0402_5%

1 2

12

@

R118

R118 10K_0402_5%

10K_0402_5%

PCH_JTAG_TCK

FOR INTEL DPDG REV1.6 (MAY 2009)

4

+RTCVCC

@

C64712P_0402_50V8J

1 2

HDA_SYNC_CODEC<33>

1 2

C64812P_0402_50V8J@C64812P_0402_50V8J

@

HDA_RST_CODEC#<33>

HDA_SDOUT_CODEC<33>

R114 51_0402_5%R114 51_0402_5%

1 2

4

C184

1U_0603_10V4Z

1 2

R419 20K_0402_1%R419 20K_0402_1%

1 2

R422 20K_0402_1%R422 20K_0402_1%

C202

1U_0603_10V4Z

PCH_SPKR<33>

HDA_SDIN1<33>

ME_FLASH<34>

+3VALW

1

12

CLRP3

SHORT PADS

2

1

12

CLRP2

SHORT PADS

2

R168 33_0402_5%R168 33_0402_5%

1 2

R167 33_0402_5%R167 33_0402_5%

1 2

R169 33_0402_5%R169 33_0402_5%

1 2

R166 33_0402_5%R166 33_0402_5%

1 2

R424 10K_0402_5%

SPI_CLK_PCH

1 2

(2009,05,04)

PCH_RTCX1 PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

BITCLK

HDA_SYNC

PCH_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

R409 1K_0402_5%@R409 1K_0402_5%@ R425 0_0402_5%R425 0_0402_5%

1 2

R99

0_0402_5%

HDA_SDOUT

1 2 1 2

@

GPIO13 = GPI,3.3V,SUS

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

SPI_CLK_PCH_R

SPI_SB_CS0#

SPI_SI

SPI_SO_R

GPIO13

3

U7A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M_FCBGA1071

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

RTCIHDA

SPI JTAG

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA

SATA0GP / GPIO21

SATA1GP / GPIO19

D33

FWH0 / LAD0

B33

FWH1 / LAD1

C32

FWH2 / LAD2

A32

FWH3 / LAD3

C34

A34

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN

SATA0TXP

SATA1RXN SATA1RXP SATA1TXN

SATA1TXP

SATA2RXN SATA2RXP SATA2TXN

SATA2TXP

SATA3RXN SATA3RXP SATA3TXN

SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

2008/10/31 2009/10/31

GPIO23

F34

SERIRQ

AB9

AK7 AK6

SATA_ITX_C_DRX_N0

AK11

SATA_ITX_C_DRX_P0

AK9

AH6 AH5

SATA_ITX_C_DRX_N1

AH9

SATA_ITX_C_DRX_P1

AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

SATA_DTX_C_IRX_N4

AD9

SATA_DTX_C_IRX_P4

AD8

SATA_ITX_C_DRX_N4

AD6

SATA_ITX_C_DRX_P4

AD5

AD3 AD1 AB3 AB1

AF16

SATAICOMPPCH_JTAG_RST#

AF15

T3

Y9

V1

R453 10K_0402_5%R453 10K_0402_5%

GPIO21

GPIO19

SPI_SB_CS0# SPI_SO_R SPI_SO_L

Compal Secret Data

2

T7 PADT7 PAD

GPIO23 = NATIVE,3.3V,CORE

R500

1 2

37.4_0402_1%

1 2

GPIO21 = GPI,3.3V,CORE

GPIO19 = GPI,3.3V,CORE

+3VS

R62

1 2

R102

1 2

R103

15_0402_5%

1 2

15_0402_5%

Deciphered Date

2

LPC_AD0 <28,34> LPC_AD1 <28,34> LPC_AD2 <28,34> LPC_AD3 <28,34>

LPC_FRAME# <28,34>

SERIRQ <34>

12

R47910K_0402_5% R47910K_0402_5%

12 12

ESATA@

12 12

ESATA@

+1.05VS

+3VS

HDD_LED# <36>

SPI_WP#

3.3K_0402_5%

SPI_HOLD#

3.3K_0402_5%

12

SPI_WP#

R101

+3VS

SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0

C1400.01U_0402_16V7K C1400.01U_0402_16V7K C1410.01U_0402_16V7K C1410.01U_0402_16V7K

SATA_DTX_C_IRX_N1

SATA_DTX_C_IRX_P1

C4270.01U_0402_16V7K C4270.01U_0402_16V7K C4280.01U_0402_16V7K C4280.01U_0402_16V7K

SATA_ITX_DRX_N4_CONN

C1420.01U_0402_16V7K

SATA_ITX_DRX_P4_CONN

C1430.01U_0402_16V7K

GPIO21

GPIO19

SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

R447

10K_0402_5%

1 2

SATA_DTX_C_IRX_N0 <32>

SATA_DTX_C_IRX_P0 <32> SATA_ITX_DRX_N0 <32> SATA_ITX_DRX_P0 <32>

SATA_DTX_C_IRX_N1 <32>

SATA_DTX_C_IRX_P1 <32> SATA_ITX_DRX_N1 <32>

SATA_ITX_DRX_P1 <32>

R482

R482 10K_0402_5%

10K_0402_5%

4MB SPI ROM FOR HM55 & Non-share ROM.

C460

+3VS

U3

1

CS#

VCC

2

SO

HOLD#

3

WP#

SCLK

4

GND

SI

S IC FL 32M W25Q32BVSSIG SOIC 8P

Title

Size Document Number Rev

Custom

Date: Sheet of

1 2

0.1U_0402_16V4Z

8 7 6 5

0.1U_0402_16V4Z

SPI_HOLD# SPI_CLK_PCH

SPI_SI

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

1

HDD

ODD

SATA_DTX_C_IRX_N4 <37>

SATA_DTX_C_IRX_P4 <37> SATA_ITX_DRX_N4_CONN <37> SATA_ITX_DRX_P4_CONN <37>

LA-5751

1

E-SATA

SPI_CLK_PCH

R100

33_0402_5%

@

22P_0402_50V8J

@

13 51Friday, October 30, 2009

C138

12

0.3

5

PCIE PORT LIST

DEVICEPORT

1

X WLAN

2

LAN

3 4

D D

WLAN

LAN

3G

C C

EXP

WLAN

B B

LAN

3G

EXP

A A

3G NEW CARD

5 6

X

7

X

8

X

PCIE_PRX_DTX_N2<28> PCIE_PRX_DTX_P2<28> PCIE_PTX_C_DRX_N2<28> PCIE_PTX_C_DRX_P2<28>

PCIE_PRX_DTX_N3<29> PCIE_PRX_DTX_P3<29> PCIE_PTX_C_DRX_N3<29> PCIE_PTX_C_DRX_P3<29>

PCIE_PRX_DTX_N4<28> PCIE_PRX_DTX_P4<28> PCIE_PTX_C_DRX_N4<28> PCIE_PTX_C_DRX_P4<28>

PCIE_PRX_DTX_N5<28> PCIE_PRX_DTX_P5<28> PCIE_PTX_C_DRX_N5<28> PCIE_PTX_C_DRX_P5<28>

CLK_PCIE_WLAN1#<28> CLK_PCIE_WLAN1<28>

WLAN_CLKREQ1#<28>

CLK_PCIE_LAN#<29> CLK_PCIE_LAN<29>

CLKREQ_LAN#<29>

CLK_PCIE_CARD_PCH#<28> CLK_PCIE_CARD_PCH<28>

PCIECLKREQ3#<28>

CLK_PCIE_EXP_PCH#<28> CLK_PCIE_EXP_PCH<28>

CLKREQ_EXP#<28>

+3VALW

C230 0.1U_0402_10V6KC230 0.1U_0402_10V6K C229 0.1U_0402_10V6KC229 0.1U_0402_10V6K

C223 0.1U_0402_10V6KC223 0.1U_0402_10V6K C222 0.1U_0402_10V6KC222 0.1U_0402_10V6K

C231 0.1U_0402_10V6K

C231 0.1U_0402_10V6K C232 0.1U_0402_10V6K

C232 0.1U_0402_10V6K

C220 0.1U_0402_10V6KC220 0.1U_0402_10V6K C221 0.1U_0402_10V6KC221 0.1U_0402_10V6K

R431 10K_0402_5%R431 10K_0402_5%

+3VALW

R196 0_0402_5%R196 0_0402_5% R197 0_0402_5%R197 0_0402_5%

R454 10K_0402_5%R454 10K_0402_5%

+3VS

R220 0_0402_5%R220 0_0402_5% R221 0_0402_5%R221 0_0402_5%

R113 10K_0402_5%R113 10K_0402_5%

+3VS

R223 0_0402_5%3G@R223 0_0402_5%3G@ R222 0_0402_5%

R222 0_0402_5%

R120 10K_0402_5%R120 10K_0402_5%

+3VALW

R224 0_0402_5%R224 0_0402_5% R225 0_0402_5%R225 0_0402_5%

R435 10K_0402_5%R435 10K_0402_5%

+3VALW

R434 10K_0402_5%R434 10K_0402_5%

R457 10K_0402_5%R457 10K_0402_5%

1 2 1 2

1 2

1 2 1 2

1 2

1 2 1 2

1 2

1 2 1 2

3G@

1 2

1 2 1 2

1 2

3G@

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

PCIE_PRX_DTX_N5 PCIE_PRX_DTX_P5 PCIE_PTX_DRX_N5 PCIE_PTX_DRX_P5

GPIO73 = NATIVE,3.3V,SUS

CLK_PCIE_WLAN1#_R CLK_PCIE_WLAN1_R

GPIO18 = NATIVE,3.3V,CORE

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

GPIO20 = NATIVE,3.3V,CORE

CLK_PCIE_CARD_PCH#_R CLK_PCIE_CARD_PCH_R

GPIO25 = NATIVE,3.3V,SUS

CLK_PCIE_EXP_PCH#_R CLK_PCIE_EXP_PCH_R

CLKREQ_EXP#

GPIO26 = NATIVE,3.3V,SUS

GPIO44 = NATIVE,3.3V,SUS

GPIO56 = NATIVE,3.3V,SUS

4

U7B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M_FCBGA1071

WLAN

LAN

MINI1

NEW CARD

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ# / GPIO47

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

3

LID_OUT#

B9

H14

C8

J14

C6

G8

M14

E10

G12

T13

T11

T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

P43

T42

N50

GPIO11 = NATIVE,3.3V,SUS

SMBCLK

SMBDATA

GPIO60 = NATIVE,3.3V,SUS

GPIO60

SML0CLK

SML0DATA

GPIO74 = NATIVE,3.3V,SUS

GPIO74

SML1CLK

R79

SML1DATA

R80

PEG_CLKREQ#

GPIO47 = 10Kohm PULL DOWN

CLKOUT_DP_N CLKOUT_DP_P

CLK_14M_PCH

CLK_PCI_FB

XTAL25_IN XTAL25_OUT

CLK_PCI_DB_R

1 2

CLK_PCIE_VGA#_R CLK_PCIE_VGA_R

CLK_EXP#_R CLK_EXP_R

R491 90.9_0402_1%R491 90.9_0402_1%

1 2

EC_LID_OUT# <34>

R407

R407 0_0402_5%

0_0402_5%

DTS , read from EC

PEG_CLKREQ# <19>

R41210K_0402_5% R41210K_0402_5%

R524 0_0402_5%R524 0_0402_5%

1 2

R525 0_0402_5%R525 0_0402_5%

1 2

R105 0_0402_5%R105 0_0402_5%

1 2

R106 0_0402_5%R106 0_0402_5%

1 2

CLK_DMI# <12> CLK_DMI <12>

CLK_BUF_BCLK# <12> CLK_BUF_BCLK <12>

CLK_BUF_DOT96# <12> CLK_BUF_DOT96 <12>

CLK_BUF_CKSSCD# <12> CLK_BUF_CKSSCD <12>

CLK_14M_PCH <12>

CLK_PCI_FB <16>

+1.05VS

R198

22_0402_5%

@

EC_SMB_CK2

EC_SMB_DA2

SMBCLK

SMBDATA

CLK_PCIE_VGA# CLK_PCIE_VGA

CLK_PCI_DB <28>

2

SMB_CLK_S3

SMB_DATA_S3

EC_SMB_CK2 <34>

EC_SMB_DA2 <34>

CLK_EXP# <5> CLK_EXP <5>

1 2

R121 10K_0402_5%R121 10K_0402_5%

1 2

R406 10K_0402_5%R406 10K_0402_5%

2N7002DW-T/R7_SOT363-6

6 1

2N7002DW-T/R7_SOT363-6

3

EC_THERMAL

CLK_PCIE_VGA# <19>

CLK_PCIE_VGA <19>

EMI REQUEST 0303

R209

R209 33_0402_5%

33_0402_5%

@

1 2

C263

C263 22P_0402_50V8J

22P_0402_50V8J

@

Q8A

SMB_CLK_S3

2

+3VS

Q8B

SMB_DATA_S3

4

5

+3VS

5

2N7002DW-T/R7_SOT363-6

Q7B

3

2N7002DW-T/R7_SOT363-6

CLK_14M_PCHCLK_PCI_FB

4

EC_SMB_DA2

EC_SMB_CK2

R413

R413 33_0402_5%

33_0402_5%

@

1 2

C439

C439 22P_0402_50V8J

22P_0402_50V8J

@

SMBCLK

+3VS +3VALW

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

GPIO74

LID_OUT#

GPIO60

SMB_CLK_S3 <10,11,12,28>

1 2

R123 2.2K_0402_5%R123 2.2K_0402_5%

1 2

R78 2.2K_0402_5%R78 2.2K_0402_5%

1 2

R148 2.2K_0402_5%R148 2.2K_0402_5%

1 2

R147 2.2K_0402_5%R147 2.2K_0402_5%

1 2

R404 2.2K_0402_5%R404 2.2K_0402_5%

1 2

R403 2.2K_0402_5%R403 2.2K_0402_5%

1 2

R399 10K_0402_5%R399 10K_0402_5%

1 2

R145 10K_0402_5%R145 10K_0402_5%

1 2

R400 10K_0402_5%R400 10K_0402_5%

DDR3*2 AND CLK GEN

SMB_DATA_S3 <10,11,12,28>

+3VS

Q7A

6 1

2

R81 0_0402_5%

1 2

R83 0_0402_5%

1 2

+3VS

R124

R82

SMB_EC_DA2_R

SMB_EC_CK2_R

C631

R82

2.2K_0402_5%

XTAL25_IN

XTAL25_OUT

2.2K_0402_5%

@

Calpella schematic checklist REV1.6

XTAL25_IN needs a pull-down to GND via a 0Ω resistor.

1

SMBCLK

1 2

SMBDATA SMB_DATA_S3

1 2

SMB_EC_DA2_REC_SMB_DA2

SMB_EC_CK2_REC_SMB_CK2

1 2

R598 1M_0402_5%@R598 1M_0402_5%@

1 2

25MHZ_20P_1BG25000CK1A

18P_0402_50V8J

C630

1

@

2

R122

R122 0_0402_5%

0_0402_5%

@

0_0402_5%

0_0402_5% R119

R119

SMB_EC_DA2_R <19,31>

Nvidia thermal sensor

SMB_EC_CK2_R <19,31>

Y4

@Y4

@

SMB_CLK_S3

18P_0402_50V8J

C631

1

@

2

0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

IBEX-M(2/6)-PCI-E/SMBUS/CLK

LA-5751

1

14 51Friday, October 30, 2009

0.3

5

4

3

2

1

D D

DMI_CTX_PRX_N0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>

DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>

DMI_CRX_PTX_N0<6> DMI_CRX_PTX_N1<6> DMI_CRX_PTX_N2<6> DMI_CRX_PTX_N3<6>

DMI_CRX_PTX_P0<6> DMI_CRX_PTX_P1<6> DMI_CRX_PTX_P2<6> DMI_CRX_PTX_P3<6>

+1.05VS

1 2

R520 49.9_0402_1%R520 49.9_0402_1%

4mil width and place within 500mil of the PCH

C C

(2009,05,04)

SUS_PWR_DN_ACK<34>

B B

A A

Checklist0.8：MEPWROK can be connect to PWROK if iAMT disable

+3VALW

R450 10K_0402_5%R450 10K_0402_5%

1 2

AC_PRESENT<34>

+3VALW

VGATE

ICH_POK

3

1

A

2

B

5

+3VS

Reserved (2009,09,08)

R396 100K_0402_1%R396 100K_0402_1%

VGATE<48>

ICH_POK<34>

+3VALW

MC74VHC1G08DFT2G SC70 5P

G

Y

P

U28

12

R398 0_0402_5%@R398 0_0402_5%@

1 2

R397 0_0402_5%R397 0_0402_5%

1 2

PM_DRAM_PWRGD<5>

R401

R437 10K_0402_5%R437 10K_0402_5%

1 2 1 2

R599 0_0402_5%@R599 0_0402_5%@

PBTN_OUT#<34>

GPIO31 = GPI,3.3V,SUS

R77 8.2K_0402_1%R77 8.2K_0402_1%

1 2

GPIO30 = GPI,3.3V,SUS

R165 10K_0402_5%R165 10K_0402_5%

1 2

@

SYS_PWROK

4

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_IRCOMP

+3VS

R448

R448 10K_0402_5%

10K_0402_5%

SYS_RST#

1 2

SYS_PWROK

R455

0_0402_5%

1 2

R146 10K_0402_5%R146 10K_0402_5%

1 2

PM_DRAM_PWRGD

PM_RSMRST#

12

10K_0402_5%

SUS_PWR_DN_ACK_R

PBTN_OUT#

AC_PRESENT_R

1 2

R451 0_0402_5%R451 0_0402_5%

GPIO72

BC24

BJ22

AW20

BJ20

BD24

BG22

BA20

BG20

BE22 BF21 BD20 BE18

BD22 BH21 BC20 BD18

BH25

BF25

T6

M6

B17

K5

A10

D9

C16

M1

P5

P7

A6

F14

EC_RSMRST#<34>

IBEXPEAK-M_FCBGA1071

U7C

DMI0RXN DMI1RXN DMI2RXN DMI3RXN

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

DMI0TXN DMI1TXN DMI2TXN DMI3TXN

DMI0TXP DMI1TXP DMI2TXP DMI3TXP

DMI_ZCOMP

DMI_IRCOMP

SYS_RESET#

SYS_PWROK

PWROK

MEPWROK

LAN_RST#

DRAMPWROK

RSMRST#

SUS_PWR_DN_ACK / GPIO30

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

RSMRST circuit

BAV99DW-7_SOT363

5

D8B

R175

1 2

2.2K_0402_5%

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_M#

System Power Management

PMSYNCH

SLP_LAN# / GPIO29

R402

@R402

@

0_0402_5%

1 2

C

123

E

Q14

Q14 MMBT3906_SOT23-3

MMBT3906_SOT23-3

B

1 2

R176 4.7K_0402_5%R176 4.7K_0402_5%

4

1

2

D8A

D8A BAV99DW-7_SOT363

BAV99DW-7_SOT363

3

6

FDI_CTX_PRX_N1

BH17

FDI_CTX_PRX_N2

BD16

FDI_CTX_PRX_N3

BJ16

FDI_CTX_PRX_N4

BA16

FDI_CTX_PRX_N5

BE14

FDI_CTX_PRX_N6

BA14

FDI_CTX_PRX_N7

BC12

FDI_CTX_PRX_P0

BB18

FDI_CTX_PRX_P1

BF17

FDI_CTX_PRX_P2

BC16

FDI_CTX_PRX_P3

BG16

FDI_CTX_PRX_P4

AW16

FDI_CTX_PRX_P5

BD14

FDI_CTX_PRX_P6

BB14

FDI_CTX_PRX_P7

BD12

FDI_INT

BJ14

FDI_FSYNC0

BF13

FDI_FSYNC1

BH13

FDI_LSYNC0

BJ12

FDI_LSYNC1

BG14

PCIE_WAKE#

J12

Y1

GPIO32 = GPO,3.3V,CORE

GPIO61

P8

GPIO62

F3

E4

H7

P12

K8

N2

TP23

BJ10

GPIO29 = GPO,3.3V,SUS

F6

PM_RSMRST#

+3VALW

FDI_CTX_PRX_N0

BA18

FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>

FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>

FDI_INT <6>

FDI_FSYNC0 <6>

FDI_FSYNC1 <6>

FDI_LSYNC0 <6>

FDI_LSYNC1 <6>

R436 10K_0402_5%R436 10K_0402_5%

1 2

R108 10K_0402_5%R108 10K_0402_5%

+3VALW

PCIE_WAKE# <28>

+3VS

GPIO61 = NATIVE,3.3V,SUS

GPIO62 = NATIVE,3.3V,SUS

SLP_S5# <34>

SLP_S4# <34>

SLP_S3# <34>

Can be left NC when IAMT is not support on the platfrom

H_PM_SYNC <5>

If not using integrated LAN,signal may be left as NC.

SLP_S3#

SLP_S4#

SLP_S5#

+3VS

1 2

R418 10K_0402_5%@R418 10K_0402_5%@

1 2

R417 10K_0402_5%@R417 10K_0402_5%@

1 2

R416 10K_0402_5%@R416 10K_0402_5%@

PCH_ENBKL<27>

PCH_ENVDD<27>

EDID_CLK<27> EDID_DATA<27>

PCH_PWM<27>

12

R502

2.37K_0402_1%

CRT_DDC_CLK<26> CRT_DDC_DATA<26>

CRT_HSYNC<26> CRT_VSYNC<26>

LVDS_ACLK#<27> LVDS_ACLK<27>

LVDS_A0#<27> LVDS_A1#<27> LVDS_A2#<27>

LVDS_A0<27> LVDS_A1<27> LVDS_A2<27>

DAC_BLU<26> DAC_GRN<26> DAC_RED<26>

PCH_ENBKL

PCH_ENVDD

EDID_CLK EDID_DATA

R497

1 2

10K_0402_5%

1 2

R496 10K_0402_5%R496 10K_0402_5%

T10 PADT10 PAD

DAC_BLU DAC_GRN DAC_RED

CRT_IREF

1K_0402_5%

R492

12

T48 T47

Y48

AB48

Y45

AB46

V48

AP39 AP41

AT43 AT42

AV53 AV51

BB47 BA52 AY48 AV47

BB48 BA50 AY49 AV48

AP48 AP47

AY53 AT49 AU52 AT53

AY51 AT48 AU50 AT51

AA52 AB53 AD53

V51 V53

Y53 Y51

AD48 AB51

DAC_BLU

DAC_GRN

DAC_RED

EDID_CLK

EDID_DATA

U7D

L_BKLTEN L_VDD_EN

L_BKLTCTL

L_DDC_CLK L_DDC_DATA

L_CTRL_CLK L_CTRL_DATA

LVD_IBG LVD_VBG

LVD_VREFH LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

IBEXPEAK-M_FCBGA1071

R458 2.2K_0402_5%UMA@R458 2.2K_0402_5%UMA@

R498 2.2K_0402_5%UMA@R498 2.2K_0402_5%UMA@

CRT OUT

R493 150_0402_1%UMA@R493 150_0402_1%UMA@

1 2

R495 150_0402_1%UMA@R495 150_0402_1%UMA@

1 2

R494 150_0402_1%UMA@R494 150_0402_1%UMA@

1 2

LVDS

CRT

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40

2.2K_0402_5%

AW38 BA38

HDMICLK_NB

Y49

HDMIDAT_NB

AB49

BE44 BD44 AV40

TMDS_B_DATA2#_PCH

BE40

TMDS_B_DATA2_PCH

BD40

TMDS_B_DATA1#_PCH

BF41

TMDS_B_DATA1_PCH

BH41

TMDS_B_DATA0#_PCH

BD38

TMDS_B_DATA0_PCH

BC38

TMDS_B_CLK#_PCH

BB36

TMDS_B_CLK_PCH

BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

R510 10K_0402_5%R510 10K_0402_5%

R504

UMA@

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

+3VS

12

+3VS

12

R503

2.2K_0402_5%

UMA@

HDMICLK_NB <25> HDMIDAT_NB <25>

TMDS_B_HPD# <25>

C638 0.1U_0402_10V6KC638 0.1U_0402_10V6K

1 2

C639 0.1U_0402_10V6KC639 0.1U_0402_10V6K

1 2

C640 0.1U_0402_10V6KC640 0.1U_0402_10V6K

1 2

C641 0.1U_0402_10V6KC641 0.1U_0402_10V6K

1 2

C642 0.1U_0402_10V6KC642 0.1U_0402_10V6K

1 2

C643 0.1U_0402_10V6KC643 0.1U_0402_10V6K

1 2

C644 0.1U_0402_10V6KC644 0.1U_0402_10V6K

1 2

C645 0.1U_0402_10V6KC645 0.1U_0402_10V6K

1 2

UMA_HDMI@

TMDS_B_DATA2# <25> TMDS_B_DATA2 <25> TMDS_B_DATA1# <25> TMDS_B_DATA1 <25> TMDS_B_DATA0# <25> TMDS_B_DATA0 <25> TMDS_B_CLK# <25> TMDS_B_CLK <25>

HDMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

IBEX-M(3/6)-DMI/GPIO/LVDS

LA-5751

1

15 51Friday, October 30, 2009

0.3

5

D D

PCI_PIRQA# PCI_PIRQB#

GPIO18 = NATIVE,5V,CORE GPIO52 = NATIVE,5V,CORE GPIO54 = NATIVE,5V,CORE

C C

GPIO2 = GPI,5V,CORE GPIO3 = GPI,5V,CORE GPIO4 = GPI,5V,CORE GPIO5 = GPI,5V,CORE

PCI_RST#<28,34>

R408 100K_0402_1%R408 100K_0402_1%

12

GNT2

Default-Internal pull up

Low=Configures DMI for ESI compatible operation(for servers only.Not for mobile/desktops)

PCI_PME#<34>

B B

CLK_PCI_LPC<34> CLK_PCI_FB<14>

PCI_REQ0#

PCI_PIRQF# PCI_REQ3#

PCI_REQ1# PCI_FRAME# PCI_TRDY# PCI_PIRQH#

PCI_STOP# PCI_IRDY# PCI_PIRQD# PCI_REQ2#

A A

PCI_GNT3#

A16 swap overide Strap/Top-Block Swap Override jumper

PCI_GNT3#

R199 22_0402_5%R199 22_0402_5%

1 2 1 2

R211

RP5

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP7

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP4

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

R200 1K_0402_5%@ R200 1K_0402_5%@

1 2

Low=A16 swap override/Top-Block Swap Override enabled High=Default

PCI_PIRQC# PCI_PIRQD#

PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_SERR# PCI_PERR#

PCI_IRDY#

*

PCI_DEVSEL# PCI_FRAME#

PCI_LOCK#

PCI_STOP# PCI_TRDY#

PLT_RST#

CLK_PCI_LPC_R CLK_PCI_FB_R

22_0402_5%

+3VS +3VS

*

5

H40 N34 C44 A38 C36

J34 A40 D45 E36 H48 E40 C40 M48 M45

F53 M40 M43

J36 K48

F40 C42 K46 M51

J52

K51

L34

F42

J40 G46

F44 M47 H36

J50 G42 H47 G34

G38 H51 B37 A44

F51 A46 B45 M53

F48 K45

F36 H53

B41 K53 A36 A48

E44 E50

A42 H44

F46 C46

D49

D41 C48

M7

D5

N52 P53 P46 P51 P48

PCI_PIRQG# PCI_PIRQC#PCI_PIRQB# PCI_PIRQA# PCI_PIRQE#

PCI_DEVSEL# PCI_LOCK# PCI_SERR# PCI_PERR#

U7E

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

PIRQA# PIRQB# PIRQC# PIRQD#

REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

K6

PCIRST#

SERR# PERR#

IRDY# PAR DEVSEL# FRAME#

PLOCK#

STOP# TRDY#

PME#

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

IBEXPEAK-M_FCBGA1071

RP3

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP6

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

BUF_PLT_RST#<5,19,28,29>

NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

PCI

USB

0.1U_0402_16V4Z

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

C646

4

AY9

NV_CE#0

BD1

NV_CE#1

AP15

NV_CE#2

BD8

NV_CE#3

AV9

NV_DQS0

BG8

NV_DQS1

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

NV_ALE

BD3

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

AY6

AU2

AV7

AY8 AY5

AV11 BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25

D25

N16 J16 F16 L16 E14 G16 F12 T15

PCI_GNT0#

PCI_GNT1#

NV_CLE

NV_RCOMP

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3

USB20_N5 USB20_P5

USB20_N8 USB20_P8

USB20_N10 USB20_P10 USB20_N11 USB20_P11

USB20_N13 USB20_P13

USBRBIAS

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

R212 1K_0402_5%@R212 1K_0402_5%@

R210 1K_0402_5%@R210 1K_0402_5%@

Boot BIOS Strap

0

1

R149 0_0402_5%R149 0_0402_5%

MC74VHC1G08DFT2G SC70 5P

12

1

R155

R155 100K_0402_5%

100K_0402_5%

2

4

GPIO8

Weak internal PU, don't PD

Check list Rev0.8 section1.23.2 If not implemented, the Braidwood interface signals can be left as No Connect (NC).

GPIO15

*

L：Intel ME Crypto Transport Layer Security(TLS) chiper suite with no confidentiality

H：Intel ME Crypto Transport Layer Security(TLS) chiper suite with confidentiality

it have weak internal PU 20K

GPIO27

within 500mil

R104

1 2

32.4_0402_1%

@

USB20_N0 <37> USB20_P0 <37> USB20_N1 <37> USB20_P1 <37> USB20_N2 <27> USB20_P2 <27> USB20_N3 <37> USB20_P3 <37>

USB20_N5 <38> USB20_P5 <38>

USB20_N8 <28> USB20_P8 <28>

USB20_N10 <28> USB20_P10 <28> USB20_N11 <37> USB20_P11 <37>

USB20_N13 <28> USB20_P13 <28>

1 2

R164 22.6_0402_1%R164 22.6_0402_1%

Within 500 mils minimum spacing to other signal is 15mil

1 2

PCI_GNT1#PCI_GNT0#

1 2

@

4

U5

0

1

0

11

Y

+3VS

Boot BIOS Location

LPC

Reserved(NAND)

PCI

SPI

3

1

G

A

2

B

P

5

Default：Do not connect(floating)

High：Enables the internal VccVRM to have a clean supply for analog rails. no need to use on board filter circuit.

GPIO1 = GPI,3.3V,CORE GPIO6 = GPI,3.3V,CORE GPIO7 = GPI,3.3V,CORE GPIO8 = GPO,3.3V,SUS GPIO12 = GPI,3.3V,SUS

LEFT USB

LEFT USB (COMBO)

USB Camera

RIGHT USB

CARD READER

WLAN

EXPRESS

Bluetooth

3G CARD

USB_OC#0 <37> USB_OC#1 <37>

*

PLT_RST#

3

+3VS

+3VALW

6

DRAMRST_CNTRL_PCH<5>

PCH_TEMP_ALERT#<34>

SUSP#<28,34,39,42,44,46> VGA_EN <45>

+3VALW

DIS@

R506 0_0402_5%

1 2

GPIO0 = GPI,3.3V,CORE

EC_SCI#<34>

EC_SMI#<34>

CPUSB#<28>

GPIO27 if pull down to turn off 1.8V VR

DRAMRST_CNTRL_PCH GPIO46

1 2

R415 10K_0402_5%R415 10K_0402_5%

1 2

R609 10K_0402_5%@R609 10K_0402_5%@

Intel Anti-Theft Techonlogy

High=Enabled

NV_ALE

Low=Disable(floating)

NV_ALE

R515 1K_0402_5%@ R515 1K_0402_5%@

1 2

*

+1.8VS

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal PU,Do not pull low

NV_CLE

R98 1K_0402_5%@R98 1K_0402_5%@

1 2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Issued Date

+3VS

U7F

GPIO0

1 2

R48310K_0402_5% R48310K_0402_5%

GPIO1

1 2

R42810K_0402_5% R42810K_0402_5%

GPIO6

1 2

R42710K_0402_5% R42710K_0402_5%

EC_SCI#

EC_SMI#

CPUSB#

GPIO15

1 2

R4331K_0402_5% R4331K_0402_5%

GPIO16

GPIO17

GPIO22

1 2

R44910K_0402_5% R44910K_0402_5%

@

12

R50710K_0402_5%@R50710K_0402_5%

GPIO28

1 2

R44610K_0402_5% R44610K_0402_5%

GPIO34

12

R43210K_0402_5% R43210K_0402_5%

GPIO35

12

R45610K_0402_5% R45610K_0402_5%

GPIO36

GPIO37

1 2

R48110K_0402_5% R48110K_0402_5%

GPIO38

1 2

R10910K_0402_5% R10910K_0402_5%

GPIO39

1 2

R11210K_0402_5% R11210K_0402_5%

GPIO45

1 2

R7610K_0402_5% R7610K_0402_5%

GPIO48

1 2

R48010K_0402_5% R48010K_0402_5%

PCH_TEMP_ALERT#

GPIO57

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3

USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

NV_ALE

Enable Intel Anti-Theft Technology：8.2K PU to +3VS

Disable Intel Anti-Theft Technology：floating(internal PD)

NV_CLE

DMI termination voltage. weak internal PU, don't PD

2008/08/12 2009/08/12

U7F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M_FCBGA1071

RP1

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

RP2

1 8 2 7 3 6 4 5

8.2K_0804_8P4R_5%

Compal Secret Data

2

GPIO

NCTF

+3VALW

Deciphered Date

2

RSVD

+3VS

+3VALW

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

CPU

CLKOUT_PCIE7P

PROCPWRGD

THRMTRIP#

1 2

R429 10K_0402_5%R429 10K_0402_5%

1 2

R485 10K_0402_5%R485 10K_0402_5%

1 2

R484 10K_0402_5%R484 10K_0402_5%

12

R107 10K_0402_5%R107 10K_0402_5%

@

1 2

R426 10K_0402_5%

@

1 2

R414 10K_0402_5%

1

AH45 AH46

+3VS

A20GATE

PECI

RCIN#

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

AF48 AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

TP1

AW22

TP2

BB22

TP3

AY45

TP4

AY46

TP5

AV43

TP6

AV45

TP7

AF13

TP8

M18

TP9

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

R110

R110 10K_0402_5%

10K_0402_5%

1 2

H_PECI

KB_RST#

H_THERMTRIP#_L

56_0402_5%

56 5%-->checklist 1.6

54.9 1%-->CRB 1.0

+3VALW

INT3_3V#

TP24

GATEA20 <34>

CLK_CPU_BCLK# <5>

CLK_CPU_BCLK <5>

H_PECI <5>

KB_RST# <34>

H_CPUPWRGD <5>

R518

1 2

12

R519

56_0402_5%

DRAMRST_CNTRL_PCH

12

R405 10K_0402_5%R405 10K_0402_5%

USB PORT LIST

RIGHT SIDE0

1

LEFT SIDE CMOS

GPIO17

GPIO36

PCH_TEMP_ALERT#

GPIO16

EC_SCI#

EC_SMI#

2 3 4 5 6 7

9 10 11

LEFT SIDE

CARD READER

WIRELESS8

NEW CARD BT

12

3G

13

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

IBEX-M(4/6)-PCI/USB/RSVD

LA-5751

1

+3VS

KB_RST#

H_THERMTRIP# <5>

+VCCP

DEVICEPORT

16 51Friday, October 30, 2009

12

R111

R111 10K_0402_5%

10K_0402_5%

0.3

5

4

3

2

1

4

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

+1.05VS

1U_0402_6.3V6K

C466

1

2

+3VALW

C224

1

2

+1.05VS

PCH_V5REF_SUS

PCH_V5REF_RUN

+3VS

1

C476

0.1U_0402_16V4Z

2

+3VS

1 2

C457 0.1U_0402_16V4ZC457 0.1U_0402_16V4Z

+PCH_VRM

+PCH_VCC1_1_20 +PCH_VCC1_1_21 +PCH_VCC1_1_22 +PCH_VCC1_1_23

1U_0402_6.3V6K

C435

1

2

0.1U_0402_16V4Z

+3VALW

0.1U_0402_16V4Z

C455

1

2

+1.05VS

1U_0402_6.3V6K

C483

1

2

R488 0_0402_5%R488 0_0402_5%

1 2

R487 0_0402_5%R487 0_0402_5%

1 2

R489 0_0402_5%R489 0_0402_5%

1 2

R490 0_0402_5%R490 0_0402_5%

1 2

R410 0_0402_5%R410 0_0402_5%

1 2

R411 0_0402_5%

1 2

@

+1.05VS

+3VALW

+1.5V

+1.05VS

1U_0402_6.3V6K

C502

C470

1

2

+1.05VS

1U_0402_6.3V6K

C464

C462

1

2

1U_0402_6.3V6K

C474

C473

1

2

+PCH_VRM

+1.05VS

10uH inductor, 120mA

L26

1 2

10UH_LB2012T100MR_20%

220U_B2_2.5VM_R35

10uH inductor, 120mA

L25

1 2

10UH_LB2012T100MR_20%

220U_B2_2.5VM_R35

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3VS

1

2

C507

UMA@

C506

UMA@

C514

1

2

1

+

2

1

+

2

U7G

AB24

10U_0603_6.3V6M

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

1U_0402_6.3V6K

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

10U_0603_6.3V6M

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IBEXPEAK-M_FCBGA1071

1

C494

C494 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

@

1

C493

C493 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

@

2008/08/12 2009/08/12

POWER

1.524A

0.042A

0.035A

6mA

+VCCADPLLA+1.05VS

R521

12

0_0402_5%

@

+VCCADPLLB

Compal Secret Data

0.069A

CRTLVDS

0.030A

VCC CORE

0.059A

HVCMOS

0.061A

DMI

PCI E*

0.156A

NAND / SPI

0.085A

FDI

Deciphered Date

2

VCCADAC[1]

VCCADAC[2]

VSSA_DAC[1]

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

VCCVRM[2]

VCCDMI[1]

VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

C447 changed to 1u 09/04/2009 check list Rev2.0 update.

+3VS_DAC

10U_0805_6.3V6M

0.01U_0402_16V7K

AE50

C477

AE52

1

AF53

@

2

AF51

+VCCA_LVDS

AH38

AH39

AP43 AP45 AT46

+VCCTX_LVDS

AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

C485

0.01U_0402_16V7K

UMA@

+3VS

C456 0.1U_0402_16V4ZC456 0.1U_0402_16V4Z

+PCH_VRM +1.8VS

+VCCP

C491 1U_0402_6.3V6KC491 1U_0402_6.3V6K

R423

10_0402_1%

1 2

0.1U_0402_16V4Z

C262

C478

1

2

12

R214

R214 0_0402_5%

0_0402_5%

DIS@

0.01U_0402_16V7K

1

C486

UMA@

2

1 2

R509

1 2

C468

0.1U_0402_16V4Z

C468

0.1U_0402_16V4Z

1

2

+3VS

0.1U_0402_16V4Z

C467

1

2

21

D6

CH751H-40PT_SOD323-2

PCH_V5REF_SUS

1

C447

C447 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Title

Size Document Number Rev

Custom

Date: Sheet of

+3VS

R208

1 2

0_0603_5%

R213 0.022_0805_1%UMA@R213 0.022_0805_1%UMA@

1 2

0.1uH inductor, 200mA

10U_0805_6.3V6M

1

C505

UMA@

2

10U_0805_6.3V6M

0_0402_5%

R508 0_0402_5%R508 0_0402_5%

1 2

R501 0_0402_5%

1 2

@

Compal Electronics, Inc.

IBEX-M(5/6)-PWR

C492

UMA@

R438

10_0402_1%

LA-5751

12

2

+5VS +3VS+3VALW+5VALW

1 2

1

+3VS

+1.8VS

L28

UMA@L28

UMA@

12

0.1UH_MLF1608DR10KT_10%_1608

R528

R528 0_0402_5%

0_0402_5%

DIS@

+1.8VS

+3VS

21

D9

CH751H-40PT_SOD323-2

PCH_V5REF_RUN

20 mils20 mils

1

C448

C448 1U_0402_6.3V6K

1U_0402_6.3V6K

2

17 51Thursday, October 29, 2009

0.3

U7J

AD38

AD39

AD41

1U_0402_6.3V6K

AU24

BD51 BD53

AH23

AH35

AH34

0.1U_0402_16V4Z

1

AU18

2

U7J

AP51

VCCACLK[1]

AP53

VCCACLK[2]

AF23

VCCLAN[1]

AF24

VCCLAN[2]

Y20

DCPSUSBYP

VCCME[1]

VCCME[2]

VCCME[3]

AF43

VCCME[4]

AF41

VCCME[5]

AF42

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

V9

DCPRTC

VCCVRM[3]

BB51

VCCADPLLA[1]

BB53

VCCADPLLA[2]

VCCADPLLB[1] VCCADPLLB[2]

VCCIO[21]

AJ35

VCCIO[22] VCCIO[23]

AF34

VCCIO[2]

VCCIO[3]

AF32

VCCIO[4]

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

AT18

V_CPU_IO[1]

V_CPU_IO[2]

A12

VCCRTC

IBEXPEAK-M_FCBGA1071

DG1.1 no M3 support and not Intel LAN, VCCLAN Source=>GND

+1.05VS

R527

@R527

@ 1 2

0_0603_5%

D D

C C

B B

A A

12

1

R486

0_0402_5%

lsolate AF32,AF34,AH34 from AH35,AJ35 for Intel request 09.09.08

C469

@C469

@

1U_0402_6.3V4Z

2

UPDATE 0210

10U_0603_6.3V6M

C516

C503

1

2

1 2

0.1U_0402_16V4Z

C453

1 2

0.1U_0402_16V4Z

C463

1 2

0.1U_0402_16V4Z

C454

1 2

0.1U_0402_16V4Z

C139

+RTCVCC

C515

+1.05VS

5

1

2

C472

T8PAD T8PAD

1 2

C461 0.1U_0402_16V4ZC461 0.1U_0402_16V4Z

+1.05VS

C471

1

2

10U_0603_6.3V6M

C475

C504

1

2

C452

+VCCRTCEXT

1 2

0.1U_0402_16V4Z

+PCH_VRM

+VCCADPLLA

+VCCADPLLB

1U_0402_6.3V6K

C484

C465

1

2

+VCCSST

+V1.1A_INT_VCCSUS

+3VALW

0.2A@3.3V

0.2A@3.3V0.2A@3.3V

+3VS

0.4A@3.3V

0.4A@3.3V0.4A@3.3V

+VCCP

0.1A@1.1V

0.1A@1.1V0.1A@1.1V

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

C500

C489

C501

1

2

2mA@3.3V

2mA@3.3V2mA@3.3V

0.1U_0402_16V4Z

C442

C440

1

2

POWER

0.052A

0.344A

USB

0.163A

1.998A

>1mA

0.035A

0.072A

Clock and Miscellaneous

0.073A

0.357A

PCI/GPIO/LPC

3.208A

0.032A

SATA

>1mA

CPU

2mA

6mA

RTC PCI/GPIO/LPC

HDA

VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

VCCIO[56]

V5REF_SUS

>1mA

VCC3_3[8]

VCC3_3[9]

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1] VCCSATAPLL[2]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

VCCME[13] VCCME[14] VCCME[15] VCCME[16]

VCCSUSHDA

V5REF

5

U7I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

BG12

BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49

BC10 BC14 BC18

BC22 BC32 BC36 BC40 BC44 BC52

BD48 BD49

BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BF49

BF51 BG18 BG24

BG50

BH11

BH15

BH19

BH23

BH31

BH35

BH39

BH43

BH47

AF39

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

B7

VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179]

BB5

VSS[180] VSS[181] VSS[182] VSS[183]

BC2

VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190]

BH9

VSS[191] VSS[192] VSS[193]

BD5

VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208] VSS[209] VSS[210] VSS[211] VSS[212]

BG4

VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251] VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

D D

C C

B B

A A

4

H49

VSS[259]

H5

VSS[260]

J24

VSS[261]

K11

VSS[262]

K43

VSS[263]

K47

VSS[264]

K7

VSS[265]

L14

VSS[266]

L18

VSS[267]

L2

VSS[268]

L22

VSS[269]

L32

VSS[270]

L36

VSS[271]

L40

VSS[272]

L52

VSS[273]

M12

VSS[274]

M16

VSS[275]

M20

VSS[276]

N38

VSS[277]

M34

VSS[278]

M38

VSS[279]

M42

VSS[280]

M46

VSS[281]

M49

VSS[282]

M5

VSS[283]

M8

VSS[284]

N24

VSS[285]

P11

VSS[286]

AD15

VSS[287]

P22

VSS[288]

P30

VSS[289]

P32

VSS[290]

P34

VSS[291]

P42

VSS[292]

P45

VSS[293]

P47

VSS[294]

R2

VSS[295]

R52

VSS[296]

T12

VSS[297]

T41

VSS[298]

T46

VSS[299]

T49

VSS[300]

T5

VSS[301]

T8

VSS[302]

U30

VSS[303]

U31

VSS[304]

U32

VSS[305]

U34

VSS[306]

P38

VSS[307]

V11

VSS[308]

P16

VSS[309]

V19

VSS[310]

V20

VSS[311]

V22

VSS[312]

V30

VSS[313]

V31

VSS[314]

V32

VSS[315]

V34

VSS[316]

V35

VSS[317]

V38

VSS[318]

V43

VSS[319]

V45

VSS[320]

V46

VSS[321]

V47

VSS[322]

V49

VSS[323]

V5

VSS[324]

V7

VSS[325]

V8

VSS[326]

W2

VSS[327]

W52

VSS[328]

Y11

VSS[329]

Y12

VSS[330]

Y15

VSS[331]

Y19

VSS[332]

Y23

VSS[333]

Y28

VSS[334]

Y30

VSS[335]

Y31

VSS[336]

Y32

VSS[337]

Y38

VSS[338]

Y43

VSS[339]

Y46

VSS[340]

P49

VSS[341]

Y5

VSS[342]

Y6

VSS[343]

Y8

VSS[344]

P24

VSS[345]

T43

VSS[346]

AD51

VSS[347]

AT8

VSS[348]

AD47

VSS[349]

Y47

VSS[350]

AT12

VSS[351]

AM6

VSS[352]

AT13

VSS[353]

AM5

VSS[354]

AK45

VSS[355]

AK39

VSS[356]

AV14

VSS[366]

3

U7H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IBEXPEAK-M_FCBGA1071

2

AK30

VSS[80]

AK31

VSS[81]

AK32

VSS[82]

AK34

VSS[83]

AK35

VSS[84]

AK38

VSS[85]

AK43

VSS[86]

AK46

VSS[87]

AK49

VSS[88]

AK5

VSS[89]

AK8

VSS[90]

AL2

VSS[91]

AL52

VSS[92]

AM11

VSS[93]

BB44

VSS[94]

AD24

VSS[95]

AM20

VSS[96]

AM22

VSS[97]

AM24

VSS[98]

AM26

VSS[99]

AM28

VSS[100]

BA42

VSS[101]

AM30

VSS[102]

AM31

VSS[103]

AM32

VSS[104]

AM34

VSS[105]

AM35

VSS[106]

AM38

VSS[107]

AM39

VSS[108]

AM42

VSS[109]

AU20

VSS[110]

AM46

VSS[111]

AV22

VSS[112]

AM49

VSS[113]

AM7

VSS[114]

AA50

VSS[115]

BB10

VSS[116]

AN32

VSS[117]

AN50

VSS[118]

AN52

VSS[119]

AP12

VSS[120]

AP42

VSS[121]

AP46

VSS[122]

AP49

VSS[123]

AP5

VSS[124]

AP8

VSS[125]

AR2

VSS[126]

AR52

VSS[127]

AT11

VSS[128]

BA12

VSS[129]

AH48

VSS[130]

AT32

VSS[131]

AT36

VSS[132]

AT41

VSS[133]

AT47

VSS[134]

AT7

VSS[135]

AV12

VSS[136]

AV16

VSS[137]

AV20

VSS[138]

AV24

VSS[139]

AV30

VSS[140]

AV34

VSS[141]

AV38

VSS[142]

AV42

VSS[143]

AV46

VSS[144]

AV49

VSS[145]

AV5

VSS[146]

AV8

VSS[147]

AW14

VSS[148]

AW18

VSS[149]

AW2

VSS[150]

BF9

VSS[151]

AW32

VSS[152]

AW36

VSS[153]

AW40

VSS[154]

AW52

VSS[155]

AY11

VSS[156]

AY43

VSS[157]

AY47

VSS[158]

1

IBEXPEAK-M_FCBGA1071

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/31 2009/10/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

IBEX-M(6/6)-GND

LA-5751

1

18 51Thursday, October 29, 2009

0.3

5

DIS@

C120 0.1U_0402_10V6KDIS@C120 0.1U_0402_10V6KDIS@ C119 0.1U_0402_10V6KDIS@C119 0.1U_0402_10V6KDIS@ C118 0.1U_0402_10V6KDIS@C118 0.1U_0402_10V6KDIS@ C117 0.1U_0402_10V6KDIS@C117 0.1U_0402_10V6KDIS@ C80 0.1U_0402_10V6KDIS@C80 0.1U_0402_10V6KDIS@ C79 0.1U_0402_10V6KDIS@C79 0.1U_0402_10V6KDIS@ C78 0.1U_0402_10V6KDIS@C78 0.1U_0402_10V6KDIS@ C77 0.1U_0402_10V6KDIS@C77 0.1U_0402_10V6KDIS@ C116 0.1U_0402_10V6KDIS@C116 0.1U_0402_10V6KDIS@ C115 0.1U_0402_10V6KDIS@C115 0.1U_0402_10V6KDIS@ C114 0.1U_0402_10V6KDIS@C114 0.1U_0402_10V6KDIS@ C113 0.1U_0402_10V6KDIS@C113 0.1U_0402_10V6KDIS@ C112 0.1U_0402_10V6KDIS@C112 0.1U_0402_10V6KDIS@ C111 0.1U_0402_10V6KDIS@C111 0.1U_0402_10V6KDIS@ C109 0.1U_0402_10V6KDIS@C109 0.1U_0402_10V6KDIS@ C110 0.1U_0402_10V6KDIS@C110 0.1U_0402_10V6KDIS@ C108 0.1U_0402_10V6KDIS@C108 0.1U_0402_10V6KDIS@ C107 0.1U_0402_10V6KDIS@C107 0.1U_0402_10V6KDIS@ C105 0.1U_0402_10V6KDIS@C105 0.1U_0402_10V6KDIS@ C106 0.1U_0402_10V6KDIS@C106 0.1U_0402_10V6KDIS@ C104 0.1U_0402_10V6KDIS@C104 0.1U_0402_10V6KDIS@ C103 0.1U_0402_10V6KDIS@C103 0.1U_0402_10V6KDIS@ C102 0.1U_0402_10V6KDIS@C102 0.1U_0402_10V6KDIS@ C101 0.1U_0402_10V6KDIS@C101 0.1U_0402_10V6KDIS@ C100 0.1U_0402_10V6KDIS@C100 0.1U_0402_10V6KDIS@ C99 0.1U_0402_10V6KDIS@C99 0.1U_0402_10V6KDIS@ C98 0.1U_0402_10V6KDIS@C98 0.1U_0402_10V6KDIS@ C97 0.1U_0402_10V6KDIS@C97 0.1U_0402_10V6KDIS@ C96 0.1U_0402_10V6KDIS@C96 0.1U_0402_10V6KDIS@ C95 0.1U_0402_10V6KDIS@C95 0.1U_0402_10V6KDIS@ C94 0.1U_0402_10V6KDIS@C94 0.1U_0402_10V6KDIS@ C93 0.1U_0402_10V6KDIS@C93 0.1U_0402_10V6KDIS@

PEG_CLKREQ#<14>

PCIE_CTX_GRX_N[0..15]

PCIE_CTX_GRX_P[0..15]

PCIE_CRX_GTX_N[0..15]

PCIE_CRX_GTX_P[0..15]

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

CLK_PCIE_VGA<14> CLK_PCIE_VGA#<14>

12

R46

10K_0402_5%

@

+3VS

PEG_CLKREQ#

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_P15 PCIE_CTX_GRX_N15

PCIE_CRX_C_GTX_P0 PCIE_CRX_C_GTX_N0 PCIE_CRX_C_GTX_P1 PCIE_CRX_C_GTX_N1 PCIE_CRX_C_GTX_P2 PCIE_CRX_C_GTX_N2 PCIE_CRX_C_GTX_P3 PCIE_CRX_C_GTX_N3 PCIE_CRX_C_GTX_P4

PCIE_CRX_C_GTX_P5 PCIE_CRX_C_GTX_N5 PCIE_CRX_C_GTX_P6 PCIE_CRX_C_GTX_N6 PCIE_CRX_C_GTX_P7 PCIE_CRX_C_GTX_N7 PCIE_CRX_C_GTX_P8 PCIE_CRX_C_GTX_N8 PCIE_CRX_C_GTX_P9 PCIE_CRX_C_GTX_N9 PCIE_CRX_C_GTX_P10 PCIE_CRX_C_GTX_N10 PCIE_CRX_C_GTX_P11 PCIE_CRX_C_GTX_N11 PCIE_CRX_C_GTX_P12 PCIE_CRX_C_GTX_N12 PCIE_CRX_C_GTX_P13 PCIE_CRX_C_GTX_N13 PCIE_CRX_C_GTX_P14 PCIE_CRX_C_GTX_N14 PCIE_CRX_C_GTX_P15 PCIE_CRX_C_GTX_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

1 2

R540 200_0402_5% @R540 200_0402_5% @

1 2

R541 2.49K_0402_1% DIS@R541 2.49K_0402_1% DIS@

DIS@

10K_0402_5%

1 2

R542

1 2

R543 0_0402_5%@R543 0_0402_5%@

PCIE_CTX_GRX_N[0..15]<6>

PCIE_CTX_GRX_P[0..15]<6>

PCIE_CRX_GTX_N[0..15]<6>

PCIE_CRX_GTX_P[0..15]<6>

D D

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_N4 PCIE_CRX_C_GTX_N4 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_N5

C C

PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_P9 PCIE_CRX_GTX_N9 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_N10 PCIE_CRX_GTX_P11 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_N12 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_P15 PCIE_CRX_GTX_N15

BUF_PLT_RST#<5,16,28,29>

B B

4

U22A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

AE9

PEX_CLKREQ_N

N11M-GE1-S-A3 _BGA533

DIS@

Part 1 of 5

PCI EXPRESS

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11

GPIO

GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

DACB_HSYNC DACB_VSYNC

DACB_RED

DACB_BLUE

DACB_GREEN

DACB_VREF DACB_RSET

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

TEST

TESTMODE

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2C DACADACB

I2CH_SCL

I2CH_SDA

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTAL_OUT

XTAL_IN

CLK

3

N1 G1 C1 M2 M3 K3 K2 J2 C2 M1 D2 D1 J3 J1 K1 F3 G3 G2 F1 F2

AD2 AD1

AE2 AD3 AE3

AF1 AE1

U6 U4

T5 R4 T4

R6 V6

AF3 AG4 AE4 AF4 AG3

AD25

R1 T3

R2 R3

A2 B1

A3 A4

T1 T2

NV_INVTPWM VGA_ENVDD_R VGA_ENBKL_R

1 2

R511 0_0402_5%DIS@R511 0_0402_5%DIS@

1 2

R512 0_0402_5%DIS@R512 0_0402_5%DIS@

VGA_GPIO11

VGA_GPIO14

PADT4PAD

VGA_CRT_R VGA_CRT_B VGA_CRT_G

DACA_VREF DACA_RSET

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N

TESTMODE

VGA_DDCCLK_C VGA_DDCDATA_C

I2CB_SCL I2CB_SDA

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

HDCP_SMB_CK1 HDCP_SMB_DAI

T4

R48 124_0402_1%DIS@R48 124_0402_1%DIS@

SMB_EC_CK2_R SMB_EC_DA2_R

HDMI_DETECT_VGA <24>

PADT9PAD

VGA_ENVDD_R <27>

VGA_ENBKL_R <27>

VGA_HSYNC <26>

VGA_VSYNC <26>

VGA_CRT_R <26> VGA_CRT_B <26> VGA_CRT_G <26>

DIS@

12

C81 0.1U_0402_16V4Z

1 2

R539 10K_0402_5%DIS@R539 10K_0402_5%DIS@

1 2

R24 10K_0402_5%DIS@R24 10K_0402_5%DIS@

1 2

R2510K_0402_5% @R2510K_0402_5% @

R517 2.2K_0402_5%DIS@R517 2.2K_0402_5%DIS@

1 2

R516 2.2K_0402_5%

1 2

DIS@

I2CS is internal thermal sensor.

D11

E9

XTALOUT

E10

XTALIN

D10

T9

GPU_VID0 GPU_VID1

CRT OUT

PAD

T14

PAD

T13

PAD

T12

PAD

T11

+3VS

SMB_EC_CK2_R <14,31> SMB_EC_DA2_R <14,31>

R42

10K_0402_5%

DIS@

R499

N11M-GE1/LP1 (40nm)

+3VS

GPU_VID0 <45> GPU_VID1 <45>

+3VS

2.2K_0402_5%

I2CS is VDD33 power plane same as EC +3.3VS.

12

R34

10K_0402_5%

DIS@

2

R478

2.2K_0402_5%

DIS@

Device ID

0x0A7D

1

GPIO6GPIO5

GPU_VID0 VGA_CORE

GPU_VID1

VGA_GPIO11 VGA_GPIO14

R513

@

0

1

12

R537 150_0402_1%DIS@R537 150_0402_1%DIS@ R538 150_0402_1%DIS@R538 150_0402_1%DIS@ R530 150_0402_1%DIS@R530 150_0402_1%DIS@

0

1

10K_0402_5%

VGA_CRT_R VGA_CRT_G VGA_CRT_B

Pull Hi at CRT CONN side.

VGA_DDCCLK_C

VGA_DDCDATA_C

VGA_LVDS_SCL_C

VGA_LVDS_SDA_C

Removed external HDCP. 07/17/2009

12

R505

R505 10K_0402_5%

10K_0402_5%

@

1 2 1 2 1 2

R443 4.7K_0402_5%@R443 4.7K_0402_5%@

R444 4.7K_0402_5%@R444 4.7K_0402_5%@

R64 2.2K_0402_5%DIS@R64 2.2K_0402_5%DIS@

R63 2.2K_0402_5%DIS@R63 2.2K_0402_5%DIS@

0.8V

0.85V

1.03

12

P-State

Deep P12

P8

P0

+3VS

Y2

4

GND

1

IN

27MHZ_16PF_X7S027000BG1H-U

DIS@

1

C69

20P_0402_50V8

A A

5

4

2

DIS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

OUT

2

GND

1

C56

C56 20P_0402_50V8

20P_0402_50V8

2

DIS@

Compal Secret Data

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

VGA_DDCCLK_C VGA_DDCDATA_C

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

2

L17 MBK1608121YZF_0603DIS@L17 MBK1608121YZF_0603DIS@

1 2 1 2

L18 MBK1608121YZF_0603DIS@L18 MBK1608121YZF_0603DIS@

L8

L7 MBK1608121YZF_0603DIS@L7 MBK1608121YZF_0603DIS@

MBK1608121YZF_0603DIS@L8MBK1608121YZF_0603DIS@

1 2 1 2

1

C450

DIS@

12P_0402_50V8J

Title

Size Document Number Rev

B

Date: Sheet of

1

C451

C86

DIS@

12P_0402_50V8J

2

12P_0402_50V8J

Compal Electronics, Inc.

N11M-GE1 PCIE,GPIO,CLK

1

C85

DIS@

2

LA-5751

1

12P_0402_50V8J

2

1

VGA_DDCCLK <26>

VGA_DDCDATA <26>

VGA_LVDS_SCL <27>

VGA_LVDS_SDA <27>

19 51Friday, October 30, 2009

0.3

5

FBAA[0..13]<23>

FBBA[2..5]<23>

FBADQM[0..7]<23>

FBADQS[0..7]<23>

FBADQS#[0..7]<23>

FBAD[0..63]<23>

U22B

D D

C C

B B

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

U22B

D22

FBA_D0

E24

FBA_D1

E22

FBA_D2

D24

FBA_D3

D26

FBA_D4

D27

FBA_D5

C27

FBA_D6

B27

FBA_D7

A21

FBA_D8

B21

FBA_D9

C21

FBA_D10

C19

FBA_D11

C18

FBA_D12

D18

FBA_D13

B18

FBA_D14

C16

FBA_D15

E21

FBA_D16

F21

FBA_D17

D20

FBA_D18

F20

FBA_D19

D17

FBA_D20

F18

FBA_D21

D16

FBA_D22

E16

FBA_D23

A22

FBA_D24

C24

FBA_D25

D21

FBA_D26

B22

FBA_D27

C22

FBA_D28

A25

FBA_D29

B25

FBA_D30

A26

FBA_D31

U24

FBA_D32

V24

FBA_D33

V23

FBA_D34

R24

FBA_D35

T23

FBA_D36

R23

FBA_D37

P24

FBA_D38

P22

FBA_D39

AC24

FBA_D40

AB23

FBA_D41

AB24

FBA_D42

W24

FBA_D43

AA22

FBA_D44

W23

FBA_D45

W22

FBA_D46

V22

FBA_D47

AA25

FBA_D48

W27

FBA_D49

W26

FBA_D50

W25

FBA_D51

AB25

FBA_D52

AB26

FBA_D53

AD26

FBA_D54

AD27

FBA_D55

V25

FBA_D56

R25

FBA_D57

V26

FBA_D58

V27

FBA_D59

R26

FBA_D60

T25

FBA_D61

N25

FBA_D62

N26

FBA_D63

N11M-GE1-S-A3 _BGA533

DIS@

FBAA[0..13]

FBBA[2..5]

FBADQM[0..7]

FBADQS[0..7]

FBADQS#[0..7]

FBA_D[0..63]

Part 2 of 5

MEMORY INTERFACE

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FB_VREF

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

FBAA4

F26

FBARAS#

J24

FBAA5

F25

FBA_BA1

M23

FBBA2

N27

FBBA4

M27

FBBA3

K26 J25

FBBACS0#

J27

FBAA11

G23

FBACAS#

G26

FBAWE#

J23

FBA_BA0

M25

FBBA5

K27

FBAA12

G25

FBA_RST

L24

FBAA7

K23

FBAA10

K24 G22

FBAA0

K25

FBAA9

H22

FBAA6

M26

FBAA2

H24

FBAA8

F27

FBAA3

J26

FBAA1

G24

FBAA13

G27

FBA_BA2

M24

FBBAODT0

K22

FBAACS0#

J22

FBAAODT0

L22

FBADQM0

C26

FBADQM1

B19

FBADQM2

D19

FBADQM3

D23

FBADQM4

T24

FBADQM5

AA23

FBADQM6

AB27

FBADQM7

T26

FBADQS#0

D25

FBADQS#1

A18

FBADQS#2

E18

FBADQS#3

B24

FBADQS#4

R22

FBADQS#5

Y24

FBADQS#6

AA27

FBADQS#7

R27

FBADQS0

C25

FBADQS1

A19

FBADQS2

E19

FBADQS3

A24

FBADQS4

T22

FBADQS5

AA24

FBADQS6

AA26

FBADQS7

T27

FB_VREF1

A16

F24 F23

N24 N23

M22

10K_0402_5%DIS@

1 2

FBAA_CKE

R26

4

FBARAS# <23>

FBA_BA1 <23>

FBBA_CKE

FBBACS0# <23>

FBACAS# <23> FBAWE# <23> FBA_BA0 <23>

FBAA12 <23>

12

R23

R23 10K_0402_5%

10K_0402_5%

DIS@

FBAACS0# <23>

12

R15

R15 10K_0402_5%

10K_0402_5%

DIS@

FBACLK0 <23> FBACLK0# <23>

FBACLK1 <23> FBACLK1# <23>

+1.5VS

12

FBAA_CKE <23>

FBAAODT0 <23>

12

1.27V~0.9V

R22

R22 10K_0402_5%

10K_0402_5%

DIS@

R16

R16 10K_0402_5%

10K_0402_5%

DIS@

R18

R18 10K_0402_5%

10K_0402_5%

DIS@

FBBA_CKE <23>

FBA_RST <23>

FBA_BA2 <23> FBBAODT0 <23>

10mil

1

C43

0.01U_0402_16V7K

@

2

HDMI

LVDS

+1.5VS

12

3

VGA_LVDS_ACLK<27> VGA_LVDS_ACLK#<27> VGA_LVDS_A0<27> VGA_LVDS_A0#<27> VGA_LVDS_A1<27> VGA_LVDS_A1#<27> VGA_LVDS_A2<27> VGA_LVDS_A2#<27>

VGA_HDMI_TX2+<24> VGA_HDMI_TX2-<24> VGA_HDMI_TX1+<24> VGA_HDMI_TX1-<24> VGA_HDMI_TX0+<24> VGA_HDMI_TX0-<24>

VGA_HDMI_CLK+<24>

VGA_HDMI_CLK-<24>

R30

1.3K_0402_1%

@

R29

1.3K_0402_1%

@

RF team request.

C649

12P_0402_50V8J

@

2

1

VGA_LVDS_ACLK VGA_LVDS_ACLK# VGA_LVDS_A0 VGA_LVDS_A0# VGA_LVDS_A1 VGA_LVDS_A1# VGA_LVDS_A2 VGA_LVDS_A2#

IFPC_AUX IFPC_AUX_N

VGA_LVDS_ACLK

VGA_LVDS_ACLK#

C650

C650 12P_0402_50V8J

12P_0402_50V8J

@

IFPC_AUX

U22C

AC4

IFPA_TXC

AD4

IFPA_TXC_N

V5

IFPA_TXD0

V4

IFPA_TXD0_N

AA5

IFPA_TXD1

AA4

IFPA_TXD1_N

W4

IFPA_TXD2

Y4

IFPA_TXD2_N

AB4

IFPA_TXD3

AB5

IFPA_TXD3_N

AB3

IFPB_TXC

AB2

IFPB_TXC_N

W1

IFPB_TXD4

V1

IFPB_TXD4_N

W3

IFPB_TXD5

W2

IFPB_TXD5_N

AA2

IFPB_TXD6

AA3

IFPB_TXD6_N

AB1

IFPB_TXD7

AA1

IFPB_TXD7_N

G4

IFPC_AUX_I2CW_SCL

G5

IFPC_AUX_I2CW_SDA_N

P4

IFPC_L0

N4

IFPC_L0_N

M5

IFPC_L1

M4

IFPC_L1_N

L4

IFPC_L2

K4

IFPC_L2_N

H4

IFPC_L3

J4

IFPC_L3_N

D3

IFPD_AUX_I2CX_SCL

D4

IFPD_AUX_I2CX_SDA_N

F5

IFPD_L0

F4

IFPD_L0_N

E4

IFPD_L1

D5

IFPD_L1_N

C3

IFPD_L2

C4

IFPD_L2_N

B3

IFPD_L3

B4

IFPD_L3_N

F7

IFPE_AUX_I2CY_SCL

G6

IFPE_AUX_I2CY_SDA_N

D6

IFPE_L0

C6

IFPE_L0_N

A6

IFPE_L1

A7

IFPE_L1_N

B6

IFPE_L2

B7

IFPE_L2_N

E6

IFPE_L3

E7

IFPE_L3_N

N11M-GE1-S-A3 _BGA533

DIS@

4.7K_0402_5%

DIS@

R526

2

Part 3 of 5

LVDS / TMDS

+3VS

1 2

Q38A

2N7002DW-T/R7_SOT363-6

DIS@

NCRFU

BUFRST_N

THERMDN

THERMDP

GENERAL STRAPSERIAL

ROM_CS_N

ROM_SCLK

IFPAB_RSET

IFPC_RSET

IFPD_RSET

IFPE_RSET

2

RFU_1 RFU_2 RFU_3 RFU_4 RFU_5

STRAP0

STRAP1

STRAP2

CEC

SPDIF

ROM_SI

ROM_SO

61

1

C15

NC

D15

NC

J5

NC

T6 W6 Y6 AA6 N3

STRAP0

+3VS

C7

B9

A9

N5

D8

D9

N2

F9

B10

C9

A10

C10

AB6

R5

M6

F8

STRAP1

STRAP2

PADT1PAD

T1

PADT2PAD

T2

PADT3PAD

T3

SPDIF_IN

R32 36K_0402_5%

ROM_SCLK

ROM_SI

ROM_SO

R44 1K_0402_1%@R44 1K_0402_1%@

R39 1K_0402_1%DIS@R39 1K_0402_1%DIS@

R40 1K_0402_1%@R40 1K_0402_1%@

R477 1K_0402_1%@R477 1K_0402_1%@

STRAP0 <22>

STRAP1 <22>

STRAP2 <22>

+3VS

12

DIS@

1 2

ROM_SCLK <22>

ROM_SI <22>

ROM_SO <22>

1 2

VGA_HDMI_SCL <24>

R445

R445 10K_0402_5%

10K_0402_5%

DIS@

+3VS

12

R468

R468 10K_0402_5%

10K_0402_5%

DIS@

R531

4.7K_0402_5%

DIS@

IFPC_AUX_N

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

1 2

2

5

DIS@

Q38B

2N7002DW-T/R7_SOT363-6

5V PULL UP IN CONNECTER SIDE

3

4

Title

Size Document Number Rev

B

Date: Sheet of

VGA_HDMI_SDA <24>

Compal Electronics, Inc.

N11M-GE1 LVDS,Memory Bus

LA-5751

1

0.3

20 51Friday, October 30, 2009

0.3

5

NEAR BGA

+VGA_CORE

NEAR BALL

4.7U 6.3V K X5R 0603

1

C26

DIS@

D D

DIS@

2

0.1U_0402_10V7K

N11M-GE1:16.7A

1

C68

DIS@

2

1

C73

DIS@

2

+3VS

1

2

4.7U 6.3V K X5R 0603

1U_0402_6.3V6K

1

C512

DIS@

2

1U_0402_6.3V6K

5

C84

DIS@

1

DIS@

2

1

2

1

2

C67

1

2

1U_0402_6.3V6K

C499

DIS@

C498

DIS@

C72

DIS@

0.1U_0402_10V7K

1

2

NEAR BALL

C C

120mA

NEAR BGA

+1.8VS

L27

MBK1608121YZF_0603

1 2

DIS@

300mA

4.7U 6.3V K X5R 0603

B B

NEAR BGA

+1.05VS

L4

MBK1608121YZF_0603

1 2

DIS@

285mA

4.7U 6.3V K X5R 0603

NEAR BGA

+3VS

A A

L6

DIS@L6

DIS@

1 2

MBK1608121YZF_0603

220mA

4.7U 6.3V K X5R 0603

1

C50

DIS@

2

C459

DIS@

0.1U_0402_10V7K

NEAR BALL

1

DIS@

2

0.1U_0402_10V7K

1

2

0.1U_0402_10V7K

1

C74

DIS@

2

0.1U_0402_10V7K

1

C62

DIS@

2

0.047U_0402_25V7K

1

C38

DIS@

2

0.01U_0402_16V7K

0.047U_0402_25V7K

1

C41

DIS@

2

0.01U_0402_16V7K

1

DIS@

2

0.01U_0402_16V7K

C36

0.01U_0402_16V7K

0.047U_0402_25V7K

NEAR BALL

0.1U_0402_10V7K

1

2

0.1U_0402_10V7K

C510

0.1U_0402_10V7K

C497

DIS@

NEAR BALL

C63

DIS@

C44

DIS@

1

C511

DIS@

2

1

C496

DIS@

2

0.1U_0402_10V7K

1

C66

DIS@

2

1

C61

DIS@

2

0.1U_0402_10V7K

1

2

1

C39

DIS@

2

1

C37

DIS@

2

1

C52

DIS@

2

C55

DIS@

0.1U_0402_10V7K

+IFPC_PLLVDD

4

0.01U_0402_16V7K

1

C40

DIS@

2

0.01U_0402_16V7K

1

C29

DIS@

2

0.01U_0402_16V7K

1

C51

DIS@

2

1

C54

DIS@

2

NEAR BGA

+1.05VS

4

+PEX_SVDD_3V3

+IFPA_IOVDD

+IFPB_IOVDD

+IFPC_IOVDD

12

R4110K_0402_5%

DIS@

+IFPAB_PLLVDD

+IFPC_PLLVDD

1 2

R49 0_0402_5%

DIS@

@

12

R4710K_0402_5%@R4710K_0402_5%

DIS@

12

R4310K_0402_5%

L5

DIS@L5

DIS@

1 2

MBK1608121YZF_0603

220mA

4.7U 6.3V K X5R 0603

1

C82

DIS@

2

U22D

J9

VDD

J10

VDD

J12

VDD

J13

VDD

L9

VDD

M9

VDD

M11

VDD

M17

VDD

N9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R9

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

T9

VDD

T11

VDD

T17

VDD

U9

VDD

U19

VDD

W9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

A12

VDD33

B12

VDD33

C12

VDD33

D12

VDD33

E12

VDD33

F12

VDD33

AG9

PEX_SVDD_3V3

V3

IFPA_IOVDD

V2

IFPB_IOVDD

J6

IFPC_IOVDD

H6

IFPDE_IOVDD

AD5

IFPAB_PLLVDD

P6

IFPC_PLLVDD

N6

IFPD_PLLVDD

D7

IFPE_PLLVDD

N11M-GE1-S-A3 _BGA533

DIS@

1U_0402_6.3V6K

1

C71

DIS@

2

3

PLACE UNDER GPU

Part 4 of 5

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

POWER

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

FB_PLLAVDD

FB_DLLAVDD

FB_CAL_PD_VDDQ

VDD_SENSE

+PEX_SVDD_3V3

+IFPAB_PLLVDD

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PLLVDD

DACA_VDD

DACB_VDD

Issued Date

3

A13 B13 C13 D13 D14 E13 F13 F14 F15 F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7

AG7 AF7 AE7 AD8 AD7 AC9

+PEX_PLLVDD

AF9

K6

+SP_PLLVDD

L6

K5

R19

AC19

T19

+DACA_VDD

AG2

+DACB_VDD

W5

B15

R465 40.2_0402_1%DIS@R465 40.2_0402_1%DIS@

W15

E15

NEAR BALL

+3VS

120mA

1

C458

DIS@

2

0.1U_0402_10V7K

+DACA_VDD

0.01U_0402_16V7K

0.1U_0402_10V7K

R45 10K_0402_5%DIS@R45 10K_0402_5%DIS@

NEAR BALL NEAR BGA

1

2

470P_0402_50V7K

2007/10/15 2008/10/15

0.01U_0402_16V7K

1

2

NEAR BALL

1

2

NEAR BALL NEAR BGA

1

2

C53

DIS@

2

0.1U_0402_10V7K

1

C46

DIS@

2

0.1U_0402_10V7K

1

C47

DIS@

2

C28

DIS@

0.01U_0402_16V7K

C58

DIS@

C60

DIS@

0.1U_0402_10V7K

NEAR BALL

+1.05VS_PLL

12~16mil

+FB_PLLAVDD

1 2

The power is base on VRAM type.

+VGASENSE

4700P_0402_25V7K

C523

DIS@

0.1U_0402_10V7K

+1.5VS

+VGASENSE <45>

1

C522

DIS@

2

0.1U_0402_10V7K

Compal Secret Data

Deciphered Date

1

C27

DIS@

2

1

C59

DIS@

2

0.1U_0402_10V7K

1

C480

DIS@

2

+SP_PLLVDD

+FB_PLLAVDD

0.1U_0402_10V7K

1

C520

DIS@

2

0.047U_0402_25V7K

1U_0402_6.3V6K

1

C481

DIS@

2

C513

DIS@

0.1U_0402_10V7K

2

1

2

NEAR BGA

1U_0402_6.3V6K

C32

C42

DIS@

2

0.047U_0402_25V7K

1

C83

DIS@

2

1U_0402_6.3V6K

1

C49

DIS@

2

1U_0402_6.3V6K

NEAR BGA

1U_0402_6.3V6K

NEAR BGA

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

C64

DIS@

2

NEAR BGA

1U_0402_6.3V6K

1

C30

DIS@

2

1U_0402_6.3V6K

1

C521

DIS@

2

0.047U_0402_25V7K

1

C31

DIS@

2

4.7U 6.3V K X5R 0603

1

C537

C35

DIS@

2

4.7U 6.3V K X5R 0603

1

2

C65

DIS@

4.7U 6.3V K X5R 0603

C48

DIS@

1

C45

DIS@

2

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

1

C482

DIS@

2

4.7U 6.3V K X5R 0603

1

C488

DIS@

2

1 2

MBK1608121YZF_0603

1

C23

DIS@

2

4.7U 6.3V K X5R 0603

1

C519

DIS@

2

1

2

1

2

4.7U 6.3V K X5R 0603

1

CLOSE TO GPU

+1.5VS

4.7U 6.3V K X5R 0603

1

C24

DIS@

N11M-GE1:2.55A

2

+1.05VS

2A

22U_0805_6.3V6M

1

C538

C552

DIS@

2

10U_0805_6.3V6M

+1.05VS

1

C553

C551

DIS@

2

10U_0805_6.3V6M

1 2

MBK1608121YZF_0603

C57

DIS@

L21

DIS@

120mA

L3

DIS@

+1.05VS

12

+1.05VS

VID_PLLVDD=45mA SP_PLLVDD=45mA PLLVDD=60mA

L24

1 2

MBK1608121YZF_0603

DIS@

L1

DIS@

+1.05VS

FB_PLLVDD=100mA FB_DLLVDD=100mA

L29

MBK1608121YZF_0603

1

C524

DIS@

2

Title

Size Document Number Rev

Custom

Date: Sheet of

+3VS

12

DIS@

120mA

Compal Electronics, Inc.

N11M-GE1 PWR

LA-5751

1

21 51Thursday, October 29, 2009

0.3

5

4

3

2

1

A total of 8 signals are required for GB1 strapping this includes

2 reference signals

6 physical strapping pins

4 logical strapping bits

U22E

B2 B5 B8

B11 B14

D D

C C

B17 B20 B23 B26

E2 E5 E8

E11 E17 E20 E23 E26

H2 H5

J11 J14 J17

K9

K19

L2 L5

L11 L12 L13 L14 L15 L16

L17 M12 M13 M14 M15 M16

P2 P5

P9 P19 P23 P26 T12 T13

W16

E14

N11M-GE1-S-A3 _BGA533

DIS@

Place Components Close to BGA

DIS@

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND_SENSE

Part 5 of 5

FB_CAL_TERM_GND

MULTI_STRAP_REF1_GND

MULTI_STRAP_REF0_GND

GND

FB_CAL_PU_GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

U2 U5 U11 U12 U13 U14 U15 U16 U17 U23 U26 V9 V19 W11 W14 W17 Y2 Y5 Y23 Y26 AC2 AC5 AC6 AC8 AC11 AC14 AC17 AC20 AC23 AC26 AF2 AF5 AF8 AF11 AF14 AF17 AF20 AF23 AF26 T16 T15 T14 F6

A15

B16

F11

F10

R28 40.2_0402_1%DIS@R28 40.2_0402_1%DIS@

1 2

R27 60.4_0402_1%

1 2

DIS@

12

R463

40.2K_0402_1%

DIS@

12

R464

40.2K_0402_1%

DIS@

A total of 24 logical strapping bits are available

+3VS

12

R474

DIS@

@

STRAP2<20> STRAP1<20> STRAP0<20> ROM_SCLK<20>

ROM_SI<20>

ROM_SO<20>

STRAP2 STRAP1 STRAP0 ROM_SCLK ROM_SI ROM_SO

DIS@

30K_0402_1%

12

R475

@

30K_0402_1%

34.8K_0402_1%

R472

R471

R473

DIS@

45.3K_0402_1%

12

R476

@

12

R51

DIS@

15K_0402_1%

12

R50

@

10K_0402_5%

15K_0402_1%

R467

R469

@

2K_0402_5%

12

R466

R470

DIS@

X76@

10K_0402_5%

20K_0402_1%

10K_0402_5%

STRAP1 use for 3GIO_PADCFG to set 35K pull up. (PUN-04335-001_V10 HW9 update)

12

FB Memory (DDR3)

N11M-GE1 LP1

B B

Memory/PKG

DDR3

+1.5VS

Must be used 1% resister for driver calibration

FB_CAL_PU_GND FBCAL_PD_VDDQ

40.2 ohm

DG-04642-001-V01(May 22, 2009)

FBCAL_TERM_GNDFBVDDQ

40.2/60.4 ohm40.2 ohm

LP1 (0x0A7D) 40nm

Samsung 800MHz (defaul)

Hynix 800MHz

K4W1G1646E-HC12

H5TQ1G63BFR-12C

ROM_SO

PU 15K

ROM_SIROM_SCLK STRAP0STRAP1STRAP2GPU

PD 30K

PD 15K64Mx16

PD 30KPD 10K

PU 35KN11M-GE1

PU 35K

PU 45KPD 10K PD 20K64Mx16

PU 45K

X76

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N11M-GE1 GND & STRAP

LA-5751

22 51Thursday, October 29, 2009

1

0.3

5

N11x 40nm DDR3 MAPPING NVIDIA COCUMENT FOR DA-3978-001

FBAA[0..13]<20>

FBBA[2..5]<20>

FBADQM[0..7]<20>

FBADQS[0..7]<20>

FBADQS#[0..7]<20>

FBAD[0..63]<20>

D D

C C

FBAA[0..13]

FBBA[2..5]

FBADQM[0..7]

FBADQS[0..7]

FBADQS#[0..7]

FBA_D[0..63]

+VRAM_VREFB

+VRAM_VREFA

FBAA0 FBAA1 FBAA2 FBAA3 FBAA4 FBAA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11 FBAA12 FBAA13

R12

R12 240_0402_1%

240_0402_1%

FBA_BA0 FBA_BA1 FBA_BA2

FBAA_CKE

FBAAODT0 FBAACS0# FBARAS# FBACAS# FBAWE#

FBADQS1 FBADQS3

FBADQM1 FBADQM3

FBADQS#1 FBADQS#3

FBA_RST

12

DIS@

FBA_BA0<20> FBA_BA1<20> FBA_BA2<20>

FBACLK0#<20> FBACLK1#<20> FBAA_CKE<20>

FBAAODT0<20> FBBAODT0<20> FBAACS0#<20> FBBACS0#<20>

FBARAS#<20> FBACAS#<20> FBAWE#<20>

FBA_RST<20>

U21

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

4

+VRAM_VREFB

+VRAM_VREFA

FBA_D9

E4

FBA_D14

F8

FBA_D8

F3

FBA_D12

F9

FBA_D10

H4

FBA_D13

H9

FBA_D11

G3

FBA_D15

H8

FBA_D26

D8

FBA_D29

C4

FBA_D24

C9

FBA_D25

C3

FBA_D28

A8

FBA_D31

A3

FBA_D27

B9

FBA_D30

A4

+1.5VS

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VS

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10

B2 B10 D2 D9 E3 E9 F10 G2 G10

1

3

R21

R21 240_0402_1%

240_0402_1%

FBAA0 FBAA1 FBAA2 FBAA3 FBAA4 FBAA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11 FBAA12 FBAA13

FBA_BA0 FBA_BA1 FBA_BA2

FBACLK0

FBAA_CKE

FBAAODT0 FBAACS0# FBARAS# FBACAS# FBAWE#

FBADQS2 FBADQS0

FBADQM2 FBADQM0

FBADQS#2 FBADQS#0

FBA_RST

12

DIS@

U2

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E4 F8 F3 F9 H4 H9 G3 H8

D8 C4 C9 C3 A8 A3 B9 A4

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2 B10 D2 D9 E3 E9 F10 G2 G10

FBA_D21 FBA_D17 FBA_D20 FBA_D16 FBA_D22 FBA_D18 FBA_D23 FBA_D19

FBA_D4 FBA_D1 FBA_D7 FBA_D0 FBA_D5 FBA_D2 FBA_D6 FBA_D3

+1.5VS

3

+VRAM_VREFD

+VRAM_VREFC

U1

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

R7

R7 240_0402_1%

240_0402_1%

FBAA0 FBAA1 FBBA2 FBBA3 FBBA4 FBBA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11 FBAA12 FBAA13

FBA_BA0 FBA_BA1 FBA_BA2

FBACLK1 FBACLK1#FBACLK0#

FBBA_CKE

FBBAODT0 FBBACS0#

FBARAS# FBACAS# FBAWE#

FBADQS4 FBADQS7

FBADQM4 FBADQM7

FBADQS#4 FBADQS#7

FBA_RST

12

DIS@

2

0

FBACLK1<20>FBACLK0<20>

FBBA_CKE<20>

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

2

+VRAM_VREFD

+VRAM_VREFC

U23

FBA_D37

E4

FBA_D36

F8

FBA_D35

F3

FBA_D32

F9

FBA_D39

H4 H9

FBA_D38

G3

FBA_D33

H8

FBA_D61

D8

FBA_D57

C4

FBA_D56

C9

FBA_D62

C3

FBA_D58

A8

FBA_D63

A3

FBA_D59

B9

FBA_D60

A4

+1.5VS

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

+1.5VS

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10

B2 B10 D2 D9 E3 E9 F10 G2 G10

FBAA0 FBAA1

4 5

FBBA2 FBBA3 FBBA4 FBBA5 FBAA6 FBAA7 FBAA8 FBAA9 FBAA10 FBAA11

7 6

FBAA12 FBAA13

FBA_BA0 FBA_BA1 FBA_BA2

FBACLK1 FBACLK1# FBBA_CKE

FBBAODT0 FBBACS0# FBARAS# FBACAS# FBAWE#

FBADQS5 FBADQS6

FBADQM5 FBADQM6

FBADQS#5 FBADQS#6

FBA_RST

12

R523

R523 240_0402_1%

240_0402_1%

DIS@

U23

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646D-HCF8_FBGA100

X76@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

E4 F8 F3 F9 H4 H9 G3 H8

D8 C4 C9 C3 A8 A3 B9 A4

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2 B10 D2 D9 E3 E9 F10 G2 G10

FBA_D42 FBA_D46 FBA_D40 FBA_D45 FBA_D41 FBA_D47FBA_D34 FBA_D44 FBA_D43

FBA_D50 FBA_D52 FBA_D49 FBA_D53 FBA_D48 FBA_D54 FBA_D51 FBA_D55

1

+1.5VS

10U_0603_6.3V6M

1

C518

DIS@

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

C509

C517

1

DIS@

DIS@ 2

2

1U_0402_6.3V4Z

C526

C438

1

DIS@

DIS@ 2

2

1U_0402_6.3V4Z

10U_0603_6.3V6M

1

C444

DIS@

2

1U_0402_6.3V4Z

C5

1

DIS@

DIS@ 2

2

1U_0402_6.3V4Z

C10

1

DIS@

2

10U_0603_6.3V6M

B B

FBACLK0

FBACLK0#

FBACLK1

FBACLK1#

A A

5

1 2

12

DIS@

243_0402_1%

243_0402_1% R442

R442

R14

R14 243_0402_1%

243_0402_1%

DIS@

4

10U_0603_6.3V6M

C21

DIS@

+1.5VS

DIS@

1U_0402_6.3V4Z

+1.5VS

DIS@

1U_0402_6.3V4Z

1

C3

DIS@

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

C487

C20

1

DIS@

2

1U_0402_6.3V4Z

C9

C18

1

DIS@

DIS@ 2

2

1U_0402_6.3V4Z

10U_0603_6.3V6M

1

C6

DIS@

2

10U_0603_6.3V6M

1U_0402_6.3V4Z

C437

C479

1

DIS@

DIS@ 2

1U_0402_6.3V4Z

C17

C12

1

DIS@

DIS@ 2

1U_0402_6.3V4Z

1

C7

DIS@

2

1U_0402_6.3V4Z

C446

C445

C525

1

DIS@

DIS@ 2

2

+1.5VS

220U_B2_2.5VM_R35

Issued Date

220U_B2_2.5VM_R35

C436

1

+

DIS@

2

2007/10/15 2008/10/15

1U_0402_6.3V4Z

C16

C19

C11

1

DIS@

DIS@ 2

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.5VS

12

R20

1.33K_0402_1%

DIS@

R19

1.33K_0402_1%

DIS@

R9

1.33K_0402_1%

DIS@

R8

1.33K_0402_1%

DIS@

Compal Secret Data

+VRAM_VREFA +VRAM_VREFB

12MIL 12MIL

12

0.1U_0402_10V6K

1

C22

DIS@

2

+1.5VS +1.5VS

12

+VRAM_VREFC +VRAM_VREFD

12MIL 12MIL

12

0.1U_0402_10V6K

1

C8

DIS@

2

Deciphered Date

2

R11

1.33K_0402_1%

DIS@

R10

1.33K_0402_1%

DIS@

R529

1.33K_0402_1%

DIS@

R522

1.33K_0402_1%

DIS@

+1.5VS

12

0.1U_0402_10V6K

1

C4

DIS@

2

12

0.1U_0402_10V6K

1

C495

DIS@

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

VRAM DDR3

LA-5751

1

23 51Thursday, October 29, 2009

0.3

5

4

3

2

1

C284 0.1U_0402_16V7KDIS@C284 0.1U_0402_16V7KDIS@

VGA_HDMI_CLK+<20> VGA_HDMI_CLK-<20> VGA_HDMI_TX0+<20> VGA_HDMI_TX0-<20> VGA_HDMI_TX1+<20> VGA_HDMI_TX1-<20> VGA_HDMI_TX2+<20>

D D

C C

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

B B

A A

NEAR CONNECT

HDMI_CLK+_CK

HDMI_CLK-_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_TX1+_CK

HDMI_TX1-_CK

HDMI_TX2+_CK

HDMI_TX2-_CK

HDMI_CLK+_CK HDMI_CLK-_CK HDMI_TX0+_CK HDMI_TX0-_CK

HDMI_TX1-_CK HDMI_TX2+_CK HDMI_TX2-_CK HDMI_TX2-_CONN

1 2

R585 499_0402_1%DIS@R585 499_0402_1%DIS@

1 2

R583 499_0402_1%DIS@R583 499_0402_1%DIS@

1 2

R589 499_0402_1%DIS@R589 499_0402_1%DIS@

1 2

R587 499_0402_1%DIS@R587 499_0402_1%DIS@

1 2

R593 499_0402_1%DIS@R593 499_0402_1%DIS@

1 2

R597 499_0402_1%DIS@R597 499_0402_1%DIS@

1 2

R595 499_0402_1%DIS@R595 499_0402_1%DIS@

L33

@L33

@

1

4

WCM-2012-900T_4P

L34

@L34

@

1

4

WCM-2012-900T_4P

L35

@L35

@

1

4

WCM-2012-900T_4P

L36

@L36

@

1

4

WCM-2012-900T_4P

R584 0_0402_5%HDMI@R584 0_0402_5%HDMI@

1 2

R582 0_0402_5%HDMI@R582 0_0402_5%HDMI@

1 2

R588 0_0402_5%HDMI@R588 0_0402_5%HDMI@

1 2

R586 0_0402_5%HDMI@R586 0_0402_5%HDMI@

1 2

R592 0_0402_5%HDMI@R592 0_0402_5%HDMI@

1 2

R590 0_0402_5%HDMI@R590 0_0402_5%HDMI@

1 2

R596 0_0402_5%HDMI@R596 0_0402_5%HDMI@

1 2

R594 0_0402_5%HDMI@R594 0_0402_5%HDMI@

1 2

5

2

3

2

3

2

3

2

3

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_CLK+_CONN HDMI_CLK-_CONN

13

D

2

G

DIS@

S

Q41

Q41 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONNHDMI_TX1+_CK

HDMI_TX1-_CONN

HDMI_TX2+_CONN

VGA_HDMI_TX2-<20>

VGA_HDMI_SDA<20>

VGA_HDMI_SCL<20>

+3VS

HDMI_DET_UMA<25>

HDMI_DETECT_VGA<19>

HDMI_DET_UMA

HDMI_DETECT_VGA

4

1 2

C283 0.1U_0402_16V7KDIS@C283 0.1U_0402_16V7KDIS@

1 2

C282 0.1U_0402_16V7KDIS@C282 0.1U_0402_16V7KDIS@

1 2

C281 0.1U_0402_16V7KDIS@C281 0.1U_0402_16V7KDIS@

1 2

C601 0.1U_0402_16V7KDIS@C601 0.1U_0402_16V7KDIS@

1 2

C600 0.1U_0402_16V7KDIS@C600 0.1U_0402_16V7KDIS@

1 2

C614 0.1U_0402_16V7KDIS@C614 0.1U_0402_16V7KDIS@

1 2

C599 0.1U_0402_16V7KDIS@C599 0.1U_0402_16V7KDIS@

1 2

L15 MBK1608121YZF_0603DIS@L15 MBK1608121YZF_0603DIS@

1 2 1 2

L16 MBK1608121YZF_0603DIS@L16 MBK1608121YZF_0603DIS@

@

D22

D22 RB751V_SOD323

RB751V_SOD323

2 1

HDMIDAT_R HDMICLK_R

1

C302

C295

DIS@

2

10K_0402_1%

1 2

R578

100K_0402_5%

DIS@

1 2

Issued Date

2

R579

DIS@

12P_0402_50V8J

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDMI_CLK+_CK HDMI_CLK-_CK HDMI_TX0+_CK HDMI_TX0-_CK HDMI_TX1+_CK HDMI_TX1-_CK HDMI_TX2+_CK HDMI_TX2-_CK

DIS@

1 2

L30MBK1608121YZF_0603

DIS@

C603

330P_0402_50V7K

+5VS +5VS

3

2

2008/03/25 2008/04/

3

HDMIDAT_R

1

@

D24

D24 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

Compal Secret Data

HDMI_CLK+_CK<25> HDMI_CLK-_CK<25> HDMI_TX0+_CK<25> HDMI_TX0-_CK<25> HDMI_TX1+_CK<25> HDMI_TX1-_CK<25> HDMI_TX2+_CK<25> HDMI_TX2-_CK<25>

+5VS

3

1

3

2

Deciphered Date

2

@

D23

D23 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

HDMIDAT_R<25> HDMICLK_R<25>

1

@

D25

D25 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

HDMICLK_R

HDMI_CLK+_CK HDMI_CLK-_CK HDMI_TX0+_CK HDMI_TX0-_CK HDMI_TX1+_CK HDMI_TX1-_CK HDMI_TX2+_CK HDMI_TX2-_CK

R581

0_0805_5%

R249

2.2K_0402_5%

HDMI@

HDMIDAT_R HDMICLK_R

2

@R581

@R591 499_0402_1%DIS@R591 499_0402_1%DIS@

1 2

+5VS

21

HDMI@

D28

D28 RB491D_SC59-3

RB491D_SC59-3

+5VS_HDMI

C627

1

0.1U_0402_16V4Z

HDMI@

R257

2.2K_0402_5%

HDMI@

1 2

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

Title

Size Document Number Rev

Custom

Date: Sheet of

2

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

TAITW_PDVBR9-19FLBS4NN4N1

ME@

Compal Electronics,Ltd.

HDMI CONN

LA-5751

1

GND GND GND GND

20 21 22 23

0.3

24 51Friday, October 30, 2009

5

P/N:SA00003GT00 (ASM1442)

4

3

2

1

P/N:SA00002D700 (8101T) P/N:SA00001U900 (CH7318A)

FOR asmedia

R230 STUFF

RESERVE THE R232 PULL UP TO 3VS

D D

RESERVE THE R247 PULL DOWN TO GND

FOR 7318C PIN6 PULL DOWN 1.2Kohm

PIN7 PULL DOWN 7.5Kohm

PIN7 PULL UP 20Kohm

CHANGE R245 FROM 499 TO 3.4K OHM

+3VS

12

@

R231

R231 0_0402_5%

0_0402_5%

+3VS

12

R242

4.7K_0402_5%

UMA_HDMI@

C C

B B

12

@

R243

R243 0_0402_5%

0_0402_5%

12

UMA_HDMI@

R230

R230 0_0402_5%

0_0402_5%

+3VS

HDMICLK_R<24>

HDMIDAT_R<24>

HDMI_DET_UMA<24>

4.7K_0402_5%

R254

1 2

R255

1 2

4.7K_0402_5%

TMDS_B_CLK<15> TMDS_B_CLK#<15>

TMDS_B_DATA0<15> TMDS_B_DATA0#<15>

TMDS_B_DATA1<15> TMDS_B_DATA1#<15>

TMDS_B_DATA2<15> TMDS_B_DATA2#<15>

HDMICLK_R

HDMIDAT_R

HDMI_DET_UMA

internal pull down

@R254

@ @R255

@

R244

@

1 2

R256

4.7K_0402_5%

@

1 2

U12

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

34

CFG0

35

CFG1

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

ASM1442_QFN48_7X7

UMA_HDMI@

output

input

VCC VCC VCC VCC VCC VCC VCC VCC

PC1 PC0

REXT

HPD#

SDA

SCL

RT_EN#

OUT_D4+

OUT_D4-

OUT_D3+

OUT_D3-

OUT_D2+

OUT_D2-

OUT_D1+

OUT_D1-

GND GND GND GND GND GND GND GND GND GND

PAD

+3VS

2 11

1

UMA_HDMI@

15 21 26 33 40 46

4 3

internal pull down

6

7

8

9

10

13 14

16 17

19 20

22 23

1 5 12 18 24 27 31 36 37 43 49

UMA_HDMI@

C280

0.1U_0402_16V4Z

2

4.7K_0402_5%

R247

@R247

@

1 2

R246 4.7K_0402_5%@R246 4.7K_0402_5%@

1 2

R248 4.7K_0402_5%@R248 4.7K_0402_5%@

1 2

UMA_HDMI@

R245 3.4K_0402_1%

1 2

TMDS_B_HPD#

R232 4.7K_0402_5%@R232 4.7K_0402_5%@

1 2

HDMI_CLK+_CK HDMI_CLK-_CK

HDMI_TX0+_CK HDMI_TX0-_CK

HDMI_TX1+_CK HDMI_TX1-_CK

HDMI_TX2+_CK HDMI_TX2-_CK

1

UMA_HDMI@

C602

0.1U_0402_16V4Z

2

TMDS_B_HPD# <15>

HDMI_CLK+_CK <24> HDMI_CLK-_CK <24>

HDMI_TX0+_CK <24> HDMI_TX0-_CK <24>

HDMI_TX1+_CK <24> HDMI_TX1-_CK <24>

HDMI_TX2+_CK <24> HDMI_TX2-_CK <24>

1

2

+3VS

UMA_HDMI@

C604

0.1U_0402_16V4Z

HDMIDAT_NB <15>

HDMICLK_NB <15>

1

UMA_HDMI@

C285

C285 10U_0805_10V4Z

10U_0805_10V4Z

2

TMDS_B_HPD#

+3VS

12

R253

R253 20K_0402_1%

20K_0402_1%

@

R252

7.5K_0402_1%

@

A A

Security Classification

2008/03/25 2008/04/

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/03/25 2008/04/

3

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Level Shiftter_ASM1442

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

LA-5751

25 51Thursday, October 29, 2009

1

0.3

A

B

+5VS +5VS +5VS +5VS +5VS

3

2

@

D1

D1 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

C

3

1

2

1

@

D2

D2 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

3

2

BAT54S-7-F_SOT23-3

@

D3

D

3

REDGREENBLUE

1

2

1

@

D27

D27 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

3

2

@

D26

D26 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

E

JVGA_VSJVGA_HS

1

1 1

2 2

3 3

DAC_RED<15>

DAC_GRN<15>

DAC_BLU<15>

VGA_CRT_R<19>

VGA_CRT_G<19>

VGA_CRT_B<19>

DAC_RED

DAC_GRN

VGA_CRT_R

VGA_CRT_G

1 2

R92 0_0402_5%UMA@R92 0_0402_5%UMA@

1 2

R91 0_0402_5%UMA@R91 0_0402_5%UMA@

1 2

R93 0_0402_5%UMA@R93 0_0402_5%UMA@

1 2

R66 0_0402_5%DIS@R66 0_0402_5%DIS@

1 2

R65 0_0402_5%DIS@R65 0_0402_5%DIS@

1 2

R67 0_0402_5%DIS@R67 0_0402_5%DIS@

CRT_R

CRT_G

CRT_BDAC_BLU

CRT_R

CRT_G

CRT_BVGA_CRT_B

+3VS

UMA only

DIS only

+3VS

CRT_R

CRT_G

CRT_B

12

R153

R153 150_0402_1%

150_0402_1%

+CRT_VCC

12

R131

R131 150_0402_1%

150_0402_1%

CLOSE TO CONN

CRT_HSYNC<15>

VGA_HSYNC<19>

CRT_VSYNC<15>

VGA_VSYNC<19>

12

R90

R90 150_0402_1%

150_0402_1%

R94 0_0402_5%UMA@ R94 0_0402_5%UMA@

1 2

R68 0_0402_5%DIS@ R68 0_0402_5%DIS@

1 2

R95 0_0402_5%UMA@ R95 0_0402_5%UMA@

1 2

R69 0_0402_5%DIS@ R69 0_0402_5%DIS@

1 2

1

C158

2

10P_0402_50V8J

1

C146

2

10P_0402_50V8J

C619

0.1U_0402_16V4Z

HSYNC_G

C620

0.1U_0402_16V4Z

VSYNC_G

FCM1608CF-121T03 0603

1 2

L11

FCM1608CF-121T03 0603

1 2

L10

FCM1608CF-121T03 0603

1 2

L9

C137

C137 10P_0402_50V8J

10P_0402_50V8J

+CRT_VCC

1 2

1

2

1

5

P

OE#

A2Y

G

3

+CRT_VCC

1 2

1

2

1

5

P

OE#

A2Y

G

3

1

C157

2

R575

1K_0402_5%

4

U26

U26 SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

R580

1K_0402_5%

4

U25

U25 SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

1

C145

C136

C136 10P_0402_50V8J

2

10P_0402_50V8J

2

10P_0402_50V8J

CRT_HSYNC_1

CRT_VSYNC_1 JVGA_VS

RED

GREEN

BLUE

+5VS

RB491D_SC59-3

RED

CRT_DDC_DAT_CONN GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC_CLK_CONN

+CRT_VCC

D21

2 1

1 2

L32 FCM1608CF-121T03 0603L32 FCM1608CF-121T03 0603

1 2

L31 FCM1608CF-121T03 0603L31 FCM1608CF-121T03 0603

CRT Connector

F1

21

1.1A_6V_SMD1812P110TF

W=40mils

1

C628

100P_0402_50V8J

2

11

12

13

14

10 15

1

@

C626

C626 10P_0402_50V8J

10P_0402_50V8J

2

1

C625

@C625

@

10P_0402_50V8J

2

1

2

6

1 7

2 8

3 9

4

5

C629

0.1U_0402_16V4Z

JCRT1

16

G

17

G

TYCO_1775763-1

ME@

JVGA_HS

12

R159

2.2K_0402_5%

CRT_DDC_DATA<15>

VGA_DDCDATA<19>

CRT_DDC_CLK<15>

VGA_DDCCLK<19>

4 4

CRT_DDC_DATA

VGA_DDCDATA

CRT_DDC_CLK

VGA_DDCCLK

A

UMA@

R96 0_0402_5%

DIS@

R70 0_0402_5%

UMA@

R97 0_0402_5%

DIS@

R71 0_0402_5%

CRT_DDC_DATA_R

12

CRT_DDC_CLK_R

12

R162

2.2K_0402_5%

B

5

2.2K_0402_5%

3

4

Q13B

2

2N7002DW-T/R7_SOT363-6

61

Q13A

Q13A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

12

R158

R157

100P_0402_50V8J

R158

2.2K_0402_5%

CRT_DDC_DAT_CONN

CRT_DDC_CLK_CONN

1

@

2

Issued Date

@

C177

C177 68P_0402_50V8K

68P_0402_50V8K

2

Compal Secret Data

2007/10/15 2008/10/15

C

Compal Secret Data

Deciphered Date

C178

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT Connector

LA-5751

26 51Thursday, October 29, 2009

E

0.3

5

D D

LCD POWER CIRCUIT

+LCDVDD

13

D

Q3

2N7002_SOT23

R35 0_0402_5%

PCH_ENVDD<15>

VGA_ENVDD_R<19>

C C

PCH_PWM<15>

B B

R35 0_0402_5%

R36 0_0402_5%

2N7002_SOT23

12

UMA@

12

DIS@

G

2

INVPWM

13

D

S

D

S

Q12

@

LCD_ENVDD

100K_0402_5%

+3VS

5

U6

1

NC

2

A

G

TC7SZ14FU_SSOP5

3

UMA@

R160

1 2

0_0402_5%

10K_0402_5% @

S

R37

P

Y

@

R13

R13 150_0603_1%

150_0603_1%

2

G

DTC124EK

2

12

@R37

@

PCH_PWM_R

4

R156

+5VALW

12

1

IN

3

12

4

R31

R31 100K_0402_5%

100K_0402_5%

R38 220K_0402_5%R38 220K_0402_5%

1 2

OUT

GND

Q5

DTC124EKAT146_SC59-3

UMA@

R161

1 2

0_0402_5%

For GMCH DPST

G

1

2

C34

0.1U_0402_16V4Z

FBMA-L11-201209-221LMA30T_0805

INVPWM

+3VS

1 3

470P_0402_50V7K

1

S

2

D

AO3413_SOT23-3

AO3413_SOT23-3 Q4

Q4

+LCDVDD

INVPWM

C15

@

1

2

470P_0402_50V7K

For EMI

W=60mils

C539

4.7U_0805_10V4Z

L2

1 2

4.7U_0805_10V4Z

DAC_BRIG

@

1

C13

2

W=60mils

+LCDVDD_CONN

C33

DISPOFF#

1

2

470P_0402_50V7K

1

2

@

C296

1

C25

0.1U_0402_16V4Z

2

3

680P_0402_50V7K

+3VS

@

C14

CONN_LVDS_SCL CONN_LVDS_SDA

1

2

R392

2.2K_0402_5%

@

+LCDVDD_CONN

LCD_COLOR_1

INVT_PWM<34>

DAC_BRIG<34>

+3VS

BKOFF#<34>

VGA_ENBKL_R<19>

PCH_ENBKL<15>

R395

2.2K_0402_5%

@

2

+LEDVDD B+

(60 MIL)

R17

1 2

0_0402_5% DIS@

D12

BKOFF#

CH751H-40PT_SOD323-2

R261 0_0402_5%DIS@R261 0_0402_5%DIS@

1 2

UMA@

R260 0_0402_5%

1 2

INVPWM DISPOFF#

+3VS

12

R250

4.7K_0402_5%

21

100K_0402_1%

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30

32

ACES_87142-3041

DISPOFF#

R259

1

R549 0_0805_5%R549 0_0805_5%

1 2

R550 0_0805_5%R550 0_0805_5%

1 2

1

C567

680P_0402_50V7K

@

JLVDS1

112 334 556 778

9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930

GND31GND

ME@

1 2

+CMOS_PW

USB20_N2 USB20_P2

CONN_LVDS_A0# CONN_LVDS_A0

CONN_LVDS_A1# CONN_LVDS_A1

CONN_LVDS_A2# CONN_LVDS_A2

CONN_LVDS_ACLK# CONN_LVDS_ACLK

ENBKL <34>

2

C566

4.7U_0805_25V6-K

2

USB20_N2 <16> USB20_P2 <16>

CMOS

CMOS Camera

VGA_LVDS_SCL<19> VGA_LVDS_SDA<19>

VGA_LVDS_A0<20>

VGA_LVDS_A0#<20>

VGA_LVDS_A1<20> VGA_LVDS_A1#<20>

VGA_LVDS_A2<20> VGA_LVDS_A2#<20>

VGA_LVDS_ACLK<20> VGA_LVDS_ACLK#<20>

EDID_CLK<15>

A A

EDID_DATA<15>

LVDS_A0<15> LVDS_A0#<15>

LVDS_A1<15> LVDS_A1#<15>

LVDS_A2<15> LVDS_A2#<15>

LVDS_ACLK<15> LVDS_ACLK#<15>

VGA_LVDS_SCL VGA_LVDS_SDA

VGA_LVDS_A0 VGA_LVDS_A0#

VGA_LVDS_A1 VGA_LVDS_A1#

VGA_LVDS_A2 VGA_LVDS_A2#

VGA_LVDS_ACLK VGA_LVDS_ACLK#

EDID_CLK EDID_DATA CONN_LVDS_SDA

LVDS_A0 LVDS_A0#

LVDS_A1 LVDS_A1#

LVDS_A2 LVDS_A2#

LVDS_ACLK LVDS_ACLK#

5

R3900_0402_5% DIS@ R3900_0402_5% DIS@

12

R3910_0402_5% DIS@ R3910_0402_5% DIS@

12

R860_0402_5% DIS@ R860_0402_5% DIS@

12

R850_0402_5% DIS@ R850_0402_5% DIS@

12

R1500_0402_5% DIS@ R1500_0402_5% DIS@

12

R1280_0402_5% DIS@ R1280_0402_5% DIS@

12

R1260_0402_5% DIS@ R1260_0402_5% DIS@

12

R1270_0402_5% DIS@ R1270_0402_5% DIS@

12

R840_0402_5% DIS@ R840_0402_5% DIS@

12

R1250_0402_5% DIS@ R1250_0402_5% DIS@

12

R3930_0402_5% UMA@ R3930_0402_5% UMA@

12

R3940_0402_5% UMA@ R3940_0402_5% UMA@

12

R3830_0402_5% UMA@ R3830_0402_5% UMA@

12

R3820_0402_5% UMA@ R3820_0402_5% UMA@

12

R3890_0402_5% UMA@ R3890_0402_5% UMA@

12

R3880_0402_5% UMA@ R3880_0402_5% UMA@

12

R3860_0402_5% UMA@ R3860_0402_5% UMA@

12

R3870_0402_5% UMA@ R3870_0402_5% UMA@

12

R3840_0402_5% UMA@ R3840_0402_5% UMA@

12

R3850_0402_5% UMA@ R3850_0402_5% UMA@

12

CONN_LVDS_SCL CONN_LVDS_SDA

CONN_LVDS_A0 CONN_LVDS_A0#

CONN_LVDS_A1 CONN_LVDS_A1#

CONN_LVDS_A2 CONN_LVDS_A2#

CONN_LVDS_ACLK CONN_LVDS_ACLK#

CONN_LVDS_SCL

CONN_LVDS_A0 CONN_LVDS_A0#

CONN_LVDS_A1 CONN_LVDS_A1#

CONN_LVDS_A2 CONN_LVDS_A2#

CONN_LVDS_ACLK CONN_LVDS_ACLK#

CMOS_OFF#<34>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

+5VS

12

1

2

IN

3

2

Q24 AO3413_SOT23-3

CMOS@

R270

R270 10K_0402_5%

10K_0402_5%

CMOS1

OUT

GND

Q21

Q21 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

CMOS@

D

S

D

S

13

CMOS@

G

2

C326

0.01U_0402_16V7K

1 2

CMOS@

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

LVDS/CAMERA

12

R280

R280 0_0603_5%

0_0603_5%

CMOS@

1

C337

C337 10U_0805_10V4Z

10U_0805_10V4Z

2

CMOS@

LA-5751

1

C275

0.1U_0402_16V4Z

2

CMOS@

+CMOS_PW

27 51Friday, October 30, 2009

1

0.3

A

B

C

D

E

Mini-Express Card for WLAN/WiMAX(Half)

2

J4

2

JUMP_43X79

@

1

2Watt

1

1 2

1 2 1 2

R372300_0402_5% @ R372300_0402_5% @

12

R371300_0402_5% R371300_0402_5%

12

+3VALW

1

C422

0.1U_0402_16V4Z

2

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R

USB20_N8 <16> USB20_P8 <16>

WLAN_LED#

WL_OFF# <34>

BUF_PLT_RST# <5,16,19,29> +3VALW +3VS

SMB_CLK_S3 <10,11,12,14> SMB_DATA_S3 <10,11,12,14>

WLAN_LED# <36>

Reserve for SW mini-pcie debug card. Series resistors closed to KBC side.

LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R PCI_RST#_R CLK_PCI_DB

R284 0_0402_5%@R284 0_0402_5%@

1 2

R285 0_0402_5%@R285 0_0402_5%@

1 2

R286 0_0402_5%@R286 0_0402_5%@

1 2

R287 0_0402_5%@R287 0_0402_5%@

1 2

R288 0_0402_5%@R288 0_0402_5%@

1 2

R290 0_0402_5%@R290 0_0402_5%@

1 2

LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 PCI_RST#

LPC_FRAME# <13,34> LPC_AD3 <13,34> LPC_AD2 <13,34> LPC_AD1 <13,34> LPC_AD0 <13,34>

PCI_RST# <16,34>

CLK_PCI_DB <14>

Mini-Express Card for WWAN(Full)

Mini-Express Card(WLAN/WiMAX)

JP10

1

WAKE#

3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

3.3V

NC

GND

NC

1.5V

CLKREQ#

NC

GND

NC

REFCLK-

NC

REFCLK+

NC

GND

NC

GND

NC

GND

PERST#

PERn0

+3.3Vaux

PERp0

GND

+1.5V

GND

SMB_CLK

PETn0

SMB_DATA

PETp0

GND

USB_D-

NC

USB_D+

NC

GND

NC

LED_WWAN#

NC

LED_WLAN#

NC

LED_WPAN#

NC

+1.5V

NC

GND

NC

+3.3V

GND

TAITW_PFPET0-AFGLBG1ZZ4N0

ME@

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

PCIE_PRX_DTX_N2<14> PCIE_PRX_DTX_P2<14>

PCIE_PTX_C_DRX_N2<14> PCIE_PTX_C_DRX_P2<14>

CLK_PCIE_WLAN1#<14>

CLK_PCIE_WLAN1<14>

PCIE_WAKE# BT_ACTIVE

WLAN_CLKREQ1#

EC_TX_P80_DATA EC_RX_P80_CLK

R333 0_0402_5%@R333 0_0402_5%@

1 2

PCI_RST#_R CLK_PCI_DB

+3VS

100_0402_1%

R274

1 2 1 2

R273

100_0402_1%

PCIE_WAKE#<15>

BT_ACTIVE<37>

1 1

WLAN_CLKREQ1#<14>

EC_TX_P80_DATA<34,35> EC_RX_P80_CLK<34,35>

+1.5VS

+3VS

R377 0_0402_5%R377 0_0402_5%

R376 0_0402_5%@R376 0_0402_5%@ R375 0_0402_5%R375 0_0402_5%

R374 0_0402_5%@R374 0_0402_5%@ R373 0_0402_5%@R373 0_0402_5%@

2 2

CLK_PCIE_CARD_PCH#<14>

CLK_PCIE_CARD_PCH<14>

EC_TX_P80_DATA EC_RX_P80_CLK

PCIE_WAKE# BT_ACTIVE

PCIECLKREQ3#

PCIE_PRX_DTX_N4<14> PCIE_PRX_DTX_P4<14>

PCIE_PTX_C_DRX_N4<14> PCIE_PTX_C_DRX_P4<14>

+1.5VS

1

C358

0.1U_0402_16V4Z

2

+3VS

1

C386

0.1U_0402_16V4Z

2

+3VALW

1

C372

0.1U_0402_16V4Z

2

PCIE_WAKE#<15>

BT_ACTIVE<37>

PCIECLKREQ3#<14>

Vcc 3.3V +/- 8% Peak Icc 2750mA with max supply droop 50mA Average Icc 1000mA

EC_TX_P80_DATA<34,35> EC_RX_P80_CLK<34,35>

3 3

4 4

Mini-Express Card(WWAN 3G)

JP9

1

R370 0_0402_5%@R370 0_0402_5%@

3G@

100_0402_1%

R364

1 2 1 2

R363

100_0402_1%

3G@

1 2

+3VS

WAKE#

3

NC

5

NC

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

17

NC

19

NC

21

GND

23

PERn0

25

PERp0

27

GND

29

GND

31

PETn0

33

PETp0

35

GND

37

NC

39

NC

41

NC

43

NC

45

NC

47

NC

49

NC

51

NC

53

GND

TAITW_PFPET0-AFGLBG1ZZ4N0

ME@

Express Card Power Switch

+3VS

+3VALW

BUF_PLT_RST#<5,16,19,29>

SYSON<34,39,44>

SUSP#<16,34,39,42,44,46>

R334 100K_0402_5%@R334 100K_0402_5%@

+3VALW

1 2

CPUSB#<16>

PERST#

+3.3Vaux

+1.5V

SMB_CLK

SMB_DATA

USB_D-

USB_D+

LED_WWAN#

LED_WLAN# LED_WPAN#

+1.5V

+3.3V

+1.5VS

SYSON

SUSP#

CPUSB#

3.3V

GND

1.5V NC NC NC NC NC

GND

NC

GND

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

12 14

2 4

6

20

1

10

9

18

+3VS

+1.5VS

+UIM_PWR UIM_DATA UIM_CLK UIM_RST UIM_VPP

USB20_N13 USB20_P13

U15

1.5Vin

3.3Vin

AUX_IN17AUX_OUT

SYSRST#

SHDN#

STBY#

CPPE#

CPUSB#

RCLKEN

G577BSR91U_QFN20

+3VS

2Watt

R368 0_0402_5%3G@R368 0_0402_5%3G@

1 2

R367 0_0402_5%@R367 0_0402_5%@

1 2

R369 0_0402_5%@R369 0_0402_5%@

1 2

R366 0_0402_5%@R366 0_0402_5%@

1 2

R365 0_0402_5%@R365 0_0402_5%@

1 2

USB20_N13 <16> USB20_P13 <16>

+1.5VS_CARD1

11

1.5Vout

13

1.5Vout

+3VS_CARD1

3

3.3Vout

5

3.3Vout

15

19

OC#

8

PERST#

16

NC

7

GND

1

C418

C418 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VALW_CARD1

PERST#

1

@

C420

C420 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VALW +3VS

SMB_CLK_S3 <10,11,12,14> SMB_DATA_S3 <10,11,12,14>

+1.5VS

1

C417

0.1U_0402_16V4Z

2

40mil

60mil

40mil

3G_OFF# <34> BUF_PLT_RST# <5,16,19,29>

1

C419

0.1U_0402_16V4Z

2

+1.5VS_CARD1

Imax = 0.75A

1

C360

C360 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS_CARD1

Imax = 1.35A

1

C388

C388 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VALW_CARD1

Imax = 0.275A

1

@

C356

C356 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C359

0.1U_0402_16V4Z

2

1

C387

0.1U_0402_16V4Z

2

1

C357

0.1U_0402_16V4Z

2

D4

@D4

@

CM1293-04SO_SOT23-6

UIM_VPP UIM_DATA

+UIM_PWR

JP2

4

GND

5

VPP

6

I/O

7

DET

12

R151

10K_0402_5%

TAITW_PMPAT6-06GLBS7N14N0

ME@

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

4

CH4

5

Vp

6

CH3

1

VCC

2

RST

3

CLK

8

GND

9

GND

New Card 34mm Socket (Left/TOP)

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

27 28

CLK_PCIE_EXP_PCH#<14> CLK_PCIE_EXP_PCH<14>

PCIE_PRX_DTX_N5<14> PCIE_PRX_DTX_P5<14>

PCIE_PTX_C_DRX_N5<14> PCIE_PTX_C_DRX_P5<14>

USB20_N10<16> USB20_P10<16>

CPUSB#<16>

SMB_CLK_S3<10,11,12,14> SMB_DATA_S3<10,11,12,14>

+1.5VS_CARD1

PCIE_WAKE#<15>

+3VALW_CARD1

+3VS_CARD1

CLKREQ_EXP#<14>

USB20_N10 USB20_P10

CPUSB#

PERST#

CPUSB#

+3VS

+UIM_PWR UIM_RST UIM_CLK

JEXP1

GND USB_DUSB_D+ CPUSB# RSV RSV SMB_CLK SMB_DATA +1.5V +1.5V WAKE# +3.3VAUX PERST# +3.3V +3.3V CLKREQ# CPPE# REFCLKREFCLK+ GND PERn0 PERp0 GND PETn0 PETp0 GND

GND GND

SANTA_130801-5_LT

ME@

40mil

1

2

@

10K_0402_5%

1

C188

2

4.7U_0805_10V4Z

+UIM_PWRUIM_DATA

12

R152

DAN217T146_SC59-3

1

D5

@ D5

@

C176

0.1U_0402_16V4Z

+3VS

3

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Mini-Card/Nwe Card/SIM

Size Document Number Rev

Date: Sheet of

LA-5751

E

28 51Friday, October 30, 2009

0.3

A

4 4

Place Close to Chip

+3V_LAN

1

2

C593 0.1U_0402_10V6KC593 0.1U_0402_10V6K

C594 0.1U_0402_10V6KC594 0.1U_0402_10V6K

CLK_PCIE_LAN<14>

CLK_PCIE_LAN#<14>

BUF_PLT_RST#<5,16,19,28>

R171 2.49K_0402_1%R171 2.49K_0402_1%

12

R206 10K_0402_5%

@

Y3

1 2

25MHZ_20P

C612

30P_0402_50V8J

PCIE_PRX_DTX_P3<14>

PCIE_PRX_DTX_N3<14>

PCIE_PTX_C_DRX_P3<14>

PCIE_PTX_C_DRX_N3<14>

CLKREQ_LAN#<14>

LAN_WAKE#<34>

3 3

+3VS

12

R204

R204 1K_0402_5%

1K_0402_5%

ISOLATEB

R205

R205 15K_0402_5%

15K_0402_5%

1 2

LAN_XTALOLAN_XTALI

B

LAN_DI

LAN_CS

PCIE_IRX_C_PTX_P3

PCIE_IRX_C_PTX_N3

ISOLATEB

LAN_XTALI LAN_XTALO

1

C611

30P_0402_50V8J

2

1 2

R182 3.6K_0402_5%

100@

1 2

R203 1K_0402_5%R203 1K_0402_5%

U24

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_N

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKTAL1

42

CKTAL2

23

GPO

24

NC

7

GND

14

GND

31

GND

47

GND

22

EGND

RTL8111DL-VB-GR_LQFP48_7X7

GIGA@

RTL8111DL

U24

RTL8103EL-VB-GR

100@

+3V_LAN

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

EECS

LED0

MDIP0 MDIN0 MDIP1 MDIN1 MDIP2 MDIN2 MDIP3 MDIN3

FB12

SROUT12

EVDD12 DVDD12 DVDD12 DVDD12

AVDD12

VDDSR VDDSR

VDD33 VDD33

AVDD33

ENSR

33 34 35 32

38

2 3 5 6 8 9 11 12

4

48

19 30 36 13 10

39

44 45

29 37

1 40 43

C

LAN_DI LAN_SK# LAN_CS

ACTIVITY#

MDI0+ MDI0MDI1+ MDI1MDI2+ MDI2MDI3+ MDI3-

VCTRL12

2

C242

0.1U_0402_16V4Z

1

GIGA@

R177

R181

LAN_SK# <30>

ACTIVITY# <30>

MDI0+ <30> MDI0- <30> MDI1+ <30> MDI1- <30> MDI2+ <30> MDI2- <30> MDI3+ <30> MDI3- <30>

12

0_0402_5%GIGA@

0.1U_0402_16V4Z

12

0_0402_5%GIGA@

GIGA@

+3V_LAN

+LAN_VDD12

+EVDD12 +LAN_VDD12

C243

12

+3V_LAN

R180

R180 0_0402_5%

0_0402_5%

GIGA@

1 2

R179

R179 0_0402_5%

0_0402_5%

@

1 2

D

R576

1 2

0_0603_5%GIGA@

R577

1 2

0_0603_5%100@

1

2

0.1U_0402_16V4Z

For RTL8111DL pin43: pull hi if switching regulator is enable. pull low if external power 1.2Vis used. For RTL8103EL is NC.

C245

2

22U_0805_6.3V6M

C244

GIGA@

Close to pin.

0_0603_5%100@

40 mil width

+3V_LAN

+LAN_VDD12

E

Close to 8111DL pins--1,29,37

+3V_LAN

0.1U_0402_16V4Z

2

C597

C613

1

0.1U_0402_16V4Z

2

C246

1

2 2

60 mil width

GIGA@ L12

VCTRL12

GIGA@

S INDUC_ 4.7UH +-20% SIA4012-4R7M

60 mil width

J1

@J1

@

JOPEN

12

R219

R219 33K_0402_5%

33K_0402_5%

D

S

+3VALW

2

C267

0.1U_0402_16V4Z

1

+5VALW

12

1 1

EN_WOL#<34>

EN_WOL#

2N7002_SOT23-3

13

2

G

Q18

A

D

1 3

2

S

Q17

AO3414_SOT23-3

G

Layout Notice : Place as close chip as possible.

+3V_LAN

C261

4.7U_0805_10V4Z

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

The trace length L69 to 8111DL's pin<200mils. L69 to C238/C239<200mils.

L12

1 2

R170

1 2

0_0603_5%100@

Compal Secret Data

2006/08/04 2006/10/06

Compal Secret Data

1

C238

2

22U_0805_6.3V6M

Deciphered Date

1

C239

2

0.1U_0402_16V4Z

D

R173

1 2

R172

1 2

0_0603_5%GIGA@

Close to U24 pin19

1U_0603_10V4Z

2

C251

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

C247

2

1

C250

C250 1U_0603_10V4Z

1U_0603_10V4Z

2

C248

1

0.1U_0402_16V4Z

+EVDD12

2

C260

0.1U_0402_16V4Z

1

+LAN_VDD12

2

C259

1

Close to U24 pin10,13,30,36

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

RTL8103EL

LA-5751

Friday, October 30, 2009

LA-5751

E

29 51

0.3

5

4

3

2

1

Close to T14

T16

GIGA@

C133 0.01U_0402_16V7K

D D

12

MDI3+<29>

MDI3+

T16

1

TCT1

1:1

TD1+

1:1

2

MCT1

MX1+

MCT3

24

MDO3+

23

R55 75_0402_5%GIGA@R55 75_0402_5%GIGA@

12

MDI3-

MDI2+

MDI2-

MDI1+

MDI1-

MDI0+

3

TD1-

4

TCT2

1:1

TD2+

TD2-

TCT3

TD3+

TD3-

TCT4

TD4+

1:1

5

6

7

8

9

10

11

MX1-

MCT2

MX2+

MX2-

MCT3

MX3+

MX3-

MCT4

MX4+

GIGA@

C132 0.01U_0402_16V7K

12

C131 0.01U_0402_16V7KC131 0.01U_0402_16V7K

12

C130 0.01U_0402_16V7KC130 0.01U_0402_16V7K

C C

12

MDI3-<29>

MDI2+<29>

MDI2-<29>

MDI1+<29>

MDI1-<29>

MDI0+<29>

Place close to TCT pin

MDI0- MDO0-

MDI0-<29>

12

TD4-

LG-2446S-1

GIGA@

T16

MX4-

MDO3-

22

MCT2

21

MDO2+

20

MDO2-

19

MCT1

18

MDO1+

17

MDO1-

16

MCT0

15

MDO0+

14

13

R54 75_0402_5%GIGA@R54 75_0402_5%GIGA@

R53 75_0402_5%R53 75_0402_5%

R52 75_0402_5%R52 75_0402_5%

12

1000P_1206_2KV7K

C128

1

2

RJ45 Conn.

JRJ45

HH-065 10/100

100@

B B

ACTIVITY#<29>

ACTIVITY#

1

C249

C249 68P_0402_50V8K

68P_0402_50V8K

@

2

LAN_SK#<29>

LAN_SK#

R178 300_0402_5%R178 300_0402_5%

+3V_LAN

C70

@C70

@

470P_0402_50V7K

12

For EMI.

R574 300_0402_5%R574 300_0402_5%

1

C609

C609 68P_0402_50V8K

68P_0402_50V8K

2

@

12

MDO3-

MDO3+

MDO1-

MDO2-

MDO2+

MDO1+

MDO0-

MDO0+

12

+3V_LAN

JRJ45

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

FOX_JM36113-P2221-7F

ME@

SHLD4

SHLD3

SHLD2

SHLD1

16

15

14

13

A A

Security Classification

2009/03/20 2010/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/20 2010/03/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN_Transformer

LA-5751

30 51Friday, October 30, 2009

1

0.3

R430

1403@R430

1403@

5

4

3

2

1

1403:

0_0402_5%

D D

12

2103@

R430

R430 68_0402_5%

68_0402_5%

VDD

2

C443

0.1U_0402_16V4Z

1

12

2103@

R459

6.8K_0402_5%

SMB_EC_CK2_R<14,19>

2103@

R460

10K_0402_5%

SMB_EC_CK2_R

12

10K_0402_5%

SHDN_SEL

2103@

R462

FAN_PWM

12

R440

R440 10K_0402_5%

10K_0402_5%

@

REMOTE2-

12

FAN_PWM & TACH for PWM FAN

C C

SMSC thermal sensor placed near by VRAM

U20

2103@U20

2103@

1

DN1

3

VDD

5

GPIO2

7

SYS_SHDN#

9

SMCLK

11

PWM

13

SHDN_SEL DN2 / DP315DP2 / DN3

EMC2103-2-AP-TR_QFN16_4X4

Address 0101_110xb

internal pull up 1.2K to 1.5V

DP1

GPIO1

ALERT#

SMDATA

TACH

GND

TRIP_SET

GPAD

2 4

ALERT#

6 8

TACH

10 12

TRIP_SET

14 16 17

+3VS+3VS +3VS

12

1 2

2103@

R461

R461 10K_0402_5%

10K_0402_5%

SMB_EC_DA2_R

REMOTE2+

R439

1.5K_0402_1%

@

+3VS+3VS +3VS+3VS

12

2103@

R441

R441 10K_0402_5%

10K_0402_5%

SMB_EC_DA2_R <14,19>

R for initial thermal

@C508/@C324=100p

REMOTE1+

C508

REMOTE1-

REMOTE2+

REMOTE2-

C508

C324

1000P_0402_50V7K

@

1

2

B

2

E

3 1

1

2

B

2

E

3 1

Close to DDR

C

Q39

MMST3904-7-F_SOT323-3

Under WWAN

C

Q22

MMST3904-7-F_SOT323-3

REMOTE1,2+/-: Trace width/space:10/10 mil Trace length:<8"

shutdown temp

Close U20

1403@

C449

2200P_0402_50V7K

C651

B B

Shutdown Temp

93 94 95 96 97 98

A A

99 100 101 102 103 104 105

C651

2200P_0402_50V7K

TRIP_SET R439 (1%)

953ohm 1020ohm 1100ohm 1150ohm 1240ohm 1330ohm 1400ohm 1500ohm 1580ohm 1690ohm 1820ohm 1960ohm 2050ohm

5

1

2

1

2

REMOTE1+

REMOTE2-

REMOTE1-

REMOTE2+

REMOTE2-

VDD

REMOTE1+

REMOTE1-

REMOTE2+

REMOTE2-

4

2103@

1 2

R622 0_0402_5%

2103@

1 2

R623 0_0402_5%

U29

1403@U29

1403@

1

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-2-AIZL-TR_MSOP10

SMCLK

SMDATA

ALERT#

THERM#

GND

Address 1001_101xb

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

REMOTE1-REMOTE2+

REMOTE1+

10

9

8

7

6

ALERT#

+3VS

12

R624

R624 10K_0402_5%

10K_0402_5%

@

SMB_EC_CK2_R

SMB_EC_DA2_R

Compal Secret Data

2008/03/25 2008/04/

3

Compal Secret Data

Deciphered Date

EC_FAN_PWM<34>

+5VS

2

1

2

TACH

FAN_PWM

EC_TACH<34>

C490

C490 10U_0805_10V4Z

10U_0805_10V4Z

@

1 2

R617 0_0402_5%

@

1 2

R618 0_0402_5%

1 2

R619 0_0402_5%R619 0_0402_5%

1 2

R620 0_0402_5%R620 0_0402_5%

TACH_R

FAN_PWM_R

FAN1 Conn

JP12

1

TACH_R

FAN_PWM_R

Compal Electronics,Ltd.

Title

EMC2103/1403_Thermal sensor/FAN

Size Document Number Rev

Custom

Date: Sheet of

2 3 4 5 6

ACES_85205-04001

LA-5751

1 2 3 4 G5 G6

ME@

31 51Friday, October 30, 2009

1

0.3

A

1 1

B

C

D

E

F

G

H

SATA HDD Conn.

JHDD1

2 2

SATA_DTX_C_IRX_N0<13>

SATA_DTX_C_IRX_P0<13>

+5VS

1

C125

C125 1000P_0402_50V7K

1000P_0402_50V7K

3 3

2

SATA_DTX_C_IRX_P0

1

C126

0.1U_0402_16V4Z

2

1

C124

C124 1U_0603_10V4Z

1U_0603_10V4Z

2

SATA_ITX_DRX_P0<13> SATA_ITX_DRX_N0<13>

C434 0.01U_0402_16V7KC434 0.01U_0402_16V7K

1 2

C433 0.01U_0402_16V7KC433 0.01U_0402_16V7K

1 2

1

C123

C123 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C122

C122 10U_0805_10V4Z

10U_0805_10V4Z

2

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0SATA_DTX_C_IRX_N0 SATA_DTX_IRX_P0

+3VS

+5VS

+3VS

1

@

C121

0.1U_0402_16V4Z

2

JHDD1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

SUYIN_127043FB022G208ZR_RV

ME@

SATA ODD Conn.

SATA_DTX_C_IRX_N1<13>

SATA_DTX_C_IRX_P1<13>

ODD_Power_ON#<34>

ODD_OFF#<34>

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1

R380

1 2

+3VS

ODD_Power_ON#

+5VS

12

1

OUT

2

IN

GND

3

SATA_ITX_DRX_P1<13> SATA_ITX_DRX_N1<13>

C426 0.01U_0402_16V7KC426 0.01U_0402_16V7K

1 2

C425 0.01U_0402_16V7KC425 0.01U_0402_16V7K

1 2

10K_0402_5%@

@

1 2

R379 0_0402_5%

ODD Power Control

J6

2

112

@

JUMP_43X79

Q37

D

S

D

S

13

AO3413_SOT23-3@

G

@

R378

R378 10K_0402_5%

10K_0402_5%

Q36

Q36 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

G

2

C423

0.01U_0402_16V7K

1 2

@

SATA_ITX_DRX_P1 SATA_ITX_DRX_N1

SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

+5V_ODD

1

@

C431

C431 10U_0805_10V4Z

10U_0805_10V4Z

2

JODD1

1 2 3 4 5 6 7

8

9 10 11 12 13

OCTEK_SLS-13SB1G_RV

ME@

1

C424

0.1U_0402_16V4Z

2

GND A+ AGND BB+ GND

DP +5V +5V MD GND GND

GND GND

17 16

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2007/10/15 2008/10/15

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

HDD/ODD Connector

LA-5751

G

0.3

32 51Friday, October 30, 2009

H

0.3

5

CX20671 High Definition Audio Codec SoC With Integrated Class-D Stereo Amplifier. An integrated 5 V to 3.3 V Low-dropout voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout voltage regulator (LDO).

D D

+VAUX_3.3

+3VS

+3VALW

To support Wake-on-Jack or Wake-on-Ring, the CODEC VAUX_3.3 & VDD_IO pins must be powerd by a rail that is not removed unless AC power is removed. *DSH page42 has more detail.

+1.5V

+3VS

+3VALW

C C

C416

1 2

0.1U_0402_16V4Z

C396

1 2

0.1U_0402_16V4Z

C395

1 2

0.1U_0402_16V4Z

C405

1 2

B B

A A

0.1U_0402_16V4Z

R355

1 2

0_0402_5%

R354

1 2

0_0402_5%

R362

1 2

0_0402_5%

J7

1 2

SHORT PADS

GND GNDA

PC Beep

EC Beep

BEEP#<34>

0.1U_0402_16V4Z@

PCH_SPKR<13>

ICH Beep

C345

C351

1

1U_0603_10V4Z

2

1U_0603_10V4Z

C352

12

1 2

560_0402_5%

12

1 2

560_0402_5%

10K_0402_5%

5

R311

R310

R309

2

B

12

+3VS

12

R325

R325 10K_0402_1%

10K_0402_1%

C368

12

1U_0603_10V4Z

R326

R326 10K_0402_1%

10K_0402_1%

1 2

R327 20K_0402_5%R327 20K_0402_5%

1

C

Q30

2SC2411KT146_SOT23-3

E

3

D15

@D15

@

RB751V_SOD323

2 1

12

R3390_0402_5% R3390_0402_5%

@

12

R3370_0402_5%

C381

R3300_0402_5% @ R3300_0402_5% @

12

R3280_0402_5% R3280_0402_5%

@

12

R3290_0402_5%

HDA_RST_CODEC#<13>

HDA_BITCLK_CODEC<13> HDA_SYNC_CODEC<13>

HDA_SDIN1<13>

HDA_SDOUT_CODEC<13>

EAPD active low 0=power down ex AMP 1=power up ex AMP

EAPD<34>

EC_MUTE#<34>

Internal SPEAKER

C374 1U_0603_10V4ZC374 1U_0603_10V4Z

12

R335

R335 20K_0402_5%

20K_0402_5%

@

1 2

1

2

C369

4

+3VS

1

C408

C400

C407

2

1

C380

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C377

2

1U_0603_10V4Z

0.1U_0402_16V4Z

R332

R336 33_0402_5%R336 33_0402_5%

1 2

PC_BEEP

EC_MUTE#

2

10U_0805_10V4Z

10K only needed if supply to VAUX_3.3 is removed during system re-start.

12

HDA_RST_CODEC#

HDA_BITCLK_CODEC

HDA_SYNC_CODEC

HDA_SDOUT_CODEC

1 2

SPK_L2+ SPK_L1-

SPK_R2+ SPK_R1-

0.1U_0402_16V4Z

1

C371

C379

2

10K_0402_5%

10U_0805_10V4Z

0.1U_0402_16V4Z

R3380_0402_5% R3380_0402_5%

12

R3430_0402_5% R3430_0402_5%

C414

U17

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

10

PC_BEEP

38

GPIO0/EAPD#

37

GPIO1/SPK_MUTE#

40

DMIC_CLK

1

DMIC_1/2

11

LEFT+

13

LEFT-

16

RIGHT+

14

RIGHT-

1

2

1U_0603_10V4Z

3

GND

41

1

C412

2

0.1U_0402_16V4Z

7

2

18

29

VDD_IO

FILT_1.8

VAUX_3.3

DVDD_3.3

CX20671-11Z_QFN40_6X6

FILT_1.65

C410

27

28

AVDD_5V

AVDD_3.3

1

2

26

AVDD_HP CLASS-D_REF

wide 20MIL

PC_BEEPPC_BEEP1

4

C409

10U_0805_10V4Z

LPWR_5.0

RPWR_5.0

SENSE_A

PORTB_R

PORTB_L

B_BIAS

C_BIAS PORTC_R PORTC_L

PORTA_R

PORTA_L

AVEE

FLY_P

FLY_N

SPK_R1SPK_R2+ SPK_L1SPK_L2+

1

2

NC NC NC

3

+LDO_OUT_3.3V

AVDD_3.3 pinis output of internal LDO. NOT connect to external supply.

0.1U_0402_16V4Z

1

C411

C413

2

10U_0805_10V4Z

0.1U_0402_16V4Z

C393

12 15 17

36

35 34 33

32 31 30

HP_OUTR_R

23

HP_OUTL_R

22

24 25 39

21 19 20

C401 1U_0603_10V4ZC401 1U_0603_10V4Z

L19 FBMA-L11-160808-121LMA30TL19 FBMA-L11-160808-121LMA30T L20 FBMA-L11-160808-121LMA30TL20 FBMA-L11-160808-121LMA30T L22 FBMA-L11-160808-121LMA30TL22 FBMA-L11-160808-121LMA30T L23 FBMA-L11-160808-121LMA30TL23 FBMA-L11-160808-121LMA30T

3

C393

+MICBIASB

+MICBIASC

C403 2.2U_0603_10V7KC403 2.2U_0603_10V7K C415 2.2U_0603_10V7KC415 2.2U_0603_10V7K

R601 5.1_0402_1%

R601 5.1_0402_1% R602 5.1_0402_1%

R602 5.1_0402_1%

1 2

1 2 1 2 1 2 1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Layout Note:Path from +5VS to LPWR_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms)

+5VS

1

C392

C391

2

0.1U_0402_16V4Z

1

2

Please bypass caps very close to device.

0.1U_0402_16V4Z

MIC_INR

MIC_INL

1 2 1 2

1

C404

C406

2

10U_0805_10V4Z

0.1U_0402_16V4Z

2008/03/25 2008/04/

1

C390

C399

2

10U_0805_10V4Z

0.1U_0402_16V4Z

10U_0805_10V4Z

R344 5.11K_0402_1%R344 5.11K_0402_1%

R345 10K_0402_1%R345 10K_0402_1% R346 39.2K_0402_1%R346 39.2K_0402_1%

Internal MIC

R352 2.2K_0402_5%R352 2.2K_0402_5% R351 2.2K_0402_5%R351 2.2K_0402_5%

HP_OUTR <38> HP_OUTL <38>

WM-64PCY_2P

SPK_R1-_CONN SPK_R2+_CONN SPK_L1-_CONN SPK_L2+_CONN

Compal Secret Data

2

R348

1 2

0.1_1206_1%

1 2

1 2 1 2

R350 100_0402_1%R350 100_0402_1%

R356 100_0402_1%R356 100_0402_1%

Headphone

R349

4.7K_0402_5%

MIC1

1

GNDA

2

45@

Deciphered Date

2

1

C375

2

@

22P_0402_50V8J

+5VS

+VAUX_3.3

+MICBIASC

+MICBIASB

12

C394 2.2U_0603_10V7K

1 2

C402 2.2U_0603_10V7K

1 2

@

1

C633

C632

2

1000P_0402_50V7K

1

C376

C378

2

@

22P_0402_50V8J

MIC_JD <38> PLUG_IN <38>

EXT_MIC_R <38> EXT_MIC_L <38>

1

C634

2

1000P_0402_50V7K

1

HDA_RST_CODEC#

HDA_SYNC_CODEC

HDA_SDOUT_CODEC

1

C370

2

22P_0402_50V8J

Sense resistors must be

Port C

connected same power

Port A

that is used for VAUX_3.3

1 2

EMI

R33133_0402_5% R33133_0402_5%

HDA_BITCLK_CODEC

External MIC

MIC_INLMIC_INR

12

R6000_0402_5% R6000_0402_5%

MIC_INR

MIC_INL

1

C635

2

1000P_0402_50V7K

Compal Electronics,Ltd.

Title

CX20671 Codec

Size Document Number Rev

C

Date: Sheet of

LA-5751

1

JSPK1

1

2

3

4

5

GND1

6

GND2

ACES_88231-04001

ME@

33 51Friday, October 30, 2009

0.3

L14

+3VALW +EC_AVCC

+3VALW

1 2

FBM-11-160808-601-T_0603

1 2

R266 47K_0402_5%R266 47K_0402_5%

C293

0.1U_0402_16V4Z

1 2

L13 FBM-11-160808-601-T_0603L13 FBM-11-160808-601-T_0603

12

C340 22P_0402_50V8J@C340 22P_0402_50V8J@

C323

0.1U_0402_16V4Z

2

1

C294

1000P_0402_50V7K

ECAGND

2

1

1000P_0402_50V7K

2

12

R289 10_0402_5%@ R289 10_0402_5%@

+3VALW

R614

@

1 2

4.7K_0402_5%

4.7K_0402_5% R615

R615

@

1 2

4.7K_0402_5%

1

KB_RST#<16>

EC_ID to identify KB926 D or E

KSO[0..15]<35>

KSI[0..7]<35>

+3VALW

R265 47K_0402_5%R265 47K_0402_5%

1 2

R263 47K_0402_5%R263 47K_0402_5%

1 2

KSO1

KSO2

ENE UPDATE 08/10/21

10K_0402_5%

LAN_WAKE#<29>

PCI_PME#<16>

+3VALW

+3VS

@

1

@

C291

C291 100P_0402_50V8J

100P_0402_50V8J

2

+3VS

R611

1 2

R262 100K_0402_1%@R262 100K_0402_1%@

1 2

R271 100K_0402_1%@R271 100K_0402_1%@

R226

2.2K_0402_5%

1 2

EC_TACH

1 2

R293 0_0402_5%R293 0_0402_5%

1 2

R303 0_0402_5%@R303 0_0402_5%@

+3VALW

FRD#SPI_SO

FSEL#SPICS#

R227

2.2K_0402_5%

@

1

@

C292

C292 100P_0402_50V8J

100P_0402_50V8J

2

D

S

D

S

13

G

2N7002_SOT23

2

EC_SMB_CK2 EC_SMB_DA2

Q26

@

Q26

@

+3VALW

R292

R292 10K_0402_5%

10K_0402_5%

1 2

EC_PME#

EC_TACH<31>

changed 09.09.08

H_PROCHOT#<5,48>

+3VS

R291

1 2

R294

1 2

+3VALW

R240

1 2

R239

1 2

C322 15P_0402_50V8JC322 15P_0402_50V8J

32.768KHZ_12.5PF_1TJS125DJ4A420P

3

2

X2

C321 15P_0402_50V8JC321 15P_0402_50V8J

C290

0.1U_0402_16V4Z

C290

0.1U_0402_16V4Z

1

2

GATEA20<16>

SERIRQ<13>

LPC_FRAME#<13,28>

LPC_AD3<13,28> LPC_AD2<13,28> LPC_AD1<13,28> LPC_AD0<13,28>

CLK_PCI_LPC<16>

PCI_RST#<16,28>

EC_SCI#<16>

EC_ID

KSI3<35> KSI4<35>

KSO[0..15]

KSI[0..7]

EC_SMB_CK1<41> EC_SMB_DA1<41>

EC_SMB_CK2<14> EC_SMB_DA2<14>

SLP_S3#<15> SLP_S5#<15>

EC_SMI#<16>

LID_SW#<35>

ESB_CLK<38> ESB_DAT<38>

EC_TX_P80_DATA<28,35> EC_RX_P80_CLK<28,35>

4.7K_0402_5%

EC_SMB_CK1

4.7K_0402_5%

EC_SMB_DA1

4.7K_0402_5%

1 2

OUT

IN

1 2

KILL_SW#<35>

3G_OFF#<28>

ON/OFF#<38>

NUM_LED#<35>

12

@

4

1

EC_TACH

Reserve for ESD.

NC

C319

0.1U_0402_16V4Z

C319

0.1U_0402_16V4Z

1

2

100P_0402_50V8J

C652

ESB_CLK

ESB_DAT

12

@

R264

R264 20M_0603_5%

20M_0603_5%

+3VALW

C339

0.1U_0402_16V4Z

C339

0.1U_0402_16V4Z

1

2

KB_RST#

LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

EC_RST# EC_SCI# EC_ID

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI# LID_SW# ESB_CLK ESB_DAT

EC_TX_P80_DATA EC_RX_P80_CLK

H_PROCHOT#

XCLKI XCLKO

1000P_0402_50V7K

C329

0.1U_0402_16V4Z

C329

0.1U_0402_16V4Z

1

2

1 2 3 4 5 7 8

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

C341

C327

1000P_0402_50V7K

C327

1000P_0402_50V7K

1

2

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1

LPC & MISC

LAD0

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

KB926QFA1_LQFP128

SM Bus

needed to update to D3 version

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

69

ECAGND

U13

21 23 26 27

63 64 65 66

PCH_TEMP_ALERT#

75

ODD_Power_ON#

76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89

CHARGE_LED0#

90 91

CHARGE_LED1#

92 93 95 121 127

100

EC_LID_OUT#

101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

SA00001J580

XCLKO

XCLKI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R613

INVT_PWM BEEP# EC_FAN_PWM ACOFF

BATT_OVP

DAC_BRIG

IREF

USB_ON#

TP_CLK TP_DATA

FRD#SPI_SO FWR#SPI_SI SPI_CLK FSEL#SPICS#

PM_BTN#

I2C_INT

CAPS_LED#

SYSON

ACIN

EC_ON ODD_OFF# ICH_POK_EC ICH_POK BKOFF#

RST#

SUSP# PBTN_OUT#

1

2

2007/10/15 2008/10/15

C320

4.7U_0805_10V4Z

INVT_PWM <27> BEEP# <33>

ACOFF <40,42>

BATT_TEMP <41>

BATT_OVP <42> ADP_I <42> NOVO# <38>

PCH_TEMP_ALERT# <16>

ODD_Power_ON# <32>

DAC_BRIG <27>

IREF <42> CHGVADJ <42>

EC_MUTE#

EC_MUTE# <33>

TP_CLK <35>

TP_DATA <35>

EN_WOL# <29> BATT_SEL_EC <42> CMOS_OFF# <27>

FRD#SPI_SO <36>

FWR#SPI_SI <36>

SPI_CLK <36>

FSEL#SPICS# <36>

PM_BTN# <38>

I2C_INT <38>

FSTCHG <42>

CHARGE_LED0# <36>

CAPS_LED# <35>

CHARGE_LED1# <36>

PWR_LED# <36>

SYSON <28,39,44> VR_ON <48> ACIN <40>

EC_RSMRST# <15> EC_LID_OUT# <14> EC_ON <38>

ODD_OFF# <32>

BKOFF# <27> WL_OFF# <28>

AC_PRESENT <15>

RST# <38>

Compal Secret Data

1 2

10K_0402_5%

changed 09.09.08

R238 10K_0402_5%R238 10K_0402_5%

1 2

USB_ON# <37>

ME_FLASH <13>

SUS_PWR_DN_ACK <15>

1 2

R607

R607 R234 4.7K_0402_5%@R234 4.7K_0402_5%@

1 2

@

D11 RB751V_SOD323

1 2

R258 0_0402_5%R258 0_0402_5%

SLP_S4# <15>

ENBKL <27>

EAPD <33>

SUSP# <16,28,39,42,44,46> PBTN_OUT# <15> BT_OFF# <37>

SUSP#

Deciphered Date

+3VS

@

changed 09.09.08

USB_ON#

+3VALW

4.7K_0402_5%

+3VS

I2C_INT

21

1 2

10K_0402_5%

R251

6

1

@

C318

C318 1000P_0402_50V7K

1000P_0402_50V7K

2

EC_FAN_PWM <31>

+3VALW

R237 10K_0402_5%R237 10K_0402_5%

FAN control by EC 09.09.08

1 2

KB926 SPI STRAP PIN

12

R241

R241 10K_0402_5%

10K_0402_5%

ICH_POK <15>

+3VS

@R251

@

DRAMRST_CNTRL_EC <5>

Title

Size Document Number Rev

Custom

Date: Sheet of

TP_CLK

R236 4.7K_0402_5%R236 4.7K_0402_5%

TP_DATA

+3VALW

BATT_OVP

BATT_TEMP

ACIN

Compal Electronics, Inc.

BIOS & EC I/O Port

1 2

R235 4.7K_0402_5%R235 4.7K_0402_5%

1 2

C297 100P_0402_50V8JC297 100P_0402_50V8J

C298 100P_0402_50V8JC298 100P_0402_50V8J

C328 100P_0402_50V8JC328 100P_0402_50V8J

LA-5751

1 2

+5VS

0.3

34 51Friday, October 30, 2009

0.3

5

INT_KBD Conn.

KSI[0..7]

D D

C C

KSO[0..15]

KSO2

C203 100P_0402_50V8J@C203 100P_0402_50V8J@

KSO15

C153 100P_0402_50V8J@C153 100P_0402_50V8J@

KSO6

C175 100P_0402_50V8J@C175 100P_0402_50V8J@

KSO8

C185 100P_0402_50V8J@C185 100P_0402_50V8J@

KSO13

C172 100P_0402_50V8J@C172 100P_0402_50V8J@

KSO12

C173 100P_0402_50V8J@C173 100P_0402_50V8J@

KSO11

C155 100P_0402_50V8J@C155 100P_0402_50V8J@

KSO10

C154 100P_0402_50V8J@C154 100P_0402_50V8J@

KSO3

C174 100P_0402_50V8J@C174 100P_0402_50V8J@

KSO4

C187 100P_0402_50V8J@C187 100P_0402_50V8J@

KSI0

C204 100P_0402_50V8J@C204 100P_0402_50V8J@

KSO0

C227 100P_0402_50V8J@C227 100P_0402_50V8J@

CONN PIN define need double check

1 2

KSI[0..7] <34>

KSO[0..15] <34>

KSO1

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

To TP/B Conn.

+5VS

C150

0.1U_0402_16V4Z

TP_CLK<34> TP_DATA<34>

1

@

C151

C151 100P_0402_50V8J

100P_0402_50V8J

2

CONN PIN define need double check

B B

TP_CLK TP_DATA

1

@

C152

C152 100P_0402_50V8J

100P_0402_50V8J

2

4

C205 100P_0402_50V8J@C205 100P_0402_50V8J@

1 2

C186 100P_0402_50V8J@C186 100P_0402_50V8J@

1 2

C226 100P_0402_50V8J@C226 100P_0402_50V8J@

1 2

C206 100P_0402_50V8J@C206 100P_0402_50V8J@

1 2

C225 100P_0402_50V8J@C225 100P_0402_50V8J@

1 2

C156 100P_0402_50V8J@C156 100P_0402_50V8J@

1 2

C236 100P_0402_50V8J@C236 100P_0402_50V8J@

1 2

C235 100P_0402_50V8J@C235 100P_0402_50V8J@

1 2

C228 100P_0402_50V8J@C228 100P_0402_50V8J@

1 2

C233 100P_0402_50V8J@C233 100P_0402_50V8J@

1 2

C234 100P_0402_50V8J@C234 100P_0402_50V8J@

1 2

C241 100P_0402_50V8J@C241 100P_0402_50V8J@

1 2

JP4

4

3

2

1

E&T_6905-E04N-00R

ME@

+5VS

NUM_LED#<34>

CAPS_LED#<34>

12 12

T5PAD T5PAD

C654

T6PAD T6PAD

100P_0402_50V8J

@

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10

KSO15

R130300_0402_5% R130300_0402_5% R129300_0402_5% R129300_0402_5%

3

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

ACES_85201-3005N

2

C653

1

Reserve for ESD.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

ME@

100P_0402_50V8J@

2

JP5

1

EC DEBUG PORT

JP11

+3VALW EC_TX_P80_DATA<28,34> EC_RX_P80_CLK<28,34>

C398

0.1U_0402_16V4Z

100K_0402_5%

12

Lid Switch

+VCC_LID

2

1

2

VDD

OUTPUT

GND

1

LSSM12-P-V-T-R_3P

3

2

1

SW2

R353 100K_0402_5%R353 100K_0402_5%

A3212ELHLT-T_SOT23W-3

U18

31

G1

32

G2

+3VALW

KILL_SW#<34>

KILL_SW#

1 2

R347 0_0402_5%R347 0_0402_5%

Kill Switch

R295

EC_TX_P80_DATA EC_RX_P80_CLK

1 2

3

Kill

STATUS 1,2(LOW) 2,3(HI) ON

1 2 3 4

ACES_85205-0400

ME@

2

C397

10P_0402_50V8J

1

OFF

1 2 3 4

LID_SW# <34>

A A

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

KB /SW /LPC Debug Conn.

LA-5751

35 51Friday, October 30, 2009

1

0.3

FOR EC 256KB SPI ROM (150mil PACKAGE)

+3VALW

1

C265

0.1U_0402_16V4Z

2

FSEL#SPICS#<34>

R218 15_0402_5%R218 15_0402_5%

FRD#SPI_SO<34>

1 2

FSEL#SPICS#

20mils

U9

1 2 3 4

VCC

CS#

HOLD#

DO

CLK

WP#

DIO

GND

MX25L2005CMI-12G SOP

12

R217

R217 10K_0402_5%

10K_0402_5%

Changed to BEAD for EMI.

8

HOLD#FRD#SPI_SO SPI_SO

7 6 5

SPI_SI_EC

R201

Close to EC after C1059.

R215 FBMA-10-100505-101T 0402R215 FBMA-10-100505-101T 0402

1 2

15_0402_5%

1 2

SPI_CLKSPI_CLK_R

FWR#SPI_SI

SPI_CLK <34>

FWR#SPI_SI <34>

SPI_CLK_R

Colse to EC

C266

10P_0402_50V8J

1

2

R216

0_0402_5%

C264

12P_0402_50V8J

12

@

1

2

@

EMI 3G

FD4FD4

1

FD1FD1

1

H1 HOLEAH1HOLEA

1

C:H_3P8

H9 HOLEAH9HOLEA

1

H10

H10 HOLEA

HOLEA

1

A:H_2P8

H18

H18 HOLEA

HOLEA

1

H14

H14 HOLEA

HOLEA

LED

LED1

PWR_LED#<34>

CHARGE_LED1#<34>

Orange

CHARGE_LED0#<34>

White

WLAN_LED#<28>

BT_LED#<37>

HDD_LED#<13>

BATT_LOW_LED#

BATT_CHG_LED#

D17

RB751V_SOD323

D16

RB751V_SOD323

White

19-213A-T1D-CP2Q2HY-3T_WHITE

18-225A-S2T3D-C01-3T_ORG-WHITE

White

21

19-213A-T1D-CP2Q2HY-3T_WHITE

21

19-213A-T1D-CP2Q2HY-3T_WHITE

White

19-213A-T1D-CP2Q2HY-3T_WHITE

LED1

21

LED3

LED4

21

43

21

LED2

O

W

12

+5VALW

R357300_0402_5% R357300_0402_5%

12

R358300_0402_5% R358300_0402_5%

12

R359300_0402_5% R359300_0402_5%

+3VALW

+5VALW

12

R360300_0402_5% R360300_0402_5%

12

R361300_0402_5% R361300_0402_5%

+5VS

H6 HOLEAH6HOLEA

1

H7 HOLEAH7HOLEA

1

H24

H24 HOLEA

HOLEA

1

H22

H22 HOLEA

HOLEA

1

D:H_3P8 X2

H13

H13 HOLEA

HOLEA

FD2FD2

1

H11

H11 HOLEA

HOLEA

1

H5 HOLEAH5HOLEA

1

H4 HOLEAH4HOLEA

1

FD3FD3

1

H15

H15 HOLEA

HOLEA

1

I:H_3P0 X1

J:H_2P8 X1

H2 HOLEAH2HOLEA

1

H3 HOLEAH3HOLEA

1

H23

H23 HOLEA

HOLEA

1

H12

H12 HOLEA

HOLEA

1

H16

H20

HOLEA

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

G:H_3P2 X2

H17

H17 HOLEA

HOLEA

1

H_4P5X3P0N H_6P0N

H19

H19 HOLEA

HOLEA

1

H_3P0X4P0N

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

H8 HOLEAH8HOLEA

1

H21

H21 HOLEA

HOLEA

1

LED/EC SPI ROM

LA-5751

36 51Friday, October 30, 2009

0.3

A

+5VALW

3

USB20_N1

USB20_P1

2

1

+USB_VCCA

OUT OUT OUT OC#

+USB_VCCB

OUT OUT OUT OC#

D10

@

8 7 6 5

RIGHT USB PORT X1

1

2

E-SATA COMBO LEFT USB PORT

1

2

U19

1

C421 0.1U_0402_16V4ZC421 0.1U_0402_16V4Z

1 1

2 2

C621 0.1U_0402_16V4ZC621 0.1U_0402_16V4Z

3 3

4 4

12

USB_ON#<34>

U19/U27 USB power switch need update symbol to SA000039E00(Low enable)

12

USB_ON#<34>

USB_ON#

+5VALW

USB_ON#

GND

2

IN

3

IN

4

EN

APL3510BKI_SO8

U27

1

GND

2

IN

3

IN

4

EN

APL3510BKI _SO8

PJDLC05_SOT23-3

C429

C610

1000P_0402_50V7K@

B

USB_OC#1 <16>

USB_OC#0 <16>

C

D

E

Right USB Conn.

+USB_VCCA

C430

150U_B2_6.3VM_R35M

1

+

2

+USB_VCCA

W=80mils

1

C432

C432 470P_0402_50V7K

470P_0402_50V7K

2

JUSB1

1

USB20_N3<16>

USB20_P3<16>

USB20_N3 USB20_P3

1

2

3

4

5

G5

6

G6

ACES_85205-04001

ME@

Left USB Conn.

+USB_VCCB

1

C237

C237 470P_0402_50V7K

470P_0402_50V7K

2

ESATA and USB Conn.

+USB_VCCB

1

+

C615

150U_B2_6.3VM_R35M

SATA_DTX_C_IRX_N4<13> SATA_DTX_C_IRX_P4<13>

BT_OFF#<34>

BT_LED#<36>

2

SATA_DTX_C_IRX_P4

+5VALW

12

BT@

R304

R304 100K_0402_5%

100K_0402_5%

1

2

OUT

IN

GND

3

1

OUT

GND

3

SATA_ITX_DRX_P4_CONN<13> SATA_ITX_DRX_N4_CONN<13>

W=80mils

USB20_N0<16>

USB20_P0<16>

W=80mils

1

C622

C622 470P_0402_50V7K

470P_0402_50V7K

2

ESATA@

0.01U_0402_16V7K

ESATA@

BT MODULE CONN

R616

1 2

100K_0402_5%

BT@

Q31

Q31 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

BT@

Q29

Q29 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

2

IN

+3VS

USB20_N0 USB20_P0

USB20_N1<16> USB20_P1<16>

SATA_ITX_DRX_P4_CONN SATA_ITX_DRX_N4_CONN

SATA_DTX_IRX_N4SATA_DTX_C_IRX_N4

C6240.01U_0402_16V7K

12

SATA_DTX_IRX_P4

C623

12

BT@

C353

0.1U_0402_16V4Z

1 2

Q32

S

G

2

AO3413_SOT23-3

USB20_P11<16> USB20_N11<16>

BT_ACTIVE<28>

D

13

BT@

PJDLC05_SOT23-3

USB20_N1 USB20_P1

+3VS_BT

USB20_P11 USB20_N11 BTON_LED BT_ACTIVE

2

3

1

30mils

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C354

C354

BT@

2

JUSB2

1

2

3

4

5

GND

6

D7

@

GND

7

GND

8

GND

SUYIN_020173MR004S558ZL

ME@

JESAT1

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

7

A-

8

GND

9

B-

10

B+

11

GND

12

GND

13

GND

14

GND

15

GND

TYCO_1759576-1

ME@

JP7

1

2

3

4

5

G1

6

G2

ACES_87213-0600G

ME@

USB A+ = RXP

A- = RXN

B- = TXN B+ = TXP

7 8

Security Classification

2006/08/18 2007/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

USB ports/BT/E-SATA

LA-5751

37 51Thursday, October 29, 2009

E

0.3

ON/OFF switch

Power Button

TOP Side

Bottom Side

ON/OFFBTN#

EC_ON<34>

EC_ON

SW1

1

2

@SW1

@

5

6

J5

1 2

SHORT PADS

R302

R302 10K_0402_5%

10K_0402_5%

1 2

3

4

SMT1-05_4P

D14

1

DAN202UT106_SC70-3

3

2

2N7002_SOT23-3

Q28

2

G

+3VALW

1 2

13

R272

R272 100K_0402_5%

100K_0402_5%

D

S

ON/OFF#

51_ON#

ON/OFF# <34>

51_ON# <40>

Power Bottom Board Conn. 4pin

JP3

NOVO_BTN# ON/OFFBTN#

PM_BTN#<34>

PM_BTN#

+3VS

PM_BTN#

1 2 3 4

E&T_6905-E04N-00R

12

R603

R603 100K_0402_1%

100K_0402_1%

JP3

1 2 3 4

ME@

Cap Sensor Board Conn. 6pin

ENE SB3534

JP1

1

R3 0_0402_5%R3 0_0402_5%

I2C_INT<34> ESB_DAT<34> ESB_CLK<34>

RST#<34>

+3VS

+5VS

1 2

R2 0_0402_5%R2 0_0402_5%

1 2

R1 0_0402_5%R1 0_0402_5%

1 2

@

C1

33P_0402_50V8J

I2C_INT_R

2

@

C2

33P_0402_50V8J

1

33P_0402_50V8J

1

2

3

4

5

6

7

8

9

GND

10

GND

ACES_85201-08051

ME@

+3VALW

NOVO#<34>

51_ON#<40>

NOVO#

51_ON#

Card Reader/Audio Jack SB CONN

PLUG_IN

HP_OUTR

HP_OUTL

MIC_JD EXT_MIC_L EXT_MIC_R

USB20_P5 USB20_N5

+3VALW

PLUG_IN<33>

HP_OUTR<33> HP_OUTL<33>

MIC_JD<33>

EXT_MIC_L<33> EXT_MIC_R<33>

USB20_P5<16>

USB20_N5<16>

R296

R296 100K_0402_5%

100K_0402_5%

1 2

D13

2

1

3

DAN202UT106_SC70-3

JP8

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1205N

ME@

NOVO_BTN#

13 14

NOVO_BTN# ON/OFFBTN#

2

3

D19

D19 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

@

1

PM_BTN#

EMI REQUEST 1ST = SCA00000E00

2ST = SCA00000R00

2

3

D20

D20 PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

@

1

Security Classification

2008/03/25 2008/04/

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/03/25 2008/04/

Compal Secret Data

Deciphered Date

Compal Electronics,Ltd.

Title

Audio Jack & SW connector

Size Document Number Rev

Custom

Date: Sheet of

LA-5751

38 51Friday, October 30, 2009

0.3

A

B

C

D

E

+3VALW TO +3VS+5VALW TO +5VS

+5VALW

U10

8

D

1

C279

C279 10U_0805_10V4Z

2

G

12

13

D

S

10U_0805_10V4Z

2

B+

R229

R229 20K_0402_5%

20K_0402_5%

13

D

Q20

Q20 2N7002_SOT23

2N7002_SOT23

S

R142

R142 470_0603_5%

470_0603_5%

@

2

G

Q10

Q10 2N7002_SOT23

2N7002_SOT23

@

1 1

2 2

7

D

6

D

5

D

SI4800BDY-T1-E3_SO8

5VS_GATE_R5VS_GATE

R228

12

10K_0402_5%

+1.5V +VCCP+1.8VS +0.75VS

S

G

12

13

D

S

+5VS

1 2 3 4

1

C278

0.1U_0603_25V7K

2

R342

R342 470_0603_5%

470_0603_5%

@

SYSON# SUSP SUSPSUSP

2

G

Q35

Q35 2N7002_SOT23

2N7002_SOT23

@

1

C277

C277 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C276

C276 1U_0603_10V4Z

1U_0603_10V4Z

2

12

R174

R174 470_0603_5%

470_0603_5%

@

13

D

Q15

S

2N7002_SOT23

@

12

R202

R202 470_0603_5%

470_0603_5%

@

13

D

SUSP

2

G

Q16

S

2N7002_SOT23

@

SUSP

12

R568

R568 22_0603_5%

22_0603_5%

13

D

2

G

S

2

G

Q40

Q40 2N7002_SOT23

2N7002_SOT23

B+

2

G

1

C127

C127 10U_0805_10V4Z

10U_0805_10V4Z

2

12

R89

R89 47K_0402_5%

47K_0402_5%

13

D

Q9

Q9 2N7002_SOT23

2N7002_SOT23

S

+1.05VS

12

R143

R143 470_0603_5%

470_0603_5%

@

13

D

G

Q11

S

2N7002_SOT23

@

+3VALW

U4

8

D

7

D

6

D

5

D

SI4800BDY-T1-E3_SO8

R88

R88 0_0402_5%

0_0402_5%

@

1 2

SUSP

2

S S S

G

+3VS

1 2

1 3 4

2

1

C144

0.1U_0603_25V7K

2

C134

C134 10U_0805_10V4Z

10U_0805_10V4Z

1

C135

C135 1U_0603_10V4Z

1U_0603_10V4Z

2

12

R87

R87 470_0603_5%

470_0603_5%

@

13

D

S

SUSP

2

G

Q6

Q6 2N7002_SOT23

2N7002_SOT23

@

+1.5V to +1.5VS

B+

12

100K_0402_5%

100K_0402_5% R312

R312

Q33

13

D

2

G

2N7002_SOT23

D

S

SUSPSUSP

1

C389

C389 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2

+1.5V

8 7 6 5

R313

R313 0_0402_5%

0_0402_5%

@

0.1U_0603_25V7K

+1.5VS

U16

1

S

D

2

S

D

3

S

D

4

G

D

SI4800BDY-T1-E3_SO8

1.5VS_GATE

1

C373

C361

DIS@

0.1U_0603_25V7K

2

0.1U_0603_25V7K

2

1

C362

C362 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C363

C363 1U_0603_10V4Z

1U_0603_10V4Z

2

12

R314

R314 470_0603_5%

470_0603_5%

@

13

D

Q34

S

2N7002_SOT23

@

SUSP

2

G

For Intel S3 Power Reduction.

3 3

DTC124EKAT146_SC59-3

A

SUSP

SUSP<8,44,45>

SUSP#<16,28,34,42,44,46> SYSON<28,34,44>

4 4

12

R4

R4 100K_0402_5%

100K_0402_5%

2

+5VALWRTCVREF

12

@

R5

R5 100K_0402_5%

100K_0402_5%

Q1

1

OUT

IN

GND

3

SYSON#

DTC124EKAT146_SC59-3

SYSON

B

@

R6

100K_0402_5%

Q2

@

2

IN

+5VALW

12

1

3

OUT

GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

LA-5751

39 51Thursday, October 29, 2009

E

0.3

A

DC030006J00

PL2

PF1

7A_24VDC_429007.WRML

APDIN APDIN1

4

3

4602-Q04C-09R 4P P2.5@

4602-Q04C-09R 4P P2.5@ JDCIN

JDCIN

2

1

1 1

21

12

PC8

PC9

0.1U_0603_25V7K

SMB3025500YA_2P

12

1000P_0402_50V7K

PL2

1 2

PC10

100P_0402_50V8J

Vin Detector Min. typ. Max.

B

ACIN

VIN

Precharge detector

Min. typ. Max. L-->H 14.991V 15.381V 15.782V H-->L 13.860V 14.247V 14.621V

12

PC7

PC6

PC5

100P_0402_50V8J

0.1U_0603_25V7K

0.1U_0603_25V7K 1000P_0402_50V7K

1000P_0402_50V7K

VIN

12

PD13

PD13 RLS4148_LL34-2

RLS4148_LL34-2

C

D

BATT ONLY

Precharge detector

Min. typ. Max. L-->H 7.196V 7.349V 7.505V H-->L 6.138V 6.214V 6.056V

PR142

PR142 1K_1206_5%

1K_1206_5%

1 2

PR38

PR38 1K_1206_5%

1K_1206_5%

1 2

PR31

PR31 1K_1206_5%

1K_1206_5%

1 2

12

PR143

100K_0402_1%

PQ26

TP0610K-T1-E3_SOT23-3

12

PR138

100K_0402_1%

13

2

L-->H 17.430V 17.901V 18.384V H-->L 16.976V 17.262V 17.728V

2

12

5

+

6

-

12

+RTCBATT

+CHGRTC

13

12

PC99

0.01U_0402_25V7K

12

PC11

1000P_0402_50V7K

PQ11

DTC115EUA_SC70-3

PR26

PR26 1M_0402_1%

1M_0402_1%

1 2

VINDE-2

PD12

PR16

3

2

PR20

PR20 10K_0402_5%

10K_0402_5%

12

PR15

VS

8

P

+

-

G

4

12

1

O

PU10A

PU10A LM393DG_SO8

LM393DG_SO8

12

RTCVREF

TP0610K-T1-E3_SOT23-3

51ON-2

PC4

1 2

0.22U_0603_25V7K

PC97

51ON-3

0.01U_0402_25V7K

2 2

PC14

3 3

VIN

12

PR134

84.5K_0402_1%

PR27

PR27 22K_0402_1%

12

PR135

BATT+

51_ON#<38>

22K_0402_1%

1 2

20K_0402_1%

CHGRTCP

VINDE-3

12

PC13

0.1U_0402_16V7K

LL4148_LL34-2

PR122

200_0603_5%

1 2

100K_0402_1%

22K_0402_1%

1 2

VINDE-1

12

1000P_0603_50V7K

RTCVREF

4 4

+CHGRTC

PR125

560_0603_5%

1 2

PR124

560_0603_5%

1 2

A

3.3V

12

PC91

PC91 10U_0603_6.3V6M

10U_0603_6.3V6M

PU8

G920AT24U_SOT89-3

3

OUT

GND

1

2

IN

PD9

LLZ4V3B_LL34-2

3.3V

PQ4

12

PR123

PR123 200_0603_5%

200_0603_5%

CHGRTCINRTCVREF-1

12

PC90

PC90 1U_0805_25V6K

1U_0805_25V6K

VIN

12

2 1

2

PR21

10K_0805_5%

PR141

68_1206_5%

13

PR18

PR18 10K_0402_1%

10K_0402_1%

1 2

PACIN

12

PR19

10K_0402_5%

VIN

PD2

LL4148_LL34-2

1 2

51ON-1

12

PC16

0.1U_0603_25V7K

B

12

PR140

PR140 68_1206_5%

68_1206_5%

ACOFF<34,42>

ACIN <34>

PR25

PU10B

7

O

PR25

2.2M_0402_5%

VS

8

P

G

4

PR17

PR17 10K_0402_5%

10K_0402_5%

PACIN <42>

VL

12

PR137

PD10

RB715F_SOT323-3

MAINPWON<41,43>

ACON<42>

2

3

100K_0402_1%

1

LM393DG_SO8

12

PC98

0.1U_0603_25V7K

RTCVREF

VS

JRTC

- +

MAXEL_ML1220T10@

12

PD8

1 2

RB751V-40_SOD323-2

RTC Battery

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2010/01/06

Compal Secret Data

Deciphered Date

C

12

PR39

100K_0402_1%

13

2

12

PR23

PRG++

PQ3

PQ3 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

13

D

S

Title

Size Document Number Rev

Date: Sheet of

205K_0402_1%

2

G

Custom

PQ12

DTC115EUA_SC70-3

PR136

PR136 47K_0402_5%

47K_0402_5%

13

PQ25

PQ25 DTC115EUA_SC70-3

DTC115EUA_SC70-3

Compal Electronics, Inc.

DCIN & DETECTOR

B+

12

PR22

499K_0402_1%

12

PC12

PR24

499K_0402_1%

0.01U_0402_25V7K

12

2

PACIN <42>

+5VALW

40 51Friday, October 30, 2009

D

40 51Friday, October 30, 2009

0.1

A

1 1

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

JBATT

VMB2

JBATT

1

2

EC_SMCA

3

2 2

3 3

3

4

5

6

7

8

GND

9

GND

TYCO_1775789-1

@

EC_SMDA

12

PR4

PR3

100_0402_1%

PF2

PF2 12A_65V_451012MRL

12A_65V_451012MRL

1 2

PR6

6.49K_0402_1%

1 2

PR5

PR5 10K_0402_5%

10K_0402_5%

21

VMB

12

PC110

PC110 1000P_0402_50V7K

1000P_0402_50V7K

EC_SMB_CK1 <34>

EC_SMB_DA1 <34>

+3VALW

BATT_TEMP <34>

PL3

SMB3025500YA_2P

1 2

A/D

BATT+

12

PC109

0.01U_0402_25V7K

100K_0402_1%_TSM0B104F4251RZ

Recovery at 56 degree C

VL

12

PH1

PR87

13.7K_0402_1%

TM-1

1 2

12

PR88

PC63

PR88

15.4K_0402_1%

0.22U_0603_25V7K

TM_REF1

12

PC64

1000P_0402_50V7K

12

PC62

0.01U_0402_25V7K

3

+

2

-

PR85

12

100K_0402_1%

PR86

PR86 100K_0402_1%

100K_0402_1%

VS

8

P

G

4

TM-2

1

O

PU4A

LM393DG_SO8

12

VL

PR83

47K_0402_1%

1 2

VL

PR84

PR84 47K_0402_1%

47K_0402_1%

1 2

TM-3

5

+

6

-

2

8

P

O

G

LM393DG_SO8

4

G

PU4B

13

7

MAINPWON <40,43>

D

PQ20

PQ20 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2010/01/062009/01/06

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

41 51Thursday, October 29, 2009

D

41 51Thursday, October 29, 2009

0.1

5

PQ27

FDS6675BZ_SO8

DTA144EUA_SC70-3

13

2

PQ8

PACIN

PQ10

DTC115EUA_SC70-3

ACOFF

8 7

5

PQ7

2

1 3

PQ28

DTC115EUA_SC70-3

PR37

3K_0402_1%

1 2

2

4

VIN

D D

C C

12

PR145

47K_0402_5%

2

G

PACIN<40>

ACON<40>

ACOFF<34,40>

13

D

2N7002KW_SOT323-3

S

P2

1 2 36

12

PR30

PC107

200K_0402_1%

0.1U_0603_25V7K

12

PR29

150K_0402_1%

PQ9

13

D

2N7002KW_SOT323-3

2

G

S

13

IREF<34>

CHGVADJ=(Vcell-4)/0.10627

Vcell

4V

B B

4.2V

4.35V

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

A A

CHGVADJ

1.882V

3.2935V

P3

0V

UMA CP mode Vaclim=2.39*{(2.26K//514K)/((2.26K//514K)+(21K//514K))}=0.239V Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) where Vaclim=0.239V, Iinput=2.75A

DIS CP mode Vaclim=2.39*{(31.6K//514K)/((31.6K//514K)+(21K//514K))}=1.425V Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) where Vaclim=1.425V, Iinput=4A

PR14

12

PR14

10_0603_5%

1 2

13

12

PR13

100K_0402_1%

5

PQ2 TP0610K-T1-E3_SOT23-3PQ2 TP0610K-T1-E3_SOT23-3

13

PR12

2

100K_0402_1%

PQ38

DTC115EUA_SC70-3

PQ6

FDS6675BZ_SO8

1 2 3 6

4

FSTCHG<34>

0.01U_0402_25V7K

ADP_I<34>

PR173

154K_0402_1%

PR167

100K_0402_1%

Connect to EC A/D Pin.

6251_DCIN

1

2

PD1

RB715F_SOT323-3

8 7

5

PC3

1 2

12

CHGVADJ<34>

4

P3

PC131 6800P_0402_25V7KPC131 6800P_0402_25V7K

PR175 6.81K_0402_1%PR175 6.81K_0402_1%

1 2

PC130

PC130 100P_0402_50V8J@

100P_0402_50V8J@

12

PC2

0.01U_0402_25V7K

PU1B

PU1B LM358DT_SO8@

LM358DT_SO8@

FSTCHG

2

SUSP#

3

4

0.02_1206_1%

1

2

PD15

RB751V-40TE17_SOD323-2

1 2

PR7

10K_0402_1%

12

1 2

PC132

0.1U_0402_16V7K

1 2

6251_VREF

1 2

PC1

0.1U_0402_16V7K

0.1U_0402_16V7K PR172

PR172 21K_0402_1%

21K_0402_1%

1 2

PR2

31.6K_0402_1%

PR171

15.4K_0402_1%

1 2

PR174

PR174 100_0402_1%

100_0402_1%

31.6K_0402_1%

VS

8

7

0

4

FSTCHG <34>

SUSP# <16,28,34,39,44,46>

3

B+

PR152

4

3

6251_VDD

12

PC128

12

PR8

6251_EN CSON

100K_0402_1%

CELLS

1 2

6251_VREF

12

PR1

2.2U_0603_6.3V6K

12

PU11

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

12

PC15

470P_0603_50V8J

24

23

22

21

20

19

18

17

16

15

14

13

LI-3S :13.5V----BATT-OVP=1.5012V

BATT-OVP=0.1112*VMB

Per cell=3.5V

5

P

+

6

-

G

BATT_OVP<34>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

6251_DCIN

12

PC124

0.047U_0402_16V7K

PC123

0.1U_0402_16V7K

1 2

LX_CHG

DH_CHG

2.2_0402_5%

BST_CHG

6251_VDDP

DL_CHG

PJ11

2

112

JUMP_43X118@

PC125

0.1U_0603_25V7K

12

20_0402_5%

1 2

PR160

20_0402_5%

12

1 2

PR157

1 2

12

PC122

4.7U_0805_6.3V6K

PR139

PR139 10K_0402_1%@

10K_0402_1%@

1 2

CSIN CSIP

PR161

1 2

PR159

PR159 20_0402_5%

20_0402_5%

PR158

2.2_0402_5%

0.1U_0603_25V7K

BST_CHGA

12

PD14

PD14 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PR163

4.7_0402_5%

PU1A

PU1A LM358DT_SO8@

LM358DT_SO8@

Compal Secret Data

CSOP

PC120

12

6251_VDD

1

Deciphered Date

2

CHG_B+

PC111

1 2

PC112

4.7U_1206_25V6K

1 2

PC114

PC113

4.7U_1206_25V6K

4.7U_1206_25V6K 2200P_0402_50V7K

2200P_0402_50V7K

PR155

10K_0402_1%

1 2 13

PQ32

DTC115EUA_SC70-3

PQ29

PL5

3 5

241

SIS412DN-T1-GE3 _PAK1212-8

PQ31

3 5

241

SI7716ADN-T1-GE3 _PAK1212-8

PL5

10U_LF919AS-100M-P3_4.5A_20%

1 2

12

PR154

4.7_1206_5%

12

PC118

680P_0603_50V7K

PQ34

FDS6675BZ_SO8

1 2 3 6

4

PR28

47K_0402_1%

1 2

1

PD3

PD3 RB715F_SOT323-3

RB715F_SOT323-3

2

0.02_1206_1%

CHGCHG

1

2

6251_VDD 6251_VDD

8 7

5

3

2

PC121

PR151

0.1U_0603_25V7K

VIN

12

ACOFF

200K_0402_1%

D

S

4

3

1 2

1

PR162

13

PACIN

2

G

PQ5

2N7002KW_SOT323-3

12

PC103

PC106

10U_1206_25V6M

VIN

BATT+

12

PC105

10U_1206_25V6M

VMB2

PR178

PR168

12

PR9

VS

12

8

3

P

+

0

2

-

G

4

PR9 340K_0402_1%@

340K_0402_1%@

12

PC100

PR10

PR10 499K_0402_1%@

499K_0402_1%@

0.01U_0402_25V7K@

12

PR11

PR11 105K_0402_1%@

105K_0402_1%@

2008/6/222007/6/22

2

CELLS

12

PR176

PR176 0_0402_5%

0_0402_5%

2N7002KDW-2N_SOT363-6@

12

PC101

0.01U_0402_25V7K@

Title

Size Document Number Rev

Date: Sheet of

PR168 100K_0402_1%@

100K_0402_1%@

1 2

61

PQ1A

Compal Electronics, Inc.

CHARGER

PR178 100K_0402_1%@

100K_0402_1%@

1 2

34

2

5

PQ1B

2N7002KDW-2N_SOT363-6@

1

12

PR177

PR177 0_0402_5%@

0_0402_5%@

BATT_SEL_EC<34>

0.1

42 51Thursday, October 29, 2009

0.1

5

4

3

2

1

ISL6237_B+

12

PC36

PC25

10U_1206_25V6M

2200P_0402_50V7K

PL6

4.7UH_PCMC063T-4R7MN_5.5A_20%

12

PR156

4.7_1206_5%

5V_SNB

12

680P_0402_50V7K

PC119

12

PJ10

2

112

JUMP_43X118@

PJ12

2

112

JUMP_43X118@

12

PC37

0.1U_0402_25V6

+5VALWP

1

+

PC117

PC117 150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

PR36

61.9K_0402_1%@

1 2

PR35

1 2

0_0402_5%

2

12

0_0402_5%

100K_0402_1%

1 2

PR32

ISL6237_B+

PQ14

PQ14 SIS412DN-T1-GE3_PAK1212-8

SIS412DN-T1-GE3_PAK1212-8

3 5

241

3 5

241

PQ30

PQ30 SI7716ADN-T1-GE3_PAK1212-8

SI7716ADN-T1-GE3_PAK1212-8

PR44

PR144

1 2

200K_0402_1%

12

BST3A-1

PC43

0.1U_0603_25V7K

1 2

PC42

0.22U_0603_25V7K

1 2

VL

PR146

1 2

806K_0603_1%

12

PR41

0_0402_5%

1 2

PR42

2.2_0603_5%

2VREF_ISL6237

PR33

47K_0402_1%@

1 2

PC104

0.047U_0402_16V7K

0.1U_0603_25V7K

UG3

BST3A

12

SW3

LG3

FB3

VL

1 2

PC102

0.22U_0603_25V7K

EN_LDO

3/5V_EN1

3/5V_EN2

12

PC108

0.047U_0402_16V7K

@

PC27

PR50

PR50 0_0402_5%

0_0402_5%

1 2

2VREF_ISL6237

33

26

24

25

23

30

32

1

8

20

4

14

27

1 2

TP

UGATE2

BOOT2

PHASE2

LGATE2

OUT2

REFIN2

REF

LDOREFIN

NC

EN_LDO

EN1

EN2

PC28

1U_0603_10V6K

VL

1 2

PC41

3/5V_VIN

3/5V_VCC

3

6

VIN

VCC

TON

NC

2

5

3/5V_NC

12

3/5V_TON

12

PR43

PR43 0_0402_5%

0_0402_5%

12

1U_0603_10V6K

PC23

7

19

PVCC

LDO

15

UGATE1

17

BOOT1

16

PHASE1

18

LGATE1

22

PGND

10

OUT1

11

FB1

9

BYP

29

SKIP

28

POK2

13

POK1

12

ILIM1

31

ILIM2

GND

PU2

21

ISL6237IRZ-T_QFN32_5X5

4.7U_0805_6.3V6K

PC40

1U_0603_10V6K

1 2

HG5

BST5A

PR40

2.2_0603_5%

SW5

LG5

FB5

5V_SKIP

ILM1

ILIM2

BST5A-1

12

PC22

0.1U_0603_25V7K

PR150

PR150 0_0402_5%@

0_0402_5%@

1 2

PR149

PR149 0_0402_5%

0_0402_5%

PR51

PR51 0_0402_5%@

0_0402_5%@

PR34

PR34 301K_0402_1%

301K_0402_1%

PR147

PR147 301K_0402_1%

301K_0402_1%

1 2

12

PQ33

PQ33 SI7716ADN-T1-GE3_PAK1212-8

SI7716ADN-T1-GE3_PAK1212-8

2VREF_ISL6237

12

PQ13

PQ13 SIS412DN-T1-GE3_PAK1212-8

SIS412DN-T1-GE3_PAK1212-8

3 5

241

3 5

241

VL

+3VALWP +3VALW

+5VALWP +5VALW

2VREF_ISL6237

B+

PJ4

PJ4 JUMP_43X118@

JUMP_43X118@

2

112

D D

+3VALWP

PC116

150U_B2_6.3VM_R45M

C C

B B

PC116

12

PC21

330P_0402_50V7K

4.7UH_PCMC063T-4R7MN_5.5A_20%

1

+

1 2

2

1 2

VS

PR52

0_0402_5%

PR148

10K_0402_1%

@

12

PC38

0.1U_0402_25V6

PL4

1 2

680P_0402_50V7K

PD5

21

LLZ5V1B_LL34-2

12

PC39

PC26

10U_1206_25V6M

2200P_0402_50V7K

12

PR153

4.7_1206_5%

3V_SNB

12

PC115

PD11

1 2

RB751V-40_SOD323-2

EN_LDO-1

PD4

1 2

RB751V-40_SOD323-2

MAINPWON <40,41>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/01/06 2010/01/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

3VALW/5VALW

Size Document Number Rev

Thursday, October 29, 2009

Date: Sheet of

2

Date: Sheet of

43 51

1

0.1Custom

5

D D

SYSON<28,34,39>

+5VALW

C C

SUSP#<16,28,34,39,42,46>

+5VALW

B B

+1.5V

1

PJ17

1

JUMP_43X79@

2

12

PC146

4.7U_0805_6.3V6K

PR250

@ PR250

A A

S3_0.75V_EN<5>

@

0_0402_5%

1 2

PR190

PR190 0_0402_5%

0_0402_5%

0.75V_EN

SUSP<8,39,45>

1 2

0.1U_0402_16V7K@

5

PC147

12

13

D

2

G

S

1K_0402_1%

PQ46

PQ46 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR239

PR240

PR248

0_0402_5%

1 2

PR242

100_0603_1%

1 2

PC178

4.7U_0603_6.3V6K

PR132

100K_0402_1%

1 2

PR127

100_0603_1%

1 2

@

PC93

4.7U_0603_6.3V6K

@

0.75V_IN

12

0.75V_REF

12

PC176

0.1U_0402_16V7K

12

@PR132

@

12

4

PC184

0.1U_0402_16V7K

@

PC181

47P_0402_50V8J@

1 2

PR244

31.6K_0402_1%

1 2

12

PR246

30.1K_0402_1%

PC96

0.22U_0402_6.3V6K

@

PC94

47P_0402_50V8J@

1 2

PR129

13.7K_0402_1%

1 2

@

12

PR130

31.6K_0402_1%

@

PU13

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC149

PC149 10U_0603_6.3V6M

10U_0603_6.3V6M

4

+0.75VSP

1 2

PR243

PR243 100K_0402_1%@

100K_0402_1%@

+3VS

PR126

PR126 100K_0402_1%

100K_0402_1%

1 2

@

6

5

NC

7

NC

8

NC

9

TP

1.5V_TON

1.5V_EN

1.5V_V5FILT

1.5V_FB

12

@

VCCP_TON

VCCP_EN

VCCP_V5FILT

VCCP_FB

3

578

PR247

240K_0402_1%

1 2

BST_1.5V BST_1.5V-1

1 2

PR249

2.2_0603_5%

1

2

TON

EN_PSV

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

PC179

0.1U_0402_16V7K

2

3

4

5

6

1.05V_PGOOD <46>

12

GND7PGND

1.5V_PGOOD

@ PR133

@

240K_0402_1%

1 2

1

TON

EN_PSV

VOUT

V5FILT

VFB

PGOOD

GND7PGND

+3VALW

PC151

PC151 1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2.2_0603_5%

14TP15

DRVH

TRIP

DRVL

DRVH

TRIP

DRVL

LL

3

13

12

11

10

9

PR131

2.2_0603_5%

1 2

13

12

11

10

9

@PU9

@

UG_1.5V

1.5V_TRIP

SW_1.5V

LG_1.5V

UG_VCCP

SW_VCCP

VCCP_TRIP

PR128

23.7K_0402_1%

LG_VCCP

VBST

V5DRV

8

PU14

PU14 TPS51117RGYR_QFN14_3.5x3.5

TPS51117RGYR_QFN14_3.5x3.5

PR133

BST_VCCP BST_VCCP-1

14TP15

VBST

V5DRV

8

PU9 TPS51117RGYR_QFN14_3.5x3.5

TPS51117RGYR_QFN14_3.5x3.5

1 2

PR245

7.15K_0402_1%

@PR131

@

1 2

PC182

0.1U_0603_25V7K

+5VALW

12

PC183

4.7U_0805_6.3V6K

SIS412DN-T1-GE3_PAK1212-8

PC95

@

1 2

0.1U_0603_25V7K

+5VALW

@PR128

@

12

PC92

4.7U_0805_6.3V6K

@

Compal Secret Data

3 6

241

PQ49

4

123 5

VCCP_IN

PQ41

@

3 5

241

3 5

241

+1.05VSP +1.05VS

Deciphered Date

2

1.5V_IN

12

PC175

PC169

10U_1206_25V6M

PQ48

PQ48 SI4686DY-T1-E3_SO8

SI4686DY-T1-E3_SO8

TPCA8028-H_SOP-ADVANCE8-5

PQ40

PQ40 SI7716ADN-T1-GE3_PAK1212-8

SI7716ADN-T1-GE3_PAK1212-8

@

PL13

1UH_PCMB103E-1R0MS_20A_20%

1 2

12

PR241

4.7_1206_5%

1.5V_SNB

12

PC180

680P_0402_50V7K

12

PC140

PC138

10U_1206_25V6M

0.1U_0402_25V6

@

PL9

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR181

@PR181

@

4.7_1206_5%

VCCP_SNB

12

PC135

@PC135

@

680P_0402_50V7K

PJ14

2

112

JUMP_43X118@

2010/01/062009/01/06

2

1

PJ20

2

112

JUMP_43X79@

12

PC174

PC173

0.1U_0402_25V6

2200P_0402_50V7K

+1.5VP

1

+

PC172

2

PJ16

2

112

JUMP_43X79@

12

PC141

2200P_0402_50V7K

@

@PL9

@

1

+

2

PC136

@

Title

Size Document Number Rev

Date: Sheet of

12

220U_B2_2.5VM_R15M

PC177

10U_0603_6.3V6M

B+

+1.05VSP

12

220U_B2_2.5VM_R15M

PC137

10U_0603_6.3V6M

@

PJ21

+1.5VP +1.5V

Compal Electronics, Inc.

2

112

JUMP_43X118@

PJ19

2

112

JUMP_43X79@

1.5V/VCCP/0.75V

1

B+

+0.75VS+0.75VSP

0.1

44 51Friday, October 30, 2009

0.1

5

PJ3

B+

D D

C C

JUMP_43X79@

PJ3

2

N11M-GE1/LP1

N11M-GE1/LP1 PR620=22.6k

B B

VGA_IN

112

12

PC24

PC35

10U_1206_25V6M

VGA_EN<16>

0 0 1

GPU_VID1<19>

10K_0402_5%

1 2

PR62

2.2K_0402_5%

GPIO6GPIO5

GPU_VID1GPU_VID0 VGA_CORE

0 1 1

PR166

12

10K_0402_1%

PR165

GPU_VID0<19>

10K_0402_5%

12

PC186

PC185

0.1U_0402_25V6

2200P_0402_50V7K

12

PC50

2.2U_0603_6.3V6K

VGA_EN_2 ISEN_VGA

PC51

1U_0402_6.3V6K

0.8V

0.85V

PR72

0.9V

12

GVID1-1

PR169

22.6K_0402_1%

1 2

GVID1-2

61

PQ37A

2

2N7002KDW-2N_SOT363-6

12

PC127

0.01UF_0402_25V7K

PR170

12

10K_0402_1%

VGA_VCC

12

PC134

GVID0-1

12

PC129

0.01UF_0402_25V7K

4

3

VIN

4

VCC

5

EN

VGA_COMP

12

22P_0402_50V8J

+3VS

@

PR47

10K_0402_5%

8

GND

PU3

PU3 ISL6268CAZ-T_SSOP16

ISL6268CAZ-T_SSOP16

COMP6FB7FSET

12

PR68

22.1K_0402_1%

VGA_COMP-1

12

PC54

6800P_0402_25V7K

VFB=0.6V

12

PR67

6.04K_0402_1%

34

PQ37B

5

2N7002KDW-2N_SOT363-6

3

UG_VGA

BST_VGA

PR48

2.2_0603_5%

1 2

1UG16

PHASE

FSET_VGA

12

PC55

@

9

0.01U_0402_25V7K

15

BOOT

PVCC

PGND

ISEN

VO

10

1 2

PR69

42.2K_0402_1%

12

PR180

5.36K_0402_1%

LG

2

PGOOD

VGA_FB

1 2

+5VALW

12

PR49

PR49 0_0603_5%

0_0603_5%

+VGA_PVCC

14

2.2U_0603_6.3V6K

LG_VGA

13

12

11

12

PR179

1.82K_0402_1%

BST_VGA-1

PR46

4.7_0603_5%

1 2

PC52

1 2

PR63

3.6K_0402_1%

VGA_FB-1

1 2

PC49

0.1U_0603_25V7K

VGA_VCC

Rds=4.0mΩ

SW_VGA

4

5

4

5

PQ35

TPCA8030-H_SOP-ADV8-5

123

786

PQ39

123

SI4634DY-T1-E3_SO8

4

2

PL7

0.88UH_PCMB103E-R88MS_20A_20%

786

5

PQ36

123

1 2

12

1

PR164

4.7_1206_5%

VGA_SNB

12

SI4634DY-T1-E3_SO8

PC126

680P_0402_50V7K

1

+

12

2

PC17

PR70

100_0402_5%

330U_D2_2.5VY_R9M

+VGA_COREP +VGA_CORE

+

2

PC133

PR71

PR71 0_0402_5%

0_0402_5%

1 2

12

330U_D2_2.5VY_R9M

PJ2

2

JUMP_43X118@

PJ13

2

JUMP_43X118@

PC19

PJ606

112

JUMP_43X39@

10U_0603_6.3V6M

112

1

12

PC18

10U_0603_6.3V6M

+VGASENSE <21>

2

+VGA_COREP

PC20

10U_0603_6.3V6M

+1.8VS+1.8VSP

+3VS

1

PJ8

PJ8 JUMP_43X39@

JUMP_43X39@

4.7U_0805_6.3V6K

A A

PR103

100K_0402_1%

LDO_1.8V_EN

SUSP<8,39,44>

1 2

PC76

0.1U_0402_16V7K

5

12

PC75

2

G

1

2

12

PR104

1K_0402_1%

13

D

PR105

1.24K_0402_1%

S

PQ22

PQ22 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

LDO_1.8V_IN

12

LDO_1.8V_REF

12

PC77

0.1U_0402_16V7K

PU6

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

+1.8VSP

12

PC78

PC78 10U_0603_6.3V6M

10U_0603_6.3V6M

4

6

5

NC

7

NC

8

NC

9

TP

12

PC79

PC79 1U_0402_6.3V6K

1U_0402_6.3V6K

+5VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2010/01/062009/01/06

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

VGA_CORE/1.8VS/1.1VS

45 51Thursday, October 29, 2009

1

0.1

5

4

3

2

1

D D

C C

B B

PJ9

2

B+

112

JUMP_43X118@

SUSP#<16,28,34,39,42,44>

1.05V_PGOOD<44>

VTT_SELECT<8>

VTT_B+

12

PC83

PC85

PC188

10U_1206_25V6M

0.1U_0402_25V6

PR116

0_0402_5%

1 2

PR117

0_0402_5%@

1 2

H_VTTVID1= Low, 1.1V H_VTTVID1= High, 1.05V

12

PC187

2200P_0402_50V7K

VCCP_POK<5>

1 2

PR121

35.7K_0402_1%

12

0.1U_0402_16V7K@

VTT_VCC

12

PC86

2.2U_0603_6.3V6K

VTT_EN-1

PC87

12

PC88

PR114

0_0402_5%

1 2

3

VIN

4

VCC

5

EN

VTT_COMP

22P_0402_50V8J

PC89

VFB=0.6V

+5VS

8

GND

PU7

PU7 ISL6268CAZ-T_SSOP16

ISL6268CAZ-T_SSOP16

COMP6FB7FSET

12

PR118

22.1K_0402_1%

VTT_COMP-1

12

6800P_0402_25V7K

12

PR115

1K_0402_5%

1.1VS_PGOOD

2

1UG16

PGOOD

VTT_FB

12

PR119

1.96K_0402_1%

SW_VTT

UG_VTT

PHASE

9

VTT_FSET

12

PR113

42.2K_0402_1%

VTT_BOOT

15

BOOT

PVCC

LG

PGND

ISEN

VO

10

12

PC82

0.01U_0402_25V7K

@

1 2

PR120

1.58K_0402_1%

PR112

2.2_0603_5%

1 2

+5VALW

12

VTT_PVCC

14

2.2U_0603_6.3V6K

LG_VTT

13

12

VTT_ISEN

11

VTT_BOOT-1

PR106

PR106 0_0603_5%

0_0603_5%

PR108

4.7_0603_5%

1 2

PC81

1 2

3K_0402_1%

PR109

VTT_FB-1

1 2

PC84

0.1U_0603_25V7K

VTT_VCC

Rds=4.0mΩ

4

5

PQ24

TPCA8030-H_SOP-ADV8-5

123

PQ23

123 5

TPCA8028-H_SOP-ADVANCE8-5

PL8

0.56UH_MMD-10CZ-R56M-M1_19A_20%

1 2

12

PR107

PQ21

4.7_1206_5%

4

VTT_SNB

12

PC80

PC80 1000P_0603_50V7K

1000P_0603_50V7K

123 5

TPCA8028-H_SOP-ADVANCE8-5

PR110

PR110 10_0402_5%

10_0402_5%

1 2

1

+

2

PR111

PR111 0_0402_5%

0_0402_5%

1

+

2

PC74

330U_D2E_2.5VM

@

12

+1.1V_VCCPP

PC139

330U_D2E_2.5VM

VTT_SENSE <8>

PJ15

+1.1V_VCCPP +VCCP

+1.1V_VCCPP +1.05VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2010/01/06

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

2

112

JUMP_43X118@

PJ7

2

112

JUMP_43X118@

PJ1

2

112

JUMP_43X118@

Compal Electronics, Inc.

+1.1VS_VTT

46 51Thursday, October 29, 2009

1

0.1

5

D D

B+

PJ5

2

112

@

JUMP_43X118

PR101

10_0402_5%

C C

B B

VSS_AXG_SENSE<8>

VCC_AXG_SENSE<8>

+GFX_COREP

1 2

@

PR102

10_0402_5%

1 2

@

150P_0402_50V8J

PC73

PR226

PR226 10K_0402_1%

10K_0402_1%

@

GFX_FB-2

12

@

1 2

PC166

PC166 1000P_0402_50V7K

1000P_0402_50V7K

@

1 2

PC167

PC167 330P_0402_50V7K

330P_0402_50V7K

@

12

PR100

17.8K_0402_1%

@

PR99

825K_0402_1%

1 2

100P_0402_50V8J

@

PC170

22P_0402_50V8J

1 2

12

@

12

@

GFX_FB-1

1 2

PC71

@

GFXVR_PWRGD

GFXVR_CLKEN#

4

GFX_B+

12

PC61

10U_1206_25V6M

@

PC72

PC72 330P_0402_50V7K

330P_0402_50V7K

PC171

1000P_0402_50V7K

@

PR98

8.06K_0402_1%

@

3

PR95

12

PC59

10U_1206_25V6M

12

PC161

PC160

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

@

PR230

47K_0402_1%

+GFX_COREP

12

PR97

1.91K_0402_1%

@

12

+5VALW

@

PR238

10K_0402_1%

PR96

1_0603_5%

@

62881_FB

62881_COMP

62881_VW

62881_RBIAS

12

PC165

PC165 1U_0603_10V6K

1U_0603_10V6K

@

7

VSEN

6

FB

5

COMP

4

VW

3

RBIAS

2

PGOOD

1

CLK_EN#

@

29

0_0603_5%

62881_VDD

ISUM+

ISUM-

10

9

8

RTN

ISUM

AGND

ISUM+

PU5

PU5 ISL62881HRZ-T_QFN28_4X4

ISL62881HRZ-T_QFN28_4X4

28

62881_VR_ON

62881_DPRSLPVR

62881_VID6

PR95

1 2 12

@

62881_VIN

11

12

13

VIN

VDD

VID5

25

62881_VID3

62881_VID4

62881_VID5

12

PR91

PC164

0.22U_0603_25V7K

22.6K_0402_1%

@

BST_GFX BST_GFX1

1 2

@

PR92

2.2_0603_5%

@

14

IMON

BOOT

UG_GFX

15

UGATE

LX_GFX

16

PHASE

17

VSSP

LG_GFX

18

LGATE

62881_VCCP

19

VCCP

20

VID0

21

VID1

VID2

VID323VID424VID626VR_ON27DPRSLPVR

22

62881_VID2

62881_VID0

62881_VID1

PC163

12

@

0.22U_0402_6.3V6K

1 2

PR224

PR224 0_0402_5%@

0_0402_5%@

VSS_AXG_SENSE <8>

1 2

PC162

0.22U_0603_16V7K

@

PR225

+5VALW

0_0603_5%

@

PC66

2.2U_0603_6.3V6K

12 12 12

@

12

@

12

@

12

@

12

@

12

@

@ @

@

12

@

GFXVR_IMON <8>

578

3 6

3 5

@

PR2280_0402_5%

PR2280_0402_5% PR2290_0402_5%

PR2290_0402_5% PR2310_0402_5%

PR2310_0402_5% PR2320_0402_5%

PR2320_0402_5% PR2330_0402_5%

PR2330_0402_5% PR2340_0402_5%

PR2340_0402_5% PR2350_0402_5%

PR2350_0402_5% PR2360_0402_5%

PR2360_0402_5%

PR2370_0402_5%

2

PQ47

@

SI4686DY-T1-E3_SO8

241

12

GFX_SN

PQ19

@

241

TPCA8028_PSO8

1 2

@

GFXVR_VID_0 <8> GFXVR_VID_1 <8> GFXVR_VID_2 <8> GFXVR_VID_3 <8> GFXVR_VID_4 <8> GFXVR_VID_5 <8> GFXVR_VID_6 <8> GFXVR_EN <8>

GFXVR_DPRSLPVR <8>

0.56UH_MMD-10CZ-R56M-M1_19A_20%

1 2

12

PR80

2.2_1206_5%

PC60

PC60 680P_0402_50V7K

680P_0402_50V7K

ISUM+

ISUM-

PR82

3.65K_0402_1%

1 2

PR227

@

2.61K_0402_1%

@

PC70

0.068U_0402_10V6K

PR94

82.5_0402_1%

1 2

@

1 2

PC65

0.1U_0402_16V7K

PL12

@

ISUM-2

1 2

@

PR90

PR90 11K_0402_1%

11K_0402_1%

@

1 2

@

1 2

PR93

@

3.01K_0402_1%

ISUM-3

1 2

PC68

0.01U_0402_25V7K

@

PC67

1

+

12

PR81

2

0_0402_5%

330U_D2_2.5VY_R9M

@

PR89

@

100_0402_1%

1 2

ISUM-4

PC69

@

180P_0402_50V8J

1 2

330U_D2_2.5VY_R9M

PH4

@

10KB_0603_5%_ERTJ1VR103J

ISUM-1

1 2

@

1

+GFX_COREP

PC158

1

+

2

330U_D2_2.5VY_R9M

@

PJ18

+GFX_COREP

A A

2

JUMP_43X118@

PJ6

2

JUMP_43X118@

+GFX_CORE

112

(15A,600mils ,Via NO.= 30)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/01/06 2010/01/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

GFX_CORE

1

47 51Friday, October 30, 2009

0.1

8

H H

G G

F F

CPU_CSP2

E E

CPU_CSN2

CPU_CSN1

CPU_CSP1

D D

C C

B B

A A

12

PR223 470_0402_1%PR223 470_0402_1%

PR221 470_0402_1%PR221 470_0402_1%

PR220 470_0402_1%PR220 470_0402_1%

PR219 470_0402_1%PR219 470_0402_1%

100P_0402_50V8J

8

PC156

12

PC153

12

VGATE<15>

CLK_EN#<12>

VR_ON<34>

12

PR66

0_0402_5%

VSSSENSE

7

1 2

PR199 0_0402_5%PR199 0_0402_5%

1 2

PR200 0_0402_5%PR200 0_0402_5%

1 2

PR209 0_0402_5%PR209 0_0402_5%

CPU_MODE

1 2

PR73 0_0402_5%PR73 0_0402_5%

CPU_CSP2-2

1 2

PC157 33P_0402_50V8JPC157 33P_0402_50V8J

CPU_CSN2-1

1 2

PC155 33P_0402_50V8JPC155 33P_0402_50V8J

CPU_CSN1-1

1 2

PC154 33P_0402_50V8JPC154 33P_0402_50V8J

CPU_CSP1-2

1 2

PC152 33P_0402_50V8JPC152 33P_0402_50V8J

CPU_GNDSNS

CPU_VSNS

CPU_THERM

12

CPU_VR_TT#

PR65

0_0402_5%

1 2

PR53 20K_0402_1%PR53 20K_0402_1%

<8>

VCCSENSE

12

PR45

PR212

0_0402_5%@PR212

0_0402_5%

@

12.4K_0402_1%

VSSSENSE

7

1 2

PC57

0.22U_0603_10V7K

1

2

3

4

5

6

7

8

9

10

1 2

PR216 68_0402_5%PR216 68_0402_5%

PR217 0_0402_5%PR217 0_0402_5%

+VCCP

H_PROCHOT#

12

PC44

0.22U_0402_6.3V6K

<8>

+3VS

12

PR76

PR77

1.91K_0402_1%

1 2

PC150

2.2U_0603_6.3V6K

1 2

PC58

68P_0402_50V8J

CPU_VREF

40

41

GND

VREF

MODE

GND

CSP2

CSN2

CSN1

CSP1

GNDSNS

VSNS

THERM

VR_TT#

IMON11DPRSLPVR12PSI#13VID614VID515VID416VID317VID218VID119VID0

CPU_IMON

1 2

<5,34>

PR215 0_0402_5%PR215 0_0402_5%

IMVP_IMON

PR76 1K_0402_5%

1K_0402_5%

1 2

PR75

PR75 1K_0402_5%@

1K_0402_5%@

+5VS

12

PR218

5.11K_0402_1%

5.11K_0402_1% PR74249K_0402_1% PR74249K_0402_1%

PR2100_0402_5% PR2100_0402_5%

1 2

CPU_TONSEL CPU_VREF

CPU_DROOP

CPU_ISLEW

36

37

38

39

ISLEW

V5FILT

DROOP

TONSEL

PU12

TPS51621RHAR_QFN40_6X6

VID5

VID6

CPU_DPRSLPVRPROC_D PRSLPVR

1 2

PR214 0_0402_5%PR214 0_0402_5%

PR207 0_0402_5%PR207 0_0402_5%

PR208 0_0402_5%PR208 0_0402_5%

PR213 0_0402_5%PR213 0_0402_5%

H_VID5

H_VID6

PSI# CPU_PSI#

<8>

PSI#

H_VID5

H_VID6

PROC_DPRSLPVR

6

+5VS

+3VS

@

PR1970_0402_5%@PR1970_0402_5%

1 2

PR790_0402_5% PR790_0402_5%

PR1980_0402_5% PR1980_0402_5%

PR780_0402_5%@ PR780_0402_5%@

1 2

CPU_TRIPSEL

CPU_OSRSEL

CPU_PGOOD

CPU_VR_ON

CPU_CLK_EN#

31

32

33

34

35

VR_ON

PGOOD

OSRSEL

CLK_EN#

VID1

VID2

VID3

VID4

1 2

PR196 0_0402_5%PR196 0_0402_5%

PR205 0_0402_5%PR205 0_0402_5%

PR206 0_0402_5%PR206 0_0402_5%

PR195 0_0402_5%PR195 0_0402_5%

H_VID2

H_VID3

H_VID4

H_VID1

<8>

H_VID1

H_VID2

H_VID3

H_VID4

6

UGATE_CPU2

30

TRIPSEL

DRVH2

BOOT_CPU2 BOOT_CPU2-1

29

VBST2

LL2

DRVL2

V5IN

PGND

DRVL1

LL1

VBST1

DRVH1

20

VID0

1 2

PR194 0_0402_5%PR194 0_0402_5%

H_VID0

<8>

H_VID0

Clarkfield: VID(0-5):001101 Auburndale: VID(0-5):001110

1 2

PR189 2.2_0603_5%PR189 2.2_0603_5%

PHASE_CPU2

28

LGATE_CPU2

27

26

1 2

PC53 10U_0603_6.3V6MPC53 10U_0603_6.3V6M

25

LGATE_CPU1

24

PHASE_CPU1

23

BOOT_CPU1 BOOT_CPU1-1

22

PR187 2.2_0603_5%PR187 2.2_0603_5%

UGATE_CPU1

21

<8>

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

PROC_DPRSLPVR

+5VS

PD7

PD7 1SS355_SOD323-2

1SS355_SOD323-2

1 2

12

1 2

PD6

PD6 1SS355_SOD323-2

1SS355_SOD323-2

PR61 1K_0402_5%@PR61 1K_0402_5%@

12

PR60 1K_0402_5%@PR60 1K_0402_5%@

12

PR59 1K_0402_5%PR59 1K_0402_5%

12

PR58 1K_0402_5%PR58 1K_0402_5%

12

PR57 1K_0402_5%PR57 1K_0402_5%

12

PR56 1K_0402_5%@PR56 1K_0402_5%@

12

PR55 1K_0402_5%@PR55 1K_0402_5%@

12

PR54 10K_0402_5%PR54 10K_0402_5%

12

5

1 2

PC145

0.22U_0603_10V7K

+5VS

1 2

PC144

0.22U_0603_10V7K

+VCCP

5

+5VS

4

5

UGATE_CPU2

4

PQ18

@

123

TPCA8030-H_SOP-ADV8-5

PQ43

4

123 5

TPCA8028-H_SOP-ADVANCE8-5

5

UGATE_CPU1

4

PQ16

TPCA8030-H_SOP-ADV8-5

123

@

PQ44

4

123 5

TPCA8028-H_SOP-ADVANCE8-5

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

PROC_DPRSLPVR

PR191 1K_0402_5%PR191 1K_0402_5%

12

PR192 1K_0402_5%PR192 1K_0402_5%

12

PR193 1K_0402_5%@PR193 1K_0402_5%@

12

PR201 1K_0402_5%@PR201 1K_0402_5%@

12

PR202 1K_0402_5%@PR202 1K_0402_5%@

12

PR203 1K_0402_5%PR203 1K_0402_5%

12

PR204 1K_0402_5%PR204 1K_0402_5%

12

PR211 1K_0402_5%@PR211 1K_0402_5%@

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

PQ17

TPCA8030-H_SOP-ADV8-5

123

PQ42

@

4

123 5

TPCA8028-H_SOP-ADVANCE8-5

5

4

PQ15

TPCA8030-H_SOP-ADV8-5

123

PQ45

@

4

123 5

TPCA8028-H_SOP-ADVANCE8-5

2009/01/06 2010/01/06

4

3

CPU_B+

12

PC48

PC47

0.1U_0402_25V6

12

PR184

4.7_1206_5%

PR182

CPU_SNB2

12

PC142

PC142 680P_0402_50V7K

680P_0402_50V7K

12

PC46

PC45

0.1U_0402_25V6

12

PR185

4.7_1206_5%

PR186

CPU_SNB1

12

PC143

PC143 680P_0402_50V7K

680P_0402_50V7K

Compal Secret Data

Deciphered Date

3

12

2200P_0402_50V7K

12

17.8K_0402_1%

CPU_CSP2

12

2200P_0402_50V7K

12

17.8K_0402_1%

CPU_CSP1

PC30

PC29

10U_1206_25V6M

PL10

0.36UH_PCMC104T-R36MN1R17_30A_20%

1

CPU_CSP2-1

1 2

PR183

28.7K_0402_1%

PC33

0.36UH_PCMC104T-R36MN1R17_30A_20%

CPU_CSP1-1

1 2

PR188

28.7K_0402_1%

4

3

2

PR222

69.8K_0402_1%

1 2

PH2

PH2 100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

CPU_SN-2

1 2

PC56

0.033U_0402_16V7K

12

PC32

10U_1206_25V6M

PL11

1

4

3

2

PR64

69.8K_0402_1%

1 2

PH3

100K_0402_1%_TSM0B104F4251RZ

CPU_SN-1

1 2

PC159

0.033U_0402_16V7K

12

2

PL1

HCB4532KF-800T90_1812

1 2

1

12

PC31

10U_1206_25V6M

CPU_CSN2

CPU_B+

12

PC34

10U_1206_25V6M

CPU_CSN1

+

PC148

PC168

100U_25V_M

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

CPU_CORE

B+

+CPU_CORE

1

0.1

48 51Thursday, October 29, 2009

1

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change PG# Modify List Date PhaseItem

D D

1

2

3

4

5

6

C C

7

8

9

10

B B

11

12

13

14

15

16

A A

17

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/06 2009/01/06

3

Compal Secret Data

Deciphered Date

2

20081022

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

<Doc>

49 51Thursday, October 29, 2009

1

0.1

5

4

3

2

1

NO DATE PAGE MODIFICATION LIST PURPOSE

------------------------------------------------------------------------------------------------------------1 2 3

D D

4 5 6 7

8 9

P15 Add C638~C645

For UMA HDMI Add test point for BCLK_ITP,BCLK_ITP#,PRDY# P05 For XDP connector Change J6 size & unstuff ODD power control componentsP32,P28 Disable ODD power control circuit Change J4 size Stuff C262 P17 For UMA CRT Change R291,R294 from +3VALW to +3VSP34 Add R603 pull high to +3VS P38 For PM_BTN#

P38 For LED color changed

Change JP1 from 6 pin to 8 pin , Change JP8 from 14 pin to 12 pin , unstuff R322

Remove CLK_48M_CR Change EN_WOL to EN_WOL#P29,P34 For identify clearly

P34 EC GPIO arrangement

EC pin26-> EC_FAN_PWM , pin75->PCH_TEMP_ALERT ,

EVT TO DVT

pin34->PROCHOT# , pin66->NOVO#

10 11 12

C C

13 14 15 16 17 18 19 20 21 22

P12 Unstuff R278,stuff R269 and change U14 to SA00003HQ00 For low power CLK GEN P13 Change U3 from 2MBytes to 4MBytes For 4MBytes SPI ROM for PCH P29 Correct Q17 to P/N:SB000007600 For +3V_LAN power P16 Add C646 for BUF_PLT_RST# Reserved for BUF_PLT_RST# overshoot problem P36 Change U9 from 2MBytes to 256KBytes For 256KBytes SPI ROM for EC P03 UMA_HDMI@ , HDMI@ , BT@ , 3G@ , ESATA@ , CMOS@ New BOM structure P08 Add R608 For PSI# pull down P37 Delete D18 P16 Unstuff R210,R212 Set Boot BIOS Strap to SPI P22 Change & stuff R475 to 30K,R51 to 15K

Change JP12 pin define P31 For EC FAN control Change U5 pin3,pin5P16 POWER , GND reversed

ReservedP15 Add U28 for ICH_POK & VGATE

For N11M-GE1 QS sample Unstuff R474,R50

23

B B

24 25

P25

Unstuff R246 Level shift default setting

P39 Change C373 to DIS@ for DIS power sequence P15,P16,P17 Change R436 from 1K to 10K

Check list Rev2.0 update Change C447 from 0.1u to 1u Delete R514 Unstuff C493,C494 Reserve R609

27 28

P34 Add R607 Reserved for KB926 SPI STRAP PIN P36 Change LED1,LED3,LED4 to white color

LED2 to orang\white color and orage connect to +3VALW

29 30 31

A A

P14 Change exp-card from PCIE port 1 to port 5 SW BIOS request P38 Unstuff SW1

P13,P34 Change X1,X2 footprint 32 P12 Change C348 to 22p,C349 to 22p For Crystal matching 33 P13,P20 Add C647~C650 12p, stuff C370->22p, R331->33 Reserved for RF team 34 P36 Delete JP6 SPI ROM socket 35 P37 Change C430,C615 footprint to B2 type 36 P27,P32,P37 Change Q4,Q24,Q32,Q37 footprint to AO3413

5

4

3

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

LA-5751 0.3

50 51Thursday, October 29, 2009

1

5

4

3

2

1

NO DATE PAGE MODIFICATION LIST PURPOSE

------------------------------------------------------------------------------------------------------------37 P34 Change C320 to 0805 type

38 P08 Unstuff C268

For CPU VDDQ (DDR3 1.5V rails)

EVT TO DVT

Change C252,C258 from 10u to 22u

39

D D

40

P34 Change ODD_power_on# from U13 pin28 to pin 76

EC GPIO arrangement

Add EC_TACH on U13 pin28 to JP12 P31 Change U20 to EMC1403, add C651 Change thermal sensor solution to EMC1403 P05 Add Q42,R610 Reserve for +0.75V enable option41 P34,P35 Add C652,C653,C654 Reserve for NUM_LED#,CAPS_LED# ESD request42 P34 Add R611,R612,R613 For EC_FAN_PWM, EC_TACH43

NO DATE PAGE MODIFICATION LIST PURPOSE

-------------------------------------------------------------------------------------------------------------

DVT TO PVT

1 P34 Reseve R614,R615. EC_ID to identify KB926 D or E

Stuff R607 KB926 SPI STRAP PIN2 P34

Stuff C632~C635 EMI request3 P33

Stuff C646 For PLT_RST# singnal quality4 P16

C C

Add R616 100K, change R304 to 100K, C353 to 0.1u For +3VS_BT power on rising time5 P37

Changed R304 pin1 from +5VS to +5VALW For +3VS_BT power on leakage6 P37

Stuff R283, C338 0.01u For S3 power reduction7 P5

Add U29 Colay EMC2103/EMC1403 thermal sensor8 P31

B B

A A

Title

Size Document Number Rev

B

Date: Sheet of

5

4

3

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

LA-5751 0.3

51 51Thursday, October 29, 2009

1

Compal LA-5751P, G460, IdeaPad Z460 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual