COMPAL LA-5631P Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

NCL20 ULV M/B Schematics Document

Intel Penryn Processor with Cantiga SFF + DDRIII + ICH9M SFF

3 3

2009-10-08

REV:0.4

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/02/27 2010/01/21

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

NCL20 M/B LA-5631P Schematic

141Tuesday, November 10, 2009

E

0.1

of

A

Compal confidential

File Name : LA-5631P

LS5631P I/O Board

1 1

B

C

Mobile Penym

LV/ULV Dual Core

uFCPGA-956 CPU - SFF

page 4,5,6,7

D

Thermal Sensor

EMC1402-1-ACZL

page4

E

CK505

Clock Generator ICS9LPRS387

page 19

LS5632P C/R Board

FSB

667/800/1066MHz 1.05V

DDR3 800MHz 1.5V

Dual Channel

DDR3 SO-DIMM X2

page 14,15

LS5633P LED Board

LS5634P SW Board

LS5635P TP/B Board

HDMI Conn.

Level shift

LCD CONN. CRT CONN.

LVDS

TMDS

H_A#(3..35) H_D#(0..63)

page 18page 17page25

Intel Cantiga GS45

FCBGA 1363 - SFF

page 8,9,10,11,12,13

LS5636P ODD/B Board

2 2

DMI X4

USB conn x2

page 28

Bluetooth conn

page 28

CMOS Camera 1.3M

page23

IO board

PCI-Express

Intel ICH9-M

WBMMAP-569 - SFF

S-ATA

USB conn x1

MINI Card x1

3G

MINI Card x1

WLAN

page 27

SIM CONN.

3 3

LAN ATHEROS AR8131L

page 24

RJ45 LAN connector

page 25

port 0

HDD connector

page 23

port 1

page 19,20,21,22

LPC BUS

ENE KB926 D2

page 29

CDROM connector

RTC CKT.

page 24

Power On/Off CKT.

page 32

DC/DC Interface CKT.

4 4

page 35

IO/B Conn.

page 29

TP/B Conn.

page 31

Power Circuit DC/DC

page 36~~42

A

Speaker Conn.

page 31

B

page 23

Touch Pad

page 30

Int.KBD

BIOS

page 30

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/02/27 2009/02/20

Compal Secret Data

3.3V 48MHz

3.3V 24.576MHz/48Mhz

page 30

Deciphered Date

HD Audio

SPEAKER

D

USB

page 33

HDA Codec

ALC269X-GR

page 32

Card Reader

RTS5159-GR

page23

IO board

Audio Jack

page 33

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Block Diagram

NCL20 M/B LA-5631P Schematic

E

of

241Tuesday, October 20, 2009

0.1

A

Voltage Rails

Power Plane

VIN

1 1

B+ +CPU_CORE +1.05VS

Description

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU

1.05V switched power rail

B

S1 S3 S5

N/A N/A N/A

ON ON ON

N/AN/AN/A OFF

OFF OFF

OFF

OFF OFF

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

SLP_S4# SLP_S5# +VALW +V +VS Clock

LOW

HIGH

LOWLOWLOW

D

HIGHHIGHHIGH

HIGH

E

ON

OFF

ON ON

ON

OFF

LOW

OFF

ON

+1.5V +1.5VS +0.75V

+3VALW +3V_LAN +3VS

+5VALW +5VS

2 2

+VSB +RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

1.5V power rail for DDR

1.5V switched power rail

0.75V switched power rail for DDR terminator

3.3V always on power rail

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail 5V switched power rail VSB always on power rail RTC power

ON ON ON ON

ON ON ON ON ON

ON ON ON ON

OFF

OFF OFF

OFF

ON ON*

OFF

ON*

ON OFF

OFF

ON ON*

ONON

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

V typ

AD_BID

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

max

BOARD ID Table BTO Option Table

External PCI Devices

Device

IDSEL#

REQ#/GNT#

Interrupts

Board ID

0 1 2 3 4 5 6 7

EC SM Bus1 address

3 3

Device

Smart Battery

Address Address

EC SM Bus2 address

Device

ADI ADT7421

1001 100X b0001 011X b

USB table

UHCI1

EHCI1

UHCI2

UHCI3

UHCI4

ICH9M SMBUS Address

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR

4 4

(ICS9LPRS387, SLG8SP556V)

HEX

A0

D2

Address

1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0

EHCI2

UHCI5

UHCI6

Port0 Port1 Port2 Port3 Port4 Port5 Port6 Port7 Port8 Port9 Port10 Port11

PCB Revision

0.1

MB USB Conn1. MB USB Conn2. sub board WLAN Card Reader 3G BT CMOS Camera

BTO Item BOM Structure

PCIE table

PCIE port1 PCIE port2 PCIE port3 PCIE port4 PCIE port5 PCIE port6

3G Card Wireless Card GLAN

SATA table

SATA port0 SATA port1 SATA port2 SATA port3 SATA port4 SATA port5

HDD ODD

ZZZ1

PCB-MB

DA80000GO00

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/02/27 2010/01/21

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Notes List

NCL20 M/B LA-5631P Schematic

341Tuesday, October 20, 2009

E

0.1

of

5

4

3

2

1

+5VS

12

R111

D D

H_A#[3..16](8)

H_ADSTB#0(8)

H_A#[17..35](8)

C C

H_ADSTB#1(8)

H_A20M#(18)

H_FERR#(18)

H_IGNNE#(18) H_STPCLK#(18)

H_INTR(18)

B B

A A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0(8) H_REQ#1(8) H_REQ#2(8) H_REQ#3(8) H_REQ#4(8)

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_NMI(18) H_SMI#(18)

U1A

P2

A[3]#

V4

A[4]#

W1

A[5]#

T4

A[6]#

AA1

A[7]#

AB4

A[8]#

T2

A[9]#

AC5

A[10]#

AD2

A[11]#

AD4

A[12]#

AA5

A[13]#

AE5

A[14]#

AB2

A[15]#

AC1

A[16]#

Y4

ADSTB[0]#

R1

REQ[0]#

R5

REQ[1]#

U1

REQ[2]#

P4

REQ[3]#

W5

REQ[4]#

AN1

A[17]#

AK4

A[18]#

AG1

A[19]#

AT4

A[20]#

AK2

A[21]#

AT2

A[22]#

AH2

A[23]#

AF4

A[24]#

AJ5

A[25]#

AH4

A[26]#

AM4

A[27]#

AP4

A[28]#

AR5

A[29]#

AJ1

A[30]#

AL1

A[31]#

AM2

A[32]#

AU5

A[33]#

AP2

A[34]#

AR1

A[35]#

AN5

ADSTB[1]#

C7

A20M#

AG5

AL5

D4

F10

F8 C9 C5 E5

V2 Y2

J9 F4 H8

ICH

FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD01 RSVD02 RSVD03 RSVD04 RSVD05 RSVD06 RSVD07

PENRYN SFF_UFCBGA956

BPRI#

ADDR GROUP 0

DEFER#

DRDY#

DBSY#

IERR#

CONTROL

LOCK#

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HITM#

ADDR GROUP 1

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TRST#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

Place close to U1.

M4

ADS#

J5

BNR#

L5 N5

F38 J1

M2

BR0#

B40 D8

INIT#

N1 G5

K2 H4 K4 L1

H2

HIT#

F2 AY8

BA7 BA5 AY2 AV10 AV2 AV4

TCK

AW7

TDI

AU1

TDO

AW5

TMS

AV8 J7

DBR#

D38 BB34 BD34

B10

A35 C35

RESERVED

H_ADS# (8) H_BNR# (8)

H_BPRI# (8) H_DEFER# (8)

H_DRDY# (8) H_DBSY# (8)

H_BR0# (8)

H_INIT# (18)

H_RESET#

H_LOCK# (8)

H_RS#0 (8) H_RS#1 (8) H_RS#2 (8)

H_TRDY# (8)

H_HIT# (8) H_HITM# (8)

Del XDP_BPM#5 net.071309.

XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#

R558 0_0402_5%@R558 0_0402_5%@

1 2

H_THERMDA_R H_THERMDC_R

H_THERMTRIP#

R22 68_0402_5%R22 68_0402_5% R23 0_0402_5%R23 0_0402_5% R24 0_0402_5%R24 0_0402_5%

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

CLK_CPU_BCLK (16) CLK_CPU_BCLK# (16)

XDP_DBRESET# XDP_TDO

XDP_TRST# XDP_TDI

XDP_TMS XDP_TCK

For ESD

+VCCP

1 2 1 2 1 2

add it 073109.

2

3

1

R10

R10 51_0402_1%

51_0402_1%

@

9/20

R9

1 2

56_0402_5%

Change to NU 072709.

XDP_DBRESET# (19)

H_PROCHOT# (40)

+VCCP

H_THERMTRIP# (8,18)

@

D9

D9 PJDLC05_SOT23-3

PJDLC05_SOT23-3

H_RESET# (8)

H_THERMDA H_THERMDC

2

3

1

@

D10

D10 PJDLC05_SOT23-3

PJDLC05_SOT23-3

XDP_TDI XDP_TMS XDP_TDO

XDP_TRST# XDP_TCK

Add it 090909.

+VCC_FAN1

EN_FAN1(29)

Change from 54.9 ohm to 51ohm 072709.

@

2

3

D11

D11 PJDLC05_SOT23-3

PJDLC05_SOT23-3

1

EN_FAN1

R1 51_0402_1%R1 51_0402_1%

1 2

R2 51_0402_1%R2 51_0402_1%

1 2

R3 51_0402_1%R3 51_0402_1%

1 2

R6 51_0402_1%R6 51_0402_1%

1 2

R7 51_0402_1%R7 51_0402_1%

1 2

This shall place near CPU

0_0603_5%

1 2

0_0402_5%

R1007

@

H_THERMDA

2200P_0402_50V7K

H_THERMDC

1 2 3 4

1

C949

0.1U_0402_16V4Z

@

2

FAN_SPEED1(29)

+VCCP

1

C1035

2

C638

1 2

10U_0805_10V4Z

U19

VEN VIN VO VSET

G990P11U SOP

SA00002GW00

@

GND GND GND GND

@

+3VS

8 7 6 5

+3VS

12

R1586

R1586 10K_0402_5%

10K_0402_5%

1

C641

C641 1000P_0402_50V7K

1000P_0402_50V7K

2

0.1U_0402_16V4Z

1 2

FAN_PWM(29)

C1034

U7

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

40mil

+VCC_FAN1

SMDATA

+5VS

SMCLK

ALERT#

GND

12

D53

@D53

@

1SS355_SOD323-2

D54

1 2

BAS16_SOT23-3

C639

1 2

C640

1000P_0402_50V7K

1 2

FAN_PWM

Change footprint 073109.

8 7 6 5

@

10U_0805_10V4Z

JP32

1

2

3

5

3

G1

4

6

4

G2

E-T_3801-E04N-01R

CONN@ SP020907300

EC_SMB_CK2 (29) EC_SMB_DA2 (29)

1 2

R305

R305 10K_0402_5%

10K_0402_5%

+3VS

Security Classification

2009/02/27 2010/01/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/02/27 2010/01/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

NCL20 M/B LA-5631P Schematic

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn (1/3) & FAN

441Tuesday, October 20, 2009

of

1

of

0.1

5

4

3

2

1

H_D#[0..15](8)

D D

H_DSTBN#0(8) H_DSTBP#0(8) H_DINV#0(8) H_D#[16..31](8)

C C

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

H_DSTBN#1(8) H_DSTBP#1(8) H_DINV#1(8)

CPU_BSEL0(16) CPU_BSEL1(16) CPU_BSEL2(16)

V_CPU_GTLREF

T8T8

T9T9 T10T10

H_D#0 H_D#1

H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

TEST2

TEST5 TEST6

CPU_BSEL CPU_BSEL2 CPU_BSEL1

B B

166

200

01

0

1

U1B

F40

D[0]#

G43

D[1]#

E43

D[2]#

J43

D[3]#

H40

D[4]#

H44

D[5]#

G39

D[6]#

E41

D[7]#

L41

D[8]#

K44

D[9]#

N41

D[10]#

T40

D[11]#

M40

D[12]#

G41

D[13]#

M44

D[14]#

L43

D[15]#

K40

DSTBN[0]#

J41

DSTBP[0]#

P40

DINV[0]#

P44

D[16]#

V40

D[17]#

V44

D[18]#

AB44

D[19]#

R41

D[20]#

W41

D[21]#

N43

D[22]#

U41

D[23]#

AA41

D[24]#

AB40

D[25]#

AD40

D[26]#

AC41

D[27]#

AA43

D[28]#

Y40

D[29]#

Y44

D[30]#

T44

D[31]#

U43

DSTBN[1]#

W43

DSTBP[1]#

R43

DINV[1]#

AW43

GTLREF

E37

TEST1

D40

TEST2

C43

TEST3

AE41

TEST4

AY10

TEST5

AC43

TEST6

A37

BSEL[0]

C37

BSEL[1]

B38

BSEL[2]

PENRYN SFF_UFCBGA956

CPU_BSEL0

1

0

D[32]# D[33]# D[34]#

DATA GROUP 0

D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]#

DATA GROUP 2DATA GROUP 3

D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

DATA GROUP 1

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]# COMP[0]

MISC

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Cause CPU core power change to 1 phase, and not need support the pin, leave it as TP. 10/02

AR43 AH40 AF40 AJ43 AG41 AF44 AH44 AM44 AN43 AM40 AK40 AG43 AP40 AN41 AL41 AK44 AL43 AJ41

AV38 AT44 AV40 AU41 AW41 AR41 BA37 BB38 AY36 AT40 BC35 BC39 BA41 BB40 BA35 AU43 AY40 AY38 BC37

AE43 AD44 AE1 AF2

G7 B8 C41 E7 D10 BD10

H_PSI#

H_D#33 H_D#34H_D#2 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

COMP0 COMP1 COMP2 COMP3

H_D#32

AP44

H_DPRSTP# (8,18,40)

H_DPSLP# (18) H_DPWR# (8) H_PWRGOOD (18)

H_CPUSLP# (8)

T11T11

H_D#[32..47] (8)

H_DSTBN#2 (8) H_DSTBP#2 (8) H_DINV#2 (8) H_D#[48..63] (8)

H_DSTBN#3 (8) H_DSTBP#3 (8) H_DINV#3 (8)

12

27.4_0402_1%

54.9_0402_1%

27.4_0402_1%

27.4_0402_1% R33

R33

R32

R30

R31

Resistor placed within

0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils.

266 0 0 0

+CPU_CORE +CPU_CORE

U1C

F32

VCC[001]

G33

VCC[002]

H32

VCC[003]

J33

VCC[004]

K32

VCC[005]

L33

VCC[006]

M32

VCC[007]

N33

VCC[008]

P32

VCC[009]

R33

VCC[010]

T32

VCC[011]

U33

VCC[012]

V32

VCC[013]

W33

VCC[014]

Y32

VCC[015]

AA33

VCC[016]

AB32

VCC[017]

AC33

VCC[018]

AD32

VCC[019]

AE33

VCC[020]

AF32

VCC[021]

AG33

VCC[022]

AH32

VCC[023]

AJ33

VCC[024]

AK32

VCC[025]

AL33

VCC[026]

AM32

VCC[027]

AN33

VCC[028]

AP32

VCC[029]

AR33

VCC[030]

AT34

VCC[031]

AT32

VCC[032]

AU33

VCC[033]

AV32

VCC[034]

AY32

VCC[035]

BB32

VCC[036]

BD32

VCC[037]

B28

VCC[038]

B30

VCC[039]

B26

VCC[040]

D28

VCC[041]

D30

VCC[042]

F30

VCC[043]

F28

VCC[044]

H30

VCC[045]

H28

VCC[046]

D26

VCC[047]

F26

VCC[048]

H26

VCC[049]

K30

VCC[050]

K28

VCC[051]

M30

VCC[052]

M28

VCC[053]

K26

VCC[054]

M26

VCC[055]

P30

VCC[056]

P28

VCC[057]

T30

VCC[058]

T28

VCC[059]

V30

VCC[060]

V28

VCC[061]

P26

VCC[062]

T26

VCC[063]

V26

VCC[064]

Y30

VCC[065]

Y28

VCC[066]

AB30

VCC[067]

PENRYN SFF_UFCBGA956

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP_001 VCCP_002 VCCP_003 VCCP_004 VCCP_005 VCCP_006 VCCP_007 VCCP_008 VCCP_009 VCCP_010 VCCP_011 VCCP_012 VCCP_013 VCCP_014 VCCP_015 VCCP_016

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB28 AD30 AD28 Y26 AB26 AD26 AF30 AF28 AH30 AH28 AF26 AH26 AK30 AK28 AM30 AM28 AP30 AP28 AK26 AM26 AP26 AT30 AT28 AV30 AV28 AY30 AY28 AT26 AV26 AY26 BB30 BB28 BD30

R27 0_0402_5%R27 0_0402_5%

J11

1 2

R28 0_0402_5%R28 0_0402_5%

E11

1 2

R29 0_0402_5%R29 0_0402_5%

G11

1 2 J37 K38 L37 N37 P38 R37 U37 V38 W37 AA37 AB38 AC37 AE37

B34 D34

BD8 BC7 BB10 BB8 BC5 BB4 AY4

VCCSENSE

BD12

VSSSENSE

BC13

Length match within 25 mils. The trace width/space/other is 20/7/25.

+VCCP

1

+

C5

330U_D2E_2.5VM_R9

2

CPU_VID0 (40) CPU_VID1 (40) CPU_VID2 (40) CPU_VID3 (40) CPU_VID4 (40) CPU_VID5 (40) CPU_VID6 (40)

VCCSENSE (40)

VSSSENSE (40)

1

C6

2

0.01U_0402_16V7KC60.01U_0402_16V7K

Near pin B34

Change to 330u_R9, casue high limitation. 12/14

+1.5VS

1

C7

2

10U_0805_6.3V6MC710U_0805_6.3V6M

Near pin D34

+CPU_CORE

R34

+VCCP

12

R36

R36 1K_0402_1%

V_CPU_GTLREF

A A

1K_0402_1%

12

R37

R37 2K_0402_1%

2K_0402_1%

1 2

100_0402_1%

100_0402_1% R35

R35

1 2

100_0402_1%

Close to CPU pin within 500mils.

VCCSENSE

VSSSENSE

Close to CPU pin AW43 within 500mils.

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Penryn(2/3)-AGTL+/ITP-XDP

NCL20 M/B LA-5631P Schematic

1

of

541Tuesday, October 20, 2009

0.1

5

D D

AL37

AN37

AP38

B32

C33

D32

E35

E33

F34

G35

F36

H36

J35

L35

N35

K36

R35

U35

P36

V36

W35

AA35

AC35

AB36

AE35

AG35

VCCP_040

VCCP_041

VCC_120

VCC_121

V22

VCCP_042

VCC_122

Y24

VCCP_043

VCC_123

Y22

AB24

VCCP_044

VCCP_045

VCC_124

VCC_125

AB22

AJ35

VCCP_046

VCC_126

AD24

AD22

C C

VCCP_021

VCCP_022

VCCP_023

VCCP_024

VCCP_025

VCCP_026

VCCP_027

VCCP_028

VCCP_029

VCCP_030

VCCP_031

VCCP_032

VCCP_033

VCCP_034

VCCP_035

VCCP_036

VCCP_037

VCCP_038

VCCP_039

VCC_101

VCC_102

VCC_103

VCC_104

VCC_105

VCC_106

VCC_107

VCC_108

VCC_109

VCC_110

VCC_111

VCC_112

VCC_113

VCC_114

VCC_115

VCC_116

VCC_117

VCC_118

VCC_119

F24

F22

B22

B24

D22

D24

H24

BB26

BD28

BD26

H22

T24

K24

T22

K22

P24

P22

V24

M24

M22

AF36

VCCP_047

VCCP_048

VCC_127

VCC_128

AF24

AL35

AN35

VCCP_049

VCC_129

AF22

AH24

AK36

VCCP_050

VCCP_051

VCC_130

VCC_131

AH22

AP36

B12

VCCP_052

VCC_132

AK24

AK22

4

B14

VCCP_053

VCCP_054

VCC_133

VCC_134

AM24

C13

D12

VCCP_055

VCC_135

AP24

AM22

D14

E13

VCCP_056

VCCP_057

VCC_136

VCC_137

AT24

AP22

F14

VCCP_058

VCCP_059

VCC_138

VCC_139

AT22

F12

G13

VCCP_060

VCC_140

AV24

AV22

H14

VCCP_061

VCCP_062

VCC_141

VCC_142

AY24

H12

J13

VCCP_063

VCC_143

AY22

BB24

K14

VCCP_064

VCCP_065

VCC_144

VCC_145

BB22

K12

L13

VCCP_066

VCC_146

BD24

BD22

L11

VCCP_067

VCCP_068

VCC_147

VCC_148

B16

M14

N13

VCCP_069

VCC_149

B18

B20

N11

VCCP_070

VCCP_071

VCC_150

VCC_151

D16

K10

P14

VCCP_072

VCC_152

F18

D18

P12

VCCP_073

VCCP_074

VCC_153

VCC_154

F16

R13

R11

VCCP_075

VCC_155

H18

H16

T14

VCCP_076

VCCP_077

VCC_156

VCC_157

D20

U13

U11

VCCP_078

VCC_158

F20

H20

V14

V12

VCCP_079

VCCP_080

VCC_159

VCC_160

K18

K16

W13

VCCP_081

VCCP_082

VCC_161

VCC_162

M18

W11

P10

VCCP_083

VCC_163

K20

M16

V10

VCCP_084

VCCP_085

VCC_164

VCC_165

M20

Y14

VCCP_086

VCC_166

P18

AA13

AA11

VCCP_087

VCC_167

T18

P16

3

AB14

VCCP_088

VCCP_089

VCC_168

VCC_169

T16

AB12

AC13

VCCP_090

VCC_170

V18

V16

AC11

VCCP_091

VCCP_092

VCC_171

VCC_172

P20

AD14

AB10

VCCP_093

VCC_173

T20

V20

AE13

VCCP_094

VCCP_095

VCC_174

VCC_175

Y18

AE11

AF14

VCCP_096

VCC_176

Y16

AB18

AF12

VCCP_097

VCCP_098

VCC_177

VCC_178

AB16

AG13

AG11

VCCP_099

VCC_179

AD18

AD16

AH14

VCCP_100

VCCP_101

VCC_180

VCC_181

Y20

AJ13

AJ11

VCCP_102

VCC_182

AB20

AD20

AF10

VCCP_103

VCCP_104

VCC_183

VCC_184

AF18

AK14

AK12

VCCP_105

VCC_185

AF16

AH18

AL13

VCCP_106

VCCP_107

VCC_186

VCC_187

AH16

AL11

AN13

VCCP_108

VCC_188

AF20

AH20

AN11

VCCP_109

VCCP_110

VCC_189

VCC_190

AK18

AP12

AR13

VCCP_111

VCC_191

AK16

AM18

AR11

VCCP_112

VCCP_113

VCC_192

VCC_193

AM16

AK10

AP10

VCCP_114

VCC_194

AP18

AP16

AU13

VCCP_115

VCCP_116

VCC_195

VCC_196

AK20

2

AU11

VCCP_117

VCCP_118L9VCCP_119L7VCCP_120N9VCCP_121N7VCCP_122R9VCCP_123R7VCCP_124U9VCCP_125U7VCCP_126W9VCCP_127W7VCCP_128

VCC_197

VCC_198

VCC_199

VCC_200

VCC_201

VCC_202

VCC_203

VCC_204

VCC_205

AT18

AT16

AP20

AM20

AT20

AV18

AV16

AY18

AY16

VCC_206

AV20

AA9

VCC_207

AY20

BB18

AA7

VCCP_129

VCC_208

VCC_209

BB16

AC9

AC7

VCCP_130

VCC_210

BD18

BD16

AE9

AE7

VCCP_131

VCCP_132

VCC_211

VCC_212

BB20

BD20

AG9

VCCP_133

VCCP_134

VCC_213

VCC_214

AM14

AG7

AJ9

VCCP_135

VCC_215

AT14

AP14

AJ7

AL9

VCCP_136

VCCP_137

VCC_216

VCC_217

AV14

AY14

AL7

AN9

VCCP_138

VCCP_139

VCC_218

VCC_219

BB14

BD14

AN7

VCCP_140

VCCP_141

VCC_220

+VCCP

AR9

AR7

A33

A13

VCCP_142

VCCP_143

VCCP_144

VCCP_145

VCCP_020

VCCP_018

VCCP_019

VCCP_017

AJ37

AF38

AK38

AG37

U1F

U1F PENRYN SFF_UFCBGA956

PENRYN SFF_UFCBGA956

1

+CPU_CORE +VCCP

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet of

Compal Electronics, Inc.

Penryn(3/3)-Power

NCL20 M/B LA-5631P Schematic

1

0.1

of

641Tuesday, October 20, 2009

5

U1D

B42

VSS[001]

F44

VSS[002]

D44

VSS[003]

D42

VSS[004]

F42

VSS[005]

H42

VSS[006]

K42

VSS[007]

M42

VSS[008]

P42

VSS[009]

T42

VSS[010]

V42

VSS[011]

Y42

D D

C C

B B

A A

VSS[012]

AB42

VSS[013]

AD42

VSS[014]

AF42

VSS[015]

AH42

VSS[016]

AK42

VSS[017]

AM42

VSS[018]

AP42

VSS[019]

AY44

VSS[020]

AV44

VSS[021]

AT42

VSS[022]

AV42

VSS[023]

AY42

VSS[024]

BA43

VSS[025]

BB42

VSS[026]

C39

VSS[027]

E39

VSS[028]

G37

VSS[029]

H38

VSS[030]

J39

VSS[031]

L39

VSS[032]

M38

VSS[033]

N39

VSS[034]

R39

VSS[035]

T38

VSS[036]

U39

VSS[037]

W39

VSS[038]

Y38

VSS[039]

AA39

VSS[040]

AC39

VSS[041]

AD38

VSS[042]

AE39

VSS[043]

AG39

VSS[044]

AH38

VSS[045]

AJ39

VSS[046]

AL39

VSS[047]

AM38

VSS[048]

AN39

VSS[049]

AR39

VSS[050]

AR37

VSS[051]

AT38

VSS[052]

AU39

VSS[053]

AU37

VSS[054]

AW39

VSS[055]

AW37

VSS[056]

BA39

VSS[057]

BC41

VSS[058]

BD40

VSS[059]

BD38

VSS[060]

B36

VSS[061]

H34

VSS[062]

D36

VSS[063]

K34

VSS[064]

M34

VSS[065]

M36

VSS[066]

P34

VSS[067]

T34

VSS[068]

V34

VSS[069]

T36

VSS[070]

Y34

VSS[071]

AB34

VSS[072]

AD34

VSS[073]

Y36

VSS[074]

AD36

VSS[075]

AF34

VSS[076]

AH34

VSS[077]

AH36

VSS[078]

AK34

VSS[079]

AM34

VSS[080]

AP34

VSS[081]

PENRYN SFF_UFCBGA956

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163]

5

AM36 AR35 AU35 AV34 AW35 AW33 AY34 AT36 AV36 BA33 BC33 BB36 BD36 C27 C29 C31 E29 E27 G29 G27 E31 G31 J29 J27 L29 L27 N29 N27 J31 L31 N31 R29 R27 U29 U27 R31 U31 W29 W27 W31 AA29 AA27 AC29 AC27 AA31 AC31 AE29 AE27 AG29 AG27 AJ29 AJ27 AE31 AG31 AJ31 AL29 AL27 AN29 AN27 AL31 AN31 AR29 AR27 AR31 AU29 AU27 AW29 AW27 AU31 AW31 BA29 BA27 BC29 BC27 BA31 BC31 C21 C23 C25 E25 E23 E21

U1E

G25

VSS_164

G23

VSS_165

G21

VSS_166

J25

VSS_167

J23

VSS_168

J21

VSS_169

L25

VSS_170

L23

VSS_171

L21

VSS_172

N25

VSS_173

N23

VSS_174

N21

VSS_175

R25

VSS_176

R23

VSS_177

R21

VSS_178

U25

VSS_179

U23

VSS_180

U21

VSS_181

W25

VSS_182

W23

VSS_183

W21

VSS_184

AA25

VSS_185

AA23

VSS_186

AA21

VSS_187

AC25

VSS_188

AC23

VSS_189

AC21

VSS_190

AE25

VSS_191

AE23

VSS_192

AE21

VSS_193

AG25

VSS_194

AG23

VSS_195

AG21

VSS_196

AJ25

VSS_197

AJ23

VSS_198

AJ21

VSS_199

AL25

VSS_200

AL23

VSS_201

AL21

VSS_202

AN25

VSS_203

AN23

VSS_204

AN21

VSS_205

AR25

VSS_206

AR23

VSS_207

AR21

VSS_208

AU25

VSS_209

AU23

VSS_210

AU21

VSS_211

AW25

VSS_212

AW23

VSS_213

AW21

VSS_214

BA25

VSS_215

BA23

VSS_216

BA21

VSS_217

BC25

VSS_218

BC23

VSS_219

BC21

VSS_220

C17

VSS_221

C19

VSS_222

E19

VSS_223

E17

VSS_224

G19

VSS_225

G17

VSS_226

J19

VSS_227

J17

VSS_228

L19

VSS_229

L17

VSS_230

N19

VSS_231

N17

VSS_232

R19

VSS_233

R17

VSS_234

U19

VSS_235

U17

VSS_236

W19

VSS_237

W17

VSS_238

AA19

VSS_239

AA17

VSS_240

AC19

VSS_241

AC17

VSS_242

AE19

VSS_243

AE17

VSS_244

AG19

VSS_245

AG17

VSS_246

AJ19

VSS_247

AJ17

VSS_248

AL19

VSS_249

AL17

VSS_250

AN19

VSS_251

AN17

VSS_252

AR19

VSS_253

AR17

VSS_254

AU19

VSS_255

AU17

VSS_256

AW19

VSS_257

AW17

VSS_258

BA19

VSS_259

BA17

VSS_260

BC19

VSS_261

BC17

VSS_262

C11

VSS_263

C15

VSS_264

E15

VSS_265

G15

VSS_266

H10

VSS_267

M12

VSS_268

J15

VSS_269

L15

VSS_270

N15

VSS_271

M10

VSS_272

T12

VSS_273

R15

VSS_274

U15

VSS_275

W15

VSS_276

T10

VSS_277

Y12

VSS_278

AD12

VSS_279

PENRYN SFF_UFCBGA956

VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 VSS_361 VSS_362 VSS_363 VSS_364 VSS_365 VSS_366 VSS_367 VSS_368 VSS_369 VSS_370 VSS_371 VSS_372 VSS_373 VSS_374 VSS_375 VSS_376 VSS_377 VSS_378 VSS_379 VSS_380 VSS_381 VSS_382 VSS_383 VSS_384 VSS_385 VSS_386 VSS_387 VSS_388 VSS_389 VSS_390 VSS_391 VSS_392 VSS_393 VSS_394 VSS_395

AA15 AC15 Y10 AD10 AH12 AE15 AG15 AJ15 AH10 AM12 AL15 AN15 AR15 AM10 AT12 AV12 AW13 AW11 AY12 AU15 AW15 AT10 BA13 BA11 BB12 BC11 BA15 BC15 B6 D6 E9 F6 G9 H6 K8 K6 M8 M6 P8 P6 T8 T6 V8 V6 U5 Y8 Y6 AB8 AB6 AD8 AD6 AF8 AF6 AH8 AH6 AK8 AK6 AM8 AM6 AP8 AP6 AT8 AT6 AU9 AV6 AU7 AW9 AY6 BA9 BB6 BC9 BD6 B4 C3 E3 G3 J3 L3 N3 R3 U3 W3 AA3 AC3 AE3 AG3 AJ3 AL3 AN3 AR3 AU3 AW3 BA3 BC3 D2 E1 G1 AW1 BA1 BB2 A41 A39 A29 A27 A31 A25 A23 A21 A19 A17 A11 A15 A7 A5 A9 BD4

4

+CPU_CORE

10U_0603_6.3V6MC810U_0603_6.3V6M

1

C8

2

Mid Frequence Decoupling

10U_0603_6.3V6MC910U_0603_6.3V6M

10U_0603_6.3V6M

1

C9

C10

2

3

10U_0603_6.3V6M

C11

10U_0603_6.3V6M

1

C12

C13

2

10U_0603_6.3V6M

1

C15

C14

2

10U_0603_6.3V6M

1

C16

2

10U_0603_6.3V6M

1

2

1

C17

C18

2

10U_0603_6.3V6M

1

C19

C20

2

10U_0603_6.3V6M

1

C22

C21

2

10U_0603_6.3V6M

1

C23

2

10U_0603_6.3V6M

1

C24

C25

2

10U_0603_6.3V6M

1

2

1

C27

C26

2

1

10U_0603_6.3V6M

1

C28

C29

2

10U_0603_6.3V6M

1

2

C31

C30

2

Replace 10uF_0805 to 10uF_0603.071309.

+CPU_CORE

High Frequence Decoupling

1U_0402_6.3V6K

1

C33

C32

2

1U_0402_6.3V6K

1

C34

C35

2

C35

2

1U_0402_6.3V6K

1

C36

C37

2

1U_0402_6.3V6K

1

C38

2

1U_0402_6.3V6K

1

C39

C40

2

1U_0402_6.3V6K

1

2

C42

C41

2

1U_0402_6.3V6K

1

C43

2

1U_0402_6.3V6K

1

C44

C45

2

1U_0402_6.3V6K

1

2

C47

C46

2

1U_0402_6.3V6K

1

C49

C48

2

1U_0402_6.3V6K

1

C51

C50

2

1U_0402_6.3V6K

1

C53

C52

2

1U_0402_6.3V6K

1

2

C55

C54

2

6/14 :Replace 12pcs 10uF_0805 to 24 pcs 1uF_0402 for CPU transient fail issue.

ESR <= 1.5m ohm

Near CPU CORE regulator

+CPU_CORE

220U_D2_2VK_R9

1

+

C56

C57

2

Del C37 to improve power plan. 6/14

+VCCP

1U_0402_6.3V6K

1

C59

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

C61

C60

2

1U_0402_6.3V6K

1

2

Compal Secret Data

1

C63

C62

2

Deciphered Date

1U_0402_6.3V6K

C64

220U_D2_2VK_R9

1

+

C58

2

1U_0402_6.3V6K

1

C65

2

1U_0402_6.3V6K

1

2

1

C66

C67

C68

2

C68

2

1U_0402_6.3V6K

1

2

C70

C69

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Penryn(3/3)-GND/Bypass

NCL20 M/B LA-5631P Schematic

1

0.1

of

741Tuesday, October 20, 2009

5

U3A

H_D#[0..63](5)

D D

C C

H_RESET#(4)

H_CPUSLP#(5)

layout note:

B B

Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces

trace width and spacing is 10/20

+VCCP

12

1K_0402_1%

12

R592K_0402_1% R592K_0402_1%

A A

Trace < = 500mils

Layout Note: H_RCOMP / H_VREF / H_SWNG

R55

H_VREF

1

C78

2

0.1U_0402_16V4Z

@

within 100 mils from NB

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWNG H_RCOMP

H_VREF

H_RCOMP

12

R60

24.9_0402_1%

5

U3A

J7

H_D#_0

H6

H_D#_1

L11

H_D#_2

J3

H_D#_3

H4

H_D#_4

G3

H_D#_5

K10

H_D#_6

K12

H_D#_7

L1

H_D#_8

M10

H_D#_9

M6

H_D#_10

N11

H_D#_11

L7

H_D#_12

K6

H_D#_13

M4

H_D#_14

K4

H_D#_15

P6

H_D#_16

W9

H_D#_17

V6

H_D#_18

V2

H_D#_19

P10

H_D#_20

W7

H_D#_21

N9

H_D#_22

P4

H_D#_23

U9

H_D#_24

V4

H_D#_25

U1

H_D#_26

W3

H_D#_27

V10

H_D#_28

U7

H_D#_29

W11

H_D#_30

U11

H_D#_31

AC11

H_D#_32

AC9

H_D#_33

Y4

H_D#_34

Y10

H_D#_35

AB6

H_D#_36

AA9

H_D#_37

AB10

H_D#_38

AA1

H_D#_39

AC3

H_D#_40

AC7

H_D#_41

AD12

H_D#_42

AB4

H_D#_43

Y6

H_D#_44

AD10

H_D#_45

AA11

H_D#_46

AB2

H_D#_47

AD4

H_D#_48

AE7

H_D#_49

AD2

H_D#_50

AD6

H_D#_51

AE3

H_D#_52

AG9

H_D#_53

AG7

H_D#_54

AE11

H_D#_55

AK6

H_D#_56

AF6

H_D#_57

AJ9

H_D#_58

AH6

H_D#_59

AF12

H_D#_60

AH4

H_D#_61

AJ7

H_D#_62

AE9

H_D#_63

B6

H_SWING

D4

H_RCOMP

J11

H_CPURST#

G9

H_CPUSLP#

L17

H_AVREF

K18

H_DVREF

CANTIGA GMCH SFF_FCBGA1363

+VCCP

12

R56

221_0603_1%

12

R61

100_0402_1%

0.1U_0402_16V4Z

Near B6 pin

H_SWNG

1

C79

2

H_ADSTB#_0 H_ADSTB#_1

H_DEFER#

HOST

HPLL_CLK#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

layout note: Place them close to U4 pin BC51.

Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31

H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR# H_BPRI#

H_BREQ# H_DBSY#

HPLL_CLK H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

TSATN#

4

L15 B14 C15 D12 F14 G17 B12 J15 D16 C17 D14 K16 F16 B16 C21 D18 J19 J21 B18 D22 G19 J17 L21 L19 G21 D20 K22 F18 K20 F20 F22 B20 A19

F10 A15 C19 C9 B8 C11 E5 D6 AH10 AJ11 G11 H2 C7 F8 A11 D8

L9 N7 AA7 AG3

K2 N3 AA3 AF4

L3 M2 Y2 AF2

J13 L13 C13 G13 G15

F4 F2 G7

R327

1 2

330_0402_5%

4

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

+3VS

2

B

E

H_A#[3..35] (4)

H_ADS# (4) H_ADSTB#0 (4) H_ADSTB#1 (4) H_BNR# (4) H_BPRI# (4) H_BR0# (4) H_DEFER# (4) H_DBSY# (4) CLK_MCH_BCLK (16) CLK_MCH_BCLK# (16) H_DPWR# (5) H_DRDY# (4) H_HIT# (4) H_HITM# (4) H_LOCK# (4) H_TRDY# (4)

H_DINV#0 (5) H_DINV#1 (5) H_DINV#2 (5) H_DINV#3 (5)

H_DSTBN#0 (5) H_DSTBN#1 (5) H_DSTBN#2 (5) H_DSTBN#3 (5)

H_DSTBP#0 (5) H_DSTBP#1 (5) H_DSTBP#2 (5) H_DSTBP#3 (5)

H_REQ#0 (4) H_REQ#1 (4) H_REQ#2 (4) H_REQ#3 (4) H_REQ#4 (4)

H_RS#0 (4) H_RS#1 (4) H_RS#2 (4)

+V_DDR_MCH_REF

12

R326

R326 1K_0402_5%

1K_0402_5%

2

B

C

Q2

Q2 MMBT3904_SOT23-3

MMBT3904_SOT23-3

3 1

3

Add them for Boundary Scan. 10/23

R38 1K_0402_5%@R38 1K_0402_5%@

1 2

R39 4.7K_0402_5%@R39 4.7K_0402_5%@

1 2

R40 4.7K_0402_5%@R40 4.7K_0402_5%@

1 2

R41 1K_0402_5%@R41 1K_0402_5%@

1 2

1

C71

C72

2.2U_0603_6.3V4Z

SMRCOMP_VOH

SMRCOMP_VOL

2

1

C74

C73

2

2.2U_0603_6.3V4Z

PM_BMBUSY#(19)

H_DPRSTP#(5,18,40) PM_EXTTS#0(14) PM_EXTTS#1(15)

PLT_RST#(17,29)

1 2

R51 0_0402_5%R51 0_0402_5%

Add R428 in 9/26

DDR3

12

1K_0402_5%

1K_0402_5% R54

R54

12

1K_0402_5%

1K_0402_5% R57

R57

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

H_THERMTRIP#(4,18)

PM_DPRSLPVR(19,40)

C77

1

2

0.1U_0402_16V4Z

+3VS

12

R325

R325 1K_0402_5%

1K_0402_5%

C

Q1

Q1 MMBT3904_SOT23-3

MMBT3904_SOT23-3

E

3 1

+3VS

+1.5V

MCH_TSATN_EC# (29)

U3B

J43

RSVD1

L43

RSVD2

J41

RSVD3

L41

RSVD4

AN11

RSVD5

AM10

RSVD6

AK10

RSVD7

AL11

RSVD8

F12

TCK TDI TDO TMS

+1.5V

1

2

1

2

DDR3

12

R42

0.01U_0402_25V7K

0.01U_0402_25V7K 1K_0402_1%

1K_0402_1%

12

R45

3.01K_0402_1%

12

R48

R48 1K_0402_1%

1K_0402_1%

0.01U_0402_25V7K

MCH_CLKSEL0(16) MCH_CLKSEL1(16) MCH_CLKSEL2(16)

T30T30

T31T31

CFG5(10) CFG6(10) CFG7(10)

T32T32

CFG9(10)

CFG10(10)

T33T33

CFG12(10) CFG13(10)

T34T34

T35T35

CFG16(10)

T36T36

T37T37

CFG19(10) CFG20(10)

PM_EXTTS#0 PM_EXTTS#1 GMCH_PWROK

R50 100_0402_1%R50 100_0402_1%

1 2

C750.1U_0402_16V4Z@ C750.1U_0402_16V4Z@

1

2

2009/02/27 2009/02/20

RSVD9

AN45

RSVD10

AP44

RSVD11

AT44

RSVD12

AN47

RSVD13

C27

RSVD14

D30

RSVD15

J9

RSVD17

AW42

RSVD20

BB20

RSVD22

BE19

RSVD23

BF20

RSVD24

BF18

RSVD25

K26

CFG_0

G23

CFG_1

G25

CFG_2

J25

CFG_3

L25

CFG_4

L27

CFG_5

F24

CFG_6

D24

CFG_7

D26

CFG_8

J23

CFG_9

B26

CFG_10

A23

CFG_11

C23

CFG_12

B24

CFG_13

B22

CFG_14

K24

CFG_15

C25

CFG_16

L23

CFG_17

L33

CFG_18

K32

CFG_19

K34

CFG_20

J35

PM_SYNC#

F6

PM_DPRSTP#

J39

PM_EXT_TS#_0

L39

PM_EXT_TS#_1

AY39

PWROK

BB18

RSTIN#

K28

THERMTRIP#

K36

DPRSLPVR

A7

NC_1

A49

NC_2

A52

NC_3

A54

NC_4

B54

NC_5

D55

NC_6

G55

NC_7

BE55

NC_8

BH55

NC_9

BK55

NC_10

BK54

NC_11

BL54

NC_12

BL52

NC_13

BL49

NC_14

BL7

NC_15

BL4

NC_16

BL2

NC_17

BK2

NC_18

BK1

NC_19

BH1

NC_20

BE1

NC_21

G1

NC_22

CANTIGA GMCH SFF_FCBGA1363

Compal Secret Data

Deciphered Date

2

BB32

SA_CK_0

BA25

SA_CK_1

BA33

SB_CK_0

BA23

SB_CK_1

BA31

SA_CK#_0

BC25

SA_CK#_1

BC33

SB_CK#_0

BB24

SB_CK#_1

BC35

SA_CKE_0

BE33

SA_CKE_1

BE37

SB_CKE_0

BC37

SB_CKE_1

BK18

SA_CS#_0

BK16

SA_CS#_1

BE23

SB_CS#_0

BC19

SB_CS#_1

BJ17

SA_ODT_0

BJ19

SA_ODT_1

BC17

SB_ODT_0

BE17

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST# DPLL_REF_CLK

DPLL_REF_CLK#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2

CFGRSVD

PM

NC

2

DMI_TXN_3 DMI_TXP_0

DMI_TXP_1

DMI

DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

ME

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

HDA

SMRCOMP

BL25

SMRCOMP#

BK26

SMRCOMP_VOH

BK32

SMRCOMP_VOL

BL31

+V_DDR_MCH_REF

BC51

SM_PWROK

AY37

SM_REXT

BH20

SM_DRAMRST#

BA37 B42

D42 B50 D50

R49 P50

AG55 AL49 AH54 AL47

AG53 AK50 AH52 AL45

AG49 AJ49 AJ47 AG47

AF50 AH50 AJ45 AG45

G33 G37 F38 F36 G35

R455

1 2

100K_0402_5%

G39

Refer to spec. pull low 100k.062909

AK52 AK54

M_PWROK

AW40 AL53

CL_VREF

AL55

F34 F32

SDVO_SCLK

B38

SDVO_SDAT

A37 C31 K42

TSATN#

D10

C29 B30 D28 A27 B28

Title

Size Document Number Rev

Custom

Date: Sheet

R43 80.6_0402_1%R43 80.6_0402_1% R44 80.6_0402_1%R44 80.6_0402_1%

D2 CH751H-40_SC76D2 CH751H-40_SC76 R26

R26 R46 10K_0402_1%@R46 10K_0402_1%@

R47 499_0402_1%R47 499_0402_1%

CLK_DREF_96M (16) CLK_DREF_96M# (16) CLK_DREF_SSC (16) CLK_DREF_SSC# (16)

CLK_MCH_3GPLL (16) CLK_MCH_3GPLL# (16)

DMI_TXN0 (19) DMI_TXN1 (19) DMI_TXN2 (19) DMI_TXN3 (19)

DMI_TXP0 (19) DMI_TXP1 (19) DMI_TXP2 (19) DMI_TXP3 (19)

DMI_RXN0 (19) DMI_RXN1 (19) DMI_RXN2 (19) DMI_RXN3 (19)

DMI_RXP0 (19) DMI_RXP1 (19) DMI_RXP2 (19) DMI_RXP3 (19)

VGATE(16,19,40)

M_PWROK(19)

T38T38

T39T39

SDVO_SCLK (24) SDVO_SDAT (24)

MCH_CLKREQ# (16)

MCH_ICH_SYNC# (19)

R58 54.9_0402_1%R58 54.9_0402_1%

1 2

HDA_BITCLK_MCH HDA_RST#_MCH HDA_SDIN2_MCH HDA_SDOUT_MCH HDA_SYNC_MCH

PM_EXTTS#0 PM_EXTTS#1

Compal Electronics, Inc.

Cantiga(1/6)-AGTL/DMI/DDR

NCL20 M/B LA-5631P Schematic

1

M_CLK_DDR0 (14) M_CLK_DDR1 (14) M_CLK_DDR2 (15) M_CLK_DDR3 (15)

M_CLK_DDR#0 (14) M_CLK_DDR#1 (14) M_CLK_DDR#2 (15) M_CLK_DDR#3 (15)

DDR_CKE0_DIMMA (14) DDR_CKE1_DIMMA (14) DDR_CKE2_DIMMB (15) DDR_CKE3_DIMMB (15)

DDR_CS0_DIMMA# (14) DDR_CS1_DIMMA# (14) DDR_CS2_DIMMB# (15) DDR_CS3_DIMMB# (15)

M_ODT0 (14) M_ODT1 (14) M_ODT2 (15) M_ODT3 (15)

1 2 1 2

2 1

1 2

0_0402_5%

1 2 1 2

SM_DRAMRST# (14,15)

VGATE M_PWROK

DFGT_VID_0 (39) DFGT_VID_1 (39) DFGT_VID_2 (39) DFGT_VID_3 (39) DFGT_VID_4 (39)

GFXVR_EN (39)

CL_CLK0 (19) CL_DATA0 (19)

CL_RST# (19)

0.1U_0402_16V4Z

R313

1 2

33_0402_5%

R62 10K_0402_5%R62 10K_0402_5%

1 2

R63 10K_0402_5%R63 10K_0402_5%

1 2

SYSON (29,31,37) DDR3_PG (37)

add it for change to use DDR3.070309

GMCH_PWROK

1 2

R106 0_0402_5%@R106 0_0402_5%@

1 2

R107 0_0402_5%R107 0_0402_5%

add it.062309

Modify in 9/26

+VCCP

12

1

C76

2

+VCCP

HDA_BITCLK_MCH (18) HDA_RST#_MCH (18)

HDA_SDIN2 (18) HDA_SDOUT_MCH (18) HDA_SYNC_MCH (18)

841Tuesday, October 20, 2009

1

+1.5V

DDR3

R52

R52 1K_0402_1%

1K_0402_1%

R53

R53 499_0402_1%

499_0402_1%

Change from 511 to 499.070709.

+3VS

of

0.1

5

D D

DDR_A_D[0..63](14)

C C

B B

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

U3D

AP46

SA_DQ_0

AU47

SA_DQ_1

AT46

SA_DQ_2

AU49

SA_DQ_3

AR45

SA_DQ_4

AN49

SA_DQ_5

AV50

SA_DQ_6

AP50

SA_DQ_7

AW47

SA_DQ_8

BD50

SA_DQ_9

AW49

SA_DQ_10

BA49

SA_DQ_11

BC49

SA_DQ_12

AV46

SA_DQ_13

BA47

SA_DQ_14

AY50

SA_DQ_15

BF46

SA_DQ_16

BC47

SA_DQ_17

BF50

SA_DQ_18

BF48

SA_DQ_19

BC43

SA_DQ_20

BE49

SA_DQ_21

BA43

SA_DQ_22

BE47

SA_DQ_23

BF42

SA_DQ_24

BC39

SA_DQ_25

BF44

SA_DQ_26

BF40

SA_DQ_27

BB40

SA_DQ_28

BE43

SA_DQ_29

BF38

SA_DQ_30

BE41

SA_DQ_31

BA15

SA_DQ_32

BE11

SA_DQ_33

BE15

SA_DQ_34

BF14

SA_DQ_35

BB14

SA_DQ_36

BC15

SA_DQ_37

BE13

SA_DQ_38

BF16

SA_DQ_39

BF10

SA_DQ_40

BC11

SA_DQ_41

BF8

SA_DQ_42

BG7

SA_DQ_43

BC7

SA_DQ_44

BC9

SA_DQ_45

BD6

SA_DQ_46

BF12

SA_DQ_47

AV6

SA_DQ_48

BB6

SA_DQ_49

AW7

SA_DQ_50

AY6

SA_DQ_51

AT10

SA_DQ_52

AW11

SA_DQ_53

AU11

SA_DQ_54

AW9

SA_DQ_55

AR11

SA_DQ_56

AT6

SA_DQ_57

AP6

SA_DQ_58

AL7

SA_DQ_59

AR7

SA_DQ_60

AT12

SA_DQ_61

AM6

SA_DQ_62

AU7

SA_DQ_63

CANTIGA GMCH SFF_FCBGA1363

DDR SYSTEM MEMORY A

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

4

BC21 BJ21 BJ41

BH22 BK20 BL15

AT50 BB50 BB46 BE39 BB12 BE7 AV10 AR9

AR47 BA45 BE45 BC41 BC13 BB10 BA7 AN7 AR49 AW45 BC45 BA41 BA13 BA11 BA9 AN9

BC23 BF22 BE31 BC31 BH26 BJ35 BB34 BH32 BB26 BF32 BA21 BG25 BH34 BH18 BE25

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_A_BS0 (14) DDR_A_BS1 (14) DDR_A_BS2 (14)

DDR_A_RAS# (14) DDR_A_CAS# (14)

DDR_A_WE# (14)

DDR_A_DM[0..7] (14)

DDR_A_DQS[0..7] (14)

DDR_A_DQS#[0..7] (14)

DDR_A_MA[0..14] (14)

3

DDR_B_D[0..63](15)

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8

DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

U3E

AP54 AM52 AR55 AV54

AM54

AN53 AT52 AU53

AW53

AY52 BB52 BC53 AV52

AW55

BD52 BC55 BF54 BE51 BH48 BK48 BE53 BH52 BK46

BJ47

BL45

BJ45 BL41 BH44 BH46 BK44 BK40

BJ39 BK10 BH10

BK6 BH6

BJ9

BL11

BG5

BJ5 BG3 BF4 BD4 BA3 BE5 BF2 BB4 AY4 BA1 AP2 AU1 AT2 AT4 AV4 AU3 AR3 AN1 AP4

AL3

AJ1 AK4 AM4 AH2 AK2

CANTIGA GMCH SFF_FCBGA1363

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

2

BJ13

SB_BS_0

BK12

SB_BS_1

BK38

SB_BS_2

BE21

SB_RAS#

BH14

SB_CAS#

BK14

SB_WE#

DDR_B_DM0

AP52

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

AY54 BJ49 BJ43 BH12 BD2 AY2 AJ3

AR53 BA53 BH50 BK42 BH8 BB2 AV2 AM2 AT54 BB54 BJ51 BH42 BK8 BC3 AW3 AN3

BJ15 BJ33 BH24 BA17 BF36 BH36 BF34 BK34 BJ37 BH40 BH16 BK36 BH38 BJ11 BL37

DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_DQS#0

DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

1

DDR_B_BS0 (15) DDR_B_BS1 (15) DDR_B_BS2 (15)

DDR_B_RAS# (15) DDR_B_CAS# (15) DDR_B_WE# (15)

DDR_B_DM[0..7] (15)

DDR_B_DQS[0..7] (15)

DDR_B_DQS#[0..7] (15)

DDR_B_MA[0..14] (15)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(2/6)-DDR2 A/B CH

NCL20 M/B LA-5631P Schematic

1

0.1

of

941Tuesday, October 20, 2009

5

DPST_PWM(22)

ENBKL(29)

+3VS

LVDS_DDC2_CLK(22) LVDS_DDC2_DATA(22)

D D

GMCH_ENVDD(22)

LVDS_A_C-(22) LVDS_A_C+(22)

LVDS_A_0-(22) LVDS_A_1-(22) LVDS_A_2-(22)

LVDS_A_0+(22) LVDS_A_1+(22) LVDS_A_2+(22)

R65 10K_0402_5%R65 10K_0402_5%

1 2

R66 10K_0402_5%R66 10K_0402_5%

1 2

Change from 4.22k to2.4k 072709.

R67 2.4K_0402_1%R67 2.4K_0402_1%

1 2

T42T42

LVDS_A_CLVDS_A_C+

LVDS_A_0LVDS_A_1LVDS_A_2-

LVDS_A_0+ LVDS_A_2+

D38 C37 K38

L37 J37 L35

B36 F50 H46 P44 K46 D46 B46 D44 B44

G45

F46

G41

C45 F44

G47

F40 A45

B40 A41 F42 D48

D40 C41

G43

B48

For EMI. 9/26

R68 75_0402_5%R68 75_0402_5%

1 2

R69 75_0402_5%R69 75_0402_5%

C C

1 2

R70 75_0402_5%R70 75_0402_5%

1 2

Del TV_LUMA & CRMA in 10/12.

Change to mount 072709.

J27 E27

G27

F26

B34 D34

Tie to GND. 9/28

R15

12

150_0402_1%

12

R16

GMCH_CRT_B GMCH_CRT_G GMCH_CRT_R

CRT_HSYNC_R CRT_VSYNC_R

1.02K_0402_1%

GMCH_CRT_B GMCH_CRT_G GMCH_CRT_R

150_0402_1%

GMCH_CRT_B(23) GMCH_CRT_G(23) GMCH_CRT_R(23)

GMCH_CRT_CLK(23)

GMCH_CRT_DATA(23)

GMCH_CRT_HSYNC(23) GMCH_CRT_VSYNC(23)

B B

A A

R71 30.1_0402_1%R71 30.1_0402_1% R73 30.1_0402_1%R73 30.1_0402_1%

Close to pin D32 and keep 30mil space to other part/trace.

1 2 1 2

12

R13

GMCH_CRT_CLK GMCH_CRT_DATA

150_0402_1%

J29

G29

F30 E29 D36

C35 J33 D32

G31

R76

1 2

4

U3C

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK

L_CTRL_DATA L_DDC_CLK L_DDC_DATA

L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TVA_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE CRT_GREEN CRT_RED CRT_IRTN CRT_DDC_CLK

CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

CANTIGA GMCH SFF_FCBGA1363

PEGCOMP trace width and spacing is 20/25 mils.

PEGCOMP

U45

PEG_COMPI

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

T44

D52 G49 K54 H50 M52 N49 P54 V46 Y50 V52 W49 AB54 AD46 AC55 AE49 AF54

E51 F48 J55 J49 M54 M50 P52 U47 AA49 V54 V50 AB52 AC47 AC53 AD50 AF52

L47 F52 P46 H54 L55 T46 R53 U49 T54 Y46 AB46 W53 Y54 AC49 AF46 AD54

J47 F54 N47 H52 L53 R47 R55 T50 T52 W47 AA47 W55 Y52 AB50 AE47 AD52

+3VS

R559 2.2K_0402_5%R559 2.2K_0402_5% R560 2.2K_0402_5%R560 2.2K_0402_5%

R561 2.2K_0402_5%

R561 2.2K_0402_5% R562 2.2K_0402_5%

R562 2.2K_0402_5%

Nu it 101309.

1 2

R469 100K_0402_5%R469 100K_0402_5%

PEG_COMPO

LVDS

TV

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_TX#_10

PCI-EXPRESS GRAPHICS

PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

VGA

1 2

R64 49.9_0402_1%R64 49.9_0402_1%

layout note: Place R64 <500mils to U4 pin U45&T44.

HDMI_HPD#LVDS_A_1+

HDMI_C_TX2HDMI_C_TX1HDMI_C_TX0HDMI_C_CLK-

HDMI_C_TX2+ HDMI_C_TX1+ HDMI_C_TX0+ HDMI_C_CLK+

1 2 1 2

1 2

@

1 2

@

ENBKL

3

+VCC_PEG

C1036 0.1U_0402_16V4ZC1036 0.1U_0402_16V4Z

1 2

C1037 0.1U_0402_16V4ZC1037 0.1U_0402_16V4Z

1 2

C1038 0.1U_0402_16V4ZC1038 0.1U_0402_16V4Z

1 2

C1039 0.1U_0402_16V4ZC1039 0.1U_0402_16V4Z

1 2

C1040 0.1U_0402_16V4ZC1040 0.1U_0402_16V4Z

1 2

C1041 0.1U_0402_16V4ZC1041 0.1U_0402_16V4Z

1 2

C1042 0.1U_0402_16V4ZC1042 0.1U_0402_16V4Z

1 2

C1043 0.1U_0402_16V4ZC1043 0.1U_0402_16V4Z

1 2

LVDS_DDC2_CLK LVDS_DDC2_DATA

GMCH_CRT_CLK GMCH_CRT_DATA

HDMI_HPD# (24)

TX2D- (24) TX1D- (24) TX0D- (24) TXCD- (24)

TX2D+ (24) TX1D+ (24) TX0D+ (24) TXCD+ (24)

2

CFG[2:0] FSB Freq select

CFG[4:3]

CFG5 (DMI select)

CFG6

CFG7 (Intel Management Engine Crypto strap)

CFG8

CFG9 (PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11 CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

Strap Pin Table

000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved

Reserved 0 = DMI x 2

1 = DMI x 4 0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable 0 =(TLS)chiper suite with no confidentiality 1 =(TLS)chiper suite with confidentiality

Reserved

0 = Reverse Lane,15->0, 14->1 1 = Normal Operation,Lane Number in order

0 = Enable 1 = Disable Reserved 00 = Reserved

01 = XOR Mode Enabled 10 = All Z Mode Enabled

ReservedCFG[15:14]

0 = Disabled 1 = Enabled

ReservedCFG[18:17]

0 = Normal Operation

1 = Reverse Lane

0 = Only PCIE or SDVO is operational. 1 = PCIE/SDVO are operating simu.

CFG5(8) CFG6(8) CFG7(8)

CFG9(8) CFG10(8) CFG12(8) CFG13(8) CFG16(8)

CFG19(8) CFG20(8)

*

(Lane number in Order)

R72 2.21K_0402_1%@R72 2.21K_0402_1%@

1 2

R74 2.21K_0402_1%@R74 2.21K_0402_1%@

1 2

R75 2.21K_0402_1%@R75 2.21K_0402_1%@

1 2

R77 2.21K_0402_1%@R77 2.21K_0402_1%@

1 2

R78 2.21K_0402_1%@R78 2.21K_0402_1%@

1 2

R79 2.21K_0402_1%@R79 2.21K_0402_1%@

1 2

R80 2.21K_0402_1%@R80 2.21K_0402_1%@

1 2

R81 2.21K_0402_1%@R81 2.21K_0402_1%@

1 2

R82 4.02K_0402_1%@R82 4.02K_0402_1%@

1 2

R83 4.02K_0402_1%@R83 4.02K_0402_1%@

1 2

1

*

(Default)11 = Normal Operation

*

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(3/6)-VGA/LVDS/TV

NCL20 M/B LA-5631P Schematic

10 41Tuesday, October 20, 2009

1

0.1

of

5

+3VS

BLM18PG181SN1D_0603

0.1U_0402_16V4Z

1

D D

C89

2

install 0.1U & 10U for wavy issue. 7/29

change 0.1U to 22U for wavy issue. 5/20

+1.5VS

C C

B B

+1.05VM_HPLL

+3VS_DAC_CRT

R86

12

10U_0603_6.3V

0.1U_0402_16V4Z

1

C90

C91

2

R94 0_0603_5%R94 0_0603_5%

1 2

9/27

+VCCP

+1.05VM_PEGPLL

1

9/27

C125

2

0.1U_0402_16V4Z

0.01U_0402_16V7K

+3VS

R87

1

C92

2

0.1U_0402_16V4Z

R97 0_0805_5%R97 0_0805_5%

1

C146

+

2

220U_D2_4VM_R15

Change to use 220uf_D2 090909.

R100 0_0805_5%R100 0_0805_5%

R87

BLM18PG181SN1D_0603

+1.5VS_PEG_BG

1

C105

2

1 2

1

R102 0_0603_5%R102 0_0603_5%

+1.8V

C126

2

0.1U_0402_16V4Z

+1.8V_TXLVDS

9/27

+3VS_DAC_BG

12

22U_0805_6.3V

1

C93

2

1

C102

C102 1000P_0402_50V7K

1000P_0402_50V7K

2

10U_0805_6.3V6M

0.01U_0402_16V7K

1

9/27

C94

+1.05VM_DPLLA

2

+1.05VM_DPLLB

+1.05VM_HPLL +1.05VM_MPLL

+1.05VM_PEGPLL

+1.05VM_A_SM

1U_0603_10V4Z

4.7U_0805_10V4Z

1

2

C111

C112

+1.05VM_A_SM_CK

10U_0805_6.3V6M

0.1U_0402_16V4Z

1

C119

C120

2

12

1

2

C113

1

2

1U_0603_10V4Z

1

C127

2

AW24 AW22

AW20 AW18 AW16

AW14

+1.8V_LVDS

M33

AF10

AE1

U43 U41

AJ43

AG43

AU24 AU22

AU21 AU19 AU18 AU16

AT16 AR16 AU15 AT15 AR15

AT24 AR24 AT22 AR22 AT21 AR21 AT19 AR19 AT18 AR18

AU27 AU28 AU29 AU31 AT31 AR31 AT29 AR29 AT28 AR28 AT27 AR27

AH12 AE43

M46

4

J31

L31

J45 L49

V44

L45

U3H

VCCA_CRT_DAC

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL

VCCA_LVDS1 VCCA_LVDS2

VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9 VCCA_SM_10 VCCA_SM_11 VCCA_SM_12 VCCA_SM_13 VCCA_SM_14 VCCA_SM_15 VCCA_SM_16 VCCA_SM_17

VCCA_SM_NCTF_1 VCCA_SM_NCTF_2 VCCA_SM_NCTF_3 VCCA_SM_NCTF_4 VCCA_SM_NCTF_5 VCCA_SM_NCTF_6 VCCA_SM_NCTF_7 VCCA_SM_NCTF_8 VCCA_SM_NCTF_9 VCCA_SM_NCTF_10

VCCA_SM_CK_4 VCCA_SM_CK_3 VCCA_SM_CK_2 VCCA_SM_CK_1 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8

VCCD_HPLL VCCD_PEG_PLL

VCCD_LVDS_1 VCCD_LVDS_2

CANTIGA GMCH SFF_FCBGA1363

CRTPLLA PEGA SM

A LVDS

POWER

LVDS

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13

VTT

VCCA_TV_DAC

TVD TV/CRT

VCC_HDA

HDA

VCCD_QDAC

VCCD_TVDAC

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

VCC_HV_1 VCC_HV_2

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4

PEG

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3

DMI

VTTLF1 VTTLF2 VTTLF3

VTTLF

3

Change to 330u_R9, casue high limitation. 12/14

R13 T12 R11 T10 R9 T8 R7 T6 R5 T4 R3 T2 R1

K30

R92

+VCC_HDA

0_0402_5%

A31

1 2

N34

+1.5VS_QDAC

N32

+1.5VS_TVDAC

9/27

M25 N24 M23

BK24 BL23 BJ23 BK22

T41 C33

A33

AB44 Y44 AC43 AA43

AM44 AN43 AL43

K14 Y12 P2

+1.5V_SM_CK

0.47U_0603_10V7K

1

C128

2

+V1.05VM_AXF

+1.8V_TXLVDS

+VCC_PEG

+1.05VM_DMI

0.47U_0603_10V7K

2.2U_0805_16V4Z

1

2

C85

@

9/29

0.47U_0603_10V7K

1

C129

2

4.7U_0805_10V4Z

1

C87

2

C86

+3VS_TVDAC

0.01U_0402_16V7K

Disable HDMI audio

+VCC_HDA

R321 0_0603_5%R321 0_0603_5%

0.1U_0402_16V4Z

1

C1045

2

DDR3

+3VS_HV

0.1U_0402_16V4Z

1

2

C121

1

C130

2

1

2

C88

1

C100

2

+VCCP

1

2

C84

0.1U_0402_16V4Z

1 2

+

330U_D2E_2.5VM_R9

R91

1 2

BLM18PG181SN1D_0603

1

C101

2

Enable HDMI audio

+VCCP

9/27

+3VS

+1.5VS

9/27

2 1

D1 CH751H-40_SC76D1 CH751H-40_SC76

+3VS

2

+1.05VM_DPLLA +VCCP

BLM18PG181SN1D_0603

22U_0805_6.3V

C80

1

C81

2

0.1U_0402_16V4Z

+1.05VM_DPLLB

BLM18PG181SN1D_0603

22U_0805_6.3V

C95

1

C96

2

0.1U_0402_16V4Z

+1.05VM_HPLL

1 2

BLM18PG181SN1D_0603

1

2

C103

C104

0.1U_0402_16V4Z

4.7U_0805_10V4Z

+1.05VM_MPLL

1 2

BLM18PG181SN1D_0603

1

C106

C107

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

+1.8V_TXLVDS +1.8V

+1.05VM_PEGPLL

R98 0_0603_5%R98 0_0603_5%

1

C115

2

C114

1000P_0402_50V7K

BLM18PG121SN1D_0603

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C123

C122

2

+VCCP_D

R103 10_0402_5%R103 10_0402_5%

1 2

+1.5VS_QDAC

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C132

C131

2

1 2

10U_0805_6.3V6M@

1 2

4.7U_0603_6.3V

1

C133

2

R84

1 2

R88

1 2

9/27

+VCCP

R93

9/27

+VCCP

R95

9/27

+VCCP

L1

1 2

BLM18PG181SN1D_0603

9/27

+VCCP

9/29

R104 0_0402_5%R104 0_0402_5%

R105

+V1.05VM_AXF

10U_0805_10V4Z

C82

+1.5V_SM_CK

0.1U_0402_16V4Z

R90

0_0603_5%

1 2

10U_0603_6.3V6M

1

C99

2

+1.5VS_TVDAC

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C108

2

+VCC_PEG

10U_0805_6.3V6M

4.7U_0805_10V4Z

220U_D2_4VM_R15

1

C118

C117

2

+1.05VM_DMI

R101 0_0603_5%R101 0_0603_5%

1 2

0.1U_0402_16V4Z

1

C124

2

1 2

+1.5VS

1

R85 0_0603_5%R85 0_0603_5%

1 2

1U_0603_10V4Z

1

C83

2

DDR3

R89 0_0603_5%R89 0_0603_5%

1 2

Change package 081709.

10U_0603_6.3V6M

C98

1

C97

2

R96

1 2

BLM18PG181SN1D_0603

1

C109

2

R99 0_0805_5%R99 0_0805_5%

1 2

1

+

C116

2

9/21

+3VS_HV

+VCCP

9/27

+VCCP

+1.5V

+1.5VS

9/21

+VCCP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

install 4.7U for wavy issue. 7/29

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(4/6)-PWR

NAV30 M/B LA-5451P Schematic

1

0.1

of

11 41Tuesday, October 20, 2009

5

Extnal Graphic: 1210.34mA integrated Graphic: 1930.4mA

U3F

9/21

C144

+VCCP

0.1U_0402_16V4Z

C145

1

2

D D

0.22U_0402_10V4Z

330U_D2E_2.5VM_R9

10U_0805_6.3V6M

1

C141

+

2

C C

B B

A A

0.22U_0402_10V4Z

C142

C143

1

2

1

2

U3F

AT41

VCC_1

AR41

VCC_2

AN41

VCC_3

AJ41

VCC_4

AH41

VCC_5

AD41

VCC_6

AC41

VCC_7

Y41

VCC_8

W41

VCC_9

AT40

VCC_10

AM40

VCC_11

AL40

VCC_12

AJ40

VCC_13

AH40

VCC_14

AG40

VCC_15

AE40

VCC_16

AD40

VCC_17

AC40

VCC_18

AA40

VCC_19

Y40

VCC_20

AN35

VCC_21

AM35

VCC_22

AJ35

VCC_23

AH35

VCC_24

AD35

VCC_25

AC35

VCC_26

W35

VCC_27

AM34

VCC_28

AL34

VCC_29

AJ34

VCC_30

AH34

VCC_31

AG34

VCC_32

AE34

VCC_33

AD34

VCC_34

AC34

VCC_35

AA34

VCC_36

Y34

VCC_37

W34

VCC_38

AM32

VCC_39

AL32

VCC_40

AJ32

VCC_41

AH32

VCC_42

AE32

VCC_43

AD32

VCC_44

AA32

VCC_45

AM31

VCC_46

AL31

VCC_47

AJ31

VCC_48

AH31

VCC_49

AM29

VCC_50

AL29

VCC_51

AM28

VCC_52

AL28

VCC_53

AJ28

VCC_54

AM27

VCC_55

AL27

VCC_56

AM25

VCC_57

AL25

VCC_58

AJ25

VCC_59

AM24

VCC_60

N36

VCC_61

CANTIGA GMCH SFF_FCBGA1363

4

VCC CORE

POWER

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31

VCC NCTF

VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38

AT38 AR38 AN38 AM38 AL38 AG38 AE38 AA38 Y38 W38 U38 T38 R38 AT37 AR37 AN37 AM37 AL37 AJ37 AH37 AG37 AE37 AD37 AC37 AA37 Y37 W37 U37 T37 R37 AT35 AR35 U35 AT34 AR34 U34 T34 R34

9/21

+VCCP

+1.5V

Change to D2 size.073109.

C110

330U_D2E_2.5VM_R9

C110

3

+VCCGFX

1

+

2

DDR3

330U_B2_2.5VM_R15M

1

+

2

1

C147

2

10U_0805_6.3V

C137

10U_0805_6.3V6M

C138

1

2

1

C148

2

10U_0805_6.3V

0.01U_0402_16V7K

10U_0805_6.3V6M

C139

1

2

1

C149

C150

2

1U_0603_10V4Z

6326.84mA

T43PAD T43PAD T44PAD T44PAD

3000mA

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42 VCC_AXG_43 VCC_AXG_44 VCC_AXG_45 VCC_AXG_46 VCC_AXG_47 VCC_AXG_48 VCC_AXG_49 VCC_AXG_50 VCC_AXG_51 VCC_AXG_52 VCC_AXG_53 VCC_AXG_54 VCC_AXG_55 VCC_AXG_56 VCC_AXG_57 VCC_AXG_58 VCC_AXG_59 VCC_AXG_60 VCC_AXG_61

VCC_AXG_SENSE VSS_AXG_SENSE

2

VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23

POWER

VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31

VCC SMVCC GFX

VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39

VCC GFX NCTF

VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44

VCC GFX

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8 VCC_AXG_NCTF_9

VCC_AXG_62 VCC_AXG_63 VCC_AXG_64 VCC_AXG_65 VCC_AXG_66 VCC_AXG_67 VCC_AXG_68 VCC_AXG_69 VCC_AXG_70 VCC_AXG_71 VCC_AXG_72 VCC_AXG_73 VCC_AXG_74 VCC_AXG_75 VCC_AXG_76 VCC_AXG_77 VCC_AXG_78 VCC_AXG_79 VCC_AXG_80

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

T32 U31 T31 R31 U29 T29 R29 U28 U27 T27 R27 U25 T25 R25 U24 U22 T22 R22 U21 T21 R21 AM19 AL19 AH19 AG19 AE19 AD19 AC19 W19 U19 AM18 AL18 AJ18 AH18 AG18 AE18 AD18 AC18 AA18 Y18 W18 U18 T18 R18

AJ16 AH16 AD16 AC16 AA16 U16 T16 R16 AM15 AL15 AJ15 AH15 AG15 AE15 AA15 Y15 W15 U15 T15

AU45 BF52 BB38 BA19 BE9 AU9 AL9

+VCCGFX

change from +VCCP to +VCCGFX 062909.

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

U3G

BB36

BE35 AW34 AW32

BK30

BH30

BF30

C140

2

BD30

BB30 AW30

1

BL29

BJ29 BG29 BE29 BC29 BA29 AY29 BK28 BH28 BF28 BD28 BB28 BL27

BJ27 BG27 BE27 BC27 BA27 AY27

AW26

BF24 BL19 BB16

W32 AG31 AE31 AD31 AC31 AA31

Y31

W31 AH29

0.1U_0402_16V4Z

AG29 AE29 AD29 AC29 AA29

Y29

W29 AH28 AG28 AE28 AA28 AH27 AG27 AE27 AD27 AC27 AA27

Y27

W27 AH25 AD25 AC25

W25

AJ24 AH24 AG24 AE24 AD24 AC24 AA24

Y24

W24

AM22

AL22

AJ22 AH22 AG22 AE22 AD22 AC22 AA22

AM21

AL21

AJ21 AH21 AD21 AC21 AA21

Y21

W21

AM16

AL16

AG13 AE13

1

2

C134

0.1U_0402_16V4Z

C156 0.1U_0402_16V4ZC156 0.1U_0402_16V4Z

1

2

1

2

C135

C136

4.7U_0805_10V4Z

0.22U_0402_10V4Z

C157 0.1U_0402_16V4ZC157 0.1U_0402_16V4Z

C151 0.22U_0603_10V7KC151 0.22U_0603_10V7K

1

2

C152 0.22U_0603_10V7KC152 0.22U_0603_10V7K

1

2

C155 1U_0603_10V4ZC155 1U_0603_10V4Z

C154 1U_0603_10V4ZC154 1U_0603_10V4Z

C153 0.47U_0402_6.3V6KC153 0.47U_0402_6.3V6K

1

2

CANTIGA GMCH SFF_FCBGA1363

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(5/6)-PWR/GND

NCL20 M/B LA-5631P Schematic

1

0.1

of

12 41Tuesday, October 20, 2009

5

U3I

BA55

VSS_1

AU55

VSS_2

AN55

VSS_3

AJ55

VSS_4

AE55

VSS_5

AA55

VSS_6

U55

VSS_7

N55

VSS_8

BD54

VSS_9

BG53

VSS_10

AJ53

VSS_11

AE53

D D

C C

B B

A A

VSS_12

AA53

VSS_13

U53

VSS_14

N53

VSS_15

J53

VSS_16

G53

VSS_17

E53

VSS_18

K52

VSS_19

BG51

VSS_20

BA51

VSS_21

AW51

VSS_22

AU51

VSS_23

AR51

VSS_24

AN51

VSS_25

AL51

VSS_26

AJ51

VSS_27

AG51

VSS_28

AE51

VSS_29

AC51

VSS_30

AA51

VSS_31

W51

VSS_32

U51

VSS_33

R51

VSS_34

N51

VSS_35

L51

VSS_36

J51

VSS_37

G51

VSS_38

C51

VSS_39

BK50

VSS_40

AM50

VSS_41

K50

VSS_42

BG49

VSS_43

E49

VSS_44

C49

VSS_45

BD48

VSS_46

BB48

VSS_47

AY48

VSS_48

AV48

VSS_49

AT48

VSS_50

AP48

VSS_51

AM48

VSS_52

AK48

VSS_53

AH48

VSS_54

AF48

VSS_55

AD48

VSS_56

AB48

VSS_57

Y48

VSS_58

V48

VSS_59

T48

VSS_60

P48

VSS_61

M48

VSS_62

K48

VSS_63

H48

VSS_64

BL47

VSS_65

BG47

VSS_66

E47

VSS_67

C47

VSS_68

A47

VSS_69

BD46

VSS_70

AY46

VSS_71

AM46

VSS_72

AK46

VSS_73

AH46

VSS_74

BG45

VSS_75

AE45

VSS_76

AC45

VSS_77

AA45

VSS_78

W45

VSS_79

R45

VSS_80

N45

VSS_81

E45

VSS_82

BD44

VSS_83

BB44

VSS_84

AV44

VSS_85

AK44

VSS_86

AH44

VSS_87

AF44

VSS_88

AD44

VSS_89

K44

VSS_90

H44

VSS_91

BL43

VSS_92

BG43

VSS_93

AY43

VSS_94

AR43

VSS_95

W43

VSS_96

R43

VSS_97

M43

VSS_98

E43

VSS_99

CANTIGA GMCH SFF_FCBGA1363

VSS

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198

C43 A43 BD42 H42 BG41 AY41 AU41 AM41 AL41 AG41 AE41 AA41 R41 M41 E41 BD40 AU40 AR40 AN40 W40 U40 T40 R40 K40 H40 BL39 BG39 BA39 E39 C39 A39 BD38 AU38 H38 BG37 AU37 M37 E37 BD36 AW36 H36 BL35 BG35 AY35 AU35 AL35 AG35 AE35 AA35 Y35 M35 E35 A35 BD34 AU34 AN34 H34 BL33 BG33 AY33 E33 BD32 AU32 AN32 AG32 AC32 Y32 H32 B32 BJ31 BG31 AY31 AN31 M31 E31 N30 H30 AN29 AJ29 M29 A29 AW28 AN28 AD28 AC28 Y28 W28 H28 F28 AN27 AJ27 M27 BF26 BD26 N26 H26 BJ25 AY25 AU25

4

3

U3J

AN25

VSS_199

AG25

VSS_200

AE25

VSS_201

AA25

VSS_202

Y25

VSS_203

E25

VSS_204

A25

VSS_205

BD24

VSS_206

AN24

VSS_207

AL24

VSS_208

H24

VSS_209

BG23

VSS_210

AY23

VSS_211

E23

VSS_212

BD22

VSS_213

BB22

VSS_214

AN22

VSS_215

Y22

VSS_216

W22

VSS_217

H22

VSS_218

BL21

VSS_219

BG21

VSS_220

AY21

VSS_221

AN21

VSS_222

AG21

VSS_223

AE21

VSS_224

M21

VSS_225

E21

VSS_226

A21

VSS_227

BD20

VSS_228

H20

VSS_229

BG19

AY19

M19

BD18

BL17

BG17

AY17

M17

BD16 AN16 AG16

AE16

W16

BG15

AY15 AN15 AD15 AC15

M15

BD14

BL13 BG13

AY13 AU13 AR13

AJ13 AC13

AA13

W13 M13

BD12

AV12

AP12 AM12

AK12

AB12

BG11 AG11

BD10

AY10

AP10

BG9

BD8

E19 N18

H18

E17 A17

Y16 N16

H16

R15 E15 H14

U13 E13

A13

V12 P12 H12

E11

H10 BL9

E9 A9

BB8 AY8 AV8 AT8 AP8

VSS

VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299

CANTIGA GMCH SFF_FCBGA1363

VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12

VSS NCTF

VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23

VSS SCB

VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358

VSS_359 VSS_360 VSS_361 VSS_362

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5 VSS_SCB_6 VSS_SCB_7

2

AM8 AK8 AH8 AF8 AD8 AB8 Y8 V8 P8 M8 K8 H8 BJ7 E7 BF6 BC5 BA5 AW5 AU5 AR5 AN5 AL5 AJ5 AG5 AE5 AC5 AA5 W5 U5 N5 L5 J5 G5 C5 BH4 BE3 U3 E3 BC1 AW1 AR1 AL1 AG1 AC1 W1 N1 J1 AU43 BB42 AW38 BA35 L29 N28 N22 N20 N14 AL13 B10 AN13

N42 N40 N38 M39

AJ38 AH38 AD38 AC38 T35 R35 AT32 AR32 U32 R32 T28 R28 AT25 AR25 T24 R24 AN19 AJ19 AA19 Y19 T19 R19 AN18

BL55 BL1 A55 D1 B55 B2 A4

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(6/6)-PWR/GND

NCL20 M/B LA-5631P Schematic

1

0.1

of

13 41Tuesday, October 20, 2009

5

DDR_A_DQS#[0..7](9)

DDR_A_D[0..63](9)

DDR_A_DM[0..7](9)

DDR_A_DQS[0..7](9)

DDR_A_MA[0..14](9)

D D

Layout Note:

C C

Layout Note: Place near JP4.203 & JP4.204

B B

Place near JP4

+1.5V

10U_0603_6.3V6M

1

C1462

C1461

2

+0.75V

1U_0603_10V4Z

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

C1478

1

2

C1466

10U_0805_6.3V6M

0.1U_0402_16V4Z

10U_0603_6.3V6M

1

2

C1468

C1467

1

2

10U_0603_6.3V6M

1

C1463

C1464

2

1U_0603_10V4Z

2

C1474

C1475

1

+1.5V

10U_0603_6.3V6M

1

C1465

2

1U_0603_10V4Z

2

C1477

C1476

1

EMI 1215

1

C1479

A A

C1479

10P_0402_50V8J

2

5

1

12

C1480

C1481

47P_0402_50V8J

120P_0402_50V8

2

C1459

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1

2

C1469

1

2

4

1K_0402_1%

C1460

1

2

0.1U_0402_16V4Z

1

2

4

+1.5V

12

R1577

+V_DDR3_DIMM_REF

12

R1578

R1578 1K_0402_1%

1K_0402_1%

330U_B2_2.5VM_R15M

1

C1471

C1470

+

2

Change package 072709.

3

+V_DDR3_DIMM_REF

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_CKE0_DIMMA(8)

DDR_A_BS2(9)

M_CLK_DDR0(8) M_CLK_DDR#0(8)

DDR_A_BS0(9)

DDR_A_WE#(9)

DDR_A_CAS#(9) M_ODT0 (8)

DDR_CS1_DIMMA#(8)

+3VS

C1482

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR_CKE0_DIMMA

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 M_CLK_DDR0

M_CLK_DDR#0 DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

R1581 10K_0402_5%R1581 10K_0402_5%

1 2

1

C1483

2

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

0.1U_0402_16V4Z

2007/09/29 2007/09/29

+1.5V +1.5V

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

FOX_AS0A626-U2RN-7F

CONN@ SP07000IM00

Compal Secret Data

Deciphered Date

R1582

10K_0402_5%

12

+0.75V

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

A15 A14

VDD

A11

VDD

CK1

CK1#

VDD

BA1

RAS#

VDD

S0#

ODT0

VDD ODT1

VDD

VREF_CA

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

SCL VTT

BOSS1 BOSS2

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28

SM_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDR_CKE1_DIMMA

74 76 78

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86

A7

88

DDR_A_MA6

90

A6 A4

A2 A0

NC

2

92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0 M_CLK_DDR1

M_CLK_DDR#1 DDR_A_BS1

DDR_A_RAS# DDR_CS0_DIMMA#

M_ODT0 M_ODT1

DDR_VREF_CA_DIMMA DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63 PM_EXTTS#0

CLK_SMBDATA CLK_SMBCLK

1

SM_DRAMRST# (8,15)

DDR_CKE1_DIMMA (8)

M_CLK_DDR1 (8) M_CLK_DDR#1 (8)

DDR_A_BS1 (9) DDR_A_RAS# (9)

DDR_CS0_DIMMA# (8)

1

2

+V_DDR3_DIMM_REF

0.1U_0402_16V4Z

1

C1473

2

+0.75V

M_ODT1 (8)

R1580

1 2

0_0402_5%

PM_EXTTS#0 (8) CLK_SMBDATA (15,16) CLK_SMBCLK (15,16)

C1472

2.2U_0603_6.3V4Z

DDR3 SO-DIMM A REVERSE

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

NCL20 M/B LA-5631P Schematic

1

14 41Tuesday, October 20, 2009

0.1

of

5

DDR_B_DQS#[0..7](9)

DDR_B_D[0..63](9)

DDR_B_DM[0..7](9)

DDR_B_DQS[0..7](9)

DDR_B_MA[0..14](9)

D D

Layout Note: Place near JDIMM2

Layout Note: Place these 4 Caps near Command

+1.5V

10U_0603_6.3V6M

1

C1487

C1486

C C

B B

2

Layout Note: Place near JDIMM2.203 & JDIMM2.204

+0.75V

1U_0603_10V4Z

2

C1497

1

10U_0603_6.3V6M

C1489

1

C1490

2

1

2

C1501

C1500

2

1

C1488

2

1U_0603_10V4Z

2

C1499

C1498

1

+1.5V

and Control signals of DIMMA

0.1U_0402_16V4Z

C1491

0.1U_0402_16V4Z

10U_0603_6.3V6M

C1492

1

2

10U_0603_6.3V6M

10U_0805_6.3V6M

0.1U_0402_16V4Z

C1493

1

2

EMI 1215

1

C1504

10P_0402_50V8J

2

A A

5

1

12

C1505

C1506

47P_0402_50V8J

120P_0402_50V8

2

C1494

0.1U_0402_16V4Z

1

2

4

330U_B2_2.5VM_R15M

1

C1496

C1495

+

2

Change package 072709.

4

3

+V_DDR3_DIMM_REF

DDR_B_D0

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1

C1484

2

DDR_B_BS2(9)

M_CLK_DDR2(8) M_CLK_DDR#2(8)

DDR_B_BS0(9)

DDR_B_WE#(9)

DDR_B_CAS#(9) M_ODT2 (8)

DDR_CS3_DIMMB#(8)

+3VS

C1507

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_B_D1 DDR_B_DM0 DDR_B_D2

C1485

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2 DDR_B_D18

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 M_CLK_DDR2

M_CLK_DDR#2 DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D50

DDR_B_D51 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

R1584 10K_0402_5%R1584 10K_0402_5%

1 2

1

C1508

2

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

3

+1.5V +1.5V

JDIMM2

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

1 2

R1585 10K_0402_5%R1585 10K_0402_5%

2007/09/29 2007/09/29

201

SA1

203

VTT

205

GND1

207

GND2

FOX_AS0A626-U2RN-7F

Compal Secret Data

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

A15 A14

VDD

A11

A7

VDD

A6 A4

VDD

A2 A0

VDD

CK1

CK1#

VDD

BA1

RAS#

VDD

S0#

ODT0

VDD ODT1

NC

VDD

VREF_CA

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

SCL VTT

BOSS1 BOSS2

+0.75V

CONN@SP07000IO00

Deciphered Date

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

2

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 SM_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 M_CLK_DDR3

M_CLK_DDR#3 DDR_B_BS1

DDR_B_RAS# DDR_CS2_DIMMB#

M_ODT2 M_ODT3

DDR_VREF_CA_DIMMB

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63 PM_EXTTS#1

CLK_SMBDATA CLK_SMBCLK

+0.75V

2

SM_DRAMRST# (8,14)

R1583

1 2

same with intel DDR3 CRB connection

1

DDR_CKE3_DIMMB (8)DDR_CKE2_DIMMB(8)

M_CLK_DDR3 (8) M_CLK_DDR#3 (8)

DDR_B_BS1 (9) DDR_B_RAS# (9)

DDR_CS2_DIMMB# (8)

M_ODT3 (8)

0_0402_5%

2.2U_0603_6.3V4Z

PM_EXTTS#1 (8) CLK_SMBDATA (14,16) CLK_SMBCLK (14,16)

C1502

1

2

+V_DDR3_DIMM_REF

0.1U_0402_16V4Z

1

C1503

2

DDR3 SO-DIMM B REVERSE

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

NCL20 M/B LA-5631P Schematic

15 41Tuesday, October 20, 2009

1

0.1

of

A

FSLC FSLB FSLA CPU

CLKSEL2 CLKSEL1 CLKSEL0

MHz

0 0 0 266 100 33.3

10

01

1 1

CLK_REQ#

200 100 33.3

0 1

Table : ICS9LPRS387

Control

CR#_10(WLAN) PCIEX10 PCIEX0 CR#_6(MCH) CR#_4(NEW CARD) CR#_9(MINI CARDII)

PCIEX6 PCIEX4 PCIEX9

SRC7(VGA_CLK): Discrete VGA[Enable] UMA[Disable]

+3VS

1 2

R343 10K_0402_5%R343 10K_0402_5%

CLK_PCI2=1, Trusted Mode Enable(No overclocking allowed)

1 2

R344 10K_0402_5%@R344 10K_0402_5%@

+3VS

@

1 2

R379 10K_0402_5%

2 2

add it.073109

3 3

4 4

CLKSEL2

R379 10K_0402_5%

1 2

R345 10K_0402_5%R345 10K_0402_5%

+3VS

CLK_PCI5=0, Pin63,64 is SRC_CLK CLK_PCI5=1, Pin63,64 is ITP_CLK

@

1 2

R380 10K_0402_5%

1 2

R346 10K_0402_5%R346 10K_0402_5%

CLK_PCI4=0, Pin28, 29 is SRC_CLK Pin24, 25 is DOT96_CLK

1 2

R347 10K_0402_5%@R347 10K_0402_5%@

R353

2.2K_0402_5%

CLKSEL0

1 2

R356

R356 1K_0402_5%@

1K_0402_5%@

+VCCP

CLKSEL1

1 2

R366

R366 0_0402_5%@

0_0402_5%@

+VCCP

R373

R373 10K_0402_5%

10K_0402_5%

1 2

R375

R375 0_0402_5%@

0_0402_5%@

A

+VCCP

1 2

CLK_PCI2

mount to Enable ITP_CLK

CLK_PCI5

CLK_PCI4

CK_PWRGD

R352

56_0402_5%@

56_0402_5%@ R354

R354 1K_0402_5%

1K_0402_5%

1 2

R357

R357 0_0402_5%

0_0402_5%

R360

1K_0402_5%@

1K_0402_5%@ R361

R361 1K_0402_5%

1K_0402_5%

1 2

R367

R367 0_0402_5%

0_0402_5%

R372

1K_0402_5%@

1K_0402_5%@ R374

R374 1K_0402_5%

1K_0402_5%

1 2

R376

R376 0_0402_5%

0_0402_5%

B

SRC

PCI

MHz

33.3100166

Free-Run

PCIEX1

MCH_CLKSEL0 (8)

CPU_BSEL0 (5)

MCH_CLKSEL1 (8)

CPU_BSEL1 (5)

MCH_CLKSEL2 (8)

CPU_BSEL2 (5)

B

+3VS

D

S

1 2 13

R342

R342 10K_0402_5%

10K_0402_5%

@

CK505_PWRGD

2

G

Q3

Q3 2N7002_SOT23

2N7002_SOT23

@

+VCCP

10U_0805_10V4Z

CLKEN# (40)

Change to use 22pf.091509

ICH_SMBDATA(19,28)

ICH_SMBCLK(19,28)

C

L2 FBMA-L11-201209-221LMA30T_0805L2 FBMA-L11-201209-221LMA30T_0805

C1109

C1102

0.1U_0402_16V4Z

1

2

+CLK_VDD

1 2

R1551 0_0603_5%R1551 0_0603_5%

1 2

R1552 0_0603_5%@R1552 0_0603_5%@

add it.062309

CLK_PCI_LPC(29)

CLK_PCI_ICH(17)

1 2

22P_0402_50V8J

22P_0402_50V8J 22P_0402_50V8J

22P_0402_50V8J

C1121

1 2

CLK_ICH_48M(19) CLK_SD_48M(30)

CLK_ICH_14M(19)

C

+CLK_VDDSRC

12

C1455

C1103

47P_0402_50V8J

10U_0805_10V4Z

1

@

2

add it.071109

+1.5VSCLK_VDD

1

C1450

0.1U_0402_16V4Z

10U_0603_6.3V6M

+CLK_VDDSRC

+1.5VSCLK_VDD

CLK_PCI_LPC CLK_PCI3

CLK_PCI_ICH CLK_PCI5

CK_PWRGD(19)

C1120

0.1U_0402_16V4Z

2

R1563 0_0603_5%R1563 0_0603_5%

R1564 0_0603_5%@R1564 0_0603_5%@

H_STP_CPU#(19)

H_STP_PCI#(19)

R348 33_0402_5%R348 33_0402_5%

R349 33_0402_5%R349 33_0402_5%

VGATE(8,19,40)

12

Y3

14.31818MHz_20P_FSX8L14.318181M20FDB

CLK_ICH_48M CLK_SD_48M

CLK_ICH_14M

10P_0402_50V8J@C1266

10P_0402_50V8J

C1289

10P_0402_50V8J@C1289

10P_0402_50V8J

1

2

@

add it for EMI.072409.

+3VS

R362

4.7K_0402_5%

1 2

2

6 1

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q4A

Q4A

+3VS

R369

4.7K_0402_5%

1 2

5

3

4

Q4B

Q4B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

C1104

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

C1451

2

+CLK_VDDSRC

1 2

0.1U_0402_16V4Z

12

R355

R355 R358

R359

C1264

10P_0402_50V8J@C1264

10P_0402_50V8J

C1266

1

2

@

CLK_SMBDATA

CLK_SMBCLK

D

C1107

C1106

C1105

0.1U_0402_16V4Z

1

2

1

C1452

0.1U_0402_16V4Z

2

C1454

R3500_0402_5% R3500_0402_5%

12

R3510_0402_5% @ R3510_0402_5% @

12

@R358

@

22_0402_5%

+3VS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

0.1U_0402_16V4Z

1

2

1

C1453

2

1

2

H_STP_CPU# H_STP_PCI#

CLK_PCI2

CLK_PCI4

CK505_PWRGD

CLK_XTALIN CLK_XTALOUT

12

33_0402_5%

12

33_0402_5%

Issued Date

0.1U_0402_16V4Z

+CLK_VDD+1.5VS

CLKSEL0 CLKSEL1 CLKSEL2

0.1U_0402_16V4Z

1

2

6 19 72 12 27 55

52 38 62 31 66 23

53 54

13 14 15 16 17

1

5

4

11

20

2

7

8

69

3 18 22 30 26 34 59 42

73

E

C1108

1

2

U27

ICS9LPRS387, PN:SA000020H10 SLG8SP556V, PN:SA000020K00

VDDREF VDD48 VDDCPU VDDPCI VDDPLL3 VDDSRC

VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDPLL3_IO VDDCPU_IO VDD96_IO

CPU_STOP# PCI_STOP#

PCI1 PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN

CK_PWRGD/PD#

X1 X2

NC

USB_48MHz/FSLA FSLB/TEST_MODE FSLC/TEST_SEL/REF0 REF1

GNDCPU GNDREF GNDPCI GND48 GND GND GNDSRC GNDSRC GNDSRC

GND_THERMAL_PAD

ICS9LPRS387BKLFT_MLF72_10x10

2009/02/27 2010/01/21

E

+3VS

SRCT0_LPR/DOTT_96_LPR

SRCC0_LPR/DOTC_96_LPR

27MHz_NonSS/SRCT1_LPR/SE1

27MHz_SS/SRCC1_LPR/SE2

SRCT2_LPR/SATAT_LPR SRCC2_LPR/SATAC_LPR

CPUT2_ITP_LPR/SRCT8_LPR CPUC2_ITP_LPR/SRCC8_LPR

Compal Secret Data

Deciphered Date

C1110

10U_0805_10V4Z

1

2

CPUT0_LPR_F

CPUC0_LPR_F

CPUT1_LPR_F

CPUC1_LPR_F

SRCT3_LPR

SRCC3_LPR

SRCT4_LPR SRCC4_LPR

SRCT6_LPR SRCC6_LPR

SRCT7_LPR SRCC7_LPR

SRCT9_LPR SRCC9_LPR

SRCT10_LPR

SRCC10_LPR

SRCT11_LPR

SRCC11_LPR

F

0.1U_0402_16V4Z

SDATA

SCLK

CR#3 CR#4 CR#6 CR7#

CR#9 CR10# CR#11

CR#A

F

L3 FBMA-L11-201209-221LMA30T_0805L3 FBMA-L11-201209-221LMA30T_0805 C1117

C1117

1

2

9 10

71 70

68 67

24 25

28 29

32 33

35 36

39 40

57 56

61 60

64 63

44 45

50 51

48 47

37 41 58 65 43 49 46 21

+CLK_VDD

12

C1111

C1456

47P_0402_50V8J

add it.071109

CLK_SMBDATA CLK_SMBCLK

CLK_CPU_BCLK CLK_CPU_BCLK#

CLK_MCH_BCLK CLK_MCH_BCLK#

CLK_DREF_96M CLK_DREF_96M#

CLK_DREF_SSC CLK_DREF_SSC#

CLK_PCIE_SATA CLK_PCIE_SATA#

CLK_PCIE_ICH CLK_PCIE_ICH#

CLK_PCIE_WWAN CLK_PCIE_WWAN#

CLK_MCH_3GPLL CLK_MCH_3GPLL#

C1456

1

2

@

C1112

10U_0805_10V4Z

0.1U_0402_16V4Z

1

2

UMA: disable this pair by BIOS

CLK_PCIE_MINI2 CLK_PCIE_MINI2#

CLK_PCIE_LAN CLK_PCIE_LAN#

1 2

R363 10K_0402_5%R363 10K_0402_5%

1 2

R364 10K_0402_5%R364 10K_0402_5%

1 2

R368 10K_0402_5%R368 10K_0402_5%

1 2

R370 10K_0402_5%R370 10K_0402_5%

1 2

R371 10K_0402_5%R371 10K_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

G

H

Clock Generator

C1113

C1114

0.1U_0402_16V4Z

CLK_SMBDATA (14,15) CLK_SMBCLK (14,15)

CLK_CPU_BCLK (4) CLK_CPU_BCLK# (4)

CLK_MCH_BCLK (8) CLK_MCH_BCLK# (8)

CLK_DREF_96M (8) CLK_DREF_96M# (8)

CLK_DREF_SSC (8) CLK_DREF_SSC# (8)

CLK_PCIE_SATA (18) CLK_PCIE_SATA# (18)

CLK_PCIE_ICH (19) CLK_PCIE_ICH# (19)

CLK_PCIE_WWAN (28) CLK_PCIE_WWAN# (28)

CLK_MCH_3GPLL (8) CLK_MCH_3GPLL# (8)

CLK_PCIE_MINI2 (28) CLK_PCIE_MINI2# (28)

CLK_PCIE_LAN (28) CLK_PCIE_LAN# (28)

NAV30 M/B LA-5451P Schematic

G

C1114

0.1U_0402_16V4Z

1

2

RAM

CPU

NB

NB_SSC

SATA

ICH

WWAN

3G_PLL

WLAN

GLAN

+3VS

WWAN_CLKREQ# (28)

R365

12

0_0402_5%

+3VS

MINI2_CLKREQ# (28)

+3VS

LAN_CLKREQ# (28)

+3VS

SATA_CLKREQ# (19)

Compal Electronics, Inc.

Clock Generator (CK505)

+3VS

MCH_CLKREQ# (8)

16 41Tuesday, October 20, 2009

H

0.1

of

5

+3VS

1 2

R159 8.2K_0402_5%R159 8.2K_0402_5%

1 2

R160 8.2K_0402_5%R160 8.2K_0402_5%

1 2

R161 8.2K_0402_5%R161 8.2K_0402_5%

1 2

R162 8.2K_0402_5%R162 8.2K_0402_5%

D D

C C

1 2

R163 8.2K_0402_5%R163 8.2K_0402_5%

1 2

R164 8.2K_0402_5%R164 8.2K_0402_5%

1 2

R165 8.2K_0402_5%R165 8.2K_0402_5%

1 2

R166 8.2K_0402_5%R166 8.2K_0402_5%

+3VS

1 2

R167 8.2K_0402_5%R167 8.2K_0402_5%

1 2

R168 8.2K_0402_5%R168 8.2K_0402_5%

1 2

R169 8.2K_0402_5%R169 8.2K_0402_5%

1 2

R170 8.2K_0402_5%R170 8.2K_0402_5%

1 2

R171 8.2K_0402_5%R171 8.2K_0402_5%

1 2

R172 8.2K_0402_5%R172 8.2K_0402_5%

1 2

R173 8.2K_0402_5%R173 8.2K_0402_5% R174 8.2K_0402_5%R174 8.2K_0402_5%

1 2

R175 8.2K_0402_5%R175 8.2K_0402_5%

1 2

R176 8.2K_0402_5%R176 8.2K_0402_5%

1 2

R178 8.2K_0402_5%R178 8.2K_0402_5%

1 2

R179 8.2K_0402_5%R179 8.2K_0402_5%

12

PCI_DEVSEL# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_PLOCK# PCI_IRDY# PCI_SERR# PCI_PERR#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH# PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

4

U5B

A11

AD0

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

B12 A10 C12

A8 A12 E10 C11

B9

D8

A4

E8

A3

D9

C8

C2

D7

B3 D11

B6

D5

D3

F4

E3

E4

B2

C4

C1

D1

E2

H2

F1

F5

F2

PCI

AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29

J4

AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C7PIRQH#/GPIO5

ICH9-M SFF ES_FCBGA569

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0#

C/BE1#

C/BE2#

C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3

PIRQG#/GPIO4

3

PCI_REQ0#

G4

PCI_GNT0#

E1

PCI_REQ1#

A9 E12

PCI_REQ2#

B11 C10

PCI_REQ3#

D6

PCI_GNT3#

C6 D10

A5 E6 C9

PCI_IRDY#

C3 B1 T3

PCI_DEVSEL#

A7

PCI_PERR#

D4

PCI_PLOCK#

C5

PCI_SERR#

H5

PCI_STOP#

A6

PCI_TRDY#

A2

PCI_FRAME#

B8

PLT_RST#

A21 B5 T1

G3 G1 F3 H4

CLK_PCI_ICH

T12T12

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PLT_RST# (8,29) CLK_PCI_ICH (16)

2

PLT_RST#

NC7SZ08P5X_NL_SC70-5

R108 0_0603_5%R108 0_0603_5%

1 2

+3VS

5

U31

2

P

B

4

Y

1

A

G

3

@

add it.062609

12

R396

R396 100K_0402_5%

100K_0402_5%

1

PLT_RST_BUF# (28)

B B

PCI_GNT3#

A A

A16 swap override Strap

Low= A16 swap override Enble High= Default

PCI_GNT3#

5

*

12

R181

1K_0402_5%@

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

12

R182

R182 1K_0402_5%

1K_0402_5%

@

1

0

1

0

1

PCI_GNT0#

DEL J3. 9/29

4

Boot BIOS Location

SPI

PCI

LPC

*

KBC_SPI_CS1#(19)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Place closely pin B10

CLK_PCI_ICH

12

R183

1K_0402_5%@

2009/02/27 2009/02/20

12

@

R180

R180 10_0402_5%

10_0402_5%

1

@

C235

8.2P_0402_50V

2

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

ICH9(1/4)-PCI/INT

NCL20 M/B LA-5631P Schematic

17 41Tuesday, October 20, 2009

1

0.1

of

+RTCVCC

1 2

R184 330K_0402_1%

1 2

R185 1M_0402_5%R185 1M_0402_5%

1 2

R186 330K_0402_1%R186 330K_0402_1%

1 2

R187 20K_0402_5%

Change from 180K to 20K & 0.1u to 1u. 9/29

D D

5

LAN100_SLP SM_INTRUDER# ICH_INTVRMEN ICH_SRTCRST#

C236

1U_0603_10V4Z

R188

R189

@

1 2

R189

0_0402_5%

@

1 2

1

2

4

3

2

1

ICH_RSVD HDA_SDOUT_CODEC

00 0 1 11

XOR CHAIN ENTRANCE STRAP:RSVD

+3VS

1 2

R191 1K_0402_5%@R191 1K_0402_5%@

1 2

R193 1K_0402_5%@R193 1K_0402_5%@

C C

B B

1 0

HDA_SDOUT ICH_RSVD

HDA for GMCH

Description

RV

XOR Normal(D) PCIE Bit1

ICH_RSVD (19)

HDA_BITCLK_CODEC(25) HDA_SYNC_CODEC(25)

HDA_RST#_CODEC(25)

HDA_SDOUT_CODEC(25)

HDD

ODD

SATA_TXN0(21) SATA_TXP0(21)

HDA_BITCLK_MCH(8)

HDA_SYNC_MCH(8) HDA_RST#_MCH(8)

HDA_SDOUT_MCH(8)

SATA_RXN0_C(21) SATA_RXP0_C(21)

Codec GMCH

SATA_LED#(30)

SATA_RXN1_C(21)

SATA_RXP1_C(21) SATA_TXN1(21) SATA_TXP1(21)

+RTCVCC

R318

1 2

20K_0402_5%

1

CLRP2

C1044

1U_0603_10V4Z

R198 24.9_0402_1% R198 24.9_0402_1%

+1.5VS

R1553 33_0402_5%R1553 33_0402_5% R1554 33_0402_5%R1554 33_0402_5%

R1555 33_0402_5%R1555 33_0402_5%

HDA_SDIN0(25) HDA_SDIN2(8)

+3VS

R209 10K_0402_5% R209 10K_0402_5%

SATA_TXN0 SATA_TXP0 SATA_TXP0_C

SATA_TXN1 SATA_TXN1_C SATA_TXP1 SATA_TXP1_C

C1153

C1153 C1154

C1154

C244

C244 C245

C245

1 2

R416 33_0402_5%R416 33_0402_5%

1 2

R410 33_0402_5%R410 33_0402_5%

1 2

R414 33_0402_5%R414 33_0402_5%

1 2

R415 33_0402_5%R415 33_0402_5%

CLRP2

@

2

1U_0603_10V4Z

close to DIMM

Change footprint to Cap.062309

1 2

R1556

1 2 1 2

0.01U_0402_16V7K

1 2 1 2

0.01U_0402_16V7K

1 2 1 2

1 2

12

0.01U_0402_16V7K

HDA_BITCLK HDA_SYNC HDA_RST# HDA_SDOUT

HDA_BITCLK HDA_SYNC

HDA_RST#

HDA_SDOUT

33_0402_5%

add it 062609.

ICH_RTCX1 ICH_RTCX2

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

ICH_INTVRMEN LAN100_SLP

GLAN_COMP

T65PAD T65PAD

T49PAD T49PAD

SATA_TXN0_C

U5A

F25

RTCX1

G25

RTCX2

G24

RTCRST#

C24

SRTCRST#

C23

INTRUDER#

E25

INTVRMEN

D25

LAN100_SLP

G22

GLAN_CLK

D14

LAN_RSTSYNC

A14

LAN_RXD0

D12

LAN_RXD1

B14

LAN_RXD2

D13

LAN_TXD0

C13

LAN_TXD1

A13

LAN_TXD2

D15

GPIO56

H22

GLAN_COMPI

H21

GLAN_COMPO

AE7

HDA_BIT_CLK

AB7

HDA_SYNC

AA7

HDA_RST#

AB6

HDA_SDIN0

AE6

HDA_SDIN1

AC6

HDA_SDIN2

AA5

HDA_SDIN3

AC7

HDA_SDOUT

AD8

HDA_DOCK_EN#/GPIO33

AB8

HDA_DOCK_RST#/GPIO34

AC9

SATALED#

AE14

SATA0RXN

AD14

SATA0RXP

AC15

SATA0TXN

AD15

SATA0TXP

AD13

SATA1RXN

AC13

SATA1RXP

AA14

SATA1TXN

AB14

SATA1TXP

ICH9-M SFF ES_FCBGA569

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

RCIN#

STPCLK#

THRMTRIP#

SATA4RXN SATA4RXP

IHDA

SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATA

SATARBIAS#

SATARBIAS

10M_0402_5%

C246

1

15P_0402_50V8J

2

32.768KHZ_12.5P_MC-306

Change use SJ132P7K220.091109.

H3 J3 K5 L3

J2 H1

J1 N3

AB23 AE23

AE24 AD25 AE22 AD23 AE21

INIT#

AD24

INTR

L1 AD21

NMI

AC21

SMI#

AC25 AC23 AC22

TP11

AD12 AE12 AB12 AA12

AC11 AD11 AB10 AA10

AC16 AB16

AD10 AE10

R215

1 2

1

IN

2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

EC_GA20

H_DPRSTP_R#

H_FERR#_R

EC_KBRST#

H_SMI# H_STPCLK# THRMTRIP_ICH#

T48 PADT48 PAD

CLK_PCIE_SATA# CLK_PCIE_SATA

R212 24.9_0402_1%

Within 500 mils

ICH_RTCX1

ICH_RTCX2

C247

Y2

4

1

12P_0402_50V8J

OUT

2

NC3NC

LPC_AD[0..3] (29)

LPC_FRAME# (29)

T46 PADT46 PAD

EC_GA20 (29) H_A20M# (4)

R194 0_0402_5%R194 0_0402_5%

1 2

H_DPSLP# (5)

R195 56_0402_5%R195 56_0402_5%

1 2

H_PWRGOOD (5) H_IGNNE# (4) H_INIT# (4)

H_INTR (4)

EC_KBRST# (29)

H_NMI (4) H_SMI# (4)

H_STPCLK# (4)

R206 54.9_0402_1%R206 54.9_0402_1%

1 2

placed within 2" from ICH9M

CLK_PCIE_SATA# (16) CLK_PCIE_SATA (16)

1 2

9/27

for H_DPRSTP# & H_DPSLP#.

H_DPRSTP# (5,8,40)

H_FERR#

Place Close to U8.

+VCCP

12

R201

R201 56_0402_5%

56_0402_5%

+RTCVCC

1

2

9/27Del PU R203~R204

+VCCP

1 2

EC_GA20

R196 10K_0402_5%R196 10K_0402_5%

EC_KBRST#

R197 10K_0402_5%R197 10K_0402_5%

H_THERMTRIP# (4,8)

BAS40-04_SOT23-3

C1155

0.1U_0402_16V4Z

R192

R192 56_0402_5%

56_0402_5%

1 2 1 2

+RTCBATT

1 2 1

D14

3

H_FERR# (4)

R397

R397 1K_0402_5%

1K_0402_5%

2

+3VS

+CHGRTC

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/02/27 2009/02/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

ICH9(2/4)_LAN,HD,IDE,LPC

NCL20 M/B LA-5631P Schematic

1

0.1

of

18 41Tuesday, October 20, 2009

+3VS

1 2

R271 10K_0402_5%R271 10K_0402_5%

1 2

R220 10K_0402_5%

1 2

R222 10K_0402_5%

1 2

R225 8.2K_0402_5%

1 2

R227 8.2K_0402_5%@ R227 8.2K_0402_5%@

1 2

R228 8.2K_0402_5%R228 8.2K_0402_5%

1 2

R231 8.2K_0402_5%

D D

C C

B B

A A

1 2

R232 10K_0402_5%

1 2

R233 8.2K_0402_5%@ R233 8.2K_0402_5%@

1 2

R234 8.2K_0402_5%

1 2

R237 8.2K_0402_5%

1 2

R238 10K_0402_5%

1 2

R239 10K_0402_5%@ R239 10K_0402_5%@

+3VALW

1 2

R244 10K_0402_5%R244 10K_0402_5%

1 2

R245 10K_0402_5%

1 2

R246 10K_0402_5%

1 2

R250 1K_0402_5%R250 1K_0402_5%

1 2

R252 10K_0402_5%

1 2

R254 10K_0402_5%

Add R321 in 10/03.

1 2

R256 10K_0402_5%R256 10K_0402_5%

1 2

R259 10K_0402_5%R259 10K_0402_5%

1 2

R261 10K_0402_5%R261 10K_0402_5%

+3VALW

RP29

10K_1206_8P4R_5%

1 2

R270 10K_0402_5%R270 10K_0402_5%

1 2

R272 10K_0402_5%R272 10K_0402_5%

1 2

R274 10K_0402_5%R274 10K_0402_5%

1 2

R269 10K_0402_5%R269 10K_0402_5%

RP31

10K_1206_8P4R_5%

CRT_DET#(23)

45 36 27 18

add it.091109

EC_LID_OUT#

45 36 27 18

add it.062309

GPIO48 GPIO1 SERIRQ PM_CLKRUN#

EC_THERM#

GPIO19 GPIO22 NPCI_RST# GPIO17

GPIO21

GPIO37

GPIO18

GPIO57

LINKALERT# PCIE_WAKE# EC_SWI# XDP_DBRESET# S4_STATE# ICH_LOW_BAT#

GPIO24

ME__EC_CLK1 ME__EC_DATA1

USB_OC#7 USB_OC#5 USB_OC#0 USB_OC#4

USB_OC#6 GPIO44 USB_OC#2

USB_OC#9 USB_OC#10 USB_OC#11 GPIO42

CRT_DET#

5

Add R621 in 12/03.

High: CRT Plugged

CRT_DET

Take off ICH SPI ROM for HDCP.081009

5

2

G

+3VS

H_STP_PCI#(16) H_STP_CPU#(16)

1 2 13

D

S

10K_0402_5%@

VGATE(8,16,40)

+3VS

R712

R712 10K_0402_5%

10K_0402_5%

Q40

2N7002_SOT23

9/21

+3VS

12

R235

GPIO1

1 2

R262 8.2K_0402_5%@R262 8.2K_0402_5%@

R264 1K_0402_5% @R264 1K_0402_5% @

3G

WLAN

GLAN

12

R236

10K_0402_5%@

R247 0_0402_5% R247 0_0402_5% R248 100K_0402_5% R248 100K_0402_5%

NU it 073109.

1 2

PCIE_PTX_C_IRX_N1(28)

PCIE_PTX_C_IRX_P1(28) PCIE_ITX_C_PRX_N1(28) PCIE_ITX_C_PRX_P1(28)

PCIE_PTX_C_IRX_N2(28)

PCIE_PTX_C_IRX_P2(28) PCIE_ITX_C_PRX_N2(28) PCIE_ITX_C_PRX_P2(28)

PCIE_PTX_C_IRX_N3(28)

PCIE_PTX_C_IRX_P3(28) PCIE_ITX_C_PRX_N3(28) PCIE_ITX_C_PRX_P3(28)

KBC_SPI_CS1#(17)

4

2.2K_0402_5%

ICH_SMBCLK(16,28)

ICH_SMBDATA(16,28)

EC_SWI#(29)

XDP_DBRESET#(4)

PM_BMBUSY#(8)

EC_LID_OUT#(29)

R240 0_0402_5%R240 0_0402_5%

1 2

PM_CLKRUN#(29)

PCIE_WAKE#(28)

SERIRQ(29)

EC_THERM#(29)

1 2 1 2

EC_SMI#(29) EC_SCI#(29)

SATA_CLKREQ#(16)

SB_SPKR(25)

MCH_ICH_SYNC#(8)

ICH_RSVD(18)

add it.062309

4

+3VALW

12

R223

R224

2.2K_0402_5%

LINKALERT# ME__EC_CLK1 ME__EC_DATA1

EC_SWI#

XDP_DBRESET# PM_BMBUSY# EC_LID_OUT# H_STP_PCI#

R_STP_CPU# PM_CLKRUN# PCIE_WAKE#

SERIRQ EC_THERM#

VRMPWRGD

PAD

T51

GPIO1

CRT_DET

GPIO17 GPIO18

T52PAD T52PAD

GPIO22

T53PAD T53PAD T54PAD T54PAD

GPIO38 GPIO39

T55PAD T55PAD

GPIO48

T56PAD T56PAD

GPIO57

SB_SPKR MCH_ICH_SYNC# ICH_RSVD

T57PAD T57PAD T58PAD T58PAD T59PAD T59PAD

C265 0.1U_0402_10V7KC265 0.1U_0402_10V7K

1 2

C266 0.1U_0402_10V7KC266 0.1U_0402_10V7K

1 2

C269 0.1U_0402_10V7KC269 0.1U_0402_10V7K

1 2

C270 0.1U_0402_10V7KC270 0.1U_0402_10V7K

1 2

C271 0.1U_0402_10V7KC271 0.1U_0402_10V7K

1 2

C272 0.1U_0402_10V7KC272 0.1U_0402_10V7K

1 2

USB_OC#0(28)

USB_OC#2(28)

add it.062309

12

R287

22.6_0402_1%

U5C

C18

SMBCLK

C15

SMBDATA

B21

LINKALERT#/GPIO60/CLGPIO4

E18

SMLINK0

A24

SMLINK1

C20

RI#

T5

SUS_STAT#/LPCPD#

C25

SYS_RESET#

L2

PMSYNC#/GPIO0

A23

SMBALERT#/GPIO11

B15

STP_PCI#/GPIO15

A20

STP_CPU#/GPIO25

M5

CLKRUN#/GPIO32

C21

WAKE#

L4

SERIRQ

AD20

THRM#

B24

VRMPWRGD

A19

TP12

AE16

GPIO1

AE18

GPIO6

AD18

GPIO7

B25

GPIO8

C14

GPIO12

D20

GPIO13

AE17

GPIO17

K3

GPIO18

AC8

GPIO20

AC19

SCLOCK/GPIO22

D17

GPIO27

E20

GPIO28

M4

SATACLKREQ#/GPIO35

AB18

SLOAD/GPIO38

AC18

SDATAOUT0/GPIO39

AB19

SDATAOUT1/GPIO48

AC20

GPIO49

A16

GPIO57/CLGPIO5

K4

SPKR

AB20

MCH_SYNC#

C19

TP3

AB17

TP8

AC17

TP9

AD17

TP10

ICH9-M SFF ES_FCBGA569

PCIE_ITX_PRX_N1 PCIE_ITX_PRX_P1

PCIE_ITX_PRX_N2 PCIE_ITX_PRX_P2

PCIE_ITX_PRX_N3 PCIE_ITX_PRX_P3

USB_OC#0 USB_OC#2

GPIO42 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 GPIO44 USB_OC#9 USB_OC#10 USB_OC#11

USBRBIAS

Within 500 mils

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

U5D

T25

PERN1

T24

PERP1

R24

PETN1

R23

PETP1

P25

PERN2

P24

PERP2

P21

PETN2

P22

PETP2

N23

PERN3

N24

PERP3

M21

PETN3

M22

PETP3

M25

PERN4

M24

PERP4

L24

PETN4

L23

PETP4

K24

PERN5

K25

PERP5

K21

PETN5

K22

PETP5

H24

PERN6/GLAN_RXN

H25

PERP6/GLAN_RXP

J24

PETN6/GLAN_TXN

J23

PETP6/GLAN_TXP

E24

SPI_CLK

E23

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

F22

SPI_MOSI

G23

SPI_MISO

P4

OC0#/GPIO59

N4

OC1#/GPIO40

N1

OC2#/GPIO41

P5

OC3#/GPIO42

P1

OC4#/GPIO43

P2

OC5#/GPIO29

M3

OC6#/GPIO30

M2

OC7#/GPIO31

P3

OC8#/GPIO44

R1

OC9#/GPIO45

R4

OC10#/GPIO46

R2

OC11#/GPIO47

AE5

USBRBIAS

AD5

USBRBIAS#

ICH9-M SFF ES_FCBGA569

Issued Date

3

GPIO21

CLK14

CLK48 SUSCLK SLP_S3#

SLP_S4# SLP_S5#

PWROK

BATLOW# PWRBTN# LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

AE19 AA18 AE20 AA20

K1 AB5

R3 D18

B20 D16

E14 D23 M1 C16 U4 D22 D19 U1 T4 B23 C22

A18 E22

B18 F21

A17 C17

B17 A22

E16 A15 D21

DMI_RXN0

V25

DMI_RXP0

V24

DMI_TXN0

U24

DMI_TXP0

U23

DMI_RXN1

W23

DMI_RXP1

W24

DMI_TXN1

V21

DMI_TXP1

V22

DMI_RXN2

Y24

DMI_RXP2

Y25

DMI_TXN2

Y21

DMI_TXP2

Y22

DMI_RXN3

AB24

DMI_RXP3

AB25

DMI_TXN3

AA23

DMI_TXP3

AA24

CLK_PCIE_ICH#

T21

CLK_PCIE_ICH

T22 AB21

AB22 AE2

AD1 AD3 AD4 AC2 AC3 AC5 AB4 AB2 AB1 AA3 AA2 Y1 Y2 W2 W3 V1 V2 Y5 Y4 U3 U2 V4 V5

Compal Secret Data

GPIO19

NPCI_RST#

GPIO37

CLK_14M_ICH CLK_48M_ICH

ICH_SUSCLK

S4_STATE# PM_PWROK DPRSLPVR ICH_LOW_BAT#

LAN_RST SB_RSMRST# CK_PWRGD_R M_PWROK

CL_CLK0

CL_DATA0

CL_VREF0_ICH

Del CL_VREF1_ICH.072709.

CL_RST#

GPIO24

GPIO9

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7

R243 0_0402_5%R243 0_0402_5%

R253 0_0402_5%R253 0_0402_5%

R406 100K_0402_5% R406 100K_0402_5%

2 1

D15

D15 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

add it.062309

DMI_IRCOMP

Deciphered Date

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS GPIO

Power MGTController Link

GPIO

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

MISC

DMI0RXN DMI0RXP DMI0TXN

DMI0TXP

DMI1RXN DMI1RXP DMI1TXN

DMI1TXP

DMI2RXN DMI2RXP DMI2TXN

DMI2TXP

DMI3RXN DMI3RXP DMI3TXN

DMI3TXP

DMI_CLKN

PCI-Express

DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N

SPI

USBP5P USBP6N

USB

USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

2009/02/27 2009/02/20

2

CLK_ICH_14M (16) CLK_ICH_48M (16)

T50 PADT50 PAD

PM_SLP_S3# (29) PM_SLP_S4# (29) PM_SLP_S5# (29)

R241 10K_0402_5% R241 10K_0402_5%

1 2

PBTN_OUT# (29)

1 2

M_PWROK (8)

CL_CLK0 (8)

CL_DATA0 (8)

CL_RST# (8)

GPIO24

12

T64 PADT64 PAD

DMI_RXN0 (8) DMI_RXP0 (8) DMI_TXN0 (8) DMI_TXP0 (8)

DMI_RXN1 (8) DMI_RXP1 (8) DMI_TXN1 (8) DMI_TXP1 (8)

DMI_RXN2 (8) DMI_RXP2 (8) DMI_TXN2 (8) DMI_TXP2 (8)

DMI_RXN3 (8) DMI_RXP3 (8) DMI_TXN3 (8) DMI_TXP3 (8)

CLK_PCIE_ICH# (16) CLK_PCIE_ICH (16)

R276 24.9_0402_1% R276 24.9_0402_1%

1 2

USB20_N0 (28) USB20_P0 (28) USB20_N1 (28) USB20_P1 (28) USB20_N2 (28) USB20_P2 (28) USB20_N3 (28) USB20_P3 (28) USB20_N4 (30) USB20_P4 (30) USB20_N5 (28) USB20_P5 (28) USB20_N6 (28) USB20_P6 (28) USB20_N7 (22) USB20_P7 (22)

2

+3VALW

ACIN (29,32)

USB port 1 USB Port 2 SUB USB Port 1 WLAN Card Reader 3G BT CMOS Camera

PM_DPRSLPVR (8,40)

CK_PWRGD (16)

Within 500 mils

1

PM_PWROK

M_PWROK

0.1U_0402_16V4Z

+1.5VS

1

2

C263

SB_RSMRST#

R407

R407 10K_0402_5%

10K_0402_5%

1 2

R491 0_0402_5%R491 0_0402_5%

12

R492

0_0402_5%

R257

3.24K_0402_1%

1 2

12

R260

453_0402_1%

Q11

Q11 MMBT3906_SOT23-3

MMBT3906_SOT23-3

123

12

LAN_RST

+3VS

C

E

B

1 2

R408 4.7K_0402_5%R408 4.7K_0402_5%

D16A

1 2

BAV99DW-7_SOT363

D16B

4 5

BAV99DW-7_SOT363

12

R27310K_0402_5% R27310K_0402_5%

6

3

12

EC_PWROK (29)

EC_RSMRST# (29)

R409

2.2K_0402_5%

Place closely pin H1Place closely pin AF3

CLK_14M_ICHCLK_48M_ICH

12

@

R283

R283 10_0402_5%

10_0402_5%

@

1

C273

4.7P_0402_50V8C

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9(3/4)_DMI,USB,GPIO,PCIE

NCL20 M/B LA-5631P Schematic

1

12

@

R284

R284 10_0402_5%

10_0402_5%

@

1

C274

4.7P_0402_50V8C

2

19 41Tuesday, October 20, 2009

of

+3VALW

0.1

5

+RTCVCC

C275

0.1U_0402_16V4Z

R289

BLM18PG181SN1D_0603

21

D5

D5 CH751H-40_SC76

CH751H-40_SC76

ICH_V5REF_RUN

1

C291

C291 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1 2

MBK1608301YZF 0603

R298

0.1U_0402_16V4Z

1 2

Change to SGA00001700 090909.

20 mils

R296

C296

1U_0402_6.3V6K

+1.5VS_USBPLL

1

2

C307

C306

0.1U_0402_16V4Z

R304

R304 MBK1608301YZF 0603

MBK1608301YZF 0603

1 2

+1.5VS

1

2

C309

5

D D

C C

B B

+1.5VS

MBK1608301YZF 0603

A A

+1.5VS

+5VS +3VS +3VALW+5VALW

12

R293

100_0402_5%

9/19

+1.5VS

1 2

+3VS

R303

1 2

1

C276

2

1

C282

+

2

220U_B2_2.5VM_R35

R294

100_0402_5%

1

2

C297

C308

0.1U_0402_16V4Z

12

20 mils

+1.5VS_PCIE_ICH

0.1U_0402_16V4Z

40 mils

1

2

C280

C279

10U_0603_6.3V6M

12

+1.5VS

10U_0603_6.3V6M

+1.5VS_PCIE_ICH

1

2

C310

10U_0603_6.3V6M

ICH_V5REF_RUN ICH_V5REF_SUS

1

2

C281

10U_0603_6.3V6M

2.2U_0402_6.3V6M

21

D6

D6 CH751H-40_SC76

CH751H-40_SC76

ICH_V5REF_SUS

20 mils

1

C292

C292 1U_0402_6.3V6K

1U_0402_6.3V6K

2

change to 1uf.072709

+1.5VS_VCCSATAPLL

1

2

C298

1U_0603_10V4Z

1

2

C299

1U_0603_10V4Z

1

2

C303

0.1U_0402_16V4Z

VCC_LAN1_05_INT_ICH

+1.5VS_GLAN

1

2

C311

10U_0603_6.3V6M

+3VS

4

U5F

G17

VCCRTC

G7

V5REF

U7

V5REF_SUS

J19

VCC1_5_B[01]

K18

VCC1_5_B[02]

K19

VCC1_5_B[03]

L18

VCC1_5_B[04]

L19

VCC1_5_B[05]

M18

VCC1_5_B[06]

M19

VCC1_5_B[07]

N18

VCC1_5_B[08]

N19

VCC1_5_B[09]

P18

VCC1_5_B[10]

R18

VCC1_5_B[11]

T18

VCC1_5_B[12]

T19

VCC1_5_B[13]

U18

VCC1_5_B[14]

U19

VCC1_5_B[15]

W17

VCCSATAPLL

U13

VCC1_5_A[01]

V13

VCC1_5_A[02]

W13

VCC1_5_A[03]

U12

VCC1_5_A[04]

V12

VCC1_5_A[05]

W12

VCC1_5_A[06]

W10

VCC1_5_A[07]

U15

VCC1_5_A[08]

V15

VCC1_5_A[09]

W18

VCC1_5_A[10]

G9

VCC1_5_A[11]

H9

VCC1_5_A[12]

V11

VCC1_5_A[13]

U11

VCC1_5_A[14]

U8

VCCUSBPLL

T9

VCC1_5_A[15]

U9

VCC1_5_A[16]

G11

VCCLAN1_05[1]

H11

VCCLAN1_05[2]

G12

VCCLAN3_3[1]

H13

VCCLAN3_3[2]

J17

VCCGLANPLL

H19

VCCGLAN1_5[1]

J18

VCCGLAN1_5[2]

K16

VCCGLAN3_3

ICH9-M SFF ES_FCBGA569

4

CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

PCI

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1] VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03]

VCCPSUSVCCPUSB

VCCSUS3_3[04] VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

GLAN POWER

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

VCCDMIPLL VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1] V_CPU_IO[2]

VCC3_3[01] VCC3_3[02]

VCC3_3[03] VCC3_3[04] VCC3_3[05]

VCC3_3[06] VCC3_3[07] VCC3_3[08]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

L11 L12 L13 L14 L15 M11 M15 N11 N15 P11 P15 R11 R12 R13 R14 R15

P19 T17

U17 V16

U16 V18 AE9

AA9 V14 W14

G8 H7 H8

AD7 V10 T7

H15 H16 V7

G14 G15 H14

W8 J7

J8 K7 K8 L7 L8 M7 M8 N7 N8 P7 P8

G18 H17 J14

K14

+VCCP

+1.5VS_DMIPLL

VCCSUS1_05_ICH_1 VCCSUS1_05_ICH_2

VCCSUS1_5_ICH_1 VCCSUS1_5_ICH_2

VCCCL1_05_ICH

1 2

C305 1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

2

C278

C277

0.1U_0402_16V4Z

1

2

C283

0.01U_0402_16V7K

9/29

VCC_DMI

(DMI)

+3VS

1

2

C293

0.1U_0402_16V4Z

+VCCHDA

+VCCSUSHDA

T60T60

T61T61 T62T62 T63T63

+3VALW

1

2

C302

4.7U_0603_6.3V6K

9/21

C304

0.1U_0402_16V4Z

1 2

+3VS

9/21

3

R290

1 2

MBK1608301YZF 0603

1

2

C284

1U_0603_10V4Z

1 2

MBK1608301YZF 0603

0.1U_0402_16V4Z

1

2

C288

R319

R319 R324

R324

1

2

C295

0.1U_0402_16V4Z

1

2

C300

0.1U_0402_16V4Z

9/29

+1.5VS

VCC_DMI

1

2

C285

1U_0603_10V4Z

9/29

+3VS

0.1U_0402_16V4Z

1

2

C290

R322

@R322

@

1 2

R323

1 2

0_0402_5%

1 2

0_0402_5%@

+3VALW

1

If it support 3.3V audio signals

2

POP:R322/R324,

C301

Depop R319/R323

If it support 1.5V audio signals POP:R319/R323, Depop R322/R324

2009/02/27 2009/02/20

C289

0.1U_0402_16V4Z

R292

1

2

1U_0603_10V4Z

+VCCP

0_0402_5%

0_0402_5% 0_0402_5%

0_0402_5%

+1.5V +3VALW

follow CPU/B add it.062309

Compal Secret Data

+VCCP

0.1U_0402_16V4Z

1

2

C286

4.7U_0603_6.3V6K

+3VS +1.5VS

1

2

C294

0.1U_0402_16V4Z

Deciphered Date

1

2

C287

2

U5E

B4

VSS[001]

B7

VSS[002]

B10

VSS[003]

B13

VSS[004]

B16

VSS[005]

B19

VSS[006]

B22

VSS[007]

D2

VSS[008]

D24

VSS[009]

E5

VSS[010]

E7

VSS[011]

E9

VSS[012]

E11

VSS[013]

E13

VSS[014]

E15

VSS[015]

E17

VSS[016]

E19

VSS[017]

E21

VSS[018]

F24

VSS[019]

G2

VSS[020]

G5

VSS[021]

G10

VSS[022]

G13

VSS[023]

G16

VSS[024]

G19

VSS[025]

G21

VSS[026]

H10

VSS[027]

H12

VSS[028]

H18

VSS[029]

H23

VSS[030]

J5

VSS[031]

J9

VSS[032]

J10

VSS[033]

J11

VSS[034]

J12

VSS[035]

J13

VSS[036]

J15

VSS[037]

J21

VSS[038]

J22

VSS[039]

J25

VSS[040]

K2

VSS[041]

K9

VSS[042]

K10

VSS[043]

K11

VSS[044]

K12

VSS[045]

K13

VSS[046]

K15

VSS[047]

K17

VSS[048]

K23

VSS[049]

L5

VSS[050]

L9

VSS[051]

L10

VSS[052]

L16

VSS[053]

L17

VSS[054]

L21

VSS[055]

L22

VSS[056]

L25

VSS[057]

M9

VSS[058]

M10

VSS[059]

M12

VSS[060]

M13

VSS[061]

M14

VSS[062]

M16

VSS[063]

M17

VSS[064]

M23

VSS[065]

N2

VSS[066]

N5

VSS[067]

N9

VSS[068]

N10

VSS[069]

N12

VSS[070]

N13

VSS[071]

N14

VSS[072]

N16

VSS[073]

N17

VSS[074]

N21

VSS[075]

N22

VSS[076]

N25

VSS[077]

P9

VSS[078]

P10

VSS[079]

P12

VSS[080]

P13

VSS[081]

P14

VSS[082]

P16

VSS[083]

P17

VSS[084]

P23

VSS[085]

R5

VSS[086]

R7

VSS[087]

R8

VSS[088]

R9

VSS[089]

R10

VSS[090]

R16

VSS[091]

R17

VSS[092]

R19

VSS[093]

R21

VSS[094]

R22

VSS[095]

R25

VSS[096]

T2

VSS[097]

T8

VSS[098]

T10

VSS[099]

T11

VSS[100]

T12

VSS[101]

T13

VSS[102]

T14

VSS[103]

T15

VSS[104]

T16

VSS[105]

T23

VSS[106]

ICH9-M SFF ES_FCBGA569

2

1

U5

VSS[107]

U10

VSS[108]

W11

VSS[109]

U14

VSS[110]

W16

VSS[111]

U21

VSS[112]

U22

VSS[113]

U25

VSS[114]

V3

VSS[115]

V8

VSS[116]

V19

VSS[117]

V23

VSS[118]

W1

VSS[119]

W4

VSS[120]

W5

VSS[121]

W7

VSS[122]

W9

VSS[123]

W15

VSS[124]

W19

VSS[125]

W21

VSS[126]

W22

VSS[127]

W25

VSS[128]

Y3

VSS[129]

Y23

VSS[130]

AA1

VSS[131]

AA4

VSS[132]

AA6

VSS[133]

AA8

VSS[134]

AA11

VSS[135]

AA13

VSS[136]

AA15

VSS[137]

AA16

VSS[138]

AA17

VSS[139]

AA19

VSS[140]

AA21

VSS[141]

AA22

VSS[142]

AA25

VSS[143]

AB3

VSS[144]

AB9

VSS[145]

AB11

VSS[146]

AB13

VSS[147]

AB15

VSS[148]

AC24

VSS[149]

AC1

VSS[150]

AC4

VSS[151]

AC10

VSS[152]

AC12

VSS[153]

AC14

VSS[154]

AD2

VSS[155]

AD6

VSS[156]

AD9

VSS[157]

AD16

VSS[158]

AD19

VSS[159]

AD22

VSS[160]

AE3

VSS[161]

AE4

VSS[162]

AE11

VSS[163]

AE13

VSS[164]

AE15

VSS[165]

V17

VSS[166]

AE8

VSS[167]

V9

VSS[168]

J16

VSS[169]

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04]

A1 A25 AE1 AE25

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9(4/4)_POWER&GND

NCL20 M/B LA-5631P Schematic

1

0.1

of

20 41Tuesday, October 20, 2009

5

+5VS

1U_0402_6.3V6K

0.1U_0402_16V4Z

C1156

1

C1157

2

10U_0805_10V4Z

1

2

1000P_0402_50V7K

D D

C C

1U_0402_6.3V6K

1

C1158

2

1

C159

2

Add it.070709 Add it.070709

SATA_RXN0_C(18)

SATA_RXP0_C(18)

+3VS

R109

4

1 2

0_0805_5%

R109

1U_0402_6.3V6K

1

C158

2

SATA_RXN0_C

SATA_RXP0_C

0.1U_0402_16V4Z

1

C1159

2

1000P_0402_50V7K

1 2

C1162 0.01U_0402_16V7KC1162 0.01U_0402_16V7K

1 2

C1163 0.01U_0402_16V7K

1

C1160

2

SATA_RXN0

SATA_RXP0

3

+3VS_HDD1

1

C1161

2

10U_0805_10V4Z

SATA HDD Conn.

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

GND VCC12 VCC12 VCC12

18 19 20 21 22

RESERVED

23

G1

24

G2

FOX_LD2822V-SA5L6

CONN@ SP010907230

SATA_TXP0 SATA_TXN0

SATA_RXN0 SATA_RXP0

+3VS_HDD1

+5VS

2

SATA_TXP0 (18) SATA_TXN0 (18)

1

CD-ROM Connector

+5VMOD

JSATA2

10U_0805_10V4Z

1U_0603_10V4Z

0.1U_0402_16V4Z

SI3456DV: N CHANNEL VGS: 4.5V, RDS: 65 mOHM Id(MAX): 5.1A

ODD_ON#(29)

VGS,+-20V

+VSB

R1593

R1593 200K_0402_5%

200K_0402_5%

2N7002DW-T/R7_SOT363-6

B B

+5VALW

W=60mils

SI3456BDV-T1-E3_TSOP6

12

3

5

4

Q50B

6 2

1

Q49

D

G

3

1

2

S

W=60mils

45

C1517

0.1U_0603_25V7K

+5VMOD

12

R1592

R1592 470_0402_5%

470_0402_5%

61

Q50A

Q50A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

ODD_ON#

C324

0.1U_0402_16V4Z

1

2

1

C326

C325

2

1

C327

C327 10U_0805_10V4Z

2

10U_0805_10V4Z

2

21

GND1

22

GND2

23

GND3

24

GND4

FOX_GS12201-1011-9F

CONN@ SP010907090

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

+5VMOD

0.01U_0402_16V7K

SATA_RXP1 SATA_RXP1_C

0.01U_0402_16V7K

12 12

C323

C323 C322

C322

SATA_RXN1_CSATA_RXN1

SATA_TXN1 SATA_TXP1

SATA_RXP1_C (18) SATA_RXN1_C (18)

SATA_TXN1 (18)

SATA_TXP1 (18)

Modify +5VMOD control schematic 100809.

A A

Security Classification

Add it for ODD button.072109.

5

Security Classification

2009/02/27 2010/01/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/02/27 2010/01/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HDD & ODD Connector

NCL20 M/B LA-5631P Schematic

1

0.1

21 41Tuesday, October 20, 2009

of

5

4

3

2

1

LCD POWER CIRCUIT

+LCDVDD

D D

2N7002DW-T/R7_SOT363-6

GMCH_ENVDD(10)

C C

+INVPWR_B+

W=40mils

1

C1145

680P_0402_50V7K

2

12

3

Q8B

4

1 2

R391 0_0402_5%R391 0_0402_5%

100K_0402_5%

L12

FBMA-L11-201209-221LMA30T_0805

L13

FBMA-L11-201209-221LMA30T_0805

1

C1146

C1146 68P_0402_50V8J

68P_0402_50V8J

2

R386

R386 300_0603_5%

300_0603_5%

5

12

R392

+3VALW

12

R387

R387 100K_0402_5%

100K_0402_5%

61

Q8A

2

2N7002DW-T/R7_SOT363-6

12

R389 1K_0402_5%R389 1K_0402_5%

12

C1142

0.047U_0402_16V7K

B+

1

2

LVDS and USB CAM connector

JLVDS1

1

41 42 43 44 45

B B

A A

46

Swap net for layout 072709.

2

G1

3

G2

4

G3

5

G4

6

G5

7

G6

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

IPEX_20143-040E-20F

CONN@SP010016810

5

LVDS_DDC2_CLK LVDS_DDC2_DATA

GMCH_INV_PWM DISPLAYOFF#

+CAM_VCC

USB20_CMOS_N7 USB20_CMOS_P7

LVDS_A_0LVDS_A_0+

LVDS_A_1LVDS_A_1+

LVDS_A_2LVDS_A_2+

LVDS_A_CLVDS_A_C+

R328 0_0603_5%R328 0_0603_5%

DMIC_CLK_R DMIC_DATA_R

1 2 1 2 1 2

+3VS

+LCDVDD

+INVPWR_B+

LVDS_DDC2_CLK (10)

LVDS_DDC2_DATA (10) LVDS_A_0- (10)

LVDS_A_0+ (10) LVDS_A_1- (10)

LVDS_A_1+ (10) LVDS_A_2- (10)

LVDS_A_2+ (10) LVDS_A_C- (10)

LVDS_A_C+ (10)

+3VS

R15150_0402_5% R15150_0402_5%

USB20_N7 (19)

R15160_0402_5% R15160_0402_5%

USB20_P7 (19)

DMIC_CLK_R (25)

DMIC_DATA_R (25)

Change DMIC on LVDS conn .070909

W=60mils

+LCDVDD

1

2

+3VS

S

G

2

D

1 3

1

C1143

4.7U_0805_10V4Z

2

C1150

C1150 10U_0805_10V4Z

10U_0805_10V4Z

Camera

DMIC

USB20_CMOS_N7

USB20_CMOS_P7

4

W=60mils

1

C1141

4.7U_0805_10V4Z

2

Q9

Q9 AO3413_SOT23-3

AO3413_SOT23-3

Change to use SB934130020.091509

+LCDVDD

1

2

1

C1151

0.1U_0402_16V4Z

2

Place close to JLVDS1

Add it to solve Flicker occurs issue 101209.

10P_0402_50V8J@C1292

10P_0402_50V8J

1

2

@

add it for EMI.072409.

Add it to solve Flicker occurs issue 101209.

W=60mils

C1144

0.1U_0402_16V4Z

1

C1152

C1152 68P_0402_50V8J

68P_0402_50V8J

2

C1292

C1291

10P_0402_50V8J@C1291

10P_0402_50V8J

1

2

@

1

C1164

0.1U_0402_16V4Z

2

1

C1165

C1165 68P_0402_50V8J

68P_0402_50V8J

2

Place close to JLVDS1

+3VS

5

1

U30

GMCH_INV_PWM

BKOFF#(29)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BKOFF# DISPLAYOFF#

GMCH_INV_PWM DISPLAYOFF#

3

P

NC

4

A2Y

NC7SZ14P5X_NL_SC70-5

G

3

21

1 2 1 2

INVT_PWM

+3VS

12

R393

4.7K_0402_5%

Compal Secret Data

Deciphered Date

R110

1 2

0_0402_5%@

D13

CH751H-40PT_SOD323-2

C1148 220P_0402_50V7KC1148 220P_0402_50V7K C1149 220P_0402_50V7KC1149 220P_0402_50V7K

2009/02/27 2010/01/21

DPST_PWM (10)

INVT_PWM (29)

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LVDS Connector

NCL20 M/B LA-5631P Schematic

22 41Tuesday, October 20, 2009

1

0.1

of

A

NOTE: L : A-->B1 H: A-->B2

B

C

D

E

Place closed to chipset

1 1

2 2

GMCH_CRT_HSYNC(10)

GMCH_CRT_R(10)

GMCH_CRT_G(10)

GMCH_CRT_B(10)

12

R700

10K_0402_5%

Place closed to chipset

GMCH_CRT_VSYNC(10)

12

R703

51K_0402_5%

3 3

GMCH_CRT_DATA(10)

GMCH_CRT_CLK(10)

GMCH_CRT_DATA VGA_DDC_DAT

GMCH_CRT_CLK VGA_DDC_CLK

GMCH_CRT_R RED

GMCH_CRT_G

GMCH_CRT_B

+5VS +5VS

C1389

0.1U_0402_16V4Z

1 2

1

5

U79

U79 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

P

4

OE#

A2Y

G

3

12

R704

R704 51K_0402_5%

51K_0402_5%

R710

1 2

0_0402_5%

R711

1 2

0_0402_5%

NU it 101309.

CRT_DATA_R

CRT_CLK_R

12

R697

R698

150_0402_1%

C1390

0.1U_0402_16V4Z

1 2

CRT_HSYNCGMCH_CRT_HSYNC

1

5

P

CRT_VSYNCGMCH_CRT_VSYNC

4

OE#

A2Y

G

U80

U80 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

+3VS

12

R706

2.2K_0402_5%

12

R699

1

C1384

C1383

150_0402_1%

10P_0402_50V8J

2

Change to 10pf 102009.

R701

1 2

R702

1 2

+3VS +CRTVDD+CRTVDD

12

R707

2.2K_0402_5%

2N7002DW T/R7_SOT363-6

5

4

Q38B

2N7002DW T/R7_SOT363-6

1

C1385

2

3

10P_0402_50V8J

Q38A

L34

1 2

FCM2012CF-800T06_2P

FCM2012CF-800T06_2P L35

L35

1 2

FCM2012CF-800T06_2P

FCM2012CF-800T06_2P L36

L36

1 2

FCM2012CF-800T06_2P

1

10P_0402_50V8J

2

0_0603_5%

12

R708

2.2K_0402_5%

61

C1386

10P_0402_50V8J

JVGA_HS

JVGA_VS

@

1

C1391

C1391 5P_0402_50V8C

5P_0402_50V8C

2

12

R709

2.2K_0402_5%

GREEN

BLUE

C1387

1

2

C1388

C1388 10P_0402_50V8J

10P_0402_50V8J

2

BLUE GREEN RED

1

2

@D36

@

3

1

D36

2

DAN217_SC59

@D37

@

3

1

D37

D38

@D38

@

+CRTVDD

2

3

DAN217_SC59

Place close to JCRT1

CRT PORT

+CRTVDD+RCRT_VCC+5VS

F1

@

1

C1392

C1392 5P_0402_50V8C

5P_0402_50V8C

2

CH491D_SC59

CRT_DET#(19)

Add it 101409.

D39

2 1

R713

0_0603_5%

@

W=40mils

12

100K_0402_5%

R705

+CRTVDD

1.1A_6VDC_FUSE

RED GREEN BLUE JVGA_VS

CRT_DET# JVGA_HS VGA_DDC_DAT VGA_DDC_CLK

1 2

F1

W=40mils

21

0.1U_0402_16V4Z

JCRT1

1

2

3

4

5

6

7

8

9

10

11

12

13

GND1

14

GND2

ACES_87213-1200G

CONN@ SP02000FT00

Swap net for layout 072809. Change Conn to12pin 080409.

1

C1393

C1147

2

Place close to JCRT1

Add it to solve Flicker occurs issue 100909.

1

C1448

68P_0402_50V8J

2

1

C167

0.1U_0402_16V4Z

0.47U_0603_10V7K

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/09/29 2007/09/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT Connector

NCL20 M/B LA-5631P Schematic

23 41Tuesday, October 20, 2009

E

0.1

of

5

close to IC VCC (+3VS) pins (one Pin one Capacitor)

+3VS +3VS

10U_0603_6.3V6M

1

C1437

C1438

@

D D

0.1U_0402_16V4Z

+HDMI_5V_OUT

1

C1445

0.1U_0402_16V4Z

2

C C

@

2

0.1U_0402_16V4Z

W=40mils

C1447

Add it to solve Flicker occurs issue 100909.

1

C166

0.1U_0402_16V4Z

2

2 1

1

1.1A_6VDC_FUSE

0.47U_0603_10V7K

2

1

C1439

@

2

0.1U_0402_16V4Z

F2

1

2

0.1U_0402_16V4Z

D55

C1440

@

Change package 081709.

21

SS1040_SOD123

10U_0603_6.3V6M

1

C1441

2

+5VS

SDVO_SDAT(8)

SDVO_SCLK(8)

1

C1442

2

0.1U_0402_16V4Z

2.2K_0402_5%

1

C1443

2

0.1U_0402_16V4Z

+3VS

12

R1525

12

inverting level shift for NB

+3VS

12

R1534

R1534 20K_0402_5%

20K_0402_5%

R1565

HDMI_HPD#(10)

7.5K_0402_1%

B B

R1536

12

add it.062309

1 2

0_0402_5%

13

D

TMDS_B_HPD_R TMDS_B_HPD

Q43

2

G

@

S

2N7002_SOT23

R1566

R1566 0_0402_5%

0_0402_5%

@

1 2

R1535 0_0402_5%R1535 0_0402_5%

20K_0402_1%

R1567

1 2

R1568

@

0_0402_5%

@

1 2

4

1

C1444

2

0.1U_0402_16V4Z

NU it for vender's suggestion 091509.

R1519 4.7K_0402_5%@R1519 4.7K_0402_5%@

1 2

+3VS

R1520 4.7K_0402_5%@R1520 4.7K_0402_5%@

1 2

R1522 4.7K_0402_5%@R1522 4.7K_0402_5%@

1 2

+3VS

R1524 4.7K_0402_5%@R1524 4.7K_0402_5%@

1 2

R1527

2.2K_0402_5%

+3VS

Trace AS Short PASS

1 2

R1545 4.7K_0402_5%@R1545 4.7K_0402_5%@ R1528

R1528

1 2

3.4K_0402_1%

TMDS_B_HPD

@

1 2

R1532 0_0402_5%

DVI_TXC+ DVI_TXC-

DVI_TXD2+ DVI_TXD2-

DVI_TXD1+ DVI_TXD1-

DVI_TXD0+ DVI_TXD0-

HPD_7318_R_EC (29)

HPD_7318_EC (29)

U84

+3VS

2

VCC3V

11

VCC3V

15

VCC3V

21

VCC3V

26

VCC3V

33

VCC3V

40

VCC3V

46

VCC3V

3

CG_0

4

CG_1

6

REXT

7

HPD#

8

SDA

9

SCL

10

CG_2

13

OUT_D4+

14

OUT_D4-

16

OUT_D3+

17

OUT_D3-

19

OUT_D2+

20

OUT_D2-

22

OUT_D1+

23

OUT_D1-

1

GND

5

GND

12

GND

18

GND

24

GND

27

GND

31

GND

36

GND

37

GND

43

GND

ASM1442T_QFN48_7X7

Change use from ST to ASM1442T 091009.

3

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

34

EQ_0

35

EQ_1

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

49

GND

U84. 49 (THERMAL_GND) to GND Plane

EQ_1 EQ_0 Equalization

0

1

0

1

Add it.071109

12dB

9dB

6dB

3dB

0

1

*

HDMI_DET#

HDMI_SCLK HDMI_SDATA

DVI_DET

R1521 4.7K_0402_5%R1521 4.7K_0402_5%

1 2

R1523 4.7K_0402_5%@R1523 4.7K_0402_5%@

1 2

R1526 4.7K_0402_5%@R1526 4.7K_0402_5%@

1 2

R1529 4.7K_0402_5%@R1529 4.7K_0402_5%@

1 2

R1530 4.7K_0402_5%@R1530 4.7K_0402_5%@

1 2

TXCD+ (10) TXCD- (10)

TX2D+ (10) TX2D- (10)

TX1D+ (10) TX1D- (10)

TX0D+ (10) TX0D- (10)

+3VS

2

PC_2 PC_1

*

0

1

PC_0

0

1

0

1

0

1

0

1

Take off Q48 090909.

Swing

450

420

450

460

340

400

420

Pre-amp

0

2dB

0

HDMI_SDATA

HDMI_SCLK

R1518

2.2K_0402_5%

1

Slew-rate

0

-3dB

-4dB

0

+5VS

5V Level

R1517

12

2.2K_0402_5%

Shortest trace

Longest trace

HDMI_SDATA

HDMI_SCLK

Place closed to JHDMI1

Add it.071109

+3VS

R1531

2.2K_0402_5%

1 2

HDMI_DET#

13

D

Q42

2

2N7002_SOT23

G

S

For Power Saving Application When Plug-in HDMI HDMI_HPD=High OE#=Low Enable Level Shift When Plug-out HDMI HDMI_HPD=Low OE#=High Disable Level Shift

R1533

1 2

100K_0402_5%

C1446

DVI_DET

1

2

0.1U_0402_16V4Z

NU 090909.

DVI_TXD2+

DVI_TXD2-

A A

DVI_TXD1+ HDMI_TXD1+_R

5

R1538 0_0402_5%R1538 0_0402_5%

1 2

L41

3

2

1 2

2

3

WCM-2012-900T_4P

1 2

L41

4

1

L43

1

4

3

2

WCM-2012-900T_4P @

R1540 0_0402_5%R1540 0_0402_5%

R1542 0_0402_5%R1542 0_0402_5%

2

3

R1544 0_0402_5%R1544 0_0402_5%

HDMI_TXD2+_R

4

SWAP

1

HDMI_TXD2-_R

HDMI_TXD1-_RDVI_TXD1-

1

4

@

DVI_TXD0+

DVI_TXD0- HDMI_TXD0-_R

DVI_TXC+ HDMI_TXC+_R

4

R1537 0_0402_5%R1537 0_0402_5%

1 2

L42

3

2

1 2

L44

2

3

WCM-2012-900T_4P @

1 2

L42

4

1

4

3

2

WCM-2012-900T_4P @

R1539 0_0402_5%R1539 0_0402_5%

R1541 0_0402_5%R1541 0_0402_5%

2

3

R1543 0_0402_5%R1543 0_0402_5%

HDMI_TXD0+_R

4

SWAP

1

HDMI_TXC-_RDVI_TXC-

1

4

3

DVI_TXC- DVI_TXC+

DVI_TXD2-

DVI_TXD1- DVI_TXD1+

DVI_TXD0- DVI_TXD0+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C1509

@C1509

C1510

C1511

C1512

1 2

@

12P_0402_50V8J

DVI_TXD2+

@C1510

@

12P_0402_50V8J

@C1511

@

12P_0402_50V8J

@C1512

@

12P_0402_50V8J

Compal Secret Data

Deciphered Date

DVI_DET

2

R1587

@R1587

@

220_0402_5%

R1588

@R1588

@

220_0402_5%

R1589

@R1589

@

220_0402_5%

R1590

@R1590

@

220_0402_5%

For Vender suggest to add it.062609

2007/09/29 2007/09/29

1 2

R1569 0_0402_5%R1569 0_0402_5%

1U_0603_10V4Z

1

C160

2

+HDMI_5V_OUT

HP_DETECT

HDMI_SDATA HDMI_SCLK

HDMI_TXC-_R HDMI_TXC+_R

HDMI_TXD0-_R HDMI_TXD0+_R

HDMI_TXD1-_R HDMI_TXD1+_R

HDMI_TXD2-_R HDMI_TXD2+_R

HDMI Connector

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042MR019S153ZL

CONN@ DC232000900

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

HDMI

20

GND

21

GND

22

GND

23

GND

NCL20 M/B LA-5631P Schematic

1

of

24 41Tuesday, October 20, 2009

of

24 41Tuesday, October 20, 2009

of

24 41Tuesday, October 20, 2009

0.1

A

B

C

D

E

+VDDA

12

R723

R723 10K_0402_5%

10K_0402_5%

1 1

R725

1 2

R725

1 2

560_0402_5%

R727

1 2

560_0402_5%

10K_0402_5%

R728

SENSE_A

2

B

12

DMIC_DATA_R(22)

DMIC_CLK_R(22)

C1412

BEEP#(29)

SB_SPKR(19)

2 2

3 3

add it.070709

HP_PLUG#(26) MIC_PLUG#(26)

ImpedanceSense Pin

39.2K

SENSE A

4 4

SENSE B

20K 10K

5.1K

39.2K 20K 10K

5.1K

A

C1412

1U_0402_6.3V4Z

C1413

1U_0402_6.3V4Z

12

R735 39.2K_0402_1%

1 2

R736 20K_0402_1%

Codec Signals

PORT-A (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-G (PIN 20) PORT-H (PIN 47)

1 2

C1407 4.7U_0805_10V4ZC1407 4.7U_0805_10V4Z

12

R724

R724 10K_0402_5%

10K_0402_5%

Reserve to change 4.7u for audio noise issue.100809.

C1411

1 2

1U_0402_6.3V4Z

1

C

Q41

E

2SC2411K_SOT23

3

D40

D40 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

2 1

MIC1_L(26) MIC1_R(26)

add it for EMI.072409.

1 2

R726 1.3K_0402_1%

+3VS

1 2

FBM-L11-160808-800LMT_0603

add it.100709

DMIC_DATA_R DMIC_CLK_R

EC_MUTE#(29)

add it 090909.

MONO_IN

L45

1 2

+1.5VS

FBM-L11-160808-800LMT_0603

add it.070709

L38

MIC1_L MIC1_R MIC1_C_R

B

10U_0805_10V4Z

1

C1419

C1418

@

2

100P_0402_50V8J

MIC1_C_L

1 2

C1421 4.7U_0805_10V4ZC1421 4.7U_0805_10V4Z

1 2

C1436 4.7U_0805_10V4ZC1436 4.7U_0805_10V4Z

R730

1 2

R731

1 2

C1293

1 2

10P_0402_50V8J

R744

HDA_RST#_CODEC(18)

MONO_IN

1 2

C1429 100P_0402_50V8J@C1429 100P_0402_50V8J@

10U_0805_10V4Z

1

C1434

C1435

2

0.1U_0402_16V4Z

20mil

1

C1420

2

0.1U_0402_16V4Z

DMIC_DATA

0_0402_5%

DMIC_CLK

0_0402_5%

@C1293

@

1 2

C1430 2.2U_0402_6.3V4Z

0_0402_5%

SENSE_A SENSE_B

+1.5VS_HD

1

2

+3VS_HD

1

9

U83

DVDD

DVDD_IO

23

LINE1_L

24

LINE1_R

14

LINE2_L

15

LINE2_R

21

MIC1_L

22

MIC1_R

16

MIC2_L

17

MIC2_R

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

4

PD#

11

RESET#

12

PCBEEP

13

SENSE A

18

SENSE B

36

CBP

35

CBN

31

CPVREF

43

PVSS2

42

PVSS1

7

DVSS

ALC269X-GR QFN 48P_7X7

49

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PVDD139PVDD2

EAPD/SPDIFO2

MIC1_VREFO_R

MIC1_VREFO_L

EXPOSE_PAD

+5VS

+HD_AVDD

46

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

SPDIFO

MONO_OUT

MIC2_VREFO

VREF

JDREF

CPVEE

AVSS1 AVSS2

C

L37

1 2

FBMA-L11-201209-221LMA30T_0805

W=40mil

1

C1414

10U_0805_10V4Z

2

W=40mil

1

C1416

10U_0805_10V4Z

2

100P_0402_50V8J

C1422

@

38

AVDD125AVDD2

40 41

45 44

32 33

10 6

5 8

47 48

FBMA-L11-160808-301LMA20T_0603~D

20

29 30

28 27 19 34 26

37

AGNDDGND

2008/05/30 2011/05/30

0.1U_0402_16V4Z

1

C1424

2

R732 0_0402_5%R732 0_0402_5%

1 2

R733 33_0402_5%

1 2

1

2

1 2

EC_EAPD

C1423

2

0.1U_0402_16V4Z

SPKL+ SPKL-

SPKR+ SPKR-

HP_LEFT HP_RIGHT

HDA_BITCLK_AUDIO

R741 0_0402_5%R741 0_0402_5%

AZ_SDIN0_HD_R

EAPD

R734 0_0402_5%R734 0_0402_5%

SPDIF_L

10mil 10mil

10mil

2

C1433

2.2U_0402_6.3V4Z

1

Compal Secret Data

+5VAMP

+5VS

1

C1415

0.1U_0402_16V4Z

2

+5VS

1

C1417

0.1U_0402_16V4Z

2

40mil

FBM-L11-160808-800LMT_0603

1

C1425

2

10U_0805_10V4Z

SPKL+ (26) SPKL- (26)

SPKR+ (26) SPKR- (26)

HP_LEFT (26) HP_RIGHT (26)

add it for EMI.072409.

HDA_SDOUT_CODEC (18)

EC_EAPD (29)

L46

SPDIF (26)

add it for EMI 101309. mount R 0ohm 102009.

+MIC2_VREFO

+MIC1_VREFO_R +MIC1_VREFO_L

12

R740

20K_0402_1%

Deciphered Date

0.1U_0402_16V4Z

1

2

HDA_SYNC_CODEC (18)

HDA_SDIN0 (18)

C1408

L39

1

C1431

C1431 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C1409

0.1U_0402_16V4Z

2

+VDDA

12

HDA_BITCLK_CODEC (18)

add it 090909.

D

1

C1432

0.1U_0402_16V4Z

2

40mil

J5

2

112

JUMP_43X39

U82

@

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

DVT NU it.091509.

HDA_BITCLK_AUDIO

+MIC1_VREFO_R +MIC1_VREFO_L

C1427

0.1U_0402_16V4Z

5

4

40mil

0.1U_0402_16V4Z

+VDDA

1 2

R729 22_0402_5%

22_0402_5%

C1428

(output = 300 mA)

4.75V

C1410

@

2.2U_0603_6.3V6K

1 2

@R729

@

C1426

@C1426

@

10P_0402_50V8J

DGND To AGND Bypass

1 2

R737 0_0603_5%

1 2

R738 0_0603_5%

1 2

R739 0_0603_5%@R739 0_0603_5%@

1 2

R742 0_0603_5%@R742 0_0603_5%@

1 2

R743 0_0603_5%@R743 0_0603_5%@

DGND AGND

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

HDA-ALC269Q-GR

NCL20 M/B LA-5631P Schematic

add it for EMI.081009

25 41Wednesday, October 21, 2009

E

0.2

of

A

B

C

D

E

Int. Speaker Conn.

JSPK1

SPKL+(25) SPKL-(25)

20mil

SPKR-(25) SPKR+(25)

20mil

1 1

+5VAMP

R1576

Q46

Q46 AO3413_SOT23-3

AO3413_SOT23-3

S

D

2 2

Change to use SB934130020.091509

+5VSPDIF

1 3

20mil

HP_RIGHT(25) HP_LEFT(25)

R1576 100K_0402_5%

100K_0402_5%

1 2

G

SPDIF_PLUG#

2

For Vender's suggestion change from DGND to AGND.072009.

HP_RIGHT HPOUT_R_1 HPOUT_R_2

R1575

R1575 100K_0402_5%

100K_0402_5%

1 2 61

Q44A

Q44A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

1 2

R378 56.2_0402_1%R378 56.2_0402_1%

1 2

R377 56.2_0402_1%R377 56.2_0402_1%

Chenge to 56.2 ohm for DA-HP FSOV 20081104

SPKL+ SPKL-

SPKR+

Swap net for layout 072709.

3

Q44B

Q44B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

HPOUT_L_1HP_LEFT HPOUT_L_2

1 2 1 2

R518 0_0603_5%R518 0_0603_5%

1 2

R519 0_0603_5%R519 0_0603_5%

1 2

R521 0_0603_5%R521 0_0603_5%

1 2

R522 0_0603_5%R522 0_0603_5%

1 2

HP_PLUG#

HP_PLUG# (25)

20mil

L30 FBM-11-160808-700T_0603L30 FBM-11-160808-700T_0603 L33 FBM-11-160808-700T_0603L33 FBM-11-160808-700T_0603

Take off D28 090909.

SPK_L+ SPK_LSPK_R-SPKRSPK_R+

2

C485

330P_0402_50V7K

1

330P_0402_50V7K

JHP1 conn PIN1/4 need swap 100809.

+5VSPDIF

SPDIF(25)

100P_0402_50V8J

SPDIF_PLUG# SPDIF

JSPK1

4

6

4

GND

3

5

3

GND

2

1

ACES 88266-04001

CONN@SP02000K200

Change to 4pin conn.0622

LINE Out/Headphone Out

2

1

C1083

C486

C1098

1 2

0.1U_0402_16V4Z

1

2

D61

JHP1

6 4

1 5 7

3 8

2

TAITW_PJKAT1-08FNBT1TT4N0

CONN@ DC230006600

Left Right

PJDLC05_SOT23~D

@

2 3

1

3 3

D34

RB751V-40TE17_SOD323-2

MIC1_L(25) MIC1_R(25)

4 4

A

B

1 2

R405 1K_0603_1%R405 1K_0603_1%

1 2

R404 1K_0603_1%R404 1K_0603_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1 2

L31

1 2

L32

2009/02/27 2010/01/21

D34

R403

4.7K_0402_5%

FBM-11-160808-700T_0603

FBM-11-160808-700T_0603 FBM-11-160808-700T_0603

FBM-11-160808-700T_0603

C488

220P_0402_50V8J

Compal Secret Data

Deciphered Date

1 2 12

1

2

+MIC1_VREFO_R+MIC1_VREFO_L

R402

4.7K_0402_5%

C489

220P_0402_50V8J

D35

D35 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2 12

MIC1_L_1 MIC1_R_1

3

1

2

@

For EMI mount it.091509

D

2

D29

PJDLC05_SOT23-3

1

MIC JACK

JMIC1

1 2

3 4

MIC_PLUG#

MIC_PLUG#(25)

P/N:DC230004K00 symbol use DC230710010 .070809

Title

Size Document Number Rev

B

NCL20 M/B LA-5631P Schematic

Date: Sheet

5

6

SINGA_2SJ-0960-C01

CONN@

Compal Electronics, Inc.

Amplifier & Audio Jack

26 41Wednesday, October 21, 2009

E

of

0.1

5

Power Button Logic

D D

TOP Side

1 2

R578 10K_0603_5%@R578 10K_0603_5%@

1 2

R579 10K_0603_5%@R579 10K_0603_5%@

ON/OFF switch

ON/OFFBTN#(28)

C C

Bottom Side

ON/OFFBTN#

EC_ON(29)

EC_ON

10K_0402_5%

1

DAN202UT106_SC70-3

R489

1 2

4

+3VALW

R488

R488 100K_0402_5%

100K_0402_5%

1 2

D22

2

G

2 3

C1521

C1521 1000P_0402_50V7K

1000P_0402_50V7K

13

D

2N7002_SOT23

S

51ON#

2

1

Q19

add it .073109.

12

D63

D63 RLZ20A_LL34

RLZ20A_LL34

ON/OFF (29)

51ON# (32)

3

H6

H5

H_2P5

@

1

2

H3

H2

H1

H_2P9

@

1

H8

H7

H_2P5

@

1

H_2P5

H9

H_2P5

@

1

H4

H_2P9

H_4P1N

@

1

Modify to H_4P1N.100909.

H10

H_2P5

@

1

H_1P2

FD1

@

1

FIDUCIAL_C40M80

FD3

@

1

FIDUCIAL_C40M80

@

1

H20

@

1

FIDUCIAL_C40M80

H19

H_1P2

@

1

FD2

@

1

FD4

@

1

FIDUCIAL_C40M80

1

C161

@C161

@

1 2

0.1U_0402_16V4Z

C162

@C162

@

+3VS +VCCP

B B

A A

5

+3VALW +1.5V

+3VS +1.5V

1 2

0.1U_0402_16V4Z

C163

@C163

@

1 2

0.1U_0402_16V4Z

C164

@C164

@

1 2

0.1U_0402_16V4Z

C165

@C165

@

1 2

0.1U_0402_16V4Z

For EMI to add it.091109.

+1.5V+3VALW

+VCCP+1.5V

Lid Switch

(Hall Effect Switch)

+3VALW

VDD

GND

12

R557

R557 47K_0402_5%

47K_0402_5%

3

D30 RB751V_SOD323D30 RB751V_SOD323

1

C1379

C1379 10P_0402_50V8J

10P_0402_50V8J

2

21

Change to use SC1H751H010.091509

Title

Size Document Number Rev

Custom

Date: Sheet

LID_SW# (29)

Compal Electronics, Inc.

PWR ON/OFF & Screw Hole

NCL20 M/B LA-5631P Schematic

27 41Tuesday, October 20, 2009

1

of

0.1

2

C1378

1

0.1U_0402_16V4Z

U78

A3212ELHLT-T_SOT23W-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/01/22 2009/11/20

Compal Secret Data

Deciphered Date

2

OUTPUT

1

2

A

B

C

D

E

Add PWR net.071309

JP5

B+ P3

BATT+

SUSP#(29,31,36)

1 1

WLAN

3G USB

Change from SUSP# to USB_ON#.073109.

2 2

ADP_I(29)

LAN_CLKREQ#(16)

PCIE_WAKE#(19)

MINI2_CLKREQ#(16)

ICH_SMBDATA(16,19)

ICH_SMBCLK(16,19)

USB_OC#2(19)

USB_ON#(29) ON/OFFBTN#(27) ON/OFF_LED#(29)

MINI1_LED#(30)

WWAN_LED#(30) CLK_PCIE_MINI2#(16) CLK_PCIE_MINI2(16)

CLK_PCIE_LAN#(16) CLK_PCIE_LAN(16)

CLK_PCIE_WWAN#(16) CLK_PCIE_WWAN(16)

USB20_P3(19)

USB20_N3(19)

USB20_P5(19)

USB20_N5(19)

USB20_P2(19)

USB20_N2(19)

SUSP# FSTCHG ADP_I

CSIN CSIP

LAN_CLKREQ# PCIE_WAKE# MINI2_CLKREQ# ICH_SMBDATA ICH_SMBCLK USB_OC#2 USB_ON# ON/OFFBTN# ON/OFF_LED# MINI1_LED# WWAN_LED# CLK_PCIE_MINI2# CLK_PCIE_MINI2

CLK_PCIE_LAN# CLK_PCIE_LAN

CLK_PCIE_WWAN# CLK_PCIE_WWAN

USB20_P3 USB20_N3 USB20_P5 USB20_N5 USB20_P2 USB20_N2

+5VALW

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

81

GND

SP020907220 CONN@

Change conn 072409.

GND

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

82

B+

BATT+

IREF CHGVADJ WWAN_CLKREQ# E51TXD_P80DATA E51RXD_P80CLK WWAN_WAKEUP# WXMIT_OFF# WL_OFF# PLT_RST_BUF# EC_LAN_PME#

PCIE_ITX_C_PRX_P3 PCIE_ITX_C_PRX_N3 PCIE_PTX_C_IRX_P3 PCIE_PTX_C_IRX_N3

PCIE_ITX_C_PRX_P2 PCIE_ITX_C_PRX_N2 PCIE_PTX_C_IRX_P2 PCIE_PTX_C_IRX_N2

PCIE_ITX_C_PRX_P1 PCIE_ITX_C_PRX_N1 PCIE_PTX_C_IRX_P1 PCIE_PTX_C_IRX_N1

+1.5VS

+3VS +3VALW

FSTCHG (29) IREF (29) CHGVADJ (29) WWAN_CLKREQ# (16) E51TXD_P80DATA (29) E51RXD_P80CLK (29)

WWAN_WAKEUP# (29)

WXMIT_OFF# (29) WL_OFF# (29) PLT_RST_BUF# (17)

EC_LAN_PME# (29)

PCIE_ITX_C_PRX_P3 (19)

PCIE_ITX_C_PRX_N3 (19) PCIE_PTX_C_IRX_P3 (19) PCIE_PTX_C_IRX_N3 (19)

PCIE_ITX_C_PRX_P2 (19)

PCIE_ITX_C_PRX_N2 (19) PCIE_PTX_C_IRX_P2 (19) PCIE_PTX_C_IRX_N2 (19)

PCIE_ITX_C_PRX_P1 (19)

PCIE_ITX_C_PRX_N1 (19) PCIE_PTX_C_IRX_P1 (19) PCIE_PTX_C_IRX_N1 (19)

GLAN

WLAN

3G

BT Module CONN.

change EC signal name form BT_OFF# to BT_ON# 11/14

BT_ON#(29)

10K_0402_5%

USB20_P6(19) USB20_N6(19)

R291

+3VS

ADD PMOS SOFT START 11/14

1

C357

0.1U_0402_16V4Z

2

12

+3VS +3VS_BT

Q20

Q20 AO3413_SOT23-3

AO3413_SOT23-3

D

S

D

S

G

2

Change to use SB934130020.091509

USB20_P6 USB20_N6

13

0.1U_0402_16V4Z

+3VS_BT

C348

12

JBT1

1

2

3

GND

4

GND

ACES 88266-04001

CONN@

CONN@ SP02000K200

SP02000K200

5 6

USB CONN. USB CONN.

USB20_N0(19) USB20_P0(19)

+USB_VCCA

PJDLC05_SOT23-3

+USB_VCCA

3 3

USB20_N1(19) USB20_P1(19)

PJDLC05_SOT23-3

4 4

A

+USB_VCCA

150U_B2_6.3VM_R45M

1

+

C1233

2

USB20_N1 USB20_P1

D31

For EMI.090909.

W=80mils

2

3

1

470P_0402_50V7K

1

C1234

2

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020133GB004M25MZL

@

SUYIN_020133GB004M25MZL

P/N:LTCX001OP00 symbol use SP010906181 .070909

B

150U_B2_6.3VM_R45M

1

+

2

W=80mils

+USB_VCCA

470P_0402_50V7K

C1231

USB20_N0 USB20_P0

D32

For EMI.090909.

1

C1232

2

JUSB1

1

VCC

2

D-

3

D+

4

GND

Issued Date

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020133GB004M25MZL

2009/02/27 2010/01/21

C

2

3

@

1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+5VALW

1 2 3

1

C1240

4.7U_0805_10V4Z

2

USB_ON#

Change use USB_ON# to control.072009.

Compal Secret Data

Deciphered Date

4

U34

GND

OUT

IN

OUT OUT

IN

FLG

EN#

TPS2061DRG4_SO8

D

80mil

8 7 6 5

+USB_VCCA

+3VALW

12

R446

R446 100K_0402_5%

100K_0402_5%

1 2

R447

R447 10K_0402_5%

10K_0402_5%

1

C1241

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

NEW CARD & USB Connector

NCL20 M/B LA-5631P Schematic

USB_OC#0 (19)

Change use USB_OC#0 to control.091109.

E

0.1

of

28 41Tuesday, October 20, 2009

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z C1245

C1245

1

C1244

+3VALW

1 2

R448 10K_0402_5%

@

D D

C C

+3VALW

B B

A A

1 2

R449 100K_0402_5%R449 100K_0402_5%

22P_0402_50V8J@

+5VS

1 2

R458 4.7K_0402_5%R458 4.7K_0402_5%

1 2

R460 4.7K_0402_5%R460 4.7K_0402_5%

1 2

R462 2.2K_0402_5%R462 2.2K_0402_5%

1 2

R463 2.2K_0402_5%R463 2.2K_0402_5%

1 2

R464 47K_0402_5%R464 47K_0402_5%

1 2

R465 47K_0402_5%R465 47K_0402_5%

1 2

R466 100K_0402_5%R466 100K_0402_5%

1 2

R477 4.7K_0402_5%R477 4.7K_0402_5%

+3VS

1 2

R467 2.2K_0402_5%R467 2.2K_0402_5%

1 2

R468 2.2K_0402_5%R468 2.2K_0402_5%

EC_PME#

PLT_RST#

C1249

R452 33_0402_5%@R452 33_0402_5%@

12

CLK_PCI_LPC(16)

+3VALW

R453 47K_0402_5%R453 47K_0402_5%

C1250 0.1U_0402_16V4ZC1250 0.1U_0402_16V4Z

TP_CLK TP_DATA

EC_SMB_CK1 EC_SMB_DA1 KSO1 KSO2 LID_SW# EC_LAN_PME#

Add it 090909.

EC_SMB_CK2 EC_SMB_DA2

12

C1244

2

0.1U_0402_16V4Z

EC_GA20(18)

EC_KBRST#(18)

SERIRQ(19)

LPC_FRAME#(18)

LPC_AD3(18) LPC_AD2(18) LPC_AD1(18) LPC_AD0(18)

PLT_RST#(8,17)

EC_SCI#(19)

PM_CLKRUN#(19)

EC_SMB_CK1(33) EC_SMB_DA1(33) EC_SMB_CK2(4) EC_SMB_DA2(4)

PM_SLP_S3#(19) PM_SLP_S5#(19)

EC_SMI#(19)

HPD_7318_EC(24)

BT_LED#(30)

HPD_7318_R_EC(24) INVT_PWM(22)

FAN_SPEED1(4)

BT_ON#(28)

ON/OFF(27)

PWR_SUSP_LED(30)

NUM_LED#(30)

2

0.1U_0402_16V4Z

4

0.1U_0402_16V4Z

1

C1242

2

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

PLT_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# HPD_7318_EC BT_LED#

HPD_7318_R_EC INVT_PWM FAN_SPEED1 BT_ON# E51TXD_P80DATA E51RXD_P80CLK ON/OFF

NUM_LED#

C1246

EC_CRY1 EC_CRY2

2

C1247

1000P_0402_50V7K

1

U35

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

+3VALW

FBM-L11-160808-800LMT_0603

2

C1248

C1248 1000P_0402_50V7K

1000P_0402_50V7K

1

9

22

33

96

VCC

PWM Output

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SPI Flash ROM

SM Bus

GPIO

GND

11

24

35

GND

L17

+EC_VCCA

12

67

111

125

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

GPIO

94

ADP_I/AD2/GPIO3A

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

GPI

AGND

GND

KB926QFD3_LQFP128_14X14

69

20mil

113

ECAGND

FBM-L11-160808-800LMT_0603

3

1

C1243

2

0.1U_0402_16V4Z

ECAGND

AD3/GPIO3B

AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

BKOFF#/GPXO08

GPXO10 GPXO11

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

21

BEEP#

23

1 2

26

R450 0_0402_5%R450 0_0402_5%

27

BATT_TEMP

63

BATT_OVP

64 65

AD_BID0

66 75 76

68

EN_FAN1

70

IREF

71 72

ODD_ON#

83

USB_ON#

84 85

ODD LED#

86

TP_CLK

87

TP_DATA

88

ODD BTN#

97 98 99

LID_SW#

109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120

EC_SPICLK

126

EC_SPICS#/FSEL#

128

73

EC_MUTE#

74

FSTCHG

89

BATT_BLUE_LED#

90

CAPS_LED#

91

BATT_RED_LED#

92

PWR_LED

93

SYSON

95

VR_ON

121

ACIN

127

100

EC_LID_OUT#

101

EC_ON

102 103

EC_PWROK

104

BKOFF#

105

WL_OFF#

106

WXMIT_OFF#

107 108

110

ENBKL

112

EC_EAPDPWR_SUSP_LED

114 115

SUSP#

116

PBTN_OUT#

117

EC_PME#

118 124

L18

12

FAN_PWM

add it 072809.

1 2

R25 0_0402_5%R25 0_0402_5%

add it 062609.

1

C1255

4.7U_0805_10V4Z

2

KSI[0..7] KSO[0..17]

BEEP# (25)

FAN_PWM (4)

ACOFF (35)

C1251 0.01U_0402_16V7KC1251 0.01U_0402_16V7K

BATT_OVP (35) ADP_I (28)

EN_FAN1 (4)

IREF (28) CHGVADJ (28)

ODD_ON# (21) USB_ON# (28)

ODD LED# (30) TP_CLK (30) TP_DATA (30)

ODD BTN# (30) MCH_TSATN_EC# (8)

LID_SW# (27)

EC_SI_SPI_SO (30) EC_SO_SPI_SI (30) EC_SPICLK (30) EC_SPICS#/FSEL# (30)

WWAN_WAKEUP# (28)

EC_MUTE# (25)

FSTCHG (28) BATT_BLUE_LED# (30) CAPS_LED# (30) BATT_RED_LED# (30)

PWR_LED (30) SYSON (8,31,37) VR_ON (40)

ACIN (19,32)

EC_RSMRST# (19) EC_LID_OUT# (19) EC_ON (27) EC_SWI# (19) EC_PWROK (19) BKOFF# (22) WL_OFF# (28)

WXMIT_OFF# (28)

ON/OFF_LED# (28)

PM_SLP_S4# (19)

ENBKL (10)

EC_EAPD (25) EC_THERM# (19) SUSP# (28,31,36) PBTN_OUT# (19)

add it 072209.

12

EC_LAN_PME# (28)

2

KSI[0..7] (30) KSO[0..17] (30)

ECAGND

BATT_TEMP (33)

EC modify pin define CAPS_LED#/NUM_LED# 101309.

For EC Tools

+3VALW

JP6

1

1 2 3 4

ACES_85205-0400

@ SP020007200

Take off 3S/4S# and 65W/90W# signel.072009.

WXMIT_OFF#

Ra

Rb

C1253

22P_0402_50V8J

BATT_TEMP BATT_OVP ACIN

E51TXD_P80DATA

2

E51RXD_P80CLK

3 4

@

R454 100K_0402_5%

Analog Board ID definition, Please see page 3.

+3VALW

R459

R459 100K_0402_5%

100K_0402_5%

1 2

AD_BID0

R461

R461 33K_0402_5%

33K_0402_5%

1 2

EC_CRY1 EC_CRY2

1

2

1

4

IN

2

X1

32.768KHZ_12.5P_MC-306

C1256 100P_0402_50V8JC1256 100P_0402_50V8J

12

C1257 100P_0402_50V8JC1257 100P_0402_50V8J

12

C1258 100P_0402_50V8JC1258 100P_0402_50V8J

12

1

Place on RAM door

E51TXD_P80DATA (28) E51RXD_P80CLK (28)

Add it 090909.

+3VALW

12

1

C1252

0.1U_0402_16V4Z

2

1

C1254

2

OUT

22P_0402_50V8J

Change to use 22pf.091509

NC3NC

Security Classification

2009/02/27 2010/01/21

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/02/27 2010/01/21

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

EC ENE KB926

NCL20 M/B LA-5631P Schematic

1

0.1

29 41Tuesday, October 20, 2009

of

To TP/B Conn.

JTP1

C1259 0.1U_0402_16V4ZC1259 0.1U_0402_16V4Z

1 2

+3VALW

R470 0_0603_5%

EC_SPICS#/FSEL#(29)

+3VALW

R471 4.7K_0402_5% R471 4.7K_0402_5%

1 2

R473 4.7K_0402_5% R473 4.7K_0402_5%

1 2

EC_SPICS#/FSEL#

SPI_HOLD#

ENE suggestion SPI Frequency over 66MHz SST: 50MHz MXIC: 70MHz ST: 40MHz

1 2

+SPI_VCC

U37

1

CE# WP# HOLD# VSS

VDD SCK

SI

SO

3 7 4

MX25L8005M2C-15G_SOP8

+5VS TP_CLK(29) TP_DATA(29)

8

EC_SPICLK_RSPI_WP#

6 5 2

R472 0_0402_5% R472 0_0402_5%

1 2

R474 0_0402_5% R474 0_0402_5%

1 2

R475 0_0402_5% R475 0_0402_5%

1 2

EC_SPICLK_R

FOR EMI

R476

R476 22_0402_5%

22_0402_5%

@

1 2 2

C1263

C1263 10P_0402_50V8J

10P_0402_50V8J

1

@

EC_SPICLK (29) EC_SO_SPI_SI (29) EC_SI_SPI_SO (29)

Take off U36.072009

+5VS

TP_CLK TP_DATA

JTP2

GND GND

6

5

4

3

2

1

ACES_85201-0605N

SP01000LB00

8 7

TP_CLK TP_DATA

1

C1260

C1261

@

2

100P_0402_50V8J

+5VS

1

@

2

C1262

0.1U_0402_16V4Z

Co-lay NON-ZIF CONN 091009.

JTP1

8

6

G2

6

7

5

G1

5

4

3

2

1

E-T_7182K-F06N-00R

SP020907230 CONN@

Change conn 072409.

swap net.072809.

TP_CLK TP_DATA

swap net.101409.

2

3

D21

PJDLC05_SOT23-3

1

for EMI mount it.091509

INT_KBD Conn.

JKB1

26

GND2

25

GND1

KSI0

24

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

CONN@

ACES_85208-24071

SWAP KB PIN define 082009. KB P/N:SP01000RY00

KSI1

23

KSI2

22

KSO0

21

KSO1

20

KSO2

19

KSI3

18

KSO3

17

KSO4

16

KSO5

15

KSO6

14

KSO7

13

KSO8

12

KSI4

11

KSO9

10

KSI5

9

KSI6

8

KSO10

7

KSO11

6

KSI7

5

KSO12

4

KSO13

3

KSO14

2

KSO15

1

To LED/B

CAPS_LED#(29) NUM_LED#(29)

SATA_LED#(18)

SATA_LED# 5IN1_LED#

add it .072009

CAPS_LED# NUM_LED#

+3VS

5

U86

2

P

B

1

A

G

NC7SZ08P5X_NL_SC70-5

3

KSI[0..7] KSO[0..15]

+3VS

MEDIA_LED#

4

Y

KSI[0..7] (29)

KSO[0..15] (29)

KSI0

12

C1265100P_0402_50V8J C1265100P_0402_50V8J

KSI1

12

C1267100P_0402_50V8J C1267100P_0402_50V8J

KSI2

12

C1269100P_0402_50V8J C1269100P_0402_50V8J

KSI3

12

C1271100P_0402_50V8J C1271100P_0402_50V8J

KSI4

12

C1273100P_0402_50V8J C1273100P_0402_50V8J

KSI5

12

C1275100P_0402_50V8J C1275100P_0402_50V8J

KSI6

12

C1277100P_0402_50V8J C1277100P_0402_50V8J

KSI7

12

C1279100P_0402_50V8J C1279100P_0402_50V8J

KSO0

12

C1281100P_0402_50V8J C1281100P_0402_50V8J

KSO1

12

C1283100P_0402_50V8J C1283100P_0402_50V8J

KSO2

12

C1285100P_0402_50V8J C1285100P_0402_50V8J

KSO3

12

C1287100P_0402_50V8J C1287100P_0402_50V8J

Change from 5vs to 3vs.073109.

+3VS

CAPS_LED# NUM_LED# MEDIA_LED#

KSO4 KSO5

KSO6

KSO7

KSO8

KSO9 KSO10 KSO11 KSO12 KSO13

KSO14

KSO15

JLEDB1

1

2

3

4

5

G1

5

6

G2

6

E-T_7182K-F06N-00R

SP020907230 CONN@

JLEDB2

1

2

3

4

5

6

GND

ACES_85201-0605N

C1268 100P_0402_50V8JC1268 100P_0402_50V8J C1270 100P_0402_50V8JC1270 100P_0402_50V8J C1272 100P_0402_50V8JC1272 100P_0402_50V8J C1274 100P_0402_50V8JC1274 100P_0402_50V8J C1276 100P_0402_50V8JC1276 100P_0402_50V8J C1278 100P_0402_50V8JC1278 100P_0402_50V8J C1280 100P_0402_50V8JC1280 100P_0402_50V8J C1282 100P_0402_50V8JC1282 100P_0402_50V8J C1284 100P_0402_50V8JC1284 100P_0402_50V8J C1286 100P_0402_50V8JC1286 100P_0402_50V8J C1288 100P_0402_50V8JC1288 100P_0402_50V8J C1290 100P_0402_50V8JC1290 100P_0402_50V8J

7 8

Co-lay NON-ZIF CONN 091009.

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

To Card Reader/B Conn.

PWR_SUSP_LED#

3

Q16B

Q16B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

R480

5

12

R481

4

PWR_LED#

61

Q16A

Q16A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

12

PWR_SUSP_LED(29)

10K_0402_5%

PWR_LED(29)

10K_0402_5%

To SW/B

JSWB1

KSO1 KSI1 KSI5

2009/02/27 2010/01/21

JSWB1

1

2

3

5

3

GND

4

6

4

GND

ACES 88266-04001

CONN@SP02000K200

Compal Secret Data

Deciphered Date

JCRB1

+3VALW

+3VS

+5VALW

+5VS

PWR_SUSP_LED# PWR_LED#

BATT_BLUE_LED#(29) BATT_RED_LED#(29)

MINI1_LED#(28) WWAN_LED#(28) BT_LED#(29) ODD BTN#(29) ODD LED#(29)

CLK_SD_48M(16)

USB20_N4(19) USB20_P4(19)

BATT_BLUE_LED# BATT_RED_LED# MINI1_LED# WWAN_LED# BT_LED# ODD BTN# ODD LED# CLK_SD_48M 5IN1_LED#

USB20_N4 USB20_P4

+3VALW

+3VS

+5VALW

+5VS

PWR_SUSP_LED# PWR_LED# BATT_BLUE_LED# BATT_RED_LED# MINI1_LED# WWAN_LED# BT_LED# ODD BTN# ODD LED# CLK_SD_48M 5IN1_LED#

USB20_N4 USB20_P4

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

21

19

G1

19

22

20

G2

20

E-T_7082K-F20N-00R

CONN@SP020907241

Change conn 072809.

JCRB2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

GND

22

GND

ACES_87151-2005N

Co-lay NON- ZIF CONN091009.

Compal Electronics, Inc.

Title

Size Document Number Rev

B

NCL20 M/B LA-5631P Schematic

Date: Sheet

Compal Electronics, Inc.

BIOS, I/O Port & K/B Connector

of

30 41Tuesday, October 20, 2009

0.1

A

B

C

D

E

+5VALW TO +5VS +3VALW TO +3VS

+5VALW

U42

8

S

D

7

S

D

6

S

D

C1341

+VSB

1

C1342

C1342 10U_0805_10V4Z

10U_0805_10V4Z

2

R540

R540 33K_0402_5%

33K_0402_5%

SUSP

C1343

10U_0805_10V4Z

1

C1340

100P_0402_50V8J

1 1

100P_0402_50V8J

2

1000P_0402_50V7K

2

1

2

12

2

G

5

D

AP4800_SO8

R541

R541 120K_0402_5%

120K_0402_5%

13

D

Q24

S

2N7002_SOT23

G

1 2 3 4

12

+5VS

1

C1344

C1344 10U_0805_10V4Z

10U_0805_10V4Z

2

5VS_GATE

1

C1347

0.1U_0603_25V7K

2

1

C1345

2

1U_0603_10V4Z

R539

470_0603_5%

1 2

13

D

Q23

S

2N7002_SOT23

SUSP

2

G

Mount it.070709

C1352

C1352 10U_0805_10V4Z

10U_0805_10V4Z

+VSB

1

C1353

2

10U_0805_10V4Z

R548

R548 200K_0402_5%

200K_0402_5%

SUSP

+3VALW

1

2

12

2

G

Q27

Q27 2N7002_SOT23

2N7002_SOT23

U43

8

D

7

D

6

D

5

D

AP4800_SO8

13

D

S

S S S G

3VS_GATE

1 2 3 4

+3VS

1

C1348

C1348 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C1356

0.1U_0603_25V7K

2

1

C1349

2

1U_0603_10V4Z

R545

R545 470_0603_5%

470_0603_5%

1 2

13

D

Q25

S

2N7002_SOT23

SUSP

2

G

+1.5V to +1.5VS Transfer

2 2

SUSP

2

G

+VSB

12

R1591

R1591 510K_0402_5%

510K_0402_5%

13

D

2N7002_SOT23

S

10U_0805_10V4Z

Q47

C1513

+1.5V

1

2

+1.5VS_GATE

1

C1516

0.1U_0603_25V7K

2

U85

8

D

7

D

6

D

5

D

SI4800DY_SO8

S S S

G

+1.5VS

0.1U_0402_16V4Z

1

C1514

C1514 10U_0805_10V4Z

10U_0805_10V4Z

2

0.1U_0402_16V4Z

1

C1515

2

SYSON#

SYSON(8,29,37)

SYSON#

SYSON

R542

100K_0402_5%

1 2 3 4

+5VALW +5VALW

R538

R538 100K_0402_5%

100K_0402_5%

1 2

13

D

Q30

2

2N7002_SOT23

G

12

S

modify it.071109

SUSP(38)

SUSP#(28,29,36)

SUSP

R547

10K_0402_5%

R543

R543 100K_0402_5%

100K_0402_5%

1 2

13

D

Q33

2

2N7002_SOT23

G

S

12

3 3

add it.070709

Discharge circuit

+1.5V

R554

R554 470_0603_5%

470_0603_5%

1 2 61

Q18A

4 4

SYSON# SUSPSUSPSUSP

2

2N7002DW-T/R7_SOT363-6

modify it.071109

A

+1.5VS

R551

R551 470_0603_5%

470_0603_5%

1 2 3

Q18B

2N7002DW-T/R7_SOT363-6

4

+VCCP

R552

R552 470_0603_5%

470_0603_5%

1 2 13

D

5

B

S

2

G

Q31

Q31 2N7002_SOT23

2N7002_SOT23

+0.75V

1 2 13

D

S

R553

R553 470_0603_5%

470_0603_5%

2

G

Q32

Q32 2N7002_SOT23

2N7002_SOT23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/02/27 2010/01/21

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

NCL20 M/B LA-5631P Schematic

31 41Tuesday, October 20, 2009

E

0.1

of

A

1 1

PL1

HCB2012KF-121T50_0805

1 2

12

PC4

100P_0402_50V8J

SP02000K200

PJP1

4

6

4

G2

3

5

3

G1

2

1

ACES_88266-04001

CONN@

DC_IN_S1 PACIN

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

B

12

PC5

PC5 100P_0402_50V8J

100P_0402_50V8J

VIN

12

PC6

PC6 1000P_0402_50V7K

1000P_0402_50V7K

C

PR1

1M_0402_1%

1 2

PU1A

12

1

0

LM358DT_SO8

VS

8

3

P

+

2

-

G

4

22K_0402_5%

1 2

0.1U_0603_25V7K

10K_0402_5%

1 2

PR4

PC2

PR9

12

PR2

@PR2

@

10K_0402_5%

PR5

0_0402_5%

ACIN(19,29)

1 2

10K_0402_5%

PR8

12

PD1

PD1 RLZ4.3B_LL34

RLZ4.3B_LL34

PR6

10K_0402_5%

12

D

VINVIN

12

PR3

84.5K_0402_1%

12

PR7

PR7 20K_0402_1%

20K_0402_1%

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

RTCVREF

PACIN(35)

2 2

PBJ1

-+

12

ML1220T13RE

45@

PD3

RLS4148_LL34-2

3 3

+CHGRTC

4 4

BATT+

PR16

560_0603_5%

1 2

51ON#(27)

CHGRTCP

PR17

560_0603_5%

1 2

PR12

200_0603_5%

1 2

100K_0402_1%

PR14

22K_0402_1%

1 2

RTCVREF

3.3V

12

PC17

PC17 10U_0805_10V4Z

10U_0805_10V4Z

+RTCBATT

12

PR13

PU2 G920AT24U_SOT89-3PU2 G920AT24U_SOT89-3

3

OUT

N1

12

PC13

0.22U_1206_25V7K

IN

GND

1

PQ1

PQ1 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

2

12

PR15

PR15 200_0603_5%

200_0603_5%

N2

2

12

PC18

PC18 1U_0805_25V4Z

1U_0805_25V4Z

PR10

68_1206_5%

13

VIN

PD2

RLS4148_LL34-2

1 2 12

12

PC14

0.1U_0603_25V7K

PR11

PR11 68_1206_5%

68_1206_5%

VS

PJ1

+3VALWP +3VALW

@PC7

@

0.1U_0402_16V7K

+5VALWP

@PC9

@

0.1U_0402_16V7K

+VSBP +VSB

0.1U_0402_25V6

+VCCGFXP +VCCGFX

2

JUMP_43X118

PC7

PC9

PC11

JUMP_43X118

(4.69A,200mils ,Via NO.= 10)

1 2

PJ3

2

JUMP_43X118

(5.58A,240mils ,Via NO.= 12)

1 2

PJ5

2

JUMP_43X39

(120mA,40mils ,Via NO.= 2)

1 2

PJ8

2

JUMP_43X118

(7.09A,300mils ,Via NO.=16)

PJ11

+VCCPP +VCCGFX

2

JUMP_43X118

Min. Typ Max. H-->L 16.976V 17.525V 17.728V L-->H 17.430V 17.901V 18.384V

112

Vin Dectector

+5VALW

PJ7

2

112

JUMP_43X118

JUMP_43X118 PJ2

PJ2

PC8

PC12

2

112

JUMP_43X118

(3.464A,160mils ,Via NO.=8)

1 2

PJ6

2

112

JUMP_43X118

1 2

+1.8V+1.8VP

+1.5VP +1.5V

@PC8

@

0.1U_0402_16V7K

@PC12

@

0.1U_0402_16V7K

(4.6A,200mils ,Via NO.=10)

PJ9

+VCCPP +VCCP

2

112

JUMP_43X118

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DCIN & DETECTOR

NCL20 M/B LA-5631P Schematic

D

of

32 41Tuesday, October 20, 2009

0.1

A

VMB

PL2

HCB2012KF-121T50_0805

BATT_S1

CONN@

1 1

SUYIN_200275GR008G13GZR

2 2

CONN@

GND GND

PJP2

10 9 8

8

7

B/I

6

TS

5

EC_SMCA

4

EC_SMDA

3

2

1

HCB2012KF-121T50_0805

12

PC20

PC20 1000P_0402_50V7K

1000P_0402_50V7K

PR23 1K_0402_5%PR23 1K_0402_5%

1 2

PR25

100_0402_1%

1 2

PR26

PR26 100_0402_1%

100_0402_1%

1 2

BATT+

12

PC19

0.01U_0402_25V7K

12

PR31

PR31 1K_0402_1%

1K_0402_1%

PR29

6.49K_0402_1%

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

12

PR30

PR30 100K_0402_1%

100K_0402_1%

VL

47K_0402_1%

1 2

8

3

P

+

2

-

G

LM393DG_SO8

4

PR27

100K_0402_1%

VL

12

PH1

PC22

PH1

12

100K_0603_1%_TSM1A104F4361RZ

0.22U_0603_10V7K

12

+3VALW

BATT_TEMP (29)

0.1U_0603_25V7K

PR24

13.7K_0402_1%

1 2

PR28

15.4K_0402_1%

PC21

TM_REF1

12

PC23

1000P_0402_50V7K

12

PR22

O

PU3A

VL

PR21

PR21 47K_0402_1%

47K_0402_1%

1 2

PD4

RLS4148_LL34-2

1

VL

12

2

13

PQ2

PQ2 DTC115EUA_SC70-3

DTC115EUA_SC70-3

MAINPWON (34)

PH2 near main Battery CONN :

EC_SMB_CK1 (29)

EC_SMB_DA1 (29)

BAT. thermal protection at 92 degree C Recovery at 56 degree C

VL

PR32

@PR32

VL

12

PQ3

B+

100K_0402_1%

3 3

100K_0402_1%

VL

PR38

100K_0402_1%

SPOK(34)

4 4

A

1 2

PR39

PR39 0_0402_5%

0_0402_5%

12

PC27

@

13

D

2

G

S

0.1U_0402_16V7K

PQ4

PQ4 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PR34

1 2

PR36

22K_0402_1%

12

PC24

@

TP0610K-T1-E3_SOT23-3

0.22U_1206_25V7K

13

2

B

12

PC25

@

+VSBP

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

100K_0603_1%_TH11-4H104FT

0.22U_0603_16V7K

2007/09/20 2008/09/20

PH2

@PH2

@

12

PC26

@PC26

@

Compal Secret Data

PR35

13.7K_0402_1%@

1 2

12

PR37

@PR37

@

15.4K_0402_1%

Deciphered Date

C

TM_REF1

@PR33

@

47K_0402_1%

1 2

VL

5

+

6

-

PR33

8

P

G

LM393DG_SO8

4

@

47K_0402_1%

1 2

PD5

@PD5

@

LL4148_LL34-2

O

PU3B

7

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

NCL20 M/B LA-5631P Schematic

D

0.1

of

33 41Tuesday, October 20, 2009

5

4

3

2

1

TPS51427_B+

PR40

PL13

HCB2012KF-121T50_0805

B+

D D

C C

B B

+3.3VALWP Ipeak=4.687A ; Imax=3.281A Choke DCRmax=40m ohm Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Vlimit=(5E-06 * 200K)/10=100mV Ilimit=100mV/17.9m ~100mV/14.5m =5.58A ~ 6.89A Iocp=Ilimit+Delta I/2 =6.54A ~ 6.659A Delta I=1.933A (Freq=300KHz)

1 2

+3VALWP

150U_B2_6.3VM

PC38

12

PC32

2200P_0402_50V7K

PR45

@PR45

@

4.7_1206_5%

PC40

@PC40

@

PD6

1 2

12

PR51

100K_0402_1%

1 2

PQ5

PQ5 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

3

2

1

PQ7

IRFH3707TRPBF_PQFN8-3

PR52

1 2

200K_0402_1%

PR57

806K_0603_1%

PR59

0_0402_5%

PC45

0.22U_0603_10V7K

VL

1 2

12

PC28

PC29

PC141

0.1U_0402_25V6

2.2UH_MMD-06AH-2R2M-X2A_6A_20%

1

2

12

PR44

+

PR44 0_0402_5%

0_0402_5%

PR47

@PR47

@

10K_0402_1%

1 2

PC29

4.7U_0805_25V6-K

PL3

1 2

680P_0402_50V7K

4.7U_0805_25V6-K

GLZ5.1B_LL34-2

VS

PD7

1SS355TE-17_SOD323-2

PD7

MAINPWON(33)

PQ9

2

PQ9

TP0610K-T1-E3_SOT23-3

PR40

0_0805_5%

1 2

PR42 0_0603_5%PR42 0_0603_5%

PC39

0.1U_0603_25V7K

1 2

PC44 0.22U_0603_10V7KPC44 0.22U_0603_10V7K

@PR55

@

0_0402_5%

PR60

@PR60

@

47K_0402_5%

1 2

12

PC47

0.047U_0603_16V7K

PC34

0.1U_0603_25V7K

DH3

BST3A

12

LX3

DL3

FB3

VL

2VREF_TPS51427

1 2

PR55

PR56

1 2

2VREF_TPS51427

12

PC48

@PC48

@

0.047U_0402_16V7K

1 2

PU4

33

TP

26

DRVH2

24

VBST2

25

LL2

23

DRVL2

30

VOUT2

32

REFIN2

1

VREF2

8

LDOREFIN

20

NC

4

EN_LDO

14

EN1

27

EN2

0_0402_5%

PC46

PC35

1U_0603_10V6K

6

VIN

VREF3

2

5

12

1 2

1U_0603_10V6K

2VREF_TPS51427

1 2

3

V5FILT

TONSE

PR58

PR58 0_0402_5%

0_0402_5%

7

LDO

V5DRV DRVH1

VBST1

DRVL1

PGND

VOUT1

VSW

SKIPSEL

PGOOD2

PGOOD1

TRIP1

TRIP2

GND

21

VL

12

PC36

PC37

4.7U_0805_6.3V6K

19 15 17

16

LL1

18

22

10

11

FB1

9

29

28

13

12

31

SN0806081RHBR_QFN32_5X5

PC37

1U_0603_10V6K

1 2

DH5

PR43 0_0603_5%PR43 0_0603_5%

BST5A

0.1U_0603_25V7K

LX5

DL5

FB5

1 2

ILM1

ILIM2

PR49 0_0402_5%@ PR49 0_0402_5%@

PR50 0_0402_5%PR50 0_0402_5%

AON7408L_DFN8-5

12

PC41

1 2

IRFH3707TRPBF_PQFN8-3

12

PR53

200K_0402_1%

PR54

200K_0402_1%

PQ6

3 5

241

3

2

1

PQ8

VL

SPOK (33)

12

+5VALWP Ipeak=5.58A ; Imax=3.906A Choke DCRmax=40m ohm Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Vlimit=(5E-06 * 200K)/10=100mV Ilimit=100mV/17.9m ~ 100mV/14.5m =5.58A ~ 6.89A Iocp=Ilimit+Delta I/2 =6.559A ~ 7.869A Delta I=1.959A (Freq=400KHz)

TPS51427_B+

12

PC30

PC31

4.7U_0805_25V6-K

PL4

2.2UH_MMD-06AH-2R2M-X2A_6A_20%

12

PL4

PR41

@PR41

@

4.7_1206_5%

PC42

@PC42

@

680P_0402_50V7K

12

PC33

2200P_0402_50V7K

12

PR46

PR48

12

PC142

0.1U_0402_25V6

63.4K_0402_1%

1 2

10K_0402_1%

1 2

+5VALWP

1

+

PC43

PC43 150U_B2_6.3VM

150U_B2_6.3VM

2

A A

5

4

1 3

Security Classification

2007/09/20 2008/09/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Compal Electronics, Inc.

+5VALWP/+3VALWP

NCL20 M/B LA-5631P Schematic

1

of

34 41Tuesday, October 20, 2009

0.1

A

B

C

D

B+

10K_0402_1%

PQ16

DTC115EUA_SC70-3

PQ12

PQ12 P1403EVG_SO8

P1403EVG_SO8

1 2 3 6

4

47K_0402_1%

1 2

PR66

1 2 13

8 7

5

PR63

PD8

1SS355TE-17_SOD323-2

1 2

PD11

1SS355TE-17_SOD323-2

2

1 2

PC57

0.1U_0603_25V7K

12

PC148

0.1U_0402_25V6

VIN

ACOFF

PR68

200K_0402_1%

1 2

12

PC147

0.1U_0402_25V6

VIN

13

D

PACIN

2

G

PQ18

S

2N7002W-T/R7_SOT323-3

12

PC66

10U_1206_25V6M

BATT+

12

PC67

10U_1206_25V6M

12

PC49

PR73

150K_0402_1%

PQ22

2

G

13

P2

1 2 3 6

12

PR62

PR62 200K_0402_1%

200K_0402_1%

0.1U_0603_25V7K

12

13

D

S

PQ11

PQ11 P1403EVG_SO8

P1403EVG_SO8

4

8 7

5

1 2

PC50

5600P_0402_25V7K

PQ10

PQ10 P1403EVG_SO8

VIN

1 1

12

PR64

PR64 47K_0402_1%

47K_0402_1%

2

13

D

PQ20

2

RHU002N06_SOT323-3

G

S

2 2

S

PACIN(32)

ACON

ACOFF(29)

8 7

5

2

13

DTC115EUA_SC70-3

P1403EVG_SO8

4

PQ14

PQ14 DTA144EUA_SC70-3

DTA144EUA_SC70-3

1 3

PQ17

DTC115EUA_SC70-3

2N7002W-T/R7_SOT323-3

PR80

22K_0402_5%

PACIN

1 2

ACON

PQ24

ACOFF

2

1 2 36

P3

PR61

0.05_1206_1%

12

CSINCSIP

B+

VMB

12

PR91

PC70

0.01U_0402_25V7K

PR91 340K_0402_1%

340K_0402_1%

12

PR93

PR93 499K_0402_1%

499K_0402_1%

12

PR95

105K_0402_1%

12

PC71

0.01U_0402_25V7K

VS

12

8

PU1B

PR94

10K_0402_1%

BATT_OVP(29)

1 2

PU1B

LM358DT_SO8

7

5

P

+

0

6

-

G

4

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

CHARGER

NCL20 M/B LA-5631P Schematic

D

of

35 41Tuesday, October 20, 2009

0.1

A

B

C

D

+5VALW

1 1

PR97

0_0402_5%

PR109

PR111

0_0402_5%

1U_0603_10V6K

12

PC87

PC85

@PC85

@

0.1U_0402_16V7K

12

SUSP#(28,29,31)

2 2

PR107 0_0402_5%PR107 0_0402_5%

+5VALW

1 2

30K_0402_5%

100_0603_1%

1 2

4.7U_0603_6.3V6K

SUSP#(28,29,31)

3 3

<Vo=1.05V> VFB=0.75V Vo=VFB*(1+PR113/PR114)=0.75*(1+8.2K/20.5K)=1.05V Fsw=261KHz

PC80

12

PC89

47P_0402_50V8J@

1 2

PR113

8.2K_0402_1%

1 2

12

PR114

20.5K_0402_1%

PC77

1U_0402_6.3V6K

12

PR98

PR98 47K_0402_5%

47K_0402_5%

+3VALW

1 2

PU6

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

PU7

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

PC79

4.7U_0805_6.3V6K

VOUT VOUT

FB

GND

APL5913-KAC-TRL_SO8

1

PR106

300K_0402_5%

1 2

15

1

TP

EN_PSV

GND7PGND

3 4

2

PR108

2.2_0603_5%

BST_1.05V

1 2

14

13 12 11 10 9

DH_1.05V LX_1.05V

1 2

PR112

10K_0402_1%

DL_1.05V

VBST

DRVH

LL

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3.5x3.5

8

PR103

1.5K_0402_1%

BST_1.05V-1

12

PR104

1.2K_0402_1%

PC84

0.1U_0603_25V7K

1 2

+5VALW

12

PC90

4.7U_0805_10V6K

12

PC72

0.01U_0402_25V7K

4

12

PQ27

PQ27 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

5

PQ28

123

AON7702L_DFN8-5

+1.8VP

PC73

22U_0805_6.3V6M

1.05V_B+

12

PL7

12

PC82

4.7U_0805_25V6-K

PC81

4.7U_0805_25V6-K

2.2UH_MMD-06AH-2R2M-X2A_6A_20%

1 2

12

PR110

4.7_1206_5%

12

PC88

PC88 680P_0603_50V7K

680P_0603_50V7K

HCB1608KF-121T30_0603

1 2

12

PC146

PC83

0.1U_0402_25V6

2200P_0402_50V7K

1

+

PC86

PC86 330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

2

PL15

B+

+VCCPP

Cout ESR=15m ohm Rdson(max)=17.9m Rdson(min)=14.5m Ipeak=5A, Imax=5A, Iocp=6A Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=1.72A =>1/2DeltaI=0.86A

4 4

Vtrip=Rtrip*10uA=12K*10uA=0.12V Iocpmin=Vtrip/Rdsonmax*1.2+0.86 =0.12/(0.0179*1.2)+0.86=6.446A Iocpmax=(0.12/(0.0145*1.2))+0.86A=7.756A Iocp=6.446A~7.756A

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

+1.8VP / +VCCPP

NCL20 M/B LA-5631P Schematic

D

of

36 41Tuesday, October 20, 2009

0.1

A

1 1

PR116

0_0402_5%

SYSON(8,29,31)

+5VALW

2 2

<Vo=1.5V> VFB=0.75V Vo=VFB*(1+PR91/PR92)=0.75*(1+28.7K/20.5K)=1.53V Fsw=262KHz

Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typ)=14.5m Ipeak=4.5A, Imax=3.15A, Iocp=5.4A Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=2.397A =>1/2Delta I=1.199A Vtrip=Rtrip*10uA=14K*10uA=0.140V Iocpmin=Vtrip/Rdsonmax*1.2+1.199 =0.140/(0.0179*1.2)+1.199=7.717A Iocpmax=(0.140/(0.0145*1.2))+1.199A=9.245A Iocp=7.717A~9.245A

1 2

PR118

30K_0402_5%

PR120

100_0603_1%

1 2

4.7U_0603_6.3V6K

PC96

12

PC94

0.1U_0402_16V7K

@

12

PC98

47P_0402_50V8J@

1 2

PR122

10.5K_0402_1%

1 2

12

PR123

PR123 10K_0402_1%

10K_0402_1%

B

PR115

300K_0402_5%

1 2

15

1

PU8

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

12

PR194

10K_0402_5%

+1.5V

DDR3_PG(8)

TP

EN_PSV

GND7PGND

8

PR117

2.2_0603_5%

BST_1.5V

1 2

14

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

BST_1.5V-1 DH_1.5V LX_1.5V

1 2

PR121

15K_0402_1%

DL_1.5V

PC93

1 2

0.1U_0603_25V7K

+5VALW

12

PC99

4.7U_0805_10V6K

C

4

PQ29

PQ29 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

5

123

PQ30

PQ30 AON7702L_DFN8-5

AON7702L_DFN8-5

1.5V_B+

12

PC140

2200P_0402_50V7K

2.2UH_MMD-06AH-2R2M-X2A_6A_20%

12

PR119

4.7_1206_5%

12

PC97

PC97 680P_0603_50V7K

680P_0603_50V7K

12

PC91

4.7U_0805_25V6-K

PL8

1 2

12

PC92

4.7U_0805_25V6-K

12

PC145

0.1U_0402_25V6

1

+

PC95

PC95 330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

2

PL16

HCB1608KF-121T30_0603

1 2

+1.5VP

D

B+

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

+1.5VP

NCL20 M/B LA-5631P Schematic

D

of

37 41Tuesday, October 20, 2009

0.1

5

4

3

2

1

+1.5V

PU9

D D

PC100

4.7U_0805_6.3V6K

PR133

0_0402_5%

SUSP(31)

1 2

PC104

0.1U_0402_16V7K

1 2

13

D

PQ32

2

G

12

S

2N7002W-T/R7_SOT323-3

PR130

1K_0402_1%

PR134

1K_0402_1%

12

PC102

0.1U_0402_16V7K

Ipeak=1A, Imax=0.7A

C C

PU9

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5336KAI-TRL SOP

+0.75V

12

PC103

PC103 10U_0805_6.3V6M

10U_0805_6.3V6M

6 5

NC

7

NC

8

NC

9

TP

+3VALW

12

PC101

PC101 1U_0603_6.3V6M

1U_0603_6.3V6M

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

+0.75VSP

NCL20 M/B LA-5631P Schematic

1

of

38 41Tuesday, October 20, 2009

0.1

A

1 1

2 2

Parellel from VCCGFX and GND underneath GMCH at Interface Power pin

+VCCGFX

B

CSN_GFX

CSP_GFX

PC111 33P_0402_50V8KPC111 33P_0402_50V8K

1 2

PR148 470_0402_1%PR148 470_0402_1%

1 2

PC112 33P_0402_50V8KPC112 33P_0402_50V8K

1 2

PR150 470_0402_1%PR150 470_0402_1%

1 2

PR151

1 2

0_0402_5%

1 2

PR152 0_0402_5%PR152 0_0402_5%

V5FILT_GFX

DFGT_VID_4(8)

DFGT_VID_3(8)

+5VS

PC110

1 2

0.22U_0603_10V7K

PC117

PC117 100P_0402_50V8J

100P_0402_50V8J

1 2

GND_SENSE

+VCCGFX_SENSE

PR156

1 2

20K_0402_1%

+3VS

PR161 0_0402_5%PR161 0_0402_5%

DFGT_VID_2(8)

DFGT_VID_1(8)

DFGT_VID_0(8)

C

PR143

124K_0402_1%

PR144

@1_0603_5%

1 2

12

PC108

1U_0603_10V6K

PC109

68P_0402_50V8J

1 2

PR147

3.16K_0402_1%

VREF_GFX

PR160 10K_0402_5%PR160 10K_0402_5%

1 2

PR162 0_0402_5%PR162 0_0402_5%

33

32

PU11

TP

1

VREF

2

GND

3

CSN

4

CSP

5

GNDSNS

6

VSNS

7

THERM

8

VR_TT#

9

1 2

PR163 0_0402_5%PR163 0_0402_5%

1 2

PR164 0_0402_5%PR164 0_0402_5%

1 2

PR165 0_0402_5%PR165 0_0402_5%

1 2

12

PR145

V5FILT_GFX

0_0402_5%

31

30

V5FILT

DROOP

TPS51610RHB_QFN32_5X5

VID6

DPRSTP#

11

10

D

VREF_GFX

12

29

ISLEW

12

PR146

PR146 0_0402_5%

0_0402_5%

27

26

28

TONSEL

OSRSEL

TRIPSEL

PWRMON

VID1

VID2

VID412VID5

VID3

15

14

13

25

VR_ON

CLKEN#

DPRSLP

PGOOD

DRVL

VBST

DRVH

VID0

16

PR149

1 2

0_0402_5%

24

23

22

21

V5IN

LGATE_GFX

20

PHASE_GFX

19

LL

BOOT_GFX

18

UGATE_GFX

17

GFXVR_EN (8)

1 2

PR153

2.2_0603_5%

E

1 2

0.22U_0603_10V7K

+5VS

PC118

1 2

PC123

4.7U_0603_6.3V6K

4

F

PQ37

PQ37 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

5

PQ38

123

AON7702L_DFN8-5

12

PC113

2200P_0402_50V7K

12

PC114

4.7U_0805_25V6-K

12

PR154

4.7_1206_5%

12

PC122

680P_0603_50V8J

G

GFX_B+

HCB1608KF-121T30_0603

12

PC115

PC116

0.1U_0402_25V6

4.7U_0805_25V6-K

PL10

2.2UH_MMD-06AH-2R2M-X2A_6A_20%

1 2

12

PR155

PR155 137K_0402_1%

137K_0402_1%

1 2

150K_0603_5%_ERTJ1VV154J

CSP_GFX

PH3

15K_0402_1%

1 2

PR159

10K_0402_1%

1 2

PC124

1000P_0402_50V8-J

PR157

1 2

H

PL9

12

B+

Load line: -6.9mV/A DCR: 10mohm OCP: 9.6A

1

+

PC119

2

330U_B2_2.5VM_R15M

CSN_GFX

+VCCGFXP

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

F

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

G

Compal Electronics, Inc.

GFX

NCL20 M/B LA-5631P Schematic

39 41Tuesday, October 20, 2009

of

H

0.1

A

1 1

VSSSENSE(5)

VCCSENSE(5)

2 2

+CPU_CORE

PR176

100_0402_1%

1 2

PR178

100_0402_1%

H_PROCHOT#(4)

B

PC128 33P_0402_50V8KPC128 33P_0402_50V8K

1 2

PR173 470_0402_1%PR173 470_0402_1%

CSN

1 2

PC133 33P_0402_50V8KPC133 33P_0402_50V8K

1 2

PR177 470_0402_1%PR177 470_0402_1%

CSP

1 2

PR181

10K_0402_1%

H_PROCHOT#

+VCCPP

H_DPRSTP#(5,8,18)

CPU_VID6(5)

CPU_VID5(5)

+5VS

VREF_CPU

PC127

1 2

0.22U_0603_10V7K

PC134

PC134 100P_0402_50V8J

100P_0402_50V8J

1 2

12

1 2

PH4

150K +-5% ERTJ1VV154J 0603

PR184

68_0402_5%

PR186 0_0402_5%PR186 0_0402_5%

1 2

PR187 0_0402_5%PR187 0_0402_5%

1 2

PR188 0_0402_5%PR188 0_0402_5%

CPU_VID3(5)

CPU_VID2(5)

CPU_VID1(5)

CPU_VID0(5)

PR189 0_0402_5%PR189 0_0402_5%

CPU_VID4(5)

C

PR166

124K_0402_1%

12

PR167

@PR167

@

1_0603_5%

1 2

12

PC125

1U_0603_10V6K

PC126

27P_0402_50V8J

1 2

PR171

4.12K_0402_1%

12

1 2

PR190 0_0402_5%PR190 0_0402_5%

33

32

PU12

TP

DROOP

1

VREF

2

GND

3

CSN

4

CSP

5

GNDSNS

6

VSNS

7

THERM

8

VR_TT#

DPRSTP#

9

1 2

PR191 0_0402_5%PR191 0_0402_5%

1 2

PR192 0_0402_5%PR192 0_0402_5%

1 2

PR193 0_0402_5%PR193 0_0402_5%

1 2

12

PR168

0_0402_5%

31

30

29

ISLEW

V5FILT

OSRSEL

TPS51610RHB_QFN32_5X5

VID412VID5

VID6

11

10

VREF_CPU

28

TONSEL

VID3

13

D

PR169

PR169 0_0402_5%

0_0402_5%

26

PWRMON

VID1

15

PMON

25

VR_ON

CLKEN#

DPRSLP

PGOOD

DRVL

VBST

DRVH

VID0

16

12

PR170

PR170 0_0402_5%@

0_0402_5%@

24

23

22

21

V5IN

LGATE_CPU

20

PHASE_CPU

19

LL

BOOT_CPU

18

UGATE_CPU

17

12

27

TRIPSEL

VID2

14

VR_ON (29)

PR172 0_0402_5%@ PR172 0_0402_5%@

PR175 0_0402_5%PR175 0_0402_5%

1 2

PR179

0_0603_5%

E

12

+3VS

12

PR174

PR174 10K_0402_1%

10K_0402_1%

1 2

PC135

0.22U_0603_10V7K

+5VS

CLKEN# (16)

PM_DPRSLPVR (8,19)

VGATE (8,16,19)

NTMFS4946NT1G_SO8FL-5

1 2

PC137

4.7U_0603_6.3V6K

PQ40

+CPU_B+

578

F

3 6

3 5

241

PQ39

PQ39 AO4474_SO8

AO4474_SO8

PC129

1 2

PC130

0.1U_0603_25V7K

12

PR182

6.8_1206_5%

12

PC136 680P_0603_50V8J

680P_0603_50V8J

12

PC131

4.7U_0805_25V6-K

0.33UH_MMD-06AH-R33M-V1_6A_20%

1 2

12

PR180

PR180 91K_0402_1%

91K_0402_1%

@PR182

@

1 2

PH5

150K +-5% ERTJ1VV154J 0603

@PC136

@

CSP

3300P_0402_50V7-K

G

PL11

HCB2012KF-121T50_0805

1 2

PC132

4.7U_0805_25V6-K

4700P_0402_25V7K

PL12

PR183

43.2K_0402_1%

1 2

PR185

24.9K_0402_1%

1 2

PC138

Ipeak=10A Iocp=18.2A Choke DCR=0.007ohm(max)

B+

+CPU_CORE

CSN

H

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

F

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

G

Compal Electronics, Inc.

+CPU_CORE

NCL20 M/B LA-5631P Schematic

40 41Tuesday, October 20, 2009

of

H

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

D D

Change PR121 to 18K modify 1.5VP OCP to 12A 0.2 44 Change PR121 to 18K 08/23 EVT2

1

Change GFXVCCP OCP Change GFXVCCP OCP to 9.1A 0.2 46 Change PR147 PR155 PH3 PR157 PR159 PC124 08/23 EVT2

2

Improve VCCP Efficiency

3

Decrease L/S DCR value to 11m ohm

0.3

Change PQ28 from IRE3707 to AON7702L 09/16

DVT

Change VCCP OCP

4

Delete 0.75V enable signal Delete 0.75V enable signal(reserve) 450.3 Delete PR131 09/16 DVT

5

Change GFXVCCP OCP Change GFXVCCP OCP to 9.1A 0.3 46 Change PR147 PR155 PH3 PR157 PR159 PC124 09/16 DVT

6

Change PR121 to 15K modify 1.5VP OCP to 10A 0.3 44 Change PR121 to 15K 09/16 DVT

7

C C

8

Change VCCP OCP to 6.8A~8.4A Change PR112 from 12K to 10K

0.34343

09/16

DVT

9

10

11

12

13

14

15

B B

16

17

18

19

20

21

22

A A

23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/07/01 2009/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR (PWR)

PIR (PWR) NCL20

NCL20

41 41Tuesday, October 20, 2009

1

0.1

of

COMPAL LA-5631P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual