Compal LA-5571P NAL20, Latitude E6510 Schematic

A
B
COMPAL CONFIDENTIAL
C
D
E
1 1
PCB NO :
BOM P/N :
LA-5571P ( DA80000FP00)
43176531LXX
MODEL NAME :
NAL20
M10 Margaux UMA
rPGA Auburndale +
2 2
FCBGA PCH IBEXPEAK-M
2010-01-21
REV : 1.0(A00)
@ : Nopop Component
3 3
TPM EN,TCM DIS
ALL TPM DISABLE
TCM EN,TPM DIS
4 4
MB PCB
MB PCB
Part Number Description
Part Number Description
PCB 0AF LA-5571P REV0 M/B UMA
PCB 0AF LA-5571P REV0 M/B UMA
DA80000FP00
DA80000FP00
A
MB Type BOM P/N
43176531L01
43176531L02
43176531L03
B
TCM TPM
W(3@) W(5@)W/O(4@) W/O(6@)
**
**
**
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
BOM CONFIG
4@,5@
4@,6@
3@,6@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-5571P
LA-5571P
LA-5571P
160Thursday, January 21, 2010
160Thursday, January 21, 2010
160Thursday, January 21, 2010
E
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of
A
Block Diagram Compal confidential Model: NAL20
eDP CONN
+5V_ALW +PWR_SRC
1 1
CRT CONN
+5V_RUN
page 27
VGA
+3.3V_RUN
Video Switch PI3V712-AZLE
+3.3V_RUN
page 24
page 27
DP Repeater
PS8121
+3.3V_RUN
page 26
DP CONN
+5V_RUN
PCMCIA
SLOT
+3.3V_RUN
SD/MMC
CONN
+3.3V_RUN
+3.3V_WLAN
+1.5V_RUN
Smart Card
page 26
page 34
page 33
+1.05V_RUN_VTT /100MHz
PCIE2 PCIE1
Mini Card2
WLAN
page 36page 35
USB[4] USB[5]
page 32
RFID
page 33
2 2
DOCKING PORT
page 368
DAI
USB[8,9]
SATA5
DOCK LPC BUS
PCIE5
EXPRESS
Card
+3.3V_RUN
3 3
USB[7]
SATA Repeater
SN75LVCP412
+3.3V_RUN
SATA/PCIE MUX PI2DBS212
Mini Card 3 PCIE\BKT
+3.3V_RUN +1.5V_RUN
page 36
USB[13]
page 35
SATA2
Trough Cable
+VCC_GFXCORE
page 53
Biometric
3V/5V
page 47
1.5V
page 48
+3.3V_RUN
DC IN & BATT IN DC/DC Interface
0.75V
4 4
page 49
VCORE (IMVP-6)
page 51
CHARGER
page 52 page 46
A
On IO/B
IEEE1394
+3.3V_RUN
Mini Card 1
WWAN
+3.3V_RUN_WWAN_PWR +1.5V_RUN
TDA8034HN
+5V_RUN +3.3V_RUN
page 32
USBH
page 36
PWR SELECT
page 54
B
DP Repeater
DP119
+3.3V_RUN
page 33
page 24
CardBus
R5U242
page 33-34
PCI Express BUS
Option
page 36
USH
+3.3V_RUN +2.5V_RUN +1.2V_RUN
Touch Pad
Power On/Off SW & LED
B
eDP
VGA
DPD DPC DPB
PCIE3
China TPM1.2
SSX35BCB
page 32
TPM1.2
BCM5882
page 31,32
USB[1]
SMBUS
BC BUS
page 40
Stick
1.1V
page 50
page 42
4MB (Socket G1)
+VCC_CORE
+1.5V_MEM
+1.05V_RUN_VTT
+VCC_GFXCORE
FDI
Lane x 8
+1.8V_RUN
+1.05V_RUN_VTT
+1.05V_M
+3.3V_ALW_ICH
LPC BUS
+3V_RUN 33MHz
SMSC KBC MEC5045
+RTC_CELL +3.3V_ALW
ECE1077
+3.3V_ALW
Int.KBD & Stick
C
Auburndale
PGA CPU
988A pins
DMI
Lane x 4
INTEL
IBEXPEAK-M
1060pin BGA
SPI
W25Q64VSSIG
+3.3V_M
64M 4K sector
W25X64VSSIG
+3.3V_M
32M 4K sector
page 40
page 41
C
page 7-12
page 15-22
E-Module
page 15
page 15
+5V_MOD
DOCK LPC BUS
BC BUS
D
GUARDIAN III EMC4002
+3.3V_M
Memory BUS (DDR3)
+1.5V_MEM 800Mhz/1066MHz
USB[11]
Thermal
Camera
+5V_RUN
page 23
page 24
CPU/PCH XDP Port
+1.05V_VCCP
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
+1.5V_MEM
+V_DDR_REF
Trough eDP Cable
page 8,15
page 13,14
SATA Repeater
SATA4
48MHz USB0 : Right side pair top
USB[0,10] R SIDE
PCIE
HD Audio I/F
S-ATA 0/1/4/5 3GB/s
SATA1 SATA0
SN75LVCP412
+3.3V_RUN
page 37
USB[2,3] L SIDE
USB Ports X2
+5V_ALW
+1.05V_RUN_VTT /100MHz
page 37
E-SATA
USB Ports X2
+5V_ALW
On IO/B
page 37
USB1 : Right side pair bottom
SATA Repeater
SN75LVCP412
+3.3V_RUN
+5V_HDD
+3.3V_HDD
page 39
page 28
S-HDD
page 28
MDC
+3V_SUS
Azalia Codec
92HD81B1
+3.3V_RUN
+5V_RUN
page 34
On IO/B
page 29
INT.Speaker
+3.3V_RUN
TI
+3.3V_RUN
page 29
HeadPhone & MIC Jack
page 29
page 28
SMSC SIO
ECE5028
+3.3V_ALW
Dig. MIC
RJ11
Trough Cable
Trough LVDS Cable
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
LA-5571P
LA-5571P
LA-5571P
E
Clock Generator SLG8SP585
+3.3V_RUN
FAN
R3P TPF3000
+FAN1_VOUT
USB2 : Left side pair top
USB3 Rear Right pair bottom
page 23
Intel Hanksville
82577LM
+3.3V_LAN
+1.0V_LAN
page 30
LAN SWITCH PI3L720
+3.3V_LAN
RJ45
WiFi ON/OFF
On IO/B
DOCKTLV320AIC3004
260Thursday, January 21, 2010
260Thursday, January 21, 2010
260Thursday, January 21, 2010
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pg 30
5
4
3
2
1
POWER STATES
State
D D
S0 (Full ON) / M0
S3 (Suspend to RAM) / M1
S4 (Suspend to DISK) / M1 ON ON OFF
S5 (SOFT OFF) / M1 ON ON OFFLOW LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF
Signal
SLP S3#
HIGH
LOW HIGH HIGH HIGH ON ON ON OFF
LOW HIGH HIGHLOW
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP S5#
HIGH
S4 STATE#
SLP S4#
HIGH HIGH HIGH
LOW
LOW
SLP M#
HIGH
HIGH
ALWAYS PLANE
ON
M PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
PCH
USB PORT#
0
1
2
3
4
5
6
7
DESTINATION
JUSB1 (Ext Right Side Bottom)
JUSB1 (Ext Right Side Top)
JESA1 (Ext Left Side Top)
JESA1 (Ext Left Side Bottom)
WLAN
WWAN
Bluetooth
USH->BIO
DOCKING8
C C
PM TABLE
State
power plane
+15V_ALW
+5V_ALW
+3.3V_ALW_PCH
+3.3V_RTC_LDO
+3.3V_SUS
+1.5V_MEM
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
+3.3V_M +3.3V_M
+1.05V_M
+1.05V_M
(M-OFF)
9
10 Express card
11
12
13
DOCKING
Camera
NA
WPAN/NVMHCI
S0
S3
B B
S5 S4/AC
S5 S4/AC don't exist
ON
ON
ON ON
ON
OFF
OFFOFF
OFFON
OFF
OFF
ON
ON
ON
ON
OFF
OFF
OFFOFF
PCI EXPRESS
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Card Bus
EXPRESS CARD
MINI CARD-3 PCIE/BKT
10/100/1G LAN
None
Lane 8 None
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-5571P
LA-5571P
LA-5571P
360Thursday, January 21, 2010
360Thursday, January 21, 2010
360Thursday, January 21, 2010
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5
4
3
2
1
EN_INVPWR
FDC654P
Q17
+BL_PWR_SRC
TPS51316
(PU3)
HDDC_EN
MODC_EN
ADAPTER
D D
GFX_VR_ON
ISL62881
(PU15)
+VCC_GFXCORE
DDR_ON
(Q32)
SI3456BDVSI3456BDV
(Q29)
+1.5V_MEM
+PWR_SRC
BATTERY
TPS51100
+5V_HDD
+5V_MOD
(PU7)
ALWON
RUN_ON
NTMS4107
(Q151)
CHARGER
C C
SN060898
(PU2)
+1.5V_RUN
0.75V_DDR_VTT_ON
+0.75V_DDR_VTT
+5V_ALW
+15V_ALW
RUN_ON
+3.3V_ALW
STS11NF30L
(Q55)
AUX_ON
SI3456
RUN_ON
M_ON
NTMS4107 SI3456BDV
(Q61)
(Q66)
+5V_RUN
ISL62883
(PU11)
ISL8014
(PU6)
MAX17007
(PU10)
ISL8014
(PU9)
AUX_EN_WOWL
SI3456BDV
(Q47)
PCH_ALW
SI3456BDV
(Q54)
SUS_ON
STS11NF30L
(Q60) (Q2)
B B
IMVP_VR_ON
+VCC_CORE
RUN_ON
+1.8V_RUN
H_VTTPWRGD
+1.05V_RUN_VTT
RUN_ON
SIO_SLP_M#
+1.05V_M
+3.3V_WLAN
+3.3V_ALW_PCH
+3.3V_SUS
Pop option
+3.3V_M
Pop option
+3.3V_LAN
REGCTL_PNP10
+3.3V_RUN
+3.3V_M
DCP69
STS11NF30L
(Q183)
(Q45)
Pop option
+1.05V_M
A A
+1.0V_LAN
+1.05V_RUN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Pop option
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-5571P
LA-5571P
LA-5571P
460Thursday, January 21, 2010
460Thursday, January 21, 2010
460Thursday, January 21, 2010
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5
4
3
2
1
2.2K
2.2K
B4
A3
MEM_SMBC LK
MEM_SMBD ATA
LAN_SMBCLK
LAN_SMBDATA
2.2K
+3.3V_ALW_PCH
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
2.2K
2.2K
2.2K
2.2K
2.2K
H14
C8
PCH
D D
C6
G8
E10G12
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
3A
1A
1A
2.2K
B5
A4
LCD_SMBCLK
LCD_SMDATA
C C
1B
1B
+3.3V_ALW_PCH
+3.3V_ALW_PCH
28
31
LOM
+3.3V_ALW
+3.3V_ALW
SMBUS Address [C8]
127
129
DOCKING
21
LCD
20
(JeDP1)
SMBUS Address [TBD]
SMBUS Address [TBD]
202
200
202
200
DIMMA
DIMMB
53
XDP1
51
53
XDP2
51
2N7002
2N7002
SMBUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
14
13
2.2K
2.2K
G Sensor
+3.3V_RUN
SMBUS Address [TBD]
2.2K
2.2K
2.2K
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
4
100 ohm
100 ohm
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
10
9
2N7002
2N7002
Charger
2N7002
2N7002
7
BATTERY
6
CONN
27
29
USH
SMBUS Address [TBD]
DAI_GPU_R3P_SMBCLK
DAI_GPU_R3P_SMBDAT
SMBUS Address [TBD]
SMBUS Address [TBD]
0 ohm0 ohm
32
CLK GEN
31
2.2K
2.2K
8
9
18
19
3
+3.3V_RUN
A/D,D/A converter
R3P
SMBUS Address [TBD]
SMBUS Address [TBD]
SMBUS Address [TBD]
2.2K
2.2K
EXP_SMBCLK
EXP_SMBDATA
2
+3.3V_SUS
10
11
Express card
SMBUS Address [TBD]
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SMBUS TOPOLOGY
SMBUS TOPOLOGY
SMBUS TOPOLOGY
LA-5571P
LA-5571P
LA-5571P
560Thursday, January 21, 2010
560Thursday, January 21, 2010
560Thursday, January 21, 2010
1
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of
A56
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
KBC
1C1CB59
2.2K
2.2K
A50
1E
1E
B53
USH_SMBCLK
USH_SMBDAT
2.2K
B B
CARD_SMBCLK
A49
2B
2B
B52
CARD_SMBDAT
2.2K
MEC 5035
B50
A47
B7
A7
B49
B48
CHARGER_SMBCLK
CHARGER_SMBDAT
CKG_SMBDAT
CKG_SMBCLK
DAI_SMBCLK_Q
DAI_SMBDAT_Q
1G
1G
2D
2D
A A
2A
2A
5
5
4
3
2
1
+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V
D D
+3.3V_RUN
L89
L89
1 2
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
10U_0805_10V4Z~DC210U_0805_10V4Z~D
1
C2
2
+CK_VDD_MAIN
0.1U_0402_16V4Z~DC30.1U_0402_16V4Z~D
1
2
0.1U_0402_16V4Z~DC40.1U_0402_16V4Z~D
1
C3
1
C4
2
2
0.1U_0402_16V4Z~DC50.1U_0402_16V4Z~D
0.1U_0402_16V4Z~DC60.1U_0402_16V4Z~D
1
C5
2
0.1U_0402_16V4Z~DC70.1U_0402_16V4Z~D
1
C6
C7
2
+1.05V_RUN
1 2
L2
L2
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
1
2
10U_0805_10V4Z~DC810U_0805_10V4Z~D
+CLK_VDD_IO
0.1U_0402_16V4Z~DC90.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
C8
2
C9
C10
C10
2
H_STP_CPU#
CLKREF
1 2
R92 10K_0402_5%~DR92 10K_0402_5%~D
10P_0402_50V8J~D
10P_0402_50V8J~D
C1707
@C1707
@
+3.3V_RUN
1
2
EMI
+CK_VDD_MAIN
+CLK_VDD_IO
C C
1 2
CKG_FFS_SMBDAT
CKG_FFS_SMBCLK
H_STP_CPU#
CLK_PWRGD
CLK_XTAL_IN
CLK_XTAL_OUT
CLKREFCLK_PCH_14M
33_0402_5%~D
33_0402_5%~D
CKG_FFS_SMBDAT40
CKG_FFS_SMBCLK40
X1
X1
14.318MHZ_16PF_7A14300083~D
14.318MHZ_16PF_7A14300083~D
12
C16
C16
27P_0402_50V8J~D
27P_0402_50V8J~D
C17
C17
27P_0402_50V8J~D
27P_0402_50V8J~D
B B
+1.05V_RUN
12
R41
@R41
@
4.7K_0402_5%~D
4.7K_0402_5%~D
12
R17 0_0402_5%~DR17 0_0402_5%~D
12
CLK_PCH_14M16
1 2
R33
R33
REF_O/CPU_SEL
CLKREF
12
R23
R23 10K_0402_5%~D
10K_0402_5%~D
PIN 30
(0.7~1.5v)
(DEFULT)
0
CPU0
100MHz1
133MHz
CPU1
100MHz
133MHz
U1
U1
1
VDD_DOT
5
VDD_27
15
VDDSRC_IO
18
VDDCPU_IO
17
VDDSRC_3.3
24
VDDCPU_3.3
29
VDDREF_3.3
31
SDA
32
SCL
16
CPU_STOP#
25
CKPWRGD/PD#
28
XTAL_IN
27
XTAL_OUT
30
REF_0/CPU_SEL
SLG8SP585VTR_QFN32_5X5~D
SLG8SP585VTR_QFN32_5X5~D
CPU_0
CPU_0#
CPU_1
CPU_1#
SRC_1/SATA
SRC_1/SATA#
SRC_2
SRC_2#
DOT_96
DOT_96#
27MHz
27MHz_SS
VSS_DOT
VSS_27
VSS_SATA
VSS_SRC VSS_CPU VSS_REF
23
22
BUF_BCLK
20
BUF_BCLK# CLK_BUF_BCLK#
19
BUF_CKSSCD
10
BUF_CKSSCD#
11
BUF_EXP
13
14
DOT96
3
DOT96#
4
6
7
2 8 9 12 21 26 33
EP
1 2
R11 0_0402_5%~DR11 0_0402_5%~D
1 2
R13 0_0402_5%~DR13 0_0402_5%~D
1 2
R1181 0_0402_5%~DR1181 0_0402_5%~D
1 2
R1180 0_0402_5%~DR1180 0_0402_5%~D
1 2
R49 0_0402_5%~DR49 0_0402_5%~D
1 2
R52 0_0402_5%~DR52 0_0402_5%~D
1 2
R37 0_0402_5%~DR37 0_0402_5%~D
1 2
R38 0_0402_5%~DR38 0_0402_5%~D
CLK_BUF_BCLK
CLK_BUF_CKSSCD
CLK_BUF_CKSSCD#
CLK_BUF_EXP
CLK_BUF_EXP#BUF_EXP#
CLK_BUF_DOT96
CLK_BUF_DOT96#
CLK_EN#50,53
CLK_BUF_BCLK 16
CLK_BUF_BCLK# 16
CLK_BUF_CKSSCD 16
CLK_BUF_CKSSCD# 16
CLK_BUF_EXP 16
CLK_BUF_EXP# 16
CLK_BUF_DOT96 16
CLK_BUF_DOT96# 16
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1392
@C1392
@
+3.3V_RUN
2
G
G
+3.3V_RUN
1
2
12
13
D
D
S
S
A2Y
R132
R132 1K_0402_5%~D
1K_0402_5%~D
R369
R369
100_0402_5%~D
100_0402_5%~D
1 2
Q136
Q136 SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
U23
@U23
@
NC7SZ04P5X_NL_SC70-5~D
NC7SZ04P5X_NL_SC70-5~D
5
1
P
NC
4
G
3
R372
@R372
@
0_0402_5%~D
0_0402_5%~D
1 2
CLK_PWRGD
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Clock Generator
Clock Generator
Clock Generator
LA-5571P
LA-5571P
LA-5571P
660Thursday, January 21, 2010
660Thursday, January 21, 2010
660Thursday, January 21, 2010
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JCPUA
JCPUA
DMI_CRX_PTX_N017 DMI_CRX_PTX_N117 DMI_CRX_PTX_N217
D D
DMI_CRX_PTX_N317
DMI_CRX_PTX_P017 DMI_CRX_PTX_P117 DMI_CRX_PTX_P217 DMI_CRX_PTX_P317
DMI_CTX_PRX_N017 DMI_CTX_PRX_N117 DMI_CTX_PRX_N217 DMI_CTX_PRX_N317
DMI_CTX_PRX_P017 DMI_CTX_PRX_P117 DMI_CTX_PRX_P217 DMI_CTX_PRX_P317
FDI_CTX_PRX_N017 FDI_CTX_PRX_N117 FDI_CTX_PRX_N217 FDI_CTX_PRX_N317 FDI_CTX_PRX_N417 FDI_CTX_PRX_N517 FDI_CTX_PRX_N617 FDI_CTX_PRX_N717
FDI_CTX_PRX_P017 FDI_CTX_PRX_P117
C C
FDI_CTX_PRX_P217 FDI_CTX_PRX_P317 FDI_CTX_PRX_P417 FDI_CTX_PRX_P517 FDI_CTX_PRX_P617 FDI_CTX_PRX_P717
FDI_FSYNC017 FDI_FSYNC117
FDI_INT17
FDI_LSYNC017 FDI_LSYNC117
B B
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_FSYNC0 FDI_FSYNC1
FDI_INT
FDI_LSYNC0 FDI_LSYNC1
A24
DMI_RX#[0]
C23
DMI_RX#[1]
B22
DMI_RX#[2]
A21
DMI_RX#[3]
B24
DMI_RX[0]
D23
DMI_RX[1]
B23
DMI_RX[2]
A22
DMI_RX[3]
D24
DMI_TX#[0]
G24
DMI_TX#[1]
F23
DMI_TX#[2]
H23
DMI_TX#[3]
D25
DMI_TX[0]
F24
DMI_TX[1]
E23
DMI_TX[2]
G23
DMI_TX[3]
E22
FDI_TX#[0]
D21
FDI_TX#[1]
D19
FDI_TX#[2]
D18
FDI_TX#[3]
G21
FDI_TX#[4]
E19
FDI_TX#[5]
F21
FDI_TX#[6]
G18
FDI_TX#[7]
D22
FDI_TX[0]
C21
FDI_TX[1]
D20
FDI_TX[2]
C18
FDI_TX[3]
G22
FDI_TX[4]
E20
FDI_TX[5]
F20
FDI_TX[6]
G19
FDI_TX[7]
F17
FDI_FSYNC[0]
E17
FDI_FSYNC[1]
C17
FDI_INT
F18
FDI_LSYNC[0]
D17
FDI_LSYNC[1]
REV1.0
REV1.0
TYCO_CALPELLA_AUBURNDALE
TYCO_CALPELLA_AUBURNDALE
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2]
DMI Intel(R) FDI
DMI Intel(R) FDI
PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]
B26 A26 B27 A25
K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31
J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30
L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26
L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25
4
PEG_IRCOMP_R
EXP_RBIAS
EDP_CPU_AUX# 24
EDP_CPU_AUX 24
EDP_CPU_LANE_N1 24 EDP_CPU_LANE_N0 24
EDP_CPU_LANE_P1 24 EDP_CPU_LANE_P0 24
R1084 49.9_0402_1%~DR1084 49.9_0402_1%~D
1 2
R1129 750_0402_1%~DR1129 750_0402_1%~D
1 2
EDP_HPD# 24
3
2
JCPUI
JCPUI
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
VSS
VSS
NCTF
NCTF
VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7
AT35 AT1 AR34 B34 B2 B1 A35
1
REV1.0
TYCO_CALPELLA_AUBURNDALE
TYCO_CALPELLA_AUBURNDALE
A A
REV1.0
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Auburndale (1/6)
Auburndale (1/6)
Auburndale (1/6)
LA-5571P
LA-5571P
LA-5571P
760Thursday, January 21, 2010
760Thursday, January 21, 2010
760Thursday, January 21, 2010
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12
R1482
R1482 100K_0402_5%~D
AT23
AT24
G16
AT26
AH24
AK14
AT15
AN26
AK15
AP26
AL15
AN14
AN27
AK13
AM15
AM26
AL14
2
B
B
E
E
JCPUB
JCPUB
COMP3
COMP2
COMP1
COMP0
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
RESET_OBS#
PM_SYNC
VCCPW RGOOD_1
VCCPW RGOOD_0
SM_DRAMPWROK
VTTPWR GOOD
TAPPWRGOOD
RSTIN#
100K_0402_5%~D
1.5V_CPU_VDDQ_PWRGD#
C
C
Q205
Q205 PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
3 1
+1.5V_CPU_VDDQ
D D
+1.05V_RUN_VTT
C C
1K_0402_5%~D
1K_0402_5%~D
0.22U_0402_6.3V6K~D
0.22U_0402_6.3V6K~D
1 2
R1285 56_0402_5%~DR1285 56_0402_5%~D
1 2
R1232 49.9_0402_1%~DR1232 49.9_0402_1%~D
1 2
R1233 68_0402_1%~DR1233 68_0402_1%~D
1 2
R1234 68_0402_1%~D@R1234 68_0402_1%~D@
place R1286 56ohm near CPU
IMVP_PWRGD39,50,53
B B
H_CPUPWRGD19
PM_DRAM_PWRGD17
12
R1483
R1483
R1487
R1487
1 2
1.8K_0402_5%~D
1.8K_0402_5%~D
2
C1877
C1877
1
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
H_CPURST#_R
CPU_DETECT#40
H_CATERR#39
H_PECI19
H_PROCHOT#50
H_THERMTRIP#23
PCH_PLTRST#_EC18,32,34,36,39,40
R1286
R1286 0_0402_5%~D
0_0402_5%~D
H_CPURST#
H_PM_SYNC17
1 2
R12 0_0402_5%~D@ R12 0_0402_5%~D@
1 2
R1290 0_0402_5%~DR1290 0_0402_5%~D
1 2
R1087 0_0402_5%~DR1087 0_0402_5%~D
1 2
R878 0_0402_5%~DR878 0_0402_5%~D
H_VTTPWRGD49
1.5K_0402_1%~D
1.5K_0402_1%~D
1 2
R1144
R1144
Refer to CRB 1.51
1.5V_CPU_VDDQ_PWRGD_R1.5V_CPU_VDDQ_PWRGD
H_COMP3
H_COMP2
H_COMP1
H_COMP0
CPU_DETECT#
H_CATERR#
H_PECI
H_PROCHOT#
H_THERMTRIP#_R
1 2
H_CPURST#_R XDP_TMS
1 2
R1088 0_0402_5%~DR1088 0_0402_5%~D
H_PM_SYNC
VCCPW RGOOD_1_R
VCCPW RGOOD_0_R
PM_DRAM_PWRGD_R
H_VTTPWRGD
H_PWRGD_XDP
PCH_PLTRST#_R
R1143
R1143 750_0402_1%~D
750_0402_1%~D
1 2
4
+3.3V_ALW2+3.3V_ALW2
2
G
G
12
R1481
R1481 10K_0402_5%~D
10K_0402_5%~D
1.5V_PWRGD
13
D
D
Q207
Q207 BSS138_SOT23~D
BSS138_SOT23~D
S
S
+1.5V_CPU_VDDQ
1.5V_PWRGD 42
1
2
1 2
R1511
@R1511
@
1.1K_0402_1%~D
1.1K_0402_1%~D
+3.3V_ALW
PM_DRAM_PWRGD_R
Refer to Intel S3 circuit
MISC THERMAL
MISC THERMAL
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PM_EXT_TS#[0] PM_EXT_TS#[1]
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
PRDY# PREQ#
TCK TMS
TRST#
TDO
TDI_M
TDO_M
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
A16 B16
AR30 AT30
E16 D16
A18 A17
F6
AL1 AM1 AN1
AN15 AP15
AT28 AP27
AN28 AP28 AT27
AT29
TDI
AR27 AR29 AP29
AN25
AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23
For ESD concern, please put near CPU
REV1.0
REV1.0
TYCO_CALPELLA_AUBURNDALE
TYCO_CALPELLA_AUBURNDALE
3
C1879
C1879
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
U141
U141
5
74AHC1G08GW_SOT353-5~D
74AHC1G08GW_SOT353-5~D
P
IN1
4
O
IN2
G
3
R879
R879
1.5K_0402_1%~D
1.5K_0402_1%~D
R880
R880
750_0402_1%~D
750_0402_1%~D
Keep R1132, R1133, R1136-R119 for slew rate control.
CPU_BCLK
CPU_BCLK#
CLK_CPU_ITP CLK_CPU_ITP#
CPU_EXP
CPU_EXP#
CPU_DPLL CPU_DPLL#
R1132 0_0402_5%~DR1132 0_0402_5%~D
R1133 0_0402_5%~DR1133 0_0402_5%~D
R1136 0_0402_5%~DR1136 0_0402_5%~D
R1137 0_0402_5%~DR1137 0_0402_5%~D R1138 0_0402_5%~DR1138 0_0402_5%~D
R1139 0_0402_5%~DR1139 0_0402_5%~D
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
PM_EXTTS#
XDP_PRDY# XDP_PREQ#
XDP_TCLK
XDP_TRST#
XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M
XDP_DBRESET#_R
XDP_OBS0_R XDP_OBS1_R XDP_OBS2_R
XDP_OBS4_R XDP_OBS4 XDP_OBS5_R XDP_OBS6_R XDP_OBS7_R
12
12
1 2 1 2
1 2 1 2
1 2 1 2
@R1241
@
R780 0_0402_5%~D@R780 0_0402_5%~D@ R781 0_0402_5%~D@R781 0_0402_5%~D@ R782 0_0402_5%~D@R782 0_0402_5%~D@ R783 0_0402_5%~D@R783 0_0402_5%~D@ R784 0_0402_5%~D@R784 0_0402_5%~D@ R785 0_0402_5%~D@R785 0_0402_5%~D@ R22 0_0402_5%~D@R22 0_0402_5%~D@ R24 0_0402_5%~D@R24 0_0402_5%~D@
+1.05V_RUN_VTT
R1241 0_0402_5%~D
0_0402_5%~D
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
12
12
12
R25
R25 10K_0402_5%~D
10K_0402_5%~D
R1145
@ R1145
@
12.4K_0402_1%~D
12.4K_0402_1%~D
SIO_PWRBTN#_R15,17
DDR_XDP_SMBDAT13,14,15,16,28
DDR_XDP_SMBCLK13,14,15,16,28
CLK_CPU_BCLK 19
CLK_CPU_BCLK# 19
CLK_CPU_EXP 16
CLK_CPU_EXP# 16
CLK_CPU_DPLL 16
CLK_CPU_DPLL# 16
DDR3_DRAMRST#_CPU
R1504
R1504 100K_0402_5%~D
100K_0402_5%~D
1 2
XDP_DBRESET# 15,17
XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3XDP_OBS3_R
XDP_OBS5 XDP_OBS6 XDP_OBS7
+1.05V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
1
2
Place near JXDP1
PM_EXTTS# 23
H_CPUPWRGD
@R1536
@
Disconnect to XDP trace, add R1536/1537
@
@
C19
C19
2
@R6
@
1K_0402_5%~D
1K_0402_5%~D
1 2 1 2
R68 0_0402_5%~D@R68 0_0402_5%~D@
1 2
R19 0_0402_5%~D@ R19 0_0402_5%~D@ 0_0402_5%~D
0_0402_5%~D
1 2
R1536
1 2
R1537 0_0402_5%~D@R1537 0_0402_5%~D@
1 2
R1469 0_0402_5%~D@R1469 0_0402_5%~D@
BSS138_SOT23~D
BSS138_SOT23~D
S
S
@
@
C20
C20
XDP_PREQ# XDP_PRDY#
XDP_OBS0 XDP_OBS1
XDP_OBS2 XDP_OBS3
XDP_OBS4 XDP_OBS5
XDP_OBS6 XDP_OBS7
R6
H_CPUPWRGD_XDP CFD_PWRBTN#_XDP
DDR_XDP_SMBDAT_R1 DDR_XDP_SMBCLK_R1
XDP_TCLK
Q199
Q199
D
D
13
G
G
2
DDR_HVREF_RST_GATE 40
1
C1888
C1888
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
XDP_TDI_R XDP_TDI
XDP_TDO_M
R1157
@R1157
@
0_0402_5%~D
0_0402_5%~D
XDP_TDI_M
XDP_TDO_R
2
+1.05V_RUN_VTT +1.05V_RUN_VTT
JXDP1
@JXDP1
@
DDR3_DRAMRST# 13,14
R1153
@R1153
@
0_0402_5%~D
0_0402_5%~D
1 2
@ R1154
@
0_0402_5%~D
0_0402_5%~D
1 2
12
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/H OOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
For production stuffing, Intel recommend stuffing R67
XDP_TCLK
R67 51_0402_1%~D@R67 51_0402_1%~D@
ITPCLK/HOOK4
ITPCLK#/HOOK5
RESET#/HOOK6
JTAG MAPPING
R1154
XDP_TDO
Scan Chain
OBSDATA_C0 OBSDATA_C1
OBSDATA_C2 OBSDATA_C3
OBSDATA_D0 OBSDATA_D1
OBSDATA_D2 OBSDATA_D3
VCC_OBS_CD
DBR#/HOOK7
GND1 OBSFN_C0 OBSFN_C1
GND3
GND5
GND7 OBSFN_D0 OBSFN_D1
GND9
GND11
GND13
GND15
TRST#
TMS
GND17
12
TD0
TDI
XDP_TRST#
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
(Default)
R1155
@ R1155
@
0_0402_5%~D
0_0402_5%~D
1 2
R1156
@R1156
@
0_0402_5%~D
0_0402_5%~D
1 2
CPU Only Stuff -> R1153,R1154
PCH Only Stuff -> R1155,R1156
1
XDP_DBRESET#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO
R66
@R66
@
51_0402_1%~D
51_0402_1%~D
CFG8 CFG9
CFG0 CFG1
CFG2 CFG3
CFG10 CFG11
CFG4 CFG5
CFG6 CFG7
CLK_CPU_ITP CLK_CPU_ITP#
XDP_RST#_RPWRGD_XDP_R XDP_DBRESET#
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS
R64 51_0402_1%~D@ R64 51_0402_1%~D@
R65 51_0402_1%~D@ R65 51_0402_1%~D@
R1149 51_0402_5%~D@ R1149 51_0402_5%~D@
R3 51_0402_1%~D@ R3 51_0402_1%~D@
12
CFG8 10 CFG9 10
CFG0 10 CFG1 10
CFG2 10 CFG3 10
CFG10 10 CFG11 10
CFG4 10 CFG5 10
CFG6 10 CFG7 10
12
R7
@R7
@
1K_0402_5%~D
1K_0402_5%~D
R60
R60
1K_0402_5%~D
1K_0402_5%~D
12
12
12
12
H_CPURST#H_PWRGD_XDP
+3.3V_RUN
12
+1.05V_RUN_VTT
Stuff -> R1153,R1156,R1157
No stuff -> R1154,R1155
No stuff -> R1154,R1155,R1157
No stuff -> R1153,R1154,R1157
A A
H_COMP0 H_COMP1 H_COMP2 H_COMP3
20_0402_1%~D
20_0402_1%~D
20_0402_1%~D
20_0402_1%~D
12
12
R1093
R1093
R1235
R1235
5
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
12
12
R1095
R1095
R1094
R1094
SM_RCOMP2 SM_RCOMP1 SM_RCOMP0
12
12
12
R1140
R1140
R1141
R1141
R1142
R1142
100_0402_1%~D
100_0402_1%~D
130_0402_1%~D
130_0402_1%~D
24.9_0402_1%~D
24.9_0402_1%~D
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Auburndale (2/6)
Auburndale (2/6)
Auburndale (2/6)
LA-5571P
LA-5571P
LA-5571P
860Thursday, January 21, 2010
860Thursday, January 21, 2010
860Thursday, January 21, 2010
1
of
of
of
5
JCPUC
JCPUC
4
3
JCPUD
JCPUD
2
1
M_CLK_DDR0
AA6
D D
C C
B B
DDR_A_D[0..63]13
DDR_A_BS013 DDR_A_BS113 DDR_A_BS213
DDR_A_CAS#13 DDR_A_RAS#13 DDR_A_WE#13
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_CS0_DIMMA# DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_CAS# DDR_A_RAS# DDR_A_WE#
AJ10
AL10
AK12
AK11
AM10
AR11
AL11
AT11 AP12
AM12
AN12
AM13
AT14 AT12
AL13 AR14 AP14
C10
D10
H10
G10
AH5 AF5 AK6 AK7 AF6 AG5
AK8
AN8
AM9 AN9
AC3 AB2
AE1 AB3 AE9
A10
B10
E10
F10
AJ7 AJ6
AJ9
AL7
AL8
J10
C7
A7
A8
D8
E6 F7 E9 B7 E7
C6
G8
K7
J8
G7
J7
L7 M6 M8
L9
L6
K8 N8
P9
U7
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0] SA_CS#[1]
SA_ODT[0] SA_ODT[1]
SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
AA7 P7
Y6 Y5 P6
AE2 AE8
AD8 AF9
B9 D7 H7 M7 AG6 AM7 AN10 AN13
C9 F8 J9 N9 AH7 AK9 AP11 AT13
C8 F9 H9 M9 AH8 AK10 AN11 AR13
Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9
M_CLK_DDR#0 DDR_CKE0_DIMMA
M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA
DDR_CS1_DIMMA#
M_ODT0 M_ODT1
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
M_CLK_DDR0 13 M_CLK_DDR#0 13 DDR_CKE0_DIMMA 13
M_CLK_DDR1 13 M_CLK_DDR#1 13 DDR_CKE1_DIMMA 13
DDR_CS0_DIMMA# 13 DDR_CS1_DIMMA# 13
M_ODT0 13 M_ODT1 13
DDR_A_DM[0..7] 13
DDR_A_DQS#[0..7] 13
DDR_A_DQS[0..7] 13
DDR_A_MA[0..15] 13
DDR_B_D[0..63]14
DDR_B_BS014 DDR_B_BS114 DDR_B_BS214
DDR_B_CAS#14 DDR_B_RAS#14 DDR_B_WE#14
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9
DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_B_BS0
DDR_B_BS1 DDR_B_BS2
DDR_B_CAS# DDR_B_RAS# DDR_B_WE#
AM6 AN2
AM4 AM3
AN5
AN6 AN4 AN3
AN7
AR10 AT10
AF3 AG1
AK1 AG4 AG3
AH4 AK3 AK4
AK5 AK2
AP3
AT4
AT5 AT6
AP6 AP8 AT9 AT7 AP9
AB1
AC5
AC6
AJ3
AJ4
B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2
G1 G5
K2 L3
M1
K5 K4
M4
N5
W5
R7
Y7
J6 J3
J2 J1 J5
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0] SB_CS#[1]
SB_ODT[0] SB_ODT[1]
SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
W8 W9 M3
V7 V6 M2
AB8 AD6
AC7 AD1
D4 E1 H3 K1 AH1 AL2 AR4 AT8
D5 F4 J4 L4 AH2 AL4 AR5 AR8
C5 E3 H4 M5 AG2 AL5 AP5 AR7
U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1
M_CLK_DDR2 M_CLK_DDR#2 DDR_CKE2_DIMMB
M_CLK_DDR3 M_CLK_DDR#3 DDR_CKE3_DIMMB
DDR_CS2_DIMMB# DDR_CS3_DIMMB#
M_ODT2 M_ODT3
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
M_CLK_DDR2 14 M_CLK_DDR#2 14 DDR_CKE2_DIMMB 14
M_CLK_DDR3 14 M_CLK_DDR#3 14 DDR_CKE3_DIMMB 14
DDR_CS2_DIMMB# 14 DDR_CS3_DIMMB# 14
M_ODT2 14 M_ODT3 14
DDR_B_DM[0..7] 14
DDR_B_DQS#[0..7] 14
DDR_B_DQS[0..7] 14
DDR_B_MA[0..15] 14
REV1.0
TYCO_CALPELLA_AUBURNDALE
TYCO_CALPELLA_AUBURNDALE
A A
REV1.0
REV1.0
REV1.0
TYCO_CALPELLA_AUBURNDALE
TYCO_CALPELLA_AUBURNDALE
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Auburndale (3/6)
Auburndale (3/6)
Auburndale (3/6)
LA-5571P
LA-5571P
LA-5571P
960Thursday, January 21, 2010
960Thursday, January 21, 2010
960Thursday, January 21, 2010
1
of
of
of
5
CFG10 CFG11
H_RSVD17 H_RSVD18
AP25 AL25 AL24 AL22
AJ33
AM30 AM28
AP31 AL32 AL30
AM31
AN29
AM32
AK32 AK31 AK28
AJ28 AN30 AN32
AJ32
AJ29
AJ30 AK30
AG9 M27 L28
J17 H17 G25 G17 E31 E30
H16
B19 A19
A20 B20
U9 T9
AC9 AB9
C1 A3
J29
J28
A34 A33
C35 B35
Populate R84,R86 for Intel DDR3 VREFDQ multiple methods M3
R84
@R84
@
0_0402_5%~D
0_0402_5%~D
D D
C C
B B
DIMM0_VREF13 DIMM1_VREF14
DIMM0_VREF DIMM1_VREF
12
R830
R830
@
@
0_0402_5%~D
0_0402_5%~D
T18 PAD~D@T18 PAD~D@ T19 PAD~D@T19 PAD~D@ T20 PAD~D@T20 PAD~D@ T21 PAD~D@T21 PAD~D@ T22 PAD~D@T22 PAD~D@ T23 PAD~D@T23 PAD~D@ T24 PAD~D@T24 PAD~D@
R831
R831
@
@
1 2 1 2
R86
@R86
@
0_0402_5%~D
0_0402_5%~D
12
0_0402_5%~D
0_0402_5%~D
DIMM0_VREF_R DIMM1_VREF_R
CFG0
CFG08
CFG1
CFG18
CFG2
CFG28
CFG3
CFG38
CFG4
CFG48
CFG5
CFG58
CFG6
CFG68
CFG7
CFG78
CFG8
CFG88
CFG9
CFG98 CFG108 CFG118
CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18
JCPUE
JCPUE
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 SA_DIMM_VREF SB_DIMM_VREF RSVD11 RSVD12 RSVD13 RSVD14
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86
RSVD15 RSVD16
RSVD17 RSVD18
RSVD19 RSVD20
RSVD21 RSVD22
RSVD_NCTF_23 RSVD_NCTF_24
RSVD26 RSVD27
RSVD_NCTF_28 RSVD_NCTF_29
RSVD_NCTF_30 RSVD_NCTF_31
4
RSVD_NCTF_37
RSVD_NCTF_40 RSVD_NCTF_41
RSVD_NCTF_42 RSVD_NCTF_43
RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57
RESERVED
RESERVED
REV1.0
TYCO_CALPELLA_ AUBURNDALE
TYCO_CALPELLA_ AUBURNDALE
REV1.0
RSVD32 RSVD33
RSVD34 RSVD35
RSVD36
RSVD38 RSVD39
RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53
RSVD58
RSVD_TP_59 RSVD_TP_60
KEY RSVD62 RSVD63 RSVD64 RSVD65
RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75
RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85
VSS
AJ13 AJ12
AH25 AK26
AL26 AR2
AJ26 AJ27
AP1 AT2
AT3 AR1
AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32
E15 F15 A2 D15 C15 AJ15 AH15
AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3
V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9
AP34
T31PAD~D @T31PAD~D @ T32PAD~D @T32PAD~D @
T40PAD~D @T40PAD~D @
T27PAD~D @T27PAD~D @
T41PAD~D @T41PAD~D @
3
2
CFG0
12
R1107
R1107
3.01K_0402_1%~D
3.01K_0402_1%~D
@
@
1
PCI-Express Configuration Select
1 : Single PEG
CFG0
0 : Bifurcation enable
CFG3
12
R1108
R1108
3.01K_0402_1%~D
3.01K_0402_1%~D
@
@
PCI-Express Static Lane Reversal
1 : Normal Operation
CFG3
0 : Lane Number Reversed
15->0, 14->1 ...
CFG4
12
R1109
R1109
3.3K_0402_1%~D
3.3K_0402_1%~D
Display Port Presence
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is connected to the Embedded Display Port
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Auburndale (4/6)
Auburndale (4/6)
Auburndale (4/6)
LA-5571P
LA-5571P
LA-5571P
0.1
0.1
10 60Thursday, January 21, 2010
10 60Thursday, January 21, 2010
10 60Thursday, January 21, 2010
1
0.1
of
of
of
5
4
JCPUF
JCPUF
3
2
1
+VCC_CORE
D D
C C
B B
A A
+VCC_CORE
1
2
1
2
1
2
+VCC_CORE
+VCC_CORE
1
C24
C24 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C29
C29 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C36
C36 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
C44
C44 10U_0805_4VAM~D
10U_0805_4VAM~D
C50
@C50
@
10U_0805_4VAM~D
10U_0805_4VAM~D
C56
C56 10U_0805_4VAM~D
10U_0805_4VAM~D
1
+
+
C63
C63 270U_D_2VM_R4.5M~D
270U_D_2VM_R4.5M~D
2 3
1
+
C66
@+C66
@
270U_D_2VM_R4.5M~D
270U_D_2VM_R4.5M~D
2 3
1
C25
C25 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C30
C30 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C37
C37 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C45
C45 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
C51
C51 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
C57
@C57
@
10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
+
+
2 3
1
+
2 3
5
1
C46
C46 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
@C52
@
10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
2
C62
C62 270U_D_2VM_R4.5M~D
270U_D_2VM_R4.5M~D
C64
@+C64
@
470U_D2T_2VM~D
470U_D2T_2VM~D
1
C26
C26 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C31
C31 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
C52
C55
C55 10U_0805_4VAM~D
10U_0805_4VAM~D
1
C47
C47 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
C53
C53 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
2
1
+
+
C61
C61 270U_D_2VM_R4.5M~D
270U_D_2VM_R4.5M~D
2 3
1
C27
C27 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C34
C34 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
C58
C58 10U_0805_4VAM~D
10U_0805_4VAM~D
1
C48
C48 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
C54
C54 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
+
+
C60
C60 270U_D_2VM_R4.5M~D
270U_D_2VM_R4.5M~D
2 3
1
C28
C28 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
C35
C35 22U_0805_6.3VAM~D
22U_0805_6.3VAM~D
2
1
10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
C49
C49 10U_0805_4VAM~D
10U_0805_4VAM~D
2
4
@C59
@
+VCC_CORE
48A
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
C59
AA30 AA29 AA28 AA27 AA26
VCC45 VCC46 VCC47 VCC48 VCC49 VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
PROC_DPRSLPVR
POWER
POWER
CPU VIDS
CPU VIDS
VTT_SELECT
VCC_SENSE VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
REV1.0
REV1.0
TYCO_CALPELLA_ AUBURNDALE
TYCO_CALPELLA_ AUBURNDALE
VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8
VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32
VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44
PSI#
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
ISENSE
AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15
AN33
AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34
G15
AN35
AJ34 AJ35
B15 A15
18A
H_PSI#
VID0 VID1 VID2 VID3 VID4 VID5 VID6 H_DPRSLPVR_R
IMVP_IMON
VCCSENSE VSSSENSE
VTT_SENSE
1
C1196
C1196 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
C1200
C1200 10U_0805_4VAM~D
10U_0805_4VAM~D
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
C1087
C1087
2
1
2
H_PSI# 50
VID0 50 VID1 50 VID2 50 VID3 50 VID4 50 VID5 50 VID6 50
1 2
R1115 0_0402_5%~DR1115 0_0402_5%~D
IMVP_IMON 23,50
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
C1085
C1085
2
+1.05V_RUN_VTT
1
C1083
C1083 22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1082
C1082
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
VTT_SENSE 49
1
C1204
C1204 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
C1103
C1103 22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
2
+VCC_CORE
12
R1116
R1116 100_0402_1%~D
100_0402_1%~D
12
R1236
R1236 100_0402_1%~D
100_0402_1%~D
1
C1197
C1197 10U_0805_4VAM~D
10U_0805_4VAM~D
2
H_DPRSLPVR 50
VCCSENSE 50 VSSSENSE 50
1
C1198
C1198
10U_0805_4VAM~D
10U_0805_4VAM~D
2
Place R1116 and R1117 near CPU
Route VCCSENSE and VSSSENSE trace at
27.4 ohms, 7 mils spacing
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
LA-5571P
LA-5571P
LA-5571P
Date: Sheet
Date: Sheet
Date: Sheet
+1.05V_RUN_VTT
1
C1199
C1199 10U_0805_4VAM~D
10U_0805_4VAM~D
2
VTT_SELECT = low, 1.1V
VTT_SELECT = high, 1.05V
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Auburndale (5/6)
Auburndale (5/6)
Auburndale (5/6)
11 60Thursday, January 21, 2010
11 60Thursday, January 21, 2010
11 60Thursday, January 21, 2010
1
0.1
0.1
0.1
of
of
of
5
4
3
2
1
+1.5V_CPU_VDDQ Source
+15V_ALW+3.3V_ALW2
12
R1472
R1472 100K_0402_5%~D
100K_0402_5%~D
D D
RUN_ON_CPU1.5VS3#
61
Q201A
R1473
@R1473
@
RUN_ON34,39,42,47
CPU1.5V_S3_GATE40 RUN_ON_CPU1.5VS3# 42
+VCC_GFXC ORE
@ C1088
@
@ C1089
@
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1088
C1089
1
1
2
2
C C
B B
A A
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1091
C1091
C1090
C1090
1
1
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1092
C1092
1
2
+1.05V_RUN_VTT
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1093
C1093
1
1
2
2
+1.05V_RUN_VTT
10U_0805_4VAM~D
10U_0805_4VAM~D
C1094
C1094
22A
10U_0805_4VAM~D
10U_0805_4VAM~D
C1095
C1095
1
2
AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16
AL21 AL19 AL18
AL16 AK21 AK19 AK18 AK16
AJ21
AJ19
AJ18
AJ16 AH21 AH19 AH18 AH16
H25
H27 G28 G27 G26
JCPUG
JCPUG
VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36
J24
VTT1_45
J23
VTT1_46 VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
1 2
0_0402_5%~D
0_0402_5%~D
R1474
R1474
1 2
0_0402_5%~D
0_0402_5%~D
SENSE
LINES
SENSE
LINES
GRAPHICS
GRAPHICS
GRAPHICS VIDs
GRAPHICS VIDs
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
TYCO_CALPELLA_AUBURNDALE
TYCO_CALPELLA_AUBURNDALE
Q201A DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
VCC_AXG_SENSE
GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]
GFX_IMON
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18
VTT0_59 VTT0_60 VTT0_61 VTT0_62
VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68
VCCPLL1 VCCPLL2 VCCPLL3
AR22 AT22
AM22 AP22 AN22 AP23 AM23 AP24 AN24
AR25 AT25 AM24
AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1
P10 N10 L10 K10
J22 J20 J18 H21 H20 H19
L26 L27 M26
3A
600mA
VSS_AXG_SENSE
GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6
GFX_VR_ON_R GFX_DPRSLPVR_R GFX_IMON
VAXG_SENSE
VSSAXG_SENSE
GFX_VR_EN
GFX_DPRSLPVR
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V1.8V
1.1V1.8V
REV1.0
REV1.0
1
2
1
2
1
2
5
VCC_AXG_SENSE 53 VSS_AXG_SENSE 53
GFX_VID0 53 GFX_VID1 53 GFX_VID2 53 GFX_VID3 53 GFX_VID4 53 GFX_VID5 53 GFX_VID6 53
R1120 0_0402_5%~DR1120 0_0402_5%~D
1 2
R1119 0_0402_5%~DR1119 0_0402_5%~D
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
C1097
C1097
C1096
C1096
2
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1102
C1102
C1101
C1101
1
1
2
2
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
C1108
C1108
C1107
C1107
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1111
C1111
C1112
C1112
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C1116
C1116
C1115
C1115
2
+1.5V_MEM +1.5V_CPU_VDDQ
12
R1480
R1480 100K_0402_5%~D
100K_0402_5%~D
RUN_ON_CPU1.5VS3
3
Q201B
Q201B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
GFX_IMON 53
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
C67
C67
2
C1099
C1099
C1098
C1098
2
+1.05V_RUN_VTT
+1.05V_RUN_VTT
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
1
1
C65
C65
2
2
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
Q200
Q200
AO4728L_SO8~D
AO4728L_SO8~D
8 7 6 5
GFX_VR_ON 53 GFX_DPRSLPVR 53
+1.5V_CPU_VDDQ
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C1100
C1100
+
+
2
+1.8V_RUN
C1117
C1117
1 2 3
4
C1872
C1872
10U_0805_10V4Z~D
10U_0805_10V4Z~D
1
C1873
C1873 4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
C1874 0.1U_0402_10V7K~DC1874 0.1U_0402_10V7K~D
C1875 0.1U_0402_10V7K~DC1875 0.1U_0402_10V7K~D
C1876 0.1U_0402_10V7K~DC1876 0.1U_0402_10V7K~D
C1878 0.1U_0402_10V7K~DC1878 0.1U_0402_10V7K~D
C1165
C1165 330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
GFX_VR_ON
1 2
R358 470_0402_5%~DR358 470_0402_5%~D
12
1
2
@
@
12
12
12
12
PJP57
@PJP57
@
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP58
@PJP58
@
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
R1471
R1471
JCPUH
JCPUH
AT20
VSS1
20K_0402_5%~D
20K_0402_5%~D
+1.5V_MEM
AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12
AR9 AR6
AR3 AP20 AP17 AP13 AP10
AP7
AP4
AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11
AM8 AM5
AM2 AL34 AL31 AL23 AL20 AL17 AL12
AK29 AK27 AK25 AK20 AK17
AJ31 AJ23 AJ20 AJ17 AJ14 AJ11
AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13
AH9 AH6 AH3
AG10
AF8 AF4 AF2
AE35
VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80
VSS
VSS
REV1.0
TYCO_CALPELLA_AUBURNDALE
TYCO_CALPELLA_AUBURNDALE
REV1.0
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Auburndale (6/6)
Auburndale (6/6)
Auburndale (6/6)
LA-5571P
LA-5571P
LA-5571P
12 60Thursday, January 21, 2010
12 60Thursday, January 21, 2010
12 60Thursday, January 21, 2010
1
of
of
of
5
DDR_A_DQS#[0..7]9
DDR_A_D[0..63]9
DDR_A_DM[0..7]9
DDR_A_DQS[0..7]9
DDR_A_MA[0..15]9
D D
Layout Note: Place near JDIMMA
+1.5V_MEM
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1121
C1121
1
2
C C
B B
A A
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C1126
C1126
1
2
Layout Note: Place near JDIMMA.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C1134
C1134
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1122
C1122
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C1127
C1127
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C1135
C1135
2
Populate R87 for Intel DDR3 VREFDQ multiple methods M1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1124
C1124
C1123
C1123
1
1
2
2
10U_0603_6.3V6M~D
1
2
C1136
C1136
C1129
C1129
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C1131
C1131
C1130
C1130
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C1137
C1137
2
2
C1128
C1128
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
C1138
C1138
330U_SX_2VY~D
330U_SX_2VY~D
1
C1125
C1125
+
+
2
4
+V_DDR_REF
DIMM0_VREF10
Note: Check voltage tolerance of VREF_DQ at the DIMM socket
R87 0_0402_5%~DR87 0_0402_5%~D
1 2
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C1119
C1119
2
DDR_CKE0_DIMMA9
DDR_A_BS29
M_CLK_DDR09
DDR_A_BS09
DDR_A_WE#9
DDR_A_CAS#9
DDR_CS1_DIMMA#9
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1141
C1141
1
2
3
JDIMMA
JDIMMA
1
VREF_DQ
3
DDR_A_D0 DDR_A_D1
1
DDR_A_DM0
C1120
C1120
DDR_A_D2
2
DDR_A_D3
DDR_A_D8 DDR_A_D9 DDR_A_D13
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_BS2
DDR_A_MA3
M_CLK_DDR0 M_CLK_DDR#0
DDR_A_MA10 DDR_A_BS0
DDR_A_WE# DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_DM7
DDR_A_D58 DDR_A_D59
1 2
R1182 10K_0402_5%~DR1182 10K_0402_5%~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1 2
R1183 10K_0402_5%~DR1183 10K_0402_5%~D
C1142
C1142
1
+0.75V_DDR_VTT
2
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
FOX_AS0A626-U4SN-7F
FOX_AS0A626-U4SN-7F
VSS DQ4 DQ5 VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1 RAS#
VDD
ODT0
VDD ODT1
VDD
VREF_CA
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78
A15
80
A14
82 84
A11
86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102 104 106 108 110 112 114
S0#
116 118 120 122
NC
124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
+1.5V_MEM+1.5V_MEM
DDR_A_D4 DDR_A_D5
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D6 DDR_A_D7
DDR_A_D12
DDR_A_DM1 DDR3_DRAMRST#
DDR_A_D14 DDR_A_D15
DDR_A_D20DDR_A_D16 DDR_A_D21
DDR_A_DM2
DDR_A_D22 DDR_A_D23
DDR_A_D28 DDR_A_D29
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_A_MA15 DDR_A_MA14
DDR_A_MA11DDR_A_MA12 DDR_A_MA7DDR_A_MA9
DDR_A_MA6DDR_A_MA8 DDR_A_MA4DDR_A_MA5
DDR_A_MA2 DDR_A_MA0DDR_A_MA1
M_CLK_DDR1 M_CLK_DDR#1
DDR_A_BS1 DDR_A_RAS#
DDR_CS0_DIMMA# M_ODT0
M_ODT1
DDR_A_D36 DDR_A_D37
DDR_A_DM4
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
DDR_A_DM6
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
DDR_XDP_SMBDAT DDR_XDP_SMBCLK
+0.75V_DDR_VTT
2
+1.5V_MEM
12
R1476
R1476 1K_0402_5%~D
1K_0402_5%~D
DDR_CKE1_DIMMA 9
M_CLK_DDR1 9
M_CLK_DDR#1 9M_CLK_DDR#09
DDR_A_BS1 9
DDR_A_RAS# 9
DDR_CS0_DIMMA# 9
M_ODT0 9
M_ODT1 9
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
C1132
C1132
2
DDR_XDP_SMBDAT 8,14,15,16,28 DDR_XDP_SMBCLK 8,14,15,16,28
JDIMMA H=5.2
DDR3_DRAMRST# 8,14
1
2
+V_DDR_REF
C1133
C1133
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-5571P
LA-5571P
LA-5571P
13 60Thursday, January 21, 2010
13 60Thursday, January 21, 2010
13 60Thursday, January 21, 2010
1
of
of
of
5
DDR_B_DQS#[0..7]9
DDR_B_D[0..63]9
DDR_B_DM[0..7]9
D D
C C
B B
A A
DDR_B_DQS[0..7]9
DDR_B_MA[0..15]9
+1.5V_MEM
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
Layout Note: Place near JDIMMB.203,204
+0.75V_DDR_VTT
C1146
C1146
C1145
C1145
1
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C1151
C1151
C1150
C1150
1
C1158
C1158
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C1159
C1159
2
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
Layout Note: Place near JDIMMB
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1147
C1147
C1148
C1148
1
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C1153
C1153
C1154
C1152
C1152
1
2
C1154
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C1160
C1160
C1161
C1161
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C1155
C1155
1
2
Populate R88 for Intel DDR3 VREFDQ multiple methods M1
330U_SX_2VY~D
330U_SX_2VY~D
1
C1149
C1149
+
+
2
4
R88 0_0402_5%~DR88 0_0402_5%~D
+3.3V_RUN
1 2
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
C1143
C1143
2
+3.3V_RUN
12
R1184
R1184
10K_0402_5%~D
10K_0402_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C1144
C1144
2
DDR_CKE2_DIMMB9
DDR_B_BS29
M_CLK_DDR29 M_CLK_DDR#29
DDR_B_BS09
DDR_B_WE#9
DDR_B_CAS#9
DDR_CS3_DIMMB#9
12
10K_0402_5%~D
10K_0402_5%~D
R1185
R1185
+V_DDR_REF
DIMM1_VREF10
Note: Check voltage tolerance of VREF_DQ at the DIMM socket
DDR_B_D0 DDR_B_D1
DDR_B_DM0
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_DM3
DDR_B_D26 DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
M_CLK_DDR2 M_CLK_DDR#2
DDR_B_MA10 DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
DDR_B_MA13 DDR_CS3_DIMMB#
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_DM5
DDR_B_D42 DDR_B_D43
DDR_B_D48 DDR_B_D49
DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_DM7
DDR_B_D58 DDR_B_D59
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
+0.75V_DDR_VTT
C1162
C1162
1
2
3
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
+1.5V_MEM
C1163
C1163
1
2
JDIMMB
JDIMMB
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
FOX_AS0A626-U8SN-7F
FOX_AS0A626-U8SN-7F
DQS0#
DQS0
DQ12 DQ13
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1#
VDD
RAS#
VDD
ODT0
VDD ODT1
VDD
VREF_CA
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
GND2
VSS DQ4 DQ5 VSS
VSS DQ6 DQ7 VSS
VSS
A15 A14
A11
CK1
BA1
S0#
SCL VTT
2
+1.5V_MEM
2
DDR_B_D4
4
DDR_B_D5
6 8
DDR_B_DQS#0
10
DDR_B_DQS0
12 14
DDR_B_D6
16
DDR_B_D7
18 20
DDR_B_D12
22
DDR_B_D13
24 26
DDR_B_DM1
28
DDR3_DRAMRST#
30 32
DDR_B_D14
34
DDR_B_D15
36 38
DDR_B_D20
40
DDR_B_D21
42 44
DDR_B_DM2
46 48
DDR_B_D22
50
DDR_B_D23
52 54
DDR_B_D28
56
DDR_B_D29
58 60
DDR_B_DQS#3
62
DDR_B_DQS3
64 66
DDR_B_D30
68
DDR_B_D31
70 72
DDR_CKE3_DIMMB
74 76
DDR_B_MA15
78
DDR_B_MA14
80 82
DDR_B_MA11
84
DDR_B_MA7
86
A7
88
DDR_B_MA6
90
A6 A4
A2 A0
NC
92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
DDR_B_MA4
DDR_B_MA2 DDR_B_MA0
M_CLK_DDR3 M_CLK_DDR#3
DDR_B_BS1 DDR_B_RAS#
DDR_CS2_DIMMB# M_ODT2
M_ODT3
DDR_B_D36 DDR_B_D37
DDR_B_DM4
DDR_B_D38 DDR_B_D39
DDR_B_D44 DDR_B_D45
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D46 DDR_B_D47
DDR_B_D52 DDR_B_D53
DDR_B_DM6DDR_B_DQS#6
DDR_B_D54 DDR_B_D55
DDR_B_D60 DDR_B_D61
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D62 DDR_B_D63
DDR_XDP_SMBDAT DDR_XDP_SMBCLK
+0.75V_DDR_VTT
JDIMMB H=9.2
DDR3_DRAMRST# 8,13
DDR_CKE3_DIMMB 9
M_CLK_DDR3 9
M_CLK_DDR#3 9
DDR_B_BS1 9
DDR_B_RAS# 9
DDR_CS2_DIMMB# 9
M_ODT2 9
M_ODT3 9
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
DDR_XDP_SMBDAT 8,13,15,16,28 DDR_XDP_SMBCLK 8,13,15,16,28
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C1156
C1156
2
1
2
+V_DDR_REF
C1157
C1157
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-5571P
LA-5571P
LA-5571P
14 60Thursday, January 21, 2010
14 60Thursday, January 21, 2010
14 60Thursday, January 21, 2010
1
of
of
of
5
CMOS settingCMOS_CLR1
Shunt
Open
ME_CLR1
Shunt
Open
D D
+RTC_CELL
12
R217
R217 330K_0402_1%~D
330K_0402_1%~D
INTVRMEN- Integrated SUS
1.1V VRM Enable High - Enable Internal VRs
C C
PCH_AZ_CODEC_SDOUT29
PCH_AZ_CODEC_SYNC29
PCH_AZ_CODEC_RST#29
PCH_AZ_CODEC_BITCLK29
Stuff R128,no stuff R123 when production
B B
For iAMT
PCH_SPI_CS0#
PCH_SPI_DIN PCH_SPI_DIN
SPI_WP#_SEL
R1246 0_0402_5%~D@ R1246 0_0402_5%~D@
A A
3.3K_0402_5%~D
3.3K_0402_5%~D
PCH_SPI_CS1#
PCH_SPI_DIN
SPI_WP#_SEL PCH_SPI_CLK
R1060 0_0402_5%~D@R1060 0_0402_5%~D@
Clear CMOS
Keep CMOS
TPM setting
Clear ME RTC Registers
Keep ME RTC Registers
PCH_INTVRMEN
1
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
1 2
C298 1U_0402_6.3V6K~DC298 1U_0402_6.3V6K~D
27P_0402_50V8J~D
27P_0402_50V8J~D
1 2
SPI_WP#_SEL 39
1 2
R1237
R1237
+3.3V_M
2
C302
C302
12
3.3K_0402_5%~D
3.3K_0402_5%~D
+3.3V_M
12
2
1
2
5
+3.3V_RUN
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V when sampled low
+RTC_CELL
1 2
R234 33_0402_5%~DR234 33_0402_5%~D
1 2
R235 33_0402_5%~DR235 33_0402_5%~D
1 2
R239 33_0402_5%~DR239 33_0402_5%~D
1 2
R241 33_0402_5%~DR241 33_0402_5%~D
1 2
R224 20K_0402_1%~DR224 20K_0402_1%~D
1 2
R225 20K_0402_5%~DR225 20K_0402_5%~D
1 2
R226 1M_0402_5%~DR226 1M_0402_5%~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
C299 1U_0402_6.3V6K~DC299 1U_0402_6.3V6K~D
CMOS place near DIMM
PCH_AZ_SDOUT
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_BITCLK
200 MIL SO8
64Mb Flash ROM
R298
R298
U12
U12
1
/CS
2
DO
3
/WP
4
GND
W25Q64BVSSIG_SO8~D
W25Q64BVSSIG_SO8~D
VCC
/HOLD
CLK
8
7
6
5
DIO
200 MIL SO8
32Mb Flash ROM
U13
U13
1
/CS
2
DO
3
/WP
4
GND
W25Q32BVSSIG_SO8~D
W25Q32BVSSIG_SO8~D
VCC
/HOLD
CLK
8
7
6
5
DIO
12
R62
@ R62
@
10K_0402_5%~D
10K_0402_5%~D
PCH_AZ_SYNC
12
R120
R120 100K_0402_5%~D
100K_0402_5%~D
@
@
1 2
12
3.3K_0402_5%~D
3.3K_0402_5%~D
PCH_SPI_CLK
PCH_SPI_DO
PCH_SPI_DO
2
2
+3.3V_ALW_PCH
12
0_0603_5%~D
0_0603_5%~D
C328
C328
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
R299
R299
C1205
C1205
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
12
R1238
R1238
3.3K_0402_5%~D
3.3K_0402_5%~D
R123
R123
PCH_AZ_MDC_SDOUT37
4
USB_OC0#_R18 USB_OC1#_R18
USB_OC2#18 USB_OC3#18 USB_OC4#18 USB_OC5#18 USB_OC6#18
USB_OC7#18 PCMCLK_REQ#16,34 LANCLK_REQ#16,30
CONTACTLESS_DET#19,31
EN_ESATA_RPTR#19,37 TEMP_ALERT#19,39
ROUSH_PAID_TS_DET#19
SIO_EXT_SCI#_R19
32.768K_12.5PF_Q13MC30610018~D
32.768K_12.5PF_Q13MC30610018~D
PCH_AZ_MDC_BITCLK37
PCH_AZ_MDC_SYNC37
PCH_AZ_MDC_RST#37
PCH_AZ_CODEC_SDIN029
PCH_AZ_MDC_SDIN137
ME_FWP39
T174PAD~D T174PAD~D
PCH Pin
4
USB_OC0#_R USB_OC1#_R USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7# PCMCLK_REQ# LANCLK_REQ# HDD_DET#_R GPIO19
CONTACTLESS_DET#
GPIO37
GPIO3719
EN_ESATA_RPTR# TEMP_ALERT#
ROUSH_PAID_TS_DET#
SIO_EXT_SCI#_R
C296
C296
12P_0402_50V8J~D
12P_0402_50V8J~D
12
C297
C297
12P_0402_50V8J~D
12P_0402_50V8J~D
12
C300
C300 27P_0402_50V8J~D
27P_0402_50V8J~D
SPKR29
R80451_0402_1%~D R80451_0402_1%~D
12
R807200_0402_5%~D R807200_0402_5%~D
12
R805200_0402_5%~D R805200_0402_5%~D
12
R806200_0402_5%~D R806200_0402_5%~D
12
Ref.
R806
TDO
R1315
R807
TMS
R1281
TDI
R1282
TCK
R804
R808
TRST#
R1316
12
Y1
Y1
NCNC
NCNC
1 4
2 3
0_0402_5%~D
0_0402_5%~D
1 2
1 2
1 2
R238 33_0402_5%~DR238 33_0402_5%~D
1 2
R240 33_0402_5%~DR240 33_0402_5%~D
1 2
R242 33_0402_5%~DR242 33_0402_5%~D
USB_MCARD3_DET#36
12
12
R1281
R1281
R1282
R1282
100_0402_5%~D
100_0402_5%~D
PCH JTAG Enable
ES1
No Stuff
No Stuff
200 ohm
100 ohm
200 ohm
100 ohm 100 ohm
4.7K ohm
20K ohm
10K ohm
R78 33_0402_5%~D@R78 33_0402_5%~D@
1 2
R91 33_0402_5%~D@R91 33_0402_5%~D@
1 2
R101 33_0402_5%~D@R101 33_0402_5%~D@
1 2
R102 33_0402_5%~D@R102 33_0402_5%~D@
1 2
R103 33_0402_5%~D@R103 33_0402_5%~D@
1 2
R104 33_0402_5%~D@R104 33_0402_5%~D@
1 2
R105 33_0402_5%~D@R105 33_0402_5%~D@
1 2
R106 33_0402_5%~D@R106 33_0402_5%~D@
1 2
R107 33_0402_5%~D@R107 33_0402_5%~D@
1 2
R108 33_0402_5%~D@R108 33_0402_5%~D@
1 2
R109 33_0402_5%~D@R109 33_0402_5%~D@
1 2
R110 33_0402_5%~D@R110 33_0402_5%~D@
1 2
R111 33_0402_5%~D@R111 33_0402_5%~D@
1 2
R112 33_0402_5%~D@R112 33_0402_5%~D@
1 2
R113 33_0402_5%~D@R113 33_0402_5%~D@
1 2
R114 33_0402_5%~D@R114 33_0402_5%~D@
1 2
R115 33_0402_5%~D@R115 33_0402_5%~D@
1 2
R116 33_0402_5%~D@R116 33_0402_5%~D@
1 2
PCH_RTCX1
12
R222
R222 10M_0402_5%~D
10M_0402_5%~D
R223
R223
R236
R236 33_0402_5%~D
33_0402_5%~D
12
R1315
R1315
100_0402_5%~D
100_0402_5%~D
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_MDC_SDIN1
PCH_AZ_SDOUT
ME_FWP
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
PCH_SPI_CLK
100_0402_5%~D
100_0402_5%~D
1 2
R1247 33_0402_5%~DR1247 33_0402_5%~D
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN_R
USB_MCARD3_DET#
PCH JTAG Disable
ES2
200 ohm
100 ohm
200 ohm
No Stuff
No Stuff
No Stuff
100 ohm
200 ohm
20K ohm
10K ohm
4.7K ohm 4.7K ohm 4.7K ohm
20K ohm
No Stuff
10K ohm No Stuff
ES1
3
XDP_FN0 XDP_FN1 XDP_FN2 XDP_FN3 XDP_FN4 XDP_FN5 XDP_FN6 XDP_FN7 XDP_FN8 XDP_FN9 XDP_FN10 XDP_FN11 XDP_FN12 XDP_FN13 XDP_FN14 XDP_FN15 XDP_FN16 XDP_FN17
SIO_PWRBTN#_R8,17
DDR_XDP_SMBDAT8,13,14,16,28
DDR_XDP_SMBCLK8,13,14,16,28
Disconnect to XDP trace, add R1532/1533
U73A
U73A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
BD82QM57-SLGZQ-B3_FCBGA1071~D
BD82QM57-SLGZQ-B3_FCBGA1071~D
Production
ES2
No Stuff
No Stuff
No Stuff
No StuffNo Stuff
No StuffR805
No Stuff
No Stuff
No Stuff
No Stuff
No Stuff
No Stuff
No Stuff
No Stuff
No Stuff
No Stuff
3
C1375
@C1375
@
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
RESET_OUT#17,40
R1532
@R1532
@
R1533
@R1533
@
V1.5
V1.5
RTCIHDA
RTCIHDA
SPI JTAG
SPI JTAG
All
+3.3V_ALW_PCH
1
2
1 2
R69 0_0402_5%~D@R69 0_0402_5%~D@
0_0402_5%~D
0_0402_5%~D
1 2 1 2
0_0402_5%~D
0_0402_5%~D
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
FWH4 / LFRAME#
LDRQ1# / GPIO23
LPC
LPC
SATA0RXN SATA0RXP SATA0TXN
SATA0TXP
SATA1RXN SATA1RXP SATA1TXN
SATA1TXP
SATA2RXN SATA2RXP SATA2TXN
SATA2TXP
SATA3RXN SATA3RXP SATA3TXN
SATA3TXP
SATA4RXN SATA4RXP SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN SATA5RXP SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
XDP_FN0 XDP_FN1
XDP_FN2 XDP_FN3
XDP_FN4 XDP_FN5
XDP_FN6 XDP_FN7
RESET_OUT#
PCH_PWRBTN#_XDP
DDR_XDP_SMBDAT_R2 DDR_XDP_SMBCLK_R2
D33 B33 C32 A32
C34
A34
LDRQ0#
F34
AB9
SERIRQ
AK7 AK6 AK11 AK9
AH6 AH5 AH9 AH8
AF11 AF9 AF7 AF6
AH3 AH1 AF3 AF1
AD9 AD8 AD6 AD5
AD3 AD1 AB3 AB1
AF16
AF15
T3
Y9
V1
2
+3.3V_ALW_PCH
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
LPC_LFRAME#
LPC_LDRQ0# LPC_LDRQ1#
IRQ_SERIRQ
SATA_COMP
SATA_ACT#_R
HDD_DET#_R
GPIO19
2
JXDP2
@JXDP2
@
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/H OOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH -030-01-L-D-A
SAMTE_BSH -030-01-L-D-A
LPC_LAD0 31,32,39,40 LPC_LAD1 31,32,39,40 LPC_LAD2 31,32,39,40 LPC_LAD3 31,32,39,40
LPC_LFRAME# 31,32,39,40
LPC_LDRQ0# 39 LPC_LDRQ1# 39
IRQ_SERIRQ 31 ,32,39,40
PSATA_PRX_DTX_N0_C 28 PSATA_PRX_DTX_P0_C 28
PSATA_PTX_DRX_N0_C 28
PSATA_PTX_DRX_P0_C 28
SATA_ODD_PRX_DTX_N1_C 28 SATA_ODD_PRX_DTX_P1_C 28
SATA_ODD_PTX_DRX_N1_C 28
SATA_ODD_PTX_DRX_P1_C 28
ESATA_PRX_DTX_N4_C 37 ESATA_PRX_DTX_P4_C 37
ESATA_PTX_DRX_N4_C 37
ESATA_PTX_DRX_P4_C 37
SATA_PRX_DKTX_N5_C 38 SATA_PRX_DKTX_P5_C 38
SATA_PTX_DKRX_N5_C 38
SATA_PTX_DKRX_P5_C 38
R1201
R1201
1 2
37.4_0402_1%~D
37.4_0402_1%~D
SATA_ACT#_R 43
R131
R131
1 2
0_0402_5%~D
0_0402_5%~D
R58
R58 10K_0402_5%~D
10K_0402_5%~D
1
2
GND1 OBSFN_C0 OBSFN_C1
GND3
OBSDATA_C0 OBSDATA_C1
GND5
OBSDATA_C2 OBSDATA_C3
GND7 OBSFN_D0 OBSFN_D1
GND9
OBSDATA_D0 OBSDATA_D1
GND11 OBSDATA_D2 OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK 5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TMS
GND17
PLTRST1#_XDP
TDI
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
XDP_FN16 XDP_FN17
XDP_FN8 XDP_FN9
XDP_FN10 XDP_FN11
XDP_FN12 XDP_FN13
XDP_FN14 XDP_FN15
PLTRST1#_XDP XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI PCH_JTAG_TMSPCH_JTAG_TCK
R118
@R118
@
1K_0402_5%~D
1K_0402_5%~D
1 2
IRQ_SERIRQ
+3.3V_ALW_PCH
XDP_DBRESET# 8,17
1 2
R117
@R117
@
0_0402_5%~D
0_0402_5%~D
PLTRST_XDP# 18
R265
R265
10K_0402_5%~D
10K_0402_5%~D
12
PCH_JTAG_RST#PCH_JTAG_RST#_R
+3.3V_RUN
HDD
ODD
E-SATA
DOCKED
+1.05V_RUN
+3.3V_RUN
12
R382
R382 43K_0402_5%~D
43K_0402_5%~D
R264
HDD_DET# 28
+3.3V_RUN
12
12
+3.3V_RUN
@R264
@
1K_0402_5%~D
1K_0402_5%~D
SPKR
No Reboot Strap
Low = Default
SPKR
High = No Reboot
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-5571P
LA-5571P
LA-5571P
15 60Thursday, January 21, 2010
15 60Thursday, January 21, 2010
15 60Thursday, January 21, 2010
of
of
1
of
5
D D
PCIE_PRX_WANTX_N136
PCMCIA--->
PCIE_PRX_WANTX_P136 PCIE_PTX_WANRX_N1_C36 PCIE_PTX_WANRX_P1_C36
PCIE_PRX_WLANTX_N236
PCIE_PRX_WLANTX_P236 PCIE_PTX_WLANRX_N2_C36 PCIE_PTX_WLANRX_P2_C36
PCIE_PRX_PCMTX_N333
PCIE_PRX_PCMTX_P333 PCIE_PTX_PCMRX_N3_C33 PCIE_PTX_PCMRX_P3_C33
PCIE_PRX_EXPTX_N434
PCIE_PRX_EXPTX_P434 PCIE_PTX_EXPRX_N4_C34 PCIE_PTX_EXPRX_P4_C34
PCIE_PRX_WPANTX_N536
PCIE_PRX_WPANTX_P536
PCIE_PTX_WPANRX_N5_C36 PCIE_PTX_WPANRX_P5_C36
PCIE_PRX_GLANTX_N630
PCIE_PRX_GLANTX_P630 PCIE_PTX_GLANRX_N6_C30 PCIE_PTX_GLANRX_P6_C30
LANCLK_REQ#15,30
CLK_PCIE_PCM#33
CLK_PCIE_PCM33
PCMCLK_REQ#15,34
CLK_PCIE_ MINI3#36
CLK_PCIE_ MINI336
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
PCMCIA--->
Express card--->
MiniPCIE/SATA
C C
(Mini Card 3)--->
10/100/1G LAN --->
10/100/1G LAN --->
B B
MiniWPAN (Mini Card 3)--->
Express card--->
CLK_PCIE_ MINI2#36
MiniWLAN (Mini Card 2)--->
MiniWWAN (Mini Card 1)--->
CLK_PCIE_ MINI236
+3.3V_ALW_PCH
CLK_PCIE_ MINI1#36 CLK_PCIE_ MINI136
+3.3V_ALW_PCH
C317 0.1U_0402_10V7K~DC317 0.1U_0402_10V7K~D C319 0.1U_0402_10V7K~DC319 0.1U_0402_10V7K~D
C320 0.1U_0402_10V7K~DC320 0.1U_0402_10V7K~D C321 0.1U_0402_10V7K~DC321 0.1U_0402_10V7K~D
C1373 0.1U_0402_10V7K~DC1373 0.1U_0402_10V7K~D C1374 0.1U_0402_10V7K~DC1374 0.1U_0402_10V7K~D
C1008 0.1U_0402_10V7K~DC1008 0.1U_0402_10V7K~D C1009 0.1U_0402_10V7K~DC1009 0.1U_0402_10V7K~D
C1025 0.1U_0402_10V7K~DC1025 0.1U_0402_10V7K~D C1024 0.1U_0402_10V7K~DC1024 0.1U_0402_10V7K~D
C326 0.1U_0402_10V7K~DC326 0.1U_0402_10V7K~D C327 0.1U_0402_10V7K~DC327 0.1U_0402_10V7K~D
+3.3V_ALW_PCH
CLK_PCIE_LAN#30 CLK_PCIE_LAN30
+3.3V_RUN
+3.3V_ALW_PCH
MINI3CLK_REQ#36
CLK_PCIE_EXP#34
CLK_PCIE_EXP34
+3.3V_ALW_PCH
EXPCLK_REQ#34
MINI2CLK_REQ#36
MINI1CLK_REQ#36
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
R1293 0_0402_5%~DR1293 0_0402_5%~D R1294 0_0402_5%~DR1294 0_0402_5%~D
R1297 0_0402_5%~DR1297 0_0402_5%~D R1302 0_0402_5%~DR1302 0_0402_5%~D R61 10K_0402_5%~DR61 10K_0402_5%~D
R1205 0_0402_5%~DR1205 0_0402_5%~D R1206 0_0402_5%~DR1206 0_0402_5%~D R523 10K_0402_5%~DR523 10K_0402_5%~D
R1203 0_0402_5%~DR1203 0_0402_5%~D R1196 0_0402_5%~DR1196 0_0402_5%~D R45 10K_0402_5%~DR45 10K_0402_5%~D
R1195 0_0402_5%~DR1195 0_0402_5%~D R1202 0_0402_5%~DR1202 0_0402_5%~D R40 10K_0402_5%~DR40 10K_0402_5%~D
4
1 2
R122 10K_0402_5%~DR122 10K_0402_5%~D
R1198 0_0402_5%~DR1198 0_0402_5%~D
1 2
R1199 0_0402_5%~DR1199 0_0402_5%~D
1 2
12 12
1 2
R876 10K_0402_5%~DR876 10K_0402_5%~D
12 12 12
12 12 12
12 12 12
12 12 12
PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 PCIE_PTX_WANRX_N1 PCIE_PTX_WANRX_P1
PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2
PCIE_PRX_PCMTX_N3 PCIE_PRX_PCMTX_P3 PCIE_PTX_PCMRX_N3 PCIE_PTX_PCMRX_P3
PCIE_PRX_EXPTX_N4 PCIE_PRX_EXPTX_P4 PCIE_PTX_EXPRX_N4 PCIE_PTX_EXPRX_P4
PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 PCIE_PTX_WPANRX_N5 PCIE_PTX_WPANRX_P5
PCIE_PRX_GLANTX_N6 PCIE_PRX_GLANTX_P6 PCIE_PTX_GLANRX_N6 PCIE_PTX_GLANRX_P6
PCIECLKREQ0#
PCIE_LAN# PCIE_LAN
LANCLK_REQ#
PCIE_PCM# PCIE_PCM
PCMCLK_REQ#
PCIE_MINI3 # PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP# PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2 # PCIE_MINI2
MINI2CLK_REQ#
PCIE_MINI1 # PCIE_MINI1
MINI1CLK_REQ#
U73B
U73B
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKR Q0# / GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKR Q1# / GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKR Q2# / GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKR Q3# / GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKR Q4# / GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKR Q5# / GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ# / GPIO56
BD82QM57-SLGZQ-B3_FCBGA1071~D
BD82QM57-SLGZQ-B3_FCBGA1071~D
3
V1.5
V1.5
SMBus
SMBus
PCI-E*
PCI-E*
Link
Link
Controller
Controller
PEG
PEG
CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
Clock Flex
Clock Flex
SMBALERT# / GPIO11
SMBCLK
SMBDATA
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
SML1ALERT# / GPIO74
SML1CLK / GPIO58
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N CLKOUT_DMI_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_BCLK_N CLKIN_BCLK_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
B9
H14
C8
J14
C6
G8
M14
E10
G12
T13
T11
T9
H1
AD43 AD45
AN4 AN2
AT1 AT3
AW24 BA24
AP3 AP1
F18 E18
AH13 AH12
P41
J42
AH51 AH53
AF38
T45
P43
T42
N50
SIO_14M
PCI_TCM
PCI_TPM
JETWAY_14M
2
MEM_SMBCLK DDR_XDP_SMBCLK
MEM_SMBDATA DDR_XDP_SMBDAT
PCH_SMB_ALERT#
MEM_SMBCLK
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
R1
R1
10K_0402_5%~D
10K_0402_5%~D
1 2
CLK_CPU_EXP# CLK_CPU_EXP
CLK_CPU_DPLL# CLK_CPU_DPLL
CLK_BUF_EXP# CLK_BUF_EXP
CLK_BUF_BCLK# CLK_BUF_BCLK
CLK_BUF_DOT96# CLK_BUF_DOT96
CLK_BUF_CKSSCD# CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN XTAL25_OUT
1 2
R686 90.9_0402_1%~DR686 90.9_0402_1%~D
R1223 22_0402_5%~DR1223 22_0402_5%~D
R1220 22_0402_5%~D3@ R1220 22_0402_5%~D3@
R1219 22_0402_5%~DR1219 22_0402_5%~D
R910 22_0402_5%~D@R910 22_0402_5%~D@
LAN_SMBCLK 30
LAN_SMBDATA 30
SML1_SMBCLK 40
SML1_SMBDATA 40
PCH_CL_CLK1 36
PCH_CL_DATA1 36
PCH_CL_RST1# 36
CLK_CPU_EXP# 8 CLK_CPU_EXP 8
CLK_CPU_DPLL# 8 CLK_CPU_DPLL 8
CLK_BUF_EXP# 6 CLK_BUF_EXP 6
CLK_BUF_BCLK# 6 CLK_BUF_BCLK 6
CLK_BUF_DOT96# 6 CLK_BUF_DOT96 6
CLK_BUF_CKSSCD# 6 CLK_BUF_CKSSCD 6
CLK_PCH_14M 6
CLK_PCI_LOOPBACK 18
+1.05V_RUN
12
12
12
12
3
@
@
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+3.3V_RUN
6 1
5
4
Q190B
Q190B
1 2
R51 0_0402_5%~DR51 0_0402_5%~D
1 2
R54 0_0402_5%~DR54 0_0402_5%~D
CLK_SIO_14M 39
CLK_PCI_TPM_CHA 32
CLK_PCI_TPM 31
JETWAY_CLK14M 32
2
Q190A
@Q190A
@
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SML1_SMBCLK
SML1_SMBDATA
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
LAN_SMBCLK
LAN_SMBDATA
R379
R379
0_0402_5%~D
0_0402_5%~D
12
R685
R685
1M_0402_5%~D
1M_0402_5%~D
25MHZ_12PF_X5H025000FC1H-H~D
25MHZ_12PF_X5H025000FC1H-H~D
12P_0402_50V8J~D
12P_0402_50V8J~D
1
DDR_XDP_SMBCLK 8,13,14,15,28
DDR_XDP_SMBDAT 8,13,14,15,28
1 2
R1178 2.2K_0402_5%~DR1178 2.2K_0402_5%~D
1 2
R1179 2.2K_0402_5%~DR1179 2.2K_0402_5%~D
12
R252 2.2K_0402_5%~D@R252 2.2K_0402_5%~D@
12
R255 2.2K_0402_5%~D@R255 2.2K_0402_5%~D@
12
R1175 10K_0402_5%~DR1175 10K_0402_5%~D
R309 2.2K_0402_5%~DR309 2.2K_0402_5%~D
R377 2.2K_0402_5%~DR377 2.2K_0402_5%~D
12
2
1
C1168
C1168
12
12
Y6
Y6
12
12P_0402_50V8J~D
12P_0402_50V8J~D
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_LAN
2
1
C1169
C1169
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Compal Electronics, Inc.
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-5571P
LA-5571P
LA-5571P
16 60Thursday, January 21, 2010
16 60Thursday, January 21, 2010
16 60Thursday, January 21, 2010
1
of
of
of
5
4
3
2
1
+3.3V_RUN
R887
R887
2.2K_0402_5%~D
2.2K_0402_5%~D
D D
+3.3V_ALW_PCH
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
PCH_RI#
DMI_CTX_PRX_N07 DMI_CTX_PRX_N17 DMI_CTX_PRX_N27 DMI_CTX_PRX_N37
C C
+1.05V_RUN
PCH_PWROK
PCH_RSMRST#
B B
RESET_OUT#15,40
PM_MEPWROK40
A A
R48 8.2K_0402_5%~DR48 8.2K_0402_5%~D
R260 10K_0402_5%~DR260 10K_0402_5%~D
SIO_PWRBTN#40
+3.3V_ALW_PCH
DMI_CTX_PRX_P07 DMI_CTX_PRX_P17 DMI_CTX_PRX_P27 DMI_CTX_PRX_P37
DMI_CRX_PTX_N07 DMI_CRX_PTX_N17 DMI_CRX_PTX_N27 DMI_CRX_PTX_N37
DMI_CRX_PTX_P07 DMI_CRX_PTX_P17 DMI_CRX_PTX_P27 DMI_CRX_PTX_P37
R385
R385
1 2
49.9_0402_1%~D
49.9_0402_1%~D
1 2
1 2
XDP_DBRESET#8,15
1 2
R253 0_0402_5%~DR253 0_0402_5%~D
1 2
R254 0_0402_5%~DR254 0_0402_5%~D
1 2
R256 0_0402_5%~DR256 0_0402_5%~D
1 2
R257 0_0402_5%~DR257 0_0402_5%~D
PM_DRAM_PWRGD8
PCH_RSMRST#40
ME_SUS_PWR_ACK40
SIO_PWRBTN#_R8,15
AC_PRESENT40
5
1 2
R275 8.2K_0402_5%~DR275 8.2K_0402_5%~D
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_COMP_R
XDP_DBRESET#
SYS_PWROK
PCH_PWROK
PM_MEPWROK_R
LAN_RST#
PM_DRAM_PWRGD
PCH_RSMRST#
ME_SUS_PWR_ACK
SIO_PWRBTN#_R
1 2
R53 0_0402_5%~DR53 0_0402_5%~D
SIO_PWRBTN#_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
12
R269 10K_0402_5%~DR269 10K_0402_5%~D
12
R268 10K_0402_5%~DR268 10K_0402_5%~D
12
R380 10K_0402_5%~DR380 10K_0402_5%~D
12
R267 10K_0402_5%~DR267 10K_0402_5%~D
U73C
U73C
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_DN_ACK / GPIO30
P5
PWRBTN#
P7
ACPRESENT / GPIO31
A6
BATLOW# / GPIO72
F14
RI#
BD82QM57-SLGZQ-B3_FCBGA1071~D
BD82QM57-SLGZQ-B3_FCBGA1071~D
CLKRUN#
V1.5
V1.5
DMI
FDI
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO6 2
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GP IO29
4
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
SLP_S4#
SLP_S3#
SLP_M#
TP23
PMSYNCH
BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12
BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
R282 8.2K_0402_5%~DR 282 8.2K_0402_5%~D
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_M#
H_PM_SYNC
SIO_SLP_LAN#
+3.3V_RUN
12
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
FDI_CTX_PRX_N0 7 FDI_CTX_PRX_N1 7 FDI_CTX_PRX_N2 7 FDI_CTX_PRX_N3 7 FDI_CTX_PRX_N4 7 FDI_CTX_PRX_N5 7 FDI_CTX_PRX_N6 7 FDI_CTX_PRX_N7 7
FDI_CTX_PRX_P0 7 FDI_CTX_PRX_P1 7 FDI_CTX_PRX_P2 7 FDI_CTX_PRX_P3 7 FDI_CTX_PRX_P4 7 FDI_CTX_PRX_P5 7 FDI_CTX_PRX_P6 7 FDI_CTX_PRX_P7 7
FDI_INT 7
FDI_FSYNC0 7
FDI_FSYNC1 7
FDI_LSYNC0 7
FDI_LSYNC1 7
PCH_PCIE_WAKE# 39
CLKRUN# 32,39,40
T173 PAD ~DT173 PAD~D
T179 PAD ~DT179 PAD~D
T2 PAD~DT2 PAD~D
SIO_SLP_S5# 40
T3 PAD~DT3 PAD~D
SIO_SLP_S4# 39
T4 PAD~DT4 PAD~D
SIO_SLP_S3# 39
T5 PAD~DT5 PAD~D
SIO_SLP_M# 39,48
T6 PAD~DT6 PAD~D
H_PM_SYNC 8
SIO_SLP_LAN# 30,39
3
G_DAT_DDC2 PCH_CRT_DDC_DAT
PANEL_BKEN_PCH39
ENVDD_PCH24,39
BIA_PWM_PCH24
PCH_CRT_BLU27 PCH_CRT_GRN27 PCH_CRT_RED27
R480 20_0402_1%~DR480 20_0402_1%~D
PCH_CRT_HSYNC27 PCH_CRT_VSYNC27
1 2 1 2
R673 20_0402_1%~DR673 20_0402_1%~D
1K_0402_0.5%~D
1K_0402_0.5%~D
PCH_CRT_BLU
1 2
R679 150_0402_1%~DR679 150_0402_1%~D
R680 150_0402_1%~DR680 150_0402_1%~D
R681 150_0402_1%~DR681 150_0402_1%~D
R682 100K_0402_5%~DR682 100K_0402_5%~D
1 2
1 2
1 2
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
NO CONNECT FOR DISCRETE
12
12
R890
R890
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2
R1526
@R1526
@
0_0402_5%~D
0_0402_5%~D
Q217A
Q217A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
@R1527
@
0_0402_5%~D
0_0402_5%~D
HSYNC VSYNC
12
4
1 2
R1527
CRT_IREF
2
5
Q217B
Q217B DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
AB48
AB46
AP39 AP41
AV53 AV51
BB47 BA52
AV47
BB48 BA50
AV48
AP48 AP47
AU52
AU50
AA52 AB53 AD53
AD48 AB51
2
+3.3V_RUN
PANEL_BKEN_PCH ENVDD_PCH
BIA_PWM_PCH
PCH_CRT_BLU PCH_CRT_GRN PCH_CRT_RED
G_CLK_DDC2 G_DAT_DDC2
R672
R672
PCH_CRT_DDC_CLKG_CLK_DDC2
61
3
U73D
U73D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
L_DDC_CLK
Y45
L_DDC_DATA
L_CTRL_CLK
V48
L_CTRL_DATA
LVD_IBG LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
LVDSA_CLK# LVDSA_CLK
LVDSA_DATA#0 LVDSA_DATA#1
AY48
LVDSA_DATA#2 LVDSA_DATA#3
LVDSA_DATA0 LVDSA_DATA1
AY49
LVDSA_DATA2 LVDSA_DATA3
LVDSB_CLK# LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1 LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1 LVDSB_DATA2
AT51
LVDSB_DATA3
CRT_BLUE CRT_GREEN CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSYNC
Y51
CRT_VSYNC
DAC_IREF CRT_IRTN
BD82QM57-SLGZQ-B3_FCBGA1071~D
BD82QM57-SLGZQ-B3_FCBGA1071~D
V1.5
V1.5
LVDS
LVDS
CRT
CRT
PCH_CRT_DDC_CLK 27
PCH_CRT_DDC_DAT 27
Intel request DDPB can not support eDP
SDVO_INTN SDVO_INTP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
BJ46 BG46
BJ48 BG48
BF45 BH45
T51 T53
BG44 BJ44 AU38
BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38
Y49 AB49
BE44 BD44 AV40
BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36
U50 U52
BC46 BD46 AT38
BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36
PCH_SDVO_CTRLCLK 26
PCH_SDVO_CTRLDATA 26
DPB_PCH_AUX# 26 DPB_PCH_AUX 26
DPB_PCH_HPD 26
DPB_PCH_LANE_N0 26 DPB_PCH_LANE_P0 26 DPB_PCH_LANE_N1 26 DPB_PCH_LANE_P1 26 DPB_PCH_LANE_N2 26 DPB_PCH_LANE_P2 26 DPB_PCH_LANE_N3 26 DPB_PCH_LANE_P3 26
PCH_DDPC_CTRLCLK 25
PCH_DDPC_CTRLDATA 25
DPC_PCH_DOCK_AUX# 25 DPC_PCH_DOCK_AUX 25 DPC_PCH_DOCK_HPD 38
DPC_PCH_LANE_N0 38 DPC_PCH_LANE_P0 38 DPC_PCH_LANE_N1 38 DPC_PCH_LANE_P1 38 DPC_PCH_LANE_N2 38 DPC_PCH_LANE_P2 38 DPC_PCH_LANE_N3 38 DPC_PCH_LANE_P3 38
PCH_DDPD_CTRLCLK 25
PCH_DDPD_CTRLDATA 25
DPD_PCH_DOCK_AUX# 25 DPD_PCH_DOCK_AUX 25 DPD_PCH_DOCK_HPD 38
DPD_PCH_LANE_N0 38 DPD_PCH_LANE_P0 38 DPD_PCH_LANE_N1 38 DPD_PCH_LANE_P1 38 DPD_PCH_LANE_N2 38 DPD_PCH_LANE_P2 38 DPD_PCH_LANE_N3 38 DPD_PCH_LANE_P3 38
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN DDPB_AUXP
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN DDPC_AUXP
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN DDPD_AUXP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-5571P
LA-5571P
LA-5571P
17 60Thursday, January 21, 2010
17 60Thursday, January 21, 2010
17 60Thursday, January 21, 2010
of
of
1
of
5
4
3
2
1
+3.3V_RUN
D D
+3.3V_RUN
C C
B B
A A
RP3
RP3
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%~D
8.2K_1206_8P4R_5%~D
RP4
RP4
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%~D
8.2K_1206_8P4R_5%~D
RP5
RP5
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%~D
8.2K_1206_8P4R_5%~D
RP6
RP6
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%~D
8.2K_1206_8P4R_5%~D
1 2
R212 8.2K_0402_5%~DR 212 8.2K_0402_5%~D
1 2
R590 8.2K_0402_5%~DR 590 8.2K_0402_5%~D
1 2
R786 8.2K_0402_5%~DR 786 8.2K_0402_5%~D
PCI_GNT3#
12
R863
R863
4.7K_0402_5%~D
4.7K_0402_5%~D
@
@
PCI_DEVSEL# PCI_PIRQA# PCI_PLOCK# PCI_PERR#
PCI_TRDY# PCI_FRAME# PCI_REQ1# PCI_PIRQD#
PCI_PIRQB# PCI_REQ0#
PCI_SERR#
PCI_IRDY# PCI_STOP# LVDS_CBL_DET# PCI_PIRQC#
CAM_MIC_CBL_DET#
BT_DET#
SD_DET#
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3
PCH_PLTRST#
Low = A16 swap
High = Default
PLTRST_USH#31
PLTRST_R5U242#33
PLTRST_XDP#15 PLTRST_LAN#30
+3.3V_RUN
5
U11
U11
1
P
B
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
C40
C40
1 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
PCH_PLTRST#_EC
4
HDD_FALL_INT28,40
R100 0_0402_5%~DR100 0_0402_5%~D
1 2
R97 0_0402_5%~DR97 0_0402_5%~D
1 2
R94 0_0402_5%~DR94 0_0402_5%~D
1 2
R14 0_0402_5%~DR14 0_0402_5%~D
1 2
CLK_PCI_502839
CLK_PCI_MEC40
CLK_PCI_DOCK38
CLK_PCI_LOOPBACK16
PCH_PLTRST#_EC 8,32,34,36,39,40
PCIE_MCARD2_DET#36
BT_DET#41
PCIE_MCARD3_DET#36
LVDS_CBL_DET#24
SD_DET#33
CAM_MIC_CBL_DET#24
1 2
R632 0_0402_5%~DR632 0_0402_5%~D
R121 0_0402_5%~D@R121 0_0402_5%~D@
1 2
R1216 22_0402_5%~DR1216 22_0402_5%~D R1217 47_0402_5%~DR1217 47_0402_5%~D R1215 22_0402_5%~DR1215 22_0402_5%~D
R63 22_0402_5%~DR63 22_0402_5%~D
1 2
12 12
12
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCI_REQ0# PCI_REQ1#
BT_DET#
PCI_GNT0# PCI_GNT1# PCIE_MCARD3_DET# PCI_GNT3#
LVDS_CBL_DET# SD_DET# CAM_MIC_CBL_DET# FFS_PCH_INT
PCH_PCIRST#
PCI_SERR# PCI_PERR#
PCI_IRDY#
PCI_DEVSEL# PCI_FRAME#
PCI_PLOCK#
PCI_STOP# PCI_TRDY#
PCH_PLTRST#
PCI_5028 PCI_MEC PCI_DOCK
PCI_LOOPBACKOUT
U73E
U73E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1# / GPIO50
B45
REQ2# / GPIO52
M53
REQ3# / GPIO54
F48
GNT0#
K45
GNT1# / GPIO51
F36
GNT2# / GPIO53
H53
GNT3# / GPIO55
B41
PIRQE# / GPIO2
K53
PIRQF# / GPIO3
A36
PIRQG# / GPIO4
A48
PIRQH# / GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
BD82QM57-SLGZQ-B3_FCBGA1071~D
BD82QM57-SLGZQ-B3_FCBGA1071~D
V1.5
V1.5
Boot BIOS Strap
PCI_GNT#0PCI_GNT#1 Boot BIOS Location
PCI
PCI
00
01
10
11
*
5
4
PCH XDP ENABLE
PCH XDP DISABLE
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3
NV_DQS0 NV_DQS1
NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15
NV_ALE NV_CLE
NV_RCOMP
NV_RB#
NV_WR#0_RE# NV_WR#1_RE#
NV_WE#_CK0 NV_WE#_CK1
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USB
USB
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
LPC
Reserved (NAND)
PCI
SPI
3
Stuff: R78,R89,R101~R116
No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
No Stuff: R78,R89,R101~R116
AY9 BD1 AP15 BD8
AV9 BG8
AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6
NV_ALE
BD3
NV_CLE
AY6
AU2
AV7
AY8 AY5
AV11 BF5
H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24
B25
D25
N16 J16 F16 L16 E14 G16 F12 T15
USBP0­USBP0+ USBP1­USBP1+ USBP2­USBP2+ USBP3­USBP3+ USBP4­USBP4+ USBP5­USBP5+ USBP6­USBP6+ USBP7­USBP7+ USBP8­USBP8+ USBP9­USBP9+ USBP10­USBP10+ USBP11­USBP11+
USBP13­USBP13+
USBRBIAS
USB_OC0#_R USB_OC1#_R
USBP0- 37 USBP0+ 37 USBP1- 37
USBP1+ 37
USBP2- 37
USBP2+ 37
USBP3- 37
USBP3+ 37
USBP4- 36
USBP4+ 36
USBP5- 36
USBP5+ 36
USBP6- 41
USBP6+ 41
USBP7- 31
USBP7+ 31
USBP8- 38
USBP8+ 38
USBP9- 38
USBP9+ 38
USBP10- 34
USBP10+ 34
USBP11- 24
USBP11+ 24
USBP13- 36
USBP13+ 36
Within 500 mils
1 2
R303
R303
22.6_0402_1%~D
22.6_0402_1%~D
R71 0_0402_5%~DR71 0_0402_5%~D
1 2
R77 0_0402_5%~DR77 0_0402_5%~D
1 2
PCI_GNT0#
PCI_GNT1#
12
----->Right Side Bottom
----->Right Side Top
----->Left Side Top
----->Left Side Bottom
----->WLAN
----->WWAN
----->Blue Tooth
----->BIO
----->DOCK
----->DOCK
----->Express Card
----->Camera
----->PCIE/BKT
USB_OC0# 37
@
@
R93
R93
2
1K_0402_5%~D
1K_0402_5%~D
USB_OC1# 37 USB_OC2# 15 USB_OC3# 15 USB_OC4# 15 USB_OC5# 15 USB_OC6# 15 USB_OC7# 15
USB_OC0#_R 15 USB_OC1#_R 15
USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#
R79
R79
@
@
12
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+VCCPNAND
12
R872
@R872
@
10K_0402_5%~D
10K_0402_5%~D
NV_ALE
Danbury Technology Enabled
High = Enabled (Default)
Low = Disabled
12
NV_CLE
+VCCPNAND
R866
@R866
@
NV_ALE
DMI Termination Voltage
NV_CLE
USB_OC0# USB_OC1# USB_OC3# USB_OC4#
USB_OC5# USB_OC6# USB_OC7# USB_OC2#
LA-5571P
LA-5571P
LA-5571P
Set to Vss when LOW
Set to Vcc when HIGH
4 5 3 6 2 7 1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
4 5 3 6 2 7 1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCH (4/8)
PCH (4/8)
PCH (4/8)
+3.3V_ALW_PCH
RP1
RP1
RP2
RP2
1
18 60Thursday, January 21, 2010
18 60Thursday, January 21, 2010
18 60Thursday, January 21, 2010
of
of
of
5
4
3
2
1
D D
SIO_EXT_SMI#
1 2
R99 1K_0402_5%~D@ R99 1K_0402_5%~D@
+3.3V_ALW_PCH
C C
+3.3V_ALW_PCH
+3.3V_RUN
B B
A A
Internal pull up GPIO27 to enable VccVRM
12
R1284
R1284
8.2K_0402_5%~D
8.2K_0402_5%~D
@
@
TP_ONDIE_PLL_VR
SIO_EXT_WAKE#
1 2
R1530 2.2K_0402_5%~DR1530 2.2K_0402_5%~D
R1309 10K_0402_5%~DR1309 10K_0402_5%~D
R1242 10K_0402_5%~DR1242 10K_0402_5%~D
R1243 10K_0402_5%~DR1243 10K_0402_5%~D
R1244 10K_0402_5%~DR1244 10K_0402_5%~D
R1245 10K_0402_5%~DR1245 10K_0402_5%~D
R1543 10K_0402_5%~DR1543 10K_0402_5%~D
R1544 10K_0402_5%~DR1544 10K_0402_5%~D
R95 8.2K_0402_5%~DR95 8.2K_0402_5%~D
R1489 10K_0402_5%~DR1489 10K_0402_5%~D
R1490 10K_0402_5%~DR1490 10K_0402_5%~D
R1491 10K_0402_5%~DR1491 10K_0402_5%~D
1 2
1 2
1 2
1 2
1 2
GPIO46
CONTACTLESS_DET#
12
GPIO37
12
EN_ESATA_RPTR#
12
TEMP_ALERT#
12
GPIO22
12
GPIO34
12
SPEAKER_DET#
GPIO1
GPIO6
GPIO7
TPM_ID0
5
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
5@
5@
R273
R273
1 2
10K_0402_5%~D
10K_0402_5%~D
6@
6@
R922
R922
1 2
SIO_EXT_SCI#_R15
SIO_EXT_SCI#40
SIO_EXT_SMI#40
PM_LANPHY_ENABLE30
SIO_EXT_WAKE#39
EN_ESATA_RPTR#15,37
SPEAKER_DET#29
PCIE_MCARD1_DET#36
ROUSH_PAID_TS_DET#15
T25 PAD~D@ T25 PAD~D@
USB_MCARD1_DET#36
CONTACTLESS_DET#15,31
USB_MCARD2_DET#36
TEMP_ALERT#15,39
All NCTF pins should have thick traces at 45°from the pad.
+3.3V_RUN
TPM_ID1
T26 PAD~D@ T26 PAD~D@
GPIO3715
FFS_INT228
IO_LOOP37
12
4@ R787
4@
20K_0402_5%~D
20K_0402_5%~D
12
3@ R339
3@
2.2K_0402_5%~D
2.2K_0402_5%~D
SIO_EXT_SCI#
R787
R339
R130
R130
0_0402_5%~D
0_0402_5%~D
1 2
GPIO1
GPIO6
GPIO7
SIO_EXT_SMI#
PM_LANPHY_ENABLE
EN_ESATA_RPTR#
SPEAKER_DET#
GPIO22
TP_ONDIE_PLL_VR
ROUSH_PAID_TS_DET#
GPIO34
USB_MCARD1_DET#
CONTACTLESS_DET#
GPIO37
TPM_ID0
TPM_ID1
USB_MCARD2_DET#
GPIO46
FFS_INT2
TEMP_ALERT#
IO_LOOP
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31
No TPM, No China TPM
USH1.0 (For SSI)
4
China TPM
U73F
U73F
Y3
BMBUSY# / GPIO0
C38
TACH1 / GPIO1
D37
TACH2 / GPIO6
J32
TACH3 / GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
AA2
SATA4GP / GPIO16
F38
TACH0 / GPIO17
Y7
SCLOCK / GPIO22
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI# / GP IO34
V6
GPIO35
AB7
SATA2GP / GPIO36
AB13
SATA3GP / GPIO37
V3
SLOAD / GPIO38
P3
SDATAOUT0 / GPIO39
H3
PCIECLKR Q6# / GPIO45
F1
PCIECLKR Q7# / GPIO46
AB6
SDATAOUT1 / GPIO48
AA4
SATA5GP / GPIO4 9 / TEMP_ALERT#
F8
GPIO57
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCTF_12
BF1
VSS_NCTF_13
BF53
VSS_NCTF_14
BH1
VSS_NCTF_15
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
BH53
VSS_NCTF_18
BJ1
VSS_NCTF_19
BJ2
VSS_NCTF_20
BJ4
VSS_NCTF_21
BJ49
VSS_NCTF_22
BJ5
VSS_NCTF_23
BJ50
VSS_NCTF_24
BJ52
VSS_NCTF_25
BJ53
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
D53
VSS_NCTF_29
E1
VSS_NCTF_30
E53
VSS_NCTF_31
BD82QM57-SLGZQ-B3_FCBGA1071~D
BD82QM57-SLGZQ-B3_FCBGA1071~D
USH2.0
V1.5
V1.5
MISC
MISC
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
TPM_ID1TPM_ID0
0
0
11
0
1
01
-----> will use MEMO control pop R339 & de-pop R787 when USH1.0 enable for SSI build only
3
CLKOUT_PCIE6N CLKOUT_PCIE6P
CLKOUT_PCIE7N CLKOUT_PCIE7P
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
AH45 AH46
AF48 AF47
SIO_A20GATE
U2
CLK_CPU_BCLK#
AM3
CLK_CPU_BCLK
AM1
H_PECI
BG10
SIO_RCIN#
T1
H_CPUPWRGD
BE10
PCH_THRMTRIP#_R
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
INIT3_3V#
P6
C10
SIO_A20GATE 40
CLK_CPU_BCLK# 8
CLK_CPU_BCLK 8
H_PECI 8
SIO_RCIN# 40
H_CPUPWRGD 8
T7PAD~D @T7PAD~D @
+1.05V_RUN_VTT
12
R237
R237 56_0402_5%~D
56_0402_5%~D
1
C33
C33
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
ROUSH_PAID_TS_DET#
SIO_EXT_SMI#
IO_LOOP
R230 8.2K_0402_5%~DR230 8.2K_0402_5%~D
R231 10K_0402_5%~DR231 10K_0402_5%~D
1 2
R272 10K_0402_5%~DR272 10K_0402_5%~D
1 2
R74 10K_0402_5%~DR74 10K_0402_5%~D
1 2
R274 10K_0402_5%~DR274 10K_0402_5%~D
R835 100K_0402_5%~DR835 100K_0402_5%~D
+3.3V_RUN
12
12
+3.3V_ALW_PCH
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-5571P
LA-5571P
LA-5571P
19 60Thursday, January 21, 2010
19 60Thursday, January 21, 2010
19 60Thursday, January 21, 2010
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