Compal LA-5501P NTUC0, S35 Schematic

A

ZZZ5

ZZZ2

ZZZ1

DAZ

1 1

07/21 Add DAZ P/N and other small board PCB P/N

ZZZ2

DC-IN Cable

45@

ZZZ3

LA-5501P

DA@

ZZZ4

LS-5501P

DA@

04/13 Add DC-IN Cable DC301008200 (45@)

ZZZ5

LS-5502P

DA@

B

ZZZ6

LS-5503P

DA@

ZZZ7

LS-5504P

DA@

C

D

E

Compal Confidential

2 2

NTUC0 LA-5501P Schematics Document

Intel Penryn uFCBGA with Intel Cantiga GS40+ICH9M SFF

SFF ULV I/O Board

3 3

2009-07-30

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

NTUC0 IO/B LA-5501P Schematic

1 24Thursday, July 30, 2009

E

1.0

A

B

C

D

E

Compal Confidential

File Name : NTUC0_LA-5501P

1 1

LVDS

Amplifier & Speaker

LCD Conn.

Single Channel

HDA

Audio Codec Realtek ALC272

TMDS

HDMI Conn.

Headphone & MIC Jack

Golden Finger

RGB

HDI to I/O board

CRT Conn.

2 2

PCI-Express x1

Ethernet 10/100/1000 LAN

WLAN Card

AR8131

LPC

3 3

Transformer

WWAN Card

ENE KBC KB926

RJ45 Conn.

USB * 8 ports

SATA

SATA HDD

ESATA Conn.

USB Port X3

MINI Card x2

BlueTooth

CMOS Camera

Card Reader RTS5159

SD/MMC/MS/XD Conn.

INT KB

SPI ROM

Touch Pad

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

NTUC0 IO/B LA-5501P Schematic

E

of

2 24Thursday, July 30, 2009

of

2 24Thursday, July 30, 2009

of

2 24Thursday, July 30, 2009

1.0

A

Symbol Note :

: means Digital Ground

@ : means just reserve , no build CONN@ : means ME part. 45@ : means install after SMT.

: means Analog Ground

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

CLOCK GENERATOR (EXT.)

SMBUS Control Table

1 1

SMB_EC_CK1 SMB_EC_DA1

SMB_EC_CK2 SMB_EC_DA2

SMB_CK_CLK1 SMB_CK_DAT1 ICH9

LCD_CLK LCD_DAT

SOURCE

KB926

Cantiga

HEX ADDRESS

A0

D2

INVERTER BATT EEPROM

X X

X

X X

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4DDR SO-DIMM 1

1 1 0 1 0 0 1 0

SERIAL

V V

X X

X

X X

THERMAL

ENSOR

S (CPU)

X X

V

X

SODIMM CLK CHIP

MINI CARD

X

V V V

X X

LCD

X X X

X

V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

NTUC0 IO/B LA-5501P Schematic

of

3 24Tuesday, July 21, 2009

of

3 24Tuesday, July 21, 2009

of

3 24Tuesday, July 21, 2009

1.0

5

4

3

2

1

B+

1

C1

0.1U_0603_50V4Z

2

D D

05/11 Co-lay backlight control signal (L_BKLT_CTRL) from NB

06/23 Delete PCIE_IRX_DTX_N4,PCIE_IRX_DTX_P4 PCIE_ITX_DRX_N4_C,PCIE_ITX_DRX_P4_C

C C

B B

04/02 Change JP1.23 from PH to MAINPWON

+RTCBATT

WWAN

WLAN

LAN

MAINPWON<22>

EC_SMB_DA2<13>

EC_SMB_CK2<13>

EC_SMI#<13>

L_BKLT_CTRL<5>

PCIE_ITX_DRX_P2_C<8> PCIE_ITX_DRX_N2_C<8>

PCIE_IRX_DTX_P2<8> PCIE_IRX_DTX_N2<8>

PCIE_ITX_DRX_N6_C<11> PCIE_ITX_DRX_P6_C<11>

PCIE_IRX_DTX_N6<11> PCIE_IRX_DTX_P6<11>

SLP_S4#<13>

EC_RSMRST#<13> EC_LID_OUT#<13>

ICH_POK<13>

SUSP#<13,17,21>

AC_IN<13,19> USB_OC#2<16> USB_OC#1<16> USB_OC#0<16>

PBTN_OUT#<13>

SLP_S5#<13> SLP_S3#<13> EC_SCI#<13> PLT_RST#<8,11,13>

SYSON< 13>

LPC_AD0<13> LPC_AD1<13> LPC_AD2<13> LPC_AD3<13>

LPC_FRAME#<13>

SERIRQ<13> KB_RST#<13> GATEA20<13>

WWAN_CLK REQ#<8>

HDMI_HPD#<7> CLK_PCI_LPC<13>

HDMI_DATA<7> HDMI_CLK<7>

TMDS_B_TX2<7> TMDS_B_TX2#<7>

TMDS_B_TX1<7> TMDS_B_TX1#<7>

TMDS_B_TX0<7> TMDS_B_TX0#<7>

TMDS_B_CLK<7> TMDS_B_CLK#<7>

WLAN_CLKREQ#<8>

PCIE_WAKE#<8,11> PCI_PME#<13> CLK_48M_CR<15>

LAN_CLKREQ#<11> CLK_PCIE_WW AN#<8> CLK_PCIE_WW AN<8>

CLK_PCIE_WLAN#<8> CLK_PCIE_WLAN<8>

CLK_PCIE_LAN#<11> CLK_PCIE_LAN<11>

PADT3PAD

T3

PADT4PAD

T4

1 2

R190 0_0402_5%R190 0_0402_5%

JP1

1

B+

3

B+

5

B+

7

B+

9

B+

11

B+

13

B+

15

RESERVED

17

GND

19

GND

21

GND

23

B+_BIAS

25

+RTCVCC

27

ICH_RTCRST#

29

GPIO1

31

EC_SMB_DA2

33

EC_SMB_CK2

35

GPIO6

37

GPIO48

39

EC_SMI#

41

NC

43

PCIE_ITX_EXPRX_P2

45

PCIE_ITX_EXPRX_N2

47

GND

49

PCIE_IRX_EXPTX_P2

51

PCIE_IRX_EXPTX_N2

53

GND

55

PCIE_ITX_WLANRX_P1

57

PCIE_ITX_WLANRX_N1

59

GND

61

PCIE_IRX_WLANTX_P1

63

PCIE_IRX_WLANTX_N1

65

GND

67

PCIE_ITX_LANRX_N0

69

PCIE_ITX_LANRX_P0

71

GND

73

PCIE_IRX_LANTX_N0

75

PCIE_IRX_LANTX_P0

77

GND

79

PM_SLP_S4#

81

VGATE

83

EC_RSMRST#

85

GPIO24

87

EC_LID_OUT#

89

PWRGD

91

EC_SWI#

93

SUSP#

95

AC_IN

97

EC_USB_OC3#

99

EC_USB_OC2#

101

EC_USB_OC1#

103

PWRBTN#

105

PM_SLP_S5#

107

PM_SLP_S3#

109

EC_SCI#

111

PLT_RST#

113

SYSON

115

LPC_AD0

117

LPC_AD1

119

LPC_AD2

121

LPC_AD3

123

LPC_FRAME#

125

SIRQ

127

EC_KBRST#

129

EC_GA20

131

EXP_REQ#

133

RESERVED

135

HDMI_HP

137

LPC_CLK0

139

GND

141

HDMI_SDA

143

HDMI_SCL

145

GND

147

TX2D+

149

TX2D-

151

GND

153

TX1D+

155

TX1D-

157

GND

159

TX0D+

161

TX0D-

163

GND

165

TXCD+

167

TXCD-

169

GND

171

WLAN_REQ#

173

WLAN_SMDATA

175

WLAN_SMCLK

177

PCIE_WAKE#

179

PCIE_PME

181

CLK_48M_CR

183

LAN_REQ#

185

CLK_PCIE_EXP

187

CLK_PCIE_EXP#

189

GND

191

CLK_PCIE_MINI

193

CLK_PCIE_MINI#

195

HDI_B_DET/GND

197

CLK_PCIE_LAN#

199

CLK_PCIE_LAN

+5VS

+5VALW

+3VALW

+3VS +3VS +3VS

VR_ON

HDI_B_DET/GND

GND GND GND

PC Beep

HDA_RST

HDA_SDOUT

HDA_SYNC

HDA_BIT_CLK

HDA_SDIN0 HDA_SDIN1

SATA_ACT# PSATA_ITX_DRX_P0 PSATA_ITX_DRX_N0

PSATA_ITX_DRX_P1 PSATA_ITX_DRX_N1

PSATA_ITX_DRX_P2 PSATA_ITX_DRX_N2

PSATA_IRX_DTX_P2_C PSATA_IRX_DTX_N2_C

PSATA_IRX_DTX_P0_C PSATA_IRX_DTX_N0_C

PSATA_IRX_DTX_P1_C PSATA_IRX_DTX_N1_C

GND

EC_THERM#

GPIO42

GND

1.5VS

1.5VS GND

GND

USB20_P7 USB20_N7

GND

USB20_P5 USB20_N5

GND

USB20_P4 USB20_N4

GND

USB20_P3 USB20_N3

GND

GPIO44

GND

USB20_P8 USB20_N8

GND

USB20_P6 USB20_N6

GND

USB20_P1 USB20_N1

GND

USB20_P2 USB20_N2

GND

USB20_P0 USB20_N0

GND

PANEL_BKEN_MCH

ENVDD

LDDC_DATA_MCH

LDDC_CLK_MCH

CRT_VSYNC CRT_HSYNC

GND

G_DAT_DDC2

G_CLK_DDC2

GND

CRT_RED

GND

CRT_GRN

GND

CRT_BLU

GND

LCD_A2+_MCH

LCD_A2-_MCH

GND

LCD_A1+_MCH

LCD_A1-_MCH

GND

LCD_A0+_MCH

LCD_A0-_MCH

GND

LCD_ACLK+_MCH

LCD_ACLK-_MCH

2 4 6

+VL

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

R184 0_0402_5%R184 0_0402_5%

ICH_HDA_RST# ICH_HDA_SDOUT ICH_HDA_SYNC ICH_HDA_BIT_CLK

06/23 Delete USB20_N5,USB20_P5

1 2

+5VS +5VALW VL

04/23 Add VL (PWR Recommend)

+3VALW +3VS

VR_ON <13>

HDI_B_DET <13>

SB_SPKR <10>

HDA_SDIN0 <10>

HDD_LED# <15> SATA_ITX_DRX_P0_C <9> SATA_ITX_DRX_N0_C <9>

EC_THERM# <13>

+1.5VS

SATA_ITX_DRX_P2_C <16> SATA_ITX_DRX_N2_C <16>

SATA_IRX_DTX_P2_C <16> SATA_IRX_DTX_N2_C <16>

SATA_IRX_DTX_P0_C <9> SATA_IRX_DTX_N0_C <9>

USB20_P4 <8> USB20_N4 <8>

USB20_P3 <9> USB20_N3 <9>

USB20_P8 <5> USB20_N8 <5>

USB20_P6 <15> USB20_N6 <15>

USB20_P1 <16> USB20_N1 <16>

USB20_P2 <16> USB20_N2 <16>

USB20_P0 <15> USB20_N0 <15>

H_ENBKL <5> ENVDD <5>

LDDC_DATA <5>

LDDC_CLK <5> CRT_VSYNC <6> CRT_HSYNC <6>

CRT_DDC_DATA <6 >

CRT_DDC_CLK <6>

CRT_RED <6>

CRT_GREEN <6>

CRT_BLUE <6>

LVDS_A1 <5> LVDS_A1# <5>

LVDS_A0 <5> LVDS_A0# <5>

LVDS_A2 <5> LVDS_A2# <5>

LVDS_ACLK <5> LVDS_ACLK# <5>

ICH_HDA_RST#

ICH_HDA_SDOUT

ICH_HDA_SYNC

ICH_HDA_BIT_CLK

1 2

R2 33_0402_5%R2 33_0402_5%

1 2

R3 33_0402_5%R3 33_0402_5%

1 2

R4 33_0402_5%R4 33_0402_5%

1 2

R5 33_0402_5%R5 33_0402_5%

HDA_RST# <10>

HDA_SDOUT <10>

HDA_SYNC <10>

HDA_BIT_CLK <10>

A A

FPC_O0P45X2P35

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HDI to I/O Golden Finger

NTUC0 IO/B LA-5501P Schematic

1

of

4 24Thursday, July 30, 2009

of

4 24Thursday, July 30, 2009

of

4 24Thursday, July 30, 2009

1.0

5

4

3

2

1

LCD POWER CIRCUIT

2

Q2

G

+3VS+LCDVDD_CONN

D

1 3

W=60mils

S

W=60mils

1

C2

4.7U_0805_10V4Z

2

SI2301BDS-T1-E3_SOT23-3

05/13 Change bead (L1) to 0ohm (R234) 05/14 Delete R234

06/04 Change R235 from @ to mount Change D1 from mount to @

+LCDVDD_CONN

1

C7

@

4.7U_0805_10V4Z

2

1

C8

0.1U_0402_16V4Z

2

H_ENBKL<4>

05/13 Change C7 from mount to @

+3VS

12

R7

05/13 Reserve R235

R235 0_0402_5%R235 0_0402_5%

1 2

BKOFF#<13>

D1 CH751H-40PT_SOD323-2@D1 CH751H-40PT_SOD323-2@

R202 0_0402_5%R202 0_0402_5%

21

1 2

R7

4.7K_0402_5%

DISPOFF#

ENBKL

12

R12

R12 100K_0402_5%

100K_0402_5%

change from 10K to 100K 5/8 by checklist

ENBKL <13>

470P_0402_50V7K

1

2

INVT_PWM

DAC_BRIG

DISPOFF#

470P_0402_50V7K

1

C4

C3

C5

@

2

For EMI

03/31 Change R12 from @ to mount

+5VALW

12

R9

R8

Q1

R8 150_0603_1%

150_0603_1%

13

D

S

12

R13

R13 100K_0402_5%

100K_0402_5%

2

G

D D

05/12 Change Q1 from SB000008J00 to SB000009610

SSM3K7002FU_SC70-3

ENVDD<4>

R9 100K_0402_5%

100K_0402_5%

R10

1 2

220K_0402_5%

13

D

2

G

S

220K_0402_5%

Q3

Q3 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1

C6

0.1U_0402_16V4Z

2

05/12 Change Q3 from SBX01240010 to SB000009610

04/13 Change R13 from @ to mount

C C

06/23 Change L2 from SM010032020 to SM010014520

L2

1 2

+3VS

R16

2.2K_0402_5%

LDDC_CLK<4> LDDC_DATA<4>

B B

05/11 Co-lay backlight control signal

B+

FBMA-L11-201209-221LMA30T_0805

R17

2.2K_0402_5%

4.7U_0805_25V6-K

1

C9

2

+LEDVDD

1

@

C10

680P_0402_50V7K

2

+LCDVDD_CONN

DAC_BRIG<13>

USB20_N8<4> USB20_P8<4>

+3VS

(L_BKLT_CTRL) from NB, add R227,R228

R227 0_0402_5%@R227 0_0402_5%@

INVT_PWM<13>

L_BKLT_CTRL<4>

1 2

R228 0_0402_5%R228 0_0402_5%

1 2

INVT_PWM_R

06/04 Change R227 from mount to @ Change R228 from @ to mount

LED PANEL BD. Conn.

JP16

INVT_PWM_R

DISPOFF#

LDDC_CLK LDDC_DATA

USB20_N8 USB20_P8

JP16

15

19

ACES_87242-3001-09

112 334 556 778 9910 111112 131314 15 171718 19 212122 232324 252526 272728 292930

GND31GND

2 4 6 8 10 12 14 16

16

18 20

20

22 24 26 28 30

32

03/24 Change JP16 to right angle conn.

03/26 Add C201,C202,C203(@) close to JP16 (EMI Recommend)

+3VS +5VS_C MOS

1

C201

<EMI>

0.1U_0402_16V4Z

2

1

C202

<EMI>

0.1U_0402_16V4Z

2

04/06 Change JP16.4 from GNDA to GND

+5VS_CMOS

LVDS_A1 <4> LVDS_A1# <4>

LVDS_A0 <4> LVDS_A0# <4>

LVDS_A2 <4> LVDS_A2# <4>

LVDS_ACLK <4> LVDS_ACLK# <4>

CMOS Camera

05/06 Change Camera circuit (Follow KHLBX)

R14 0_0603_5%CMOS@R14 0_0603_5%CMOS@

+5VS

R15 0_0603_5%@R15 0_0603_5%@

+5VALW

CMOS_ON#<13>

R219 100K_0402_5%@R219 100K_0402_5%@

1 2

12 12

C11

@

0.1U_0402_16V4Z

G

2

W=20mils

+CAM_VCCA

S

Q4

@

SI2301BDS_SOT23

D

1 3

+CAM_VCC_R

1U_0603_10V4Z

R221 0_0603_5%@R221 0_0603_5%@

1 2

1

C12

@

2

12

R220

CMOS@

0_0603_5%

+5VS_CMOS

W=20mils W=20mils

04/06 Delete C203 for layout

A A

04/07 Change JP16.3 from INT_MIC_L to GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LVDS Conn./Camera

NTUC0 IO/B LA-5501P Schematic

1

of

5 24Thursday, July 30, 2009

of

5 24Thursday, July 30, 2009

of

5 24Thursday, July 30, 2009

1.0

A

B

C

D

D20

1

D20

@<EMI>

DAN217T146_SC59-3

D19

@<EMI>

DAN217T146_SC59-3

1

D21

@<EMI>

DAN217T146_SC59-3

1

E

03/26 Reserve D19,D20,D21 close to JCRT1 and add C204 (EMI Recommend)

2

3

+3VS

1 1

2 2

3 3

CRT_RED<4>

CRT_GREEN<4>

CRT_BLUE<4>

CRT_HSYNC<4>

12

1 2

C19 0.1U_0402_16V4ZC19 0.1U_0402_16V4Z

Place closed to chipset

CRT_VSYNC<4>

+3VS

12

R23

2.2K_0402_5%

CRT_DDC_DATA<4>

CRT_DDC_CLK<4>

12

R18

R18 150_0402_1%

150_0402_1%

1 2

C20 0.1U_0402_16V4Z

12

R24

2.2K_0402_5%

12

R19

R19 150_0402_1%

150_0402_1%

+CRT_VCC

5

P

A2Y

G

3

@

4

2

Q6A

Q6A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

R20

R20 150_0402_1%

150_0402_1%

1

4

OE#

U1

U1 74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

+CRT_VCC

5

1

P

OE#

A2Y

G

U2

U2 74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

+3VS

12

R25

2.2K_0402_5%

5

3

Q6B

Q6B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

100P_0402_50V8J

CRT_HSYNC_C

CRT_VSYNC_C

4

+CRT_VCC

12

@

C24

1

@

C13

C13 22P_0402_50V8J

22P_0402_50V8J

2

R26

2.2K_0402_5%

1

2

1

@

C14

C14 22P_0402_50V8J

22P_0402_50V8J

2

1 2

R21 39_0402_5%R21 39_0402_5%

1 2

R22 39_0402_5%R22 39_0402_5%

CRT_DDC_DATA_C

CRT_DDC_CLK_C

1

@

C25

C25 100P_0402_50V8J

100P_0402_50V8J

2

1 2

L3 BK1608LL121-T_2PL3 BK1608LL121-T_2P

1 2

L4 BK1608LL121-T_2PL4 BK1608LL121-T_2P

1 2

L5 BK1608LL121-T_2PL5 BK1608LL121-T_2P

1

@

C15

C15 22P_0402_50V8J

22P_0402_50V8J

2

1

@

C16

C16 10P_0402_50V8J

10P_0402_50V8J

2

1

@

C17

C17 10P_0402_50V8J

10P_0402_50V8J

2

1

@

C18

C18 10P_0402_50V8J

10P_0402_50V8J

2

05/13 Move R21,R22, add Net : CRT_HSYNC_R,CRT_VSYNC_R

@

C22

C22 10P_0402_50V8J

10P_0402_50V8J

1 2

JVGA_HS

JVGA_VS

C23

0.1U_0402_16V4Z

JCRT1

6

11

1

16

G

7

17

G

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070912FR015S229ZR

CRT_HSYNC_R

CRT_VSYNC_R

+5VS

W=40mils

2 1

D7 RB491D_SC59-3D7 RB491D_SC59-3

1 2

L6 FCM 1608CF-121T03_2PL6 FCM 1608CF-121T03_2P

1 2

L7 FCM 1608CF-121T03_2PL7 FCM 1608CF-121T03_2P

1

@

C21

10P_0402_50V8J

+CRT_VCC

2

F1

1.1A_6V_SMD1812P110TF

2 1

RED

CRT_DDC_DATA_C GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC_CLK_C

1

2

3

2

3

+5VS +5VS

3

1

2

@

D5

D5 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

CRT Conn.

3

2

C204 0.1U_0402_16V4Z<EM I>C204 0.1U_0402_16V4Z<EMI>

1 2

RED

GREEN

BLUE

JVGA_VSJVGA_HS

1

@

D6

D6 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT Conn.

NTUC0 IO/B LA-5501P Schematic

E

of

6 24Thursday, July 30, 2009

of

6 24Thursday, July 30, 2009

of

6 24Thursday, July 30, 2009

1.0

5

05/11 Add HDMI OE circuit, add Q26,R224,R225,R226 05/13 Change R225 from 16kohm to 0ohm

+3VS

12

R226

4.7K_0402_5%

Change R226 from 3.9kohm to 4.7kohm

HDMI_DETECT

D D

R225 0_0402_5%R225 0_ 0402_5%

R224

7318C@

33K_0402_5%

12

05/15 Change R224 from mount to 7318C@

05/11 Swap TMDS_B_TX0,TMDS_B_TX0#, TMDS_B_TX1,TMDS_B_TX1#, TMDS_B_TX2,TMDS_B_TX2# (For Layout Routing)

C C

TMDS_B_TX2<4> TMDS_B_TX2#<4>

TMDS_B_TX1<4> TMDS_B_TX1#<4>

TMDS_B_TX0<4> TMDS_B_TX0#<4>

TMDS_B_CLK<4> TMDS_B_CLK#<4>

B B

HDMI_DATA<4> HDMI_CLK<4>

A A

HDMI_DATA HDMI_CLK

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

13

D

2

G

Q26

S

SSM3K7002FU_SC70-3

C36 0.1U_0402_10V7KDIS@C36 0.1U_0402_10V7KDIS@

1 2

C37 0.1U_0402_10V7KDIS@C37 0.1U_0402_10V7KDIS@

1 2

C34 0.1U_0402_10V7KDIS@C34 0.1U_0402_10V7KDIS@

1 2

C35 0.1U_0402_10V7KDIS@C35 0.1U_0402_10V7KDIS@

1 2

C32 0.1U_0402_10V7KDIS@C32 0.1U_0402_10V7KDIS@

1 2

C33 0.1U_0402_10V7KDIS@C33 0.1U_0402_10V7KDIS@

1 2

C30 0.1U_0402_10V7KDIS@C30 0.1U_0402_10V7KDIS@

1 2

C31 0.1U_0402_10V7KDIS@C31 0.1U_0402_10V7KDIS@

1 2

L12 MBK1608121YZF_0603DIS@L12 MBK1608121YZF_0603DIS@

1 2 1 2

L13 MBK1608121YZF_0603DIS@L13 MBK1608121YZF_0603DIS@

1 2

R72 499_0402_1%DIS@R 72 499_0402_1%DIS@

1 2

R73 499_0402_1%DIS@R 73 499_0402_1%DIS@

1 2

R76 499_0402_1%DIS@R 76 499_0402_1%DIS@

1 2

R77 499_0402_1%DIS@R 77 499_0402_1%DIS@

1 2

R79 499_0402_1%DIS@R 79 499_0402_1%DIS@

1 2

R80 499_0402_1%DIS@R 80 499_0402_1%DIS@

1 2

R81 499_0402_1%DIS@R 81 499_0402_1%DIS@

1 2

R82 499_0402_1%DIS@R 82 499_0402_1%DIS@

+3VS

12

UMA@

R28

4.7K_0402_5%

12

@

R30

R30 0_0402_5%

0_0402_5%

DIS@

C39

12P_0402_50V8J

+3VS

1

2

TMDS_B_TX0<4> TMDS_B_TX0#<4>

TMDS_B_TX2<4> TMDS_B_TX2#<4>

TMDS_B_TX1<4> TMDS_B_TX1#<4>

TMDS_B_CLK<4> TMDS_B_CLK#<4>

HDMIDAT_R HDMICLK_R

1

DIS@

C40

C40 12P_0402_50V8J

12P_0402_50V8J

2

13

D

S

R31 4.7K_0402_5%7318C@R31 4.7K_0402_5%7318C @ R33 4.7K_0402_5%7318C@R33 4.7K_0402_5%7318C @

HDMI_TX2+ HDMI_TX2-

HDMI_TX1+ HDMI_TX1-

HDMI_TX0+ HDMI_TX0-

HDMI_CLK+ HDMI_CLK-

DIS@

Q7

Q7 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

NEAR CONNECTOR

5

2

G

+3VS

12

@

R27

R27 0_0402_5%

0_0402_5%

12

@

R29

R29 0_0402_5%

0_0402_5%

1 2 1 2

4.7K_0402_5%

+3VS

4

@

R38

3

06/29 Change R35 from 499ohm to 430ohm for 8101T@

06/03 Change R35 from 3.4kohm to

U3

HDMI_OE#

HDMICLK_R

HDMIDAT_R

HDMI_DETECT

1 2

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

34

CFG0

35

CFG1

@

R39

4.7K_0402_5%

1 2

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

PS8101TQFN48G_QFN48_7X7

8101T@

05/21 Change U3 footprint from PS8101TQFN48G_QFN48_7X7 to CH7318A-BF-TR_QFN48_7X7 06/01 Change U3 from UMA@ to 8101T

+5VS

21

D8

D8 RB491D_SC59-3

RB491D_SC59-3

1

C38

0.1U_0402_16V4Z

R70

2.2K_0402_5%

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

3

HP_DET

+5VS_HDMI

HDMIDAT_R HDMICLK_R

@

R68

R68 0_0805_5%

0_0805_5%

R69

2.2K_0402_5%

1 2

2

VCC

11

VCC

15

VCC

21

VCC

26

VCC

33

VCC

40

VCC

46

VCC

4

PC1

3

PC0

6

REXT

7

HPD#

8

SDA

9

SCL

10

RT_EN#

13

OUT_D4+

14

OUT_D4-

16

OUT_D3+

17

OUT_D3-

19

OUT_D2+

20

OUT_D2-

22

OUT_D1+

23

OUT_D1-

1

GND

5

GND

12

GND

18

GND

24

GND

27

GND

31

GND

36

GND

37

GND

43

GND

49

PAD

U3

ASM1442T

1442T@

06/01 Add U3 (SA00003BB00) for 1442T@ 06/01 Add U3 (SA00001U920) for 7318C@

05/04 Change JP3 footprint from FOX_QJ5119L-NT01-7F_19P to LOTES_ABA-HDM-029-P01_19P

JP3

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

LOTES_ABA-HDM-029-P01

2009/03/20 2010/03/20

3.3kohm for 1442T@ 05/12 Add R230,R231,R35 Change R32 from UMA@ to 7318C@

+3VS

Change R34 from @ to 8101T@

1

UMA@

C26

0.1U_0402_16V4Z

2

R32 4.7K_0402_5%7318C@R32 4.7K_0402_ 5%7318C@ R34 4.7K_0402_5%8101T@R34 4.7K_0402_5%8101T@

R230 4.7K_0402_5%@R230 4.7K_0402_5%@ R231 4.7K_0402_5%@R231 4.7K_0402_5%@

internal pull down

R35 430_0402_1%81 01T@R35 430_0402_1 %8101T@

HDMI_HPD#

HDMI_TX0+ HDMI_TX0-

HDMI_TX2+ HDMI_TX2-

HDMI_TX1+ HDMI_TX1-

HDMI_CLK+ HDMI_CLK-

1 2 1 2

1 2

1

UMA@

C27

0.1U_0402_16V4Z

2

HDMI_HPD# <4>

R232 4.7K_0402_5%@R232 4.7K_0402_5%@

1 2

12

R233

@

4.7K_0402_5%

05/11 Swap HDMI_TX0+,HDMI_TX0,HDMI_TX1+,HDMI_TX1-, HDMI_TX2+,HDMI_TX2(For Layout Routing)

U3

CH7318C

7318C@

20

GND

21

GND

22

GND

23

GND

Compal Secret Data

Deciphered Date

2

1

UMA@

C28

0.1U_0402_16V4Z

2

+3VS

HDMI_HPD#<4>

2

1

R35

1.2K_0402_1%

7318C@

HDMI_DATA <4>

HDMI_CLK <4>

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

HDMI_HPD#

+3VS

12

UMA@

R36

2.2K_0402_5%

R35

3.3K_0402_1%

1442T@

1

UMA@

C29

C29 10U_0805_10V4Z

10U_0805_10V4Z

2

12

UMA@

R37

2.2K_0402_5%

HDMI_DATA

HDMI_CLK

05/12 Add R232,R233

+3VS

05/15 Move R232,R233

HDMI_TX2+ HDMI_TX2HDMI_TX1+ HDMI_TX1HDMI_TX0+ HDMI_TX0HDMI_CLK+ HDMI_CLK-

R55 0_0402_5%1442 T@R55 0_0402_5%1442T@ R57 0_0402_5%1442 T@R57 0_0402_5%1442T@ R51 0_0402_5%1442 T@R51 0_0402_5%1442T@ R53 0_0402_5%1442 T@R53 0_0402_5%1442T@ R47 0_0402_5%1442 T@R47 0_0402_5%1442T@ R49 0_0402_5%1442 T@R49 0_0402_5%1442T@ R43 0_0402_5%1442 T@R43 0_0402_5%1442T@ R45 0_0402_5%1442 T@R45 0_0402_5%1442T@

06/25 Mirror L8,L9,L10,L11

HDMI_TX2+

HDMI_TX2-

HDMI_TX1+

HDMI_TX1-

HDMI_TX0+

HDMI_TX0-

HDMI_CLK+

HDMI_CLK-

L8

WCM-2012-900T_4P

7318C@

WCM-2012-900T_4P

1

4

L11

8101T@L11

8101T@

WCM-2012-900T_4P

1

4

L10

8101T@L10

8101T@

WCM-2012-900T_4P

1

4

L9

8101T@L9

8101T@

WCM-2012-900T_4P

1

4

L8

8101T@L8

8101T@

L9

WCM-2012-900T_4P

7318C@

2

3

2

3

2

3

2

3

L10

WCM-2012-900T_4P

7318C@

06/03 Change L8,L9,L10,L11 for 8101T@ and 7318C@ 06/03 Change R43,R45,R47,R49,R51,R53,R55,R57 from @ to 1442T@

HDMI_DETECT

R74

DIS@

1 2

10K_0402_1%

12

DIS@

R78

R78 100K_0402_1%

100K_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet

1 2

R71 0_0402_5%UMA@R71 0_0402_5%UMA@

1 2

FBMA-L10-160808-121LMT_2P

Compal Electronics, Inc.

HDMI Level Shiftter_PS8101T

NTUC0 IO/B LA-5501P Schematic

+5VS

3

1

L14

DIS@

1

+3VS

12

R209

7318C@

20K_0402_1%

12

R210

7318C@

7.5K_0402_1%

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

L11

WCM-2012-900T_4P

7318C@

2

@

D9

D9 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

HP_DET

DIS@

C41

C41 330P_0402_50V7K

330P_0402_50V7K

of

7 24Thursday, July 30, 2009

of

7 24Thursday, July 30, 2009

of

7 24Thursday, July 30, 2009

1.0

A

B

C

D

E

1 1

04/02 Swap Net : WLAN_ACTIVE and BT_ACTIVE (Follow JHXXX)

PCIE_WAKE#<4,11>

WLAN_ACTIVE<9> BT_ACTIVE<9>

WLAN_CLKREQ#<4>

EC_TX_P80_DATA<13>

04/02 Change EC_TX_P80_DATA from JWLAN.49 to JWLAN.17

04/09 Swap PCIE TX and RX

2 2

EC_RX_P80_CLK< 13>

04/02 Change R90,R91 from 100ohm(@) to 0ohm

Mini-Express Card (Slot 1-WLAN) 4mm High

JWLAN1

PCIE_WAKE# WLAN_ACTIVE BT_ACTIVE WLAN_CLKREQ#

CLK_PCIE_WLAN#<4> CLK_PCIE_WLAN<4>

R90 0_0402_5%R90 0_0402_5%

PCIE_IRX_DTX_N2<4> PCIE_IRX_DTX_P2<4>

PCIE_ITX_DRX_N2_C<4> PCIE_ITX_DRX_P2_C<4>

R91 0_0402_5%R91 0_0402_5%

R83 0_0402_5%@R83 0_0402_5%@

1 2

R84 0_0402_5%@R84 0_0402_5%@

1 2

+3VS

1 2

JWLAN1

1

3

5

7

9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

FOX_AS0B226-S40N-7F

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+3VS

+1.5VS

R85 0_0402_5%R85 0_0402_5%

1 2

R86 0_0402_5%R86 0_0402_5%

1 2

R87 0_0402_5%@R87 0_0402_5%@

1 2

+3VS +3VALW

06/23 Delete USB20_N5,USB20_P5

WLAN_LED_MO#

R211

12

10K_0402_5%

04/03 Add R211 for WLAN LED

+3VS

XMIT_OFF# <13> PLT_RST# <4,11,13>

WLAN_LED_MO# <15>

+3VS

1

C42

4.7U_0805_10V4Z

2

+1.5VS

1

C44

4.7U_0805_10V4Z

2

1

C43

0.1U_0402_16V4Z

2

1

C45

0.1U_0402_16V4Z

2

Mini-Express Card (Slot 2-WWAN) 4mm High

JWLAN2

PCIE_WAKE#<4,11>

WWAN_CLK REQ#<4>

CLK_PCIE_WW AN#<4> CLK_PCIE_WW AN<4>

3 3

04/09 Swap PCIE TX and RX

06/23 Delete PCIE_IRX_DTX_N4,PCIE_IRX_DTX_P4

+3VS

PCIE_ITX_DRX_N4_C,PCIE_ITX_DRX_P4_C

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0B226-S40N-7F

GND2

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

+3VS

+1.5VS

+UIM_PWR

UIM_DATA UIM_CLK UIM_RST UIM_VPP

R92 0_0402_5%R92 0_0402_5%

1 2

R93 0_0402_5%R93 0_0402_5%

1 2

R95 0_0402_5%@R95 0_0402_5%@

1 2

WWAN_LED _MO#

R229 100K_0402_5%R229 100K_0402_5%

1 2

R237 100K_0402_5%@R237 100K_040 2_5%@

1 2

USB20_N4 <4> USB20_P4 <4>

WWAN_LED _MO# <13,15>

+3VS +3VALW

+5VS

+3VS

05/11 Add R229 for WWAN_LED_MO# 05/13 Add R237 for WWAN_LED_MO#

WXMIT_OFF# <13>

PLT_RST# <4,11,13>

WWAN Card Conn.

JP4

4

UIM_VPP UIM_DATA

10K_0402_5%

+UIM_PWR

Reserve for SIM card does not meet rise time and pull-up is needed.

GND

5

VPP

6

I/O

7

DET

12

@

R94

TAITW_PMPAT6-06GLBS7N14N 0 ME@

VCC RST

CLK

GND GND

1 2 3

8 9

+UIM_PWR

UIM_RST UIM_CLK

1

C46

C46 1U_0603_10V4Z

1U_0603_10V4Z

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Mini Card (WLAN/WWAN)

NTUC0 IO/B LA-5501P Schematic

E

of

8 24Thursday, July 30, 2009

of

8 24Thursday, July 30, 2009

of

8 24Thursday, July 30, 2009

1.0