COMPAL LA-5501P Schematics

A

ZZZ5

ZZZ2

ZZZ1

DAZ

1 1

07/21 Add DAZ P/N and other small board PCB P/N

ZZZ2

DC-IN Cable

45@

ZZZ3

LA-5501P

DA@

ZZZ4

LS-5501P

DA@

04/13 Add DC-IN Cable DC301008200 (45@)

ZZZ5

LS-5502P

DA@

B

ZZZ6

LS-5503P

DA@

ZZZ7

LS-5504P

DA@

C

D

E

Compal Confidential

2 2

NTUC0 LA-5501P Schematics Document

Intel Penryn uFCBGA with Intel Cantiga GS40+ICH9M SFF

SFF ULV I/O Board

3 3

2009-07-30

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

NTUC0 IO/B LA-5501P Schematic

1 24Thursday, July 30, 2009

E

1.0

A

B

C

D

E

Compal Confidential

File Name : NTUC0_LA-5501P

1 1

LVDS

Amplifier & Speaker

LCD Conn.

Single Channel

HDA

Audio Codec Realtek ALC272

TMDS

HDMI Conn.

Headphone & MIC Jack

Golden Finger

RGB

HDI to I/O board

CRT Conn.

2 2

PCI-Express x1

Ethernet 10/100/1000 LAN

WLAN Card

AR8131

LPC

3 3

Transformer

WWAN Card

ENE KBC KB926

RJ45 Conn.

USB * 8 ports

SATA

SATA HDD

ESATA Conn.

USB Port X3

MINI Card x2

BlueTooth

CMOS Camera

Card Reader RTS5159

SD/MMC/MS/XD Conn.

INT KB

SPI ROM

Touch Pad

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

NTUC0 IO/B LA-5501P Schematic

E

of

2 24Thursday, July 30, 2009

of

2 24Thursday, July 30, 2009

of

2 24Thursday, July 30, 2009

1.0

A

Symbol Note :

: means Digital Ground

@ : means just reserve , no build CONN@ : means ME part. 45@ : means install after SMT.

: means Analog Ground

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

CLOCK GENERATOR (EXT.)

SMBUS Control Table

1 1

SMB_EC_CK1 SMB_EC_DA1

SMB_EC_CK2 SMB_EC_DA2

SMB_CK_CLK1 SMB_CK_DAT1 ICH9

LCD_CLK LCD_DAT

SOURCE

KB926

Cantiga

HEX ADDRESS

A0

D2

INVERTER BATT EEPROM

X X

X

X X

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4DDR SO-DIMM 1

1 1 0 1 0 0 1 0

SERIAL

V V

X X

X

X X

THERMAL

ENSOR

S (CPU)

X X

V

X

SODIMM CLK CHIP

MINI CARD

X

V V V

X X

LCD

X X X

X

V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

NTUC0 IO/B LA-5501P Schematic

of

3 24Tuesday, July 21, 2009

of

3 24Tuesday, July 21, 2009

of

3 24Tuesday, July 21, 2009

1.0

5

4

3

2

1

B+

1

C1

0.1U_0603_50V4Z

2

D D

05/11 Co-lay backlight control signal (L_BKLT_CTRL) from NB

06/23 Delete PCIE_IRX_DTX_N4,PCIE_IRX_DTX_P4 PCIE_ITX_DRX_N4_C,PCIE_ITX_DRX_P4_C

C C

B B

04/02 Change JP1.23 from PH to MAINPWON

+RTCBATT

WWAN

WLAN

LAN

MAINPWON<22>

EC_SMB_DA2<13>

EC_SMB_CK2<13>

EC_SMI#<13>

L_BKLT_CTRL<5>

PCIE_ITX_DRX_P2_C<8> PCIE_ITX_DRX_N2_C<8>

PCIE_IRX_DTX_P2<8> PCIE_IRX_DTX_N2<8>

PCIE_ITX_DRX_N6_C<11> PCIE_ITX_DRX_P6_C<11>

PCIE_IRX_DTX_N6<11> PCIE_IRX_DTX_P6<11>

SLP_S4#<13>

EC_RSMRST#<13> EC_LID_OUT#<13>

ICH_POK<13>

SUSP#<13,17,21>

AC_IN<13,19> USB_OC#2<16> USB_OC#1<16> USB_OC#0<16>

PBTN_OUT#<13>

SLP_S5#<13> SLP_S3#<13> EC_SCI#<13> PLT_RST#<8,11,13>

SYSON< 13>

LPC_AD0<13> LPC_AD1<13> LPC_AD2<13> LPC_AD3<13>

LPC_FRAME#<13>

SERIRQ<13> KB_RST#<13> GATEA20<13>

WWAN_CLK REQ#<8>

HDMI_HPD#<7> CLK_PCI_LPC<13>

HDMI_DATA<7> HDMI_CLK<7>

TMDS_B_TX2<7> TMDS_B_TX2#<7>

TMDS_B_TX1<7> TMDS_B_TX1#<7>

TMDS_B_TX0<7> TMDS_B_TX0#<7>

TMDS_B_CLK<7> TMDS_B_CLK#<7>

WLAN_CLKREQ#<8>

PCIE_WAKE#<8,11> PCI_PME#<13> CLK_48M_CR<15>

LAN_CLKREQ#<11> CLK_PCIE_WW AN#<8> CLK_PCIE_WW AN<8>

CLK_PCIE_WLAN#<8> CLK_PCIE_WLAN<8>

CLK_PCIE_LAN#<11> CLK_PCIE_LAN<11>

PADT3PAD

T3

PADT4PAD

T4

1 2

R190 0_0402_5%R190 0_0402_5%

JP1

1

B+

3

B+

5

B+

7

B+

9

B+

11

B+

13

B+

15

RESERVED

17

GND

19

GND

21

GND

23

B+_BIAS

25

+RTCVCC

27

ICH_RTCRST#

29

GPIO1

31

EC_SMB_DA2

33

EC_SMB_CK2

35

GPIO6

37

GPIO48

39

EC_SMI#

41

NC

43

PCIE_ITX_EXPRX_P2

45

PCIE_ITX_EXPRX_N2

47

GND

49

PCIE_IRX_EXPTX_P2

51

PCIE_IRX_EXPTX_N2

53

GND

55

PCIE_ITX_WLANRX_P1

57

PCIE_ITX_WLANRX_N1

59

GND

61

PCIE_IRX_WLANTX_P1

63

PCIE_IRX_WLANTX_N1

65

GND

67

PCIE_ITX_LANRX_N0

69

PCIE_ITX_LANRX_P0

71

GND

73

PCIE_IRX_LANTX_N0

75

PCIE_IRX_LANTX_P0

77

GND

79

PM_SLP_S4#

81

VGATE

83

EC_RSMRST#

85

GPIO24

87

EC_LID_OUT#

89

PWRGD

91

EC_SWI#

93

SUSP#

95

AC_IN

97

EC_USB_OC3#

99

EC_USB_OC2#

101

EC_USB_OC1#

103

PWRBTN#

105

PM_SLP_S5#

107

PM_SLP_S3#

109

EC_SCI#

111

PLT_RST#

113

SYSON

115

LPC_AD0

117

LPC_AD1

119

LPC_AD2

121

LPC_AD3

123

LPC_FRAME#

125

SIRQ

127

EC_KBRST#

129

EC_GA20

131

EXP_REQ#

133

RESERVED

135

HDMI_HP

137

LPC_CLK0

139

GND

141

HDMI_SDA

143

HDMI_SCL

145

GND

147

TX2D+

149

TX2D-

151

GND

153

TX1D+

155

TX1D-

157

GND

159

TX0D+

161

TX0D-

163

GND

165

TXCD+

167

TXCD-

169

GND

171

WLAN_REQ#

173

WLAN_SMDATA

175

WLAN_SMCLK

177

PCIE_WAKE#

179

PCIE_PME

181

CLK_48M_CR

183

LAN_REQ#

185

CLK_PCIE_EXP

187

CLK_PCIE_EXP#

189

GND

191

CLK_PCIE_MINI

193

CLK_PCIE_MINI#

195

HDI_B_DET/GND

197

CLK_PCIE_LAN#

199

CLK_PCIE_LAN

+5VS

+5VALW

+3VALW

+3VS +3VS +3VS

VR_ON

HDI_B_DET/GND

GND GND GND

PC Beep

HDA_RST

HDA_SDOUT

HDA_SYNC

HDA_BIT_CLK

HDA_SDIN0 HDA_SDIN1

SATA_ACT# PSATA_ITX_DRX_P0 PSATA_ITX_DRX_N0

PSATA_ITX_DRX_P1 PSATA_ITX_DRX_N1

PSATA_ITX_DRX_P2 PSATA_ITX_DRX_N2

PSATA_IRX_DTX_P2_C PSATA_IRX_DTX_N2_C

PSATA_IRX_DTX_P0_C PSATA_IRX_DTX_N0_C

PSATA_IRX_DTX_P1_C PSATA_IRX_DTX_N1_C

GND

EC_THERM#

GPIO42

GND

1.5VS

1.5VS GND

GND

USB20_P7 USB20_N7

GND

USB20_P5 USB20_N5

GND

USB20_P4 USB20_N4

GND

USB20_P3 USB20_N3

GND

GPIO44

GND

USB20_P8 USB20_N8

GND

USB20_P6 USB20_N6

GND

USB20_P1 USB20_N1

GND

USB20_P2 USB20_N2

GND

USB20_P0 USB20_N0

GND

PANEL_BKEN_MCH

ENVDD

LDDC_DATA_MCH

LDDC_CLK_MCH

CRT_VSYNC CRT_HSYNC

GND

G_DAT_DDC2

G_CLK_DDC2

GND

CRT_RED

GND

CRT_GRN

GND

CRT_BLU

GND

LCD_A2+_MCH

LCD_A2-_MCH

GND

LCD_A1+_MCH

LCD_A1-_MCH

GND

LCD_A0+_MCH

LCD_A0-_MCH

GND

LCD_ACLK+_MCH

LCD_ACLK-_MCH

2 4 6

+VL

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

R184 0_0402_5%R184 0_0402_5%

ICH_HDA_RST# ICH_HDA_SDOUT ICH_HDA_SYNC ICH_HDA_BIT_CLK

06/23 Delete USB20_N5,USB20_P5

1 2

+5VS +5VALW VL

04/23 Add VL (PWR Recommend)

+3VALW +3VS

VR_ON <13>

HDI_B_DET <13>

SB_SPKR <10>

HDA_SDIN0 <10>

HDD_LED# <15> SATA_ITX_DRX_P0_C <9> SATA_ITX_DRX_N0_C <9>

EC_THERM# <13>

+1.5VS

SATA_ITX_DRX_P2_C <16> SATA_ITX_DRX_N2_C <16>

SATA_IRX_DTX_P2_C <16> SATA_IRX_DTX_N2_C <16>

SATA_IRX_DTX_P0_C <9> SATA_IRX_DTX_N0_C <9>

USB20_P4 <8> USB20_N4 <8>

USB20_P3 <9> USB20_N3 <9>

USB20_P8 <5> USB20_N8 <5>

USB20_P6 <15> USB20_N6 <15>

USB20_P1 <16> USB20_N1 <16>

USB20_P2 <16> USB20_N2 <16>

USB20_P0 <15> USB20_N0 <15>

H_ENBKL <5> ENVDD <5>

LDDC_DATA <5>

LDDC_CLK <5> CRT_VSYNC <6> CRT_HSYNC <6>

CRT_DDC_DATA <6 >

CRT_DDC_CLK <6>

CRT_RED <6>

CRT_GREEN <6>

CRT_BLUE <6>

LVDS_A1 <5> LVDS_A1# <5>

LVDS_A0 <5> LVDS_A0# <5>

LVDS_A2 <5> LVDS_A2# <5>

LVDS_ACLK <5> LVDS_ACLK# <5>

ICH_HDA_RST#

ICH_HDA_SDOUT

ICH_HDA_SYNC

ICH_HDA_BIT_CLK

1 2

R2 33_0402_5%R2 33_0402_5%

1 2

R3 33_0402_5%R3 33_0402_5%

1 2

R4 33_0402_5%R4 33_0402_5%

1 2

R5 33_0402_5%R5 33_0402_5%

HDA_RST# <10>

HDA_SDOUT <10>

HDA_SYNC <10>

HDA_BIT_CLK <10>

A A

FPC_O0P45X2P35

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HDI to I/O Golden Finger

NTUC0 IO/B LA-5501P Schematic

1

of

4 24Thursday, July 30, 2009

of

4 24Thursday, July 30, 2009

of

4 24Thursday, July 30, 2009

1.0

5

4

3

2

1

LCD POWER CIRCUIT

2

Q2

G

+3VS+LCDVDD_CONN

D

1 3

W=60mils

S

W=60mils

1

C2

4.7U_0805_10V4Z

2

SI2301BDS-T1-E3_SOT23-3

05/13 Change bead (L1) to 0ohm (R234) 05/14 Delete R234

06/04 Change R235 from @ to mount Change D1 from mount to @

+LCDVDD_CONN

1

C7

@

4.7U_0805_10V4Z

2

1

C8

0.1U_0402_16V4Z

2

H_ENBKL<4>

05/13 Change C7 from mount to @

+3VS

12

R7

05/13 Reserve R235

R235 0_0402_5%R235 0_0402_5%

1 2

BKOFF#<13>

D1 CH751H-40PT_SOD323-2@D1 CH751H-40PT_SOD323-2@

R202 0_0402_5%R202 0_0402_5%

21

1 2

R7

4.7K_0402_5%

DISPOFF#

ENBKL

12

R12

R12 100K_0402_5%

100K_0402_5%

change from 10K to 100K 5/8 by checklist

ENBKL <13>

470P_0402_50V7K

1

2

INVT_PWM

DAC_BRIG

DISPOFF#

470P_0402_50V7K

1

C4

C3

C5

@

2

For EMI

03/31 Change R12 from @ to mount

+5VALW

12

R9

R8

Q1

R8 150_0603_1%

150_0603_1%

13

D

S

12

R13

R13 100K_0402_5%

100K_0402_5%

2

G

D D

05/12 Change Q1 from SB000008J00 to SB000009610

SSM3K7002FU_SC70-3

ENVDD<4>

R9 100K_0402_5%

100K_0402_5%

R10

1 2

220K_0402_5%

13

D

2

G

S

220K_0402_5%

Q3

Q3 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1

C6

0.1U_0402_16V4Z

2

05/12 Change Q3 from SBX01240010 to SB000009610

04/13 Change R13 from @ to mount

C C

06/23 Change L2 from SM010032020 to SM010014520

L2

1 2

+3VS

R16

2.2K_0402_5%

LDDC_CLK<4> LDDC_DATA<4>

B B

05/11 Co-lay backlight control signal

B+

FBMA-L11-201209-221LMA30T_0805

R17

2.2K_0402_5%

4.7U_0805_25V6-K

1

C9

2

+LEDVDD

1

@

C10

680P_0402_50V7K

2

+LCDVDD_CONN

DAC_BRIG<13>

USB20_N8<4> USB20_P8<4>

+3VS

(L_BKLT_CTRL) from NB, add R227,R228

R227 0_0402_5%@R227 0_0402_5%@

INVT_PWM<13>

L_BKLT_CTRL<4>

1 2

R228 0_0402_5%R228 0_0402_5%

1 2

INVT_PWM_R

06/04 Change R227 from mount to @ Change R228 from @ to mount

LED PANEL BD. Conn.

JP16

INVT_PWM_R

DISPOFF#

LDDC_CLK LDDC_DATA

USB20_N8 USB20_P8

JP16

15

19

ACES_87242-3001-09

112 334 556 778 9910 111112 131314 15 171718 19 212122 232324 252526 272728 292930

GND31GND

2 4 6 8 10 12 14 16

16

18 20

20

22 24 26 28 30

32

03/24 Change JP16 to right angle conn.

03/26 Add C201,C202,C203(@) close to JP16 (EMI Recommend)

+3VS +5VS_C MOS

1

C201

<EMI>

0.1U_0402_16V4Z

2

1

C202

<EMI>

0.1U_0402_16V4Z

2

04/06 Change JP16.4 from GNDA to GND

+5VS_CMOS

LVDS_A1 <4> LVDS_A1# <4>

LVDS_A0 <4> LVDS_A0# <4>

LVDS_A2 <4> LVDS_A2# <4>

LVDS_ACLK <4> LVDS_ACLK# <4>

CMOS Camera

05/06 Change Camera circuit (Follow KHLBX)

R14 0_0603_5%CMOS@R14 0_0603_5%CMOS@

+5VS

R15 0_0603_5%@R15 0_0603_5%@

+5VALW

CMOS_ON#<13>

R219 100K_0402_5%@R219 100K_0402_5%@

1 2

12 12

C11

@

0.1U_0402_16V4Z

G

2

W=20mils

+CAM_VCCA

S

Q4

@

SI2301BDS_SOT23

D

1 3

+CAM_VCC_R

1U_0603_10V4Z

R221 0_0603_5%@R221 0_0603_5%@

1 2

1

C12

@

2

12

R220

CMOS@

0_0603_5%

+5VS_CMOS

W=20mils W=20mils

04/06 Delete C203 for layout

A A

04/07 Change JP16.3 from INT_MIC_L to GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LVDS Conn./Camera

NTUC0 IO/B LA-5501P Schematic

1

of

5 24Thursday, July 30, 2009

of

5 24Thursday, July 30, 2009

of

5 24Thursday, July 30, 2009

1.0

A

B

C

D

D20

1

D20

@<EMI>

DAN217T146_SC59-3

D19

@<EMI>

DAN217T146_SC59-3

1

D21

@<EMI>

DAN217T146_SC59-3

1

E

03/26 Reserve D19,D20,D21 close to JCRT1 and add C204 (EMI Recommend)

2

3

+3VS

1 1

2 2

3 3

CRT_RED<4>

CRT_GREEN<4>

CRT_BLUE<4>

CRT_HSYNC<4>

12

1 2

C19 0.1U_0402_16V4ZC19 0.1U_0402_16V4Z

Place closed to chipset

CRT_VSYNC<4>

+3VS

12

R23

2.2K_0402_5%

CRT_DDC_DATA<4>

CRT_DDC_CLK<4>

12

R18

R18 150_0402_1%

150_0402_1%

1 2

C20 0.1U_0402_16V4Z

12

R24

2.2K_0402_5%

12

R19

R19 150_0402_1%

150_0402_1%

+CRT_VCC

5

P

A2Y

G

3

@

4

2

Q6A

Q6A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

R20

R20 150_0402_1%

150_0402_1%

1

4

OE#

U1

U1 74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

+CRT_VCC

5

1

P

OE#

A2Y

G

U2

U2 74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

+3VS

12

R25

2.2K_0402_5%

5

3

Q6B

Q6B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

100P_0402_50V8J

CRT_HSYNC_C

CRT_VSYNC_C

4

+CRT_VCC

12

@

C24

1

@

C13

C13 22P_0402_50V8J

22P_0402_50V8J

2

R26

2.2K_0402_5%

1

2

1

@

C14

C14 22P_0402_50V8J

22P_0402_50V8J

2

1 2

R21 39_0402_5%R21 39_0402_5%

1 2

R22 39_0402_5%R22 39_0402_5%

CRT_DDC_DATA_C

CRT_DDC_CLK_C

1

@

C25

C25 100P_0402_50V8J

100P_0402_50V8J

2

1 2

L3 BK1608LL121-T_2PL3 BK1608LL121-T_2P

1 2

L4 BK1608LL121-T_2PL4 BK1608LL121-T_2P

1 2

L5 BK1608LL121-T_2PL5 BK1608LL121-T_2P

1

@

C15

C15 22P_0402_50V8J

22P_0402_50V8J

2

1

@

C16

C16 10P_0402_50V8J

10P_0402_50V8J

2

1

@

C17

C17 10P_0402_50V8J

10P_0402_50V8J

2

1

@

C18

C18 10P_0402_50V8J

10P_0402_50V8J

2

05/13 Move R21,R22, add Net : CRT_HSYNC_R,CRT_VSYNC_R

@

C22

C22 10P_0402_50V8J

10P_0402_50V8J

1 2

JVGA_HS

JVGA_VS

C23

0.1U_0402_16V4Z

JCRT1

6

11

1

16

G

7

17

G

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070912FR015S229ZR

CRT_HSYNC_R

CRT_VSYNC_R

+5VS

W=40mils

2 1

D7 RB491D_SC59-3D7 RB491D_SC59-3

1 2

L6 FCM 1608CF-121T03_2PL6 FCM 1608CF-121T03_2P

1 2

L7 FCM 1608CF-121T03_2PL7 FCM 1608CF-121T03_2P

1

@

C21

10P_0402_50V8J

+CRT_VCC

2

F1

1.1A_6V_SMD1812P110TF

2 1

RED

CRT_DDC_DATA_C GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC_CLK_C

1

2

3

2

3

+5VS +5VS

3

1

2

@

D5

D5 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

CRT Conn.

3

2

C204 0.1U_0402_16V4ZC204 0.1U_0402_16V4Z<EMI>

1 2

RED

GREEN

BLUE

JVGA_VSJVGA_HS

1

@

D6

D6 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT Conn.

NTUC0 IO/B LA-5501P Schematic

E

of

6 24Thursday, July 30, 2009

of

6 24Thursday, July 30, 2009

of

6 24Thursday, July 30, 2009

1.0

5

05/11 Add HDMI OE circuit, add Q26,R224,R225,R226 05/13 Change R225 from 16kohm to 0ohm

+3VS

12

R226

4.7K_0402_5%

Change R226 from 3.9kohm to 4.7kohm

HDMI_DETECT

D D

R225 0_0402_5%R225 0_ 0402_5%

R224

7318C@

33K_0402_5%

12

05/15 Change R224 from mount to 7318C@

05/11 Swap TMDS_B_TX0,TMDS_B_TX0#, TMDS_B_TX1,TMDS_B_TX1#, TMDS_B_TX2,TMDS_B_TX2# (For Layout Routing)

C C

TMDS_B_TX2<4> TMDS_B_TX2#<4>

TMDS_B_TX1<4> TMDS_B_TX1#<4>

TMDS_B_TX0<4> TMDS_B_TX0#<4>

TMDS_B_CLK<4> TMDS_B_CLK#<4>

B B

HDMI_DATA<4> HDMI_CLK<4>

A A

HDMI_DATA HDMI_CLK

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

13

D

2

G

Q26

S

SSM3K7002FU_SC70-3

C36 0.1U_0402_10V7KDIS@C36 0.1U_0402_10V7KDIS@

1 2

C37 0.1U_0402_10V7KDIS@C37 0.1U_0402_10V7KDIS@

1 2

C34 0.1U_0402_10V7KDIS@C34 0.1U_0402_10V7KDIS@

1 2

C35 0.1U_0402_10V7KDIS@C35 0.1U_0402_10V7KDIS@

1 2

C32 0.1U_0402_10V7KDIS@C32 0.1U_0402_10V7KDIS@

1 2

C33 0.1U_0402_10V7KDIS@C33 0.1U_0402_10V7KDIS@

1 2

C30 0.1U_0402_10V7KDIS@C30 0.1U_0402_10V7KDIS@

1 2

C31 0.1U_0402_10V7KDIS@C31 0.1U_0402_10V7KDIS@

1 2

L12 MBK1608121YZF_0603DIS@L12 MBK1608121YZF_0603DIS@

1 2 1 2

L13 MBK1608121YZF_0603DIS@L13 MBK1608121YZF_0603DIS@

1 2

R72 499_0402_1%DIS@R 72 499_0402_1%DIS@

1 2

R73 499_0402_1%DIS@R 73 499_0402_1%DIS@

1 2

R76 499_0402_1%DIS@R 76 499_0402_1%DIS@

1 2

R77 499_0402_1%DIS@R 77 499_0402_1%DIS@

1 2

R79 499_0402_1%DIS@R 79 499_0402_1%DIS@

1 2

R80 499_0402_1%DIS@R 80 499_0402_1%DIS@

1 2

R81 499_0402_1%DIS@R 81 499_0402_1%DIS@

1 2

R82 499_0402_1%DIS@R 82 499_0402_1%DIS@

+3VS

12

UMA@

R28

4.7K_0402_5%

12

@

R30

R30 0_0402_5%

0_0402_5%

DIS@

C39

12P_0402_50V8J

+3VS

1

2

TMDS_B_TX0<4> TMDS_B_TX0#<4>

TMDS_B_TX2<4> TMDS_B_TX2#<4>

TMDS_B_TX1<4> TMDS_B_TX1#<4>

TMDS_B_CLK<4> TMDS_B_CLK#<4>

HDMIDAT_R HDMICLK_R

1

DIS@

C40

C40 12P_0402_50V8J

12P_0402_50V8J

2

13

D

S

R31 4.7K_0402_5%7318C@R31 4.7K_0402_5%7318C @ R33 4.7K_0402_5%7318C@R33 4.7K_0402_5%7318C @

HDMI_TX2+ HDMI_TX2-

HDMI_TX1+ HDMI_TX1-

HDMI_TX0+ HDMI_TX0-

HDMI_CLK+ HDMI_CLK-

DIS@

Q7

Q7 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

NEAR CONNECTOR

5

2

G

+3VS

12

@

R27

R27 0_0402_5%

0_0402_5%

12

@

R29

R29 0_0402_5%

0_0402_5%

1 2 1 2

4.7K_0402_5%

+3VS

4

@

R38

3

06/29 Change R35 from 499ohm to 430ohm for 8101T@

06/03 Change R35 from 3.4kohm to

U3

HDMI_OE#

HDMICLK_R

HDMIDAT_R

HDMI_DETECT

1 2

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

34

CFG0

35

CFG1

@

R39

4.7K_0402_5%

1 2

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

PS8101TQFN48G_QFN48_7X7

8101T@

05/21 Change U3 footprint from PS8101TQFN48G_QFN48_7X7 to CH7318A-BF-TR_QFN48_7X7 06/01 Change U3 from UMA@ to 8101T

+5VS

21

D8

D8 RB491D_SC59-3

RB491D_SC59-3

1

C38

0.1U_0402_16V4Z

R70

2.2K_0402_5%

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

3

HP_DET

+5VS_HDMI

HDMIDAT_R HDMICLK_R

@

R68

R68 0_0805_5%

0_0805_5%

R69

2.2K_0402_5%

1 2

2

VCC

11

VCC

15

VCC

21

VCC

26

VCC

33

VCC

40

VCC

46

VCC

4

PC1

3

PC0

6

REXT

7

HPD#

8

SDA

9

SCL

10

RT_EN#

13

OUT_D4+

14

OUT_D4-

16

OUT_D3+

17

OUT_D3-

19

OUT_D2+

20

OUT_D2-

22

OUT_D1+

23

OUT_D1-

1

GND

5

GND

12

GND

18

GND

24

GND

27

GND

31

GND

36

GND

37

GND

43

GND

49

PAD

U3

ASM1442T

1442T@

06/01 Add U3 (SA00003BB00) for 1442T@ 06/01 Add U3 (SA00001U920) for 7318C@

05/04 Change JP3 footprint from FOX_QJ5119L-NT01-7F_19P to LOTES_ABA-HDM-029-P01_19P

JP3

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

LOTES_ABA-HDM-029-P01

2009/03/20 2010/03/20

3.3kohm for 1442T@ 05/12 Add R230,R231,R35 Change R32 from UMA@ to 7318C@

+3VS

Change R34 from @ to 8101T@

1

UMA@

C26

0.1U_0402_16V4Z

2

R32 4.7K_0402_5%7318C@R32 4.7K_0402_ 5%7318C@ R34 4.7K_0402_5%8101T@R34 4.7K_0402_5%8101T@

R230 4.7K_0402_5%@R230 4.7K_0402_5%@ R231 4.7K_0402_5%@R231 4.7K_0402_5%@

internal pull down

R35 430_0402_1%81 01T@R35 430_0402_1 %8101T@

HDMI_HPD#

HDMI_TX0+ HDMI_TX0-

HDMI_TX2+ HDMI_TX2-

HDMI_TX1+ HDMI_TX1-

HDMI_CLK+ HDMI_CLK-

1 2 1 2

1 2

1

UMA@

C27

0.1U_0402_16V4Z

2

HDMI_HPD# <4>

R232 4.7K_0402_5%@R232 4.7K_0402_5%@

1 2

12

R233

@

4.7K_0402_5%

05/11 Swap HDMI_TX0+,HDMI_TX0,HDMI_TX1+,HDMI_TX1-, HDMI_TX2+,HDMI_TX2(For Layout Routing)

U3

CH7318C

7318C@

20

GND

21

GND

22

GND

23

GND

Compal Secret Data

Deciphered Date

2

1

UMA@

C28

0.1U_0402_16V4Z

2

+3VS

HDMI_HPD#<4>

2

1

R35

1.2K_0402_1%

7318C@

HDMI_DATA <4>

HDMI_CLK <4>

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

HDMI_HPD#

+3VS

12

UMA@

R36

2.2K_0402_5%

R35

3.3K_0402_1%

1442T@

1

UMA@

C29

C29 10U_0805_10V4Z

10U_0805_10V4Z

2

12

UMA@

R37

2.2K_0402_5%

HDMI_DATA

HDMI_CLK

05/12 Add R232,R233

+3VS

05/15 Move R232,R233

HDMI_TX2+ HDMI_TX2HDMI_TX1+ HDMI_TX1HDMI_TX0+ HDMI_TX0HDMI_CLK+ HDMI_CLK-

R55 0_0402_5%1442 T@R55 0_0402_5%1442T@ R57 0_0402_5%1442 T@R57 0_0402_5%1442T@ R51 0_0402_5%1442 T@R51 0_0402_5%1442T@ R53 0_0402_5%1442 T@R53 0_0402_5%1442T@ R47 0_0402_5%1442 T@R47 0_0402_5%1442T@ R49 0_0402_5%1442 T@R49 0_0402_5%1442T@ R43 0_0402_5%1442 T@R43 0_0402_5%1442T@ R45 0_0402_5%1442 T@R45 0_0402_5%1442T@

06/25 Mirror L8,L9,L10,L11

HDMI_TX2+

HDMI_TX2-

HDMI_TX1+

HDMI_TX1-

HDMI_TX0+

HDMI_TX0-

HDMI_CLK+

HDMI_CLK-

L8

WCM-2012-900T_4P

7318C@

WCM-2012-900T_4P

1

4

L11

8101T@L11

8101T@

WCM-2012-900T_4P

1

4

L10

8101T@L10

8101T@

WCM-2012-900T_4P

1

4

L9

8101T@L9

8101T@

WCM-2012-900T_4P

1

4

L8

8101T@L8

8101T@

L9

WCM-2012-900T_4P

7318C@

2

3

2

3

2

3

2

3

L10

WCM-2012-900T_4P

7318C@

06/03 Change L8,L9,L10,L11 for 8101T@ and 7318C@ 06/03 Change R43,R45,R47,R49,R51,R53,R55,R57 from @ to 1442T@

HDMI_DETECT

R74

DIS@

1 2

10K_0402_1%

12

DIS@

R78

R78 100K_0402_1%

100K_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet

1 2

R71 0_0402_5%UMA@R71 0_0402_5%UMA@

1 2

FBMA-L10-160808-121LMT_2P

Compal Electronics, Inc.

HDMI Level Shiftter_PS8101T

NTUC0 IO/B LA-5501P Schematic

+5VS

3

1

L14

DIS@

1

+3VS

12

R209

7318C@

20K_0402_1%

12

R210

7318C@

7.5K_0402_1%

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_CLK-_CONN

L11

WCM-2012-900T_4P

7318C@

2

@

D9

D9 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

HP_DET

DIS@

C41

C41 330P_0402_50V7K

330P_0402_50V7K

of

7 24Thursday, July 30, 2009

of

7 24Thursday, July 30, 2009

of

7 24Thursday, July 30, 2009

1.0

A

B

C

D

E

1 1

04/02 Swap Net : WLAN_ACTIVE and BT_ACTIVE (Follow JHXXX)

PCIE_WAKE#<4,11>

WLAN_ACTIVE<9> BT_ACTIVE<9>

WLAN_CLKREQ#<4>

EC_TX_P80_DATA<13>

04/02 Change EC_TX_P80_DATA from JWLAN.49 to JWLAN.17

04/09 Swap PCIE TX and RX

2 2

EC_RX_P80_CLK< 13>

04/02 Change R90,R91 from 100ohm(@) to 0ohm

Mini-Express Card (Slot 1-WLAN) 4mm High

JWLAN1

PCIE_WAKE# WLAN_ACTIVE BT_ACTIVE WLAN_CLKREQ#

CLK_PCIE_WLAN#<4> CLK_PCIE_WLAN<4>

R90 0_0402_5%R90 0_0402_5%

PCIE_IRX_DTX_N2<4> PCIE_IRX_DTX_P2<4>

PCIE_ITX_DRX_N2_C<4> PCIE_ITX_DRX_P2_C<4>

R91 0_0402_5%R91 0_0402_5%

R83 0_0402_5%@R83 0_0402_5%@

1 2

R84 0_0402_5%@R84 0_0402_5%@

1 2

+3VS

1 2

JWLAN1

1

3

5

7

9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

FOX_AS0B226-S40N-7F

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+3VS

+1.5VS

R85 0_0402_5%R85 0_0402_5%

1 2

R86 0_0402_5%R86 0_0402_5%

1 2

R87 0_0402_5%@R87 0_0402_5%@

1 2

+3VS +3VALW

06/23 Delete USB20_N5,USB20_P5

WLAN_LED_MO#

R211

12

10K_0402_5%

04/03 Add R211 for WLAN LED

+3VS

XMIT_OFF# <13> PLT_RST# <4,11,13>

WLAN_LED_MO# <15>

+3VS

1

C42

4.7U_0805_10V4Z

2

+1.5VS

1

C44

4.7U_0805_10V4Z

2

1

C43

0.1U_0402_16V4Z

2

1

C45

0.1U_0402_16V4Z

2

Mini-Express Card (Slot 2-WWAN) 4mm High

JWLAN2

PCIE_WAKE#<4,11>

WWAN_CLK REQ#<4>

CLK_PCIE_WW AN#<4> CLK_PCIE_WW AN<4>

3 3

04/09 Swap PCIE TX and RX

06/23 Delete PCIE_IRX_DTX_N4,PCIE_IRX_DTX_P4

+3VS

PCIE_ITX_DRX_N4_C,PCIE_ITX_DRX_P4_C

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0B226-S40N-7F

GND2

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

+3VS

+1.5VS

+UIM_PWR

UIM_DATA UIM_CLK UIM_RST UIM_VPP

R92 0_0402_5%R92 0_0402_5%

1 2

R93 0_0402_5%R93 0_0402_5%

1 2

R95 0_0402_5%@R95 0_0402_5%@

1 2

WWAN_LED _MO#

R229 100K_0402_5%R229 100K_0402_5%

1 2

R237 100K_0402_5%@R237 100K_040 2_5%@

1 2

USB20_N4 <4> USB20_P4 <4>

WWAN_LED _MO# <13,15>

+3VS +3VALW

+5VS

+3VS

05/11 Add R229 for WWAN_LED_MO# 05/13 Add R237 for WWAN_LED_MO#

WXMIT_OFF# <13>

PLT_RST# <4,11,13>

WWAN Card Conn.

JP4

4

UIM_VPP UIM_DATA

10K_0402_5%

+UIM_PWR

Reserve for SIM card does not meet rise time and pull-up is needed.

GND

5

VPP

6

I/O

7

DET

12

@

R94

TAITW_PMPAT6-06GLBS7N14N 0 ME@

VCC RST

CLK

GND GND

1 2 3

8 9

+UIM_PWR

UIM_RST UIM_CLK

1

C46

C46 1U_0603_10V4Z

1U_0603_10V4Z

2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Mini Card (WLAN/WWAN)

NTUC0 IO/B LA-5501P Schematic

E

of

8 24Thursday, July 30, 2009

of

8 24Thursday, July 30, 2009

of

8 24Thursday, July 30, 2009

1.0

A

B

C

D

E

F

G

H

04/03 Change symbol (SMT connector)

05/04 Change JP5 footprint from TYCO_1775191-1_22P_RV to FOX_LD2122H-S42_RV~D

6/25 Change JP5 footprint from

0

1 1

03/24 Change C47,C48,C49,C50 from 3900pF to 0.01uF

SATA HDD Conn.

06/30 Delete C47,C49, add R243,R244

SATA_ITX_DRX_P0_C<4> SATA_ITX_DRX_N0_C<4>

SATA_IRX_DTX_N0_C<4> SATA_IRX_DTX_P0_C<4>

SATA_ITX_DRX_P0_C SATA_ITX_DRX_N0_C

SATA_IRX_DTX_N0_C SATA_IRX_DTX_P0_C SATA_IRX_DTX_P0

R243 0_0402_5%R243 0_0402_5%

1 2

R244 0_0402_5%R244 0_0402_5%

1 2

C48 0.01U_0402_16V7KC48 0.01U_0402_16V7K

1 2

C50 0.01U_0402_16V7KC50 0.01U_0402_16V7K

1 2

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_IRX_DTX_N0

FOX_LD2122H-S42_RV~D to FOX_LD2122H-S42L3_22P-T

JP5

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

+3VS

+5VS

1

C51

C51 10U_0805_10V4Z

10U_0805_10V4Z

2

2 2

1

C52

C52 1U_0603_10V4Z

1U_0603_10V4Z

2

1

C53

0.1U_0402_16V4Z

2

+5VS

1

C54

C54 1000P_0402_50V7K

1000P_0402_50V7K

2

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21

12V

22

12V

FOX_LD2122H-S42L3

GND GND GND

23 24 25

BT MODULE Conn.

03/31 Change BT circuit (Follow NIUU1)

05/06 Change BT circuit (Follow KHLBX) 05/07 Add R222,R223

R222 0_0603_5%BT@R222 0_0603_5%BT@

+3VALW

R223 0_0603_5%@R223 0_0603_5%@

+3VS

3 3

0.1U_0402_16V4Z

BT@

BT_ON#<13>

1 2

R100 100K_0402_5%

C55

BT@

12

G

2

C214

4.7U_0805_10V4Z

1 3

1

@

2

W=40milsW=40mils

+BT_VCC_R

S

Q9

Q9 SI2301BDS_SOT23

SI2301BDS_SOT23

BT@

D

W=40mils

1

C213

BT@

1U_0603_10V4Z

2

C215

BT@

0.1U_0402_16V4Z

+BT_VCC

04/03 Change R198 pull-up power plane from +5VS to +3VS

+3VS

12

R198

BT@

10K_0402_5%

BT_LED_MO#<15>

BT_LED_MO#

Q23

SSM3K7002FU_SC70-3

Q23

BT@

13

D

S

05/12 Change Q23 from SB570020110 to SB000009610

G

2

12

R199

BT@

10K_0402_5%

03/26 Change BT connector (Follow NIUU1)

06/24 Change JP6 from SP02000CZ00 to SP02000HC00 06/26 Change JP6 pin definition (Follow KTV00)

+BT_VCC

BT_ACTIVE<8>

USB20_P3<4> USB20_N3<4>

WLAN_ACTIVE<8>

BT_ACTIVE USB20_P3 USB20_N3 BTON_LED WLAN_ACTIVE

JP6

1

2

3

4

5

6

7

8

9

GND1

10

GND2

ACES_88231-08001

BT_ACTIVE

WLAN_ACTIVE

BT_LED_MO#

BT_ON#

C222 100P_0402_50V8J@C222 100P_0402_50V8J@

1 2

C223 100P_0402_50V8J@C223 100P_0402_50V8J@

1 2

C224 100P_0402_50V8J@C224 100P_0402_50V8J@

1 2

C225 100P_0402_50V8J@C225 100P_0402_50V8J@

1 2

06/25 Reserve C222,C223,C224,C225 close to JP6

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/03/20 2010/03/20

E

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

Date: Sheet

F

Date: Sheet

Compal Electronics, Inc.

SATA HDD Conn./BT Conn.

NTUC0 IO/B LA-5501P Schematic

G

1.0

of

9 24Thursday, July 30, 2009

of

9 24Thursday, July 30, 2009

of

9 24Thursday, July 30, 2009

H

5

05/13 Change R102 from bead to 0ohm

R102 0_0805_5%R102 0_0805_5%

1 2

+5VS

1

@

2

@

C65

0.1U_0402_16V4Z

2

C64

10U_0805_10V4Z

D D

Adjustable Output

1

IN

OUT

2

GND

3

SHDN

BYP

U4

U4 G9191-475T1U_SOT23-5

G9191-475T1U_SOT23-5

@

5

4

+5VDDA_CODEC

1

@

C66

0.01U_0402_16V7K

2

04/02 Change GND to GNDA (Realtek Recommend)

+3VS

L15 0_0603_5%L15 0_0603_5%

1 2

05/13 Change L15 from bead to 0ohm

10U_0805_10V4Z

Place near Pin1

+MIC2_VREFO

12

R113

4.7K_0402_5%

C C

4.7K_0402_5%

1

C77

C77 47P_0402_50V8J

47P_0402_50V8J

2

GNDA

1 2

R118 0_0402_5%R118 0_0402_5%

1 2

R119 0_0402_5%R119 0_0402_5%

1 2

R120 0_0402_5%R120 0_0402_5%

INT_MIC_L

GNDAGND

B B

Pin Assignment

LINE-OUT (Pin35/36)

Capless HP-OUT (Pin32/33)

LINE1 (Pin23/24)

M

IC1(Pin21/22)

MONO-OUT(Pin37)

MIC2(Pin16/17)

+3VDD_CODEC

1

2

C72

C71

C72

0.1U_0402_16V4Z

2

1

05/13 Close to U5

04/07 Close to JP13

3/26 Close to JP16

0

Location Function

Internal

External

Internal

Int Speaker

Headphone out

Mic in

Internal Mic

EXT_MIC_L<15>

EXT_MIC_R<15>

PC Beep

EC Beep

BEEP#<13>

A A

SB_SPKR<4>

ICH Beep

5

R131

1 2

47K_0402_5%

R132

1 2

47K_0402_5%

10K_0402_5%

12

R133

1

C91

0.1U_0402_16V4Z

2

C86

1 2

0.1U_0402_16V4Z

4.7K_0402_5%

PC_BEEPPC_BEEP1

4

+MIC1_VREFO_L

12

R107

4

INT_MIC_L<15>

12

R105

4.7K_0402_5%

10U_0805_10V4Z

Place near Pin25

1 2

L16

L16 MBV2012301YZF_0805

MBV2012301YZF_0805

3

+5VDDA_CODEC

04/03 Add C211 (Realtek Recommend)

2

1

C57

0.1U_0402_16V4Z

2

C56

1

C58

0.1U_0402_16V4Z

2

Place near Pin38

04/02 Add C210 (Realtek Recommend)

INT_MIC_L

Add Net : INT_MIC_L_C and MIC_INR

1 2

R106 1K_0402_5%R106 1K_0402_5%

1 2

R108 1K_0402_5%R108 1K_0402_5%

1 2

R110 1K_0402_5%R110 1K_0402_5%

HDA_BIT_CLK<4>

HDA_SDOUT<4>

HDA_SDIN0<4>

HDA_RST#<4>

HDA_SYNC<4>

12

C67 2.2U_0603_6.3V6KC67 2.2U_0603_6.3V6K

12

C210 2.2U_0603_6.3V6KC210 2.2U_0603_6.3V6K

12

C73 2.2U_0603_6.3V6KC73 2.2U_0603_6.3V6K

12

C74 2.2U_0603_6.3V6KC74 2.2U_0603_6.3V6K

1 2

C75 100P_0402_50V8JC75 100P_0402_50V8J

1 2

R112 33_0402_5%R112 33_0402_5%

04/03 Change R112 from 39ohm to 33ohm

Place near Pin

1

C82

0.1U_0402_16V4Z

2

1 2

R114 20K_0402_1%R114 20K_0402_1%

1 2

R115 5.1K_0402_1%R 115 5.1K_0402_1%

1 2

R116 0_0402_5%R116 0_0402_5%

+5VAMP

C83

0.47U_0603_16V4Z

SPKL+ SPKLSPKR+ SPKR-

20mil

3

10U_0805_10V4Z

MIC_JD<15>

PLUG_IN<15>

EAPD<13>

+5VAMP+5VS

2

C81

1

2

04/03 Change U5.9 from +3VDD_CODEC to +1.5VDD_CODEC

9

1

DVDD

DMIC_CLK1/2

DMIC_CLK3/4

LINE2_VREFO

LINE1_VREFO

MIC1_VREFO

MIC2_VREFO

SHUTDOWN

BYPASS

C88 22P_0402_50V8J@ C88 22P_0402_50V8J@

C87 22P_0402_50V8J@ C87 22P_0402_50V8J@

1

2

Compal Secret Data

DVDD_IO

HPOUT_L

HPOUT_R

MONO_OUT

LOUT-

ROUT-

LOUT+

ROUT+

Add L23 for +1.5VS

+1.5VDD_CODEC

Place near Pin9

1

C62

0.1U_0402_16V4Z

2

C_LINE_OUTL

35

LOUT1_L

C_LINE_OUTR

36

LOUT1_R

39

LOUT2_L

41

LOUT2_R

48

SPDIFO1

45

SPDIFO2

33

R109 62_0402_5%R109 62_0402_5%

32

R111 62_0402_5%R111 62_0402_5%

37

46

44

20

18

28

19

31

CPVREF

27

VREF

40

JDREF

30

CBN

29

CBP

AVSS1 AVSS2

NC

GND GND GND GND GND

C90 22P_0402_50V8J@ C90 22P_0402_50V8J@

C89 22P_0402_50V8J@ C89 22P_0402_50V8J@

1

2

Deciphered Date

26 42

12

19

8

14

4

18

1 11 13 20 21

10

SPK_L1+ SPK_L1SPK_R1+ SPK_R1-

C78 2.2U_0603_6.3V4ZC78 2.2U_0603_6.3V4Z

EC_MUTE#

SPKL-

SPKR-

SPKL+

SPKR+

2

C85

0.47U_0603_16V4Z

1

05/04 Change JP7 footprint from ACES_87213-0400G_4P to ACES_87212-04G0_4P

2

1 2

FBMA-L11-160808-800LMT_0603

C69 0.47U_0603_16V4ZC 69 0.47U_0603_16V4Z

1 2

C70 0.47U_0603_16V4ZC 70 0.47U_0603_16V4Z

1 2

03/25 Change C69,C70 from 0.01uF(SE026103K80) to

0.47uF(SE027474Z80) (TI recommend)

1 2

+MIC1_VREFO_L

+MIC2_VREFO

1 2

C76 2.2U_0603_6.3V4ZC76 2.2U_0603_6.3V4Z

1 2

EC_MUTE# <13>

03/31 Change JP7 symbol

JP7

1

2

3

4

5

GND

6

GND

ACES_87212-04G0

W=40mil

GAIN0

GAIN1

LINE_OUTL

LINE_OUTR

1 2 1 2 1 2 1 2

2

C84

0.47U_0603_16V4Z

1

+5VDDA_CODEC +3VDD_CODEC

38

U5

AVDD125AVDD2

14

LINE2-L

15

LINE2-R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

21

MIC1_L

22

MIC1_R

12

BEEP_IN

6

BITCLK

5

SDATA_OUT

8

SDATA_IN

11

RESET#

10

SYNC

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

43

NC

4

DVSS

7

DVSS

ALC272-VA2-GR_LQFP48_7X7

U6

16

VDD

6

PVDD

15

PVDD

2

GAIN0

3

GAIN1

5

LIN-

17

RIN-

9

LIN+

7

RIN+

TPA6017A2PWPR_TSSOP20

1

2

2009/03/20 2010/03/20

1

C211

C211 10U_0805_10V4Z

10U_0805_10V4Z

2

MIC_INLINT_MIC_L_C

MIC_INR

MIC_EXTL_C

MIC_EXTR_C

PC_BEEP

HDA_BIT_CLK

HDA_RST#

HDA_SYNC

SENSEA

SENSEB

2

1

R127 0_0603_5%R127 0_0603_5% R128 0_0603_5%R128 0_0603_5% R129 0_0603_5%R129 0_0603_5% R130 0_0603_5%R130 0_0603_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1

EMI

R124

R124 100K_0402_5%

100K_0402_5%

1 2

@

R126

R126 100K_0402_5%

100K_0402_5%

1 2

HDA_BIT_CLK

GAIN1GAIN0

1 2

C61

@

22P_0402_50V8J

Internal Speaker

Headphone

1

C80

0.1U_0402_16V4Z

2

R103 33_0402_5%@R103 33_0402_5%@

1

2

L23

12

R117

R117 20K_0402_1%

20K_0402_1%

+1.5VS

LINE_OUTL

LINE_OUTR

HP_OUTL <15>

HP_OUTR <15>

1

C79

C79 10U_0805_10V4Z

10U_0805_10V4Z

2

Close Pin27

GAIN0 GAIN1 0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB

+5VAMP +5VAMP

@

R123

R123 100K_0402_5%

100K_0402_5%

1 2

R125

R125 100K_0402_5%

100K_0402_5%

1 2

05/05 Correct JP7 footprint ( ACES_87212-04G0_4P)

03/26 Add C205(@) close to JP7 (EMI Recommend)

C205 220P_0402_50V7K<EMI>@C205 220P_0402_50V7K<EMI>@

1 2

Compal Electronics, Inc.

Title

HDA Codec_ALC272/AMP_TP6017

Size Document Number Rev

C

NTUC0 IO/B LA-5501P Schematic

Date: Sheet of

1

1.0

10 24Thursday, July 30, 2009

1.0

5

60mil

1

CL1

2

1U_0402_6.3V4Z

12

PLT_RST#<4 ,8,13>

1 2

1 2 1 2

+3V_LAN

1

2

+3V_LAN

CL2

0.1U_0402_16V4Z

05/13 Change RL1 from 0_0603 to 0_1206

RL1 0_0603_5%RL1 0_0603_5%

+3VALW

D D

1 2

S

D

13

G

QL1

@

QL1

@

2

SI2301BDS-T1-E3_SOT23- 3

05/13 Change QL1 from SB000005X80 to SB923010020 07/01 Change QL1 from mount to @

RL6 10K_0402_5%@RL6 10K_0402_5%@

1 2

2

CL8

@

0.1U_0402_16V4Z

1

3/30 Remove CL3 when use AR8132

1

CL3

CL4

CL4 10U_0805_10V4Z

2

10U_0805_10V4Z

2

Place Close to Pin 2

EN_WO L# <13>

CL10 0.1U_0402_16V4ZCL10 0.1U_0402_16V4Z

CL11 0.1U_0402_16V4ZCL1 1 0.1U _0402_16V4Z

05/14 Add R240

PCIE_WAK E#_R<13>

C C

PCIE_WAK E#<4,8> PCIE_IRX_DTX_N6<4> PCIE_IRX_DTX_P6<4> PCIE_ITX_DRX_N6_C<4> PCIE_ITX_DRX_P6_C<4>

R240 0_0402_5%R 240 0_0402_5%

CL15 0.1U _0402_16V7KCL15 0.1 U_0402_16V7K CL14 0.1U _0402_16V7KCL14 0.1 U_0402_16V7K

04/24 Swap positive pole and negative pole of TX,RX

RL15 2.37K_0402_1%RL15 2.37K_0402_1%

1 2

B B

+1.8_VDD/LX

+AVDD_CEN

+2.5V_VDDH

PLT_RST#

PCIE_WAK E#_R PCIE_IRX_C_PTX_N6 PCIE_IRX_C_PTX_P6

LAN_XTALO

4

+AVDD_CEN

0.1U_0402_16V4Z

CL6

LL1, CL6, CL7 close to Pin1 of U25

U7

True

60mil

1

VDDHO/VDD18O/VDD18O

2

VDD3V

6

VDD3V/VDDHO/VDDHO

5

VDDLO/CTR12/CTR12

3

PERSTn

7

VAUX_AVL/VBG1P18/VBG1P18

4

WAKEn

37

TX_N

38

TX_P

44

RX_N

43

RX_P

9

XTLO

10

XTLI

34

TESTMODE

35

NC

31

SMCLK

33

SMDATA

49

GND

12

RBIAS

S IC AR8131-AL1E_QFN 48P_6X6

3

LL1

1 2

S INDUC_ 4.7UH + -20% SIA4012-4R7M

1

CL7

CL7 10U_0805_10V4Z

10U_0805_10V4Z

2

LED_LINK10_100n

SPI_CS/LED_DUPLEXn/LED_DUPLEXn

SPI_DI/NC/LED_Link1000n

TXN0/TXN0/TRXN0 TXP0/TXP0/TRXP0

RXN1/RXN1/TRXN1

Atheros

AR8121/8131

02/25 Change PN of U26 from SA000038N00 to SA000031Z00

3/30 Remove U25 when use AR8132

RXP1/RXP1/TRXP1

DVDDL/AVDDL/AVDDL

AVDDL/DVDDL/DVDDL

SPI_CLK/DVDDL/DVDDL

SPI_DO/AVDDH/AVDDH

TWSI_DATA

TWSI_CLK

LED_ACTn

REFCLKN REFCLKP

NC/NC/TRXN2 NC/NC/TRXP2 NC/NC/TRXN3 NC/NC/TRXP3

AVDDL0 AVDDL1 AVDDL2

AVDDL3 AVDDL4 AVDDL5

DVDDL0

DVDDL1

AVDDH0 AVDDH1

+1.8_VDD/LX

+AVDD_CEN

30 29 48 47

27

26

40 41

14 13 18 17 21 20 24 23

42 39 36 22 16 11 8

46 45 32 28

25 19 15

TWSI_SDA TWSI_SCL 10/100_LINK_LED

ACTIVITY#

LAN_CLKREQ#

1000_LINK_LED

MDI0MDI0+ MDI1MDI1+ MDI2MDI2+ MDI3MDI3+

+AVDDVCO2 +1.2_AVDDLLAN_XTALI

+AVDDVCO1 +1.2_AVDDL

+1.2_DVDDL

+2.5V_VDDH

2

DL1

10/100_LINK_LED

1000_LINK_LED

05/04 Add pull-up resister RL28 for LAN request

LAN_CLKREQ#

DL1

2

1

3

CHP202UPT_SOT323-3

RL28 10K_0402_5%RL28 10K_0402_5%

1 2

ACTIVITY# <12>

LAN_CLKREQ# <4>

CLK_PCIE_LAN# <4> CLK_PCIE_LAN <4>

MDI0- <12> MDI0+ <12> MDI1- <12> MDI1+ <12> MDI2- <12> MDI2+ <12> MDI3- <12> MDI3+ <12>

LAN_SK# <12>

+3VS

MDI0+

MDI0-

MDI1+

MDI1-

MDI2+

MDI2-

MDI3+

MDI3-

+1.2_AVDDL

1

+3V_LAN +3V_LAN

12

RL3

1

4.7K_0402_1%

CL5

@

0.1U_0402_16V4Z

UL1

1

A0

VCC

2

A1

WP

3

A2

SCL

4

GND

SDA

AT24C02BN-SH-T_SO 8

@

8 7 6 5

@

12

2

@

RL4

4.7K_0402_1%

@

TWSI_SCL TWSI_SDA

Place Close to LAN chip

RL7 49.9_0402_1%RL7 49.9_0402_1%

1 2

RL9 49.9_0402_1%RL9 49.9_0402_1%

1 2

RL8 49.9_0402_1%RL8 49.9_0402_1%

1 2

RL10 49.9_0402_1%RL10 49.9_0402_1%

1 2

RL11 49.9_0402_1%RL11 49.9_0402_1%

1 2

RL12 49.9_0402_1%RL12 49.9_0402_1%

1 2

RL13 49.9_0402_1%RL13 49.9_0402_1%

1 2

RL14 49.9_0402_1%RL14 49.9_0402_1%

1 2

CL12 0.1U_0402_16V4ZCL12 0.1U_0402_16V4Z

1 2

CL9 0.1U_0402_16V4ZCL9 0.1U_0402_16V4Z

1 2

CL13

0.1U_0402_16V4Z

1 2

3/30 Remove RL11~RL14/CL13/CL16 when use AR8132

1 2

CL16

0.1U_0402_16V4Z

Place Close to Pin15、19、25 CL17 close to Pin15

CL18

0.1U_0402_16V4Z

+2.5V_VDDH

CL17

1U_0402_6.3V4Z

1

2

0.1U_0402_16V4Z

1

2

CL19

0.1U_0402_16V4Z

RL19 0_0603_5%

1 2

RL18

RL18 0_0603_5%

0_0603_5%

CL28 close to Pin46. CL29, CL30, CL31 close to Pin28, Pin32, Pin45 respectively

LAN_XTALI

LAN_XTALO

YL1

1

CL32

CL32 27P_0402_50V8J

27P_0402_50V8J

2

YL1

1 2

25MHZ_20P

1

2

5

CL33

CL33 27P_0402_50V8J

27P_0402_50V8J

A A

+1.2_DVDDL

CL28

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

CL29

2

1

CL30

2

0.1U_0402_16V4Z

4

1

2

CL31

0.1U_0402_16V4Z

2

CL24, CL25, CL26,CL43 close to Pin16, Pin22, Pin36,Pin39 of U25respectively

CL22,CL23 close to Pin8 of U25

+1.2_AVDDL

1U_0402_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CL22

0.1U_0402_16V4Z

1

CL23

2

3

1

2

0.1U_0402_16V4Z

1

CL25

2

1

CL26

2

0.1U_0402_16V4Z

Compal Secret Data

CL24

0.1U_0402_16V4Z

2009/03/20 2010/03/20

0.1U_0402_16V4Z

1

CL43

2

Deciphered Date

3/16 Add by Vivian

2

If overclocking, RL19 , LL2 stuffed and RL18 removed.

If not overclocking, RL18 , LL2 suffed and RL19 removed. AR8131:LL2=0ohm (more power saving mode)

RL19 0_0603_5%

1 2

@

1 2

LL2 0_0603_5%LL2 0_0603_5%

Title

Size D ocument Number Rev

Custom

NTUC0 IO/B LA-5501P Schematic

Date: Sheet

1

CL27

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

LAN_AS8131

+AVDDVCO1

1

CL21

0.1U_0402_16V4Z

2

CL21 close to Pin11 of U25

+AVDDVCO2

of

11 24Thursday, July 30, 2009

of

11 24Thursday, July 30, 2009

of

11 24Thursday, July 30, 2009

1

1.0

5

D D

4

3

2

1

04/23 Add R213 (Atheros recommend)

+AVDD_C EN

12

R213

0_0603_ 5%

CL34 0 .1U_0402_16V4 ZCL34 0 .1U_0402_16V4 Z

1 2

CL35 0 .1U_0402_16V4 ZCL35 0 .1U_0402_16V4 Z

1 2

CL36 0 .1U_0402_16V4 ZCL36 0 .1U_0402_16V4 Z

1 2

CL37 0 .1U_0402_16V4 ZCL37 0 .1U_0402_16V4 Z

C C

1 2

+AVDD_C EN_R

MDI3-<11> MDI3+<11>

MDI2-<11> MDI2+<11>

MDI1-<11> MDI1+<11>

MDI0-<11> MDI0+<11>

MDI3MDI3+

MDI2-

MDI1MDI1+

MDI0MDI0+

Place close to TCT pin

T2

MCT3

24

MDO3-

23

MDO3+

22

MCT2

21

MDO2-

20

MDO2+MD I2+

19

MCT1

18

MDO1-

17

MDO1+

16

15

MDO0-

14

MDO0+

13

10 11 12

1 2 3

4 5 6

7 8 9

TCT1 TD1+ TD1-

TCT2 TD2+ TD2-

TCT3 TD3+ TD3-

TCT4 TD4+ TD4-

IH-060-AT2IH-060-A

MCT1 MX1+

MX1-

MCT2 MX2+

MX2-

MCT3 MX3+

MX3-

MCT4 MX4+

MX4-

04/21 T2 follow NIUU1

RL21 75_040 2_5%RL21 75_0402_ 5%

RL22 75_040 2_5%RL22 75_0402_ 5%

RL23 75_040 2_5%RL23 75_0402_ 5%

RL24 75_040 2_5%RL24 75_0402_ 5%

12

04/21 JLAN1 follow NIUU1 05/04 Change JLAN1 footprint from TYCO_2006179-1_14P to TYCO_C-440470_12P

RJ45_PRMCT0

05/05 Change JLAN1 footprint from TYCO_C-440470_12P to FOX_JM36113-P1123-7F_14P

05/12 Change JLAN1 footprint from FOX_JM36113-P1123-7F_14P to TYCO_2006179-1_14P

<EMI>

12

CL38 470P_040 2_50V7K

ACTIVITY#<11>

pull down circui t : more power savin g in no-overclocking mode

B B

LAN_SK#<11>

A A

Security Class ification

2009/03/ 20 20 10/03/20

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/ 20 20 10/03/20

3

Compal Secret Data

Deciphered Date

ACTIVITY#

LAN_SK# LAN_LINK#

1 2

RL25 510_0402 _5%RL25 510_040 2_5%

1 2

RL26 5.1K_04 02_5%RL26 5.1K_0 402_5%

1 2

RL27 300_ 0402_5%RL27 300_04 02_5%

<EMI>

12

CL39 470P_040 2_50V7K

2

LAN_ACT #

10mil

MDO3-

MDO3+

MDO1-

MDO2-

MDO2+

MDO1+

MDO0-

10mil

+3V_LAN

Title

Size Document Number Rev

Custom

Date: Sheet

MDO0+

CL40

1 2

1000P_1 206_2KV7K

Compal Electronics, Inc.

NTUC0 IO/B LA-5501P Schematic

Lan Conn.

JLAN1

11

Amber LED+

12

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

14

Green LED-

13

Green LED+

TYCO_2006 179-1

<EMI>

0.1U_040 2_16V4Z

LAN_Transformer

CL41

1

2

1

9

10

16

SHLD2

15

SHLD1

LANGNDRJ45_PR

1

CL42

4.7U_080 5_10V4Z

2

12 24Thursday, July 30, 2009

1.0

of

05/19 Add C217,C218,C219

C217100P_0402_50V8J @ C21 7100P _0402_50V8J @

12

LID_SW#

C218100P_0402_50V8J @ C21 8100P _0402_50V8J @

12

C219100P_0402_50V8J @ C21 9100P _0402_50V8J @

12

KB_RST#<4>

PLT_RST#<4,8,11>

+3VALW

1 2

R159 47K_0402_5%R159 47K_0402_5%

1 2

R161 47K_0402_5%R161 47K_0402_5%

+5VALW

1 2

R165 4.7K_0402_5%R165 4.7K_0402_5%

1 2

R166 4.7K_0402_5%R166 4.7K_0402_5%

1 2

R192 4.7K_0402_5%R192 4.7K_0402_5%

+3VS

R167 2.2K_0402_5%R167 2.2K_0402_5%

R168 2.2K_0402_5%R168 2.2K_0402_5%

1 2

R185 10K_0402_5%R185 10K_0402_5%

+5VS

1 2

R174 4.7K_0402_5%R174 4.7K_0402_5%

1 2

R175 4.7K_0402_5%R175 4.7K_0402_5%

+3VALW

R214 10K_0402_5%R214 10K_0402_5%

1 2

R215 10K_0402_5%R215 10K_0402_5%

1 2

R216 10K_0402_5%R216 10K_0402_5%

1 2

R217 10K_0402_5%R217 10K_0402_5%

1 2

R218 10K_0402_5%R218 10K_0402_5%

1 2

12

R158 47K_0402_5%R158 47K_0402_5%

+3VALW

R194

R194 100K_0402_5%

100K_0402_5%

KSO1

KSO2

EC_SMB_CK1

EC_SMB_DA1

HDI_B_DET

EC_SMB_CK2

EC_SMB_DA2

FAN_SPEED1

TP_CLK

TP_DATA

1 2

WOWVIDEO_BTN#

WOWAUDIO_BTN#

SMARTKEY_BTN#

KILL_SW#

TP_DISABLE_BTN#

04/21 Delete Net : LAN_WAKE#, add T5 05/13 Delete R170 05/14 Add R239

PCIE_WAKE#_R<11>

PCI_PME#<4>

05/04 Change R171 from @ to mount

1 2

R239 0_0402_5%

1 2

R171 0_0402_5%R 171 0_0402_5%

@

R169

10K_0402_5%

ACOFF

ADP_I

+3VS

+3VALW

12

R156

R156 10K_0402_5%

10K_0402_5%

2

SMARTKEY_BTN#<14>

C130

0.1U_0402_16V4Z

1

KSO[0..15]<15>

KSI[0..7]<15>

WOWVIDEO_BTN#<14>

WOWAUDIO_BTN#<14>

EC_TX_P80_DATA<8> EC_RX_P80_CLK<8>

C133

15P_0402_50V8J

12

32.768KHZ_12.5PF_Q13MC14610002

EC_PME#

+3VALW +EC_AVCC

U9

GATEA20<4>

SERIRQ<4>

LPC_FRAME#<4>

LPC_AD3<4> LPC_AD2<4> LPC_AD1<4> LPC_AD0<4>

CLK_PCI_LPC<4>

EC_SCI#<4>

KSO[0..15]

KSI[0..7]

EC_SMB_CK1<20> EC_SMB_DA1<20> EC_SMB_CK2<4> EC_SMB_DA2<4>

SLP_S3#<4> SLP_S5#<4>

EC_SMI#<4>

FAN_SPEED1<15>

ON/OFF#<14> PWR_LED#<14,15> NUM_LED#<15>

1

2

1

2

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_RST# EC_SCI# SMARTKEY_BTN#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMI# WOWVIDEO_BTN#

WOWAUDIO_BTN#

FAN_SPEED1

EC_TX_P80_DATA EC_RX_P80_CLK

XCLKI XCLKO

OSC4OSC

NC3NC

X1

1

C134

C134 15P_0402_50V8J

15P_0402_50V8J

2

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

KB926QFD3_LQFP128_14X14

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

04/01 Change X1 from SJ132P7K220 to SJ132P7KW10 (ME Limit) 04/09 Swap ppin1 and pin4 of X1

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GND

11

24

35

94

113

+3VALW

1

C123

0.1U_0402_16V4Z

2

67

AVCC

INVT_PWM/PWM 1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPI

AGND

69

ECAGND

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

06/29 Change C209 from 12pF to 22pF

05/06 Move C209 from SPI_CLK_R to SPI_CLK (RF Recommend)

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

INVT_PWM BEEP#

ACOFF

BATT_TEMP BATT_OVP ADP_I

DAC_BRIG EN_FAN1 IREF

USB_ON# WWAN_LED _EC#

TP_CLK TP_DATA

KILL_SW# LID_SW#

FRD#SPI_SO FWR#SPI_SI SPI_CLK FSEL#SPICS#

TP_DISABLE_BTN# WWAN_LED _MO#_R

CHARGE_LED0# CAPS_LED# CHARGE_LED1# KILL_SW_LED# SYSON

EC_LID_OUT# EC_ON

ICH_POK_EC

WXMIT_OFF# TP_DISABLE_LED#

EC_THERM# SUSP# PBTN_OUT# EC_PME#

20mil

1

C132

4.7U_0805_10V4Z

2

INVT_PWM <5> BEEP# <10>

ACOFF <21>

BATT_TEMP < 20> BATT_OVP <21> ADP_I <21>

HDI_B_DET <4>

DAC_BRIG < 5> EN_FAN1 <15> IREF <21> CHGVADJ <21>

EC_MUTE# <10>

WWAN_LED _EC# <15>

TP_CLK <15> TP_DATA <15>

XMIT_OFF# <8>

EN_WOL# <11> KILL_SW# <15> LID_SW# <14>

04/03 Delete Net : BT_LED_MO#, WLAN_LED_MO# and BT_WLAN_LED#

TP_DISABLE_BTN# < 15>

FSTCHG <21>

CHARGE_LED0# <15>

CAPS_LED# <15>

CHARGE_LED1# <15>

KILL_SW_LED# <15>

SYSON <4> VR_ON <4>

EC_RSMRST# <4>

EC_LID_OUT# <4> EC_ON <14> CMOS_ON# <5 >

BKOFF# <5>

BT_ON# <9>

WXMIT_OFF# <8>

TP_DISABLE_LED# <15>

SLP_S4# <4> ENBKL <5>

EAPD <10> EC_THERM# <4> SUSP# <4,17,21> PBTN_OUT# <4>

07/21 Change R178 from 33ohm to 47ohm

04/01 Delete JP8 (Space limit) Change U10 from SA00000XT00 to SA00001IT00 Add C209 (RF Recommend)

06/29 Change R178 from 15ohm to 33ohm

Place C209 close to U9

SPI_CLK_R

1

C209

22P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/20 2010/03/20

05/14 Move C209 from SPI_CLK to SPI_CLK_R (RF Recommend)

Compal Secret Data

Deciphered Date

1

C124

0.1U_0402_16V4Z

2

+3VALW +EC_AVCC

06/29 Change R193 from @ to mount (10kohm)

12

R193

10K_0402_5%

04/21 Change net from EN_WOL to EN_WOL#

05/11 Add Net : WWAN_LED_MO#

R236 0_0402_5%@R236 0_0402_5%@

1 2

1

C195

C195 100P_0402_50V8J

100P_0402_50V8J

2

RB751V-40TE17_SOD323-2

1 2

21

@D14

@

D14

R172 0_0402_5%R 172 0_0402_5%

16M SPI ROM

1

C137

0.1U_0402_16V4Z

2

FSEL#SPICS#

SPI_CLK

1 2

R177 0_0402_5%R177 0_0402_5%

1 2

R178 47_0402_5%R178 47_0402_5%

1 2

R179 0_0402_5%R179 0_0402_5%

1

C125

0.1U_0402_16V4Z

2

L19 FCM1608CF-121T03_2PL19 FCM1608CF-121T03_2P

L20 FCM1608CF-121T03_2PL20 FCM1608CF-121T03_2P

1 2

1

C126

0.1U_0402_16V4Z

2

ECAGND

1

C127

C127 1000P_0402_50V7K

1000P_0402_50V7K

2

C131

0.1U_0402_16V4Z

1

05/14 Add R242

SYSON

R242 10K_0402_5%R242 10K_0402_5%

1 2

USB_ON# <16>

BATT_OVP

BATT_TEMP

AC_IN

WWAN_LED _MO# <8,15>

1 2

C135 100P_0402_50V8JC135 100P_0402_50V8J

1 2

C136 100P_0402_50V8JC136 100P_0402_50V8J

1 2

C138 100P_0402_50V8JC138 100P_0402_50V8J

05/13 Reserve R236

AC_IN <4,19>

03/30 Change R172 from @ to mount Change D14,R173 from mount to @

ICH_POK

@

1 2

R173 2.2K_0402_5%

04/08 Change R173(@) from 4.7kohm to 2.2kohm

+3VALW

20mils

SPI_CS#

SPI_CLK_R

SPI_SIFWR#SPI_SI FRD#SPI_SO

Title

Size Document Number Rev

Custom

Date: Sheet

ICH_POK <4>

+3VS

SPI_CLK_R

U10

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L8005M2C-15G_SO8

NTUC0 IO/B LA-5501P Schematic

4

VSS

SPI_SO

1 2

2

Q

R180 0_0402_5%R 180 0_0402_5%

Compal Electronics, Inc.

EC_KB926D3/BIOS ROM

1

C128

C128 1000P_0402_50V7K

1000P_0402_50V7K

2

12

@

R176

R176 10_0402_5%

10_0402_5%

1

@

C139

4.7P_0402_50V8C

2

of

13 24Thursday, July 30, 2009

of

13 24Thursday, July 30, 2009

of

13 24Thursday, July 30, 2009

1.0

J1

2

112

JUMP_43X79@J1JUMP_43X79@

EC_ON<13>

ON/OFFBTN#

10K_0402_5%

EC_ON

R183

2

1

3

D15

D15 DAN202UT106_SC70-3

DAN202UT106_SC70-3

2

1 2

Function BTN Conn.

03/24 Change JP9 from 10pin to 8pin

05/19 Change JP9 pin definition

SMARTKEY_BTN#<13> WOWVIDEO_BTN#<13> WOWAUDIO_BTN#<13>

PWR_LED#<13,15>

+5VALW

ON/OFFBTN# SMARTKEY_BTN# WOWVIDEO_BTN# WOWAUDIO_BTN# PWR_LED#

+3VALW

R181

R181 100K_0402_5%

100K_0402_5%

1 2

13

D

G

Q14

S

SSM3K7002FU_SC70-3

05/12 Change Q14 from SB570020110 to SB000009610

10

9 8 7 6 5 4 3 2 1

05/19 Add C220

ON/OFF#

51_ON#

JP9

GND GND 8 7 6 5 4 3 2 1

ACES_85201-08051

51_ON#

C220 100P_0402_50V8J@C220 100P_0402_50V8J@

1 2

2

C208

1000P_0402_50V7K

1

03/31 Add C208,D22

12

D22

RLZ20A_LL34

ON/OFF# <13>

51_ON# <19>

LID Switch

+3VALW

C140

0.1U_0402_16V4Z

2

VDD

1

OUTPUT

GND

2

U11

1

APX9132ATI-TRL_SOT23-3

3

R182

R182 47K_0402_5%

47K_0402_5%

1 2

1

C141

C141 10P_0402_50V8J

10P_0402_50V8J

2

LID_SW# <13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

LID SW/PWR BTN Conn.

NTUC0 IO/B LA-5501P Schematic

of

14 24Thursday, July 30, 2009

of

14 24Thursday, July 30, 2009

of

14 24Thursday, July 30, 2009

1.0

5

4

3

2

1

ACES_85 208-24071

KSI[0..7]

KSO[0..15]

06/29 Change C147~C173 from @ to mount (100pF)

D D

KSI0

C147 100P_ 0402_50V8JC147 100P_ 0402_50V8J

KSI1

C149 100P_0402_50 V8JC149 100P_0402_50 V8J

KSI2

C151 100P_ 0402_50V8JC151 100P_ 0402_50V8J

KSI3

C153 100P_ 0402_50V8JC153 100P_ 0402_50V8J

KSI4

C155 100P_ 0402_50V8JC155 100P_ 0402_50V8J

KSI5

C157 100P_ 0402_50V8JC157 100P_ 0402_50V8J

KSI6

C160 100P_0402_50 V8JC160 100P_0402_50 V8J

KSI7

C162 100P_ 0402_50V8JC162 100P_ 0402_50V8J

KSO0

C164 100P_ 0402_50V8JC164 100P_ 0402_50V8J

KSO1

C166 100P_ 0402_50V8JC166 100P_ 0402_50V8J

KSO2

C168 100P_ 0402_50V8JC168 100P_ 0402_50V8J

KSO3

C172 100P_ 0402_50V8JC172 100P_ 0402_50V8J

C C

1 2

KSI[0..7] <13>

KSO[0..15] <13>

INT_KBD Conn.

KSO4

C148 100P_ 0402_50V8JC148 100P_ 0402_50V8J

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

1 2

C150 100P_0402_50 V8JC150 100P_0402_50 V8J

1 2

C152 100P_ 0402_50V8JC152 100P_ 0402_50V8J

1 2

C154 100P_ 0402_50V8JC154 100P_ 0402_50V8J

1 2

C156 100P_ 0402_50V8JC156 100P_ 0402_50V8J

1 2

C158 100P_0402_50 V8JC158 100P_0402_50 V8J

1 2

C161 100P_ 0402_50V8JC161 100P_ 0402_50V8J

1 2

C163 100P_ 0402_50V8JC163 100P_ 0402_50V8J

1 2

C165 100P_0402_50 V8JC165 100P_0402_50 V8J

1 2

C167 100P_ 0402_50V8JC167 100P_ 0402_50V8J

1 2

C169 100P_ 0402_50V8JC169 100P_ 0402_50V8J

1 2

C173 100P_ 0402_50V8JC173 100P_ 0402_50V8J

1 2

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

03/31 Change JP11 symbol Change JP11 pin definition

ACES_85 208-24071

26

GND2

25

GND1

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

JP11

To TP Module and TP/B Conn.

03/24 Add JP18 for TP module conn. 04/01 Change JP18 symbol (Layout space limit)

TP_DATA<1 3> TP_CLK<13 >

03/24 Add TP disable button and LED

1

@

C171

C171 100P_04 02_50V8J

100P_04 02_50V8J

2

1

2

03/24 Change JP12 from TP module conn. to TP/B conn.

+5VS

@

C170

C170 100P_04 02_50V8J

100P_04 02_50V8J

RIGHT_BTN # LEFT_BT N# TP_DATA TP_CLK

C159

0.1U_040 2_16V4Z

LEFT_BT N# RIGHT_BTN #

JP18

1 2 3 4 5 6

E&T_691 6-Q06N-00R

CONN@

JP12

1

2

3

4

5

G1

6

G2

ACES_85 201-0405N

05/05 Change SW1,LED1,R196 from mount to @

04/09 Change JP11 pin definition

5

TP_DISABL E_BTN#<1 3>

05/18 Add C216 (EMI recommend)

C216 0.1U_0402_16V 4Z@C216 0.1U_040 2_16V4Z@

R196

+5VS

1 2

820_040 2_5%

2 1

@

TP_DISABL E_BTN#

LED1

@LED1

@

HT-191NB _BLUE_0603

2

1

SMT1-05_ 4P

SMT1-05_ 4P SW1

SW1

@

6

4

3

TP_DISABL E_LED# <13 >

B B

+5VALW +5VS

05/14 Add R238 06/14 Change D18 from mount to @ Change R238 from @ to mount

HDD_LED #<4>

D18 RB751 V-40TE17_SOD3 23-2@D18 RB751V-40 TE17_SOD323-2@

R238 0_0402 _5%R238 0_0402_5%

1 2

CLK_48M _CR<4>

USB20_N 6< 4> USB20_P 6<4>

21

+USB_VC CB

EN_FAN1<13>

CAPS_LE D#<13> NUM_LED #<13>

INT_MIC_L<10 >

HP_OUTL<10> HP_OUTR<10> PLUG_IN<10>

CLK_48M _CR EN_FAN1

USB20_N 6

USB20_P 6

NUM_LED #

BT_W LAN_LED# WW AN_LED#

INT_MIC_L

HP_OUTL HP_OUTR EXT_MIC_R PLUG_IN

Audio Board Conn.

JP13

GMD41GND 393940 373738 353536 333334 313132 292930 272728 252526 232324 212122

19

19 171718

15

15 131314 111112 9910

7

5

3

1

ACES_87 242-4001-09

42 40 38 36 34 32 30 28 26 24 22 20

20

18 16

16

14 12 10 8

8

6

4

2

FAN_SPE ED1

USB20_N 0 USB20_P 0

KILL_SW #CAPS_LE D# KILL_SW _LED# PWR_ LED# CHARGE_ LED0# CHARGE_ LED1#

EXT_MIC_L

MIC_JD

+3VALW

FAN_SPE ED1 <13>

USB20_N 0 <4> USB20_P 0 <4>

KILL_SW # <13> KILL_SW _LED# <13 > PWR_ LED# < 13,14> CHARGE_ LED0# <13> CHARGE_ LED1# <13>

EXT_MIC_L < 10>

EXT_MIC_R <10>

MIC_JD <10>

04/03 Add U16,Q24,Q25,R212

WLAN _LED_MO#<8>

BT_LED_ MO#<9 >

WLAN _LED_MO#

BT_LED_ MO#

+3VS

5

2

P

B

4

Y

1

A

G

3

U16

U16 NC7SZ08 P5X_NL_SC70-5

NC7SZ08 P5X_NL_SC70-5

+5VS

12

13

D

2

G

S

R212

10K_040 2_5%

Q24

Q24 SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

13

2

G

BT_W LAN_LED#

D

S

Q25

Q25 SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

04/07 Change JP13.9 from GND to INT_MIC_L

A A

R200 0_0402 _5%R200 0_0402_5%

WW AN_LED_MO#<8,1 3> WW AN_LED_EC#<13>

WW AN_LED_EC#

1 2

R201 0_0402 _5%@R201 0_040 2_5%@

1 2

03/25 Add R200,R201 for WWAN LED

5

03/24 Change JP13 from 30pin to 40pin 03/31 Change JP13 symbol and pin definition

WW AN_LED#W WAN_LE D#WW AN_LED_MO#

4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2009/03/ 20 20 10/03/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

KBD/TP/Audio Conn.

NTUC0 IO/B LA-5501P Schematic

1

of

15 24Thursday, July 30, 2009

of

15 24Thursday, July 30, 2009

of

15 24Thursday, July 30, 2009

1.0

A

1 1

2 2

B

+USB_VCCA

04/02 Add C212

1

C212

C212 10U_0805_10V4Z

10U_0805_10V4Z

2

+USB_VCCA

1

+

C175

@

150U_D2_6.3VM

2

1

C178

C178 470P_0402_50V7K

470P_0402_50V7K

2

C

D

L21

@L21

@

1

4

WCM2012F2SF-121T04_4P

1 2 1 2

2

3

W=40mils

1

C174

C174 470P_0402_50V7K

470P_0402_50V7K

2

1

4

USB20_N1<4> USB20_P1<4>

USB20_N1 USB20_P1

R205 0_0402_5%<EMI>R2 05 0_0402_5%<EMI> R206 0_0402_5%<EMI>R2 06 0_0402_5%<EMI>

03/26 Add L21,L22,R205,R206,R207,R208 for USB (EMI Recommend)

L22

@L22

@

1

4

WCM2012F2SF-121T04_4P

1 2 1 2

2

3

W=40mils

1

4

USB20_N2<4> USB20_P2<4>

USB20_N2 USB20_P2

R207 0_0402_5%<EMI>R2 07 0_0402_5%<EMI> R208 0_0402_5%<EMI>R2 08 0_0402_5%<EMI>

USB20_N1_R USB20_P1_R

USB20_N2_R USB20_P2_R

E

RIGHT USB Conn. 1

JP14

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020167MR004S511ZR

ME@

RIGHT USB Conn. 2

JP15

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020167MR004S511ZR

ME@

03/31 Change JP14,JP15 connector

04/03 Swap SATA TX and RX

SATA_ITX_DRX_P2_C<4> SATA_ITX_DRX_N2_C<4>

SATA_IRX_DTX_N2_C<4> SATA_IRX_DTX_P2_C<4>

U13

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

1

USB_ON#<13>

C176

0.1U_0402_16V4Z

3 3

2

4

EN

RT9715BGS_SO8

1

C221

@

100P_0402_50V8J

2

FLG

05/19 Add C221

U15

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

1

USB_ON#<13>

C194

0.1U_0402_16V4Z

2

4 4

4

EN

RT9715BGS_SO8

FLG

8 7 6 5

+USB_VCCA+5VALW

USB_OC#12

+USB_VCCB+5VALW

R203 0_0402_5%R203 0_0402_5%

1 2

R204 0_0402_5%R204 0_0402_5%

1 2

1

@

C177

C177 1000P_0402_50V7K

1000P_0402_50V7K

2

1

@

C193

C193 1000P_0402_50V7K

1000P_0402_50V7K

2

USB_OC#1 <4>

USB_OC#2 <4>

USB_OC#0 <4>

06/30 Delete C181,C182, add R245,R246

SATA_ITX_DRX_P2_C SATA_ITX_DRX _P2 SATA_ITX_DRX_N2_C SATA_ITX_DRX_N2

SATA_IRX_DTX_N2_C SATA_IRX_DTX_N2 SATA_IRX_DTX_P2_C SATA_IRX_DTX _P2

R245 0_0402_5%R245 0_0402_5%

1 2

R246 0_0402_5%R246 0_0402_5%

1 2

C180 0.01U_0402_16V7KC180 0.01U_0402_16V 7K

1 2

C179 0.01U_0402_16V7KC179 0.01U_0402_16V 7K

1 2

JESAT1

1

GND

2

SATA_TXP

3

SATA_TXN

4

GND

5

SATA_RXN

6

SATA_RXP

7

GND

8

GND

9

GND

10

GND

11

GND

TAITW_PSABT4-07MNBS 1_NR

ME@

ESATA Conn.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

USB Conn./eSATA Conn.

NTUC0 IO/B LA-5501P Schematic

E

of

16 24Thursday, July 30, 2009

of

16 24Thursday, July 30, 2009

of

16 24Thursday, July 30, 2009

1.0

A

B

C

D

E

05/13 Change Q15 from SB548000310 to SB000009580

05/13 Delete C183,C184

1 1

B+

+5VALW TO +5VS

+5VALW

8 7 6 5

1 2

R187

R187 33K_0402_5%

33K_0402_5%

SUSP

2

G

Q15

1

S

D

2

S

D

3

S

D

4

G

D

AO4468_SO8

13

D

Q17

S

SSM3K7002FU_SC70-3

+5VS

1

C187

0.1U_0603_25V7K

2

05/13 Change C185 from mount to @

1

C185

@

10U_0805_10V4Z

2

1

C186

C186 1U_0603_10V4Z

1U_0603_10V4Z

2

R186

R186 470_0603_5%

470_0603_5%

1 2

13

D

2

G

Q16

S

SSM3K7002FU_SC70-3

SUSP

1

C206

<EMI>

0.1U_0402_16V4Z

2

06/26 Add C226,C227 close to H8 (EMI Recommend)

+5VS +3VS

1

C226

<EMI>

0.1U_0402_16V4Z

2

1

C227

<EMI>

0.1U_0402_16V4Z

2

03/30 Add C206,C207 (EMI Recommend)

05/13 Change Q18 from SB548000310 to SB000009580

2 2

05/13 Delete C188,C189

B+

+3VALW TO +3VS

+3VALW

8 7 6 5

1 2

R189

R189 47K_0402_5%

47K_0402_5%

SUSP

2

G

Q18

1

S

D

2

S

D

3

S

D

4

G

D

AO4468_SO8

13

D

Q20

S

SSM3K7002FU_SC70-3

1

2

05/13 The value of R187,C187,R189,C192 follow KHLBX

+3VS

05/13 Change C190 from mount to @

1

2

C192

0.1U_0603_25V7K

C190

@

10U_0805_10V4Z

1

C191

C191 1U_0603_10V4Z

1U_0603_10V4Z

2

R188

R188 470_0603_5%

470_0603_5%

1 2

13

D

S

1

2

SUSP

2

G

Q19

Q19 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

C207

<EMI>

0.1U_0402_16V4Z

2

G

+5VALW

12

13

D

S

R195

R195 100K_0402_5%

100K_0402_5%

SUSP

05/12 Change Q21 from SB570020110 to SB000009610

Q21

Q21 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

3 3

SUSP#<4,13,21>

12

R241

10K_0402_5%

05/14 Add R241

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

NTUC0 IO/B LA-5501P Schematic

E

of

17 24Thursday, July 30, 2009

of

17 24Thursday, July 30, 2009

of

17 24Thursday, July 30, 2009

1.0

05/05 Change H1 from H_3P1X4P1N to H_3P1X4P1

FM2@FM2

FM1@FM1

H1

H1 H

H

H3

H3 H

H

@

1

H2

H2 H

H

@

1

H4

H4 H

H

@

1

H6

H6 H

H

@

1

05/12 Delete H5

FM3@FM3

FM4@FM4

@

1

H_3P1NH_3P1X4P1

H14

H14 H

H

@

1

FIDUCIAL_C40M80

1

H11

05/05 Add H11 (H_0P8X6P0)

H

H_0P8X6P0

@

1

05/21 Change H14 from H_3P2 to H_3P5

05/05 Delete H10

H8

H9

H7

H7 H

H

@

1

H9

H

@

1

H_2P8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/20 2010/03/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Screw

NTUC0 IO/B LA-5501P Schematic

of

18 24Tuesday, July 21, 2009

of

18 24Tuesday, July 21, 2009

of

18 24Tuesday, July 21, 2009

1.0

A

B

C

D

VIN

TARNG_TB2061HNR-0 2@

2

1

PJP1

1 1

APDIN

PC1

1000P_0402_50V7K

12

PL1

FBMA-L11-321611-121LM A_2

1 2

12

PC2

100P_0402_50V8J

12

PC3

100P_0402_50V8J

12

PC4

1000P_0402_50V7K

Vin Detector

High 17.944 17.706 17.470 Low 16.242 16.027 15.808

PR6

PR6 1M_0402_1%

1M_0402_1%

VINDE-2

1 2

2 2

PC9

VIN

12

PR8

PR11

84.5K_0402_1%

90.9K_0402_1%

12

PR14

90.9K_0402_1%

1 2

22K_0402_1%

VINDE-3

12

PC10

0.1U_0402_16V7K

VINDE-1

12

1000P_0603_50V7K

VS

8

5

+

6

-

4

PR16

PR16 10K_0402_1%

10K_0402_1%

P

G

12

PC6

0.01U_0402_25V7K

PU5B

LM358DT_SO8 <BOM Struc ture>

7

1 2

0

10K_0402_1%

10K_0402_1% PR12

PR12

RTCVREF

3.3V

VIN

12

PR9

10K_0805_5%

@

12

PD3

RLZ4.3B_LL34

PR10

PR10 10K_0402_1%

10K_0402_1%

1 2

PACIN

12

PR15

10K_0402_1%

AC_IN <4,13>

PACIN <21>

VIN

PD4

PD4 RLS4148_LL34-2

13

PR20

RLS4148_LL34-2

1 2

51ON-1

12

PR21

PR21 68_1206_5%

68_1206_5%

12

PC13

0.1U_0603_25V7K

VS

RTC Battery

BATT1

- +

MAXEL_ML1220T10@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PD6

1 2

RB751V-40TE17_SOD323- 2

SP093MX0000

Compal Secret Data

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

+RTCBATT

+CHGRTC

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

NTUC0 I/O

DCIN & DETECTOR

D

of

19 23Thursday, July 30, 2009

0.1

3 3

PR22

200_0603_5%

1 2

100K_0402_1%

PR24

22K_0402_1%

1 2

RTCVREF

3.3V

12

PR23

G920AT24U_SOT89-3

3

OUT

PC14

PC14 10U_0805_6.3V6M

10U_0805_6.3V6M

TP0610K-T1-E3_SOT23- 3

51ON-2

PC12

1 2

0.22U_0603_25V7K

51ON-3

PU3

2

IN

GND

1

PQ3

CHGRTCIN

2

12

PR25

PR25 200_0603_5%

200_0603_5%

12

PC15

PC15 1U_0805_25V4Z

1U_0805_25V4Z

68_1206_5%

BATT+

CHGRTCP

PD5

PD5 RLS4148_LL34-2

RLS4148_LL34-2

51_ON#<14>

PR26

560_0603_5%

+CHGRTC

4 4

1 2

RTCVREF-1

PR27

560_0603_5%

1 2

A

1 1

B

C

D

DC040003600

PJP2

2 2

G1 G2

SUYIN_200275MR009G180ZR

@

3 3

BATT++

1

2

ID

3

BI

4

5

6

7

8

9

10 11

TS_A EC_SMDA EC_SMCA GND

12

PR96

12

PR93

100_0402_1%

PR18

1 2

100K_0402_1%@

PR92

1K_0402_1%

1 2

PR94

1K_0402_1%

+3VALW

PR95

1K_0402_1%

1 2

PR17

@PR1 7

@

100K_0402_1%

1 2

PR91

6.49K_0402_1%

+3VALW

VMB

12

PC65

1000P_0402_50V7K

+3VALW

BATT_TEMP <13>

EC_SMB_DA1 <13>

EC_SMB_CK1 <13>

PC64

1000P_0402_50V7K

PJ5

@PJ 5

@

PAD-OPEN 3x3m

1 2

BATT+

12

PC66

0.01U_0402_50V7K

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2008/6/222007/6/22

Title

S

ize D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Compal Electronics, Inc.

NTUC0 I/O

BATTERY CONN / OTP

D

0.1

20 23Thursday, July 30, 2009

0.1

5

4

3

2

1

B+

P2 P3

PQ5

PD7

B340A_SMA2

12

VIN

2

G

PACIN<19>

ACON

ACOFF<13>

12

PR39

FCLP-1

47K_0402_5%

13

D

2N7002KW_S OT323-3

S

D D

C C

B B

DTA144EUA_SC70-3

PQ7

2

FCLP-2

13

2

PQ10

PACIN

ACOFF

DTC115EUA_SC70-3

1 3

PQ8

DTC115EUA_SC70-3

PR50

3K_0402_1%

1 2

2

PQ14

CC=~1.5A

12

PC21

0.1U_0603_25V7K

P2-1

12

P2-2

13

D

2

G

S

13

IREF=1.1*Icharge

PQ16

PQ16 TP0610K-T1-E3_SOT23- 3

TP0610K-T1-E3_SOT23- 3

P3

A A

12

PR67

100K_0402_1%

P3-1

DTC115EUA_SC70-3

2

PR69

PR69 100K_0402_1%

100K_0402_1%

5

PQ17

6251_DCIN

13

P3-2

12

13

P3-3

1

2

PQ5 AO4407_SO8

AO4407_SO8

1 2 3 6

4

PR40

200K_0402_1%

Iada=0~2.368A (45W) CP = 2 A

FSTCHG<13 >

PR46

150K_0402_1%

PC32

PQ13

2N7002KW_SOT323-3

IREF<13>

1 2

0.01U_0402_25V7K

ADP_I< 13>

PR57

10K_0402_1%

Connect to EC A/D Pin.

CHGVADJ=(Vcell-4)* 10.019

Vcell

4V

4.2V

4.35V

CP mode Vaclim=2.39V CP=2A

FSTCHG

2

SUSP#

3

PD12

PD12 RB715F_SOT323-3

RB715F_SOT323-3

8 7

5

6251_VCOMP-1

12

PR60

100K_0402_1%

CHGVADJ<13 >

PD10

RB751V-40TE17_SOD323- 2

1 2

PR43

10K_0402_1%

1 2

0.1U_0402_16V7K

PC31 6 800P_0402_25V7KPC31 6800P_0402_25V7K

1 2

PR51 6 .81K_0402_1%PR51 6.81K_0402_1%

1 2

PC34

PC34 100P_0402_50V8J@

100P_0402_50V8J@

PC35

0.1U_0402_16V7K

6251_VREF

12

PC40

0.01U_0402_25V7K

CHGVADJ

2.0058V

FSTCHG <13>

SUSP# <4,13,17>

4

PR38

0.05_1206_1%

1

2

12

PC27

1 2

PR58

PR58 0_0402_5%

0_0402_5%

1 2

@PR6 1

@

31.6K_0402_1%

PR62

18.2K_0402_1%

1 2

PJ1

6251_DCIN

6251_CSON

12

PC29

0.047U_0402_16V7K

6251_CSOP

6251_CSIN

PC33

0.1U_0402_16V7K

6251_CSIP

1 2

LX_CHG

DH_CHG

2.2_0402_5%

BST_CHG

6251VDDP

DL_CHG

PJ1

2

JUMP_43X79@

PC28

0.1U_0603_25V7K

12

1 2

PR48

20_0402_5%

1 2

PR55

1 2

12

PC41

4.7U_0805_6.3V6K

10K_0402_1%

PR66

1 2

4

3

6251_VDD

12

PC26

12

PR45

6251_EN CSON

100K_0402_1%

6251_VDD

6251_ICOMP

6251_VCOMP

6251_ICM

1 2

PR53

PR53 100_0402_1%

100_0402_1%

6251_VREF

6251_CHLIM

6251_ACLIM

12

PR61

PR63

31.6K_0402_1%

2.2U_0603_6.3V6K

6251_VADJ

12

PU4

1

VDD

2

ACSET

ACPRN

3

EN

CSON

4

CELLS

CSOP

5

ICOMP

6

VCOMP

7

PHASE

ICM

8

UGATE

VREF

9

CHLIM

BOOT

10

ACLIM

VDDP

11

VADJ

LGATE

12

PGND

GND

ISL6251AHAZ-T_QSOP24

DCIN

CSIN

CSIP

24

23

22

21

20

19

18

17

16

15

14

13

BATT_OVP<13>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

112

CSIN CSIP

PR47

20_0402_5%

1 2

12

PR49

20_0402_5%

PR52

2.2_0402_5%

0.1U_0603_25V7K

BST_CHGA

12

PD11

PD11 RB751V-40TE17_SOD323- 2

RB751V-40TE17_SOD323- 2

1 2

PR59

4.7_0402_5%

1 2

PC22

10U_1206_25V6M

CSOP

PC36

12

6251_VDD

LM358DT_SO8

LM358DT_SO8 PU5A

PU5A

Compal Secret Data

8

P

1

0

G

4

OVP_3

Deciphered Date

CHG_B+

PQ6

PQ6 FDS4435BZ_SO8

PL3

4.7_1206_5%@

680P_0603_50V7K@

DISCHG_G

1 2

DISCHG-1

13

FDS4435BZ_SO8

1

S

2

S

3

S

4

G

1 2

PR41

47K_0402_1%

1

DISCHG-2

2

CHGCHG

8

D

7

D

6

D

5

D

VIN

PD9

PD9 RB715F_SOT323-3

RB715F_SOT323-3

3

2

PC30

0.1U_0603_25V7K

PR54

0.05_1206_1%

1

2

ACOFF

DISCHG-3

12

4

3

PR44

200K_0402_1%

1 2

13

D

PACIN

2

G

PQ12

S

2N7002KW_S OT323-3

12

PC37

PC38

@

10U_1206_25V6M

VIN

BATT+

12

PC39

10U_1206_25V6M

PC25

1 2

PC23

10U_1206_25V6M

PC25

1 2

2200P_0402_50V7K

5

4

5

4

BOM Structu re =

PR42

10K_0402_1%

PQ9

DTC115EUA_SC70-3

PQ11

123

PQ15

123

DTC115EUA_SC70-3

SIS412DN-T1-GE3_POW ERPAK8-5

10UH_PCMB063T-100MS _4A_20%

1 2

12

PR56

6251_SNB

12

PC42

SI7716ADN-T1-GE3_POWERPAK8-5

VMB

12

PR64

VS

PR64

340K_0402_1%

LI-3S :18V----BATT-OVP=2 V

BATT-OVP=0.1112*VMB

OVP_1

12

PR65

PR65 499K_0402_1%

499K_0402_1%

OVP_2

3

+

2

-

2

12

PR68

105K_0402_1%

2008/6/222007/6/22

Per cell=4.5V

12

PC44

0.01U_0402_25V7K

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Date: Sheet

Compal Electronics, Inc.

NTUC0 I/O

1

CHARGER

of

21 23Thursday, July 30, 2009

of

21 23Thursday, July 30, 2009

of

21 23Thursday, July 30, 2009

0.1

5

4

3

2

1

SN0806081_B+

12

PC67

0.1U_0402_25V6

PL4

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

12

PR73

4.7_1206 _5%

5V_SNB

12

PC57

680P_06 03_50V8J

12

PC47

PC48

2200P_0402_50V7K

10U_1206_25V6M

2200P_0402_50V7K

12

PR76

PR78

+5VALWP Imax=4.2A Ipeak=6A Iocp(minimum)=8.28A f=400K hz

PJ3

112

JUMP_43 X118@

PJ4

112

JUMP_43 X118@

+5VALWP

1

+

61.9K_0402_1%@

1 2

0_0402_5%

+

PC58

2

150U_B2_6.3VM_R45M

12

PC46

2200P_0402_50V7K

1 2

PQ23TP0 610K-T1-E3_SOT 23-3 PQ23TP0 610K-T1-E3_SOT 23-3

PR88

0_0402_ 5%

SN0806081_B+

5

PQ18

4

SIS412DN-T 1-GE3_POWE RPAK8-5

123

5

PQ20

4

SI7716ADN -T1-GE3_POW ERPAK8-5

123

PR81

100K_04 02_1%

PR83

1 2

200K_0402_1%

150K_0402_1%

12

1 2

PC59

0.22U_06 03_25V7K

PC60

0.22U_06 03_25V7K

1 2

VL

PR97

1 2

12

PC69

2200P_0402_50V7K

0_0402_ 5%

1 2

BST3A-1

PR71

PR71 0_0603_ 5%

0_0603_ 5%

PC54

0.1U_060 3_25V7K

2VREF_S N0806081

1 2

PR89

47K_040 2_5%@

1 2

12

PC62

0.047U_0402_16V7K

PR70

PC49

0.1U_060 3_25V7K

DH3

BST3A

12

LX3

DL3

FB3

VL

2VREF_SN0806081

EN_LDO

3/5V_EN1

3/5V_EN2

1 2

12

2VREF_SN0806081

PC63

0.047U_0402_16V7K@

1 2

33

26

24

25

23

30

32

1

8

20

4

14

27

PR86

PR86 0_0402_ 5%

0_0402_ 5%

3/5V_VIN

6

TP

UGATE2

BOOT2

PHASE2

LGATE2

OUT2

REFIN2

REF

LDOREFIN

NC

EN_LDO

EN1

EN2

5

3/5V_NC

12

PC61

1U_0603_10V6K

VL

1 2

PC50

3/5V_VCC

3

VIN

VCC

TON

NC

2

3/5V_TON

12

PR90

PR90 0_0402_ 5%

0_0402_ 5%

2VREF_SN0806081

12

1U_0603_10V6K

PC51

7

4.7U_0805_6.3V6K

19

LDO

PVCC

15

UGATE1

17

BOOT1

16

PHASE1

18

LGATE1

22

PGND

10

OUT1

11

FB1

9

BYP

29

SKIP

28

POK2

13

POK1

12

ILIM1

31

ILIM2

GND

PU6

21

SN08060 81RHBR_QFN32 _5X5

1U_0603 _10V6K

1 2

DH5

BST5A

PR74

PR74 0_0603_ 5%

0_0603_ 5%

LX5

DL5

FB5

3/5V_SKIP

ILIM1

ILIM2

PC52

BST5A-1

12

PC55

0.1U_060 3_25V7K

PR79 0_04 02_5%@PR79 0_ 0402_5%@

PR80 0_04 02_5%@ PR80 0_0402 _5%@

1 2

PR82 0_04 02_5%PR82 0_04 02_5%

1 2

PR84

PR84 301K_04 02_1%

301K_04 02_1%

PR85

PR85 301K_04 02_1%

301K_04 02_1%

1 2

12

2VREF_S N0806081

12

5

4

5

4

12

PQ19

SIS412DN-T 1-GE3_POWE RPAK8-5

123

PQ21

123

SI7716ADN-T1-GE3_POWERPAK8-5

VL

+3VALWP +3VALW

+5VALWP +5VALW

2

B+

PJ2

2

112

JUMP_43 X79@

D D

+3VALWP

1

+

PC53

2

C C

150U_B2_6.3VM_R45M

JUMP_43 X79@

12

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1 2

PR75

0_0402_5%

1 2

680P_06 03_50V8J

PR77

10K_0402_1%@

1 2

12

PC68

PC45

0.1U_0402_25V6

PL5

PR72

4.7_1206 _5%

PC56

10U_1206_25V6M

12

3V_SNB

12

+3VALWP Imax=3.5A Ipeak=5A Iocp(minimum)=8.26A f=300k hz

PD14

RLZ5.1B_ LL34

VS

B B

MAINPW ON<4>

A A

RLZ5.1B_ LL34

1 2

EN_LDO-1

2

1 3

PD15

@ PD15

@

RB751V-4 0TE17_SOD323 -2

1 2

Security Class ification

2007/06/ 22 20 08/06/22

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/06/ 22 20 08/06/22

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

NTUC0 I/O

Size Document Number Rev

Thursday, July 30, 2009

Date: Sheet

2

Date: Sheet

3V/5V

1

of

22 23

of

22 23

of

22 23

0.1Custom

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1 for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

D D

1

2

3

4

5

change CP to 2A B change PR58 3.48k to 0 ohm

follow command design

PULL HIGH VL Add PR97 to 150K

change skip mode

connect mainpwon Add PR88

B

Del PD13, PD15 Add PQ23

Del PR80 Add PR82

6

7

C C

8

9

10

11

RF request Add PC67 PC68

change charger output cap location for DFX change PC38 to PC39

change 50m ohm 1W current sense to 50m ohm 1/2W for 2nd source complete replace

change PN form dell part to non dell part change PC67,PC68 PN

reduce mainpwon singal noise for hw request. Reserve PC69 space.

reduce leakage current Remove PR61 C 7/15

B

C

change PR38 from 50m ohm 1w to 1/2w

C

Add PC69 CAP placement

12

13

14

B B

15

16

17

18

19

20

21

A A

22

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document N umber Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

NTUC0 I/O

<Doc>

PIR (PWR)

23 23Thursday, July 30, 2009

1

0.1

of

0.1

5

4

3

2

1

Version change list (P.I.R. List)

Page 1 of 2 for HW

Reason for change PG# Modify List Date PhaseItem

1

D D

2

3

4

5

6

7

8

9

C C

10

11

12

13

14

15

16

17

B B

18

19

20

21

22

23

24

25

A A

26

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/03/20 2010/03/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HW (PIR)

NTUC0 IO/B LA-5501P Schematic

1

of

24 23Thursday, July 30, 2009

of

24 23Thursday, July 30, 2009

of

24 23Thursday, July 30, 2009

0.1

COMPAL LA-5501P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual