Compal LA-5481P NCWG0, LA-5481P NCWH0 Schematic

A

1 1

B

C

D

E

2 2

Compal Confidential

NCWG0/H0 Schematics Document

AMD S1g1 / RS780MN/ SB710

2009 / 05 / 19

3 3

4 4

LA-5481 Rev:0.2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2010/03/12

C

Compal Secret Data

Deciphered Date

Title

Cover Sheet

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

D

Date: Sheet

147Wednesday, May 20, 2009

of

E

of

0.1

5

4

3

2

1

Compal confidential

Project Code: NCWG0/H0 File Name : LA-5481P

Thermal Sensor ADM1032ARM

Clock Generator

SLG8SP626 ICS9LPRS488BKLFT

D D

page 8 page 17

AMD S1g1 CPU

638P PGA

H_A#(3..31) H_D#(0..63)

page 6,7,8,9

HT 16x16 1000MHZ

533/667/800

DDRII DDRII-SO-DIMM X2

page 10,11

Dual Channel

CRT

page 24

ATI-RS780MN

465 BGA

LCD CONN

page 25

page 12,13,14,15,16

A-Link Express

PCIE X1

C C

Mini card WLAN

10/100 LAN

AR8114 / AR8132

page 26page 31

ATI-SB700

549 BGA

page 18,19,20,21,22

RJ45 CONN

page 27

LPC BUS

B B

ENE KB926

Power On/Off CKT / LID switch / Power OK CKT

page 37

DC/DC Interface CKT.

page 41

CIR/LED

page 38

RTC CKT.

page 18

Ver:D3

page 28

4 x PCIE

Int. KBD

page 29

USB 2.0

HD Audio

SATA0

SATA2

Camera

HDA Codec ALC272

page 39

MDC Conn.

page 41

HDD Conn.

ODD Conn.

page 23

SATA1

USB conn X2

AMP & Audio Jack

TPA6017

page 40

Second HDD/ODD

HDD Conn.

CardReader RTS5159

HeadPhone Out

MIC In

Touch Pad

Power Circuit DC/DC

page 42~48

CONN.

page 29

SPI BIOS

page 30

SATA3

ODD Conn.

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

BLOCK DIAGRAM

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

247Wednesday, May 20, 2009

1

0.1

of

5

Voltage Rails

D D

C C

VIN B+ +CPU_CORE +0.9V +1.2V_HT +1.5VS +1.8V +1.8VS +2.5VS +3VALW +3VS +5VALW +5VS +VSB +RTCVCC

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU

0.9V switched power rail for DDR terminator

1.2V switched power rail

1.5V switched power rail

1.8V power rail for DDR

1.8V switched power rail

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail 5V always on power rail 5V switched power rail VSB always on power rail RTC power

4

ON

OFF OFF OFF

ON ON

ON ON ON ON ON ON ON

OFF OFF ON OFF ON OFF

ON

ON*

OFF ON* OFF ON* OFF ON*ON ON

3

SIGNAL

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

SLP_S1# SLP_S3#

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

HIGH

LOW

S4 (Suspend to Disk)

S5 (Soft OFF)

LOW LOW LOW LOW

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2

LOWLOWLOW

ON

HIGHHIGHHIGH

HIGH

V typ

AD_BID

ON

OFF

ON

OFF

ON

V

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

ON ON

ON

OFF

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

1

LOW

OFF

max

BOARD ID Table

External PCI Devices

Device

IDSEL#

REQ#/GNT#

Interrupts

Board ID

0 1 2 3 4 5

PCB Revision

No Support VaryBright

Support VaryBright

BTO Item BOM Structure

10/100 Lan 8114@ GIGA Lan 8132@ 17" ID 17@ 15" ID 15@

6 7

B B

EC SM Bus1 address

Device

Smart Battery

Address Address

EC SM Bus2 address

Device

ADM1032

1001 100X b0001 011X b

PROJECT ID Table

SKU ID

0

SKU

NCWG0

1 2 3

NAL00

4 5

SB600 SM Bus 1 address

Device

Clock Generator

A A

DDR DIMM0 DDR DIMM2 Wireless Lan

5

Address

1101 001Xb

1001 000Xb 1001 010Xb

SB600 SM Bus 2 address

Device Address

New Card

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

6 7

2009/03/08 2010/03/12

NCWH0

Compal Secret Data

Deciphered Date

2

BTO Option Table

VARY@Support VaryBright

Title

TABLE OF CONTENTS

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

347Wednesday, May 20, 2009

of

1

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0.1

5

4

3

2

1

DDR_A_CLK[1..2]

DIMMA

D D

CPU CLK

200MHZ

H_CLKI[1:0] Host Bus

C C

SBLINK_CLK

CPU S1G1 SOCKET

DDR_B_CLK[1..2]

H_CLKO[1:0]

100MHZ

14.31818MHz

EXTERNAL CLK GEN. SLG8SP626 / ICS9LPRS488

NBSRC_CLK

100MHZ

HTREFCLK

66MHZ

ATI NB RS780MN

NB_OSC

14.318MHZ

DIMMB

B B

CLK_PCIE_MINI

100MHZ

Mini PCI Socket Mini card

A A

5

CLK_PCIE_LAN

100MHZ

LAN Atheros AR8114/AR8132

4

CLK_14M_SB

14.318MHZ

SB_OSCIN

14.318MHZ

SBSRC_CLKP

100MHZ

CLK_48M_USB

48MHZ

ATI SB SB700

RTC SATA

32.768K Hz

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

25M Hz

2005/10/10 2010/03/12

CLK_PCI_LPC

33MHZ

Compal Secret Data

Deciphered Date

EC ENE KB926D3

32.768K Hz

2

Title

CLOCK DISTRIBUTION

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

447Wednesday, May 20, 2009

of

1

of

0.1

5

AC ADAPTOR 19V 65W

D D

BATTERY

11.1V

2.2Ah/6-cell

C C

VIN

BATT+

PU17 BATTERY CHARGER BQ24751ARHDR

B+

4

PU12 ISL6264CRZ-T

PU18 ISL6228HRTZ-T

PU19 TPS51117RGYR

PU16 ISL6237IRZ-T

+5VALW

3

+CPU_CORE 0.9V

+1.2VALW

+NB_CORE

U46 AO4430

+1.2V_HT

2

PU21 APL5915KAI

+2.5VS

1

CPU

AMD S1G1 socket

VDDA 2.5V VDD VDDIO VTT VLDT

0.95V

1.8V

0.9V

1.2V

DDRII SODIMMX2

+1.2VALW

+1.8V

PU22 APL5331KAC

+0.9V

VDD_MEM

VTT_MEM

NB

RS780MN

VDDC VDD_HT PLLVDD VDDPCIE VDDHTRX

+1.8V

+3VS

+1.2VALW

PU20 APL5912 KAC-TRL

+1.1VS

+1.2VALW

VDDHTTX AVDDQ AVDDDI PLLVDD18 VDDA18HTPLL VDDA18PCIE VDDA18PCIEPLL VDD18 VDDLT18 VDDLTP18 AVDD VDD33

+3VALW

+3VS

U41 AO4468

+1.8V

U37 AO4430

PU23 APL5915KAI

+1.5VS

+1.8VS

1.8V

0.9V

1.0-1.1V

1.1V

1.2V

1.8V

3.3V

250 mA

24.5 A

3.6 A

1.75 A

500 mA

6.08 A

500 mA

10 A 680 mA 65 mA

2.5 A 680 mA 400 mA 4 mA 20 mA 20 mA 20 mA 700 mA 120 mA 10 mA 300 mA 15 mA 110 mA 60 mA

U7

B B

U4 TPS2061DRG4

+5VS

+USB_VCCA

+3VS

USB X2

+5V Dual

1.5A

A A

LCD panel

15.6"

B+ 300mA

Audio AMP TPA6017A2

+5V 25mA

+3.3 350mA

5

FAN Control APL5607

+5VS 500mA

Audio Codec ALC272

+5V 45mA +3.3VS 25mA

Realtek RTS5159

+3.3VS 300mA

AO4468

+5VS

EC ENE KB926

+3.3VALW 30mA +3.3VS 3mA

LAN Atheros AR8114

+3.3VALW 201mA

Mini Card

+1.5VS 500mA +3.3VS 1A +3.3VALW 330mA

ICS9LPRS488B

+3.3V 400mA +1.2V

SATA

Security Classification

+5V 3A +3.3V

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/3/8 2010/03/12

Compal Secret Data

Deciphered Date

+1.2V_HT

2

RTC Bettary

Title

POWER DELIVERY CHART

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

SB700

SB

VDD S5_1.2V USB_PHY_1.2V AVDDCK_1.2V CKVDD_1.2 PCIE_PVDD PCIE_VDDR AVDD_SATA PLLVDD_SATA_1 S5_3.3V AVDDC AVDD TX/RX VDDQ VDD33_18 AVDDCK_3.3V XTLVDD_SATA

VBAT

547Wednesday, May 20, 2009

1

1.2V

3.3V

3V

of

510mA 113 mA 197 mA 62 mA

43 mA 600 mA 567 mA 93 mA 32 mA 17 mA 658 mA 131 mA 71 mA 47 mA 6 mA

0.1

5

4

3

2

1

D D

C C

check AMD

B B

H_CTLIP1<12> H_CTLOP1 <12> H_CTLIN1<12>

H_CADIP[0..15]<12>

R45 0_0402_5%R45 0_0402_5% R46 0_0402_5%R46 0_0402_5%

+1.2V_HT

R2 51_0402_1%@R2 51_0402_1%@ R3 51_0402_1%@R3 51_0402_1%@

H_CLKIP1<12> H_CLKIN1<12> H_CLKIP0<12> H_CLKIN0<12>

1 2 1 2

H_CTLIP0<12> H_CTLOP0 <12> H_CTLIN0<12>

H_CADIP[0..15] H_CADIN[0..15]

VLDT=500mA

12 12

+1.2V_HT

H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0

H_CTLIP1_R H_CTLIN1_R

H_CTLIP0

H_CTLIP1_R H_CTLIN1_R

D4

VLDT_A3

D3

VLDT_A2

D2

VLDT_A1

D1

VLDT_A0

N5

L0_CADIN_H15

P5

L0_CADIN_L15

M3

L0_CADIN_H14

M4

L0_CADIN_L14

L5

L0_CADIN_H13

M5

L0_CADIN_L13

K3

L0_CADIN_H12

K4

L0_CADIN_L12

H3

L0_CADIN_H11

H4

L0_CADIN_L11

G5

L0_CADIN_H10

H5

L0_CADIN_L10

F3

L0_CADIN_H9

F4

L0_CADIN_L9

E5

L0_CADIN_H8

F5

L0_CADIN_L8

N3

L0_CADIN_H7

N2

L0_CADIN_L7

L1

L0_CADIN_H6

M1

L0_CADIN_L6

L3

L0_CADIN_H5

L2

L0_CADIN_L5

J1

L0_CADIN_H4

K1

L0_CADIN_L4

G1

L0_CADIN_H3

H1

L0_CADIN_L3

G3

L0_CADIN_H2

G2

L0_CADIN_L2

E1

L0_CADIN_H1

F1

L0_CADIN_L1

E3

L0_CADIN_H0

E2

L0_CADIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

FOX_PZ63823-284S-41F

CONN@

JCPU1A

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0

HTT Interface

L0_CADOUT_L0 L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0

Athlon 64 S1 Processor Socket

AE5 AE4 AE3 AE2

T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1

Y4 Y3 Y1 W1

T5 R5

R2 R3

H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8 H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0

H_CTLON1_R

H_CTLOP0 H_CTLON0H_CTLIN0

H_CADOP[0..15] H_CADON[0..15]

1 2

C84 4.7U_0805_10V4Z

H_CLKOP1 <12> H_CLKON1 <12> H_CLKOP0 <12> H_CLKON0 <12>

1 2

R41 0_0402_5%R41 0_0402_5%

1 2

R44 0_0402_5%R44 0_0402_5%

H_CTLON0 <12>

H_CADOP[0..15] <12> H_CADON[0..15] <12>H_CADIN[0..15]<12>

H_CTLON1 <12>

Reserve when PVT

40mil

+VCC_FAN1

+VCC_FAN1H_CTLOP1_R

+5VS

12

D13

D13 1SS355_SOD323-2@

1SS355_SOD323-2@

1 2

10U_0805_10V4Z

1000P_0402_50V7K

for cos down

D4 BAS16_SOT23-3@D4 BAS16_SOT23-3@

C97

1 2

C96

1 2

JP12

1 2 3

CONN@

ACES_85205-03001

LDO FAN

JP38

1

2

3

4

CONN@

ACES_85205-0400

1 2

GND GND GND GND

+3VS

12

FAN1 Conn

8 7 6 5

+3VS

12

R37

R37 10K_0402_5%

10K_0402_5%

1

C91

C91 1000P_0402_50V7K

1000P_0402_50V7K

2

R40

R40 10K_0402_5%

10K_0402_5%

@

FANPWN

+5VS

R247

R247 0_0603_5%

0_0603_5%

@

+VCC_FAN1

EN_DFAN1<28>

1 2

R733 0_0402_5%R733 0_0402_5%

@

FANPWM<28>

U1

1 2 3 4

1

C760

APL5607KI-TRG_SO8

0.01U_0402_25V4Z

2

FAN_SPEED1<28>

C92 10U_0805_10V4Z

EN VIN VOUT VSET

PWM FAN

AMD : 49.9 1% ATI : 51 1%

+1.2V_HT

250 mil

A A

5

VLDT CAP.

1

C86

4.7U_0805_10V4Z

2

1

C82

4.7U_0805_10V4Z

2

1

C90

0.22U_0603_16V4Z

2

4

1

C89

0.22U_0603_16V4Z

2

Near CPU Socket

1

C83

C83 180P_0402_50V8J

180P_0402_50V8J

2

1

C85

C85 180P_0402_50V8J

180P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/5/18 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet of

Compal Electronics, Inc.

S1g1 HT I/F & FAN

NCWG0 LA-5481

1

0.1

of

646Wednesday, May 20, 2009

A

B

C

D

E

DDR_B_D[63..0]<11>

DDR_B_DM[7..0]<11> DDR_A_DM[7..0] <10>

DDR_B_DQS7<11> DDR_B_DQS#7<11> DDR_B_DQS6<11> DDR_B_DQS#6<11> DDR_B_DQS5<11> DDR_B_DQS#5<11> DDR_B_DQS4<11> DDR_B_DQS#4<11> DDR_B_DQS3<11> DDR_B_DQS#3<11> DDR_B_DQS2<11> DDR_B_DQS#2<11> DDR_B_DQS1<11> DDR_B_DQS#1<11> DDR_B_DQS0<11> DDR_B_DQS#0<11>

R4

1K_0402_1%

R5

1K_0402_1%

+1.8V

1 2

DDR_CS3_DIMMA#<10> DDR_CS2_DIMMA#<10> DDR_CS1_DIMMA#<10> DDR_CS0_DIMMA#<10>

DDR_CS3_DIMMB#<11> DDR_CS2_DIMMB#<11> DDR_CS1_DIMMB#<11> DDR_CS0_DIMMB#<11>

DDR_CKE1_DIMMB<11> DDR_CKE0_DIMMB<11> DDR_CKE1_DIMMA<10> DDR_CKE0_DIMMA<10>

DDR_A_MA[15..0]<10>

1

C16

2

0.1U_0402_16V4Z

R7

1 2

R6

DDR_A_BS#2<10> DDR_A_BS#1<10> DDR_A_BS#0<10>

DDR_A_RAS#<10> DDR_A_CAS#<10> DDR_A_WE#<10>

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

DDR_A_CLK2

DDR_A_CLK#2 DDR_A_CLK1

DDR_A_CLK#1

C100

1000P_0402_50V7K

+CPU_M_VREF

TP1TP1

(10/10, <1")

39.2_0402_1%

12

39.2_0402_1%

+CPU_M_VREF

(15/20, <6")

VTT_SENSE

M_ZN M_ZP

DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA#

DDR_CS3_DIMMB# DDR_CS2_DIMMB# DDR_CS1_DIMMB# DDR_CS0_DIMMB#

DDR_CKE1_DIMMB DDR_CKE0_DIMMB DDR_CKE1_DIMMA DDR_CKE0_DIMMA

DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0

DDR_A_BS#2 DDR_A_BS#1 DDR_A_BS#0

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

1

C102

1.5P_0402_50V8C

2

1

C104

1.5P_0402_50V8C

2

JCPU1B

W17

M_VREF

Y10

VTT_SENSE

AE10

M_ZN

AF10

M_ZP

V19

MA0_CS_L3

J22

MA0_CS_L2

V22

MA0_CS_L1

T19

MA0_CS_L0

Y26

MB0_CS_L3

J24

MB0_CS_L2

W24

MB0_CS_L1

U23

MB0_CS_L0

H26

MB_CKE1

J23

MB_CKE0

J20

MA_CKE1

J21

MA_CKE0

K19

MA_ADD15

K20

MA_ADD14

V24

MA_ADD13

K24

MA_ADD12

L20

MA_ADD11

R19

MA_ADD10

L19

MA_ADD9

L22

MA_ADD8

L21

MA_ADD7

M19

MA_ADD6

M20

MA_ADD5

M24

MA_ADD4

M22

MA_ADD3

N22

MA_ADD2

N21

MA_ADD1

R21

MA_ADD0

K22

MA_BANK2

R20

MA_BANK1

T22

MA_BANK0

T20

MA_RAS_L

U20

MA_CAS_L

U21

MA_WE_L

CONN@ FOX_PZ63823-284S-41F

Athlon 64 S1 Processor Socket

JCPU1B

DDR_B_CLK2

DDR_B_CLK#2 DDR_B_CLK1

DDR_B_CLK#1

+0.9V

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

W10

VTT5

AC10

VTT6

AB10

VTT7

AA10

VTT8

A10

VTT9

DDR_A_CLK2

MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0

MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10

MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0

MB_BANK2 MB_BANK1 MB_BANK0

MB_RAS_L MB_CAS_L

MB_WE_L

1

2

1

2

Y16

DDR_A_CLK#2

AA16

DDR_A_CLK1

E16

DDR_A_CLK#1

F16

DDR_B_CLK2

AF18

DDR_B_CLK#2

AF17

DDR_B_CLK1

A17

DDR_B_CLK#1

A18

DDR_B_ODT1

W23

DDR_B_ODT0

W26

DDR_A_ODT1

V20

DDR_A_ODT0

U19

DDR_B_MA15

J25

DDR_B_MA14

J26

DDR_B_MA13

W25

DDR_B_MA12

L23

DDR_B_MA11

L25

DDR_B_MA10

U25

DDR_B_MA9

L24

DDR_B_MA8

M26

DDR_B_MA7

L26

DDR_B_MA6

N23

DDR_B_MA5

N24

DDR_B_MA4

N25

DDR_B_MA3

N26

DDR_B_MA2

P24

DDR_B_MA1

P26

DDR_B_MA0

T24

DDR_B_BS#2

K26

DDR_B_BS#1

T26

DDR_B_BS#0

U26

DDR_B_RAS#

U24

DDR_B_CAS#

V26

DDR_B_WE#

U22

C17

1.5P_0402_50V8C

C105

1.5P_0402_50V8C

MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1

MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1

DDRII Cmd/Ctrl//Clk

DDR_A_CLK2 <10> DDR_A_CLK#2 <10> DDR_A_CLK1 <10> DDR_A_CLK#1 <10>

DDR_B_CLK2 <11> DDR_B_CLK#2 <11> DDR_B_CLK1 <11> DDR_B_CLK#1 <11>

DDR_B_ODT1 <11> DDR_B_ODT0 <11> DDR_A_ODT1 <10> DDR_A_ODT0 <10>

DDR_B_MA[15..0] <11>

DDR_B_BS#2 <11> DDR_B_BS#1 <11> DDR_B_BS#0 <11>

DDR_B_RAS# <11> DDR_B_CAS# <11> DDR_B_WE# <11>

4 4

3 3

2 2

1 1

DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0

DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0

DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0

AD11

MB_DATA63

AF11

MB_DATA62

AF14

MB_DATA61

AE14

MB_DATA60

Y11

MB_DATA59

AB11

MB_DATA58

AC12

MB_DATA57

AF13

MB_DATA56

AF15

MB_DATA55

AF16

MB_DATA54

AC18

MB_DATA53

AF19

MB_DATA52

AD14

MB_DATA51

AC14

MB_DATA50

AE18

MB_DATA49

AD18

MB_DATA48

AD20

MB_DATA47

AC20

MB_DATA46

AF23

MB_DATA45

AF24

MB_DATA44

AF20

MB_DATA43

AE20

MB_DATA42

AD22

MB_DATA41

AC22

MB_DATA40

AE25

MB_DATA39

AD26

MB_DATA38

AA25

MB_DATA37

AA26

MB_DATA36

AE24

MB_DATA35

AD24

MB_DATA34

AA23

MB_DATA33

AA24

MB_DATA32

G24

MB_DATA31

G23

MB_DATA30

D26

MB_DATA29

C26

MB_DATA28

G26

MB_DATA27

G25

MB_DATA26

E24

MB_DATA25

E23

MB_DATA24

C24

MB_DATA23

B24

MB_DATA22

C20

MB_DATA21

B20

MB_DATA20

C25

MB_DATA19

D24

MB_DATA18

A21

MB_DATA17

D20

MB_DATA16

D18

MB_DATA15

C18

MB_DATA14

D14

MB_DATA13

C14

MB_DATA12

A20

MB_DATA11

A19

MB_DATA10

A16

MB_DATA9

A15

MB_DATA8

A13

MB_DATA7

D12

MB_DATA6

E11

MB_DATA5

G11

MB_DATA4

B14

MB_DATA3

A14

MB_DATA2

A11

MB_DATA1

C11

MB_DATA0

AD12

MB_DM7

AC16

MB_DM6

AE22

MB_DM5

AB26

MB_DM4

E25

MB_DM3

A22

MB_DM2

B16

MB_DM1

A12

MB_DM0

AF12

MB_DQS_H7

AE12

MB_DQS_L7

AE16

MB_DQS_H6

AD16

MB_DQS_L6

AF21

MB_DQS_H5

AF22

MB_DQS_L5

AC25

MB_DQS_H4

AC26

MB_DQS_L4

F26

MB_DQS_H3

E26

MB_DQS_L3

A24

MB_DQS_H2

A23

MB_DQS_L2

D16

MB_DQS_H1

C16

MB_DQS_L1

C12

MB_DQS_H0

B12

MB_DQS_L0

CONN@ FOX_PZ63823-284S-41F

Athlon 64 S1 Processor Socket

JCPU1C

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14

DDRII Data

MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0

MA_DQS_H7

MA_DQS_L7

MA_DQS_H6

MA_DQS_L6

MA_DQS_H5

MA_DQS_L5

MA_DQS_H4

MA_DQS_L4

MA_DQS_H3

MA_DQS_L3

MA_DQS_H2

MA_DQS_L2

MA_DQS_H1

MA_DQS_L1

MA_DQS_H0

MA_DQS_L0

AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12

Y13 AB16 Y19 AC24 F24 E19 C15 E12

W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13

DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0

DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0

DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0

DDR_A_D[63..0] <10>

DDR_A_DQS7 <10> DDR_A_DQS#7 <10> DDR_A_DQS6 <10> DDR_A_DQS#6 <10> DDR_A_DQS5 <10> DDR_A_DQS#5 <10> DDR_A_DQS4 <10> DDR_A_DQS#4 <10> DDR_A_DQS3 <10> DDR_A_DQS#3 <10> DDR_A_DQS2 <10> DDR_A_DQS#2 <10> DDR_A_DQS1 <10> DDR_A_DQS#1 <10> DDR_A_DQS0 <10> DDR_A_DQS#0 <10>

Processor DDR2 Memory Interface

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/5/18 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

S1g1 DDRII I/F

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

NCWG0 LA-5481

746Wednesday, May 20, 2009

E

0.1

of

5

+1.8VS

R344

R344 300_0402_5%

300_0402_5%

1 2

+1.8VS

CPU_THERMDA CPU_THERMDC

+1.8V

R38220_0402_5%@ R38220_0402_5%@

R33220_0402_5%@ R33220_0402_5%@

12

5

LDT_RST#

1

C721

0.01U_0402_25V4Z

@

2

R346

R346 300_0402_5%

300_0402_5%

1 2

H_PWRGD

1

C720

0.01U_0402_25V4Z

@

2

R342

R342 300_0402_5%

300_0402_5%

1 2

LDT_STOP#

1

C719

0.01U_0402_25V4Z

@

2

+3VS

C119

0.1U_0402_16V4Z

1 2

U3

1

VDD

2

D+

3

ALERT#

DTHERM#4GND

ADM1032ARMZ-2REEL_MSOP8

F75383M_MSOP8

SMBus Address: 1001110X (b)

AMD: suggest DBREQ need pull high

R35220_0402_5%@ R35220_0402_5%@

R34220_0402_5%@ R34220_0402_5%@

R36220_0402_5% R36220_0402_5%

12

LDT_RST#<17>

D D

H_PWRGD<17>

C C

B B

A A

LDT_STOP#<13,17>

1 2

C120 2200P_0402_50V7K

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

+2.5VS

150U_D2_6.3VM

CLK_CPU_BCLK<16>

CLK_CPU_BCLK#<16>

8

SCLK

7

SDATA

6 5

JP3

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423 26

SAMTEC_ASP-68200-07

@SAMTEC_ASP-68200-07

@

C113

HDT Connector

4

L4

1 2

FCM2012CF-800T06_2P

1

+

2

(10/5/5/5/10)

3900P_0402_50V7K

1 2

C109

12

R22

R22 169_0402_1%

169_0402_1%

1 2

C23 3900P_0402_50V7K

EC_SMB_CK2 <28> EC_SMB_DA2 <28>

HDT_RST#

4

U51

NC7SZ08P5X_NL_SC70-5

U51

4

+2.5VDDA

1

C116

2

4.7U_0805_10V4Z

+1.2V_HT

+3VS

5

2

P

B

Y

1

A

G

3

VDDA=300mA

3300P_0402_50V7K

1

C22

C118

0.22U_0603_16V4Z

2

LDT_RST# H_PWRGD LDT_STOP#

R13 300_0402_5%

R61 44.2_0402_1%R61 44.2_0402_1%

1 2

R16 44.2_0402_1%R16 44.2_0402_1%

CPU_VCC_SENSE<45>

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

1 2

CPU_DBRDY CPU_TMS

CPU_TCK CPU_TDO CPU_TRST# CPU_TDI

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

(10/10)

LDT_RST#

SB_PWRGD <18,33>

3

2

<15/20>

JCPU1D

F8

VDDA2

F9

VDDA1

B7

RESET_L

A7

PWROK

F10

CPU_SIC

12

CPU_HTREF1 CPU_HTREF0

(5/10, >1")

TP26TP26

TP3TP3

TP5TP5 TP30TP30 TP8TP8 TP28TP28 TP31TP31

CPU_THERMDC CPU_THERMDA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LDTSTOP_L

AF4

SIC

AF5

SID

P6

HTREF1

R6

HTREF0

F6

VDD_FB_H

E6

VDD_FB_L

W9

VDDIO_FB_H

Y9

VDDIO_FB_L

A9

CLKIN_H

A8

CLKIN_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI TEST25_HE9TEST29_H

E8

TEST25_L

G9

TEST19

H10

TEST18

AA7

TEST13

C2

TEST9

D7

TEST17

E7

TEST16

F7

TEST15

C7

TEST14

AC8

TEST12

C3

TEST7

AA6

TEST6

W7

THERMDC

W8

THERMDA

Y6

TEST3

AB6

TEST2

P20

RSVD0

P19

RSVD1

N20

RSVD2

N19

RSVD3

R26

RSVD4

R25

RSVD5

P22

RSVD6

R22

RSVD7

FOX_PZ63823-284S-41F

CONN@

3

JCPU1D

THERMTRIP_L

PROCHOT_L

CPU_PRESENT_L

PSI_L

DBREQ_L

TEST29_L

TEST24 TEST23

MISC

TEST22 TEST21 TEST20

TEST28_H TEST28_L

TEST27 TEST26 TEST10

TEST8

RSVD8 RSVD9

RSVD10 RSVD11

RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

2007/5/18 2010/03/12

CPU_THERMTRIP#_R

AF6

CPU_PROCHOT#_1.8

AC7

A5

VID5

C6

VID4

A6

VID3

A4

VID2

C5

VID1

B5

VID0

CPU_PRESENT#

AC6 A3

CPU_DBREQ#

E10

AE9

TDO

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"

AE7 AD7 AE8 AB8 AF7

J7 H8 AF8 AE6 K8 C4

H16 B18

B3 C1

H6 G6 D5

R24 W18 R23 AA8 H18 H19

TP6TP6 TP7TP7 TP9TP9

CPU_TEST21_SCANEN

TP29TP29

CPU_TEST26_BURNIN#

CPU_THERMTRIP#_R H_THERMTRIP#

Compal Secret Data

Deciphered Date

CPU_VID5 <45> CPU_VID4 <45> CPU_VID3 <45> CPU_VID2 <45> CPU_VID1 <45> CPU_VID0 <45>

PSI_L <45>CPU_VSS_SENSE<45>

80.6_0402_1%

1 2

300_0402_5%

R53

+1.8V

12

R8

CPU_PROCHOT#_1.8

2

+1.8V

12

R18

R18 1K_0402_5%

1K_0402_5%

B

2

Q3

E

3 1

C

MMBT3904_NL_SOT23-3

300_0402_5%

1

+1.8V

VID1: For compatibility

CPU_VID1 CPU_PRESENT# CPU_TEST26_BURNIN#

CPU_TEST21_SCANEN

+1.8V

R65 510_0402_5%

R68 510_0402_5%

R68 510_0402_5% R69 300_0402_5%

R69 300_0402_5% R66 300_0402_5%

R66 300_0402_5%

+3VALW

12

R17

R17 10K_0402_5%

10K_0402_5%

+1.8V

12

R20

1 2

R52 0_0402_5%R52 0_0402_5%

Title

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

1 2

R24 300_0402_5%

1 2

R64 1K_0402_5%

1 2

R27 300_0402_5%

1 2

R47 300_0402_5%

CPU_TEST25_H_BYPASSCLK_H

12

CPU_TEST25_L_BYPASSCLK_L

12 12 12

+3VALW

E

3 1

H_THERMTRIP# <18>

Compal Electronics, Inc.

S1g1 CTRL

CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

12

R25

1K_0402_5%@

B

2

Q2

Q2 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

C

@

H_PROCHOT_R# <17>

MAINPWON <39,41>

1

with future processors

846Wednesday, May 20, 2009

0.1

of

5

VDD(+CPU_CORE) decoupling.

D D

C C

+CPU_CORE

1

+

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C26

C26 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

C33

C33 22U_0805_6.3V6M

22U_0805_6.3V6M

C129

0.22U_0603_16V4Z

1

+

C32

C32 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

@

2

Near CPU Socket

1

C36

C36 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C151

0.22U_0603_16V4Z

2

1

C34

C34 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE +CPU_CORE

1

C122

0.01U_0402_25V7K

2

1

+

C27

C27 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

2

1

C35

C35 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VDDIO decoupling.

+1.8V

1

C170

C170 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C181

C181 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

B B

+1.8V

1

C157

0.22U_0603_16V4Z

2

+1.8V +1.8V

1

C175

0.01U_0402_25V7K

2

+1.8V

1

A A

2

Between CPU Socket and DIMM

1

C182

0.22U_0603_16V4Z

2

1

C159

0.01U_0402_25V7K

2

C76

4.7U_0805_10V4Z

1

C167

4.7U_0805_10V4Z

2

+1.8V

1

C124

0.22U_0603_16V4Z

2

1

C68

0.22U_0603_16V4Z

2

1

2

1

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

C189

C189 180P_0402_50V8J

180P_0402_50V8J

C187

4.7U_0805_10V4Z

1

C147

0.22U_0603_16V4Z

2

1

C188

0.22U_0603_16V4Z

2

1

C136

C136 180P_0402_50V8J

180P_0402_50V8J

2

1

C132

4.7U_0805_10V4Z

2

4

1

+

C28

C28 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

2

1

C178

C178 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C47

C47 180P_0402_50V8J

180P_0402_50V8J

2

1

+

2

1

C41

C41 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

1

C156

C156 180P_0402_50V8J

180P_0402_50V8J

2

1

+

C162

C162 220U_D2_4VM_R15

220U_D2_4VM_R15

2

C29

C29 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

1

C190

C190 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C158

C158 180P_0402_50V8J

180P_0402_50V8J

2

3

+CPU_CORE +CPU_CORE

1

C39

C39 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C128

C128 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VTT decoupling.

+0.9V

1

2

+0.9V

1

2

C155

4.7U_0805_10V4Z

C73

4.7U_0805_10V4Z

1

C146

4.7U_0805_10V4Z

2

Near CPU Socket Right side.

1

C70

4.7U_0805_10V4Z

2

Near CPU Socket Left side.

1

2

1

2

AC4

VDD1

AD2

VDD2

G4

VDD3

H2

VDD4

J9

VDD5

J11

VDD6

J13

VDD7

K6

VDD8

K10

VDD9

K12

VDD10

K14

VDD11

L4

VDD12

L7

VDD13

L9

VDD14

L11

VDD15

L13

VDD16

M2

VDD17

M6

VDD18

M8

VDD19

M10

VDD20

N7

VDD21

N9

VDD22

N11

VDD23

P8

VDD24

P10

VDD25

R4

VDD26

R7

VDD27

R9

VDD28

R11

VDD29

T2

VDD30

T6

VDD31

T8

VDD32

T10

VDD33

T12

VDD34

T14

VDD35

U7

VDD36

U9

VDD37

U11

VDD38

U13

VDD39

V6

VDD40

V8

VDD41

V10

VDD42

FOX_PZ63823-284S-41F

CONN@

Athlon 64 S1 Processor Socket

C66

150U_D2_6.3VM

C184

0.22U_0603_16V4Z

C127

0.22U_0603_16V4Z

JCPU1E

VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9

VDDIO10

Power

VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27

+0.9V

Near Power Supply

1

C: Change to NBO CAP

+

2

1

C173

0.22U_0603_16V4Z

2

1

C185

0.22U_0603_16V4Z

2

V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16

H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25

2

+1.8V

1

C72

C72 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C164

C164 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C145

C145 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C163

C163 1000P_0402_50V7K

1000P_0402_50V7K

2

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

FOX_PZ63823-284S-41F

CONN@

Athlon 64 S1 Processor Socket

JCPU1F

Ground

1

C180

C180 180P_0402_50V8J

180P_0402_50V8J

2

1

C152

C152 180P_0402_50V8J

180P_0402_50V8J

2

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

1

C121

C121 180P_0402_50V8J

180P_0402_50V8J

2

1

C179

C179 180P_0402_50V8J

180P_0402_50V8J

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/5/18 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

S1g1 PWR & GND

NCWG0 LA-5481

1

0.1

of

946Wednesday, May 20, 2009

5

JDIMM2

1

VREF

3

DDR_A_D0

D D

C C

DDR_CKE0_DIMMA<7> DDR_CS2_DIMMA#<7>

DDR_A_BS#2<7>

DDR_A_BS#0<7> DDR_A_WE#<7>

DDR_A_CAS#<7> DDR_CS1_DIMMA#<7>

DDR_A_ODT1<7>

B B

A A

SB_CK_SDAT<11,16,18,31>

SB_CK_SCLK<11,16,18,31>

DDR_A_D1 DDR_A_DQS#0

DDR_A_DQS0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D22 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA DDR_CS2_DIMMA#

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_CS1_DIMMA#

DDR_A_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D34

DDR_A_D35 DDR_A_D40

DDR_A_D41 DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D47 DDR_A_D48

DDR_A_D49 DDR_A_D53

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51 DDR_A_D55

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59 SB_CK_SDAT

SB_CK_SCLK

+3VS

1

C448

0.1U_0402_16V4Z

2

5

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

203

GND

FOX_AS0A426-M2RN-7F

CONN@

DIMM2 REV H:5.2mm (BOT)

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0 CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1 RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1 CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

SA1

GND

4

C507

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110

S0#

112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 204

4

DDR_A_D4 DDR_A_D5

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D12

DDR_A_D13 DDR_A_DM1 DDR_A_CLK1

DDR_A_CLK#1 DDR_A_D14

DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6DDR_A_MA8

DDR_A_MA4 DDR_A_MA2 DDR_A_MA0

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_ODT0 DDR_A_MA13

DDR_CS3_DIMMA# DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D52

DDR_A_CLK2 DDR_A_CLK#2

DDR_A_DM6 DDR_A_D54

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

R12 10K_0402_5%R12 10K_0402_5%

1 2

R10 10K_0402_5%R10 10K_0402_5%

1 2

C507

1

2

4.7U_0805_10V4Z

DDR_A_CLK1 <7> DDR_A_CLK#1 <7>

DDR_A_D[0..63]<7> DDR_A_DM[0..7]<7>

DDR_A_DQS[0..7]<7> DDR_A_MA[0..15]<7>

DDR_A_DQS#[0..7]<7>

DDR_CKE1_DIMMA <7>

DDR_A_BS#1 <7> DDR_A_RAS# <7> DDR_CS0_DIMMA# <7>

DDR_A_ODT0 <7>

DDR_CS3_DIMMA# <7>

DDR_A_CLK2 <7> DDR_A_CLK#2 <7>

3

+1.8V+DIMM_VREF+1.8V+1.8V

0.1U_0402_16V4Z

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C503

3

12

R398

1K_0402_1%

12

R397

1K_0402_1%

DDR_A_D[0..63] DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_MA[0..15] DDR_A_DQS#[0..7]

Compal Secret Data

2005/10/11 2010/03/12

Compal Secret Data

Deciphered Date

2

DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA2

DDR_CKE0_DIMMA DDR_CS2_DIMMA# DDR_A_BS#2 DDR_A_MA12

DDR_A_MA4 DDR_A_MA0 DDR_A_BS#1 DDR_CS0_DIMMA#

DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 DDR_A_MA10 DDR_A_BS#0

DDR_A_WE# DDR_A_CAS# DDR_CS1_DIMMA# DDR_A_ODT1

DDR_A_RAS# DDR_A_ODT0 DDR_A_MA13 DDR_CS3_DIMMA#

DDR_CKE1_DIMMA DDR_A_MA15 DDR_A_MA14

2

47_0804_8P4R_5%

1

+0.9V

RP1

18

1 2

C81 0.1U_0402_16V4Z

27 36

1 2

C139 0.1U_0402_16V4Z

45

RP2

18 27 36 45

RP3

18 27 36 45

RP4

18 27 36 45

RP5

18 27 36 45

RP6

18 27 36 45

RP7

18 27 36 45

RP8

18 27 36 45

1 2

C192 0.1U_0402_16V4Z

1 2

C88 0.1U_0402_16V4Z

1 2

C117 0.1U_0402_16V4Z

1 2

C144 0.1U_0402_16V4Z

1 2

C114 0.1U_0402_16V4Z

1 2

C95 0.1U_0402_16V4Z

1 2

C193 0.1U_0402_16V4Z

1 2

C125 0.1U_0402_16V4Z

1 2

C103 0.1U_0402_16V4Z

1 2

C99 0.1U_0402_16V4Z

1 2

C107 0.1U_0402_16V4Z

1 2

C98 0.1U_0402_16V4Z

1 2

C101 0.1U_0402_16V4Z

1 2

C191 0.1U_0402_16V4Z

Title

DDR2 SO-DIMM I

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

+1.8V

1

0.1

of

10 46Wednesday, May 20, 2009

5

4

3

2

1

+DIMM_VREF+1.8V+1.8V

+0.9V

RP9

0.1U_0402_16V4Z

0.1U_0402_16V4Z C198

C198

C202

4.7U_0805_10V4Z

C202

JDIMM1

1

VREF

3

DDR_B_D0

D D

C C

DDR_CKE0_DIMMB<7> DDR_CS2_DIMMB#<7>

DDR_B_BS#2<7>

DDR_B_BS#0<7> DDR_B_WE#<7>

DDR_B_CAS#<7> DDR_CS1_DIMMB#<7>

DDR_B_ODT1<7>

B B

A A

SB_CK_SDAT<10,16,18,31>

SB_CK_SCLK<10,16,18,31>

DDR_B_D1 DDR_B_DQS#0

DDR_B_DQS0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB DDR_CS2_DIMMB#

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_CS1_DIMMB#

DDR_B_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D47 DDR_B_D48

DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7 DDR_B_D58

DDR_B_D59 SB_CK_SDAT

SB_CK_SCLK

+3VS

1

C21

0.1U_0402_16V4Z

2

5

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

GND

FOX_AS0A426-MARG-7F

CONN@

2

VSS

4

DQ4

6

DQ5

8

VSS

10

DM0

12

VSS

14

DQ6

16

DQ7

18

VSS

20

DQ12

22

DQ13

24

VSS

26

DM1

28

VSS

30

CK0

32

CK0#

34

VSS

36

DQ14

38

DQ15

40

VSS

42

VSS

44

DQ20

46

DQ21

48

VSS

50

NC

52

DM2

54

VSS

56

DQ22

58

DQ23

60

VSS

62

DQ28

64

DQ29

66

VSS

68

DQS3#

70

DQS3

72

VSS

74

DQ30

76

DQ31

78

VSS

80

NC/CKE1

82

VDD

84

NC/A15

86

NC/A14

88

VDD

90

A11

92

A7

94

A6

96

VDD

98

A4

100

A2

102

A0

104

VDD

106

BA1

108

RAS#

110

S0#

112

VDD

114

ODT0

116

NC/A13

118

VDD

120

NC

122

VSS

124

DQ36

126

DQ37

128

VSS

130

DM4

132

VSS

134

DQ38

136

DQ39

138

VSS

140

DQ44

142

DQ45

144

VSS

146

DQS5#

148

DQS5

150

VSS

152

DQ46

154

DQ47

156

VSS

158

DQ52

160

DQ53

162

VSS

164

CK1

166

CK1#

168

VSS

170

DM6

172

VSS

174

DQ54

176

DQ55

178

VSS

180

DQ60

182

DQ61

184

VSS

186

DQS7#

188

DQS7

190

VSS

192

DQ62

194

DQ63

196

VSS

198

SAO

200

SA1

202

GND

DIMM1 REV H:9.2mm (BOT)

4

DDR_B_D4 DDR_B_D5

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D13 DDR_B_DM1 DDR_B_CLK1

DDR_B_CLK#1 DDR_B_D14

DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31 DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6DDR_B_MA8

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_ODT0 DDR_B_MA13

DDR_CS3_DIMMB# DDR_B_D36

DDR_B_D37 DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D52

DDR_B_CLK2 DDR_B_CLK#2

DDR_B_DM6 DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

R11 10K_0402_5%R11 10K_0402_5%

1 2

R9 10K_0402_5%R9 10K_0402_5%

1 2

4.7U_0805_10V4Z

1

2

DDR_B_CLK1 <7> DDR_B_CLK#1 <7>

DDR_B_D[0..63]<7> DDR_B_DM[0..7]<7>

DDR_B_DQS[0..7]<7> DDR_B_MA[0..15]<7>

DDR_B_DQS#[0..7]<7>

DDR_CKE1_DIMMB <7>

DDR_B_BS#1 <7> DDR_B_RAS# <7> DDR_CS0_DIMMB# <7>

DDR_B_ODT0 <7>

DDR_CS3_DIMMB# <7>

DDR_B_CLK2 <7> DDR_B_CLK#2 <7>

+3VS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

Issued Date

3

DDR_B_D[0..63] DDR_B_DM[0..7] DDR_B_DQS[0..7] DDR_B_MA[0..15] DDR_B_DQS#[0..7]

Compal Secret Data

2005/10/11 2010/03/12

Compal Secret Data

Deciphered Date

DDR_B_MA2 DDR_B_MA0 DDR_B_BS#1 DDR_B_RAS#

DDR_B_MA11 DDR_B_MA7 DDR_B_MA6 DDR_B_MA4

DDR_CS2_DIMMB# DDR_B_BS#2 DDR_CKE0_DIMMB

DDR_B_MA5 DDR_B_MA8 DDR_B_MA9 DDR_B_MA12

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA3

DDR_B_ODT1 DDR_CS1_DIMMB# DDR_B_CAS# DDR_B_WE#

DDR_CS0_DIMMB# DDR_B_ODT0 DDR_B_MA13 DDR_CS3_DIMMB#

DDR_CKE1_DIMMB DDR_B_MA15 DDR_B_MA14

2

RP9

47_0804_8P4R_5%

RP10

47_0804_8P4R_5%

RP11

47_0804_8P4R_5%

RP12

47_0804_8P4R_5%

RP13

47_0804_8P4R_5%

RP14

47_0804_8P4R_5%

RP15

47_0804_8P4R_5%

RP16

47_0804_8P4R_5%

18 27 36 45

12

C196 0.1U_0402_16V4Z

1 2

C209 0.1U_0402_16V4Z

12

C197 0.1U_0402_16V4Z

1 2

C211 0.1U_0402_16V4Z

12

C205 0.1U_0402_16V4Z

1 2

C213 0.1U_0402_16V4Z

12

C199 0.1U_0402_16V4Z

1 2

C200 0.1U_0402_16V4Z

12

C206 0.1U_0402_16V4Z

1 2

C201 0.1U_0402_16V4Z

12

C210 0.1U_0402_16V4Z

1 2

C208 0.1U_0402_16V4Z

12

C194 0.1U_0402_16V4Z

1 2

C207 0.1U_0402_16V4Z

12

C212 0.1U_0402_16V4Z

1 2

C195 0.1U_0402_16V4Z

Title

DDR2 SO-DIMM II

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

+1.8V

1

11 46Wednesday, May 20, 2009

0.1

of

11 46Wednesday, May 20, 2009

5

U22B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

D D

PCIE_PTX_C_IRX_P0<31> PCIE_PTX_C_IRX_N0<31>

PCIE_PTX_C_IRX_N1<25>

C C

SB_RX0P<17> SB_RX0N<17> SB_RX1P<17> SB_RX1N<17> SB_RX2P<17> SB_RX2N<17> SB_RX3P<17> SB_RX3N<17>

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780M_FCBGA528

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

RS780MN-SA00002DR30 Ver:A13

B B

A A

RS780M Display Port Support (muxed on GFX)

DP0

DP1

GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1

4

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

GFX_TX10P

GFX_TX10N

GFX_TX11P

GFX_TX11N

GFX_TX12P

GFX_TX12N

GFX_TX13P

GFX_TX13N

GFX_TX14P

GFX_TX14N

GFX_TX15P

GFX_TX15N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2

PCIE_ITX_PRX_P1

AB4

PCIE_ITX_PRX_N1

AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6 AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5 AC8

AB8

C600 0.1U_0402_16V7KC600 0.1U_0402_16V7K

1 2

C601 0.1U_0402_16V7KC601 0.1U_0402_16V7K

1 2

C602 0.1U_0402_16V7KC602 0.1U_0402_16V7K

1 2

C605 0.1U_0402_16V7KC605 0.1U_0402_16V7K

1 2

C259 0.1U_0402_16V7KC259 0.1U_0402_16V7K

1 2

C272 0.1U_0402_16V7KC272 0.1U_0402_16V7K

1 2

C254 0.1U_0402_16V7KC254 0.1U_0402_16V7K

1 2

C252 0.1U_0402_16V7KC252 0.1U_0402_16V7K

1 2

C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K

1 2

C261 0.1U_0402_16V7KC261 0.1U_0402_16V7K

1 2

C248 0.1U_0402_16V7KC248 0.1U_0402_16V7K

1 2

C275 0.1U_0402_16V7KC275 0.1U_0402_16V7K

1 2 1 2

1 2

R29 1.27K_0402_1%R29 1.27K_0402_1% R32 2K_0402_1%R32 2K_0402_1%

3

Check SW Routing

AN_RS780MN1, Only suggest pair0~3 can usage for power save.

PCIE_ITX_C_PRX_P0 <31> PCIE_ITX_C_PRX_N0 <31> PCIE_ITX_C_PRX_P1 <25>PCIE_PTX_C_IRX_P1<25> PCIE_ITX_C_PRX_N1 <25>

SB_TX0P <17> SB_TX0N <17> SB_TX1P <17> SB_TX1N <17> SB_TX2P <17> SB_TX2N <17> SB_TX3P <17> SB_TX3N <17>

+1.1VS

HT Link When tune trace length, must keep 1:4 on self-trace

Check AMD

2

WLAN LAN

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

H_CADIP0SB_TX2P_C

H_CADIN0

H_CADIP1

H_CADIN1

H_CADIP2

H_CADIN2

H_CADIP3

H_CADIN3

H_CADIP4

H_CADIN4

H_CADIP5

H_CADIN5

H_CADIP6

H_CADIN6

H_CADIP7

H_CADIN7

H_CADIP8

H_CADIN8

H_CADIP9

H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CTLIP0 H_CTLIN0

H_CTLIN1

Place within 1" layout 4/8

H_CADOP[0..15]<6> H_CADON[0..15]<6> H_CADIN[0..15] <6>

U22A

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9 H_CADON9

H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0<6> H_CLKON0<6> H_CLKOP1<6> H_CLKON1<6>

H_CTLOP0<6> H_CTLON0<6> H_CTLOP1<6> H_CTLON1<6> H_CTLIN1 <6>

Place within 1" layout 4/8

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLIP1 H_CTLON1

R67

1 2

301_0402_1%~D

U22A

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25

AB25 AB24 AA24 AA25

Y22

Y23 W21 W20

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22 M23

R21

R20

C23

A24

RS780M_FCBGA528

RS780MN-SA00002DR30 Ver:A13

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

H_CADON[0..15]

PART 1 OF 6

HYPER TRANSPORT CPU I/F

1

H_CADIP[0..15] <6>

H_CLKIP0 <6> H_CLKIN0 <6> H_CLKIP1 <6> H_CLKIN1 <6>

H_CTLIP0 <6> H_CTLIN0 <6> H_CTLIP1 <6>

R79

1 2

301_0402_1%~D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

RS780MN-HT LINK0 I/F

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

12 47Wednesday, May 20, 2009

1

0.1

of

5

4

3

2

1

+3VS

+1.8VS

L25

1 2

C267

2.2U_0603_6.3V4Z

+1.8VS

+3VS

POWER_SEL

MBK2012170YZF_0805

1

2

GMCH_CRT_HSYNC<15,23> GMCH_CRT_VSYNC<15,23>

GMCH_CRT_CLK<23> GMCH_CRT_DATA<23>

R319 0_0402_5%R319 0_0402_5%

CLK_SBLINK_BCLK<16> CLK_SBLINK_BCLK#<16>

R327 10K_0402_5%

1

C78

2

+VDDA18HTPLL

1

C266

2

+VDDA18PCIEPLL

1

C31

2

+NB_PLLVDD

1

C400

2

@

1 2

C691

22P_0402_50V8J

+NB_HTPVDD+1.8VS

<65mA>

<20mA>

<120mA>

CLK_NB_14.318M

@

1 2

R637

10_0402_5%

1 2

R55 140_0402_1%R55 140_0402_1%

1 2

R60 150_0402_1%R60 150_0402_1%

1 2

R62 150_0402_1%R62 150_0402_1%

Close to U22 Ball

1 2

+1.1VS

R58

4.7K_0402_5%

+1.8VS

MBK2012170YZF_0805

GMCH_CRT_R GMCH_CRT_G

GMCH_CRT_B

PLT_RST#<15,17,25,28,31>

NB_PWRGD<18>

NB_PGRGD (SB) Output, OD

1 2

R43

4.7K_0402_5%

L10

1 2

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

+1.8VS

+1.1VS

CLK_NB_14.318M<16>

2.2U_0603_6.3V4Z

L24

1 2

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

L5

1 2

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

L50

1 2

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

D D

C C

For EMI

+3VS

R323 4.7K_0402_5%R323 4.7K_0402_5%

1 2

R322 4.7K_0402_5%R322 4.7K_0402_5%

B B

1 2

R488 4.7K_0402_5%R488 4.7K_0402_5%

1 2

R493 4.7K_0402_5%R493 4.7K_0402_5%

1 2

GMCH_LCD_CLK GMCH_LCD_DATA GMCH_CRT_CLK GMCH_CRT_DATA

POWER_SEL<42>

1.1VLOW

HIGH 1.0V

L8

1 2

MBK2012170YZF_0805

L23

1 2

C265

2.2U_0603_6.3V4Z

+AVDDQ

<4mA>

GMCH_CRT_R<23> GMCH_CRT_G<23> GMCH_CRT_B<23>

R59 715_0402_1%R59 715_0402_1%

+NB_PLLVDD

+NB_HTPVDD

+VDDA18HTPLL

+VDDA18PCIEPLL

1 2 1 2

R326 300_0402_5%R326 300_0402_5%

CLK_NBHT<16> CLK_NBHT#<16>

CLK_NBGFX<16> CLK_NBGFX#<16>

GMCH_LCD_CLK<24> GMCH_LCD_DATA<24>

@

12

R552 2K_0402_1%R552 2K_0402_1%

+AVDD1

C40

22U_0805_6.3V6M

+AVDD2

1

2

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

GMCH_CRT_HSYNC GMCH_CRT_VSYNC

GMCH_CRT_CLK GMCH_CRT_DATA

1 2

+NB_PLLVDD +NB_HTPVDD

NB_LDTSTOP#

NB_ALLOW_LDTSTOP

CLK_NB_14.318M

GMCH_LCD_CLK GMCH_LCD_DATA

1 2

R320 0_0402_5%@R320 0_0402_5%@

AUX_CAL<15>

Strap pin

<110mA>

1

2

<20mA>

NB_RESET#

U22C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780M_FCBGA528

PART 3 OF 6

RS780MN-SA00002DR30 Ver:A13

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC)

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

CLOCKs PLL PWR

MIS.

TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

TMDS_HPD(NC)

SUS_STAT#(PWM_GPIO5)

THERMALDIODE_P

THERMALDIODE_N

HPD(NC)

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

<15mA>

<300mA>

R15

1.8K_0402_5%

+VDDLT18

VARY_ENBKL

12

VARY@

4.7K_0402_5%

4.7K_0402_5% R56

R56

R54

@

R328 10K_0402_5%

1 2

R48 0_0402_5%R48 0_0402_5%

1 2

R343

GMCH_TXOUT0+ <24> GMCH_TXOUT0- <24> GMCH_TXOUT1+ <24> GMCH_TXOUT1- <24> GMCH_TXOUT2+ <24> GMCH_TXOUT2- <24>

GMCH_TZOUT0+ <24> GMCH_TZOUT0- <24> GMCH_TZOUT1+ <24> GMCH_TZOUT1- <24> GMCH_TZOUT2+ <24> GMCH_TZOUT2- <24>

GMCH_TXCLK+ <24> GMCH_TXCLK- <24> GMCH_TZCLK+ <24> GMCH_TZCLK- <24>

4.7K_0402_5%

12

+VDDLTP18+VDDLTP18

+VDDLT18

0.1U_0402_16V4Z

R49 0_0402_5%R49 0_0402_5%

1 2

R50 0_0402_5%R50 0_0402_5%

1 2

R57 0_0402_5%VARY@R57 0_0402_5%VARY@

1 2

R51 0_0402_5%VARY@R51 0_0402_5%VARY@

1 2

SUS_STAT# <18> SUS_STAT_R# <15>

C115

Strap Pin

1 2

MBC1608121YZF_0603

1

C449

2.2U_0603_6.3V4Z

2

MBC1608121YZF_0603

1

C455

4.7U_0805_10V4Z

2

L51

L49

1 2

GMCH_ENVDD <24> ENBKL <28> GMCH_INVT_PWM <24>

+1.8VS

R28

R28 300_0402_5%

300_0402_5%

R85 0_0402_5%R85 0_0402_5%

LDT_STOP#<8,17>

LDT_STP# (SB) Output, OD

A A

5

4

1 2

NB_LDTSTOP#

LDTSTOP# (NB) In Lagcy mode: Input, 1.8V signal can be used In CLMC mode: Output, OD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

ALLOW_LDTSTOP<17>

Compal Secret Data

Deciphered Date

SB: I/ OD

1 2

R553 0_0402_5%R553 0_0402_5%

1 2

2

NB_ALLOW_LDTSTOP

ALLOW_LDTSTOP (NB) In Lagcy mode: Output,OD In CLMC mode: Input, 1.8Vsignal can be used

Title

RS780MN-PCIE LINK I/F

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

13 47Wednesday, May 20, 2009

1

0.1

of

5

0.1U_0402_16V4Z

1

C249

2

0.1U_0402_16V4Z

1

C264

C219

2

0.1U_0402_16V4Z

1

C258

2

0.1U_0402_16V4Z

1

C58

2

0.1U_0402_16V4Z

C398

0.1U_0402_16V4Z

1

C253

C126

2

0.1U_0402_16V4Z

1

C273

2

0.1U_0402_16V4Z

1

C171

C255

2

0.1U_0402_16V4Z

1

C62

C56

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

L14

L22

L21

12

L9

12

22U_0805_6.3V6M

L14

12

22U_0805_6.3V6M

C53

+1.1VS

FBMA-L11-201209-221LMA30T_0805

D D

FBMA-L11-201209-221LMA30T_0805

+1.2V_HT

C C

+1.8VS

1

2

B B

A A

L21

FBMA-L11-201209-221LMA30T_0805

C52

C52 22U_0805_6.3V6M

22U_0805_6.3V6M

0.1U_0402_16V4Z

12

1

C108

2

22U_0805_6.3V6M

0.1U_0402_16V4Z

1

C257

C154

2

0.1U_0402_16V4Z

1

C262

2

22U_0805_6.3V6M

0.1U_0402_16V4Z

1

C37

2

4.7U_0805_10V4Z

C131

1

2

C130

C55

+1.8VS

1U_0402_6.3V4Z

4

+VDDHT

1

U22E

2

+VDDHTRX

0.68A

<680mA>

+VDDHTTX

1

2

+VDDA18PCIE

1

2

<680mA>

<700mA>

<10mA>

+1.8VS +3VS

<25mA> <60mA>

U22E

J17

VDDHT_1

M16 R16

H18 G19

D22

AE25 AD24 AC23 AB22 AA21

W19

U17 R17 M17

M10

R10 AA9

AB9 AD9 AE9 U10

AE11 AD11

K16 L16

P16 T16

F20 E21

B23 A23

Y20 V18 T17 P17

J10 P10 K10

L10 W9

H9

T10

Y9

F9 G9

PART 5/6

VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)

RS780M_FCBGA528

RS780MN-SA00002DR30 Ver:A13

POWER

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

3

<1.1A>

+VDDA11PCIE

0.1U_0402_16V4Z

L16

FBMA-L11-201209-221LMA30T_0805

+1.1VS +NB_CORE

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

L16

1 2

C19 22U_0805_6.3V6M

1 2

C15 22U_0805_6.3V6M

C15 22U_0805_6.3V6M C42 1U_0402_6.3V4ZC42 1U_0402_6.3V4Z

1 2

C59 1U_0402_6.3V4ZC59 1U_0402_6.3V4Z

1 2

C44 1U_0402_6.3V4ZC44 1U_0402_6.3V4Z

1 2

C38 1U_0402_6.3V4ZC38 1U_0402_6.3V4Z

1 2 1 2

C51 0.1U_0402_16V4ZC51 0.1U_0402_16V4Z

1 2

C43 0.1U_0402_16V4ZC43 0.1U_0402_16V4Z

L7

@ L7

@

L6

@L6

@

<7.6A>

C570.1U_0402_16V4Z C570.1U_0402_16V4Z

1

C1120.1U_0402_16V4Z C1120.1U_0402_16V4Z

C1100.1U_0402_16V4Z C1100.1U_0402_16V4Z

2

1

C93

2

1

C1230.1U_0402_16V4Z C1230.1U_0402_16V4Z

C2560.1U_0402_16V4Z C2560.1U_0402_16V4Z

C2150.1U_0402_16V4Z C2150.1U_0402_16V4Z

2

1

C61

0.1U_0402_16V4Z

2

C800.1U_0402_16V4Z C800.1U_0402_16V4Z

1

C2180.1U_0402_16V4Z C2180.1U_0402_16V4Z

2

12

12 12

C1822U_0805_6.3V6M C1822U_0805_6.3V6M

C2022U_0805_6.3V6M C2022U_0805_6.3V6M

2

1

C2510.1U_0402_16V4Z C2510.1U_0402_16V4Z

1

2

U22F

A25

VSSAHT1

D23

E22 G22 G24 G25 H19

J22

L17

L22

L24

+1.1VS

330U_D2E_2.5VM_R9M

1

C10

2

+

1

2

M20 N22

R19 R22 R24 R25 H20 U22

W22 W24 W25

AD25

M14 N13

R11 R14

U14 U11 U15

W11 W15

AC12 AA14

AB11 AB15 AB17 AB19 AE20 AB21

AB12 AE16

AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

AD16 AE17 AD17

W12

AD18 AB13 AB18

W14

AE12 AD12

L25

P20

V19

Y21

L12

P12

P15

T12

V12

Y18

K11

V11

Y14

Y12

V14

V15

RS780MN-SA00002DR30 Ver:A13

PART 6/6

VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

RS780M_FCBGA528

RS780MN-SA00002DR30 Ver:A13

U22D

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

RS780M_FCBGA528

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30

GROUND

VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)

MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

1

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

1 2

R351 0_0402_5%R351 0_0402_5%

+1.8VS

+1.1VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

RS780MN-SYSTEM I/F & CLKGEN

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

14 47Wednesday, May 20, 2009

1

0.1

of

5

4

3

2

1

DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

D D

GMCH_CRT_VSYNC<13,23>

12

R341 3K_0402_5%R341 3K_0402_5%

12

R337 3K_0402_5%@R337 3K_0402_5%@

+3VS

Enables the Test Debug Bus using GPIO. (VSYNC) 1 : Disable (RS780) 0 : Enable (Rs780)

DFT_GPIO1: LOAD_EEPROM_STRAPS

AUX_CAL<13>

RS780 DFT_GPIO1

C C

SUS_STAT_R#<13> PLT_RST# <13,17,25,28,31>

1 2

R315 150_0402_1%@R315 150_0402_1%@

@

2 1

D22 CH751H-40PT_SOD323-2

Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

RS780 use HSYNC to enable SIDE PORT

GMCH_CRT_HSYNC<13,23>

12

R332 3K_0402_5%R332 3K_0402_5%

@

12

R331 3K_0402_5%

+3VS

RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)

0. Enable (RS780) 1 : Disable(RS780)

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/10/10 2010/03/12

Compal Secret Data

Deciphered Date

Title

RS780MN-STRAP

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

15 47Wednesday, May 20, 2009

1

0.1

of

5

+1.2V_HT

R182

+3VS_CLK

R112

1 2

FBMA-L11-201209-221LMA30T_0805

D D

8.2K_0402_5% @

8.2K_0402_5%

C C

LAN request

MiniCard1 request

B B

14.31818MHZ_20P_6X1430004201

14.31818MHZ_20P_6X1430004201 C290

C290

33P_0402_50V8J

A A

+VDDCLK_IO

L30

1

C260

2

22U_0805_6.3V6M

R187

@

8.2K_0402_5%

1 2

SEL_SATA SEL_HT66

R188

@

8.2K_0402_5%

1 2

LAN_CLKREQ#<25> MINI1_CLKREQ#<31>

External 14MHz CLK for SB710

CLK_XTAL_OUT CLK_XTAL_IN

Y4

12

FUJICOM

1

C288

C288 33P_0402_50V8J

2

33P_0402_50V8J

2

0.1U_0402_16V4Z

1

C142

2

0.1U_0402_16V4Z

CLK_14M_SB<17>

CLK_NB_14.318M<13>

0.1U_0402_16V4Z

1

C298

C293

2

0.1U_0402_16V4Z

L36

22U_0805_6.3V6M

+3VS_CLK

1 2

R490 8.2K_0402_5%R490 8.2K_0402_5%

R495 8.2K_0402_5%R495 8.2K_0402_5%

R109 33_0402_5%R109 33_0402_5%

1 2

R178 90.9_0402_1%R178 90.9_0402_1%

1 2

+3VS

1 2

+3VS_CLK

FBMA-L11-201209-221LMA30T_0805

CLK_48M_SD<27> CLK_48M_USB<18>

1

2

FBM-L11-160808-800LMT_0603

4

0.1U_0402_16V4Z

1

C135

2

1

C141

0.1U_0402_16V4Z

2

12

0.1U_0402_16V4Z

L35

1 2 1 2

1 2

12 12

0.1U_0402_16V4Z

1

2

CLK_48M_0 CLK_48M_1

CLK_XTAL_IN CLK_XTAL_OUT

0.1U_0402_16V4Z

C280

+3VS_CLKVDDA

1

C161

2

C277

+VDDCLK_IO

+3VS_CLK

1 2

C282 2.2U_0603_6.3V4Z@C282 2.2U_0603_6.3V4Z@ C281 0.1U_0402_16V4ZC281 0.1U_0402_16V4Z

R179 158_0402_1%R179 158_0402_1%

R194 33_0402_5%R194 33_0402_5% R193 33_0402_5%R193 33_0402_5%

Main--SLG8SP626VTR-SA00001Z310 Second--ICS9LPRS488CKLFT-SA000023H10

C263

SEL_SATA SEL_HT66

+3VS

1 2

FBMA-L11-201209-221LMA30T_0805

U15

ICS 9LPRS488

49 48

62 66

12 18 28 37 53

17 29 38 44 54 61 69

24 51 50 43 42

63 64 65

71 70

67 68

11 19 27 36 47 52 58 72 73

ICS 9LPRS488

VDDA GNDA

VDDREF GNDREF

VDDSRC_IO VDDSRC_IO VDDATIG_IO VDDSB_SRC_IO VDDCPU_IO

3

VDDDOT VDDSRC VDDATIG VDDSB_SRC VDDSATA VDDCPU VDDHTT VDD48

CLKREQ0 # CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

REF2/SEL_27 REF1/SEL_SATA REF0/SEL_HTT66

48MHz_0 48MHz_1

X1 X2

6

GNDDOT GNDSRC GNDSRC GNDATIG GNDSB_SRC GNDSATA GNDCPU GNDHTT GND48 GNDPAD

ICS9LPRS488AKLFT_MLF72_10x10

+3VS_CLK

L31

1

2

SMBCLK SMBDAT

SB_SRC_SLOW#

CPUKG0T_LPRS CPUKG0C_LPRS

HTT0T_LPRS / 66 M HTT0C_LPRS / 66 M

SB_SRC0T_LPRS SB_SRC0C_LPRS

SB_SRC1T_LPRS SB_SRC1C_LPRS

ATIG0T_LPRS

ATIG0C_LPRS

ATIG1T_LPRS

ATIG1C_LPRS

ATIG2T_LPRS

ATIG2C_LPRS

SRC0T_LPRS SRC0C_LPRS

SRC1T_LPRS SRC1C_LPRS

SRC2T_LPRS SRC2C_LPRS

SRC3T_LPRS SRC3C_LPRS

SRC4T_LPRS SRC4C_LPRS

SRC5T_LPRS SRC5C_LPRS

SRC6T/SATAT_LPRS SRC6C/SATAC_LPRS

SRC7T_LPRS/27MHz_SS

SRC7C_LPRS/27MHz_NS

3

C367

C367 22U_0805_6.3V6M

22U_0805_6.3V6M

0.1U_0402_16V4Z

1 2

41

56 55

60 59

40 39

35 34

33 32

31 30

26 25

23 22

21 20

16 15

14 13

10 9

8 7

46 45

5 4

57

PD#

@

0.1U_0402_16V4Z

1

C138

2

SRC_SLOW

CLK_CPU CLK_CPU#

CLK_HTT CLK_HTT#

CLK_ATIG0 CLK_ATIG0#

CLK_SRC0 CLK_SRC0#

CLK_SRC2 CLK_SRC2#

CLK_SRC4 CLK_SRC4#

CLK_SRC6 CLK_SRC6#

1

C299

C299 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

R170 47.5_0402_1%R170 47.5_0402_1% R168 47.5_0402_1%R168 47.5_0402_1%

R175 0_0402_5%R175 0_0402_5% R172 0_0402_5%R172 0_0402_5%

R174 0_0402_5%R174 0_0402_5% R176 0_0402_5%R176 0_0402_5%

R189 0_0402_5%R189 0_0402_5% R190 0_0402_5%R190 0_0402_5%

R197 0_0402_5%R197 0_0402_5% R196 0_0402_5%R196 0_0402_5%

R200 0_0402_5%R200 0_0402_5% R199 0_0402_5%R199 0_0402_5%

R163 0_0402_5%R163 0_0402_5% R164 0_0402_5%R164 0_0402_5%

R173 8.2K_0402_5%R173 8.2K_0402_5%

1

2

12

C278

1 2 1 2

0.1U_0402_16V4Z

1

C404

2

0.1U_0402_16V4Z

SB_CK_SCLK <10,11,18,31>

SB_CK_SDAT <10,11,18,31>

+3VS_CLK

1

C295

2

0.1U_0402_16V4Z

R169

R169 261_0402_1%

261_0402_1%

1 2

CLK_NBHT <13> CLK_NBHT# <13>

CLK_NBGFX <13> CLK_NBGFX# <13>

CLK_PCIE_LAN <25> CLK_PCIE_LAN# <25>

CLK_PCIE_MINI1 <31> CLK_PCIE_MINI1# <31>

CLK_SBLINK_BCLK <13> CLK_SBLINK_BCLK# <13>

CLK_SBSRC_BCLK <17> CLK_SBSRC_BCLK# <17>

2

1

C274

2

0.1U_0402_16V4Z

1

C160

2

CLK_CPU_BCLK <8>

CLK_CPU_BCLK# <8>

NB HTT

NB GFX

LAN

MiniCard

NB A LINK

SB RCLK

1

0.1U_0402_16V4Z

1

C140

2

0.1U_0402_16V4Z

1

C268

2

1

C294

2

0.1U_0402_16V4Z

1

C297

C297 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1U CLOSE PIN 69

CPU

+3VS_CLK

12

R161

8.2K_0402_5%

SRC_SLOW

12

R111

@

8.2K_0402_5%

LANSRC 0

SRC 1

MINI1 (WLAN)

SRC 2

NEW CARD

SRC 3 SRC 4

NB-Alink SRC 5 SRC 6

SB-Alink

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

RS740 RX780 RS780

66M SE(SINGLE END)

NC

14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) NC NC vref

100M DIFF NC 100M DIFF

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC

SEL_HTT66

SEL_SATA

* default

configure as single-ended 66MHz output

1

*0

configure as differential 100MHz output

1*

SS 100M SATA SRC6 output SS 100M SATA SRC6 output

0

5

No used

configure as 27M and 27M_SS outputSEL_27M

1 0

configure as SRC_7 output

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

EXTERNAL CLOCK GENERATOR

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

16 47Wednesday, May 20, 2009

1

0.1

of

5

SB_RX0P<12> SB_RX0N<12> SB_RX1P<12> SB_RX1N<12> SB_RX2P<12> SB_RX2N<12> SB_RX3P<12>

D D

A_RST#

1 2

R135 8.2K_0402_5%@R135 8.2K_0402_5%@

+3VALW

C177

12

0.1U_0402_16V4Z

C C

B B

A_RST#

1 2

18P_0402_50V8J

20M_0603_5%

1 2

18P_0402_50V8J

5

U11

2

P

B

1

A

3

R134 33_0402_5%@R134 33_0402_5%@

R101 20M_0402_5%@R101 20M_0402_5%@

C203

12

R91

C403

PLT_RST#

4

Y

G

NC7SZ08P5X_NL_SC70-5

100K_0402_5%

12

Y2

4

OUT

1

IN

32.768KHZ_12.5P_MC-306

PLT_RST# <13,15,25,28,31>

12

R293

@R293

@

SB_32KHI

3

NC

2

NC

SB_32KHO

SB_RX3N<12> SB_TX0P<12>

SB_TX0N<12> SB_TX1P<12> SB_TX1N<12> SB_TX2P<12> SB_TX2N<12> SB_TX3P<12> SB_TX3N<12>

+1.2V_HT

Close to SB

A A

5

4

C172 0.1U_0402_16V7KC172 0.1U_0402_16V7K

1 2

C246 0.1U_0402_16V7KC246 0.1U_0402_16V7K

1 2

C402 0.1U_0402_16V7KC402 0.1U_0402_16V7K

1 2

C176 0.1U_0402_16V7KC176 0.1U_0402_16V7K

1 2

C183 0.1U_0402_16V7KC183 0.1U_0402_16V7K

1 2

C186 0.1U_0402_16V7KC186 0.1U_0402_16V7K

1 2

C204 0.1U_0402_16V7KC204 0.1U_0402_16V7K

1 2

C214 0.1U_0402_16V7KC214 0.1U_0402_16V7K

1 2

R127 562_0402_1%R127 562_0402_1%

+PCIE_VDDR

1 2

MBC1608121YZF_0603

R131 2.05K_0402_1%R131 2.05K_0402_1%

L59

C468

2.2U_0402_6.3V6M

CLK_SBSRC_BCLK<16> CLK_SBSRC_BCLK#<16>

External 14MHz for SB710

CLK_14M_SB<16>

@

10_0402_5%

@

22P_0402_50V8J

ALLOW_LDTSTOP<13>

H_PROCHOT_R#<8>

H_PWRGD<8>

LDT_STOP#<8,13>

LDT_RST#<8>

LDT_PG: OD pin

4

2

1

R635

C690

A_RST#

12 12

+SB_PCIEVDD

1

C472

C472 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

12

1

2

SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

<43mA>

SB_32KHI

SB_32KHO

3

U10A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

218S7EALA11FG_BGA528_SB700

SB710 Ver:A14 <SA000030740>

RTC XTAL

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

CPU

3

2

P4

PCICLK0

P3

PCICLK1

P1

PCICLK2

P2

PCICLK3

T4

PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCI INTERFACE

REQ3#/GPIO70 REQ4#/GPIO71

GNT3#/GPIO72 GNT4#/GPIO73

INTE#/GPIO33

INTF#/GPIO34

INTG#/GPIO35

CLOCK GENERATOR

INTH#/GPIO36

LPC

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

INTRUDER_ALERT#

RTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

T3

N1

PCIRST#

U2

AD0

P7

AD1

V4

AD2

T1

AD3

V3

AD4

U1

AD5

V1

AD6

V2

AD7

T2

AD8

W1

AD9

T9

AD10

R6

AD11

R7

AD12

R5

AD13

U8

AD14

U5

AD15

Y7

AD16

W8

AD17

V9

AD18

Y8

AD19

AA8

AD20

Y4

AD21

Y3

AD22

PCI_AD23

Y2

AD23

PCI_AD24

AA2

AD24

PCI_AD25

AB4

AD25

PCI_AD26

AA1

AD26

PCI_AD27

AB3

AD27

PCI_AD28

AB2

AD28

AC1

AD29

AC2

AD30

AD1

AD31

W2

CBE0#

U7

CBE1#

AA7

CBE2#

Y1

CBE3#

AA6

FRAME#

W5

DEVSEL#

AA5

IRDY#

Y5

TRDY#

U6

PAR

W6

STOP#

W4

PERR#

V7

SERR#

AC3

REQ0#

AD4

REQ1#

AB7

REQ2#

AE6 AB6 AD2

GNT0#

AE4

GNT1#

AD5

GNT2#

AC6 AE5 AD6

CLKRUN#

V5

LOCK#

AD3 AC4 AE2 AE3

G22

LPCCLK0

E22

LPCCLK1

H24

LAD0

H23

LAD1

J25

LAD2

J24

LAD3

H25

LFRAME#

H22

LDRQ0#

AB8 AD7 V15

SERIRQ

C3

RTCCLK

C2 B2

VBAT

2005/03/08 2010/03/12

CLK_LPC_EC

R107 1M_0402_5%

C405

1

2

0.1U_0402_16V4Z

1 2

R149 0_0402_5%R149 0_0402_5%

R108 22_0402_5%R108 22_0402_5%

1 2

1

2

PCI_CLK2 <21> PCI_CLK3 <21> PCI_CLK4 <21> PCI_CLK5 <21>

PCI_AD23 <21> PCI_AD24 <21> PCI_AD25 <21> PCI_AD26 <21> PCI_AD27 <21> PCI_AD28 <21>

1 2

LPC_AD0 <28> LPC_AD1 <28> LPC_AD2 <28> LPC_AD3 <28> LPC_FRAME# <28>

SERIRQ <28>

@

C134

RTC_CLK <21>

1 2

R385 510_0402_5%R385 510_0402_5%

W=20mils

for Clear CMOS

1U_0402_6.3V4Z

Compal Secret Data

Deciphered Date

+RTCVCC

Strap pin

PM_CLKRUN# <28>

CLK_PCI_EC

STRAP PIN

+RTCVCC

@ R379

@

2

R556 1K_0402_5%

R379 0_0603_5%

0_0603_5%

CLK_PCI_EC <21,28>

LPCCLK1 <21>

12

C339

1

STRAP PIN

+RTCBATT

D5

3

1

2

0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

Date: Sheet

1

2

BAS40-04_SOT23-3

SB700-PCIE/CPU/LPC/ACPI

NCWG0 LA-5481

+CHGRTC

1

0.1

of

17 47Wednesday, May 20, 2009

5

D D

C C

+3VS

1 2

R389 2.2K_0402_5%R389 2.2K_0402_5%

R409 2.2K_0402_5%R409 2.2K_0402_5%

1 2

R399 2.2K_0402_5%R399 2.2K_0402_5%

1 2

SUS_STAT#_L

R395 4.7K_0402_5%R395 4.7K_0402_5%

RSMRST#

SB_CK_SCLK SB_CK_SDAT

SUS_STAT#<13>

SKU ID: UMA Combine NAL00 SW code

SUS_STAT# SUS_STAT#_L

SB_PCIE_WAKE#<31>

H_THERMTRIP#<8>

CLK Gen, WLAN, DDR

MDC: option

HDA_SYNC_MDC<34> HDA_SYNC_AUDIO<35>

HDA_RST_AUDIO#<35> HDA_RST_MDC#<34>

12 12 12

R119 33_0402_5%R119 33_0402_5% R118 33_0402_5% @R118 33_0402_5% @ R121 33_0402_5%R121 33_0402_5% R120 33_0402_5%R120 33_0402_5%

HDARST#<21>

HDA_SDIN0 HDA_SDIN1 HDA_BITCLK

EC_LID_OUT# SB_PCIE_WAKE#

HDA_BITCLK_AUDIO<35> HDA_BITCLK_MDC<34> HDA_SDOUT_MDC<34> HDA_SDOUT_AUDIO<35> HDA_SDIN0<35> HDA_SDIN1<34>

B B

STRAP PIN

R393 10K_0402_5%@R393 10K_0402_5%@ R391 10K_0402_5%@R391 10K_0402_5%@ R116 10K_0402_5%@R116 10K_0402_5%@

+3VALW

R525 100K_0402_5%@R525 100K_0402_5%@

1 2

R415 10K_0402_5%R415 10K_0402_5%

1 2

A A

1 2 1 2 1 2 1 2

R123 33_0402_5%R123 33_0402_5% R125 33_0402_5%R125 33_0402_5%

R117 33_0402_5%R117 33_0402_5% R122 33_0402_5%R122 33_0402_5%

HDA_BITCLK HDA_SDOUT

NB_PWRGD<13>

+3VS

4

1 2

R555 0_0402_5%R555 0_0402_5%

1 2

R404 2.2K_0402_5%@R404 2.2K_0402_5%@

1 2

R410 2.2K_0402_5%R410 2.2K_0402_5%

SB_CK_SCLK<10,11,16,31> SB_CK_SDAT<10,11,16,31>

EC_LID_OUT#<28>

1 2 1 2

EC_SWI#<28>

PM_SLP_S3#<28> PM_SLP_S5#<28> PBTN_OUT#<28> SB_PWRGD<8,33>

TP10TP10 TP11TP11 TP12TP12

EC_GA20<28>

EC_KBRST#<28>

EC_SCI#<28> EC_SMI#<28>

RSMRST#<28>

SB_SPKR<35>

USB_OC#1<32> USB_OC#0<32>

HDA_SDIN0 HDA_SDIN1

+3VS

1 2

R126 2.2K_0402_5%

CRT_DET_R

H_THERMTRIP# NB_PWRGD

RSMRST#

SB_CK_SCLK SB_CK_SDAT

USB_OC#1 USB_OC#0

HDA_SYNC

HDARST#

@

SKUID

3

U10D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

218S7EALA11FG_BGA528_SB700

SB710 Ver:A14 <SA000030740>

SB700

USB OC

HD AUDIO

INTEGRATED uC

Part 4 of 5

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

INTEGRATED uC

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N USB_FSD12P

USB_FSD12N

USB 1.1

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N USB_HSD3P

USB_HSD3N

GPIO

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

IMC_GPIO8 IMC_GPIO9

C8 G8

E6 E7

F7 E8

H11 J10

E11 F11

A11 B11

C10 D10

G11 H12

E12 E14

C12 D12

B12 A12

G12 G14

H14 H15

A13 B13

B14 A14

A18 B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

USB_RCOMP

R390 11.8K_0402_1%R390 11.8K_0402_1%

OHCI4 Disable

EHCI1 Disable

USB20_P5 USB20_N5

USB20_P4 USB20_N4

USB20_P3 USB20_N3

USB20_P1 USB20_N1

USB20_P0 USB20_N0

2

@

1 2

R124 33_0402_5%

1 2

USB20_P5 <31> USB20_N5 <31>

USB20_P4 <27> USB20_N4 <27>

USB20_P3 <24> USB20_N3 <24>

USB20_P1 <32> USB20_N1 <32>

USB20_P0 <32> USB20_N0 <32>

GPIO16 <21> GPIO17 <21>

STRAP PIN STRAP PIN

CRT_DET#<23>

@

1 2

C269 22P_0402_50V8J

CLK_48M_USB <16>

MiniCard1(WLAN) Card Reader Camera

M/B conn M/B conn

2

Q40

G

2N7002_SOT23

G

+3VALW

R413

R413 100K_0402_5%

100K_0402_5%

1 2

CRT_DET

13

D

S

1

S3 Power off

S3 Wake Up

SB Power Domain :S5

High: CRT Plugged

CRT_DET_R

@

1 2

R558 0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

SB700-SATA/GPIO/USB/AUDIO

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

18 47Wednesday, May 20, 2009

1

0.1

of

5

4

3

2

1

Port Number

D D

Port 0

Port 1

Port 2

U10B

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

IDE_DACK#

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

SATA_CAL

SATA_X1 SATA_X2

<93mA>

<6mA>

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

218S7EALA11FG_BGA528_SB700

Main HDD

2nd HDD

Main ODD

C C

C27627P_0402_50V8J

1 2

B B

12

C27927P_0402_50V8J

+1.2V_HT

Y325MHZ_20P Y325MHZ_20P

BLM18PG121SN1D_0603

+3VS

2nd ODD

SATA_X1

12

R150

10M_0402_5%

SATA_X2

L64

12

L62

BLM18PG121SN1D_0603

1U_0402_6.3V4Z

+3VS

SATA_LED#<34>

12

SATA_STX_DRX_P0<22> SATA_STX_DRX_N0<22>

SATA_DTX_C_SRX_N0<22> SATA_DTX_C_SRX_P0<22>

SATA_STX_DRX_P1<22> SATA_STX_DRX_N1<22>

SATA_DTX_C_SRX_N1<22> SATA_DTX_C_SRX_P1<22>

SATA_STX_DRX_P2<22> SATA_STX_DRX_N2<22>

SATA_DTX_C_SRX_N2<22> SATA_DTX_C_SRX_P2<22>

SATA_STX_DRX_P3<22> SATA_STX_DRX_N3<22>

SATA_DTX_C_SRX_N3<22> SATA_DTX_C_SRX_P3<22>

R400 1K_0402_1%R400 1K_0402_1%

R401 10K_0402_5%R401 10K_0402_5%

1 2

+PLLVDD_SATA

1

C530

2.2U_0603_6.3V4Z

2

C493

1

C497

+XTLVDD_SATA

C496

12

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

SA00001S570 Ver:A12

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DRQ

IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#

AVDD AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

SB_SI_SPI_SO

G6

SB_SO_SPI_SI

D2

SB_SPICLK

D1

SB_HOLD#

F4

SB_SPICS#

F3 U15

J1 M8

M5 M7

P5 P8 R8

C6 B6 A6 A5 B5

A4 B4 C4 D4 D5 D6 A7 B7

F6

<5mA>

G7

C456

0.1U_0402_16V4Z

+SB_AVDD

1

2

Port 3

Port 4

Port 5

EC_THERM# <28>

2 1

D25 CH751H-40PT_SOD323-2

R377 100K_0402_5%R377 100K_0402_5% R378 100K_0402_5%@R378 100K_0402_5%@

L55

BLM18PG121SN1D_0603

1

C457

2.2U_0603_6.3V4Z

2

Pri/SEC,Mas/Slave assignment

Primary master

Secondary master

Primary slave

Secondary slave

Primary (Secondary) master

Primary (Secondary) slave

SB_HOLD#

1 2 1 2

+3VALW

12

+3VALW

2 1

1K_0402_5%

SB_SPICS#

@

1 2

R551 0_0402_5%

ACIN <28,37,38,40>

+3VS +3VALW

D36 CH751H-40PT_SOD323-2

@

R557

@R557

@

0_0603_5%

R549

@

SATA drive controlled by

SATA controler

PATA controler

C677 0.1U_0402_16V4Z@C677 0.1U_0402_16V4Z@

12

R554

@

1 2

10K_0402_5%

1 2

R559

R559 10K_0402_5%@

10K_0402_5%@

1 2

U40

1

CE#

3

WP#

7

HOLD#

4

VSS

MX25L8005M2C-15G_SOP8

@

for ACIN level issue

+SB_SPI_VCC

8

VDD

6

SCK

5

SI

2

SO

SB_SPICLK SB_SO_SPI_SI SB_SI_SPI_SO

Reserve For Debug

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

SB700-SATA

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

19 47Wednesday, May 20, 2009

1

0.1

of

5

+3VS

C524 22U_0805_6.3V6MC524 22U_0805_6.3V6M

D D

+3VS

+1.2V_HT

C C

+1.2V_HT

+3VALW

B B

1 2

C604 1U_0402_6.3V4ZC604 1U_0402_6.3V4Z

1 2

C603 1U_0402_6.3V4ZC603 1U_0402_6.3V4Z

1 2

C508 1U_0402_6.3V4ZC508 1U_0402_6.3V4Z

1 2

C489 1U_0402_6.3V4ZC489 1U_0402_6.3V4Z

1 2

C512 1U_0402_6.3V4ZC512 1U_0402_6.3V4Z

1 2

C529 0.1U_0402_16V4ZC529 0.1U_0402_16V4Z

1 2

C490 0.1U_0402_16V4ZC490 0.1U_0402_16V4Z

1 2

C465 0.1U_0402_16V4ZC465 0.1U_0402_16V4Z

1 2

@

1 2

C516 22U_0805_6.3V6M

C495 0.1U_0402_16V4Z@C495 0.1U_0402_16V4Z@

1 2

C518 0.1U_0402_16V4Z@C518 0.1U_0402_16V4Z@

1 2

C522 0.1U_0402_16V4Z

1 2

@

L65

1 2 1 2 1 2 1 2

1 2

1 2 1 2

1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

L63

12

L26

12

FBMA-L11-201209-221LMA30T_0805

C250 22U_0805_6.3V6MC250 22U_0805_6.3V6M

C520 4.7U_0805_10V4ZC520 4.7U_0805_10V4Z

C467 1U_0402_6.3V4ZC467 1U_0402_6.3V4Z C247 0.1U_0402_16V4ZC247 0.1U_0402_16V4Z

C514 0.1U_0402_16V4ZC514 0.1U_0402_16V4Z

FBMA-L11-201209-221LMA30T_0805

C526 22U_0805_6.3V6MC526 22U_0805_6.3V6M C517 1U_0402_6.3V4ZC517 1U_0402_6.3V4Z C527 1U_0402_6.3V4ZC527 1U_0402_6.3V4Z C509 0.1U_0402_16V4ZC509 0.1U_0402_16V4Z C511 0.1U_0402_16V4ZC511 0.1U_0402_16V4Z

FBMA-L11-201209-221LMA30T_0805

C217 10U_0805_10V4ZC217 10U_0805_10V4Z C216 10U_0805_10V4ZC216 10U_0805_10V4Z C458 1U_0402_6.3V4ZC458 1U_0402_6.3V4Z C459 1U_0402_6.3V4ZC459 1U_0402_6.3V4Z C466 0.1U_0402_16V4ZC466 0.1U_0402_16V4Z C494 0.1U_0402_16V4ZC494 0.1U_0402_16V4Z C469 0.1U_0402_16V4ZC469 0.1U_0402_16V4Z

+PCIE_VDDR

+1.2V_SATA

+AVDD_USB

4

<71mA>

<600mA>

<567mA>

<658mA>

U10C

L9

VDDQ_1

M9

VDDQ_2

T15

VDDQ_3

U9

VDDQ_4

U16

VDDQ_5

U17

VDDQ_6

V8

VDDQ_7

W7

VDDQ_8

Y6

VDDQ_9

AA4

VDDQ_10

AB5

VDDQ_11

AB21

VDDQ_12

Y20

VDD33_18_1

AA21

VDD33_18_2

AA22

VDD33_18_3

AE25

VDD33_18_4

P18

PCIE_VDDR_1

P19

PCIE_VDDR_2

P20

PCIE_VDDR_3

P21

PCIE_VDDR_4

R22

PCIE_VDDR_5

R24

PCIE_VDDR_6

R25

PCIE_VDDR_7

AA14

AVDD_SATA_1

AB18

AVDD_SATA_4

AA15

AVDD_SATA_2

AA17

AVDD_SATA_3

AC18

AVDD_SATA_5

AD17

AVDD_SATA_6

AE17

AVDD_SATA_7

A16

AVDDTX_0

B16

AVDDTX_1

C16

AVDDTX_2

D16

AVDDTX_3

D17

AVDDTX_4

E17

AVDDTX_5

F15

AVDDRX_0

F17

AVDDRX_1

F18

AVDDRX_2

G15

AVDDRX_3

G17

AVDDRX_4

G18

AVDDRX_5

218S7EALA11FG_BGA528_SB700

SB710 Ver:A14 <SA000030740>

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

SATA I/O

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

3.3V_S5 I/OCORE S5

S5_1.2V_1 S5_1.2V_2

USB_PHY_1.2V_1 USB_PHY_1.2V_2

V5_VREF AVDDCK_3.3V AVDDCK_1.2V

AVDDC

<510mA><131mA>

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

<32mA>

A17 A24 B17 J4 J5 L1 L2

<113mA>

G2 G4

<197mA>

A10 B10

AE7 J16 K17 E9

<1mA> <47mA> <62mA> <17mA>

3

+SB_VDD

1 2

C528 22U_0805_6.3V6MC528 22U_0805_6.3V6M C484 1U_0402_6.3V4ZC484 1U_0402_6.3V4Z C487 1U_0402_6.3V4ZC487 1U_0402_6.3V4Z C475 1U_0402_6.3V4ZC475 1U_0402_6.3V4Z C471 1U_0402_6.3V4ZC471 1U_0402_6.3V4Z C492 0.1U_0402_16V4ZC492 0.1U_0402_16V4Z C485 0.1U_0402_16V4ZC485 0.1U_0402_16V4Z

+1.2V_CKVDD

+S5_3V

1 2

R416 0_0805_5%R416 0_0805_5%

1 2

C481 22U_0805_6.3V6MC481 22U_0805_6.3V6M

1 2

C483 2.2U_0603_6.3V4ZC483 2.2U_0603_6.3V4Z

1 2

C525 2.2U_0603_6.3V4ZC525 2.2U_0603_6.3V4Z C510 0.1U_0402_16V4ZC510 0.1U_0402_16V4Z C470 0.1U_0402_16V4ZC470 0.1U_0402_16V4Z C504 0.1U_0402_16V4ZC504 0.1U_0402_16V4Z

+S5_1.2V

+1.2_USB

FBMA-L11-160808-221LMT 0603

1 2

C271 22U_0805_6.3V6MC271 22U_0805_6.3V6M C286 0.1U_0402_16V4ZC286 0.1U_0402_16V4Z C270 0.1U_0402_16V4ZC270 0.1U_0402_16V4Z R419 1K_0402_5%R419 1K_0402_5%

+V5_VREF +AVDDCK_3.3V +AVDDCK_1.2V

0.1U_0402_16V4Z

+AVDDC

+AVDDCK_1.2V

1 2

R418 0_0805_5%R418 0_0805_5%

12 12 12 12 12 12

L28

12 12

+1.2VALW

12

2

1U_0603_10V4Z

1

L54

L56

12

+3VALW

Reserve for SB700 leakage voltage issue

R417 1K_0402_5%R417 1K_0402_5%

C519

12

C4632.2U_0603_6.3V4Z C4632.2U_0603_6.3V4Z

12

C4620.1U_0402_16V4Z C4620.1U_0402_16V4Z

12

FBMA-L11-160808-221LMT 0603

C515 1U_0402_6.3V4ZC515 1U_0402_6.3V4Z

1 2

C285 1U_0402_6.3V4ZC285 1U_0402_6.3V4Z

1 2

C521 0.1U_0402_16V4ZC521 0.1U_0402_16V4Z C523 0.1U_0402_16V4ZC523 0.1U_0402_16V4Z C284 10U_0805_10V4ZC284 10U_0805_10V4Z

1 2

12 12 12

L29

12 12

12

C513

BLM18PG121SN1D_0603

+1.2V_HT

R528 0_0603_5%R528 0_0603_5%

12

C460 1U_0402_6.3V4ZC460 1U_0402_6.3V4Z

12

C461 1U_0402_6.3V4ZC461 1U_0402_6.3V4Z

12 21

D27 CH751H-40PT_SOD323-2D27 CH751H-40PT_SOD323-2

+3VALW

+1.2V_HT

C4642.2U_0603_6.3V4Z C4642.2U_0603_6.3V4Z

12

C4910.1U_0402_16V4Z C4910.1U_0402_16V4Z

12

2

+1.2VALW

+5VS +3VS

U10E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

H18

PCIE_CK_VSS_1

J17

PCIE_CK_VSS_2

J22

PCIE_CK_VSS_3

K25

PCIE_CK_VSS_4

M16

PCIE_CK_VSS_5

M17

PCIE_CK_VSS_6

M21

PCIE_CK_VSS_7

P16

PCIE_CK_VSS_8

F9

AVSSC

218S7EALA11FG_BGA528_SB700

SB710 Ver:A14 <SA000030740>

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

Part 5 of 5

GROUND

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

1

L58

+AVDDCK_3.3V

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

L58

BLM18PG121SN1D_0603

12

Compal Secret Data

C4982.2U_0603_6.3V4Z C4982.2U_0603_6.3V4Z

12

C4990.1U_0402_16V4Z C4990.1U_0402_16V4Z

12

Deciphered Date

+3VS

Title

SB700-PWR & GND II

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

20 47Wednesday, May 20, 2009

1

0.1

of

5

4

3

2

1

REQUIRED STRAPS

D D

PULL HIGH

PULL LOW

C C

PCI_CLK2<17> PCI_CLK3<17> PCI_CLK4<17> PCI_CLK5<17>

CLK_PCI_EC<17,28>

LPCCLK1<17> RTC_CLK<17>

HDARST#<18>

GPIO17<18> GPIO16<18>

PCI_CLK2

BOOTFAIL TIMER ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

R145

@

R143

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW

12

R138

10K_0402_5%

R138

@

12

R133

12

10K_0402_5%

12

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

R144

@

R141

@

12

10K_0402_5%

12

10K_0402_5%

RESERVED

DEBUG STRAPS

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

LPC_CLK0

12

R146

10K_0402_5%

@

12

R132

10K_0402_5%

@

CLK_PCI_EC

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

12

R136

10K_0402_5%

@

12

R129

10K_0402_5%

LPC_CLK1

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

R89

10K_0402_5%

@

R96

10K_0402_5%

RTC_CLK

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

12

R394

10K_0402_5%

@

12

R386

2.2K_0402_5%

@

AZ_RST_CD#

EC ENABLED

EC DISABLED

DEFAULT

12

R142

10K_0402_5%

@

12

R130

10K_0402_5%

GP17

GP16

Internal pull up

H,H = Reserved H,L = SPI ROM

L,H = LPC ROM (Default L,NC)

L,L = FWH ROM

12

R87

R494

2.2K_0402_5%

@

12

R94

R137

2.2K_0402_5%

@

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

PCI_AD25 PCI_AD24

USE IDE PLL

DEFAULT

BYPASS IDE PLL

PULL HIGH

PULL LOW

PCI_AD28

USE LONG RESET

DEFAULT

USE SHORT RESET

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

PCI_AD23

RESERVED

B B

PCI_AD28<17> PCI_AD27<17> PCI_AD26<17> PCI_AD25<17> PCI_AD24<17> PCI_AD23<17>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

12

R156

2.2K_0402_5%

@

2

12

R148

2.2K_0402_5%

@

12

R158

2.2K_0402_5%

@

Title

Size Document Number Rev

Custom

Date: Sheet

12

R157

2.2K_0402_5%

@

SB700-STRAPS

NCWG0 LA-5481

12

R147

2.2K_0402_5%

@

1

12

R159

2.2K_0402_5%

@

21 47Wednesday, May 20, 2009

0.1

of

5

4

3

2

1

+5VS

0.1U_0402_16V4Z

C366

1 2 1 2

+3VS

1

2

1

C360

10U_0805_10V4Z

D D

C C

10U_0805_10V4Z

2

SATA_STX_DRX_P0<19> SATA_STX_DRX_N0<19>

SATA_DTX_C_SRX_N0<19> SATA_DTX_C_SRX_P0<19>

1

C363

2

0.1U_0402_16V4Z

C289 0.01U_0402_25V7KC289 0.01U_0402_25V7K C291 0.01U_0402_25V7KC291 0.01U_0402_25V7K

C302 0.01U_0402_25V7KC302 0.01U_0402_25V7K C305 0.01U_0402_25V7KC305 0.01U_0402_25V7K

+5VS

1

C368

2

1000P_0402_50V7K

SATA_STX_C_DRX_P0 SATA_STX_C_DRX_N0

SATA_DTX_SRX_N0 SATA_DTX_SRX_P0

R544

1 2

0_0805_5%

R545

1 2

0_0805_5%

10U_0805_10V4Z

+3VS

C351

1

2

1

C349

2

0.1U_0402_16V4Z

SATA HDD CONN

JSATA2

1

GND

2

HTX+

3

HTX-

4

GND

5

HRX-

6

HRX+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12 VCC12

CONN@

GND GND

22

OCTEK_SAT-22SU1G_NR

0.1U_0402_16V4Z

1

C347

2

24 23

1

C346

2

1000P_0402_50V7K

+5VS

C370

+

@

150U_D2_6.3VM

Close to SATA HDD

+5VS

10U_0805_10V4Z

Placea caps. near ODD CONN.

1

C153

2

0.1U_0402_16V4Z

1

C150

2

1U_0402_6.3V4Z

1

C148

2

1

C149

2

1000P_0402_50V7K

SATA ODD CONN

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND GND13GND

SANTA_206401-1_13P

CONN@

KALA0 used

GND

15 14

1 2

+5VS

SATA_STX_C_DRX_P2 SATA_STX_C_DRX_N2

SATA_DTX_SRX_N2 SATA_DTX_SRX_P2

C308 0.01U_0402_25V7KC308 0.01U_0402_25V7K

SATA_STX_DRX_P2<19>

1

2

SATA_STX_DRX_N2<19>

SATA_DTX_C_SRX_N2<19> SATA_DTX_C_SRX_P2<19>

1 2

C307 0.01U_0402_25V7KC307 0.01U_0402_25V7K

1 2

C311 0.01U_0402_25V7KC311 0.01U_0402_25V7K

1 2

C312 0.01U_0402_25V7KC312 0.01U_0402_25V7K

1 2

R617 1K_0402_1%@R617 1K_0402_1%@

KALA0 used

JP2

1

C314 0.01U_0402_25V7KC314 0.01U_0402_25V7K

SATA_STX_DRX_P1<19>

Second HDD

B B

Second ODD

SATA_STX_DRX_N1<19> SATA_DTX_C_SRX_N1<19>

SATA_DTX_C_SRX_P1<19> SATA_STX_DRX_P3<19>

SATA_STX_DRX_N3<19> SATA_DTX_C_SRX_N3<19>

SATA_DTX_C_SRX_P3<19>

1 2

C313 0.01U_0402_25V7KC313 0.01U_0402_25V7K

1 2

C316 0.01U_0402_25V7KC316 0.01U_0402_25V7K

1 2

C315 0.01U_0402_25V7KC315 0.01U_0402_25V7K

1 2

C318 0.01U_0402_25V7KC318 0.01U_0402_25V7K

1 2

C317 0.01U_0402_25V7KC317 0.01U_0402_25V7K

1 2

C320 0.01U_0402_25V7KC320 0.01U_0402_25V7K

1 2

C319 0.01U_0402_25V7KC319 0.01U_0402_25V7K

1 2

SATA_STX_C_DRX_P1 SATA_STX_C_DRX_N1

SATA_DTX_SRX_N1 SATA_DTX_SRX_P1

SATA_STX_C_DRX_P3 SATA_STX_C_DRX_N3

SATA_DTX_SRX_N3 SATA_DTX_SRX_P3

3 5 7

9 11 13 15 17 19 21 23 25 27 29

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

GND31GND32GND33GND34GND35GND

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

ACES_88018-304G

36

CONN@

+5VS

+3VS

+3VS+5VS

0.1U_0402_16V4Z

1

C574

2

1000P_0402_50V7K

A A

5

4

1000P_0402_50V7K

1

C577

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

1

C579

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C580

2

Compal Secret Data

2005/03/08 2010/03/12

3

Compal Secret Data

1

C572

2

1000P_0402_50V7K

Deciphered Date

1

C573

2

10U_0805_10V4Z

1

C571

2

Title

HDD/ODD

Size Document Number Rev

B

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

22 47Wednesday, May 20, 2009

of

1

of

0.1

A

CRT Connector

1 1

GMCH_CRT_R<13>

GMCH_CRT_G<13>

GMCH_CRT_B<13>

GMCH_CRT_HSYNC<13,15>

2 2

GMCH_CRT_VSYNC<13,15>

R354 0_0402_5%R354 0_0402_5%

R356 0_0402_5%R356 0_0402_5%

R339

140_0402_1%

1 2

B

12

R338

1 2

150_0402_1%

1 2

C434 0.1U_0402_16V4ZC434 0.1U_0402_16V4Z

CRT_HSYNC

C

+5VS

L32

CRT_R CRT_R_L

CRT_G

CRT_B

12

1

R340

150_0402_1%

C408

2

8P_0402_50V8D

+CRT_VCC

5

1

U36

P

4

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

1 2

C433 0.1U_0402_16V4ZC433 0.1U_0402_16V4Z

CRT_VSYNC

1

C412

2

8P_0402_50V8D

+CRT_VCC

5

P

A2Y

G

3

1

OE#

L32

1 2

FCM2012CF-800T06_2P

L34

1 2

FCM2012CF-800T06_2P

L33

1 2

FCM2012CF-800T06_2P

1

C414

2

8P_0402_50V8D

12

R360 10K_0402_5%R360 10K_0402_5%

D_CRT_HSYNC

U35

D_CRT_VSYNC

4

74AHCT1G125GW_SOT353-5

CRT_G_L

CRT_B_L

C413

6P_0402_50V8D

D19

D18

@

DAN217_SC59

1

2

D19

@

DAN217_SC59

1

3

1

C410

6P_0402_50V8D

2

1 2

2

L38 MBC1608121YZF_0603L38 MBC1608121YZF_0603

L37 MBC1608121YZF_0603L37 MBC1608121YZF_0603

1

3

D

D20

@

DAN217_SC59

1

2

3

1

C409

C409 6P_0402_50V8D

6P_0402_50V8D

2

1

C424

2

+5VS

HSYNC_L

VSYNC_L

10P_0402_50V8J

C423

2 1

RB491D_SC59-3

10P_0402_50V8J

1

2

D17

0.1U_0402_16V4Z

68P_0402_50V8J

W=40mils

F1

1.1A_6VDC_FUSE

C407

C406

100P_0402_50V8J

1

C411

2

21

1

2

D_DDC_DATA

D_DDC_CLK

1

C422

C422 68P_0402_50V8J

68P_0402_50V8J

2

W=40mils

11

12

13

14 10

15

E

+CRT_VCC+R_CRT_VCC

JCRT1

6 1

7 2

8 3

9 4

5

16

1 2

+CRT_VCC

17

R636

R636 100K_0402_5%

100K_0402_5%

KAW60 used

SUYIN_070549FR015S208CR

CONN@

CRT_DET# <18>

+CRT_VCC

Close to Conn side

12

R77

6.8K_0402_5%

D_DDC_DATA

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2010/03/12

C

Compal Secret Data

D_DDC_CLK

Deciphered Date

6.8K_0402_5%

12

R72

D

+3VS

2

1 3

D

Q50

BSH111 1N_SOT23-3

Q51

BSH111 1N_SOT23-3

G

S

2

G

1 3

D

S

D

S

Title

CRT Conn.

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

GMCH_CRT_DATA <13>

GMCH_CRT_CLK <13>

23 47Wednesday, May 20, 2009

E

of

0.1

5

4

3

2

1

+3VS

1

C426

0.1U_0402_16V4Z@

D D

+LCDVDD

12

R274

R274 300_0603_5%

300_0603_5%

61

2

Q22A

2N7002DW-T/R7_SOT363-6

GMCH_ENVDD<13>

C C

B B

EC_INVT_PWM

GMCH_INVT_PWM

GMCH_ENVDD

R345

10K_0402_5%

EC_INVT_PWM<28>

GMCH_INVT_PWM<13>

R21 4.7K_0402_5%R21 4.7K_0402_5%

1 2

R23 4.7K_0402_5%R23 4.7K_0402_5%

12

VARYBRIGHT FUNCTION

R769 0_0402_5%

1 2

R770 0_0402_5%

LCD POWER CIRCUIT

+3VALW

R348

R348 100K_0402_5%

100K_0402_5%

1 2

R278 1K_0402_5% R278 1K_0402_5%

2N7002DW-T/R7_SOT363-6

3

5

4

@

12

@

12

R347

R347 100K_0402_5%@

100K_0402_5%@

1 2

Q22B

EC_INVT_PWM

GMCH_INVT_PWM

2

Q52A

2N7002DW-T/R7_SOT363-6

5

4

Q52B

2N7002DW-T/R7_SOT363-6

R764 0_0402_5%R764 0_0402_5%

R767 0_0402_5%

61

3

12

1 2

VARY@

1 2

+3VS

12

R30

@

4.7K_0402_5%

1

C431

2

0.047U_0402_16V7K

INVT_PWMINVT_PWM

+3VS

12

R39

@

4.7K_0402_5%

13

D

2

G

S

+3VS

W=60mils

S

G

2

D

1 3

1

C415

4.7U_0805_10V4Z

2

@

1 2

R768 0_0402_5%

Q69

Q69 2N7002_SOT23-3

2N7002_SOT23-3

1

C77

2

Q23

Q23 AO3413_SOT23-3

AO3413_SOT23-3

W=60mils

+LCDVDD

INVT_PWM

4.7U_0805_10V4Z@

+LCDVDD

1

2

C420

0.1U_0402_16V4Z

USB20_N3<18> USB20_P3<18>

BKOFF#<28>

DAC_BRIG INVT_PWM DISPOFF#

GMCH_LCD_CLK<13>

GMCH_LCD_DATA<13>

GMCH_TZOUT0-<13> GMCH_TZOUT0+<13>

GMCH_TZOUT1+<13> GMCH_TZOUT1-<13>

GMCH_TZOUT2+<13> GMCH_TZOUT2-<13> GMCH_TXOUT2+ <13>

GMCH_TZCLK-<13>

R759 0_0402_5%R759 0_0402_5% R760 0_0402_5%R760 0_0402_5%

4

1

GMCH_TZCLK+<13>

1 2 1 2

L77

4

1

WCM2012F2S-900T04_0805@

BKOFF#

C371 220P_0402_50V7KC371 220P_0402_50V7K C372 220P_0402_50V7KC372 220P_0402_50V7K C377 220P_0402_50V7KC377 220P_0402_50V7K

3

2

1 2 1 2 1 2

R763 0_0402_5%R763 0_0402_5%

D2 RB751V_SOD323

2

+INVPWR_B+

3

2

1 2

@

0.1U_0402_16V4Z@

+3VS

21

EDID_LCD_CLK EDID_LCD_DAT

USB20_CMOS_N3 USB20_CMOS_P3

+3VS

@

LCD/PANEL CONN.

40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

8 6 4 2

ACES_88242-4001

CONN@

KALA0 used

12

R1

4.7K_0402_5%

DISPOFF#

R414

R414 100K_0402_5%

100K_0402_5%

1 2

JLVDS1

GND42GND 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2

BAS16_SOT23-3

41 39

39

37

35

33

31

29

27

25

23

21

19

17

15

13

11

9

7

5

3

1

W=40mils

12

D21

@

DAC_BRIG INVT_PWM DISPOFF#

R761 0_0603_5%R761 0_0603_5% R762 0_0603_5%

R762 0_0603_5%

1

C768 0.1U_0402_16V4Z

2

+INVPWR_B+

1

C379

680P_0402_50V7K

2

+LCDVDD

1

@

2

INVT_PWM

1

C416

C416 1U_0402_6.3V4Z

1U_0402_6.3V4Z

@

2

DAC_BRIG <28>

1 2 1 2

@

L20

FBMA-L11-201209-221LMA30T_0805

L15

FBMA-L11-201209-221LMA30T_0805

1

C362

C362 68P_0402_50V8J

68P_0402_50V8J

2

1

C382

C383

C383 10U_0805_10V4Z

10U_0805_10V4Z

C382

0.1U_0402_16V4Z

2

+LCDVDD

GMCH_TXOUT0- <13> GMCH_TXOUT0+ <13>

GMCH_TXOUT1- <13> GMCH_TXOUT1+ <13>

GMCH_TXOUT2- <13> GMCH_TXCLK- <13>

GMCH_TXCLK+ <13>

+3VS +3VALW

12

B+

A A

Security Classification

2005/03/08 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2010/03/12

3

Compal Secret Data

Deciphered Date

Title

LED Conn.

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

24 47Wednesday, May 20, 2009

of

1

of

0.1

5

8114@

1 2

R820 0_0603_5%

1 2

1

2

8114@

12 12

1

C947

C947 27P_0402_50V8J

27P_0402_50V8J

2

1

1U_0603_10V4Z

2

L88 4.7UH_1008HC-472EJFS-A_5%_10088132@L88 4.7UH_1008HC-472EJFS-A_5%_10088132@

1 2

R824 0_0603_5%8132@R824 0_0603_5%8132@

C934

0.1U_0402_16V4Z

8132@

12

C936 1U_0603_10V4Z8114@C936 1U_0603_10V4Z8114@

PCIE_ITX_C_PRX_P1<12>

PCIE_ITX_C_PRX_N1<12>

C940 0.1U_0402_16V7K

C940 0.1U_0402_16V7K C943 0.1U_0402_16V7K

C943 0.1U_0402_16V7K

C957

1

C958

0.1U_0402_16V4Z

2

+3V_LAN

PLT_RST#<13,15,17,28,31>

8114@

C937 1000P_0402_50V7K

C937 1000P_0402_50V7K C938 0.1U_0402_16V7KC938 0.1U_0402_16V7K C939 0.1U_0402_16V7KC939 0.1U_0402_16V7K

12 12

1

2

+2.5V_VDDH/VDD17

12 12 12

R831 2.37K_0402_1%R831 2.37K_0402_1%

+1.2_DVDDL

AVDDVCO1

AVDDVCO2

+AVDD_CEN

R844 0_0603_5%R844 0_0603_5%

1 2

D D

WAKEn 8114: Internal PU 8132: OD

EC_PME#<28> LAN_MIDI0- <26>

+3V_LAN

R829 4.7K_0402_5%

C C

PCIE_PTX_C_IRX_P1<12>

PCIE_PTX_C_IRX_N1<12>

C933

4.7U_0805_10V4Z

8132@

C935 1U_0603_10V4Z

C935 1U_0603_10V4Z C982 0.1U_0402_16V7K

C982 0.1U_0402_16V7K

8132@

1 2

CLK_PCIE_LAN<16>

CLK_PCIE_LAN#<16>

Place Close to Chip

Y8

LAN_X1 LAN_X2

1

2

B B

+1.2_AVDDL

1 2

R834

R834 0_0603_5%

0_0603_5%

A A

8114: R546 need change to bead

Y8

1 2

25MHZ_20P

C946

C946 27P_0402_50V8J

27P_0402_50V8J

L89 FBMA-L11-201209-221LMA30T_0805

1 2

8114@

R835 0_0603_5%

1 2

@

C956

1000P_0402_50V7K

C956

R546 0_0805_5%R546 0_0805_5%

1 2

+1.8_VDD/LX

+2.5V_VDDH/VDD17 CTR12

PCIE_PTX_IRX_P1 PCIE_PTX_IRX_N1

LAN_X1 LAN_X2

12

4

1 2

R825 0_0603_5%8114@R825 0_0603_5%8114@

+1.8_VDD/LX

0.1U_0402_16V4Z

+2.5V_VDDH

U85

1

VDD18O

2

VDD33

6

VDDHO

5

CTR12

3

PERSTn

4

WAKEn

7

VBG1P18V

41

REFCLKP

40

REFCLKN

43

RX_P

44

RX_N

38 37

9

10 31

33

12 34

49

AR8114A 10/100 LAN

TX_P TX_N

XTLO XTLI

SMCLK SMDATA

RBIAS TESTMODE

GND

AR8114-AL1E_QFN48_6X6

Atheros

1 2 3 4

LED_10_100n

LED_DUPLEXn

AVDDL_REG

AVDDL/AVDDL_REG

change to AR8132L-AL1E

Place Close to Pin 28、32、45、46

+1.2_DVDDL

Place Close to Pin15

+2.5V_VDDH

3

C932

U84

A0

VCC

A1

WP

A2

SCL

GND

SDA

AT24C02BN-SH-T_SO8

@

29

TWSI_CLK

TRXP0 TRXN0 TRXP1 TRXN1

DVDDL0 DVDDL1 DVDDL2 DVDDL3

AVDDL0 AVDDL1 AVDDL2 AVDDL3 AVDDL4

AVDDH0 AVDDH1 AVDDH2

NC_0 NC_1 NC_2 NC_3 NC_4 NC_5

8132@

C983

1U_0603_10V4Z

C959

1U_0603_10V4Z

30 47

48 27 13

14 17 18

11 42

28 32 45 46

8 16 22 36 39

15 19 25

20 21 23 24 26 35

0.1U_0402_16V4Z

1

8114@

2

0.1U_0402_16V4Z

1

2

TWSI_DATA

LED_ACTn

+3V_LAN +3V_LAN

1

2

8 7 6 5

R261 0_0402_5%R261 0_0402_5%

C953

4.7K_0402_5%

TWSI_SCL TWSI_SDA

LAN_ACTIVITY# LAN_LINK#

1 2

LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1-

AVDDVCO1 AVDDVCO2

+1.2_DVDDL

+1.2_AVDDL

+2.5V_VDDH

0.1U_0402_16V4Z

1

2

C954

0.1U_0402_16V4Z

R821

C955

、19、

C960

1

C961

0.1U_0402_16V4Z

2

12

1

2

R822

4.7K_0402_5%

TWSI_SCL TWSI_SDA

LAN_ACTIVITY# <26> LAN_LINK# <26>

LAN_CLKREQ# <16> LAN_MIDI0+ <26> LAN_MIDI1+ <26>

LAN_MIDI1- <26>

1

C952

0.1U_0402_16V4Z

2

25

2

Place Close to Chip

LAN_MIDI0+

R843 49.9_0402_1%

LAN_MIDI0-

R845 49.9_0402_1%

LAN_MIDI1+

R846 49.9_0402_1%

LAN_MIDI1-

R847 49.9_0402_1%

12 12 12 12

C978 0.1U_0402_16V4ZC978 0.1U_0402_16V4Z

1 2

C979 0.1U_0402_16V4ZC979 0.1U_0402_16V4Z

1 2

Layout Notice : Close to chip

0.1U_0402_16V4Z

1

C941

2

0.1U_0402_16V4Z

R832

R832 10K_0402_1%

10K_0402_1%

8114@

+1.2_AVDDL

1

C951

0.1U_0402_16V4Z

8114@

2

0.1U_0402_16V4Z

C942

1 2

R833 0_0402_5%

+3VALW

0.1U_0402_16V4Z

1 2

R830 0_1206_5%

1

C948

2

8114@

10U_0805_10V4Z

C944

4.7U_0805_10V4Z

+3V_LAN

Q73

1

NJT4030PT1G_SOT223

2 3

4

8114@

C950

8114@

12

1

2

Place Close to Pin8、16、22、36、39

C965

+1.2_AVDDL

C984

1U_0603_10V4Z

1

8132@

8114@

2

0.1U_0402_16V4Z

C963

0.1U_0402_16V4Z

1

2

C962

1

2

C965

0.1U_0402_16V4Z

1

2

C964

0.1U_0402_16V4Z

1

2

1

C966

0.1U_0402_16V4Z

2

1

+3V_LAN

1

C945

2

0.1U_0402_16V4Z

+2.5V_VDDH

8132@

1

C949

0.1U_0402_16V4Z

8132@

2

1

2

CTR12

Security Classification

2005/07/29 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/07/29 2010/03/12

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN AR8114/8132

NCWG0 LA-5481

1

0.1

25 47Wednesday, May 20, 2009

of

5

+AVDD_CEN

R836

R836 0_0603_5%

0_0603_5%

C969

@

H17

H_3P4

1 2

1

C970

0.1U_0402_16V4Z

2

@

1

D D

LAN_MIDI0+<25> LAN_MIDI0-<25>

LAN_MIDI1+<25> LAN_MIDI1-<25>

C C

H26

H25

@

H_3P4

H18

H_3P4

H25

H_3P4

@

1

H16

H_4P2

@

1

H1

H14

H19

H_3P4

H9

H_3P4

H19

H_3P4

@

1

H4

H_3P4

@

1

H_3P4

@

1

B B

H7

H_3P4

@

1

LAN_MIDI0+ LAN_MIDI0-

LAN_MIDI1+ LAN_MIDI1- RJ45_MIDI1-

LAN_TCT

1

2

0.1U_0402_16V4Z

H24

H23

H_3P4

@

1

4

T1

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+ TD-8TX-

350uH_NS0013LF

RX+

RX-

CT NC NC CT

TX+

75_0402_1%

3

LAN_ACTIVITY#<25>

12

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI1+

R840

R840 75_0402_1%

75_0402_1%

RJ45_GND

16 15 14 13 12 11 10 9

12

R839

R14 5.11K_0402_1%R14 5.11K_0402_1%

+3V_LAN

R837 510_0402_5% R837 510_0402_5%

12

R838 510_0402_5% R838 510_0402_5%

2

C967

1 2

220P_0402_50V7K

JRJ1

LAN_ACTIVITY#_R

12

RJ45_MIDI1-

RJ45_MIDI1+ RJ45_MIDI0RJ45_MIDI0+

1

C968

C968 220P_0402_50V7K

220P_0402_50V7K

2

1 2

C976

C976 68P_0402_50V8J@

68P_0402_50V8J@

1 2

C977

C977 68P_0402_50V8J@

68P_0402_50V8J@

LAN_LINK#

LAN_LINK#<25>

12

RJ45_GND LANGND

LAN_ACTIVITY#_R

LAN_LINK#

JRJ1

12

Amber LED+

11

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

FOX_JM36113-L2R8-7F

CONN@

1 2

C973

1000P_1206_2KV7K

SHLD2 SHLD1

1

C974

2

0.1U_0402_16V4Z

3

16 15

14 13

1

C975

4.7U_0805_10V4Z

2

LAN_LINK# LAN_ACTIVITY#_R

2

D16

@

PJDLC05_SOT23-3

1

H11

H10

H_4P2

@

1

H5

H8

H_2P8

H_4P0N

@

1

H15

H_4P2

A A

@

1

FD1

@

1

FIDUCIAL_C40M80

H6

H20

H_2P8

H_3P4

@

1

H3

H2

H_3P3

@

1

H21

H_4P6X4P0N

@

1

FD2

@

1

FIDUCIAL_C40M80

5

@

1

H12

H_3P3

@

1

FIDUCIAL_C40M80

@

H22

H_3P3

FD3

1

@

H_2P3

H27

@

1

FIDUCIAL_C40M80

FD4

Security Classification

Issued Date

@

1

4

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

LAN Magnetic & RJ45 &Screw

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

26 47Wednesday, May 20, 2009

1

0.1

of

5

C852

1

2

@Y7

@

Y7

+3V_CARD

1

2

12

@

MODE_SEL

R680

R680 0_0402_5%

0_0402_5%

1 2

R548 0_0805_5%

1 2

R547 0_0805_5%R547 0_0805_5%

4.7U_0603_6.3V6K

1 2

R676 0_0402_5%R676 0_0402_5%

@

1 2

C856 6P_0402_50V8D

12MHZ_16PF_6X12000012

@

1 2

C857 6P_0402_50V8D

+3VALW

+3VS

D D

C C

+3VS

R674

@ R674

@

100K_0402_5%

1 2

R335 0_0402_5%R335 0_0402_5%

1

C854

C854 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

47P_0402_50V8J

CLK_48M_SD<16>

C855

@C855

@

RST#

12

1

2

12

R673

R673 10_0402_5%

10_0402_5%

1

C858

C858 10P_0402_50V8J

10P_0402_50V8J

2

EMI

B B

Close to CLK_SD_48M via

+5VS

C859

1

0.1U_0402_16V4Z

2

+XDPWR_SDPWR_MSPWR

EMI

A A

5

R295

100K_0402_5%

4

C853

0.1U_0402_16V4Z

USB20_N4<18>

USB20_P4<18>

5IN1_LED#<34>

XTLI

XTLO

1

C348

0.1U_0402_16V4Z

2

1 2

4

12

C851 0.1U_0402_16V4ZC851 0.1U_0402_16V4Z

+XDPWR_SDPWR_MSPWR

RST# MODE_SEL XTLO XTLI

USB20_N4 USB20_P4

R678

6.19K_0402_1%

1 2

R318 0_0603_5%

3

R675 0_0402_5%R675 0_0402_5%

U77

1

AV_PLL

3

NC

7

NC

9

CARD_3V3

11

D3V3

33

D3V3

8

3V3_IN

44

RST#

45

MODE_SEL

47

XTLO

48

XTLI

4

DM

5

DP

14

GPIO0

2

RREF

12

DGND

32

DGND

6

AGND

46

AGND

RTS5159-GR_LQFP48_7X7

R672

R672 0_0402_5%

0_0402_5%

1 2

+CARDPWR

1

C342

0.1U_0402_16V4Z

2

C342

C477

10U_0805_10V4Z

+CARDPWR

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

SD_DAT2/XD_RE#_SP16

SD_DAT3/XD_WE#_SP15

SD_DAT4/XD_WP#/MS_D7_SP13

SD_DAT5/XD_D0/MS_D6_SP12 SD_CLK/XD_D1/MS_CLK_SP11 SD_DAT6/XD_D7/MS_D3_SP10

SD_DAT7/XD_D2/MS_D2_SP8 SD_DAT0/XD_D6/MS_D0_SP7 SD_DAT1/XD_D3/MS_D1_SP6

XD_D4/SD_DAT1_SP4

1

C480

2

0.1U_0402_16V4Z

2005/07/29 2010/03/12

3

VREG

MS_D4

XD_CLE_SP19 XD_CE#_SP18 XD_ALE_SP17

XD_RDY_SP14

MS_INS#_SP9

XD_D5_SP5

SD_CD#_SP3

SD_WP_SP2

XD_CD#_SP1

EEDI

XTAL_CTR

MS_D5

EEDO EECS

EESK

SD_CMD

10

C860 1U_0402_6.3V4ZC860 1U_0402_6.3V4Z

22 30

NC

43 42 41 40 39 38 37 35 34 31 29 28 27 26 25 23 21 20 19 18

XTAL_CTR

13 24

15 16 17 36

+CARDPWR

SDDAT5_XDD0_MSD6 SDCLK_XDD1_MSCLK SDDAT7_XDD2_MSD2 SDDAT1_XDD3_MSD1 XDD4_SDDAT1 XDD5_MSBS SDDAT0_XDD6_MSD0 SDDAT6_XDD7_MSD3

SDDAT3_XDWE# SDDAT4_XDWP#_MSD7 XDALE XDCD XD_RDY SDDAT2_XDRE# XDCE# XDCLE

Compal Secret Data

Deciphered Date

1 2

SDDAT2_XDRE# SDDAT3_XDWE#

SDDAT4_XDWP#_MSD7 SDDAT5_XDD0_MSD6 SDCLK_XDD1_MSCLK_L SDDAT6_XDD7_MSD3 MS_INS# SDDAT7_XDD2_MSD2 SDDAT0_XDD6_MSD0 SDDAT1_XDD3_MSD1

XD_RDY

XDD5_MSBS

XDD4_SDDAT1

R681 0_0603_5%R681 0_0603_5%

SD_CMD

JREAD1

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

11

7IN1 GND

31

7IN1 GND

41

7IN1 GND

42

7IN1 GND

TAITW_R015-B10-LM

CONN@

XDCLE XDCE# XDALE

SDCD SDWP XDCD

12

2

R671 0_0402_5%R671 0_0402_5%

7 IN 1 CONN

2

+3VS

SDCLK_XDD1_MSCLK

12

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW SD-WP-SW

MS-SCLK

MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

JAWD0 used

1

XTAL_CTR If Open , use 12MHz. crystal If Pull high , use CLKGEN 48MHz.

+CARDPWR

21 28

SDCLK_XDD1_MSCLK

20

SDDAT0_XDD6_MSD0

14 12 30 29 27 23 18 16 25 1

2

26 17 15 19 24 22 13

Title

Size Document Number Rev

Date: Sheet

XDD4_SDDAT1 SDDAT2_XDRE# SDDAT3_XDWE#

SDDAT4_XDWP#_MSD7

SDDAT5_XDD0_MSD6 SDDAT6_XDD7_MSD3 SDDAT7_XDD2_MSD2

SD_CMD

SDCD SDWP

SDCLK_XDD1_MSCLK SDDAT0_XDD6_MSD0 SDDAT1_XDD3_MSD1 SDDAT7_XDD2_MSD2 SDDAT6_XDD7_MSD3

MS_INS#

XDD5_MSBS

Compal Electronics, Inc.

CARD READER RT5159

NCWG0 LA-5481

1

@

2

1

C862

C862 22P_0402_50V8J

22P_0402_50V8J

27 47Wednesday, May 20, 2009

of

0.1B

5

CLK_PCI_EC

12

R633

@

10_0402_5%

1

C689

@

D D

C C

B B

EC_THERM#<19>

A A

C689

22P_0402_50V8J

+3VALW

+3VS

+5VS

2

R632 47K_0402_5%R632 47K_0402_5%

12

C549 0.1U_0402_16V4ZC549 0.1U_0402_16V4Z

R514 10K_0402_5%@R514 10K_0402_5%@ R729 2.2K_0402_5%R729 2.2K_0402_5% R730 2.2K_0402_5%R730 2.2K_0402_5% R19 100K_0402_5%R19 100K_0402_5%

R634 47K_0402_5%R634 47K_0402_5% R639 47K_0402_5%R639 47K_0402_5%

1 2

R519 10K_0402_5%

12 1 2 1 2 1 2

12

R731 2.2K_0402_5%R731 2.2K_0402_5%

1 2 1 2

R732 2.2K_0402_5%R732 2.2K_0402_5%

@

R460 0_0402_5%

1 2

EC_CRY1 EC_CRY2

1

C344

C344 15P_0402_50V8J

15P_0402_50V8J

2

32.768KHZ_12.5P_MC-306

R2084.7K_0402_5% R2084.7K_0402_5% R2074.7K_0402_5% R2074.7K_0402_5%

@

Y1

5

ECRST#

EC_PME#

EC_SMB_CK1

EC_SMB_DA1

LID_SW#

KSO1 KSO2

EC test-mode issue

EC_SMB_CK2 EC_SMB_DA2

TP_CLK

12

TP_DATA

12

ENBKL

EC_THERM#_R

1

C343

1

4

15P_0402_50V8J

IN

2

OUT

NC3NC

2

0.1U_0402_16V4Z

1

C569

2

0.1U_0402_16V4Z

KSI[0..7]<29,34>

KSO[0..17]<29,34>

EC_SMB_CK1<41> EC_SMB_DA1<41> EC_SMB_CK2<8> EC_SMB_DA2<8>

PM_SLP_S3#<18> PM_SLP_S5#<18>

FAN_SPEED1<6>

PWR_SUSP_LED<34>

1

2

EC_KBRST#<18>

LPC_FRAME#<17>

CLK_PCI_EC<17,21>

PM_CLKRUN#<17>

EC_SMI#<18>

ON/OFF<33>

NUM_LED#<34>

C567

0.1U_0402_16V4Z

EC_GA20<18> SERIRQ<17> LPC_AD3<17>

LPC_AD2<17> LPC_AD1<17> LPC_AD0<17>

PLT_RST#<13,15,17,25,31> EC_SCI#<18>

4

0.1U_0402_16V4Z

1

2

C557

C476

2

KSI[0..7] KSO[0..17]

ECRST#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

E51TXD_P80DATA E51RXD_P80CLK

EC_CRY1 EC_CRY2

Chagne to D3 version

4

2

C568

1000P_0402_50V7K

1

U27

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

3

+3VALW

L48

1 2

FBMA-L11-160808-800LMT_0603

2

C561

C561 1000P_0402_50V7K

1000P_0402_50V7K

1

9

22

33

VCC

PWM Output

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SM Bus

GPIO

GND

11

24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_VCCA

67

96

111

125

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Flash ROM

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

GPO

GPI

GND

AGND

GND

35

69

94

113

FBMA-L11-160808-800LMT_0603

1

C566

2

0.1U_0402_16V4Z

ECAGND

21

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

CAPS_LED#/GPIO53 SUSP_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

KB926QFD2_LQFP128_14X14

20mil

ECAGND

1 2

3

23 26 27

BATT_TEMP

63

BATT_OVP

64 65 66 75 76

68 70 71 72

EC_MUTE#

83 84

TP_LOCK_LED#

85 86

TP_CLK

87

TP_DATA

88

97 98 99

LID_SW#

109

119

SPIDI/RD#

120 126 128

SPICS#

73 74

FSTCHG

89 90 91 92 93 95 121

ACIN

127

EC_RSMRST#

100 101 102 103 104 105 106 107

GPXO10

108

GPXO11

110 112 114

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

L69

2007/5/18 2010/03/12

EC_THERM#_R

115 116 117 118

124

Compal Secret Data

Please close to EC pin

BATT_OVP BATT_TEMP ACIN

AD_BID0 AD_PID0

1

2

Deciphered Date

C674

4.7U_0805_10V4Z

C672 100P_0402_50V8JC672 100P_0402_50V8J C673 100P_0402_50V8JC673 100P_0402_50V8J C676 100P_0402_50V8JC676 100P_0402_50V8J

EC_INVT_PWM <24> BEEP# <35> FANPWM <6>

ACOFF <40>

BATT_TEMP <41> BATT_OVP <40> ADP_I <40>

DAC_BRIG <24> EN_DFAN1 <6> IREF <40>

CALIBRATE# <40>

EC_MUTE# <36>

TP_LOCK_LED# <34>

TP_CLK <29> TP_DATA <29>

3S/4S# <40> 65W/90W# <40>

EC_VLDT_EN <33>

LID_SW# <34>

EC_SI_SPI_SO <30> EC_SO_SPI_SI <30> EC_SPICLK <30> EC_SPICS#/FSEL# <30>

1 2 1 2 1 2

FSTCHG <40> BATT_GRN_LED# <34> CAPS_LED# <34> BATT_AMB_LED# <34> PWR_LED <34> SYSON <37,44> VR_ON <45> ACIN <19,37,38,40>

EC_LID_OUT# <18> EC_ON <33>

EC_SWI# <18> EC_PWROK <33> BKOFF# <24>

WL_OFF# <31>

VGATE <45>

ENBKL <13>

EAPD <35> SUSP# <33,37,43>

PBTN_OUT# <18> EC_PME# <25>

2

EC_RSMRST#

0.1U_0402_16V4Z

1

For EC Tools

JP37

ACES_85205-0400

CONN@

12

1

R740

@

2

+3VALW

17@ R186

17@

Ra

15@ R534

15@

Rb

+3VALW

@

Ra

R740 10K_0402_5%

10K_0402_5%

1 2

C762

@ C762

@

Rb

1 2

Title

Size Document Number Rev

Custom

Date: Sheet

ENE-KB926

NCWG0 LA-5481

Wednesday, May 20, 2009

+3VALW

1

E51RXD_P80CLK

2

E51TXD_P80DATA

3

4

1 2

+3VALW

5

2

P

B

1

A

G

NC7SZ08P5X_NL_SC70-5@

3

Project ID Please see page 3.

R186 100K_0402_5%

100K_0402_5%

AD_PID0

R534 100K_0402_5%

100K_0402_5%

Board ID <VB support> Please see page 3.

R219

R219 100K_0402_5%

100K_0402_5%

AD_BID0

R215

8.2K_0402_5%

Place on MiniCard

R656

R656 0_0402_5%

0_0402_5%

U45

RSMRST#

4

Y

1

2

1

2

12

R657

0--NCWG0 3--NAL00 7--NCWH0

C309

0.1U_0402_16V4Z

C306

0.1U_0402_16V4Z

1

10K_0402_5%@

E51RXD_P80CLK <31> E51TXD_P80DATA <31>

RSMRST# <18>

28 47

of

0.1

For 15"For 17"

INT_KBD Conn.

KSI[0..7] KSO[0..17]

Left Right

SW5

1 2 1 2

SW5 SMT1-05-A_4P17@

SMT1-05-A_4P17@

3 4

SW4

SW4 SMT1-05-A_4P17@

SMT1-05-A_4P17@

3 4

1 2

5

6

TP_DATA TP_CLK

BTN_RBTN_L

C169 100P_0402_50V8JC169 100P_0402_50V8J C174 100P_0402_50V8JC174 100P_0402_50V8J

To TP/B Conn.

KSI[0..7] <28,34> KSO[0..17] <28,34>

TP_CLK<28> TP_DATA<28>

+5VS

TP_CLK TP_DATA

Left Right

SW2

SW2 SMT1-05-A_4P15@

1 2

5

6

SMT1-05-A_4P15@

3 4

5

6

2

3

1

1 2

TP_CLK TP_DATA

D14

PJDLC05_SOT23-3

BTN_RBTN_L

3

1

3 4

BTN_R BTN_L

2

D15

PJDLC05_SOT23-3

SW3

SW3 SMT1-05-A_4P15@

SMT1-05-A_4P15@

1 2

5

6

Change to SCA00000200

JTP1

BTN_L BTN_R

JTP1

6 5 4 3 2 1

ACES_85201-0605

CONN@

KALA0 used

+5VS

C137

0.1U_0402_16V4Z

KB1 for 15" KB2 for 17"

KSO15

C243 100P_0402_50V8JC243 100P_0402_50V8J

KSO14 KSO13 KSO12

KSI0 KSO11 KSO10 KSI1

KSI2 KSO9 KSI3 KSO8

KSO16 KSO17

1 2

C242 100P_0402_50V8JC242 100P_0402_50V8J

1 2

C241 100P_0402_50V8JC241 100P_0402_50V8J

1 2

C240 100P_0402_50V8JC240 100P_0402_50V8J

1 2

C239 100P_0402_50V8JC239 100P_0402_50V8J

1 2

C238 100P_0402_50V8JC238 100P_0402_50V8J

1 2

C237 100P_0402_50V8JC237 100P_0402_50V8J

1 2

C236 100P_0402_50V8JC236 100P_0402_50V8J

1 2

C235 100P_0402_50V8JC235 100P_0402_50V8J

1 2

C234 100P_0402_50V8JC234 100P_0402_50V8J

1 2

C233 100P_0402_50V8JC233 100P_0402_50V8J

1 2

C232 100P_0402_50V8JC232 100P_0402_50V8J

1 2

C245 100P_0402_50V8JC245 100P_0402_50V8J

1 2

C244 100P_0402_50V8JC244 100P_0402_50V8J

1 2

KSO7

C231 100P_0402_50V8JC231 100P_0402_50V8J

KSO6 KSO5 KSO4

KSO3 KSI4 KSO2 KSO1

KSO0 KSI5 KSI6 KSI7

1 2

C230 100P_0402_50V8JC230 100P_0402_50V8J

1 2

C229 100P_0402_50V8JC229 100P_0402_50V8J

1 2

C228 100P_0402_50V8JC228 100P_0402_50V8J

1 2

C227 100P_0402_50V8JC227 100P_0402_50V8J

1 2

C226 100P_0402_50V8JC226 100P_0402_50V8J

1 2

C225 100P_0402_50V8JC225 100P_0402_50V8J

1 2

C224 100P_0402_50V8JC224 100P_0402_50V8J

1 2

C223 100P_0402_50V8JC223 100P_0402_50V8J

1 2

C222 100P_0402_50V8JC222 100P_0402_50V8J

1 2

C221 100P_0402_50V8JC221 100P_0402_50V8J

1 2

C220 100P_0402_50V8JC220 100P_0402_50V8J

1 2

JKB1

(Left)

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

(Right)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

JKB1

26

KSO0

25

KSO1

24

KSO2

23

KSO3

22

KSO4

21

KSO5

20

KSO6

19

KSO7

18

KSO8

17

KSO9

16

KSO10

15

KSO11

14

KSO12

13

KSO13

12

KSO14

11

KSO15

10

KSO16

9

KSO17

8

KSI0

7

KSI1

6

KSI2

5

KSI3

4

KSI4

3

KSI5

2

KSI6

1

KSI7

ACES_88747-2601

CONN@

2005/03/08 2010/03/12

28

G2

27

G1

Compal Secret Data

(Left)

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

(Right)

Deciphered Date

26

KSO0

25

KSO1

24

KSO2

23

KSO3

22

KSO4

21

KSO5

20

KSO6

19

KSO7

18

KSO8

17

KSO9

16

KSO10

15

KSO11

14

KSO12

13

KSO13

12

KSO14

11

KSO15

10

KSO16

9

KSO17

8

KSI0

7

KSI1

6

KSI2

5

KSI3

4

KSI4

3

KSI5

2

KSI6

1

KSI7

ACES_88747-2601

CONN@

JKB2

G2 G1

28 27

Title

LID / KB / TP / BTN

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

of

29 47Wednesday, May 20, 2009

of

29 47Wednesday, May 20, 2009

of

29 47Wednesday, May 20, 2009

0.1

C675 0.1U_0402_16V4ZC675 0.1U_0402_16V4Z

+3VALW

EC_SPICS#/FSEL#<28>

+3VALW

1 2

R618 0_0603_5%R618 0_0603_5%

R619 4.7K_0402_5%R619 4.7K_0402_5% R621 4.7K_0402_5%R621 4.7K_0402_5%

12 12

SPI_HOLD#

ONLY MXIC used in this project (66MHz)

EC_SPICS#/FSEL# SPI_WP# SPI_HOLD#

1 2

+SPI_VCC

U17

1

CE#

3

WP#

7

HOLD#

4

VSS

MX25L8005M2C-15G_SOP8

SA00000XT00 : S IC FL 8M MX25L8005M2C-15G SOP 8P ENE suggestion SPI Frequency over 66MHz SST: 50MHz MXIC: 70MHz ST: 40MHz

U44

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L512AMC-12G_SO8

Reserved for BIOS simulator. Footprint SO8

8

VDD

6

SCK

5

SI

2

SO

8

VCC

6

SCLK

5

SI

2

SO

@

EC_SPICLK_RSPI_WP# EC_SO_SPI_SI_R EC_SI_SPI_SO_R

+SPI_VCC EC_SPICLK_R EC_SO_SPI_SI EC_SI_SPI_SO

R620 0_0402_5%R620 0_0402_5%

1 2

R622 0_0402_5%R622 0_0402_5%

1 2

R623 0_0402_5%R623 0_0402_5%

1 2

EC_SPICLK_R

R257

1 2

22_0402_5%@

EC_SPICLK <28> EC_SO_SPI_SI <28> EC_SI_SPI_SO <28>

C296

1 2

10P_0402_50V8J@

SPI ROM Footprint 150mil

Security Classification

2005/03/08 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2010/03/12

Compal Secret Data

Deciphered Date

Title

BIOS & NEWCARD CONN

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

of

30 47Wednesday, May 20, 2009

of

30 47Wednesday, May 20, 2009

of

30 47Wednesday, May 20, 2009

0.1

A

1 1

1

C442

4.7U_0805_10V4Z

2

B

1

C441

0.1U_0402_16V4Z

2

1

C439

4.7U_0805_10V4Z

2

1

C438

0.1U_0402_16V4Z

2

1

C440

0.1U_0402_16V4Z

2

C

+3VALW+3VS_WLAN +1.5VS

1

C437

0.1U_0402_16V4Z

2

D

E

For Wireless LAN

JMINI2

R653 0_0402_5%

SB_PCIE_WAKE#<18>

MINI1_CLKREQ#<16>

CLK_PCIE_MINI1#<16>

2 2

PCIE_PTX_C_IRX_N0<12> PCIE_PTX_C_IRX_P0<12>

PCIE_ITX_C_PRX_N0<12> PCIE_ITX_C_PRX_P0<12>

E51TXD_P80DATA<28>

E51RXD_P80CLK<28>

E51TXD_P80DATA E51TXD_P80DATA_R E51RXD_P80CLK

CLK_PCIE_MINI1<16>

+3VS_WLAN

R654 0_0402_5%R654 0_0402_5%

1 2

@

For MINICARD Port80 Debug

JMINI2

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

2 4 6 8

10

G153G254G355G3

FOX_AS0B226-S99N-7F

56

CONN@

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

(MINI1_LED#)

+3VS_WLAN +1.5VS

R655 0_0402_5%R655 0_0402_5%

WL_OFF#_R

1 2

PLT_RST#

R246 0_0603_5% R246 0_0603_5%

1 2

R243 0_0603_5%

1 2

@

1 2

R752 0_0402_5%R752 0_0402_5%

12

R550

@

100K_0402_5%

+3VALW

+3VS +3VALW

SB_CK_SCLK <10,11,16,18> SB_CK_SDAT <10,11,16,18>

USB20_N5 <18> USB20_P5 <18>

WL_ON_LED# <34>

R487 0_1206_5% R487 0_1206_5%

1 2

WL_OFF# <28> PLT_RST# <13,15,17,25,28>

+3VS+3VS_WLAN

Power

+3VS +3VALW +1.5VS

Mini Card Power Rating Primary Power (mA) Peak Normal 1000 330 500

750 250 375

Auxiliary Power (mA)

Normal

250 (wake enable) 5 (Not wake enable)

H:9.9mm

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

MINI Card_WLAN

NCWG0 LA-5481

E

0.1

of

31 47Wednesday, May 20, 2009

A

1 1

B

C

D

E

USB CONN. 1 & 2

+USB_VCCA+USB_VCCA

1

+

C478

150U_D2_6.3VM

12

USB20_N0 USB20_P0

USB_OC#1 <18> USB_OC#0 <18>

USB20_N0<18> USB20_P0<18>

2 2

+3VALW

12

R42

R42 100K_0402_5%

100K_0402_5%

R171 10K_0402_5%

1 2

R677 0_0402_5%R677 0_0402_5%

1

C133

0.1U_0402_16V4Z

2

C111

4.7U_0805_10V4Z

+5VALW

1

2

U4

1

GND

2

IN

3

IN

4

EN#

TPS2061DRG4_SO8

OUT OUT OUT

+USB_VCCA

8 7 6 5

FLG

2

R598 0_0402_5%@R598 0_0402_5%@

1 2

R600 0_0402_5%

1 2

L67

4

1

WCM2012F2S-900T04_0805

1

C474

C474 470P_0402_50V7K

470P_0402_50V7K

2

@

USB20_P0_R USB20_P1_R

3

2

JUSB1

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G565ZR

CONN@

KALA0 used KALA0 used

USB20_N0_R

+USB_VCCA

USB20_P1_R USB20_P0_R

USB20_N1<18>

USB20_P1<18>

D31

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

CH2

Vn

CH1

150U_D2_6.3VM

USB20_N1 USB20_P1

3

2

1

+

C1

@

2

R599 0_0402_5%@R599 0_0402_5%@

1 2

R601 0_0402_5%

1 2

L68

4

1

WCM2012F2S-900T04_0805

USB20_N1_R

@

W=80milsW=80mils

1

C2

C2 470P_0402_50V7K

470P_0402_50V7K

2

3

2

USB20_N1_RUSB20_N0_R

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G565ZR

CONN@

SYSON#<37,43>

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2005/06/20 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

USB CONN

NCWG0 LA-5481

E

0.1

of

32 47Wednesday, May 20, 2009

A

B

C

D

E

Power ON Circuit

+3VS

1 1

180K_0402_5%

13

D

SUSP<37>

SUSP#<28,37,43>

2 2

3 3

2

2N7002_SOT23

SUSP#

CH751H-40PT_SOD323-2

G

Q11

1U_0603_10V4Z

S

D12

0.1U_0402_16V4Z

10K_0402_1%

21

R192

C322

R195

C321

+3VS

12

1

2

12

2

1

U13A

U13A SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

14

P

1

O2I

G

7

+3VALW +3VALW

U13C

14

SN74LVC14APWLE_TSSOP14

P

5

O6I

G

7

+3VALW +3VALW

U13E

14

SN74LVC14APWLE_TSSOP14

P

11

O10I

G

7

+3VALW+3VALW

U13B

U13B SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

14

P

3

O4I

G

7

U13D

14

SN74LVC14APWLE_TSSOP14

P

9

O8I

G

7

U13F

14

SN74LVC14APWLE_TSSOP14

P

13

O12I

G

7

1 2

R191 0_0402_5%@R191 0_0402_5%@

EC_PWROK<28>

EC_VLDT_EN<28>

1 2

R198 0_0402_5%R198 0_0402_5%

1 2

R180 0_0402_5%@R180 0_0402_5%@

1 2

R183 0_0402_5%R183 0_0402_5%

For South Bridge

SB_PWRGD <8,18>

For +1.2HT

VLDT_EN <37,42>

ON/OFFBTN#<34>

TOP Side

@

R765 10K_0603_5%

R766 10K_0603_5%

EC_ON<28>

12

@

12

Bottom Side

ON/OFFBTN#

note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms, SUSP# goes to low after SB_PWRGD goes to low for power down.

VLDT_EN

NB_PWRGD

SB_PWRGD

SUSP#

+1.8VS

T1

T2

+3VALW

Power Button

R281

R281 100K_0402_5%

100K_0402_5%

1 2

D10

DAN202UT106_SC70-3

EC_ON

1

2

G

R290

R290 10K_0402_5%

10K_0402_5%

2 3

13

D

S

51ON#

Q17

2N7002_SOT23

ON/OFF <28>

2

C358

C358 1000P_0402_50V7K

1000P_0402_50V7K

1

51ON# <38>

12

D11

D11 RLZ20A_LL34

RLZ20A_LL34

SW10

SMT1-05-A_4P

1 2

3

ON/OFFBTN#

4

5

6

MP would remove

4 4

Security Classification

2005/03/08 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2010/03/12

C

Compal Secret Data

Deciphered Date

Title

PWR_OK/ PWR BTN

Size Document Number Rev

B

NCWG0 LA-5481

Date: Sheet

D

Date: Sheet of

33 47Wednesday, May 20, 2009

of

E

of

0.1

PWR_LED#

PWR_SUSP_LED<28>

+5VS

+5VALW

PWR_LED<28>

100K_0402_5%

R251 1K_0402_5%R251 1K_0402_5%

1 2

R250 1.2K_0402_5%R250 1.2K_0402_5%

1 2

R253 1K_0402_5%R253 1K_0402_5%

1 2

R252 1.2K_0402_5%R252 1.2K_0402_5%

1 2

3

Q68B

Q68B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

12

2

12

LED1

2 1

YG

4 3

A

HT-297UD/CB BLUE/AMB

HARVATEK

LED2

2 1

YG

4 3

A

HT-297UD/CB BLUE/AMB

HARVATEK

4

PWR_SUSP_LED#

61

Q68A

Q68A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

PWR_LED#

PWR_SUSP_LED#

BATT_GRN_LED#

BATT_AMB_LED#

R291

R292

BLUE/AMB LED

BATT_GRN_LED# <28>

BATT_AMB_LED# <28>

HDA_SDOUT_MDC<18>

HDA_SYNC_MDC<18>

HDA_SDIN1<18>

HDA_RST_MDC#<18>

JP14

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

ACES_85201-20051

CONN@

KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

HDA_SDOUT_MDC HDA_SYNC_MDC

R357 33_0402_5%R357 33_0402_5%

1 2

HDA_RST_MDC#

To PWR LED/B

+5VS

+3VALW +3VS+5VALW

LID_SW# TP_LOCK_LED# KSO0 KSI2 PWR_SUSP_LED# PWR_LED# ON/OFFBTN# KSI1 WL_ON_LED# MEDIA_LED# NUM_LED# CAPS_LED#

KSO0

WL_BTN# TP_LOCK_BTN#

LID_SW# <28>

TP_LOCK_LED# <28> KSO0 <28,29> KSI2 <28,29>

ON/OFFBTN# <33> KSI1 <28,29> WL_ON_LED# <31>

NUM_LED# <28> CAPS_LED# <28>

MDC Conn.

JMDC1

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

RES0 RES1

3.3V GND3 GND4

IAC_BITCLK

GND13GND14GND15GND16GND17GND

18

+5VALW +5VS +3VS

C435

0.1U_0402_16V4Z

MEDIA_LED#

2N7002DW-T/R7_SOT363-6

2 4 6 8 10 12

ACES_88018-124G

CONN@

C436

0.1U_0402_16V4Z

+3VS

6 1 3

Q67B

R254 0_0402_5%R254 0_0402_5%

1 2

20mil

HDA_BITCLK_MDC

12

R256

0_0402_5%

1

C432

C432 22P_0402_50V8J

22P_0402_50V8J

2

C444

0.1U_0402_16V4Z

Q67A

2

2N7002DW-T/R7_SOT363-6

4

5

+3VS

+3VALW

HDA_BITCLK_MDC <18>

For EMI

+3VALW

C445

0.1U_0402_16V4Z

5IN1_LED# <27> SATA_LED# <19>

+3VALW

1

2

C3

C3 1U_0603_10V4Z

1U_0603_10V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/20 2010/03/12

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

MDC / LED / SW

NCWG0 LA-5481

of

34 47Wednesday, May 20, 2009

0.1

A

1 1

BEEP#<28>

SB_SPKR<18>

2 2

3 3

RB751V_SOD323

C903

1U_0402_6.3V4Z

C904

1U_0402_6.3V4Z

update this table

Sense Pin Impedance Codec Signals

39.2K

SENSE A

4 4

SENSE B

A

20K 10K

5.1K

39.2K 20K 10K

5.1K

B

D38

1 2

2 1

1 2

R789

10K_0402_5%

R787

560_0402_5%

R788

560_0402_5%

PORT-A (PIN 39, 41) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-G (PIN 43, 44) PORT-H (PIN 45, 46)

B

+3VS

MIC_PLUG#<36>

12

2 1

HP_PLUG#<36>

2

B

+VDDA

D37

D37 RB751V_SOD323

RB751V_SOD323

+VDDA

12

R783

R783 20K_0402_1%

20K_0402_1%

C902

1 2

1U_0402_6.3V4Z

1

C

Q72

E

3

2SC2411KT146_SOT23-3

L83

1 2

FBM-L11-160808-800LMT_0603

MIC1_L<36> MIC1_R<36>

R794 20K_0402_1%R794 20K_0402_1% R795 5.11K_0402_1%R795 5.11K_0402_1%

EAPD<28>

C

1 2

R786

C908

10U_0805_10V4Z

MIC1_L MIC1_R

HDA_SDOUT_AUDIO<18>

C

MONO_IN

2.4K_0402_1%

0.1U_0402_16V4Z

1

C909

2

0.1U_0402_16V4Z

1 2

C915 4.7U_0805_6.3V6KC915 4.7U_0805_6.3V6K

1 2

C916 4.7U_0805_6.3V6KC916 4.7U_0805_6.3V6K

HDA_RST_AUDIO#<18> HDA_SYNC_AUDIO<18>

1 2

SENSE_A SENSE_B

12 12

R796 0_0402_5%R796 0_0402_5%

D

HD Audio Codec

+AVDD_HDA

40mil

1

C910

2

MIC1_C_L MIC1_C_R MONO_IN

DGND

38

U82

AVDD125AVDD2

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

LINE1_VREFO

20

LINE2_VREFO

19

MIC2_VREFO

21

MIC1_L

22

MIC1_R

12

PCBEEP_IN

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

48

SPDIFO1

4

DVSS1

7

DVSS2

Change to ALC272X

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

10mil

0.1U_0402_16V4Z

9

1

DVDD

DVDD_IO

35

LOUT1_L

36

LOUT_R

39

LOUT2_L

41

LOUT2_R

45

SPDIFO2

BITCLK

SDATA_IN

MONO_OUT

CPVEE

HPOUT_R

CBN

VREF

JDREF

HPOUT_L

AVSS1 AVSS2

CBP

46 43

NC

44

6

8 37 29 31 28 32 30 27 40 33 26

42

DMIC_CLK1/2

DMIC_CLK3/4

MIC1_VREFO

ALC272-VA2-GR_LQFP48_7X7

E

L80

+5VS

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805 L81

L81 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

1

C905

2

0.1U_0402_16V4Z

AMP_LEFT AMP_RIGHT

1 2

R792 0_0402_5%R792 0_0402_5%

C917

1 2

10mil

HP_RIGHT

CODEC_VREF

HP_LEFT

1 2

1

C906

2

1 2

R793 33_0402_5%R793 33_0402_5%

2.2U_0402_6.3V6M

MIC1_VREFO_L

10mil

+3VS_DVDD

1

C907

C907 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2

1

2

12

R797

20K_0402_1%

C918

2.2U_0402_6.3V6M

1

C919

2

F

+5VAMP

C106 22U_0805_6.3V6M@C106 22U_0805_6.3V6M

1

@

2

L82

L82 MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

AMP_LEFT <36> AMP_RIGHT <36>

C914

C914 22P_0402_50V8J

22P_0402_50V8J

HDA_BITCLK_AUDIO <18>

HDA_SDIN0 <18>

1

C920

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

2

AGND

Compal Secret Data

2007/09/20 2010/03/12

E

Compal Secret Data

Deciphered Date

F

1 2

R784 0_0805_5%R784 0_0805_5%

U81

C899 0.1U_0402_16V4ZC899 0.1U_0402_16V4Z

60mil

C900 0.1U_0402_16V4ZC900 0.1U_0402_16V4Z

1

2

U81

1

IN

2

GND

3

SHDN

G9191-475T1U_SOT23-5@

(output = 300 mA)

+3VS

For EMI

HP_RIGHT HP_LEFT

1 2

R798 0_0805_5%R798 0_0805_5%

1 2

R800 0_0805_5%R800 0_0805_5%

1 2

R802 0_0805_5%R802 0_0805_5%

GND GNDA

Title

Size Document Number Rev

B

Date: Sheet

G

40mil

5

4

+VDDA

1 2

C901

0.01U_0402_25V7K

R799 0_0805_5%R799 0_0805_5%

R801 0_0805_5%R801 0_0805_5%

R803 0_0805_5%R803 0_0805_5%

OUT

BYP

HP_RIGHT <36> HP_LEFT <36>

GND GNDA

Compal Electronics, Inc.

HDA Codec ALC268

NCWG0 LA-5481

G

4.75V

1 2

H

0.1

of

35 47Wednesday, May 20, 2009

H

A

B

C

D

E

+5VAMP

1 1

U83

C923 0.47U_0603_10V7KC923 0.47U_0603_10V7K

1 2

AMP_RIGHT<35>

AMP_LEFT<35>

2 2

1 2

C924 3900P_0402_50V7KC924 3900P_0402_50V7K

1 2

C971 3900P_0402_50V7KC971 3900P_0402_50V7K

1 2

R808 0_0603_5%R808 0_0603_5%

C925 0.47U_0603_10V7KC925 0.47U_0603_10V7K

1 2

R813 0_0603_5%R813 0_0603_5%

EC_MUTE#<28>

AMP_C_RIGHT

AMP_C_LEFT

EC_MUTE#

7

17

9

5

19

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

GND5

21

16

VDD

20

C921

10U_0805_10V4Z

15

6

PVDD1

PVDD2

BYPASS

GND41GND311GND213GND1

0.1U_0402_16V4Z

1

C922

2

GAIN0

3

GAIN1

18

ROUT+

14

ROUT-

4

LOUT+

8

LOUT-

12

NC

10

TPA6017A2_TSSOP20

1

2

GAIN0 GAIN1

SPKR+

SPKR-

SPKL+

SPKL-

Keep 10 mil width

2

C927

0.47U_0603_10V7K

1

HP_RIGHT<35> HP_LEFT<35>

R809

100K_0402_5%

R811

@ R811

@

100K_0402_5%

12

HP_LEFT

10 dB

+5VAMP

12

R806

@ R806

@

100K_0402_5%

12

R812

R812 100K_0402_5%

100K_0402_5%

1 2

R814 56.2_0402_1%R814 56.2_0402_1%

1 2

R815 56.2_0402_1%R815 56.2_0402_1%

HPOUT_R_1

C928

330P_0402_50V7K

20mil

1 2

L84 FBM-11-160808-700T_0603L84 FBM-11-160808-700T_0603

1 2

L85 FBM-11-160808-700T_0603L85 FBM-11-160808-700T_0603

330P_0402_50V7K

SPKL+ SPKL-

20mil

SPKR+ SPKR-

20mil

2

330P_0402_50V7K

1

Int. Speaker Conn.

JSPK1

1 2

3 4

ACES_88266-02001

CONN@

1 2

3 4

ACES_88266-02001

CONN@

JHP1

8 7

5 4 3

6 2 1

SINGA_2SJ-E351-S03

CONN@

JSPK1

1 2

G1 G2

JSPK2

1 2

G1 G2

Left

Right

R804 0_0603_5% R804 0_0603_5% R805 0_0603_5% R805 0_0603_5%

R810 0_0603_5% R810 0_0603_5% R807 0_0603_5% R807 0_0603_5%

1 2 1 2

PJDLC05_SOT23-3

1 2 1 2

PJDLC05_SOT23-3

SPK_L+ SPK_L-

2

3

D39

@

1

SPK_R+ SPK_R-

2

3

D40

@

1

LINE Out/Headphone Out

2

C929

1

HP_PLUG#<35>

HPOUT_R_2HP_RIGHT HPOUT_L_2HPOUT_L_1

HP_PLUG#

3 3

MIC1_VREFO_L MIC1_VREFO_L

R817

C931

21

RB751V_SOD323

RB751V_SOD323 D42

D42

12

MIC_PLUG#<35>

MIC2_R_1 MIC2_L_1

1

2

MIC JACK

JMIC1

8 7

MIC_PLUG#

5 4 3

6 2 1

SINGA_2SJ-E351-S01

CONN@

(HDA Jack)

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Amplifier & Audio Jack

NCWG0 LA-5481

of

36 47Wednesday, May 20, 2009

E

0.1

21

RB751V_SOD323

RB751V_SOD323 D41

D41

12

R816

4.7K_0402_5%

MIC1_R<35> MIC1_L<35>

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1 2

R818 1K_0603_1%R818 1K_0603_1%

1 2

R819 1K_0603_1%R819 1K_0603_1%

2007/09/20 2010/03/12

1 2

L86

1 2

L87

C930

220P_0402_50V7K

Compal Secret Data

Deciphered Date

4.7K_0402_5%

FBM-11-160808-700T_0603

FBM-11-160808-700T_0603 FBM-11-160808-700T_0603

FBM-11-160808-700T_0603

1

220P_0402_50V7K

2

D

A

+3VALW TO +3VS

+3VS

+3VALW

U41

8

S

D

1 1

2 2

3 3

7

D

6

D

5

D

AO4468_SO8

1

C560

C560 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.8V

8 7 6 5

AO4430_SOIC8

1

C443

4.7U_0805_10V4Z

2

U37

D D D D

S S

G

1

C559

C559 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2 3

1 2

4

R562 20K_0402_1%R562 20K_0402_1%

C570

0.1U_0603_25V7K

1 2

ACIN<19,28,38,40>

+1.8V TO +1.8VS

1

S

2

S

3

S

4

G

C632

0.1U_0603_25V7K

1 2

1

C562

C562 1U_0603_10V4Z

1U_0603_10V4Z

2

5VS_GATE

12

R500

@

13

D

ACIN

1

C447

C447 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2

D

2

G

@

S

R563

60.4K_0402_1%

12/30 Change R563 to 60.4K

100K_0402_5%

Q58

Q58 2N7002_SOT23-3

2N7002_SOT23-3

1

C446

C446 1U_0603_10V4Z

1U_0603_10V4Z

2

5VS_GATE

R508

100K_0402_5%

1 2

Q29

13

D

2

G

2N7002_SOT23-3

S

+1.8VS

B

+5VALW

U7

8

D

7

D

6

D

5

D

AO4468_SO8

+VSB

SUSP

1

C143

4.7U_0805_10V4Z

2

+1.2VALW TO +1.2V_HT

+1.2VALW

U46

S

D

S

D

S

D

G

D

AO4430_SOIC8

0.1U_0603_25V7K

1 2 3 4

ACIN

8 7 6 5

1

C758

2

4.7U_0805_10V4Z

C

+5VALW TO +5VS

1

S

2

S

C759

3

S

4

G

1

2

G

1

2

R728 0_0402_5%R728 0_0402_5%

1 2

C658

0.1U_0603_25V7K

1 2

1

C756

C756 1U_0603_10V4Z

1U_0603_10V4Z

2

13

D

Q63

2N7002_SOT23-3

S

12

R700

R700 33K_0402_5%

33K_0402_5%

13

D

Q65

Q65 2N7002_SOT23

2N7002_SOT23

S

C166

C166 10U_0805_10V4Z

10U_0805_10V4Z

5VS_GATE

1

2

1 2

R699

R699 33K_0402_5%

33K_0402_5%

VLDT_EN#

2

G

+5VS

1

C165

C165 1U_0603_10V4Z

1U_0603_10V4Z

2

C757

C757 10U_0805_10V4Z

10U_0805_10V4Z

+VSB

+1.2V_HT

2

G

R698

R698 470_0805_5%

470_0805_5%

1 2

13

D

Q64

Q64 2N7002_SOT23-3

2N7002_SOT23-3

S

D

+1.2VALW

1

+

C30

C30 220U_B2_2.5VM_R25M

220U_B2_2.5VM_R25M

2

For PWR request

E

+5VALW

R167

R167 10K_0402_5%

10K_0402_5%

2

G

SYSON#

2

G

VLDT_EN#

2

G

1 2

13

D

S

+5VALW

1 2

13

D

S

+5VALW

1 2

13

D

S

Q12

Q12 2N7002_SOT23

2N7002_SOT23

R31

R31 10K_0402_5%

10K_0402_5%

Q5

Q5 2N7002_SOT23

2N7002_SOT23

R725

R725 10K_0402_5%

10K_0402_5%

Q66

Q66 2N7002_SOT23

2N7002_SOT23

R586

10K_0402_5%

SYSON#<32,43>

R589

R589 100K_0402_5%

100K_0402_5%

R726

R726 100K_0402_5%

100K_0402_5%

SUSP

SYSON

VLDT_EN

12

SUSP<33>

SUSP#<28,33,43>

SYSON<28,44>

VLDT_EN<33,42>

+0.9V

R587

1 2 13

D

S

R587 470_0402_5%

470_0402_5%

2

G

Q35

Q35 2N7002_SOT23

2N7002_SOT23

R604

R604 470_0402_5%

470_0402_5%

1 2 13

D

SYSON#

2

G

Q34

S

2N7002_SOT23

4 4

A

+1.5VS+2.5VS

1 2 13

D

S

R588

R588 470_0402_5%

470_0402_5%

SUSPSUSP

2

G

Q36

Q36 2N7002_SOT23

2N7002_SOT23

B

R26

R26 470_0402_5%

470_0402_5%

1 2 13

D

SYSON# SUSP SUSPSUSP

2

G

Q6

S

2N7002_SOT23

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2 13

D

S

Issued Date

R224

R224 470_0402_5%

470_0402_5%

2

G

Q14

Q14 2N7002_SOT23

2N7002_SOT23

+1.8VS+1.8V

R270

R270 470_0402_5%

470_0402_5%

1 2 13

D

SUSP VLDT_EN# SUSP

2

G

Q15

S

2N7002_SOT23

2005/03/08 2010/03/12

C

+5VS+3VS

R181

470_0402_5%

1 2 13

D

2

G

Q10

S

2N7002_SOT23

Compal Secret Data

Deciphered Date

+NB_CORE +1.1VS

R184

470_0402_5%

1 2 13

D

2

G

Q13

S

2N7002_SOT23

D

R185

470_0402_5%

1 2 13

D

2

G

Q16

S

2N7002_SOT23

Title

DC INTERFACE

Size Document Number Rev

B

NCWG0 LA-5481

Date: Sheet

37 47Wednesday, May 20, 2009

E

0.1

of

A

DC231000500

PJP1

PJP1 SINGA_2DC-G756I200

SINGA_2DC-G756I200

1

2

G

G G

G

3

1 1

2 2

3

PBJ1

-+

ML1220T13RE

45@

ADPIN VIN

12

PC1

560P_0402_50V7K

12

+RTCBATT

PL1

SMB3025500YA_2P

1 2

12

PC2

12P_0402_50V8J

+RTCBATT

PC3

12

12P_0402_50V8J

PC4

12

B

560P_0402_50V7K

C

PR1

1M_0402_5%

1 2

PU1A

VS

PR6

8

P

+

1

0

G

4

PR6 22K_0402_5%

22K_0402_5%

1 2

3 2

-

PC6

0.1U_0603_25V7K

PR9

10K_0402_5%

1 2

12

PR3

@PR3

@

10K_0402_5%

PR5

0_0402_5%

1 2

ACIN<19,28,37,40>

10K_0402_5%

PR8

12

PD3

PD3 GLZ4.3B_LL34-2

GLZ4.3B_LL34-2

PR160

PR160 10K_0402_5%

10K_0402_5%

1 2

LM358DT_SO8

VINVIN

12

D

PR4

84.5K_0402_1%

12

PR7

20K_0402_1%

RTCVREF

PC5

PC5 1000P_0402_50V7K

1000P_0402_50V7K

Vin Dectector

Min. Typ Max. H-->L 16.976V 17.525V 17.728V L-->H 17.430V 17.901V 18.384V

VIN

PD4

LL4148_LL34-2

PD5

LL4148_LL34-2

PR12

200_0603_5%

1 2

100K_0402_1%

PR14

22K_0402_1%

1 2

RTCVREF

3.3V

12

PC9

PC9 10U_0805_10V4Z

10U_0805_10V4Z

12

PR13

12

3

TP0610K-T1-E3_SOT23-3

N1

12

PC7

0.22U_1206_25V7K

PU2

G920AT24U_SOT89-3

OUT

IN

GND

1

PQ1

2

12

PR15

PR15 200_0603_5%

200_0603_5%

N2

2

12

PC10

PC10 1U_0805_25V4Z

1U_0805_25V4Z

BATT+

CHGRTCP

3 3

51ON#<33>

PR17

560_0603_5%

1 2

+CHGRTC

PR16

560_0603_5%

1 2

PR10

68_1206_5%

13

1 2 12

12

PC8

0.1U_0603_25V7K

12

PR11

PR11 68_1206_5%

68_1206_5%

VS

+3VALWP +3VALW

+5VALWP

+VSBP +VSB

+1.2VALWP

PJ1

2

112

JUMP_43X118

PJ3

2

112

JUMP_43X118

PJ5

2

112

JUMP_43X39

PJ7

2

112

JUMP_43X118

PJ21

2

112

JUMP_43X118

+5VALW

+1.2VALW

+1.5VSP +1.5VS

+2.5VSP

PJ2

2

112

JUMP_43X118

PJ4

2

112

JUMP_43X79

PJ6

2

112

JUMP_43X118

PJ8

2

112

JUMP_43X118

PJ10

2

112

JUMP_43X118

+0.9V+0.9VP

+1.8V+1.8VP

+1.1VS+1.1VSP

+2.5VS+NB_COREP +NB_CORE

4 4

Security Classification

2008/06/11 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/06/11 2010/03/12

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

DCIN/DECTOR

NCWG0

38 47Wednesday, May 20, 2009

D

38 47Wednesday, May 20, 2009

of

0.1

A

B

C

D

ISL6237_B+

PR18

PJ17

JUMP_43X118

2

B+

1 1

+3VALWP

2 2

+3.3VALWP Ipeak=4.26A ; Then set Imax=4.26A Choke DCRmax=26.5m ohm, DCRtyp=23m ohm Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 316K)/10=158mV Ilimit=158mV/(18m*1.2) ~ 158mV/15m =7.31A~10.53A Iocp=Ilimit+Delta I/2 =7.76A~10.98A Delta I=0.908A (Freq=300KHz)

3 3

PC203

@PC203

@

680P_0402_50V7K

PC25

330U_6.3V_M

1

+

2

112

12

PR22

PR22 0_0402_5%

0_0402_5%

1 2

PR25

@PR25

@

10K_0402_1%

1 2

12

PC16

PC15

4.7U_1206_25V6K

PL5

10UH_MSCDRI-104A-100M-E_4.6A_20%

PL5

1 2

680P_0402_50V7K

GLZ5.1B_LL34-2

VS

PD7

1SS355_SOD323-2

check this part

12

PC17

2200P_0402_50V7K

PR19

4.7_1206_5%

PC28

PD6

1 2

2 1

12

PR29

100K_0402_1%

1 2

578

3 6

241

578

3 6

241

PR30

806K_0603_1%

0_0402_5%

PQ2

AO4466_SO8

PQ4

PQ4 AO4712_SO8

AO4712_SO8

1 2

200K_0402_5%

PR35

PR37

PC32

0.22U_0603_25V7K

VL

1 2

12

MAINPWON<8,41>

PR18

0_0805_5%

1 2

PR20

2.2_0603_5%

PC26

0.1U_0603_25V7K

1 2

PC31 0.22U_0603_10V7KPC31 0.22U_0603_10V7K

PR33

@PR33

@

0_0402_5%

PR38

@PR38

@

47K_0402_5%

1 2

0.047U_0603_16V7K

0.047U_0603_16V7K PC34

PC34

12

PC21

0.1U_0603_25V7K

DH3

BST3A

12

LX3

DL3

FB3

VL

2VREF_ISL6237

1 2

PR34

0_0402_5%

1 2

2VREF_ISL6237

33 26 24

25

23

30

32

1

8

20

4

14

27

1 2

TP UGATE2 BOOT2

PHASE2

LGATE2

OUT2

REFIN2

REF

LDOREFIN

NC

EN_LDO

EN1

EN2

PC33

1U_0603_10V6K

6

VIN

NC

5

1 2

PC22

1U_0603_10V6K

3

VCC

TON

2

12

PR36

PR36 0_0402_5%

0_0402_5%

VL

12

PC23

7

4.7U_0805_6.3V6K

19

LDO

PVCC

15

UGATE1

BOOT1

PHASE1

LGATE1

PGND

OUT1

POK2

POK1

ILIM1

ILIM2

GND

21

BST5A

17

16

18

22

10

11

FB1

9

BYP

29

SKIP

28

13

12

31

PU3

ISL6237IRZ-T_QFN32_5X5

578

PQ3

AO4466_SO8

3 6

241

PC24

1U_0603_10V6K

1 2

DH5

PR21 2.2_0603_5%

0.1U_0603_25V7K

LX5

DL5

FB5

PR27 0_0402_5%@PR27 0_0402_5%@

PR28 0_0402_5%PR28 0_0402_5%

1 2

ILM1

ILIM2

PC27

12

1 2

12

365K_0402_1%

316K_0402_1%

AO4712_SO8

PR31

PR32

578

PQ5

PR23

3 6

241

PC29

VL

SPOK <41,44>

12

+5VALWP Ipeak=6.87A ; Imax=4.81A Choke DCRmax=26.5m ohm, DCRtyp=23m ohm Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(5E-06 * 365K)/10=182.5mV

ISL6237_B+

12

PC19

PC18

4.7U_1206_25V6K

10UH_MSCDRI-104A-100M-E_4.6A_20%

12

4.7_1206_5%

12

680P_0402_50V7K

PL4

12

PC20

2200P_0402_50V7K

12

PR24

63.4K_0402_1%

1 2

PR26

10K_0402_1%

1 2

+5VALWP

1

+

PC30

PC30 330U_6.3V_M

330U_6.3V_M

2

Ilimit=182.5mV/(18m*1.2) ~ 182.5mV/15m

12

PC35

@PC35

@

0.047U_0402_16V7K

PQ6

2

4 4

PQ6

TP0610K-T1-E3_SOT23-3

1 3

2VREF_ISL6237

=8.44A ~ 12.16A Iocp=Ilimit+Delta I/2 =8.90A ~ 12.62A Delta I=0.921A (Freq=400KHz)

Security Classification

2008/06/11 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/06/11 2010/03/12

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

+5VALWP/+3VALWP

NCWG0

D

39 47Wednesday, May 20, 2009

of

0.1

A

B

C

D

E

PQ7

AO4407A_SO8

VIN

12

PR40

3.3_1210_5%

1 1

24751_VREF

2 2

CELLS

PR49

@PR49

@

100K_0402_1%

1 2

CELLS

PQ12

@

PQ12

@

13

D

2N7002W-T/R7_SOT323-3

2

G

S

3.3_1210_5%

GND VREF

PR50

0_0402_5%

1 2

3S/4S# <28>

12

PR43

12

PC44

2.2U_0805_25V6K

Place close to back to back MOS

3 Cell 4 Cell

Cells selector

Input OVP : 22.3V Input UVP : 17.26V Fsw : 300KHz

LI-4S :18.0V----BATT-OVP=2.001V BATT-OVP=0.1112*VMB LI-3S :13.5V----BATT-OVP=1.5012V

8 7

5

1 2

PR51

PR51 340K_0402_1%

340K_0402_1%

1 2

PR52

54.9K_0402_1%

1 2

100K_0402_1%

1 2

AO4407A_SO8

PR45

340K_0402_1%

ACDET

PR47

54.9K_0402_1%

PR53

PC56

0.1U_0603_25V7K

ACGOOD#

4

PQ13_GATE

1 2 36

PC40

@

1 2

12

BATT-OVP=0.1112*VMB Per cell=3.5V

3 3

CP Point Setting

CP point=Iadapter*85% 65W adapter R=(100K*100K)/(100K+100K)=50K Vacset=3.3*(50K/(50K+64.9K))=1.436V CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A

PU1B

PR65

10K_0402_1%

BATT_OVP<28>

PR73

64.9K_0402_1%

24751_VREF ACSET

1 2

PR74

100K_0402_1%

4 4

65W/90W#<28>

2N7002W-T/R7_SOT323-3

PQ20

2

G

1 2

12

PR75

PR75 100K_0402_1%

100K_0402_1%

13

D

S

PU1B

LM358DT_SO8

7

VS

12

PC60

0.01U_0402_25V7K

8

0

4

0.01U_0402_25V7K

5

P

+

6

-

G

Charger ADJ Calibrate#

4.0V L=0

4.2V

4.3V

CP setting

A

4.35V

PQ8

AO4407A_SO8

1 2 3 6

4

12

PR42

100K_0402_1%

0.01U_0402_25V7K

PD11

@PD11

@

1 2

RLZ24B_LL34

G

2

ACSET

VMB

12

PR58

340K_0402_1%

12

PR60

499K_0402_1%

12

PR67

105K_0402_1%

1.8755V

2.8132V

H=3.3V

B

8 7

5

12

PC42

0.1U_0603_25V7K

PR274

0_0805_5%

1 2

PC55

1U_0603_10V6K

S

PQ13

PQ13 SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

D

1 3

12

PR39

0.015_2512_1%

1 2

PC41

0.1U_0402_16V7K

1 2

0.47U_0603_16V7K

24751_VREF

12

ACOFF

PC62

0.01U_0402_25V7K

4 3

CHGEN#

12

PC43

0.1U_0603_25V7K

ACN ACP

ACSET

PC51

1 2

OVPSET

10

+3VALWP

11

VADJ

12

13

/BATDRV

0.1U_0402_16V7K

14

24751_VREF 24751_VREF

PR62

PC61

1 2

PR68

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PU4

1

CHGEN

2

ACN

3

ACP

4

ACDRV

5

ACDET

6

ACSET

7

ACOP

8

OVPSET

9

AGND

VREF

VDAC

VADJ

ACGOOD

BATDRV

13

2

G

IADAPT

PR63

D

S

PQ17

PQ17 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

C

BQ24751ARHDR_QFN28_5X5

12

100K_0402_1%

12

340K_0402_1%

Issued Date

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

LEARN

CELLS

SRP SRN

BAT

TP

SRSET

12

200K_0402_1%

28

27

26

25

24

23

22

21

20

19 18 17

29

16

15

100P_0402_50V8J

B+

PJ11

2

112

JUMP_43X118

PC45

1U_0805_25V6K

PVCC

1 2

PR44

2.2_0603_5%

BTST

1 2

DH_CHG

LX_CHG

PD8

12

LL4148_LL34-2

REGN

12

PC49

PC49 1U_0603_10V6K

1U_0603_10V6K

DL_CHG

CELLS

SE_CHG+ SE_CHG-

12

PC57

0.1U_0603_25V7K

1 2

PC46

0.1U_0603_25V7K

ACOFF <28>

ICHG setting

SRSET

PR56

10_0603_5%

1 2

PC59

PQ13_GATE

13

D

2

G

S

CALIBRATE#<28>

2008/06/11 2010/03/12

12

PR57

PR57 100K_0402_1%

100K_0402_1%

12

PQ15

PQ15 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

Compal Secret Data

ADP_I <28>

REGN

100K_0402_1%

Deciphered Date

PR69

@PR69

@

CHG_B+

578

12

1 2

PQ10

PQ10 AO4466_SO8

AO4466_SO8

3 6

241

10UH_PCMB104T-100MS_6A_20%

PQ11

PQ11 AO4466_SO8

AO4466_SO8

3 6

241

PR55

17.4K_0402_1%

12

PC58

@PC58

@

0.01U_0402_25V7K

PR61

@PR61

@

0_0402_5%

1 2

PQ16

@

PQ16

@

SI2301BDS-T1-E3_SOT23-3

S

G

12

2

13

D

2

G

S

PC37

4.7U_1206_25V6K

0.1U_0603_25V7K

PQ18

@

PQ18

@

2N7002W-T/R7_SOT323-3

D

1 2

PC38

4.7U_1206_25V6K

PL6

1 2

10U_1206_25V6M

12

PR48

4.7_1206_5%

12

PC50

680P_0402_50V7K

PC53

IREF <28>

0_0402_5%

D

13

12

PR41

PR41 100K_0402_1%

1 2

4 3

100K_0402_1%

12

PC54

0.1U_0603_25V7K

36

578

241

12

PQ9

PQ9 AO4407A_SO8

AO4407A_SO8

12

PC137

10U_1206_25V6M

PC47

1 2

0.01U_0402_25V7K

PC39

2200P_0402_25V7K

/BATDRV

1 2

12

PC36

PR46

0.02_2512_1%

PC52

0.1U_0402_16V7K

1 2

Icharge Setting

For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A

Icharge=(Vsrset/Vdac)*(0.1/PR46)

IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge

IREF=0.7748*Icharge

24751_VREF

RTCVREF

PR59

@PR59

@

100K_0402_1%

1 2

13

D

2

G

S

PC63

@PC63

@

1000P_0402_50V7K

Charger

NCWG0

PQ14

@

PQ14

@

2N7002W-T/R7_SOT323-3

24751_VREF

PR72

100K_0402_5%

1 2

13

D

PQ19

2

G

2N7002W-T/R7_SOT323-3

S

E

887K_0402_1%

PR66

@PR66

@

1 2

PR70

210K_0402_0.1%

PR64

@PR64

@

24751_VREF

1 2

12

VADJ

12

PR71

499K_0402_0.1%

PR244

ACGOOD#

100K_0402_5%

12

FSTCHG<28>

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

BATT+

PC48

10U_1206_25V6M

ACIN <19,28,37,38>

CHGEN#

of

40 47Wednesday, May 20, 2009

0.1

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

12

3 2

12

PR84

PR84 100K_0402_1%

100K_0402_1%

VL

47K_0402_1%

1 2

8

P

+

-

G

LM393DG_SO8

4

PR82

100K_0402_1%

@PR87

@

47K_0402_1%

1 2

VL

5

+

6

-

1 1

PJP2

SUYIN_250133MR007G115ZL

BATT_S1

1

2

3

3 4 5 6 7 8 9

2 2

1 3 5

EC_SMCA

3 3

7

9 11 13 15 17 19

EC_SMCA

4

EC_SMDA

5 6 7 8 9

PR79

100_0402_1%

PJP3

2

1 3 5 7 9 11 13 15 17 19

SUYIN_200109MS020G209ZR

2

4

6

8

10

12

14

16

18

20

1 2

EC_SMDA

PR80

PR80 100_0402_1%

100_0402_1%

12

PR85

PR85 1K_0402_1%

1K_0402_1%

PR83

6.49K_0402_1%

12

BATT_TEMP <28> EC_SMB_CK1 <28> EC_SMB_DA1 <28>

B+

12

PR88

100K_0402_1%

PR90

22K_0402_1%

13

D

2

G

S

0.1U_0402_16V7K

22K_0402_1%

1 2

PQ23

PQ23 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

VL

PR92

100K_0402_1%

PR93

1 2

0_0402_5%

SPOK<39,44>

4 4

1 2

12

PC72

@

12

@

PC69

0.22U_1206_25V7K

VMB

12

PC65

PC65 1000P_0402_50V7K

1000P_0402_50V7K

PQ22

TP0610K-T1-E3_SOT23-3

13

2

PL7

SMB3025500YA_2P

1 2

+3VALWP

12

PC70

@

0.1U_0603_25V7K

12

+VSBP

BATT+

PC66

0.01U_0402_25V7K

100K_0603_1%_TSM1A104F4361RZ

PH2 near main Battery CONN :

BAT. thermal protection at 75 degree C

100K_0603_1%_TH11-4H104FT

PC71

@PC71

@

0.22U_0603_16V7K

PC67

0.22U_0603_16V7K

PH2

@PH2

@

12

PH1

12

VL

12

0.1U_0603_25V7K

12

PR81

13.3K_0402_1%

12

PR89

@PR89

@

6.49K_0402_1%

1 2

12

PR91

@PR91

@

22.1K_0402_1%

PC64

PR78

11.3K_0402_1%

1 2

TM_REF1

12

TM_REF1

PC68

1000P_0402_50V7K

PR77

1

O

PU5A

12

VL

PR87

8

P

O

G

PU5B

LM393DG_SO8

4

7

VL

PR76

PR76 47K_0402_1%

47K_0402_1%

1 2

VL

47K_0402_1%

1 2

PD9

LL4148_LL34-2

PR86

@PR86

@

PD10

@PD10

@

LL4148_LL34-2

MAINPWON <8,39>

13

PQ21

PQ21 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

12

Security Classification

2008/06/11 2010/03/12

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008/06/11 2010/03/12

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN. / OTP

NCWG0

41 47Wednesday, May 20, 2009

D

41 47Wednesday, May 20, 2009

of

0.1

5

D D

PR247

1.3K_0402_5%

1 2

VLDT_EN<33,37>

C C

+5VALW

PR249

47K_0402_5%

PR251

300_0603_5%

1 2

1U_0603_10V6K

12

PC214

12

PC208

0.1U_0402_16V7K

12

PC213

@PC213

@

47P_0402_50V8J

1 2

PR253

3.57K_0402_1%

1 2

4

PR246

267K_0402_1%

1 2

3

5

4

SIS412DN-T1-GE3_POWERPAK8-5

4

123

8

D6D5D7D

G

S

3

2

1

FDS6670AS_NL_SO8

S

PQ36

BST_NBCOREP

15

14

1

PU12

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

TP

VBST

EN_PSV

V5DRV

GND7PGND

TPS51117RGYR_QFN14_3.5x3.5

8

DRVH

TRIP

DRVL

13 12

LL

11 10 9

0_0603_5%

1 2

DH_NBCOREP LX_NBCOREP

DL_NBCOREP

PR248

BST_NBCOREP_1

12

0.1U_0603_25V7K

PR252

12K_0402_1%

PC209

1 2

+5VALW

12

PC212

4.7U_0805_10V6K

12

PQ35

1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%

1 2

12

PR250

4.7_1206_5%

12

PC211

PC211 680P_0603_50V8J

680P_0603_50V8J

NB_51117_B+

PC206

10U_1206_25VAK

PL13

2

PL16

FBMA-L11-322513-151LMA50T_1210

1 2

1

+

PC210

PC210 330U_D2E_6.3VM_R25M

330U_D2E_6.3VM_R25M

2

B+

1

+

PC300

@+PC300

@

68U_25V_M_R0.44

2

+NB_COREP

1

12

PR254

PR254 10K_0402_1%

10K_0402_1%

2N7002W-T/R7_SOT323-3

VFB=0.75V

B B

Rton=267K, Freq=298KHz

Ipeak=7A Imax=5.32A Delta I=((19-1.1)*(1.1/19))/(1.8U*298K)=1.93A Rtrip=12K 1/2DeltaI=0.96A Rdson=9m~11.5m Iocp=9.05A~14.30A

H

1.017V

L

1.1V

A A

5

2N7002W-T/R7_SOT323-3

PR255

PR255 30K_0402_1%

30K_0402_1%

1 2

13

D

PQ37

2

G

S

BOM control (R*C>1ms)

4

PR257

10K_0402_1%

1 2

12

PC215

0.1U_0402_16V7K

2N7002W-T/R7_SOT323-3

@ PR258

@

10K_0402_1%

1 2

PQ38

PR258

+3VS

PR256

10K_0402_5%

1 2

+3VS

PR259

@PR259

@

10K_0402_5%

1 2

PR260

13

D

10K_0402_1%

2

1 2

G

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

POWER_SEL

PR261

@PR261

@

10K_0402_1%

1 2

POWER_SEL <13>

PR273

12_0402_5%

VLDT_EN

VLDT_EN<33,37>

3

1 2

PC228

1U_0603_10V6K

Compal Secret Data

Deciphered Date

PC227

1U_0402_6.3V6K

12

PR270

10K_0402_5%

PC227

12

PU15

7

POK

8

EN

2010/03/122008/11/03

2

+5VALW

6

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

APL5912-KAC-TRL_SO8

1

+1.2VALW

1

PJ22

1

JUMP_43X79

@

2

12

PC230

4.7U_0805_6.3V6K

+1.1VSP

12

PC226

PR272

1.3K_0402_1%

PR271

3.24K_0402_1%

Title

Size Document Number Rev

Date: Sheet

PC226

0.01U_0402_25V7K

12

Compal Electronics, Inc.

+NB_COREPP/+1.1VSP

NCWG0

12

PC229

1

22U_0805_6.3V6M

of

42 47Wednesday, May 20, 2009

of

42 47Wednesday, May 20, 2009

of

42 47Wednesday, May 20, 2009

0.1

5

4

3

2

1

+1.8V

1

PJ12

1

JUMP_43X79

PC73

@

12

PQ24

2

12

PR94

1 2

1K_0402_1%

13

D

2

G

S

PR96

1K_0402_1%

12

PC75

0.1U_0402_16V7K

PU6

1

VIN

2

GND

3

REFEN

4

VOUT

RT9173DPSP_SO8

12

PC76

PC76 10U_0805_6.3V6M

10U_0805_6.3V6M

VCNTL

+0.9VP

GND

6 5

NC

7

NC

8

NC

9

+3VALW

12

PC74

PC74 1U_0402_6.3V6K

1U_0402_6.3V6K

+3VS

12

PC78

1U_0402_6.3V6K

PU7

APL5508-25DC-TRL_SOT89-3

2

IN

3

OUT

GND

1

4.7U_0805_6.3V6K

PC79

+2.5VSP

12

PR98

@PR98

@

150_1206_5%

D D

4.7U_0805_6.3V6K

PR95

@PR95

@

0_0402_5%

SYSON#<32,37>

C C

1 2

2N7002W-T/R7_SOT323-3

PC77

@PC77

@

0.1U_0402_16V7K

+1.8V

+5VALW

POK

EN

12

PC83

1U_0402_6.3V6K

6

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

1

PU8

APL5915KAI-TRL_SO8

4

B B

7

PR101

100K_0402_5%

SUSP#<28,33,37>

A A

5

1 2

PR103

47K_0402_5%

1 2

12

PC86

0.1U_0402_16V7K

8

1

PJ14

JUMP_43X79

2

12

PC84

4.7U_0805_6.3V6K

PR102

1.54K_0402_1%

12

PR104

1.74K_0402_1%

12

PC85

0.01U_0402_25V7K

+1.5VSP

12

PC87

22U_0805_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/06/11 2010/03/12

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

+0.9VSP/+1.5VSP/+2.5VSP

Size Document Number Rev

Custom

Date: Sheet

NCWG0

1

of

43 47Wednesday, May 20, 2009

0.1

5

PR107

0_0402_5%

D D

VFB=0.75V Vo=VFB*(1+PR111/PR112)=0.75*(1+14K/10K)=1.8V Rton=267K=>Faw=297KHz

SYSON<28,37>

+5VALW

Cout ESR=15m ohm Ipeak=11.96A, Imax=8.372A Delta I=((19-1.8)*(1.8/19))/(L*Fsw) ((19-1.8)*(1.8/19))/(1.8u*297000)=3.048A

C C

=>1/2DeltaI=1.524A

Rtrip=16.2K Iocp=12.39A~20.69A

1 2

PR109

300_0603_5%

1 2

1U_0603_10V6K

PC94

12

PC89

@PC89

@

0.1U_0402_16V7K

12

4

PC93

@PC93

@

47P_0402_50V8J

1 2

PR111

14K_0402_1%

1 2

PR112

PR112 10K_0402_1%

10K_0402_1%

PR106

267K_0402_1%

1 2

2 3 4 5 6

PU9

TON VOUT V5FILT VFB PGOOD

1

14

15

TP

EN_PSV

VFB=0.75V

GND7PGND

TPS51117RGYR_QFN14_3.5x3.5

8

VBST

DRVH

TRIP

V5DRV

DRVL

3

578

PR200

0_0603_5%

1 2

PC90

BST_1.8V-1

12

PC90

0.1U_0603_25V7K

1 2

+5VALW

PC92

4.7U_0805_10V6K

PQ26

FDS6670AS_NL_SO8

PQ26

4

G

PR108

0_0603_5%

BST_1.8V

1 2

DH_1.8V

13

LX_1.8V

12

LL

11 10

DL_1.8V

9

12

PR110

16.2K_0402_1%

3 6

D6D5D7D

S

3

241

S

2

8

S

1

2

PQ25

PQ25 AO4466_SO8

AO4466_SO8

1.8_51117_B+

12

PR201

@PR201

@

4.7_1206_5%

12

PC171

@PC171

@

680P_0402_50V7K

PL14

FBMA-L11-322513-151LMA50T_1210

1 2

12

PC88

PC88 10U_1206_25VAK

10U_1206_25VAK

PL8

1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%

1 2

1

+

PC91

PC91 330U_6.3V_M

330U_6.3V_M

2

1

B+

12

PC204

@PC204

@

680P_0402_50V7K

+1.8VP

PL15

FBMA-L11-322513-151LMA50T_1210

AO4466_SO8

PQ40

AO4466_SO8

4

2

PR114

B B

SPOK<39,41>

VFB=0.75V Vo=VFB*(1+PR119/PR120)=0.75*(1+6.04K/10K)=1.203V Rton=267K=>Fsw=298KHz

+5VALW

A A

1.2VP Ipeak=7.4A ; Imax=5.180A Delta I=((19-1.2)*(1.2/19))/(L*Fsw) ((19-1.2)*(1.2/19))/(1.8u*298000)=2.10A =>1/2DeltaI=1.05A Rdson=11.5m/9m ohm set Rtrip=12K Icop_min=9.11A Iocp_max=14.38A

5

PR115

0_0402_5%

1 2

PR117

300_0603_5%

1 2

1U_0603_10V6K

PC101

12

PC96

@PC96

@

0.1U_0402_16V7K

12

PC100

@PC100

@

47P_0402_50V8J

1 2

PR119

6.34K_0402_1%

1 2

12

PR120

10K_0402_1%

4

PR114

267K_0402_1%

1 2

PR116

0_0603_5%

1

PU10

2

TON

3

VOUT

4

VFB=0.75V

V5FILT

5

VFB

6

PGOOD

14

15

TP

VBST

13

EN_PSV

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

GND7PGND

TPS51117RGYR_QFN14_3.5x3.5

8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0_0603_5%

BST_1.2V

1 2

DH_1.2V LX_1.2V

DL_1.2V

12

PR118

12K_0402_1%

2008/06/11 2010/03/12

3

PC97

0.1U_0603_25V7K

BST_1.2V-1

1 2

+5VALW

12

PC99

4.7U_0805_10V6K

Compal Secret Data

Deciphered Date

FDS6670AS_NL_SO8

578

PQ39

3 6

8

D6D5D7D

G

S

3

2

1

1.2_51117_B+

241

12

@PR203

@

4.7_1206_5%

12

@PC172

@

680P_0402_50V7K

PL9

1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%

1 2

PR203

PC172

Title

Size Document Number Rev

Custom

Date: Sheet

FBMA-L11-322513-151LMA50T_1210

1 2

12

PC95

PC95 10U_1206_25VAK

10U_1206_25VAK

1

+

2

+1.2VSP/+1.8VP

NCWG0

12

@PC205

@

680P_0402_50V7K

+1.2VALWP

PC98

PC98 330U_D2E_2.5VM

330U_D2E_2.5VM

1

B+

PC205

0.1

44 47Wednesday, May 20, 2009

of

5

?

D D

VGATE<28>

VCC_PRM

@

PR216

1 2

PC177

1 2

6.81K_0402_1%

1000P_0402_50V7K

C C

PR224

97.6K_0402_1%

1 2

PR227

255_0402_1%

1 2

220P_0402_50V8J

1K_0402_1%

CPU_VCC_SENSE<8>

PR229

10_0402_5%

+CPU_CORE

平行線

B B

CPU_VSS_SENSE<8>

Rn=(PR241+PH3)//(PR236)=5.875k, Rseuq=Rs/2=1.825K Vdcrequ=Io*(DCR/2), Vn=Vdcrequ*(Rn/(Rsequ+Rn)) =Io*(DCR/2)*(Rn/(Rsequ+Rn)) =Io*(DCR/2)*G1

Vdroop=Vn/Rdroop1*(Rdroop1+Rdroop2) =Vn*(1+(Rdroop2/Rdroop1)) =Vn*(1+(PR231/PR230)) =Vn*G2

=>Vdroop=Vn*(1+(PR231/PR230))=Io*Rdroop =>Io*(DCR/2)*G1*G2=Io*Rdroop =>Rdroop=1.007m ohm

Iocp_min*Rdroop>Rocset*10uA =>25A*1.007m ohm>Rocset*10uA =>choose Rocset=2.74K =>Iocp_min*1.007m ohm>2.74K*10u

A A

=Iocp_min>27.209A

Iocp_max*Rdroop>Rocset*10.4uA =>Icop_max>28.297A

10_0402_5%

from output Bulk Cap

PR232

10_0402_5%

1 2

470P_0402_50V7K

PC184

1 2

PR226

12

PC185

1000P_0402_50V7K

1 2

12

PC181

1 2

PR228

0_0402_5%

PC187

@

12

PR234

0_0402_5%

@

12

1 2

PR217

PC178

1 2

1000P_0402_50V7K

4.02K_0402_1%

1 2

1000P_0402_50V7K

1 2

PC179

PR218

36.5K_0402_1%

0.047U_0402_16V7K

PC186

@PC186

@

0.068U_0402_16V7K

1 2

PC192

@

1000P_0402_50V7K

PC193

1 2

0.22U_0402_6.3V6K

Iocp=~27.209A~28.297A

5

PR215

150K_0402_1%

1 2

1K_0402_1%

VCC_PRM

1 2

PC195

PC194

0.022U_0402_16V7K

4

PD100

@PD100

@

RB751V-40TE17_SOD323-2

12

+3VS

PSI_L

PR204

10K_0402_5%

1 2

+3VS

1 2

PR206 0_0402_5%PR206 0_0402_5%

PR212

PR210

@

1 2

10K_0402_5%

39

40

1 2

`7&?7&`

180P_0402_50V8J

1 2

PR230

12

1 2 3 4 5 6 7 8

9 10 41

1.4K_0402_1%

1 2

PGOOD

SET RBIAS OFS SOFT OCSET VW COMP FB VDIFF VSEN GND PAD

RTN

12

11

7&苪7&~7&0~7&遒7&　7&聵7&　7&

PR231

Close to Phase1 Choke PL11

PR236

1 2

11K_0402_1%

1 2

0.22U_0402_6.3V6K

4

PR241

1 2

2.61K_0402_1%

Rn

VR_ON

<8>

PR205 0_0402_5%

1 2

PR245 0_0402_5%PR245 0_0402_5%

PR211 0_0402_5%PR211 0_0402_5%

PR213 0_0402_5%

1 2

37

38

PSI_L

VR_ON

PU11

ISL6264CRZ-T_QFN40_6X6

VSUM

VIN

VO

DROOP

DFB

15

16

14

13

P| 7&|

7&閃7&

P| 7&|

7&閃7&

B+

PH3

PC196

10K_0603_5%_TSM1A103J4302RE

VSUM

0.01U_0402_50V7K

3

<28>

CPU_VID5 <8>

CPU_VID4 <8>

CPU_VID3 <8>

CPU_VID2 <8>

CPU_VID1 <8>

CPU_VID0 <8>

12

PR208 0_0402_5%

PR214 0_0402_5%

PR209 0_0402_5%PR209 0_0402_5%

1 2

31

VID032VID133VID234VID335VID436VID5

BOOT1

UGATE1 PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2 PHASE2 UGATE2

BOOT2

ISEN2

GND

ISEN1

VDD

19

17

20

18

7&釙7&`z7&0z7&`{7&

+5VS

PR233

10_0402_5%

1 2

12

PC197

1U_0402_6.3V6K

Issued Date

CPU_ISEN1

CPU_ISEN2

@} 7&{

PR235

10_0603_5%

1 2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PR207

2.2_0603_5%

30 29 28 27 26 25 24 23 22 21

Py 7&y

3

PR223 0_0402_5%PR223 0_0402_5%

UG_CPU2

PR225

2.2_0603_5%

0.22U_0603_25V7K

7&釗7&`x7&勵7&w7&0w7&輁7&　7&0x7&　7&

2008/06/11 2010/03/12

PC176

0.22U_0603_25V7K

1 2

12

PC182

4.7U_0603_6.3V6K

12

1 2

PC188

UG_CPU1

PHASE_CPU1

PQ30

AO4456_SO8

LG_CPU1

+5VS

Pu 7&u

7&配7&@v7&繠7&酒7&`s7&0s7&`t7&0t7&r7&郝7&`q7&0p7&黔7&pr7&?7&`?&?7&?7&

Pu 7&u

7&配7&@v7&繠7&酒7&`s7&0s7&`t7&0t7&r7&郝7&`q7&0p7&黔7&pr7&?7&`?&?7&?7&

3 5

PHASE_CPU2

AO4456_SO8

LG_CPU2

Compal Secret Data

578

PQ33

Deciphered Date

3 6

3 5

241

578

3 6

241

PQ32

PQ32 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

241

PQ34

AO4456_SO8

241

2

PQ29

PQ29 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

578

PQ31

AO4456_SO8

578

PQ34

3 6

241

2

3 6

241

PC202

2200P_0402_50V7K

1 2

12

1

PL10

FBMA-L18-453215-900LMA90T_1812

CPU_B+

12

1 2

PC174

PC200

2200P_0402_50V7K

PR219

1 2

4.7_1206_5%

12

PC183

680P_0603_50V8J

12

1 2

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR237

PR238

1 2

4.7_1206_5%

PC199

VSUM

680P_0603_50V8J

Size Document Number Rev

Custom

Date: Sheet

PC174

10U_1206_25V6M

PL11

0.36UH_PCMC104T-R36MN1R17_30A_20%

1 2

PR221

PC180

10K_0402_1%

0.22U_0603_16V7K

PR220

1 2

3.65K_0805_1%

CPU_ISEN1 VCC_PRM

Rs

VSUM

P? &?&?

7&0?&?7&p?&`?&0?&`?&0?&?7&?7&`?&?7&p?& ?&?7&?7&0?&?7&

P? &?&?

7&0?&?7&p?&`?&0?&`?&0?&?7&?7&`?&?7&p?& ?&?7&?7&0?&?7&

1 2

PC190

PC191

10U_1206_25V6M

PL12

1 2

10K_0402_1%

PR239

PC198

0.22U_0603_16V7K

1 2

3.65K_0805_1%

CPU_ISEN2 VCC_PRM

Title

1 2

PC175

10U_1206_25V6M

1 2

PR240

1_0402_5%

PR240

1_0402_5%

1 2

+CPU_CORE

1 2

PR222

1_0402_5%

PR222

1_0402_5%

CPU_B+

NCWG0

1

+

2

+CPU_CORE

PR242

PR242 10K_0402_1%

10K_0402_1%

1 2

CPU_ISEN2

+CPU_CORE

PR243

PR243 10K_0402_1%

10K_0402_1%

1 2

CPU_ISEN1

1

B+

PC201

PC201 220U_25V_M

220U_25V_M

p? &?&?7&@?&?7&?7&P?&0?&`?&0?&?7&p?&`

0.1

of

45 47Wednesday, May 20, 2009

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

D D

HW required to adjust from 1.14V to

1.12V

1

HW required to adjust from 1.14V to

1.12V

0.1 to PVT42 09, 05/07

Change PR271 from SD034300180 (S RES 1/16W 3K +-1%

0402) to SD034324180 (S RES 1/16W 3.24K 0402 1%)

Power sequense adjust. HW required to adjust power sequense. 0.1 42 Add PC208 SE076104K80 (S CER CAP .1U 16V K X7R 0402)

2

Power sequense adjust. HW required to adjust power sequense. 0.1 42

3 4

NB_COREP working frequency has issue.

5

BOM error 0.1 42 Add PR270 SD28100280(S RES 1/16W 10K 0402 5%) 09, 05/07 to PVTBOM error

BOM error 0.1 42BOM error

6

C C

7

Because NB_COREP working frequency will be gitter while system at heavy loading. Change to larger ESR Cap will be solve.

0.1 42

Change PR247 from SD028000080 (S RES 1/16W 0 +-5%

0402) to SD028130180 (S RES 1/16W 1.3K 0402 5%) Change PC210 from SGA19331D00 (S POLY C 330U 2.5V M

D2 TPE LESR15M H1.8) to SGA00002B00 (S POLY C 330U

6.3V M D2E ESR25M TPE H1.8)

Change PR103 from SD028470280(S RES 1/16W 47K 0402 5%) to SD028100280(S RES 1/16W 10K 0402 5%)

09, 05/07 to PVT

to PVT09, 05/07

8

9

10

11

B B

12

13

14

15

16

17

18

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/06/11 2010/03/12

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

PIR(PWR)

NCWG0

0.1

of

46 46Wednesday, May 20, 2009

1

5

4

Version change list (P.I.R. List) for HW

3

2

1

Reason for change DatePG#Item

1

D D

2 3 4 5 6 7

PWR update circuit 4/9 BOM change BOM change BOM change R30, R39 reserve P.24 4/9 BOM change Add C30 P.38 4/9 BOM change Add R634, R639 P.28 4/9 BOM change C383 Reserve P.24 4/9

8 9 10

C C

11 12 13 14

For Panel flash issue R1,D2 Reserve, pop R763 P.24 For Panel flash issue Add R414 and non-pop P.24 Lid_SW intial issue Add R19 P.28 HPET timer issue Change C288,C290 to 33P P.16 BOM change change C276,C279 10P to 27P P.19 5/19

Modify List

R118 reserve 4/9P.18

Change R178, R179 to 90.9/158 ohm P.16 4/9

Pop R419 P.20 4/10

5/15PWR update circuit 5/18 5/18 5/18 5/18

Reason for change Rev. PG#Item Modify List 26 27 28 29 30 31 32 33

15 16 17 18 19 20

B B

21 22 23 24 25

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/03/08 2010/03/12

3

Compal Secret Data

Deciphered Date

Title

PIR-HW & Option Component

Size Document Number Rev

Custom

NCWG0 LA-5481

Date: Sheet

2

Date: Sheet

47 47Wednesday, May 20, 2009

of

1

of

0.1

Compal LA-5481P NCWG0, LA-5481P NCWH0 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual