COMPAL LA-5472P Schematics

A

KDW>KE&/Ed/>

DK>ED E>Ϭϭ

B

C

D

E

WEK

1 1

>ͲϱϰϳϮW;ϬϬϬϬϭ/ϬϬͿ

ϮZŽƚŚƐĐŚŝůĚ^

2 2

ƌW'ƌƌĂŶĚĂůĞн
&'W,/yW<ͲD
нEϭϬDͲE^Ͳ^

ϮϬϭϬͲϬϭͲϮϬ

REV : 1.0(A00)

ΛEŽƉŽƉŽŵƉŽŶĞŶƚ

3 3

DdLJƉĞ KDWE

yWZ^^ZŶďůĞdWDŝƐĂďůĞdD

yWZ^^ZŝƐĂďůĞdWDŶďůĞdD

yWZ^^ZŝƐĂďůĞdWDŝƐĂďůĞdD

WD/ZŶďůĞdWDŝƐĂďůĞdD

WD/ZŝƐĂďůĞdWDŶďůĞdD

WD/ZŝƐĂďůĞdWDŝƐĂďůĞdD

4 4

ϰϯϭϳϳϴϯϭ>Ϭϭ

ϰϯϭϳϳϴϯϭ>ϬϮ

ϰϯϭϳϳϴϯϭ>Ϭϯ

ϰϯϭϳϳϴϯϭ>Ϭϰ

ϰϯϭϳϳϴϯϭ>Ϭϱ

ϰϯϭϳϳϴϯϭ>Ϭϲ

WD/ džƉƌĞƐƐ d'

ϭΛ ϮΛ t;ϯΛͿ t;ϱΛͿtK;ϰΛͿ tK;ϲΛͿ

*

*

*

*

*

*

dD dWD

*

*

*

*

*

ϳΛ ϴΛ ϵΛ

**

*

*

*

*

*

KDKE&/'

ϮΛϰΛϱΛ

ϮΛϯΛϲΛ

ϮΛϰΛϲΛ

ϭΛϰΛϱΛ

ϭΛϯΛϲΛ

ϭΛϰΛϲΛ

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

MB PCB

MB PCB

Part Number Description

Part Number Description

PCB NCL01 LA-5472P LS-5471P/5473P/5574P

PCB NCL01 LA-5472P LS-5471P/5473P/5574P

DAZ0AZ00100

DAZ0AZ00100

A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

B

C

D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

Cover Sheet

Cover Sheet

LA-5472P

LA-5472P

LA-5472P

166Wednesday, January 20, 2010

166Wednesday, January 20, 2010

166Wednesday, January 20, 2010

E

A00

A00

A00

of

of

of

A

ůŽĐŬŝĂŐƌĂŵ
ŽŵƉĂůĐŽŶĨŝĚĞŶƚŝĂů
DŽĚĞůE>Ϭϭ

ZdKEE

нϱsͺZhE

1 1

ƉĂŐĞϮϳ

s'

нWtZͺ^Z
нϯϯsͺ>t

2 2

K</E'WKZd

нK<ͺWtZͺZ
нEK<ͺͺ/Eͺ^^
н>KDͺsd

USB[8,9]

SATA5

K<>Wh^

ĂƌĚ

нϯϯsͺZhE
нϯϯsͺ^h^

ƉĂŐĞϯϰ

нϭϱsͺZhE

3 3

h^΀ϭϬ΁

нsͺ'&yKZ

Ϭϳϱs

4 4

ƉĂŐĞϰϳ

sKZ;/DsWͲϲͿ

ƉĂŐĞϰϵ

,Z'Z

ƉĂŐĞϱϭ

sŝĚĞŽ^ǁŝƚĐŚ

W/ϯsϳϭϮͲ>y

нϯϯsͺZhE ƉĂŐĞϮϳ

ĞWKEE

W^ǁŝƚĐŚ
W/ϯsWϴϮϬϬy

нϯϯsͺZhE

WKEE

нϯϯsͺZhE

ƉĂŐĞϯϴ

/

DŝŶŝĂƌĚϯ
<d&>^,

нϯϯsͺW/ͺ<d
нϭϱsͺZhE ƉĂŐĞϯϲ

h^΀ϭϯ΁

ƉĂŐĞϱϮ

A

ƉĂŐĞϮϰнϯϯsͺZhE

ƉĂŐĞϮϲ

ƉĂŐĞϮϲ

WD/^>Kd

нϯϯsͺZhE
нϱsͺZhE

page 34

^DD

KEE

ƉĂŐĞϯϯнϯϯsͺZhE

W/ϱ

нϯϯsͺt>E
нϭϱsͺZhE нϭϱsͺZhEƉĂŐĞϯϲ ƉĂŐĞϯϲ

dƌŽƵŐŚĂďůĞ

ŝŽŵĞƚƌŝĐ

+3.3V_RUN

ϯsϱs

ƉĂŐĞϰϱ

ϭϱs

ƉĂŐĞϰϲ

s'

N10M-S
23X23

+1.05V_RUN_VTT_GFX

W

+1.5V_MEM_GFX

W

+GPU_CORE

W

нϯϯsͺZhE

нϭϬϱsͺZhEͺϭϬϬD,nj

W/Ϯ W/ϭ

DŝŶŝĂƌĚϮyWZ^^

t>E

h^΀ϰ΁ h^΀ϱ΁

^ŵĂƌƚĂƌĚ

ƉĂŐĞϯϭ

Z&/

ƉĂŐĞϯϭ

ƉĂŐĞϯϳ

WtZ^>d

/EΘdd/E

page 55- 60

/ϭϯϵϰ

DŝŶŝĂƌĚϭ

нϯϯsͺW/ͺ^dͺtE

dϴϬϯϰ,E

нϱsͺ>t ƉĂŐĞϯϭͲϯϮ
нϯϯsͺ>t
н^ͺWtZ

ƉĂŐĞϱϬ

ƉĂŐĞϰϰ

page 33

ĂƌĚƵƐ
ZϱhϮϰϮ

ttE

h^,

dŽƵĐŚWĂĚ

нϱsͺ>t
нϱsͺZhE
нϯϯsͺ>t
нϯϯsͺZhE

B

W/yϭϲ

On IO/B

ƉĂŐĞϯϯͲϯϰнϯϯsͺZhE

W/džƉƌĞƐƐh^

Option

нϯϯsͺZhE

h^,dWDϭϮ

нϯϯsͺ>t нsͺϱϴϴϮ
нϮϱsͺ>tͺs
нϭϮsͺ>tͺs

ƉĂŐĞϯϭ

нϭϮsͺ>tͺW>>

^Dh^

ƉĂŐĞϰϭ

ϭϬϱs

WŽǁĞƌKŶKĨĨ
^tΘ>

B

W/ϯ

dD

^^yϰϰͲ

DϱϴϴϮ

USB[7]

ƉĂŐĞϰϬ

^ƚŝĐŬ

ƉĂŐĞϰϴ

ƉĂŐĞϰϯ

ϰD;^ŽĐŬĞƚ'ϭͿ

нsͺKZ
нϭϴsͺZhE
нϭϱsͺDD
нϭϬϱsͺZhEͺsdd

нZdͺ>>
нϭϬϱsͺD
нϯϯsͺD
нϭϬϱsͺZhE
нϭϴsͺZhE
нϯϯsͺZhE
нϯϯsͺ>tͺW,

ƉĂŐĞϯϮ

>Wh^

нϯsͺZhE
ϯϯD,nj

нZdͺ>>
нϯϯsͺ>t

h^

ϭϬϳϳ

нϯϯsͺ>t

/Ŷƚ<Θ
^ƚŝĐŬ

/ŶƚĞƌĨĂĐĞ

ƌƌĂŶĚĂůĞ

W'Wh

ϵϴϵƉŝŶƐ

DMI

Lane x 4

/Ed>

/yW<ͲD

ϭϬϲϬƉŝŶ'

^W/

tϮϱYϲϰs^^/'

нϯϯsͺD

tϮϱyϯϮs^^/'

нϯϯsͺD

^D^<
DϱϬϰϱ

ƉĂŐĞϰϬ

ƉĂŐĞϰϭ

ƉĂŐĞϰϮ

C

ƉĂŐĞϳͲϭϮ

ƉĂŐĞϭϱͲϮϯ

ϲϰDϰ<ƐĞĐƚŽƌ

0.VHFWRU

K<>Wh^

h^

C

ƉĂŐĞϭϱ

ƉĂŐĞϭϱ

нZdͺ>>
нϯϯsͺD нϭϬϱsͺZhEͺsdd
нϱsͺZhE
нϯϯsͺZhE

DĞŵŽƌLJh^
;ZϯͿ

ϰϴD,nj

W/^Dh^

,ƵĚŝŽ/&

^ͲdϬϭϰϱϯ'Ɛ

нϭϱsͺDDϴϬϬDŚnjϭϬϲϲD,nj

h^΀ϭϭ΁

^dϰ

h^΀Ϯϯ΁ >^/

h^΀Ϭϭ΁ Z^/

нϭϬϱsͺZhEͺsddϭϬϬD,nj

^dϭ ^dϬ

ͲDŽĚƵůĞ

нϱsͺDK

ƉĂŐĞϮϴ

^D^^/K

ϱϬϮϴ

нϯϯsͺ>t

ƉĂŐĞϯϵ

dŚĞƌŵĂů

'hZ/E///
DϰϬϬϮ

^dZĞƉĞĂƚĞƌ
^Eϳϱ>sWϰϭϮ

нϯϯsͺZhE

^Ͳ,

нϱsͺ,

ƉĂŐĞϮϴ

нϯϯsͺ>tͺW,

dƌŽƵŐŚĂďůĞ

D

ƉĂŐĞϮϯ

Z///Ͳ/DDyϮ

E<ϬϭϮϯϰϱϲϳϴ

нϭϱsͺDD
нsͺZͺZ&
нϯϯsͺZhE
нϬϳϱsͺZͺsdd

нϯϯsͺZhE

нϯϯsͺZhE

ƉĂŐĞϯϳ

h^WŽƌƚƐyϮ

нϱsͺ>t

h^WŽƌƚƐyϮ

нϱsͺ>t

njĂůŝĂŽĚĞĐ

ϵϮ,ϴϭϭ

нϯϯsͺZhE

нϱsͺZhE

ƉĂŐĞϮϵ

D

ƉĂŐĞϯϳ нϭϴsͺZhE

KŶ/K

Z:ϭϭ

D

E

WhydWWŽƌƚ

ƉĂŐĞϭϯϭϰ

dDKh>

ĂŵĞƌĂ

ƉĂŐĞϰϭ

ƉĂŐĞϮϰ

ƉĂŐĞϴ

ůŽĐŬ'ĞŶĞƌĂƚŽƌ
^>'ϴ^Wϱϴϱ

нϯϯsͺZhE
нϭϬϱsͺZhE

dƌŽƵŐŚdĂďůĞ

dƌŽƵŐŚĞWĂďůĞ

Ͳ^d

ƉĂŐĞϯϳ

ƉĂŐĞϯϳ

h^Ϯ>ĞĨƚƐŝĚĞƉĂŝƌƚŽƉ

h^ϯZĞĂƌZŝŐŚƚƉĂŝƌďŽƚƚŽŵ

h^ϬZŝŐŚƚƐŝĚĞƉĂŝƌƚŽƉ

h^ϭZŝŐŚƚƐŝĚĞƉĂŝƌďŽƚƚŽŵ

KŶ/K

/ŶƚĞů,ĂŶŬƐǀŝůůĞ

ϴϮϱϳϳ>D

нϯϯsͺ>E

нϭϬsͺ>E

ƉĂŐĞϯϬ

>E^t/d,

/Ed^ƉĞĂŬĞƌ

,ĞĂĚWŚŽŶĞΘ
D/:ĂĐŬ

нsZ&Khd

/

d/d>sϯϮϬ/ϯϬϬϰ

нϯϯsͺZhE

ƉĂŐĞϮϵ

ƉĂŐĞϮϵ

W/ϯ>ϳϮϬ,

нϯϯsͺ>E

Z:ϰϱ

tŝ&ŝKEK&&

K<

ƉĂŐĞϯϬ

KŶ/K

ŝŐD/

dƌŽƵŐŚĞWĂďůĞ

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

LA-5472P

LA-5472P

LA-5472P

266Wednesday, January 20, 2010

266Wednesday, January 20, 2010

266Wednesday, January 20, 2010

E

ƉĂŐĞϲ

of

of

of

A00

A00

A00

5

4

3

2

1

POWER STATES

State

D D

S0 (Full ON) / M0

S3 (Suspend to RAM) / M1

S4 (Suspend to DISK) / M1 ON ON OFF

S5 (SOFT OFF) / M1 ON ON OFFLOW LOW HIGHLOW

S3 (Suspend to RAM) / M-OFF

S4 (Suspend to DISK) / M-OFF

S5 (SOFT OFF) / M-OFF

Signal

SLP

SLP

S3#

S4#

HIGH HIGH HIGH

HIGH

LOW HIGH HIGH HIGH ON ON ON OFF

LOW

LOW HIGH HIGHLOW

LOW

LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF

LOW LOW LOW LOW ON OFF OFF OFF OFF

LOW LOW LOW LOW LOW ON OFF OFF OFF OFF

SLP
S5#

HIGH

S4
STATE#

SLP
M#

HIGH

HIGH

ALWAYS
PLANE

ON

M
PLANE

ON

SUS

RUN

PLANE

PLANE

ON ON ON

OFF

OFF

CLOCKS

OFF

OFF

OFF

PCH

USB PORT#

0

1

2

3

4

5

6

7

DESTINATION

JUSB1 (Ext Right Side Top)

JUSB1 (Ext Right Side Bottom)

JESA1 (Ext Left Side Top)

JESA1 (Ext Left Side Bottom)

WLAN

WWAN

Bluetooth

USH->BIO

DOCKING8

C C

PM TABLE

State

power
plane

+15V_ALW

+5V_ALW

+3.3V_ALW_PCH

+3.3V_RTC_LDO

+3.3V_SUS

+1.5V_MEM

+5V_RUN

+3.3V_RUN

+1.8V_RUN

+1.5V_RUN

+0.75V_DDR_VTT

+VCC_CORE

+1.05V_RUN_VTT

+1.05V_RUN

+3.3V_M +3.3V_M

+1.05V_M

+1.05V_M

(M-OFF)

9

10 Express card

11

12

13

DOCKING

Camera

none

JMINI3(PCIE/BKT CARD)

S0

S3

B B

S5 S4/AC

S5 S4/AC don't exist

ON

ON

ON ON

ON

OFF

OFFOFF

OFFON

OFF

OFF

ON

ON

ON

ON

OFF

OFF

OFFOFF

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

Lane 7

DESTINATION

MINI CARD-1 WWAN

MINI CARD-2 WLAN

PCMCIA

EXPRESS CARD

MINI CARD-3 PCIE/BKT

10/100/1G LAN

None

Lane 8 None

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Index and Config.

Index and Config.

Index and Config.

LA-5472P

LA-5472P

LA-5472P

366Wednesday, January 20, 2010

366Wednesday, January 20, 2010

366Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

4

3

2

1

EN_INVPWR

FDC654P

Q17

+BL_PWR_SRC

HDDC_EN

MODC_EN

ADAPTER

D D

SI3456BDVSI3456BDV

(Q29)(Q32)

BATTERY

+PWR_SRC

CHARGER

C C

DGPU_PWR_EN

ISL62872

(PU901)

+GPU_CORE

+5V_HDD

ALWON

MAX17020

(PU19)

+5V_MOD

+5V_ALW

+15V_ALW

RUN_ON

FDS8878

+3.3V_ALW

(Q55)

+5V_RUN

AUX_ON

SI3456

(Q2)

RUN_ON

NTMS4107

(Q61)

M_ON

SI3456BDV

(Q66)

MAX17030

(PU20)

VT356
(PU4)

TPS51100

(PU5)

ISL8014
(PU301)

NCP5222

(PU10)

AUX_EN_WOWL

SI3456BDV

(Q47)

PCH_ALW_ON

SI3456BDV

(Q54)

SUS_ON

S13456

(Q60)

B B

IMVP_VR_ON

+VCC_CORE

CPU1.5V_S3_GATE

DDR_ON

0.75V_DDR_VTT_ON

+1.5V_MEM +0.75V_DDR_VTT

RUN_ON

RUN_ON

+1.8V_RUN

CPU_VTT_ON

+1.05V_RUN_VTT +1.05V_M

M_ON

+3.3V_WLAN

GFX_MEM_VTT_ON

RUN_ON

+3.3V_ALW_PCH

Pop option

+3.3V_M

Pop option

+3.3V_LAN+3.3V_SUS

REGCTL_PNP10

+3.3V_RUN

+3.3V_M

DCP69

2

(Q45)

Pop option

+1.0V_LAN

+1.05V_M

Pop option

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Power Rail

Power Rail

Power Rail

LA-5472P

LA-5472P

LA-5472P

466Wednesday, January 20, 2010

466Wednesday, January 20, 2010

466Wednesday, January 20, 2010

1

of

of

of

A00

A00

A00

AO4430
(Q200)

A A

+1.5V_CPU_VDDQ

S1S406
(Q151)

GFX_MEM_VTT_ON

+1.5V_RUN

FDS8878

(Q183)

SI4164
(Q57)

+1.5V_RUN

+1.05V_RUN

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

SI4164

(Q58)

5

+1.5V_MEM_GFX

4

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

5

4

3

2

1

2.2K

2.2K

2.2K

2.2K

2.2K

+3.3V_ALW_PCH

+3.3V_LAN

28

31

LOM

+3.3V_ALW

+LCD_VDD

SMBUS Address [C8]

127

129

DOCKING

17

LCD

18

(JeDP1)

SMBUS Address [TBD]

SMBUS Address [TBD]

202

200

202

200

DIMMA

DIMMB

53

XDP1

51

53

XDP2

51

2N7002

2N7002

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

14

13

2.2K

2.2K

G Sensor

+3.3V_RUN

SMBUS Address [TBD]

2.2K

2.2K

B4

A3

B5

A4

MEM_SMBC LK

MEM_SMBD ATA

2.2K

2.2K

LAN_SMBCLK

LAN_SMBDATA

2.2K

+3.3V_ALW_PCH

DOCK_SMB_CLK

DOCK_SMB_DAT

LCD_SMBCLK

LCD_SMDATA

H14

C8

PCH

D D

C6

G8

E10G12

SML1_SMBDATA

SML1_SMBCLK

B6A5

3A

3A

C C

1A

1A

1B

1B

2.2K

+3.3V_ALW

100 ohm

100 ohm

+3.3V_ALW

7

6

M9

L9

BATTERY
CONN

USH

SMBUS Address [TBD]

SMBUS Address [TBD]

KBC

A56

1C1CB59

A50

1E

B53

1E

PBAT_SMBCLK

2.2K

PBAT_SMBDAT

2.2K

2.2K

USH_SMBCLK

USH_SMBDAT

2.2K

4

+3.3V_ALW

+3.3V_ALW

+3.3V_RUN

+3.3V_RUN

10

9

2N7002

2N7002

7

8

Charger

Express card

SMBUS Address [TBD]

0 ohm0 ohm

DAI_GPU_SMBCLK

DAI_GPU_SMBDAT

SMBUS Address [TBD]

31

CLK GEN

32

8

A/D,D/A

9

converter

18

19

R3P

3

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SMBUS TOPOLOGY

SMBUS TOPOLOGY

SMBUS TOPOLOGY

LA-5472P

LA-5472P

LA-5472P

566Wednesday, January 20, 2010

566Wednesday, January 20, 2010

566Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

B B

CARD_SMBCLK

A49

2B

2B

B52

CARD_SMBDAT

MEC 5045

B50

A47

CHARGER_SMBCLK

CHARGER_SMBDAT

1G

1G

2.2K

2.2K

2.2K

2.2K

B7

2D

2D

CKG_FFS_SMBDAT

A7

CKG_FFS_SMBCLK

2.2K

2.2K

A A

5

B49

2A

2A

DAI_GPU_R3P_SMBCLK

B48

DAI_GPU_R3P_SMBDAT

2.2K

5

4

3

2

1

C1707

@C1707

@

+3.3V_RUN

1

2

R92

D D

+3.3V_RUN

L89

L89

1 2

BLM18AG601SN1D_0603~D

BLM18AG601SN1D_0603~D

10U_0805_10V4Z~DC210U_0805_10V4Z~D

1

C2

2

+CK_VDD_MAIN

0.1U_0402_16V4Z~DC30.1U_0402_16V4Z~D

0.1U_0402_16V4Z~DC40.1U_0402_16V4Z~D

0.1U_0402_16V4Z~DC50.1U_0402_16V4Z~D

0.1U_0402_16V4Z~DC60.1U_0402_16V4Z~D

1

1

1

C3

C4

2

2

1

C5

2

2

0.1U_0402_16V4Z~DC70.1U_0402_16V4Z~D

1

C6

C7

2

+1.05V_RUN

1 2

L2

L2

BLM18AG601SN1D_0603~D

BLM18AG601SN1D_0603~D

1

2

10U_0805_10V4Z~DC810U_0805_10V4Z~D

+CLK_VDD_IO

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C8

2

0.1U_0402_16V4Z~DC90.1U_0402_16V4Z~D

1

C10

C10

C9

2

H_STP_CPU#

CLKREF

R92
10K_0402_5%~D

10K_0402_5%~D

1 2

10P_0402_50V8J~D

10P_0402_50V8J~D

EMI

+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V

+CK_VDD_MAIN

+CLK_VDD_IO

C C

CKG_FFS_SMBDAT40

CKG_FFS_SMBCLK40

H_STP_CPU#

1 2

CLK_PWRGD

CLK_XTAL_IN

CLK_XTAL_OUT

CLKREFCLK_PCH_14M

33_0402_5%~D

33_0402_5%~D

C16

27P_0402_50V8J~D

27P_0402_50V8J~D

C17

C17

27P_0402_50V8J~D

27P_0402_50V8J~D

B B

+1.05V_RUN

12

R41

@R41

@

4.7K_0402_5%~D

4.7K_0402_5%~D

12

R17 0_0402_5%~DR17 0_0402_5%~D

12

CLK_PCH_14M16

1 2

R33

R33

X1

X1

14.31MHZ_16PF_X5H01431AFG1HX~D

14.31MHZ_16PF_X5H01431AFG1HX~D

12

C16

REF_O/CPU_SEL

CLKREF

12

R23

R23
10K_0402_5%~D

10K_0402_5%~D

PIN 30

(0.7~1.5v)

(DEFULT)

0

CPU0

100MHz1

133MHz

CPU1

100MHz

133MHz

U1

U1

1

VDD_DOT

5

VDD_27

15

VDDSRC_IO

18

VDDCPU_IO

17

VDDSRC_3.3

24

VDDCPU_3.3

29

VDDREF_3.3

31

SDA

32

SCL

16

CPU_STOP#

25

CKPWRGD/PD#

28

XTAL_IN

27

XTAL_OUT

30

REF_0/CPU_SEL

SLG8SP585VTR_QFN32_5X5~D

SLG8SP585VTR_QFN32_5X5~D

CPU_0

CPU_0#

CPU_1

CPU_1#

SRC_1/SATA

SRC_1/SATA#

SRC_2

SRC_2#

DOT_96

DOT_96#

27MHz

27MHz_SS

VSS_DOT

VSS_27

VSS_SATA

VSS_SRC
VSS_CPU
VSS_REF

23

22

BUF_BCLK

20

BUF_BCLK# CLK_BUF_BCLK#

19

BUF_CKSSCD

10

BUF_CKSSCD#

11

BUF_DMI

13

14

DOT96

3

DOT96#

4

CLK_NV CLK_NV_27M

6

CLK_NVSS CLK_NVSS_27M

7

2
8
9
12
21
26
33

EP

1 2

R11 0_0402_5%~DR11 0_0402_5%~D

1 2

R13 0_0402_5%~DR13 0_0402_5%~D

1 2

R1181 0_0402_5%~DR1181 0_0402_5%~D

1 2

R1180 0_0402_5%~DR1180 0_0402_5%~D

1 2

R49 0_0402_5%~DR49 0_0402_5%~D

1 2

R52 0_0402_5%~DR52 0_0402_5%~D

1 2

R37 0_0402_5%~DR37 0_0402_5%~D

1 2

R38 0_0402_5%~DR38 0_0402_5%~D

1 2

R43 33_0402_5%~D@R43 33_0402_5%~D@

1 2

R39 33_0402_5%~D@R39 33_0402_5%~D@

CLK_BUF_BCLK

CLK_BUF_CKSSCD

CLK_BUF_CKSSCD#

CLK_BUF_DMI

CLK_BUF_DMI#BUF_DMI#

CLK_BUF_DOT96

CLK_BUF_DOT96#

CLK_EN#49

CLK_BUF_BCLK 16

CLK_BUF_BCLK# 16

CLK_BUF_CKSSCD 16

CLK_BUF_CKSSCD# 16

CLK_BUF_DMI 16

CLK_BUF_DMI# 16

CLK_BUF_DOT96 16

CLK_BUF_DOT96# 16

CLK_NV_27M 53

CLK_NVSS_27M 53

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C1392

@C1392

@

+3.3V_RUN

2

G

G

+3.3V_RUN

1

2

12

13

D

D

S

S

A2Y

R132

R132
1K_0402_5%~D

1K_0402_5%~D

R369

R369
100_0402_5%~D

100_0402_5%~D

1 2

Q136

Q136
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

5

1

U23

@U23

@

P

NC

4

G

NC7SZ04P5X_NL_SC70-5~D

NC7SZ04P5X_NL_SC70-5~D

3

R372

@R372

@

0_0402_5%~D

0_0402_5%~D

1 2

CLK_PWRGD

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Clock Generator

Clock Generator

Clock Generator

LA-5472P

LA-5472P

LA-5472P

666Wednesday, January 20, 2010

666Wednesday, January 20, 2010

666Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

JCPUA

JCPUA

DMI_CRX_PTX_N017
DMI_CRX_PTX_N117
DMI_CRX_PTX_N217

D D

DMI_CRX_PTX_N317

DMI_CRX_PTX_P017
DMI_CRX_PTX_P117
DMI_CRX_PTX_P217
DMI_CRX_PTX_P317

DMI_CTX_PRX_N017
DMI_CTX_PRX_N117
DMI_CTX_PRX_N217
DMI_CTX_PRX_N317

DMI_CTX_PRX_P017
DMI_CTX_PRX_P117
DMI_CTX_PRX_P217
DMI_CTX_PRX_P317

C C

B B

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

1 2

FDI_GND

R1147

R1147
1K_0402_5%~D

1K_0402_5%~D

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

REV1.0

REV1.0

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]

4

PEG_IRCOMP_R

B26
A26
B27

EXP_RBIAS

A25

PEG_CRX_GTX_N0

K35

PEG_CRX_GTX_N1

J34

PEG_CRX_GTX_N2

J33

PEG_CRX_GTX_N3

G35

PEG_CRX_GTX_N4

G32

PEG_CRX_GTX_N5

F34

PEG_CRX_GTX_N6

F31

PEG_CRX_GTX_N7

D35

PEG_CRX_GTX_N8

E33

PEG_CRX_GTX_N9

C33

PEG_CRX_GTX_N10

D32

PEG_CRX_GTX_N11

B32

PEG_CRX_GTX_N12

C31

PEG_CRX_GTX_N13

B28

PEG_CRX_GTX_N14

B30

PEG_CRX_GTX_N15

A31

PEG_CRX_GTX_P0

J35

PEG_CRX_GTX_P1

H34

PEG_CRX_GTX_P2

H33

PEG_CRX_GTX_P3

F35

PEG_CRX_GTX_P4

G33

PEG_CRX_GTX_P5

E34

PEG_CRX_GTX_P6

F32

PEG_CRX_GTX_P7

D34

PEG_CRX_GTX_P8

F33

PEG_CRX_GTX_P9

B33

PEG_CRX_GTX_P10

D31

PEG_CRX_GTX_P11

A32

PEG_CRX_GTX_P12

C30

PEG_CRX_GTX_P13

A28

PEG_CRX_GTX_P14

B29

PEG_CRX_GTX_P15

A30

PEG_CTX_GRX_C_N0

L33

PEG_CTX_GRX_C_N1

M35

PEG_CTX_GRX_C_N2

M33

PEG_CTX_GRX_C_N3

M30

PEG_CTX_GRX_C_N4

L31

PEG_CTX_GRX_C_N5

K32

PEG_CTX_GRX_C_N6

M29

PEG_CTX_GRX_C_N7

J31

PEG_CTX_GRX_C_N8

K29

PEG_CTX_GRX_C_N9

H30

PEG_CTX_GRX_C_N10

H29

PEG_CTX_GRX_C_N11

F29

PEG_CTX_GRX_C_N12

E28

PEG_CTX_GRX_C_N13

D29

PEG_CTX_GRX_C_N14

D27

PEG_CTX_GRX_C_N15

C26

PEG_CTX_GRX_C_P0

L34

PEG_CTX_GRX_C_P1

M34

PEG_CTX_GRX_C_P2

M32

PEG_CTX_GRX_C_P3

L30

PEG_CTX_GRX_C_P4

M31

PEG_CTX_GRX_C_P5

K31

PEG_CTX_GRX_C_P6

M28

PEG_CTX_GRX_C_P7

H31

PEG_CTX_GRX_C_P8

K28

PEG_CTX_GRX_C_P9

G30

PEG_CTX_GRX_C_P10

G29

PEG_CTX_GRX_C_P11

F28

PEG_CTX_GRX_C_P12

E27

PEG_CTX_GRX_C_P13

D28

PEG_CTX_GRX_C_P14

C27

PEG_CTX_GRX_C_P15

C25

3

R1084 49.9_0402_1%~DR1084 49.9_0402_1%~D

1 2

R1129 750_0402_1%~DR1129 750_0402_1%~D

1 2

PEG_CRX_GTX_N[0..15] 53

PEG_CRX_GTX_P[0..15] 53

PEG_CTX_GRX_P[0..15]

PEG_CTX_GRX_N[0..15]

PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_N0 PEG_CTX_GRX_N0

PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_N1

PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N2

PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_N3

PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_N4

PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_N5

PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_N6

PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_N7

PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_N8

PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_N9

PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_N10

PEG_CTX_GRX_C_P11
PEG_CTX_GRX_C_N11

PEG_CTX_GRX_C_P12
PEG_CTX_GRX_C_N12

PEG_CTX_GRX_C_P13
PEG_CTX_GRX_C_N13

PEG_CTX_GRX_C_P14
PEG_CTX_GRX_C_N14

PEG_CTX_GRX_C_P15
PEG_CTX_GRX_C_N15

PEG_CTX_GRX_P[0..15] 53

PEG_CTX_GRX_N[0..15] 53

C1666 0.1U_0402_10V7K~DC1666 0.1U_0402_10V7K~D

12

C1667 0.1U_0402_10V7K~DC1667 0.1U_0402_10V7K~D

C1668 0.1U_0402_10V7K~DC1668 0.1U_0402_10V7K~D

12

C1670 0.1U_0402_10V7K~DC1670 0.1U_0402_10V7K~D

12

C1672 0.1U_0402_10V7K~DC1672 0.1U_0402_10V7K~D

12

C1674 0.1U_0402_10V7K~DC1674 0.1U_0402_10V7K~D

12

C1676 0.1U_0402_10V7K~DC1676 0.1U_0402_10V7K~D

12

C1678 0.1U_0402_10V7K~DC1678 0.1U_0402_10V7K~D

12

C1680 0.1U_0402_10V7K~DC1680 0.1U_0402_10V7K~D

12

C1682 0.1U_0402_10V7K~DC1682 0.1U_0402_10V7K~D

1 2

C1684 0.1U_0402_10V7K~DC1684 0.1U_0402_10V7K~D

1 2

C1686 0.1U_0402_10V7K~DC1686 0.1U_0402_10V7K~D

1 2

C1688 0.1U_0402_10V7K~DC1688 0.1U_0402_10V7K~D

1 2

C1690 0.1U_0402_10V7K~DC1690 0.1U_0402_10V7K~D

1 2

C1692 0.1U_0402_10V7K~DC1692 0.1U_0402_10V7K~D

1 2

C1694 0.1U_0402_10V7K~DC1694 0.1U_0402_10V7K~D

1 2

C1696 0.1U_0402_10V7K~DC1696 0.1U_0402_10V7K~D

1 2

12

C1669 0.1U_0402_10V7K~DC1669 0.1U_0402_10V7K~D

12

C1671 0.1U_0402_10V7K~DC1671 0.1U_0402_10V7K~D

12

C1673 0.1U_0402_10V7K~DC1673 0.1U_0402_10V7K~D

12

C1675 0.1U_0402_10V7K~DC1675 0.1U_0402_10V7K~D

12

C1677 0.1U_0402_10V7K~DC1677 0.1U_0402_10V7K~D

12

C1679 0.1U_0402_10V7K~DC1679 0.1U_0402_10V7K~D

12

C1681 0.1U_0402_10V7K~DC1681 0.1U_0402_10V7K~D

12

C1683 0.1U_0402_10V7K~DC1683 0.1U_0402_10V7K~D

1 2

C1685 0.1U_0402_10V7K~DC1685 0.1U_0402_10V7K~D

1 2

C1687 0.1U_0402_10V7K~DC1687 0.1U_0402_10V7K~D

1 2

C1689 0.1U_0402_10V7K~DC1689 0.1U_0402_10V7K~D

1 2

C1691 0.1U_0402_10V7K~DC1691 0.1U_0402_10V7K~D

1 2

C1693 0.1U_0402_10V7K~DC1693 0.1U_0402_10V7K~D

1 2

C1695 0.1U_0402_10V7K~DC1695 0.1U_0402_10V7K~D

1 2

C1697 0.1U_0402_10V7K~DC1697 0.1U_0402_10V7K~D

1 2

PEG_CTX_GRX_P0

PEG_CTX_GRX_P1
PEG_CTX_GRX_N1

PEG_CTX_GRX_P2
PEG_CTX_GRX_N2

PEG_CTX_GRX_P3
PEG_CTX_GRX_N3

PEG_CTX_GRX_P4
PEG_CTX_GRX_N4

PEG_CTX_GRX_P5
PEG_CTX_GRX_N5

PEG_CTX_GRX_P6
PEG_CTX_GRX_N6

PEG_CTX_GRX_P7
PEG_CTX_GRX_N7

PEG_CTX_GRX_P8
PEG_CTX_GRX_N8

PEG_CTX_GRX_P9
PEG_CTX_GRX_N9

PEG_CTX_GRX_P10
PEG_CTX_GRX_N10

PEG_CTX_GRX_P11
PEG_CTX_GRX_N11

PEG_CTX_GRX_P12
PEG_CTX_GRX_N12

PEG_CTX_GRX_P13
PEG_CTX_GRX_N13

PEG_CTX_GRX_P14
PEG_CTX_GRX_N14

PEG_CTX_GRX_P15
PEG_CTX_GRX_N15

2

JCPUI

JCPUI

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

VSS

VSS

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

NCTF

NCTF

REV1.0

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

REV1.0

AT35
AT1
AR34
B34
B2
B1
A35

1

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Arrandale (1/6)

Arrandale (1/6)

Arrandale (1/6)

LA-5472P

LA-5472P

LA-5472P

766Wednesday, January 20, 2010

766Wednesday, January 20, 2010

766Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

4

3

2

1

1.5V_PWRGD 42

+3.3V_ALW2

+3.3V_ALW2

D D

0.22U_0402_6.3V6K~D

0.22U_0402_6.3V6K~D

C C

place R1286 56ohm near CPU

H_CPURST#49

B B

H_CPUPWRGD19

PM_DRAM_PWRGD17

+1.5V_CPU_VDDQ

12

R1504

R1504

1K_0402_5%~D

1K_0402_5%~D

2

C1880

C1880

1

CPU_DETECT#40

H_CATERR#39

H_PROCHOT#49

H_THERMTRIP#23

H_CPURST#

IMVP_PWRGD39,49

PCH_PLTRST#_EC18,32,34,36,39,40

H_PM_SYNC17

R12 0_0402_5%~D@R12 0_0402_5%~D@

R1290 0_0402_5%~DR1290 0_0402_5%~D

R1087 0_0402_5%~DR1087 0_0402_5%~D

R878 0_0402_5%~DR878 0_0402_5%~D

H_VTTPWRGD48

R1144 1.5K_0402_1%~DR1144 1.5K_0402_1%~D

Refer to CRB 1.51

R1507

R1507

1 2

1.8K_0402_5%~D

1.8K_0402_5%~D

H_PECI19

1 2

R1286

R1286
0_0402_5%~D

0_0402_5%~D

1 2

R1088 0_0402_5%~DR1088 0_0402_5%~D

1 2

1 2

1 2

1 2

1 2

1.5V_CPU_VDDQ_PWRGD_R1.5V_CPU_VDDQ_PWRGD

H_COMP3

H_COMP2

H_COMP1

H_COMP0

CPU_DETECT#

H_CATERR#

H_PECI

H_PROCHOT#

H_THERMTRIP#_R

H_CPURST#_R XDP_TMS

H_PM_SYNC

VCCPW RGOOD_1_R

VCCPW RGOOD_0_R

PM_DRAM_PWRGD_R

H_VTTPWRGD

H_PWRGD_XDP

PCH_PLTRST#_R

R1143

R1143
750_0402_1%~D

750_0402_1%~D

1 2

AT23

AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

12

C

C

2

B

B

E

E

3 1

JCPUB

JCPUB

COMP3

COMP2

COMP1

COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPW RGOOD_1

VCCPW RGOOD_0

SM_DRAMPWROK

VTTPWR GOOD

TAPPWRGOOD

RSTIN#

R1503

R1503
100K_0402_5%~D

100K_0402_5%~D

1.5V_CPU_VDDQ_PWRGD#

Q205

Q205
PMST3904_SOT323-3~D

PMST3904_SOT323-3~D

PWR MANAGEMENT

PWR MANAGEMENT

12

R1505

R1505
10K_0402_5%~D

10K_0402_5%~D

1.5V_PWRGD

13

D

D

Q207

Q207

2

G

G

BSS138_SOT23~D

BSS138_SOT23~D

S

S

+1.5V_CPU_VDDQ

MISC THERMAL

MISC THERMAL

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

DDR3

MISC

DDR3

MISC

JTAG & BPM

JTAG & BPM

REV1.0

REV1.0

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

PRDY#
PREQ#

TRST#

TDI_M

TDO_M

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

+3.3V_ALW

C1879

C1879

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

U141

U141

5

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

1

P

IN1

4

O

2

IN2

1 2

R1518

@R1518

@

1.1K_0402_1%~D

1.1K_0402_1%~D

A16

BCLK

B16

AR30
AT30

E16
D16

A18
A17

F6

AL1
AM1
AN1

AN15
AP15

AT28
AP27

AN28

TCK

AP28

TMS

AT27

AT29

TDI

AR27

TDO

AR29
AP29

AN25

DBR#

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

G

3

1.5K_0402_1%~D

1.5K_0402_1%~D

PM_DRAM_PWRGD_R

750_0402_1%~D

750_0402_1%~D

CPU_BCLK
CPU_BCLK#

CLK_CPU_ITP
CLK_CPU_ITP#

CPU_DMI

CPU_DMI#

DDR3_DRAMRST#_CPU

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

PM_EXTTS#

XDP_PRDY#
XDP_PREQ#

XDP_TCLK

XDP_TRST#

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

XDP_DBRESET#_R

XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R

XDP_OBS4_R XDP_OBS4
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R

12

R879

R879

12

R880

R880

Keep R1132, R1133, R1136, R1137
for slew rate control.

R1132 0_0402_5%~DR1132 0_0402_5%~D

1 2
1 2

R1133 0_0402_5%~DR1133 0_0402_5%~D

R1136 0_0402_5%~DR1136 0_0402_5%~D

1 2
1 2

R1137 0_0402_5%~DR1137 0_0402_5%~D

R1241 0_0402_5%~D@ R1241 0_0402_5%~D@

R780 0_0402_5%~D@R780 0_0402_5%~D@

1 2

R781 0_0402_5%~D@R781 0_0402_5%~D@

1 2

R782 0_0402_5%~D@R782 0_0402_5%~D@

1 2

R783 0_0402_5%~D@R783 0_0402_5%~D@

1 2

R784 0_0402_5%~D@R784 0_0402_5%~D@

1 2

R785 0_0402_5%~D@R785 0_0402_5%~D@

1 2

R22 0_0402_5%~D@R22 0_0402_5%~D@

1 2

R24 0_0402_5%~D@R24 0_0402_5%~D@

1 2

For ESD concern, please put near CPU

+1.05V_RUN_VTT

12

R25

R25
10K_0402_5%~D

10K_0402_5%~D

SIO_PWRBTN#_R15,17

100K_0402_5%~D

100K_0402_5%~D

12

12

+1.05V_RUN_VTT

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

Place near JXDP1

DDR_XDP_SMBDAT13,14,15,16,28

DDR_XDP_SMBCLK13,14,15,16,28

CLK_CPU_BCLK 19

CLK_CPU_BCLK# 19

CLK_CPU_DMI 16

CLK_CPU_DMI# 16

R1469 0_0402_5%~D@ R1469 0_0402_5%~D@

R529

R529

XDP_DBRESET# 15,17

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3XDP_OBS3_R

XDP_OBS5
XDP_OBS6
XDP_OBS7

1

@

@

C19

C19

2

H_CPUPWRGD

1 2

S

S

G

G

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

@

@

C20

C20

@R6

@

1K_0402_5%~D

1K_0402_5%~D

1 2
1 2

R68 0_0402_5%~D@R68 0_0402_5%~D@

1 2

R19 0_0402_5%~D@R19 0_0402_5%~D@

R1551 0_0402_5%~D@R1551 0_0402_5%~D@
R1552 0_0402_5%~D@R1552 0_0402_5%~D@

D

D

13

Q199

Q199

BSS138_SOT23~D

BSS138_SOT23~D

C1889

C1889

XDP_PREQ#
XDP_PRDY#

XDP_OBS0
XDP_OBS1

XDP_OBS2
XDP_OBS3

XDP_OBS4
XDP_OBS5

XDP_OBS6
XDP_OBS7

R6

H_CPUPWRGD_XDP
CFD_PWRBTN#_XDP

1 2
1 2

XDP_TCLK

DDR3_DRAMRST# 13,14

DDR_HVREF_RST_GATE 40

XDP_TDI_R XDP_TDI

XDP_TDO_M

XDP_TDI_M

XDP_TDO_R

+1.05V_RUN_VTT +1.05V_RUN_VTT

JXDP1

@JXDP1

@

@R1153

@

@R1154

@

12

R1157

@R1157

@

0_0402_5%~D

0_0402_5%~D

@R1155

@

@R1156

@

+1.05V_RUN_VTT

R1153
0_0402_5%~D

0_0402_5%~D

1 2

R1154
0_0402_5%~D

0_0402_5%~D

1 2

R1155
0_0402_5%~D

0_0402_5%~D

1 2

R1156
0_0402_5%~D

0_0402_5%~D

1 2

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/H OOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

SAMTE_BSH-030-01-L-D-A

1 2

R1285 56_0402_5%~DR1285 56_0402_5%~D

1 2

R1232 49.9_0402_1%~DR1232 49.9_0402_1%~D

1 2

R1233 68_0402_1%~DR1233 68_0402_1%~D

1 2

R1234 68_0402_1%~D@R1234 68_0402_1%~D@

H_THERMTRIP#

H_CATERR#

H_PROCHOT#

H_CPURST#_R

JTAG MAPPING

XDP_TDO

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

ITPCLK/HOOK4

ITPCLK#/HOOK 5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

Scan Chain

(Default)

CPU Only Stuff -> R1153,R1154

PCH Only Stuff -> R1155,R1156

GND1
OBSFN_C0
OBSFN_C1

GND3

GND5

GND7
OBSFN_D0
OBSFN_D1

GND9

GND11

GND13

GND15

TRST#

TMS

GND17

TD0

TDI

XDP_TRST#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TDO

XDP_DBRESET#

XDP_TCLK

@R66

@

CFG8
CFG9

CFG0
CFG1

CFG2
CFG3

CFG10
CFG11

CFG4
CFG5

CFG6
CFG7

CLK_CPU_ITP
CLK_CPU_ITP#

XDP_RST#_RPWRGD_XDP_R
XDP_DBRESET#

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

R64 51_0402_1%~D@ R64 51_0402_1%~D@

R65 51_0402_1%~D@ R65 51_0402_1%~D@

R1149 51_0402_1%~D@ R1149 51_0402_1%~D@

R3 51_0402_1%~D@R3 51_0402_1%~D@

R66
51_0402_1%~D

51_0402_1%~D

12

CFG8 10
CFG9 10

CFG0 10
CFG1 10

CFG2 10
CFG3 10

CFG10 10
CFG11 10

CFG4 10
CFG5 10

CFG6 10
CFG7 10

R7 1K_0402_5%~D@R7 1K_0402_5%~D@

R60

R60

1K_0402_5%~D

1K_0402_5%~D

12

12

12

12

R67

@R67

@

51_0402_1%~D

51_0402_1%~D

H_CPURST#H_PWRGD_XDP

12

+3.3V_RUN

12

+1.05V_RUN_VTT

12

Stuff -> R1153,R1156,R1157

No stuff -> R1154,R1155

No stuff -> R1154,R1155,R1157

No stuff -> R1153,R1154,R1157

A A

H_COMP0
H_COMP1
H_COMP2
H_COMP3

20_0402_1%~D

20_0402_1%~D

20_0402_1%~D

20_0402_1%~D

49.9_0402_1%~D

12

R1235

R1235

49.9_0402_1%~D

12

12

R1093

R1093

R1094

R1094

5

SM_RCOMP2
SM_RCOMP1
SM_RCOMP0

49.9_0402_1%~D

49.9_0402_1%~D

12

R1095

R1095

R1140

R1140

12

R1141

R1141

12

R1142

R1142

130_0402_1%~D

130_0402_1%~D

24.9_0402_1%~D

24.9_0402_1%~D

4

12

100_0402_1%~D

100_0402_1%~D

12

R1145

@R1145

@

12.4K_0402_1%~D

12.4K_0402_1%~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

PM_EXTTS# 23

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Arrandale (2/6)

Arrandale (2/6)

Arrandale (2/6)

LA-5472P

LA-5472P

LA-5472P

866Wednesday, January 20, 2010

866Wednesday, January 20, 2010

866Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

JCPUC

JCPUC

4

3

JCPUD

JCPUD

2

1

M_CLK_DDR0

AA6

D D

C C

B B

DDR_A_D[0..63]13

DDR_A_BS013
DDR_A_BS113
DDR_A_BS213

DDR_A_CAS#13
DDR_A_RAS#13
DDR_A_WE#13

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9 DDR_CS0_DIMMA#
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

AJ10

AL10

AK12

AK11

AM10

AR11

AL11

AT11
AP12

AM12

AN12

AM13

AT14
AT12

AL13
AR14
AP14

C10

D10

H10

G10

AH5
AF5
AK6
AK7
AF6
AG5

AK8

AN8

AM9
AN9

AC3
AB2

AE1
AB3
AE9

A10

B10

E10

F10

AJ7
AJ6

AJ9

AL7

AL8

J10

C7

A7

A8

D8

E6
F7
E9
B7
E7

C6

G8

K7

J8

G7

J7

L7
M6
M8

L9

L6

K8
N8

P9

U7

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_CLK_DDR#0
DDR_CKE0_DIMMA

M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA

DDR_CS1_DIMMA#

M_ODT0
M_ODT1

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

M_CLK_DDR0 13
M_CLK_DDR#0 13
DDR_CKE0_DIMMA 13

M_CLK_DDR1 13
M_CLK_DDR#1 13
DDR_CKE1_DIMMA 13

DDR_CS0_DIMMA# 13
DDR_CS1_DIMMA# 13

M_ODT0 13
M_ODT1 13

DDR_A_DM[0..7] 13

DDR_A_DQS#[0..7] 13

DDR_A_DQS[0..7] 13

DDR_A_MA[0..15] 13

DDR_B_D[0..63]14

DDR_B_BS014
DDR_B_BS114
DDR_B_BS214

DDR_B_CAS#14
DDR_B_RAS#14
DDR_B_WE#14

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9

DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_BS0

DDR_B_BS1
DDR_B_BS2

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

AM6
AN2

AM4
AM3

AN5

AN6
AN4
AN3

AN7

AR10
AT10

AF3
AG1

AK1
AG4
AG3

AH4
AK3
AK4

AK5
AK2

AP3

AT4

AT5
AT6

AP6
AP8
AT9
AT7
AP9

AB1

AC5

AC6

AJ3

AJ4

B5
A5

C3

B3
E4
A6

A4
C4
D1
D2

F2

F1
C2

F5

F3
G4
H6
G2

J6

J3
G1
G5

J2

J1

J5

K2

L3
M1

K5

K4
M4
N5

W5
R7

Y7

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_CK[0]

SB_CK#[0]

SB_CKE[0]

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

W8
W9
M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_CLK_DDR2
M_CLK_DDR#2
DDR_CKE2_DIMMB

M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB

DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

M_ODT2
M_ODT3

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

M_CLK_DDR2 14
M_CLK_DDR#2 14
DDR_CKE2_DIMMB 14

M_CLK_DDR3 14
M_CLK_DDR#3 14
DDR_CKE3_DIMMB 14

DDR_CS2_DIMMB# 14
DDR_CS3_DIMMB# 14

M_ODT2 14
M_ODT3 14

DDR_B_DM[0..7] 14

DDR_B_DQS#[0..7] 14

DDR_B_DQS[0..7] 14

DDR_B_MA[0..15] 14

REV1.0

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

A A

REV1.0

REV1.0

REV1.0

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Arrandale (3/6)

Arrandale (3/6)

Arrandale (3/6)

LA-5472P

LA-5472P

LA-5472P

966Wednesday, January 20, 2010

966Wednesday, January 20, 2010

966Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

AP25

AL25
AL24
AL22
AJ33

AG9

AM30
AM28
AP31

AL32

AL30
AM31
AN29
AM32
AK32
AK31
AK28

AJ28
AN30
AN32

AJ32

AJ29

AJ30
AK30

M27

H17
G25
G17
E31
E30

H16

B19
A19

A20
B20

AC9
AB9

A34
A33

C35
B35

L28
J17

U9

T9

C1

A3

J29
J28

D D

C C

B B

T184PAD~D@T184PAD~D@
T185PAD~D@T185PAD~D@

CFG08
CFG18
CFG28
CFG38
CFG48
CFG58
CFG68
CFG78
CFG88
CFG98
CFG108
CFG118

T18 PAD~D@T18 PAD~D@
T19 PAD~D@T19 PAD~D@
T20 PAD~D@T20 PAD~D@
T21 PAD~D@T21 PAD~D@
T22 PAD~D@T22 PAD~D@
T23 PAD~D@T23 PAD~D@
T24 PAD~D@T24 PAD~D@

12

12

R831

R830

@ R 831

@

@ R 830

@

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

DIMM0_VREF_R
DIMM1_VREF_R

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9

CFG10

CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

H_RSVD17

H_RSVD18

JCPUE

JCPUE

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RSVD15
RSVD16

RSVD17
RSVD18

RSVD19
RSVD20

RSVD21
RSVD22

RSVD_NCTF_23
RSVD_NCTF_24

RSVD26
RSVD27

RSVD_NCTF_28
RSVD_NCTF_29

RSVD_NCTF_30
RSVD_NCTF_31

4

RSVD_NCTF_37

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD_TP_59
RSVD_TP_60

RESERVED

RESERVED

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

REV1.0

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

REV1.0

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD38
RSVD39

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53

RSVD58

KEY
RSVD62
RSVD63
RSVD64
RSVD65

VSS

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2
D15
C15
AJ15
AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

T186PAD~D @T186PAD~D @
T187PAD~D @T187PAD~D @

T188PAD~D @T188PAD~D @

T189PAD~D @T189PAD~D @

T190PAD~D @T190PAD~D @

3

CFG0

2

12

R1107

@R1107

@

3.01K_0402_1%~D

3.01K_0402_1%~D

1

PCI-Express Configuration Select

1 : Single PEG

CFG0

0 : Bifurcation enable

CFG3

12

R1108

@R1108

@

3.01K_0402_1%~D

3.01K_0402_1%~D

PCI-Express Static Lane Reversal

1 : Normal Operation

CFG3

0 : Lane Number Reversed

15->0, 14->1 ...

CFG4

12

R1109

@R1109

@

3.3K_0402_1%~D

3.3K_0402_1%~D

Display Port Presence

1 : Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Arrandale (4/6)

Arrandale (4/6)

Arrandale (4/6)

LA-5472P

LA-5472P

LA-5472P

A00

A00

10 66Wednesday, January 20, 2010

10 66Wednesday, January 20, 2010

10 66Wednesday, January 20, 2010

1

A00

of

of

of

5

4

JCPUF

JCPUF

3

2

1

+VCC_CORE

14

+

+

C1872

C1872
1000U_1212_2V-Q~D

1000U_1212_2V-Q~D

D D

+VCC_CORE

1

+

C60

@+C60

@

470U_D2T_2VM~D

470U_D2T_2VM~D

2 3

1

C45

C45
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C51

C51
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

1

C57

C57
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

+

@+C61

@

470U_D2T_2VM~D

470U_D2T_2VM~D

2 3

1

C C

B B

A A

C44

C44
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C50

C50
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

1

C56

C56
10U_0805_4VAM~D

10U_0805_4VAM~D

2

+VCC_CORE

3 2

1

C46

C46
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C52

C52
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

C61

1

C47

C47
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C53

C53
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C48

C48
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

1

C54

C54
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C49

C49
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

1

C55

C55
10U_0805_4VAM~D

10U_0805_4VAM~D

2

+VCC_CORE

48A 18A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26

VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

1.1V RAIL POWER

1.1V RAIL POWER

CPU CORE SUPPLY

CPU CORE SUPPLY

PROC_DPRSLPVR

POWER

POWER

CPU VIDS

CPU VIDS

VSS_SENSE_VTT

SENSE LINES

SENSE LINES

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VTT_SELECT

ISENSE

VCC_SENSE

VSS_SENSE

VTT_SENSE

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

G15

AN35

AJ34
AJ35

B15
A15

H_PSI#

VID0
VID1
VID2
VID3
VID4
VID5
VID6
H_DPRSLPVR_R

IMVP_IMON

VCCSENSE
VSSSENSE

VTT_SENSE

1

C1196

C1196
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C1200

C1200
10U_0805_4VAM~D

10U_0805_4VAM~D

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C1087

C1087

2

1

2

H_PSI# 49

VID0 49
VID1 49
VID2 49
VID3 49
VID4 49
VID5 49
VID6 49

1 2

R1115 0_0402_5%~DR1115 0_0402_5%~D

IMVP_IMON 23,49

1

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C1085

C1085

2

+1.05V_RUN_VTT

1

C1083

C1083
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C1082

C1082

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

VTT_SENSE 48

C1204

C1204
10U_0805_4VAM~D

10U_0805_4VAM~D

1

C1103

C1103
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

H_DPRSLPVR 49

+VCC_CORE

12

R1116

R1116
100_0402_1%~D

100_0402_1%~D

12

R1236

R1236
100_0402_1%~D

100_0402_1%~D

1

C1197

C1197
10U_0805_4VAM~D

10U_0805_4VAM~D

2

VCCSENSE 49

VSSSENSE 49

1

C1198

C1198

10U_0805_4VAM~D

10U_0805_4VAM~D

2

Place R1116 and R1117 near CPU

Route VCCSENSE and VSSSENSE trace at

27.4 ohms, 7 mils spacing

+1.05V_RUN_VTT

1

C1199

C1199
10U_0805_4VAM~D

10U_0805_4VAM~D

2

VTT_SELECT = low, 1.1V

VTT_SELECT = high, 1.05V

REV1.0

3

REV1.0

2

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Arrandale (5/6)

Arrandale (5/6)

Arrandale (5/6)

LA-5472P

LA-5472P

LA-5472P

11 66Wednesday, January 20, 2010

11 66Wednesday, January 20, 2010

11 66Wednesday, January 20, 2010

1

of

of

of

A00

A00

A00

5

22A

D D

C C

B B

R1500

R1500

RUN_ON34,39,42,47,52

A A

CPU1.5V_S3_GATE40

1 2

0_0402_5%~D@

0_0402_5%~D@

R1501

R1501

1 2

0_0402_5%~D

0_0402_5%~D

+1.05V_RUN_VTT

+1.05V_RUN_VTT

12

61

2

R1499

R1499
100K_0402_5%~D

100K_0402_5%~D

RUN_ON_CPU1.5VS3#

Q201A

Q201A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

AT21
AT19
AT18

AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16

AL21

AL19

AL18

AL16
AK21
AK19
AK18
AK16

AJ21

AJ19

AJ18

AJ16
AH21
AH19
AH18
AH16

4

JCPUG

JCPUG

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

GRAPHICS

GRAPHICS

FDI PEG & DMI

FDI PEG & DMI

POWER

POWER

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VR_EN

GFX_DPRSLPVR

GRAPHICS VIDs

GRAPHICS VIDs

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

1.1V1.8V

1.1V1.8V

REV1.0

REV1.0

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_IMON

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

3A

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

600mA

L26
L27
M26

+1.5V_CPU_VDDQ Source

+15V_ALW+3.3V_ALW2

12

R1497

R1497
100K_0402_5%~D

100K_0402_5%~D

RUN_ON_CPU1.5VS3

3

Q201B

Q201B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

RUN_ON_CPU1.5VS3# 42

+1.5V_MEM +1.5V_CPU_VDDQ

Q200

Q200

AO4728L 1N_SOIC-8~D

AO4728L 1N_SOIC-8~D

8
7
6
5

4

1

C1878

C1878
4700P_0402_25V7K~D

4700P_0402_25V7K~D

2

1
2
3

1

2

C1875

C1875

10U_0805_10V4Z~D

10U_0805_10V4Z~D

R1465

R1465
1K_0402_5%~D

1K_0402_5%~D

1 2

12

R1498

R1498

@

@

3

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1096

C1096

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C1101

C1101

1

2

10U_0805_4VAM~D

10U_0805_4VAM~D

C1107

C1107

1

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C1111

C1111

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1115

C1115

2

20K_0402_5%~D

20K_0402_5%~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

C1098

C1098

C1097

C1097

2

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C1102

C1102

1

2

10U_0805_4VAM~D

10U_0805_4VAM~D

C1108

C1108

1

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C1112

C1112

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1

1

C1116

C1116

C67

C67

2

2

+1.5V_CPU_VDDQ +1.5V_MEM

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

C1099

C1099

2

2

+1.05V_RUN_VTT

+1.05V_RUN_VTT

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

1

C65

C65

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1100

C1100

+1.8V_RUN

C1117

C1117

C1881 0.1U_0402_10V7K~DC1881 0.1U_0402_10V7K~D

C1882 0.1U_0402_10V7K~DC1882 0.1U_0402_10V7K~D

C1883 0.1U_0402_10V7K~DC1883 0.1U_0402_10V7K~D

C1884 0.1U_0402_10V7K~DC1884 0.1U_0402_10V7K~D

+1.5V_CPU_VDDQ

1

+

+

C1165

C1165
330U_D2_2VM_R6M~D

330U_D2_2VM_R6M~D

2

12

12

12

12

PJP906

@PJP906

@

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PJP907

@PJP907

@

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

2

JCPUH

JCPUH

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31
AL23
AL20
AL17
AL12

AK29
AK27
AK25
AK20
AK17

AJ31
AJ23
AJ20
AJ17
AJ14
AJ11

AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13

AH9
AH6
AH3

AG10

AF8
AF4
AF2

AE35

VSS38
VSS39
VSS40
VSS41
VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS

TYCO_CALPELLA_AUBURNDALE

TYCO_CALPELLA_AUBURNDALE

1

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

REV1.0

REV1.0

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Arrandale (6/6)

Arrandale (6/6)

Arrandale (6/6)

LA-5472P

LA-5472P

LA-5472P

A00

A00

12 66Wednesday, January 20, 2010

12 66Wednesday, January 20, 2010

12 66Wednesday, January 20, 2010

1

A00

of

of

of

5

DDR_A_DQS#[0..7]9

DDR_A_D[0..63]9

DDR_A_DM[0..7]9

DDR_A_DQS[0..7]9

DDR_A_MA[0..15]9

D D

Layout Note:
Place near JDIMMA

+1.5V_MEM

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C C

B B

A A

+1.5V_MEM

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

+0.75V_DDR_VTT

C1122

C1122

C1121

C1121

1

1

2

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1126

C1126

C1127

C1127

1

1

2

2

Layout Note:
Place near JDIMMA.203,204

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

C1134

C1134

2

2

C1135

C1135

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C1123

C1123

C1124

C1124

1

1

2

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

2

C1136

C1136

C1129

C1129

10U_0603_6.3V6M~D

C1130

C1130

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1137

C1137

2

330U_SX_2VY~D

330U_SX_2VY~D

1

C1125

C1125

C1131

C1131

1

+

+

2

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

C1138

C1138

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1128

C1128

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

4

+V_DDR_REF

Populate R87 for Intel DDR3
VREFDQ multiple methods M1

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

+3.3V_RUN

R87

R87
0_0402_5%~D

0_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1

2

DDR_CKE0_DIMMA9

DDR_CS1_DIMMA#9

C1119

C1119

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

3

JDIMMA

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DDR_A_BS29

M_CLK_DDR09

DDR_A_BS09

DDR_A_WE#9

DDR_A_CAS#9

C1141

C1141

1

2

DIMM0_VREF

DDR_A_D0
DDR_A_D1

1

DDR_A_DM0

C1120

C1120

DDR_A_D2

2

DDR_A_D3

DDR_A_D8
DDR_A_D9 DDR_A_D13

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_BS2

DDR_A_MA3

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10
DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

1 2

R1182 10K_0402_5%~DR1182 10K_0402_5%~D

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1 2

R1183 10K_0402_5%~DR1183 10K_0402_5%~D

C1142

C1142

1

+0.75V_DDR_VTT

2

JDIMMA

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F

VSS
DQ4
DQ5
VSS

DQS0#

DQS0

VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

RESET#

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

VDD

VDD

VDD

VDD

CK1

CK1#

VDD

BA1
RAS#

VDD

ODT0

VDD
ODT1

VDD

VREF_CA

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

EVENT#

SDA

SCL

VTT

GND2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108
110
112
114

S0#

116
118
120
122

NC

124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

+1.5V_MEM+1.5V_MEM

2

DDR_A_D4
DDR_A_D5

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D6
DDR_A_D7

DDR_A_D12

DDR_A_DM1
DDR3_DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20DDR_A_D16
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_A_MA15
DDR_A_MA14

DDR_A_MA11DDR_A_MA12
DDR_A_MA7DDR_A_MA9

DDR_A_MA6DDR_A_MA8
DDR_A_MA4DDR_A_MA5

DDR_A_MA2
DDR_A_MA0DDR_A_MA1

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA#
M_ODT0

M_ODT1

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

DDR_XDP_SMBDAT
DDR_XDP_SMBCLK

+0.75V_DDR_VTT

DDR3_DRAMRST#

DDR3_DRAMRST# 8,14

DDR_CKE1_DIMMA 9

M_CLK_DDR1 9

M_CLK_DDR#1 9M_CLK_DDR#09

DDR_A_BS1 9

DDR_A_RAS# 9

DDR_CS0_DIMMA# 9

M_ODT0 9

M_ODT1 9

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1

2

DDR_XDP_SMBDAT 8,14,15,16,28

DDR_XDP_SMBCLK 8,14,15,16,28

C1132

C1132

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1K_0402_5%~D

1K_0402_5%~D

1

C1133

C1133

2

R1509

R1509

12

+V_DDR_REF

1

+1.5V_MEM

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

LA-5472P

LA-5472P

LA-5472P

13 66Wednesday, January 20, 2010

13 66Wednesday, January 20, 2010

13 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

DDR_B_DQS#[0..7]9

DDR_B_D[0..63]9

DDR_B_DM[0..7]9

D D

C C

B B

A A

DDR_B_DQS[0..7]9

DDR_B_MA[0..15]9

+1.5V_MEM

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1158

C1158

0.1U_0402_16V4Z~D

C1146

C1146

1

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1151

C1151

1

1

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1159

C1159

2

C1145

C1145

1

2

+1.5V_MEM

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1150

C1150

1

2

Layout Note:
Place near JDIMMB.203,204

+0.75V_DDR_VTT

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

Layout Note:
Place near JDIMMB

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C1148

C1148

C1147

C1147

1

1

2

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1152

C1152

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

1

2

C1160

C1160

C1153

C1153

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1154

C1154

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1161

C1161

2

C1155

C1155

1

2

Populate R88 for Intel DDR3
VREFDQ multiple methods M1

330U_SX_2VY~D

330U_SX_2VY~D

1

C1149

C1149

+

+

2

4

+V_DDR_REF

Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket

+3.3V_RUN

12

R1184

R1184

10K_0402_5%~D

10K_0402_5%~D

1 2

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

+3.3V_RUN

R88

R88
0_0402_5%~D

0_0402_5%~D

1

C1143

C1143

2

12

10K_0402_5%~D

10K_0402_5%~D

R1185

R1185

3

+1.5V_MEM

1

2

C1162

C1162

C1144

C1144

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

DIMM1_VREF

DDR_B_D0
DDR_B_D1

DDR_B_DM0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

+0.75V_DDR_VTT

C1163

C1163

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DDR_CKE2_DIMMB9

DDR_B_BS29

M_CLK_DDR29
M_CLK_DDR#29

DDR_B_BS09

DDR_B_WE#9

DDR_B_CAS#9

DDR_CS3_DIMMB#9

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

JDIMMB

JDIMMB

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

FOX_AS0A626-U8SN-7F

FOX_AS0A626-U8SN-7F

VSS

DQ4

DQ5

VSS

DQS0#

DQS0

VSS

DQ6

DQ7

VSS
DQ12
DQ13

VSS

DM1

RESET#

VSS
DQ14
DQ15

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

CKE1

VDD

VDD

VDD

VDD

VDD

CK1

CK1#

VDD

BA1
RAS#

VDD

ODT0

VDD
ODT1

VDD

VREF_CA

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

EVENT#

SDA

SCL

VTT

GND2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78

A15

80

A14

82
84

A11

86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108
110
112
114

S0#

116
118
120
122

NC

124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

+1.5V_MEM

2

DDR_B_D4
DDR_B_D5

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1
DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB#
M_ODT2

M_ODT3

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6DDR_B_DQS#6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

DDR_XDP_SMBDAT
DDR_XDP_SMBCLK

+0.75V_DDR_VTT

DDR3_DRAMRST# 8,13

DDR_CKE3_DIMMB 9

M_CLK_DDR3 9

M_CLK_DDR#3 9

DDR_B_BS1 9

DDR_B_RAS# 9

DDR_CS2_DIMMB# 9

M_ODT2 9

M_ODT3 9

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1

C1156

C1156

2

DDR_XDP_SMBDAT 8,13,15,16,28

DDR_XDP_SMBCLK 8,13,15,16,28

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

+V_DDR_REF

C1157

C1157

1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

LA-5472P

LA-5472P

LA-5472P

14 66Wednesday, January 20, 2010

14 66Wednesday, January 20, 2010

14 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

CMOS_CLR1

Shunt

Open

ME_CLR1

Shunt

Open

D D

+RTC_CELL

12

R217

R217
330K_0402_1%~D

330K_0402_1%~D

INTVRMEN- Integrated SUS

1.1V VRM Enable
High - Enable Internal VRs

C C

PCH_AZ_CODEC_SDOUT29

PCH_AZ_CODEC_SYNC29

PCH_AZ_CODEC_RST#29

PCH_AZ_CODEC_BITCLK29

B B

SPI_WP#_SEL

SPI_WP#_SEL 39

A A

SPI_WP#_SEL PCH_SPI_CLK

CMOS setting

Clear CMOS

Keep CMOS

TPM setting

Clear ME RTC Registers

Keep ME RTC Registers

PCH_INTVRMEN

1

1

@

@

ME1 SHORT PADS~D

ME1 SHORT PADS~D

1 2

C298 1U_0402_6.3V6K~DC298 1U_0402_6.3V6K~D

27P_0402_50V8J~D

27P_0402_50V8J~D

C302

@C302

@

2

2

1

2

+3.3V_M

For iAMT

PCH_SPI_CS0#

PCH_SPI_DIN

1 2

R1246 0_0402_5%~D@R1246 0_0402_5%~D@

+3.3V_M

R1237

R1237

3.3K_0402_5%~D

3.3K_0402_5%~D

PCH_SPI_CS1#

PCH_SPI_DIN

1 2

R1060 0_0402_5%~D@ R1060 0_0402_5%~D@

5

+3.3V_RUN

12

R62

@R62

@

10K_0402_5%~D

10K_0402_5%~D

PCH_AZ_SYNC

12

R120

@R120

@

100K_0402_5%~D

100K_0402_5%~D

On Die PLL VR is supplied by

1.5V when sampled high, 1.8 V
when sampled low

+RTC_CELL

1 2

R234 33_0402_5%~DR234 33_0402_5%~D

1 2

R235 33_0402_5%~DR235 33_0402_5%~D

1 2

R239 33_0402_5%~DR239 33_0402_5%~D

1 2

R241 33_0402_5%~DR241 33_0402_5%~D

1 2

R224 20K_0402_1%~DR224 20K_0402_1%~D

1 2

R225 20K_0402_5%~DR225 20K_0402_5%~D

1 2

R226 1M_0402_5%~DR226 1M_0402_5%~D

1

1

@

@

CMOS1 SHORT PADS~D

CMOS1 SHORT PADS~D

C299 1U_0402_6.3V6K~DC299 1U_0402_6.3V6K~D

CMOS place near DIMM

+3.3V_RUN

PCH_AZ_SDOUT

PCH_AZ_SYNC

PCH_AZ_RST#

PCH_AZ_BITCLK

200 MIL SO8

64Mb Flash ROM

12

R298

R298

3.3K_0402_5%~D

3.3K_0402_5%~D

U12

U12

1

2

3

12

200 MIL SO8

32Mb Flash ROM

1

2

3

W25Q64BVSSIG_SO8~D

W25Q64BVSSIG_SO8~D

U13

U13

W25Q32BVSSIG_SO8~D

W25Q32BVSSIG_SO8~D

VCC

/CS

DO

/HOLD

CLK

/WP

GND4DIO

VCC

/CS

DO

/HOLD

CLK

/WP

GND4DIO

2

2

1 2

ME_FWP

1 2

R1558 10K_0402_5%~DR1558 10K_0402_5%~D

PCH_AZ_MDC_SDOUT37

+3.3V_ALW_PCH

12

R123

R123
0_0603_5%~D

0_0603_5%~D

C328

C328

1 2

12

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

R299

R299

3.3K_0402_5%~D

3.3K_0402_5%~D

8

7

PCH_SPI_CLK

6

PCH_SPI_DO

5

C1205

C1205

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

12

R1238

R1238

3.3K_0402_5%~D

8

7

6

5

3.3K_0402_5%~D

PCH_SPI_DO

4

USB_OC0#_R18
USB_OC1#_R18
USB_OC2#18
USB_OC3#18
USB_OC4#18
USB_OC5#18
USB_OC6#18

USB_OC7#18
PCMCLK_REQ#16,34
LANCLK_REQ#16,30

CONTACTLESS_DET#19,31

EN_ESATA_RPTR#19,37
TEMP_ALERT#19,39

TOUCH_SCREEN_DET#19

SIO_EXT_SCI#_R19

12P_0402_50V8J~D

12P_0402_50V8J~D

32.768K_12.5PF_Q13MC30610018~D

32.768K_12.5PF_Q13MC30610018~D

PCH_AZ_MDC_BITCLK37

PCH_AZ_MDC_SYNC37

PCH_AZ_MDC_RST#37

PCH_AZ_CODEC_SDIN029

PCH_AZ_MDC_SDIN137

ME_FWP39

R804 51_0402_5%~DR804 51_0402_5%~D

R807 200_0402_5%~DR807 200_0402_5%~D

R805 200_0402_5%~DR805 200_0402_5%~D

R806 200_0402_5%~DR806 200_0402_5%~D

PCH Pin

4

USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
PCMCLK_REQ#
LANCLK_REQ#
HDD_DET#_R
GPIO19

CONTACTLESS_DET#

GPIO37

GPIO3719

EN_ESATA_RPTR#
TEMP_ALERT#

TOUCH_SCREEN_DET#

SIO_EXT_SCI#_R

C296

C296

12

C297

C297

12

12P_0402_50V8J~D

12P_0402_50V8J~D

C300

@C300

@

27P_0402_50V8J~D

27P_0402_50V8J~D

SPKR29

12

12

12

12

Ref.

R806

TDO

R1315

R807

TMS

R1281

TDI

R1282

TCK

R804

R808

TRST#

R1316

12

R78 33_0402_5%~D@ R78 33_0402_5%~D@

1 2

R91 33_0402_5%~D@ R91 33_0402_5%~D@

1 2

R101 33_0402_5%~D@R101 33_0402_5%~D@

1 2

R102 33_0402_5%~D@R102 33_0402_5%~D@

1 2

R103 33_0402_5%~D@R103 33_0402_5%~D@

1 2

R104 33_0402_5%~D@R104 33_0402_5%~D@

1 2

R105 33_0402_5%~D@R105 33_0402_5%~D@

1 2

R106 33_0402_5%~D@R106 33_0402_5%~D@

1 2

R107 33_0402_5%~D@R107 33_0402_5%~D@

1 2

R108 33_0402_5%~D@R108 33_0402_5%~D@

1 2

R109 33_0402_5%~D@R109 33_0402_5%~D@

1 2

R110 33_0402_5%~D@R110 33_0402_5%~D@

1 2

R111 33_0402_5%~D@R111 33_0402_5%~D@

1 2

R112 33_0402_5%~D@R112 33_0402_5%~D@

1 2

R113 33_0402_5%~D@R113 33_0402_5%~D@

1 2

R114 33_0402_5%~D@R114 33_0402_5%~D@

1 2

R115 33_0402_5%~D@R115 33_0402_5%~D@

1 2

R116 33_0402_5%~D@R116 33_0402_5%~D@

1 2

12

R222

Y1

Y1

R1281

R1281

1 4

12

R1282

R1282

100_0402_5%~D

100_0402_5%~D

NCNC

NCNC

2 3

R223

R223

0_0402_5%~D

0_0402_5%~D

1 2

1 2

1 2

R238 33_0402_5%~DR238 33_0402_5%~D

1 2

R240 33_0402_5%~DR240 33_0402_5%~D

1 2

R242 33_0402_5%~DR242 33_0402_5%~D

USB_MCARD3_DET#36

12

R1315

R1315

100_0402_5%~D

100_0402_5%~D

100_0402_5%~D

100_0402_5%~D

PCH_SPI_DIN

R222
10M_0402_5%~D

10M_0402_5%~D

R236

R236
33_0402_5%~D

33_0402_5%~D

12

T174 PAD~DT174 P AD~D

1 2

R1247 33_0402_5%~DR1247 33_0402_5%~D

PCH JTAG Enable

ES1

No Stuff

No Stuff

200 ohm

100 ohm

200 ohm

ES2

200 ohm

100 ohm

200 ohm

100 ohm

200 ohm

100 ohm 100 ohm

4.7K ohm

20K ohm

10K ohm No Stuff

4.7K ohm 4.7K ohm 4.7K ohm

No Stuff

No Stuff

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

SRTCRST#

INTRUDER#

PCH_INTVRMEN

PCH_AZ_BITCLK

PCH_AZ_SYNC

PCH_AZ_RST#

PCH_AZ_CODEC_SDIN0

PCH_AZ_MDC_SDIN1

PCH_AZ_SDOUT

ME_FWP

USB_MCARD3_DET#

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_RST#

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_DO

PCH_SPI_DIN_R

PCH JTAG Disable

ES1

No Stuff

No Stuff

No Stuff

20K ohm

10K ohm

No Stuff

3

XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17

B13
D13

C14

D17

A16

A14

A30

D29

C30

G30

F30

E32

F32

B29

H32

BA2

AV3

AY3

AY1

AV1

No Stuff

No Stuff

No Stuff

No StuffNo Stuff

No StuffR805

No Stuff

No Stuff

No Stuff

3

P1

J30

M3

K3

K1

J2

J4

ES2

RESET_OUT#17,40

SIO_PWRBTN#_R8,17

DDR_XDP_SMBDAT8,13,14,16,28
DDR_XDP_SMBCLK8,13,14,16,28

U73A

U73A

REV1.0

REV1.0

RTCX1
RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK _EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

TRST#

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

Production

All

200 ohm

100 ohm

200 ohm

100 ohm

200 ohm

100 ohm

51 ohm

No Stuff

No Stuff

+3.3V_ALW_PCH

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

@

@

C1375

C1375

2

1 2

R69 0_0402_5%~D@R69 0_0402_5%~D@

@

@

R1553 0_0402_5%~D

R1553 0_0402_5%~D

1 2

R1554 0_0402_5%~D

R1554 0_0402_5%~D

@

@

1 2

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

LPC

LPC

RTCIHDA

RTCIHDA

SPI JTAG

SPI JTAG

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

SATA0RXN
SATA0RXP
SATA0TXN

SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN

SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN

SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN

SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

SERIRQ

+3.3V_ALW_PCH

XDP_FN0
XDP_FN1

XDP_FN2
XDP_FN3

XDP_FN4
XDP_FN5

XDP_FN6
XDP_FN7

RESET_OUT#

PCH_PWRBTN#_XDP

LPC_LAD0

D33

LPC_LAD1

B33

LPC_LAD2

C32

LPC_LAD3

A32

LPC_LFRAME#

C34

LPC_LDRQ0#

A34

LPC_LDRQ1#

F34

IRQ_SERIRQ

AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16

AF15

SATA_ACT#_R

T3

HDD_DET#_R

Y9

GPIO19

V1

2

SATA_COMP

2

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

JXDP2

@JXDP2

@

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/H OOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16

SAMTE_BSH-030-01-L-D-A

SAMTE_BSH-030-01-L-D-A

LPC_LAD0 31,32,39,40
LPC_LAD1 31,32,39,40
LPC_LAD2 31,32,39,40
LPC_LAD3 31,32,39,40

LPC_LFRAME# 31,32,39,40

LPC_LDRQ0# 39
LPC_LDRQ1# 39

IRQ_SERIRQ 31,32,39,40

PSATA_PRX_DTX_N0_C 28
PSATA_PRX_DTX_P0_C 28

PSATA_PTX_DRX_N0_C 28

PSATA_PTX_DRX_P0_C 28

SATA_ODD_PRX_DTX_N1_C 28
SATA_ODD_PRX_DTX_P1_C 28

SATA_ODD_PTX_DRX_N1_C 28

SATA_ODD_PTX_DRX_P1_C 28

ESATA_PRX_DTX_N4_C 37
ESATA_PRX_DTX_P4_C 37

ESATA_PTX_DRX_N4_C 37

ESATA_PTX_DRX_P4_C 37

SATA_PRX_DKTX_N5_C 38
SATA_PRX_DKTX_P5_C 38

SATA_PTX_DKRX_N5_C 38

SATA_PTX_DKRX_P5_C 38

+1.05V_RUN

1 2

R1201 37.4_0402_1%~DR1201 37.4_0402_1%~D

SATA_ACT#_R 43

1 2

R131 0_0402_5%~DR131 0_0402_5%~D

R58 10K_0402_5%~DR58 10K_0402_5%~D

1

2

GND1
OBSFN_C0
OBSFN_C1

GND3

OBSDATA_C0
OBSDATA_C1

GND5

OBSDATA_C2
OBSDATA_C3

GND7
OBSFN_D0
OBSFN_D1

GND9

OBSDATA_D0
OBSDATA_D1

GND11
OBSDATA_D2
OBSDATA_D3

GND13

ITPCLK/HOOK4

ITPCLK#/HOOK 5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

GND15

TRST#

TMS

GND17

PLTRST1#_XDP

TD0

TDI

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

XDP_FN16
XDP_FN17

XDP_FN8
XDP_FN9

XDP_FN10
XDP_FN11

XDP_FN12
XDP_FN13

XDP_FN14
XDP_FN15

PLTRST1#_XDP
XDP_DBRESET#

PCH_JTAG_TDO

PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK

R118

@R118

@

1K_0402_5%~D

1K_0402_5%~D

1 2

IRQ_SERIRQ

+3.3V_ALW_PCH

XDP_DBRESET# 8,17

1 2

R117 0_0402_5%~D@R117 0_0402_5%~D@

PLTRST_XDP# 18

R265

R265
10K_0402_5%~D

10K_0402_5%~D

12

PCH_JTAG_RST#PCH_JTAG_RST#_R

+3.3V_RUN

HDD

ODD

E-SATA

DOCKED

+3.3V_RUN

12

R382

R382
43K_0402_5%~D

43K_0402_5%~D

R264

HDD_DET# 28

+3.3V_RUN

12

12

+3.3V_RUN

@R264

@

1K_0402_5%~D

1K_0402_5%~D

SPKR

No Reboot Strap

Low = Default

SPKR

High = No Reboot

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCH (1/8)

PCH (1/8)

PCH (1/8)

LA-5472P

LA-5472P

LA-5472P

15 66Wednesday, January 20, 2010

15 66Wednesday, January 20, 2010

15 66Wednesday, January 20, 2010

1

of

of

of

A00

A00

A00

5

D D

PCIE_PRX_WANTX_N136

PCMCIA--->

PCIE_PRX_WANTX_P136
PCIE_PTX_WANRX_N1_C36
PCIE_PTX_WANRX_P1_C36

PCIE_PRX_WLANTX_N236

PCIE_PRX_WLANTX_P236
PCIE_PTX_WLANRX_N2_C36
PCIE_PTX_WLANRX_P2_C36

PCIE_PRX_PCMTX_N333

PCIE_PRX_PCMTX_P333
PCIE_PTX_PCMRX_N3_C33
PCIE_PTX_PCMRX_P3_C33

PCIE_PRX_EXPTX_N434

PCIE_PRX_EXPTX_P434
PCIE_PTX_EXPRX_N4_C34
PCIE_PTX_EXPRX_P4_C34

PCIE_PRX_WPANTX_N536

PCIE_PRX_WPANTX_P536

PCIE_PTX_WPANRX_N5_C36
PCIE_PTX_WPANRX_P5_C36

PCIE_PRX_GLANTX_N630

PCIE_PRX_GLANTX_P630
PCIE_PTX_GLANRX_N6_C30
PCIE_PTX_GLANRX_P6_C30

LANCLK_REQ#15,30

CLK_PCIE_PCM#33

CLK_PCIE_PCM33

PCMCLK_REQ#15,34

CLK_PCIE_ MINI3#36

CLK_PCIE_ MINI336

MiniWWAN (Mini Card 1)--->

MiniWLAN (Mini Card 2)--->

PCMCIA--->

Express card--->

MiniPCIE/SATA

C C

(Mini Card 3)--->

10/100/1G LAN --->

10/100/1G LAN --->

B B

MiniWPAN (Mini Card 3)--->

Express card--->

CLK_PCIE_ MINI2#36

MiniWLAN (Mini Card 2)--->

MiniWWAN (Mini Card 1)--->

CLK_PCIE_ MINI236

+3.3V_ALW_PCH

CLK_PCIE_ MINI1#36
CLK_PCIE_ MINI136

+3.3V_ALW_PCH

C317 0.1U_0402_10V7K~DC317 0.1U_0402_10V7K~D
C319 0.1U_0402_10V7K~DC319 0.1U_0402_10V7K~D

C320 0.1U_0402_10V7K~DC320 0.1U_0402_10V7K~D
C321 0.1U_0402_10V7K~DC321 0.1U_0402_10V7K~D

C1373 0.1U_0402_10V7K~DC1373 0.1U_0402_10V7K~D
C1374 0.1U_0402_10V7K~DC1374 0.1U_0402_10V7K~D

C1008 0.1U_0402_10V7K~DC1008 0.1U_0402_10V7K~D
C1009 0.1U_0402_10V7K~DC1009 0.1U_0402_10V7K~D

C1025 0.1U_0402_10V7K~DC1025 0.1U_0402_10V7K~D
C1024 0.1U_0402_10V7K~DC1024 0.1U_0402_10V7K~D

C326 0.1U_0402_10V7K~DC326 0.1U_0402_10V7K~D
C327 0.1U_0402_10V7K~DC327 0.1U_0402_10V7K~D

+3.3V_ALW_PCH

CLK_PCIE_LAN#30
CLK_PCIE_LAN30

+3.3V_RUN

+3.3V_ALW_PCH

MINI3CLK_REQ#36

CLK_PCIE_EXP#34

CLK_PCIE_EXP34

+3.3V_ALW_PCH

EXPCLK_REQ#34

MINI2CLK_REQ#36

MINI1CLK_REQ#36

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

R1293 0_0402_5%~DR1293 0_0402_5%~D
R1294 0_0402_5%~DR1294 0_0402_5%~D
R876 10K_0402_5%~DR876 10K_0402_5%~D

R1297 0_0402_5%~DR1297 0_0402_5%~D
R1302 0_0402_5%~DR1302 0_0402_5%~D
R61 10K_0402_5%~DR61 10K_0402_5%~D

R1205 0_0402_5%~DR1205 0_0402_5%~D
R1206 0_0402_5%~DR1206 0_0402_5%~D
R523 10K_0402_5%~DR523 10K_0402_5%~D

R1203 0_0402_5%~DR1203 0_0402_5%~D
R1196 0_0402_5%~DR1196 0_0402_5%~D
R45 10K_0402_5%~DR45 10K_0402_5%~D

R1195 0_0402_5%~DR1195 0_0402_5%~D
R1202 0_0402_5%~DR1202 0_0402_5%~D
R40 10K_0402_5%~DR40 10K_0402_5%~D

4

1 2

R122 10K_0402_5%~D R122 10K_0402_5%~D

1 2

R1198 0_0402_5%~DR1198 0_0402_5%~D

1 2

R1199 0_0402_5%~DR1199 0_0402_5%~D

12
12

1 2

12
12
12

12
12
12

12
12
12

12
12
12

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2

PCIE_PRX_PCMTX_N3
PCIE_PRX_PCMTX_P3
PCIE_PTX_PCMRX_N3
PCIE_PTX_PCMRX_P3

PCIE_PRX_EXPTX_N4
PCIE_PRX_EXPTX_P4
PCIE_PTX_EXPRX_N4
PCIE_PTX_EXPRX_P4

PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
PCIE_PTX_WPANRX_N5
PCIE_PTX_WPANRX_P5

PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6
PCIE_PTX_GLANRX_P6

PCIECLKREQ0#

PCIE_LAN#
PCIE_LAN

LANCLK_REQ#

PCIE_PCM#
PCIE_PCM

PCMCLK_REQ#

PCIE_MINI3 #
PCIE_MINI3

MINI3CLK_REQ#

PCIE_EXP#
PCIE_EXP

EXPCLK_REQ#

PCIE_MINI2 #
PCIE_MINI2

MINI2CLK_REQ#

PCIE_MINI1 #
PCIE_MINI1

MINI1CLK_REQ#

U73B

U73B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKR Q0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKR Q1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKR Q2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKR Q3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKR Q4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKR Q5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

REV1.0

REV1.0

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

SMBus

PCI-E*

PCI-E*

Link

Link

Controller

Controller

PEG_A_CLKRQ# / GPIO47

PEG

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

Clock Flex

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GP IO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

B9

H14

C8

J14

C6

G8

M14

E10

G12

T13

T11

T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

SIO_14M

PCI_TCM

PCI_TPM

JETWAY_14M

MEM_SMBCLK

MEM_SMBDATA

PCH_SMB_ALERT#

MEM_SMBCLK

MEM_SMBDATA

LAN_SMBCLK

LAN_SMBDATA

SML1_SMBCLK

SML1_SMBDATA

PCH_CL_CLK1

PCH_CL_DATA1

PCH_CL_RST1#

PEG_A_CLKRQ#

CLK_PCIE_VGA#
CLK_PCIE_VGA

CLK_CPU_DMI#
CLK_CPU_DMI

CLK_BUF_DMI#
CLK_BUF_DMI

CLK_BUF_BCLK#
CLK_BUF_BCLK

CLK_BUF_DOT96#
CLK_BUF_DOT96

CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD

CLK_PCH_14M

CLK_PCI_LOOPBACK

XTAL25_IN
XTAL25_OUT

1 2

R1303 0_0402_5%~DR1303 0_0402_5%~D

1 2

R686 90.9_0402_1%~DR686 90.9_0402_1%~D

R1223 22_0402_5%~DR1223 22_0402_5%~D

R1220 22_0402_5%~D3@ R1220 22_0402_5%~D3@

R1219 22_0402_5%~DR1219 22_0402_5%~D

R910 22_0402_5%~D@R910 22_0402_5%~D@

Place R910 close to PCH

2

3

Q190B

@Q190B

@

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

1 2

R51 0_0402_5%~DR51 0_0402_5%~D

1 2

R54 0_0402_5%~DR54 0_0402_5%~D

LAN_SMBCLK 30

LAN_SMBDATA 30

SML1_SMBCLK 40

SML1_SMBDATA 40

PCH_CL_CLK1 36

PCH_CL_DATA1 36

PCH_CL_RST1# 36

CLK_REQ# 53

CLK_PCIE_VGA# 53
CLK_PCIE_VGA 53

CLK_CPU_DMI# 8
CLK_CPU_DMI 8

CLK_BUF_DMI# 6
CLK_BUF_DMI 6

CLK_BUF_BCLK# 6
CLK_BUF_BCLK 6

CLK_BUF_DOT96# 6
CLK_BUF_DOT96 6

CLK_BUF_CKSSCD# 6
CLK_BUF_CKSSCD 6

CLK_PCH_14M 6

CLK_PCI_LOOPBACK 18

12

12

12

JETWAY_CLK14M

12

+3.3V_RUN

2

6 1

Q190A

@Q190A

@

5

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

+1.05V_RUN

CLK_SIO_14M 39

CLK_PCI_TPM_CHA 32

CLK_PCI_TPM 31

JETWAY_CLK14M 32

DDR_XDP_SMBCLK

DDR_XDP_SMBDAT

SML1_SMBCLK

SML1_SMBDATA

MEM_SMBCLK

MEM_SMBDATA

PCH_SMB_ALERT#

LAN_SMBCLK

LAN_SMBDATA

PEG_A_CLKRQ#

R379

R379

0_0402_5%~D

0_0402_5%~D

12

R685

@R685

@

1M_0402_5%~D

1M_0402_5%~D

25MHZ_18PF_1Y725000CE1A~D

25MHZ_18PF_1Y725000CE1A~D

@

@

12P_0402_50V8J~D

12P_0402_50V8J~D

1

DDR_XDP_SMBCLK 8,13,14,15,28

DDR_XDP_SMBDAT 8,13,14,15,28

1 2

R1178 2.2K_0402_5%~DR1178 2.2K_0402_5%~D

1 2

R1179 2.2K_0402_5%~DR1179 2.2K_0402_5%~D

12

R252 2.2K_0402_5%~D@R252 2.2K_0402_5%~D@

12

R255 2.2K_0402_5%~D@R255 2.2K_0402_5%~D@

12

R1175 10K_0402_5%~DR1175 10K_0402_5%~D

R1

@R1

@

10K_0402_5%~D

10K_0402_5%~D

1 2

@ Y6

@

12

12

Y6

12

R309 2.2K_0402_5%~D

R309 2.2K_0402_5%~D

R377 2.2K_0402_5%~D

R377 2.2K_0402_5%~D

12

2

1

C1168

C1168

+3.3V_ALW_PCH

+3.3V_ALW_PCH

+3.3V_LAN

12

R381

R381
0_0402_5%~D

0_0402_5%~D

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

PCH (2/8)

PCH (2/8)

PCH (2/8)

LA-5472P

LA-5472P

LA-5472P

16 66Wednesday, January 20, 2010

16 66Wednesday, January 20, 2010

16 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

4

3

2

1

Intel WW18 Strapping option

D D

ME_SUS_PWR_ACK

PCH_PCIE_WAKE#

SIO_SLP_LAN#

PCH_RI#

+3.3V_ALW_PCH

12

R269 10K_0402_5%~DR269 10K_0402_5%~D

12

R268 10K_0402_5%~DR268 10K_0402_5%~D

12

R380 10K_0402_5%~DR380 10K_0402_5%~D

12

R267 10K_0402_5%~DR267 10K_0402_5%~D

CLKRUN#

R282 8.2K_0402_5%~DR282 8.2K_0402_5%~D

+3.3V_RUN

12

PORT

LVDS

PORT B

PORT B

PORT B

eDP on CPU

STRAP

L_DDC_DATA

SDVO_CTRLDATA

DDPC_CTRLDATA

DDPD_CTRLDATA

CFG[4] (at CPU)

PU to 3.3V thoough 2.2Kohm

PU to 3.3V thoough 2.2Kohm

PU to 3.3V thoough 2.2Kohm

PU to 3.3V thoough 2.2Kohm

PD to GND thoough 3.3Kohm

ENABLE

DISABLE

NC

NC

NC

NC

NC

U73C

U73C

REV1.0

REV1.0

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

DMI_ZCOMP

DMI_IRCOMP

SYS_RESET#

SYS_PWROK

PWROK

MEPWROK

LAN_RST#

DRAMPWROK

RSMRST#

SUS_PWR_DN_ACK / GPIO30

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

System Power Management

System Power Management

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO6 2

SLP_S5# / GPIO6 3

SLP_LAN# / GP IO29

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

DMI_COMP_R

XDP_DBRESET#

SYS_PWROK

PCH_PWROK

PM_MEPWROK_R

LAN_RST#

PM_DRAM_PWRGD

PCH_RSMRST#

ME_SUS_PWR_ACK

1 2

AC_PRESENT

PCH_BATLOW#

PCH_RI#

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

SIO_PWRBTN#_R

DMI_CTX_PRX_N07
DMI_CTX_PRX_N17
DMI_CTX_PRX_N27
DMI_CTX_PRX_N37

C C

+1.05V_RUN

PCH_PWROK

PCH_RSMRST#

B B

RESET_OUT#15,40

PM_MEPWROK40

A A

R48 8.2K_0402_5%~DR48 8.2K_0402_5%~D

R260 10K_0402_5%~DR260 10K_0402_5%~D

SIO_PWRBTN#40

+3.3V_ALW_PCH

DMI_CTX_PRX_P07
DMI_CTX_PRX_P17
DMI_CTX_PRX_P27
DMI_CTX_PRX_P37

DMI_CRX_PTX_N07
DMI_CRX_PTX_N17
DMI_CRX_PTX_N27
DMI_CRX_PTX_N37

DMI_CRX_PTX_P07
DMI_CRX_PTX_P17
DMI_CRX_PTX_P27
DMI_CRX_PTX_P37

R385

R385

1 2

49.9_0402_1%~D

49.9_0402_1%~D

1 2

1 2

XDP_DBRESET#8,15

1 2

R253 0_0402_5%~DR253 0_0402_5%~D

1 2

R254 0_0402_5%~DR254 0_0402_5%~D

1 2

R256 0_0402_5%~DR256 0_0402_5%~D

1 2

R257 0_0402_5%~DR257 0_0402_5%~D

PM_DRAM_PWRGD8

PCH_RSMRST#40

ME_SUS_PWR_ACK40

SIO_PWRBTN#_R8,15

AC_PRESENT40

R275 8.2K_0402_5%~DR275 8.2K_0402_5%~D

R53 0_0402_5%~DR53 0_0402_5%~D

1 2

BC24

BJ22

AW20

BJ20

BD24
BG22
BA20
BG20

BE22
BF21
BD20
BE18

BD22
BH21
BC20
BD18

BH25

BF25

T6

M6

B17

K5

A10

D9

C16

M1

P5

P7

A6

F14

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

PCH_PCIE_WAKE#

CLKRUN#

SUS_STAT#/LPCPD#

SUSCLK

SIO_SLP_S5#

SIO_SLP_S4#

SIO_SLP_S3#

SIO_SLP_M#SIO_PWRBTN#_R

H_PM_SYNC

SIO_SLP_LAN#

PCH_PCIE_WAKE# 39

CLKRUN# 32,39,40

T173 PAD~DT173 PAD~D

T179 PAD~DT179 PAD~D

T2 PAD~DT2 PAD~D

SIO_SLP_S5# 40

T3 PAD~DT3 PAD~D

SIO_SLP_S4# 39

T4 PAD~DT4 PAD~D

SIO_SLP_S3# 39

T5 PAD~DT5 PAD~D

SIO_SLP_M# 39,48

T6 PAD~DT6 PAD~D

H_PM_SYNC 8

SIO_SLP_LAN# 30,39

R672

R672

1K_0402_5%~D

1K_0402_5%~D

CRT_IREF

12

AB48

AB46

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53
AT49
AU52
AT53

AY51
AT48
AU50
AT51

AA52
AB53
AD53

AD48
AB51

T48
T47

Y48

Y45

V48

V51
V53

Y53
Y51

U73D

U73D

L_BKLTEN
L_VDD_EN

L_BKLTCTL

L_DDC_CLK
L_DDC_DATA

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

LVDS

LVDS

Digital Display Interface

Digital Display Interface

CRT

CRT

REV1.0

REV1.0

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

Intel request DDPB can not support eDP

SDVO_INTN
SDVO_INTP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44
BJ44
AU38

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN

DDPB_AUXP

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

PCH (3/8)

PCH (3/8)

PCH (3/8)

LA-5472P

LA-5472P

LA-5472P

17 66Wednesday, January 20, 2010

17 66Wednesday, January 20, 2010

17 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

4

3

2

1

+3.3V_RUN

+3.3V_RUN

1

B

2

A

PLTRST_R5U242#33

5

P

G

3

PCI_DEVSEL#

PCI_PIRQA#

PCI_PLOCK#

PCI_PERR#

PCI_TRDY#

PCI_FRAME#

PCI_REQ1#

PCI_PIRQD#

PCI_PIRQB#

PCI_REQ0#

PCI_SERR#

PCI_IRDY#

PCI_STOP#

LVDS_CBL_DET#

PCI_PIRQC#

CAM_MIC_CBL_DET#

BT_DET#

PLTRST_GPU#53
PLTRST_USH#31

PLTRST_XDP#15
PLTRST_LAN#30

C40

C40

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

U11

U11

PCH_PLTRST#_EC

4

O

TC7SH08FU_SSOP5~D

TC7SH08FU_SSOP5~D

HDD_FALL_INT128,40

R124 0_0402_5%~DR124 0_0402_5%~D

1 2

R100 0_0402_5%~DR100 0_0402_5%~D

1 2

R97 0_0402_5%~DR97 0_0402_5%~D

1 2

R94 0_0402_5%~D@R94 0_0402_5%~D@

1 2

R14 0_0402_5%~DR14 0_0402_5%~D

1 2

CLK_PCI_502839

CLK_PCI_MEC40

CLK_PCI_DOCK38

CLK_PCI_LOOPBACK16

PCH_PLTRST#_EC 8,32,34,36,39,40

R1216 22_0402_5%~DR1216 22_0402_5%~D
R1217 47_0402_5%~DR1217 47_0402_5%~D
R1215 47_0402_5%~DR1215 47_0402_5%~D

R63 22_0402_5%~DR63 22_0402_5%~D

PCIE_MCARD2_DET#36

BT_DET#41

PCIE_MCARD3_DET#36

LVDS_CBL_DET#24

CAM_MIC_CBL_DET#24

1 2

R632 0_0402_5%~DR632 0_0402_5%~D

1 2

R121 0_0402_5%~D@R121 0_0402_5%~D@

12
1 2
1 2

12

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_REQ0#
PCI_REQ1#

BT_DET#

PCI_GNT0#
PCI_GNT1#
PCIE_MCARD3_DET#
PCI_GNT3#

LVDS_CBL_DET#

CAM_MIC_CBL_DET#
FFS_PCH_INT

PCH_PCIRST#

PCI_SERR#
PCI_PERR#

PCI_IRDY#

PCI_DEVSEL#
PCI_FRAME#

PCI_PLOCK#

PCI_STOP#
PCI_TRDY#

PCH_PLTRST#

PCI_5028
PCI_MEC
PCI_DOCK

PCI_LOOPBACKOUT

U73E

U73E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

Boot BIOS Strap

PCI_GNT#0PCI_GNT#1 Boot BIOS Location

REV1.0

REV1.0

PCI

PCI

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

1 2

R1471 8.2K_0402_5%~DR1471 8.2K_0402_5%~D

1 2

R1472 8.2K_0402_5%~DR1472 8.2K_0402_5%~D

1 2

R1473 8.2K_0402_5%~DR1473 8.2K_0402_5%~D

1 2

R1474 8.2K_0402_5%~DR1474 8.2K_0402_5%~D

D D

C C

1 2

R1475 8.2K_0402_5%~DR1475 8.2K_0402_5%~D

1 2

R1477 8.2K_0402_5%~DR1477 8.2K_0402_5%~D

1 2

R1476 8.2K_0402_5%~DR1476 8.2K_0402_5%~D

1 2

R1478 8.2K_0402_5%~DR1478 8.2K_0402_5%~D

1 2

R1479 8.2K_0402_5%~DR1479 8.2K_0402_5%~D

1 2

R1480 8.2K_0402_5%~DR1480 8.2K_0402_5%~D

1 2

R1481 8.2K_0402_5%~DR1481 8.2K_0402_5%~D

1 2

R1482 8.2K_0402_5%~DR1482 8.2K_0402_5%~D

1 2

R1483 8.2K_0402_5%~DR1483 8.2K_0402_5%~D

1 2

R1484 8.2K_0402_5%~DR1484 8.2K_0402_5%~D

1 2

R1485 8.2K_0402_5%~DR1485 8.2K_0402_5%~D

1 2

R212 8.2K_0402_5%~DR212 8.2K_0402_5%~D

1 2

R590 8.2K_0402_5%~DR590 8.2K_0402_5%~D

PCI_GNT3#

12

R863

@R863

@

4.7K_0402_5%~D

4.7K_0402_5%~D

A16 swap override Strap/Top-Block

Swap Override jumper

PCI_GNT#3

B B

PCH_PLTRST#

A A

Low = A16 swap

High = Default

00

01

10

11

*

5

4

PCH XDP ENABLE

PCH XDP DISABLE

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_ALE
NV_CLE

NV_RCOMP

NV_RB#

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USB

USB

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

LPC

Reserved (NAND)

PCI

SPI

3

Stuff: R78,R89,R101~R116

No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130

Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130

No Stuff: R78,R89,R101~R116

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE

BD3

NV_CLE

AY6

AU2

AV7

AY8
AY5

AV11
BF5

USBP0-

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25

D25

N16
J16
F16
L16
E14
G16
F12
T15

USBP0+
USBP1­USBP1+
USBP2­USBP2+
USBP3­USBP3+
USBP4­USBP4+
USBP5­USBP5+
USBP6­USBP6+
USBP7­USBP7+
USBP8­USBP8+
USBP9­USBP9+
USBP10­USBP10+
USBP11­USBP11+

USBP13­USBP13+

USBRBIAS

USB_OC0#_R
USB_OC1#_R

USBP0- 37
USBP0+ 37
USBP1- 37

USBP1+ 37

USBP2- 37

USBP2+ 37

USBP3- 37

USBP3+ 37

USBP4- 36

USBP4+ 36

USBP5- 36

USBP5+ 36

USBP6- 41

USBP6+ 41

USBP7- 31

USBP7+ 31

USBP8- 38

USBP8+ 38

USBP9- 38

USBP9+ 38

USBP10- 33

USBP10+ 33

USBP11- 24

USBP11+ 24

USBP13- 36

USBP13+ 36

Within 500 mils

1 2

R303

R303

22.6_0402_1%~D

22.6_0402_1%~D

R71 0_0402_5%~DR71 0_0402_5%~D

1 2

R77 0_0402_5%~DR77 0_0402_5%~D

1 2

PCI_GNT0#

PCI_GNT1#

R79

@ R79

@

----->Right Side Top

----->Right Side Bottom

----->Left Side Top

----->Left Side Bottom

----->WLAN

----->WWAN

----->Blue Tooth

----->BIO_USH

----->DOCK

----->DOCK

----->Express Card

----->Camera

----->WPAN

USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

12

12

R93

@ R93

@

1K_0402_5%~D

1K_0402_5%~D

1K_0402_5%~D

1K_0402_5%~D

2

change base on Rothschild layout concern.

USB_OC0# 37
USB_OC1# 37
USB_OC2# 15
USB_OC3# 15
USB_OC4# 15
USB_OC5# 15
USB_OC6# 15
USB_OC7# 15

USB_OC0#_R 15
USB_OC1#_R 15

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+VCCPNAND

12

R872

@R872

@

10K_0402_5%~D

10K_0402_5%~D

no support?

NV_ALE

Danbury Technology Enabled

NV_ALE

+VCCPNAND

High = Enabled (Default)

Low = Disabled

12

R866

@R866

@

1K_0402_5%~D

1K_0402_5%~D

NV_CLE

DMI Termination Voltage

NV_CLE

USB_OC0#

USB_OC1#

USB_OC3#

USB_OC4#

USB_OC5#

USB_OC6#

USB_OC7#

USB_OC2#

Set to Vss when LOW

Set to Vcc when HIGH

R1486 10K_0402_5%~DR1486 10K_0402_5%~D

R1487 10K_0402_5%~DR1487 10K_0402_5%~D

R1488 10K_0402_5%~DR1488 10K_0402_5%~D

R1489 10K_0402_5%~DR1489 10K_0402_5%~D

R1490 10K_0402_5%~DR1490 10K_0402_5%~D

R1491 10K_0402_5%~DR1491 10K_0402_5%~D

R1493 10K_0402_5%~DR1493 10K_0402_5%~D

R1494 10K_0402_5%~DR1494 10K_0402_5%~D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PCH (4/8)

PCH (4/8)

PCH (4/8)

LA-5472P

LA-5472P

LA-5472P

1

+3.3V_ALW_PCH

12

12

12

12

12

12

12

12

A00

A00

18 66Wednesday, January 20, 2010

18 66Wednesday, January 20, 2010

18 66Wednesday, January 20, 2010

A00

of

of

of

5

4

3

2

1

D D

R99

@R99

@

1K_0402_5%~D

1K_0402_5%~D

SIO_EXT_SMI#

1 2

+3.3V_ALW_PCH

C C

+3.3V_ALW_PCH

+3.3V_RUN

B B

A A

Internal pull up GPIO27 to
enable VccVRM

12

R1284

R1284

8.2K_0402_5%~D

8.2K_0402_5%~D

@

@

TP_ONDIE_PLL_VR

GPIO46

1 2

R1309 10K_0402_5%~DR1309 10K_0402_5%~D

R1557 2.2K_0402_5%~DR1557 2.2K_0402_5%~D

R1242 10K_0402_5%~DR1242 10K_0402_5%~D

R1243 10K_0402_5%~DR1243 10K_0402_5%~D

R1244 10K_0402_5%~DR1244 10K_0402_5%~D

R1245 10K_0402_5%~DR1245 10K_0402_5%~D

R1510 10K_0402_5%~DR1510 10K_0402_5%~D

R1506 10K_0402_5%~DR1506 10K_0402_5%~D

R95 8.2K_0402_5%~DR95 8.2K_0402_5%~D

R1511 10K_0402_5%~DR1511 10K_0402_5%~D

1 2

1 2

1 2

1 2

1 2

SIO_EXT_WAKE#

CONTACTLESS_DET#

12

GPIO37

12

EN_ESATA_RPTR#

12

TEMP_ALERT#

12

GPIO1

GPIO6

SPEAKER_DET#

PCH_GPIO34

TPM_ID0

+3.3V_RUN

10K_0402_5%~D

10K_0402_5%~D

5@

5@

R273

R273

1 2

10K_0402_5%~D

10K_0402_5%~D

6@

6@

R922

R922

1 2

SIO_EXT_SCI#_R15

SIO_EXT_SCI#40

1394_DET#33

SIO_EXT_SMI#40

PM_LANPHY_ENABLE30

SIO_EXT_WAKE#39

EN_ESATA_RPTR#15,37

SPEAKER_DET#29

DGPU_PWROK39,52

PCIE_MCARD1_DET#36

TOUCH_SCREEN_DET#15

USB_MCARD1_DET#36

CONTACTLESS_DET#15,31

USB_MCARD2_DET#36

TEMP_ALERT#15,39

All NCTF pins should have thick
traces at 45°from the pad.

+3.3V_RUN

TPM_ID1

GPIO3715

FFS_INT228

IO_LOOP37

12

R787

4@ R787

4@

20K_0402_5%~D

20K_0402_5%~D

12

R339

3@ R339

3@

2.2K_0402_5%~D

2.2K_0402_5%~D

SIO_EXT_SCI#

GPIO1

GPIO6

1394_DET#

SIO_EXT_SMI#

PM_LANPHY_ENABLE

EN_ESATA_RPTR#

SPEAKER_DET#

DGPU_PWROK

TP_ONDIE_PLL_VR

TOUCH_SCREEN_DET#

PCH_GPIO34

USB_MCARD1_DET#

CONTACTLESS_DET#

GPIO37

TPM_ID0

TPM_ID1

USB_MCARD2_DET#

GPIO46

FFS_INT2

TEMP_ALERT#

IO_LOOP

1 2

R130 0_0402_5%~DR130 0_0402_5%~D

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

China TPM

No TPM, No China TPM

Reserved

TPM

5

4

U73F

U73F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GP IO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKR Q6# / GPIO45

F1

PCIECLKR Q7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

REV1.0

REV1.0

TPM_ID1TPM_ID0

0

0

0

1

01

11

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

A20GATE

PROCPWRGD

THRMTRIP#

INIT3_3V#

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

3

PECI

RCIN#

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

TP24

AH45
AH46

AF48
AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

SIO_A20GATE

CLK_CPU_BCLK#

CLK_CPU_BCLK

H_PECI

SIO_RCIN#

H_CPUPWRGD

PCH_THRMTRIP#_R

INIT3_3V#

SIO_A20GATE 40

CLK_CPU_BCLK# 8

CLK_CPU_BCLK 8

H_PECI 8

SIO_RCIN# 40

H_CPUPWRGD 8

T7PAD~D @T7PAD~D @

2

+1.05V_RUN_VTT

12

R237

R237
56_0402_5%~D

56_0402_5%~D

1

C33

C33

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

+3.3V_RUN

SIO_A20GATE

SIO_RCIN#

1394_DET#

SIO_EXT_SCI#

IO_LOOP

TOUCH_SCREEN_DET#

SIO_EXT_SMI#

12

R230 8.2K_0402_5%~DR230 8.2K_0402_5%~D

12

R231 10K_0402_5%~DR231 10K_0402_5%~D

1 2

R836 10K_0402_5%~DR836 10K_0402_5%~D

1 2

R272 10K_0402_5%~DR272 10K_0402_5%~D

+3.3V_ALW_PCH

12

R835 100K_0402_5%~DR835 100K_0402_5%~D

1 2

R74 10K_0402_5%~DR74 10K_0402_5%~D

1 2

R274 10K_0402_5%~DR274 10K_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCH (5/8)

PCH (5/8)

PCH (5/8)

LA-5472P

LA-5472P

LA-5472P

19 66Wednesday, January 20, 2010

19 66Wednesday, January 20, 2010

19 66Wednesday, January 20, 2010

of

of

1

of

A00

A00

A00

5

4

3

2

1

+1.05V_RUN

1

1

C77

C1139

C1139

10U_0805_4VAM~D

10U_0805_4VAM~D

+1.05V_RUN

1

2

1

C83

C83

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C85

C85

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

R390

R390
0_0603_5%~D

0_0603_5%~D

1 2

C77

2

VCCAPLLEXP

C78

C78

@

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C84

C84

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCAFDI_VRM

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCAFDI_VRM

D D

2

Place C78 Near BJ24 pin

C C

+1.05V_RUN

1

2

1

1

1

C80

C80

10U_0805_4VAM~D

10U_0805_4VAM~D

C82

C82

C81

C81

2

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+3.3V_RUN

1

2

Place C22 Near BJ18 pin

1

+1.05V_RUN

B B

C22

C22

2

@

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.05V_+1.5V_1.8V_RUN

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31

AJ30
AJ31

AK24

BJ24

AN20
AN22
AN23
AN24
AN26
AN28

BJ26

BJ28
AT26
AT28
AU26
AU28
AV26
AV28

AW26
AW28

BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

AN30
AN31

AN35

AT22

BJ18

AM23

U73G

U73G

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

VCCIO[24]

VCCAPLLEXP

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

VCCIO[54]
VCCIO[55]

VCC3_3[1]

VCCVRM[1]

VCCFDIPLL

VCCIO[1]

POWER

POWER

CRTLVDS

CRTLVDS

VCC CORE

VCC CORE

HVCMOS

HVCMOS

DMI

DMI

PCI E*

PCI E*

NAND / SPI

NAND / SPI

FDI

FDI

REV1.0

REV1.0

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

VCCADAC[1]

VCCADAC[2]

VSSA_DAC[1]

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

VCCVRM[2]

VCCDMI[1]

VCCDMI[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

+3.3V_RUN

AE50

AE52

AF53

AF51

AH38

AH39

AP43
AP45
AT46
AT45

AB34

AB35

AD35

+1.5V_1.8V_RUN_VCCADMI_VRM

AT24

AT16

AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

1

C93

C93

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

C1140

C1140
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

2

1

2

+3.3V_RUN

1 2

R391 0_0603_5%~DR391 0_0603_5%~D

+VCCPNAND

C94

C94

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C95

C95

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+1.05V_+1.5V_1.8V_RUN

+1.05V_RUN_VTT

1 2

R489 0_0805_5%~D@R489 0_0805_5%~D@

1 2

R495 0_0805_5%~DR495 0_0805_5%~D

+3.3V_M

+3.3V_RUN

+1.8V_RUN

PCH Power Rail Table

Voltage Rail

V_CPU_IO

V5REF

V5REF_Sus

Vcc3_3

VccAClk

VccADAC

VccADPLLA

VccADPLLB

VccapllEXP

VccCore

VccDMI

Voltage

1.1/1.05

3.3

1.1

3.3

1.1

1.1

1.1

1.1

1.1

S0 Iccmax
Current (A)

< 1 (mA)

5

5

< 1 (mA)

< 1 (mA)

0.357

0.052

0.069

0.068

0.069

0.04

1.432

0.058

1.1VccDMI 0.061

1.1VccFDIPLL 0.037

1.1VccIO 3.062

1.1VccLAN 0.32

1.1VccME 1.849

3.3VccME3_3 0.085

1.8 0.156VccpNAND

3.3VccRTC 2 (mA)

1.1VccSATAPLL 0.031

3.3VccSus3_3

3.3VccSusHDA

0.163

0.006

VccVRM 1.8 / 1.5 0.196

1.05VccVRM

VccALVDS 3.3

< 1 (mA)

< 1 (mA)

1.8VccTX_LVDS 0.059

+1.5V_RUN

+1.05V_+1.5V_1.8V_RUN

+1.8V_RUN

+1.05V_RUN

A A

R96 0_0603_5%~D@ R96 0_0603_5%~D@

R387 0_0603_5%~DR387 0_0603_5%~D

R80 0_0603_5%~D@ R80 0_0603_5%~D@

12

12

12

+1.05V_+1.5V_1.8V_RUN

NOTE:Refer to schematic check list rev2.0, VccVRM no support

1.5V and R96 can be removed.

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

PCH (6/8)

PCH (6/8)

PCH (6/8)

LA-5472P

LA-5472P

LA-5472P

20 66Wednesday, January 20, 2010

20 66Wednesday, January 20, 2010

20 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

4

3

2

1

Place C39 Near AP51 pin

+1.05V_M

R669

+1.05V_M

1

C759

C759

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C760

C760

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

C763

C763

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

2

R669
0_0603_5%~D

0_0603_5%~D

1 2

1 2

+1.05V_RUN

+1.05V_M_VCCAUX

1

C100

C100

2

R674

R674
0_0805_5%~D

0_0805_5%~D

1

C103

C103

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

+1.05V_RUN

Place C105 Near BB51 pin
C106 Near BD51 pin

+3.3V_ALW_VCCPSUS

+3.3_RUN_VCCPCORE

+V_CPU_IO

1

2

1

2

C777

C777

C108

C108

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+1.05V_M_VCCEPW

1

2

1

2

+VCCRTCEXT

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C113

C113

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C116

C116

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C117

C117

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C138

C138

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

1

C112

C112

2

@

@

1

C111

C111

2

@

@

+1.05V_+1.5V_1.8V_RUN

C139

C139

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C217

C217

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

4

D D

C C

B B

+3.3V_ALW_PCH

+3.3V_RUN

+1.05V_RUN_VTT

A A

R690

R690
0_0805_5%~D

0_0805_5%~D

1 2

R691

R691
0_0805_5%~D

0_0805_5%~D

1 2

R692

R692
0_0603_5%~D

0_0603_5%~D

1 2

5

1

2

@

@

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

2

@

@

+RTC_CELL

C39

C39

C110

C110

1

2

1

2

C105

C105

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCACLK

+TP_PCH_VCCDSW

1

2

C101

C101

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C102

C102

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCSST

+DCPSUS

C677

C677

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C781

C781

2

R651

U73J

U73J

AP51

VCCACLK[1]

AP53

VCCACLK[2]

AF23

VCCLAN[1]

AF24

VCCLAN[2]

Y20

DCPSUSBYP

AD38

VCCME[1]

AD39

VCCME[2]

AD41

VCCME[3]

AF43

VCCME[4]

AF41

VCCME[5]

AF42

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

V9

DCPRTC

AU24

VCCVRM[3]

BB51

VCCADPLLA[1]

1

2

@

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

BB53

VCCADPLLA[2]

BD51

C106

C106

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

VCCADPLLB[1]

BD53

VCCADPLLB[2]

AH23

VCCIO[21]

AJ35

VCCIO[22]

AH35

VCCIO[23]

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCIO[4]

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

AT18

V_CPU_IO[1]

AU18

V_CPU_IO[2]

A12

VCCRTC

C783

C783

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

POWER

POWER

REV1.0

REV1.0

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]

USB

USB

VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

Clock and Miscellaneous

Clock and Miscellaneous

PCI/GPIO/LPC

PCI/GPIO/LPC

VCCSATAPLL[1]
VCCSATAPLL[2]

SATA

SATA

PCI/GPIO/LPC

PCI/GPIO/LPC

CPU

CPU

RTC

RTC

VCCSUSHDA

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

HDA

HDA

3

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9]

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

V24
V26
Y24
Y26

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3
AK1

AH22

AT20

AH19

AD20

AF22

AD19
AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

+1.05V_RUN_VCCUSBCORE

1

2

+3.3V_ALW_VCCPUSB

1

2

+PCH_V5REF_SUS

+PCH_V5REF_RUN

+3.3V_RUN_VCCPPCI

+VCCSATAPLL

+VCCME_13
+VCCME_14
+VCCME_15
+VCCME_16

+VCCSUSHDA

1

C672

C672
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C96

C96
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C97

C97

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C99

C99

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C356

C356

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

C1203

C1203

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

C610

C610

2

@

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+VCCIO

R559 0_0603_5%~DR559 0_0603_5%~D
R573 0_0603_5%~DR573 0_0603_5%~D
R591 0_0603_5%~DR591 0_0603_5%~D
R592 0_0603_5%~DR592 0_0603_5%~D

1 2

R499

R499
0_0603_5%~D

0_0603_5%~D

12

+1.05V_RUN

R500

R500
0_0603_5%~D

0_0603_5%~D

12

+3.3V_ALW_PCH

+3.3V_ALW_VCCPUSB

+1.05V_RUN

R517

R517
0_0805_5%~D

0_0805_5%~D

+3.3V_RUN

12

+3.3V_RUN

Place C610 Near AK3 pin

+1.05V_+1.5V_1.8V_RUN

R557

R557
0_0805_5%~D

0_0805_5%~D

12

12

+3.3V_ALW_PCH

12
12
12

1

C611

C611

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

R650

R650

0_0603_5%~D

0_0603_5%~D

2

+1.05V_M

+1.05V_RUN

R651
0_0402_5%~D

0_0402_5%~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

ALW_ENABLE42

12

1 3

Q10

Q10

R313

R313

100_0402_5%~D

100_0402_5%~D

D

D

2

Follow DG 1.11

R311

R311

100_0402_5%~D

100_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCH (7/8)

PCH (7/8)

PCH (7/8)

LA-5472P

LA-5472P

LA-5472P

S

S

G

G

+3.3V_ALW_PCH+5V_ALW_PCH

12

+3.3V_RUN+5V_RUN

12

1

+5V_ALW_PCH+5V_ALW

12

1

2

21

1

2

21

1

2

R57

R57
20K_0402_5%~D

20K_0402_5%~D

C18

C18

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

D16

D16
RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_SUS

C342

C342
1U_0603_10V6K~D

1U_0603_10V6K~D

D15

D15
RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_RUN

C335

C335
1U_0603_10V6K~D

1U_0603_10V6K~D

21 66Wednesday, January 20, 2010

21 66Wednesday, January 20, 2010

21 66Wednesday, January 20, 2010

A00

A00

A00

of

of

of

5

U73H

D D

C C

B B

A A

AB16

AA19
AA20
AA22

AM19

AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47

AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49

AF12

AH49

AF35
AP13
AN34
AF45
AF46
AF49

AG2

AG52

AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47

AJ19

AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34

AK12

AM41

AN19
AK26
AK22
AK23
AK28

AB5
AB8
AC2

AD7
AE2
AE4

Y13

AU4

AF5
AF8

AH7

AJ2

AT5
AJ4

U73H

VSS[0]

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

4

REV1.0

REV1.0

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

3

U73I

U73I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

B7

VSS[169]

BG12

VSS[170]

BB12

VSS[171]

BB16

VSS[172]

BB20

VSS[173]

BB24

VSS[174]

BB30

VSS[175]

BB34

VSS[176]

BB38

VSS[177]

BB42

VSS[178]

BB49

VSS[179]

BB5

VSS[180]

BC10

VSS[181]

BC14

VSS[182]

BC18

VSS[183]

BC2

VSS[184]

BC22

VSS[185]

BC32

VSS[186]

BC36

VSS[187]

BC40

VSS[188]

BC44

VSS[189]

BC52

VSS[190]

BH9

VSS[191]

BD48

VSS[192]

BD49

VSS[193]

BD5

VSS[194]

BE12

VSS[195]

BE16

VSS[196]

BE20

VSS[197]

BE24

VSS[198]

BE30

VSS[199]

BE34

VSS[200]

BE38

VSS[201]

BE42

VSS[202]

BE46

VSS[203]

BE48

VSS[204]

BE50

VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208]

BF49

VSS[209]

BF51

VSS[210]

BG18

VSS[211]

BG24

VSS[212]

BG4

VSS[213]

BG50

VSS[214]

BH11

VSS[215]

BH15

VSS[216]

BH19

VSS[217]

BH23

VSS[218]

BH31

VSS[219]

BH35

VSS[220]

BH39

VSS[221]

BH43

VSS[222]

BH47

VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251]

AF39

VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

REV1.0

REV1.0

IBEXPEAK-M_FCBGA1071~D

IBEXPEAK-M_FCBGA1071~D

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

2

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Compal Electronics, Inc.

PCH (8/8)

PCH (8/8)

PCH (8/8)

LA-5472P

LA-5472P

LA-5472P

22 66Wednesday, January 20, 2010

22 66Wednesday, January 20, 2010

22 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

D D

4

3

+3.3V_M

2

1

+3.3V_M

12

R134

R134

8.2K_0402_5%~D

8.2K_0402_5%~D

+1.05V_RUN_VTT

R135

R135

2.2K_0402_5%~D

2.2K_0402_5%~D

1 2

PMST3904_SOT323-3~D

H_THERMTRIP#8

C C

Diode circuit at DP2/DN2 is used
for skin temp sensor (placed
optimally
between CPU, MCH and MEM).

PMST3904_SOT323-3~D

Place C222 close to Q7 as
possible.

Q9 Place near DIMM

Place C228 close
to Q9

+3.3V_M

12

R137

R137

8.2K_0402_5%~D

B B

A A

THERMTRIP_VGA#53

8.2K_0402_5%~D

THERMATRIP2#

1

C220

C220

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

+3.3V_RUN

12

R1401

R1401

8.2K_0402_5%~D

8.2K_0402_5%~D

5

12

R1402

R1402

2.2K_0402_5%~D

2.2K_0402_5%~D

THERM_B3

C

C

2

B

B

E

E

Q5

Q5

3 1

100P_0402_50V8K~D

100P_0402_50V8K~D

100P_0402_50V8K~D

100P_0402_50V8K~D

THERMATRIP1#

+3.3V_M

+3.3V_M

2

B

B

E

E

1

2

@C223

@

1

2

12

C

C

3 1

C218

C218

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

Place under CPU

Place C223 close to the Q8 as possible
Place C224, close to the Guardian pins as possible

C

1 2

C231

C231

C

2

B

B

E

E

Q8

Q8

3 1

MMBT3904WT1G_SC70-3~D

MMBT3904WT1G_SC70-3~D

C

C

2

B

B

E

E

Q7

Q7

3 1

MMBT3904WT1G_SC70-3~D

MMBT3904WT1G_SC70-3~D

C

C

2

B

B

E

E

Q9

Q9

3 1

MMBT3904WT1G_SC70-3~D

MMBT3904WT1G_SC70-3~D

12

1

R151

R151
953_0402_1%~D

953_0402_1%~D

2

1

C240

C240

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

Place C221 close to the
Guardian pins as possible.

2200P_0402_50V7K~D

2200P_0402_50V7K~D

1

+RTC_CELL

C229

C229

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

+5V_RUN

1

2

*

4

2

C223

1

1

C222

@C222

@

2

C227

@C227

@

100P_0402_50V8K~D

100P_0402_50V8K~D

R1218 22_0402_5%~DR1218 22_0402_5%~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

Rset=953,Tp=88degree

R155

R155

8.2K_0402_5%~D

8.2K_0402_5%~D

THERMATRIP3#

Q188

Q188

PMST3904_SOT323-3~D

PMST3904_SOT323-3~D

BC_DAT_EMC400240

BC_CLK_EMC400240

2

C224

C224
2200P_0402_50V7K~D

2200P_0402_50V7K~D

1

1

C221

C221
2200P_0402_50V7K~D

2200P_0402_50V7K~D

2

1

C228

C228

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C230

C230

2

+VCC_4002

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+3.3V_RUN

C235

C235

1

C234

C234

2

Pull-up Resistor
on ADDR_MODE/XEN

+3.3V_M

PCH_PWRGD#40

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C236

C236

2

2

EC_32KHZ_OUT40

<= 4.7K +/- 5% 2F(r/w)

10K

18K

>= 33K

REM_DIODE1_P
REM_DIODE1_N

REM_DIODE2_P
REM_DIODE2_N

REM_DIODE3_P
REM_DIODE3_N

+VCC_4002

1 2

R146 10K_0402_5%~DR146 10K_0402_5%~D

1 2

R148 1K_0402_5%~DR148 1K_0402_5%~D

THERMATRIP1#
THERMATRIP2#
THERMATRIP3#

VSET

R150 4.7K_0402_5%~DR150 4.7K_0402_5%~D

+FAN1_VOUT

C237

C237

FAN1_TACH_FB

EC_32KHZ_OUT

For Remote1
mode

2N3904

2N3904

Thermistor

Thermistor

+3.3V_M

R142

R142

BC_DAT_EMC4002
BC_CLK_EMC4002

12

SMBUS
Address

2E(r/w)

12

FAN1_TACH_FB

10K_0402_5%~D

10K_0402_5%~D

U3

U3

10

SMDATA/BC-LINK_DATA

11

SMCLK/BC-LINK_CLK

36

DP1/VREF_T

35

DN1/THERM

38

DP2

37

DN2

41

DP3/DN7

40

DN3/DP7

4

VDD

21

RTC_PWR3V

18

VDD_PWRGD

17

3V_PWROK#

22

THERMTRIP1#

23

THERMTRIP2#

24

THERMTRIP3#

42

VSET

3

ADDR_MODE/XEN

6

VDDH1

5

VDDH1

9

VDDL1

7

FAN_OUT1

8

FAN_OUT1

15

TACH1/GPIO3

14

CLK_IN/GPIO2

FAN1_DET#

FAN1_DET#
+FAN1_VOUT

2 1

RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

DP4/DN8
DN4/DP8

DP5/DN9
DN5/DP9

DP6/VREF_T2

DN6/VIN2

POWER_SW#

ACAVAIL_CLR

SYS_SHDN#

LDO_SHDN#

LDO_POK

LDO_SET

TACH2/GPIO4

PWM2/GP IO1

TC7SH08FU_SSOP5~D

TC7SH08FU_SSOP5~D

POWER_SW#

C219

C219

VDDH2
VDDH2

VDDL2

1

2

VIN1
VCP1
VCP2

D2

D2

ATF_INT#/B C-LINK_IRQ#

THERMTRIP_SIO/PWM1/GPIO5

LDO_OUT/FAN_OUT2
LDO_OUT/FAN_OUT2

VSS

EMC4002-HZH C_QFN48_7X7~D

EMC4002-HZH C_QFN48_7X7~D

49

12

R1517 10K_0402_5%~DR1517 10K_0402_5%~D

1
2
3
4

MOLEX_53398-0471~D

MOLEX_53398-0471~D

22U_0805_6.3VAM~D

22U_0805_6.3VAM~D

39

R1408 0_0402_5%~DR1408 0_0402_5%~D

48

R998 4.7K_0402_5%~DR998 4.7K_0402_5%~D

45

VGA_THERMDN

44

VGA_THERMDP

43

47
46

1
2

R141 10K_0402_5%~DR141 10K_0402_5%~D

12

POWER_SW#

26
27

PWM

20
25

19

R211 10K_0402_5%~DR211 10K_0402_5%~D

34

LDO_SET

33

32
31

28

29
30

FAN1_DET#

16
13

+RTC_CELL

5

U68

U68

P

B

4

O

A

G

3

JFAN1

JFAN1

1
2

5

3

G1

6

4

G2

12

1 2

12

BC_INT#_EMC4002 40

ACAV_IN 40,50,51

12

C1050

C1050

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

1

2

12

PM_EXTTS# 8

2F(r/w)

2E(r/w)

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

+3.3V_M

R154

R154
1K_0402_5%~D

1K_0402_5%~D

Discrete

VGA_THERMDP

1

C1706

C1706
470P_0402_50V7K~D

470P_0402_50V7K~D

VGA_THERMDN

2

Place Capacitor close to Guardian Chip

IMVP_IMON 11,49

MAX8731_IINP 51

R145 10K_0402_5%~DR145 10K_0402_5%~D

1 2

R147 47K_0402_1%~D@R147 47K_0402_1%~D@

DOCK_PWR_SW# 40

POWER_SW_IN# 40

12

+3.3V_M

+RTC_CELL

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

FAN & Thermal Sensor

FAN & Thermal Sensor

FAN & Thermal Sensor

LA-5472P

LA-5472P

LA-5472P

VGA_THERMDP 54

VGA_THERMDN 54

THERM_STP# 45

1

A00

A00

23 66Wednesday, January 20, 2010

23 66Wednesday, January 20, 2010

23 66Wednesday, January 20, 2010

A00

of

of

of

JEDP1

JEDP1

45

MGND1

46

MGND2

47

MGND3

48

MGND4

49

MGND5

50

MGND6

51

MGND7

52

MGND8

53

MGND9

54

MGND10

55

MGND11

56

MGND12

57

D D

C C

MGND13

CAM_MIC_CBL_DET#

I-PEX_20505-044E-011G

I-PEX_20505-044E-011G

LCD_SMBCLK

R548 2.2K_0402_5%~DR548 2.2K_0402_5%~D

LCD_SMBDAT

R549 2.2K_0402_5%~DR549 2.2K_0402_5%~D

5

LVDS_CBL_DET#

44

CONNTST

43

GND
LANE1_N
LANE1_P

GND
LANE0_N
LANE0_P

GND

AUX_CH_P

AUX_CH_N

GND

LCD_VCC
LCD_VCC
LCD_VCC

TEST

GND

HPD

BL_GND

BL_GND
BL_PWR
BL_PWR
BL_PWR
BL_PWR

BL_GND

BL_GND

BL_PWM

SMBUS_CLK

SMBUS_DATA

ALS_VCC
ALS_INT#

GND

USB+

USB-

USB_VCC

MIC_CLK

MIC_GND

MIC_DAT

GND

PWR_LED
BATT2_LED
BATT1_LED

GND

CONNTST

R1028 100K_0402_5%~DR1028 100K_0402_5%~D

1 2

42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

12

12

EDP_LANE_N1
EDP_LANE_P1

EDP_LANE_N0
EDP_LANE_P0

MB_EDP_AUX
MB_EDP_AUX#

R667 1K_0402_5%~DR667 1K_0402_5%~D

EDP_HPD

LCD_SMBCLK
LCD_SMBDAT

ALS_INT#

USBP11_D+
USBP11_D-

DMIC_CLK

DMIC0

BREATH_BLUE_LED
BATT_YELLOW_LED
BATT_BLUE_LED

R180 0_0402_5%~DR180 0_0402_5%~D

R181 0_0402_5%~D@ R181 0_0402_5%~D@

LVDS_CBL_DET# 18

C225 0.1U_0402_10V7K~D@C225 0.1U_0402_10V7K~D@
C359 0.1U_0402_10V7K~D@C359 0.1U_0402_10V7K~D@

C358 0.1U_0402_10V7K~DC358 0.1U_0402_10V7K~D
C271 0.1U_0402_10V7K~DC271 0.1U_0402_10V7K~D

C295 0.1U_0402_10V7K~DC295 0.1U_0402_10V7K~D

1 2

C314 0.1U_0402_10V7K~DC314 0.1U_0402_10V7K~D

1 2

1 2

LCD_TST

EDP_HPD 53

C246 0.1U_0603_50V4Z~DC246 0.1U_0603_50V4Z~D

1 2

LCD_SMBCLK 40

LCD_SMBDAT 40

+3.3V_RUN

ALS_INT# 39

CAM_MIC_CBL_DET# 18

+CAMERA_VDD

BREATH_BLUE_LED 43
BATT_YELLOW_LED 43
BATT_BLUE_LED 43

EDP_HPD

12

+LCDVDD

12

12
12

12
12

+BL_PWR_SRC

+3.3V_RUN

+LCDVDD

LCD_TST 39

+3.3V_RUN

USBP11_D-

12

0_0402_5%~D

0_0402_5%~D

@

@

4

DPD_GPU_LANE_N1 54
DPD_GPU_LANE_P1 54

DPD_GPU_LANE_N0 54
DPD_GPU_LANE_P0 54

DPD_GPU_EDP_AUX 54
DPD_GPU_EDP_AUX# 54

R165

R165
10K_0402_5%~D

10K_0402_5%~D

1 2

R166

@R166

@

D49

D49

D48

D48

@

@

2 1

2 1

SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D

U50

@U50

@

1

GND

VCC

2

IO1

PRTR5V0U2X_SOT143-4~D

PRTR5V0U2X_SOT143-4~D

IO2

+LCDVDD

Close to JEDP1.18,19

BIA_PWM_GPU 53

4

USBP11_D+

3

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C244

C244

2

DMIC_CLK 29

DMIC0 29

USBP11+18

USBP11-18

+CAMERA_VDD

3

USBP11+

USBP11-

LCD_VCC_TEST_EN39

ENVDD_GPU39,53

4

4

1

1

DLW21SN121SQ2L_4P~D

DLW21SN121SQ2L_4P~D

L59

@L59

@

1 2

R457 0_0402_5%~DR457 0_0402_5%~D

1 2

R513 0_0402_5%~DR513 0_0402_5%~D

LCD Power

BAT54CW_SOT323-3~D

BAT54CW_SOT323-3~D

3

3

2

2

D3

D3

3

2

USBP11_D+

USBP11_D-

2

D

+15V_ALW +3.3V_ALW

+LCDVDD

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

Q13A

Q13A

EN_LCDPWREN_LCDPWR

1

+15V_ALW

100_0402_5%~D

100_0402_5%~D

12

R161

R161

61

2

2

100K_0402_5%~D

100K_0402_5%~D

12

R162

R162

5

13

Q15

Q15
PDTC124EU_SC70-3~D

PDTC124EU_SC70-3~D

+PWR_SRC

40mil

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

C248

C248

2

EN_INVPWR40

Panel backlight power control by EC

+LCDVDD

12

R158

R158
100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q13B

Q13B

4

FDC654P_SSOT6~D

FDC654P_SSOT6~D

12

R167

R167
100K_0402_5%~D

100K_0402_5%~D

PWR_SRC_ON

1 2

R168 47K_0402_5%~DR168 47K_0402_5%~D

EN_INVPWR

D

S

S

4 5

G

G

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

3

0.1U_0402_25V4Z~D

0.1U_0402_25V4Z~D

1

C242

C242

2

Q17

Q17

D

D

S

S

4 5

G

G

3

Q18

Q18
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

D

D

1 3

6

2
1

Q12

Q12

6

2
1

S

S

G

G

2

FDC654P: P CHANNAL

1

1

C241

C241

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

40mil

1

C247

C247

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

+BL_PWR_SRC

R995

@R995

@

0_0603_5%~D

0_0603_5%~D

12

R169

R169
100K_0402_5%~D

100K_0402_5%~D

13

D

D

S

S

Q133

Q133

1 2

Q132

Q132

PMV45EN_SOT23-3~D

PMV45EN_SOT23-3~D

D

S

D

S

13

G

G

2

1

C1044

C1044

0.1U_0402_25V4Z~D

0.1U_0402_25V4Z~D

2

1

C1043

C1043

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

+3.3V_RUN

B B

For Webcam

+CAMERA_VDD

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C249

C249

2

2

R997

R997
0_0603_5%~D

0_0603_5%~D

10U_1206_16V4Z~D

10U_1206_16V4Z~D

C250

C250

12

+CAMERA_VDD_R

+15V_ALW

Webcam PWR CTRL

CCD_OFF

A A

CCD_OFF39

2

G

G

DELL CONFIDENTIAL/PROPRIETARY

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

eDP & CAM Conn

eDP & CAM Conn

eDP & CAM Conn

LA-5472P

LA-5472P

LA-5472P

24 66Wednesday, January 20, 2010

24 66Wednesday, January 20, 2010

24 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

D D

4

3

2

1

AUX/DDC SW for DPB to E-DOCK

C272

C272

0.1U_0402_10V7K~D

C C

B B

DPB_GPU_AUX/DDC54

DPB_GPU_AUX#/DDC54

0.1U_0402_10V7K~D

DPB_DOCK_AUX38

C274 0.1U_0402_10V7K~DC274 0.1U_0402_10V7K~D

DPB_DOCK_AUX#38

DPB_AUX_C

12

DPB_AUX#_C

12

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DPB_CA_DET38

U86

U86

1
2

3

4
5

6

7

C277

C277

VCC

BE0

BE3

A0

B0

BE1
A1

BE2

B1

GND

PI3C3125LEX_TSSOP14~D

PI3C3125LEX_TSSOP14~D

+5V_RUN

12

1

5

U8

U8

P

NC

A2Y

G

NC7SZ04P5X_NL_SC70-5~D

NC7SZ04P5X_NL_SC70-5~D

3

A3

B3

A2

B2

4

14
13

12

11
10

9

8

DPB_CA_DET#

+3.3V_RUN

C337

C337

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DPB_GPU_AUX/DDC

DPB_GPU_AUX#/DDC

12

1 2

R996 1M_0402_5%~DR996 1M_0402_5%~D

DPB_CA_DET

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DPB AUX SW for DOCK

DPB AUX SW for DOCK

DPB AUX SW for DOCK

LA-5472P

LA-5472P

LA-5472P

25 66Wednesday, January 20, 2010

25 66Wednesday, January 20, 2010

25 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

2

1

Display port Connector

+3.3V_RUN

0_1206_5%~D

F1

1.5A_6V_1206L150PR~D

1.5A_6V_1206L150PR~D

B B

C316 0.1U_0402_10V7K~DC316 0.1U_0402_10V7K~D

DPC_GPU_LANE_P054

DPC_GPU_LANE_N054

DPC_GPU_LANE_P154

DPC_GPU_LANE_N154

DPC_GPU_LANE_P254

DPC_GPU_LANE_N254

DPC_GPU_LANE_P354

DPC_GPU_LANE_N354

DPC_GPU_AUX/DDC54
DPC_GPU_AUX#/DDC54

DPC_AUX_C

1 2

C1597 100P_0402_50V 8J~DC1597 100P_0402_50V8J~D

DPC_AUX#_C

1 2

C1598 100P_0402_50V 8J~DC1598 100P_0402_50V8J~D

Place C1597,C1598 close
to U9 pin8 & pin9

+3.3V_RUN

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C92

C92

2

2

A A

12

C312 0.1U_0402_10V7K~DC312 0.1U_0402_10V7K~D

12

C309 0.1U_0402_10V7K~DC309 0.1U_0402_10V7K~D

12

C301 0.1U_0402_10V7K~DC301 0.1U_0402_10V7K~D

12

C315 0.1U_0402_10V7K~DC315 0.1U_0402_10V7K~D

12

C318 0.1U_0402_10V7K~DC318 0.1U_0402_10V7K~D

12

C338 0.1U_0402_10V7K~DC338 0.1U_0402_10V7K~D

12

C322 0.1U_0402_10V7K~DC322 0.1U_0402_10V7K~D

12

C90 0.1U_0402_10V7K~DC90 0.1U_0402_10V7K~D

12

C91 0.1U_0402_10V7K~DC91 0.1U_0402_10V7K~D

12

DPC_DOCK_HPD38

DPC_DOCK_CA_DET38

DP_PRIORIT Y39

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C98

C98

C104

C104

2

DP_PRIORIT Y

100K_0402_5%~D

100K_0402_5%~D

@

R190

R190

@

@

1 2

@

@

@
@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C107

C107

2

DPB SW for MB & DOCK

U9

DPC_LANE_P0_C
DPC_LANE_N0_C

DPC_LANE_P1_C
DPC_LANE_N1_C

DPC_LANE_P2_C
DPC_LANE_N2_C

DPC_LANE_P3_C
DPC_LANE_N3_C

DPC_AUX_C
DPC_AUX#_C

DPC_MB_HPD
DPC_DOCK_HPD

DPC_MB_CA_DET
DPC_DOCK_CA_DET

DPC_GPU_AUX#/DDC
DPC_GPU_AUX/DDC

T30PAD~D@T30PAD~D
T27PAD~D@T27PAD~D

T28PAD~D@T28PAD~D
T29PAD~D@T29PAD~D

T37PAD~D@T37PAD~D

T38PAD~D@T38PAD~D
T39PAD~D@T39PAD~D

+3.3V_RUN

U9

55

IN_P1

56

IN_N1

1

IN_P2

2

IN_N2

4

IN_P3

5

IN_N3

6

IN_P4

7

IN_N4

8

AUXP_S

9

AUXN_S

17

HPD1

36

HPD2

26

CAD1

27

CAD2

11

SDA_S

10

SCL_S

35

HPDSEL

14

EQ_S0/SDA_CTL

15

OEB/SCL_CNTL

34

EQ_S1/I 2C_Address

16

12C_CTL_EN

54

CEC_S

52

CEC1

53

CEC2

44

VDD4

31

VDD3

20

VDD2

3

VDD1

PI3VDP8200ZBEX_TQFN56_8X8~D

PI3VDP8200ZBEX_TQFN56_8X8~D

OUT1_1P
OUT1_1N

OUT1_2P
OUT1_2N

OUT1_3P
OUT1_3N

OUT1_4P
OUT1_4N

SCL1

SDA1

OUT2_1P
OUT2_1N

OUT2_2P
OUT2_2N

OUT2_3P
OUT2_3N

OUT2_4P
OUT2_4N

SCL2

SDA2

HPD_S

CAD_S

P1_OC1
P1_OC0

P2_OC1
P2_OC0

Vbias

GND

GPAD

DPC_MB_LANE_P0

33

DPC_MB_LANE_N0

32

DPC_MB_LANE_P1

30

DPC_MB_LANE_N1

29

DPC_MB_LANE_P2

25

DPC_MB_LANE_N2

24

DPC_MB_LANE_P3

22

DPC_MB_LANE_N3

21

DPC_MB_AUX

19

DPC_MB_AUX#

18

DPC_DOCK_P0

49

DPC_DOCK_N0

48

DPC_DOCK_P1

46

DPC_DOCK_N1

45

DPC_DOCK_P2

43

DPC_DOCK_N2

42

DPC_DOCK_P3

41

DPC_DOCK_N3

40

DPC_DOCK_AUX

38

DPC_DOCK_AUX#

37

12

28

13
23

50
47

51

39
57

C278 0.1U_0402_10V7K~DC278 0.1U_0402_10V7K~D
C279 0.1U_0402_10V7K~DC279 0.1U_0402_10V7K~D

C280 0.1U_0402_10V7K~DC280 0.1U_0402_10V7K~D
C281 0.1U_0402_10V7K~DC281 0.1U_0402_10V7K~D

C282 0.1U_0402_10V7K~DC282 0.1U_0402_10V7K~D
C283 0.1U_0402_10V7K~DC283 0.1U_0402_10V7K~D

C284 0.1U_0402_10V7K~DC284 0.1U_0402_10V7K~D
C285 0.1U_0402_10V7K~DC285 0.1U_0402_10V7K~D

C286 0.1U_0402_10V7K~DC286 0.1U_0402_10V7K~D
C287 0.1U_0402_10V7K~DC287 0.1U_0402_10V7K~D

C288 0.1U_0402_10V7K~DC288 0.1U_0402_10V7K~D
C289 0.1U_0402_10V7K~DC289 0.1U_0402_10V7K~D

C290 0.1U_0402_10V7K~DC290 0.1U_0402_10V7K~D
C291 0.1U_0402_10V7K~DC291 0.1U_0402_10V7K~D

C292 0.1U_0402_10V7K~DC292 0.1U_0402_10V7K~D
C293 0.1U_0402_10V7K~DC293 0.1U_0402_10V7K~D

@

@

T40 PAD~D

T40 PAD~D

P1_OC1
P1_OC0

P2_OC1
P2_OC0

12
12

12
12

12
12

12
12

12
12

12
12

12
12

12
12

DPC_DOCK_AUX 38

DPC_DOCK_AUX# 38

DPC_GPU_HPD 53

P1_OC1

R1542 4.7K_0402_5%~D@R1542 4.7K_0402_5%~D@

P1_OC0

R1543 4.7K_0402_5%~D@R 1543 4.7K_0402_5%~D@

P2_OC1

R1544 4.7K_0402_5%~D@R1544 4.7K_0402_5%~D@

P2_OC0

R1516 4.7K_0402_5%~DR1516 4.7K_0402_5%~D

MBDP_LANE_P0
MBDP_LANE_N0

MBDP_LANE_P1
MBDP_LANE_N1

MBDP_LANE_P2
MBDP_LANE_N2

MBDP_LANE_P3
MBDP_LANE_N3

DPC_DOCK_LANE_P0 38
DPC_DOCK_LANE_N0 38

DPC_DOCK_LANE_P1 38
DPC_DOCK_LANE_N1 38

DPC_DOCK_LANE_P2 38
DPC_DOCK_LANE_N2 38

DPC_DOCK_LANE_P3 38
DPC_DOCK_LANE_N3 38

12

12

12

12

+3.3V_RUN

Reserve for back-up plan

+3.3V_RUN

1 2

R278 100K_0402_5%~DR278 100K_0402_5%~D

1 2

R191 100K_0402_5%~DR191 100K_0402_5%~D

1 2

R1098 1M_0402_5%~DR1098 1M _0402_5%~D

1 2

R1024 100K_0402_5%~DR1024 100K_0402_5%~D

1 2

R185 1M_0402_5%~DR185 1M_0402_5%~D

1 2

R186 100K_0402_5%~DR186 100K_0402_5%~D

1 2

R797 5.1M_0603_1%~DR797 5.1M_0603_1%~D

F1

DPC_MB_HPD
DPC_MB_AUX#

DPC_MB_AUX
DPC_MB_P14
DPC_MB_CA_DET
MBDP_LANE_N3

MBDP_LANE_P3
MBDP_LANE_N2

MBDP_LANE_P2
MBDP_LANE_N1

MBDP_LANE_P1
MBDP_LANE_N0

MBDP_LANE_P0

DPC_MB_AUX#

DPC_GPU_HPD

DPC_DOCK_CA_DET

DPC_MB_AUX

DPC_MB_CA_DET

DPC_MB_HPD

DPC_MB_P14

0_1206_5%~D

@

@

R184

R184

1 2

1 2

+VDISPLAY_VCC

JDP1

JDP1

20

DP_PWR

19

RTN

18

HP_DET

17

AUX_CH-

16

GND

15

AUX_CH+

14

GND

13

CA_DET

12

LAN3-

11

LAN3_shield

10

LAN3+

9

LAN2-

8

LAN2_shield

7

LAN2+

6

LAN1-

5

LAN1_shield

4

LAN1+

3

LAN0-

2

LAN0_shield

1

LAN0+

MOLEX_105088-0001

MOLEX_105088-0001

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1075

1

2

C1075

1

C275

C275

2

21

GND

22

GND

23

GND

24

GND

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

1

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Display port

Display port

Display port

LA-5472P

LA-5472P

LA-5472P

26 66Wednesday, January 20, 2010

26 66Wednesday, January 20, 2010

26 66Wednesday, January 20, 2010

A00

A00

A00

of

of

of

2

+3.3V_RUN

RED_CRT

GREEN_CRT

BLUE_CRT

12P_0402_50V8J~D

12P_0402_50V8J~D

12P_0402_50V8J~D

12

12

R172

R172

150_0402_1%~D

150_0402_1%~D

B B

12

R173

R173

R174

R174

150_0402_1%~D

150_0402_1%~D

150_0402_1%~D

150_0402_1%~D

12P_0402_50V8J~D

1

2

1

1

C390

C390

C518

C518

2

2

L61

L61

27NH_LL1608-FSL27NJ_5%~D

27NH_LL1608-FSL27NJ_5%~D

L62

L62

27NH_LL1608-FSL27NJ_5%~D

27NH_LL1608-FSL27NJ_5%~D

L63

L63

27NH_LL1608-FSL27NJ_5%~D

27NH_LL1608-FSL27NJ_5%~D

12P_0402_50V8J~D

12P_0402_50V8J~D

C996

C996

1 2

1 2

1 2

HSYNC_CRT

VSYNC_CRT

DAT_DDC2_CRT
CLK_DDC2_CRT

1 2

R177 0_0402_5%~DR177 0_0402_5%~D

1 2

R178 0_0402_5%~DR178 0_0402_5%~D

DA204U_SOT323-3~D

DA204U_SOT323-3~D

1

@

@

D5

D5

2

3

2P_0402_50V8C~D

2P_0402_50V8C~D

1

C251

C251

2

+5V_RUN_SYNC

HSYNC_L2

VSYNC_L2

DA204U_SOT323-3~D

DA204U_SOT323-3~D

1

@

@

D6

D6

2

3

2P_0402_50V8C~D

2P_0402_50V8C~D

1

C252

C252

2

2.2K_0402_5%~D

2.2K_0402_5%~D

2.2K_0402_5%~D

2.2K_0402_5%~D

12

12

BLM18AG121SN1D_0603~D

BLM18AG121SN1D_0603~D

1 2

1 2

BLM18AG121SN1D_0603~D

BLM18AG121SN1D_0603~D

12

R793

R793

R794

R794

L11

L11

L12

L12

1

2

2P_0402_50V8C~D

2P_0402_50V8C~D

1

C253

C253

2

1K_0402_5%~D

1K_0402_5%~D

12

@R175

@

R175

1

DA204U_SOT323-3~D

DA204U_SOT323-3~D

@

@

D7

D7

3

1K_0402_5%~D

1K_0402_5%~D

@R176

@

R176

+5V_RUN

21

3

D8

D8

NC

NC

BAT1000-7-F_SOT23-3~D

BAT1000-7-F_SOT23-3~D

+CRT_VCC

+5V_RUN_CRT

5A_125V_R451005.MRL~D

5A_125V_R451005.MRL~D

@ F2

@

F2

1 2

1 2

1

2

0_1206_5%~D

0_1206_5%~D

1

R171

R171

2

R

G

JVGA_HS
B
+CRT_VCC
JVGA_VS
M_ID2#

C258

C258

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C254

C254

JCRT1

JCRT1

6

11

1
7

12

2
8

16

13

17
3
9

14

4

10
15

5

SUYIN_070546FR015H358ZR~D

SUYIN_070546FR015H358ZR~D

12P_0402_50V8J~D

12P_0402_50V8J~D

12P_0402_50V8J~D

12P_0402_50V8J~D

@C267

@

@C268

1

2

@

1

C267

C268

2

VGA SW for MB/DOCK

VDD
VDD
VDD
VDD
VDD

+3.3V_RUN

4
16
23
29
32

VSYNC_BUF

27

0B1
1B1
2B1
3B1
4B1
5B1
6B1

0B2
1B2
2B2
3B2
4B2
5B2
6B2

25
22
20
18
12
14

26
24
21
19
17
13
15

HSYNC_BUF
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT

VSYNC_DOCK
HSYNC_DOCK
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DAT_DDC2_DOCK
CLK_DDC2_DOCK

VSYNC_DOCK 38
HSYNC_DOCK 38
RED_DOCK 38
GREEN_DOC K 38
BLUE_DOCK 38
DAT_DDC2_DOCK 38
CLK_DDC2_DOCK 38

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

1

C259

C259

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

HSYNC_BUF HSYNC_CRT

+3.3V_RUN

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C262

C262

C261

C261

C260

C260

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C264

C264

C263

C263

2

2

+5V_RUN

21

1 2

C269

C269

1 2

C270

C270

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

D9

D9
SDM10U45-7_SOD523-2~D

SDM10U45-7_SOD523-2~D

+5V_RUN_SYNC

5

A2Y

3

5

A2Y

3

1

P

4

OE#

G

U5

U5
74AHCT1G125GW_SOT353-5~D

74AHCT1G125GW_SOT353-5~D

1

P

4

OE#

G

U6

U6
74AHCT1G125GW_SOT353-5~D

74AHCT1G125GW_SOT353-5~D

1 2

R179 1K_0402_5%~DR179 1K_0402_5%~D

VSYNC_CRTVSYNC_BUF

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

1

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

CRT/Video switch

CRT/Video switch

CRT/Video switch

LA-5472P

LA-5472P

LA-5472P

27 66Wednesday, January 20, 2010

27 66Wednesday, January 20, 2010

27 66Wednesday, January 20, 2010

A00

A00

A00

of

of

of

U131

GPU_CRT_VSYNC53
GPU_CRT_HSYNC53

GPU_CRT_RED53

GPU_CRT_GRN53

GPU_CRT_BLU53

GPU_CRT_DAT_DDC53

GPU_CRT_CLK_DDC53

CRT_SWITCH39

A A

0

1

GPU_CRT_VSYNC
GPU_CRT_HSYNC

GPU_CRT_RED
GPU_CRT_GRN
GPU_CRT_BLU

CRT_SWITCH

GPU_CRT_DAT_DDC
GPU_CRT_CLK_DDC

CRT_SWITCH

ChanelSEL1/SEL2

A=B2

Source

MBA=B1

APR/SPR

U131

1

A0

2

A1

5

A2

6

A3

7

A4

8

SEL1

9

A5

10

A6

30

SEL2

3

GND

11

GND

28

GND

31

GND

33

GPAD

PI3V712-AZLEX_TQFN32_6X3~D

PI3V712-AZLEX_TQFN32_6X3~D

5

4

3

2

1

12

61

+3.3V_ALW2

R317

R317

2

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

Q34A

Q34A

+5VMOD Source

12

5

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

61

Q31A

Q31A

HDD PWR

+15V_ALW

12

R320

R320
100K_0402_5%~D

100K_0402_5%~D

HDD_EN_5V

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q34B

Q34B

5

4

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+5V_ALW+15V_ALW

12

R316

R316
100K_0402_5%~D

100K_0402_5%~D

2

MOD_EN

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q31B

Q31B

4

+5V_ALW

1

G

G

3

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

1

C382

C382

2

2

1

G

G

3

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

1

C378

C378

2

6

2

D

D

Q32

Q32
SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

S

S

+5V_HDD

4 5

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

12

C383

C383

2

+5V_HDD Source

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ODD/HDD CONNECTOR

ODD/HDD CONNECTOR

ODD/HDD CONNECTOR

LA-5472P

LA-5472P

LA-5472P

6

D

D

Q29

Q29
SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

S

S

+5V_MOD +5V_RUN

4 5

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

C379

C379

2

100K_0402_5%~D

100K_0402_5%~D

R322

R322

100K_0402_5%~D

100K_0402_5%~D

12

R318

R318

PJP16

PJP16

1 2

PAD-OPEN 4x4m@

PAD-OPEN 4x4m@

Open

1

PJP15

PJP15

1 2

PAD-OPEN 4x4m@

PAD-OPEN 4x4m@

28 66Wednesday, January 20, 2010

28 66Wednesday, January 20, 2010

28 66Wednesday, January 20, 2010

+5V_RUN

A00

A00

A00

of

of

of

For ODD

JSATA1

JSATA1

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

TYCO_2-1759838-8

TYCO_2-1759838-8

GND1
GND2

14
15

Main SATA +5V Default

For HDD

JSATA2

JSATA2

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21

12V

22

12V

TYCO_1775707-3_RV

TYCO_1775707-3_RV

GND1
GND2

MODC_EN39

HDDC_EN39

100K_0402_5%~D

100K_0402_5%~D

23
24

100K_0402_5%~D

100K_0402_5%~D

12

+3.3V_ALW2

R321

R321

100K_0402_5%~D

100K_0402_5%~D

2

12

R323

R323

R319

R319
100K_0402_5%~D

100K_0402_5%~D

Main SATA +5V Default

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

ODD_DET#

1 2

SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1

SATA_ODD_PRX_DTX_N1

SATA_ODD_PRX_DTX_P1

+5V_MOD

D D

+5V_MOD

1

2

1000P_0402_50V7K~D

1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C376

C376

C377

C377

2

SATA_ODD_PTX_DRX_P1_C15
SATA_ODD_PTX_DRX_N1_C15

SATA_ODD_PRX_DTX_N1_C15

SATA_ODD_PRX_DTX_P1_C15

C311 0.01U_0402_16V7K~DC311 0.01U_0402_16V7K~D

12

C310 0.01U_0402_16V7K~DC310 0.01U_0402_16V7K~D

12

C374 0.01U_0402_16V7K~DC374 0.01U_0402_16V7K~D

12

C375 0.01U_0402_16V7K~DC375 0.01U_0402_16V7K~D

12

ODD_DET#40

+3.3V_RUN

R1239 10K_0402_5%~DR1239 10K_0402_5%~D

Pleace near ODD CONN

C C

+3.3V_RUN

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C435

C435

C436

C436

2

2

DDR_XDP_SMBDAT8,13,14,15,16

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

HDD_SMBDAT
HDD_SMBCLK

DDR_XDP_SMBCLK8,13,14,15,16

HDD_SMBDAT_R

HDD_SMBCLK_R

C385

C385

HDD_SMBDAT40
HDD_SMBCLK40

B B

A A

+3.3V_RUN

1 2

R445 2.2K_0402_5%~DR445 2.2K_0402_5%~D

1 2

R463 2.2K_0402_5%~DR463 2.2K_0402_5%~D

+5V_HDD

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

1

C384

C384

2

2

R1555 0_0402_5%~D@R1555 0_0402_5%~D@

1 2

R1556 0_0402_5%~D@R1556 0_0402_5%~D@

1 2

R1549 0_0402_5%~DR1549 0_0402_5%~D

1 2

R1550 0_0402_5%~DR1550 0_0402_5%~D

1 2

Free Fall Sensor

HDD_FALL_INT118,40
FFS_INT219

HDD_FALL_INT1
FFS_INT2

FFS_INT2 FFS_INT2_Q

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

HDD_SMBDAT_R
HDD_SMBCLK_R

PSATA_PTX_DRX_P0_C15
PSATA_PTX_DRX_N0_C15

PSATA_PRX_DTX_N0_C15
PSATA_PRX_DTX_P0_C15

+3.3V_RUN

G

G

2

13

D

S

D

S

Q118

Q118

U139

U139

DE351DLTR

DE351DLTR

1

VDD_IO

6

VDD

8

INT 1
INT 29GND

12

SDO

13

SDA / SDI / SDO

14

SCL / SPC

7

CS

DE351DLTR8_LGA14_3X5~D

DE351DLTR8_LGA14_3X5~D

C308 0.01U_0402_16V7K~DC308 0.01U_0402_16V7K~D
C307 0.01U_0402_16V7K~DC307 0.01U_0402_16V7K~D

C380 0.01U_0402_16V7K~DC380 0.01U_0402_16V7K~D
C381 0.01U_0402_16V7K~DC381 0.01U_0402_16V7K~D

HDD_DET#15

+5V_HDD

21

D10

D10

SDM10U45-7_SOD523-2~D

SDM10U45-7_SOD523-2~D

2

GND

4

GND

5

GND

10

3

RSVD

11

RSVD

12
12

12
12

12

R329

@R329

@

100K_0402_5%~D

100K_0402_5%~D

+3.3V_RUN

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

+5V_HDD

FFS_INT2_Q

Pleace near HDD CONN

5

4

2

15 mils trace

INT_SPK_R+
INT_SPK_R­INT_SPK_L+

SPEAKER_DET#19

B B

DMIC_CLK24

Close to U16 pin5

PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK

12

R344

@R344

@

47_0402_5%~D

47_0402_5%~D

1

C416

@C416

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

A A

Place closely to Pin 13.

AUD_MIC_SWI TCH37 AUD_HP_NB_SENSE 37,39

INT_SPK_L-

150P_0402_50V8J~D

150P_0402_50V8J~D

DMIC024

1

@

@

C676

C676

2

AUD_SENSE_A

+3.3V_RUN

12

R350

R350
100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

PCH_AZ_CODEC_SDIN015

100P_0402_50V8J~D

100P_0402_50V8J~D

1

2

1

2

100P_0402_50V8J~D

100P_0402_50V8J~D

@C423

@

1

C423

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

150P_0402_50V8J~D

150P_0402_50V8J~D

@

@

C679

C679

AUD_NB_MUTE39

2

Q38A

Q38A

+3.3V_RUN

Close to U16 pin6

12

1

2

Speaker Connector

100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D

@C424

@

@C425

@

1

1

C424

C425

2

2

1U_0603_10V6K~D

1U_0603_10V6K~D

1

1

C405

C405

C402

C402

2

2

PCH_AZ_CODEC_BITCLK15

PCH_AZ_CODEC_SDOUT15

PCH_AZ_CODEC_SYNC15

PCH_AZ_CODEC_RST#15

L4 BLM18BB221SN1D_2P~DL4 BLM18BB221SN1D_2P~D

+3.3V_RUN

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

R343

@R343

@

10_0402_5%~D

10_0402_5%~D

C412

@C412

@

10P_0402_50V8J~D

10P_0402_50V8J~D

39.2K_0402_1%~D

39.2K_0402_1%~D

12

12

R348

R348

3

61

Q38B

Q38B

4

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

@C426

@

C426

+3.3V_RUN

R332 33_0402_5%~D

R332 33_0402_5%~D

1 2

20K_0402_1%~D

20K_0402_1%~D

JSPK1

JSPK1

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

TYCO_1775765-6~D

TYCO_1775765-6~D

connector list: 1775765-6

Place close to JSPK1

INT_SPK_R-

+CODEC_DVDD_CORE

10U_0805_10V6K~D

R1296

R1296
10K_0402_5%~D

10K_0402_5%~D

1 2

C453

C453

10U_0805_10V6K~D

1

C403

C403

2

PCH_AZ_CODEC_BITCLK

PCH_AC_SDIN0_R

DMIC_CLK_R

1

2

R346

R346

2.49K_0402_1%~D

2.49K_0402_1%~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

C417

C417

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C404

C404

1 2

R349

R349

5

1

3

+VDDA_AVDD

12

+3.3V_RUN

12

D1

@D1

@

V I/O

Ground2V BUS

V I/O

IP4223CZ6_SO6~D

IP4223CZ6_SO6~D

1

9

3

6

8

5

10

11

2
4

46

48

47

35

36

7

33
30
26

42

49

R355

R355
100K_0402_5%~D

100K_0402_5%~D

INT_SPK_L+INT_SPK_R+

6

V I/O

5

INT_SPK_L-

4

V I/O

U16

U16

DVDD_CORE

DVDD

DVDD_IO

HDA_BITCLK

HDA_SDI

HDA_SDO

HDA_SYNC

HDA_RST#

DMIC_CLK/GPIO1
DMIC0/GPIO2

DMIC1/GPIO0/SPDIF_OUT_1

SPDIF_OUT_0

EAPD

CAP-

CAP+

DVSS

AVSS
AVSS
AVSS

PVSS

DAP

92HD81B1B5NLGXUAX8_QFN48_7X7~D

92HD81B1B5NLGXUAX8_QFN48_7X7~D

+3.3V_RUN +3.3V_RUN

12

1 2

R50

@R50

@

33_0402_5%~D

33_0402_5%~D

+5V_RUN

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_or_F

HP1_PORT_B_L

HP1_PORT_B_R

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

AVDD
AVDD

PVDD
PVDD

SENSE_A
SENSE_B

PORT_C_L

PORT_C_R

VREFOUT_C

PORT_E_L
PORT_E_R

PORT_F_L
PORT_F_R

PC_BEEP

MONO_OUT

CAP2

VREFFILT

VREG

1

2

27
38

39
45

13
14

28
29
23

31
32

19
20
24

40
41

43
44

15
16

17
18

12

25

22

21

34

V-

37

Place closely to Pin 34

+3.3V_RUN

12

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

R365

R365
100K_0402_5%~D

100K_0402_5%~D

RST#PCH_AZ_CODEC_RST#

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C433

C433

AUD_SENSE_A
AUD_SENSE_B

INT_SPK_L+
INT_SPK_L-

INT_SPK_R­INT_SPK_R+

AUD_DOCK_HP_OUT_R

AUD_DOCK_MIC_IN_L
AUD_DOCK_MIC_IN_R

CAP2

VREFFILT

1

C457

C457

2

R353

R353
100K_0402_5%~D

100K_0402_5%~D

L70

L70

47UH_CBMF1608T470K_10%~D

47UH_CBMF1608T470K_10%~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1U_0603_10V6K~D

1U_0603_10V6K~D

1

1

C399

C399

C454

C454

2

2

AUD_EXT_MIC_L 37
AUD_EXT_MIC_R 37

+VREFOUT

AUD_HP_OUT_L 37
AUD_HP_OUT_R 3 7

AUD_PC_BEEP

1

1

C414

C414

C455

C455

2

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

AUD_SENSE_B

39.2K_0402_1%~D

39.2K_0402_1%~D

12

R352

R352

61

2

Q40A

Q40A

Close pin 24 Close pin 18 Close pin 25

12

+VDDA_AVDD

+VDDA_PVDD

1U_0603_10V6K~D

1U_0603_10V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C456

C456

C401

C401

2

2

R340

R340

2K_0402_1%~D

2K_0402_1%~D

1 2
1 2

R342

R342

2K_0402_1%~D

2K_0402_1%~D

C408 1U_0603_10V6K~DC408 1U_0603_10V6K~D

1 2
1 2

C409 1U_0603_10V6K~DC409 1U_0603_10V6K~D

C389 0.1U_0402_16V4Z~DC389 0.1U_0402_16V4Z~D

C394 0.1U_0402_16V4Z~DC394 0.1U_0402_16V4Z~D

1U_0603_10V6K~D

1U_0603_10V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

2

BLM21PG600SN1D_0805~D

BLM21PG600SN1D_0805~D

1 2

1 2

BLM21PG600SN1D_0805~D

BLM21PG600SN1D_0805~D

10U_0805_10V6K~D

10U_0805_10V6K~D

1

2

1

C458

C458

C429

C429

2

2

+3.3V_RUN

+5V_RUN

L77

L77

L3

L3

C400

C400

C1893 1000P_0402_50V7K~DC1893 1000P_0402_50V7K~D

1 2

C1894 1000P_0402_50V7K~DC1894 1000P_0402_50V7K~D

1 2

AUD_DOCK_HP_L_RAUD_DOCK_HP_OUT_L

AUD_DOCK_HP_L_R
AUD_DOCK_HP_R_R

C1896 1000P_0402_50V7K~DC1896 1000P_0402_50V7K~D

1 2

C1895 1000P_0402_50V7K~DC1895 1000P_0402_50V7K~D

1 2

DOCK_MIC_IN_L_C

12

12

0.1U_0402_10V7K~D

10U_0805_10V6K~D

10U_0805_10V6K~D

0.1U_0402_10V7K~D

1

1

C398

C398

C428

C428

2

2

L18

L18

BLM18EG601SN1D_2P~D

BLM18EG601SN1D_2P~D

1 2

+3.3V_RUN

0_0402_5%~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C432

C432

C410 1U_0603_10V6K~DC410 1U_0603_10V6K~D

1 2
1 2

C411 1U_0603_10V6K~DC411 1U_0603_10V6K~D

0_0402_5%~D

1 2

1

XTALI_12MHZ

2

AUD_DOCK_HP_L_C
AUD_DOCK_HP_R_CAUD_DOCK_HP_R_RAUD_DOCK_HP_R_RAUD_DOCK_HP_R_R

R1091 2K_0402_1% ~DR1091 2K_0402_1%~D

1 2

R1092 2K_0402_1% ~DR1092 2K_0402_1%~D

1 2

12

R327 510K_0402_5%~DR327 510K_0402_5%~D

12

R828 510K_0402_5%~DR828 510K_0402_5%~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1U_0603_10V6K~D

1U_0603_10V6K~D

1

C431

C397

C397

1

2

R18

R18

C431

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1U_0603_10V6K~D

1U_0603_10V6K~D

1

C392

C392

C393

C393

2

1

C1066

4700P_0402_25V7K~D@C1066

4700P_0402_25V7K~D

2

@

4

VDD

3

OUT

12MHZ_15PF_SIT8102AC3333E12T~D

12MHZ_15PF_SIT8102AC3333E12T~D

AUD_DOCK_MIC_IN_L_R
AUD_DOCK_MIC_IN_R_RDOCK_MIC_IN_R_C

SPKR 15

BEEP 40

Resistor SENSE_A SENSE_B

39.2K

20K

1

C415

C415

10K

2

5.11K

1U_0603_10V6K~D

1U_0603_10V6K~D

10U_0805_10V6K~D

10U_0805_10V6K~D

2.49K

20K_0402_1%~D

20K_0402_1%~D

1

12

R351

R351

2

3

5

Q40B

Q40B

4

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

R347

R347

2.49K_0402_1%~D

2.49K_0402_1%~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

C420

C420

+3.3V_RUN

PORT A (HP0)

PORT B (HP1)

PORT C

SPDIFOUT0

Pull-up to AVDD

+VDDA_AVDD

12

12

R354

R354
100K_0402_5%~D

100K_0402_5%~D

PORT E

PORT F

DMIC0

SPDIFOUT1 (DMIC0)

EN_I2S_NB_CODEC#39

DOCK_MIC_DET 39DOCK_HP_DET39

1U_0603_10V6K~D

1U_0603_10V6K~D

1

C463

C463

2

C1067

4700P_0402_25V7K~D@C1067

4700P_0402_25V7K~D

@

X4

X4

ST/OE

GND

R1090 10M_0402_5%~D@ R1090 10M_0402_5%~D@

R1089 10M_0402_5%~D@ R1089 10M_0402_5%~D@

+3.3V_RUN

1

+3.3V_RUN_I2S_V DD

+1.8V_RUN

+3.3V_RUN_IOVDD

I2S_BCLK
I2S_DI#
XTALI_12MHZ

AUD_DOCK_HP_L_C

AUD_DOCK_HP_R_C

RST#

1

DAI_GPU_R3P_SMBCL K

2

DAI_GPU_R3P_SMBDAT

I2S_LRCLK

1

2

12

12

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

C413

C413

2

1

I2S_BCLK

I2S_LRCLK

I2S_DO

XTALI_12MHZ

12

R345

R345
1K_0402_5%~D

1K_0402_5%~D

1

25

AVDD

18

DRVDD

24

DRVDD

32

DVDD

7

IOVDD

2

BCLK

4

DIN

1

MCLK

10

LINEL

12

LINER

31

RESET#

8

SCL

9

SDA

3

WCLK

TLV320AIC3004IRHBR_QFN32_5X5~D

TLV320AIC3004IRHBR_QFN32_5X5~D

U17

U17

16

VCC

2

1A

1Y#

4

2A

2Y#

6

3A

3Y#

10

4A

4Y#

12

5A

5Y#

14

6A

6Y#

1

OE1#

15

GND

OE2#

CD74HC366M96_SO16~D

CD74HC366M96_SO16~D

U15

U15

I2S_DO

5

DOUT

AUD_DOCK_MIC_IN_L_R

27

LEFT_LO

RIGHT_LO

DAI_GPU_R3P_SMBCLK 40,53

DAI_GPU_R3P_SMBDAT 40,53

+3.3V_RUN

DA204U_SOT323-3~D

DA204U_SOT323-3~D

2

3

@

@

D17

D17

1

3

5

7

9

11

I2S_DI#

13

8

AVSS1
AVSS2

DRVSS

DVSS

GPAD

3

1

+3.3V_RUN

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

AUD_DOCK_MIC_IN_R_R

29

20
19
22
23
28
11
13
14
16
15
30

17
26

21

6

33

DA204U_SOT323-3~D

DA204U_SOT323-3~D

2

3

@

@

D18

D18

2

3

1

2

1

D20

D20
DA204U_SOT323-3~D@

DA204U_SOT323-3~D@

Close pin 32

+1.8V_RUN

DA204U_SOT323-3~D

DA204U_SOT323-3~D

2

3

@

@

D19

D19

1

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C430

C430

2

2

DA204U_SOT323-3~D

DA204U_SOT323-3~D

@

@

D55

D55

DAI_BCLK# 38

DAI_LRCK# 38

DAI_DO# 38

DAI_12MHZ# 38

DAI_DI 38

1U_0603_10V6K~D

1U_0603_10V6K~D

C459

C459

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Azalia (HD) Codec

Azalia (HD) Codec

Azalia (HD) Codec

LA-5472P

LA-5472P

LA-5472P

29 66Wednesday, January 20, 2010

29 66Wednesday, January 20, 2010

29 66Wednesday, January 20, 2010

of

of

of

A00

A00

A00

5

+3.3V_LAN

R75

@R75

@

1 2

R76

@R76

@

1 2

D D

PM_LANPHY_ENABLE19

C C

TP_LAN_JTAG_TMS

10K_0402_5%~D

10K_0402_5%~D

TP_LAN_JTAG_TCK

10K_0402_5%~D

10K_0402_5%~D

LANCLK_REQ#15,16

PCIE_PRX_GLANTX_P616

+3.3V_LAN

1 2

R42 0_0402_5%~DR42 0_0402_5%~D

25MHZ_18PF_1Y725000CE1A~D

25MHZ_18PF_1Y725000CE1A~D

2

C475

C475

1

33P_0402_50V8J~D

33P_0402_50V8J~D

Need to verify A3 silicon drive
power before removing C427

PCIE_PRX_GLANTX_N616
PCIE_PTX_GLANRX_P6_C16
PCIE_PTX_GLANRX_N6_C16

12

R44

R44
10K_0402_5%~D

10K_0402_5%~D

12

R56

@R56

@

10K_0402_5%~D

10K_0402_5%~D

C427 10P_0402_50V8J~DC427 10P_0402_50V8J~D

Y2

Y2

1 2

12

1

C476

C476

2

33P_0402_50V8J~D

33P_0402_50V8J~D

1 2

R1528 0_0402_5%~DR1528 0_0402_5%~D

PLTRST_LAN#18

CLK_PCIE_LAN16
CLK_PCIE_LAN#16

C451 0.1U_0402_10V7K~DC451 0.1U_0402_10V7K~D

C452 0.1U_0402_10V7K~DC452 0.1U_0402_10V7K~D

LAN_SMBCLK16

LAN_SMBDATA16

SMBus Device Address 0xC8

LAN_DISABLE#_R39

PAD~D@

PAD~D@

T176

T176

PAD~D@

PAD~D@

T177

T177

12

R59

R59

1K_0402_5%~D

1K_0402_5%~D

4

+3.3V_RUN

10K_0402_5%~D

10K_0402_5%~D

12

R699

R699

CLK_PCIE_LAN
CLK_PCIE_LAN#

PCIE_PRX_GLANTX_P6_C

12

PCIE_PRX_GLANTX_N6_C

12

LAN_SMBCLK
LAN_SMBDATA

LAN_DISABLE#_R

LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK

XTALO
XTALI

LAN_TEST_EN

RES_BIAS

12

R1200

R1200

3.01K_0402_1%~D

3.01K_0402_1%~D

U79

LANCLK_REQ#_R

R1200 Resistor Value:

3.01 kohm for Hanksville-M LOM

2.37 kohm for Hanksville-D LOM

U79

48

CLK_REQ_N

36

PE_RST_N

44

PE_CLKP

45

PE_CLKN

38

PETp

39

PETn

41

PERp

42

PERn

28

SMB_CLK

31

SMB_DATA

3

LAN_DISABLE_N

26

LED0

27

LED1

25

LED2

32

JTAG_TDI

34

JTAG_TDO

33

JTAG_TMS

35

JTAG_TCK

9

XTAL_OUT

10

XTAL_IN

30

TEST_EN

12

RBIAS

WG82577LM-QLDT-A2_QFN48_6X6~D

WG82577LM-QLDT-A2_QFN48_6X6~D

JTAG LED

JTAG LED

PCIE

PCIE

SMBUS

SMBUS

RSVD_VCC3P3_1
RSVD_VCC3P3_2

MDI_PLUS0

MDI_MINUS0

MDI_PLUS1

MDI_MINUS1

MDI

MDI

MDI_PLUS2

MDI_MINUS2

MDI_PLUS3

MDI_MINUS3

VDD3P3_IN

VDD3P3_OUT

VDD3P3_15
VDD3P3_19
VDD3P3_29

VDD1P0_47
VDD1P0_46
VDD1P0_37

VDD1P0_43

VDD1P0_11

VDD1P0_40
VDD1P0_22
VDD1P0_16

VDD1P0_8

CTRL_1P0

VSS_EPAD

VCT

13
14

17
18

20
21

23
24

6

+RSVD_VCC3P3_1

1

+RSVD_VCC3P3_2

2
5

+3.3V_LAN_OUT

4

+3.3V_LAN_OUT_R

15
19
29

47
46
37

43

11

40
22
16
8

REGCTL_PNP10

7

49

3

LAN_TX0+
LAN_TX0-

LAN_TX1+
LAN_TX1-

LAN_TX2+
LAN_TX2-

LAN_TX3+
LAN_TX3-

R70 3.01K_0402_1%~DR70 3.01K_0402_1%~D

R1291 3.01K_0402_1%~DR1291 3.01K_0402_1%~D

+1.0V_LAN_4

+1.0V_LAN_3

+1.0V_LAN_2

12
12

12

R693 0_0603_5%~DR693 0_0603_5%~D

R694 0_0603_5%~DR694 0_0603_5%~D

R695 0_0603_5%~DR695 0_0603_5%~D

R696 0_0603_5%~DR696 0_0603_5%~D

2

+1.05V_M for VC10 not the
correct or complete
implementation to connect to
+1.05V SVR.

4.99K_0402_1%~D

4.99K_0402_1%~D

Trace=12mil

REGCTL_PNP10

+3.3V_LAN

1

C786

C786
1U_0603_10V6K~D

1U_0603_10V6K~D

2

+1.0V_LAN +1.0V_LAN

12

12

12

+1.0V_LAN_2 +1.0V_LAN_3 +1.0V_LAN_4

1

C477

C477

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

R73

R73

1 2

0_0402_5%~D

0_0402_5%~D

1

1

C801

C801

C800

C800

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C478

C478

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

+3.3V_LAN

R370

R370

0_1210_5%~D

0_1210_5%~D

1 2

12

R371

Trace=12mil

1

R371

0_1210_5%~D

0_1210_5%~D

+3.3V_LAN_R

3

Q45

Q45

DCP69A-13_SOT223-3~D

DCP69A-13_SOT223-3~D

2

4

12

1

R72

R72

2

C1118

C1118

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

1

C803

C803

C802

C802

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C479

C479

C480

2

C480

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

1

2

C804

C804

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C465

C465

+1.0V_LAN

1

C805

C805

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C466

C466

1

2

+1.05V_M

R119

@R119

@

0_0805_5%~D

0_0805_5%~D

1 2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

C474

C474

1

1

C806

C806

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+3.3V_M

R373

@R373

@

0_1210_5%~D

+3.3V_LAN

B B

1 2

L20 22NH_0603CS-220EJTS_5%~DL20 22NH_0603CS-220EJTS_5%~D

1 2

L21 22NH_0603CS-220EJTS_5%~DL21 22NH_0603CS-220EJTS_5%~D

LAN_TX1+

1 2

L22 22NH_0603CS-220EJTS_5%~DL22 22NH_0603CS-220EJTS_5%~D

LAN_TX1-

1 2

L23 22NH_0603CS-220EJTS_5%~DL23 22NH_0603CS-220EJTS_5%~D

1 2

L24 22NH_0603CS-220EJTS_5%~DL24 22NH_0603CS-220EJTS_5%~D

LAN_TX2-

1 2

L25 22NH_0603CS-220EJTS_5%~DL25 22NH_0603CS-220EJTS_5%~D

1 2

L26 22NH_0603CS-220EJTS_5%~DL26 22NH_0603CS-220EJTS_5%~D

LAN_TX3-

1 2

L27 22NH_0603CS-220EJTS_5%~DL27 22NH_0603CS-220EJTS_5%~D

DOCKED

DOCKED39

A A

Layout Notice : Place bead as
close PI3L720 as possible

FROM NIC DOCKED

5

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

2

C461

C461

C460

C460

1

1

LAN_TX0+RLAN_TX0+

LAN_TX0-RLAN_TX0-

LAN_TX1+R

LAN_TX1-R

LAN_TX2+RLAN_TX2+

LAN_TX2-R

LAN_TX3+RLAN_TX3+

LAN_TX3-R

LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#

1: TO DOCK

0: TO RJ45

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

C462

C462

1

39

U25

U25

2

A0+

3

A0-

6

A1+

7

A1-

9

A2+

10

A2-

11

A3+

12

A3-

13

SEL

15

LEDA0

16

LEDA1

42

LEDA2

5

PD

43

PAD_GND

PI3L720ZHEX_TQFN42_9X3P5~D

PI3L720ZHEX_TQFN42_9X3P5~D

VDD1VDD4VDD8VDD14VDD21VDD30VDD

4

LAN ANALOG
SWITCH

38

B0+

37

B0-

34

B1+

33

B1-

29

B2+

28

B2-

25

B3+

24

B3-

17

LEDB0

18

LEDB1

41

LEDB2

36

C0+

35

C0-

32

C1+

31

C1-

27

C2+

26

C2-

23

C3+

22

C3-

19

LEDC0

20

LEDC1

40

LEDC2

SW_LAN_TX0+
SW_LAN_TX0-

SW_LAN_TX1+
SW_LAN_TX1-

SW_LAN_TX2+
SW_LAN_TX2-

SW_LAN_TX3+
SW_LAN_TX3-

LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#

DOCK_LOM_TRD0+
DOCK_LOM_TRD0-

DOCK_LOM_TRD1+
DOCK_LOM_TRD1-

DOCK_LOM_TRD2+
DOCK_LOM_TRD2-

DOCK_LOM_TRD3+
DOCK_LOM_TRD3-

DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#

SW_LAN_TX0+ 37
SW_LAN_TX0- 37

SW_LAN_TX1+ 37
SW_LAN_TX1- 37

SW_LAN_TX2+ 37
SW_LAN_TX2- 37

SW_LAN_TX3+ 37
SW_LAN_TX3- 37

LAN_ACTLED_YEL# 37
LED_100_ORG# 37
LED_10_GRN# 37

DOCK_LOM_TRD0+ 38
DOCK_LOM_TRD0- 38

DOCK_LOM_TRD1+ 38
DOCK_LOM_TRD1- 38

DOCK_LOM_TRD2+ 38
DOCK_LOM_TRD2- 38

DOCK_LOM_TRD3+ 38
DOCK_LOM_TRD3- 38

DOCK_LOM_ACTLED_YEL# 38
DOCK_LOM_SPD100LED_ORG# 38
DOCK_LOM_SPD10LED_GRN# 38

3

TO
DOCK

AUX_ON40

SIO_SLP_LAN#17,39

LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#

R2

R2

1 2

1 2

R47 0_0402_5%~D@ R47 0_0402_5%~D@

12

10K_0402_5%~D

10K_0402_5%~D

@

@

R392

R392

0_0402_5%~D

0_0402_5%~D

+3.3V_LAN

10K_0402_5%~D

10K_0402_5%~D

12

12

@

@

R393

R393

2

+3.3V_ALW2

2

10K_0402_5%~D

10K_0402_5%~D

@

@

R394

R394

12

R1311

R1311

100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

61

Q184A

Q184A

+15V_ALW

12

R1310

R1310

100K_0402_5%~D

100K_0402_5%~D

ENAB_3VLAN

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q184B

Q184B

5

4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Intel 82577/82578 (Hanksville) / LAN SW

Intel 82577/82578 (Hanksville) / LAN SW

Intel 82577/82578 (Hanksville) / LAN SW

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Q2

Q2

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

D

D

6

S

S

45
2
1

G

G

3

2200P_0402_50V7K~D

2200P_0402_50V7K~D

1

C1414

C1414

2

LA-5472P

LA-5472P

LA-5472P

1

0_1210_5%~D

1 2

+3.3V_LAN+3.3V_ALW

1

1

C481

C481

C482

C482

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

A00

A00

30 66Wednesday, January 20, 2010

30 66Wednesday, January 20, 2010

30 66Wednesday, January 20, 2010

A00

of

of

of

+3.3V_ALW

1 2

R1059 10K_0402_5%~D@ R1059 10K_0402_5%~D@

1 2

R841 4.7K_0402_5%~D5@ R841 4.7K _0402_5%~D5@

1 2

R474 4.7K_0402_5%~D@R474 4.7K_0402_5%~D@

1 2

R843 4.7K_0402_5%~DR843 4.7K_0402_5%~D

1 2

R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D

1 2

R626 2.2K_0402_5%~DR626 2.2K_0402_5%~D

D D

C C

B B

A A

1 2

R629 2.2K_0402_5%~DR629 2.2K_0402_5%~D

1 2

R630 4.7K_0402_5%~DR630 4.7K_0402_5%~D

1 2

R637 4.7K_0402_5%~DR637 4.7K_0402_5%~D

USBP7+

R884

R884

1.5K_0402_5%~D

1.5K_0402_5%~D

USB_GPIO27

R482

R482

1 2

0_0402_5%~D@

0_0402_5%~D@

1 2

@

@

R486 10M _0402_5%~D

R486 10M _0402_5%~D

Y3

Y3

1

IN

2

GND

1

27.12MHZ_12PF_1N227120CC0B~D

27.12MHZ_12PF_1N227120CC0B~D
C608

C608
12P_0402_50V8J~D

12P_0402_50V8J~D

2

+3.3V_ALW

1 2

R537 4.7K _0402_5%~DR537 4.7K_0402_5%~D

1 2

R532 4.7K _0402_5%~DR532 4.7K_0402_5%~D

@

T143PAD~D@T143PAD~D

+SC_VCC

0.22U_0402_6.3V6K~D

0.22U_0402_6.3V6K~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

@C1031

@

1

1

C646

C646

C1031

2

2

1 2

R1468

R1468

1.5K_0402_5%~D

1.5K_0402_5%~D

Q209

Q209

SI2301BDS-T1-E3_SO T23-3~D

SI2301BDS-T1-E3_SO T23-3~D

12

OUT

GND

SC_RST
SC_CLK
SC_C4

SC_IO
SC_C8
SC_DET

5

PLTRST1#_USH

USH_LPCEN

LPD#

IRQ_SERIRQ_R

USH_SMBCLK

USH_SMBDAT

BCM5882_ALERT#

USH_PWR_STATE#

USBH_OC1

+3.3V_ALW_PCH

4.7K_0402_5%~D

4.7K_0402_5%~D

S

S

1 2

G

G

2

D

D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

1 3

13

D

D

Q210

Q210

S

S

R481 0_0402_5%~DR481 0_0402_5%~D

1 2

XOXI

3

4

1

2

R1515

R1515

USB_GPIO27

2

G

G

C609

C609
15P_0402_50V8J~D

15P_0402_50V8J~D

REF_XOUT

REF_XIN

USBP7-18
USBP7+18

CLK_PCI_TPM16

LPC_LAD015,32,39,40
LPC_LAD115,32,39,40
LPC_LAD215,32,39,40

LPC_LAD315,32,39,40
LPC_LFRAME#15,32,39,40
IRQ_SERIRQ15,32,39,40

PLTRST_USH#18

SP_TPM_LPC_EN32,39

USH_SMBCLK40
USH_SMBDAT40
BCM5882_ALERT#39

USH_PWR_STATE#39

12

PCI_TPM_TERM

2

1

Smart Card

PORADJ

PORADJ

CLKDIV1

PORADJ
CLKDIV1
CLKDIV2

BCM5882_SCRST
SCC_CMDVCC_N
BCM5882_GPIO25
BCM5882_GPIO26

AUX1UC
AUX2UC
BCM5882_IO
BCM5882_SCDET

BCM5882_SCCLK

SC_VCC should be 3X wide as
regular SC trace width to carry
~60mA max. current per ISO spec
C1031 and C646 should be placed
very close to SC cage pin

12
11

10

9
8
7
6
5
4
3
2
1

FCI_10089709-010010LF~D

FCI_10089709-010010LF~D

R538 4.7K _0402_5%~D@R538 4.7K_0402_5%~D@

R553 4.7K _0402_5%~DR553 4.7K_0402_5%~D

U33

U33

18

PORadj

6

CLKDIV1

7

CLKDIV2

3

RSTIN

5

CMDVCCN

2

EN_5V/3VN

4

EN_1.8VN

21

AUX1UC

22

AUX2UC

20

I/OUC

19

OFFN

23

XTAL1

25

GPAD

TDA8034HN_HVQFN24_4X4~D

TDA8034HN_HVQFN24_4X4~D

JSC1

JSC1

GND
GND

SPI_CS

10
9

SPI_RXD

8
7
6
5
4
3
2
1

5

1 2

1 2

CLKDIV2

VDD(intf)

VDD

VDDP

VCC

RST
CLK

I/O
AUX1
AUX2

PRESN

XTAL2

GND

U14

@U14

@

1

/CS

2

DO

3

/WP

GND4DIO

W25X32VSSIG_SO8~D

W25X32VSSIG_SO8~D

JTAG_RST#_USH

1 2

R737 1K _0402_5%~DR737 1K_0402_5%~D

R483 4.7K _0402_5%~D6@ R483 4.7K_0402_5%~D6@

10_0402_5%~D

10_0402_5%~D

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

USH_LPCEN

1 2

R468 0_0402_5%~DR468 0_0402_5%~D

1 2

R469 0_0402_5%~DR469 0_0402_5%~D

1 2

CLK_PCI_TPM
LPC_LAD0

R615 0_0402_5%~DR615 0_0402_5%~D

LPC_LAD1

R618 0_0402_5%~DR618 0_0402_5%~D

LPC_LAD2

R619 0_0402_5%~DR619 0_0402_5%~D

LPC_LAD3

R620 0_0402_5%~DR620 0_0402_5%~D

LPC_LFRAME#

R621 0_0402_5%~DR621 0_0402_5%~D

R842 0_0402_5%~D@ R842 0_0402_5%~D@

1 2

R1048 0_0402_5%~DR1048 0_0402_5%~D

1 2

R466 0_0402_5%~DR466 0_0402_5%~D

1 2

SC_DET

R1460 150_0402_5%~DR1460 150_0402_5%~D

1 2

@

T147PAD~D@T147PAD~D

1 2

R1049 0_0402_5%~DR1049 0_0402_5%~D

CLK_PCI_TPM

R744

R744

C589

C589

SCC_CMDVCC_N_R SCC_CMDVCC_N

1

2

1
17

16

15

+SC_VCC

R773 0_0402_5%~DR773 0_0402_5%~D

14

1 2

R772 47_0402_5%~DR772 47_0402_5%~D

13

1 2

R491 100_0402_5%~DR491 100_0402_5%~D

1 2

9

R493 0_0402_5%~DR493 0_0402_5%~D

1 2

10

R492 0_0402_5%~DR492 0_0402_5%~D

1 2

11

R1459 0_0402_5%~DR1459 0_0402_5%~D

1 2

8

24

12

Place C718 close
to U33 pin15

8

VCC

7

/HOLD

6

CLK

5

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C622

C622

+SC_VCC

SPI_RST

SPI_CLKBCM5882_GPIO15

SPI_TXD

1

2

1

2

+3.3V_ALW

1 2

R738 1K _0402_5%~DR738 1K_0402_5%~D

1 2

R739 1K _0402_5%~DR739 1K_0402_5%~D

1 2

R743 1K _0402_5%~DR743 1K_0402_5%~D

R776 0_0402_5%~D@R776 0_0402_5%~D@

+3.3V_ALW

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C620

C620

1

2

.47U_0402_6.3V6-K~D

.47U_0402_6.3V6-K~D

C718

C718

SPI_TXD
SPI_CLK
SPI_RST
SPI_CS

1 2
1 2
1 2
1 2
1 2

10U_0805_10V6M~D

10U_0805_10V6M~D

C706

C706

10P_0402_50V8J~D

10P_0402_50V8J~D

BCM5882_GPIO15

4

USBP7-_R
USBP7+_R
USB_GPIO27

IRQ_SERIRQ_R

PLTRST1#_USH
USH_LPCEN

LPD#

USH_SMBCLK
USH_SMBDAT
BCM5882_ALERT#

SMB_GPIO1

USH_PWR_STATE#_R

12

SBOOT
POR_EXTR

+5V_ALW

10U_0805_10V6M~D

10U_0805_10V6M~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

C1014

C1014

2

1

SC_RST
SC_CLK
SC_IO
SC_C4
SC_C8
SC_DET

10P_0402_50V8J~D

10P_0402_50V8J~D

C633

C633

C1015

C1015

2

2

1

1

+3.3V_ALW

1 2

R638 4.7K_0402_5%~DR638 4.7K_0402_5%~D

U34

U34

1

D

2

C

3

RESET#

4

S#

M45PE16-VMW6T G_SO8W8~D

M45PE16-VMW6T G_SO8W8~D

1 2

R341 4.7K _0402_5%~DR341 4.7K_0402_5%~D

4

U32A

U32A

P5

USBD_DN

P6

USBD_UP

N7

USBD_ATTACH_GPIO_27

P2

LCLK

N3

LAD0_GPIO_20

M4

LAD1_GPIO_21

K5

LAD2_GPIO_22

N4

LAD3_GPIO_23

K4

LFRAME_N_GPIO_18

L4

LSERIRQ_GPIO_19

M3

LRESET_N_GPIO_17

M5

LPCEN

N6

LPCPD_N_GPIO_24

M9

SMBCLK

L9

SMBDAT

K9

SMBALERT_N

M7

SMB_GPIO_0

N8

SMB_GPIO_1

L7

WAKEUP_N

K1

IDDQ_EN

P1

CORE_PWRDN

E12

ALDO_PWRDN

C709

C709

+3.3V_ALW

+3.3V_ALW

SPI_RST

8

Q

7

VSS

6

VCC

5

W#

BCM5882

BCM5882

LPC

LPC

SM BUS

SM BUS

+3.3V_ALW

5.1M_0402_5%~D

5.1M_0402_5%~D

4.7K_0402_5%~D

4.7K_0402_5%~D

R485

R485

1 2

1 2

3.3M_0402_5%~D

3.3M_0402_5%~D

1 2

RFREADER_RXP

3

2

D31 DA204U_S OT323-3~D@D31 DA204U_SOT323-3~D@

3

2

D33 DA204U_S OT323-3~D@D33 DA204U_SOT323-3~D@

RFREADER_RXN

Component

R494,R498

R555,R633

+3.3V_ALW

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C644

C644

1

D28,D29 POP

2

D31-D34

SPI_RXD

BCM5882_GPIO15

USBH_DN_0
USBH_UP_0

USBH_OC_0

USBH_DN_1
USBH_UP_1

USBH_OC_1

SSP_CLK0_GPIO_6
SSP_FSS0_GPIO_7
SSP_RXD0_GPIO_8
SSP_TXD0_GPIO_9

SSP_CLK1_GPIO_10
SSP_FSS1_GPIO_11

SSP_RXD1_GPIO_12

SPI

SPI

SSP_TXD1_GPIO_13

SC_CLK
SC_FCB

SC_SEL5V_GPIO_25

SC_SEL18V_GPIO_26

SC_DET

SC_RST
SC_PWR_N14
SC_PWR_P14

SC_VCC

Smard Card

Smard Card

BCM5882KFBG_FBG A196~D

BCM5882KFBG_FBG A196~D

+1.2V_ALW_AVDD

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

R476

R476

2

C601

C601

1

R488

R488

1U_0603_10V7K~D

1U_0603_10V7K~D

1

1

1U_0603_10V7K~D

1U_0603_10V7K~D

RFID MODE

NOPOP

3K

R634

NOPOP

NOPOP

POP

BLM18BB100SN1D_2P~D

BLM18BB100SN1D_2P~D

L38

L38

3.3U_0603_10V6K~D

3.3U_0603_10V6K~D

1

C630

C630

2

SC_IO

C639

C639

FP_USBD-

P7

FP_USBD+

P8

USBH_OC0#

P9

P11
P12

USBH_OC1

P10

SPI_CLK

G3

SPI_CS

G2

SPI_RXD

H1

SPI_TXD

H2

BCMGPIO_10

C3

BCMGPIO_11

B2

BCMGPIO_12

A2

BCMGPIO_13

A1

R472 0_0402_5%~DR472 0_0402_5%~D

M11

R533 0_0402_5%~DR533 0_0402_5%~D

M12

R767 0_0402_5%~DR767 0_0402_5%~D

F2

R766 0_0402_5%~DR766 0_0402_5%~D

F1

R774 0_0402_5%~DR774 0_0402_5%~D

M2

R608 0_0402_5%~DR608 0_0402_5%~D

L11

R771 0_0402_5%~DR771 0_0402_5%~D

M10
N14
P14

SC_TEST

L10

+2.5V_ALW_AVDD

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

2

1

C602

C602

1

2

RFREADER_RXP_C

1 2

C643

C643

1 2

CURRENTVOLTAGE

3K

NOPOP3K

NOPOP

150PC641,C647

NOPOP

12

1U_0603_10V6K~D

1U_0603_10V6K~D

2

C631

C631

1

C1176

C1176

2

1

+3.3V_ALW

RFREADER_RXN_C

+3.3V_ALW

3

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C605

C605

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

3

12
12
12
12
12
12
12

+SC_PWR

0_0402_5%~D

0_0402_5%~D

2

1

C632

C632

+3.3V_ALW

1 2

R810 4.7K _0402_5%~DR810 4.7K_0402_5%~D

1 2

R484 4.7K _0402_5%~DR484 4.7K_0402_5%~D

1 2

R1034 4.7K_0402_5%~DR1034 4.7K_0402_5%~D

FP_USBD- 37

FP_USBD+ 37

12

R844 4.7K_0402_5%~DR844 4.7K_0402_5%~D

@

@

T145PAD~D

T145PAD~D

@

@

T148PAD~D

T148PAD~D

@

@

T149PAD~D

T149PAD~D

@

@

T150PAD~D

T150PAD~D

SCC_CMDVCC_N

12

R775

R775

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

1

C606

C606

C1021

C1021

2

2

RFREADER_TXP1

3

2

D32

@D32

@

DA204U_SOT323-3~D

DA204U_SOT323-3~D

RFREADER_TXN1

3

2

@

@

D34

D34

DA204U_SOT323-3~D

DA204U_SOT323-3~D

+2.5V_ALW_AVDD

BLM18BB100SN1D_2P~D

BLM18BB100SN1D_2P~D

L36

L36

1U_0603_10V6K~D

1U_0603_10V6K~D

2

C624

C624

1

RST_N

OVSTB

FP_RESET#

+3.3V_ALW

BCM5882_SCCLK
AUX1UC
BCM5882_GPIO25
BCM5882_GPIO26
BCM5882_SCDET
BCM5882_IO
BCM5882_SCRST

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1177

C1177

Disable RFID: pop R1061-R1065

L71

L71

150NH_LLQ1608-FR15G_2%~D

150NH_LLQ1608-FR15G_2%~D

1 2

1

L72

L72

150NH_LLQ1608-FR15G_2%~D

150NH_LLQ1608-FR15G_2%~D

1 2

1

+RFID_AVDD2P5 +RFID_AVDD1P2+RFID_AVDD3P3

12

1U_0603_10V6K~D

1U_0603_10V6K~D

2

1

C625

C625

1

2

JTAG_CLK_USH

@

@

R895

R895

0_0402_5%~D

0_0402_5%~D

1 2

JTAG_TDI_USH

JTAG_TDO_USH

@

@

R896

R896

0_0402_5%~D

0_0402_5%~D

1 2

JTAG_TMS_USH

JTAG_RST#_USH

@

@

R897

R897

0_0402_5%~D

0_0402_5%~D

1 2

JTCE_USH JTCE_USH

UART_RX/GPIO0

@

@

R894

R894

0_0402_5%~D

0_0402_5%~D

1 2

UART_TX/GPIO1

HF_RX_TEST0

@

@

R907

R907

0_0402_5%~D

0_0402_5%~D

1 2

HF_RX_TEST1

HF_RX_TEST2

@

@

R908

R908

0_0402_5%~D

0_0402_5%~D

1 2

HF_RX_TEST3

R497 0_0402_5%~DR497 0_0402_5%~D
R496 0_0402_5%~DR496 0_0402_5%~D

15K_0402_1%~D

15K_0402_1%~D

12

390P_0603_50V8G~D

390P_0603_50V8G~D

C1070

C1070

1

2

15K_0402_1%~D

15K_0402_1%~D

12

R633

R633

390P_0603_50V8G~D

390P_0603_50V8G~D

C1071

C1071

1

2

+1.2V_ALW_AVDD+3.3V_ALW

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C626

C626

1

2

2

R899

@R899

@

0_0402_5%~D

0_0402_5%~D

1 2

1K_0402_5%~D

1K_0402_5%~D

@R1522

@

R1522

1 2

12
12

C595 should be placed
closer to pin A5

C595 0.01U_0402_25V 7K~DC595 0.01U_0402_25V7K~D

R555

R555

390P_0603_50V8G~D

390P_0603_50V8G~D

C1887

C1887

1

2

placement close to U32 pins: RFREADER_TXN1 &
RFREADER_TXP1, and ESD diodes should be placed
between Pi filter and connector.

390P_0603_50V8G~D

390P_0603_50V8G~D

C1888

C1888

1

2

BLM18BB100SN1D_2P~D

BLM18BB100SN1D_2P~D

12

L37

L37

1U_0603_10V6K~D

1U_0603_10V6K~D

C627

C627

1U_0603_10V6K~D

1U_0603_10V6K~D

1

2

2

REF_XIN
REF_XOUT

RST_N

JTAG_CLK_USH
JTAG_TDI_USH
JTAG_TDO_USH
JTAG_TMS_USH
JTAG_RST#_USH

OVSTB

SCANACCMODE

T158PAD~D@ T158P AD~D@

SBOOT

USH_TESTMODE

POR_EXTR

RFTAG_VRXP
RFTAG_VRXN

1 2

+1.2V_ALW_AVDD

+2.5V_ALW_AVDD

C628

C628

1

U32D

U32D

G14

REFCLK_XTALIN

F14

REFCLK_XTALOUT

G1

RST_N

L1

JTAG_TCK

M1

JTAG_TDI

N1

JTAG_TDO

N2

JTAG_TMS

L3

JTAG_TRSTN

L2

JTCE

E1

OVSTB

E3

SCANACCMODE

E2

SECURE_BOOT

D1

TESTMODE

J14

POR_EXTR

A6
B6

C5

A5

B4

C6
E6

D6
B5

A4

BCM5882

BCM5882

JTAG CLK

JTAG CLK

U32C

U32C

HF_RFIDTAG_VRX_ P
HF_RFIDTAG_VRX_ N

HF_RFIDTAG_VTX

HF_RFIDTAG_VREF

HF_RFIDTAG_DVDD1P 2

HF_RFIDTAG_AVDD2 P5_C6
HF_RFIDTAG_AVDD2 P5_E6

HF_RFIDTAG_AVSS_D6
HF_RFIDTAG_AVSS_B5

HF_RFIDTAG_DVSS

BCM5882

BCM5882

UART_TX_GPIO_1

UART_RX_GPIO_0
UART_CTS_GPIO_2
UART_RTS_GPIO_3

UART

UART

GPIO_4
GPIO_14
GPIO_15
GPIO_16

CLKOUT

RSTOUT_N

POR_MONITOR

PLL_TESTOUT

BCM5882KFBG_FBG A196~D

BCM5882KFBG_FBG A196~D

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

HF_TX_AVDD1P2
HF_RX_AVDD1P2

HF_RX_ADC_AVDD1P2

HF_RX_AVDD2P5
HF_TX_AVDD2P5

HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B 7

HF_TX_AVSS_C7
HF_TX_AVSS_C8
HF_TX_AVSS_E7

HF_RX_AVSS_A9

HF_RX_AVSS_B11

HF_RX_ADC_AVSS1
HF_RX_ADC_AVSS2

BCM5882KFBG_FBG A196~D

BCM5882KFBG_FBG A196~D

NC

SWV

HF_TX_P
HF_TX_N

HF_RX_P
HF_RX_N

UART_TX/GPIO1

D4

UART_RX/GPIO0

C4
B3

CLKDIV1

A3

L14

CONTACTLESS_DET#

J1

SCC_CMDVCC_N_R

D2

BCM5882_GPIO15

C2

CLKDIV2

B1

CLKOUT

D3

SPI_RST

C1

POR_MONITOR

J13

SWV

K11

PLL_TESTOUT

C13

A8
B8

A10
B10

B9
C9
C10
E9

D7
F8
D10

F9
A7

D8
B7

C7
C8
E7

A9
B11

E8
D9

FP_RESET# 37

T154PA D~D

T154PA D~D

T156PAD~D

T156PAD~D

T155PAD~D

T155PAD~D

T157PAD~D

T157PAD~D

RFREADER_TXP1
RFREADER_TXN1

RFREADER_RXP
RFREADER_RXN

HF_RX_TEST0
HF_RX_TEST1
HF_RX_TEST2
HF_RX_TEST3

+RFID_AVDD1P2

+RFID_AVDD2P5

+RFID_AVDD3P3

@

@

@

@

@

@

@

@

RFID

JCS1

JCS1

1

1

1

2

2

3

3

4

4

5

7

5

G1

6

8

6

G2

TYCO_2041084-6~D

TYCO_2041084-6~D

31 66Wednesday, J anuary 20, 2010

31 66Wednesday, J anuary 20, 2010

31 66Wednesday, J anuary 20, 2010

A00

A00

A00

of

of

of

RFREADER_TXN1_PI

CONTACTLESS_DET#15,19

RFREADER_TXP1_PI

Connector list: 2041084-6

Hardware enable for USH TPM:Populate D70 & R841,
No Stuff R483.
Hardware disable for USH TPM:No Stuff D70 &
R841, Populate R483

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

C629

C629

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

USH BCM5882 (1/2)

USH BCM5882 (1/2)

USH BCM5882 (1/2)

LA-5472P

LA-5472P

LA-5472P

5

4

3

2

1

+3.3V_ALW

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

2

C613

C613

C614

C614

1

1

D D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

2

2

C621

C621

C635

C635

1

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C615

C615

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C636

C636

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

2

C616

C616

C617

C617

1

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

2

C637

C637

C638

C638

1

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C618

C618

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C875

C875

1

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1179

C1179

2

1

C619

C619

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C612

C612

USH BCM5882 and China TPM Z8H172T Option

TCM circuit

PART/PIN

SIO 5028 ->SP_TPM_LPC_EN @

Ref Des TCM Enable

All 3@ POP

PU R841

PD R483

POP @

PU R788

C C

PCH GPIO39 ->TPM_ID1

PCH GPIO38 ->TPM_ID0

PU R787

PD R339

PU R273

POP @

POP

PD R922

LOW:Power Down Mode
High:Working Mode

B B

R893 0_0402_5%~D3@ R893 0_0402_5%~D3@

R905 0_0402_5%~D3@ R905 0_0402_5%~D3@
R906 0_0402_5%~D3@ R906 0_0402_5%~D3@

R909 0_0402_5%~D3@ R909 0_0402_5%~D3@

1 2

R901 0_0402_5%~D3@ R901 0_0402_5%~D3@

1 2

R902 0_0402_5%~D3@ R902 0_0402_5%~D3@

1 2

R903 0_0402_5%~D3@ R903 0_0402_5%~D3@

1 2

R904 0_0402_5%~D3@ R904 0_0402_5%~D3@

1 2

1 2
1 2

1 2

JETWAY_PIN5

2

C1175

@C1175

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

SP_TPM_LPC_EN31,39
LPC_LAD015,31,39,40
LPC_LAD115,31,39,40
LPC_LAD215,31,39,40
LPC_LAD315,31,39,40

CLK_PCI_TPM_CHA16

LPC_LFRAME#15,31,39,40

1 2

R1210 4.7K_0402_5%~D@R1210 4.7K_0402_5%~D@

PCH_PLTRST#_EC8,18,34,36,39,40

IRQ_SERIRQ15,31,39,40

CLKRUN#17,39,40

+3.3V_RUN

A A

C_TPM_LPC_EN
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R

LPC_LFRAME#_R
PCI_RST#_R

CLKRUN#_R

TCM_BA1
TCM_BA0

TPM Enable ALL TPM/TCM Disable

@

POP

@

@

@

@@

@

@

@

POP

POP

@

@

POP

@

POP

China TPM: ZTE & Jetway co-lay

U24

3@ U24

3@

28

LPCPD#

26

LAD0

23

LAD1

20

LAD2

17

LAD3

21

LCLK

22

LFRAME#

16

LRESET#

27

SERIRQ

15

CLKRUN#

7

PP

3

BA_1

9

BA_0

SSX44-B_TSSOP28~D

SSX44-B_TSSOP28~D

GND_11
GND_18
GND_25

TCM Vender POP

ZTE

Jetway

R1026, R1023, C23, C1174

C1175, R910

VDD_0
VDD_1
VDD_2

GND_4

NC_5
NC_12
NC_13

NC_1

NC_2

NC_6

NC_8

NC_P

10
19
24

11
18
25
4

5
12
13

1
2
6
8
14

+3.3V_RUN

JETWAY_PIN5

JETWAY_CLK14M

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

3@

3@

C23

C23

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

2

3@

3@

C1171

C1171

1

1

JETWAY_CLK14M 16

2

3@

3@

C1172

C1172

1

TCM_BA0
TCM_BA1

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

3@

3@

C1173

C1173

1

2

+1.2V_ALW_PLL

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C592

C592

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

3@

3@

C1174

C1174

+3.3V_RUN

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

12

12

@R1025

@

@R1022

@

R1025

R1022

1K_0402_5%~D

3@ R1026

1K_0402_5%~D

3@

1K_0402_5%~D

3@ R1023

1K_0402_5%~D

3@

12

12

R1026

R1023

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

C593

C593

2

2

+SC_PWR

C1027

C1027

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+VDDC_5882

2

1

2

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1178

C1178

C596

C596

C873

C873

+1.2V_ALW_PLL

+1.2V_ALW_AVDD

+2.5V_ALW_AVDD

+3.3V_ALW

1

2

2

+1.2V_ALW_PLL

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

2

C597

C597

1

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

C877

C877

2

1

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C1017

C1017

+VDDC_5882

+3.3V_ALW

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C598

C598

1

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C1180

C1180

U32B

U32B

H14

AVDD_1P2I_REF

A11

AVDD_1P2O_A11

A12

AVDD_1P2O_A12

H13

AVDD_2P5I

E10

AVDD_2P5O_E10

E11

AVDD_2P5O_E11

A13

AVDD25_LDO12_A13

B12

AVDD25_LDO12_B12

A14

AVDD25_PLL_A14

D11

AVDD33_LDO25

P13

OTP_PWR

D14

PLL_AVDD_1P2I

E14

PLL_AVDD_1P2O

C14

PLL_DVDD_1P2I

D13

VDDC_D13

F3

VDDC_F3

J4

VDDC_J4

J5

VDDC_J5

J6

VDDC_J6

J7

VDDC_J7

J8

VDDC_J8

J10

VDDC_J10

J11

VDDC_J11

K7

VDDC_K7

K8

VDDC_K8

E4

VDDO_33_E4

J2

VDDO_33_J2

K3

VDDO_33_K3

L8

VDDO_33_L8

N10

VDDO_33_N10

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C599

C599

G4

VDDO_33CORE_G4

H3

VDDO_33CORE_H3

H4

VDDO_33CORE_H4

J3

VDDO_33CORE_J3

M13

VDDO_33SC_M13

N13

VDDO_33SC_N13

L6

VDDO_LPC_L6

M6

VDDO_LPC_M6

K10

VDDO_SC_K10

K12

VDDO_SC_K12

L12

VDDO_SC_L12

L13

VDDO_SC_L13

D5

VDDO_VAR_D5

E5

VDDO_VAR_E5

N5

VESD

BCM5882

BCM5882

AVSS_LDO25_B13
AVSS_LDO25_C12

BCM5882KFBG_FBGA196~D

BCM5882KFBG_FBGA196~D

AVSS_LDO12

AVSS_PLL

AVSS_REF

PLL_AVSS

PLL_DVSS

POR_AVSS

VSSC_F4
VSSC_F5
VSSC_F6

VSSC_F7
VSSC_F10
VSSC_F11
VSSC_F12

VSSC_G5
VSSC_G6
VSSC_G7
VSSC_G8

VSSC_G9
VSSC_G10
VSSC_G11
VSSC_G12

VSSC_H5
VSSC_H6
VSSC_H7
VSSC_H8

VSSC_H9
VSSC_H10
VSSC_H11
VSSC_H12

VSSC_J9

VSSC_J12

VSSC_K2

VSSC_K6
VSSC_K13
VSSC_K14

VSSC_L5

VSSC_M8

VSSC_M14

VSSC_N9
VSSC_N11
VSSC_N12

VSSC_P3

VSSC_P4

C11

B13
C12

B14

F13

D12

E13

G13

F4
F5
F6
F7
F10
F11
F12
G5
G6
G7
G8
G9
G10
G11
G12
H5
H6
H7
H8
H9
H10
H11
H12
J9
J12
K2
K6
K13
K14
L5
M8
M14
N9
N11
N12
P3
P4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

USH BCM5882 (2/2)

USH BCM5882 (2/2)

USH BCM5882 (2/2)

LA-5472P

LA-5472P

LA-5472P

32 66Wednesday, January 20, 2010

32 66Wednesday, January 20, 2010

32 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

D D

Crystal close to U94

12

C514

C514
15P_0402_50V8J~D

15P_0402_50V8J~D

C515

C515
15P_0402_50V8J~D

15P_0402_50V8J~D

12

CLK_PCIE_PCM16

C C

C710,C713 as close
as possible to U94

CPO
RREF

12

1

1

C707

C707

2

0.022U_0402_16V7K~D

0.022U_0402_16V7K~D

C707,C705,R1148 as close
as possible to U94

B B

R1148

R1148

5.1K_0402_1%~D

5.1K_0402_1%~D

C705

C705

2

1500P_0402_7K~D

1500P_0402_7K~D

CLK_PCIE_PCM#16

PCIE_PRX_PCMTX_P316
PCIE_PRX_PCMTX_N316

PCIE_PTX_PCMRX_P3_C16
PCIE_PTX_PCMRX_N3_C16

R8 Close to U94
SDCLK/MMC_CLK
need shield GND

PLTRST_R5U242#18

SDDAT1/MMCDAT1
SDDAT0/MMCDAT0

SDCLK/MMC_CLK

SDCMD/MMCCMD

SDDAT3/MMCDAT3
SDDAT2/MMCDAT2

X3

X3

24.57MHZ_12PF_X5H024576FC1HH~D

24.57MHZ_12PF_X5H024576FC1HH~D

30ppm

1 2

R421

R421

12

100_0402_5%~D

100_0402_5%~D

C710 0.1U_0402_10V7K~DC710 0.1U_0402_10V7K~D

1 2

C713 0.1U_0402_10V7K~DC713 0.1U_0402_10V7K~D

1 2

PLTRST_R5U242#

1 2

R36 0_0402_5%~DR36 0_0402_5%~D

1 2

R35 0_0402_5%~DR35 0_0402_5%~D

1 2

R8 0_0402_5%~DR8 0_0402_5%~D

1 2

R34 0_0402_5%~DR34 0_0402_5%~D

1 2

R32 0_0402_5%~DR32 0_0402_5%~D

1 2

R31 0_0402_5%~DR31 0_0402_5%~D

USBP10-18
USBP10+18

R671

2@ R671

2@

0_0402_5%~D

USBP10-_EXP34
USBP10+_EXP34

0_0402_5%~D

R745

2@ R745

2@

0_0402_5%~D

0_0402_5%~D

+3.3V_RUN

MFIO Pin Assignment Table

MFIO SD8 MS8XD

00

WP
01 D1
02

D0
03

D7
04

D6

05

CLK

06

A A

5

07

CMD

08
09 D4
10
11
12
13

14

-

D5

D3

D2

-

-

-

4

1 2

R1146 0_0402_5%~DR1146 0_0402_5%~D

PCIE_PRX_PCMTX_P3_C
PCIE_PRX_PCMTX_N3_C

SDCD#/MMCCD#

R802

1@ R802

1@

0_0402_5%~D

0_0402_5%~D

R803

1@ R803

1@

0_0402_5%~D

0_0402_5%~D

12
12

D7

-

D6

D1

D5

-

D4
D3

D5

D2

D0

D1

-

D0BSD4

D2

WP#

D6

WE#

D3

ALE

-

CLE
CE#

-

D7

RE#

R/B#

CLK

4

R5U241_XI
R5U241_XO

TPAP0
TPAN0
TPBIAS0
TPBP0
TPBN0
CPS

RXC

SDWP#
SDDAT1/MMCDAT1_R
SDDAT0/MMCDAT0_R
MMCDAT7
MMCDAT6
SDCLK/MMC_CLK_R

MMCDAT5
SDCMD/MMCCMD_R
MMCDAT4
SDDAT3/MMCDAT3_R
SDDAT2/MMCDAT2_R

USBP10-_R1

12

USBP10+_R1

12

U94A

U94A

A8

XI

B8

XO

A5

TPAP0

B5

TPAN0

C7

TPBIAS0

A6

TPBP0

B6

TPBN0

D4

CPS

N8

REFCLKP

M8

REFCLKN

N12

TXP

N13

TXN

N10

RXP

M10

M12

H13
H12
G13
G12

D12
D10
C13
C12

C11

G11
G10

L9
L10
L11

F13
F12

B13

A13
B12
A12

F11

H1
H2

PCIe / Power /

PCIe / Power /

RXN

1394 / MultiCard

1394 / MultiCard

PERST#
RXC
CPO
RREF

MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14

MFCD0#
MFCD1#
MFCD2#

USBDP
USBDM

R5U242-CSP144P_CSP144~D

R5U242-CSP144P_CSP144~D

3

+3.3V_RUN

C10

VCC_3V0

J4

VCC_3V1

K3

VCC_3V2

PCIE_VOUT0
PCIE_VOUT1

C8
J3

M13

PCIE_VIN0

M11

PCIE_VIN1

N11

PCIE_VIN2

D7

AVCC_3V

D13

MF_VOUT

D8

SD18C

K11

AGND0

L12

AGND1

A7

GND0

B7

GND1

C6

GND2

D11

GND3

E12

GND4

E13

GND5

K4

GND8

L8

GND9

M9

GND10

N9

GND11

L5

GND12

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

1

2

1

C695

C695

2

C1890

C1890

R46:
For R5U241 should be 0 ohm,
R5U242 should be 1uF

2A currect caoacity request between
R5U242 and SD slot

C645,Close to U94.C10

C603,Close to U94.J4/K3

C695,Close to U94.M13

1

C697,Close to U94.M11/N11
C698,Close to U94.J3
C699,Close to U94.C8

C603

C603

C645

C645

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

C697

C697

C698

C698

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+3.3V_RUN_CARD

1

C701, C702,Close to U94.D7

C703

C703

2

C703,Close to U94.D13

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+PCIE_PHY

1

C699

C699

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

C700

C700
10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

C702

C702

C701

C701

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+3.3V_RUN

TPAP0
TPAN0
TPBP0
TPBN0

270P_0402_50V7K~D

270P_0402_50V7K~D

2

+5V_RUN

+3.3V_RUN_CARD

1

2

WůĂĐĞĐůŽƐĞƚŽ:^ϭϵ

ϮϭŶĞĞĚƚŽĐŚĂŶŐĞƚŽϰϳƵ&ĨŽƌZϱhϮϰϮ;^yͿ

TPBIAS0

R403

R403

56.2_0402_1%~D

56.2_0402_1%~D

C494

C494

2

1

2

VPPEN034
VPPEN134

VCC3EN#34
VCC5EN#34

47U_0805_6.3V6M~D

47U_0805_6.3V6M~D

+3.3V_RUN

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C21

C21

12

12

Z3008

2

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1@ C495

1@

1

C495

2

1@ C498

1@

C498

VPPEN0
VPPEN1

VCC3EN#
VCC5EN#

+3.3V_RUN_CARD

10P_0402_50V8J~D

10P_0402_50V8J~D

C491

C491

150K_0402_5%~D

150K_0402_5%~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

12

C767

C767

2

56.2_0402_1%~D

56.2_0402_1%~D

56.2_0402_1%~D

56.2_0402_1%~D

12

R398

R398

R399

R399

12

R401

R401

56.2_0402_1%~D

56.2_0402_1%~D

R407

R407

5.1K_0402_1%~D

5.1K_0402_1%~D

1 2

Close to U94

1

+CBS_VCC

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1@ C496

1@

@

@

1

1

C497

C497

U27

1@ U27

1@

11

VCC3IN

13

VCC5IN

15

VCC5IN

3

EN0

4

EN1

2

VCC3_EN

1

VCC5_EN

5

FLG

16

GND

R5531V002-E2-FA_SSOP16~D

R5531V002-E2-FA_SSOP16~D

SDDAT3/MMCDAT3
SDCMD/MMCCMD

SDCLK/MMC_CLK

SDDAT0/MMCDAT0
SDDAT1/MMCDAT1
SDDAT2/MMCDAT2

1

MMCDAT4
MMCDAT5

2

MMCDAT6
MMCDAT7

SDCD#/MMCCD#
SDWP#
SDCD#/MMCCD#
SDWP#

R1464

R1464

VCCOUT
VCCOUT
VCCOUT

VPPOUT

9
14
12

+CBS_VPP

8

7

NC

6

NC

10

NC

14
12
10

9
8
6
4
3

15

13
11

7
5

17
18

2
1

16

19
20

C496

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1@C499

1@

1

1

@

@

C499

C500

C500

2

2

JSD1

JSD1

DAT3/SD1
CMD/SD2
VSS1/SD3
VCC/SD4
CLK/SD5
GND/VSSS2/SD6
DAT7/SD7
DAT1/SD8
DAT2/SD9

DAT4/MMC10
DAT5/MMC11
DAT6/MMC12
DAT7/MMC13

CD_SW/SD
WP_SW/SD
CD_SW_TAISOL/SD
WP/SW _TAISOL/SD

GND_SW

CD_WP_SW/GRD
CD_WP_SW/GRD

FOX_2WX131A1-31DD-7F~D

FOX_2WX131A1-31DD-7F~D

only for MMC/SD

0.33U_0603_10V7K~D

0.33U_0603_10V7K~D

1

C493

C493

2

1394_DET#19

J1394

J1394

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

TYCO_1775765-6~D

TYCO_1775765-6~D

connector list: 1775765-6

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

R5U242 (1/2)

R5U242 (1/2)

R5U242 (1/2)

33 66Wednesday, January 20, 2010

33 66Wednesday, January 20, 2010

33 66Wednesday, January 20, 2010

1

of

of

of

A00

A00

A00

5

U94B

U94B

C9

GND

A10

GND

A9

+3.3V_RUN

12

D D

R1151

R1151
47K_0402_5%~D

47K_0402_5%~D

PCMCLK_REQ#15,16

SPKROUT

SROM: SPKROUT
Pull-Hi: Disable
Pull-Lo: Enable (Default)

12

R1152

@R1152

@

47K_0402_5%~D

47K_0402_5%~D

PWR_ON_RST

C C

Power-On-Reset: GBRST#
(Global Reset)
Note: De-asserted BEFORE
PERST# de-assertion

VPPEN133
VPPEN033
VCC3EN#33
VCC5EN#33

B B

A A

0_0402_5%~D

0_0402_5%~D

+3.3V_RUN

12

1

2

+CBS_VCC

5

R81

R81

1 2

PWR_ON_RST

R1150

R1150
47K_0402_1%~D

47K_0402_1%~D

C708

C708
1U_0603_25V6-K~D

1U_0603_25V6-K~D

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

+CBS_VPP

B9
B11
A11

H10
B10

K13
K12

J13
J12
J11

H11

J10
L13

K9

K10

D9
E10
F10
E11

CBS_CAD0
CBS_CAD1
CBS_CAD3
CBS_CAD5
CBS_CAD7
CBS_CC/BE0#
CBS_CAD9
CBS_CAD11
CBS_CAD12
CBS_CAD14
CBS_CC/BE1#
CBS_CPAR
CBS_CPERR#
CBS_CGNT#
CBS_CINT#

CBS_CCLK
CBS_CIRDY#
CBS_CC/BE2#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26
CBS_CAD27
CBS_CAD29
CBS_DATA2
CBS_CCLKRUN#

GND
GND
GND
GND

NC
GND

UDIO0
UDIO1
UDIO2
UDIO3
UDIO4
UDIO5
SPKROUT
WAKE#
GBRST#

TEST

VPPEN1
VPPEN0
VCC3EN#
VCC5EN#

R5U242-CSP144P_CSP144~D

R5U242-CSP144P_CSP144~D

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

69
70

CDATA15
CDATA14
CDATA13
CDATA12
CDATA11

CDATA10

CARDBUS / MEDIA CARD / SD Card

CARDBUS / MEDIA CARD / SD Card

WP#/IOIS16 #

RDY/IREQ#

INPACK#

JCBUS1

1@ JCBUS1

1@

GND1
CAD0
CAD1
CAD3
CAD5
CAD7
CCBE0#
CAD9
CAD11
CAD12
CAD14
CCBE1#
CPAR
CPERR#
CGNT#
CINT#
VCC
VPP1
CCLK
CIRDY#
CCBE2#
CAD18
CAD20
CAD21
CAD22
CAD23
CAD24
CAD25
CAD26
CAD27
CAD29
CB_D2
CCLKRUN#
GND2

GND5
GND6

MOLEX_48315-0013_RT

MOLEX_48315-0013_RT

CADR25
CADR24
CADR23
CADR22
CADR21
CADR20
CADR19
CADR18
CADR17
CADR16
CADR15
CADR14
CADR13
CADR12
CADR11
CADR10

CADR9
CADR8
CADR7
CADR6
CADR5
CADR4
CADR3
CADR2
CADR1
CADR0

CDATA9
CDATA8
CDATA7
CDATA6
CDATA5
CDATA4
CDATA3
CDATA2
CDATA1
CDATA0

OE#

WE#
CE2#
CE1#

REG#

RESET

WAIT#

BVD2
BVD1

VS2#
VS1#
CD2#
CD1#

IORD#

IOWR#

L2
K2
H4
J1
G3
F3
G2
F2
E2
H3
J2
G1
F1
K1
C2
C3
D2
E3
L1
M1
M2
L3
M3
N3
N4
M4

B1
B2
B3
C4
B4
M7
M6
M5
A1
A2
A3
A4
C5
N7
N6
N5

C1
F4
D3
D5
L4
N1
N2
L7
G4
L6
K7
K5
E4
K8
D6
K6
D1
E1

GND3

CCD1#

CAD2
CAD4
CAD6

CB_D14

CAD8

CAD10

CVS1
CAD13
CAD15
CAD16

CB_D18

CBLOCK#

CSTOP#

CDEVSEL#

VCC

VPP2

CTRDY#

CFRAME#

CAD17
CAD19

CVS2

CRST#

CSERR#

CREQ#

CCBE3#

CAUDIO

CSTSCHG

CAD28
CAD30
CAD31

CCD2#

GND4

GND7
GND8

4

CBS_CAD19
CBS_CAD17
CBS_CFRAME#
CBS_CTRDY#
CBS_CDEVSEL#
CBS_CSTOP#
CBS_CBLOCK#
CBS_DATA18
CBS_CAD16
CBS_CCLK_R
CBS_CIRDY#
CBS_CPERR#
CBS_CPAR
CBS_CC/BE2#
CBS_CAD12
CBS_CAD9
CBS_CAD14
CBS_CC/BE1#
CBS_CAD18
CBS_CAD20
CBS_CAD21
CBS_CAD22
CBS_CAD23
CBS_CAD24
CBS_CAD25
CBS_CAD26

CBS_CAD8
CBS_DATA14
CBS_CAD6
CBS_CAD4
CBS_CAD2
CBS_CAD31
CBS_CAD30
CBS_CAD28
CBS_CAD7
CBS_CAD5
CBS_CAD3
CBS_CAD1
CBS_CAD0
CBS_DATA2
CBS_CAD29
CBS_CAD27

CBS_CAD11
CBS_CGNT#
CBS_CAD10
CBS_CC/BE0#
CBS_CC/BE3#
CBS_CRST#
CBS_CSERR#
CBS_CCLKRUN#
CBS_CINT#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CVS2
CBS_CVS1
CBS_CCD2#
CBS_CCD1#
CBS_CREQ#
CBS_CAD13
CBS_CAD15

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

71
72

4

3

R410 Close to U94, CBS_CCLK need shield GND.

CBS_CCLK

12

R410

1@ R410

1@

0_0402_5%~D

0_0402_5%~D

EXPRCRD_STDBY#39

RUN_ON12,39,42,47,52

EXPRCRD_PWREN#39

USBP10-_EXP33

USBP10+_EXP33

CBS_CCD1#
CBS_CAD2
CBS_CAD4
CBS_CAD6
CBS_DATA14
CBS_CAD8
CBS_CAD10
CBS_CVS1
CBS_CAD13
CBS_CAD15
CBS_CAD16
CBS_DATA18
CBS_CBLOCK#
CBS_CSTOP#
CBS_CDEVSEL#

CBS_CTRDY#
CBS_CFRAME#
CBS_CAD17
CBS_CAD19
CBS_CVS2
CBS_CRST#
CBS_CSERR#
CBS_CREQ#
CBS_CC/BE3#
CBS_CAUDIO
CBS_CSTSCHNG
CBS_CAD28
CBS_CAD30
CBS_CAD31
CBS_CCD2#

+CBS_VCC
+CBS_VPP

+CBS_VPP

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1@ C769

1@

1

C769

2

Close to JCBUS1 Pin18/52

+CBS_VCC

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1@ C541

1@

C541

1

2

Close to JCBUS1 pin23,63

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1@ C542

1@

C542

1

1

2

2

3

1 2

R791 0_0402_5%~D@ R791 0_0402_5%~D@

1 2

R792 0_0402_5%~D@ R792 0_0402_5%~D@

4

4

1

1

L64

2@L64

2@

DLW21SN900SQ2_0805~D

DLW21SN900SQ2_0805~D

+3.3V_CARDAUX

1@ C543

1@

C543

1 2

R1495 0_0402_5%~D@R1495 0_0402_5%~D@

1 2

R683 0_0402_5%~D2@ R683 0_0402_5%~D2@

1 2

R1496 0_0402_5%~D@R1496 0_0402_5%~D@

3

2

2

1.5Vout

1.5Vout

3.3Vout

3.3Vout

OC#

PERST#

GND

NC

+1.5V_CARD

11
13

3
5

15

19

8

16

7

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2@ C999

2@

2@ C1000

2@

1

2

C999

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

2@ C1006

2@

C1006

1

C1000

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

2@ C1016

2@

C1016

1

2

CARD_RESET#

+1.5V_RUN

+3.3V_SUS

+3.3V_RUN

0.1U_0402_16V4Z~D

2@ C134

0.1U_0402_16V4Z~D

2@

1

1

C134

2

2

PCH_PLTRST#_EC8,18,32,36,39,40

EXPRCRD_STDBY#_R

EXPRCRD_CPPE#

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2@ C135

2@

C135

CPUSB#

0.1U_0402_16V4Z~D

2@ C997

0.1U_0402_16V4Z~D

2@

1

C997

2

2@ U52

2@

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

TPS2231MRGPR-1_QFN20_4X4~D

TPS2231MRGPR-1_QFN20_4X4~D

U52

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

2@ C1012

2@

+3.3V_CARD

C1012

+3.3V_CARDAUX

1

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2@ C1001

2@

1

C1001

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2@ C1002

2@

2@ C1003

2@

1

1

C1003

C1002

2

2

Express Card

+1.5V_CARD: Max. 650mA, Average 500mA
+3.3V_CARD: Max. 1300mA, Average 1000mA

+1.5V_CARD

+3.3V_CARD

USBP10_D-

USBP10_D+

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2@ C1005

2@

1

C1005

2

3

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2@ C1004

2@

1

C1004

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2@ C1007

2@

1

C1007

2

CPUSB#

CARD_SMBCLK40

CARD_SMBDAT40

PCIE_WAKE#36,39

EXPCLK_REQ#16

CLK_PCIE_EXP#16
CLK_PCIE_EXP16

PCIE_PRX_EXPTX_N416
PCIE_PRX_EXPTX_P416

PCIE_PTX_EXPRX_N4_C16
PCIE_PTX_EXPRX_P4_C16

2

PCIE_WAKE#

CARD_RESET#

EXPRCRD_CPPE#

+3.3V_SUS

2.2K_0402_5%~D

2.2K_0402_5%~D

2.2K_0402_5%~D

2.2K_0402_5%~D

2@ R126

2@

2@ R127

2@

12

12

R126

R127

2@

2@

JEXP1

JEXP1

1

GND1

2

USB_D-

3

USB_D+

4

CPUSB#

5

RESERVED

6

CARD_SMBCLK
CARD_SMBDAT

RESERVED

7

SMB_CLK

8

SMB_DAT

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PER_N0

22

PER_P0

23

GND

24

PET_N0

25

PET_P0

26

GND

27

GND

28

GND

29

GND

30

GND

MOLEX_48326-0001_RT

MOLEX_48326-0001_RT

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

R5U241 (2/2)

R5U241 (2/2)

R5U241 (2/2)

LA-5472P

LA-5472P

LA-5472P

34 66Wednesday, January 20, 2010

34 66Wednesday, January 20, 2010

34 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

D D

4

3

2

1

Power Control for Mini card1

Power Control for Mini card2

C C

+15V_ALW +3.3V_ALW

100K_0402_5%~D

100K_0402_5%~D

12

R451

R451

61

Q193A

R452

R452

12

Q193A

2

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

MCARD_WWAN_PWREN39

100K_0402_5%~D

100K_0402_5%~D

B B

100K_0402_5%~D

100K_0402_5%~D

D

D

6

S

12

R453

R453

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q193B

Q193B

5

4

S

45

2

Q51

Q51

1

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

G

G

3

+3.3V_PCIE_SATA_WAN

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

C571

C571

2

1 2

R504

@R504

@

0_0805_5%~D

0_0805_5%~D

12

R1545

R1545
20K_0402_5%~D

20K_0402_5%~D

+3.3V_RUN

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

AUX_EN_WOWL39

R437

R437

100K_0402_5%~D

100K_0402_5%~D

100K_0402_5%~D

100K_0402_5%~D

12

R431

R431

61

Q53A

Q53A

2

12

100K_0402_5%~D

100K_0402_5%~D

D

D

6

S

12

R432

R432

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q53B

Q53B

5

4

S

2

Q47

Q47

1

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

G

G

3

45

1

2

+3.3V_WLAN+3.3V_ALW+15V_ALW

12

R1546

R1546
20K_0402_5%~D

4700P_0402_25V7K~D

4700P_0402_25V7K~D

C551

C551

20K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

MCARD_PCIE_BKT_PWREN36,39

100K_0402_5%~D

100K_0402_5%~D

Power Control for Mini card3

+3.3V_ALW+15V_ALW +3.3V_PCIE_BKT

100K_0402_5%~D

100K_0402_5%~D

D

D

6

S

S

2
1

G

G

3

45

Q50

Q50
SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

R450

R450

12

Q192A

Q192A

2

100K_0402_5%~D

100K_0402_5%~D

12

61

12

R436

R435

R435

R436

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q192B

Q192B

5

4

12

R1547

R1547
20K_0402_5%~D

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

C553

C553

2

20K_0402_5%~D

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCIE PWR

PCIE PWR

PCIE PWR

LA-5472P

LA-5472P

LA-5472P

35 66Wednesday, January 20, 2010

35 66Wednesday, January 20, 2010

35 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

D D

Mini WWAN

+3.3V_PCIE_SATA_WAN+3.3V_PCIE_SATA_WAN

JMINI1

JMINI1

1

1

3

3

5

330U_D2E_6.3VM_R25~D

330U_D2E_6.3VM_R25~D

C563

C563

5
6
7
8
9
10

UIM_VPP

UIM_DATA

33P_0402_50V8J~D

33P_0402_50V8J~D

@

@

1

C576

C576

2

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

TYCO_1775861-1~D

TYCO_1775861-1~D

+SIM_PWR

33P_0402_50V8J~D

33P_0402_50V8J~D

@

@

C577

C577

33P_0402_50V8J~D

33P_0402_50V8J~D

1

1

C569

C569

2

2

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

1

C565

C565

2

2

SIM Card

U31

U31

1

2

3

@

@

SRV05-4.TCT_SOT23-6~D

SRV05-4.TCT_SOT23-6~D

C575

C575

MINI1CLK_REQ#

CLK_PCIE_ MINI1#
CLK_PCIE_ MINI1

PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1

PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C

PCIE_MCARD2_DET#

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

C570

C570

33P_0402_50V8J~D

33P_0402_50V8J~D

22U_0805_6.3VAM~D

22U_0805_6.3VAM~D

33P_0402_50V8J~D

33P_0402_50V8J~D

1

1

C567

C567

C566

C566

2

2

JSIM1

JSIM1

1

VCC

2

RST

3

CLK

4

NC

MOLEX_475531001

MOLEX_475531001

6

5

4

5

C568

C568

GND

GND
GND

VPP

1

+

+

2

I/O
NC

1

2

MINI1CLK_REQ#16

CLK_PCIE_ MINI1#16
CLK_PCIE_ MINI116

PCIE_PRX_WANTX_N116
PCIE_PRX_WANTX_P116

PCIE_PTX_WANRX_N1_C16
PCIE_PTX_WANRX_P1_C16

PCIE_MCARD2_DET#18

C C

B B

A A

+1.5V_RUN

+3.3V_PCIE_SATA_WAN

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

C564

C564

2

+SIM_PWR

UIM_RESET
UIM_CLK

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C573

C573

2

UIM_RESET

UIM_CLK

33P_0402_50V8J~D

33P_0402_50V8J~D

33P_0402_50V8J~D

33P_0402_50V8J~D

@

@

1

1

C574

C574

2

2

2

2

4

4

6

6

8

GND2

+3.3Vaux

+1.5V

UIM_VPP
UIM_DATA

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

PWR
Rail

+3.3V

10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

WWAN_RADIO_DIS#

USBP5­USBP5+
USB_MCARD2_DET#
LED_WWAN_OUT#

LED_WWAN_OUT#

Voltage
Tolerance

+-9%

+-9%

+-5%

Reserved for test

MINI3CLK_REQ#16

MCARD_PCIE_BKT_PWREN35,39

4

USB_MCARD2_DET#

PCIE_MCARD2_DET#

1 2

R442 0_0402_5%~DR442 0_0402_5%~D

1 2

R840 0_0402_5%~DR840 0_0402_5%~D

For WIMAX LED debug

R447 100K_0402_5%~DR447 100K_0402_5%~D

1 2

R449 100K_0402_5%~DR449 100K_0402_5%~D

1 2

R740 0_0402_5%~D@R740 0_0402_5%~D@

+1.5V_RUN
+SIM_PWR

USBP5- 18

USBP5+ 18
USB_MCARD2_DET# 19
LED_WWAN_OUT# 43

Primary Power Aux Power

Peak Normal Normal

1000 750

330

500

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

4

R1492

R1492

1 2

0_0402_5%~D

0_0402_5%~D

Q212

@

Q212

@

D

D

1 3

2

250

375

G

G

+3.3V_ALW_PCH

12

+3.3V_RUN

PCIE_MCARD2_DET#USB_MCARD2_DET#

WWAN_RADIO_DIS# 39
PCH_PLTRST#_EC 8,18,32,34,39,40

250 (Wake enable)
5 (Not wake enable)

NA

+3.3V_PCIE_BKT

12

R1529

@R1529

@

100K_0402_5%~D

100K_0402_5%~D

S

S

MINI3CLK_REQ#_QMINI3CLK_REQ#

3

1 2

R428 0_0402_5%~D@R428 0_0402_5%~D@

WLAN_RADIO_DIS#39

D21

D21
RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

21

WLAN_RADIO_DIS#_R

2

Mini WLAN

+3.3V_WLAN

COEX2_WLAN_ACTIVE41
COEX1_BT_ACTIVE41

COEX2_WLAN_ACTIVE

C552

@C552

@

33P_0402_50V8J~D

33P_0402_50V8J~D

+1.5V_RUN

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

C555

C555

2

1

2

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

2

PCH_CL_RST1#16

+3.3V_WLAN

1

C556

C556

2

PCIE_WAKE#34,39

COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE

MINI2CLK_REQ#16

CLK_PCIE_ MINI2#16
CLK_PCIE_ MINI216

HOST_DEBUG_RX40

PCIE_PRX_WLANTX_N216
PCIE_PRX_WLANTX_P216

PCIE_PTX_WLANRX_N2_C16
PCIE_PTX_WLANRX_P2_C16

PCIE_MCARD1_DET#19

PCH_CL_CLK116

PCH_CL_DATA116

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

@

@

C558

C558

C557

C557

2

2

MSCLK40

R448 0_0402_5%~DR448 0_0402_5%~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

C559

C559

PCIE_WAKE#

R440 0_0402_5%~DR440 0_0402_5%~D

1 2

R441 0_0402_5%~DR441 0_0402_5%~D

1 2

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2

PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

PCH_CL_RST1#_R

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

4.7U_0603_6.3V6M~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C560

C560

2

4.7U_0603_6.3V6M~D

1

2

1

1

+

+

C561

C561

C562

C562

2

2

330U_D2E_6.3VM_R25~D

330U_D2E_6.3VM_R25~D

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

@

@

C554

C554

PCIE/BKT Card

JMINI3

COEX2_WLAN_ACTIVE

CLK_PCIE_ MINI3#16
CLK_PCIE_ MINI316

PCIE_PRX_WPANTX_N516
PCIE_PRX_WPANTX_P516

PCIE_PTX_WPANRX_N5_C16

PCIE_PTX_WPANRX_P5_C16

PCIE_MCARD3_DET#18

+1.5V_RUN

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

C578

C578

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

+3.3V_PCIE_BKT

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

1

C579

C579

2

2

PCIE_MCARD3_DET#

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

@

@

C580

C580

2

PCIE_WAKE#

R454 0_0402_5%~DR454 0_0402_5%~D

1 2

PCIE_MCARD3_DET#

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

1

C582

C582

C581

C581

2

2

MINI3CLK_REQ#_Q

CLK_PCIE_ MINI3#
CLK_PCIE_ MINI3

+3.3V_RUN

12

R458100K_0402_5%~D R458100K_0402_5%~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C584

C584

C583

C583

2

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C585

C585

JMINI3

1
3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

TYCO_1775861-1~D

TYCO_1775861-1~D

2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

GND1

PCIE_MCARD1_DET#

USB_MCARD1_DET#

1 2

+3.3V_WLAN

JMINI2

JMINI2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

GND1

GND2

TYCO_1775861-1~D

TYCO_1775861-1~D

USB_MCARD3_DET# PCIE_MCARD3_DET#

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

GND2

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

+3.3V_PCIE_BKT+3.3V_PCIE_BKT

+1.5V_RUN

R456 0_0402_5%~DR456 0_0402_5%~D

USBP13­USBP13+
USB_MCARD3_DET#

R741 0_0402_5%~D@R741 0_0402_5%~D@

PCIE_MCARD1_DET#

1 2

C1705 4700P_0402_25V7K~DC 1705 4700P_0402_25V7K~D

WLAN_RADIO_DIS#_R

12

R444 0_0402_5%~DR444 0_0402_5%~D

USBP4­USBP4+PCIE_MCARD1_DET#
USB_MCARD1_DET#
WIMAX_LED#WIMAX_LED#
LED_WLAN_OUT#

1 2

R1409 0_0402_5%~D@R1409 0_0402_5%~D@

1 2

R742 0_0402_5%~D@R742 0_0402_5%~D@

+1.5V_RUN

Confirm with DELL about UWB

UWB_RADIO_DIS#
PCH_PLTRST#_EC

12

USB_MCARD3_DET# 15

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Mini Card

Mini Card

Mini Card

LA-5472P

LA-5472P

LA-5472P

1

1 2

R443 100K_0402_5%~DR443 100K_0402_5%~D

1 2

R438 100K_0402_5%~DR438 100K_0402_5%~D

PCIE_MCARD1_DET#USB_MCARD1_DET#

1 2

R439 100K_0402_5%~D@R439 100K_0402_5%~D@

PCH_PLTRST#_EC

UWB_RADIO_DIS# 39

USBP13- 18

USBP13+ 18

USB_MCARD3_DET#

1

+3.3V_ALW_PCH

+3.3V_RUN

+3.3V_RUN

HOST_DEBUG_TX 40

USBP4- 18

USBP4+ 18

USB_MCARD1_DET# 19

LED_WLAN_OUT# 43

MSDATA 40

WPAN Noise

USB_MCARD3_DET#

1

C572

C572
4700P_0402_25V7K~D

4700P_0402_25V7K~D

2

+3.3V_ALW_PCH

12

R266100K_0402_5%~D R266100K_0402_5%~D

36 66Wednesday, January 20, 2010

36 66Wednesday, January 20, 2010

36 66Wednesday, January 20, 2010

of

of

of

A00

A00

A00

5

L29

@L29

@

DLW21SN121SQ2L_4P~D

DLW21SN121SQ2L_4P~D

1
2
3
4
5
6
7
8

MDC_RST_DIS#39

1

1

4

4

1 2

R422 0_0402_5%~DR422 0_0402_5%~D

1 2

R423 0_0402_5%~DR423 0_0402_5%~D

FP_USB_D­FP_USB_D+

U51

U51

1

GND

VCC

2

IO1

PRTR5V0U2X_SOT143-4~D

PRTR5V0U2X_SOT143-4~D

+5V_ALW

FP_USBD+31

FP_USBD-31

D D

C C

Fingerprint CONN.

JBIO1

JBIO1

1
2
3
4
5

6
GND
GND

TYCO_2041070-6

TYCO_2041070-6

FP_USB_D-

PCH_AZ_MDC_RST#15

FP_USB_D+

2

2

FP_USB_D-

3

3

+3.3V_RUN

0.1U_0402_16V4Z~D

S

S

0.1U_0402_16V4Z~D

1

C770

C770

2

+3.3V_RUN

PCH_AZ_MDC_RST1#

+3.3V_RUN

FP_RESET# 31

+3.3V_RUN Place close to
JBIO1.1

4

FP_USB_D+

3

IO2

D

D

1 3

Q35

Q35

G

G

2

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

12

R326

R326

10K_0402_5%~D

10K_0402_5%~D

double check pin define with IO board.

I/O board CONN.

Connector need updated

SW_LAN_TX3+30
SW_LAN_TX3-30

SW_LAN_TX2-30

B B

A A

SW_LAN_TX2+30

SW_LAN_TX1+30
SW_LAN_TX1-30

SW_LAN_TX0-30
SW_LAN_TX0+30

+3.3V_LAN

USBP0+18
USBP0-18

USBP1+18
USBP1-18

+5V_ALW

IO_LOOP19

+3.3V_LAN +VREFOUT +LOM_VCT_IO

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C623

C623

2

C768

C768

JIO1

JIO1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

TYCO_1759898-1

TYCO_1759898-1

DETECT_GND

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41
42
43
44
45
46
47
48
49
50

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

42
43
44
45
46
47
48
49
50

C634

C634

PCH_AZ_MDC_RST1#

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

4

12

R325

R325

100K_0402_5%~D

100K_0402_5%~D

AUD_EXT_MIC_L 29

AUD_EXT_MIC_R 29

+VREFOUT

AUD_MIC_SWITCH 29

LAN_ACTLED_YEL# 30

LED_10_GRN# 30

LED_100_ORG# 30

+3.3V_ALW_PCH
+LOM_VCT_IO

USB_SIDE_EN# 39

USB_OC0# 18

PCH_AZ_MDC_BITCLK 15

PCH_AZ_MDC_SDOUT 15

PCH_AZ_MDC_SYNC 15
PCH_AZ_MDC_SDIN1 15

AUD_HP_NB_SENSE 29,39

AUD_HP_OUT_L 29
AUD_HP_OUT_R 29

+3.3V_ALW_PCH

@

@

C712

C712

3

+5V_ALW

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C711

C711

2

PJP23

PJP23
JUMP_43X79

JUMP_43X79

2

10U_1206_16V4Z~D

10U_1206_16V4Z~D

C546

C546

C547

C547

1

2

112

ESATA_USB_PWR_EN#39

ESATA_PWRSAVE

USBP2-18

USBP2+18

USBP3-18

USBP3+18

+5V_ALW_USB

USBP2-

USBP2+

USBP3-

USBP3+

2

G

G

U53

U53

1

GND

2

IN

3

IN

4

EN1#
EN2#5FAULT#2

TPS2560DRCR_SON10_3X3~D

TPS2560DRCR_SON10_3X3~D

R1520

@R1520

@

0_0402_5%~D

0_0402_5%~D

1 2

13

D

D

Q211

@

Q211

@

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

L65

L65

1

4

HCMC0805-900MFS_4P~D

HCMC0805-900MFS_4P~D

R1524 0_0402_5%~D@R1524 0_0402_5%~D@

R1525 0_0402_5%~D@R1525 0_0402_5%~D@
L66

L66

1

4

HCMC0805-900MFS_4P~D

HCMC0805-900MFS_4P~D

1 2

R1526 0_0402_5%~D@R1526 0_0402_5%~D@

1 2

R1527 0_0402_5%~D@R1527 0_0402_5%~D@

@D4

USBP2_D+ USBP2_D-

USBP3_D- USBP3_D+

@

1

3

IP4223CZ6_SO6~D

IP4223CZ6_SO6~D

FAULT1#

OUT1
OUT2

ILIM

T-PAD

EN_ESATA_RPTR#

1

4

1 2

1 2

1

4

D4

V I/O

V I/O

Ground2V BUS

V I/O

V I/O

10
9
8
7
6
11

ESATA_PTX_DRX_P4_C15

ESATA_PTX_DRX_N4_C15

ESATA_PRX_DTX_P4_C15

ESATA_PRX_DTX_N4_C15

2

2

3

3

2

2

3

3

6

5

4

+5V_ESATA/USB2+5V_ESATA/USB3

USB_OC1# 18

R28

R28

1 2

24.9K_0402_1%~D

24.9K_0402_1%~D

EN_ESATA_RPTR39

ESATA_PTX_DRX_P4_C

ESATA_PTX_DRX_N4_C

ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4

ESATA_PRX_DTX_N4_C

EN_ESATA_RPTR# 15,19

+5V_ESATA/USB2

USBP2_D-

USBP2_D+

USBP3_D-

USBP3_D+

+5V_ALW_USB

2

R1514

@R1514

@

1 2

0_0402_5%~D

0_0402_5%~D

C304 0.01U_0402_16V7K~DC304 0.01U_0402_16V7K~D

C303 0.01U_0402_16V7K~DC303 0.01U_0402_16V7K~D

C1380 0.01U_0402_16V7K~DC1380 0.01U_0402_16V7K~D

C1381 0.01U_0402_16V7K~DC1381 0.01U_0402_16V7K~D

150U_D2_6.3VY_R15M~D

150U_D2_6.3VY_R15M~D

1

+

+

C588

C588

2

ESATA_PWRSAVE

ESATA_PTX_DRX_P4

12

ESATA_PTX_DRX_N4

12

12

ESATA_PRX_DTX_N4

12

+5V_ESATA/USB3

150U_D2_6.3VY_R15M~D

150U_D2_6.3VY_R15M~D

1

+

+

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C548

C548

ESATA_PTX_DRX_P4_RP

2

ESATA_PTX_DRX_N4_RP

ESATA_PRX_DTX_P4_RP

ESATA Repeater

R1513

R1513

1 2

0_0402_5%~D

0_0402_5%~D

U95

U95

7

1

5
4

3

17
18
19
21

SN75LVCP412ARTJR_QFN20_4X4~D

SN75LVCP412ARTJR_QFN20_4X4~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C544

C544

C545

C545

2

VCC

EN

VCC

RX_1P

VCC

RX_1N2VCC

TX_2P

PE1
PE2

TX_2N

TX_1P

GND
GND13TX_1N
GND
GND

RX_2N

GND

RX_2P

PAD

USBP3_D­USBP3_D+

USBP2_D­USBP2_D+

SATA_PTX_DRX_P4

1 2

C1376 0.01U_0402_16V7K~DC1376 0.01U_0402_16V 7K~D

SATA_PTX_DRX_N4

1 2

C1377 0.01U_0402_16V7K~DC1377 0.01U_0402_16V 7K~D

SATA_PRX_DTX_N4ESATA_PRX_DTX_N4_RP

1 2

C549 0.01U_0402_16V7K~DC549 0.01U_0402_16V7K~D

SATA_PRX_DTX_P4

1 2

C550 0.01U_0402_16V7K~DC550 0.01U_0402_16V7K~D

6
10
16
20

9
8

15
14

12
11

+3.3V_RUN

R1300

R1300

@

@

0_0402_5%~D

0_0402_5%~D

1

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

1

C1379

C1379

C1378

C1378

2

2

ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP

ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP

0_0402_5%~D

0_0402_5%~D

12

12

R1301

R1301

JESA1

JESA1

1

A_VBUS

2

A_D-

3

A_D+

4

A_GND

USB

USB

5

B_VBUS

6

B_D-

7

B_D+

8

B_GND

9

GND

10

A+

ESATA

ESATA

11

A-

12

GND

13

B-

14

B+

15

GND

16

G1

17

G2

18

G3

19

G4

FCI_10100446-003RLF

FCI_10100446-003RLF

@

R1298 0_0402_5%~D@R1298 0_0402_5%~D

R1299 0_0402_5%~DR1299 0_0402_5%~D

1 2

1 2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Place close
to JIO1.13

Place close
to JIO1.30

5

Place close
to JIO1.36

Place close
to JIO1.35

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

USB 2.0 PORT

USB 2.0 PORT

USB 2.0 PORT

LA-5472P

LA-5472P

LA-5472P

A00

A00

37 66Wednesday, January 20, 2010

37 66Wednesday, January 20, 2010

37 66Wednesday, January 20, 2010

1

A00

of

of

of

2

JDOCK1

JDOCK1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

81

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

99

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

125

125

127

127

129

129

131

131

133

133

135

135

137

137

139

139

141

141

143

143

145

GND1

146

PWR1

147

PWR1

148

PWR1

153

Shield_G

154

Shield_G

155

Shield_G

156

Shield_G

157

Shield_G

158

Shield_G

JAE_WD2F144WB1R300~D

JAE_WD2F144WB1R300~D

PWR2
PWR2
PWR2
GND2

Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G

DOCK_AC_OFF

2

2

4

4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

149
150
151
152

159
160
161
162
163
164

DPB_CA_DET

DPB_DOCK_LANE_P0
DPB_DOCK_LANE_N0

DPB_DOCK_LANE_P1
DPB_DOCK_LANE_N1

DPB_DOCK_LANE_P2
DPB_DOCK_LANE_N2

DPB_DOCK_LANE_P3
DPB_DOCK_LANE_N3

SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5

SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5

DOCK_DET_R#

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

C1033

C1033

1

2

DOCK_AC_OFF 39,50
DOCK_LOM_SPD100LED_ORG# 30

DPB_CA_DET 25

C361 0.1U_0402_10V7K~DC361 0.1U_0402_10V7K~D

12

C357 0.1U_0402_10V7K~DC357 0.1U_0402_10V7K~D

12

C355 0.1U_0402_10V7K~DC355 0.1U_0402_10V7K~D

12

C313 0.1U_0402_10V7K~DC313 0.1U_0402_10V7K~D

12

C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D

12

C362 0.1U_0402_10V7K~DC362 0.1U_0402_10V7K~D

12

C364 0.1U_0402_10V7K~DC364 0.1U_0402_10V7K~D

12

C363 0.1U_0402_10V7K~DC363 0.1U_0402_10V7K~D

12

DPB_DOCK_AUX 25

DPB_DOCK_AUX# 25

ACAV_DOCK_SRC# 50

DAT_DDC2_DOCK 27

CLK_DDC2_DOCK 27

12

C586 0.01U_0402_16V7K~DC586 0.01U_0402_16V7K~D

12

C587 0.01U_0402_16V7K~DC587 0.01U_0402_16V7K~D

1 2

C306 0.01U_0402_16V7K~DC306 0.01U_0402_16V7K~D

1 2

C305 0.01U_0402_16V7K~DC305 0.01U_0402_16V7K~D

USBP8+ 18

USBP8- 18

USBP9+ 18

USBP9- 18

CLK_KBD 40
DAT_KBD 40

BREATH_LED# 40,43
DOCK_LOM_ACTLED_YEL# 30

DOCK_LOM_TRD0+ 30

DOCK_LOM_TRD0- 30

DOCK_LOM_TRD1+ 30

DOCK_LOM_TRD1- 30

+LOM_VCT

DOCK_LOM_TRD2+ 30
DOCK_LOM_TRD2- 30

DOCK_LOM_TRD3+ 30
DOCK_LOM_TRD3- 30

DOCK_DCIN_IS+ 51
DOCK_DCIN_IS- 51

DOCK_POR_RST# 40

+DOCK_PWR_BAR

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

@

@

C1898

C1898

1

2

Reserve for EMI test

SLICE_BAT_PRES#

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D
C1034

C1034

1

2

DOCK_DET_1

BLUE_DOCK

RED_DOCK

GREEN_DOC K

2

3

1

D64

D64

@

@

SM24.TCT_SOT23-3~D

SM24.TCT_SOT23-3~D

DOCK_LOM_SPD10LED_GRN#30

DPC_DOCK_CA_DET26

DPC_DOCK_LANE_P026

DPC_DOCK_LANE_N026

DPC_DOCK_LANE_P126

DPC_DOCK_LANE_N126

DPC_DOCK_LANE_P226

DPC_DOCK_LANE_N226

DPC_DOCK_LANE_P326

DPC_DOCK_LANE_N326

DPC_DOCK_AUX26

DPC_DOCK_HPD

R796

Q216A

Q216A

5

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

12

3

4

+15V_ALW

R796
100K_0402_5%~D

100K_0402_5%~D

1 2

R1537

R1537
100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

Q213B

Q213B

12

R1535

R1535
100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

3

Q216B

Q216B

4

+3.3V_RUN

2

G

G

B B

+15V_ALW

+3.3V_ALW2

12

R1532

R1532

100K_0402_5%~D

100K_0402_5%~D

5

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

61

Q213A

DPC_DOCK_CA_DET

A A

100K_0402_5%~D

100K_0402_5%~D

DPB_CA_DET

2

R1534

R1534

Q213A

+3.3V_ALW2

12

61

2

Close to DOCK
Its for Enhance ESD on dock issue.

+3.3V_RUN

12

13

D

D

2

G

G

S

S

DPC_DOCK_AUX

12

R1530

R1530

2.2K_0402_5%~D

2.2K_0402_5%~D

R1523 0_0402_5%~D@R1523 0_0402_5%~D@

13

D

D

Q215

Q215
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

DPC_DOCK_AUX#

+3.3V_RUN

2

G

G

+3.3V_RUN

12

R1531

R1531

2.2K_0402_5%~D

2.2K_0402_5%~D

DPC_DOCK_HPD26

0.033U_0402_16V7K~D

0.033U_0402_16V7K~D

R1539

R1539

2.2K_0402_5%~D

2.2K_0402_5%~D

1 2

R1538 0_0402_5%~D@R1538 0_0402_5%~D@

Q214

Q214
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

1 2

12

R1540

R1540

2.2K_0402_5%~D

2.2K_0402_5%~D

1 2

R1536 0_0402_5%~D@ R1536 0_0402_5%~D@

13

D

D

Q217

Q217
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

DPB_DOCK_AUX

DPC_DOCK_AUX#26

+NBDOCK_DC_IN_SS

1

C985

C985

2

SLICE_BAT_PRES#39,44,50 DOCK_DET# 39

+DOCK_PWR_BAR

BLUE_DOCK27

RED_DOCK27

GREEN_DOC K27

HSYNC_DOCK27
VSYNC_DOCK27

CLK_MSE40

DAT_MSE40

DAI_BCLK#29
DAI_LRCK#29

DAI_DI29
DAI_DO#29

DAI_12MHZ#29

D_LAD039
D_LAD139

D_LAD239
D_LAD339

D_LFRAME#39

D_CLKRUN#39

D_SERIRQ39

D_DLDRQ1#39

CLK_PCI_DOCK18

DOCK_SMB_CLK40

DOCK_SMB_DAT40

DOCK_SMB_ALERT#40,44

DOCK_PSID44

DOCK_PWR_BTN#40

4.7U_0805_25V6K~D

4.7U_0805_25V6K~D

C1897

C1897

1

2

1

DPB_GPU_LANE_P0 54
DPB_GPU_LANE_N0 54

DPB_GPU_LANE_P1 54
DPB_GPU_LANE_N1 54

DPB_GPU_LANE_P2 54
DPB_GPU_LANE_N2 54

DPB_GPU_LANE_P3 54
DPB_GPU_LANE_N3 54

SATA_PRX_DKTX_P5_C 15
SATA_PRX_DKTX_N5_C 15

SATA_PTX_DKRX_P5_C 15
SATA_PTX_DKRX_N5_C 15

D71

D71

RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

21

+PWR_SRC

+LOM_VCT

1

2

DPB_GPU_HPD 53

1

C986

C986

0.033U_0402_16V7K~D

0.033U_0402_16V7K~D

2

Close to DOCK
Its for Enhance ESD on dock issue.

DPB_GPU_HPD

+VCHGR

C1028

C1028

1 2

0.1U_0402_25V4K~D

0.1U_0402_25V4K~D

DOCK_DET#

C42

C42
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

R798

R798
100K_0402_5%~D

100K_0402_5%~D

1 2

+3.3V_ALW

1 2

R1038 100K_0402_5%~DR1038 100K_0402_5%~D

CLK_PCI_DOCK

12

R462

@R462

@

10_0402_5%~D

10_0402_5%~D

1

C590

@C590

@

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

2

13

D

D

2

G

G

S

S

1 2

R1533 0_0402_5%~D@ R1533 0_0402_5%~D@

Q218

Q218
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

DPB_DOCK_AUX#

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

1

Date: Sheet

Compal Electronics, Inc.

DOCKING CONN

DOCKING CONN

DOCKING CONN

LA-5472P

LA-5472P

LA-5472P

38 66Wednesday, January 20, 2010

38 66Wednesday, January 20, 2010

38 66Wednesday, January 20, 2010

A00

A00

A00

of

of

of

+3.3V_ALW

1 2

R501 10K_0402_5%~DR501 10K_0402_5%~D

1 2

R503 100K_0402_5%~DR503 100K_0402_5%~D

1 2

R862 100K_0402_5%~DR862 100K_0402_5%~D

1 2

R754 100K_0402_5%~DR754 100K_0402_5%~D

D D

+3.3V_ALW2

1 2

R502 10K_0402_5%~DR502 10K_0402_5%~D

1 2

R923 10K_0402_5%~DR923 10K_0402_5%~D

+3.3V_RUN

1 2

R874 100K_0402_5%~DR874 100K_0402_5%~D

1 2

R788 10K_0402_5%~D@R788 10K_0402_5%~D@

1 2

R816 100K_0402_5%~DR816 100K_0402_5%~D

1 2

R505 10K_0402_5%~DR505 10K_0402_5%~D

1 2

R658 10K_0402_5%~DR658 10K_0402_5%~D

1 2

C C

B B

R1318 100K_0402_5%~DR1318 100K_0402_5%~D

1 2

R1319 100K_0402_5%~DR1319 100K_0402_5%~D

+3.3V_RUN

1 2

R258 2.2K_0402_5%~DR258 2.2K_0402_5%~D

+3.3V_ALW

1 2

R875 100K_0402_5%~DR875 100K_0402_5%~D

1 2

R881 100K_0402_5%~D@ R881 100K_0402_5%~D@

VGA_ID_DISC

VGA_ID_UMA

Discrete

UMA

SG

A A

5

PCIE_WAKE#

SLICE_BAT_PRES#

DCIN_CBL_DET#

PWR_BTN_BD_DET#

USB_SIDE_EN#

ESATA_USB_PWR_EN#

WIRELESS_ON#/OFF

SP_TPM_LPC_EN

LCD_TST

PANEL_BKEN_DGPU

SYS_LED_MASK#

DGPU_PWR_EN

GFX_MEM_VTT_ON

ALS_INT#

VGA_ID_DISC

VGA_ID_UMA

1 2

R522 100K_0402_5%~D@ R522 100K_0402_5%~D@

1 2

R558 100K_0402_5%~DR558 100K_0402_5%~D

+3.3V_RUN

MCARD_WWAN_PWREN35

MCARD_PCIE_BKT_PWREN35,36

VGA_ID_DISCVGA_ID_UMA

01

01

11

5

R882

1@ R882

1@

100K_0402_5%~D

100K_0402_5%~D

1 2

DET_PCCRD_EXPSCRD#

R883

2@ R883

2@

100K_0402_5%~D

100K_0402_5%~D

1 2

PBAT_PRES#44

SCRL_LED#43

NUM_LED#43

DCIN_CBL_DET#44

PBATT_OFF50

MDC_RST_DIS#37

PCIE_WAKE#34,36

WIRELESS_ON#/OFF43
BT_RADIO_DIS#41
EXPRCRD_PWREN#34
EXPRCRD_STDBY#34

BC_INT#_ECE502840

BC_DAT_ECE502840

BC_CLK_ECE502840

DGPU_PWROK19,52

GFX_MEM_VTT_ON56

USB_SIDE_EN#37
EN_I2S_NB_CODEC#29
USH_PWR_STATE#31

EN_DOCK_PWR_BAR50

ENVDD_GPU24,53

LCD_TST24

PSID_DISABLE#44

PANEL_BKEN_DGPU53

DOCKED30

DOCK_DET#38

AUD_NB_MUTE29

LCD_VCC_TEST_EN24
CCD_OFF24

AUD_HP_NB_SENSE29,37

ESATA_USB_PWR_EN#37

CPU_VTT_ON48

DGPU_PWR_EN52

HDDC_EN28
MODC_EN28

SLICE_BAT_PRES#38,44,50

PWR_BTN_BD_DET#43

LAN_DISABLE#_R30

CAP_LED#43

SYS_LED_MASK#43

ALS_INT#24

SIO_EXT_WAKE#19
EN_ESATA_RPTR37
PCH_PCIE_WAKE#17

WLAN_RADIO_DIS#36

WWAN_RADIO_DIS#36
GPU_CLKDWN53

UWB_RADIO_DIS#36

BCM5882_ALERT#31

Option for select PC
Card & Express Card
For PC Card stuff R882
For Experss card stuff
R883

MCARD_PCIE_BKT_PWREN

R526 0_0402_5%~DR526 0_0402_5%~D

4

+3.3V_ALW

A17

B30

A43

GPIO

GPIO

VCC1

VCC1

VCC1

A54

VCC1

GPIO

GPIO

TEST

TEST

EP

C1

U35

U35

PBAT_PRES#

DCIN_CBL_DET#
PBATT_OFF
MDC_RST_DIS#
PCIE_WAKE#

WIRELESS_ON#/OFF
BT_RADIO_DIS#
EXPRCRD_PWREN#
EXPRCRD_STDBY#
BC_INT#_ECE5028
BC_DAT_ECE5028
BC_CLK_ECE5028

DGPU_PWROK

DET_PCCRD_EXPSCRD#

GFX_MEM_VTT_ON

USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE#
EN_DOCK_PWR_BAR

ENVDD_GPU
LCD_TST
PSID_DISABLE#
PANEL_BKEN_DGPU
DOCKED
DOCK_DET#
AUD_NB_MUTE
MCARD_WWAN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN# LPC_LAD3

LID_CL_SIO#
CPU_VTT_ON

DGPU_PWR_EN

HDDC_EN
MODC_EN

SLICE_BAT_PRES#
PWR_BTN_BD_DET#

LAN_DISABLE#_R

SYS_LED_MASK#
ALS_INT#

1 2

EN_ESATA_RPTR
PCH_PCIE_WAKE#
WLAN_RADIO_DIS#

WWAN_RADIO_DIS#
GPU_CLKDWN

VGA_ID_UMA
VGA_ID_DISC
UWB_RADIO_DIS#

R528

R528

10K_0402_5%~D

10K_0402_5%~D

12

BCM5882_ALERT#

4

B52

GPIOA[0]

A49

GPIOA[1]

B53

GPIOA[2]

A50

GPIOA[3]

B54

GPIOA[4]

A51

GPIOA[5]

B55

GPIOA[6]

A52

GPIOA[7]

B13

GPIOH[0]

A13

GPIOH[1]

B14

GPIOH[4]

A14

GPIOH[5]

A29

BC_INT#

B31

BC_DAT

A30

BC_CLK

A1

GPIOE[0]/RXD

B2

GPIOE[1]/TXD

A2

GPIOE[2]/RTS#

B3

GPIOE[3]/DSR#

A3

GPIOE[4]/CTS#

B45

GPIOE[5]/DTR#

A42

GPIOE[6]/RI#

B4

GPIOE[7]/DCD#

A33

GPIOB[0]/INIT#

B36

GPIOB[1]/SLCTIN #

A34

GPIOC[2]/SLCT

B37

GPIOC[3]/PE

A35

GPIOC[4]/BUSY

B38

GPIOC[5]/ACK#

A36

GPIOC[6]/ERROR #

A37

GPIOC[7]/ALF#

B40

GPIOD[0]/STROBE #

A38

GPIOC[1]/PD7

B41

GPIOC[0]/PD6

A39

GPIOB[7]/PD5

B42

GPIOB[6]/PD4

A40

GPIOB[5]/PD3

B43

GPIOB[4]/PD2

A41

GPIOB[3]/PD1

B44

GPIOB[2]/PD0

B32

GPIOD[1]

A31

GPIOD[2]

B33

GPIOD[3]/VBUS_DET

B15

GPIOD[4]/OCS1_N

A15

GPIOD[5]/OCS2_N

B16

GPIOD[6]/OCS3_N

A16

GPIOD[7]/OCS4_N

B17

GPIOH[6]

B18

GPIOH[7]

B47

GPIOG[0]

A45

GPIOG[1]

B48

GPIOG[2]

A46

GPIOG[3]

B49

GPIOG[4]

A47

GPIOG[5]

B50

GPIOG[6]

A48

GPIOG[7]

A53

SYSOPT1/GPIOH[2]

B57

SYSOPT0/GPIOH[3]

B58

GPIOF[7]

A55

GPIOF[6]

B59

GPIOF[5]

A56

GPIOF[4]

B60

IRTX

A57

IRRX

B61

GPIOF[3]/IRMODE /IRRX3B

A58

GPIOF[2]/IRTX2

B62

GPIOF[1]/IRRX2

A59

GPIOF[0]/IRMODE /IRRX3A

ECE5028-LZY_DQFN132_11X11~D

ECE5028-LZY_DQFN132_11X11~D

ECE5028-LZY

ECE5028-LZY

3

1

C1072

C1072
10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

LPC

LPC

CLKI (14.318 MHz)

DLPC

DLPC

DCLK_RUN#

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

VCC1

GPIOJ[7]

GPIOK[4]

GPIOI[1]

GPIOJ[2]
GPIOJ[3]
GPIOJ[6]

GPIOJ[5]
GPIOK[0]
GPIOK[1]
GPIOK[3]
GPIOK[2]
GPIOK[5]
GPIOK[6]

GPIOI[6]
GPIOI[5]
GPIOI[2]

CAP_LDO

GPIOJ[0]

TEST_PIN

GPIOI[7]
GPIOI[4]
GPIOI[3]

LAD0
LAD1
LAD2

LAD3
LFRAME#
LRESET#

PCICLK

CLKRUN#

LDRQ0#
LDRQ1#

SER_IRQ

VSS

DLAD0
DLAD1
DLAD2
DLAD3

DLFRAME#

DLDRQ1#

DSER_IRQ

PWRGD

OUT65

GPIOJ[4]

VSS

GPIOK[7]

VSS
VSS
VSS
VSS
VSS

GPIOJ[1]

NC
NC
NC
NC

1

C648

C648

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

B68
B35
B34
B1
B5
B8
B11

B63

A5
B6
A7
B7
A8
B9
A10
B10
A11
B12

B66
A62
A60

+CAP_LDO

B46
B67

B19

A63
B65
A61

A27
A26
B26
B25
A21
B22
A28
B20
A23
A22
B21

A32

B51

B29
B28
A25
A24
B23
A19
B24
A20

A4

B56

A6
A9
A12
A18
B27
B39
A44
B64
A64

H_CATERR#8

DOCK_MIC_DET
TEMP_ALERT#

SIO_SLP_M#

SIO_SLP_LAN#

DOCK_HP_DET
CRT_SWITCH
ME_FWP

DP_PRIORIT Y

RUN_ON
CPU_CATERR#

1 2

R509 0_0402_5%~DR509 0_0402_5%~D

0.75V_DDR_VTT_ON

8mil

R514

R514

1K_0402_5%~D

1K_0402_5%~D

DOCK_AC_OFF_EC

SIO_SLP_S3# 17
SIO_SLP_S4# 17

LPC_LAD0
LPC_LAD1
LPC_LAD2

LPC_LFRAME#
PCH_PLTRST#_EC
CLK_PCI_5028
CLKRUN#
LPC_LDRQ0#
LPC_LDRQ1#
IRQ_SERIRQ

CLK_SIO_14M

D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ

RUNPWROK_R1

SP_TPM_LPC_EN

1

C657

C657

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

2

+1.05V_RUN_VTT

1

C652

C652

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

DOCK_MIC_DET 29
TEMP_ALERT# 15,19

SIO_SLP_M# 17,48

SIO_SLP_LAN# 17,30

DOCK_HP_DET 29

CRT_SWITCH 27
ME_FWP 15

DP_PRIORIT Y 2 6

1.8V_RUN_PWRGD 47

RUN_ON 12,34,42,47,52

IMVP_VR_ON 49

IMVP_PWRGD 8,49

0.75V_DDR_VTT_ON 47

AUX_EN_WOWL 35

ACAV_IN_NB 40,50,51

12

ACAV_IN_NB

DOCK_AC_OFF_EC 50

LPC_LFRAME# 15,31,32,40

PCH_PLTRST#_EC 8,18,32,34,36,40
CLK_PCI_5028 18

CLKRUN# 17,32,40
LPC_LDRQ0# 15
LPC_LDRQ1# 15
IRQ_SERIRQ 15,31,32,40

CLK_SIO_14M 16

D_LAD0 38
D_LAD1 38
D_LAD2 38
D_LAD3 38
D_LFRAME# 38
D_CLKRUN# 38
D_DLDRQ1# 38
D_SERIRQ 38

R1130 10K_0402_5%~DR1130 10K_0402_5%~D

TP_DET# 41

R1289

R1289

2.2K_0402_5%~D

2.2K_0402_5%~D

1 2

PMST3904_SOT323-3~D

PMST3904_SOT323-3~D

12

SP_TPM_LPC_EN 31,32

GPIO_PSID_SELECT 44

SPI_WP#_SEL 15

+3.3V_RUN

12

2

B

B

E

E

Q182

Q182

3 1

2

1

C649

C649

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

C1051

C1051

+3.3V_ALW

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

5

1

P

B

4

O

D65

A

G

U69

U69

3

TC7SH08FU_SSOP5~D

TC7SH08FU_SSOP5~D

CPU_CATERR#

1

C1372

C1372

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

2

D65

RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+3.3V_RUN

2

LPC_LAD[0..3] 15,31,32,40

R1288

R1288

8.2K_0402_5%~D

8.2K_0402_5%~D

C

C

+3.3V_ALW

1

2

2 1

ME_FWP

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C653

C653

1

1

C650

C650

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

DOCK_AC_OFF 38,50

12

R1078

R1078
33K_0402_5%~D

33K_0402_5%~D

R649

R649

@

@

1K_0402_5%~D

1K_0402_5%~D

1 2

LID_CL_SIO#

+3.3V_ALW

12

R524

R524
100K_0402_5%~D

100K_0402_5%~D

1

C655

C655

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

2

TP_DET#

D_CLKRUN#

D_SERIRQ

D_DLDRQ1#

RUN_ON

CPU_VTT_ON

0.75V_DDR_VTT_ON

PBATT_OFF

R506

@R506

@

10_0402_5%~D

10_0402_5%~D

C654

@C654

@

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

R525

R525

10_0402_5%~D

10_0402_5%~D

12

R756 100K_0402_5%~DR756 100K_0402_5%~D

R510 100K_0402_5%~DR510 100K_0402_5%~D

R511 100K_0402_5%~DR511 100K_0402_5%~D

R512 100K_0402_5%~DR512 100K_0402_5%~D

R515 100K_0402_5%~DR515 100K_0402_5%~D

R518 100K_0402_5%~DR518 100K_0402_5%~D

R520 100K_0402_5%~DR520 100K_0402_5%~D

R521 100K_0402_5%~DR521 100K_0402_5%~D

12

1

2

LID_CL#

12

12

12

12

12

12

12

12

CLK_PCI_5028CLK_SIO_14M

10_0402_5%~D

10_0402_5%~D

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

LID_CL# 43

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ECE5028

ECE5028

ECE5028

LA-5472P

LA-5472P

LA-5472P

39 66Wednesday, January 20, 2010

39 66Wednesday, January 20, 2010

39 66Wednesday, January 20, 2010

1

R527

R527

C656

C656

of

of

of

+3.3V_ALW

+3.3V_RUN

12

1

2

A00

A00

A00

5

+3.3V_ALW

BC_DAT_ECE5028

1 2

R543 100K_0402_5%~DR543 100K_0402_5%~D

R545 100K_0402_5%~DR545 100K_0402_5%~D

R546 100K_0402_5%~DR546 100K_0402_5%~D

D D

C C

B B

A A

R547 10K_0402_5%~DR547 10K_0402_5%~D

R551 2.2K_0402_5%~DR551 2.2K_0402_5%~D

R552 2.2K_0402_5%~DR552 2.2K_0402_5%~D

R837 100K_0402_5%~D@R837 100K_0402_5%~D@

R29 2.2K_0402_5%~DR29 2.2K_0402_5%~D

R30 2.2K_0402_5%~DR30 2.2K_0402_5%~D

+3.3V_RUN

R26 2.2K_0402_5%~DR26 2.2K_0402_5%~D

R27 2.2K_0402_5%~DR27 2.2K_0402_5%~D

R589 10K_0402_5%~DR589 10K_0402_5%~D

1 2

R561 100K_0402_5%~DR561 100K_0402_5%~D

1 2

R563 2.7K_0402_5%~DR563 2.7K_0402_5%~D

1 2

R564 100K_0402_5%~DR564 100K_0402_5%~D

1 2

R566 100K_0402_5%~DR566 100K_0402_5%~D

1 2

R568 100K_0402_5%~DR568 100K_0402_5%~D

1 2

R1046 100K_0402_5%~DR1046 100K_0402_5%~D

1 2

R595 100K_0402_5%~DR595 100K_0402_5%~D

JDEG1

@JDEG1

@

1
2

7

3

G1

8

4

G2

5
6

ACES_85204-06001~D

ACES_85204-06001~D

JP2

@JP2

@

1
2

7

3

G1

8

4

G2

5
6

ACES_85204-06001~D

ACES_85204-06001~D

32 KHz Clock

Same as Laguna

MEC_XTAL1

32.768K_12.5PF_Q13MC30610018~D

32.768K_12.5PF_Q13MC30610018~D

MEC_XTAL2

BC_DAT_EMC4002

12

BC_DAT_ECE1077

12

DOCK_SMB_ALERT#

12

PBAT_SMBDAT

1 2

PBAT_SMBCLK

1 2

LPC_LDRQ#_MEC

12

CHARGER_SMBDAT

1 2

CHARGER_SMBCLK

1 2

DAI_GPU_R3P_SMBDAT

1 2

DAI_GPU_R3P_SMBCLK

1 2

MSDATA

12

M_ON

AUX_ON

DDR_ON

SUS_ON

PCH_ALW_ON

DOCK_POR_RST#

EN_INVPWR

+3.3V_ALW

10K_0402_5%~D

10K_0402_5%~D

12

1

MSCLK

2

MSDATA

3
4

1 2

R593 0_0402_5%~DR593 0_0402_5%~D

1 2

5

R577 0_0402_5%~DR577 0_0402_5%~D

6

+3.3V_ALW

49.9_0402_1%~D

49.9_0402_1%~D

10K_0402_5%~D

10K_0402_5%~D

12

12

R580

R580

R581

R581

1
2
3
4
5
6

Y4

Y4

33P_0402_50V8J~D

33P_0402_50V8J~D

NCNC

NCNC

C674

C674

1

2

5

SML1_SMBDATA16

SML1_SMBCLK16

CLK_TP_SIO41
DAT_TP_SIO41
CLK_KBD38
DAT_KBD38
CLK_MSE38
DAT_MSE38

PBAT_SMBDAT44

PBAT_SMBCLK44

DOCK_POR_RST#38

SUS_ON42

AUX_ON30
BREATH_LED#38,43
PCH_ALW_ON42

KYBRD_BKLT_PW M41

BC_CLK_ECE502839

BC_DAT_ECE502839

CLK_PCI_MEC

R588

@ R588

@

C673

@ C673

@

BC_INT#_ECE502839

BC_CLK_EMC400223
BC_DAT_EMC400223
BC_INT#_EMC400223

BC_CLK_ECE107741
BC_DAT_ECE107741
BC_INT#_ECE107741

MEC_XTAL1
MEC_XTAL2

12

1

2

BEEP29

SIO_SLP_S5#17

ACAV_IN_NB39,50,51

SIO_EXT_SMI#19

SIO_RCIN#19

IRQ_SERIR Q15,31,32,39

PCH_PLTRST#_EC8,18,32,34,36,39

CLK_PCI_MEC18
LPC_LFRAME#15,31,32,39
LPC_LAD015,31,32,39
LPC_LAD115,31,32,39
LPC_LAD215,31,32,39
LPC_LAD315,31,32,39
CLKRUN#17,32,39
SIO_EXT_SCI#19

EC_32KHZ_OUT23

10K_0402_5%~D

10K_0402_5%~D

100K_0402_5%~D

100K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

12

12

12

@R574

12

R1410

R1410

10K_0402_5%~D

10K_0402_5%~D

R583

R583

R575

R575

10K_0402_5%~D

10K_0402_5%~D

R584

R584

1 2

JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO

@

R574

HOST_DEBUG_T X
HOST_DEBUG_RX

R576

R576

10K_0402_5%~D

10K_0402_5%~D

12

R582

R582

Place closely pin 58

10_0402_5%~D

10_0402_5%~D

14

33P_0402_50V8J~D

33P_0402_50V8J~D

23

1

2

C675

C675

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

4

+RTC_CELL

SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK

JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#

C1053

C1053

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1 2

DOCK_POR_RST#
SUS_ON
AUX_ON
BREATH_LED#
PCH_ALW_ON
KYBRD_BKLT_PW M

BC_CLK_ECE5028
BC_DAT_ECE5028
BC_INT#_ECE5028
BC_CLK_EMC4002
BC_DAT_EMC4002
BC_INT#_EMC4002

BC_CLK_ECE1077
BC_DAT_ECE1077
BC_INT#_ECE1077
BEEP
SIO_SLP_S5#
ACAV_IN_NB

SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIR Q
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#

12

R587 0_0402_5%~DR587 0_0402_5%~D

RESET_OUT#

4

R544
0_0402_5%~D

0_0402_5%~D

1

C660

C660

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

U36

U36

PS/2 INTERFACE

PS/2 INTERFACE

A5

GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA

B6

GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK

A37

GPIO110/PS2_CLK2/GPTP-IN6

B40

GPIO111/PS2_DAT2/GPTP-OUT6

A38

GPIO112/PS2_CLK1A

B41

GPIO113/PS2_DAT1A

A39

GPIO114/PS2_CLK0A

B42

GPIO115/PS2_DAT0A

B59

GPIO154/I2C1C_DATA/PS2_CLK1B

A56

GPIO155/I2C1C_CLK/PS2_DAT1B

JTAG INTERFACE

JTAG INTERFACE

A51

GPIO145/JTAG_TDI

B55

GPIO146/I2C1K_CLK/JTAG_TDO

B56

GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK

A53

GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS

B57

JTAG_RST#

FAN PWM & TACH

FAN PWM & TACH

B22

GPIO050/FAN_TACH1

A21

GPIO051/FAN_TACH2

B23

GPIO052/FAN_TACH3

B24

GPIO053/PWM0

A23

GPIO054/PWM1

B25

GPIO055/PWM2

A24

GPIO056/PWM3

BC-LINK

BC-LINK

A43

GPIO123/BCM_A_CLK

B45

GPIO122/BCM_A_DAT

A42

GPIO121/BCM_A_INT#

A12

GPIO022/BCM_B_CLK

B13

GPIO023/BCM_B_DAT

A13

GPIO024/BCM_B_INT#

B20

GPIO044/BCM_C_CLK

A18

GPIO043/BCM_C_DAT

B19

GPIO042/BCM_C_INT#

A20

GPIO047/LSBCM_D_CLK

B21

GPIO046/LSBCM_D_DAT

A19

GPIO045/LSBCM_D_INT#

A16

GPIO032/GPTP-IN3/BCM_E_CLK

B16

GPIO31/GPTP-OUT2/BCM_E_DAT

A15

GPIO30/GPTP-IN2/BCM_E_INT#

HOST INTERFACE

HOST INTERFACE

A6

GPIO011/nSMI

A27

GPIO061/LPCPD#

B29

LDRQ#

A28

SER_IRQ

B30

LRESET#

A29

PCI_CLK

B31

LFRAME#

A30

LAD0

B32

LAD1

A31

LAD2

B33

LAD3

A32

CLKRUN#

A33

GPIO100/nEC_SCI

MASTER CLOCK

MASTER CLOCK

A61

XTAL1

A62

XTAL2

B62

GPIO160/32KHZ_OUT

NC1

B17

+3.3V_M

12

R640

R640

100K_0402_5%~D

100K_0402_5%~D

13

D

D

2

G

G

S

S

+RTC_CELL_VBAT

1 2

R544

AGND

NC2

NC3

NC4

NC5

NC6

NC7

B66

B34

A46

A48

B51

A64

B68

15mil

PCH_PWRGD#

Q189

Q189
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

+3.3V_ALW

B64

A11

A22

B35

VBAT

VTR[1]

VTR[2]

VSS[2]

VSS[5]

VSS[7]

VSS[8]

B27

B60

B12

B11

B28

+VR_CAP

1

8mil

C671

C671

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

PCH_PWRGD# 23

VTR[3]

VR_CAP[1]

3

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C661

C661

1

2

A41

A58

A52

A26

VTR[4]

VTR[5]

VTR[6]

VTR[7]B3VTR[8]

MISC INTERFACE

MISC INTERFACE

GPIO021/RC_ID1
GPIO020/RC_ID2

GPIO025/UART_CLK

GPIO120/UART_TX

GPIO124/GPTP-OUT5/UART_RX

GPIO040/GPTP-OUT3/HSPI_CS2

GPIO012/I2C1H_DATA/I2C2D_DATA

GPIO013/I2C1H_CLK/I2C2D_CLK

GPIO141/I2C1F_DATA/I2C2B_DATA

GPIO142/I2C1F_CLK/I2C2B_CLK

VSS_RO

B54

VCC_PRWGD

GPIO060/KBRST

GPIO101/ECGP_SCLK

GPIO103/ECGP_SIN

GPIO105/ECGP_SOUT

GPIO102/HSPI_SCLK

GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI

GPIO116/MSDATA

GPIO117/MSCLK

GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2

GPIO014/GPTP-IN7/HSPI_CS1

GPIO015/GPTP-OUT7

GPIO016/GPTP-IN8

GPIO017/GPTP-OUT8

GPIO26/GPTP-IN1

GPIO27/GPTP-OUT1

GPIO107/nRESET_OUT

GPIO125/GPTP-IN5

GPIO151/GPTP-IN4

GPIO152/GPTP-OUT4

SMBUS INTERFACE

SMBUS INTERFACE

GPIO003/I2C1A_DATA

GPIO004/I2C1A_CLK

GPIO005/I2C1B_DATA

GPIO006/I2C1B_CLK

GPIO130/I2C2A_DATA

GPIO131/I2C2A_CLK

GPIO132/I2C1G_DATA

GPIO140/I2C1G_CLK

GPIO143/I2C1E_DATA

GPIO144/I2C1E_CLK

DELL PWR SW INF

DELL PWR SW INF

VCI_O VRD_IN

EP

MEC5045-LZY_DQFN132_11X11~D

MEC5045-LZY_DQFN132_11X11~D

C1

SYSTEM_ID for BID
function

3

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

1

C662

C662

2

nFWP

GPIO041

GPIO126

BGPO0

VCI_IN 2#

VCI_OUT

VCI_IN 1#
VCI_IN 0#

VCI_IN 3#

SYSTEM_ID BOARD_ID

C664

C664

C663

C663

2

2

SYSTEM_ID

A10

BOARD_ID

B10

DDR_ON

B14

HOST_DEBUG_T X

B44

HOST_DEBUG_RX

B46

RUNPWROK

B26

EN_INVPWR

A25
B36
B37
B38

DDR_HVREF_RST_GATE

A34
A35

CPU1.5V_S3_GATE

A36

MSDATA

A40

MSCLK

B43

SIO_A20GATE

A45

PS_ID

A55

BAT1_LED#

A57

BAT2_LED#

B61

FWP#

B65

B2

DOCK_SMB_ALERT#

A2

FFS_INT1

B8

CPU_DETECT#

B18

ME_SUS_PWR_ACK

A8

1.5V_SUS_PWRGD

B9

PM_MEPWROK

A9

1.05V_M_PWRGD

A14

ALW_PWRGD_3V_5V

B15

ODD_DET#

A17

RESET_OUT#

B39

M_ON

A44

PCH_RSMRST#

B47

AC_PRESENT

A54

SIO_PWRBTN #

B58

DOCK_SMB_DAT

A3

DOCK_SMB_CLK

B4

LCD_SMBDAT

A4

LCD_SMBCLK

B5

CKG_FFS_SMBDAT

B7

CKG_FFS_SMBCLK

A7

DAI_GPU_R3P_SMBDAT

B48

DAI_GPU_R3P_SMBCLK

B49

CHARGER_SMBDAT

A47

CHARGER_SMBCLK

B50

CARD_SMBDAT

B52

CARD_SMBCLK

A49

USH_SMBDAT

B53

USH_SMBCLK

A50

A59

LAT_ON_SW#

B63

ALWON

A60

VCI_IN1#

A63

POWER_SW _IN#

B67

ACAV_IN

B1

DOCK_PWR_SW#

A1

+3.3V_ALW +3.3V_ALW

R85

R85
1K_0402_5%~D

1K_0402_5%~D

1 2

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

C918

C918

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C666

C666

C665

C665

2

2

DDR_ON 46,47

HOST_DEBUG_T X 36

HOST_DEBUG_RX 36

EN_INVPWR 24

DDR_HVREF_RST_GATE 8

CPU1.5V_S3_GATE 12
MSDATA 36
MSCLK 36

PS_ID 44
BAT1_LED# 43
BAT2_LED# 43

R635

@R635

@

12

R446 0_0402_5%~D@R446 0_0402_5%~D@
R508 0_0402_5%~D@R508 0_0402_5%~D@

ALWON 45

ACAV_IN 23,50,51

1K_0402_5%~D

1K_0402_5%~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C667

C667

2

2

SIO_A20GATE 19

0_0402_5%~D

0_0402_5%~D

DOCK_SMB_DAT 38

DOCK_SMB_CLK 38

LCD_SMBDAT 24

LCD_SMBCLK 24

CKG_FFS_SMBDAT 6

CKG_FFS_SMBCLK 6

DAI_GPU_R3P_SMBDAT 29,53

DAI_GPU_R3P_SMBCLK 29,53

CHARGER_SMBDAT 51

CHARGER_SMBCLK 51

CARD_SMBDAT 34

CARD_SMBCLK 34

USH_SMBDAT 31

USH_SMBCLK 31

12
12

LAT_ON_SW#

12

R98

R98

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

2

1

C668

C668

C651

C651

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

2

Bat2 = Amber LED
Bat1 = Blue LED

20mA drive pins

DOCK_SMB_ALERT# 38,44

HDD_FALL_INT1 18,28

CPU_DETECT# 8

ME_SUS_PWR_ACK 17

1.5V_SUS_PWRGD 46
PM_MEPWROK 17

1.05V_M_PWRGD 48
ALW_PWRGD_3V_5V 45

ODD_DET# 28
RESET_OUT# 15,17

M_ON 42,48

PCH_RSMRST# 17

AC_PRESENT 17
SIO_PWRBTN # 17

HDD_SMBDAT 28

HDD_SMBCLK 28

+RTC_CELL

12

R560

R560
100K_0402_5%~D

100K_0402_5%~D

R1512 10K_0402_5%~DR1512 10K_0402_5%~D

1

C1886

C1886
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

R98 C919

240K 4700p
130K 4700p
33K

4.3K

C919

C919

2K
1K

2

+RTC_CELL

12

R539

R539
100K_0402_5%~D

100K_0402_5%~D

FWP#

1 2

C1885

@C1885

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

POWER_SW _IN#

DOCK_PWR_SW#

+3.3V_ALW

R578

R578
10K_0402_5%~D

10K_0402_5%~D

1 2

R586

@R586

@

10K_0402_5%~D

10K_0402_5%~D

1 2

LAT_ON_SW#_R 43

JTAG_RST#

POWER_SW _IN#23 POWER_SW#_MB 41,43

1 2

REV

X00
X01

4700p

X02
***

4700p

***

4700p
4700p

A00

1 2

R541 10K_0402_5%~DR541 10K_0402_5%~D

1

C659

C659
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+RTC_CELL

12

R550

R550
100K_0402_5%~D

100K_0402_5%~D

1 2

R554 10K_0402_5%~DR554 10K_0402_5%~D

1

2

C670

C670
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

AC_PRESENT

RUNPWROK

CPU_DETECT#

DOCK_SMB_DAT

DOCK_SMB_CLK

RESET_OUT#

CLK_KBD

DAT_KBD

CLK_MSE

DAT_MSE

CKG_FFS_SMBDAT

CKG_FFS_SMBCLK

VCI_IN1#

+3.3V_ALW

10K_0402_5%~D

10K_0402_5%~D

12

R579

R579

12

100_0402_1%~D

100_0402_1%~D

@

@

R585

R585

1

1 2

C658

@C658

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 2

C669

@C669

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

DOCK_PWR_BTN# 38DOCK_PWR_SW#23

1 2

R1231 10K_0402_5%~DR1231 10K_0402_5%~D

R1131 10K_0402_5%~DR1131 10K_0402_5%~D

R1519 100K_0402_5%~DR1519 100K_0402_5%~D

R565 2.2K_0402_5%~DR565 2.2K_0402_5%~D

R567 2.2K_0402_5%~DR567 2.2K_0402_5%~D

R5 8.2K_0402_5%~D@R5 8.2K_0402_5%~D@

R569 4.7K_0402_5%~DR569 4.7K_0402_5%~D

R570 4.7K_0402_5%~DR570 4.7K_0402_5%~D

R571 4.7K_0402_5%~DR571 4.7K_0402_5%~D

R572 4.7K_0402_5%~DR572 4.7K_0402_5%~D

R540 2.2K_0402_5%~DR540 2.2K_0402_5%~D

R542 2.2K_0402_5%~DR542 2.2K_0402_5%~D

1=JTAG interface Reset disabled
0=Reset JTAG interface

R657 100K_0402_5%~DR657 100K_0402_5%~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C1040

C1040

1

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

EMC5045

EMC5045

EMC5045

LA-5472P

LA-5472P

LA-5472P

1

12

12

12

12

12

12

12

12

12

12

1

1

2

2

+3.3V_RUN

12

+5V_RUN

+3.3V_RUN

12

JTAG1

JTAG1
@SHORT PADS~D

@SHORT PADS~D

@

@

40 66Wednesday, January 20, 2010

40 66Wednesday, January 20, 2010

40 66Wednesday, January 20, 2010

+3.3V_ALW_PCH

+3.3V_ALW

+RTC_CELL

of

of

of

A00

A00

A00

5

4

3

2

1

BlueTooth

Touch Pad

D D

TP_DATA

TP_CLK

C C

R1564 100_0603_5%~DR1564 100_0603_5%~D

R1565 100_0603_5%~DR1565 100_0603_5%~D

10P_0402_50V8J~D

10P_0402_50V8J~D

10P_0402_50V8J~D

10P_0402_50V8J~D

1

1

C680

C680

C681

C681

2

2

1 2

1 2

10P_0402_50V8J~D

10P_0402_50V8J~D

1

2

10P_0402_50V8J~D

10P_0402_50V8J~D

1

C682

C682

2

Touch Pad Conn. Pitch=0.5

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C771

C771

2

Place close to
JTP1.5,6

B B

BC_CLK_ECE107740

BC_DAT_ECE107740

BC_INT#_ECE107740

+3.3V_ALW
+3.3V_RUN

+5V_RUN
+5V_ALW

KYBRD_BKLT_PWM40

TP_DET#39

+3.3V_ALW

4.7K_0402_5%~D

4.7K_0402_5%~D

12

R613

R613

C683

C683

TP_CLK
TP_DATA

KYBRD_BKLT_PWM

TP_DET#

4.7K_0402_5%~D

4.7K_0402_5%~D

R614

R614

1 2

DAT_TP_SIO

CLK_TP_SIO

JTP1

JTP1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

G1

18

G2

HRS_FH12-16S-0P5SH(55)~D

HRS_FH12-16S-0P5SH(55)~D

DAT_TP_SIO 40

CLK_TP_SIO 40

+5V_RUN+3.3V_ALW

1

2

+5V_ALW

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C678

C678

C1413

C1413

BT_DET#18

USBP6-18
USBP6+18

COEX1_BT_ACTIVE

COEX2_WLAN_ACTIVE

33P_0402_50V8J~D

33P_0402_50V8J~D

12

R1407

R1407

C1704

C1704

1

2

COEX1_BT_ACTIVE36

BT_ACTIVE43

BT_RADIO_DIS#39

COEX2_WLAN_ACTIVE36

Power Switch for debug

POWER_SW#_MB40,43

POWER_SW#_MB

C684

@C684

@

100P_0402_50V8J~D

100P_0402_50V8J~D

+3.3V_RUN

C1703

C1703

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

JBT

JBT

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

G1

14

G2

E&T_3703-E12N-03R

100P_0402_50V8J~D

100P_0402_50V8J~D

10K_0402_5%~D

10K_0402_5%~D

@C1334

@

C1334

1

2

1

2

E&T_3703-E12N-03R

2

112

PWRSW1

PWRSW1

@SHORT PADS~D

@SHORT PADS~D

Place on Top

@

@

2

112

PWRSW2

PWRSW2

@SHORT PADS~D

@SHORT PADS~D

Place on Bottom

@

@

FAN@

FAN@

Part Number Description

Part Number Description

Part Number Description

Part Number Description

@SM CARD BODY

@SM CARD BODY

Part Number Description

Part Number Description

@PCMCIA BODY

@PCMCIA BODY

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

Part Number Description

FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA

FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA

DC28A000800

DC28A000800

Speak@

Speak@

SPK PACK ZJX 2.0W 4 OHM FG

SPK PACK ZJX 2.0W 4 OHM FG

PK230003Q0L

PK230003Q0L

S SOCKET TYCO 1770551-1

S SOCKET TYCO 1770551-1

SP070007V0L

SP070007V0L

10P H5.9 SMART

10P H5.9 SMART

PCMCIA TYCO

DC000001Q0L

DC000001Q0L

MDC wire set cable@

MDC wire set cable@

DC02000CS0L

DC02000CS0L

T/P wire set cable@

T/P wire set cable@

DC02000840L

DC02000840L

LVDS c able@

LVDS c able@

DC020003Y0L

DC020003Y0L

LVDS c able@

LVDS c able@

DC02000870L

DC02000870L

RTC BATT@

RTC BATT@

GC20323MX00

GC20323MX00

PCMCIA TYCO
1759096-1

1759096-1

H-CONN SET ZGX

H-CONN SET ZGX
MB-MDC

MB-MDC

H-CONN SET ZJX

H-CONN SET ZJX
MB-B/T-TP-FP

MB-B/T-TP-FP

H-CONN SET ZJX MB-LCD

H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)

14 WXGA+(-1ch)

H-CONN SET ZJX

H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)

MB-LCD 14 WXGA+(-2ch)

BATT CR2032 3V

BATT CR2032 3V
220MAH MAXELL

220MAH MAXELL

TP_CLK
TP_DATA

A A

Place close to JTP1 connector

SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D

@

@

@

@

D53

D53

D54

2 1

D54

2 1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Touch PAD/Int KB/LID

Touch PAD/Int KB/LID

Touch PAD/Int KB/LID

LA-5472P

LA-5472P

LA-5472P

41 66Wednesday, January 20, 2010

41 66Wednesday, January 20, 2010

41 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

4

3

2

1

DC/DC Interface

+15V_ALW

+3.3V_ALW2

12

R602

R602

100K_0402_5%~D

PCH_ALW_ON40

SUS_ON40

100K_0402_5%~D

2

+3.3V_ALW2

2

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

M_ON40,48

D D

C C

B B

ALW_ENABLE21

ALW_ON_3.3V#

61

Q57A

Q57A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

12

R604

R604
100K_0402_5%~D

100K_0402_5%~D

SUS_ON_3.3V#

61

Q62A

Q62A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

+3.3V_ALW2

Q68A

Q68A

2

5

+15V_ALW

5

12

R611

R611
100K_0402_5%~D

100K_0402_5%~D

M_ON_3.3V#

61

12

3

4

12

3

4

R598

R598
100K_0402_5%~D

100K_0402_5%~D

ALW_ENABLE

Q57B

Q57B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

R603

R603
100K_0402_5%~D

100K_0402_5%~D

SUS_ENABLE

Q62B

Q62B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

+15V_ALW

5

+3.3V_ALW_PCH Source

+3.3V_ALW +3.3V_ALW_PCH

Q54

Q54
SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

D

D

6

S

S

45
2
1

+3.3V_SUS Source

+3.3V_ALW

100K_0402_5%~D

100K_0402_5%~D

12

R610

R610

M_ENABLE

3

Q68B

Q68B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

Q60

Q60

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

D

D

6

2
1

+3.3V_ALW

G

G

3

1

2

S

S

G

G

3

1

C692

C692
4700P_0402_25V7K~D

4700P_0402_25V7K~D

2

1

C687

C687

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

C688

C688

3300P_0402_50V7K~D

3300P_0402_50V7K~D

45

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

C690

C690

2

+3.3VM Source

Q66

Q66
SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

D

D

6

2
1

G

G

12

R601

R601
20K_0402_5%~D

20K_0402_5%~D

+3.3V_SUS

20K_0402_5%~D

20K_0402_5%~D

12

R605

R605

S

S

45

3

1

C696

C696
4700P_0402_25V7K~D

4700P_0402_25V7K~D

2

RUN_ON_ENABLE#

RUN_ON_CPU1.5VS3#

+3.3V_M

10U_0805_10V4Z~D

10U_0805_10V4Z~D

@

@

20K_0402_5%~D

20K_0402_5%~D

12

R612

R612

1

C694

C694

2

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

R1508

R1508

1.5V_PWRGD8 0.75V_VR_EN 47

1 2

R1548 0_0402_5%~DR1548 0_0402_5%~D

1 2

R1521 0_0402_5%~D@ R1521 0_0402_5%~D@

1 2

100K_0402_5%~D

100K_0402_5%~D

Q208

Q208

BSS138_SOT23~D

BSS138_SOT23~D

2

G

G

13

D

D

S

S

Discharg Circuit

+3.3V_M

12

13

D

M_ON_3.3V#

D

2

G

G

S

S

+3.3V_M_CHG

+5VRUN Source

+15V_ALW+3.3V_ALW2 +5V_ALW +5V_RUN

12

R597

12

R599

R599
100K_0402_5%~D

100K_0402_5%~D

RUN_ON_ENABLE#

61

Q56A

Q56A

RUN_ON12,34,39,47,52

39_0603_5%~D

39_0603_5%~D

R616

R616

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Q72

Q72

2

R597
100K_0402_5%~D

100K_0402_5%~D

5V_RUN_ENABLE

3

Q56B

Q56B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

5

4

+15V_ALW

12

R606

R606
100K_0402_5%~D

100K_0402_5%~D

3.3V_RUN_ENABLE

13

D

D

2

G

Q64

G

Q64
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

+1.5V_MEM+15V_ALW

100K_0402_5%~D

100K_0402_5%~D

12

R1224

R1224

13

D

D

Q152

Q152

2

G

G

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

1.5V_RUN_ENABLE

Q55

Q55

FDS8878_SO8~D

FDS8878_SO8~D

8
7

5

+3.3V_RUN Source

Q61

Q61
NTMS4107NR2G_SO8~D

NTMS4107NR2G_SO8~D

8
7

5

+1.5V_RUN Source

Q151

Q151

SIS406DN-T1-GE3_POWERPAK8-5~D

SIS406DN-T1-GE3_POWERPAK8-5~D

5

1
2
36

4

2200P_0402_50V7K~D

2200P_0402_50V7K~D

1

C689

C689

2

4

1

C693

C693
470P_0402_50V7K~D

470P_0402_50V7K~D

2

1
2
3

4

C1190

C1190

1

C1191

C1191
4700P_0402_25V7K~D

4700P_0402_25V7K~D

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1
2
36

1

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

2

C691

C691

10U_0805_10V4Z~D

10U_0805_10V4Z~D

+1.5V_RUN

12

C686

C686

+3.3V_RUN+3.3V_ALW

1

2

12

R600

R600

20K_0402_5%~D

20K_0402_5%~D

12

R607

R607

@

@

20K_0402_5%~D

20K_0402_5%~D

R1225

R1225

20K_0402_5%~D

20K_0402_5%~D

Discharg Circuit

+3.3V_SUS

1K_0402_5%~D

1K_0402_5%~D

12

@R627

@

R627

+3.3V_SUS_CHG

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

13

D

D

@

@

Q81

SUS_ON_3.3V#

A A

Q81

2

G

G

ALW_ON_3.3V#

S

S

+3.3V_ALW_PCH

1K_0402_5%~D

1K_0402_5%~D

12

+3.3V_ALWPCH_CHG

13

D

D

2

G

G

S

S

@R628

@

R628

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

@

@

Q82

Q82

RUN_ON_ENABLE#

12

+5V_RUN_CHG

13

D

D

2

G

G

S

S

+1.5V_RUN +3.3V_RUN+5V_RUN

1K_0402_5%~D

1K_0402_5%~D

@ R622

@

R622

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

@

@

Q76

Q76

1K_0402_5%~D

1K_0402_5%~D

12

@ R623

@

R623

+1.5V_RUN_CHG

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

13

D

D

@

@

Q77

Q77

2

G

G

S

S

39_0603_5%~D

39_0603_5%~D

12

R625

R625

+3.3V_RUN_CHG

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

13

D

D

2

G

G

S

S

+1.05V_RUN

39_0402_5%~D

39_0402_5%~D

12

@ R636

@

R636

+1.05V_RUN_CHG

RUN_ON_CPU1.5VS3#12

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

13

D

D

@

Q79

Q79

@

Q80

2

Q80

G

G

S

S

12

+1.5V_CPU_VDDQ_CHG

13

D

D

2

G

G

S

S

R1502

R1502
220_0402_5%~D

220_0402_5%~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Q202

Q202

+0.75V_DDR_VTT+1.5V_CPU_VDDQ

2

G

G

12

R624

R624
22_0603_5%~D

22_0603_5%~D

+DDR_CHG

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

13

D

D

Q78

Q78

S

S

+15V_ALW

2

G

G

+1.05V_M

12

R1306

R1306
100K_0402_5%~D

100K_0402_5%~D

1.05V_RUN_ENABLE

13

D

D

Q1

Q1
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

Q183

Q183

SI7658ADP-T1-GE3_POWERPAK8-5~D

SI7658ADP-T1-GE3_POWERPAK8-5~D

5

4

2200P_0402_50V7K~D

2200P_0402_50V7K~D

1

C1412

C1412

2

+1.05V_RUN Source

+1.05V_RUN

1
2
3

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

12

C1411

C1411

R1307

R1307

20K_0402_5%~D

20K_0402_5%~D

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

POWER CONTROL

POWER CONTROL

POWER CONTROL

LA-5472P

LA-5472P

LA-5472P

42 66Wednesday, January 20, 2010

42 66Wednesday, January 20, 2010

42 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

+3.3V_RUN

12

R654

R654
10K_0402_5%~D

10K_0402_5%~D

S

SATA_ACT#_R15

SSM3K7002FU_SC70-3~D

D D

SSM3K7002FU_SC70-3~D

MASK_BASE_LEDS#

S

Q93

Q93

HDD LED solution for Blue LED

+5V_RUN

D

D

SATA_ACT#

13

G

G

2

2

Q92

Q92
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

R659

R659

1 3

1K_0402_5%~D

1K_0402_5%~D

1 2

SATA_LED

4

D42

D42

LTST-C191ZBKT-Q_BLUE~D

LTST-C191ZBKT-Q_BLUE~D

3

JSNIF1

JSNIF1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

TYCO_1-2041070-2~D

TYCO_1-2041070-2~D

+3.3V_ALW

PWR_BTN_BD_DET#

LID_CL#

BREATH_BLUE_LED_SNIFF

WIRELESS_ON#/OFF

LID_CL#39

2

1

12

PWR_BTN_BD_DET#39

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

POWER_SW#_MB40,41
LAT_ON_SW#_R40

C685

C685

WIRELESS_ON#/OFF39

H1

@H1

@

@H2

@

@H_3P0

@H_3P0

@H_3P0

@H_3P0

1

H8

@H8

@

@H9

@

@H_3P0

@H_3P0

@H_3P0

13

GND

14

GND

@H_3P0

1

H2

1

H9

1

+5V_ALW

H3

@H3

@

@H_3P0

@H_3P0

H10

@H10

@

@H_3P2

@H_3P2

1

1

2

H15

@H15

@

@H_5P2

@H_5P2

H4

@H4

@

@H_3P0

@H_3P0

H11

@H11

@

@H_3P2

@H_3P2

1

1

1

H16

@H16

@

@H_3P2

@H_3P2

H5

@H5

@

@H_3P0

@H_3P0

H12

@H12

@

@H_3P2

@H_3P2

1

1

1

@H6

@

@H_3P0

@H_3P0

@H13

@

@H_3P2

@H_3P2

H18

@H18

@

@H_4P5N

@H_4P5N

1

H7

@H7

@

H6

@H_3P0

@H_3P0

1

1

H13

H14

@H14

@

@H_3P1X2P1

@H_3P1X2P1

1

1

EMI CLIP

CLIP1

CLIP1
EMI_CLIP

EMI_CLIP

GND

CLIP2

CLIP2
EMI_CLIP

EMI_CLIP

GND

1

Fiducial Mark

FD1

@ FD1

@

1

FIDUCIAL MARK~D

FIDUCIAL MARK~D

FD2

@ FD2

1

1

@

1

FIDUCIAL MARK~D

FIDUCIAL MARK~D

FD3

@ FD3

@

1

FIDUCIAL MARK~D

FIDUCIAL MARK~D

FD4

@ FD4

@

1

FIDUCIAL MARK~D

FIDUCIAL MARK~D

+3.3V_WLAN

12

R662

R662
100K_0402_5%~D

100K_0402_5%~D

S

LED_WLAN_OUT#36

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

MASK_BASE_LEDS#

C C

LED_WWAN_OUT#36

B B

BT_ACTIVE41

S

Q98

Q98

G

G

2

+3.3V_RUN

12

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

MASK_BASE_LEDS#

C1337

C1337

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

BT_ACTIVE

10K_0402_5%~D

10K_0402_5%~D

12

R748

R748

D67

D67

SDM10U45-7_SOD523-2~D

SDM10U45-7_SOD523-2~D

D

D

13

WLAN LED solution for Blue LED

R206

R206
100K_0402_5%~D

100K_0402_5%~D

S

S

Q116

Q116

G

G

+3.3V_RUN

U117

U117

5

1

NC7SZ04P5X_NL_SC70-5~D

NC7SZ04P5X_NL_SC70-5~D

P

NC

4

A2Y

G

3

+5V_RUN

21

2

D

D

13

2

2

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

MASK_BASE_LEDS#

Q97

Q97
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 3

R663

R663
1K_0402_5%~D

1K_0402_5%~D

WLAN_LED

1 2

+5V_RUN

Q115

Q115
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

R125

R125
1K_0402_5%~D

1K_0402_5%~D

1 3

1 2

WWAN LED solution for Blue LED

S

S

Q95

Q95

G

G

2

D

D

13

LTST-C191ZBKT-Q_BLUE~D

LTST-C191ZBKT-Q_BLUE~D

WWAN_LED

+5V_RUN

2

LTST-C191ZBKT-Q_BLUE~D

LTST-C191ZBKT-Q_BLUE~D

1 3

WPAN LED solution for Blue LED

D45

D45

D61

D61

Q94

Q94
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

R661

R661
1K_0402_5%~D

1K_0402_5%~D

1 2

12

12

WPAN_LED

LTST-C191ZBKT-Q_BLUE~D

LTST-C191ZBKT-Q_BLUE~D

R89

R89

47K_0402_5%~D

47K_0402_5%~D

BAT2_LED#

BAT2_LED#40

+3.3V_ALW

12

R82

R82

47K_0402_5%~D

47K_0402_5%~D

BAT1_LED#

BAT1_LED#40

D43

D43

12

CAP_LED#39

NUM_LED#39

SCRL_LED#39

+3.3V_ALW

12

C1058

C1058

1 2

5

1

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

P

NC

A2Y

G

U63

U63

NC7SZ04P5X_NL_SC70-5~D

NC7SZ04P5X_NL_SC70-5~D

3

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

C1059

C1059

1 2

5

1

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

P

NC

4

A2Y

G

U64

U64

NC7SZ04P5X_NL_SC70-5~D

NC7SZ04P5X_NL_SC70-5~D

3

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

BAT1_LED

BAT2_LED

+3.3V_ALW

2

Q145A

Q145A

Q145B

Q145B

2

1 3

+5V_ALW

2

5

R1007

R1007
100K_0402_5%~D

100K_0402_5%~D

1 2

61

2

3

5

4

SYS_LED_MASK#39

LED Circuit Control Table

SYS_LED_MASK# LID_CL#

Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)

A A

5

0
10

4

SYS_LED_MASK#

LID_CL#

SYS_LED_MASK#39

1

2

+3.3V_ALW

B

A

X

11

5

U65

U65

P

O

G

TC7SH08FU_SSOP5~D

TC7SH08FU_SSOP5~D

3

C1061

C1061

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

MASK_BASE_LEDS#

4

BREATH_LED#38,40

47K_0402_5%~D

47K_0402_5%~D

+3.3V_ALW

C1060

12

R90

R90

3

C1060

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

5

1

P

NC

BREATH_LED#_R

4

A2Y

G

U42

U42
NC7SZ04P5X_NL_SC70-5~D

NC7SZ04P5X_NL_SC70-5~D

3

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

Q121

Q121
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 3

Q122

Q122
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

R1006

R1006
100K_0402_5%~D

100K_0402_5%~D

1 2

61

Q144A

Q144A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

+5V_ALW

3

Q144B

Q144B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

SYS_LED_MASK#39

+3.3V_ALW

2

+3.3V_ALW

12

R1005

R1005
100K_0402_5%~D

100K_0402_5%~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

+5V_ALW

12

61

Q134A

Q134A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

+5V_ALW

2

2

12

61

Q135A

Q135A
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

Q120

Q120
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 3

+5V_ALW

2

12

R1004

R1004
100K_0402_5%~D

100K_0402_5%~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

Q101

Q101
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 3

Q143

Q143

D

S

D

S

13

G

G

2

R999

R999
100K_0402_5%~D

100K_0402_5%~D

SYS_LED_MASK#39

R1000

R1000
100K_0402_5%~D

100K_0402_5%~D

MASK_BASE_LEDS#

1 2

R556 1K_0402_5%~DR556 1K_0402_5%~D

1 2

R596 1K_0402_5%~DR596 1K_0402_5%~D

1 2

R655 1K_0402_5%~DR655 1K_0402_5%~D

Q99

Q99

PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 3

1 2

R665 1K_0402_5%~DR665 1K_0402_5%~D

+5V_ALW

Q142

Q142

D

D

2

13

G

G

2

R666

R666
150_0402_5%~D

150_0402_5%~D

1 2

+3.3V_ALW

2

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

Q140

Q140
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 3

Q134B

Q134B

4

5

Q135B

Q135B

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

5

2

Keyboard Status LED

R_CAP_LED#

R_NUM_LED#

R_SCRL_LED#

D57

D57
LTST-C191ZBKT-Q_BLUE~D

LTST-C191ZBKT-Q_BLUE~D

D58

D58
LTST-C191ZBKT-Q_BLUE~D

LTST-C191ZBKT-Q_BLUE~D

D59

D59
LTST-C191ZBKT-Q_BLUE~D

LTST-C191ZBKT-Q_BLUE~D

MASK_BASE_LEDS#

Battery LED

BATT_BLUE

2 1

BATT_YELLOW

LTST-C155TBJSKT_Blue/YEL~D

LTST-C155TBJSKT_Blue/YEL~D

MASK_BASE_LEDS#

Q139

Q139
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 3

1 2

R1002 1K_0402_5%~DR1002 1K_0402_5%~D

R1003

R1003
150_0402_5%~D

150_0402_5%~D

1 2

+5V_ALW

2

3

2

3

1 3

+5V_ALW

1 3

Q137

Q137
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

Q138

Q138
PDTA114EU_SC70-3~D

PDTA114EU_SC70-3~D

1 2

12

12

12

13

D

D

2

G

G

Q150

Q150

S

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

D46

D46

BLUE

BLUE

YEL

YEL

BATT_BLUE_LED 24

BATT_YELLOW_LED 24

1 2

R664 1K_0402_5%~DR664 1K_0402_5%~D

R1001

R1001
150_0402_5%~D

150_0402_5%~D

S

34

13

D

D

2

G

G

Q141

Q141

S

S

BREATH_BLUE_LED

BREATH_BLUE_LED_SNIFF

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

BREATH_BLUE_LED 24

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PAD and Standoff

PAD and Standoff

PAD and Standoff

LA-5472P

LA-5472P

LA-5472P

1

43 66Wednesday, January 20, 2010

43 66Wednesday, January 20, 2010

43 66Wednesday, January 20, 2010

of

of

of

A00

A00

A00

5

4

3

2

1

+COINCELL

12

+3.3V_ALW

2

3

PD3

PD3

1

DA204U_SOT323~D@

DA204U_SOT323~D@

100_0402_5%~D

100_0402_5%~D

1 2

BLM18BD102SN1D_0603~D

BLM18BD102SN1D_0603~D

PC5

PC5

ESD Diodes

3

PD4

PD4

PR4

PR4

PL2

PL2

12

+DC_IN

12

1 2

PR16

PR16

0.022U_0805_50V7K~D

0.022U_0805_50V7K~D

2

1

DA204U_SOT323~D@

DA204U_SOT323~D@

PR5

PR5

100_0402_5%~D

100_0402_5%~D

1 2

2

3

1

PD8

PD8
SM24_SOT23

SM24_SOT23

DC_IN+ Source

PQ74

PQ74

FDS6679AZ_SO8~D

FDS6679AZ_SO8~D

1

S

2

S

3

S

4

G

1M_0402_5%~D

1M_0402_5%~D

PR19

PR19

12

1M_0402_5%~D

1M_0402_5%~D

PR20

PR20

1 2

10K_0402_5%~D

10K_0402_5%~D

PL1

PL1

FBMA-L18-453215-900LMA90T_1812~D

FBMA-L18-453215-900LMA90T_1812~D

1 2

PJP1

PBATT+_C

PC2

PR8

1 2

0_0402_5%~D

0_0402_5%~D

D

D

1 3

G

G

2

C

C

PQ3

PQ3

B

B

MMST3904-7-F_SOT323~D

MMST3904-7-F_SOT323~D

E

E

3 1

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PC2

S

S

PQ2

PQ2
FDV301N_NL_SOT23-3~D

FDV301N_NL_SOT23-3~D

+DC_IN_SS

12

PR17

PR17

4.7K_0805_5%~D

4.7K_0805_5%~D

PBAT_SMBCLK <40>
PBAT_SMBDAT <40>

@ PR8

@

PR11

PR11

1 2

100K_0402_1%~D

100K_0402_1%~D

@

@

SOFT_START_GC<50>

PR13

PR13

1 2

15K_0402_1%~D

15K_0402_1%~D

8

D

7

D

6

D

5

D

12

PC6

PC6

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2

12

PC8

PC8

PC7

PC7

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PC10

PC10

10U_1206_25V6M~D

10U_1206_25V6M~D

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PR10

PR10

33_0402_5%~D

33_0402_5%~D

1 2

12

PJP1

PD7

PD7

DA204U_SOT323~D

DA204U_SOT323~D

+5V_ALW

3

+5V_ALW

2

1

12

PR12

PR12

PBATT+

GND

10K_0402_1%~D

10K_0402_1%~D

PR14

PR14

1 2

10K_0402_5%~D@

10K_0402_5%~D@

SLICE_BAT_PRES#<38, 39,50>

PD9

PD9

@

@

+3.3V_ALW

PR2

PR2

10K_0402_1%~D

10K_0402_1%~D

+3.3V_ALW

PR9

PR9

1 2

2.2K_0402_5%~D

2.2K_0402_5%~D

+5V_ALW

3

DA204U_SOT323~D

DA204U_SOT323~D

12

1

PD6

PD6

1 2

RB751V-40_SOD323-2~D

RB751V-40_SOD323-2~D

1 2

0_0402_5%~D

0_0402_5%~D

NB_PSID_TS5A63157

2

PSID_DISABLE# <39>

PR7

PR7

DOCK_PSID<38> GPIO_PSI D_SELECT <39>

D D

2

3

PD2

PD2

DA204U_SOT323~D@

DA204U_SOT323~D@

1

Primary Battery Connector

11

GND

10

GND

9

9

8

8

7

7

6

6

PBATT1

PBATT1

PC12

PC12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

5
4
3
2
1

12

5
4
3
2
1

0_0402_5%~D

0_0402_5%~D

PC9

PC9

FBMJ4516HS720NT_1806~D

FBMJ4516HS720NT_1806~D

12

PC3

PC3

2200P_0402_50V7K~D

2200P_0402_50V7K~D

SUYIN_200275MR009G50PZR

SUYIN_200275MR009G50PZR

C C

B B

PJPDC1

PJPDC1

1

1

2

2

-DCIN_JACK

3

3

4

4

+DCIN_JACK

5

5

6

6

7

7

MOLEX_87438-0743

MOLEX_87438-0743

A A

Z4304
Z4305
Z4306

NB_PSID

+5V_ALW

3

PD10

PD10

@

@

DA204U_SOT323~D

DA204U_SOT323~D

1

PR15

PR15

1 2

PC4

PC4

1 2

@

@

.47U_0402_6.3V6-K~D

.47U_0402_6.3V6-K~D

PL3

PL3

FBMJ4516HS720NT_1806~D

FBMJ4516HS720NT_1806~D

1 2

1

12

PD11

PD11

@

@

2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PL4

PL4

1 2

2

VZ0603M260APT_0603

VZ0603M260APT_0603

@

@

GND

PC11

PC11

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR3

PR3

100_0402_5%~D

100_0402_5%~D

1 2

GND

DCIN_CBL_DET# <39>

+DC_IN

12

12

PR18

@ PR18

@

4.7K_0805_5%~D

4.7K_0805_5%~D

+3.3V_RTC_LDO

RB715F UMD3

RB715F UMD3

PBAT_PRES# <39>

PQ1

PQ1

FDN338P_NL_SOT23-3~D

FDN338P_NL_SOT23-3~D

1

3

1

3

1 3

2

2

2

12

PC87

PC87
1500P_0402_7K~D

1500P_0402_7K~D

Z4012

3

2

PD1

PD1

1

DOCK_SMB_ALERT# < 38,40>

PU1

PU1

1

NO

2

GND

NC3COM

TS5A63157DCKR_SC70-6~D

TS5A63157DCKR_SC70-6~D

COIN RTC Battery

PR1

PR1
1K_0402_5%~D

1K_0402_5%~D

+COINCELL

+RTC_CELL

1

PC1

PC1
1U_0603_10V4Z~D

1U_0603_10V4Z~D

2

Move to power schematic

6

IN

5

+5V_ALW

V+

4

PS_ID <40>

JRTC1

JRTC1

1

1

2

4

2

G1

3

5

3

G2

MOLEX_53398-0371~D

MOLEX_53398-0371~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

+DCIN

+DCIN

+DCIN

LA-5472P

LA-5472P

LA-5472P

44 66Wednesday , January 20, 2010

44 66Wednesday , January 20, 2010

44 66Wednesday , January 20, 2010

1

A00

A00

A00

of

of

of

5

4

3

2

1

+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO

PJP48

PJP48

+PWR_SRC

D D

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

ϱsŽůƚнͲϱй
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚϱϵϯϲ
WĞĂŬƵƌƌĞŶƚϴϰϴϭ
KWͺD/EϭϬϭϳϳ

&ƐǁсϰϬϬ<,nj

+5V_ALWP

C C

3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D

3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D

1

+

+

PC33

PC33

PC34

PC34

2

@

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

330U_D3L_6.3VM_R25~D

330U_D3L_6.3VM_R25~D

B B

A A

12

PR34

PR34

12

@

@

0_0402_5%~D

0_0402_5%~D

12

PR40

PR40

0_0402_5%~D

0_0402_5%~D

GNDA_3V5V

+5V_ALWP

+3.3V_ALWP

PL5

PL5

1 2

PJP5

PJP5

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PJP6

PJP6

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PJP8

PJP8

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PJP9

PJP9

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

+DC1_PWR_SRC

WŽƉϭϬKŚŵĨŽƌDyϭϳϬϮϬ

PJP49

PJP49

1 2

+5V_ALW2

PR23

PR22

PC18

PC18

@

@

10U_1206_25V6M~D

10U_1206_25V6M~D

GNDA_3V5V

PC41

PC41

1 2

200K_0402_5%~D

200K_0402_5%~D

PAD-OPEN1x1m

PAD-OPEN1x1m

PR22

12

PC25

PC25

332K_0402_1%~D

332K_0402_1%~D

+5V_ALW_PHASE

+5V_ALWP

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PJP7

PJP7

12

PC15

PC15

0.1U_0805_50V7M~D

0.1U_0805_50V7M~D

+5V_ALW_UGATE

12

12

12

12

PC16

PC16

PC17

PC17

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PC29

PC29

@

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

PR46

PR46

+15V_ALW

12

PC14

PC14

2200P_0402_50V7K~D

2200P_0402_50V7K~D

3

D

PQ6

PQ6

2

G

S

SI4134DY-T1-GE3 1N SO8

SI4134DY-T1-GE3 1N SO8

1

12

3

PC31

PC31

@

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR38

PR38

@

@

4.7_1206_5%~D

4.7_1206_5%~D

ALWON<40>

THERM_STP#<23>

D

PQ8

PQ8

2

G

S

1

FDMS7692 1N POWER56-8

FDMS7692 1N POWER56-8

1 2

PR44

PR44

2K_0402_5%~D

2K_0402_5%~D

PR45

PR45

0_0402_5%~D

0_0402_5%~D

+5V_ALW

(100mA,20mils ,Via NO.=1)

+3.3V_ALW

PR23

1 2

0_0805_5%~D

0_0805_5%~D

+3.3V_ALW2

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

+3.3V_RTC_LDO

GNDA_3V5V

PR32

PR32

+5V_FB1

1 2

EN_3V_5V

POK1

12

PC35

PC35

PR36

PR36

1_0603_5%~D

1_0603_5%~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

+5V_ALW_LGATE

2

3

PD12

PD12

BAT54SW-7-F_SOT323-3~D

BAT54SW-7-F_SOT323-3~D

2

3

PD13

PD13

BAT54SW-7-F_SOT323-3~D

BAT54SW-7-F_SOT323-3~D

+15V_ALWP

12

1 2

0_0805_5%~D

0_0805_5%~D

12

PR25

PR25

0_0402_5%~D

0_0402_5%~D

LDOREFIN

PU19

PU19

+5V_ALWP

9
10
11
12
13
14
15
16

+5V_ALW_BOOT

PC39

PC39

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

1 2

PC42

PC42

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

1 2

200K_0402_1%~D

200K_0402_1%~D

12

PC43

PC43

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PC26

PC26

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

GNDA_3V5V

33

BYP
OUT1
FB1
ILIM1
PGOOD1
ON1
DH1
LX1

3

PR48

PR48

12

+5V_ALW2P

8

7

PAD

LDOREFIN

BST117DL118VDD19SECFB20AGND21PGND22DL223BST2

PD14

PD14

1

BAT54CW_SOT323~D

BAT54CW_SOT323~D

2

12

GNDA_3V5V

PAD-OPEN1x1m

PAD-OPEN1x1m

5V_3V_REF

VIN

EN_3V_5V

+3.3V_ALW2

5

4

3

6

IN

LDO

RTC

ONLDO

SECFB

GNDA_3V5V

PC40

PC40

+5V_ALW2

PR49

PR49
39K_0402_5%~D

39K_0402_5%~D

1 2

TON2VCC

1U_0603_10V6K~D

1U_0603_10V6K~D

PC24

PC24

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

@ PR26

@

0_0402_5%~D

0_0402_5%~D

1 2

@ PR27

@

0_0402_5%~D

0_0402_5%~D

1 2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

@ PR28

@

0_0603_5%~D

0_0603_5%~D

1

REF

REFIN2

ILIM2

OUT2

SKIP

PG00D2

ON2

DH2
LX2

24

MAX17020ETJ+_TQFN32_5X5~D

MAX17020ETJ+_TQFN32_5X5~D

+3.3V_ALW_BOOT

12

GNDA_3V5V

12

PR26

PR27

PC28

PC28

1 2

PR28

32
31
30
29
28
27
26
25

+5V_VCC1

PR24

PR24

10_0603_5%~D

10_0603_5%~D

12

PC27

PC27

GNDA_3V5V

REFIN2

365K_0402_1%~D

365K_0402_1%~D

1 2

+3.3V_OUT2

PR33 0_0402_5%~DPR33 0_0402_5%~D

POK2
EN_3V_5V
+3.3V_ALW_UGATE

+3.3V_ALW_PHASE

PR39

PR39

1_0603_5%~D

1_0603_5%~D

1 2

+3.3V_ALW_LGATE

PJP50

PJP50

1 2

PAD-OPEN1x1m

PAD-OPEN1x1m

PR31

PR31

12

PC19

PC19

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

1U_0603_10V6K~D

1U_0603_10V6K~D

12

PR29

PR29

0_0402_5%~D

0_0402_5%~D

PR30

PR30

@

@

1 2

0_0402_5%~D

0_0402_5%~D

GNDA_3V5V

12

GNDA_3V5V

12

PC36

PC36

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

POK2

POK1

12

PC30

PC30

@

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+3.3V_ALWP

+3.3V_ALWP

PR42

PR42

PR43

PR43

@

@

1 2

1 2

100K_0402_1%~D

100K_0402_1%~D

100K_0402_1%~D

100K_0402_1%~D

12

PR47

PR47

0_0402_5%~D

0_0402_5%~D

8

D6D5D7D

PQ7

G

S

S

3

2

1

8

D6D5D7D

G

S

S

3

2

1

PQ7

S

4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D

4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D

SI4128DY-T1-GE3 1N SO8

SI4128DY-T1-GE3 1N SO8

12

PQ9

PQ9

@PR37

@

S

1 2

SI4134DY-T1-GE3 1N SO8

SI4134DY-T1-GE3 1N SO8

ALW_PWRGD_3V_5V <40>

4

4

12

PC21

PC21

PC20

PC20

0.1U_0805_50V7M~D

0.1U_0805_50V7M~D
10U_1206_25V6M~D

10U_1206_25V6M~D

PL6

PL6

@

@

PC32

PC32

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR37

4.7_1206_5%~D

4.7_1206_5%~D

12

12

PC22

PC22

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PR35

PR35

0_0402_5%~D

0_0402_5%~D

@

@

PR41

PR41

0_0402_5%~D

0_0402_5%~D

GNDA_3V5V

ϯϯsŽůƚнͲϱй
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚϰϵϰϮ
WĞĂŬĐƵƌƌĞŶƚϳϬϲϭ

12

KWͺD/Eϴϰϳϯ

PC23

PC23

&ƐǁсϯϬϬ<,nj

@

@

10U_1206_25V6M~D

10U_1206_25V6M~D

+3.3V_ALWP

+3.3V_ALWP+5V_ALWP

12

12

PC38

PC37

PC37

@

@

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

PC38

1

+

+

2

330U_D3L_6.3VM_R25~D

330U_D3L_6.3VM_R25~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DC/DC +3V/ +5V

DC/DC +3V/ +5V

DC/DC +3V/ +5V

LA-5472P

LA-5472P

LA-5472P

1

45 66Wednesday, January 20, 2010

45 66Wednesday, January 20, 2010

45 66Wednesday, January 20, 2010

A00

A00

A00

of

of

of

5

4

3

2

1

+1.5V_SUS_P(TPS51318)

DC_5V_ALW1

+3.3V_ALW

PC104

PC104

1 2

@

@

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

TPS51318_COMP

TPS51318_VFB

+1.5V_SUS_P

TPS51318_SS

12

PC91

PC91

@

@

PR75

PR75

2200P_0402_50V7K~D

2200P_0402_50V7K~D

GNDA_TPS_1.5VGNDA_TPS_1.5V

@

@

1 2

GNDA_TPS_1.5V

12

12

@

@

1.33K_0402_1%~D

1.33K_0402_1%~D

D D

+1.5V_SUS_P

C C

PR79 5.6K_0402_5%~D@ PR79 5.6K_0402_5%~D@

0_0402_5%~D

0_0402_5%~D

PR76

@PR76

@

PC103 100P_0402_50V8J~D@ PC103 100P_0402_50V8J~D@

12

PR78 2K_0402_5%~D@ PR78 2K_0402_5%~D@

12

1800P_0402_50V7K~D

1800P_0402_50V7K~D

@PC92

@

12

PC93 680P_0402_50V7K~D

PC93 680P_0402_50V7K~D

12

PC92

@PU15

@

1

2

3

4

5

6

PU15

VCCA

GND

COMP

VFB

VOUT

SS

17

16

VIN

VIN

VBST

PGOOD

FSET

MODE

IMON

PGND9SW

PGND

TPS51318RUW_QFN17_3P5X3P5~D

TPS51318RUW_QFN17_3P5X3P5~D

8

7

+1.5V_VX

PR77 0_0402_5%~D@ PR77 0_0402_5%~D@

12

15

14

13

EN

12

11

10

@PR377

@

TPS51318_BST

1.5V_SUS_PWRGD

DDR_EN

TPS51318_FSET

TPS51318_MODE

TPS51318_IMON

PR377
0_0603_5%~D

0_0603_5%~D

1 2

22.1K_0402_1%~D

22.1K_0402_1%~D

PR80

PR80

@

@

+1.5V_SUS_P(VT356)

DC_5V_ALW1

PR59

PR59
10_0402_1%~D

10_0402_1%~D

1 2

AVDD1

12

PC68

PC68

0.22U_0402_10V6K~D

0.22U_0402_10V6K~D

GNDA_1.5V

PR265

B B

DDR_ON<40,47>

hD

^

A A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

0_0402_5%~D

0_0402_5%~D

WZϲϭ

ϱϵ<

ϲϰϵ<

PR265

1 2

5

DDR_EN

@

@

12

PR66

PR66

12

PR61

PR61

PR60

PR60

@

@

68.1K_0402_1%~D

68.1K_0402_1%~D

1 2

12

12

PR70

PR70

PC70

PC70

PC95

PC95

54.9K_0402_1%~D

54.9K_0402_1%~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

0_0402_5%~D

0_0402_5%~D

+1.5V_R_SEL/LOAD

+1.5V_VDES

VSENSE1

PR62

PR62

1 2

6.49K_0402_1%~D

6.49K_0402_1%~D

44.2K_0402_0.5%

44.2K_0402_0.5%

4

BIAS

A1

BIAS

A2

R_SEL/ILOAD

A3

VDES

A4

VSENSE+

A5

OE

GNDA_1.5V

VXD5VXD4VXD3VXD2VX

AGNDB1IRIPLB2AVDDB3TEMPB4STAT

12

PR64

PR64

33.2K_0402_1%~D

33.2K_0402_1%~D

D1

VDD

VDD

GND

GND

GND

B5

1.5V_SUS_PWRGD

AVDD1

PJP13

PJP13

1 2

PAD-OPEN1x1m

PAD-OPEN1x1m

PU4

PU4

C5

C4

C3

C2

C1

VT356FCX-ADJ_CSP20~D

VT356FCX-ADJ_CSP20~D

+3.3V_ALW

PR68

PR68

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

PC81

PC81

10U_1206_25V6M~D

10U_1206_25V6M~D

+1.5V_VX

12

@

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

@PR63

@

7.68K_0805_1%~D

7.68K_0805_1%~D

1 2

12

100K_0402_1%~D

100K_0402_1%~D

3

12

12

PC64

PC64

10U_1206_25V6M~D

10U_1206_25V6M~D

PL8

PL8

0.42UH_MPC0740LR42C_20A_20%~D

0.42UH_MPC0740LR42C_20A_20%~D

PC69

PC69

PR63

0_0402_5%~D

0_0402_5%~D

VSENSE1

1.5V_SUS_PWRGD <40>

PR74

@PR74

@

12

1.33K_0402_1%~D

1.33K_0402_1%~D

12

PC65

PC65

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PR65

PR65

PR67

@PR67

@

0_0402_5%~D

0_0402_5%~D

+1.5V_VX

PC89

@PC89

@

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D

1 2

12

PR72

PR72

@

@

1 2

10K_0402_5%~D

10K_0402_5%~D

PC66

PC66

12

12

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

GNDA_TPS_1.5V

12

PC67

PC67

1U_0603_10V6K~D

1U_0603_10V6K~D

12

PC90

PC90

PC94

PC94

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

PJP19

PJP19

1 2

PAD-OPEN1x1m

PAD-OPEN1x1m

PL9

PL9

FBMJ4516HS720NT_1806~D

FBMJ4516HS720NT_1806~D

1 2

12

12

12

PC72

PC72

PC71

@ PC71

@

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

+1.5V_SUS_P

ϭϱsŽůƚнͲϱй
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚϳϴϳϲ
WĞĂŬĐƵƌƌĞŶƚϭϭϮϱϭ
KWͺD/EϭϯϱϬϭ

+5V_ALW

+1.5V_SUS_P

PC75

PC75

12

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

12

PC77

PC77

PC76

PC76

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

PJP14

PJP14

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PJP20

PJP20

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

12

@

@

12

12

PC80

PC80

PC79

PC79

PC78

PC78

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

+1.5V_MEM

12

12

PC73

PC73

PC74

PC74

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

+1.5V_MEM

+1.5V_MEM

+1.5V_MEM

LA-5472P

LA-5472P

LA-5472P

1

12

6800P_0402_25V7K~D

6800P_0402_25V7K~D

A00

A00

46 66Wednesday, January 20, 2010

46 66Wednesday, January 20, 2010

46 66Wednesday, January 20, 2010

A00

of

of

of

5

4

3

2

1

+1.8V_RUN

+3.3V_ALW

D D

C C

PJP301

PJP301

2 1

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

PC323

PC323

1 2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

PR406

PR406

100K_0402_5%~D

100K_0402_5%~D

PC322

PC322

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

RUN_ON<34,39,42>

+3.3V_RUN

PC321

PC321

1 2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1.8V_RUN_PWRGD <39>

12

+1.8V_PWR_SRC

12

GNDA_1.8V

1 2

PR405 0_0402_5%~DPR405 0_0402_5%~D

PC320

PC320

100P_0402_50V8J~D

100P_0402_50V8J~D

@

@

0_0402_5%~D

0_0402_5%~D

PR417

PR417

1.8V_FB

12

@

@

12

PU301

PU301

5

EN

6

NC

7

PG

8

VFB

GNDA_1.8V

12

PR418

PR418

0_0603_5%~D

0_0603_5%~D

12

PR416

PR416

0_0402_5%~D

0_0402_5%~D

1.8V_VDD

3

VDD

SGND

10

PJP302

PJP302

1 2

PAD-OPEN1x1m

PAD-OPEN1x1m

2

VIN

PGND

11

4

SYNCH

ISL8014IRZ-T_QFN16_4X4~D

ISL8014IRZ-T_QFN16_4X4~D

SGND

9

GNDA_1.8V

ϭϴsŽůƚнͲϱй
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WĞĂŬĐƵƌƌĞŶƚϭϲϰϬ
KWͺD/Eϰϳ

1

VIN

17

TPAD

16

NC

15

LX

14

LX

13

NC

PGND

12

1.8V_LX

GNDA_1.8V

PL401

PL401

2UH +-20% #A915AY-H-2R0M=P3 3.3A

2UH +-20% #A915AY-H-2R0M=P3 3.3A

12

PC312

PC312

@

@

680P_0603_50V8J~D

680P_0603_50V8J~D

12

PR407

PR407

@

@

4.7_0805_5%~D

4.7_0805_5%~D

12

PC319

PC319

150P_0402_50V8F~D

150P_0402_50V8F~D

12

GNDA_1.8V

+1.8V_RUN

PJP303

47P_0402_50V8J~D

47P_0402_50V8J~D

12

PJP303

2 1

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

1.8V_RUNP1.8V_RUNP

12

PC317

PC318

PC318

PR414

PR414

124K_0402_1%~D

124K_0402_1%~D

12

PR415

PR415

100K_0402_1%~D

100K_0402_1%~D

PC317

PC316

PC316

1 2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

1 2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

B B

+0.75V_DDR_VTT

DDR3 Termination

+5V_ALW

PC88

PC88

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

PJP31

PJP31

+1.5V_SUS_P

0.75V_DDR_VTT_ON<39>

A A

0.75V_VR_EN42

DDR_ON<40,46>

5

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

PR117 0_0402_5%~D@ PR117 0_0402_5%~D@

1 2

PR128

PR128

0_0402_5%~D

0_0402_5%~D

12

1 2

PR118 0_0402_5%~DPR118 0_0402_5%~D

2 1

DC_1+0.75V_VTT_PWR_SRC

12

PU5

PU5

10

VIN

2

VLDOIN

1

VDDQSNS

7

S3

9

S5

TPS51100DGQRG4_MSOP10~D

TPS51100DGQRG4_MSOP10~D

12

PC85

PC85

1 2

PC86

PC86

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

4

VTTSNS

VTTREF

PGND

GND

3

VTT

5

6

4
8
11

BP

+V_DDR_REF

PC82

PC82

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+0.75V_P

PC83

PC83

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

0.75Volt +/-5%
Thermal Design Current: 0.525A
Peak current: 0.750A
OCP mini: 0.900A

PC84

PC84

1 2

1 2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+0.75V_P

3

PJP18

PJP18

2 1

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

+0.75V_DDR_VTT

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

+0.75V_DDR_VT/+1.8V_RUN

+0.75V_DDR_VT/+1.8V_RUN

+0.75V_DDR_VT/+1.8V_RUN

LA-5472P

LA-5472P

LA-5472P

47 66Wednesday, January 20, 2010

47 66Wednesday, January 20, 2010

47 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

ϭϬϱsŽůƚнͲϱй
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WĞĂĐŬĐƵƌƌĞŶƚϭϭϮϱϭ
KWͺD/EϭϮϬϲϭ

1 2

100_0402_1%~D

D D

VTT_B+

C C

+1.05V_MP

12

12

PC220

PC211

PC211

@ PC220

@

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

B B

1

12

+

+

PC136

PC136

PC135

2

220U_V_2.5VM_R9M

220U_V_2.5VM_R9M

NCP5222_CS2+

PC135

220U_V_2.5VM_R9M

220U_V_2.5VM_R9M

PC202

PC202

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

PC205

PC205

PC204

PC204

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.6UH +-20% MPC0750LR60C 17A

0.6UH +-20% MPC0750LR60C 17A

1

+

+

PC134

PC134

1 2

2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR208

PR208

1 2

6.49K_0402_1%~D

6.49K_0402_1%~D

12

PC203

PC203

1 2

10U_1206_25V6M~D

10U_1206_25V6M~D

PL7

PL7

4.32K_0402_1%~D

4.32K_0402_1%~D

1 2

PR207

PR207

PC206

PC206

1 2

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PC133

PC133

@

@

100_0402_1%~D

M_ON<40,42>

SIO_SLP_M#<17,39>

PQ16

PQ16

SIR472DP-T1-GE3

SIR472DP-T1-GE3

12

PQ17

PQ17

AON6704L

AON6704L

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

PR206

PR206

@

@

4.7_1206_5%~D

4.7_1206_5%~D

Sharing MOSFET gate driver

PJP21

PJP21

1 2

PAD-OPEN 4x4m

A A

PAD-OPEN 4x4m

+1.05V_M+1.05V_MP

BRIDGE_G

5

DMN66D0LDW-7 2N SOT363-6

DMN66D0LDW-7 2N SOT363-6

PR336

PR336

1 2

100K_0402_5%~D

100K_0402_5%~D

3

4

PQ77B

PQ77B

5

PR202

PR202

241

241

4.3K_0402_1%~D

4.3K_0402_1%~D

1 2

0_0402_5%~D

0_0402_5%~D

@ PR85

@

0_0402_5%~D

0_0402_5%~D

3 5

3 5

4

PR201

PR201

PC118

PC118

1 2

820P_0402_50V7K~D

820P_0402_50V7K~D

PR71

PR71

12

PR85

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

NCP5222_LGATE2

1.05V_M_PWRGD< 40>

+5V_ALW+15V_ALW

PR335

PR335

DMN66D0LDW-7 2N SOT363-6

DMN66D0LDW-7 2N SOT363-6

4

PC132

PC132

1 2

12

47K_0402_5%~D

47K_0402_5%~D

61

PQ77A

PQ77A

2

1 2

PR203

PR203

13.7K_0402_1%~D

13.7K_0402_1%~D

1 2

NCP5222_ICS2

+1.05V_MP

NCP5222_CS2+

NCP5222_EN2/SKIP2

PR84

PR84
2_0603_5%~D

2_0603_5%~D

NCP5222_UGATE2

NCP5222_PHASE2

+5V_ALW

PR210

PR210

0_0402_5%~D

0_0402_5%~D

NCP5222_DRVS/2CH

PC106

PC106

33P_0402_50V8J~D

33P_0402_50V8J~D

1 2

PR200

PR200

51K_0402_1%~D

51K_0402_1%~D

NCP5222_BST2

12

+3.3V_ALW

PR69

PR69

1 2

100K_0402_1%~D

100K_0402_1%~D

12

+1.05V_M/+1.05VTT_RUN

PC116

PC116

1 2

470P_0402_50V7K~D

470P_0402_50V7K~D

12

PR83

PR83

12

PR214

@ PR214

@

0_0402_5%~D

0_0402_5%~D

NCP5222_COMP2

NCP5222_VIN

NCP5222_FB2

5

4

7

6

PU16

PU16

FB2

ICS2

8

CS2-/Vo2

9

CS2+

10

EN2/SKIP2

11

BST2

12

DH2

13

SWN2

14

DL2

VCC17PGOOD2

PGND2

AGND

16

15

29

GNDA_VTT

NCP5222_VCC

GNDA_VTT

PC215

PC215

12

NCP5222_PGD2

@

@

NCP5222_DRVS/2CH

12

PR86

PR86

@

@

BRIDGE_G

4

PQ21

PQ21

FDMS7672 1N POWER56-8

FDMS7672 1N POWER56-8

12

GNDA_VTT

1 2

499K_0603_1%~D

499K_0603_1%~D

PD27

PD27

1 2

BAT54HT1G SOD323 ~D

BAT54HT1G SOD323 ~D

PR209

PR209

1 2

20_0603_1%~D

20_0603_1%~D

PC208

PC208

1U_0603_16V6K~D

1U_0603_16V6K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

NCP5222_ICS2

Current Sharing

PJP22

PJP22

PAD-OPEN1x1m

PAD-OPEN1x1m

GNDA_VTT

3

VTT_B+

470P_0402_50V7K~D

470P_0402_50V7K~D

20_0603_1%~D

20_0603_1%~D

1 2

NCP5222_FB1

NCP5222_COMP1

1

2

VIN

FB1

COMP13COMP2

CS1-/Vo1

EN1/SKIP1

DRVS/2CH18VCCP19PGOOD120PGND1

21

NCP5222_PGD1

12

PR73

PR73

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

0_0402_5%~D

PC110

@PC110

@

1000P_0402_50V7K~D

1000P_0402_50V7K~D

12

35
2
1

PR212

PR212

12

3

22P_0402_50V8J~D

22P_0402_50V8J~D

PC108

PC108

1 2

PC131

PC131

1 2

1500P_0402_7K~D

1500P_0402_7K~D

PR96

@PR96

@

0_0402_5%~D

0_0402_5%~D

ICS1

28

27

CS1+

26

NCP5222_BST1

25

BST1

24

DH1

23

SWN1

22

DL1

NCP5222MNR2G_QFN28_4X4~D

NCP5222MNR2G_QFN28_4X4~D

PD19

PD19

12

BAT54HT1G SOD323 ~D

BAT54HT1G SOD323 ~D

+5V_ALW

12

PC207

PC207

3.3U_0603_10V6K~D

3.3U_0603_10V6K~D

PC209

PC209

12

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

NCP5222_ICS1

PC115

PC115

1 2

PR120

PR120

1 2

82K_0402_1%~D

82K_0402_1%~D

GNDA_VTT

NCP5222_CS1-/Vo1

NCP5222_EN1/SKIP1

GNDA_VTTGNDA_VTT

NCP5222_ICS1

NCP5222_CS1+

PR82

PR82

2_0603_5%~D

2_0603_5%~D

NCP5222_UGATE1

NCP5222_PHASE1

NCP5222_LGATE1

+5V_ALW

PR93

PR93

PR94

PR94

2.74K_0402_1%~D

2.74K_0402_1%~D

820P_0402_50V7K~D

820P_0402_50V7K~D

PR199

PR199

1 2

13.7K_0402_1%~D

13.7K_0402_1%~D

PR211

PR211
0_0402_5%~D

0_0402_5%~D

1 2

PC100

PC100

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

12

12

PR95

PR95

9.31K_0402_1%~D

9.31K_0402_1%~D

12

0_0402_5%~D

0_0402_5%~D

PR188

PR188

4.3K_0402_1%~D

4.3K_0402_1%~D

1 2

PC117

PC117

1 2

CPU_VTT_ON <39>

PQ13

PQ13

12

+1.05VTTP

PR198

PR198

1 2

180_0402_1%~D

180_0402_1%~D

3 5

241

PQ12

PQ12

@

@

3 5

241

H_VTTPWRGD <8>

SIS412DN-T1-GE3 1N POWERPAK1212-8

SIS412DN-T1-GE3 1N POWERPAK1212-8

AON6704L

AON6704L

3 5

241

3 5

241

2

PQ15

PQ15

SIS412DN-T1-GE3 1N POWERPAK1212-8

SIS412DN-T1-GE3 1N POWERPAK1212-8

PQ14

PQ14

AON6704L

AON6704L

PJP32

PJP32

112

JUMP_43X79

JUMP_43X79

PJP24

PJP24

112

JUMP_43X79

JUMP_43X79

PJP25

PJP25

112

JUMP_43X79

JUMP_43X79

2

PC96

PC96

10U_1206_25V6M~D

10U_1206_25V6M~D

0.56UH +-20% MPC1040LR56C 23A

0.56UH +-20% MPC1040LR56C 23A

12

5.23K_0402_1%~D

5.23K_0402_1%~D

1 2

PC102

PC102

@

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR87

PR87

@

@

1 2

4.7_1206_5%~D

4.7_1206_5%~D

2

2

2

1 2

PR204

PR204

0_0402_5%~D

0_0402_5%~D

PC97

PC97

1 2

10U_1206_25V6M~D

10U_1206_25V6M~D

PL18

PL18

4

3

+1.05V_RUN_VTT

1

ϭϬϱsŽůƚнͲϱй
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚϭϴ
WĞĂĐŬĐƵƌƌĞŶƚϭϴϬϱϵ

12

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

NCP5222_CS1-/Vo1+1.05V_MP

NCP5222_CS1+

KWͺD/EϮϭϲϳ

VTT_SENSE <11>

PJP30

PJP30

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

PC120

PC120

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

+PWR_SRC

12

12

PC121

PC121

PC210

@ PC210

@

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

1

+

+

PC105

PC105

PC107

PC107

2

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

PR97

PR97

12

PR92

@ PR 92

@

0_0402_5%~D

0_0402_5%~D

VTT_B+

12

PC99

PC99

PC98

PC98

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

2

1 2

PC119

PC119

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

PR205

PR205

24K_0402_1%~D

24K_0402_1%~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

+1.05V_M/+1.05VTT_RUN

+1.05V_M/+1.05VTT_RUN

+1.05V_M/+1.05VTT_RUN

LA-5472P

LA-5472P

LA-5472P

1

+1.05VTTP

12

12

PC122

PC122

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

+

+

+

+

PC109

PC109

2

2

@

@

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

A00

A00

48 66Wednesday, January 20, 2010

48 66Wednesday, January 20, 2010

48 66Wednesday, January 20, 2010

A00

of

of

of

8

vcore_vcc

1 2
12

100K +-5% TSM0B104J4702RE 0402

100K +-5% TSM0B104J4702RE 0402

GNDA_VCORE

0.033U_0402_16V7K~D

0.033U_0402_16V7K~D

+5V_ALW

12

PR138

PR138

10_0603_5%~D

10_0603_5%~D

1U_0603_10V6K~D

1U_0603_10V6K~D
PC269

PC269

1 2

GNDA_VCORE

VCCSENSE<11>

PR142

PR142

27.4 +-1% 0402~D

27.4 +-1% 0402~D

@

@

VSSSENSE<11>

PR143

PR143

27.4 +-1% 0402~D

27.4 +-1% 0402~D

@

@

VID0<11>

VID1<11>

VID2<11>

VID3<11>

VID4<11>

VID5<11>

VID6<11>

CSP1

CSN1

CSP3

CSN3

PR141

PR141

10K_0402_1%~D

10K_0402_1%~D

PH1

PH1

IMVP_IMON<11,23>

PC270

PC270

VSSSENSE<11>

GNDA_VCORE

PC265 0.022U_0402_50V7~D@ PC265 0.022U_0402_50V7~D@

1 2

PR134 10_0402_5%~D

PR134 10_0402_5%~D

1 2

GNDA_VCORE

1 2

PR135 10_0402_5%~D

PR135 10_0402_5%~D

1 2

GNDA_VCORE

8

1.1_0603_1%~D

1.1_0603_1%~D

12

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

PR103

PR103

1.1_0603_1%~D

1.1_0603_1%~D

12

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

PR127

PR127

0_0402_5%~D

0_0402_5%~D

PR132

PR132

1 2

1 2

13.7K_0402_1%~D

13.7K_0402_1%~D

PR140

PR140

1 2

137K_0402_1%

137K_0402_1%

vcore_vcc

1 2

12

1000P_0402_50V7K~D

1000P_0402_50V7K~D

CSP2

CSN2

PR102

PR102

PC271

PC271

PC258

PC258

PC272

PC272

12

14K_0402_1%~D

14K_0402_1%~D

@ PR 121

@

1K_0402_5%~D

1K_0402_5%~D

4.75K_0402_1%~D

4.75K_0402_1%~D

PC157

PC157

GNDA_VCORE

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

12

12

PC219

PC219

0.22U_0603_25V7K~D

0.22U_0603_25V7K~D

12

GNDA_VCORE

12

0.22U_0603_25V7K~D

0.22U_0603_25V7K~D

GNDA_VCORE

1 2

PR139

PR139

PR121

PR137

PR137

PC264 0.022U_0402_50V7~D@ PC264 0.022U_0402_50V7~D@

1.1_0603_1%~D

1.1_0603_1%~D

12

PC273

PC273

IMVP_VR_ON<39>

12

12

VCORE_ILIM

12

12

1 2

PR104

PR104

1200P_0402_50V7K~D

1200P_0402_50V7K~D

H H

G G

F F

E E

GNDA_VCORE

D D

C C

B B

A A

12

PC198

PC198

1200P_0402_50V7K~D

1200P_0402_50V7K~D

GNDA_VCORE

12

PC199

PC199

1200P_0402_50V7K~D

1200P_0402_50V7K~D

GNDA_VCORE

PC255

PC255

1200P_0402_50V7K~D

1200P_0402_50V7K~D

PC256

PC256

1200P_0402_50V7K~D

1200P_0402_50V7K~D

VCORE_THRM

VCORE_IMON

VCORE_TIME

FBAC

12

12

GNDA_VCORE

PC261

PC261

0.22U_0603_25V7K~D

0.22U_0603_25V7K~D

PC260

PC260

GNDA_VCORE

7

+1.05V_RUN_VTT

PU20

PU20

1

CSN3

2

CSP3

3

THRM

4

IMON

5

ILIM

6

TIME

7

VCC

8

FB

9

FBAC

10

GNDS

41

PAD

12

PC259

PC259

12

PR108

PR108

1 2

0_0402_5%~D

0_0402_5%~D

7

39

38

40

CSP1

CSN1

CSN211CSP212SHDN13DPRSLPVR14PSI15TON

VR_ON

1200P_0402_50V7K~D

1200P_0402_50V7K~D

35

D3

CLKEN

PWRGD18DRVSKP19PWM3

16

17

PSI#

DPRSLPVR

VCORE_TON

PWRGD

@

@

PR318 1K_0402_1%~D@PR318 1K_0402_1%~D

PR319 1K_0402_1%~D PR319 1K_0402_1%~D

PR320 1K_0402_1%~D@PR320 1K_0402_1%~D

12

12

12

PR330 1K_0402_1%~D PR330 1K_0402_1%~D

@

PR329 1K_0402_1%~D@PR329 1K_0402_1%~D

PR328 1K_0402_1%~D PR328 1K_0402_1%~D

12

12

12

+3.3V_RUN

31

D032D133D234D436D537D6

PGD_IN

VRHOT

MAX17030GTL+_TQFN40_5X5~D

MAX17030GTL+_TQFN40_5X5~D

20

1 2

0_0402_5%~D

0_0402_5%~D

1 2

PR133 200K_0402_1%~D

PR133 200K_0402_1%~D

PR110 1K_0402_5%~D@PR110 1K_0402_5%~D@

PR115 0_0402_5%~D

PR115 0_0402_5%~D

PR334 10K_0402_5%~DPR334 10K_0402_5%~D

BST1

LX1
DH1
DL1

VDD

DL2
DH2

LX2

BST2

PWM3

DRSKP#

PR119

PR119

12

1 2

H_CPURST#

PR122

PR122
0_0402_5%~D

0_0402_5%~D

1 2

PR123 0_0402_5%~D@ PR123 0_0402_5%~D@

PR114

PR114
100K_0402_5%~D

100K_0402_5%~D

+5V_ALW

30
29
28
27
26

VRHOT#

25
24
23
22
21

1 2

PR112 10K_0402_5%~D

PR112 10K_0402_5%~D

1 2

PR113 0_0402_5%~D

PR113 0_0402_5%~D

12

12

12

12

PR3321K_0402_1%~D PR3321K_0402_1%~D

12

PR1090_0402_5%~D PR1090_0402_5%~D

12

PR3331K_0402_1%~D@ PR3331K_0402_1%~D@

6

@

PR323 1K_0402_1%~D PR323 1K_0402_1%~D

PR321 1K_0402_1%~D@PR321 1K_0402_1%~D

PR322 1K_0402_1%~D PR322 1K_0402_1%~D

12

12

12

@

@

PR325 1K_0402_1%~D@PR325 1K_0402_1%~D

PR326 1K_0402_1%~D@PR326 1K_0402_1%~D

12

12

PR331 1K_0402_1%~D PR331 1K_0402_1%~D

12

<8>

12

PC263

PC263

1U_0603_10V6K~D

1U_0603_10V6K~D

12

PR213 56_0402_5%~DPR213 56_0402_5%~D

12

PR116 0_0402_5%~D

PR116 0_0402_5%~D

+3.3V_RUN

1 2

+1.05V_RUN_VTT

H_PSI# <11>

+1.05V_RUN_VTT

H_DPRSLPVR <11>

6

IMVP_PWRGD <8,39>

PR111 1.91K_0402_1%~D

PR111 1.91K_0402_1%~D

+CPU_PWR_SRC

PR324 1K_0402_1%~D PR324 1K_0402_1%~D

12

@

PR327 1K_0402_1%~D@PR327 1K_0402_1%~D

12

+1.05V_RUN_VTT

H_PROCHOT# <8>

+3.3V_RUN

CLK_EN# <6>

GNDA_VCORE

5

PR101

PR101

0_0603_5%~D

PC236

PC236

12

5

0_0603_5%~D

+5V_ALW

12

5

1U_0603_10V6K~D

1U_0603_10V6K~D

6

2

3

9

MAX8791GTA+_TQFN8_3X3~D

MAX8791GTA+_TQFN8_3X3~D

BOOT1 BOOT1_2

BOOT2 BOOT 2_2

UGATE2
PHASE2

LGATE2

PR144

PR144

33K_0402_5%~D

33K_0402_5%~D

PJP27

PJP27

1 2

PAD-OPEN1x1m

PAD-OPEN1x1m

4

2

G

PC130

PC130

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D

12

PR197

PR197
0_0603_5%~D

0_0603_5%~D

1 2

PU17

PU17

VDD

SKIP

PWM

GND

EP

1 2

UGATE1

LGATE1

PC212

PC212

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D

1 2

PR136

PR136
0_0603_5%~D

0_0603_5%~D

BOOT3 BOOT3_2

1

BST

UGATE3

8

DH

7

LX

4

DL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

4

12

PC197

PC197

@

@

0.022U_0402_50V7~D

0.022U_0402_50V7~D

12

PC233

PC233

@

@

0.022U_0402_50V7~D

0.022U_0402_50V7~D

PC154

PC154

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D

12

LGATE3

2

2

2

@

@

G

G

G

PHASE3

PC234

PC234

0.022U_0402_50V7~D

0.022U_0402_50V7~D

3

3

D

PQ46

PQ46

S

1

SIR472DP-T1-GE3

SIR472DP-T1-GE3

PHASE1

3

D

S

1

3

D

S

1

3

D

S

1

2

2

12

PQ18

PQ18

PQ51

PQ51

PQ22

PQ22

AON6704L 1N DFN8

AON6704L 1N DFN8

SIR472DP-T1-GE3

SIR472DP-T1-GE3

AON6704L 1N DFN8

AON6704L 1N DFN8

G

G

12

PC266

PC266

@

@

12

1000P_0603_50V7K~D

1000P_0603_50V7K~D

12

PC267

PC267

@

@

12

1000P_0603_50V7K~D

1000P_0603_50V7K~D

3

D

PQ48

PQ48

S

1

SIR472DP-T1-GE3

SIR472DP-T1-GE3

3

D

PQ26

PQ26

S

1

AON6704L 1N DFN8

AON6704L 1N DFN8

3

+CPU_PWR_SRC

12

PC123

PC123

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR301

PR301

@

@

2.2_1206_1%~D

2.2_1206_1%~D

+CPU_PWR_SRC

12

PC217

PC217

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR302

PR302

@

@

2.2_1206_1%~D

2.2_1206_1%~D

PC145

PC145

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

PC268

PC268

@

@

12

1000P_0603_50V7K~D

1000P_0603_50V7K~D

@

@

12

PC124

PC124

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

PC214

PC214

2200P_0402_50V7K~D

2200P_0402_50V7K~D

+CPU_PWR_SRC

12

PC146

PC146

PR303

PR303

2.2_1206_1%~D

2.2_1206_1%~D

2

1

12

12

PC125

PC125

PC126

PC126

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

1

+

+

PC127

PC127

2

100U_25V_M~D

100U_25V_M~D

1

+

+

+

+

PC128

PC128

PC129

PC129

2

2

100U_25V_M~D

100U_25V_M~D

100U_25V_M~D

100U_25V_M~D

PJP26

PJP26

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

1

+PWR_SRC

/ĐĐŵĂdžϰϴ
/ͺdϯϯϲ
KWŵŝŶŝϱϳϲ
>ŽĂĚůŝŶĞͲϭϵŵs

PL11

PL11

MPC1040LR45CP 24A

MPC1040LR45CP 24A

PR307

PR307

12

1.74K_0402_1%~D

1.74K_0402_1%~D

PC192

PC192

1 2

@

@

12

12

PC218

PC218

PC216

PC216

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

12

12

PC147

PC147

PC148

PC148

10U_1206_25V6M~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

@

@

12

0.022U_0402_50V7~D

0.022U_0402_50V7~D

PC194

PC194

@

@

CSP1

CSN1

0.022U_0402_50V7~D

0.022U_0402_50V7~D

CSP2

CSN2

PC196

PC196

2.49K_0402_1%~D

2.49K_0402_1%~D

12

1 2

2.49K_0402_1%~D

2.49K_0402_1%~D

12

0.022U_0402_50V7~D

0.022U_0402_50V7~D

2.49K_0402_1%~D

2.49K_0402_1%~D

CSP3

CSN3

PR310

PR310

MPC1040LR45CP 24A

MPC1040LR45CP 24A

1.74K_0402_1%~D

1.74K_0402_1%~D

1 2

4

3

1 2

40.2K_0402_1%~D

40.2K_0402_1%~D

12

1 2

10K_0402_1%_TSM0A103F34D1RZ

10K_0402_1%_TSM0A103F34D1RZ

PC200

@PC200

@

1 2

0.022U_0402_50V7~D

0.022U_0402_50V7~D

PL12

PL12

4

3

PR308

PR308

1 2

40.2K_0402_1%~D

40.2K_0402_1%~D

PR311

PR311

12

1 2

10K_0402_1%_TSM0A103F34D1RZ

10K_0402_1%_TSM0A103F34D1RZ

PC213

@ PC213

@

1 2

0.022U_0402_50V7~D

0.022U_0402_50V7~D

PL13

PL13

MPC1040LR45CP 24A

MPC1040LR45CP 24A

4

3

PR309

PR309

1.74K_0402_1%~D

1.74K_0402_1%~D

40.2K_0402_1%~D

40.2K_0402_1%~D

PR312

PR312

12

10K_0402_1%_TSM0A103F34D1RZ

10K_0402_1%_TSM0A103F34D1RZ

PC254

@PC254

@

1 2

0.022U_0402_50V7~D

0.022U_0402_50V7~D

1

2

PR304

PR304

PH3

PH3

1

2

PR305

PR305

PH4

PH4

1

2

PR306

PR306

1 2

PH5

PH5

1 2

+VCC_CORE

+VCC_CORE

+VCC_CORE

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

2

Compal Electronics, Inc.

+VCORE

+VCORE

+VCORE

LA-5472P

LA-5472P

LA-5472P

49 66Wednesday, January 20, 2010

49 66Wednesday, January 20, 2010

49 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

5

+DOCK_PWR_BAR

D D

0.047U_0603_25V7K~D

0.047U_0603_25V7K~D

12

PBATT+

36

35

34

NC

DC_IN_SS

CHARGERVR_DCIN

CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC

ERC3

PC235

PC235

@

@

0.1U_0402_25V4Z~D

0.1U_0402_25V4Z~D

PQ41

PQ41

SI4835DDY-T1-E3_SO8~D

SI4835DDY-T1-E3_SO8~D

8

+VCHGR

C C

PR281 100K_0402_5%~DPR281 100K _0402_5%~D

ACAV_DOCK_SRC#<38>

+SDC_IN

ACAV_IN<23,40,51>

+3.3V_ALW2

1 2

PR263 0_0402_5%~DPR263 0_0402_5%~D

+3.3V_ALW2

B B

A A

7

5

+DOCK_PWR_BAR

+DC_IN_SS

+DC_IN

1 2

PR264 0_0402_5%~DPR264 0_0402_5%~D

PR284 0_0402_5%~DPR284 0_0402_5%~D

RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

1 2

PR261 0_0402_5%~DPR261 0_0402_5%~D

DC_BLOCK_GC<51>

1 2

1 2

2 1

PD22

@ PD22

@

PR282

@ PR282

@

180_0402_1%~D

180_0402_1%~D

5

PR280 47_0805_5%~DPR280 47_0805_5%~D

SOFT_START_GC<44>

CD3301_SDC_IN

1
2
36

4

1 2

0_0402_5%~D

0_0402_5%~D

1 2

PR277 0_0402_5%~DPR277 0_0402_5%~D

1 2

PR278 0_0402_5%~DPR278 0_0402_5%~D

+CHGR_DC_IN<51>

1 2

PC225

PC225

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

ACAVDK_SRC

12

12

PC231

PC231

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR259

PR259

CD3301_DCIN

12

ERC1

ACAVIN
P33ALW2

BLK_MOSFET_GC

DK_PWR_BAR

3301_DC_IN_SS

PU902

PU902

1

DC_IN

2

SS_GC

3

ERC1

4

ACAVDK_SRC

5

GND

6

SDC_IN

7

DC_BLK_GC

8

ACAV_IN

9

P33ALW2

37

TP

CSS_GC<51>

DK_CSS_GC<51>

PC232

PC232

1 2

DSCHRG_MOSFET_GC

32

29

31

33

28

30

NC

GND

DK_PWRBAR

BLK_MOSFET_GC

DK_AC_OFF_EN

DSCHRG_MOSFET_GC
DK_AC_OFF_EN

SL_BAT_PRES#

BLKNG_MOSFET_GC

SS_DCBLK_GC

EN_DK_PWRBAR17P33ALW

16

15

18

ERC2

EN_DK_PWRBAR

12

STSTART_DCBLOCK_GC

3301_PWRSRC

4

PR260

PR260

12

0_0402_5%~D

0_0402_5%~D

PR279

PR279
0_0402_5%~D

0_0402_5%~D

PBatt+

P50ALW

PBATT_OFF

ACAV_IN_NB

GND

NBDK_DCINSS

CD3301RHHR_QFN36_6X6~D

CD3301RHHR_QFN36_6X6~D

P33ALW

PR269 0_0402_5%~DPR269 0_0402_5%~D

1 2

PR267 0_0402_5%~DPR267 0_0402_5%~D

4

PQ40

PQ40

FDS6679AZ_SO8~D

FDS6679AZ_SO8~D

1

S

D

2

S

D

3

S

D

4

G

D

12

PC229

PC229

1U_0805_25V4Z~D

1U_0805_25V4Z~D

P50ALW

CD_PBATT_OFF

27
26

DK_AC_OFF

25

3301_ACAV_IN_NB

24
23
22
21
20
19

1 2

PR268 0_0402_5%~DPR268 0_0402_5%~D

1 2

DK_AC_OFF_EN
SL_BAT_PRES#

8

PBATT_IN_SS

7
6
5

1 2

PR271 0_0402_5%~DPR271 0_0402_5%~D

1 2

PR272 0_0402_5%~DPR272 0_0402_5%~D

1 2

PR273 0_0402_5%~DPR273 0_0402_5%~D

PR270 0_0402_5%~DPR270 0_0402_5%~D

+3.3V_ALW

EN_DOCK_PWR_BAR <39>

1 2

1M_0402_5%~D

1M_0402_5%~D

PR283

PR283

@

@

+PWR_SRC

12

PR227

PR227
330K_0402_5%~D

330K_0402_5%~D

+5V_ALW

PBATT_OFF <39>

DOCK_AC_OFF <38,39>

1 2

PR276 0_0402_5%~DPR276 0_0402_5%~D

BLKNG_MOSFET_GC

1 2

PR274 0_0402_5%~DPR274 0_0402_5%~D

1 2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

ACAV_IN_NB <39,40,51>

1 2

PR275 0_0402_5%~DPR275 0_0402_5%~D

SLICE_BAT_PRES# <38,39,44>

+NBDOCK_DC_IN_SS

3

PD20

PD20

B540C-13-F_SMC2~D

B540C-13-F_SMC2~D

FDS6679AZ_SO8~D

FDS6679AZ_SO8~D

12

PQ37

PQ37

8
7
6
5

1

S

D

2

S

D

3

S

D

4

G

D

PR240

PR240

330K_0402_5%~D

330K_0402_5%~D

1 2

12

PR248

PR248

1K_1206_5%~D

1K_1206_5%~D

12

PC230

PC230

1U_0603_25V6-K~D

1U_0603_25V6-K~D

'W/K/ŶƉƵƚĨƌŽŵE
ŵďĞĚĚĞĚŽŶƚƌŽůůĞƌ

DOCK_AC_OFF_EC <39>

12

PC226

PC226

0.47U_0805_25V7K~D

0.47U_0805_25V7K~D

1 2

1M_0402_5%~D

1M_0402_5%~D

PR285

PR285

PR257

PR257

0_0402_5%~D

0_0402_5%~D

2

STSTART_DCBLOCK_GC

12

2

3

8
7
6
5

FDS6679AZ_SO8~D

FDS6679AZ_SO8~D

2

PD21

PD21

1

PDS5100H-13_POWERDI5-3~D

PDS5100H-13_POWERDI5-3~D

PQ42

PQ42

1

S

D

2

S

D

3

S

D

4

G

D

12

1

+PWR_SRC

12

12

PC227

PC227

PC228

PC228

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PR258

PR258
0_0402_5%~D

0_0402_5%~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Selector

Selector

Selector

LA-5472P

LA-5472P

LA-5472P

50 66Wednesday, January 20, 2010

50 66Wednesday, January 20, 2010

50 66Wednesday, January 20, 2010

1

of

of

of

A00

A00

A00

5

+DC_IN_SS

DC_BLOCK_GC<50>

D D

PD15 B540C~DPD15 B540C~D

2 1

PQ80

PQ80

SI4835DDY-T1-E3 1P SO8

SI4835DDY-T1-E3 1P SO8

8
7

5

PR402

PR402

1 2

0_0402_5%~D

0_0402_5%~D

1
2
36

4

ϮͺK<сϭϳϳs

WZϭϲϭ
d/YϮϰϳϰϱсϯϭϲ<
/ŶƚĞƌƐŝů/^>ϴϴϳϯϭсϮϮϲ<
DĂdžŝŵDyϴϳϯϭсϯϴϯ<

+SDC_IN

ISL88731_VDDP

PR161

PR161

1 2

226K_0402_1%~D

PR162

PR162

49.9K_0402_1%~D

49.9K_0402_1%~D

12

PC166

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

GNDA_CHG

CHARGER_SMBCLK<40>

CHARGER_SMBDAT<40>

PC166

12

+3.3V_ALW

PC173

PC173

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C C

B B

226K_0402_1%~D

ACAV_IN<23,40,50>

12

GNDA_CHG

MAX8731_IINP<23>

ISL88731_VREF

12

PR159

PR159

10K_0402_1%~D

10K_0402_1%~D

12

PR160

PR160

0_0402_5%~D

0_0402_5%~D

@

@

12

PR166

PR166

15.8K_0402_1%~D

15.8K_0402_1%~D

12

12

PR175

PR175

PC180

PC180

@

@

@

@

6.81K_0402_1%~D

6.81K_0402_1%~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

PR165

PR165

1 2

0_0402_5%~D

0_0402_5%~D

1 2

@PR168

@

200K_0402_5%~D

200K_0402_5%~D

12

PR170

PR170

2.2K_0402_5%~D

2.2K_0402_5%~D
130P_0402_10V7K~D

130P_0402_10V7K~D

1 2

12

PC181

PC181

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

+CHGR_DC_IN<50>

PR168

PC178

@PC178

@

PC182

PC182

@

@

For Maxim Charger only

CSS_GC<50>

PC351

PC351

.1U_0805_25V7K~D

.1U_0805_25V7K~D

2000P_0402_10V7K~D

2000P_0402_10V7K~D

PC177

PC177

1 2

@

@

130P_0402_10V7K~D

130P_0402_10V7K~D

12

12

PC183

PC183

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

4

1 2

1_0402_5%~D

1_0402_5%~D

12

GNDA_CHG

@

@

PR404

PR404

12

PC175

@PC175

@

PC184

PC184

1U_0603_10V6K~D

1U_0603_10V6K~D

+SDC_IN

PR403

PR403

1 2

0_0402_5%~D

0_0402_5%~D

ISL88731_VREF

@PR172

@

1 2

0_0402_5%~D

0_0402_5%~D

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

ISL88731_ICM

1 2

PR169

@ PR169

@

7.5K_0402_5%~D

7.5K_0402_5%~D

PR172

PC185

PC185

@

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

GNDA_CHG

@

@

12

PC160

PC160

PC162

@PC162

@

1 2

GNDA_CHG

12

TBD_0603_25V7K~D

TBD_0603_25V7K~D

2

2

2

PU10

PU10

22

DCIN

2

ACIN

13

ACOK

11

VDDSMB

10

SCL

9

SDA

14

NC

8

ICM

6

VCOMP

5

NC

4

ICOMP

3

VREF

7

NC

12

GND

29

GND

0.01_1206_1%~D

0.01_1206_1%~D

1

2

13

1

1

PQ29

PQ29

3

3

12

10K_0402_5%~D

10K_0402_5%~D

PR354

PR354

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

10_0402_1%~D

10_0402_1%~D

1 2

28

1

NC

ISL88731_TQFN28~D

ISL88731_TQFN28~D

PR145

PR145

NTR4502PT1G_SOT23-3~D

NTR4502PT1G_SOT23-3~D

PR153

PR153

PC163

PC163

CSSP

2

2

2

27

GNDA_CHG

3

4

3

13

1

1

PQ28

PQ28

3

3

12

12

PR155

PR155

10_0402_1%~D

10_0402_1%~D

12

PC353

@ PC353

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

26

VCC

CSSN

25

BOOT

ISL88731_VDDP

21

VDDP

24

UGATE

23

PHASE

20

LGATE

19

PGND

18

CSOP

17

CSON

15

VFB

16

NC

NTGD4161PT1G_TSOP6~D

NTGD4161PT1G_TSOP6~D

NTR4502PT1G_SOT23-3~D

NTR4502PT1G_SOT23-3~D

S

S

G

G

12

PR156

PR156

100K_0402_5%~D

100K_0402_5%~D

GNDA_CHG

PR164

PR164

2.2_0603_1%~D

2.2_0603_1%~D

1 2

PC167

PC167

PR167

PR167

12

0_0603_1%~D

0_0603_1%~D

12

PC174

PC174

220P_0402_50V7K~D

220P_0402_50V7K~D

PR174

PR174

1 2

100_0402_5%~D

100_0402_5%~D

PJP29

PJP29

1 2

PAD-OPEN1x1m

PAD-OPEN1x1m

PQ71B

PQ71B

3

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PD17

PD17

@

@

CHG_LGATE

D

D

42

12

1U_0603_10V6K~D

1U_0603_10V6K~D

RB751V_SOD323~D

RB751V_SOD323~D

CHG_UGATE

PJP28

PJP28

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

DOCK_DCIN_IS+ <38>

PQ71A

PQ71A

NTGD4161PT1G_TSOP6~D

NTGD4161PT1G_TSOP6~D

S

S

D

D

65

G

G

1

PR157

PR157

100K_0402_5%~D

100K_0402_5%~D

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

2 1

+VCHGR

PC164

PC164

0_0402_5%~D

0_0402_5%~D

1 2

PR163

PR163
33_0603_1%~D

33_0603_1%~D

PC168

PC168

1 2

PR412

PR412

1 2

PC158

PC158

@

@

GNDA_CHG

12

@

@

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

PC176

PC176

3300PF_0402_50V7K~D

3300PF_0402_50V7K~D

4

G

2

CHAGER_SRC+PWR_SRC

12

PC159

PC159

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

DOCK_DCIN_IS- <38>

DK_CSS_GC <50>

578

PQ30

PQ30

SI4800BDY-T1_SO8~D

SI4800BDY-T1_SO8~D

3 6

241

+VCHGR_B

8

D6D5D7D

S

S

S

3

2

1

SI4812BDY-T1-E3_SO8~D

SI4812BDY-T1-E3_SO8~D

578

3 6

241

5.6U_HMU1356B-5R6-F 8A

5.6U_HMU1356B-5R6-F 8A

12

PC179

@ PC179

@

1000P_0603_50V7K

1000P_0603_50V7K

12

PQ32

PQ32

PR177

PR177

@

@

4.7_1206_5%

4.7_1206_5%

GNDA_CHG

PQ31

PQ31

SI4800BDY-T1_SO8~D

SI4800BDY-T1_SO8~D

PL14

PL14

1 2

1 2

PC190

@ PC190

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PC169

PC169

2200P_0402_50V7K~D

2200P_0402_50V7K~D

+VCHGR_L

12

10_0402_1%~D

10_0402_1%~D

PR176

PR176

12

12

PC170

PC170

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR171

PR171

0.01_1206_1%~D

0.01_1206_1%~D

1

2

PC191

PC191

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

PC171

PC171

10U_1206_25V6M~D

10U_1206_25V6M~D

4

3

12

12

PC186

PC186

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR355

PR355

10_0402_1%~D

10_0402_1%~D

PC350

@ PC350

@

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

PC172

PC172

10U_1206_25V6M~D

10U_1206_25V6M~D

PC187

PC187

10U_1206_25V6M~D

10U_1206_25V6M~D

12

GNDA_CHG

12

1

+VCHGR

PC188

PC188

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PC189

PC189

ACAV_IN

12

@

12

@

@

10U_1206_25V6M~D

10U_1206_25V6M~D

@

12

PR173

PC300

PC300

PR173

1.8K_1206_5%~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

2

G

G

1.8K_1206_5%~D

13

D

D

PQ33

PQ33

S

S

@

@

RHU002N06_SOT323

RHU002N06_SOT323

Maximum charging current is 6.24A

12

PR341

PR341

@

@

100K_0402_5%~D

100K_0402_5%~D

1 2

0_0402_5%~D

0_0402_5%~D

4

ISL88731_VREF

12

PR401

PR401

PR362

PR362

100K_0402_5%~D

100K_0402_5%~D

ACAV_IN_NB <39,40,50>

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

3

4

IN-

IN+

8

+5V_ALW

G

O

P

PU11A

PU11A
LM393DR_SO8~D

LM393DR_SO8~D

1

PC193

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

@PC193

@

PC195

@PC195

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Charger

Charger

Charger

LA-5472P

LA-5472P

LA-5472P

51 66Wednesday, January 20, 2010

51 66Wednesday, January 20, 2010

51 66Wednesday, January 20, 2010

1

A00

A00

A00

of

of

of

+DC_IN ISL88731_VREF

12

12

PR423

PR423

PR420

PR420

232K_0402_1%~D

232K_0402_1%~D

47K_0402_1%~D

47K_0402_1%~D

12

12

PC352

A A

PC352

100P_0402_50V8J

100P_0402_50V8J

5

PR192

PR192

21.5K_0402_1%

21.5K_0402_1%

12

PC330

PC330

100P_0402_50V8J

100P_0402_50V8J

1M_0402_5%~D

1M_0402_5%~D

1 2

+5V_ALW

5

IN+

6

IN-

12

PR421

PR421

42.2K_0402_1%~D

42.2K_0402_1%~D

PR422

PR422

8

4

P

G

+3.3V_ALW

7

O

PU11B

PU11B
LM393DR_SO8~D

LM393DR_SO8~D

5

D D

4

3

2

1

PJP905

1

2

PJP905

1 2

PAD-OPEN 43X118

PAD-OPEN 43X118

10_0402_5%~D

10_0402_5%~D

+PWR_SRC

PC920

PC920

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

PC919

PC919

PR925

PR925

1 2

0_0402_5%~D

0_0402_5%~D

1

+

+

2

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

12

PR924

PR924

+GPU_PWR_SRC

+5V_RUN

PC909

PC909

1U_0603_10V6K~D

1U_0603_10V6K~D

1 2

GPU_CORE_VCC

GPU_LGATE

20

1

PU901

PU901

PVCC

LGATE

2

SREF

SET0

SET1

PR935

PR935

+3.3V_RUN

PGND

3

GND

4

EN

5

VID1

6

VID0

7

SREF

8

SET0

9

SET1

GNDA_GPU_CORE

1 2

SET210PGOOD

SET2

12

PR934

PR934

255K_0402_1%~D

255K_0402_1%~D

C C

RUN_ON<39,42,47>

DGPU_PWR_EN<39>

+3.3V_RUN

PR915

@ PR915

@

10K_0402_5%~D

10K_0402_5%~D

1 2

PR916

PR916

GPU_VID_1<53>

PR920

PR920

10K_0402_5%~D

10K_0402_5%~D

GPU_VID_0<53>

10K_0402_5%~D

10K_0402_5%~D

PR927

PR927

+3.3V_RUN

B B

0_0402_5%~D

0_0402_5%~D

1 2

PR910

@ PR910

@

10K_0402_5%~D

10K_0402_5%~D

1 2

0_0402_5%~D

0_0402_5%~D

1 2

PR911

PR911

12

PR903 0_0402_5%~D@ PR903 0_0402_5%~D@

PR904 0_0402_5%~DPR904 0_0402_5%~D

GNDA_GPU_CORE

12

GNDA_GPU_CORE

GPU_EN

12

PR905

PR905

10K_0402_5%~D

10K_0402_5%~D

1 2

PR906

PR906

0_0402_5%~D

0_0402_5%~D

GPU_VID1

GPU_VID0

1 2

45.3K_0402_1%~D

45.3K_0402_1%~D

12

12

PR937

PR937
21K_0402_1%~D

21K_0402_1%~D

1 2

PC923

PC923

.056U_0603_16V7~D

.056U_0603_16V7~D

12

PR936

PR936

18.7K_0402_1%

18.7K_0402_1%

DGPU_PWROK<19>

19

VCC

GPU_BOOT

18

BOOT

GPU_UGATE

17

UGATE

GPU_PHASE

16

PHASE

15

NC

14

OCSET

13

VO

12

FB

ISL62872HRUZ_TQFN20_1P8X3P2~D

ISL62872HRUZ_TQFN20_1P8X3P2~D

11

GPU_PWRGD

2.2_0603_1%~D

2.2_0603_1%~D

GPU_OCSET

GPU_VO

GPU_FB

1

2

PR921

PR921

1 2

GPU_LGATE

12

12

PC908

PC908

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

GNDA_GPU_COREGNDA_GPU_COR E

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

12

PR909

PR909

49.9K_0402_1%~D

49.9K_0402_1%~D

GNDA_GPU_CORE

PR901

PR901

2.2_0805_5%~D

2.2_0805_5%~D

PC907

PC907

1U_0603_10V6K~D

1U_0603_10V6K~D

PC906

PC906

1 2

PC911

PC911

1 2

24.9K_0402_1%~D

24.9K_0402_1%~D

PR908

PR908

PR907

PR907

100 +-1% 0603

100 +-1% 0603

12

3

2

G

1

3

2

G

1

PR926

PR926

3.3K +-1% 0402

3.3K +-1% 0402

12

1

1

PC904

PC904

2

2

10U_1206_25V6M~D

10U_1206_25V6M~D

D

PQ50

PQ50

S

SIR472DP-T1-GE3

SIR472DP-T1-GE3

12

PC905

@ PC905

@

1000P_0603_50V7K~D

1000P_0603_50V7K~D

D

PQ55

PQ55

12

AON6704L

AON6704L

PR922

@PR922

@

2.2_1206_1%~D

2.2_1206_1%~D

S

12

2

12

PC903

PC903

1

PC902

PC902

10U_1206_25V6M~D

10U_1206_25V6M~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.56UH +-20% MPC1040LR56C 23A

0.56UH +-20% MPC1040LR56C 23A

4

3

PR923

PR923

3.3K +-1% 0402

3.3K +-1% 0402

1 2

0.18U_0603_16V7K~D

0.18U_0603_16V7K~D

PC901

PC901

PL901

PL901

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PC916

PC916

12

'WhͺKZ
dŚĞƌŵĂůĞƐŝŐŶƵƌƌĞŶƚϭϭϱϴϳ
WĞĂŬĐƵƌƌĞŶƚϭϰϵϵϬ
KWŵŝŶϭϳϵϴϴ

1

+

+

PC918

PC918

2

470U_D2_2VM_R4.5M~D

470U_D2_2VM_R4.5M~D

GPU_VDD_SENSE <55>

+VCC_GFX_CORE

12

PC917

PC917

2200P_0402_50V7K~D

2200P_0402_50V7K~D

A A

+VCC_GFX_CORE

PJP902

PJP902

1 2

PAD-OPEN 43X118

PAD-OPEN 43X118

PJP903

PJP903

1 2

PAD-OPEN 43X118

PAD-OPEN 43X118

5

+GPU_CORE

GNDA_GPU_CORE

PJP901

PJP901

PAD-OPEN1x1m

PAD-OPEN1x1m

12

1.0V 0.85V 0.8V 0.75V
GPU_VID_0 0 1 0 1
GPU_VID_1 0 0 1 1

output voltage adjustable network

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ISL62870 GPU core

ISL62870 GPU core

ISL62870 GPU core

LA-5472P

LA-5472P

LA-5472P

1

52 66Wednesday, January 20, 2010

52 66Wednesday, January 20, 2010

52 66Wednesday, January 20, 2010

of

of

of

A00

A00

A00

5

PEG_CTX_GRX_P[0..15]7

PEG_CTX_GRX_N[0..15]7

PEG_CRX_GTX_P[0..15]7

D D

PEG_CRX_GTX_P0
PEG_CRX_GTX_N0

PEG_CRX_GTX_P1
PEG_CRX_GTX_N1

PEG_CRX_GTX_P2
PEG_CRX_GTX_N2

PEG_CRX_GTX_P3
PEG_CRX_GTX_N3

PEG_CRX_GTX_P4
PEG_CRX_GTX_N4

PEG_CRX_GTX_P5
PEG_CRX_GTX_N5

PEG_CRX_GTX_P6
PEG_CRX_GTX_N6

PEG_CRX_GTX_P7
PEG_CRX_GTX_N7

PEG_CRX_GTX_P8
PEG_CRX_GTX_N8

C C

PEG_CRX_GTX_P9
PEG_CRX_GTX_N9

PEG_CRX_GTX_P10
PEG_CRX_GTX_N10

PEG_CRX_GTX_P11
PEG_CRX_GTX_N11

PEG_CRX_GTX_P12
PEG_CRX_GTX_N12

PEG_CRX_GTX_P13
PEG_CRX_GTX_N13

PEG_CRX_GTX_P14
PEG_CRX_GTX_N14

PEG_CRX_GTX_P15
PEG_CRX_GTX_N15

PEG_CRX_GTX_N[0..15]7

PEG_CTX_GRX_P[0..15]

PEG_CTX_GRX_N[0..15]

PEG_CRX_GTX_P[0..15]

PEG_CRX_GTX_N[0..15]

C14390.1U_0402_10V7K~D C14390.1U_0402_10V7K~D

12

C14400.1U_0402_10V7K~D C14400.1U_0402_10V7K~D

12

C14410.1U_0402_10V7K~D C14410.1U_0402_10V7K~D

12

C14420.1U_0402_10V7K~D C14420.1U_0402_10V7K~D

12

C14430.1U_0402_10V7K~D C14430.1U_0402_10V7K~D

12

C14440.1U_0402_10V7K~D C14440.1U_0402_10V7K~D

12

C14460.1U_0402_10V7K~D C14460.1U_0402_10V7K~D

12

C14470.1U_0402_10V7K~D C14470.1U_0402_10V7K~D

12

C14480.1U_0402_10V7K~D C14480.1U_0402_10V7K~D

12

C14490.1U_0402_10V7K~D C14490.1U_0402_10V7K~D

12

C14500.1U_0402_10V7K~D C14500.1U_0402_10V7K~D

12

C14510.1U_0402_10V7K~D C14510.1U_0402_10V7K~D

12

C14520.1U_0402_10V7K~D C14520.1U_0402_10V7K~D

12

C14530.1U_0402_10V7K~D C14530.1U_0402_10V7K~D

12

C14540.1U_0402_10V7K~D C14540.1U_0402_10V7K~D

12

C14550.1U_0402_10V7K~D C14550.1U_0402_10V7K~D

12

C14570.1U_0402_10V7K~D C14570.1U_0402_10V7K~D

12

C14580.1U_0402_10V7K~D C14580.1U_0402_10V7K~D

12

C14590.1U_0402_10V7K~D C14590.1U_0402_10V7K~D

12

C14600.1U_0402_10V7K~D C14600.1U_0402_10V7K~D

12

C14610.1U_0402_10V7K~D C14610.1U_0402_10V7K~D

12

C14620.1U_0402_10V7K~D C14620.1U_0402_10V7K~D

12

C14630.1U_0402_10V7K~D C14630.1U_0402_10V7K~D

12

C14640.1U_0402_10V7K~D C14640.1U_0402_10V7K~D

12

C14650.1U_0402_10V7K~D C14650.1U_0402_10V7K~D

12

C14660.1U_0402_10V7K~D C14660.1U_0402_10V7K~D

12

C14680.1U_0402_10V7K~D C14680.1U_0402_10V7K~D

12

C14690.1U_0402_10V7K~D C14690.1U_0402_10V7K~D

12

C14700.1U_0402_10V7K~D C14700.1U_0402_10V7K~D

12

C14710.1U_0402_10V7K~D C14710.1U_0402_10V7K~D

12

C14720.1U_0402_10V7K~D C14720.1U_0402_10V7K~D

12

C14730.1U_0402_10V7K~D C14730.1U_0402_10V7K~D

12

PEG_CRX_GTX_C_P0

PEG_CRX_GTX_C_N0

PEG_CRX_GTX_C_P1

PEG_CRX_GTX_C_N1

PEG_CRX_GTX_C_P2

PEG_CRX_GTX_C_N2

PEG_CRX_GTX_C_P3

PEG_CRX_GTX_C_N3

PEG_CRX_GTX_C_P4

PEG_CRX_GTX_C_N4

PEG_CRX_GTX_C_P5

PEG_CRX_GTX_C_N5

PEG_CRX_GTX_C_P6

PEG_CRX_GTX_C_N6

PEG_CRX_GTX_C_P7

PEG_CRX_GTX_C_N7

PEG_CRX_GTX_C_P8

PEG_CRX_GTX_C_N8

PEG_CRX_GTX_C_P9

PEG_CRX_GTX_C_N9

PEG_CRX_GTX_C_P10

PEG_CRX_GTX_C_N10

PEG_CRX_GTX_C_P11

PEG_CRX_GTX_C_N11

PEG_CRX_GTX_C_P12

PEG_CRX_GTX_C_N12

PEG_CRX_GTX_C_P13

PEG_CRX_GTX_C_N13

PEG_CRX_GTX_C_P14

PEG_CRX_GTX_C_N14

PEG_CRX_GTX_C_P15

PEG_CRX_GTX_C_N15

Differential signal

B B

PLTRST_GPU#18

CLK_REQ#16

+3.3V_RUN

12

R1328

R1328

2.2K_0402_5%~D

2.2K_0402_5%~D

A A

HDCP_CLK

12

R1329

@R1329

@

10K_0402_5%~D

10K_0402_5%~D

Stuff R1328 for
standard I2C ROM.
Stuff R1329 for
crypto ROM

5

+3.3V_RUN

C1499

@C1499

@

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

HDCP_WP
HDCP_CLK
HDCP_DAT

U108

@U108

@

8

VCC

7

WP

6

SCL

5

SDA

190-00001-0001-T03 AT88SC0808C_SO8~D

190-00001-0001-T03 AT88SC0808C_SO8~D

4

CLK_PCIE_VGA16
CLK_PCIE_VGA#16

1 2

R1345 200_0402_1%~D@ R1345 200_0402_1%~D@

R1351 2.49K_0402_1%~DR1351 2.49K_0402_1%~D

1 2

R1346 0_0402_5%~DR1346 0_0402_5%~D

+3.3V_RUN

GND

R9 10K_0402_5%~DR9 10K_0402_5%~D

1

A0

2

A1

3

A2

4

4

1 2

@R1358

@

12

1 2

R1356 0_0402_5%~D@ R1356 0_0402_5%~D@

1 2

R1358
0_0402_5%~D

0_0402_5%~D

PEG_CTX_GRX_P0
PEG_CTX_GRX_N0
PEG_CTX_GRX_P1
PEG_CTX_GRX_N1
PEG_CTX_GRX_P2
PEG_CTX_GRX_N2
PEG_CTX_GRX_P3
PEG_CTX_GRX_N3
PEG_CTX_GRX_P4
PEG_CTX_GRX_N4
PEG_CTX_GRX_P5
PEG_CTX_GRX_N5
PEG_CTX_GRX_P6
PEG_CTX_GRX_N6
PEG_CTX_GRX_P7
PEG_CTX_GRX_N7
PEG_CTX_GRX_P8
PEG_CTX_GRX_N8
PEG_CTX_GRX_P9
PEG_CTX_GRX_N9
PEG_CTX_GRX_P10
PEG_CTX_GRX_N10
PEG_CTX_GRX_P11
PEG_CTX_GRX_N11
PEG_CTX_GRX_P12
PEG_CTX_GRX_N12
PEG_CTX_GRX_P13
PEG_CTX_GRX_N13
PEG_CTX_GRX_P14
PEG_CTX_GRX_N14
PEG_CTX_GRX_P15
PEG_CTX_GRX_N15

PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_N15

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

PLTRST_GPU#_R

CLK_REQ#

U106A

U106A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

AE9

PEX_CLKREQ_N

N10M-NS-S-A2_BGA533~D

N10M-NS-S-A2_BGA533~D

3

Part 1 of 5

Part 1 of 5

GPIO

GPIO

DACA_HSYNC
DACA_VSYNC

DACA_BLUE

DACA_GREEN

DACA_VREF
DACA_RSET

DACB_HSYNC
DACB_VSYNC

DACB_BLUE

DACB_GREEN

DACB_VREF

PCI EXPRESS

PCI EXPRESS

DACB_RSET

JTAG_TRST_N

TEST

TEST

I2C DACADACB

I2C DACADACB

XTAL_OUTBUFF

CLK

CLK

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

DACA_RED

DACB_RED

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

TESTMODE

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL
I2CC_SDA

I2CH_SCL
I2CH_SDA

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUT

XTAL_IN

N1
G1
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
F3
G3
G2
F1
F2

AD2
AD1

AE2
AD3
AE3

AF1
AE1

U6
U4

T5
R4
T4

R6
V6

AF3
AG4
AE4
AF4
AG3

AD25

R1
T3

R2
R3

A2
B1

A3
A4

T1
T2

D11

E9

E10

D10

CLK_27M_IN

10P_0402_50V8J~D

10P_0402_50V8J~D

C1892

C1892

1

2

DPB_GPU_HPD
BIA_PWM_GPU
ENVDD_GPU
PANEL_BKEN_DGPU
GPU_VID_0
GPU_VID_1

THERMTRIP_VGA#

GPU_CLKDWN

DPC_GPU_HPD

EDP_HPD

GPU_CRT_HSYNC
GPU_CRT_VSYNC

GPU_CRT_RED
GPU_CRT_BLU
GPU_CRT_GRN

DACA_VREF
DACA_RSET

GPU_JTAG_TCK
GPU_JTAG_TDI
GPU_JTAG_TDO
GPU_JTAG_TM S
GPU_JTAG_TRST#

GPU_TESTMODE

GPU_CRT_CLK_DDC_R
GPU_CRT_DAT_DDC_R

I2CB_SCL
I2CB_SDA

I2CC_SCL
I2CC_SDA

HDCP_CLK
HDCP_DAT

DAI_GPU_R3P_SMBCLK

DAI_GPU_R3P_SMBDAT

XTALSSIN

XTALOUTBUFF

CLK_27M_IN

Y7 27MHZ_10PF_X3S027000BA1H-U~D

Y7 27MHZ_10PF_X3S027000BA1H-U~D

1
2

G1

G1

DPB_GPU_HPD 38
BIA_PWM_GPU 24
ENVDD_GPU 24,39
PANEL_BKEN_DGPU 39
GPU_VID_0 52
GPU_VID_1 52

THERMTRIP_VGA# 23

GPU_CLKDWN 39

DPC_GPU_HPD 26

EDP_HPD 24

GPU_CRT_HSYNC 27
GPU_CRT_VSYNC 27

GPU_CRT_RED 27
GPU_CRT_BLU 27
GPU_CRT_GRN 27

C1456 0.1U_0402_10V7K~DC1456 0.1U_0402_10V7K~D

1 2

R1325 124_0402_1%~DR 1325 124_0402_1%~D

TV9TV9
TV7TV7
TV8TV8
TV6TV6

R1418 33_0402_5%~DR1418 33_0402_5%~D

1 2

R1419 33_0402_5%~DR1419 33_0402_5%~D

1 2

R1417 10K_0402_5%~DR1417 10K_0402_5%~D

1 2

R1317 0_0402_5%~D@R1317 0_0402_5%~D@

1 2

R1416 10K_0402_5%~DR1416 10K_0402_5%~D

1 2

1 2

R1541 0_0402_5%~DR1541 0_0402_5%~D

1 2

R631 0_0402_5%~D@ R631 0_0402_5%~D@

NV_CLK_27M_OUT

3
4

10P_0402_50V8J~D

10P_0402_50V8J~D

G2

G2

C1891

C1891

1

2

1 2

R1372

R1372

DAI_GPU_R3P_SMBCLK 29,40

DAI_GPU_R3P_SMBDAT 29,40

NV_CLK_27M_OUT

1 2

1K_0402_1%~D

1K_0402_1%~D

CLK_NV_27M 6

2

GPU_CRT_CLK_DDC 27

GPU_CRT_DAT_DDC 27

CLK_NVSS_27M 6

+3.3V_RUN

2

ENVDD_GPU

BIA_PWM_GPU

Close to GPU

GPU_CRT_RED

GPU_CRT_GRN

GPU_CRT_BLU

1 2

R1367 150_0402_1%~DR1367 150_0402_1%~D

1 2

R1368 150_0402_1%~DR1368 150_0402_1%~D

1 2

R1369 150_0402_1%~DR1369 150_0402_1%~D

1 2

R1455 4.7K_0402_5%~DR1455 4.7K_0402_5%~D

1 2

R1454 4.7K_0402_5%~DR1454 4.7K_0402_5%~D

1 2

R1359 2.2K_0402_5%~DR1359 2.2K_0402_5%~D

R1362 10K_0402_5%~DR1362 10K_0402_5%~D

R1363 2.2K_0402_5%~DR1363 2.2K_0402_5%~D

R1364 2.2K_0402_5%~DR1364 2.2K_0402_5%~D

R1365 2.2K_0402_5%~DR1365 2.2K_0402_5%~D

R1373 2.2K_0402_5%~DR1373 2.2K_0402_5%~D

1

1 2

R1327 10K_0402_5%~DR1327 10K_0402_5%~D

1 2

R1347 10K_0402_5%~D@R1347 10K_0402_5%~D@

+3.3V_RUN

12

R1421

@R1421

@

10K_0402_5%~D

10K_0402_5%~D

GPU_TESTMODE

12

R1338

R1338

10K_0402_5%~D

10K_0402_5%~D

+3.3V_RUN

DAI_GPU_R3P_SMBCLK

DAI_GPU_R3P_SMBDAT

GPU_CRT_CLK_DDC

GPU_CRT_DAT_DDC

HDCP_DAT

HDCP_WP

12

I2CB_SCL

12

I2CB_SDA

12

I2CC_SCL

12

I2CC_SDA

12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-5472P

LA-5472P

LA-5472P

Date: Sheet

Date: Sheet

Date: Sheet

R1336 2.2K_0402_5%~D@R1336 2.2K_0402_5%~D@

1 2

R1337 2.2K_0402_5%~D@R1337 2.2K_0402_5%~D@

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N10M PCIE,I2C,DAC,GPIO

N10M PCIE,I2C,DAC,GPIO

N10M PCIE,I2C,DAC,GPIO

53 66Wednesday, January 20, 2010

53 66Wednesday, January 20, 2010

53 66Wednesday, January 20, 2010

1

of

of

of

A00

A00

A00

5

DPB_GPU_AUX/DDC25

DPB_GPU_AUX#/DDC25

DPB_GPU_LANE_P038

DPB_GPU_LANE_N038

DPB_GPU_LANE_P138

DPB_GPU_LANE_N138

DPB_GPU_LANE_P238

DPB_GPU_LANE_N238

DPB_GPU_LANE_P338

DPB_GPU_LANE_N338

DPD_GPU_EDP_AUX24

DPD_GPU_EDP_AUX#24

DPD_GPU_LANE_P024

DPD_GPU_LANE_N024

DPD_GPU_LANE_P124

DPD_GPU_LANE_N124

DPB_GPU_AUX/DDC

DPB_GPU_AUX#/DDC

DPD_GPU_EDP_AUX

DPD_GPU_EDP_AUX#

DPC_GPU_AUX/DDC

DPC_GPU_AUX#/DDC

1 2

R646 100K_0402_5%~DR646 100K_0402_5%~D

1 2

R647 100K_0402_5%~DR647 100K_0402_5%~D

1 2

R648 100K_0402_5%~DR648 100K_0402_5%~D

1 2

R652 100K_0402_5%~DR652 100K_0402_5%~D

D D

1 2

R653 100K_0402_5%~DR653 100K_0402_5%~D

1 2

R656 100K_0402_5%~DR656 100K_0402_5%~D

TO DOCKING

C C

IFPD for eDP & DP only

DPC_GPU_AUX/DDC26

DPC_GPU_AUX#/DDC26

DPC_GPU_LANE_P026

TO MB/DOCKING

+3.3V_RUN

DPC_GPU_LANE_N026

DPC_GPU_LANE_P126

DPC_GPU_LANE_N126

DPC_GPU_LANE_P226

DPC_GPU_LANE_N226

DPC_GPU_LANE_P326

DPC_GPU_LANE_N326

AC4
AD4

AA5
AA4

AB4
AB5

AB3
AB2

AA2
AA3
AB1
AA1

V5
V4

W4

Y4

W1

V1
W3
W2

G4
G5

P4

N4
M5
M4

L4

K4

H4

J4

D3
D4

F5

F4

E4

D5
C3
C4

B3

B4

F7

G6
D6
C6

A6

A7

B6

B7

E6

E7

4

U106C

U106C

IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N

IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N

IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N

IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N

IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N

N10M-NS-S-A2_BGA533~D

N10M-NS-S-A2_BGA533~D

Part 3 of 5

Part 3 of 5

NCDBG

NCDBG

LVDS / TMDS

LVDS / TMDS

GENERAL STRAPSERIAL

GENERAL STRAPSERIAL

DBG_DATA0
DBG_DATA1
DBG_DATA2
DBG_DATA3
DBG_DATA4

STRAP0

STRAP1

STRAP2

BUFRST_N

THERMDN

THERMDP

ROM_CS_N

ROM_SCLK

ROM_SI

ROM_SO

IFPAB_RSET

IFPC_RSET

IFPD_RSET

IFPE_RSET

3

C15

NC

D15

NC

J5

NC

T6
W6
Y6
AA6
N3

STRAP0

C7

STRAP1

B9

STRAP2

A9

N5

D8

D9

N2

NC

SPDIF_OUT_GPU

F9

NC

B10

C9

A10

C10

AB6

R5

M6

F8

Use DP8 and DN8 for GFX
thermal monitor

VGA_THERMDN 23

1

C1467

@C1467

@

2200P_0402_25V7K~D

2200P_0402_25V7K~D

2

VGA_THERMDP 23

R1366

R1366

1 2

36K_0402_5%~D

36K_0402_5%~D

refer DS-03984-001_v04,

ROM_SCLK_GPU

ROM_SI_GPU

ROM_SO_GPU

R1429 1K_0402_1%~DR1429 1K _0402_1%~D

R1430 1K_0402_1%~DR1430 1K _0402_1%~D

R1431 1K_0402_1%~DR1431 1K _0402_1%~D

N10M-NS remove CEC, S/PDIF??

1 2

1 2

1 2

2

U106E

U106E

B2

GND

B5

GND

B8

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B26

GND

E2

GND

E5

GND

E8

GND

E11

GND

E17

GND

E20

GND

E23

GND

E26

GND

H2

GND

H5

GND

J11

GND

J14

GND

J17

GND

K9

GND

K19

GND

L2

GND

L5

GND

L11

GND

L12

GND

L13

GND

L14

GND

L15

GND

L16

GND

L17

GND

M12

GND

M13

GND

M14

GND

M15

GND

M16

GND

P2

GND

P5

GND

P9

GND

P19

GND

P23

GND

P26

GND

T12

GND

T13

GND

W16

GND_SENSE

E14

GND_SENSE

N10M-NS-S-A2_BGA533~D

N10M-NS-S-A2_BGA533~D

Part 5 of 5

Part 5 of 5

FB_CAL_TERM_GND

MULTI_STRAP_REF0_GND

MULTI_STRAP_REF1_GND

GND

GND

FB_CAL_PU_GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

U2
U5
U11
U12
U13
U14
U15
U16
U17
U23
U26
V9
V19
W11
W14
W17
Y2
Y5
Y23
Y26
AC2
AC5
AC6
AC8
AC11
AC14
AC17
AC20
AC23
AC26
AF2
AF5
AF8
AF11
AF14
AF17
AF20
AF23
AF26
T16
T15
T14
F6

1 2

A15

R1433 40.2_0402_1%~DR1433 40.2_0402_1%~D

1 2

B16

R1434 60.4_0402_1%~DR1434 60.4_0402_1%~D

1 2

F11

R1467 40.2K_0402_1%~DR1467 40.2K_0402_1%~D

F10

1 2

R1466 40.2K_0402_1%~DR1466 40.2K_0402_1%~D

1

R1334

R1334

R1333

R1331

R1331

R1330

R1330

B B

1 2

45.3K_0402_1%~D

45.3K_0402_1%~D

34.8K_0402_1%~D

34.8K_0402_1%~D

R1339

R1339

R1340

@

@

@ R1340

@

1 2

34.8K_0402_1%~D

34.8K_0402_1%~D

4.99K_0402_1%~D

4.99K_0402_1%~D

R1333

@

@

R1332

R1332

1 2

1 2

4.99K_0402_1%~D

4.99K_0402_1%~D

24.9K_0402_1%~D

24.9K_0402_1%~D

R1341

R1341

R1342

R1342

@

@

1 2

1 2

4.99K_0402_1%~D

4.99K_0402_1%~D

15K_0402_1%~D

15K_0402_1%~D

X7620431001:for Hynix 64Mx16 DDR3 part stuff R1343=15K

R1335

R1335

@

@

@

@

1 2

1 2

1 2

R1343

X76@ R1343

X76@

1 2

4.99K_0402_1%~D

4.99K_0402_1%~D

4.99K_0402_1%~D

4.99K_0402_1%~D

R1344

R1344

1 2

1 2

10K_0402_1%~D

10K_0402_1%~D

15K_0402_1%~D

15K_0402_1%~D

STRAP0
STRAP1
STRAP2
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU

Resistor Values

5K

10K

15K

20K

25K

30K

35K

45K

Pull-up to +3V

01111

01110

01011

01001

00111

00110

00011

00000

Pull-down to Gnd

11111

11110

11011

11001

10111

10110

10011

100000

X7620431002:For Samsung 64Mx16 DDR3 part stuff R1343=20K

A A

STRAP0

STRAP1

STRAP2

USER[3:0]

3GIO_PADCFG_LUT_ADR[3:0]

PCI_DEVID[3:0]

5

ROM_SI

ROM_SO

4

PCIDEVID_EXT, SUB_VENDOR, SLOT_CLK, PEX_PLL_ENROM_SCLK

RAM_CFG[3:0]

XCLK_417, FB_0_BAR_SIZE, ALT_ADOOR, VGA_DEVICE

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

N10M DP, STRAP, GND

N10M DP, STRAP, GND

N10M DP, STRAP, GND

LA-5472P

LA-5472P

LA-5472P

A00

A00

54 66Wednesday, January 20, 2010

54 66Wednesday, January 20, 2010

54 66Wednesday, January 20, 2010

1

A00

of

of

of

5

NV DG for VDD Cap:

0.01uF 10% X7R x6

0.047uF 10% X7R x3

0.1uF 10% X7R x1

4.7uF 10% X5R x1

D D

C C

+1.05V_RUN_VTT_GFX

B B

+3.3V_RUN

L83 BLM18PG221SN1D_2P~DL83 BLM18PG221SN1D_2P~D

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1576

C1576

1

2

+1.05V_RUN_VTT_GFX

A A

L84 BLM18PG221SN1D_2P~DL84 BLM18PG221SN1D_2P~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1579

C1579

1

2

100NH_LLQ1608-FR10G_2%~D

100NH_LLQ1608-FR10G_2%~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1710

C1710

1

2

220R 100MHZ

12

1

2

220R 100MHZ

12

5

180R 100MHZ

L90

L90

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1575

C1575

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

1

2

+3.3V_RUN

12

1

2

C1600

C1600

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1732

C1732

1

2

BLM18PG221SN1D_2P~D

BLM18PG221SN1D_2P~D

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

1

C1777

C1777

2

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

1

2

ϮϮϬŵ

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1574

C1574

1

2

Ϯϴϱŵ

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1577

C1577

1

2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

C1733

C1733

1

2

220R 100MHZ

L95

L95

1 2

+3.3V_RUN

1

2

ϭϱϬŵϭϬŵŝů

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1711

C1711

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1780

C1780

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1784

C1784

1

2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

C1734

C1734

1

2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

C1774

C1774

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1735

C1735

1

2

+IFPCD_PLLVDD

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1870

C1870

1

2

+IFPCDE_IOVDD

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1785

C1785

1

2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

2

+3.3V_RUN_VDD33

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1776

C1776

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C1773

C1773

1

2

+PLLVDD

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1712

C1712

C1713

C1713

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1871

C1871

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1583

C1583

1

2

C1722

C1722

C1863

C1863

4

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

C1723

C1723

1

1

2

2

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

C1729

C1729

1

1

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

2

C1856

C1856

C1775

C1775

2

R1456 10K_0402_5%~DR1456 10K_0402_5%~D

R1461 10K_0402_5%~DR1461 10K_0402_5%~D

Ϯϴϱŵ
Ϯϴϱŵ

R1428 10K_0402_5%~DR1428 10K_0402_5%~D

ϮϮϬŵ
ϮϮϬŵ
ϮϮϬŵ

4

+GPU_CORE

C1724

C1724

C1730

C1730

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

ϭϮϬŵ

12

12

+IFPCDE_IOVDD

12

+IFPCD_PLLVDD

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1736

C1736

1

2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

C1725

C1725

1

2

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

C1731

C1731

1

2

C1857

C1857

ϭϮϬŵ

+IFPAB_PLLVDD

+IFPE_PLLVDD

U106D

U106D

J9

VDD

J10

VDD

J12

VDD

J13

VDD

L9

VDD

M9

VDD

M11

VDD

M17

VDD

N9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R9

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

T9

VDD

T11

VDD

T17

VDD

U9

VDD

U19

VDD

W9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

A12

VDD33

B12

VDD33

C12

VDD33

D12

VDD33

E12

VDD33

F12

VDD33

AG9

PEX_SVDD_3V3

V3

IFPA_IOVDD

V2

IFPB_IOVDD

J6

IFPCD_IOVDD

H6

IFPE_IOVDD

AD5

IFPAB_PLLVDD

P6

IFPC_PLLVDD

N6

IFPD_PLLVDD

D7

IFPE_PLLVDD

N10M-NS-S-A2_BGA533~D

N10M-NS-S-A2_BGA533~D

Part 4 of 5

Part 4 of 5

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

POWER

POWER

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

Ϯ

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

Ϯ

PEX_PLLVDD

VID_PLLVDD

FB_PLLAVDD

FB_PLLAVDD

FB_DLLAVDD

FB_CAL_PD_VDDQ

VDD_SENSE

VDD_SENSE

+3.3V_RUN

1

2

+1.05V_RUN_VTT_GFX

3

A13

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

SP_PLLVDD

PLLVDD

DACA_VDD

DACB_VDD

L87 BLM18PG221SN1D_2P~DL87 BLM18PG221SN1D_2P~D

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1592

C1592

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Ϯϵϳ

B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22

AG6
AF6
AE6
AD6
AC13
AC7
AB17
AB16
AB13
AB9
AB8
AB7

AG7
AF7
AE7
AD8
AD7
AC9

+PEX_PLLVDD

AF9

+PLLVDD

K6

ϰϱŵ

+SP_PLLVDD

L6

ϲϬŵ

K5

R19

AC19

T19

AG2

W5

B15

W15

E15

220R 100MHZ

+FB_AVDD

100mA

100mA

+DACA_VDD

1 2

R1420 10K_0402_5%~DR1420 10K_0402_5%~D

+1.5V_MEM_VDDQ

route as 50ohm

12

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1591

C1591

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

3

ůŽƐĞƚŽWŝŶ ϭϳϰϳƚŽďĞĐůŽƐĞƚŽƚŚĞ'Wh

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

2

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

W>>K^dK>> W>EZ'Wh

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

ϰϱŵ

C1749

C1749

C1767

C1767

C1750

C1750

C1756

C1756

1

2

1

2

1

2

1

2

ϭϮϬŵ

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1746

C1746

C1766

C1766

C1751

C1751

C1757

C1757

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

C1745

C1745

1

2

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

C1765

C1765

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1752

C1752

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1758

C1758

2

W>EZ'Wh

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1789

C1789

1

2

R1432 40.2_0402_1%~DR1432 40.2_0402_1%~D

GPU_VDD_SENSE 52

12

+1.5V_MEM_GFX

ϮϮϬŵ

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1590

C1590

1

2

100NH_LLQ1608-FR10G_2%~D

100NH_LLQ1608-FR10G_2%~D

C1858

C1858

+IFPE_PLLVDD

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1783

C1783

1

2

L96

L96

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1866

C1866

C1865

C1865

1

1

2

2

ϰϱŵ

+SP_PLLVDD

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D
C1860

C1860

C1859

C1859

1

1

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

@

@

C1748

C1748

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

@

@

C1764

C1764

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1753

C1753

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1759

C1759

2

20 mil

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1790

C1790

1

2

ϭϮϬŵ

+PEX_PLLVDD

2

1

2

1

2

1

2

1

2

L94 BLM18PG221SN1D_2P~DL94 BLM18PG221SN1D_2P~D

+DACA_VDD

2

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1747

C1747

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

@

@

C1763

C1763

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1754

C1754

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1760

C1760

220R 100MHZ

ůŽƐĞƚŽWŝŶ

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

+1.5V_MEM_GFX

C1768

C1768

1

2

N10M SPEC FBVDDQ TYP. 1.8V.

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

+1.5V_MEM_GFX

1

C1762

C1762

2

+1.05V_RUN_VTT_GFX

22U_0805_6.3VAM~D

22U_0805_6.3VAM~D

10U_0805_4VAM~D

10U_0805_4VAM~D

1

1

C1755

C1755

C1861

C1861

2

2

+1.05V_RUN_VTT_GFX

10U_0805_4VAM~D

10U_0805_4VAM~D

22U_0805_6.3VAM~D

22U_0805_6.3VAM~D

1

12

@C1511

@

C1511

1

2

C1862

C1862

2

+1.05V_RUN_VTT_GFX

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

@C1512

@

1

1

C1512

2

2

C1761

C1761

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1770

C1770

ϭϮϬŵ

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1769

C1769

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

C1716

C1716

2

0.1U_0402_10V7K~D

C1869

C1869

C1868

C1868

1

1

2

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

L79

L79

100NH_LLQ1608-FR10G_2%~D

100NH_LLQ1608-FR10G_2%~D

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

1

C1513

C1513

2

300ohm 100MHz ESR0.25ohm

BLM18PG331SN1D_2P~D

BLM18PG331SN1D_2P~D

470P_0402_50V7K~D

470P_0402_50V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

4.7U_0603_6.3V6K~D

C1867

C1867

1

2

LA-5472P

LA-5472P

LA-5472P

4.7U_0603_6.3V6K~D

C1717

C1717

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N10M Power

N10M Power

N10M Power

C1718

C1718

1

12

L92

L92

1

+1.05V_RUN_VTT_GFX

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

1

C1514

C1514

2

12

1

2

55 66Wednesday, January 20, 2010

55 66Wednesday, January 20, 2010

55 66Wednesday, January 20, 2010

+3.3V_RUN

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1719

C1719

A00

A00

A00

of

of

of

5

4

3

2

1

FBAD[0..63]

FBA_CMD[0..30]

DQMA#[0..7]

DQSA_RN[0..7]

DQSA_WP [0..7]

D D

12

12

C C

12

12

12

B B

+1.5V_MEM_GFX

1.1K_0402_1%~D

1.1K_0402_1%~D

12

@R1376

@

R1376

1.1K_0402_1%~D

1.1K_0402_1%~D

12

@R1377

@

R1377

FBA_CMD0

10K_0402_5%~D

10K_0402_5%~D
R1380

R1380

FBA_CMD16

10K_0402_5%~D

10K_0402_5%~D
R1382

R1382

FBA_CMD25

10K_0402_5%~D

10K_0402_5%~D
R1384

R1384

FBA_CMD27

10K_0402_5%~D

10K_0402_5%~D
R1386

R1386

FBA_CMD28

10K_0402_5%~D

10K_0402_5%~D
R1387

R1387

+FB_VREF

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

2

FBAD[0..63] 57,58

FBA_CMD[0..30] 57,58

DQMA#[0..7] 57,58

DQSA_RN[0..7] 57,58

DQSA_WP [0..7] 57,58

16mil

@C1502

@

C1502

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

U106B

U106B

D22

FBA_D0

E24

FBA_D1

E22

FBA_D2

D24

FBA_D3

D26

FBA_D4

D27

FBA_D5

C27

FBA_D6

B27

FBA_D7

A21

FBA_D8

B21

FBA_D9

C21

FBA_D10

C19

FBA_D11

C18

FBA_D12

D18

FBA_D13

B18

FBA_D14

C16

FBA_D15

E21

FBA_D16

F21

FBA_D17

D20

FBA_D18

F20

FBA_D19

D17

FBA_D20

F18

FBA_D21

D16

FBA_D22

E16

FBA_D23

A22

FBA_D24

C24

FBA_D25

D21

FBA_D26

B22

FBA_D27

C22

FBA_D28

A25

FBA_D29

B25

FBA_D30

A26

FBA_D31

U24

FBA_D32

V24

FBA_D33

V23

FBA_D34

R24

FBA_D35

T23

FBA_D36

R23

FBA_D37

P24

FBA_D38

P22

FBA_D39

AC24

FBA_D40

AB23

FBA_D41

AB24

FBA_D42

W24

FBA_D43

AA22

FBA_D44

W23

FBA_D45

W22

FBA_D46

V22

FBA_D47

AA25

FBA_D48

W27

FBA_D49

W26

FBA_D50

W25

FBA_D51

AB25

FBA_D52

AB26

FBA_D53

AD26

FBA_D54

AD27

FBA_D55

V25

FBA_D56

R25

FBA_D57

V26

FBA_D58

V27

FBA_D59

R26

FBA_D60

T25

FBA_D61

N25

FBA_D62

N26

FBA_D63

N10M-NS-S-A2_BGA533~D

N10M-NS-S-A2_BGA533~D

Part 2 of 5

Part 2 of 5

MEMORY INTERFACE

MEMORY INTERFACE

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FB_VREF

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22
J22
L22

C26
B19
D19
D23
T24
AA23
AB27
T26

D25
A18
E18
B24
R22
Y24
AA27
R27

C25
A19
E19
A24
T22
AA24
AA26
T27

A16

F24
F23

N24
N23

M22

R1378

R1378

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

DQSA_RN0
DQSA_RN1
DQSA_RN2
DQSA_RN3
DQSA_RN4
DQSA_RN5
DQSA_RN6
DQSA_RN7

DQSA_WP0
DQSA_WP1
DQSA_WP2
DQSA_WP3
DQSA_WP4
DQSA_WP5
DQSA_WP6
DQSA_WP7

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

+FB_VREF

1 2

10K_0402_5%~D

10K_0402_5%~D

Mode C - Mirror Mode Mapping

DATA Bus

0..31

A8

CS0#_L

A7

A2

A11

A5

A0

CAS#

BA1

A9

BA0

BA2

A3

A4

A13

WE#

A1

A10

A12

CS1#_L

RAS#

ODT_L

A6

RST

A14

A15

CLKA0 57
CLKA0# 57

CLKA1 58
CLKA1# 58

+1.5V_MEM_GFX

T32PAD~D @T32PAD~D @

T31PAD~D @T31PAD~D @

Address

CMD0 CKE_L

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

32..63

A8

A6

A1

A9

A4

A12

CAS#CMD8

A3

A11

CS0#_H

BA0

A15

BA1

CS1#_H

ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7

CKE_H

RST

A13

BA2

Q197A

DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

GFX_MEM_VTT_ON39

Q197A

2

12

R643

R643
100K_0402_5%~D

100K_0402_5%~D

GFX_MEM_VTT_ON#

61

+15V_ALW+3.3V_ALW2 +1.5V_MEM

5

R645

R645

100K_0402_5%~D

100K_0402_5%~D

2

G

G

+1.5V_MEM_GFX Source

Q58

Q58
SI4164DY-T1-GE3_SO8~D

SI4164DY-T1-GE3_SO8~D

12

R642

R642

100K_0402_5%~D

100K_0402_5%~D

GFX_MEM_VTT_EN

3

Q197B

Q197B
DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

8
7

5

4

2200P_0402_50V7K~D

2200P_0402_50V7K~D

1

2

+1.05V_RUN_VTT_GFX Source

+15V_ALW +1.05V_M

12

1.05V_RUN_VTT_GFX#_EN

13

D

D

Q198

Q198
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

Q59

Q59
SI4164DY-T1-GE3_SO8~D

SI4164DY-T1-GE3_SO8~D

8
7

5

4

1

2

1
2
36

C715

C715

1
2
36

2200P_0402_50V7K~D

2200P_0402_50V7K~D

C716

C716

+1.5V_MEM_GFX

10U_0805_10V4Z~D

10U_0805_10V4Z~D

20K_0402_5%~D

20K_0402_5%~D

12

1

R641

R641

C714

C714

2

+1.05V_RUN_VTT_GFX

10U_0805_10V4Z~D

10U_0805_10V4Z~D

20K_0402_5%~D

20K_0402_5%~D

12

1

C717

C717

2

R644

R644

A A

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

N10M Memory

N10M Memory

N10M Memory

LA-5472P

LA-5472P

LA-5472P

A00

A00

56 66Wednesday, January 20, 2010

56 66Wednesday, January 20, 2010

56 66Wednesday, January 20, 2010

1

A00

of

of

of

5

4

3

2

1

Memory Partition A - Lower 32 bits

FBA_CMD[0..30]

FBAD[0..63]

DQMA#[0..7]

DQSA_RN[0..7]

D D

U110

X76@

U110

U109

X76@

U109

16mil

+1.5V_MEM_GFX

12

R1389

R1389

1.1K_0402_1%~D

1.1K_0402_1%~D

R1390

R1390

1.1K_0402_1%~D

1.1K_0402_1%~D

CLKA0

C C

B B

R1393

R1393
243_0402_1%~D

243_0402_1%~D

1 2

CLKA0#

12

+FBA_VREF0

1

C1596

C1596

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

2

CLKA056
CLKA0#56

FBA_CMD7
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD17
FBA_CMD6
FBA_CMD26
FBA_CMD3
FBA_CMD1
FBA_CMD10
FBA_CMD21
FBA_CMD5
FBA_CMD22
FBA_CMD18
FBA_CMD30

FBA_CMD12
FBA_CMD9
FBA_CMD13

FBA_CMD0

FBA_CMD25
FBA_CMD24
FBA_CMD2
FBA_CMD8
FBA_CMD19

DQSA_WP0
DQSA_WP2

DQMA#0 DQMA#3

DQSA_RN0
DQSA_RN2

FBA_CMD28

12

+FBA_VREF0

R1437

R1437
243_0402_1%~D

243_0402_1%~D

+1.5V_MEM_GFX

X76@

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

J3

RAS#

L2

CS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

M8

VREFCA

H1

VREFDQ

J1

NC

J9

NC

L1

NC

L9

NC

T7

NC

H5TQ1G63BFR-12C_FBGA96~D

H5TQ1G63BFR-12C_FBGA96~D

96-BALL

96-BALL

SDRAM DDR3

SDRAM DDR3

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

FBAD1

E3

FBAD6

F7

FBAD3

F2

FBAD4

F8

FBAD0

H3

FBAD5

H8

FBAD2

G2

FBAD7

H7

FBAD17

D7

FBAD21

C3

FBAD19

C8

FBAD20

C2

FBAD18

A7

FBAD22

A2

FBAD16

B8

FBAD23

A3

+1.5V_MEM_GFX +1.5V_MEM_GFX

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group2

16mil

12

R1438

R1438
243_0402_1%~D

243_0402_1%~D

+1.5V_MEM_GFX

FBA_CMD7
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD17
FBA_CMD6
FBA_CMD26
FBA_CMD3
FBA_CMD1
FBA_CMD10
FBA_CMD21
FBA_CMD5
FBA_CMD22
FBA_CMD18
FBA_CMD30

FBA_CMD12
FBA_CMD9
FBA_CMD13

CLKA0
CLKA0#
FBA_CMD0

FBA_CMD25
FBA_CMD24
FBA_CMD2
FBA_CMD8
FBA_CMD19

DQSA_WP3
DQSA_WP1

DQMA#1DQMA#2

DQSA_RN3
DQSA_RN1

FBA_CMD28

+FBA_VREF0

X76@

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

J3

RAS#

L2

CS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

M8

VREFCA

H1

VREFDQ

J1

NC

J9

NC

L1

NC

L9

NC

T7

NC

H5TQ1G63BFR-12C_FBGA96~D

H5TQ1G63BFR-12C_FBGA96~D

96-BALL

96-BALL

SDRAM DDR3

SDRAM DDR3

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

FBAD30

E3

FBAD24

F7

FBAD31

F2

FBAD28

F8

FBAD29

H3

FBAD26

H8

FBAD25

G2

FBAD27

H7

FBAD14

D7

FBAD10

C3

FBAD15

C8

FBAD11

C2

FBAD12

A7

FBAD8

A2

FBAD13

B8

FBAD9

A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group3Group0

Group1

DQSA_WP [0..7]

FBA_CMD[0..30] 56,58

FBAD[0..63] 56,58

DQMA#[0..7] 56,58

DQSA_RN[0..7] 56,58

DQSA_WP [0..7] 56,58

Mode C - Mirror
Mode Mapping

0..31

A8

CS0#_L

A7

A2

A11

A5

A0

CAS#

BA1

A9

BA0

BA2

A3

A4

A13

WE#

A1

A10

A12

CS1#_L

RAS#

ODT_L

A6

RST

A14

A15

DATA Bus

32..63

A8

A6

A1

A9

A4

A12

CAS#CMD8

A3

A11

CS0#_H

BA0

A15

BA1

CS1#_H

ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7

CKE_H

RST

A13

BA2

Address

CMD0 CKE_L

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1792

C1792

A A

5

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1794

C1794

C1793

C1793

1

1

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1795

C1795

1

1

C1796

C1796

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
C1798

C1798

C1797

C1797

1

1

1

2

2

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

C1799

C1799

1U_0402_6.3V6K~D

C1800

C1800

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1802

C1802

C1801

C1801

1

1

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1803

C1803

1

2

0.1U_0402_10V7K~D

C1804

C1804

C1805

C1805

1

1

2

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

VRAM A Lower

VRAM A Lower

VRAM A Lower

LA-5472P

LA-5472P

LA-5472P

A00

A00

57 66Wednesday, January 20, 2010

57 66Wednesday, January 20, 2010

57 66Wednesday, January 20, 2010

1

A00

of

of

of

5

4

Memory Partition A - Upper 32 bits

3

2

1

FBAD[0..63]

D D

U112

X76@

U112

U111

X76@

U111

X76@

96-BALL

96-BALL

SDRAM DDR3

SDRAM DDR3

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

C1810

C1810

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1

2

16mil

FBA_CMD22
FBA_CMD4

+1.5V_MEM_GFX

12

R1395

R1395

1.1K_0402_1%~D

1.1K_0402_1%~D

R1396

R1396

1.1K_0402_1%~D

1.1K_0402_1%~D

C C

B B

12

CLKA1

R1399

R1399
243_0402_1%~D

243_0402_1%~D

1 2

CLKA1#

+FBA_VREF1

1

C1631

C1631

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

2

CLKA156
CLKA1#56

12

FBA_CMD20
FBA_CMD9
FBA_CMD6
FBA_CMD17
FBA_CMD3
FBA_CMD26
FBA_CMD1
FBA_CMD5
FBA_CMD19
FBA_CMD10
FBA_CMD7
FBA_CMD29
FBA_CMD13

FBA_CMD12
FBA_CMD14
FBA_CMD30

FBA_CMD27

FBA_CMD16
FBA_CMD24
FBA_CMD11
FBA_CMD8
FBA_CMD21

DQSA_WP5

DQMA#4
DQMA#5 DQMA#6

DQSA_RN4
DQSA_RN5

FBA_CMD28

+FBA_VREF1 +FBA_VREF1

R1439

R1439
243_0402_1%~D

243_0402_1%~D

+1.5V_MEM_GFX

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1807

C1807

C1806

C1806

1

2

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

J3

RAS#

L2

CS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

M8

VREFCA

H1

VREFDQ

J1

NC

J9

NC

L1

NC

L9

NC

T7

NC

H5TQ1G63BFR-12C_FBGA96~D

H5TQ1G63BFR-12C_FBGA96~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1808

C1808

C1809

1

2

C1809

1

2

FBAD35

E3

FBAD32

F7

FBAD38

F2

FBAD33

F8

FBAD37

H3

FBAD34

H8

FBAD39

G2

FBAD36

H7

FBAD42

D7

FBAD46

C3

FBAD40

C8

FBAD45

C2

FBAD44

A7

FBAD43

A2

FBAD41

B8

FBAD47

A3

+1.5V_MEM_GFX +1.5V_MEM_GFX

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1
B9
D1
D8
E2
E8
F9
G1
G9

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1811

C1811

C1812

C1812

1

2

Group4

Group5

1

2

16mil

12

R1440

R1440
243_0402_1%~D

243_0402_1%~D

+1.5V_MEM_GFX

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1813

C1813

1

2

C1814

C1814

FBA_CMD22
FBA_CMD4
FBA_CMD20
FBA_CMD9
FBA_CMD6
FBA_CMD17
FBA_CMD3
FBA_CMD26
FBA_CMD1
FBA_CMD5
FBA_CMD19
FBA_CMD10
FBA_CMD7
FBA_CMD29
FBA_CMD13

FBA_CMD12
FBA_CMD14
FBA_CMD30

CLKA1
CLKA1#
FBA_CMD27

FBA_CMD16

FBA_CMD24

FBA_CMD11
FBA_CMD8
FBA_CMD21

DQSA_WP7DQSA_WP4
DQSA_WP6

DQMA#7

DQSA_RN7
DQSA_RN6

FBA_CMD28

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1816

C1816

C1815

C1815

1

2

X76@

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

J3

RAS#

L2

CS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

M8

VREFCA

H1

VREFDQ

J1

NC

J9

NC

L1

NC

L9

NC

T7

NC

96-BALL

96-BALL

SDRAM DDR3

SDRAM DDR3

H5TQ1G63BFR-12C_FBGA96~D

H5TQ1G63BFR-12C_FBGA96~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1817

C1817

C1818

C1818

1

1

2

2

1

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

FBAD61

E3

FBAD57

F7

FBAD58

F2

FBAD60

F8

FBAD56

H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1819

C1819

1

2

FBAD62
FBAD59
FBAD63

FBAD51
FBAD52
FBAD49
FBAD53
FBAD48
FBAD54
FBAD50
FBAD55

Group7

Group6

Mode C - Mirror Mode Mapping

FBA_CMD[0..30]

DQMA#[0..7]

DQSA_RN[0..7]

DQSA_WP [0..7]

Address

CMD0 CKE_L

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

FBA_CMD[0..30] 56,57

DQMA#[0..7] 56,57

DATA Bus

0..31

A8

CS0#_L

A7

A2

A11

A5

A0

CAS#

BA1

A9

BA0

BA2

A3

A4

A13

WE#

A1

A10

A12

CS1#_L

RAS#

ODT_L

A6

RST

A14

A15

FBAD[0..63] 56,57

DQSA_RN[0..7] 56,57

DQSA_WP [0..7] 56,57

32..63

A8

A6

A1

A9

A4

A12

CAS#CMD8

A3

A11

CS0#_H

BA0

A15

BA1

CS1#_H

ODT_H

A5

A14

A10

A2

WE#

A0

RAS#

A7

CKE_H

RST

A13

BA2

A A

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

VRAM A Upper

VRAM A Upper

VRAM A Upper

LA-5472P

LA-5472P

LA-5472P

58 66Wednesday, January 20, 2010

58 66Wednesday, January 20, 2010

58 66Wednesday, January 20, 2010

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Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

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Item

Item Issue Description

ItemItem

D D

Page# T itle

Page#Page#

Title

TitleTitle

1 7/13/2009HW

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

COMPAL40

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

R98 change to 130k ohmBoard ID

2

Solution D escription

Solution Description Rev.

Solution D escriptionSolution D escription

1

Rev.Page#

Rev.Rev.

X01

2

HW30

7/13/2009

COMPAL

follow M09 +3.3V_LAN enable control circuit

Depop R47

X01

Add R1469, R1497~R1505, R1507~R1509, C1875, C1878~C1884, Q199~Q202,
Q205, Q207, Q208 , U141, PJP906, PJP907, change R879 to 1.5K, R880 to

3

8, 12,
13, 42

HW

7/13/2009

Intel

Intel S3 reduction circuit.

750ohm, R624 to 22 ohm, change CPU CDDQ power source from +1.5V_MEM to
+1.5V_CPU_VDDQ, change +.075_DDR_VTT discharge gate from RUN_ON_ENABLE#
to RUN_ON_CPU1.5VS3#, add +1.5V_CPU_VDDQ discharge circuit, add net

X01

"DDR_HVREF_RST_GATE" from U36.A34 to Q119.2, "CPU1.5V_S3_GATE" from
U36.A36 to R1501

Change C718 from .47uF to .22uF4HW31 7/23/2009 Broadcom Change C718 value X01

5

C C

9 31 HW 7/23/2009

10 24 HW 7/23/2009

23 HW 7/23/2009 DELL Follow DELL request to remove R3P circuit

41,37 HW Compal Per M09 lesson learn request X01Re-define JTP1, JBIO16

19 Intel GPIO1, 6, 7 need to PU if no used. X01Add R1506, R15107

40 Compal8 Follow SMSC5045 spec

43

7/23/2009

7/23/2009HW

Broadcom

Compal

Remove RFID disable circuit Remove R1062~R1065 X01

CAM Module change from 7 pin to 8 pin Change pin define for JEDP1 X01

Delete U140, R136, R138, R156,R507, R516, R519, R529, R531, R534~R536,
R594, R1457, R1458, R1462, R1463, C434, C72, C73, C391, C406, pop R142,
D2, C219

Add R1512, @C1885, C1886, change R560 to 100Kohm, add net name
LAT_ON_SW#_R

X01

X017/23/2009HW

HW3111 Depop R898 X01R898 and R485 pop at the same timeBroadcom7/23/2009

HW X017/29/2009 NVidia BIA_PWM implementation POP R165, de-pop R1662412

B B

42

7/29/2009HW14

Compal

Compal

Compal

Depop all related components where are
located at 0 Z-hight area

For load switches Vout over 5% range
concern by power team .

Depop JXDP1, JXDP2, JDEG1, JP2 connector

Change Q151 to SIS406D,Q183 to SI7658ADP,Q58 to SI4164DY

X017/29/2009HW8,1513

X01

15

16

7/29/2009HW21

17

18 Pericom 8200 SW issue DVI can not work

19

20 Compal Base on de-rating report. Change Q61 from AO4456 to NTMS4107.42 HW 7/29/2009

A A

21 37, 39 Compal GPIO MAP update Add reserved R1513 between U95.18 and +3.3V_RUN, add R1514 between

29 HW 7/29/2009 EMI solution.Compal Change R1295 to L4 (220ohm) and R1217 from 22ohm to 47ohm.

HW 7/29/2009

5

7/29/2009HW24

Compal42 7/29/2009HW

Intel

DELL7/29/2009HW36,39

PERICOM

Backdrive EA Failure on RAM

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

Pop R625 and Q79, change R625 to 0603 size.

De-pop C105 & C106

Add R1516 to pull up U9 pin 23 (P1_OC0) of Pericom 8200 SW with a 4.7K
ohm resistor to +3.3_RUN

U95.18 and 5028.A47 named EN_ESATA_RPTR.

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

EE P.I.R (1/1)

EE P.I.R (1/1)

EE P.I.R (1/1)

LA-5472P

LA-5472P

LA-5472P

1

X01

X01The PLLs aren’t used in a DIS system

X01Connect UWB_RADIO_DIS# from EC5028.A56 to MINI3.20Reconnect the signal UWB_RADIO_DIS#

X01

X01

X01

X01

A00

A00

59 66Wednesday, January 20, 2010

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Request

Request

Item

Item Issue Description

ItemItem

D D

Page# T itle

Page#Page#

Title

TitleTitle

22 HW 7/29/2009 Add R884, R1515, Q209, Q21031 Broadcom X01Resolve 5882 leackage issue

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

2

Solution D escription

Solution Description Rev.

Solution D escriptionSolution D escription

1

Rev.Page#

Rev.Rev.

Resolve smart cart can't work problem. X01HW 7/29/200931 pop R775, R537, depop R776.Broadcom23

Change PU power rail for USB_MCARD1_DET#36 HW 7/29/2009 Compal Change USB_MCARD1_DET# PU power rail to +3.3V_RUN24 X01

3125

HW 7/29/2009 Compal

Remove R1061 to avoid double PU and provide
back-drive path.

Remove R1061

X01

Follow the pop option on CRB1.6 to depop

HW 7/29/2009 Compal

C39 for +VCCACLK, C610 for +SATAPLL, C111

Depop C610, C39, C111, C11221 X0126

and C112 for +1.05V_M_VCCEPW

HW X01Change external Load Capacitor Value C296 and C297 to 12 pF of Y1.Base on crystal EA result.Compal7/29/20091527

C C

HW30 7/29/2009 Compal Base on crystal EA result.

Change external Load Capacitor Value C476 to 33 pF and C427 change to
200 ohm (R808) of Y2.

X0128

40 HW 7/29/2009 Compal Base on crystal EA result. X0129 Change external Load Capacitor Value C674 and C675 to 33 pF of Y4.

33 HW 7/29/2009 Compal Base on crystal EA result. X0130 Change external Load Capacitor Value C514 and C515 to 22 pF of X3.

X01Compal EMI solution. Change R1215 from 22ohm to 47ohm.29 HW 7/29/200931

29 Compal Prevent floating of PCH_GPIO34 Add R1511 10K PD.HW 7/29/200932 X01

33 HW 7/29/2009 X01

38 Compal Based on DFX team request

Change docking connector from SP030000F0L(JAE_WD2F144WB1_144P-T) to
SP030000F0L(JAE_WD2F144WB1R300_144P).

Change PU power rail for PCIE_MCARD3_DET#36 Change PCIE_MCARD3_DET# PU power rail to +3.3V_RUNCompal7/29/2009HW34 X01

18 35 Remove Braidwood circuit. Delete R1411,R1453,JBW1HW 05/08/2009 Compal35 X01

B B

36

Base on SATA EA result, need to trun off
Pre-emphasis 0.

Depop R1298,pop R1301.36 HW 05/08/2009 Compal

X01

33 Change C514 C514 to 15pF and R421 to 100 ohm.37 HW 10/08/2009 Compal X01Base on crystal EA result.

38 38 Change VGA_ID_DISC & VGA_ID_UMA PU power rail HW 11/08/2009 Compal

Change VGA_ID_DISC & VGA_ID_UMA PU power rail from +3.3V_RUN to
+3.3V_ALW

X01

39 38 HW Change ODD_DET# PU power rail.11/08/2009 Compal Change ODD_DET# PU power rail to +3.3V_RUN X01

Watch dog timer may not be reseted when

HW4140

SMSC11/08/2009

EMC4002 VDD_PWRGD is not completely at Logic

X01Add discharge circuit for +3.3V_M

Low.

23 HW SMSC SMSC review feedback The pull-up source of the R150 should be changed to +VCC_4002 X0141 11/08/2009

per SMSC 5045 AN 19.6, 4002 AN 16.11 R541, R554, R1512 should be 10K. X0139 HW SMSC42 11/08/2009

FAN1_DET# should have 10K PU to +3.3V_M Add R1517 X0123 HW43 11/08/2009 Compal

A A

44 31 HW 11/08/2009 Broadcom

5

Follow Broadcom request

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

Delete T159, R494, R498, R631, R634, R898, C640, C641, C642 C647, C1026,
L73, add R1522, C1887, C1888, change connection for R496, R497 to GND,
change connection for JCS1pin3 and pin4

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

EE P.I.R (2/2)

EE P.I.R (2/2)

EE P.I.R (2/2)

LA-5472P

LA-5472P

LA-5472P

1

X01

A00

A00

60 66Wednesday, January 20, 2010

60 66Wednesday, January 20, 2010

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Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

Item

Item Issue Description

ItemItem

D D

Page# T itle

Page#Page#

Title

TitleTitle

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

2

Solution D escription

Solution Description Rev.

Solution D escriptionSolution D escription

1

Rev.Page#

Rev.Rev.

X0145 8 HW 11/08/2009 DELL Fix the Intel S3 power up timing Change C1880 from 0.01uF to 0.22uF 0402 cap.

46 31 HW 11/08/2009 Broadcom

Follow Broadcom request

Change C646 to 220nF that was placed near
the JSC1 pin 10 (+SC_VCC).And 470nF should

X01

be at C718 near U3 (TDA8034)

Follow Broadcom request47 31 HW X0112/08/2009 Broadcom Change R497 & R496 to 0 ohm, but depop

27 HW Compal RGB EA result C251-C253 to 8.2pF; L61-L63 to 10-Ohm Bead ; De-pop C390,C518,C99648 12/08/2009 X01

12/08/200949 X01

DELL29 HW Change X4 from TXC to SiTimes SIT8102AC3333E12TUse the SiTimes part due to the cost

savings

8 HW Intel Intel review schematic feedback Add R529 and C188950 12/08/2009 X01

33 HW Richo Change pop option for R5U242 Change C21 from 10U to 47U, change R46 to C1889 (1uF)51 12/08/2009 X01

C C

31 HW Broadcom Add R638

BCM5882 pin-C1 "RSTOUT_N" is an open
drain I/O type, we need to have 4.7K

X0112/08/200952

pull-up to 3.3V_ALW

30 36 HW Compal Disconnect IO & DOCK VCT

13/08/200953

Delete R652 & C41,Rename IO VCT to +LOM_VCT_IO & reserve C712 pad
for test.

X01

31 Broadcom review request USB_GPIO27 Should have a 0ohm but de-pop resistor. X01HW Compal13/08/200954

39 SMSC review Change R561 and R1046 from 1M ohm to 100K ohm. X0155 HW 14/08/2009 SMSC

3956 HW SMSC review Remove R587, base on crystal EA result that only need to change

X0114/08/2009 SMSC

caps value.

57 10 HW Follow Intel recommand to add debug TP.14/08/2009 Intel Add T186~T190 X01

58 31 HW 14/08/2009 Compal Smart card EA result

B B

Change R772 to 47 Ohm and C1015 to 10pF for resolving SC_CLK
Rise/Fail timing issue and also change C633 to 10pF.

X01

Avoid a glitch for DDR_HVREF_RST_GATE,

59 31 HW 14/08/2009

DELL

please add a 1.1K 1% no-stuff pull-up to
+1.5V_CPU_VDDQ rail on the PM_DRAM_PWRGD_R

Change C1889 to 0.1u, add R1518 for PM_DRAM_PWRGD_R but depop.

X01

signal for a back-up option

8 45 DELLHW CPU detection since the edge diode has been

14/08/2009

removed from M'09

HW

14/08/2009

DELL61 15 19 36

Invert the EN_ESATA_RPTR signal and connect
this to SATAGP4/GPIO16

Delete T1 and add R1519 for CPU_DETECT# and connect JCPU.AH24
to U36.B18

Add Q211 and R1520 but depop,pop R1513 and de-pop R1514 , change net
name from GPIO16 to EN_ESATA_RPTR#

X0160

X01

34 Compal By EMI request,pop common choke HW

Change Pop otion for express card, pop L64, depop R791 R792.For

14/08/200962

USB2,3 pop L65,L66 and reserve R1524,R1525,R1526 and R1527.

X01

30 Add R1528 for LAN_REQ#By Intel requestIntel14/08/2009HW63 X01

A A

37 Intel

Adding stitching caps near the DOCK_LOM
traces where it crosses over plane splits.

Add C102864 HW 17/08/2009 X01

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

EE P.I.G (3/3)

EE P.I.G (3/3)

EE P.I.G (3/3)

LA-5472P

LA-5472P

LA-5472P

61 66Wednesday, January 20, 2010

61 66Wednesday, January 20, 2010

61 66Wednesday, January 20, 2010

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5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

Item

Item Issue Description

ItemItem

D D

Page# T itle

Page#Page#

Title

TitleTitle

38 HW 8/19/2009 NV Solve DVI issue Add Q213-Q218,R1523,R1530~R1540 X0165

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

2

Solution D escription

Solution Description Rev.

Solution D escriptionSolution D escription

1

Rev.Page#

Rev.Rev.

66

26 8200 pin 8,9 add caps to minimize noise Add C1597 & C1598 X01HW 8/19/2009 Pericom

Reserve crystal for 27M. Add @R1541,@Y7, @C1891, @C189253 NV8/19/2009HW67

X01

24 8/20/2009 Compal Follow Marguax schematic Depop R279,R102768 HW X01

Add R1542~R1544, but depop.Add PU/PD resistor for 8200 back-up planCompal8/20/200953 X01HW69

Compal Add PD resistor for back-drive issue Add R1545~R154770 35 HW 8/24/2009 X01

Compal No need PD/PU resistors at EDP AUX channel 71 24 HW 8/25/2009 Delete R279 & R1027 X01

72 Compal Add by pass caps21 HW 8/25/2009 populate C39 & C610 X01

73 42 HW 8/25/2009 Compal

74 11 HW 8/25/2009 Compal Base on power team FDIM test Change C48,C49,C50,C51,and C52 to 22uF. X01

C C

Un-populate pop option for double
discharge path

Un-populate R612,R607 and R1498 X01

75 30 HW 8/26/2009 Intel Follow Intel WW35 ‘09 Change R808 to C427 10pF and change C475 to 33pF X01

76 53 HW 8/27/2009 Compal

Follow Marguax to populate 27MHz
crystal for PT build.

Populate Y7,C1891,C1892,R1541 and de-pop R631 X01

77 6,53 HW 9/28/2009 Compal Populate 27MHz crystal. Depop R43,R39,R1317, pop R1417 X02

78 17 HW 9/28/2009 Intel Follow Intel DG 1.62 Change R672 to 1K_0402_5%. X02

79 15,18 HW 9/28/2009 Compal Depop XDP circuit component Depop R118,R94 X02

80 53 HW 9/29/2009 NV GPU_JTAG_TRST# should be pull down Pop R1372 and cahnge to 1K 0hm. X02

81 40 HW 10/20/2009 Compal Depop R5 Depop R5 for double pull down X02

82 33 HW 10/20/2009 Compal

B B

Follow DFX recommendation change JSD1
footprint to modify screw hole.

Chnage FOX_2WX131A1-31DD-7F_20P-T to FOX_2WX131A1-31DD-7F_18P. X02

83 36 HW 10/20/2009 Compal Correct USB_MCARD2_DET# PU power rail Chnage power rail from +3.3V_RUN to +3.3V_ALW_PCH X02

84 17 HW 10/20/2009 Compal

Follow schematic check list 2.0, change
resistor value

Chnage R268 from 1K to 10K X02

85 16 HW 10/20/2009 Compal Change R910 value and placement Change R910 form 0 ohm to 22 ohm and place near PCH side. X02

86 37 HW 10/26/2009 Compal Chnage USB common choke by EMI request Change L95 L96 from DLW21SN900SQ2_0805~D to HCMC0805-900MFS_4P~D X02

87 23 HW 10/26/2009 Compal Change OTP temperature change R151 from 953ohm to 1.82Kohm X02

88 53 HW 10/27/2009 Compal To solve 27 Mhz noise issue Connect Y7 pin 2 and 4 to GND. X02

89 31 HW 10/27/2009 Broadcom X02

A A

90 15 HW 10/29/2009 Compal Change flash ROM part number Due to W25X32VSSIG will be EOL, change part number to W25Q32BVSSIG. X02

For 5882-B0 request

L71, L72 68nH, 2%, 400mA; C1070, C1071 1500pF, 2%, 50V; C1886, C1887

150pF, 2%, 50V

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

EE P.I.G (4/4)

EE P.I.G (4/4)

EE P.I.G (4/4)

LA-5472P

LA-5472P

LA-5472P

62 66Wednesday, January 20, 2010

62 66Wednesday, January 20, 2010

62 66Wednesday, January 20, 2010

1

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Page# T itle

Page#Page#

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TitleTitle

91 16 HW 10/29/2009 Dell X02

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

2

Solution D escription

Solution Description Rev.

Solution D escriptionSolution D escription

1

MEM SMBus design needs to change Move Q190 connection, add R1549,R1550, add net name DDR_XDP_CLK/DAT

Rev.Page#

Rev.Rev.

92 29 HW 10/29/2009 Compal

Create a low pass filter with the pole set
at 36kHz to filter out of band noise

De-pop C1066 & C1067, R1090, R1089 ; R340 & R342, R1091 & R1092 change
to 2k, add C1893-C1896 1000pF.

X02

Change BID Change R98 form 130K ohm to 33K ohm.93 40 HW 11/02/2009 Compal X02

94 8,15

To avoid stub for SM bus EA quality XDP is
not use.

Add R1551~R1556 but depopHW 11/02/2009 Compal X02

Support WiMax LED status36 HW DELL Need to populate R84011/02/200995 X02

43 HW Compal To avoid golden finger was scraped on FFC.96 11/05/2009 Change sniffer connector from TYCO_1-1734820-2 to TYCO_1-2041070-2. X02

41 HW Compal Chnage TP SMbus PU power rail.97 11/05/2009 Change power rail from +5V_ALW to +3.3V_ALW X02

31 HW BRCM98 11/05/2009 Delete 2nd ROM for BRCN5882 By BRCM review result ,delete U14. X02

C C

101 15 HW 11/11/2009 X02DELL

2499 HW 11/10/2009 Compal LCD power sequencing issue change R161 from 470 to 100 ohm . X02

11/11/2009HW19100 X02DELL

PCH driving the siganl low at GPIO15
initial.
To change the pin on the EC side to OD
and add a pull-up to PCH’s core well

Add R1557 2.2K PU resistor to +3.3V_ALW_PCH on the SIO_EXT_WAKE#
signal.

Add R1558 10K PU resistor to +3.3V_RUN on the ME_FWP signal.

Y1 & Y4 change from 1TJS125DJ4A420P to Q13MC30610018.Opreating

102 15,40 HW 11/11/2009 Compal X02RTC timing issue

temperature should -40~+85 degree to meet test requirement.

103 19 HW 11/17/2009 Compal X02Chnage GPIO34 of PCH from PD to PU Change from PD to PU +3.3V_RUN

31104 To change R772 from 47 ohm to 22 ohm Compal11/17/2009HW

Follow Marguax schmatic and it also could
pass smart card EA.

X02

105 31 Change L41 and L42 to 100 ohm (R1564 & R1565)HW 11/17/2009 Compal To solve touch pad ESD issue X02

B B

106 15 HW 11/19/2009 Compal Change R2244 to tolerance from 5% to 1%Follow Intel check list rev2.0 X02

107 15 HW 11/19/2009 Compal Depop R123 ,R804~807 and R1281,R1282 R1315.Follow DGU 414044 Rev2.0 X02

108 38 HW 12/22/2009 Compal Simplo battery slice EMI issue Add C1897 and C1898(Depop,reserve for EMI test) A00

109 37 HW 12/22/2009 Compal

DFB issue ,finger printer connector
will easy shift during reflow process.

110 31 HW 12/22/2009 Compal By Broadcom recommend

Change finger printer connector from TYCO_1734242-6_6P-T to
TYCO_2041070-6_6P-T
Change L71,L72 from 68nH to 150nH, C1070,C1071 from 1500pF to
390pF.C1887,C1888 from 150pF to 390pF.

A00

A00

111 32 HW 12/22/2009 Compal Change TCM to T1 version Change TCM from SSX44B-D-T to SSX44-D-T1 A00

Change BID Change R98 form 33K ohm to 1K ohm.CompalHW40112 12/22/2009 A00

A A

HW113 08 12/22/2009

Depop CPU XDP and JTAG circuit for for
production systems
Depop PCH JTAG circuit for for production
systems

Depop C19,C20,R6,R68,R19,R7,R3,
R780~R785,R22,R24,R1153,R1156,R66,R1241,R1257

Depop R123, R804~R807,R1281,R1282,R131512/22/2009

A00Compal

A00Compal114 15 HW

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

EE P.I.G (5/5)

EE P.I.G (5/5)

EE P.I.G (5/5)

LA-5472P

LA-5472P

LA-5472P

63 66Wednesday, January 20, 2010

63 66Wednesday, January 20, 2010

63 66Wednesday, January 20, 2010

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ItemItem

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Page# T itle

Page#Page#

Title

TitleTitle

115 33,34 HW 01/07/2010 Compal A00Change R5U2542 form ES2 to ES3 Change part number from SA00003C21L to SA00003C22L

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

116 27 HW 01/14/2010 Compal RGB EMI issue

117 37 HW 01/15/2010 Compal

118 26 HW 01/19/2010 Pericom

C C

4

Issue DescriptionDate

Issue DescriptionIssue Description

3

Change SATA repeater part to power saving
part
Pericom DP SW DP8200 has new silicon
W version in stead of Y version

2

Solution D escription

Solution Description Rev.

Solution D escriptionSolution D escription

Change L61,L62,L63 from 10nH to 27nH, C251,C252,C253 from

8.2pF to 2pF and pop C390,C518,C996

1

Rev.Page#

Rev.Rev.

A00

Change U95 to SA00003P10L A00

Change U9 to SA00003CD2L A00

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

EE P.I.G (6/6)

EE P.I.G (6/6)

EE P.I.G (6/6)

LA-5472P

LA-5472P

LA-5472P

64 66Wednesday, January 20, 2010

64 66Wednesday, January 20, 2010

64 66Wednesday, January 20, 2010

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5

Version Change List ( P. I. R. List )

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Page# Title

ItemItem

Page#Page#

D D

1

Title

TitleTitle

Selector50 7/20 TI CSS GC logic wrong issue Add PR282 180_ohm to GND X01

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

4

Issue Description

Issue Description

Issue DescriptionIssue Description

3

Solution D escription

Solution D escription Rev.

Solution D escriptionSolution D escription

2

Rev.Page#

Rev.Rev.

1

2

46 1.5V_MEM 7/20

45 +3.3V/+5V 8/17

3

4

50 Selector 8/17 Compal

50 Selector 8/17 TI

5

6

50 Selector 8/17 TI

52 ISL62872_GPU 8/17

7

C C

8

49

+VCORE
MAX17030

8/17 Compal

Compal ADC
Guangyong

Compal ADC
Guangyong

Dell /
intersil

Add droop resistor for TI solution

Change 3V/5V choke for cost down

Add 1M_ohm pull down to fix ACAV_IN_NB
oscillation when battery mode S5

new version CD3301 (PG2.1) don't need PD22
and PR282

DOCK_AC_OFF_EC floating issue

change PU901 to ISL62872 to support NV VID
fixture

change thermistor package from 0603 to 0402
for cost down

Add PR77

change PL5 from SH00000H90L to SH00000FN0L
change PL6 from SH00000HB0L to SH00000HR0L

Add PR283 X01

depop PD22 add PR282, pop PR430

add PR285 X01

change PU901 to ISL62872 from ISL62870 and support circuit.

Change PH3,PH4 and PH5 from SL200000B0L to SL200000W0L

X01

X01

X01

X01

X01

Change PC314 from SE00000868L(22u/0805) to SE00000O00L(100u/1206)

Change PR409 from SD03480618L (8.06k) to SD03460418L (6.04k)

Change PR410 from SD03440218L(4.02k) to SD03430118L(3.01k)

9 47 1.8V_RUN 8/18 MAXIM

Output ripple voltage unstable issue

Change PR408 from SD014402A8L(40.2 Ohm) to SD000008H8L(51 Ohm)

Change PC315 from SE000003W8L(820pF) to SE076333K8L (3300pF)

X01

Change PR411from SD00000268L(6.98K) to SD03445318L(4.53K)

Change PC310 from SE074102K8L(1000P) to SE074472K8L(4700pF)

Change PC309 from SE071330J8L (33pF) to SE071560J8L (56pF)

Change PC311 from SE042104K8L(.1u/0603/25V) to SE076104K8L(.1u/0402/16V)

Add PR413 SD02800008L (0 Ohm)

B B

10 49

+VCORE
MAX17030

8/20 Maxim Vcore FDIM issue

Change PR102, PR103 and PR104 from SD013220B8L(2.2) to SD00000V98L(1.1)

Change PR310, PR311 and PR312 from SD03430118L(3.01k) to SD03424918L(2.49k)

Change PR307, PR308 and PR309 from SD03422118L(2.21k) to SD03417418L(1.74k)

X01

Change PR137 from SD03449910L(4.99k) to SD03447518L(4.75k)

Add PC271,PC272 and PC273 SE075223K8L(0.022uF)

Change PR188 and PR201 from SD03451018L(5.1k) to SD00000U28L (4.3k)
Change PR199 and PR203 from SD03416228L(16.2k) to SD03413728L(13.7k)
Change PR198 from SD03468008L(680 Ohm) to SD03418008L(180 Ohm)
Change PR202 from SD03468008L(680 Ohm) to SD03410008L(100 Ohm)

11 48

A A

47 1.8V_RUN 8/25 DELL

+1.05VM/
+1.05VTT

8/20 ON Fine tune DC accurcay

1.8V transient 0.1A ~ 1.6A
output voltage over spec

Change PC108 and PC116 from SE074331K8L(330p) to SE074471K8L(470p)
Change PR200 from SD00000DM0L(200k) to SD03451028L(51k)
Change PC115 from SE071300J0L(SE071300J0L) to SE071220J8L(22P)
Change PC106 from SE071300J0L(30P) to SE071330J8L(33P)
Change PR204 from SD03447518L(4.75K) to SD03452318L(5.23K)
Change PR205 from SD03444228L(44.2K) to SD03424028L(24K)
Change PR207 from SD00000LZ0L(3.83K) to SD00000J20L(4.32K)
Change PR208 from SD03482518L(8.25k) to SD03464918L(6.49k)

Change PU301 from SA00003B10L(MAX15050) to
SA00003CG0L (ISL8014) and support circuit

X01

X0112

Title

Title

Title

PIR

PIR

PIR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-5472P A00

C

LA-5472P A00

C

LA-5472P A00

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet

1

of

65 66Wednesday, January 20, 2010

65 66Wednesday, January 20, 2010

65 66Wednesday, January 20, 2010

5

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Request

Request

Item

Item Date

ItemItem

Page# Title

Page#Page#

Title

TitleTitle

Date

DateDate

RequestRequest

Owner

Owner

OwnerOwner

4

Issue Description

Issue Description

Issue DescriptionIssue Description

3

Solution D escription

Solution D escription Rev.

Solution D escriptionSolution D escription

2

Rev.Page#

Rev.Rev.

1

D D

C C

B B

49 Vcore 8/25 MAXIM Improve DC accuracy

14 X01

49 Vcore 8/25 MAXIM

51 Charger 8/2515

Compal ADC
Guangyong

16 44 DCIN 8/25 Compal

17 49 Vcore 8/27 Compal

18 52 GPU_Core 9/01 Intersil

19 49 Vcore 9/01 MAXIM

20 49 Vcore 9/01 MAXIM

22 44

GPU_Core Depop PR910 and POP PR927

DC_IN 10/13 TI

NV10/065221

23 49 Vcore 10/20 MAXIM

24 48 +1.05VTT 10/28 INTEL

25 49 +VCORE 11/03 Compal

26 52 GPU_Core 11/12 Compal

27 48

+1.05VTT/
+1.05VM

11/16 ON Bost diode over stress

28 51 Charger 01/12 Compal

Vender recommend PSI# pull down 10k Change PR334 from SD03410018L (1k) to SD02810028L(10k)

Improve charger choke saturation current
at 100 degree C

3.3V_ALW2 black driver issue
with RTC battery only

Reseve resistor pad for debug

PR916 and PR911 for debug change to O Ohm

Fine tune Imon time constant meet
Intel SPEC 300uS~500uS

Make sure DPRSLPVE low level under 0.33V Change PR109 from SD03449908L (499 Ohm) to SD02800008L (0 Ohm)

GPU_CORE defult setting should be 1V for
faster to boot to system and short warm
up time for GPU

High inrush current on DC_IN
when AC adapter plug in

3 phase overlap issue with
2nd source MOSFET

Fine tune H_VTTPWRGD voltage level meet
Vih(min) = 0.75 * Vtt

change thermistor package from 0603 to 0402
for cost down

For NVIDIA output voltage +/- 30mV criteria Change PC918 from SGA19331D1L (330u/9m Ohm) to SGA0000420L (470u/4.5m Ohm)

Reduce Pin33,34 and 35 of the CD3301
surge current

Change exposed pad to PGND from AGND

Change PL14 from SH04856AM8L (5.6u) to SH00000I60L (5.6u)

Change PD1 from SC100000Q0L(BAT54CW) to SCSB715F08L (RB715F)

Change PR916 from SD02810018L(1K) to SD02800008L(0 Ohm)

Change PR911 from SD02810018L(1K) to SD02800008L(0 Ohm)

Change PC270 from SE075223K8L (0.022U) to SE076333K8L (.033U)

Change PR20 from SD02800008L(0 Ohm) to SD02810028L(10k)

Add PC198, PC199, PC255, PC256, PC259 and PC260 SE074122K8L (1200pF)

Change PR94 from SD03410028L (10k) to SD03427418L (2.74K)
Change PR93 from SD03428728L (28.7k) to SD03493118L (9.31K)

Change PH1 from SL20000068L (100K 0603) to SL20000160L (100K 0402)

Change PD19 and PD27 from SC1B751V08L(RB751V) to SCS00003M0L(BAT54HT1)

Change PC351 from SE00000130L (1u/0805) to SE043104M8L (0.1u/0805)
Change PR404 from SD02800008L (0 Ohm) to SD028100B8L (1 Ohm)

X0113

X01

X01

X01Add PR122 and PR123

X01

X01

X01

X02

X02

X02

X02

X02

X02

X02

A00

A A

Title

Title

Title

PIR

PIR

PIR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-5472P A00

C

LA-5472P A00

C

LA-5472P A00

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet

1

of

66 66Wednesday, January 20, 2010

66 66Wednesday, January 20, 2010

66 66Wednesday, January 20, 2010