Compal LA-5381P NSKAE Bradford 10AT, Satellite A500 Schematic

A

1 1

B

C

D

E

Compal confidential

2 2

Bradford 10AT

NSKAE LA-5381P REV 0.2 Schematics Document

Mobile AMD SIG3/RS880M&RS880MC/SB710

2009-04-10 Rev. 0.2

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-5381P

146Friday, Apri l 10, 2009

of

E

of

0.2

A

B

C

D

E

Compal Confidential

Model Name : NSKAE File Name : LA-5381P

1 1

Fan Control

page 4

AMD S1G3 CPU

uFCPGA-638 Package

page 4,5,6,7

Hyper Transport Link 2.6GHz

16X16

Display Port

page 16

CRT

page 16

LCD Conn.

page 17

ATI

RS880M

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 667/800MHZ

NEW Card USB Port 11

PCIeMini Card

PCIe 4x

1.5V 2.5GHz(250MB/s)

WLAN (Slot 1) USB Port 8

ADM1032ARMZ

200pin DDRII-SO-DIMM X2

PCIe port 0

page 25

PCIe Port 2

page 27

page 6

BANK 0, 1, 2, 3

PCIe port 1

Thermal Sensor

Clock Generator

SLG8SP626

JMB380

5IN1

page 31

page 8,9

page 15

5IN1

page 31

1394

page 31

RS880MC

EC SMBUS

2 2

HDMI CEC Controller

R5F211A4SP

page 18

HDMI Conn.

page 18

page 10,11,12,13,14

A-Link Express II 4X PCI-E

ATI

FM Tuner/B LS-430GP

3 3

Touch Pad BTN/B LS-5003P

page 26

page 34

Light Pipe/B LS-4991P

Right USB/B LS-5006P

RTC CKT.

page 19

Power On/Off CKT.

page 34

DC/DC Interface CKT.

4 4

page 35

Finger Printer/B LS-5004P

Power/B LS-4992P

Cap Sensor/B LS-4993P

page 34

page 26

page 34

FM tuner Conn

page 26

I2C from SB

Debug Port

page 33

Int.KBD

page 33

LPC BUS

3.3V 33 MHz

SB710

page 20,21,22,23,24

ENE KB926 D3

page 32

SPI ROM

page 33

HD Audio

CIR

page 32

USB

5V 480MHz

SATA port 1

5V 1.5GHz(150MB/s)

SATA port 0

5V 1.5GHz(150MB/s)

SATA port 3

5V 1.5GHz(150MB/s)

SATA port 2

5V 1.5GHz(150MB/s)

USB port 2

5V 480MHz

3.3V 24.576MHz/48Mhz

MDC 1.5 Conn

GSENSOR

page 33

SATA HDD0

SSD

SATA ODD

page 24

eSATA

page 24

page 26 page 29

MIC CONN

RTL8111D/8103E LAN 1G/10/100M

PCIe port 3

PCIeMini Card GPS/TV Tuner (Slot2)

USB Port 10 USB Port 5

HDA Codec

ALC272

Int.

page 30

page 28

PCIeMini Card WUSB (Slot 3)

PCIe Port 5

page 27

USB/B Right

USB port 0,1

page 26

BT conn

USB port 6

page 26

Touch Screen conn

USB port 13

page 26

USB/B Left

USB port 4

page 24

Felica

USB port 3

page 26

AMP.

MIC CONN

page 30 page 30

HP CONN

page 30

TPA6017

LED/B

Power Circuit DC/DC

page 36,37,38,39 40,41,42,43

A

LS-4994P Left USB/B

LS-4995P

page 34

page 24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

LA-5381P

E

RJ45

page 28

BCAS

page 25

FP conn

USB port 7

Int. Camera

USB port 9

SPK CONN

page 30

246Friday, Apri l 10, 2009

PCIe Port 4

page 28

page 26

of

0.2

A

B

C

D

E

Voltage Rails

1 1

State

S0

2 2

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

SB SM Bus1 Address

Power

3 3

+3VS +3VS +3VS +3VS New Card

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 Clock Generator

EC SM Bus1 Address

Device Address Address

+5VL +5VL

4 4

+3VL Cap. Sensor

HDMI-CEC 34 H 0011 010X b

O MEANS ON X MEANS OFF

power plane

B+

+3VL

+5VL

+RTCVCC

O

X

+3VALW

+1.2VALW

+3V_LAN

O

X

XX X

+1.8V+5VALW

+0.9V

SB SM Bus2 Address

HEX

A0 H

D2 H

Address

1010 0000 b 1010 0100 bA4 H 1101 0010 b

+3VALW

+3VS Virtual I2C

DevicePower

WLAN/WIMAX

DevicePower

FM Tuner

EC SM Bus2 Address

HEX HEX

16 H

0001 011X bSmart Battery

HEXDevice AddressPower

Virtual I2C

A

PowerPower

+3VS +3VS +3VS +3VS Light Sensor

Device

VGA_ADM1032-2 G-Sensor

+5VS

+3VS

+2.5VS

+1.8VS

+1.5VS

+1.1VS

+VGA_CORE

+1.2V_HT

+VDDNB

+CPU_CORE_0

+CPU_CORE_1

OO

O

X

XX

X

98 H 9A H

B

X

HEX Address

1001 100X bCPU_ADM1032-1 1001 101X b

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build

Item CPU SBNB VGA

S1G3 NA SB710

S1G3

RS880MC

BTO Option Table

Function

description

explain

BTO

Function

description

explain

BTO

Function

description

explain

BTO

SMBUS Control Table

SOURCE

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

I2C_CLK

I2C_DATA

DDC_CLK0

DDC_DATA0

DDC_CLK1

DDC_DATA1

SCL0

SDA0

SCL1

SDA1

SCL2

SDA2

SCL3

SDA3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KB926

RS780M

SB700

C

New Card

2008/04/14 2009/04/14

HDMI

HDMI@ H@

MINI PCI-E SLOT

3G B-CAS WIMAX

3G@ TV@ WIMAX@

HDD PROTECT

GSENSOR@

BATT

X

V

X X X

X X

X

V

X X X

X XXX XXXXXX XXXXX

Compal Secret Data

DIPLAY PORT

CEC

DP@

Modem

RJ11@

THERMAL SENSOR

CEC

CPU &

V

XXX

V

Side PortDIPLAY PORTHDMI No Side Port

SIDE@

LAN

10/100M Giga

8103EL@ 8111DL@

FM TUNERG-SENSOR

FM TUNER

FM@

SODIMM

I / IIADM1032

XX

Fingerprint

CLK

X X

XXXX

VV

XX

X

XX

Deciphered Date

D

Samsung Hynix

SAMSIDE@ HYNSIDE@

FP@

3G/TV

X XXXXX XXX

XX

V

X X

NA SB710RS880M

Side Port

Memory

NOSIDE@

Felica BLUETOOTH

BLUE TOOTHFELICA

FEL@

LCD

XX X

V

XXX XXXX XXX

SSD

SSD@

HDMI

X X X

V

CIR

CIR@

BT@

Display Port

X X X X

V

X X X X

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-5381P

E

CRT

CRT@

G-Sensor

X

V

X X X X X X X

346Friday, Apri l 10, 2009

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B

C

D

E

+1.2V_HT

EN_DFAN1<32>

250 mil

1

C1

C1 10U_0805_10V6K

10U_0805_10V6K

2

1

2

+FAN1

C2

C2 10U_0805_10V6K

10U_0805_10V6K

+5VS

1A

1

C192

C192 10U_0805_10V6K

10U_0805_10V6K

2

1

C3

0.22U_0603_16V4Z

2

1

C4

0.22U_0603_16V4Z

2

1

C5

C5 180P_0402_50V8J

180P_0402_50V8J

2

Near CPU Socket

FAN Control Circuit

12

@

1SS355_SOD323-2

2

D1

10U_0805_10V6K

U6

1

EN

GND

2

VIN

GND

3

VOUT

GND

4

VSET

GND

APL5607KI-TRG_SO8

C183

8 7 6 5

1

D1

12

2

@

D2

1

1SS355_SOD323-2

+FAN1

C9

C9 1000P_0402_50V7K

1000P_0402_50V7K

@

1

C6

C6 180P_0402_50V8J

180P_0402_50V8J

2

C8

@ C8

@

0.01U_0402_25V7K

1

JFAN

@

1

2

3

4

GND

5

GND

ACES_85204-0300N

R12

12

10K_0402_5%

FAN_SPEED1 <32>

+3VS

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

+VLDT_B

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7 H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0 H_CLKON0 H_CLKOP1 H_CLKON1

H_CTLOP0H_CTLIP0 H_CTLON0 H_CTLOP1 H_CTLON1H_CTLIN1

H_CADOP[0..15] H_CADON[0..15]

1 2

H_CADOP[0..15] <10> H_CADON[0..15] <10>H_CADIN[0..15]<10>

C7

C7 10U_0805_10V6K

10U_0805_10V6K

H_CLKOP0 <10> H_CLKON0 <10> H_CLKOP1 <10> H_CLKON1 <10>

H_CTLOP0 <10> H_CTLON0 <10>H_CTLIN0<10>

H_CTLON1 <10>

H_CADIP[0..15]<10>

2 2

3 3

H_CLKIP0<10> H_CLKIN0<10> H_CLKIP1<10> H_CLKIN1<10>

H_CTLIP0<10> H_CTLIP1<10> H_CTLOP1 <10>

H_CTLIN1<10>

H_CADIP[0..15] H_CADIN[0..15]

VLDT=500mA

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP0 H_CLKIN0 H_CLKIP1 H_CLKIN1

H_CTLIN0 H_CTLIP1

+1.2V_HT

D1 D2 D3 D4

E3 E2 E1

F1 G3 G2 G1

H1

J1

K1

L3 L2 L1

M1

N3

N2

E5

F5

F3

F4 G5

H5

H3

H4

K3

K4

L5 M5 M3 M4

N5 P5

J3

J2

J5

K5 N1

P1 P3 P4

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

6090022100G_B

JCPUA

HT LINK

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMD CPU S1G2 HT I/F

LA-5381P

446Friday, Apri l 10, 2009

of

E

of

0.2

A

B

C

D

E

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

AD10 AF10

AE10

AA16

D10 C10 B10

H16 T19

V22 U21 V19

T20 U19 U20 V20

N19 N20 E16 F16 Y16

P19 P20

N21 M20 N22 M19 M22

M24

K22 R21

K20 V24 K24 K19

R20 R23

R19 T22 T24

J22 J20

L20 L21

L19

L22

J21

JCPUB

VTT1 VTT2 VTT3 VTT4

MEMZP MEMZN

RSVD_M1 MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CLK_H2 MA_CLK_L2 MA_CLK_H3 MA_CLK_L3

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

DDR_A_CLK0

DDR_A_CLK#0 DDR_A_CLK1

DDR_A_CLK#1

DDR_B_CLK0

DDR_B_CLK#0 DDR_B_CLK1

DDR_B_CLK#1

MEM:CMD/CTRL/CLK

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H0

MB_CLK_L0

MB_CLK_H1

MB_CLK_L1

MB_CLK_H2

MB_CLK_L2

MB_CLK_H3

MB_CLK_L3

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

1

C10

1.5P_0402_50V9C

2

1

C11

1.5P_0402_50V9C

2

1

C14

1.5P_0402_50V9C

2

1

C15

1.5P_0402_50V9C

2

VTT5 VTT6 VTT7 VTT8 VTT9

@

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

+0.9V+0.9V

+MCH_REF

DDR_B_ODT0 DDR_B_ODT1

DDR_CS1_DIMMB#

DDR_CKE0_DIMMB DDR_CKE1_DIMMB

DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_CLK#1DDR_A_CLK#1

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

T1PAD T1PAD

T3PAD T3PAD

DDR_B_ODT0 <8> DDR_B_ODT1 <8>

DDR_CS1_DIMMB# <8>

DDR_CKE0_DIMMB <8> DDR_CKE1_DIMMB <8>

DDR_B_CLK0 <8> DDR_B_CLK#0 <8> DDR_B_CLK1 <8> DDR_B_CLK#1 <8>

DDR_B_BS#0 <8> DDR_B_BS#1 <8> DDR_B_BS#2 <8>

DDR_B_RAS# <8> DDR_B_CAS# <8> DDR_B_WE# <8>

1 1

2 2

R1

1K_0402_1%

R2

1K_0402_1%

+1.8V

1 2

+MCH_REF

1

C12

2

1

C13

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1000P_0402_50V7K

1000P_0402_50V7K

Place them close to CPU within 1"

R4 39.2_0402_1%R4 39.2_0402_1%

1 2

+1.8V

DDR_A_ODT0<9> DDR_A_ODT1<9>

DDR_CS0_DIMMA#<9> DDR_CS1_DIMMA#<9> DDR_CS0_DIMMB# <8>

DDR_CKE0_DIMMA<9> DDR_CKE1_DIMMA<9>

DDR_A_CLK0<9>

DDR_A_CLK#0<9>

DDR_A_CLK1<9>

DDR_A_CLK#1<9>

3 3

DDR_A_MA[15..0]<9> DDR_B_MA[15..0] <8>

DDR_A_BS#0<9> DDR_A_BS#1<9> DDR_A_BS#2<9>

DDR_A_RAS#<9> DDR_A_CAS#<9> DDR_A_WE#<9>

1 2

R3 39.2_0402_1%R3 39.2_0402_1%

MEM_P MEM_N VTT_SENSE

T2 PADT2 PAD

DDR_A_ODT0 DDR_A_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB#

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_B_D[63..0]<8>

DDR_B_DM[7..0]<8> DDR_A_DM[7..0] <9>

DDR_B_DQS0<8> DDR_B_DQS#0<8> DDR_B_DQS1<8> DDR_B_DQS#1<8> DDR_B_DQS2<8> DDR_B_DQS#2<8> DDR_B_DQS3<8> DDR_B_DQS#3<8> DDR_B_DQS4<8> DDR_B_DQS#4<8> DDR_B_DQS5<8> DDR_B_DQS#5<8> DDR_B_DQS6<8> DDR_B_DQS#6<8> DDR_B_DQS7<8> DDR_B_DQS#7<8>

Processor DDR2 Memory Interface

JCPUC

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

JCPUC

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23

G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

Y11 AE14 AF14 AF11 AD11

A12

B16

A22

E25 AB26 AE22 AC16 AD12

C12

B12

D16

C16

A24

A23

F26

E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

6090022100G_B @

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0

MA_DQS_L0

MA_DQS_H1

MA_DQS_L1

MA_DQS_H2

MA_DQS_L2

MA_DQS_H3

MA_DQS_L3

MA_DQS_H4

MA_DQS_L4

MA_DQS_H5

MA_DQS_L5

MA_DQS_H6

MA_DQS_L6

MA_DQS_H7

MA_DQS_L7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24 AC24 Y19 AB16 Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_D[63..0] <9>

DDR_A_DQS0 <9> DDR_A_DQS#0 <9> DDR_A_DQS1 <9> DDR_A_DQS#1 <9> DDR_A_DQS2 <9> DDR_A_DQS#2 <9> DDR_A_DQS3 <9> DDR_A_DQS#3 <9> DDR_A_DQS4 <9> DDR_A_DQS#4 <9> DDR_A_DQS5 <9> DDR_A_DQS#5 <9> DDR_A_DQS6 <9> DDR_A_DQS#6 <9> DDR_A_DQS7 <9> DDR_A_DQS#7 <9>

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMD CPU S1G2 DDRII I/F

LA-5381P

546Friday, Apri l 10, 2009

of

E

of

0.2

A

B

C

D

E

L1

+2.5VS

C16

@

100U_B2_6.3VM_R45M

1 1

CLK_CPU_BCLK<15>

CLK_CPU_BCLK#<15>

+1.8VS

R15

R15 300_0402_5%

300_0402_5%

1 2

LDT_RST#<19> CPU_VDDNB_RUN_FB_H <43>

2 2

H_PWRGD<19,43>

LDT_STOP#<11,19>

3 3

LDT_RST#

1

C22

0.01U_0402_25V7K

@

2

+1.8VS

R21

R21 300_0402_5%

300_0402_5%

1 2

H_PWRGD

1

C23

0.1U_0402_16V7K

2

+1.8VS

R36

R36 300_0402_5%

300_0402_5%

1 2

LDT_STOP#

1

C25

0.01U_0402_25V7K

2

@

Place close to CPU wihtin 1.5"

+CPU_CORE_0

+CPU_CORE_1

@

1 2

C20

1 2

C21 3900P_0402_50V7KC21 3900P_0402_50V7K

R487 10_0402_5%R487 10_0402_5%

1 2 1 2

R486 10_0402_5%R486 10_0402_5%

Close to CPU

R489 10_0402_5%@R489 10_0402_5%@

1 2 1 2

R488 10_0402_5%@R488 10_0402_5%@

Un-Mount R27 For Caspian

CPU_LDT_REQ#_R

L1

1 2

FBM_L11_201209_300L_0805

1

+

2

3900P_0402_50V7K

12

R8

R8 169_0402_1%

169_0402_1%

CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L

CPU_VDD1_RUN_FB_H CPU_VDD1_RUN_FB_L

R27

1 2

0_0402_5%

@

Thermal Sensor

+3VS

1

C26

2

0.1U_0402_16V4Z

C27

4 4

1 2

THERMDA_CPU THERMDC_CPU

2200P_0402_50V7K

U2

1

VDD

2

D+

3

DTHERM#4GND

ADM1032ARM-1 ZREEL_MSOP8

SCLK

SDATA

ALERT#

8 7 6 5

+2.5VDDA

3300P_0402_50V7K

1

C174.7U_0805_10V4Z C174.7U_0805_10V4Z

2

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

R13 44.2_0402_1%R13 44.2_0402_1% R14 44.2_0402_1%R14 44.2_0402_1%

+1.2V_HT

CPU_VDD0_RUN_FB_H<43> CPU_VDD0_RUN_FB_L<43>

CPU_VDD1_RUN_FB_H<43> CPU_VDD1_RUN_FB_L<43>

+1.8VS

R30

R30 300_0402_5%

300_0402_5%

1 2

1

C24

0.01U_0402_25V7K

@

2

EC_SMB_CK2 <32,33,34> EC_SMB_DA2 <32,33,34>

1

C18

2

1 2 1 2

CPU_LDT_REQ# <11,19>

C19

0.22U_0603_16V4Z

1 2

VDDA=300mA

LDT_RST# H_PWRGD LDT_STOP# CPU_LDT_REQ#_R

CPU_HTREF0 CPU_HTREF1

CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L

CPU_VDD1_RUN_FB_H CPU_VDD1_RUN_FB_L

T9 PADT9 PAD T10 PADT10 PAD T11 PADT11 PAD T12 PADT12 PAD T19 PADT19 PAD

CPU_TEST23_TSTUPD

T29 PADT29 PAD T30 PADT30 PAD

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1

T31 PADT31 PAD T25 PADT25 PAD T26 PADT26 PAD

R25

0_0402_5%

R493

1 2

510_0402_5%

R497

1 2

510_0402_5%

JCPUD

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

6090022100G_B @

KEY1 KEY2

SVC SVD

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

Add R497 and R498 at PVT

CPU_TEST25_H_BYPASSCLK_H

@R497

@

CPU_TEST25_L_BYPASSCLK_L

M11 W18

CPU_SVC

A6

CPU_SVD

A4

CPU_THERMTRIP#_R

AF6

CPU_PROCHOT#_1.8

AC7 AA8

W7 W8

W9 Y9

H6 G6

E10 AE9

J7 H8

D7 E7 F7 C7

C3 K8

C4

C9 C8

H18 H19 AA7 D5 C5

1 2

510_0402_5%

510_0402_5% R492

R492

1 2

510_0402_5%

R42 300_0402_5%@ R42 300_0402_5%@

THERMDC_CPU THERMDA_CPU

CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L

CPU_DBREQ#

CPU_TEST28_H_PLLCHRZ_P CPU_TEST28_L_PLLCHRZ_N

CPU_TEST17_BP3 CPU_TEST16_BP2

CPU_TEST10_ANALOGOUT

Add R32 at PVT

CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N

+1.8V

R498

@R498

@

CPU_SVC <43> CPU_SVD <43>

12

T22PAD T22PAD T21PAD T21PAD

T20PAD T20PAD

T27PAD T27PAD T28PAD T28PAD

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

+1.8V

CPU_VDDNB_RUN_FB_L <43>

T7PAD T7PAD T8PAD T8PAD

R32

300_0402_5%

@

CPU_DBREQ#

1 2

R10 10K_0402_5%R10 10K_0402_5%

1 2

R5 300_0402_5%R5 300_0402_5%

CPU_THERMTRIP#_R

1 2

+1.8V

R9 300_0402_5%R9 300_0402_5%

CPU_PROCHOT#_1.8

route as differential

T5PAD T5PAD

as short as possible

T6PAD T6PAD

testpoint under package

12

+1.2V_HT

T13PAD T13PAD T14PAD T14PAD

+1.8V

R39220_0402_5%@ R39220_0402_5%@

R38220_0402_5%@ R38220_0402_5%@

R37220_0402_5%@ R37220_0402_5%@

R40220_0402_5%@ R40220_0402_5%@

12

B

2

E

3 1

C

MMBT3904_NL_SOT23-3

R11

@R11

@

1 2

0_0402_5%

CPU_SVC CPU_SVD

CPU_TEST21_SCANEN CPU_TEST24_SCANCLK1 CPU_TEST20_SCANCLK2 CPU_TEST23_TSTUPD

R41300_0402_5% R41300_0402_5%

HDT Connector

12

@

R494 0_0402_5%

1 2

T23 PADT23 PAD

T24 PADT24 PAD

D12 CH751H-40PT_SOD323-2D12 CH751H-40PT_SOD323-2

D16 CH751H-40PT_SOD323-2D16 CH751H-40PT_SOD323-2

Q3

CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L

JP3 @

1 3 5 7 9 11 13 15 17 19 21

SAMTEC_ASP-68200-07

21

R484 10_0402_5%R484 10_0402_5%

1 2 1 2

R485 10_0402_5%R485 10_0402_5%

Close to CPU

R22 1K_0402_5%R22 1K_0402_5%

1 2

R23 1K_0402_5%R23 1K_0402_5%

1 2

R26 300_0402_5%R26 300_0402_5%

1 2

R28 300_0402_5%R28 300_0402_5%

12

R31 300_0402_5%R31 300_0402_5%

1 2

R29 300_0402_5%R29 300_0402_5%

12

2 4 6

8 10 12 14 16 18 20 22 2423 26

LDT_RST#

ENTRIP2 <37,39>

H_THERMTRIP# <20>

H_PROCHOT# <19>

+VDDNB

+1.8VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMD CPU S1G2 CTRL

LA-5381P

646Friday, Apri l 10, 2009

of

E

of

0.2

A

VDD(+CPU_CORE) decoupling.

+CPU_CORE_0

1

+

C30

1 1

C30 330U_X_2VM_R6M

330U_X_2VM_R6M

2

1

+

C28

C28 330U_X_2VM_R6M

330U_X_2VM_R6M

2

Near CPU Socket

+CPU_CORE_0

C42

C42 180P_0402_50V8J

180P_0402_50V8J

1

C35

C35 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

1

C32

C32 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE_0

1

C40

0.22U_0603_16V4Z

2

2 2

1

C33

C33 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C41

0.01U_0402_25V7K

2

1

C34

C34 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

VDDIO decoupling.

+1.8V

1

C46

C46 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C47

C47 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C48

0.22U_0603_16V4Z

2

Under CPU Socket

1

C49

0.22U_0603_16V4Z

2

B

+CPU_CORE_1

1

C36

C36 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C50

180P_0402_50V8J

2

1

+

C31

C31 330U_X_2VM_R6M

330U_X_2VM_R6M

2

+CPU_CORE_1

1

C51

C51 180P_0402_50V8J

180P_0402_50V8J

2

1

C37

C37 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C43

0.22U_0603_16V4Z

2

C

JCPUE

G4 H2

J9 J11 J13 J15

K6 K10 K12 K14

L4 L7

L9 L11 L13 L15

M2 M6 M8

M10

N7 N9

N11

K16

M16

P16 T16 V16

H25

J17 K18 K21 K23 K25 L17

M18 M21 M23 M25 N17

6090022100G_B

Athlon 64 S1 Processor Socket

@

JCPUE

VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

1

+

C29

C29 330U_X_2VM_R6M

330U_X_2VM_R6M

2

1

C38

C38 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C44

0.01U_0402_25V7K

2

1

C39

C39 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C45

C45 180P_0402_50V8J

180P_0402_50V8J

2

+CPU_CORE_0

+VDDNB

+1.8V

+CPU_CORE_NB decoupling.

+VDDNB

1

C52

C52 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C53

C53 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C54

C54 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

D

JCPUF

AA4

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

+CPU_CORE_1

+1.8V

AA11 AA13 AA15 AA17 AA19

AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

AB2 AB7 AB9

AD6 AD8

B11 B13 B15 B17 B19 B21 B23 B25

D11 D13 D15 D17 D19 D21 D23 D25

H21 H23

B4 B6 B8 B9

D6 D8 D9

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7 H9

J4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

6090022100G_B

Athlon 64 S1 Processor Socket

@

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

E

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

3 3

4 4

+1.8V

1

C55

0.22U_0603_16V4Z

2

+1.8V +1.8V

1

C60

0.01U_0402_25V7K

2

+1.8V

1

C74

4.7U_0805_10V4Z

2

1

C56

0.22U_0603_16V4Z

2

1

C61

0.01U_0402_25V7K

2

1

C75

4.7U_0805_10V4Z

2

1

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

1

2

C57

0.22U_0603_16V4Z

1

C62

C62 180P_0402_50V8J

180P_0402_50V8J

2

C76

4.7U_0805_10V4Z

1

C58

0.22U_0603_16V4Z

2

1

C63

C63 180P_0402_50V8J

180P_0402_50V8J

2

1

C77

4.7U_0805_10V4Z

2

1

C64

C64 180P_0402_50V8J

180P_0402_50V8J

2

1

+

C78

C78 220U_B2_4VM_R45M

220U_B2_4VM_R45M

@

2

1

C65

C65 180P_0402_50V8J

180P_0402_50V8J

2

VTT decoupling.

+0.9V

1

C66

4.7U_0805_10V4Z

2

+0.9V

1

C79

4.7U_0805_10V4Z

2

1

C67

4.7U_0805_10V4Z

2

1

C80

4.7U_0805_10V4Z

2

1

C68

0.22U_0603_16V4Z

2

1

C81

0.22U_0603_16V4Z

2

+0.9V

1

+

C59

C59 220U_B2_4VM_R45M

220U_B2_4VM_R45M

2

1

C69

0.22U_0603_16V4Z

2

1

C70

C70 1000P_0402_50V7K

1000P_0402_50V7K

2

Near CPU Socket Right side

1

C82

0.22U_0603_16V4Z

2

1

C83

C83 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C71

C71 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C84

C84 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C72

C72 180P_0402_50V8J

180P_0402_50V8J

2

1

C85

C85 180P_0402_50V8J

180P_0402_50V8J

2

1

C73

C73 180P_0402_50V8J

180P_0402_50V8J

2

1

C86

C86 180P_0402_50V8J

180P_0402_50V8J

2

Near CPU Socket Left side

Security Classification

Between CPU Socket and DIMM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

AMD CPU S1G2 PWR & GND

LA-5381P

746Friday, April 10, 2009

of

E

of

0.2

A

B

C

D

E

+1.8V

+V_DDR_MCH_REF<9>

1

1 1

2 2

3 3

4 4

2

DDR_CKE0_DIMMB<5>

DDR_B_BS#2<5>

DDR_B_BS#0<5> DDR_B_WE#<5>

DDR_B_CAS#<5> DDR_CS1_DIMMB#<5>

DDR_B_ODT1<5>

SMB_CK_DAT0<9,15,20,25> SMB_CK_CLK0<9,15,20,25>

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

C104

DDR_B_D2 DDR_B_D3

DDR_B_D8

1000P_0402_50V7K

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_CS1_DIMMB#

DDR_B_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D47 DDR_B_D48

DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7 DDR_B_D58

DDR_B_D59 SMB_CK_DAT0

SMB_CK_CLK0

+3VS

0.1U_0402_16V4Z

C119

1

2

JDDRH

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692B-A0G16-P@

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1

RAS#

S0#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

SA1

NC

A11

A7 A6

A4 A2 A0

NC

+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_B_D4 DDR_B_D5

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D13 DDR_B_DM1 DDR_B_CLK0

DDR_B_CLK#0 DDR_B_D14

DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31 DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6DDR_B_MA8

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_ODT0 DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D52

DDR_B_CLK1 DDR_B_CLK#1

DDR_B_DM6 DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

+3VS

DDR_B_CLK0 <5> DDR_B_CLK#0 <5>

DDR_CKE1_DIMMB <5>

DDR_B_BS#1 <5> DDR_B_RAS# <5> DDR_CS0_DIMMB# <5>

DDR_B_ODT0 <5>

DDR_B_CLK1 <5> DDR_B_CLK#1 <5>

DDR_B_D[0..63]

DDR_B_DM[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

DDR_B_DQS#[0..7]

DDR_B_D[0..63] <5>

DDR_B_DM[0..7] <5>

DDR_B_DQS[0..7] <5>

DDR_B_MA[0..15] <5>

DDR_B_DQS#[0..7] <5>

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 DDR_B_RAS#

DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6

DDR_B_MA15 DDR_CKE0_DIMMB DDR_B_BS#2 DDR_CKE1_DIMMB

DDR_B_MA3 DDR_B_MA8 DDR_B_MA12 DDR_B_MA9

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA5

DDR_B_ODT1 DDR_CS1_DIMMB# DDR_B_CAS# DDR_B_WE#

DDR_B_BS#1 DDR_CS0_DIMMB# DDR_B_MA13 DDR_B_ODT0

RP8

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP9

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP10

47_0804_8P4R_5%

RP11

47_0804_8P4R_5%

RP12

47_0804_8P4R_5%

RP13

47_0804_8P4R_5%

RP14

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

+0.9V

C105 0.1U_0402_16V4ZC105 0.1U_0402_16V4Z

1 2

C106 0.1U_0402_16V4ZC106 0.1U_0402_16V4Z

C108 0.1U_0402_16V4ZC108 0.1U_0402_16V4Z

1 2

C107 0.1U_0402_16V4ZC107 0.1U_0402_16V4Z

18

C109 0.1U_0402_16V4ZC109 0.1U_0402_16V4Z

27 36

1 2

C110 0.1U_0402_16V4ZC110 0.1U_0402_16V4Z

45

18

C111 0.1U_0402_16V4ZC111 0.1U_0402_16V4Z

27

1 2

36

C112 0.1U_0402_16V4ZC112 0.1U_0402_16V4Z

45

18

C114 0.1U_0402_16V4ZC114 0.1U_0402_16V4Z

27

1 2

36

C113 0.1U_0402_16V4ZC113 0.1U_0402_16V4Z

45

18

C116 0.1U_0402_16V4ZC116 0.1U_0402_16V4Z

27 36

1 2

C115 0.1U_0402_16V4ZC115 0.1U_0402_16V4Z

45

C118 0.1U_0402_16V4ZC118 0.1U_0402_16V4Z

1 2

C117 0.1U_0402_16V4ZC117 0.1U_0402_16V4Z

+1.8V

12

DIMM0 STD H:9.2mm (Bot)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DDRII SO-DIMM 0

LA-5381P

846Friday, April 10, 2009

of

E

of

0.2

A

B

C

D

E

JDDRL

+V_DDR_MCH_REF

DDR_A_D0 DDR_A_D1

1 1

2 2

DDR_CKE0_DIMMA<5>

DDR_A_BS#2<5>

DDR_A_BS#0<5> DDR_A_WE#<5>

DDR_A_CAS#<5> DDR_CS1_DIMMA#<5>

DDR_A_ODT1<5>

3 3

SMB_CK_DAT0<8,15,20,25> SMB_CK_CLK0<8,15,20,25>

4 4

+3VS

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D20 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_MA0

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_CS1_DIMMA#

DDR_A_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D34

DDR_A_D35 DDR_A_D40

DDR_A_D41 DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59 SMB_CK_DAT0

SMB_CK_CLK0

1

C103

0.1U_0402_16V4Z

2

JDDRL

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

PTI_A5652D-A0G16-P@

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1 RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

SA1

NC

A11

A7 A6

A4 A2 A0

S0#

NC

+1.8V+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_A_D4 DDR_A_D5

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D12

DDR_A_D13 DDR_A_DM1 DDR_A_CLK0

DDR_A_CLK#0 DDR_A_D14

DDR_A_D15

DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_ODT0 DDR_A_MA13

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_CLK1

DDR_A_CLK#1 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

DDR_A_D[0..63]

DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_CLK0 <5> DDR_A_CLK#0 <5>

+V_DDR_MCH_REF

1

C95

2

1000P_0402_50V7K

DDR_CKE1_DIMMA <5>

DDR_A_BS#1 <5> DDR_A_RAS# <5> DDR_CS0_DIMMA# <5>

DDR_A_ODT0 <5>

DDR_A_CLK1 <5> DDR_A_CLK#1 <5>

DDR_A_DQS[0..7] <5>

DDR_A_MA[0..15] <5>

DDR_A_DQS#[0..7] <5>

+1.8V

1

C96

2

0.1U_0402_16V4Z

DDR_A_D[0..63] <5>

DDR_A_DM[0..7] <5>

R43

R43 1K_0402_1%

1K_0402_1%

1 2

R44

R44 1K_0402_1%

1K_0402_1%

+V_DDR_MCH_REF <8>

DDR_A_MA6 DDR_A_MA7 DDR_A_MA14 DDR_A_MA11

DDR_CKE0_DIMMA DDR_A_BS#2 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_BS#1 DDR_A_MA2 DDR_A_MA0 DDR_A_MA4

DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12

DDR_A_BS#0 DDR_A_MA10 DDR_A_MA3 DDR_A_MA1

DDR_A_ODT1 DDR_CS1_DIMMA# DDR_A_CAS# DDR_A_WE#

DDR_A_MA13 DDR_A_ODT0 DDR_A_RAS# DDR_CS0_DIMMA#

47_0804_8P4R_5%

+0.9V

RP1

1 8 2 7 3 6 4 5

RP2

18 27 36 45

RP3

1 8 2 7 3 6 4 5

RP4

18 27 36 45

RP5

18 27 36 45

RP6

18 27 36 45

RP7

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

1 2

C87 0.1U_0402_16V4ZC87 0.1U_0402_16V4Z

1 2

C88 0.1U_0402_16V4ZC88 0.1U_0402_16V4Z

1 2

C90 0.1U_0402_16V4ZC90 0.1U_0402_16V4Z

1 2

C89 0.1U_0402_16V4ZC89 0.1U_0402_16V4Z

1 2

C91 0.1U_0402_16V4ZC91 0.1U_0402_16V4Z

1 2

C92 0.1U_0402_16V4ZC92 0.1U_0402_16V4Z

1 2

C93 0.1U_0402_16V4ZC93 0.1U_0402_16V4Z

1 2

C94 0.1U_0402_16V4ZC94 0.1U_0402_16V4Z

1 2

C98 0.1U_0402_16V4ZC98 0.1U_0402_16V4Z

1 2

C97 0.1U_0402_16V4ZC97 0.1U_0402_16V4Z

1 2

C100 0.1U_0402_16V4ZC100 0.1U_0402_16V4Z

1 2

C99 0.1U_0402_16V4ZC99 0.1U_0402_16V4Z

1 2

C102 0.1U_0402_16V4ZC102 0.1U_0402_16V4Z

1 2

C101 0.1U_0402_16V4ZC101 0.1U_0402_16V4Z

+1.8V

Security Classification

DIMM0 STD H:5.2mm (Bot)

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DDRII SO-DIMM 1

LA-5381P

946Friday, Apri l 10, 2009

of

E

of

0.2

A

1 1

B

C

D

E

U3B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

2 2

PCIE_PTX_C_IRX_P0<25> PCIE_PTX_C_IRX_N0<25> PCIE_PTX_C_IRX_P1<31> PCIE_PTX_C_IRX_N1<31> PCIE_PTX_C_IRX_P2<27> PCIE_PTX_C_IRX_N2<27> PCIE_PTX_C_IRX_P3<28> PCIE_PTX_C_IRX_N3<28> PCIE_PTX_C_IRX_P4<27> PCIE_PTX_C_IRX_N4<27> PCIE_PTX_C_IRX_P5<27> PCIE_PTX_C_IRX_N5<27>

SB_RX0P<19> SB_RX0N<19> SB_RX1P<19> SB_RX1N<19> SB_RX2P<19> SB_RX2N<19>

3 3

SB_RX3P<19> SB_RX3N<19>

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS880M_FCBGA528

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)

PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

GFX_TX10P

GFX_TX10N

GFX_TX11P

GFX_TX11N

GFX_TX12P

GFX_TX12N

GFX_TX13P

GFX_TX13N

GFX_TX14P

GFX_TX14N

GFX_TX15P

GFX_TX15N

PCIE I/F GFX

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

RS780MN@

HDMI_TXD2+

A5

HDMI_TXD2-

B5

HDMI_TXD1+

A4

HDMI_TXD1-

B4

HDMI_TXD0+

C3

HDMI_TXD0-

B2

HDMI_CLK0+

D1

HDMI_CLK0-

D2

DP_L0+

E2

DP_L0-

E1

DP_L1+

F4

DP_L1-

F3

DP_L2+

F1

DP_L2-

F2

DP_L3+

H4

DP_L3-

H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2

PCIE_ITX_PRX_P1

AB4

PCIE_ITX_PRX_N1

AB3

PCIE_ITX_PRX_P2

AA2

PCIE_ITX_PRX_N2

AA1

PCIE_ITX_PRX_P3

Y1

PCIE_ITX_PRX_N3

Y2

PCIE_ITX_PRX_P4

Y4

PCIE_ITX_PRX_N4

Y3

PCIE_ITX_PRX_P5

V1

PCIE_ITX_PRX_N5

V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6

SB_TX2P_C

AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5

R55 1.27K_0402_1%R55 1.27K_0402_1%

AC8

R56 2K_0402_1%R56 2K_0402_1%

AB8

RS880M Display Port Support (muxed on GFX)

DP0

DP1

C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K C154 0.1U_0402_16V7KC154 0.1U_0402_16V7K C155 0.1U_0402_16V7KC155 0.1U_0402_16V7K C156 0.1U_0402_16V7KC156 0.1U_0402_16V7K C157 0.1U_0402_16V7KC157 0.1U_0402_16V7K C158 0.1U_0402_16V7KC158 0.1U_0402_16V7K C159 0.1U_0402_16V7KC159 0.1U_0402_16V7K C199 0.1U_0402_16V7KC199 0.1U_0402_16V7K C200 0.1U_0402_16V7KC200 0.1U_0402_16V7K C160 0.1U_0402_16V7KC160 0.1U_0402_16V7K C161 0.1U_0402_16V7KC161 0.1U_0402_16V7K

C162 0.1U_0402_16V7KC162 0.1U_0402_16V7K C163 0.1U_0402_16V7KC163 0.1U_0402_16V7K C164 0.1U_0402_16V7KC164 0.1U_0402_16V7K C165 0.1U_0402_16V7KC165 0.1U_0402_16V7K C166 0.1U_0402_16V7KC166 0.1U_0402_16V7K C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K C167 0.1U_0402_16V7KC167 0.1U_0402_16V7K

1 2 1 2

HDMI_TXD2+ <18> HDMI_TXD2- <18> HDMI_TXD1+ <18> HDMI_TXD1- <18> HDMI_TXD0+ <18> HDMI_TXD0- <18> HDMI_CLK0+ <18> HDMI_CLK0- <18> DP_L0+ <16> DP_L0- <16> DP_L1+ <16> DP_L1- <16> DP_L2+ <16> DP_L2- <16> DP_L3+ <16> DP_L3- <16>

GFX_TX0,TX1,TX2 and TX3

AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7

AUX1 and HPD1

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

+1.1VS

PCIE_ITX_C_PRX_P0 <25> PCIE_ITX_C_PRX_N0 <25> PCIE_ITX_C_PRX_P1 <31> PCIE_ITX_C_PRX_N1 <31> PCIE_ITX_C_PRX_P2 <27> PCIE_ITX_C_PRX_N2 <27> PCIE_ITX_C_PRX_P3 <28> PCIE_ITX_C_PRX_N3 <28> PCIE_ITX_C_PRX_P4 <27> PCIE_ITX_C_PRX_N4 <27> PCIE_ITX_C_PRX_P5 <27> PCIE_ITX_C_PRX_N5 <27>

SB_TX0P <19> SB_TX0N <19> SB_TX1P <19> SB_TX1N <19> SB_TX2P <19> SB_TX2N <19> SB_TX3P <19> SB_TX3N <19>

New Card

Card Reader

WLAN

LAN

WUSB

3G/TV Tuner

H_CLKOP0<4> H_CLKON0<4> H_CLKOP1<4> H_CLKON1<4>

H_CTLOP0<4>

H_CTLON0<4> H_CTLON1<4>

R57 301_0402_1%R57 301_0402_1%

0718 Place within 1" layout 1:2

H_CADOP[0..15]<4> H_CADON[0..15]<4> H_CADIN[0..15] <4>

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9

H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0 H_CLKON0 H_CLKOP1 H_CLKON1

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1

1 2

H_CADON[0..15]

U3A

Y25

HT_RXCAD0P

Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25

AB25 AB24 AA24 AA25

Y22

Y23 W21 W20

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22 M23

R21

R20

C23

A24

RS880M_FCBGA528 RS780MN@

HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

PART 1 OF 6

H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

H_CADIP[0..15] <4>

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18

H_CLKIP0

H24

H_CLKIN0

H25

H_CLKIP1

L21

H_CLKIN1

L20

H_CTLIP0

M24

H_CTLIN0

M25

H_CTLIP1

P19

H_CTLIN1

R18

R58 301_0402_1%R58 301_0402_1%

B24 B25

1 2

0718 Place within 1" layout 1:2

H_CLKIP0 <4> H_CLKIN0 <4> H_CLKIP1 <4> H_CLKIN1 <4>

H_CTLIP0 <4>

H_CTLIN0 <4>

H_CTLIP1 <4>H_CTLOP1<4>

H_CTLIN1 <4>

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780M&RX781-HT/PCIE

LA-5381P

10 46Friday, April 10, 2009

of

E

of

0.2Custom

A

+3VS

1 1

+1.8VS

L2

1 2

BLM18PG121SN1D_0603

2.2U_0603_6.3V6K

L4

0_0603_5%

2.2U_0603_6.3V6K

C172

C170

1

2

+AVDD1

1

2

+AVDD2

1

C198

0.1U_0402_16V4Z

2

B

1 2

R62 140_0402_1%R62 140_0402_1%

1 2

R63 150_0402_1%R63 150_0402_1%

1 2

R64 150_0402_1%R64 150_0402_1%

C

CRT_R CRT_G CRT_B

D

+VDDLTP18

+VDDLT18

C173

0.1U_0402_16V4Z

BLM18PG121SN1D_0603

1

C171

2

2.2U_0603_6.3V6K

1

C174

2

4.7U_0805_10V4Z

E

L3

1 2

L5

1 2

BLM18PG121SN1D_0603

+1.8VS

BLM18PG121SN1D_0603

2 2

+1.1VS

BLM18PG121SN1D_0603

+1.8VS +VDDA18HTPLL

BLM18PG121SN1D_0603

3 3

4 4

BLM18PG121SN1D_0603

+1.8VS +VDDA18PCIEPLL

BLM18PG121SN1D_0603

+1.8VS

1 2

R371 300_0402_5%R371 300_0402_5%

1 2

2.2U_0603_6.3V6K

1 2

2.2U_0603_6.3V6K

L10

1 2

2.2U_0603_6.3V6K

L11

1 2

2.2U_0603_6.3V6K

L6

2.2U_0603_6.3V6K

L9

C178

L7

C176

C179

C180

NB_PWRGD

C175

1

2

+NB_PLLVDD

1

2

1

2

1

2

1

2

+AVDDQ

+NB_HTPVDD+1.8VS

PLT_RST#<14,19,25,27,28,31,32,33>

R71

4.7K_0402_5%

R72

4.7K_0402_5%

+1.1VS

R67 0_0402_5%R67 0_0402_5%

1 2 12

UMA_CRT_CLK<16> UMA_CRT_DATA<16>

1 2

CLK_SBLINK_BCLK<15> CLK_SBLINK_BCLK#<15>

LCD_EDID_CLK<17>

LCD_EDID_DATA<17>

+AVDD1 +AVDD2 +AVDDQ

CRT_R<16> CRT_G<16> CRT_B<16>

CRT_HSYNC<14,16> CRT_VSYNC<14,16>

R65 715_0402_1%R65 715_0402_1%

+NB_PLLVDD +NB_HTPVDD

+VDDA18HTPLL

+VDDA18PCIEPLL

NB_PWRGD<20>

LDT_STOP#<6,19>

CPU_LDT_REQ#<6,19>

CLK_NBHT<15> CLK_NBHT#<15>

NB_OSC_14.318M<15>

NBGFX_CLK<15> NBGFX_CLK#<15>

HDMIDAT_UMA<18> HDMICLK_UMA<18>

DP_AUXP<16> DP_AUXN<16>

+3VS

R88 10K_0402_5%

R104 150_0402_1%

AVDD=100mA

1 2

CLK_SBLINK_BCLK CLK_SBLINK_BCLK#

@

DP@

12

UMA_CRT_CLK UMA_CRT_DATA

NB_RESET# NB_PWRGD LDT_STOP# CPU_LDT_REQ#

CLK_NBHT CLK_NBHT#

NB_OSC_14.318M

NBGFX_CLK NBGFX_CLK#

LCD_EDID_CLK LCD_EDID_DATA HDMIDAT_UMA HDMICLK_UMA DP_AUXP DP_AUXN

12

AUX_CAL

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS880M_FCBGA528

PART 3 OF 6

TXOUT_L2N(DBG_GPIO0) TXOUT_L3N(DBG_GPIO2)

TXOUT_U1P(PCIE_RESET_GPIO3)

TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

SUS_STAT#(PWM_GPIO5)

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

THERMALDIODE_P THERMALDIODE_N

TESTMODE

RS780MN@

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

+VDDLTP18

A13 B13

+VDDLT18

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

UMA_ENVDD

E9

UMA_ENBKL

F7 G12

UMA_ENBKL

D9 D10

D12 AE8

AD8 D13

R73 100K_0402_5%R73 100K_0402_5%

HPD_NB DP_HPD_R

SUS_STAT#

1 2

R80 1.8K_0402_5%R80 1.8K_0402_5%

T4PAD T4PAD

LCD_TXOUT0+ <17> LCD_TXOUT0- <17> LCD_TXOUT1+ <17> LCD_TXOUT1- <17> LCD_TXOUT2+ <17> LCD_TXOUT2- <17>

LCD_TZOUT0+ <17> LCD_TZOUT0- <17> LCD_TZOUT1+ <17> LCD_TZOUT1- <17> LCD_TZOUT2+ <17> LCD_TZOUT2- <17>

LCD_TXCLK+ <17> LCD_TXCLK- <17> LCD_TZCLK+ <17> LCD_TZCLK- <17>

12

R78 0_0402_5%R78 0_0402_5%

1 2

 0_0402_5% 0_0402_5%

1 2

Strap pin

UMA_ENVDD <17> UMA_ENBKL <32>

SUS_STAT# <14,20>

HPD <18,20> DP_HPD <16>

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780 VEDIO/CLK GEN

LA-5381P

11 46Frid ay, April 10, 2009

of

E

of

0.2

2

1

220 ohm @ 100MHz,2A

L24

1 2

SIDE@

1

SIDE@

C213

0.1U_0402_16V4Z

2

SIDE@

C281

0.1U_0402_16V4Z

SIDE@

C282

0.1U_0402_16V4Z

SIDE@

C280

0.1U_0402_16V4Z

SIDE@

C255

0.1U_0402_16V4Z

2

SIDE@

C610

C610 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

SIDE@

C611

C611 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

+1.8V_MEM_VDDQ

1

2

B B

A A

1

2

+1.8V_MEM_VDDQ

1

2

1

2

SIDE@

R98

R98 1K_0402_1%

1K_0402_1%

1 2

+MEM_VREF

SIDE@

R121

R121 1K_0402_1%

1K_0402_1%

1 2

SIDE@

R120

R120 1K_0402_1%

1K_0402_1%

1 2

+MEM_VREF1

SIDE@

R113

R113 1K_0402_1%

1K_0402_1%

1 2

1

SIDE@

C284

0.1U_0402_16V4Z

2

SIDE@

1

SIDE@

C205

C205 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+1.8V_MEM_VDDQ

+1.8VS+1.8V_MEM_VDDQ

0_0805_5%

R123

SIDE@ R123

SIDE@

SIDE@ R124

SIDE@

MEM_COMP_P and MEM_ COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

R124

40.2_0402_1%

12

40.2_0402_1%

12

@

12

R122

R122 100_0402_1%

100_0402_1%

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CLKP MEM_CLKN

MEM_COMP_P

MEM_COMP_N

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14

AD16 AE17 AD17

W12

Y12 AD18 AB13 AB18

V14 V15

W14

AE12 AD12

MEM_BA0 MEM_BA1

MEM_A12 MEM_A11 MEM_A10 MEM_A9 MEM_A8 MEM_A7 MEM_A6 MEM_A5 MEM_A4 MEM_A3 MEM_A2 MEM_A1 MEM_A0

MEM_CLKN MEM_CLKP

MEM_CKE

MEM_CS# MEM_WE# MEM_RAS# MEM_CAS# MEM_DM0

MEM_DM1

MEM_ODT

MEM_DQS_P0 MEM_DQS_N0

MEM_DQS_P1 MEM_DQS_N1

+MEM_VREF

MEM_BA2

U3D

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

L2 L3

R2

P7

M2

P3 P8

P2 N7 N3 N8 N2 M7 M3 M8

K8

J8

K2

L8

K3

K7

L7

F3

B3

K9

F7

E8

B7

A8

J2

A2

E2

L1 R3 R7 R8

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)

MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

RS880M_FCBGA528RS780MCR3@

U61

BA0 BA1

A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

CK CK

CKE

CS WE RAS CAS LDM

UDM

ODT

LDQS LDQS

UDQS UDQS

VREF NC

NC NC NC NC NC

H5PS1G63EFR-20L_FBGA_84P

HYNSIDE@

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD

VDDL

VSSDL

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS

MEM_DQ0

AA18

MEM_DQ1

AA20

MEM_DQ2

AA19

MEM_DQ3

Y19

MEM_DQ4

V17

MEM_DQ5

AA17

MEM_DQ6

AA15

MEM_DQ7

Y15

MEM_DQ8

AC20

MEM_DQ9

AD19

MEM_DQ10

AE22

MEM_DQ11

AC18

MEM_DQ12

AB20

MEM_DQ13

AD22

MEM_DQ14

AC22

MEM_DQ15

AD21

MEM_DQS_P0

Y17

MEM_DQS_N0

W18

MEM_DQS_P1

AD20

MEM_DQS_N1

AE21

MEM_DM0

W17

MEM_DM1

AE19

+1.8V_IOPLLVDD

AE23

+NB_IOPLLVDD

AE24 AD23

+MEM_VREF1

AE18

MEM_DQ15

B9

MEM_DQ11

B1

MEM_DQ13

D9

MEM_DQ12

D1

MEM_DQ8

D3

MEM_DQ10

D7

MEM_DQ9

C2

MEM_DQ14

C8

MEM_DQ3

F9

MEM_DQ7

F1

MEM_DQ1

H9

MEM_DQ6

H1

MEM_DQ5

H3

MEM_DQ0

H7

MEM_DQ4

G2

MEM_DQ2

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

+1.8V_MEM_VDDQ

1

SIDE@

Layout Note: 50 mil for VSSDL

C283

C283 1U_0603_10V6K

1U_0603_10V6K

2

U61 K4N1G164QE-HC20

K4N1G164QE-HC20

SA00002UH00 : Hynix SA000031O00 : Samsung

SAMSIDE@U61

SAMSIDE@

1 2

1

SIDE@

C261

2.2U_0603_6.3V4Z

2

1 2

1

SIDE@

C260

2.2U_0603_6.3V4Z

2

L21

0_0603_5%

L13

0_0603_5%

+1.8VS

+1.1VS

1

SIDE@

C277

0.1U_0402_16V4Z

2

64M*16 DDR2 400MHZ

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

1

Date: Sheet

Compal Electronics, Inc.

RS780M&RX781 SIDE PORT

LA-5381P

12 46Frid ay, April 10, 2009

of

0.2

A

1 1

2 2

3 3

+1.1VS

+1.2V_HT

+1.8VS

L16

0_0805_5%

L18

0_0805_5%

L19

0_0805_5%

L22

12

0_0805_5%

4.7U_0805_10V4Z

12

C209

4.7U_0805_10V4Z

12

C215

10U_0805_10V6K

0.1U_0402_16V4Z

2A

12

C225

4.7U_0805_10V4Z

2A

1

C235

C246

2

4.7U_0805_10V4Z

2A

1

C206

2

0.1U_0402_16V4Z

1

C214

C216

2

0.1U_0402_16V4Z

1

C226

2

0.1U_0402_16V4Z

1

C236

2

0.1U_0402_16V4Z

1

C208

C207

2

0.1U_0402_16V4Z

1

C217

2

0.1U_0402_16V4Z

1

C227

C228

2

0.1U_0402_16V4Z

1

C238

C237

2

0.1U_0402_16V4Z

+1.8VS

1U_0402_6.3V4Z

1

C210

2

0.1U_0402_16V4Z

+VDDHTRX

1

C218

2

0.1U_0402_16V4Z

1

C229

2

0.1U_0402_16V4Z

1

C239

2

0.1U_0402_16V4Z

+1.8VS

1

C251

2

+VDDHT

1

2

+VDDHTTX

1

2

+VDDA18PCIE

1

2

1 2

0_0603_5%

B

U3E

J17

VDDHT_1

K16

AE25 AD24 AC23 AB22 AA21

W19

M17

M10

AD9

AE11 AD11

1

SIDE@

C252

C252 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

L16 M16 P16 R16 T16

H18 G19 F20 E21 D22 B23 A23

Y20 V18

U17 T17 R17 P17

P10 K10

L10

T10 R10

AA9 AB9

AE9 U10

J10

W9

H9

Y9

F9

G9

2A

L89

PART 5/6

VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)

RS880M_FCBGA528 RS780MN@

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

2.5A

C

+VDDA11PCIE

1

C2470.1U_0402_16V4Z C2470.1U_0402_16V4Z

2

+3VS

1 2

FBMA-L11-201209-221LMA30T_0805

C211

C211 C212

C212

C220 1U_0402_6.3V4ZC220 1U_0402_6.3V4Z C219 1U_0402_6.3V4ZC219 1U_0402_6.3V4Z C222 1U_0402_6.3V4ZC222 1U_0402_6.3V4Z C221 1U_0402_6.3V4ZC221 1U_0402_6.3V4Z C224 0.1U_0402_16V4ZC224 0.1U_0402_16V4Z C223 0.1U_0402_16V4ZC223 0.1U_0402_16V4Z

+1.1VS

VDD_CORE:GM=5A/PM=10A

1

C2420.1U_0402_16V4Z C2420.1U_0402_16V4Z

C2410.1U_0402_16V4Z C2410.1U_0402_16V4Z

2

C2430.1U_0402_16V4Z C2430.1U_0402_16V4Z

2

+VDD_MEM

C2300.1U_0402_16V4Z C2300.1U_0402_16V4Z

1 2 1 2

C2400.1U_0402_16V4Z C2400.1U_0402_16V4Z

2

L17

1 2 1 2 1 2 1 2

PJP3

1 2

PAD-OPEN 4x4m

1

C2310.1U_0402_16V4Z C2310.1U_0402_16V4Z

2

10U_0805_10V6K

10U_0805_10V6K 10U_0805_10V6K

10U_0805_10V6K

12 12

1

C2440.1U_0402_16V4Z C2440.1U_0402_16V4Z

C2320.1U_0402_16V4Z C2320.1U_0402_16V4Z

2

C2500.1U_0402_16V4Z C2500.1U_0402_16V4Z C2530.1U_0402_16V4Z C2530.1U_0402_16V4Z

D

U3F

A25

VSSAHT1

D23

VSSAHT2

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

0_0402_5%

0_0402_5% R625

R625

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

W22

VSSAHT23

W24

VSSAHT24

W25

VSSAHT25

Y21

VSSAHT26

AD25

VSSAHT27

L12

VSS11

M14

VSS12

N13

VSS13

P12

VSS14

P15

VSS15

R11

VSS16

R14

VSS17

T12

VSS18

U14

VSS19

U11

VSS20

U15

VSS21

V12

VSS22

W11

VSS23

W15

VSS24

AC12

VSS25

AA14

VSS26

Y18

VSS27

AB11

VSS28

AB15

VSS29

AB17

VSS30

AB19

VSS31

AE20

VSS32

AB21

VSS33

K11

VSS34

RS880M_FCBGA528 RS780MN@

1

C2861U_0402_6.3V4Z SIDE@C2861U_0402_6.3V4Z SIDE@

C2851U_0402_6.3V4Z SIDE@C2851U_0402_6.3V4Z SIDE@

C5970.1U_0402_16V4Z SIDE@C5970.1U_0402_16V4Z SIDE@

2

+1.1VS

+NB_CORE

330U_B2_2.5VM_R15M

1

C234

1

C23310U_0805_10V6K C23310U_0805_10V6K

C24510U_0805_10V6K C24510U_0805_10V6K

+

2

12

NOSIDE@

PART 6/6

1

C5980.1U_0402_16V4Z SIDE@C5980.1U_0402_16V4Z SIDE@

C5990.1U_0402_16V4Z SIDE@C5990.1U_0402_16V4Z SIDE@

2

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30

GROUND

VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

L82

1 2

0_0603_5%

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

SIDE@L82

SIDE@

E

+1.8VS

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780M&RX781 PWR/GND

LA-5381P

13 46Friday, April 10, 2009

of

E

of

0.2Custom

A

B

C

D

E

RS780 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K

SI2: Change to 3K pull high

CRT_VSYNC<11,16>

1 1

12

R101 3K_0402_5%R101 3K_0402_5%

@

12

R102 3K_0402_5%

+3VS

DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. 1 : Enable (RX780, RS780) 0 : Disable (RX780, RS780) PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]

These pin straps are used to configure PCI-E GPP mode. 000 : 00001 001 : 00010

RS780 use register to control PCI-E configure

2 2

010 : 01011 011 : 00100 100 : 01010 101 : 01100 111 : 01011

DFT_GPIO1: LOAD_EEPROM_STRAPS

Selects Loading of STRAPS from EPROM

RS780 DFT_GPIO1

D4

@D4

@

SUS_STAT#<11,20>

2 1

CH751H-40PT_SOD323-2

PLT_RST# <11,19,25,27,28,31,32,33>

1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

3 3

RS780 use HSYNC to enable SIDE PORT (internal pull high)

@

CRT_HSYNC<11,16>

4 4

A

12

R125 3K_0402_5%

SIDE@

12

R136 3K_0402_5%

+3VS

B

DFT_GPIO0: STRA P_DEBUG_BUS_PCIE_E NABLEb

RX780: Enables the Test Debug Bus using PCIE bus 1 : Disable ( Can still be enabled using nbcfg register access ) 0 : Enable

RS780: Enables Side port memory ( RS780 use HSYNC#)

1. Disable (RS780) 0 : Enable (RS780)

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

RS780M&RX781 STRAPS

LA-5381P

14 46Friday, April 10, 2009

of

E

of

0.2Custom

A

B

C

D

E

+1.2V_HT

22U_0805_6.3V6M

1 1

+3VS_CLK

R179

8.2K_0402_5%

@

1 2

SEL_SATA

R181

8.2K_0402_5%

2 2

R180

8.2K_0402_5%

3 3

1 2

+3VS_CLK

1 2

SEL_SATA

27M_SEL

+VDDCLK_IO

73

U10

GND

SCL SDA VDD_DOT SRC_7#/27M SRC_7/27M_SS VSS_DOT SRC_5# SRC_5 SRC_4# SRC_4 VSS_SRC VDD_SRC_IO SRC_3# SRC_3 SRC_2# SRC_2 VDD_SRC VDD_SRC_IO

+3VS

71

72

VSS_48

48MHz_17048MHz_0

R168

1 2

0_0805_5%

1*0configure as SATA outp ut configure as sing le-ended 66MHz output1

* default

configure as 27M and 27M_SS output1*

0

configure as SRC_7 output

* default

0.1U_0402_16V4Z

1

2

configure as nor mal SRC(SRC_6) output

C452

C453

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

C454

C455

2

22P_0402_50V8J

WUSB

SB LINK SB SRC

3G/TV Tuner

WLAN

0.1U_0402_16V4Z

1

C456

C457

2

0.1U_0402_16V4Z

C464

SMB_CK_CLK0<8,9,20,25> SMB_CK_DAT0<8,9,20,25>

CLK_PCIE_MCARD3#<27> CLK_PCIE_MCARD3<27>

CLK_SBLINK_BCLK#<11>

CLK_SBLINK_BCLK<11> CLK_SBSRC_BCLK# <19>

CLK_PCIE_MCARD1#<27> CLK_PCIE_MCARD1<27> CLK_PCIE_MCARD2#<27> CLK_PCIE_MCARD2<27>

C457

2

CLK_XTAL_OUT CLK_XTAL_IN

Y2

12

14.31818MHZ_20P_6X1430004201

1

C465

C465 22P_0402_50V8J

2

22P_0402_50V8J

2

+3VS_CLK

+VDDCLK_IO

+3VS_CLK

+VDDCLK_IO

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18

R167

1 2

0_0805_5%

+3VS_CLK

CLK_XTAL_OUT

CLK_XTAL_IN

67

69

68

VDD_48

XTAL_IN

XTAL_OUT

+3VS_CLK

1

C444

C444 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+3VS_CLK

CLK_48M_CRUSB NB_OSC_14.318M_R

R175 33_0402_5%R175 33_0402_5%

1 2

SEL_SATA

27M_SEL

+3VS_CLK

64

60

REF_0/SEL_HTT66

58

57

59

63

62

61

PD#

VSS_HTT

VDD_HTT

VDD_REF

HTT_0/66M_0

HTT_0#/66M_1

REF_2/SEL_27

REF_1/SEL_SATA

66

65

VSS_REF

1

C445

0.1U_0402_16V4Z

2

1

C458

0.1U_0402_16V4Z

2

1 2

R174 8.2K_0402_5%R174 8.2K_0402_5%

1 2

C629 1U_0402_6.3V4ZC629 1U_0402_6.3V4Z

CLK_CPU_R_BCLK

CLK_CPU_R_BCLK#

56

55

CPU_K8_0

CPU_K8_0#

VDD_CPU

VDD_CPU_I/O

VSS_CPU CLKREQ_1# CLKREQ_2#

VDD_A VSS_A

VSS_SATA

SRC_6/SATA

SRC_6#/SATA#

VDD_SATA CLKREQ_3# CLKREQ_4#

SB_SRC_SLOW#

SB_SRC_0

SB_SRC_0#

VDD_SB_SRC

VDD_SB_SRC_IO

1

C446

0.1U_0402_16V4Z

2

1

C459

0.1U_0402_16V4Z

2

R170 33_0402_5%R170 33_0402_5%

1 2

R379 158_0402_1%R379 158_0402_1%

1 2

SB_14.318M <19>

+3VS_CLK

1 2

R946 0_0402_5%R946 0_0402_5%

1 2

R945 0_0402_5%R945 0_0402_5%

54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37

+3VS_CLK +VDDCLK_IO

+3VS_CLK

1 2

R372 10K_0402_5%R372 10K_0402_5%

+3VS_CLK +VDDCLK_IO

1

C447

0.1U_0402_16V4Z

2

1

C460

0.1U_0402_16V4Z

2

R186

R186 261_0402_1%

261_0402_1%

@

1 2

+3VS_CLK

1

C448

0.1U_0402_16V4Z

2

1

C461

0.1U_0402_16V4Z

2

CLK_48M_USB <20> NB_OSC_14.318M <11>

1 2

R380 90.9_0402_1%R380 90.9_0402_1%

CLK_NBHT <11> CLK_NBHT# <11>

CLK_CPU_BCLK <6>

CPU

CLK_CPU_BCLK# <6>

CLKREQ_NCARD# <25> CLKREQ_MCARD2# <27>

CLK_SBSRC_BCLK <19>

CLKREQ_MCARD1# <27>

1

C449

0.1U_0402_16V4Z

2

1

C450

0.1U_0402_16V4Z

2

1

2

OSC_14M_NB

RS780 1.1V 158R/90.9R

Use voltage divider resistor R379 & R380 to pull low

NB

NB_OSC_14.318M

CLKREQ_NCARD# CLKREQ_MCARD2# CLKREQ_MCARD1#

*0 configure as differential 100MHz output

* default

1 2

R324 8.2K_0402_5%R324 8.2K_0402_5%

1 2

R325 8.2K_0402_5%R325 8.2K_0402_5%

1 2

R326 8.2K_0402_5%R326 8.2K_0402_5%

C451

C451 1U_0402_6.3V4Z

1U_0402_6.3V4Z

+3VS_CLK

VSS_SRC19SRC_1#20SRC_121SRC_0#22SRC_023CLKREQ_0#24ATIGCLK_2#25ATIGCLK_226VSS_ATIG27VDD_ATIG_IO28VDD_ATIG29ATIGCLK_1#30ATIGCLK_131ATIGCLK_0#32VSS_SB_SRC36SB_SRC_135SB_SRC_1#34ATIGCLK_0

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

33

SLG8SP626VTR_QFN72_10x10

+3VS_CLK

+VDDCLK_IO

C

NBGFX_CLK <11> NBGFX_CLK# <11>

CLK_PCIE_MCARD0 <31> CLK_PCIE_MCARD0# <31>

CLK_PCIE_LAN <28> CLK_PCIE_LAN# <28>

CLK_PCIE_NCARD <25> CLK_PCIE_NCARD# <25>

2008/04/14 2009/04/14

NB GFX

Card Reader

LAN

New Card

Compal Secret Data

Deciphered Date

D

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

Size Document Number Rev

Date: Sheet

RX780 RS780

100M DIFF 100M DIFF

14M SE (1.8V) 14M SE (1.1V) NC vref

100M DIFF 100M DIFF

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

Clock Generator

LA-5381P

E

0.2Custom

15 46Friday, April 10, 2009

0.2Custom

of

A

CRT CONNECTOR

L47

CRT@L47

CRT@

CRT_R<11>

CRT_G<11>

CRT_B<11>

1 1

2 2

R214

CRT@

12

140_0402_1%

UMA_CRT_DATA<11>

UMA_CRT_CLK<11>

R211

CRT@

12

R217

CRT@

150_0402_1%

12

150_0402_1%

1

@

C278

2

1000P_0402_50V7K

CRT@

C471

1

CRT@

C859

2

6P_0402_50V8K

1

@

C279

2

1000P_0402_50V7K

33P_0402_50V8K

1

CRT@

C469

2

6P_0402_50V8K

@

C177

RS780 DAC_SCL & SDA is 5V tolerance

NBQ100505T-800Y_0402

L48

NBQ100505T-800Y_0402

L49

NBQ100505T-800Y_0402

1

2

6P_0402_50V8K

CRT@

R237

4.7K_0402_5%

12

@

C181

C181 33P_0402_50V8K

33P_0402_50V8K

1 2

CRT@L48

CRT@

1 2

CRT@L49

CRT@

1 2

+3VS

12

1 2

CRT@

C858

CRT@

R238

4.7K_0402_5%

B

1

CRT@

C476

C472

2

6P_0402_50V8K

+3VS

5

3

4

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q10B

CRT@Q10B

CRT@

+3VS

2

61

2N7002DW-T/R7_SOT363-6

CRT@

Q10A

470P_0402_50V8J

RED_L

GREEN_L

BLUE_L

1

2

6P_0402_50V8K

CRT@

R100

6.8K_0402_5%

C857

@

1

D34

@D34

@

2

3

DAN217_SC59

+CRT_VCC

1

2

1

D37

@D37

@

2

3

DAN217_SC59

CRT@

R218

6.8K_0402_5%

D_DDCDATA

D_DDCCLK

1

C856

@

2

470P_0402_50V8J

D35

@D35

@

2

DAN217_SC59

C

+3VS

C473

+3VS

C473

0.1U_0402_16V4Z

C477

0.1U_0402_16V4Z

1

@

C288

1000P_0402_50V7K

2

1

CRT_HSYNC<11,14>

1

@

C276

C275

3

2

1000P_0402_50V7K

CRT_VSYNC<11,14>

+CRT_VCC

CRT@

1 2

+CRT_VCC

CRT@

1 2

DP@

D21

2 1

RB161M-20_SOD123-2

1

5

P

4

OE#

A2Y

G

U14

CRT@

3

SN74AHCT1G125GW_SOT353-5

1

5

P

D_VSYNC

4

OE#

A2Y

G

U13

U13 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

CRT@

1A_6VDC_MINISMDC110

+3VS_DP_F +3VS_DP_L

D_HSYNC

2 1

1 2

10K_0402_5%

FV3

DP@

D

R540

CRT@

1 2

L84 10_0402_5%

CRT@

1 2

L83 10_0402_5%

C474

@

KC FBM-L11-201209-221LMAT_0805

1 2

2

CV25

DP@

1

+5VS

HSYNC

VSYNC

1

C470

@

2

10P_0402_50V8J

LV14

DP@

2

CV24

DP@

1

0.1U_0402_16V7K

10P_0402_50V8J

0.1U_0402_16V7K

D36

2 3

RB491D_SOT23-3

+CRT_VCC

220P_0402_50V7K

CRT@D36

CRT@

RED_L D_DDCDATA

GREEN_L HSYNC

BLUE_L VSYNC

D_DDCCLK

CRT@

+3VS_DP

+R_CRT_VCC

1

C478

1

2

E

F2

CRT@F2

CRT@

21

1.1A_6V_MINISMDC110F-2

JCRT

6

11

1

7

12

2

8

13

3

9

14

4

10

15

5

SUYIN_070546FR015S267ZR

@

+CRT_VCC

1

C475

0.1U_0402_16V4Z

2

CRT@

16

G1

17

G2

JDP

Display Port

DP@

DP_AUXP<11>

DP_AUXN<11>

3 3

DP@

RV105

2.2K_0402_5%

DP_HPD<11>

DP_AUXP DP_C_AUXP

4 4

DP_AUXN

12

RV80

RV80 100K_0402_5%

100K_0402_5%

DP@

Q160B

Q160B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

3

4

5

Q158B

Q158B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

3

4

DP@

5

A

1 2

DP@

1 2

+3VS

12

DP@

4

Q160A

Q160A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

Q158A

Q158A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

DP_C_AUXP

CV570.1U_0402_16V7K

DP_C_AUXN

CV580.1U_0402_16V7K

+3VS_DP

1

5

UV12

P

OE#

A2Y

74AHC1G125GW_SOT353-5

G

3

DP@

61

DP@

EN

DP_C_AUXP DP_C_AUXN

DP_C_AUXN

DP@

1 2

+3VS

12

RV37

DP@

100K_0402_5%

2N7002DW-T/R7_SOT363-6

EN

CV590.1U_0402_16V7K

12

RV79

DP@

100K_0402_5%

RV39

DP@

100K_0402_5%

ENEN

DP@

Q159B

DP_L0+<10>

DP_L1+<10>

DP_L2+<10>

DP_L3+<10>

12

RV38

DP@

100K_0402_5%

3

5

4

B

DP_L0-<10>

DP_L1-<10>

DP_L2-<10>

DP_L3-<10>

B+B+

12

61

DP@

Q159A

2N7002DW-T/R7_SOT363-6

2

CV34

1

DP@

2

DP_TXD0+ DP_TXD0-

100P_0402_50V8J

CAP_DET

12

DP@

RV45

RV45 1M_0402_5%

1M_0402_5%

RV40

1 2

1K_0402_5%

DP@

DP@ 12

RV41

DP@

100K_0402_5%

DP@ R285

DP@

1 2

L23

1

4

WCM-2012-900T_0805

1 2

DP@

1 2

DP@

1 2

DP@

1 2

DP@

1 2

LV13

1 2

DP@

R285

0_0402_5%

@L23

@

2

3

R286

0_0402_5%DP@

CV270.1U_0402_16V7K

CV290.1U_0402_16V7K

CV310.1U_0402_16V7K

CV330.1U_0402_16V7K

1

4

1

DP_TXD0+ DP_TXD0-

DP_TXD1+ DP_TXD1-

DP_TXD2+ DP_TXD2-

DP_TXD3+ DP_TXD3-

R154

DP@ R154

DP@

1 2

0_0402_5%

L20

@L20

@

1

4

WCM-2012-900T_0805

1 2

DP@ R153

DP@

1 2

L15

4

1

WCM-2012-900T_0805

1 2

2

DP_R_TXD1+ DP_R_TXD1-

3

R155

0_0402_5%DP@

R153

0_0402_5%

@L15

@

3

DP_R_TXD3DP_R_TXD3+

2

R283

0_0402_5%DP@

2008/04/14 2009/04/14

DP_TXD2+ DP_TXD2-

Compal Secret Data

Deciphered Date

1 2

L14

1

4

WCM-2012-900T_0805

1 2

DP@ R149

DP@

0_0402_5%

0_0402_5%DP@

D

DP@

CV260.1U_0402_16V7K

CV280.1U_0402_16V7K

CV300.1U_0402_16V7K

CV320.1U_0402_16V7K

MBK1608121YZF_0603

1

2

DP_R_TXD0+ DP_R_TXD0-

DP@

1 2

DP@

1 2

DP@

1 2

DP@

1 2

CV35

CV35 180P_0402_50V8J

180P_0402_50V8J

DP@

DP_TXD1+ DP_TXD1-

DP_TXD3DP_TXD3+

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL EL ECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL EL ECTRONICS, INC.

C

DP_R_TXD0+ DP_R_TXD0-

DP_R_TXD1+ DP_R_TXD1-

DP_R_TXD2+ DP_R_TXD2-

DP_R_TXD3+ DP_R_TXD3-

CAP_DET DP_C_AUXP DP_C_AUXN

R149

@L14

@

2

DP_R_TXD2+ DP_R_TXD2-

3

R150

12

DP@

RV44

5.1M_0402_5%

PIN 14 PULLED UP (26K) INSIDE DONGLE

Date: Sheet

JDP

1

LANE0_P

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20

21 22 23 24

Title

Size Document Number Rev

GND

LANE0_N

LANE1_P

GND

LANE1_N

LANE2_P

GND

LANE2_N

LANE3_P

GND

LANE3_N

GND

AUXCH_P

GND

AUXCH_N

HPD

RETURN

DP_PWR

GROUND

MOLEX_SD-105019-001@

Compal Electronics, Inc.

CRT/TV-OUT Connector

LA-5381P

E

16 46Friday, April 10, 2009

of

0.2Custom

A

B

C

D

E

LCD/PANEL BD. Conn.

+LCD_VDD

1 1

Q1A

R431

0_0603_5%

R429

0_0603_5%

@

ENVDD

LCD_TXOUT1+<11> LCD_TXOUT1-<11> LCD_TXOUT2+<11> LCD_TXOUT2-<11>

LCD_TZOUT0+<11> LCD_TZOUT0-<11> LCD_TZOUT1+<11> LCD_TZOUT1-<11> LCD_TZOUT2+<11> LCD_TZOUT2-<11>

Q1A

R144

100K_0402_5%

USB20_P9_LVDS<26> USB20_N9_LVDS<26>

LCD_TXOUT0+<11> LCD_TXOUT0-<11>

BKOFF#<32>

2N7002DW-T/R7_SOT363-6

UMA_ENVDD<11>

2 2

3 3

+3VS

1 2

R68 4.7K_0402_5%R68 4.7K_0402_5%

1 2

R69 4.7K_0402_5%R69 4.7K_0402_5%

LCD_EDID_CLK LCD_EDID_DATA

1 2

R668 0_0402_5%R668 0_0402_5%

1 2

+5VS

1 2

+5VALW

12

R142

R142 150_0603_5%

150_0603_5%

61

2

12

INT_MIC<30>

+3VS

12

R143

R143 100K_0402_5%

100K_0402_5%

3

Q1B

5

2N7002DW-T/R7_SOT363-6

4

1 2

0.1U_0402_16V4Z

+5V_LVDS_CAM USB20_P9_LVDS USB20_N9_LVDS

INT_MIC LCD_TXOUT0+ LCD_TXOUT0LCD_TXOUT1+ LCD_TXOUT1LCD_TXOUT2+ LCD_TXOUT2-

LCD_TZOUT0+ LCD_TZOUT0LCD_TZOUT1+ LCD_TZOUT1LCD_TZOUT2+ LCD_TZOUT2-

BKOFF#

12

R156

R156 10K_0402_5%

10K_0402_5%

Change +3VALW to +3VS

0.1U_0402_16V7K

R140

1 2

47K_0402_5%

Add C182 for soft start

C745

1

2

C182

0.01U_0402_25V7K

1

JLVDS

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

GND

ACES_88242-4001

2

C262

0.1U_0402_16V7K

Add R156

+3VS

W= 60 mils

Inrush current = 0A

S

G

Q2

2

AO3413_SOT23

D

1 3

1

C263

@

4.7U_0805_10V4Z

2

@JLVDS

@

1

LCD_TXCLK+

3

LCD_TXCLK-

5

7

DAC_BRIG

9

INVT_PWM

11

13

LCD_TZCLK+

15

LCD_TZCLK-

17

19

LCD_EDID_CLK

21

LCD_EDID_DATA

23

25

+LCDVDD_R

27

29

31

33

35

37

39

41

+LCD_VDD

1

2

+3VS +LCD_INV

W= 60 mils

C264

0.1U_0402_16V4Z

LCD_TXCLK+ <11>

LCD_TXCLK- <11> DAC_BRIG <32>

INVT_PWM <32>

LCD_TZCLK+ <11>

LCD_TZCLK- <11>

LCD_EDID_CLK <11>

LCD_EDID_DATA <11>

+LCDVDD_R

1

2

0.1U_0402_16V4Z

@

C270

0_0805_5%

1

C265

0.1U_0402_16V4Z

2

+3VS

1

C267

2

0.1U_0402_16V4Z

1.5A

L8

12

+LCD_VDD

1

C266

4.7U_0805_10V4Z

2

1

@

C274

C273

2

1000P_0402_50V7K

Rated Current MAX:3000mA

+LCD_INV

1

C268

2

68P_0402_50V8J

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

FBMA-L11-201209-221LMA30T_0805

1

@

C269

C272

2

0.1U_0402_25V4K

1000P_0402_50V7K

LCD CONN.

LA-5381P

E

B+

L12

12

1

@

C271

2

0.1U_0402_16V4Z

0.2

17 46Friday, April 10, 2009

0.2

of

A

B

C

D

E

HDMI CEC Controller

1

2

12

3

CEC_XOUT

4

12

5

CEC_XIN

6

7

8

12

9

10

1 2

R616 0_0402_5%

HDMI@L85

HDMI@

2

3

1 2

R617 0_0402_5%

1 2

R618 0_0402_5%

HDMI@L86

HDMI@

2

3

1 2

R619 0_0402_5%

1 2

R620 0_0402_5%

HDMI@L87

HDMI@

2

3

1 2

R621 0_0402_5%

1 2

R623 0_0402_5%

HDMI@L88

HDMI@

2

3

1 2

R624 0_0402_5%

U8

P3_5/SSCK/SCL/CMP1_2

P3_7/CNTR0#/SSO/TXD1

RESET#

XOUT/P4_7

VSS/AVSS

XIN/P4_6

VCC/AVCC

MODE

P4_5/INT0#/RXD1

P1_7/CNTR00/INT10#

R5F211B4D33SP_LSSOP20

100K_0402_5%

HDMI_HPD_R

HDMI_R_CK-

HDMI_R_CK+HDMI_CLK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-HDMI_TX2-

HDMI_R_D2+

R589

HDMI@R589

HDMI@

12

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

D57

CH751H-40PT_SOD323-2

HDMI@

EC_SMB_CK1<32,37>

1 1

C256

0.1U_0402_16V4Z

H@

2 2

HDMI_CLK-

3 3

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

4 4

HDMI_TX2+

EC_SMB_CK1

+3VL

R182 4.7K_0402_5%

H@

R178 47K_0402_5%

H@

R177

1 2

47K_0402_5%

H@

R183 4.7K_0402_5%

H@

1

HDMI_CECIN HDMI_HPD_R

2

HDMI_CECOUT

@

L85

1

4

WCM-2012-900T_0805

@

L86

1

4

WCM-2012-900T_0805

@

L87

1

4

WCM-2012-900T_0805

@

L88

1

4

WCM-2012-900T_0805

@

P1_6/CLK0/SSI01

P1_4/TXD0

P4_2/VREF

R588

2.2K_0402_5%

21

R958

R958 100K_0402_5%

100K_0402_5%

1 2

HDMI_R_CK+ HDMI_R_CK-

HDMI_R_D0HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2+

HDMI_R_D2-

H@U8

H@

11

CEC_TEST

12

CEC_FSHUPDCEC_RST#

13

14

15

16

HDMI_CLK

17

HDMI_DATA

18

19

EC_SMB_DA1

20

HDMI@R588

HDMI@

12

+3VS+3VL

HPD <11,20>

2N7002DW-T/R7_SOT363-6

HDMI@

1 2

R307 715_0402_1%

HDMI@

1 2

R315 715_0402_1%

HDMI@

1 2

R304 715_0402_1%

HDMI@

1 2

R172 715_0402_1%

2N7002DW-T/R7_SOT363-6

HDMI@

1 2

R297 715_0402_1%

HDMI@

1 2

R173 715_0402_1%

HDMI@

1 2

R141 715_0402_1%

HDMI@

1 2

R139 715_0402_1%

1 2

0.1U_0402_16V4Z

Q136A

+3VL

H@ C259

H@

1

H@

C257

2

EC_SMB_DA1 <32,37>

C259

0.1U_0402_16V4Z

1

H@

C543

C543 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

H@

R169 4.7K_0402_5%

H@

R171 4.7K_0402_5%

CEC_FSHUPD (Pin13)

Low= Force to update flash.

HDMI@

6 1

2

+5VS

HDMI@

Q136B

Q136B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

3

4

5

+5VS

HDMI@

Q137A

6 1

2

+5VS

HDMI@

Q137B

Q137B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

3

4

5

+5VS

1

CEC_INT# <32>

+3VL

2

12

R158

R159

10K_0402_5%

HDMI@

+3VL

HDMI_CLK

HDMI_DATA

3 1

2

3 1

SGD

Update BSH111 Correct Library at PVT

HDMI@

D17

+5VS_HDMI+5VS_HDMI

+5VL +HDMI_5V_OUT

+5VS

0.1U_0402_16V4Z

2 1

RB161M-20_SOD123-2

2 1

RB161M-20_SOD123-2

HDMI_TXD0+<10>

HDMI_TXD0-<10>

HDMI_TXD1+<10>

HDMI_TXD1-<10>

HDMI_TXD2+<10> HDMI_TXD2-<10> HDMI_CLK0+<10> HDMI_CLK0-<10>

C851

HDMI@

HDMIDAT_UMA<11>

HDMICLK_UMA<11>

2

1

D53

HDMI@

+5VL

5

P

A2Y

G

3

1

OE#

U39

U39 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

HDMI@

F3

2 1

1.1A_6V_MINISMDC110F-2

C189 0.1U_0402_16V7KHDMI @ C189 0.1U_0402_16V7KHDMI@

1 2

C188 0.1U_0402_16V7KHDMI @ C188 0.1U_0402_16V7KHDMI@

1 2

C190 0.1U_0402_16V7KHDMI @ C190 0.1U_0402_16V7KHDMI@

1 2

C184 0.1U_0402_16V7KHDMI @ C184 0.1U_0402_16V7KHDMI@

1 2

C187 0.1U_0402_16V7KHDMI @ C187 0.1U_0402_16V7KHDMI@

1 2

C191 0.1U_0402_16V7KHDMI @ C191 0.1U_0402_16V7KHDMI@

1 2

C185 0.1U_0402_16V7KHDMI @ C185 0.1U_0402_16V7KHDMI@

1 2

C186 0.1U_0402_16V7KHDMI @ C186 0.1U_0402_16V7KHDMI@

1 2

HDMI_HPD_R

4

4.7K_0402_5%

HDMI@

1 2

R298 0_0402_5%

HDMI@

1 2

R301 0_0402_5%

HDMI@F3

HDMI@

R176

HDMI@

+3VL

2

SGD

Q13

Q13 BSH111_SOT23-3

BSH111_SOT23-3

HDMI@

1

C287

HDMI@

0.1U_0402_16V4Z

2

R628

100K_0402_5%

HDMI@

+3VS

12

1 2

+HDMI_5V_OUT

12

R242

2.2K_0402_5%

HDMI@

Q33

Q33 BSH111_SOT23-3

BSH111_SOT23-3

HDMI@

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+

HDMI_TX2-

HDMI_CLK+

HDMI_CLK-

2

1

1 2

R209

4.7K_0402_5%

HDMI@

12

R243

2.2K_0402_5%

HDMI@

HDMI_SCLK

HDMI_SDATA

HDMI_HPD

C850

0.1U_0402_16V4Z

HDMI@

+3VS

3 1

2

3 1

SGD

2

Q34

SGD

BSH111_SOT23-3

HDMI@

Q15

Q15 BSH111_SOT23-3

BSH111_SOT23-3

HDMI@

12

HDMI_CECIN

13

D

H@

Q149

2N7002_SOT23-3H@G

2N7002_SOT23-3

HDMI_CECOUT

S

R163

1 2

27K_0402_5%

H@

HDMI Connector

HDMI_HPD

+HDMI_5V_OUT

HDMI_SDATA HDMI_SCLK

HDMI_CEC HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Update BSH111 Correct Library at PVT

R157

10K_0402_5%

H@

2

G

12

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

HDMI_SDATA

HDMI_SCLK

+3VL+3VL

21

12

13

2

G

R165

R165 100K_0402_5%

100K_0402_5%

H@

JHDMI

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

TYCO_1939864-1_19P@

D13

D13 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

H@

R583

R583 27K_0402_5%

27K_0402_5%

H@

HDMI_CEC

D

H@

Q150

2N7002_SOT23-3

S

20

GND

21

GND

22

GND

23

GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONIC S, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONIC S, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONIC S, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/04/14 2009/04/14

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

HDMI/CEC

LA-5381P

E

0.2Custom

of

18 46Friday, April 10, 2009

A

1 1

+3VALW

C506

12

0.1U_0402_16V4Z

2 2

3 3

NB_RST#_R

C643

1 2

18P_0402_50V8J

R389

20M_0603_5%

C652

1 2

18P_0402_50V8J

2 1

R312 0_0402_5%@R312 0_0402_5%@

12

5

U16

P

B

4

Y

A

G

NC7SZ08P5X_NL_SC70-5

3

12

Y3

4

OUT

1

IN

32.768KHZ_12.5P_1TJS125BJ4A421P

PLT_RST#

NC NC

3 2

SB_RX0P<10>

SB_RX0N<10>

SB_RX1P<10>

SB_RX1N<10>

SB_RX2P<10>

SB_RX2N<10>

SB_RX3P<10>

SB_RX3N<10>

SB_TX0P<10> SB_TX0N<10> SB_TX1P<10> SB_TX1N<10> SB_TX2P<10> SB_TX2N<10> SB_TX3P<10> SB_TX3N<10>

+PCIE_VDDR

+1.2V_HT

PLT_RST# <11,14,25,27,28,31,32,33>

SB_32KHI

SB_32KHO

1 2

BLM18PG121SN1D_0603

2.2U_0603_6.3V6K

CLK_SBSRC_BCLK<15> CLK_SBSRC_BCLK#<15>

Close to SB

H_PROCHOT#

+3VS

4 4

12

R319 10K_0402_5%R319 10K_0402_5%

A

CPU_LDT_REQ#<6,11>

B

C492 0.1U_0402_16V7KC492 0.1U_0402_16V7K

1 2

C493 0.1U_0402_16V7KC493 0.1U_0402_16V7K

1 2

C494 0.1U_0402_16V7KC494 0.1U_0402_16V7K

1 2

C495 0.1U_0402_16V7KC495 0.1U_0402_16V7K

1 2

C496 0.1U_0402_16V7KC496 0.1U_0402_16V7K

1 2

C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

1 2

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K

1 2

C499 0.1U_0402_16V7KC499 0.1U_0402_16V7K

1 2

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

R305 562_0402_1%R305 562_0402_1% R306 2.05K_0402_1%R306 2.05K_0402_1%

L53

1

C504

2

Close to SB

SB_14.318M<15>

CPU_LDT_REQ#

H_PROCHOT#<6>

H_PWRGD<6,43>

LDT_STOP#<6,11>

LDT_RST#<6>

H_PROCHOT# H_PWRGD LDT_STOP# LDT_RST#

B

NB_RST#_R SB_RX0P_C

SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

12 12

+SB_PCIEVDD

CLK_SBSRC_BCLK CLK_SBSRC_BCLK#

SB_14.318M

SB_32KHI

SB_32KHO

U15A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

RTC XTAL

F23 F24

F22 G25 G24

218S7EALA11FG_BGA528_SB710

RTC XTAL

ALLOW_LDTSTP PROCHOT# LDT_PG LDT_STP# LDT_RST#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

CPU

C

PCICLK5/GPIO41

PCI CLKS

PCI INTERFACE

CLOCK GENERATOR

LPC

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

INTRUDER_ALERT#

RTC

C

D

P4

PCICLK0

P3

PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCIRST#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0# REQ1# REQ2#

REQ3#/GPIO70 REQ4#/GPIO71

GNT0# GNT1#

GNT2# GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

LOCK#

INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

VBAT

SBR1@

2008/04/14 2009/04/14

PCI_CLK2

P1

PCI_CLK3

P2

PCI_CLK4

T4

PCI_CLK5

T3

N1

U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3

PCI_AD23

Y2

PCI_AD24

AA2

PCI_AD25

AB4

PCI_AD26

AA1

PCI_AD27

AB3

PCI_AD28

AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

CLK_PCI_EC1

G22

CLK_PCI_SIOC

E22

LPC_AD0

H24

LPC_AD1

H23

LPC_AD2

J25

LPC_AD3

J24

LPC_FRAME#_SB

H25 H22 AB8

FELICA_PWR

AD7

SERIRQ

V15

RTC_CLK

C3 C2 B2

+SB_VBAT

0.1U_0402_16V4Z

Compal Secret Data

T17PAD T17PAD T18PAD T18PAD

T15PAD T15PAD

T16PAD T16PAD

STRAP PIN

1

C509

2

Deciphered Date

LPC_AD0 <32,33> LPC_AD1 <32,33> LPC_AD2 <32,33> LPC_AD3 <32,33>

FELICA_PWR <26>

SERIRQ <32,33>

RTC_CLK <23>

+SB_VBAT

1

C510

2

1U_0402_6.3V4Z

PCI_CLK2 <23> PCI_CLK3 <23> PCI_CLK4 <23> PCI_CLK5 <23>

PCI_AD23 <23> PCI_AD24 <23> PCI_AD25 <23> PCI_AD26 <23> PCI_AD27 <23> PCI_AD28 <23>

R308 22_0402_5%R308 22_0402_5% R310 22_0402_5%R310 22_0402_5%

R316

R316 120_0402_5%

120_0402_5%

1 2

W=20mils

D

1 2 1 2

R960 0_0402_5%R960 0_0402_5%

1 2

D76

CH751H-40PT_SOD323-2

@

+RTCVCC

R317

R317 120_0402_5%

120_0402_5%

1 2

2

J1

2

JUMP_43X39@J1JUMP_43X39@

1

E

@

CLK_PCI_EC CLK_PCI_SIO2

21

R184 1K_0402_5%R184 1K_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

@

1 2

R303 100_0402_5%

@

1 2

R369 100_0402_5%

CLK_PCI_EC <23,32> CLK_PCI_SIO2 <23,33>

LPC_FRAME# <32,33>

R961

12

300_0402_5%

@

D10

12

C297

SB700-PCIE/PCI/ACPI/LPC/RTC

3

1

2

BAS40-04_SOT23-3

2

0.1U_0402_16V4Z

Compal Electronics, Inc.

LA-5381P

@

C501 100P_0402_50V8J

1 2

C503 100P_0402_50V8J

1 2

@

+3VS

+RTCBATT

1

+CHGRTC

19 46Friday, April 10, 2009

of

E

of

0.2

A

B

C

D

E

Reserve for EMI request

@

CLK_48M_USB

U15D

SB700

HD AUDIO

SB700

USB OC

INTEGRATED uC

ACPI / WAKE UP EVENTS

1 1

PM_SLP_S3#<32> PM_SLP_S5#<32> PBTN_OUT#<32>

EC_RSMRST#<32>

CR_WAKE#<31>

SB_SPKR<29>

1 2 1 2 1 2 1 2

1 2 1 2

TV_DET<27>

H_THERMTRIP#<6>

+3VS

CR_CPPE#<31>

SB_PWRGD<32,43> SUS_STAT#<11,14>

GATEA20<32>

KB_RST#<32>

EC_SCI#<32>

EC_SMI#<32>

EC_SWI#_R<25,32>

NB_PWRGD<11>

R547 0_0402_5%HDMI@R547 0_0402_5%HDMI@

R400 4.7K_0402_5%

HDA_BITCLK HDA_SDOUT

HDA_SDIN0 HDA_SDIN1

HDA_SYNC

HDARST#

+3VS

2 2

3 3

1 2

R388 4.7K_0402_5%R388 4.7K_0402_5%

+3VALW

1 2

R320 2.2K_0402_5%@R320 2.2K_0402_5%@

1 2

R321 2.2K_0402_5%@R321 2.2K_0402_5%@

1 2

R322 2.2K_0402_5%@R322 2.2K_0402_5%@

1 2

R561 1K_0402_5%R561 1K_0402_5%

EC_RSMRST#

12

R327 100K_0402_5%R327 100K_0402_5%

+3VS

R328 1.2K_0402_5%R328 1.2K_0402_5%

1 2

R329 1.2K_0402_5%R329 1.2K_0402_5%

1 2

+3VALW

R331 2.2K_0402_5%R331 2.2K_0402_5%

1 2

R332 2.2K_0402_5%R332 2.2K_0402_5%

1 2

STRAP PIN

SUS_STAT#

SB_TEST2 SB_TEST1

SB_TEST0

SMB_CK_CLK0<8,9,15,25> SMB_CK_DAT0<8,9,15,25> SMB_CK_CLK1<27>

SMB_CK_CLK0 SMB_CK_DAT0

SMB_CK_CLK1 SMB_CK_DAT1

HDA_BITCLK_CODEC<29> HDA_BITCLK_MDC<26> HDA_SDOUT_MDC<26>

HDA_SDOUT_CODEC<29> HDA_SDIN0<29> HDA_SDIN1<26>

HDA_SYNC_MDC<26>

HDA_SYNC_CODEC<29>

HDA_RST#_CODEC<29>

HDA_RST#_MDC<26>

HDARST#<23>

R333 33_0402_5%R333 33_0402_5% R334 33_0402_5% RJ11@R334 33_0402_5% RJ11@ R335 33_0402_5% RJ11@R335 33_0402_5% RJ11@ R336 33_0402_5%R336 33_0402_5%

R337 33_0402_5% RJ11@R337 33_0402_5% RJ11@ R338 33_0402_5%R338 33_0402_5%

R339 33_0402_5%R339 33_0402_5% R340 33_0402_5% RJ11@R340 33_0402_5% RJ11@

SMB_CK_DAT1<27>

HPD<11,18>

EC_LID_OUT#<32>

EXP_CPPE#<25>

USB_OC#2<24,32>

USB_OC#0<26,32>

LAN_DSM#<28>

EC_RSMRST#

CR_WAKE#

TV_DET SB_SPKR

SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1

@

1 2

EC_LID_OUT# EXP_CPPE# USB_OC#2 USB_OC#0

LAN_DSM#

PM_SLP_S5# PBTN_OUT# SB_PWRGD SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0 GATEA20 KB_RST# EC_SCI# EC_SMI#

EC_SWI#_R CR_CPPE#EC_SWI#_R H_THERMTRIP# NB_PWRGD

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

218S7EALA11FG_BGA528_SB710 SBR1@

Part 4 of 5

USBCLK/14M_25M_48M_OSC

INTEGRATED uC

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N USB_FSD12P

USB_FSD12N

USB 1.1

USB_HSD11P

USB_HSD11N

USB_HSD10P

USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N USB_HSD3P

USB_HSD3N

GPIO

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

C8 G8

E6 E7

F7 E8

H11 J10

E11 F11

A11 B11

C10 D10

G11 H12

E12 E14

C12 D12

B12 A12

G12 G14

H14 H15

A13 B13

B14 A14

A18 B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

CLK_48M_USB USB_RCOMPPM_SLP_S3#

USB10_P12 USB10_N12

USB20_P11 USB20_N11

USB20_P10 USB20_N10

USB20_P9 USB20_N9

USB20_P8 USB20_N8

USB20_P7 USB20_N7

USB20_P6 USB20_N6

USB20_P5 USB20_N5

USB20_P4 USB20_N4

USB20_P3 USB20_N3

USB20_P2 USB20_N2

USB20_P1 USB20_N1

USB20_P0 USB20_N0

1 2

R32311.8K_0402_1% R32311.8K_0402_1%

GPIO16 <23> GPIO17 <23>

CLK_48M_USB <15>

USB10_P12 <26> USB10_N12 <26>

USB20_P11 <27> USB20_N11 <27>

USB20_P10 <27> USB20_N10 <27>

USB20_P9 <26> USB20_N9 <26>

USB20_P8 <27> USB20_N8 <27>

USB20_P7 <26> USB20_N7 <26>

USB20_P6 <26> USB20_N6 <26>

USB20_P5 <25> USB20_N5 <25>

USB20_P4 <24> USB20_N4 <24>

USB20_P3 <26> USB20_N3 <26>

USB20_P2 <24> USB20_N2 <24>

USB20_P1 <26> USB20_N1 <26>

USB20_P0 <26> USB20_N0 <26>

STRAP PIN STRAP PIN

@

1 2

R311 100_0402_5%

USB-13 Touch Screen

Swap USB port 5 and port 11 for TV tuner issue

USB-11 TV Tuner

USB-10 GPS

USB-9 Int Camera

USB-8 WiFi

USB-7 Finger Printer

USB-6 Bluetooth

USB-5 New Card

USB-4 Left side

USB-3 Felica

USB-2 eSATA

USB-1 Right side

USB-0 Right side

@

C617 100P_0402_50V8J

1 2

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SB700 USB/AC9 7

LA-5381P

20 46Friday, April 10, 2009

of

E

of

0.2Custom

A

B

C

D

E

1 1

R342 1K_0402_1%R342 1K_0402_1%

+PLLVDD_SATA

C523

+XTLVDD_SATA

SATA_TX0+ SATA_TX0-

SATA_RX0SATA_RX0+

SATA_TX1+ SATA_TX1-

SATA_RX1SATA_RX1+

SATA_TX2+ SATA_TX2-

SATA_RX2SATA_RX2+

SATA_TX3+ SATA_TX3-

SATA_RX3SATA_RX3+

12

SATA_CAL

SATA_X1 SATA_X2

SATA_TX0+<24>

SSD

HDD

eSATA

ODD

2 2

+1.2V_HT

+3VS

3 3

SATA_TX0-<24>

SATA_RX0-<24> SATA_RX0+<24>

SATA_TX1+<24> SATA_TX1-<24>

SATA_RX1-<24> SATA_RX1+<24>

SATA_TX2+<24> SATA_TX2-<24>

SATA_RX2-<24> SATA_RX2+<24>

SATA_TX3+<24> SATA_TX3-<24>

SATA_RX3-<24> SATA_RX3+<24>

L54

BLM18PG121SN1D_0603

12

C522

2.2U_0603_6.3V6K

L55

12

C524

1U_0402_6.3V4Z

R343 10K_0402_5%R343 10K_0402_5%

1 2

+3VS

SATA_LED#<34>

2

1

0.1U_0402_16V4Z

2

1

C625

1

2

0.1U_0402_16V4Z

U15B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

218S7EALA11FG_BGA528_SB710

SBR1@

SB700

Part 2 of 5

SATA PWR SERIAL ATA

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

HW MONITOR

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ

IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15 J1

M8

SIDE_PORT_EN#

M5

MUXLESS_EN#

M7

FM_I2CCLK

P5

FM_I2CDAT

P8

FM_I2C_INT#

R8 C6

LAN_ISOLATE#

B6 A6

SPK_SEL

A5

EC_THERM#

B5

ACIN_SB

A4

BT_DET#

B4

CIR_DET

C4

SLP_CHG

D4

SLP_CHG_M3

D5

SLP_CHG_M4

D6 A7

LFB_ID1

B7

+SB_AVDD

F6 G7

C525

0.1U_0402_16V4Z

1

2

1

C526

2.2U_0603_6.3V6K

2

FM_I2CCLK <26>

FM_I2CDAT <26>

FM_I2C_INT# <26>

LAN_ISOLATE# <28>

SPK_SEL <29> EC_THERM# <32>

BT_DET# <26>

SLP_CHG <24>

SLP_CHG_M3 <24> SLP_CHG_M4 <24>

L56

0_0603_5%

+3VS

2 1

CH751H-40PT_SOD323-2

1 2

R562 150K_0402_5%R562 150K_0402_5%

+3VALW

DISABLEENABLE

SIDE PORT

MUXLESS

01

GPIO48,GPIO49 GOT INTERNAL PU 8.2K TO S0

R195

@ R195

@

1 2

@ R193

@

1 2

D41

10K_0402_5%

R193 10K_0402_5%

10K_0402_5%

+3VALW

SIDE_PORT_EN#

MUXLESS_EN#

ACIN <32,34,36>

SIDE@ R196

SIDE@

1 2

@ R194

@

1 2

R196 1K_0402_5%

1K_0402_5%

R194 1K_0402_5%

1K_0402_5%

LAN_ISOLATE#

SLP_CHG SLP_CHG_M3 SLP_CHG_M4LFB_ID0

CIR_DET

R554 1K_0402_5%

R554 1K_0402_5% R557 100K_0402_5%R557 100K_0402_5%

1 2

R571 100K_0402_5%R571 100K_0402_5%

1 2

R572 100K_0402_5%R572 100K_0402_5%

1 2

R582 100K_0402_5%R582 100K_0402_5%

CIR@

+3VS

12 12

+3VS

@

12

R570100K_0402_5%@R570100K_0402_5%

+3VALW

LFB_ID0LFB_ID1

Hynix

Samsung

@ R189

@

1 2

SAMSIDE@ R191

SAMSIDE@

1 2

C51610P_0402_50V8J C51610P_0402_50V8J

12

Y4

25MHZ_20P

4 4

Y4

C51710P_0402_50V8J C51710P_0402_50V8J

12

R341

10M_0402_5%

SATA_X1

SATA_X2

+3VALW

R189 10K_0402_5%

10K_0402_5%

R191 10K_0402_5%

10K_0402_5%

00

01

SIDE@ R192

LFB_ID1

LFB_ID0

SIDE@

1 2

HYNSIDE@ R190

HYNSIDE@

1 2

R192 10K_0402_5%

10K_0402_5%

R190 10K_0402_5%

10K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SB700 SATA/IDE/SPI

LA-5381P

21 46Friday, April 10, 2009

of

E

of

0.2

A

+3VS

C528 22U_0805_6.3V6M@C528 22U_0805_6.3V6M@

1 1

2 2

3 3

+1.2V_HT

C531 1U_0402_6.3V4Z@C531 1U_0402_6.3V4Z@ C530 1U_0402_6.3V4Z@C530 1U_0402_6.3V4Z@ C533 1U_0402_6.3V4Z@C533 1U_0402_6.3V4Z@ C536 1U_0402_6.3V4Z@C536 1U_0402_6.3V4Z@ C535 1U_0402_6.3V4Z@C535 1U_0402_6.3V4Z@ C539 0.1U_0402_16V4Z@C539 0.1U_0402_16V4Z@ C541 0.1U_0402_16V4Z@C541 0.1U_0402_16V4Z@ C542 0.1U_0402_16V4Z@C542 0.1U_0402_16V4Z@

12

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

L61

0_0805_5%

12

C552 4.7U_0805_10V6KC552 4.7U_0805_10V6K C553 1U_0402_6.3V4Z @C553 1U_0402_6.3V4Z @

1 2

C555 1U_0402_6.3V4ZC555 1U_0402_6.3V4Z

1 2

C554 1U_0402_6.3V4ZC554 1U_0402_6.3V4Z

1 2

C558 1U_0402_6.3V4ZC558 1U_0402_6.3V4Z

1 2

C557 0.1U_0402_16V4ZC557 0.1U_0402_16V4Z

1 2

C560 0.1U_0402_16V4ZC560 0.1U_0402_16V4Z

1 2

L63

0_0805_5%

C566 22U_0805_6.3V6MC566 22U_0805_6.3V6M C567 1U_0402_6.3V4ZC567 1U_0402_6.3V4Z

1 2

C568 1U_0402_6.3V4ZC568 1U_0402_6.3V4Z

1 2

C571 0.1U_0402_16V4ZC571 0.1U_0402_16V4Z

1 2

C572 0.1U_0402_16V4ZC572 0.1U_0402_16V4Z

1 2

+3VALW

L66

0_0805_5%

C576 10U_0805_10V6KC576 10U_0805_10V6K

1 2

C577 10U_0805_10V6KC577 10U_0805_10V6K

1 2

C580 1U_0402_6.3V4ZC580 1U_0402_6.3V4Z

1 2

C581 1U_0402_6.3V4ZC581 1U_0402_6.3V4Z

1 2

C583 0.1U_0402_16V4ZC583 0.1U_0402_16V4Z

1 2

C582 0.1U_0402_16V4ZC582 0.1U_0402_16V4Z

1 2

C584 0.1U_0402_16V4ZC584 0.1U_0402_16V4Z

1 2

+3VS

+PCIE_VDDR

12

+1.2V_SATA

12

+AVDD_USB

12

B

U15C

L9

M9

T15

U9 U16 U17

V8

W7

Y6 AA4 AB5

AB21

Y20

AA21 AA22 AE25

P18 P19 P20 P21 R22 R24 R25

AA14 AB18 AA15 AA17 AC18 AD17 AE17

A16 B16 C16 D16 D17 E17 F15 F17 F18 G15 G17 G18

218S7EALA11FG_BGA528_SB710 SBR1@

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12

VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4

PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7

AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7

AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

SATA I/O

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

3.3V_S5 I/OCORE S5

S5_1.2V_1 S5_1.2V_2

USB_PHY_1.2V_1 USB_PHY_1.2V_2

V5_VREF AVDDCK_3.3V AVDDCK_1.2V

AVDDC

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

G2 G4

A10 B10

AE7 J16 K17 E9

+1.2V_HT_R

+1.2V_HT

+S5_3V

+S5_1.2V

+1.2_USB

+V5_VREF +AVDDCK_3.3V +AVDDCK_1.2V +AVDDC

C

1 2

R593 0_0805_5%R593 0_0805_5%

1 2

+1.2V_HT

1 2

R564 0_0805_5%R564 0_0805_5%

1 2

L65 0_0603_5%L65 0_0603_5%

1 2

2

C578

0.1U_0402_16V4Z

1

L67

0_0603_5%

12 12 12 12 12 12

12 12

C5321U_0402_6.3V4Z C5321U_0402_6.3V4Z

12

C5341U_0402_6.3V4Z C5341U_0402_6.3V4Z

12

C5381U_0402_6.3V4Z C5381U_0402_6.3V4Z

12

C5371U_0402_6.3V4Z C5371U_0402_6.3V4Z

12

C5270.1U_0402_16V4Z C5270.1U_0402_16V4Z

12

C5400.1U_0402_16V4Z C5400.1U_0402_16V4Z

12

+3VALW

C55622U_0805_6.3V6M @ C55622U_0805_6.3V6M @ C5592.2U_0603_6.3V6K C5592.2U_0603_6.3V6K C5612.2U_0603_6.3V6K C5612.2U_0603_6.3V6K C5621U_0402_6.3V4Z C5621U_0402_6.3V4Z C5630.1U_0402_16V4Z C5630.1U_0402_16V4Z C5640.1U_0402_16V4Z C5640.1U_0402_16V4Z C5650.1U_0402_16V4Z C5650.1U_0402_16V4Z

+1.2VALW

C57310U_0805_10V6K @ C57310U_0805_10V6K @ C5741U_0402_6.3V4Z C5741U_0402_6.3V4Z C5750.1U_0402_16V4Z C5750.1U_0402_16V4Z

2

C579

1U_0603_10V4Z

1

12

12 12

+1.2V_HT

C52910U_0805_10V6K C52910U_0805_10V6K

CH751H-40PT_SOD323-2

+3VALW

C5852.2U_0603_6.3V6K C5852.2U_0603_6.3V6K C5860.1U_0402_16V4Z C5860.1U_0402_16V4Z

L64 0_0603_5%L64 0_0603_5%

D14

R3461K_0402_5% R3461K_0402_5%

12 21

12 12

+5VS +3VS

1

C855

@

0.1U_0402_16V7K

2

D

U15E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

+1.2VALW

C5691U_0402_6.3V4Z C5691U_0402_6.3V4Z C5701U_0402_6.3V4Z C5701U_0402_6.3V4Z

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

H18

PCIE_CK_VSS_1

J17

PCIE_CK_VSS_2

J22

PCIE_CK_VSS_3

K25

PCIE_CK_VSS_4

M16

PCIE_CK_VSS_5

M17

PCIE_CK_VSS_6

M21

PCIE_CK_VSS_7

P16

PCIE_CK_VSS_8

F9

AVSSC

Part 5 of 5

218S7EALA11FG_BGA528_SB710

SBR1@

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42

GROUND

VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

E

L68

+AVDDCK_1.2V

+AVDDCK_3.3V

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

L68

12

0_0603_5%

L69

0_0603_5%

2008/04/14 2009/04/14

+1.2V_HT

C5872.2U_0603_6.3V6K C5872.2U_0603_6.3V6K

12

C5880.1U_0402_16V4Z C5880.1U_0402_16V4Z

12

+3VS

C5892.2U_0603_6.3V6K C5892.2U_0603_6.3V6K

12

C5900.1U_0402_16V4Z C5900.1U_0402_16V4Z

12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SB700 Power/GND

LA-5381P

22 46Friday, April 10, 2009

of

E

of

0.2Custom

A

B

C

D

E

REQUIRED STRAPS

PCI_CLK3

PULL

1 1

2 2

HIGH

PULL LOW

PCI_CLK2<19> PCI_CLK3<19> PCI_CLK4<19> PCI_CLK5<19>

CLK_PCI_EC<19,32>

CLK_PCI_SIO2<19,33>

RTC_CLK<19>

HDARST#<20>

GPIO17<20> GPIO16<20>

BOOTFAIL TIMER ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

+3VS +3VS +3VS +3VS +3VALW +3VALW+3VALW +3VALW +3VALW+3VALW

R347

10K_0402_5%

@

R357

10K_0402_5%

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

12

R348

@

12

R358

12

10K_0402_5%

12

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

R349

@

R359

@

12

10K_0402_5%

12

10K_0402_5%

RESERVED

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

R350

10K_0402_5%

@

R360

10K_0402_5%

@

LPC_CLK0

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

12

R351

@

12

R361

12

10K_0402_5%

12

10K_0402_5%

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

R352

10K_0402_5%

@

R362

10K_0402_5%

RTC_CLKLPC_CLK1

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

R353

10K_0402_5%

@

R363

2.2K_0402_5%

@

12

AZ_RST_CD#

EC ENABLED

GP17

GP16PCI_CLK2

Internal pull up

H,H = Reserved H,L = SPI ROM

EC DISABLED

DEFAULT

R354

10K_0402_5%

@

12

L,H = LPC ROM (Default)

L,L = FWH ROM

12

R355

R356

2.2K_0402_5%

@

SI2: mount 2.2K

R364

10K_0402_5%

12

R365

2.2K_0402_5%

12

R366

2.2K_0402_5%

@

Need to confirm if SB SPI ROM will mount

12

2.2K_0402_5%

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

R374

@

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

12

R375

2.2K_0402_5%

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCI_AD28

PULL

3 3

PCI_AD28<19> PCI_AD27<19> PCI_AD26<19> PCI_AD25<19> PCI_AD24<19> PCI_AD23<19>

4 4

A

HIGH

PULL LOW

B

USE LONG RESET

DEFAULT

USE SHORT RESET

R373

@

12

2.2K_0402_5%

C

PCI_AD25 PCI_AD24

USE IDE PLL

DEFAULT

BYPASS IDE PLL

R376

@

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

12

R377

2.2K_0402_5%

@

2008/04/14 2009/04/14

12

2.2K_0402_5%

PCI_AD23

RESERVED

12

R378

2.2K_0402_5%

@

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SB700 STRAPS

LA-5381P

23 46Friday, April 10, 2009

of

E

of

0.2

A

SATA HDD0 Conn. SSD Conn.

+5VS

1.2A

Place closely JHDD0 SATA CONN.

1

C387

C387 10U_0805_10V4Z

10U_0805_10V4Z

2

1 1

SSD HDD need 400mA for 3V(PHISON)

+3VS

+3VS rail reserve for SSD

1

C336

C336 10U_0805_10V4Z

10U_0805_10V4Z

2

@

1

C388

0.1U_0402_16V4Z

2

1

C337

0.1U_0402_16V4Z

2

@

1

C389

0.1U_0402_16V4Z

2

1

C338

0.1U_0402_16V4Z

2

@

1

C390

0.1U_0402_16V4Z

2

1

C339

0.1U_0402_16V4Z

2

@

B

C

D

E

SATA ODD Conn

+3VS

SSD HDD need 400mA for 3V(PHISON)

+3VS rail reserve for SSD

1

C194

SSD@

10U_0805_10V4Z

2

1

C195

SSD@

0.1U_0402_16V4Z

2

1

2

C196

SSD@

0.1U_0402_16V4Z

1

C197

SSD@

0.1U_0402_16V4Z

2

+5VS

1.1A

1

C414

C414 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C415

@

10U_0805_10V4Z

2

1

C416

@

1U_0402_6.3V4Z

2

1

C417

0.1U_0402_16V4Z

2

Place component's closely ODD CONN.

1

C418

0.1U_0402_16V4Z

2

JHDD0

2 2

23

GND

24

GND

SANTA_195601-1_RV

GND

GND GND GND

GND

LED

GND

@JHDD0

@

1

A+ A-

BB+

V33 V33 V33

V5 V5 V5

V12 V12 V12

SATA_C_TX1-

3 4

SATA_C_RX1- SATA_C_RX0+

5

SATA_C_RX1+

6 7

8 9 10

11 12 13 14 15 16 17 18 19 20 21 22

SATA_C_TX1+

2

C512 0.01U_0402_25V7KC512 0.01U_0402_25V7K

1 2

C513 0.01U_0402_25V7KC513 0.01U_0402_25V7K

1 2

C410 0.01U_0402_25V7KC410 0.01U_0402_25V7K

1 2

C412 0.01U_0402_25V7KC412 0.01U_0402_25V7K

1 2

+3VS

+5VS

SATA_TX1+ <21>

SATA_TX1- <21>

SATA_RX1- <21> SATA_RX1+ <21>

JSSD

17 18

SANTA_285002-1_RV

E-SATA/USB

12

R949

R949 75K_0402_1%

75K_0402_1%

12

R951

R951 51K_0402_1%

51K_0402_1%

AO3413_SOT23

FUNCTIONSLP_CHG

D=1D

D=2D

Q6

D

1 3

2

+USB_VCCB

12

S

G

R952

R952 43K_0402_1%

43K_0402_1%

R950

R950 51K_0402_1%

51K_0402_1%

+USB_VCCB+USB_VCCC

USB_EN#

+3VALW

0.1U_0402_16V4Z

U52

USB20_P2_R_U

3 3

4 4

USB20_N2_R_U

USB20_P2<20>

USB20_N2<20>

SLP_CHG_M3<21> SLP_CHG_M4<21>

+USB_VCCB

U52

1

1D+

2

1D-

3

2D+

4

2DGND5OE#

TS3USB221RSER_QFN10_2x1P5

USB20_P2_R_U USB20_N2_R_U

2

C354

0.1U_0402_16V4Z

1

10

VCC

9

S

8

D+

7

D-

6

U53

1

1OE#

4

2OE#

10

3OE#

13

4OE#

2

1A

5

2A

9

3A

12

4A

14

VCC

SN74CBT3125PWRG4_TSSOP14

SLP_CHG_M3

Mode 3

Mode 4

HIGH

LOW HIGH

A

0.1U_0402_16V4Z

C353

1 2

USB20_P2_R USB20_N2_R

USB20_P2_S_O

3

1B

USB20_N2_S_O

6

2B

R111 100_0402_5%R111 100_0402_5%

8

3B

11

4B

7

GND

SLP_CHG_M4

LOW

SLP_CHG <21>

1 2

+5VALW

+USB_VCCB

USB20_P2_S_O USB20_N2_S_O

USB_EN#<26,32>

Add pull high at DVT-2

R568 100K_0402_5%R568 100K_0402_5%

1 2

LOW

HIGH

B

GND GND

@JSSD

@

1

GND

A+

A-

GND

B-

B+

GND

V33

V33 GND GND

V5 V5

R Rsv1 Rsv2

150U_B2_6.3VM_R45M

+USB_VCCB

SATA_C_TX0+

2

SATA_C_TX0-

3 4

SATA_C_RX0-

5 6 7

8 9 10 11 12 13 14 15 16

+USB_VCCB

0.1U_0402_16V4Z

1

+

C352

2

SATA_TX2+<21> SATA_TX2-<21>

SATA_RX2-<21> SATA_RX2+<21>

1

2

D15

4

VIN

3

IO2

CM1293A-02SR SOT143-4

C350

USB20_P2_R_S USB20_N2_R

Change at PVT

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SSD@

SSD@ SSD@

SSD@

C514 0.01U_0402_25V7K

1 2

C515 0.01U_0402_25V7K

1 2

C411 0.01U_0402_25V7K

1 2

C413 0.01U_0402_25V7K

1 2

SSD@

SSD@ SSD@

SSD@

+3VS

USB_CHG_EN#<32>

1

C351

2

1000P_0402_50V7K

C520 0.01U_0402_25V7KC520 0.01U_0402_25V7K

1 2

C521 0.01U_0402_25V7KC521 0.01U_0402_25V7K

1 2

C361 0.01U_0402_25V7KC361 0.01U_0402_25V7K C357 0.01U_0402_25V7KC357 0.01U_0402_25V7K

@

USB20_N2_R_S

2

IO1

1

GND

2008/04/14 2009/04/14

C

1 2 3 4

Share With USB

12 12

USB20_P2_R

Compal Secret Data

SATA_TX0+ <21>

SATA_TX0- <21>

SATA_RX0- <21> SATA_RX0+ <21>

U19

GND

OUT

IN

OUT OUT

IN

FLG

EN#

G528_SO8

+USB_VCCB

W=60mils

USB20_N2_R_S USB20_P2_R_S

SATA_C_TX2+ SATA_C_TX2-

SATA_C_RX2SATA_C_RX2+

R86 0_0402_5%R86 0_0402_5%

1 2

L46

1

4

WCM-2012-900T_0805

R89 0_0402_5%R89 0_0402_5%

1 2

Deciphered Date

8 7 6 5

+USB_VCCB+5VALW

1.4A

1 2 3 4

5 6 7 8

9 10 11

15 14

SANTA_206401-1_RV

R584

1 2

0_0402_5%

1

C367

@

4.7U_0805_10V4Z

2

JESATA

USB

VBUS DD+ GND

GND A+

ESATA

AGND

SHIELD

B-

SHIELD

B+

SHIELD

GND

SHIELD

TYCO_1909574-1

@

@L46

@

USB20_P2_R_S

2

USB20_N2_R_S

3

D

JODD

GND GND

12 13 14 15

@JODD

@

1

GND

GND GND

A+

AB-

B+

DP +5V +5V MD

SATA_C_TX3+

2

SATA_C_TX3-

3 4

SATA_C_RX3-

5

SATA_C_RX3+

6 7

8 9 10 11 12 13

C518 0.01U_0402_25V7KC518 0.01U_0402_25V7K

1 2

C519 0.01U_0402_25V7KC519 0.01U_0402_25V7K

1 2

C424 0.01U_0402_25V7KC424 0.01U_0402_25V7K

1 2

C425 0.01U_0402_25V7KC425 0.01U_0402_25V7K

1 2

+5VS

LEFT USB

USB_OC#2 <20,32>

+USB_VCCC

W=60mils

USB20_N4_R USB20_P4_R

1

C355

2

2200P_0402_50V7K

R70 0_0402_5%R70 0_0402_5%

1 2

L52

USB20_P4<20>

USB20_N4<20>

Title

Size Document Number Rev

Date: Sheet

1

4

WCM-2012-900T_0805

R77 0_0402_5%R77 0_0402_5%

1 2

Compal Electronics, Inc.

SATA HDD/ODD

LA-5381P

E

@

2

3

SATA_TX3+ <21> SATA_TX3- <21>

SATA_RX3- <21> SATA_RX3+ <21>

JUSBB1

1

2

3

4

5

6

ACES_85202-0605L

@

USB20_P4_R

USB20_N4_R

24 46Friday, April 10, 2009

of

0.2Custom

5

4

3

2

1

B-CAS Circuit

D D

BCPWON<27> CPLGP1<27>

TV@

RB7

10K_0402_5%

+5VS_BCAS +5VS_L_BCAS

1 2

FBMA-L11-201209-221LMA30T_0805

1

2

1

CB5

TV@

2

1U_0402_6.3V4Z

CB4

TV@

0.1U_0402_16V4Z

C C

12

TV@

LB1

+5VALW

12

RB2

RB2 100K_0402_5%

100K_0402_5%

TV@

13

D

QB3

TV@

QB3

TV@

2

G

S

2N7002_SOT23-3

Add CB6 for soft start

RB5

12

47K_0402_5%

TV@

CB2

0.01U_0402_25V7K

@

RB8

2.2K_0402_5%

12 11

ACES_85201-10051

New Card

+3VALW

CP_USB#

1 2

RN1 100K_0402_5%RN1 100K_0402_5%

EXP_CPPE#

1 2

RN2 100K_0402_5%RN2 100K_0402_5%

B B

A A

1 2

RN3 100K_0402_5%RN3 100K_0402_5%

PLT_RST#

RN5

10K_0402_5%

RCLKEN

2

G

Q21

2N7002_SOT23-3

@

5

+3VS +3VS

+3VS

12

@

CLKREQ#

13

D

S

RN4

10K_0402_5%

@

12

2 1

CLKREQ# CLKREQ_NCARD#

+5VS

TV@

1

CB6

0.1U_0402_16V7K

S

2

1

2 12

JBCAS1

GND

B A

S

G

2

D

1 3

1

TV@

CB3

4.7U_0603_6.3V6K

2

@JBCAS1

@

1010GND

9

8

7

6

5

4

3

2

1

5

2

UN2

CLKREQ_NCARD#

4

Vcc

Y

G

NC7SZ32P5X_NL_SC70-5

3

@

1 2

RN6 0_0402_5%RN6 0_0402_5%

TV@

QB1

QB1 AO3413_SOT23-3

AO3413_SOT23-3

B_XBCCLK B_BCRST

RB10 470_0402_5%TV@RB10 470_0402_5%TV@

BCIO

+1.5VS_CARD

CN7

0.1U_0402_16V4Z

@

4

TV@

1

CB1

4.7U_0603_6.3V6K

2

+5VS_L_BCAS

BCCDET

12

Imax = 0.75A

1

CN5

10U_0805_10V6K

2

CLKREQ_NCARD# <15>

+5VS_L_BCAS

5

UB1

TV@UB1

+5VS_BCAS

BCCDET <27>

BCRSTM<27>

XBCLKM<27>

BCRSTM

XBCLKM

1 2

+3VS_CARD

TV@

P

A

4

O

B

G

NC7ST08P5X_NL _SC70

3

5

UB2

TV@UB2

TV@

P

A

4

O

B

G

NC7ST08P5X_NL _SC70

3

B_R_BCRST

B_R_XBCCLK

TV@

1 2

RB9 100_0402_5%

TV@

1 2

RB11 100_0402_5%

B_BCRST

B_XBCCLK

+3VALW_CARD

Imax = 0.275AImax = 1.35A

1

CN6

0.1U_0402_16V4Z

2

PLT_RST#<11,14,19,27,28,31,32,33>

1

CN3

10U_0805_10V6K

2

+3VS +3VS_CARD

+3VALW

PLT_RST#

SYSON<32,35,41>

SUSP#<29,32,35,38,40>

SYSON

SUSP# EXP_CPPE# CP_USB# RCLKEN

1

CN4

0.1U_0402_16V4Z

2

UN1

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

Thermal_Pad

RCLKEN

TPS2231MRGPR-2 QFN 20P

1.5Vout

3.3Vout

OC#

PERST#

GND

NC

60mils

11 13

40mils

3 5

40mils

15 19 8 16 7 21

PERST#

1

CN1

CN1 10U_0805_10V6K

10U_0805_10V6K

2

+1.5VS_CARD+1.5VS

+3VALW_CARD

Change UN1 from SA000029E00 to SA00001SL20

Security Classification

2008/10/06 2009/10/06

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/06 2009/10/06

3

Compal Secret Data

Deciphered Date

+5VS_L_BCAS

CPLGP1

1

CN2

0.1U_0402_16V4Z

2

RB1

TV@RB1

TV@

1 2

10K_0402_5%

CLK_PCIE_NCARD#<15> CLK_PCIE_NCARD<15>

PCIE_PTX_C_IRX_N0<10> PCIE_PTX_C_IRX_P0<10>

PCIE_ITX_C_PRX_N0<10> PCIE_ITX_C_PRX_P0<10>

+5VS_L_BCAS

TV@

2

12

B

RB13

RB13 10K_0402_5%

10K_0402_5%

13

D

TV@

QB2

2

G

2N7002_SOT23-3

S

USB20_N5<20>

USB20_P5<20>

SMB_CK_CLK0<8,9,15,20>

SMB_CK_DAT0<8,9,15,20>

+1.5VS_CARD

EC_SWI#_R<20,32>

+3VALW_CARD

+3VS_CARD

EXP_CPPE#<20>

Title

Size Document Number Rev

Date: Sheet

B

CP_USB#

SMB_CK_CLK0 SMB_CK_DAT0

PERST#

CLKREQ# EXP_CPPE#

Compal Electronics, Inc.

eSATA/NEW CARD

LA-5381P

TV@

1 2

RB12 10K_0402_5%

31

E

QB4

2SB1197K_SOT23-3

C

TV@

1 2

RB14 1.5K_0402_5%

JEXP

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

27 28

SANTA_130801-5_RT

@

1

GND USB_DUSB_D+ CPUSB# RSV RSV SMB_CLK SMB_DATA +1.5V +1.5V WAKE# +3.3VAUX PERST# +3.3V +3.3V CLKREQ# CPPE# REFCLKREFCLK+ GND PERn0 PERp0 GND PETn0 PETp0 GND

GND GND

25 46Friday, April 10, 2009

BCIO <27>

29 30

of

0.2

A

BlueTooth Interface

+3VS

R432

100K_0402_5%

BT@

BT_PWR#<32>

1 1

Add C202 for soft start

BT_RST#<32>

1 2

47K_0402_5%

1 2

R722 0_0402_5%

0.1U_0402_16V7K

0.1U_0402_16V7K R441

BT@R441

BT@

1 2

BT@

0.1U_0402_16V4Z

C481

BT@

2

1

G

2

BT@

C202

0.01U_0402_25V7K

1

C754

@

+3VS

C482

0.1U_0402_16V4Z

BT@

S

Q25

BT@

D

AO3413_SOT23

1 3

Inrush current = 0A

+BT_VCC

USB20_P6<20> USB20_N6<20>

WLAN_BT_CLK<27>

BT_DET#<21>

WLAN_BT_DATA<27>

+3VS

+BT_VCC

C483

4.7U_0805_10V4Z

BT@

R437 0_0402_5%

1 2

R438

(MAX=200mA)

1

0.1U_0402_16V4Z

2

B

BT@

1 2

@R438

@

4.7K_0402_5%

C479

BT@

R439

4.7K_0402_5%

BT@

1 2

JBT

@JBT

@

12

GND2

11

GND1

10

9

8

7

6

5

4

3

2

1

ACES_87213-1000G

C

Right USB Board

USB20_N1<20>

USB20_P1<20>

+5VALW +USB_VCCA

USB_EN#<24,32> USB_OC#0 <20,32>

R109 0_0402_5%R109 0_0402_5%

1 2

L51

1

4

WCM-2012-900T_0805

R110 0_0402_5%R110 0_0402_5%

1 2

1.4A

U25

1

GND IN IN EN#

G528_SO8

OUT OUT OUT FLG

2 3 4

8 7 6 5

D

@L51

@

USB20_N1_R

2

USB20_P1_R

3

W=60mils

1 2

R422 0_0402_5%R422 0_0402_5%

1

C438

@

4.7U_0805_10V4Z

2

E

R107 0_0402_5%R107 0_0402_5%

1 2

L50

USB20_N0<20>

USB20_P0<20>

1

4

WCM-2012-900T_0805

R108 0_0402_5%R108 0_0402_5%

USB20_N0_R USB20_P0_R

USB20_N1_R USB20_P1_R

1

4

1 2

W=60mils

@L50

@

2

3

+USB_VCCA

USB20_N0_R

USB20_P0_R

JUSBB2

1

2

3

4

5

6

7

8

9

10

11

12

13

GND

14

GND

E&T_6905-E12N-00R

@

Finger printer

FP@

0.1U_0402_16V4Z

C468

FP@

C468

1 2

JFP

1

2

3

GND

4

GND

ACES_85201-04051

@JFP

@

5 6

2 2

D18

@

+3VS_FP FM_I2C_INT# USB20_N7

4

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4

USB20_P7

2

IO1

1

+3VS

FP@

R119

1 2

0_0603_5%

USB20_N7<20> USB20_P7<20>

+3VS_FP

USB20_N7 USB20_P7

1 2

R118 0_0603_5%

Add D18 for EMI at PVT

+3VALW

MDC 1.5 Conn.

1

C778

RJ11@

2

3 3

4 4

1

C780

2

0.1U_0402_16V4Z

HDA_SDOUT_MDC<20> HDA_SYNC_MDC<20>

HDA_SDIN1<20> HDA_RST#_MDC<20>

C780

4.7U_0805_10V4Z

RJ11@

HDA_BITCLK_MDC

@ R496

@

C779

RJ11@

1000P_0402_50V7K

Touch Screen

A

RJ11@

1 2

R495 33_0402_5%

C777

@ C777

@

R496

10_0402_5%

1 2

12

10P_0402_50V8J

JTS

@JTS

@

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

JMDC

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

GND13GND14GND15GND16GND17GND

Connector for MDC Rev1.5

+3VS

USB10_P12 USB10_N12

+3VALW

@

2

RES0

4

RES1

6

3.3V

8

GND3

10

GND4

12

IAC_BITCLK

ACES_88018-124G

18

USB10_P12 <20> USB20_P9_LVDS <17> USB10_N12 <20>

B

HDA_BITCLK_MDC <20>

FM Tuner

JFM

@JFM

@

FM_I2CCLK FM_I2CDAT

FM_OUTR FM_OUTL

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1005N

+3VS

FM_I2CCLK<21> FM_I2CDAT<21>

R423

FM_I2C_INT#<21>

1 2

0_0402_5%@

FM_OUTR<29> FM_OUTL<29>

Felica

+FLICA_VCC

C400

FEL@C400

FEL@

JFEL

@JFEL

@

1

USB20_N3

2

USB20_P3

3

4

5

6

12

6

7

G1 G2

ACES_87151-06051

R131

8

0_0603_5%

FEL@

Int. Camera

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

12

0.1U_0402_16V4Z

USB20_N3 <20> USB20_P3 <20>

R430

1 2

+5VS

0_0603_5%

R428

1 2

+5VALW

0_0603_5%

Compal Secret Data

Deciphered Date

@

JCAM

W=20mils

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

@

+CAM_VDD

USB20_N9_R USB20_P9_R

FELICA_PWR<19>

C744

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z R103 0_0402_5%R103 0_0402_5%

1

4

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805 R99 0_0402_5%R99 0_0402_5%

R117 0_0402_5%R117 0_0402_5%

D

100K_0402_5%

2N7002_SOT23-3

Mount R105 and R117 for LVDS with Camera

R105

0_0402_5%

1 2

L57

@L57

@

1

2

3

4

1 2

Q28

FEL@

2

R414

FEL@

G

+5VS

1 2 13

D

S

FM_I2CCLK FM_I2CDAT

0.1U_0402_16V7K

0.1U_0402_16V7K R391 47K_0402_5%

47K_0402_5%

0.01U_0402_25V7K

FM@

1 2

R725 4.7K_0402_5%

FM@

1 2

R726 4.7K_0402_5%

@

1 2

R727 4.7K_0402_5%

C397

FEL@

FEL@R391

FEL@

1 2

FEL@

C204

Inrush current = 0A

2

1

Q20

G

2

AO3413_SOT23-3

1

Add C204 for soft start

USB20_N9_LVDS <17>

2

3

Title

Size Document Number Rev

Date: Sheet

USB20_N9 <20> USB20_P9 <20>

Compal Electronics, Inc.

USB/BT/FingerPrint

LA-5381P

+5VS

E

1 3

S

D

FEL@

+3VS

+FLICA_VCC

26 46Frid ay, April 10, 2009

C403

FEL@C403

FEL@

0.1U_0402_16V4Z

of

0.2Custom

PCIe Mini Card-3G/GPS/TV Tuner (Slot 2)

+1.5VS +3VS

CLKREQ_MCARD1#<15>

CLK_PCIE_MCARD1#<15> CLK_PCIE_MCARD1<15>

PCIE_PTX_C_IRX_N5<10> PCIE_PTX_C_IRX_P5<10>

PCIE_ITX_C_PRX_N5<10> PCIE_ITX_C_PRX_P5<10>

TV_THER2<32>

+UIM_PWR

3G@

CM13

0.1U_0402_16V4Z

XBCLKM<25>

BCCDET<25>

BCRSTM<25>

BCPWON<25>

1

2

+3VS

+UIM_PWR

12

UIM_RESET UIM_CLK

DM1

RLZ20A_LL34

3G@

10P_0402_50V8J

JGPS

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

FOX_AS0B226-S40N-7F

1

CM15

2

3G@

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

1

CM16

CM16 10P_0402_50V8J

10P_0402_50V8J

2

3G@

GND2

@JGPS

@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

1

2

3

DM2

DM2 DAN217_SC59

DAN217_SC59

@

+UIM_PWR UIM_DATA UIM_CLK UIM_RESET COMMON TV_DET

PLT_RST#

USB20_P11 <20> USB20_N11 <20>

USB20_N10 <20> USB20_P10 <20>

LED_WIMAX# <34> CPLGP1 <25> TV_THER1 <32>

1

3

1 2 3

7

MOLEX_47273-0001~D

DM3

DM3 DAN217_SC59

DAN217_SC59

@

2

3G_OFF# <32>

12

J3GSIM

VCC RST CLK

NC

TV_DET <20>

TV@

R185

R185 47K_0402_5%

47K_0402_5%

COMMON UIM_VPP

COMMON

@

4

GND

5

VPP

6

I/O

8

NC

DM4

DAN217_SC59

@

+1.5VS

CM4

0.01U_0402_25V7K

+3VS

CM1

0.01U_0402_25V7K

R820 0_0402_5%3G@R820 0_0402_5%3G@

R821 0_0402_5%TV@R821 0_0402_5%TV@

UIM_VPP

1

2

3

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

2

1 2

+UIM_PWR

CM5

CM2

1

CM6

2

4.7U_0805_10V4Z

1

CM3

2

4.7U_0805_10V4Z

+UIM_PWR

12

RM1

4.7K_0402_5%

@

UIM_DATA

1

CM14

CM14 22P_0402_50V8J

22P_0402_50V8J

2

@

1

2

1

2

BCIO <25>

WUSB or Upconvert (Slot 3)

+3VS +1.5VS

0.1U_0402_16V4Z

1

CM7

2

0.01U_0402_25V7K

CLK_PCIE_MCARD3#<15> CLK_PCIE_MCARD3<15>

PCIE_PTX_C_IRX_N4<10> PCIE_PTX_C_IRX_P4<10>

PCIE_ITX_C_PRX_N4<10> PCIE_ITX_C_PRX_P4<10>

CM8

1

CM9

2

4.7U_0805_10V4Z

+3VS

1

2

0.01U_0402_25V7K

JNAND

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0B226-S40N-7F

CM10

GND2

1

2

@JNAND

@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

0.1U_0402_16V4Z

1

CM11

2

+1.5VS +3VS

1

CM12

2

4.7U_0805_10V4Z

UWB_OFF# <32>

PLT_RST# <11,14,19,25,28,31,32,33>

PCIe Mini Card-WLAN/WiMax (Slot 1)

+3VS

+1.5VS

JWLAN

@JWLAN

1

WLAN_BT_DATA<26> WLAN_BT_CLK<26> CLKREQ_MCARD2#<15>

CLK_PCIE_MCARD2#<15> CLK_PCIE_MCARD2<15>

PCIE_PTX_C_IRX_N2<10> PCIE_PTX_C_IRX_P2<10>

PCIE_ITX_C_PRX_N2<10> PCIE_ITX_C_PRX_P2<10>

+3VS

R823 0_0402_5%R823 0_0402_5%

E51_TXD<32> E51_RXD<32>

1 2 1 2

R824 0_0402_5%R824 0_0402_5%

12

RM7

RM7 100K_0402_5%

100K_0402_5%

3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

@

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

ACES_88911-5204

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

XMIT_OFF#

PLT_RST#

SMB_CK_CLK1 <20> SMB_CK_DAT1 <20>

USB20_N8 <20> USB20_P8 <20>

LED_WIMAX# <34>

Kill SWITCH

+1.5VS

0.1U_0402_16V4Z

1

CM20

0.01U_0402_25V7K

CM17

0.01U_0402_25V7K

LED_WIMAX#

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

+3VS

1

2

Issued Date

CM21

0.1U_0402_16V4Z

CM18

1

CM22

2

4.7U_0805_10V4Z

1

CM19

2

4.7U_0805_10V4Z

WIMAX@

12

RM6100K_0402_5%

1

2

SW1

G2

1

2

+3VS

2008/09/05 2009/09/05

G1

3 2 1

1BS003-1210L_3P

Compal Secret Data

Deciphered Date

+3VS

2

3

DM5

DM5 DAN217_SC59

1

WL_OFF#<32>

DAN217_SC59

@

5 4

3 2 1

RM5

1 2

100K_0402_5%

KILL_SW#

+3VS

KILL_SW# <32>

+3VS

2

B

1

A

CM23 0.1U_0402_16V4ZCM23 0.1U_0402_16V4Z

1 2

5

P

XMIT_OFF# 3G_OFF#

4

Y

G

UM1

3

NC7SZ08P5X_NL_SC70-5

Title

Size Document Number Rev

Friday, April 10, 2009

Date: Sheet

1 2

R822 0_0402_5%@ R822 0_0402_5%@

Compal Electronics, Inc.

PCIe-WLAN/HDDVD/NAND/NEW

LA-5381P

of

27 46

of

27 46

of

27 46

0.2

5

4

3

2

1

1 2

@

8111DL@

CL39

8111DL@

CL40

CL41

CL42

12

1 2

RL1 3.6K_0402_5%RL1 3.6K_0402_5% UL2

@UL2

@

4

DO

GND

3

DI

ORG

2

SK

1

CAT93C46VI-GT3_SO8

3

NC

CS

VCC

1 2

RL2 1K_0402_5%

8103EL@

LAN_DSM# <20>

8111DL@

1000P_0402_50V8-J

1 2

RL13 75_0402_1%

8111DL@

1000P_0402_50V8-J

1 2

RL12 75_0402_1%

1000P_0402_50V8-J

1 2

RL15 75_0402_1%RL15 75_0402_1%

1000P_0402_50V8-J

1 2

RL16 75_0402_1%RL16 75_0402_1%

2008/10/06

5 6 7 8

UL1

CL1 0.1U_0402_16V7KCL1 0.1U_0402_16V7K

PCIE_PTX_C_IRX_P3<10>

LAN_ISOLATE#<21>

27P_0402_50V8J

PCIE_PTX_C_IRX_N3<10>

@

1 2

RL3 100K_0402_5%

R398

12

1K_0402_1%

@

YL1

25MHz_20pF_6X25000017

1

CL24

2

27P_0402_50V8J

LAN_WAKE#_R

+3VS

LAN_X2LAN_X1

12

D D

+3V_LAN

C C

1 2

CL2 0.1U_0402_16V7KCL2 0.1U_0402_16V7K

1 2

PCIE_ITX_C_PRX_P3<10>

PCIE_ITX_C_PRX_N3<10>

CLK_PCIE_LAN<15> CLK_PCIE_LAN#<15>

PLT_RST#<11,14,19,25,27,31,32,33>

12

RL6

RL6 1K_0402_1%

1K_0402_1%

ISOLATEB

LAN_WAKE#_R<32>

RL7

RL7 15K_0402_5%

15K_0402_5%

1

CL25

2

+LAN_DVDD12

PCIE_IRX_LANTX_P3

PCIE_IRX_LANTX_N3 PCIE_ITX_C_PRX_P3 PCIE_ITX_C_PRX_N3

CLK_PCIE_LAN CLK_PCIE_LAN# PLT_RST#

+LAN_CTRL12A

RL4

+3V_LAN

0_0402_5% 8111DL@

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

ISOLATEB +3V_LAN

LAN_X1 LAN_X2

+LAN_CTRL12VDD

20

HSOP

21

HSON

15

HSIP

16

HSIN

25

CLKREQB

17

REFCLK_P

18

REFCLK_N

27

PERSTB

48

VCTRL12A/SROUT12

4

NC/FB12

43

NC/ENSWREG

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKTAL1

42

CKTAL2

45

VCTRL12D/VDDSR

7

GND

14

GND

31

GND

47

GND

RTL8111DL-GR_LQFP48_7X7

pin assignments table for difference

8111DL 8103EL

FB12

4

MDIP2

8

MDIN2

B B

A A

9

AVDD12

10

MDIP3

11

MDIN3

12

EVDD12

19

GPO

23

EEDO

33

EEDI

34

EESK

35

AVDD12

39

AVDD33

40

ENSR

43

VDDSR

44 45 VDDSR VCTRL12D 48 SROUT12

NC NC NC DVDD12 NC NC VDDTX NC LED3 LED2 LED1 NC NC NC NC

VCTRL12A

5

LAN_MDI3LAN_MDI3+

LAN_MDI2LAN_MDI2+

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

CL32

0.01U_0402_25V7K

8111DL@

1

CL33

0.01U_0402_25V7K

2

8111DL@

Place these components colsed to LAN chip

0.01U_0402_25V7K

4

CL34

8111DL@UL1

8111DL@

LAN_DO

LED3/EEDO LED1/EESK

VDDTX/EVDD12

NC/AVDD33

DVDD12/AVDD12

NC/AVDD12

1

2

33

LAN_DI

34

LED2/EEDI

EECS

MDIP0 MDIN0 MDIP1 MDIN1

NC/MDIP2

NC/MDIN2

NC/MDIP3

NC/MDIN3

DVDD12 DVDD12 DVDD12

VDD33 VDD33

NC/VDDSR

AVDD33

NC/GPO

EGND

+LAN_DVDD12 +LAN_AVDD12

CL35

0.01U_0402_25V7K

LAN_SK

35

LAN_CS

32

LAN_ACTIVITY#

38

LED0

LAN_MDI0+

2

LAN_MDI0-

3

LAN_MDI1+

5

LAN_MDI1-

6

LAN_MDI2+

8

LAN_MDI2-

9

LAN_MDI3+

11

LAN_MDI3-

12 13

30 36

19 29

37 44 1

40 10

39

23 24

NC

22

UL3

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+ TD2-6MX2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

LG-2446S-1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+LAN_DVDD12

+3V_LAN

+LAN_CTRL12VDD

+LAN_DVDD12

DSM#

8111DL@

1 2

RL9 0_0603_5%

8111DL@UL3

8111DL@

24

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19 18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

Issued Date

+LAN_EVDD12

R399

R399 0_0402_5%

0_0402_5%

Pin23 is GPO pin for 8111DL to be used for DSM function

+3V_LAN

2

CL3

@

1

0.1U_0402_16V4Z

+LAN_CTRL12A

4.7UH_1008HC-472EJFS-A_5%_1008

Layout Note: LL1 must be within 500mil to Pin1 CL8,CL9 must be within 500mil to LL1

+LAN_EVDD12

1

CL17

1U_0402_6.3V4Z

2

Close to Pin19

LAN_ACTIVITY#

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

RJ45_GND

Compal Secret Data

Deciphered Date

+3V_LAN

RL11

8103EL@RL11

8103EL@

1 2

0_0603_5%

LL1

8111DL@LL1

8111DL@

1 2

22U_0805_6.3V6M

LAN_SK

0.1U_0402_16V4Z

Close to Pin1,29,37,40

Close to Pin10,13,30,36,39

+LAN_AVDD12

2

1

CL9

CL8

8111DL@

1

CL18

CL18 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

CL44

RJ45_GND LANGND

2009/10/06

2

CL9

0.1U_0402_16V4Z

1

2

1 2

LL2 0_0603_5%

8111DL@

RL10 150_0402_5%RL10 150_0402_5%

12

+3V_LAN

RL14 150_0402_5%RL14 150_0402_5%

12

2

+3V_LAN

1

1 2

CL36

+LAN_AVDD12

Close to Pin 44,45

1 2

RL8 0_0603_5%

8103EL@

+LAN_CTRL12VDD

0.1U_0402_16V4Z

1

CL43

LAN Conn.

0.1U_0402_16V4Z

2

JLAN

12

Yellow LED-

RL17

11

12

150_0402_5%

RJ45_MIDI3RJ45_MIDI3+ RJ45_MIDI1RJ45_MIDI2RJ45_MIDI2+ RJ45_MIDI1+ RJ45_MIDI0RJ45_MIDI0+

150_0402_5%

1000P_1808_3KV7K

Title

Size Document Number Rev

Friday, April 10, 2009

Date: Sheet

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LE D-

RL18

9

12

Green LE D+

SUYIN_100073FR012G101ZL

1

CL37

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

RTL8103EL/RTL8111DL

LA-5381P

8103EL@

CL28

SHLD2 SHLD1

1

CL38

4.7U_0603_6.3V6K

2

1

+LAN_DVDD12

1

2

@JLAN

@

1

2

14 13

+3V_LAN

1 2

CL40.1U_0402_16V4Z CL40.1U_0402_16V4Z

1 2

CL50.1U_0402_16V4Z CL50.1U_0402_16V4Z

1 2

CL60.1U_0402_16V4Z CL60.1U_0402_16V4Z

1 2

CL70.1U_0402_16V4Z

8111DL@

+LAN_DVDD12

1 2

CL190.1U_0402_16V4Z CL190.1U_0402_16V4Z

1 2

CL200.1U_0402_16V4Z CL200.1U_0402_16V4Z

1 2

CL210.1U_0402_16V4Z CL210.1U_0402_16V4Z

1 2

CL220.1U_0402_16V4Z CL220.1U_0402_16V4Z

1 2

CL230.1U_0402_16V4Z8111DL@ CL230.1U_0402_16V4Z8111DL@

+3V_LAN

1 2

LL4 0_0603_5%

8111DL@

CL29

CL29 22U_0805_6.3V6M

22U_0805_6.3V6M

8111DL@

of

28 46

of

28 46

of

28 46

0.2

A

B

C

D

E

+3VS_DVDD

10U_0805_10V6K

1

CA1

9

DVDD_IO

LOUT1_L

LOUT1_R

LOUT2_L

LOUT2_R

SPDIFO1

SPDIFO2 HPOUT_L HPOUT_R

MONO_OUT

DMIC_CLK1/2

DMIC_CLK3/4 LINE2_VREFO LINE1_VREFO

MIC1_VREFO MIC2_VREFO

CPVREF

VREF

JDREF

CBN CBP

AVSS1 AVSS2

CA1

0.1U_0402_16V4Z

CA7

0.1U_0402_16V4Z

+AVDD

RA3

1 1

Int. Mic

Ext. Mic

2 2

HDA_BITCLK_CODEC<20>

HDA_SDOUT_CODEC<20>

HDA_RST#_CODEC<20>

HDA_SYNC_CODEC<20>

GPIO0-->SPK_SEL HIGH:HARMAN LOW:NO-BRAND

+VDDA

MIC2_L<30>

MIC2_R<30> FM_OUTL<26> FM_OUTR<26> MIC1_C_L<30> MIC1_C_R<30>

HDA_SDIN0<20>

SPK_SEL<21>

MUTE#<30>

RA3

0_0603_5%

CA12 2.2U_0603_6.3V6KFM@ CA12 2.2U_0603_6.3V6KFM@ CA13 2.2U_0603_6.3V6KFM@ CA13 2.2U_0603_6.3V6KFM@

RA2 0_0402_5%RA2 0_0402_5%

10U_0805_10V6K

12

CA3

10U_0805_10V6K

1 2 1 2

1 2

CA14 100P_0402_50V8JCA14 100P_0402_50V8J

RA7 33_0402_5%RA7 33_0402_5%

1 2

1

CA4

2

MONO_IN

HDA_BITCLK_CODEC HDA_SDOUT_CODEC

HDA_SDIN0_R

12

HDA_RST#_CODEC HDA_SYNC_CODEC

SPK_SEL

SENSE_A SENSE_B

1

2

12

CA43100P_0402_50V8J CA43100P_0402_50V8J

12

CA44100P_0402_50V8J CA44100P_0402_50V8J

FM@

12

CA50100P_0402_50V8J

12

CA49100P_0402_50V8J FM@CA49100P_0402_50V8J FM@

12

CA45100P_0402_50V8J CA45100P_0402_50V8J

12

CA46100P_0402_50V8J CA46100P_0402_50V8J

CA5

0.1U_0402_16V4Z

DGND

3 3

40mil

0.1U_0402_16V4Z

1

CA6

2

38

UA2

AVDD125AVDD2

14

LINE2-L

15

LINE2-R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

21

MIC1_L

22

MIC1_R

12

BEEP_IN

6

BITCLK

5

SDATA_OUT

8

SDATA_IN

11

RESET#

10

SYNC

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

43

NC

4

DVSS

7

DVSS

ALC272-GR_LQFP48_7X7

need to re-link ALC272

1

DVDD

1

CA2

2

10U_0805_10V6K

1

CA8

2

AMP_SPK_L

35

AMP_SPK_R

36 39 41

LA2

48 45 33 32

37

46 44 20 18 28 19 31 27 40 30 29

26 42

MBK1608121YZF_0603

RA5 63.4_0402_1%RA5 63.4_0402_1% RA6 63.4_0402_1%RA6 63.4_0402_1%

10mil

1 2

CA16 2.2U_0603_6.3V6KCA16 2.2U_0603_6.3V6K

AC_VREF AC_JDREF

1 2

CA17

2.2U_0603_6.3V6K

AGND

1 2

1 2 1 2

CA39

1 2

1U_0402_6.3V4Z

+MIC1_VREFO +MIC2_VREFO

12

RA10

RA10 20K_0402_1%

20K_0402_1%

30mil

0_0603_5%

AMP_SPK_L <30>

AMP_SPK_R <30>

1 2

C193 33P_0402_50V8K

CA42

1 2

1U_0402_6.3V4Z

CA18

1

CA48

CA48 100P_0402_50V8J

100P_0402_50V8J

2

10U_0805_10V6K

RA1

1

2

12

+3VS

@

SPDIF <30>

HP_L <30> HP_R <30>

CA19

1

2

0.1U_0402_16V4Z

1

CA47

CA47 100P_0402_50V8J

100P_0402_50V8J

2

1U_0402_6.3V4Z

SUSP#<25,32,35,38,40>

EC_BEEP<32>

SB_SPKR<20>

+5VALW

2

CA9

@

1

EC Beep

PCI Beep

NBA_PLUG<30>

MIC_SENSE<30>

+5VS

112

JUMP_43X39

@

UA1

1

VIN

VOUT

2

GND

3

SHDN#

APL5151-475BC-TRL_SOT23-5

RA8

1 2

47K_0402_5%

RA9

1 2

47K_0402_5%

RA11

10K_0402_5%

J2

2

place close to chip

1 2

RA16 5.1K_0402_1%RA16 5.1K_0402_1% RA17 20K_0402_1%RA17 20K_0402_1%

1 2

RA18 20K_0402_1%RA18 20K_0402_1%

1 2

RA19 10K_0402_1%RA19 10K_0402_1%

1 2

@UA1

@

5

4

BP

0.22U_0603_16V4Z

12

CA11

@CA11

@

12

CA15

1 2

0.1U_0402_16V4Z

1

CA20

0.1U_0402_16V4Z

2

SENSE_B

SENSE_A

+VDDA

MONO_IN

4.75V

2

@

CA10

CA10 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

@

HDA_BITCLK_CODEC

+3VS

@

1 2

R318 100_0402_5%

1

CA38

0.1U_0402_16V4Z

@

2

@

1 2

R313 100_0402_5%

HDA_RST#_CODEC

Add CA38 for EMI

4 4

A

@

C618 100P_0402_50V8J

1 2

@

C634 100P_0402_50V8J

1 2

B

Change CA51~CA54 to 0 ohm for PC-Beep noise issue

CA51 0_0402_5%CA51 0_0402_5%

1 2

CA52 0_0402_5%CA52 0_0402_5%

1 2

CA53 0_0402_5%CA53 0_0402_5%

1 2

CA54 0_0402_5%CA54 0_0402_5%

1 2

RA15 0_0603_5%RA15 0_0603_5%

1 2

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

ImpedanceSense Pin

39.2K

SENSE A

SENSE B

Compal Secret Data

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

20K 10K PORT-C (PIN 23, 24)

5.1K

39.2K 20K 10K

5.1K

D

Codec Signals

PORT-A (PIN 39, 41) PORT-B (PIN 21, 22)

PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-H (PIN 37) PORT-I (PIN 32, 33)

Title

Size Document Number Rev

Date: Sheet

Function

Ext. MIC FM tuner

Int. MIC

Headphone out

Compal Electronics, Inc.

HD Audio ALC272 Codec

LA-5381P

29 46Frid ay, April 10, 2009

E

0.2Custom

of

A

TPA6017 Medium Range Amplifier

Rin =70Kohm

1 1

UA3

CA29 0.033U_0402_25V7KCA29 0.033U_0402_25V7K

AMP_SPK_R<29>

AMP_SPK_L<29>

2 2

3 3

CA30 0.033U_0402_25V7KCA30 0.033U_0402_25V7K

CA32 0.033U_0402_25V7KCA32 0.033U_0402_25V7K

GAIN0 GAIN1 Av(db)

0

01

1

11

6

10

0

15.6

21.6

CA31 0.033U_0402_25V7KCA31 0.033U_0402_25V7K

MUTE#<29>

Rin(ohm)

90K

70K

45K

25K

MUTE#

LINE_C_OUTR

LINE_C_OUTL

7

17

9

5

19

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

GND5

21

+5VS

16

20

B

15

6

VDD

PVDD1

PVDD2

ROUT+

ROUT-

LOUT+

LOUT-

BYPASS

GND41GND311GND213GND1

TPA6017A2_TSSOP20

GAIN0 GAIN1

CA23

NC

1

10U_0805_10V6K

2

2 3

18

14

4

8

12

Keep 10 mil width

AMP_BYPASS

10

CA24

SPKR+

SPKR-

SPKL+

SPKL-

1

0.1U_0402_16V4Z

2

CA33

0.47U_0603_10V7K

1

RA27

100K_0402_5%

RA29

@ RA29

@

100K_0402_5%

1

CA25

0.1U_0402_16V4Z

2

10 dB

12

C

+5VS

12

RA28

@ RA28

@

100K_0402_5%

12

RA30

RA30 100K_0402_5%

100K_0402_5%

D

Ext. Mic

Change CA21 and CA22 to 0603 Size

CA21

4.7U_0603_6.3VK

MIC1_C_L<29>

MIC1_C_R<29>

4.7U_0603_6.3VK

CA21

CA22

12 12

Int. Mic

CA26

1U_0402_6.3V4Z

MIC2_L<29>

MIC2_R<29>

1U_0402_6.3V4Z 1U_0402_6.3V4Z

1U_0402_6.3V4Z

CA26

CA28

12 12

Left Connector

PACDN042Y3R_SOT23-3

SPKL+ SPKL-

PACDN042Y3R_SOT23-3

1 2

LA3 FBMA-L11-160808-800LMT_0603LA3 FBMA-L11-160808-800LMT_0603

1 2

FBMA-L11-160808-800LMT_0603

LA4

Right Connector

PACDN042Y3R_SOT23-3

SPKR+

PACDN042Y3R_SOT23-3

1 2

LA5 FBMA-L11-160808-800LMT_0603LA5 FBMA-L11-160808-800LMT_0603

1 2

FBMA-L11-160808-800LMT_0603

LA6

HeadPhone/LINE Out JACK

NBA_PLUG<29>

HP_R<29> HP_L<29>

SPDIF<29>

L35

L35 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 L36

L36 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603

PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3 RA31

RA31

1 2 1 2

1

1 2

0_0603_5%

HP_R_L HP_L_L

DA6

2 3

CA34

100P_0402_50V8J

1K_0402_5%

SPDIF_R

1

2

RA21

RA22

RA25

RA26

@

1

12 12

@

1

+5VS

RA20

4.7K_0402_5%

RA23

4.7K_0402_5%

1 2

220P_0402_50V7K

DA4

2 3

DA5

2 3

1

CA35

0.1U_0402_16V4Z

2

SPDIF_R

1

CA37

@

0.1U_0402_16V4Z

2

CH751H-40PT_SOD323-2

12

DA1

MIC1_L

MIC1_R

12

DA2

CH751H-40PT_SOD323-2

R545

1 2

INT_MIC_R

CA27

2

3

DA3

PSOT24C_SOT23

1

SPK_L1 SPK_L2

SPK_R1 SPK_R2SPKR-

JLINE

1

2

3

4

5

8

9

10

SINGA_2SJ-A373-H01

E

21

+MIC1_VREFO

21

+MIC1_VREFO

12

+MIC2_VREFO

RA244.7K_0402_5% RA244.7K_0402_5%

R545 Just Reserved

0_0402_5%@

JMIC

@JMIC

@

1

3

1

NC1

2

4

2

NC2

ACES_85204-0200N

JSPKL

@JSPKL

@

1

NC1

2

NC2

ACES_85204-0200N

JSPKR

@JSPKR

@

1

NC1

2

NC2

ACES_85204-0200N

DRIVE

DRIVE IC

IC

GND GND

INT_MIC <17>

3 4

@

6 7

Ext.MIC/LINE IN JACK

1

CA36

0.1U_0402_16V4Z

MIC_SENSE<29>

MIC1_R

LA9

LA9 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA10

LA10 KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONIC S, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONIC S, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONIC S, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/04/14 2009/04/14

Compal Secret Data

Deciphered Date

D

MIC1_L_R

1 2

MIC1_L_LMIC1_L

1 2

DA7

1

PACDN042Y3R_SOT23-3

2 3

0.1U_0402_16V4Z

2

1

@

CA40

100P_0402_50V8J

Title

Size Document Number Rev

Date: Sheet

@

CA41

CA41 100P_0402_50V8J

100P_0402_50V8J

2

Compal Electronics, Inc.

AMP/Audio Jack/HP/SPEAKER/VR

5 4 3

6 2 1

LA-5381P

JEXMIC

SINGA_2SJ-S351-015

E

@JEXMIC

@

0.2Custom

of

30 46Friday, April 10, 2009

A

CLK_PCIE_MCARD0#<15> CLK_PCIE_MCARD0<15>

PCIE_ITX_C_PRX_N1<10> PCIE_ITX_C_PRX_P1<10>

1 1

PCIE_PTX_C_IRX_N1<10> PCIE_PTX_C_IRX_P1<10>

+3VS

XDCD0#_SDCD#

1 2

RC5 4.7K_0402_5%RC5 4.7K_0402_5%

XDCD1#_MSCD#

1 2

RC7 4.7K_0402_5%RC7 4.7K_0402_5%

2 2

QC1

2N7002_SOT23-3

+VCC_OUT

3 3

XDCD1#_MSCD# XDCD0#_SDCD#

10U_0805_10V6K

DC2

2 3

DAN202UT106_SC70-3

CC17

CLK_PCIE_MCARD0# CLK_PCIE_MCARD0

PCIE_ITX_C_PRX_N1 PCIE_ITX_C_PRX_P1

CC7 0.1U_0402_16V7KCC7 0.1U_0402_16V7K

1 2

CC8 0.1U_0402_16V7KCC8 0.1U_0402_16V7K

1 2

+3VS

CR_LEDCON

13

D

2

G

S

RC17

4.7K_0402_5%

1 2

20 mils

1

CC18

0.1U_0402_16V4Z

2

XD_CD#

1

CC21

270P_0402_50V7K

2

RC19 10K_0402_5%RC19 10K_0402_5%

1 2

CC12 0.1U_0402_16V4ZCC12 0.1U_0402_16V4Z

PLT_RST#<11,14,19,25,27,28,32,33>

CR_LEDCON <34>

CR_LED

XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7

SDCMD_MSBS_XDWE# XDWP#_SDWP# XD_ALE XD_CD# XD_RB# XD_RE# XDCE# XD_CLE

PCIE_PTX_IRX_N1 PCIE_PTX_IRX_P1

12

RC18.2K_0402_5% RC18.2K_0402_5%

12

+3VS

PLT_RST#

CPPE#

TC2 PADTC2 PAD

XDCD1#_MSCD# XDCD0#_SDCD#

+VCC_OUT

CR_LED

Card Reader Connector

JREAD

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

31

7IN1-GND

11

7IN1-GND

41

7IN1-GND

42

7IN1-GND

TAITW_R015-D10-LM_NR

@

B

Power Circuit

UC1

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

38

TXIN

39

TXOUT

JMB380

30

TAV33

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB380-QGAZ0A_QFN48_7X7

7 IN 1 CONN

TPBIAS_1

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CD

SD-WP

SD-CMD MS-SCLK

MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

APVDD

APV18

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

TPA1P

TREXT

APGND

TCPS TPB1N TPB1P TPA1N

GND

21 28

20 14 12 30 29 27 23 18 16 1 2 25

26 17 15 19 24 22 13

5 10

19 20 44 18 37

XD_SD_MS_D0

48

XD_SD_MS_D1

47

XD_SD_MS_D2

46

XD_SD_MS_D3

45

SDCMD_MSBS_XDWE#

43

SDCLK_MSCLK_XDCE#

42

XDWP#_SDWP#

41

XD_CLE

40

XD_SD_D4

29

XD_SD_D5

28

XD_SD_D6

27

XD_SD_D7

26

XD_RE#

25

XD_RB#

23

XD_ALE

22 34

35 36

6 24

31 32 33

49

1 2

RC11 12K_0402_1%RC11 12K_0402_1%

RC9 10K_0402_1%RC9 10K_0402_1%

+VCC_OUT

SDCLK XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7 XDCD0#_SDCD# XDWP#_SDWP# SDCMD_MSBS_XDWE#

MSCLK XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XDCD1#_MSCD# SDCMD_MSBS_XDWE#

+1.8VS_OUT

40mil

0.1U_0402_16V4Z

1

CC2

CC1

2

10U_0805_10V6K

+3VS

1 2

CC5 0.1U_0402_16V4ZCC5 0.1U_0402_16V4Z

1 2

CC6 0.1U_0402_16V4ZCC6 0.1U_0402_16V4Z

12

C

1000P_0402_50V7K

1

CC3

2

1

CC9

2

0.1U_0402_16V4Z

1

CC4

2

0.1U_0402_16V4Z

+1.8VS_OUT

1

CC10

0.1U_0402_16V4Z

2

1

2

XDWP#_SDWP# XD_RB# SDCMD_MSBS_XDWE#

XD_CLE

RC8 10K_0402_5%RC8 10K_0402_5%

XD_RE#

RC10 200K_0402_5%RC10 200K_0402_5%

XD_ALE

RC12 10K_0402_5%RC12 10K_0402_5%

12

RC3 10K_0402_5%RC3 10K_0402_5%

12

RC4 1K_0402_5%RC4 1K_0402_5%

12

RC6 10K_0402_5%RC6 10K_0402_5%

1 2

SDCLKSDCLK_MSCLK_XDCE#

12

MSCLK

RC1322_0402_5% RC1322_0402_5%

12

XDCE#

RC1422_0402_5% RC1422_0402_5%

12

RC1522_0402_5% RC1522_0402_5%

SDCLK

MSCLK

XDCE#

D

+3VALW

12

R129

R129 10K_0402_5%

10K_0402_5%

+VCC_OUT

CR_CPPE#<20>

CR_WAKE#<20>

0_0603_5%

0_0402_5%

1 2

R397

Strapping setting

+3VS

Pin name

MDIO7

MDIO12

MDIO14

P.S CR1_PCTLN aslo can out 3V with 250mA for 5IN1 using.(MDIO12 can't be seted after MP IC)

+VCC_OUT high active

CR_LED high active

High

on-board

Description

Ϫ

For EMI

@

1 2

100_0402_5%

1 2

100_0402_5%

1 2

100_0402_5%

RC16

RC18

RC24

@

1 2

CC14

100P_0402_50V8J

@

1 2

CC15

CC15 100P_0402_50V8J

100P_0402_50V8J

CC19

1 2

100P_0402_50V8J@

R151

XDCD0#_SDCD#

low

add-in card

+VCC_OUT low active

CR_LED low active

E

CPPE#

Ϫ

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

JMB380 card reader/1394

LA-5381P

E

of

31 46Friday, April 10, 2009

of

31 46Friday, April 10, 2009

of

31 46Friday, April 10, 2009

0.2

A

B

C

D

E

+3VL_EC

0.1U_0402_16V4Z

1

C805

2

0.1U_0402_16V4Z

VR_ON <43>

12

1

C806

2

SYSON

12

R537

10K_0402_5%

1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2

CRY2CRY1

Y7

A

KSI[0..7] KSO[0..17]

1

C785

2

1

2

15P_0402_50V8J

GATEA20<20> KB_RST#<20>

SERIRQ<19,33>

LPC_FRAME#<19,33>

LPC_AD3<19,33> LPC_AD2<19,33> LPC_AD1<19,33> LPC_AD0<19,33>

CLK_PCI_EC<19,23>

PLT_RST#<11,14,19,25,27,28,31,33> EC_SCI#<20>

WL_BT_LED#<34>

ECRST#

C811

0.1U_0402_16V4Z

CEC_INT# EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

ON/OFFBTN# KSO1 KSO2 ECRST#

LID_SW#

USB_OC#0<20,26>

LAN_WAKE#

LAN_WAKE#_R<28> EC_SWI#_R <20,25>

EC_SWI#

FAN_SPEED1<4>

ON/OFFBTN#<34>

PWR_SUSP_LED<34>

R601 0_0402_5%R601 0_0402_5%

1 2

R962 0_0402_5%@ R962 0_0402_5%@

1 2

R963 0_0402_5%R963 0_0402_5%

1 2

R964 0_0402_5%@ R964 0_0402_5%@

1 2

R965 0_0402_5%R965 0_0402_5%

1 2

EC_SMB_CK1<18,37> EC_SMB_DA1<18,37> EC_SMB_CK2<6,33,34> EC_SMB_DA2<6,33,34>

PM_SLP_S3#<20> PM_SLP_S5#<20>

VLDT_EN<35> E51_TXD<27> E51_RXD<27>

NUM_LED#<33>

EC_SMI#<20> LID_SW#<33> ESB_CLK<34> ESB_DAT<34> BT_PWR#<26>

KB_LED<33>

LAN_WAKE#

Change wake and reserve to 3G at DVT

B

+3VL +3VL_EC

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# ECRST# EC_SCI# WL_BT_LED#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# LID_SW# ESB_CLK ESB_DAT BT_PWR#

KB_LED FAN_SPEED1 VLDT_EN

E51_RXD ON/OFFBTN# PWR_SUSP_LED NUM_LED#

CRY1 CRY2

LAN_WAKE#_R <28>

EC_SWI#_R <20,25>

3G_OFF# <27>

L25

12

0_0603_5%

U33

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

+3VL_EC

+EC_AVCC

9

22

33

96

111

125

67

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD Input

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

GPO

GPIO

GPI

GND

11

24

35

94

113

12

L80

L80 0_0603_5%

0_0603_5%

1 2

C816 0.1U_0402_16V4ZC816 0.1U_0402_16V4Z

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

KB926QFD3_LQFP128_14X14

69

ECAGND

L81

0_0603_5%

2008/04/14 2009/04/14

C

INVT_PWM

21

EC_BEEP

23

UWB_OFF#

26

ACOFF

27

BATT_TEMPA

63

TV_THER1

64

ADP_I

65

ADP_V

66

KILL_SW#

75

TV_THER2

76

DAC_BRIG

68

EN_DFAN1

70

IREF

71

CHGVADJ

72

USB_CHG_EN#

83

USB_EN#

84

CAP_INT#

85

CAP_RST#

86

TP_CLK

87

TP_DATA

88

BT_RST#

97

WOL_EN#

98

USB_OC#2

99

VGATE

109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120

SPI_CLK

126

SPI_CS#

128

CIR_IN

73

CEC_INT#

74

FSTCHG

89

BATT_FULL_LED#

90

CAPS_LED#

91

BATT_LOW_LED#

92

TP_LED

93

SYSON

95

VR_ON

121

ACIN_D

127

EC_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102

EC_SWI#

103

SB_PWRGD

104

BKOFF#

105

WL_OFF#

106

HDPINT

107

LOGO_LED

108

HDPACT

110

ENBKL

112

HDPLOC

114

EC_THERM#

115

SUSP#

116

PBTN_OUT#

117

LAN_WAKE#

118 124

12

C814 4.7U_0805_10V4ZC814 4.7U_0805_10V4Z

Compal Secret Data

Deciphered Date

INVT_PWM <17> EC_BEEP <29>

UWB_OFF# <27>

ACOFF <38>

0.01U_0402_25V7K

C812

1 2

BATT_TEMPA <37> TV_THER1 <27>

ADP_I <38>

ADP_V <38> KILL_SW# <27> TV_THER2 <27>

DAC_BRIG <17> EN_DFAN1 <4> IREF <38> CHGVADJ <38>

USB_CHG_EN# <24>

USB_EN# <24,26> CAP_INT# <34>

CAP_RST# <34>

TP_CLK <34> TP_DATA <34>

BT_RST# <26>

WOL_EN# <35>

USB_OC#2 <20,24> VGATE <43>

EC_SI_SPI_SO <33> EC_SO_SPI_SI <33> SPI_CLK <33> SPI_CS# <33>

CEC_INT# <18>

FSTCHG <38>

BATT_FULL_LED# <34> CAPS_LED# <33>

BATT_LOW_LED# <34>

TP_LED <34>

SYSON <25,35,41>

EC_RSMRST# <20>

EC_LID_OUT# <20> EC_ON <34>

SB_PWRGD <20,43>

BKOFF# <17>

WL_OFF# <27>

HDPINT <33>

LOGO_LED <34>

HDPACT <33>

HDPLOC <33>

EC_THERM# <21>

SUSP# <25,29,35,38,40> PBTN_OUT# <20>

D

ECAGND

R541 10K_0402_5%R541 10K_0402_5%

KSI[0..7]<33,34> KSO[0..17]<33,34>

1 1

SUSP#

12

R536

10K_0402_5%

2 2

3 3

4 4

10K_0402_5%

+3VL

+3VS

+3VL

+3VALW

C784

32.768KHZ_12.5P_1TJS125BJ4A421P

R563 100K_0402_5%R563 100K_0402_5% R955 2.2K_0402_5%R955 2.2K_0402_5% R956 2.2K_0402_5%R956 2.2K_0402_5% R953 4.7K_0402_5%R953 4.7K_0402_5% R954 4.7K_0402_5%R954 4.7K_0402_5%

R512 100K_0402_5%R512 100K_0402_5% R947 47K_0402_5%R947 47K_0402_5% R948 47K_0402_5%R948 47K_0402_5% R533 47K_0402_5%R533 47K_0402_5%

R538 100K_0402_5%R538 100K_0402_5%

1 2

R749

1 2

20M_0603_5%

1

IN

2

15P_0402_50V8J

2

@R749

@

4

OUT

NC3NC

0.1U_0402_16V4Z

1

C807

2

1000P_0402_50V7K

TV_THER1 TV_THER2

Change R539 and R542 to 10K

CIR_IN

CAP_INT#

1000P_0402_50V7K

1

C808

C809

2

R542 10K_0402_5%TV@R542 10K_0402_5%TV@

1 2

R539 10K_0402_5%TV@R539 10K_0402_5%TV@

1 2

R567 10K_0402_5%R567 10K_0402_5%

1 2

R569 4.7K_0402_5%R569 4.7K_0402_5%

1 2

+3VS

+5VL

+3VL

Change CAP_INT# pull high to +3VL

+5VS

TP_CLK TP_DATA

KB_LED

R534 4.7K_0402_5%R534 4.7K_0402_5%

1 2

R535 4.7K_0402_5%R535 4.7K_0402_5%

1 2

0.1U_0402_16V7K

R546 100K_0402_5%@R546 100K_0402_5%@

1 2

R548 100K_0402_5%R548 100K_0402_5%

1 2

C854

1

2

+3VS

Add at DVT for DIMM function

FUNCTIONLED of KB

LOW

HIGH

1 2

R560 150K_0402_5%R560 150K_0402_5%

D33

ACIN_DE51_TXD

ENBKL

CIR

Title

Size Document Number Rev

Date: Sheet

D33

2 1

CH751H-40PT_SOD323-2

12

C326 100P_0402_50V8JC326 100P_0402_50V8J

1 2

R684 0_0402_5%R684 0_0402_5%

+5VL

12

R576

R576 100_0805_5%

100_0805_5%

CIR@

CIR_IN

4.7U_0805_10V4Z

+5VL_CIR

C628

CIR@

Compal Electronics, Inc.

ENE KB926C

No Support

LA-5381P

E

Support

+3VL

ACIN <21,34,36>

UMA_ENBKL <11>

U31

1

Vout

2

VCC

3

GND

4

GND

IRM-V536/TR1_3P

CIR@

32 46Friday, April 10, 2009

of

0.2Custom

A

SPI Flash (8Mb*1)

+3VL

1

C786

0.1U_0402_16V4Z

1 1

LPC Debug Port

SERIRQ<19,32>

LPC_AD3<19,32>

2 2

LPC_AD1<19,32>

LPC_FRAME#<19,32>

2

SPI_CS#<32> SPI_CLK<32> EC_SO_SPI_SI<32>

SPI_CS# SPI_CLK EC_SO_SPI_SI EC_SI_SPI_SO

(Please place the PAD under DDR DIMM)

+3VS

1 2

R622 0_0402_5%R622 0_0402_5%

LPC_AD3

LPC_AD1

LPC_FRAME#

7

8

9

10

H1

DEBUG_PAD

U46

8

VCC

GND

3

WP

7

HOLD

1

CS

6

SCLK

5

SO

SI

MX25L8005M2C-15G_SO8

@H1

@

56

4

3

2

1

4

2

PLT_RST#

LPC_AD2

LPC_AD0

@ R634

@

1 2 2

@ C639

@

1

B

PLT_RST# <11,14,19,25,27,28,31,32>

LPC_AD2 <19,32>

LPC_AD0 <19,32>

CLK_PCI_SIO2 <19,23>

R634 22_0402_5%

22_0402_5%

C639 22P_0402_50V8J

22P_0402_50V8J

EC_SI_SPI_SO <32>

Lid

+3VALW

KB LED

+5VS

KB_LED<32>

1

C645

0.1U_0402_16V4Z

2

R587

10K_0402_5%

2

G

C

U34

U34 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

GND

1

10P_0402_50V8J

12

13

D

Q51

Q51 2N7002_SOT23-3

2N7002_SOT23-3

S

3

Q32

Q32 AO3413_SOT23-3

AO3413_SOT23-3

D

S

D

S

G

2

VDD2VOUT

13

C647

D

KSI[0..7] KSO[0..17]

KSI[0..7] <32,34>

KSO[0..17] <32,34>

KEYBOARD CONN.

JKB

@JKB

@

NUM_LED#

1 2

LID_SW# <32> CAPS_LED# <32>

1

2

+5VS_LED

1

C836

0.1U_0402_16V4Z

2

ACES_88170-3400

JBLG

GND GND

ACES_85201-0405N

@

Change JBLG footprint to ACES_85201-0405N_4P at PVT

CAPS_LED#

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

1

2

3

4

KSI1 KSI6 KSI5 KSI0 KSI4 KSI3 KSI2 KSI7 KSO15 KSO12 KSO11 KSO10 KSO9 KSO8 KSO13 KSO7 KSO6 KSO14 KSO5 KSO3 KSO4 KSO0 KSO1 KSO2

KSO17 KSO16

1 2 3 4 5 6

12

R509 300_0402_5%R509 300_0402_5%

12

R510 300_0402_5%R510 300_0402_5%

+5VS_LED

1

C860

0.1U_0402_16V4Z@

2

NUM_LED# <32>

+3VS

KSO16 KSO17 KSO2 KSO1 KSO0 KSO4 KSO3 KSO5

KSO14

KSO6 KSO7

KSO13

KSO8

KSO9 KSO10 KSO11 KSO12 KSO15

KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6

KSI1 CAPS_LED# NUM_LED#

E

1 2

C827 100P_0402_50V8JC827 100P_0402_50V8J

1 2

C810 100P_0402_50V8JC810 100P_0402_50V8J

1 2

C789 100P_0402_50V8JC789 100P_0402_50V8J

1 2

C790 100P_0402_50V8JC790 100P_0402_50V8J

1 2

C791 100P_0402_50V8JC791 100P_0402_50V8J

1 2

C792 100P_0402_50V8JC792 100P_0402_50V8J

1 2

C795 100P_0402_50V8JC795 100P_0402_50V8J

1 2

C796 100P_0402_50V8JC796 100P_0402_50V8J

1 2

C797 100P_0402_50V8JC797 100P_0402_50V8J

1 2

C798 100P_0402_50V8JC798 100P_0402_50V8J

1 2

C799 100P_0402_50V8JC799 100P_0402_50V8J

1 2

C800 100P_0402_50V8JC800 100P_0402_50V8J

1 2

C801 100P_0402_50V8JC801 100P_0402_50V8J

1 2

C802 100P_0402_50V8JC802 100P_0402_50V8J

1 2

C803 100P_0402_50V8JC803 100P_0402_50V8J

1 2

C804 100P_0402_50V8JC804 100P_0402_50V8J

1 2

C826 100P_0402_50V8JC826 100P_0402_50V8J

1 2

C823 100P_0402_50V8JC823 100P_0402_50V8J

1 2

C813 100P_0402_50V8JC813 100P_0402_50V8J

1 2

C825 100P_0402_50V8JC825 100P_0402_50V8J

1 2

C820 100P_0402_50V8JC820 100P_0402_50V8J

1 2

C821 100P_0402_50V8JC821 100P_0402_50V8J

1 2

C818 100P_0402_50V8JC818 100P_0402_50V8J

1 2

C819 100P_0402_50V8JC819 100P_0402_50V8J

1 2

C815 100P_0402_50V8JC815 100P_0402_50V8J

1 2

C817 100P_0402_50V8JC817 100P_0402_50V8J

1 2

C822 100P_0402_50V8JC822 100P_0402_50V8J

1 2

C824 100P_0402_50V8JC824 100P_0402_50V8J

G-Sensor

+3VS_HDP

SELF_TEST

3 3

+3VS_HDP

+5VS +3VS_HDP

2

C865

1U_0402_6.3V4Z

GSENSOR@

1

+5VS

4 4

+3VS_HDP

A

U54

GSENSOR@U54

GSENSOR@

2

Vdd1

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH35TR_LGA16

Voutx Vouty Voutz

NC1 NC2 NC3 NC4 NC5

GND1 GND2

3 5 7

10 11 14 15 16

1 13

Change U55 to G9191-330T1U

D38CH751H-40PT_SOD323-2

GSENSOR@

21

U55

GSENSOR@U55

GSENSOR@

1

VIN

2

GND

3

SHDN#

G9191-330T1U_SOT23-5

VOUT

BP

5

4

0.22U_0603_16V4Z

Reserve Freescale

C648 0.1U_0402_16V4Z@C648 0.1U_0402_16V4Z@ C642 0.1U_0402_16V4Z@C642 0.1U_0402_16V4Z@ C641 0.1U_0402_16V4Z@ C641 0.1U_0402_16V4Z@

SELF_TEST

VOUTX

12

VOUTY

12

VOUTZ

12

U66

2

XOUT

3

YOUT

4

ZOUT

9

0G-DET

7

SLEEP#

10

G-SELECT

13

ST

MMA7360LR2_LGA14

GSENSOR@

VOUTX VOUTY VOUTZ

C867

VDD

NC NC NC NC NC

VSS

GSENSOR@

C636 0.033U_0402_16V7K

1 2

C637 0.033U_0402_16V7KGSENSOR@C637 0.033U_0402_16V7KGSENSOR@

1 2

C635 0.033U_0402_16V7K

1 2

GSENSOR@

2

GSENSOR@

C866

C866 1U_0402_6.3V4Z

1U_0402_6.3V4Z

@C867

@

1

12

+3VS_HDP

@U66

@

6

1 8 11 12 14

5

B

R689

0_0603_5%

EC_SMB_CK2<6,32,34>

GSENSOR@

R686 4.7K_0402_5%

+3VS_HDP

@R689

@

12

+3VS_HDP+3VS

HDPINT<32>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R686 4.7K_0402_5%

GSENSOR@

R687 4.7K_0402_5%

GSENSOR@

R685 4.7K_0402_5%

GSENSOR@

R693 4.7K_0402_5%

HDPINT

R692

2008/04/14 2009/04/14

C

EC_SMB_CK2

SELF_TEST

12

GSENSOR@

12

1K_0402_5%

C640

0.1U_0402_16V4Z

GSENSOR@

Compal Secret Data

1

2

Deciphered Date

U9

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D34SP_LSSOP20 GSENSOR@

C638

0.1U_0402_16V4Z

GSENSOR@

D

P1_6/CLK0/SSI01

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

Title

Size Document Number Rev

Date: Sheet

11

12

13

P1_4/TXD0

14

15

16

P4_2/VREF

17

18

19

20

Compal Electronics, Inc.

SPI/LPC/PS2/MDC/FM/CIR

VOUTZ

VOUTX

VOUTY

EC_SMB_DA2

LA-5381P

12

R957

R957 47K_0402_5%

47K_0402_5%

GSENSOR@

1 2

R959 47K_0402_5%

1

2

E

C631

0.1U_0402_16V4Z

GSENSOR@

HDPACT <32>

HDPLOC <32>

GSENSOR@

+3VS_HDP

EC_SMB_DA2 <6,32,34>

33 46Friday, April 10, 2009

of

0.2Custom

A

Power Button & PWR/B

B

C

D

E

Light Pipe Connector

Touch/B Connector

JLIGHT

JPOWER

1 1

ACES_85201-06051

Add Light Sensor at DVT

SW5

SW6

SMT1-05-A_4P

5

6

SMT1-05-A_4P

5

6

3 4

BOT side

TOP side

2 2

1 2

For Debug

1

2

3

4

5

6

7

GND

8

GND

@

1

@

C646

0.1U_0402_16V4Z

2

POWER_ON_LED

ON/OFFBTN#

+3VS

ON/OFFBTN#

ON/OFFBTN# <32>

EC_ON<32>

10K_0402_5%

+3VS

EC_SMB_CK2 <6,32,33> EC_SMB_DA2 <6,32,33>

D20

@

ON/OFFBTN#

IO1

VIN

GND

IO2

3

Q56B

Q56B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

2 1

51_ON# <36>

4 3

CM1293A-02SR SOT143-4

Add ESD Diode for ESD 20090202

R514

1 2

TP_CLK<32> TP_DATA<32>

WL&BT LED

+5VS

1 2

R777 300_0402_5%R777 300_0402_5%

DC-IN LED

+5VS

TP_DATA

Vf=1.9V(typ),2.4V(max)

DC_IN

6 1

Q56A

Q56A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

1

TP_CLK

2

TP_DATA

3 4

ACES_85201-04051

@

4 3

CM1293A-02SR SOT143-4

D74

12

HT-110UD_1204

2

JTOUCH

1 2 3 4

D19

@

2

IO1

VIN

1

GND

IO2

ACIN <21,32,36>

TP_CLK

Add ESD Diode for ESD 20090202

WL_BT_LED# <32>

13

D

Q57

TP_LED<32>

2

G

2N7002_SOT23-3

S

Caps Sensor Connector

CAP_INT#<32> ESB_DAT<32> ESB_CLK<32>

CAP_RST#<32>

L58 FBMA-11-100505-301T_0402L58 FBMA-11-100505-301T_0402

1 2 1 2

L59 FBMA-11-100505-301T_0402L59 FBMA-11-100505-301T_0402

15P_0402_50V8J

R381

33_0402_5%

C507

@

+5VS

KSI6<32,33> KSO0<32,33>

12

1

2

L_LED#

Add at PVT

+3VL

+5VALW

12

1

2

1 2 3 4 5 6

1 2 3 4 5 6 7 8

9 10 11 12

R370

R370 33_0402_5%

33_0402_5%

@

C505

C505 15P_0402_50V8J

15P_0402_50V8J

@

JLIGHT

1 2 3 4 G1 G2

ACES_85201-0405N

@

JCS

@JCS

@

1 2 3 4 5 6 7 8 9 10 GND GND

ACES_85201-1005N

WiMAX LED

WIMAX_LED_GND

+5VS

10K_0402_5%

Vf=3.3V(typ),3.9V(max)

D75

WIMAX@

LED/B Connector

JLED

+5VALW

+5VS

DC_IN POWER_LED

3 3

CR_LEDCON<31> BATT_FULL_LED#<32> BATT_LOW_LED#<32>

SUSPEND_LED HDD_LED CR_LEDCON BATT_FULL_LED# BATT_LOW_LED#

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_85201-1005N

@

+5VS

WIMAX@

1 2

R778 300_0402_5%

HDD LED

Satellite LED

H_3P3

1

@

H27

H_1P2

1

@

1 2

R776 120_0402_5%R776 120_0402_5%

1 2

R780 120_0402_5%R780 120_0402_5%

H18

H_3P0N

1

@

H_1P2

@

+5VS

4 4

H20

H21

H_3P7

1

@

H4

H3

H2

H_3P0

1

H_3P0

@

1

@

H22

H_3P0

@

H23

H_1P2

1

@

H5

H6

H_3P0

1

@

A

H42

H45

1

H_3P0

@

H_1P2

@

H9

1

H_3P0

@

H45

H_1P2

1

@

H10

H_3P0

1

@

H43

H_3P8

1

@

H8

H7

H_3P0

1

@

H36

H38

H44

H_1P2

1

@

H13

H_3P0

1

@

H38

H_1P2

1

@

H19

H_3P0

@

H19

H15

H_3P0

1

@

H14

1

H_3P7

@

B

H39

H_1P2

1

@

H24

1

H41

1

H25

H_4P8X3P8

1

@

H40

H_3P3

@

H26

H_4P8X3P8

@

D75

2 1

HT-110NB5 1204 BLUE

WIMAX@

Change WIMAX LED to Blue

+5VS

HDD_LED

Vf=2.7V(typ),3.7V(max)

H11

H_4P0X3P0N

1

@

Security Classification

H34

1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

H_3P8

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

@

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10K_0402_5%

WIMAX_LED_GND

R779

12

10K_0402_5%

3

Q31B 2N7002DW-T/R7_SOT363-6Q31B 2N7002DW-T/R7_SOT363-6

D5 HT-SV116BP_WHITED5 HT-SV116BP_WHITE

2 1

D6 HT-SV116BP_WHITED6 HT-SV116BP_WHITE

2 1

H16

H_2P7N

1

@

Issued Date

R506

1 2

0_0402_5%

WIMAX@

R819

5

C

6 1

12

5

3

4

Q156B2N7002DW-T/R7_SOT363-6

WIMAX@

2

6 1

Q31A

Q31A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

2008/04/14 2009/04/14

@R506

@

2

Q156A

Q156A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

WIMAX@

SATA_LED# <21>

Q24

Q24 2N7002_SOT23-3

2N7002_SOT23-3

D

1 3

S

G

2

LED_WIMAX# <27>

Compal Secret Data

LOGO_LED <32>

Deciphered Date

SUSPEND LED

+3VALW

Change from +5VALW to +3VALW

47K

Q29

10K

2

DTA114YKAT146_SOT23-3

1 3

R770 300_0402_5%R770 300_0402_5%

POWER LED

FD2@FD2

@

1

1 2

R516 120_0402_5%R516 120_0402_5%

1 2

R544 120_0402_5%R544 120_0402_5%

@

+5VS

FD1@FD1

@

D

FD3@FD3

1

PWR_SUSP_LED <32>

SUSPEND_LED

12

POWER_ON_LED

POWER_LED

FD4@FD4

@

1

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

LED/LID/PB/FB/SCREW HOLE

LA-5381P

E

0.2

34 46Frid ay, April 10, 2009

0.2

of

A

B

C

D

E

+5VALW TO +5VS

+5VALW

Q35

8

D

7

1

2

4.7U_0805_10V4Z

1 2 36

D

6

D

5

D

SI4800BDY_SO8

C864

+1.8VS

1

2

1U_0402_6.3V4Z

1

C849

2

0.01U_0402_25V7K

C848

1 1

1

C845

0.1U_0402_16V7K

2

+1.8V

Q4

8 7

5

1

C842

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z 10M_0402_5%

10M_0402_5%

Q4

IRF8113PBF_SO8

4

1.8VS_ENABLE

12

R809

2 2

+5VS

0.1U_0402_16V7K

4.7U_0805_10V4Z

C833

1

S

2

S

3

S

4

G

1U_0402_6.3V4Z

RUNON

Inrush current = 0A Inrush current = 0A

2

1

1 2

750K_0402_1%

61

Q27A

2

2N7002DW-T/R7_SOT363-6

1

C835

2

C841

C841 10U_0805_10V6K

10U_0805_10V6K

R138

SUSP

0.1U_0402_16V7K

1

C880

2

RUNON

+VSB

+1.2VALW

1

2

4.7U_0805_10V4Z

+3VALW TO +3VS

+3VALW +3VS

Q14

S

D

S

D

S

D

G

D

SI4800BDY_SO8

1 2 3 4

0.01U_0402_25V7K

8 7 6 5

1

C840

2

4.7U_0805_10V4Z

+1.2VALW TO +1.2V_HT+1.8V TO +1.8VS

Q11

8 7

5

IRF8113PBF_SO8

@

R367

R367 1K_0402_5%

1K_0402_5%

4

12

C847

12

1U_0402_6.3V4Z

RUNON

1

C834

2

10M_0402_5%

1 2 36

R808

R808 10M_0402_5%

10M_0402_5%

Inrush current = 0A

C838

1

C844

C839

2

12

+1.2V_HT

C846

1U_0402_6.3V4Z

@

R556

2

1000P_0402_50V7K

61

@C876

@

1

2

1

C837

2

0.01U_0402_25V7K

4.7U_0805_10V4Z

2

R152

750K_0402_1%

Q17A

SUSP

2

0.1U_0402_16V7K

2N7002DW-T/R7_SOT363-6

1

C876

2

1

C862 4.7U_0805_10V4ZC862 4.7U_0805_10V4Z

2

61

Q12A

2N7002DW-T/R7_SOT363-6

12

+VSB

For ESD

R233

330K_0402_5%

2

12

+VSB

VLDT_EN#

+3VALW

R17

100K_0402_5%

WOL_EN#<32>

1 2

Change R19 to 47K

Reserve for ESD

+3VALW +3VALW +3VALW +3VALW +5VALW +5VALW +3VS

0.1U_0402_16V7K

C863

0.1U_0402_16V7K

1

C868

C869

2

C869

2

0.1U_0402_16V7K

1

C870

2

0.1U_0402_16V7K

1

C873

2

1

C874

2

+3VALW TO +3V_LAN

2

C201

0.1U_0402_16V7K

R19

1 2

47K_0402_5%

Add C203 for soft start

0.1U_0402_16V7K

C875

1

2

1

+5VALW

0.1U_0402_16V7K

1

C877

2

+5VS

Q38

2

AO3413_SOT23

C203

0.01U_0402_25V7K

C679

4.7U_0805_10V4Z

+5VALW

0.1U_0402_16V7K

1

C878

2

+5VS

G

@

C879

+3VALW

Inrush current = 0A

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

PJ29

2

JUMP_43X79

@

1

D

1 3

1

2

+5VS +5VALW +5VS +5VS+5VS

0.1U_0402_16V7K

1

C881

2

1

2

1

C680

C680 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

0.1U_0402_16V7K

C882

+3V_LAN

1

2

0.1U_0402_16V7K

C883

0.1U_0402_16V7K

1

C884

2

3 3

+5VS

R239

R239 470_0805_5%

470_0805_5%

1 2 13

D

SUSP

2N7002_SOT23-3

4 4

SUSP

D

2

G

Q46

S

+3VS

R288

470_0805_5%

1 2 3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q17B

Q17B

5

4

2N7002DW-T/R7_SOT363-6

SUSP

SYSON#

2N7002_SOT23-3

A

Discharge circuit

+1.8VS

R279

R279 470_0805_5%

470_0805_5%

1 2 3

2N7002DW-T/R7_SOT363-6

Q27B

5

4

+0.9V

R292

R292 470_0805_5%

470_0805_5%

1 2 13

D

2

G

Q49

S

VLDT_EN#

SUSP

2

G

Q50

2N7002_SOT23-3

+1.2V_HT +1.8V

R280

R280 470_0805_5%

470_0805_5%

1 2

5

+1.5VS

3

Q12B

4

R293

R293 470_0805_5%

470_0805_5%

1 2 13

D

S

SYSON#

2N7002_SOT23-3

SUSP

2N7002_SOT23-3

B

R597

100K_0402_5%

Q44

2

G

LA-5381P

E

+5VL

12

13

D

S

0.2

35 46Friday, April 10, 2009

0.2

of

+5VL+5VL

R284

R284 470_0805_5%

470_0805_5%

1 2 13

D

2

G

Q41

S

+1.1VS

R294

R294 470_0805_5%

470_0805_5%

1 2 13

D

2

G

Q52

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SYSON#<42>

SYSON<25,32,41>

C

100K_0402_5%

SYSON# SUSP

2008/04/14 2009/04/14

12

R595

3

Q26B

5

2N7002DW-T/R7_SOT363-6

4

Compal Secret Data

Deciphered Date

100K_0402_5%

SUSP<42>

SUSP#<25,29,32,38,40>

D

12

R596

61

Q26A

2

2N7002DW-T/R7_SOT363-6

VLDT_EN<32>

Title

Size Document Number Rev

Custom

Date: Sheet

VLDT_EN#

VLDT_EN

2N7002_SOT23-3

Compal Electronics, Inc.

DC/DC Circuits

A

B

C

D

PL1

SMB3025500YA_2P

PF1

DC301001M80

PJP1

1

+

2

+

3

1 1

2 2

-

4

-

SINGA_2DW-0005-B03@

51_ON#<34>

BATT+

CHGRTCP

DC_IN_S1

RLS4148_LL34-2

PF1

10A_125V_451010MRL

12

PD3

PR11

200_0603_5%

1 2

PR13

100K_0402_1%

1 2

PR15

22K_0402_1%

12

21

DC_IN_S2

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

TP0610K-T1-E3_SOT23-3

N1

12

PC7

0.22U_1206_25V7K

PQ1

SMB3025500YA_2P

1 2

12

PC2

100P_0402_50V8J

PR9

68_1206_5%

13

2

VIN

PD2

PD2 RLS4148_LL34-2

RLS4148_LL34-2

1 2 12

12

PC8

0.1U_0603_25V7K

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

PR10

PR10 68_1206_5%

68_1206_5%

RTC Battery

RTCVREF

PR19

560_0603_5%

+CHGRTC

3 3

+3VALWP +3VALW

+5VALWP

1 2

(5A,200mils ,Via NO.= 10) OCP(min)=7.7A

(5A,200mils ,Via NO.= 10) OCP(min)=7.9A

+VSBP +VSB

PJ1

2

JUMP_43X118@

PJ5

2

JUMP_43X118@

PJ8

2

JUMP_43X39@

PR20

560_0603_5%

1 2

112

3.3V

12

PU2 G920AT24U_SOT89-3PU2 G920AT24U_SOT89-3

3

OUT

PC9

PC9 10U_0805_10V4Z

10U_0805_10V4Z

+5VALW

IN

GND

1

+1.2VALWP

(120mA,40mils ,Via NO.= 1)

PJ10

4 4

PJ10

2

112

JUMP_43X118@

+VDDNB+VDDNBP

(3A,120mils ,Via NO.=6)

PJ12

2

112

JUMP_43X79@

(2A,80mils ,Via NO.= 4)

JUMP_43X79@

A

+0.9V+0.9VP

12

PR17

PR17 200_0603_5%

2

N2

200_0603_5%

12

PC10

1U_0805_25V4Z

PBJ1

-+

MAXEL_ML1220T10@

SP093MX0000

PJ2

+1.8VP +1.8V

2

112

JUMP_43X118@

JUMP_43X118@ PJ4

PJ4

2

112

JUMP_43X118@

(8A,320mils ,Via NO.= 16) OCP(min)=8.87A

(5A,200mils ,Via NO.=10) OCP(min)=8.51A

(7.0A,280mils ,Via NO.=14) OCP(min)=8.45A

(0.5A,20mils ,Via NO.=1)

(2.0A,80mils ,Via NO.=4)

JUMP_43X118@

PJ7

2

112

JUMP_43X118@

PJ9

2

112

JUMP_43X118@

PJ11

2

112

JUMP_43X39@

PJ13

2

112

JUMP_43X79@

+1.2VALW

+NB_CORE+NB_COREP

+2.5VS+2.5VSP

+1.5VS+1.5VSP

B

VIN

PR1

1M_0402_1%

1 2

N1

8

3

+

2

-

4

PR8

10K_0402_1%

N3

7

12

PC12

1000P_0402_50V7K

PU1A

P

1

O

G

LM393DG_SO8

12

RTCVREF

3.3V

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

2.2M_0402_5%

LM393DG_SO8

8

PU1B

P

+

O

G

4

PC13

12

PC4

PC4 100P_0402_50V8J

100P_0402_50V8J

0.068U_0402_10V6K

VS

+RTCBATT

12

VL +5VL

(100mA,40mils ,Via NO.= 2)

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

2

+RTCBATT

PJ3

JUMP_43X39@

PJ6

JUMP_43X39@

112

VIN

12

PR3

84.5K_0402_1%

84.5K_0402_1% PR5

PR5

22K_0402_1%

1 2

12

PR6

PR6 20K_0402_1%

PC5

20K_0402_1%

VIN

VL

EN0<39>

ACON<38>

PR21

100K_0402_1%

1 2

PD5

PD5 RB715F_SOT323-3

RB715F_SOT323-3

2 3

12

PC6

PC6 .1U_0402_16V7K

.1U_0402_16V7K

PD4

12

RLS4148_LL34-2

1

Precharge detector

15.97V/14.84V FOR ADAPTOR

Security Classification

2008/10/13 2009/10/13

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/13 2009/10/13

Compal Secret Data

Deciphered Date

C

GLZ4.3B_LL34-2

PR12

PR14

PR16

PR22

5 6

-

12

1000P_0402_50V7K

VS

12

PR2

5.6K_0402_5%

PD1

5.6K_0402_5%

12

10K_0402_1%

1 2

PACIN

12

PR7

PR7 10K_0402_1%

10K_0402_1%

PR4

ACIN <21,32,34>

PACIN <38>

Vin Detector

High 18.384 17.901 17.430 Low 17.728 17.257 16.976

B+

12

PR18

PR18 499K_0402_1%

12

PR23

10K_0402_1%

RTCVREF

12

13

D

S

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

499K_0402_1%

12

PR24

PR24 499K_0402_1%

499K_0402_1%

PR26

PR26 191K_0402_1%

191K_0402_1%

PR27

47K_0402_1%

2

G

PQ2

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

13

2

PQ3

PQ3 DTC115EUA_SC70-3

DTC115EUA_SC70-3

DCIN/DECTOR

LA-5381P

D

12

PC11

PC11 1000P_0402_50V7K

1000P_0402_50V7K

12

+5VALWP

of

36 46Friday, April 10, 2009

of

36 46Friday, April 10, 2009

of

36 46Friday, April 10, 2009

PACIN

0.2

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 96 degree C Recovery at 60 degree C

12

+3VLP

VMB

PC129

@

0.1U_0402_25V6

SMB3025500YA_2P

1 2

12

PC14

PC14 1000P_0402_50V7K

1000P_0402_50V7K

PL2

BATT+

12

100K_0603_1%_TH11-4H104FT

0.01U_0402_25V7K

100K_0603_1%_TH11-4H104FT

PC15

VL

12

PH1

12

PC17

0.22U_0805_16V7K

PC16

0.1U_0603_25V7K

PR33

13.7K_0402_1%

1 2

PR37

13.7K_0402_1%

TM_REF1

12

PC18

1000P_0402_50V7K

PH2 near main Battery CONN :

PF2

1 1

2 2

PJP2

1 2 3 4

10 11 12 13

5 6

GND GND

7 8

GND

9

GND

OCTEK_BTJ-09HA1G@

BATT_S1

1 2 3 4 5 6 7 8 9

EC_SMDA EC_SMCA

PR34

100_0402_1%

1 2

PF2

15A_65V_451015MRL

PR35

PR35 100_0402_1%

100_0402_1%

1 2

12

21

12

PR39

PR39 1K_0402_1%

1K_0402_1%

1 2

PR28

1K_0402_1%

PR31

PR31 1K_0402_1%

1K_0402_1%

1 2

PR36

6.49K_0402_1%

PR29

47K_0402_1%

12

+3VLP

BATT_TEMPA <32>

EC_SMB_DA1 <18,32> EC_SMB_CK1 <18,32>

12

PR40

PR40 100K_0402_1%

100K_0402_1%

VL

47K_0402_1%

1 2

8

PU4A

3

P

+

2

-

G

LM393DG_SO8

4

PR38

100K_0402_1%

12

PR32

O

VL

PR30

PR30 47K_0402_1%

47K_0402_1%

1 2

1

RLS4148_LL34-2

VL

PD7

12

2

G

2

G

ENTRIP1 <39>

13

D

PQ4

PQ4 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

13

D

PQ5

PQ5 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

ENTRIP2 <6,39>

BAT. thermal protection at 90 degree C Recovery at 53 degree C

PR42

1 2

8

PU4B

P

O

G

LM393DG_SO8

4

VLVL

PR41

PR41 47K_0402_1%

47K_0402_1%

1 2

7

12

PD8

RLS4148_LL34-2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

LA-5381P

D

0.2

of

37 46Friday, April 10, 2009

of

37 46Friday, April 10, 2009

of

37 46Friday, April 10, 2009

PQ6

TP0610K-T1-E3_SOT23-3

B+

3 3

VL

PR47

100K_0402_1%

POK<39,40>

4 4

A

1 2

PR48

PR48 0_0402_5%

0_0402_5%

12

@

2

G

PC22

.1U_0402_16V7K

22K_0402_1%

13

D

PQ7

PQ7 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PR45

1 2

12

PR43

100K_0402_1%

12

PC19

@

0.22U_1206_25V7K

13

2

B

+VSBP

12

PC20

@

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

100K_0603_1%_TH11-4H104FT

PC21

0.22U_0805_16V7K

2008/10/13 2009/10/13

12

PH2

PR44

13.7K_0402_1%

1 2

12

PR46

16.9K_0402_1%

Compal Secret Data

Deciphered Date

C

TM_REF1

47K_0402_1%

5

+

6

-

A

12

PC27

0.1U_0603_25V7K

2

G

13

P2

12

13

D

S

PQ8

PQ8 AO4407A_SO8

VIN

1 1

2

G

2 2

PACIN<36> ACON<36>

ACOFF<32>

AO4407A_SO8

8 7

5

12

DTA144EUA_SC70-3

DTA144EUA_SC70-3 PR53

PR53 47K_0402_1%

47K_0402_1%

2

13

D

PQ16

PQ16 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PACIN

DTC115EUA_SC70-3

ACOFF

PQ11

2

13

PQ15

PQ15 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR67

22K_0402_5%

1 2

4

PQ21

1 2 36

1 3

2

PQ9

PQ9 AO4407A_SO8

AO4407A_SO8

1 2 3 6

PR50

PR50 200K_0402_1%

200K_0402_1%

PR59

PR59 150K_0402_1%

150K_0402_1%

PQ19

PQ19 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

IREF<32>

4

5600P_0402_25V7K

FSTCHG<32>

0.01U_0402_25V7K

PR68

154K_0402_1%

PR71

120K_0402_1%

12

PC24

8 7

5

PC35

1 2

ADP_I<32>

12

CSON

PC42

1 2

0.01U_0402_25V7K

P3

100K_0402_1%

1SS355_SOD323-2

1 2

.1U_0402_16V7K

1 2

100P_0402_50V8J

12

P3

PR54

PD11

PR57

10K_0402_1%

PC29

PC33

@PC33

@

680P_0402_50V7K

1 2

PC34 6800P_0402_25V7KPC34 6800P_0402_25V7K

1 2

PR63 6.81K_0402_1%PR63 6.81K_0402_1%

1 2

PC37

@ PC37

@

1 2

.1U_0402_16V7K

6251VREF

1 2

26.7K_0402_1%

CHGVADJ<32>

3 3

PR49

0.015_2512_1%

1 2

12

1 2

PC38

PR70

8.25K_0402_1%

PR72

PR74

15.4K_0402_1%

1 2

31.6K_0402_1%

12

47K_0402_1%

B

B+

4 3

PR173

PQ12 TP0610K-T1-E3_SOT23-3PQ12 TP0610K-T1-E3_SOT23-3

2

12

PC28

2.2U_0603_6.3V6K

PR58

100K_0402_1%

6251_EN CSON

PR65

6251VREF

6251aclim

12

PR75

PR173

10_0603_5%

1 2

13

PR55

100K_0402_1%

12

PU5

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

DCIN

13

24

23

22

21

20

19

18

17

16

15

14

13

PJ14

2

JUMP_43X118@

PQ13

PQ13 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PD10

1

2

RB715F_SOT323-3

PC30

0.1U_0603_25V7K

DCIN

PC32

0.047U_0603_16V7K

1 2

20_0603_5%

PC36

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

PR69

2.2_0603_5%

BST_CHG

1 2

6251VDDP

DL_CHG

112

FSTCHG

2 3

12

PR60

20_0603_5%

1 2

PR61

PR62

20_0603_5%

1 2

PR64

2.2_0603_5%

BST_CHGA

12

PC43

1 2

4.7U_0805_6.3V6K

CSIP

0.1U_0603_25V7K

PD13

PD13 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PR73

4.7_0603_5%

C

CSIN

12

PC23

4.7U_1206_25V6K

SUSP# <25,29,32,35,40>

CSOP

12

PC39

12

6251VDD

D

PQ10

PQ10 AO4407A_SO8

PR51

47K_0402_1%

1 2

1SS355_SOD323-2

1 2

2

1SS355_SOD323-2

0.1U_0603_25V7K

CHG

AO4407A_SO8

1 2 3 6

4

PQ45

@

AO4407A_SO8

1 2 3 6

4

VIN

PD9

200K_0402_1%

12

PR66

0.02_2512_1%

ACOFF6251VDD

PR56

1 2

D

S

4 3

1 2

PD12

PC31

1 2

8 7

5

8 7

5

VIN

13

PACIN

2

G

PQ17

SSM3K7002FU_SC70-3

12

PC40

10U_1206_25V6M

PC41

10U_1206_25V6M

BATT+

12

B+

CHG_B+

12

PC25

PC26

4.7U_1206_25V6K

PR52

10K_0402_1%

1 2 13

PQ14

DTC115EUA_SC70-3

578

PQ18

PQ18 AO4466_SO8

AO4466_SO8

PL3

10U_LF919AS-100M-P3_4.5A_20%

3 6

578

3 6

241

10U_LF919AS-100M-P3_4.5A_20%

12

PQ20

PQ20 AO4466_SO8

AO4466_SO8

12

1 2

PR170

@

4.7_1206_5%

PC128

@

680P_0603_50V7K

VIN

12

PR171

PD14

PR171

309K_0402_1%

12

47K_0402_1%

PR172

PR175

10K_0402_1%

1 2

12

PC130

.1U_0402_16V7K

ADP_V <32>

CC=0.25A~3A IREF=1.016*Icharge IREF=0.254V~3.048V VCHLIM need over 95mV

CHGVADJ=(Vcell-4)/0.10627

Vcell CHGVADJ 4V

4.2V

4.35V

0V

1.882V

3.2935V

@PD14

@

GLZ4.3B_LL34-2

Iada=0~3.947A(75W) CP= 92%*Iada; CP=3.65A

CP mode

4 4

Vaclim=2.39*(20K//152K/(20K//152K+24K//152K))=1.09986V

Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05) where Vaclm=1.09986V, Iinput=3.65A

90W Iadapter=0~4.74A PR49=0.015 ohm CP=4.357A PR70=53.6K PR72=20K

120W Iadapter=0~6.32A PR49=0.015 ohm CP=5.81A PR70=8.25K PR72=26.7K

-

A

CELLS

CELL number 4

VDD

GND Float

32

B

Security Classification

Issued Dat e

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTI AL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTI AL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVI SION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVI SION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/13 2009/10/13

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

CHARGER

LA-5381P

D

38 46Friday, Ap ril 10, 2009

of

0.2

A

B

C

D

2VREF_51125

1 1

12

PC44

0.22U_0603_10V7K

PR77

VREF

VIN

PC57

2

12

0.1U_0603_25V7K

VFB1

VREG517GND

1

ENTRIP1

PGOOD

VBST1

DRVH1

DRVL1

VCLK

18

PC56

4.7U_0805_10V6K

PR77

30K_0402_1%

1 2

PR79

19.1K_0402_1%

1 2

PR81

150K_0402_1%

ENTRIP1

1 2

24

VO1

23 22 21 20

LL1

19

TPS51125RGER_QFN24_4X4

BST_5V UG_5V LX_5V LG_5V

0_0603_1%

1 2

VL

PR83

B++

12

PC47

1000P_0402_50V7K

POK <37,40>

PC51

PC51 .1U_0402_16V7K

.1U_0402_16V7K

1 2

12

PC48

10U_1206_25V6M

AO4466_SO8

AO4712_SO8

PQ23

PQ25

578

3 6

241

4.7UH_SIL1045R-4R7PF_6.3A_30%

1 2

12

578

PR85

@

4.7_1206_5%

12

3 6

241

PC55

@

680P_0603_50V7K

PL5

+5VALWP

1

+

PC53

2

220U_6.3VM_R15

Ipeak=5A Imax=3.5A F=245KHz Total Capacitor 220uF, ESR 15mohm

12

PC131

0.1U_0402_25V6

PR76

13K_0402_1%

1 2

PR78

150K_0402_1%

BST_3V UG_3V LX_3V LG_3V

PR87

100K_0402_1%

2VREF_51125

PR78

20K_0402_1%

1 2

PR80

1 2

PU6

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

ENTRIP2

5

6

ENTRIP2

EN0

14

13

1 2

PR88

@PR88

@

0_0402_5%

B++

VFB2

SKIPSEL

4

15

3

TONSEL

16

12

B++

PJ15

2

B+

2 2

Ipeak=5A Imax=3.5A F=305KHz Total Capacitor 220uF, ESR 15mohm

3 3

112

JUMP_43X118@

12

PC45

1000P_0402_50V7K

+3VALWP

SSM3K7002FU_SC70-3

12

PC46

10U_1206_25V6M

4.7UH_SIL1045R-4R7PF_6.3A_30%

PC52

220U_6.3VM_R15

13

D

PQ26

S

1

+

2

G

PL4

1 2

@

2

G

PR84

4.7_1206_5%

PC54

680P_0603_50V7K

578

3 6

241

578

12

3 6

241

ENTRIP2 <6,37>ENTRIP1 <37>

13

D

PQ27

PQ27 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PQ22

PQ22 AO4466_SO8

AO4466_SO8

PQ24

PQ24 AO4712_SO8

AO4712_SO8

PC49

4.7U_0805_10V6K

EN0<36>

+3VLP

12

1 2

0_0603_1%

PC50

.1U_0402_16V7K

B+

PR82

PR86

499K_0402_1%

1 2

VL

1 2

VS

PR90

100K_0402_1%

4 4

A

PR89

100K_0402_1%

12

PR91

49.9K_0402_1%

12

13

D

PQ28

2

G

SSM3K7002FU_SC70-3

S

PC58

@

0.01U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/13 2009/10/13

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

3VALW/5VALW

LA-5381P

D

of

39 46Friday, April 10, 2009

of

39 46Friday, April 10, 2009

of

39 46Friday, April 10, 2009

0.2

5

D D

PR93

0_0402_5%

SUSP#<25,29,32,35,38>

+5VALW

C C

1 2

PR96

422_0603_1%

1 2

1U_0603_10V6K

PC64

12

PC61

@PC61

@

.1U_0402_16V7K

12

PC67

@PC67

@

47P_0402_50V8J

1 2

PR98

9.76K_0402_1%

1 2

12

PR99

20.5K_0402_1%

4

PR92

255K_0402_1%

1 2

1

TON VOUT V5FILT VFB PGOOD

15

EN_PSV

GND7PGND

TP

8

PU7

2 3 4 5 6

PR94

0_0603_1%

1 2

14

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

BST_1.1V DH_1.1V LX_1.1V

1 2

PR97

15.4K_0402_1%

DL_1.1V

3

0.1U_0603_25V7K

+5VALW

AO4466_SO8

PC62

1 2

AO4712_SO8

12

PC65

4.7U_0805_10V6K

PQ29

PQ30

578

3 6

578

3 6

241

1.8UH_1164AY-1R8N=P3_9.5A_30%

241

12

PC137

1 2

12

PR95

@

12

PC66

@

1000P_0402_50V7K

PL6

4.7_1206_5%

680P_0603_50V7K

12

2

1.1V_B+

PC59

4.7U_0805_25V6-K

HCB4532KF-800T90_1812

1 2

12

PC60

4.7U_0805_25V6-K

1

+

PC63

2

330U_4V_M

PL14

B+

+1.1V

+NB_COREP

Ipeak=7A Imax=4.9A F=315KHz Total Capacitor 660uF, ESR 7.5mohm

1

1.2V_B+

12

578

PQ31

AO4466_SO8

PR100

255K_0402_1%

PR101

B B

POK<37,39>

+5VALW

A A

5

PR101

0_0402_5%

1 2

PR104

422_0603_1%

1 2

1U_0603_10V6K

PC73

12

PC70

PC70 .1U_0402_16V7K

.1U_0402_16V7K

@

12

PC76

@PC76

@

47P_0402_50V8J

1 2

PR106

12.4K_0402_1%

1 2

12

PR107

20.5K_0402_1%

4

1 2

1

TON VOUT V5FILT VFB PGOOD

15

EN_PSV

GND7PGND

TP

8

PU8

2 3 4 5 6

PR102

0_0603_1%

1 2

14

VBST

DRVH

LL

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3.5x3.5

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

13 12 11 10 9

Issued Date

BST_1.2V DH_1.2V LX_1.2V

1 2

PR105

15.4K_0402_1%

DL_1.2V

3

AO4466_SO8

3 6

241

PC71

1 2

0.1U_0603_25V7K

+5VALW

AO4712_SO8

12

PC75

4.7U_0805_10V6K

2008/10/13 2009/10/13

PQ32

578

3 6

1.8UH_1164AY-1R8N=P3_9.5A_30%

241

Compal Secret Data

Deciphered Date

PC135

1 2

12

PR103

@

12

PC74

@

12

1000P_0402_50V7K

PL7

4.7_1206_5%

680P_0603_50V7K

12

PC68

PC136

PC68

1000P_0402_50V7K

2

4.7U_0805_25V6-K

1

+

PC72

2

330U_D2_2.5VY_R15M

1 2

12

PC69

4.7U_0805_25V6-K

+1.2VALWP

Ipeak=5A Imax=3.5A F=315KHz Total Capacitor 330uF, ESR 15mohm

Title

Size Document Number Rev

Date: Sheet

B+

1

+

PC138

220U_25V_M

2

Compal Electronics, Inc.

NB_COREP/1.2VALWP

LA-5381P

40 46Friday, April 10, 2009

1

0.2

of

PL15

HCB4532KF-800T90_1812

5

D D

PR109

0_0402_5%

SYSON<25,32,35>

+5VALW

C C

1 2

422_0603_1%

1 2

1U_0603_10V6K

PR112

PC82

4

12

PC79

PC79 .1U_0402_16V7K

.1U_0402_16V7K

@

12

PC84

@PC84

@

47P_0402_50V8J

1 2

PR114

28.7K_0402_1%

1 2

12

PR115

20.5K_0402_1%

3

578

PQ33

AO4466_SO8

PC80

1 2

0.1U_0603_25V7K

+5VALW

12

PC85

4.7U_0805_10V6K

AO4466_SO8

PQ34

AO4712_SO8

3 6

578

3 6

PR108

255K_0402_1%

1 2

1

TON VOUT V5FILT VFB PGOOD

15

EN_PSV

GND7PGND

TP

8

PU9

2 3 4 5 6

PR110

0_0603_1%

1 2

14

VBST

DRVH

LL

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3.5x3.5

13 12 11 10 9

BST_1.8VP DH_1.8VP LX_1.8VP

1 2

PR113

15.4K_0402_1%

DL_1.8VP

2

12

PC134

1000P_0402_50V7K

241

1.8UH_1164AY-1R8N=P3_9.5A_30%

241

1.8V_B+

12

1 2

12

PR111

@

12

PC83

@

PC77

4.7U_0805_25V6-K

PL8

4.7_1206_5%

680P_0603_50V7K

12

PC78

4.7U_0805_25V6-K

PL16

HCB4532KF-800T90_1812

1 2

1

+

PC81

2

220U_6.3VM_R15

B+

+1.8VP

Ipeak=8A Imax=5.6A F=315KHz Total Capacitor 220uF, ESR 15mohm

1

B B

PU10

APL5508-25DC-TRL_SOT89-3

PJ19

+3VS

A A

5

4

112

JUMP_43X39@

2

PC86

1U_0603_10V6K

APL5508-25DC-TRL_SOT89-3

2

12

IN

3

OUT

GND

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC87

4.7U_0805_6.3V6K

3

+2.5VSP

Compal Secret Data

2008/10/13 2009/10/13

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.8VP/2.5VS

LA-5381P

1

of

41 46Friday, April 10, 2009

of

41 46Friday, April 10, 2009

of

41 46Friday, April 10, 2009

0.2

5

4

3

2

1

PC92

+3VS

1

PJ20

1

JUMP_43X79@

2

PC88

1 2

1.15K_0402_1%

13

D

2

G

12

S

+1.8V

1

2

12

PC93

13

D

2

G

12

PQ36

S

SSM3K7002FU_SC70-3

12

PR116

12

PR117

1K_0402_1%

PQ35

SSM3K7002FU_SC70-3

PJ21

PJ21 JUMP_43X79@

JUMP_43X79@

1K_0402_1%

PR119

PR121

.1U_0402_16V7K

12

.1U_0402_16V7K

PC90

PC95

12

2 3 4

12

PC91

PC91 10U_0805_6.3V6M

10U_0805_6.3V6M

2 3 4

12

PC96

PC96 10U_0805_6.3V6M

10U_0805_6.3V6M

PU11

VIN1VCNTL

NC

GND VREF

NC

VOUT

NC TP

APL5331KAC-TRL_SO8

+1.5VSP

PU12

VIN1VCNTL

NC

GND VREF

NC

VOUT

NC TP

APL5331KAC-TRL_SO8

+0.9VP

6 5 7 8 9

+5VALW

12

PC89

PC89 1U_0603_6.3V6M

1U_0603_6.3V6M

12

PC94

PC94 1U_0603_6.3V6M

1U_0603_6.3V6M

+3VALW

D D

4.7U_0805_6.3V6K

SUSP<35>

C C

B B

SYSON#<35>

1 2

PR118

0_0402_5%

@PC92

@

.1U_0402_16V7K

4.7U_0805_6.3V6K

PR120

0_0402_5%

1 2

PC97

@PC97

@

.1U_0402_16V7K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/13 2009/10/13

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

0.9VP/1.5VSP

LA-5381P

1

of

42 46Friday, April 10, 2009

of

42 46Friday, April 10, 2009

of

42 46Friday, April 10, 2009

0.2

A

B

C

D

E

PQ37

PQ37 AO4466_SO8

AO4466_SO8

PQ38

AO4712_SO8

PQ40

4

PQ43

4

CPU_B+

1

12

+

PC101

PC100

10U_1206_25V6M

12

3 5

241

123 5

3 5

241

123 5

PC102

220U_25V_M

2

@

4.7UH_SIL1045R-4R7PF_6.3A_30%

1 2

PR126

@PR126

@

4.7_1206_5%

PC107

@PC107

@

680P_0603_50V7K

PQ39

PQ39 TPCA8023-H_SO8

TPCA8023-H_SO8

4

123 5

PQ42

PQ42 TPCA8023-H_SO8

TPCA8023-H_SO8

4

123 5

D

220U_25V_M

PL10

1

+

2

PC109

10U_1206_25V6M

PQ41

TPCA8028-H_SOP-ADVANCE8-5

PC115

10U_1206_25V6M

PQ44

TPCA8028-H_SOP-ADVANCE8-5

PC98

33P_0402_50V8K

12

PR122

44.2K_0402_1%

12

47

48

VIN

VCC

ISN0

ISP0

14

13

12

RTN1

12

@ PR174

@

10K_0402_5%

DIFF_1

4700P_0402_25V7K

12

@

PR165

1K_0402_5%

@

RTN0

PR174

0_0402_5%

PC123

44.2K_0402_1%

PC103

1000P_0402_50V7K

22K_0402_1%

44

45

46

43

FB_NB

FSET_NB

VSEN_NB

COMP_NB

ISL6265HRTZ-T_QFN48_6X6

RTN1

VSEN0

RTN0

VSEN1

17

15

16

18

12

PR157

VSEN1

12

@

@ PR166

@

12

54.9K_0402_1%

12

@ PR169

@

PR123

1 1

CPU_B+

+5VS +3VS

12

PR135

@PR135

PR134

105K_0402_1%

2 2

VGATE<32>

VR_ON<32>

113K_0402_1%

12

A

1 2 1 2

PR145

FB_0

54.9K_0402_1%

12

@ PR168

@

36.5K_0402_1%

H_PWRGD<6,19>

SB_PWRGD<20,32>

3 3

255_0402_1%

4 4

PR160

1K_0402_5%

CPU_SVD<6> CPU_SVC<6>

DIFF_0

PC120

4700P_0402_25V7K

12

PR162

@

10K_0402_1%

PR139 100K_0402_5%@PR139 100K_0402_5%@ PR140 100K_0402_5%P R140 100K_0402_5%

PR146

4.02K_0402_1%

12

+CPU_CORE_0

CPU_VDD0_RUN_FB_H<6> CPU_VDD0_RUN_FB_L<6> CPU_VDD1_RUN_FB_L<6>

VW0

COMP0

12

PC121

180P_0402_50V8J

PR163

PC126

12

1200P_0402_50V7K

PR168

12

PR131

PR131 0_0402_5%

0_0402_5%

ISL6265_PWROK

PR142

0_0402_5%

PR148

@PR148

@

10_0402_5%

CPU_VDD1_RUN_FB_H<6>

+CPU_CORE_1

PC122

1000P_0402_50V7K

PR164

6.81K_0402_1%

12

@PR132

@

@PR137

@

12

+5VS

0.1U_0603_25V7K

PR132 105K_0402_1%

105K_0402_1%

PR137 105K_0402_1%

105K_0402_1%

12

PR144

0_0402_5%

12

0_0402_5%

PR153

@

1 2

10_0402_5%

12

PR123

2_0603_5%

1 2

PC104

0.1U_0603_16V7K

1 2

PR128

2_0603_5%

PC108

PU13

1 2 3 4

12

5 6 7 8

9 10 11 12

ISP0 ISN0

PR149

VSEN0

12

PR154

10_0402_5%

@

1 2

10_0402_5%

PR158

@PR158

@

12

OFS/VFIXEN PGOOD PWROK SVD SVC ENABLE RBIAS OCSET VDIFF0 FB0 COMP0 VW0

0_0402_5%

PR150

PR152

PR152 0_0402_5%

0_0402_5%

+1.8V

12

PR161

255_0402_1%

B

PC99

1000P_0402_50V7K

12

PR124

12

PR129

0_0402_5%

12

11.3K_0402_1%

42

41

40

RTN_NB

PGND_NB

OCSET_NB

VDIFF1

COMP121ISP1

FB1

19

20

PC124

180P_0402_50V8J

@

PR166

12

1200P_0402_50V7K

PR169

36.5K_0402_1%

12

UGATE_NB

PHASE_NB

PR125

0_0603_1%

BOOT_NB

PR127

@ PR127

@

10_0402_5%

+VDDNBP

1 2

PR130

39

LGATE_NB

VW1

22

12

38

PHASE_NB

23

ISP1

COMP1FB_1

PC127

PHASE_NB

12

LGATE_NB PHASE_NB UGATE_NB

12

PR133

0_0402_5%

37

36

BOOT_NB

UGATE_NB

35

BOOT0

34

UGATE0

33

PHASE0

32

PGND0

31

LGATE0

30

PVCC

29

LGATE1

28

PGND1

27

PHASE1

26

UGATE1

25

BOOT1

ISN1

TP

24

49

ISN1

VW1

@

12

PC125

1000P_0402_50V7K

PR167

@ PR167

@

@PC127

@

6.81K_0402_1%

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFI DENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATI ON IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

0.22U_0603_10V7K

LGATE_NB

CPU_VDDNB_RUN_FB_H <6>

@PR136

@

10_0402_5%

1 2

BOOT_NB BOOT0 UGATE0 PHASE0

LGATE0

LGATE1

PHASE1 UGATE1 BOOT1

12

C

0.22U_0603_10V7K

PR136

UGATE0

PHASE0

BOOT0

TPCA8028-H_SOP-ADVANCE8-5

+5VS

12

PC114

PC114 1U_0603_16V6K

1U_0603_16V6K

UGATE1

PHASE1

BOOT1

TPCA8028-H_SOP-ADVANCE8-5

2008/10/13 2009/10/13

578

3 6

241

578

1 2

PC105

3 6

241

CPU_VDDNB_RUN_FB_L <6>

PR138

0_0603_1%

1 2

PC111

0.22U_0603_10V7K

0_0603_1%

1 2

@PQ40

@

LGATE0

PR151

1 2

PC117

0.22U_0603_10V7K

@PQ43

@

LGATE1

Compal Secret Data

Deciphered Date

PL9

HCB4532KF-800T90_1812

1 2

12

PC132

PC132 1000P_0402_50V7K

1000P_0402_50V7K

1

+

PC106

PC106 220U_D2_4VM

220U_D2_4VM

2

CPU_B+

12

PC110

10U_1206_25V6M

12

PR141

4.7_1206_5%

12

PC112

PC112 680P_0603_50V7K

680P_0603_50V7K

CPU_B+

12

PC116

10U_1206_25V6M

12

PR155

4.7_1206_5%

12

PC118

PC118 680P_0603_50V7K

680P_0603_50V7K

Size Document Number Rev

Custom

Date: Sheet

B+

12

PC133

PC133 1000P_0402_50V7K

1000P_0402_50V7K

+VDDNBP

PL11

0.36UH_PCMC104T-R36MN1R17_30A_20%

Title

PL11

1 2

PR143

3.65K_0402_1%

1 2

PC113

0.1U_0603_16V7K

PR147

47K_0402_1%

ISP0

PL12

1 2

PR156

3.65K_0402_1%

1 2

PC119

0.1U_0603_16V7K

PR159

47K_0402_1%

ISP1

Compal Electronics, Inc.

PJ22

2

112

JUMP_43X118@

JUMP_43X118@ PJ23

PJ23

2

112

JUMP_43X118@

JUMP_43X118@ PJ24

PJ24

2

112

JUMP_43X118@

4 3

12

ISN0

4 3

12

ISN1

+CPU_CORE

LA-5381P

E

+CPU_CORE_1+CPU_CORE_0

+CPU_CORE_0

+CPU_CORE_1

43 46Friday, April 10, 2009

of

0.2

5

4

ZZZ

3

2

1

PCB

PCB LA-5381P REV0

D D

PCB LA-5381P REV0

U3

RS880M

RS880MR1@

U3

RS880MC

RS880MCR1@

North Bridge

C C

U15

South Bridge

SB710

SB710R1@

UL1

B B

LAN Controller

8103EL

8103EL@

UL3

LAN Transformer

10/100M transformer

8103EL@

A A

Security Classification

2008/04/14 2009/04/14

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/04/14 2009/04/14

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ISPD

LA-5381P

44 46Friday, April 10, 2009

1

1.0B

5

4

3

2

1

HW4 Product Improvement Record (P.I.R.)

NSKAE LA-5381P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 GERBER-OUT DATE: 2009/04/06 NO DATE PAGE MODIFICATION LIST PURPOSE

D D

-------------------------------------------------------------------------------------------------------------1 3/10 17 Change R156 to 10K pull down Special LCD issue 2 3/10 30 Change RA16 to 1% tolerence Codec requirement 3 3/10 33 Add R962~R965 Reserve GPIO to EC 4 3/13 22 Add R193~R196 Strap pin for SW 5 3/23 16 Add R540 Common Design 6 3/24 30 Add CA49,CA50 GPS issue 7 3/24 30 Add CA51~CA54 Common design 8 3/24 27 Add R722 and C754 Common design 9 3/25 27 Add R423 Common design 10 3/25 28 Add RM7 for Wimax module Wimax issue 11 3/25 28 Add R822 Customer Request 12 4/9 31 Change UC1 from JMB385 to JMB380 For ME height limit 13 4/9 35 Add C863 to C884 For EMI request 14 4/9 18 Delete Q161 and add D53 For customer request 15 4/9 16 Delete Q162 and add D21 For customer request

--------------------------------------------------------------------------------------------------------------

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2008/5/182007/5/18

2

Title

Size Document Number Rev

Date: Sheet of

PIR

45 46Friday, April 10, 2009

1

0.2

Version Change List ( P. I. R. List ) for Power Circuit

Version Change List ( P. I. R. List ) for Power CircuitVersion Change List ( P. I. R. List ) for Power Circuit

Request

Page#

Page#Page#

41-42

41-42 41-42

Title

TitleTitle

Add PC138 2009/02/10 POWEREVT41 Change PL6,PL7,PL8 to TOKO POWER2009/03/31DVT Change PR79 to 19.1K HW2009/03/31DVT40 Change PC63,PC72 to 330uF POWER2009/03/31DVT41 Noise Change PC138,PC77,PC78 POWER2009/03/31DVT Noise mount PR95,PC66,PR103, POWER2009/03/31DVT PC74,PR111,PC83 Add PL13,PL14,PL15,PL16 Change PR65 to 47K POWER2009/03/31DVT39 For ADP_I Change PL5=4.7u POWER2009/03/3140 For common circuit

DVT

Change PR71,PL3 POWER For 12 Cell charge 3.6A2009/03/31DVT39 Change PR106,PR107 HW2009/03/31DVT41 Change to 12.1K and 19.6K Change PQ39 and PQ42 POWER2009/03/31PVT44 No issue Change to common parts

Date

DateDate

RequestRequest

Owner

OwnerOwner

POWER2009/02/25EVT NSKAE for Tigirs(UMA)44 POWER2009/03/16Change PR74EVT39 For CHGVADJ (memo) HW2008/12/30 meet AMD RS780 SPEC (memo)Change PR93,PC61EVT41

Issue Description

Issue DescriptionIssue Description

Solution Description

Solution DescriptionSolution Description

Noise (memo) Noise For HDMI

For EMI

Security Classification

Issued Date

THIS SHEET OF ENGINEERIN G D RAWING IS THE PROPRIETARY PR OPER T Y OF COMPAL ELECTRONICS, INC. AN D C ONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERIN G D RAWING IS THE PROPRIETARY PR OPER T Y OF COMPAL ELECTRONICS, INC. AN D C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORM ATION. THIS SHEET MAY NOT BE T R AN SF ER ED F R OM T H E CUSTODY OF THE COMPETENT DI VI SI ON OF R&D

AND TRADE SECRET INFORM ATION. THIS SHEET MAY NOT BE T R AN SF ER ED F R OM T H E CUSTODY OF THE COMPETENT DI VI SI ON OF R&D

AND TRADE SECRET INFORM ATION. THIS SHEET MAY NOT BE T R AN SF ER ED F R OM T H E CUSTODY OF THE COMPETENT DI VI SI ON OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/13

Compal Secret Data

Deciphered Date

2009/10/13

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Friday, April 10, 2009

Date: Sheet

Power PIR

LA-5381P

of

46 46

0.2

Compal LA-5381P NSKAE Bradford 10AT, Satellite A500 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual