Compal LA-5331P NSWAE, Satellite L500, Satellite L500D, Satellite L550, LA-5331P NTWAE Schematic

A

1 1

B

C

D

E

Compal confidential

2 2

Liverpool/Sunderland 10ATG

NSWAE/NTWAE LA-5331P Schematics Document

Mobile AMD S1G3/ RX881

3 3

SB710 2009-10-02 Rev. 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

154Tuesday, February 23, 2010

E

C

of

A

B

C

D

E

Compal Confidential

Model Name : NSWAE/NTWAE VGA on board File Name : LA-5331 Tigris Platform

1 1

P

Hyper Transport Lin

2.6GH

z

AMD S1G CPU

uFCPGA-638 Package

k

16X16

2

page 5,6,7,8

ATI M92

CRT

with VRAM

page 17

Page 36,37,38,39,40,41, 42,43,44

ATI

RX881

Thermal Senso

r

ADM1032ARM-1

200pin DDRII-SO-DIM X

2

BANK 0, 1, 2, 3

Memor

Dua

BUS

1.8V DDRI

Channel 667/800MH

l

︵

page 7

y DDRII

I

︶

Z

Fan Control

APL5607KI-TRG

M

page 9,10

page 5

LCD Conn.

page 18

HDMI CE

C

Controlle

EC SMBUS

2 2

RTL8103EL LAN

10/100M

PCIe port 3

RJ4

5

page 26

3 3

Clock Generator

SLG8SP626VTR

page 16

RTC CKT

.

page 45

Power On/Off CKT.

page 34

DC/DC Interface CKT

.

page 35

r

R5F211B4D33SP

page 26

USB/B

page 31

Power/B

page 34

Touch/B

page 34

ODD/B

page 25

page 19

PCIeMini Card

WLA

N

USB port 8 PCIe Port 2

page 27

Power Circuit DC/DC

page 45,46,47,48

4 4

49,50,51,52

HDM Conn.

PCIe 3x

USB port 5 PCIe port 0

USB port 2 SATA port 2

Debug Por

t

page 32

I

page 19

1.5V 2.5GHz(250MB/s)

NEW Car

d

page 27

eSATA

page 25

Touch Pad

5V 480MHzUSB

SATA 5V 1.5GHz(150MB/s)

5V 480MHzUSB

LPC BUS

3.3V 33 MHz

ENE KB926 D

3

page 33

Int.KBD

page 34

page 32

A-Link Expres 4X PCI-

E

I

SPI ROM

page 32

page 11,12,13,14,15

s

ATI

SB710

page 20,21,22,23,24

HD Audio

Right USB Con

n

USB Port 0,1

USB 5x 5V 480MHz

WLA

USBPort 8

SATA

5V 1.5GHz(150MB/s)

SATA

5V 1.5GHz(150MB/s)

3.3V 24.576MHz/48Mhz

MDC 1.5

page 32

RJ1

1

page 32

TPA6017

page 31

N

page 27

AMPLIFIER

page 30

SPK

CON

N

page 30

USBPort 9

USBPort 7

SAT

A

HDD

1

SATA port 1

SAT

ODD

SATA port 3

HDA Codec

ALC272

MIC CON

Int. Camera

page 18

FingerPrinter

page 31

page 25

A

page 25

page 29

N

page 30

Int. MIC

page 30

Bluetooth

USBPort 6

RTS5159

USBPort 4

page 31

E

page 28

H

P

CON

page 30

3IN1

N

Volum Control

3IN1

page 28

e

page 30

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

254Tuesday, February 23, 2010

E

C

of

5

4

3

2

1

DESIGN CURRENT 0.1A

B+

TPS51125RGER

D D

RUNON

N-CHANNEL

SI4800

DESIGN CURRENT 0.1A

DESIGN CURRENT 1A

DESIGN CURRENT 3.5A

DESIGN CURRENT 2A

DESIGN CURRENT 1.5A

ENVDD

RUNON

N-CHANNEL

SI4800

NSWAE Liverpool AMD NTWAE Sunderland AMD

P-CHANNEL

AO3413

SUSP

TPS51117RGYR

P-CHANNEL

BT_PWR#

AO3413

WOL_EN#

P-CHANNEL

AO3413

APL5508

C C

TPS51117RGYR

POK

VR_ON

N-CHANNEL

VLDT_EN#

IRF8113

ISL6265

DESIGN CURRENT 1A

DESIGN CURRENT 9A

DESIGN CURRENT 180mA

DESIGN CURRENT 330mA

DESIGN CURRENT 300mA

DESIGN CURRENT 0.3A

DESIGN CURRENT 4.5A

DESIGN CURRENT 18A DESIGN CURRENT 18A DESIGN CURRENT 3A

+CPU_CORE_0 +CPU_CORE_1

+3VL +5VL

+3VALW

+5VALW

+5VS +3VS

+LCD_VDD

+1.5VS

+BT_VCC

+3V_LAN

+2.5VS

+1.2VALW

+1.2V_HT

+VDDNB

SYSON

DESIGN CURRENT 7A

DESIGN CURRENT 1A

DESIGN CURRENT 2A

DESIGN CURRENT 7A

TPS51117RGYR

SUSP#

B B

TPS51117RGYR

N-CHANNEL

IRF8113

SUSP

SYSON#

APL5331KAC

+1.8V

+1.8VS

+0.9V

+NB_CORE

SUSP#

ISL6268CAZ

DESIGN CURRENT 23A

+VGA_CORE

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

354Tuesday, February 23, 2010

1

CCustom

of

A

Voltage Rails

O : ON X : OFF

B

Symbol Note :

: Digital Ground

C

D

E

: Analog Ground

+5VS

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

State

S0

S1

S3

S5 S4/AC

power plane

+B +3VL +5VL

+RTCVCC

O O O O O

X

+3VALW +1.2VALW +3V_LAN

O O O O

X XX X

+3VS +2.5VS +1.8VS +1.5VS +1.1VS

+1.8V+5VALW

+VGA_CORE

+0.9V

+1.2V_HT

+0.9V

+CPU_CORE_NB +CPU_CORE_0 +CPU_CORE_1

OO OO

O

X XX X

X

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

3 3

DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)

HEX

A0

D2

EC SM Bus1 address

Device Address Smart Battery HDMI-CEC EC KB926D4

HEX 16H 34H

0001 011X b 0011 010X b

ADDRESS

1 0 1 0 0 0 0 X 1 0 1 0 0 0 1 XA2 1 1 0 1 0 0 1 0

EC SM Bus2 address

Device ADI1032-1 CPU ADI1032-2 VGA EC KB926D3

HEX Address

1001 100X b

98H

1001 101X b

9AH

@ : just reserve , no build

DEBUG@ : reserve for debug.

Layout Notes

L

UMA@: means for RS780M.

BTO (Build-To-Order) Option Table

Function Description Explain BTO

Express card / PCMCIA

( E / A )

EXPCARD@ / PCMCIA@

FingerPrinter

( F )

FP@

CAMERA & MIC

CAMERA MIC CAM@ MIC@

BLUE TOOTH

( B )

BT@

(X)

AMD(UMA) IHDMI@

SMBUS Control Table

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 I2C_CLK I2C_DATA DDC_CLK0 DDC_DATA0 DDC_CLK1 DDC_DATA1 SCL0 SDA0 SCL1 SDA1 SCL2 SDA2 SCL3 SDA3

RJ11 ( R )

MDC@

SOURCE

KB926

RX881

SB710

SSD ( S )

SSD@

HDMI

(Y) ATI VGA/B HDMI@

SATA ODD

16" 17"

16inch@

COMMON H@

BATTINVERTER

VVV

17inch@

LVDS wireset

Cost down LVDSSET@

HDMI CEC

WiFi

( H ) Half - size WLAN@

16inch_45@ 17inch_45@

CPU THERMAL SENSOR

SODIMM

I / II

WIMAX@

DC-IN

G- sensor

First Second

G@ + G_1st@ G@ + G_2nd@

CHIPSET

PUMA@ TIGRIS@

WLAN

LCD DDC ROM

CLK GEN

V

VV

V

HDMI DDC ROM

V

3 in 1 card reader

NEW CARD

V

RTS5159

CARD@

MXM Thermal Sensor

V

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

454Tuesday, February 23, 2010

E

C

of

A

B

C

D

E

< C1, C2 and C7 must be replaced to 10-uF for Caspian compatibility >

+1.2V_HT

Near CPU SocketVLDT CAP.

250 mil

1

C1

C1 10U_0805_10V6K

10U_0805_10V6K

1 1

2

1

C2

C2 10U_0805_10V6K

10U_0805_10V6K

2

1

C3

0.22U_0603_16V4Z

2

1

C4

0.22U_0603_16V4Z

2

1

C5

C5 180P_0402_50V8J

180P_0402_50V8J

2

1

C6

C6 180P_0402_50V8J

180P_0402_50V8J

2

H_CADIP[0..15]11

2 2

3 3

H_CADIP[0..15] H_CADIN[0..15]

VLDT=500mA

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP011 H_CLKIN011 H_CLKIP111 H_CLKIN111

H_CTLIP011 H_CTLIN011 H_CTLIP111 H_CTLIN111

+1.2V_HT

JCPUA

D1 D2 D3 D4

E3 E2 E1 F1 G3 G2 G1 H1

J1

K1

L3 L2

L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4

L5 M5 M3 M4 N5 P5

J3

J2

J5 K5

N1 P1 P3 P4

6090022100G_B@

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

HT LINK

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1 L0_CTLOUT_H0

L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1

H_CADOP[0..15] H_CADON[0..15]

+VLDT_B

AE2 AE3 AE4 AE5

H_CADOP0

AD1

H_CADON0

AC1

H_CADOP1

AC2

H_CADON1

AC3

H_CADOP2

AB1

H_CADON2

AA1

H_CADOP3

AA2

H_CADON3

AA3

H_CADOP4

W2

H_CADON4

W3

H_CADOP5

V1

H_CADON5

U1

H_CADOP6

U2

H_CADON6

U3

H_CADOP7

T1

H_CADON7

R1

H_CADOP8

AD4

H_CADON8

AD3

H_CADOP9

AD5

H_CADON9

AC5

H_CADOP10

AB4

H_CADON10

AB3

H_CADOP11

AB5

H_CADON11

AA5

H_CADOP12

Y5

H_CADON12

W5

H_CADOP13

V4

H_CADON13

V3

H_CADOP14

V5

H_CADON14

U5

H_CADOP15

T4

H_CADON15

T3 Y1

W1 Y4 Y3

R2 R3 T5 R5

1 2

< To NB >< From NB >

H_CLKOP0 11 H_CLKON0 11 H_CLKOP1 11 H_CLKON1 11

H_CTLOP0 11 H_CTLON0 11 H_CTLOP1 11 H_CTLON1 11

H_CADOP[0..15] 11 H_CADON[0..15] 11H_CADIN[0..15]11

C7

C7 10U_0805_10V6K

10U_0805_10V6K

< VLDT_A & VLDT_B : HyperTransport I/O ring power >

< FAN Control Circuit : Vout = 1.6 x Vset >

+5VS

1A

12

D1

@

GND GND GND GND

C183

2

1

8 7 6 5

B

12

@

1SS355_SOD323-2

D2

D2 BAS16_SOT23-3

BAS16_SOT23-3

JFAN

+FAN1

1

2

C

3

4

GND

5

GND

ACES_85204-0300N

2008-09-25 2009-09-25

1

C9

@ C9

@

1000P_0402_50V7K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

12

R12

R12 10K_0402_5%

10K_0402_5%

2

C8

@

0.01U_0402_25V7K

1

Compal Secret Data

Deciphered Date

FAN_SPEED1 33

D

< To EC >

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

554Tuesday, February 23, 2010

E

of

C

+FAN1

1

C192

C192 10U_0805_10V4Z

10U_0805_10V4Z

2

< From EC >

4 4

EN_DFAN133

A

10U_0805_10V4Z

U6

1

EN

2

VIN

3

VOUT

4

VSET

APL5607KI-TRG_SO8

A

< DDR2 VREF is 0.5 ratio >

+1.8V

R1

R1 1K_0402_1%

1K_0402_1%

1 2

R2

1 1

1K_0402_1%

1 2

2 2

< To SO_DIMMA >

3 3

< To SO_DIMMA >

+MCH_REF

1

C12

0.1U_0402_16V7K

2

1

C13

C13 1000P_0402_50V7K

1000P_0402_50V7K

2

Place them close to CPU within 1"

R4 39.2_0402_1%R4 39.2_0402_1%

1 2

R3 39.2_0402_1%R3 39.2_0402_1%

+1.8V

1 2

T2 PADT2 PAD

DDR_A_ODT010 DDR_A_ODT110

DDR_CS0_DIMMA#10 DDR_CS1_DIMMA#10 DDR_CS0_DIMMB# 9

DDR_CKE0_DIMMA10 DDR_CKE1_DIMMA10

DDR_A_CLK010 DDR_A_CLK#010 DDR_A_CLK110 DDR_A_CLK#110

DDR_A_MA[15..0]10

DDR_A_BS#010 DDR_A_BS#110 DDR_A_BS#210

DDR_A_RAS#10 DDR_A_CAS#10 DDR_A_WE#10

< PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH >

DDR_A_CLK0

DDR_A_CLK#0

DDR_A_CLK1

DDR_A_CLK#1

MEM_P MEM_N VTT_SENSE

DDR_A_ODT0 DDR_A_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB#

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

1

C10

1.5P_0402_50V9C

2

1

C11

1.5P_0402_50V9C

2

JCPUB

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

AF10

MEMZP

AE10

MEMZN

H16

RSVD_M1

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H0

N20

MA_CLK_L0

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H2

AA16

MA_CLK_L2

P19

MA_CLK_H3

P20

MA_CLK_L3

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

@ 6090022100G_B

MEM:CMD/CTRL/CLK

B

DDR_B_CLK0

DDR_B_CLK#0

DDR_B_CLK1

DDR_B_CLK#1

VTT5 VTT6 VTT7 VTT8 VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H0

MB_CLK_L0

MB_CLK_H1

MB_CLK_L1

MB_CLK_H2

MB_CLK_L2

MB_CLK_H3

MB_CLK_L3

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

1

2

1

2

+0.9V+0.9V

C14

1.5P_0402_50V9C

C15

1.5P_0402_50V9C

+MCH_REF

DDR_B_ODT0 DDR_B_ODT1

DDR_CS1_DIMMB#

DDR_CKE0_DIMMB DDR_CKE1_DIMMB

DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_CLK#1DDR_A_CLK#1

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

< VTT regulator voltage >

T1PAD T1PAD

T3PAD T3PAD

DDR_B_ODT0 9 DDR_B_ODT1 9

DDR_CS1_DIMMB# 9

DDR_CKE0_DIMMB 9 DDR_CKE1_DIMMB 9

DDR_B_CLK0 9 DDR_B_CLK#0 9 DDR_B_CLK1 9 DDR_B_CLK#1 9

DDR_B_MA[15..0] 9

DDR_B_BS#0 9 DDR_B_BS#1 9 DDR_B_BS#2 9

DDR_B_RAS# 9 DDR_B_CAS# 9 DDR_B_WE# 9

C

< To SO_DIMMB >

D

E

< Processor DDR2 Memory Interface >

JCPUC

AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

AB26 AE22 AC16 AD12

AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24

Y11

A12 B16 A22 E25

C12 B12 D16 C16 A24 A23 F26 E26

JCPUC

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

6090022100G_B@

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24 AC24 Y19 AB16 Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9

DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_D[63..0] 10

< From/To SO_DIMMA >

DDR_A_DQS0 10 DDR_A_DQS#0 10 DDR_A_DQS1 10 DDR_A_DQS#1 10 DDR_A_DQS2 10 DDR_A_DQS#2 10 DDR_A_DQS3 10 DDR_A_DQS#3 10 DDR_A_DQS4 10 DDR_A_DQS#4 10 DDR_A_DQS5 10 DDR_A_DQS#5 10 DDR_A_DQS6 10 DDR_A_DQS#6 10 DDR_A_DQS7 10 DDR_A_DQS#7 10

DDR_B_D[63..0]9

< From/To SO_DIMMB >

DDR_B_DM[7..0]9 DDR_A_DM[7..0] 10

< To SO_DIMMB > < To SO_DIMMA >

DDR_B_DQS09 DDR_B_DQS#09 DDR_B_DQS19 DDR_B_DQS#19 DDR_B_DQS29 DDR_B_DQS#29 DDR_B_DQS39 DDR_B_DQS#39 DDR_B_DQS49 DDR_B_DQS#49 DDR_B_DQS59 DDR_B_DQS#59 DDR_B_DQS69 DDR_B_DQS#69 DDR_B_DQS79 DDR_B_DQS#79

< From/To SO_DIMMB > < From/To SO_DIMMA >

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

654Tuesday, February 23, 2010

E

C

of

A

+CPU_CORE_0

+CPU_CORE_1

1 1

< Close to CPU >

1 2

R487

R487 10_0402_5%

10_0402_5% R486

R486 10_0402_5%

10_0402_5%

Un-Mount R489 For Caspian (Tigris)

R489

R489 10_0402_5%@

10_0402_5%@ R488

R488 10_0402_5%@

10_0402_5%@

CPU_VDD0_RUN_FB_H

CPU_VDD0_RUN_FB_L

CPU_VDD1_RUN_FB_H

CPU_VDD1_RUN_FB_L

Un-Mount R488 For Caspian (Tigris)

< 200-MHz PLL Reference Clock >

CLK_CPU_BCLK16

CLK_CPU_BCLK#16

Address:100_1100 Place close to CPU wihtin 1.5"

< Filtered PLL Supply Voltage >

2 2

L1 FBM_L11_201209_300L_0805L1 FBM_L11_201209_300L_0805

1 2

1

+

C16

@+C16

@

100U_D2_10VM

2

C20

C20 3900P_0402_50V7K

3900P_0402_50V7K

1 2

C21

C21 3900P_0402_50V7K

3900P_0402_50V7K

1 2

1

C17

4.7U_0805_10V4Z

2

12

R8

R8 169_0402_1%

169_0402_1%

VDDA=300mA

1

C18

C18 3300P_0402_50V7K

3300P_0402_50V7K

2

CPU_CLKIN_SC_P

CPU_CLKIN_SC_N

+2.5VDDA+2.5VS

1

C19

0.22U_0603_16V4Z

2

+2.5VDDA

B

< Differential feedback for VDDNB >

+VDDNB

12

< Sideband-Temperature Sensor Interface Clock & Data>

< Sideband-Temperature Sensor Interface interrupt >

< Compensation Resistor to VSS >

< Compensation Resistor to VLDT >

R484

R484 10_0402_5%

10_0402_5% R485

R485 10_0402_5%

10_0402_5%

Close to CPU

CPU_VDDNB_RUN_FB_H

CPU_VDDNB_RUN_FB_L

+1.2V_HT

R13 44.2_0402_1%R13 44.2_0402_1%

1 2

R14 44.2_0402_1%R14 44.2_0402_1%

1 2

CPU_VDD0_RUN_FB_H51 CPU_VDD0_RUN_FB_L51

CPU_VDD1_RUN_FB_H51 CPU_VDD1_RUN_FB_L51

< Debug ready >

< JTAG debug port >

T9 PADT9 PAD T10 PADT10 PAD T11 PADT11 PAD T12 PADT12 PAD T19 PADT19 PAD

C

+2.5VDDA

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

LDT_RST# H_PWRGD LDT_STOP# CPU_LDT_REQ_R#

CPU_HTREF0 CPU_HTREF1

CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L

CPU_VDD1_RUN_FB_H CPU_VDD1_RUN_FB_L

CPU_TEST23_TSTUPD

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1

1 2

R25

R25 0_0402_5%

0_0402_5%

F10

C6

AF4 AF5

AE6

R6

AB6

G10

AA9 AC9 AD9 AF9

AD7 H10

G9

AB8 AF7 AE7 AE8 AC8 AF8

C2

AA6

C1

F8 F9

A9 A8

B7 A7

P6 F6

E6 Y6

E9 E8

A3 A5 B3 B5

JCPUD

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19 TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

6090022100G_B@

KEY1 KEY2

SVC SVD

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H VDDNB_FB_L

DBREQ_L

TDO

TEST28_H TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

D

M11 W18

CPU_SVC

A6

CPU_SVD

A4

CPU_THERMTRIP#_R

AF6

CPU_PROCHOT#_1.8

AC7 AA8

THERMDC_CPU

W7

THERMDA_CPU

W8

+1.8V sense no support

W9 Y9

CPU_VDDNB_RUN_FB_H

H6

CPU_VDDNB_RUN_FB_L

G6

CPU_DBREQ#

E10 AE9

CPU_TEST28_H_PLLCHRZ_P

J7

CPU_TEST28_L_PLLCHRZ_N

H8

CPU_TEST17_BP3

D7

CPU_TEST16_BP2

E7 F7 C7

C3

CPU_TEST10_ANALOGOUT

K8 C4

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

H18 H19 AA7 D5 C5

CPU_SVC 51 CPU_SVD 51

R42

12

300_0402_5%@

+1.8V

Tigris don't need to mount it.

T22PAD T22PAD T21PAD T21PAD

CPU_VDDNB_RUN_FB_H 51 CPU_VDDNB_RUN_FB_L 51

T20PAD T20PAD

T5PAD T5PAD T6PAD T6PAD

T7PAD T7PAD T8PAD T8PAD

R32

@R32

@

300_0402_5%

12

+1.2V_HT

Add R32 at PVT

T13PAD T13PAD T14PAD T14PAD

E

< Serial VID Interface clock & data >

< Thermal Sensor Trip output > < HTC-active state indication or command >

< Thermal diode cathode & anode >

< Differential feedback for VDDIO > < VDDIO : DDR SDRAM I/O ring power supply> < Differential feedback for VDDNB > < Northbridge power supply >

< Debug request >

route as differential as short as possible testpoint under package

< Serial VID Interface clock & data >

+1.8VS

3 3

LDT_RST#20

H_PWRGD20,51

4 4

CPU_LDT_REQ#12,20

0718 AMD --> 1K ohm

R22

R22 1K_0402_5%

1K_0402_5%

12

R23

R23 1K_0402_5%

1K_0402_5%

12

+1.8VS

R15

R15 300_0402_5%

300_0402_5%

1 2

LDT_RST#

1

C22

@

0.01U_0402_25V7K

2

+1.8VS +1.8VS

R21

R21 300_0402_5%

300_0402_5%

1 2

H_PWRGD LDT_STOP#

1

C23

0.1U_0402_16V7K

2

300_0402_5%

CPU_LDT_REQ#

0.01U_0402_25V7K

A

CPU_SVC

CPU_SVD

LDT_STOP#12,20

+1.8VS

R30

1 2

1

C24

Un-Mount R27 For Caspian (Tigris)

@

2

@

@ R27

R27 0_0402_5%

0_0402_5%

R36

R36 300_0402_5%

300_0402_5%

1 2 1

C25

0.01U_0402_25V7K

2

CPU_LDT_REQ_R#

Add R497 and R498 at PVT

R497

R497 510_0402_5%

510_0402_5%

R499

R499 510_0402_5%@

510_0402_5%@

R10

R10 10K_0402_5%

10K_0402_5%

R5

R5 300_0402_5%

300_0402_5%

R9

R9 300_0402_5%

300_0402_5%

+1.8V

CPU_THERMTRIP#_R

1 2

+1.8V

CPU_PROCHOT#_1.8

1 2

Add R29 and R31 at PVT

R31

1 2

B

R31 300_0402_5%

300_0402_5%

12

R29

R29 300_0402_5%

300_0402_5%

R26

R26 300_0402_5%

300_0402_5%

12

R28

R28 300_0402_5%

300_0402_5%

CPU_TEST20_SCANCLK2

CPU_TEST23_TSTUPD

CPU_TEST21_SCANEN

CPU_TEST24_SCANCLK1

CPU_TEST25_H_BYPASSCLK_H

CPU_TEST25_L_BYPASSCLK_L

B

2

Q3

E

3 1

C

MMBT3904_NL_SOT23-3

R11

@ R11

@

0_0402_5%

1 2

+1.8V

R498

R498 510_0402_5%@

510_0402_5%@

1 2

R500

R500 510_0402_5%

510_0402_5%

1 2

D12

@D12

@

CH751H-40PT_SOD323-2

21

D21

@D21

@

CH751H-40PT_SOD323-2

21

D16

D16 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

< To SB700 CPU block>

H_PROCHOT# 20

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

< To power circuitry>

ENTRIP2 46,48

C26

+1.8V

T23 PADT23 PAD

+1.8V

T24 PADT24 PAD

+3VS

1

2

< R41 Close to CPU >

CPU_DBREQ#

R41 300_0402_5%R41 300_0402_5%

1 2

< noise filter cap >

D

EN0 45,48

< To SB700 ACPI block>

H_THERMTRIP# 21

0.1U_0402_16V7K

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

1 2 R40 220_0402_5%@ R40 220_0402_5%@

1 2

R39 220_0402_5%@ R39 220_0402_5%@

1 2

R38 220_0402_5%@ R38 220_0402_5%@

1 2

R37 220_0402_5%@ R37 220_0402_5%@

1 2

THERMDA_CPU THERMDC_CPU

C27

C27 2200P_0402_50V7K

2200P_0402_50V7K

< HDT Connector >

JP3

< R494 Close to CPU >

R494

R494 0_0402_5%@

0_0402_5%@

1 2

+1.8V

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

< Thermal Sensor >

U2

1

VDD

2

D+

3

DTHERM#4GND

ADM1032ARM-1 ZREEL_MSOP8

Title

Size Document Number Rev

Custom

Date: Sheet

8

SCLK

7

SDATA

6

ALERT#

5

Compal Electronics, Inc.

Schematic, M/B LA-5331P

JP3

1 3 5 7 9 11 13 15 17 19 21

SAMTEC_ASP-68200-07

@ SAMTEC_ASP-68200-07

@

EC_SMB_CK2 EC_SMB_DA2

401716

E

2 4 6

8 10 12 14 16 18 20 22 2423 26

< From EC >

EC_SMB_CK2 33,34,44

EC_SMB_DA2 33,34,44

754Tuesday, February 23, 2010

of

LDT_RST#

C

A

VDD decoupling : +CPU_CORE

+CPU_CORE_0

1

+

C30

330U_X_2VM_R6M

2

Near CPU Socket

1 1

+CPU_CORE_1 +CPU_CORE_1 +CPU_CORE_1

1

+

C31

330U_X_2VM_R6M

2

Near CPU Socket

VDDIO decoupling : DDR SDRAM I/O ring power

+1.8V

1

C46

C46 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

+1.8V

2 2

1

C55

0.22U_0603_16V4Z

2

Between CPU Socket and DIMM

+1.8V

1

C60

0.01U_0402_25V7K

2

Between CPU Socket and DIMM

+1.8V

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

1

C62

C62 180P_0402_50V8J

180P_0402_50V8J

2

Between CPU Socket and DIMM

+1.8V

3 3

1

C74

4.7U_0805_10V4Z

2

Between CPU Socket and DIMM

+0.9V

VTT decoupling.

1

C66

4.7U_0805_10V4Z

2

Near CPU Socket Right side

+0.9V

1

C79

4.7U_0805_10V4Z

2

Near CPU Socket Left side

4 4

+VDDNB decoupling : Northbridge power

+VDDNB

4000mA

1

C52

C52 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

+

2

1

+

2

1

C47

C47 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C56

0.22U_0603_16V4Z

2

1

C63

C63 180P_0402_50V8J

180P_0402_50V8J

2

1

C75

4.7U_0805_10V4Z

2

1

C67

4.7U_0805_10V4Z

2

1

C80

4.7U_0805_10V4Z

2

1

C53

C53 22U_0805_6.3V6M

22U_0805_6.3V6M

2

A

C28

C28 330U_X_2VM_R6M

330U_X_2VM_R6M

C29

C29 330U_X_2VM_R6M

330U_X_2VM_R6M

+CPU_CORE_0 +CPU_CORE_0

1

C32

C32 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C33

C33 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket Under CPU Socket

1

C36

C36 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C37

C37 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket Under CPU Socket

1

C48

0.22U_0603_16V4Z

2

1

C57

0.22U_0603_16V4Z

2

1

C61

0.01U_0402_25V7K

2

1

C64

C64 180P_0402_50V8J

180P_0402_50V8J

2

1

C49

0.22U_0603_16V4Z

2

1

C58

0.22U_0603_16V4Z

2

1

C65

C65 180P_0402_50V8J

180P_0402_50V8J

2

1

C50

C50 180P_0402_50V8J

180P_0402_50V8J

2

Change to B2 size

1

C76

4.7U_0805_10V4Z

2

1

C68

0.22U_0603_16V4Z

2

1

C81

0.22U_0603_16V4Z

2

1

C54

C54 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C77

4.7U_0805_10V4Z

2

1

C69

0.22U_0603_16V4Z

2

1

C82

0.22U_0603_16V4Z

2

@+C78

@

1

C70

C70 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C83

C83 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C34

C34 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C38

C38 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

+

C78 220U_B2_4VM_R45M

220U_B2_4VM_R45M

2

B

1

C51

C51 180P_0402_50V8J

180P_0402_50V8J

2

1

C71

C71 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C84

C84 1000P_0402_50V7K

1000P_0402_50V7K

2

B

1

C35

C35 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C39

C39 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

1

2

1

C40

0.22U_0603_16V4Z

2

1

C43

0.22U_0603_16V4Z

2

C72

C72 180P_0402_50V8J

180P_0402_50V8J

C85

C85 180P_0402_50V8J

180P_0402_50V8J

C

1

C41

0.01U_0402_25V7K

2

1

C44

0.01U_0402_25V7K

2

1

C73

C73 180P_0402_50V8J

180P_0402_50V8J

2

1

C86

C86 180P_0402_50V8J

180P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

1

2

+0.9V

1. Near Power Supply

1

2. Change to B2 size

+

C59

C59 220U_B2_4VM_R45M

220U_B2_4VM_R45M

2

C

C42

C42 180P_0402_50V8J

180P_0402_50V8J

C45

C45 180P_0402_50V8J

180P_0402_50V8J

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

+CPU_CORE_0

+VDDNB

+1.8V

D

JCPUE

G4

VDD0_1

H2

VDD0_2

J9

VDD0_3

J11

VDD0_4

J13

VDD0_5

J15

VDD0_6

K6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

L4

VDD0_11

L7

VDD0_12

L9

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

M2

VDD0_17

M6

VDD0_18

M8

VDD0_19

M10

VDD0_20

N7

VDD0_21

N9

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

6090022100G_B@

JCPUF

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

6090022100G_B@

D

+CPU_CORE_1

P8

VDD1_1

P10

VDD1_2

R4

VDD1_3

R7

VDD1_4

R9

VDD1_5

R11

VDD1_6

T2

VDD1_7

T6

VDD1_8

T8

VDD1_9

T10

VDD1_10

T12

VDD1_11

T14

VDD1_12

U7

VDD1_13

U9

VDD1_14

U11

VDD1_15

U13

VDD1_16

U15

VDD1_17

V6

VDD1_18

V8

VDD1_19

V10

VDD1_20

V12

VDD1_21

V14

VDD1_22

W4

VDD1_23

Y2

VDD1_24

AC4

VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

+1.8V

AD2 Y25

V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

Athlon 64 S1 Processor Socket

J6

VSS66

J8

VSS67

J10

VSS68

J12

VSS69

J14

VSS70

J16

VSS71

J18

VSS72

K2

VSS73

K7

VSS74

K9

VSS75

K11

VSS76

K13

VSS77

K15

VSS78

K17

VSS79

L6

VSS80

L8

VSS81

L10

VSS82

L12

VSS83

L14

VSS84

L16

VSS85

L18

VSS86

M7

VSS87

M9

VSS88

AC6

VSS89

M17

VSS90

N4

VSS91

N8

VSS92

N10

VSS93

N16

VSS94

N18

VSS95

P2

VSS96

P7

VSS97

P9

VSS98

P11

VSS99

P17

VSS100

R8

VSS101

R10

VSS102

R16

VSS103

R18

VSS104

T7

VSS105

T9

VSS106

T11

VSS107

T13

VSS108

T15

VSS109

T17

VSS110

U4

VSS111

U6

VSS112

U8

VSS113

U10

VSS114

U12

VSS115

U14

VSS116

U16

VSS117

U18

VSS118

V2

VSS119

V7

VSS120

V9

VSS121

V11

VSS122

V13

VSS123

V15

VSS124

V17

VSS125

W6

VSS126

Y21

VSS127

Y23

VSS128

N6

VSS129

Athlon 64 S1 Processor Socket

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

E

C

of

854Tuesday, February 23, 2010

E

A

B

+1.8V+1.8V

C

D

E

< EMI require >< EMI require >

C1600.1U_0402_16V7K C1600.1U_0402_16V7K

1 2

+V_DDR_MCH_REF10

1 1

2 2

3 3

4 4

A

1

C104

C104 1000P_0402_50V7K

1000P_0402_50V7K

2

DDR_CKE0_DIMMB6

DDR_B_BS#26

DDR_B_BS#06 DDR_B_WE#6

DDR_B_CAS#6 DDR_CS1_DIMMB#6

DDR_B_ODT16

SMB_CK_DAT010,16,21,27

SMB_CK_CLK010,16,21,27

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_B_ODT0 DDR_CS1_DIMMB#

DDR_B_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D47 DDR_B_D48

DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7 DDR_B_D58

DDR_B_D59

+3VS

1

C119

0.1U_0402_16V7K

2

JDDRH

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

VSS

P-TWO_A5692B-A0G16-P@

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1 RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

SA1

VSS

NC

A11

A7 A6

A4 A2 A0

S0#

NC

DIMM0 STD H:9.2mm (Bot)

B

C155 0.1U_0402_16V7KC155 0.1U_0402_16V7K

2

DDR_B_D4

4

DDR_B_D5

6 8

DDR_B_DM0

10 12

DDR_B_D6

14

DDR_B_D7

16 18

DDR_B_D12

20

DDR_B_D13

22 24

DDR_B_DM1

26 28 30 32 34

DDR_B_D14

36

DDR_B_D15

38 40

42

DDR_B_D20

44

DDR_B_D21

46 48 50

DDR_B_DM2

52 54 56

DDR_B_D23

58 60

DDR_B_D28

62

DDR_B_D29

64 66

DDR_B_DQS#3

68

DDR_B_DQS3

70 72

DDR_B_D30

74

DDR_B_D31

76 78

DDR_CKE1_DIMMB

80 82

DDR_B_MA15

84

DDR_B_MA14

86 88

DDR_B_MA11

90

DDR_B_MA7

92

DDR_B_MA6DDR_B_MA8

94 96

DDR_B_MA4

98

DDR_B_MA2

100

DDR_B_MA0

102 104

DDR_B_BS#1

106

DDR_B_RAS#

108

DDR_CS0_DIMMB#

110 112 114

DDR_B_MA13

116 118 120 122

DDR_B_D36

124

DDR_B_D37

126 128

DDR_B_DM4

130 132

DDR_B_D38

134

DDR_B_D39

136 138

DDR_B_D44

140

DDR_B_D45

142 144

DDR_B_DQS#5

146

DDR_B_DQS5

148 150

DDR_B_D46

152 154 156

DDR_B_D52

158 160 162 164 166 168

DDR_B_DM6

170 172

DDR_B_D54

174 176 178

DDR_B_D60

180

DDR_B_D61

182 184

DDR_B_DQS#7

186

DDR_B_DQS7

188 190

DDR_B_D62

192

DDR_B_D63

194 196 198 200 202

12

RP8 DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 DDR_B_RAS#

DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6

DDR_B_CLK0 6 DDR_B_CLK#0 6

DDR_CKE1_DIMMB 6

DDR_B_BS#1 6 DDR_B_RAS# 6 DDR_CS0_DIMMB# 6

DDR_B_ODT0 6

DDR_B_CLK1 6 DDR_B_CLK#1 6

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

DDR_CKE0_DIMMB DDR_B_BS#2 DDR_B_MA15 DDR_CKE1_DIMMB

DDR_B_MA3 DDR_B_MA8 DDR_B_MA12 DDR_B_MA9

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA5

DDR_CS1_DIMMB# DDR_B_ODT1 DDR_B_CAS# DDR_B_WE#

DDR_B_BS#1 DDR_CS0_DIMMB# DDR_B_MA13 DDR_B_ODT0

Compal Secret Data

Deciphered Date

RP8

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP9

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP10

18 27 36 45

47_0804_8P4R_5%

RP11

18 27 36 45

47_0804_8P4R_5%

RP12

18 27 36 45

47_0804_8P4R_5%

RP13

18 27 36 45

47_0804_8P4R_5%

RP14

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

+0.9V

C105 0.1U_0402_16V7KC105 0.1U_0402_16V7K C106 0.1U_0402_16V7KC106 0.1U_0402_16V7K

C108 0.1U_0402_16V7KC108 0.1U_0402_16V7K C107 0.1U_0402_16V7KC107 0.1U_0402_16V7K

C109 0.1U_0402_16V7KC109 0.1U_0402_16V7K C110 0.1U_0402_16V7KC110 0.1U_0402_16V7K

C111 0.1U_0402_16V7KC111 0.1U_0402_16V7K C112 0.1U_0402_16V7KC112 0.1U_0402_16V7K

C114 0.1U_0402_16V7KC114 0.1U_0402_16V7K C113 0.1U_0402_16V7KC113 0.1U_0402_16V7K

C116 0.1U_0402_16V7KC116 0.1U_0402_16V7K C115 0.1U_0402_16V7KC115 0.1U_0402_16V7K

C118 0.1U_0402_16V7KC118 0.1U_0402_16V7K C117 0.1U_0402_16V7KC117 0.1U_0402_16V7K

DDR_B_D[0..63] DDR_B_DM[0..7] DDR_B_DQS[0..7] DDR_B_MA[0..15] DDR_B_DQS#[0..7]

D

+1.8V

12 12

DDR_B_D[0..63] 6

DDR_B_DM[0..7] 6

DDR_B_DQS[0..7] 6

DDR_B_MA[0..15] 6

DDR_B_DQS#[0..7] 6

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

954Tuesday, February 23, 2010

E

C

of

A

+1.8V

R43

R43 1K_0402_1%

1K_0402_1%

+V_DDR_MCH_REF9

1 1

2 2

3 3

4 4

1 2

R44

R44 1K_0402_1%

1K_0402_1%

1 2

A

1

C96

0.1U_0402_16V7K

2

DDR_CKE0_DIMMA6

DDR_A_BS#26

DDR_A_BS#06 DDR_A_WE#6

DDR_A_CAS#6 DDR_CS1_DIMMA#6

DDR_A_ODT16

SMB_CK_DAT09,16,21,27

SMB_CK_CLK09,16,21,27

+V_DDR_MCH_REF

1

C95

C95 1000P_0402_50V7K

1000P_0402_50V7K

2

1 2

DDR_A_D0 DDR_A_D1

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D20 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_MA0

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_A_ODT0 DDR_CS1_DIMMA#

DDR_A_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D34

DDR_A_D35 DDR_A_D40

DDR_A_D41 DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59

+3VS

1

C103

0.1U_0402_16V7K

2

B

JDDRL

C1930.1U_0402_16V7K C1930.1U_0402_16V7K

JDDRL

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

203

VSS

PTI_A5652D-A0G16-P@

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

VSS

CK0

NC

A11

A7 A6

A4 A2

A0 BA1 S0#

NC

CK1

SA1

DIMM0 STD H:5.2mm (Bot)

B

+1.8V+1.8V

< EMI require >< EMI require >

C161 0.1U_0402_16V7KC161 0.1U_0402_16V7K

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DM0

10 12

DDR_A_D6

14

DDR_A_D7

16 18

DDR_A_D12

20

DDR_A_D13

22 24

DDR_A_DM1

26 28 30 32 34

DDR_A_D14

36

DDR_A_D15

38 40

42 44

DDR_A_D21

46 48 50

DDR_A_DM2

52 54

DDR_A_D22

56

DDR_A_D23

58 60

DDR_A_D28

62

DDR_A_D29

64 66

DDR_A_DQS#3

68

DDR_A_DQS3

70 72

DDR_A_D30

74

DDR_A_D31

76 78

DDR_CKE1_DIMMA

80 82

DDR_A_MA15

84

DDR_A_MA14

86 88

DDR_A_MA11

90

DDR_A_MA7

92

DDR_A_MA6

94 96

DDR_A_MA4

98

DDR_A_MA2

100 102 104

DDR_A_BS#1

106

DDR_A_RAS#

108

DDR_CS0_DIMMA#

110 112 114

DDR_A_MA13

116 118 120 122

DDR_A_D36

124

DDR_A_D37

126 128

DDR_A_DM4

130 132

DDR_A_D38

134

DDR_A_D39

136 138

DDR_A_D44

140

DDR_A_D45

142 144

DDR_A_DQS#5

146

DDR_A_DQS5

148 150

DDR_A_D46

152

DDR_A_D47

154 156

DDR_A_D52

158

DDR_A_D53

160 162 164 166 168

DDR_A_DM6

170 172

DDR_A_D54

174

DDR_A_D55

176 178

DDR_A_D60

180

DDR_A_D61

182 184

DDR_A_DQS#7

186

DDR_A_DQS7

188 190

DDR_A_D62

192

DDR_A_D63

194 196 198 200 204

C

DDR_A_D[0..63] DDR_A_DM[0..7]

12

DDR_A_CLK0 6 DDR_A_CLK#0 6

DDR_CKE1_DIMMA 6

DDR_A_BS#1 6 DDR_A_RAS# 6 DDR_CS0_DIMMA# 6

DDR_A_ODT0 6

DDR_A_CLK1 6 DDR_A_CLK#1 6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

DDR_A_DQS[0..7] DDR_A_MA[0..15] DDR_A_DQS#[0..7]

DDR_A_MA6 DDR_A_MA14 DDR_A_MA7 DDR_A_MA11

DDR_CKE0_DIMMA DDR_A_BS#2 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_BS#1 DDR_A_MA2 DDR_A_MA0 DDR_A_MA4

DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12

DDR_A_BS#0 DDR_A_MA10 DDR_A_MA3 DDR_A_MA1

DDR_A_ODT1 DDR_CS1_DIMMA# DDR_A_CAS# DDR_A_WE#

DDR_A_MA13 DDR_A_ODT0 DDR_A_RAS# DDR_CS0_DIMMA#

Deciphered Date

D

DDR_A_DM[0..7] 6

DDR_A_MA[0..15] 6

DDR_A_DQS#[0..7] 6

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

D

DDR_A_D[0..63] 6

DDR_A_DQS[0..7] 6

RP1

RP2

18 27 36 45

RP3

RP4

18 27 36 45

RP5

18 27 36 45

RP6

18 27 36 45

RP7

E

+0.9V

C87 0.1U_0402_16V7KC87 0.1U_0402_16V7K

1 2

C88 0.1U_0402_16V7KC88 0.1U_0402_16V7K

1 2

C90 0.1U_0402_16V7KC90 0.1U_0402_16V7K

1 2

C89 0.1U_0402_16V7KC89 0.1U_0402_16V7K

1 2

C91 0.1U_0402_16V7KC91 0.1U_0402_16V7K

1 2

C92 0.1U_0402_16V7KC92 0.1U_0402_16V7K

1 2

C93 0.1U_0402_16V7KC93 0.1U_0402_16V7K

1 2

C94 0.1U_0402_16V7KC94 0.1U_0402_16V7K

1 2

C98 0.1U_0402_16V7KC98 0.1U_0402_16V7K

1 2

C97 0.1U_0402_16V7KC97 0.1U_0402_16V7K

1 2

C100 0.1U_0402_16V7KC100 0.1U_0402_16V7K

1 2

C99 0.1U_0402_16V7KC99 0.1U_0402_16V7K

1 2

C102 0.1U_0402_16V7KC102 0.1U_0402_16V7K

1 2

C101 0.1U_0402_16V7KC101 0.1U_0402_16V7K

1 2

Title

Size Document Number Rev

Custom

Date: Sheet

+1.8V

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

E

C

of

10 54Tuesday, February 23, 2010

A

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P[0..15] 36 PCIE_GTX_C_MRX_N[0..15] 36

Polarity inversion

Polarity inversion Polarity inversion Polarity inversion Polarity inversion

1 1

Polarity inversion Polarity inversion Polarity inversion Polarity inversion Polarity inversion Polarity inversion Polarity inversion Polarity inversion Polarity inversion

PCIE_PTX_C_IRX_P027

< From New Card > < From WLAN > < From LAN >

2 2

H_CADON[0..15]

3 3

4 4

< From S1G3 CPU : x16 HT> < To S1G3 CPU : x16 HT>

H_CADOP[0..15] 5

H_CADON[0..15] 5

PCIE_PTX_C_IRX_N027

PCIE_PTX_C_IRX_P227 PCIE_PTX_C_IRX_N227 PCIE_PTX_C_IRX_P326 PCIE_PTX_C_IRX_N326

0718 Place within 1" layout 1:2

SB_RX0P20 SB_RX0N20 SB_RX1P20 SB_RX1N20 SB_RX2P20 SB_RX2N20 SB_RX3P20 SB_RX3N20

H_CLKOP05

H_CLKON05

H_CLKOP15

H_CLKON15

H_CTLOP05

H_CTLON05 H_CTLON15

1 2

PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P15

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

R57301_0402_1% R57301_0402_1%

B

RS780MCR3@

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1

HT_RXCALP HT_RXCALN

U3B

PM : RX881

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780M_FCBGA528

U3A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M_FCBGA528RS780MCR3@

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

PART 1 OF 6

HYPER TRANSPORT CPU I/F

NEED CHECK R57 & R58 WITH AMD

GFX_TX0P

GFX_TX0N

GFX_TX1P

GFX_TX1N

GFX_TX2P

GFX_TX2N

GFX_TX3P

GFX_TX3N

GFX_TX4P

GFX_TX4N

GFX_TX5P

GFX_TX5N

GFX_TX6P

GFX_TX6N

GFX_TX7P

GFX_TX7N

GFX_TX8P

GFX_TX8N

GFX_TX9P

GFX_TX9N

GFX_TX10P

GFX_TX10N

GFX_TX11P

GFX_TX11N

GFX_TX12P

GFX_TX12N

GFX_TX13P

GFX_TX13N

GFX_TX14P

GFX_TX14N

GFX_TX15P

GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P

SB_TX0N

SB_TX1P

SB_TX1N

SB_TX2P

SB_TX2N

SB_TX3P

SB_TX3N

HT_TXCAD0P

HT_TXCAD0N

HT_TXCAD1P

HT_TXCAD1N

HT_TXCAD2P

HT_TXCAD2N

HT_TXCAD3P

HT_TXCAD3N

HT_TXCAD4P

HT_TXCAD4N

HT_TXCAD5P

HT_TXCAD5N

HT_TXCAD6P

HT_TXCAD6N

HT_TXCAD7P

HT_TXCAD7N

HT_TXCAD8P

HT_TXCAD8N

HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

C

PCIE_MTX_GRX_P0

A5

PCIE_MTX_GRX_N0

B5

PCIE_MTX_GRX_P1

A4

PCIE_MTX_GRX_N1

B4

PCIE_MTX_GRX_P2

C3

PCIE_MTX_GRX_N2

B2

PCIE_MTX_GRX_P3

D1 D2

PCIE_MTX_GRX_P4

E2

PCIE_MTX_GRX_N4

E1

PCIE_MTX_GRX_P5

F4 F3

PCIE_MTX_GRX_P6

F1

PCIE_MTX_GRX_N6

F2

PCIE_MTX_GRX_P7

H4

PCIE_MTX_GRX_N7

H3

PCIE_MTX_GRX_P8

H1 H2

PCIE_MTX_GRX_P9

J2

PCIE_MTX_GRX_N9

J1 K4

PCIE_MTX_GRX_N10

K3

PCIE_MTX_GRX_P11

K1

PCIE_MTX_GRX_N11

K2

PCIE_MTX_GRX_P12

M4

PCIE_MTX_GRX_N12

M3

PCIE_MTX_GRX_P13

M1 M2

PCIE_MTX_GRX_P14

N2

PCIE_MTX_GRX_N14

N1

PCIE_MTX_GRX_P15

P1 P2

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2 AB4 AB3

PCIE_ITX_PRX_P2

AA2

PCIE_ITX_PRX_N2

AA1

PCIE_ITX_PRX_P3

Y1

PCIE_ITX_PRX_N3

Y2 Y4 Y3 V1 V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6

SB_TX2P_C

AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5

PCIE_CALRP

AC8

PCIE_CALRN

AB8

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18 H24

H25 L21 L20

H_CTLIP0

M24

H_CTLIN0

M25

H_CTLIP1

P19

H_CTLIN1

R18

HT_TXCALP

B24

HT_TXCALN

B25

0718 Place within 1" layout 1:2

C120 0.1U_0402_16V7KC120 0.1U_0402_16V7K

1 2

C121 0.1U_0402_16V7KC121 0.1U_0402_16V7K

1 2

C122 0.1U_0402_16V7KC122 0.1U_0402_16V7K

1 2

C123 0.1U_0402_16V7KC123 0.1U_0402_16V7K

1 2

C124 0.1U_0402_16V7KC124 0.1U_0402_16V7K

1 2

C125 0.1U_0402_16V7KC125 0.1U_0402_16V7K

1 2

C126 0.1U_0402_16V7KC126 0.1U_0402_16V7K

1 2

C127 0.1U_0402_16V7KC127 0.1U_0402_16V7K

1 2

C128 0.1U_0402_16V7KC128 0.1U_0402_16V7K

1 2

C129 0.1U_0402_16V7KC129 0.1U_0402_16V7K

1 2

C130 0.1U_0402_16V7KC130 0.1U_0402_16V7K

1 2

C131 0.1U_0402_16V7KC131 0.1U_0402_16V7K

1 2

C132 0.1U_0402_16V7KC132 0.1U_0402_16V7K

1 2

C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K

1 2

C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K

1 2

C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K

1 2

C136 0.1U_0402_16V7KC136 0.1U_0402_16V7K

1 2

C137 0.1U_0402_16V7KC137 0.1U_0402_16V7K

1 2

C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K

1 2

C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K

1 2

C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K

1 2

C141 0.1U_0402_16V7KC141 0.1U_0402_16V7K

1 2

C142 0.1U_0402_16V7KC142 0.1U_0402_16V7K

1 2

C143 0.1U_0402_16V7KC143 0.1U_0402_16V7K

1 2

C144 0.1U_0402_16V7KC144 0.1U_0402_16V7K

1 2

C145 0.1U_0402_16V7KC145 0.1U_0402_16V7K

1 2

C146 0.1U_0402_16V7KC146 0.1U_0402_16V7K

1 2

C147 0.1U_0402_16V7KC147 0.1U_0402_16V7K

1 2

C148 0.1U_0402_16V7KC148 0.1U_0402_16V7K

1 2

C149 0.1U_0402_16V7KC149 0.1U_0402_16V7K

1 2

C150 0.1U_0402_16V7KC150 0.1U_0402_16V7K

1 2

C151 0.1U_0402_16V7KC151 0.1U_0402_16V7K

1 2

C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K

1 2

C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K

1 2

C156 0.1U_0402_16V7KWLAN@ C156 0.1U_0402_16V7KWLAN@

1 2

C157 0.1U_0402_16V7KWLAN@ C157 0.1U_0402_16V7KWLAN@

1 2

C158 0.1U_0402_16V7KC158 0.1U_0402_16V7K

1 2

C159 0.1U_0402_16V7KC159 0.1U_0402_16V7K

1 2

C162 0.1U_0402_16V7KC162 0.1U_0402_16V7K

1 2

C163 0.1U_0402_16V7KC163 0.1U_0402_16V7K

1 2

C164 0.1U_0402_16V7KC164 0.1U_0402_16V7K

1 2

C165 0.1U_0402_16V7KC165 0.1U_0402_16V7K

1 2

C166 0.1U_0402_16V7KC166 0.1U_0402_16V7K

1 2

C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K

1 2

C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K

1 2

C167 0.1U_0402_16V7KC167 0.1U_0402_16V7K

1 2

R55 1.27K_0402_1%R55 1.27K_0402_1%

1 2

R56 2K_0402_1%R56 2K_0402_1%

1 2

H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]

H_CLKIP0 5 H_CLKIN0 5 H_CLKIP1 5 H_CLKIN1 5

H_CTLIP0 5

H_CTLIN0 5

H_CTLIP1 5H_CTLOP15

H_CTLIN1 5

R58 301_0402_1%R58 301_0402_1%

1 2

D

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3PCIE_MTX_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15

H_CADIP[0..15] 5 H_CADIN[0..15] 5

< Transmitter Calibration Resistor to HT_TXCALN >

Polarity inversion Polarity inversion

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

Polarity inversion

< To MXM VGA board >< From MXM VGA board >

Polarity inversion

PCIE_ITX_C_PRX_P0 27 PCIE_ITX_C_PRX_N0 27

PCIE_ITX_C_PRX_P2 27 PCIE_ITX_C_PRX_N2 27 PCIE_ITX_C_PRX_P3 26 PCIE_ITX_C_PRX_N3 26

SB_TX0P 20 SB_TX0N 20 SB_TX1P 20 SB_TX1N 20 SB_TX2P 20 SB_TX2N 20 SB_TX3P 20 SB_TX3N 20

+1.1VS

RS880M Display Port Support (muxed on GFX)

DP0

DP1

< To New Card > < To WLAN > < To LAN >

< To SB710 : x4 PCEI A-link>< From SB710 : x4 PCIE A-link >

< TX Impedance Calibration. Connect to GND > < RX Impedance Calibration. Connect to VDDPCIE >

GFX_TX0,TX1,TX2 and TX3

GFX_TX4,TX5,TX6 and TX7

E

PCIE_MTX_C_GRX_P[0..15] 36 PCIE_MTX_C_GRX_N[0..15] 36

AUX0 and HPD0

AUX1 and HPD1

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

E

of

11 54Tuesday, February 23, 2010

CCustom

A

< IO power for HyperTransport PLL >

1 1

+1.1VS

R71

4.7K_0402_5%

1 2 12

2 2

R72

4.7K_0402_5%

L10

1 2

BLM18PG121SN1D_0603

< 1.8V IO power for PCI-E PLLs >

+1.8VS

L11

1 2

BLM18PG121SN1D_0603

+1.8VS

1 2

R371 300_0402_5%R371 300_0402_5%

+VDDA18HTPLL+1.8VS

1

C179

2.2U_0603_6.3V4Z

2

+VDDA18PCIEPLL

1

C180

2.2U_0603_6.3V4Z

2

NB_PWRGD

Strap pin

CLK_SBLINK_BCLK16 CLK_SBLINK_BCLK#16

UMA_CRT_HSYNC15 UMA_CRT_VSYNC15

PLT_RST#15,20,26,27,32,33,36

NB_PWRGD21 LDT_STOP#7,20 CPU_LDT_REQ#7,20

NB_OSC_14.318M16

NBGFX_CLK16 NBGFX_CLK#16

+VDDA18HTPLL

+VDDA18PCIEPLL

CLK_NBHT16 CLK_NBHT#16

AUX_CAL15

B

R67 0_0402_5%R67 0_0402_5%

1 2

+3VS

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

UMA_CRT_HSYNC UMA_CRT_VSYNC

NB_RESET# NB_PWRGD

R88 10K_0402_5%@ R88 10K_0402_5%@

12

RS780MCR3@

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780M_FCBGA528

C

PART 3 OF 6

TXOUT_L2N(DBG_GPIO0) TXOUT_L3N(DBG_GPIO2)

TXOUT_U1P(PCIE_RESET_GPIO3)

TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4)

TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

MIS.

SUS_STAT#(PWM_GPIO5)

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC)

TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

THERMALDIODE_P THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

D

T17PAD T17PAD

R80 1.8K_0402_5%R80 1.8K_0402_5%

1 2

SUS_STAT# 15,21

E

< Strap option pin or gate side-port memory IO >

3 3

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

12 54Tuesday, February 23, 2010

E

C

of

2

B B

U3D

AB12 AE16

AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

AD16 AE17 AD17

W12

AD18 AB13 AB18

W14

AE12 AD12

U3D

V11

Y14

Y12

V14 V15

RS780M_FCBGA528RS780MCR3@

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

+1.8VS +1.1VS

1

A A

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

1

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

13 54Tuesday, February 23, 2010

C

of

A

B

C

D

E

U3E

2A

L16 0_0805_5%L16 0_0805_5%

+1.1VS

1 1

+1.2V_HT

+1.8VS

2 2

3 3

4 4

12

1

C209

4.7U_0805_10V4Z

2

2A < IO power for HyperTransport receive interface >

L18 0_0805_5%L18 0_0805_5%

12

C215

C215 10U_0805_10V4Z

10U_0805_10V4Z

2A < IO power for HyperTransport transmit interface >

L19 0_0805_5%L19 0_0805_5%

12

1

C225

4.7U_0805_10V4Z

2

2A < 1.8V IO power for PCI-E graphics, SB, and GPP interfaces >

L22 0_0805_5%L22 0_0805_5%

12

1

C235

4.7U_0805_10V4Z

2

A

1

C206

0.1U_0402_16V7K

2

1

C214

0.1U_0402_16V7K

2

1

C226

0.1U_0402_16V7K

2

1

C246

4.7U_0805_10V4Z

2

< Digital IO power for HyperTransport interface >

1

C207

0.1U_0402_16V7K

2

1

C216

0.1U_0402_16V7K

2

1

C227

0.1U_0402_16V7K

2

1

C236

0.1U_0402_16V7K

2

1

C208

0.1U_0402_16V7K

2

1

C217

0.1U_0402_16V7K

2

1

C228

0.1U_0402_16V7K

2

1

C237

0.1U_0402_16V7K

2

B

1

C210

0.1U_0402_16V7K

2

1

C218

0.1U_0402_16V7K

2

1

C229

0.1U_0402_16V7K

2

1

C238

0.1U_0402_16V7K

2

1

C239

0.1U_0402_16V7K

2

< 1.8V IO transform power >

+1.8VS

1

C251

C251 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+VDDHT

+VDDHTRX

+VDDHTTX

+VDDA18PCIE

/

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

J17 K16 L16

M16

P16

R16

T16

H18 G19

F20 E21

D22

B23 A23

AE25 AD24 AC23 AB22 AA21

Y20

W19

V18

U17

T17

R17

P17

M17

J10 P10 K10

M10

L10 W9

H9

T10

R10

Y9 AA9 AB9 AD9 AE9 U10

F9

G9

AE11 AD11

A25

D23

E22 G22 G24 G25 H19

J22

L17

L22

L24

L25 M20 N22

P20 R19 R22 R24 R25 H20 U22

V19 W22 W24 W25

Y21

AD25

L12 M14 N13

P12

P15 R11 R14

T12 U14 U11 U15

V12 W11 W15

AC12 AA14

Y18

AB11 AB15 AB17 AB19 AE20 AB21

K11

Issued Date

U3E

VDDHT_1

PART 5/6

VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)

RS780M_FCBGA528

RS780MCR3@

RS780MCR3@ U3F

U3F

VSSAHT1

PART 6/6

VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

RS780M_FCBGA528

RS780M_FCBGA528 RS780MCR3@

RS780MCR3@

C

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30

GROUND

VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

2008-09-25 2009-09-25

< Main IO power for PCI-E graphics, SB, and GPP interfaces >

+VDDA11PCIE

A6 B6 C6

VDDA_12=2.5A

D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15

< Core power >

M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11

< Isolated power for side-port memory interface >

Y11 AD10 AB10 AC10

< 3.3V IO power >

H11

+3VS

H12

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

Compal Secret Data

Deciphered Date

D

C2191U_0402_6.3V4Z C2191U_0402_6.3V4Z

C2201U_0402_6.3V4Z C2201U_0402_6.3V4Z

1

2

C2400.1U_0402_16V7K C2400.1U_0402_16V7K

C2470.1U_0402_16V7K C2470.1U_0402_16V7K

2

1

1 2

C21110U_0805_10V4Z C21110U_0805_10V4Z

C2221U_0402_6.3V4Z C2221U_0402_6.3V4Z

1

2

C2230.1U_0402_16V7K C2230.1U_0402_16V7K

C2240.1U_0402_16V7K C2240.1U_0402_16V7K

C2211U_0402_6.3V4Z C2211U_0402_6.3V4Z

2

1

2

C21210U_0805_10V4Z C21210U_0805_10V4Z

2

1

+NB_CORE

VDD_CORE:GM=5A/PM=10A

C2420.1U_0402_16V7K C2420.1U_0402_16V7K

C2430.1U_0402_16V7K C2430.1U_0402_16V7K

C2410.1U_0402_16V7K C2410.1U_0402_16V7K

2

1

C2320.1U_0402_16V7K C2320.1U_0402_16V7K

C2300.1U_0402_16V7K C2300.1U_0402_16V7K

C2310.1U_0402_16V7K C2310.1U_0402_16V7K

C2440.1U_0402_16V7K C2440.1U_0402_16V7K

2

1

Title

Size Document Number Rev

Date: Sheet

1

C23310U_0805_10V4Z C23310U_0805_10V4Z

1

2

Compal Electronics, Inc.

Schematic, M/B LA-5331P

1

C24510U_0805_10V4Z C24510U_0805_10V4Z

2

1

2

401716

+

E

C234

C234 330U_D2E_2.5VM_R15

330U_D2E_2.5VM_R15

L17FBMA-L11-201209-221LMA30T_0805 L17FBMA-L11-201209-221LMA30T_0805

PJP9

12

PAD-OPEN 4x4m

of

14 54Tuesday, February 23, 2010

+1.1VS

CCustom

A

B

C

D

E

< RX881 VSYNC mux at CRT_VSYNC pull High to 3K >

SI2: Change to 3K pull high

R101

R101 3K_0402_5%

3K_0402_5%

UMA_CRT_VSYNC12

1 1

12

R102

R102 3K_0402_5%@

3K_0402_5%@

12

< RX881 use register to control PCI-E configure >

< RX881 SUS_STAT# >

R104

R104 150_0402_1%@

150_0402_1%@

PLT_RST# 12,20,26,27,32,33,36

D4

D4 CH751H-40PT_SOD323-2@

CH751H-40PT_SOD323-2@

1 2

AUX_CAL12

2 2

SUS_STAT#12,21

2 1

< RX881 use HSYNC to enable SIDE PORT (internal pull high) >

< VSYNC:STRAP_DEBUG_BUS_GPIO_ENABLEb >

Enables the Test Debug Bus using GPIO.

1 : Enable (RX881, RS880)

+3VS

0 : Disable (RX881, RS880)

PIN: RS880--> VSYNC#

< DFT_GPIO[4:2] : STRAP_PCIE_GPP_CFG[2:0] >

These pin straps are used to configure PCI-E GPP mode. 000 : 00001 001 : 00010 010 : 01011 011 : 00100 100 : 01010 101 : 01100 111 : 01011

< SUS_STAT# : LOAD_EEPROM_STRAPS >

Selects Loading of STRAPS from EPROM

1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

RX881:SUS_STAT#

< HSYNC: STRAP_DEBUG_BUS_PCIE_ENABLEb >

RX881: Enables the Test Debug Bus using PCIE bus

R125

R125 3K_0402_5%

3K_0402_5%

UMA_CRT_HSYNC12

12

+3VS

1 : Disable ( Can still be enabled using nbcfg register access ) 0 : Enable

RS880: Enables Side port memory ( RS780 use HSYNC#)

1. Disable (RS780) 0 : Enable (RS780)

3 3

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

15 54Tuesday, February 23, 2010

E

CCustom

of

A

C458

0.1U_0402_16V4Z

+3VS_CLK

R179

1 2

+VDDCLK_IO

1

C452

C452 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C459

0.1U_0402_16V4Z

2

SEL_SATA

1

C453

0.1U_0402_16V4Z

2

1

C460

0.1U_0402_16V4Z

2

SMB_CK_CLK09,10,21,27 SMB_CK_DAT09,10,21,27

27M_CLK37 27M_SSC37

SB LINK SB SRC

WLAN

1

C454

0.1U_0402_16V4Z

2

1

C461

0.1U_0402_16V4Z

2

R190 0_0402_5%R190 0_0402_5%

1 2

R189 33_0402_5%@ R189 33_0402_5%@

1 2

CLK_SBLINK_BCLK#12

CLK_SBLINK_BCLK12 CLK_SBSRC_BCLK# 20

CLK_PCIE_MCARD2#27

CLK_PCIE_MCARD227

+3VS_CLK

+1.2V_HT

R168 0_0805_5%R168 0_0805_5%

1 2

+3VS_CLK

1 1

2 2

3 3

1

2

8.2K_0402_5%@

B

1

C455

0.1U_0402_16V4Z

2

C464

22P_0402_50V8J

1

C456

0.1U_0402_16V4Z

2

CLK_XTAL_OUT CLK_XTAL_IN

Y2

12

14.31818MHZ_20P_6X1430004201

1

C465

C465 22P_0402_50V8J

2

22P_0402_50V8J

2

Routing the trace at least 10mil

+3VS_CLK

+VDDCLK_IO

+3VS_CLK

+VDDCLK_IO

27MCLK 27MSSC

U10

1

SCL

2

SDA

3

VDD_DOT

4

SRC_7#/27M

5

SRC_7/27M_SS

6

VSS_DOT

7

SRC_5#

8

SRC_5

9

SRC_4#

10

SRC_4

11

VSS_SRC

12

VDD_SRC_IO

13

SRC_3#

14

SRC_3

15

SRC_2#

16

SRC_2

17

VDD_SRC

18

VDD_SRC_IO

1 2

+3VS_CLK

CLK_XTAL_OUT

CLK_XTAL_IN

69

66

67

68

VDD_48

XTAL_IN

XTAL_OUT

65

VSS_REF

27M_SEL

SEL_SATA

63

64

REF_1/SEL_SATA

REF_0/SEL_HTT66

C

REF_2/SEL_27

CLK_48M

CLK_48M_CRUSB

NB_OSC_14.318M_R

+3VS_CLK

61

62

VDD_REF

+3VS

R167 0_0805_5%R167 0_0805_5%

1

C457

0.1U_0402_16V4Z

2

70

71

72

73

GND

VSS_48

48MHz_1

48MHz_0

VSS_SRC19SRC_1#20SRC_121SRC_0#22SRC_023CLKREQ_0#24ATIGCLK_2#25ATIGCLK_226VSS_ATIG27VDD_ATIG_IO28VDD_ATIG29ATIGCLK_1#30ATIGCLK_131ATIGCLK_0#32VSS_SB_SRC36SB_SRC_1

+3VS_CLK

58

60

59

VSS_HTT

VDD_HTT

HTT_0/66M_0

HTT_0#/66M_1

SB_SRC_1#34ATIGCLK_0

33

1

C444

C444 22U_0805_6.3V6M

22U_0805_6.3V6M

2

CLK_CPU_BCLK_R

CLK_CPU_BCLK_R#

56

55

57

PD#

CPU_K8_0

CPU_K8_0#

VDD_CPU

VDD_CPU_I/O

VSS_CPU CLKREQ_1# CLKREQ_2#

VDD_A VSS_A

VSS_SATA

SRC_6/SATA

SRC_6#/SATA#

VDD_SATA CLKREQ_3# CLKREQ_4#

SB_SRC_SLOW#

SB_SRC_0

SB_SRC_0#

VDD_SB_SRC

VDD_SB_SRC_IO

35

SLG8SP626VTR_QFN72_10x10

1

C445

0.1U_0402_16V7K

2

R185 33_0402_5%R185 33_0402_5%

1 2

R170 33_0402_5%R170 33_0402_5%

1 2

R379 158_0402_1%R379 158_0402_1%

1 2

R187 33_0402_5%R187 33_0402_5%

1 2

R174 8.2K_0402_5%R174 8.2K_0402_5%

1 2

C629 1U_0402_6.3V4ZC629 1U_0402_6.3V4Z

1 2

54 53 52 51 50 49 48 47 46 45 44 43 42

R372 10K_0402_5%R372 10K_0402_5%

41 40 39 38 37

1

C446

0.1U_0402_16V7K

2

R946 0_0402_5%R946 0_0402_5%

1 2

R945 0_0402_5%R945 0_0402_5%

1 2

+3VS_CLK +VDDCLK_IO

CLKREQ_NCARD# CLKREQ_MCARD2#

+3VS_CLK

1 2

+3VS_CLK +VDDCLK_IO

D

1

C447

0.1U_0402_16V7K

2

R380 90.9_0402_1%R380 90.9_0402_1%

1 2

R186

@

261_0402_1%

1 2

CLKREQ_NCARD# 27 CLKREQ_MCARD2# 27

CLK_SBSRC_BCLK 20

+3VS_CLK

CLK_NBHT 12

CLK_NBHT# 12

+3VS_CLK

CLK_CPU_BCLK 7

CLK_CPU_BCLK# 7

CLKREQ_NCARD# CLKREQ_MCARD2# CLKREQ_LAN

1

C449

0.1U_0402_16V7K

2

CLK_48M_CR 28

CLK_48M_USB 21

NB_OSC_14.318M 12

SB_14.318M 20

1

C448

0.1U_0402_16V7K

2

OSC_14M_NB

RX881 1.1V 158R/90.9R

E

1

C450

0.1U_0402_16V7K

2

< To Card Reader > < To SB710 USB host > < To RX881 Clock block >

< To RX881 Clock block >

< To CPU >

1 2

R324 8.2K_0402_5%R324 8.2K_0402_5%

1 2

R325 8.2K_0402_5%R325 8.2K_0402_5%

1 2

R390 8.2K_0402_5%R390 8.2K_0402_5%

1

C451

C451 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+3VS_CLK

R181

8.2K_0402_5%

SEL_SATA

4 4

1 2

configure as SATA output

1

configure as normal SRC(SRC_6) output

0

*

* default

Use voltage divider resistor R379 & R380 to pull low

NB_OSC_14.318M

configure as single-ended 66MHz output1

*0 configure as differential 100MHz output

* default

A

1 2

27M_SEL

R180

8.2K_0402_5%

27M_SEL

1* 0

* default

configure as 27M and 27M_SS output configure as SRC_7 output

B

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS_CLK

+VDDCLK_IO

CLKREQ_LAN

C

NBGFX_CLK 12 NBGFX_CLK# 12

CLK_PCIE_VGA 36

CLK_PCIE_VGA# 36

NB GFX

10/23 Delete for MiniCard1

MiniCard_1

CLKREQ_LAN 26 CLK_PCIE_LAN 26 CLK_PCIE_LAN# 26

CLK_PCIE_NCARD 27 CLK_PCIE_NCARD# 27

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

GLAN

New Card

Deciphered Date

D

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

Date: Sheet

RX881 RX881

100M DIFF 100M DIFF

14M SE (1.8V) 14M SE (1.1V) NC vref

100M DIFF 100M DIFF

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

Schematic, M/B LA-5331P

401716

E

CCustom

of

16 54Tuesday, February 23, 2010

A

B

< CRT CONNECTOR >

C

0.1U_0402_16V4Z

FOR EMI

C478

+5VS

D

D36

2

1

3

2

1

RB491D_SOT23-3

+R_CRT_VCC

F2

F2 1A_6VDC_MINISMDC110

1A_6VDC_MINISMDC110

21

E

+CRT_VCC

1

C475

0.1U_0402_16V4Z

2

1

C472

C472 6P_0402_50V8K

6P_0402_50V8K

2

1

D34

DAN217_SC59@

3

RED_L

GREEN_L

BLUE_L

+3VS

2

C484

0.1U_0402_16V4Z

1

FOR EMI

220P_0402_50V7K

+CRT_VCC

C706

1

2

RED_L D_DDCDATA

GREEN_L HSYNC

BLUE_L VSYNC

D_DDCCLK

JCRT

6

11

1

7

12

2

8

13

3

9

14

4 10 15

5

ALLTO_C10532-11505-L_15P-T@

16

14

G

17

4

G 10 15 5

1

D35

DAN217_SC59@

2

C858

C858 6P_0402_50V8K

6P_0402_50V8K

DAN217_SC59@

3

1 1

L47

L47 NBQ100505T-800Y_0402

NBQ100505T-800Y_0402 L48

L48 NBQ100505T-800Y_0402

NBQ100505T-800Y_0402 L49

L49 NBQ100505T-800Y_0402

NBQ100505T-800Y_0402

1

2

12

R217

R217 150_0402_1%

150_0402_1%

RED

GREEN

BLUE

1

C471

C471 6P_0402_50V8K

6P_0402_50V8K

2

1

C859

C859 6P_0402_50V8K

6P_0402_50V8K

2

RED37

GREEN37

BLUE37

R214

R214 150_0402_1%

150_0402_1%

12

R211

R211 150_0402_1%

150_0402_1%

12

1 2

1

C469

C469 6P_0402_50V8K

6P_0402_50V8K

2

1

C476

C476 6P_0402_50V8K

6P_0402_50V8K

2

1

D37

DAN217_SC59@

3

RS780 use 140 ohm, check RS880 use what value

2 2

R_HSYNC37,44

R_VSYNC37,44

R_HSYNC

R_VSYNC

C473 0.1U_0402_16V4ZC473 0.1U_0402_16V4Z

1 2

C477 0.1U_0402_16V4ZC477 0.1U_0402_16V4Z

1 2

+CRT_VCC

1 2

1

5

P

4

OE#

A2Y

G

U14

U14 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

+CRT_VCC

1 2

1

5

P

4

OE#

A2Y

G

U13

U13 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

R370

R370 10K_0402_5%

10K_0402_5%

R381

R381 10K_0402_5%

10K_0402_5%

D_HSYNC

D_VSYNC

L84 10_0402_5%L84 10_0402_5%

1 2

L83 10_0402_5%L83 10_0402_5%

1 2

HSYNC

VSYNC

1

C474

C474 10P_0402_50V8J@

10P_0402_50V8J@

2

1

C470

C470 10P_0402_50V8J@

10P_0402_50V8J@

2

< SYNC SIGNAL >

12

R100

R100 2K_0402_1%

2K_0402_1%

1

C857

C857 470P_0402_50V8J@

470P_0402_50V8J@

2

Deciphered Date

+CRT_VCC

12

1

C856

C856 470P_0402_50V8J@

470P_0402_50V8J@

2

D

R218

R218 2K_0402_1%

2K_0402_1%

D_DDCDATA

< Display Data Channel >

D_DDCCLK

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

E

CCustom

of

17 54Tuesday, February 23, 2010

3 3

+3VS

5

Q10B

+3VS

2

Q10B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

3

Q10A

Q10A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

61

CRT_DATA37

CRT_CLK37

CRT_DATA

CRT_CLK

12

C177

C177 33P_0402_50V8K@

33P_0402_50V8K@

12

C181

C181 33P_0402_50V8K@

33P_0402_50V8K@

VGA have pull high

4

RS880 DAC_SCL & SDA is 5V tolerance

4 4

A

FOR EMI

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

A

B

C

D

E

LCD/PANEL BD. Conn.

+LCD_VDD

1 1

2N7002DW-T/R7_SOT363-6

ENVDD37

2 2

1 2

+5VALW

1 2

< Int. Camera, USB port 9 >

+5VS

< EMI require >

R1050_0402_5% @R1050_0402_5% @

12

L62

CAM@L62

CAM@

R1060_0402_5% @R1060_0402_5% @

12

1

4

USB20_N9_R USB20_P9_R

4

2

USB20_N921 USB20_P921

3 3

2

3

WCM-2012-900T_0805

R968

@R968

@

0_0603_5%

0_0603_5% R967

CAM@ R967

CAM@

0_0603_5%

INT_MIC_R30 LCD_TXOUT0+37 LCD_TXOUT0-37 LCD_TXOUT1+37 LCD_TXOUT1-37 LCD_TXOUT2+37 LCD_TXOUT2-37

LCD_TZOUT0+37 LCD_TZOUT0-37 LCD_TZOUT1+37 LCD_TZOUT1-37 LCD_TZOUT2+37 LCD_TZOUT2-37

BKOFF#33

C274

CAM@ C274

CAM@

0.1U_0402_16V7K

1 2

+5V_LVDS_CAM

USB20_P9_R USB20_N9_R

LCD_TXOUT0+ LCD_TXOUT0LCD_TXOUT1+ LCD_TXOUT1LCD_TXOUT2+ LCD_TXOUT2-

LCD_TZOUT0+ LCD_TZOUT0LCD_TZOUT1+ LCD_TZOUT1LCD_TZOUT2+ LCD_TZOUT2-

BKOFF#

1 2

R146

R146 10K_0402_5%

10K_0402_5%

JLVDS

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

GND

ACES_87242-4001-09@

12

R142 150_0603_5%R142 150_0603_5%

61

Q1A

R144 100K_0402_5%R144 100K_0402_5%

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

GMD

2

12

LCD_TXCLK+ LCD_TXCLK-

LCD_TZCLK+ LCD_TZCLK-

LCD_EDID_CLK LCD_EDID_DATA

+LCDVDD_R

ENVDD

1

2

+3VS

12

3

5

4

+LCD_INV

C268

C268 68P_0402_50V8J

68P_0402_50V8J

R143

R143 100K_0402_5%

100K_0402_5%

1 2

Q1B

Q1B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

LCD_TXCLK+ 37

LCD_TXCLK- 37 DAC_BRIG 33

INVT_PWM 33

LCD_TZCLK+ 37

LCD_TZCLK- 37

VGA have pull high

LCD_EDID_CLK 37 LCD_EDID_DATA 37

VGA have pull high

FBMA-L11-201209-221LMA30T_0805

L12

1

C269

0.1U_0402_25V4Z

2

R140

R140 47K_0402_5%

47K_0402_5%

12

2

C262

0.1U_0402_16V7K

1

C195

0.01U_0402_25V7K

2

Rated Current MAX:3000mA

+3VS

G

2

1 3

1

C263 4.7U_0805_10V4Z@C263 4.7U_0805_10V4Z@

2

1

C875

C875 680P_0402_50V7K

680P_0402_50V7K

2

< EMI require >

W=60mils

S

Q2

D

AO3413_SOT23

Inrush current = 0A

B+

1

C874

C874 680P_0402_50V7K

680P_0402_50V7K

2

< EMI require >

+LCD_VDD

1

2

W=60mils

C264

0.1U_0402_16V7K

+3VS

1

C267

0.1U_0402_16V7K

2

1.5A

+LCDVDD_R

L8 0_0805_5%L8 0_0805_5%

1

C265

0.1U_0402_16V7K

2

12

1

2

C266

4.7U_0805_10V4Z

+LCD_VDD

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

18 54Tuesday, February 23, 2010

E

C

of

A

< HDMI CEC Controller >

U8

@U8

EC_SMB_CK1

+3VL

1 1

1

C256

@

0.1U_0402_16V7K

2

1 2

R182

4.7K_0402_5%@

12

R178

R178 47K_0402_5%@

47K_0402_5%@

R177

R177 47K_0402_5%@

47K_0402_5%@

R183

4.7K_0402_5%@

12

CEC_XOUT

CEC_XIN

HDMI_CECIN HDMI_HPD_R

HDMI_CECOUT

@

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D33SP-PLSP0020JB-A

SI:Add R616~R624 for EMI requset

C189 0.1U_0402_16V7KH@ C189 0.1U_0402_16V7KH@

HDMI_TXD0+37 HDMI_TXD0-37 HDMI_TXD1+37 HDMI_TXD1-37 HDMI_TXD2+37 HDMI_TXD2-37

2 2

HDMI_CLK0+37 HDMI_CLK0-37

1 2

C188 0.1U_0402_16V7KH@ C188 0.1U_0402_16V7KH@

1 2

C190 0.1U_0402_16V7KH@ C190 0.1U_0402_16V7KH@

1 2

C184 0.1U_0402_16V7KH@ C184 0.1U_0402_16V7KH@

1 2

C187 0.1U_0402_16V7KH@ C187 0.1U_0402_16V7KH@

1 2

C191 0.1U_0402_16V7KH@ C191 0.1U_0402_16V7KH@

1 2

C185 0.1U_0402_16V7KH@ C185 0.1U_0402_16V7KH@

1 2

C186 0.1U_0402_16V7KH@ C186 0.1U_0402_16V7KH@

1 2

HDMI_TX0+ HDMI_TX0HDMI_TX1+ HDMI_TX1HDMI_TX2+

HDMI_TX2-

HDMI_CLK+ HDMI_CLK-

< EMI solution >

R616

HDMI_CLK-

HDMI_TX0-

3 3

HDMI_TX0+

HDMI_TX1-

1 2

L85

H@ L85

H@

1

4

WCM-2012-900T_0805

1 2

WCM-2012-900T_0805

H@

4

1

L86

1 2

R616 0_0402_5%@

0_0402_5%@

2

3

R617

R617 0_0402_5%@

0_0402_5%@ R618

R618 0_0402_5%@

0_0402_5%@

3

2

R619

R619 0_0402_5%@

0_0402_5%@ R620

R620 0_0402_5%@

0_0402_5%@

HDMI_R_CK-

HDMI_R_CK+HDMI_CLK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

< Termination resistor >

HDMI_R_CK+ HDMI_R_CK-

HDMI_R_D0HDMI_R_D0+

B

P1_6/CLK0/SSI01

P1_5/RXD0/CNTR01/INT11#

P1_4/TXD0

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P4_2/VREF

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

R307 499_0402_1%HDMI@ R307 499_0402_1%HDMI@ R315 499_0402_1%HDMI@ R315 499_0402_1%HDMI@

R304 499_0402_1%HDMI@ R304 499_0402_1%HDMI@ R172 499_0402_1%HDMI@ R172 499_0402_1%HDMI@

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_CEC HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

1 2 1 2

+HDMI_5V_OUT

11

CEC_TEST

12

13

14

15

16

17

18

19

20

1 2

CEC_FSHUPDCEC_RST#

1 2

CEC_FSHUPD (Pin13) Low= Force to update flash.

1 2 1 2

HDMI_CLK_CEC

HDMI_DATA_CEC

EC_SMB_DA1

< HDMI Connector >

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

TYCO_1939864-1_19P@

6 1

3

R169

@ R169

@

4.7K_0402_5%

4.7K_0402_5% R171

@ R171

@

4.7K_0402_5%

C543

C543 1U_0402_6.3V4Z@

1U_0402_6.3V4Z@ C257

C257

0.1U_0402_16V7K@

EC_SMB_DA1 33,46

20

GND

21

GND

22

GND

23

GND

H@ Q136A

H@

2N7002DW-7-F_SOT363-6

2

+5VS

5

H@ Q136B

H@

4

2N7002DW-7-F_SOT363-6

CEC_INT# 33EC_SMB_CK133,46

Q136A

Q136B

+3VL

C

< Power, reset and crystal >

+3VL

< HDMI DDC channel to device >

HDMI_DATA_CEC

HDMI_CLK_CEC

HDMIDAT_VGA37

HDMICLK_VGA37

+5VS

@

@ R210

R210 10K_0402_5%

10K_0402_5%

H@ D20

H@

H@ D53

H@

D20

D53

2 1

1 2

+5VS_HDMI

RB161M-20_SOD123-2

@

@ R236

R236 10K_0402_5%

10K_0402_5%

1 2

D

H@ F3

H@

2 1

2

3 1

SGD

VGA have pull high

F3

1.1A_6V_MINISMDC110F-2

< HDMI_CEC level shift >

HDMI_CECIN

2N7002_SOT23-3

HDMI_CECOUT

@

@ Q33

Q33 BSH111_SOT23-3

BSH111_SOT23-3

1 2

+3VL+3VL

2

3 1

SGD

2

3 1

SGD

E

+HDMI_5V_OUT+5VL

1

C258

H@

0.1U_0402_16V7K

2

< Place MOSFET close to HDMI connector >

12

R157

@ R157

@

10K_0402_5%

13

D

Q149

@

Q149

@

2

G

S

R163

@ R163

@

27K_0402_5%

12

@ R165

@

H@

H@ R188

R188

2.2K_0402_5%

@

@ Q34

Q34 BSH111_SOT23-3

BSH111_SOT23-3

H@

H@ Q139

Q139 BSH111_SOT23-3

BSH111_SOT23-3

1 2

+3VS

3 1

SGD

@ D13

@

@ R583

@

2

G

R165 100K_0402_5%

100K_0402_5%

+HDMI_5V_OUT

H@

H@ R212

R212

2.2K_0402_5%

1 2

2

H@

H@ Q140

Q140 BSH111_SOT23-3

BSH111_SOT23-3

+3VL+3VL

21

D13 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

12

R583 27K_0402_5%

27K_0402_5%

13

D

@

@ 2N7002_SOT23-3

2N7002_SOT23-3

S

HDMI_CEC

Q150

HDMI_SDATA

HDMI_SCLK

L87

H@ L87

H@

1

4

WCM-2012-900T_0805

HDMI_TX1+

4 4

HDMI_TX2+

1 2

WCM-2012-900T_0805

H@

4

1

L88

1 2

2

3

R621

R621 0_0402_5%@

0_0402_5%@ R623

R623 0_0402_5%@

0_0402_5%@

3

2

R624

R624 0_0402_5%@

0_0402_5%@

A

HDMI_R_D1+

HDMI_R_D2-HDMI_TX2-

HDMI_R_D2+

HDMI_R_D1HDMI_R_D1+

HDMI_R_D2+ HDMI_R_D2-

R297 499_0402_1%HDMI@ R297 499_0402_1%HDMI@ R173 499_0402_1%HDMI@ R173 499_0402_1%HDMI@

R141 499_0402_1%HDMI@ R141 499_0402_1%HDMI@ R139 499_0402_1%HDMI@ R139 499_0402_1%HDMI@

B

1 2 1 2

6 1

3

Q137A

H@ Q137A

H@

2N7002DW-7-F_SOT363-6

2

+5VS

5

Q137B

H@ Q137B

H@

4

2N7002DW-7-F_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

< Hot-plug detection & level shift >

2

C851

H@

0.1U_0402_16V4Z

1

+3VL

HDMI_HPD_R

2008-09-25 2009-09-25

C

+5VL

1

5

P

OE#

A2Y

G

H@ U39

H@

3

R589

R589 100K_0402_5%H@

100K_0402_5%H@

12

Compal Secret Data

Deciphered Date

HDMI_HPD_R

4

U39 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

D57

D57 CH751H-40PT_SOD323-2H@

CH751H-40PT_SOD323-2H@

21

D

H@

R628

R628 100K_0402_5%

100K_0402_5%

1 2

HDMI_HPD

2

C850

H@

0.1U_0402_16V4Z

1

R588

2.2K_0402_5%H@

12

R86

R86 100K_0402_5%

100K_0402_5%

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

+3VS

HPD 21,37

Schematic, M/B LA-5331P

401716

E

of

19 54Tuesday, February 23, 2010

CCustom

A

1 1

< x4 PCIE A-link To NB >

< x4 PCIE A-link from NB >

2 2

3 3

R319 10K_0402_5%R319 10K_0402_5%

+3VS

4 4

1

C509

0.1U_0402_16V7K

2

+SB_VBAT

1

2

1 2

C510

C510 1U_0402_6.3V4Z

1U_0402_6.3V4Z

A

R316

R316 120_0402_5%

120_0402_5%

W=20mils

2

JUMP_43X39@J1JUMP_43X39@

1

1 2

J1

12

R317

R317 120_0402_5%

120_0402_5%

H_PROCHOT#

+RTCVCC

C643

1 2

12P_0402_50V8J

C652

1 2

12P_0402_50V8J

B

CLK_SBSRC_BCLK16 CLK_SBSRC_BCLK#16

CPU_LDT_REQ#7,12 H_PROCHOT#7

H_PWRGD7,51

LDT_STOP#7,12

LDT_RST#7

R184

R184 1K_0402_5%

1K_0402_5%

12

C297

0.1U_0402_16V7K

B

SB_RX0P11 SB_RX0N11 SB_RX1P11 SB_RX1N11 SB_RX2P11 SB_RX2N11 SB_RX3P11 SB_RX3N11

SB_TX0P11

SB_TX0N11

SB_TX1P11

SB_TX1N11

SB_TX2P11

SB_TX2N11

SB_TX3P11

SB_TX3N11

+PCIE_VDDR

+1.2V_HT

SB_14.318M16

12

R389

R389 20M_0603_5%

20M_0603_5%

1

2

C506

0.1U_0402_16V4Z

12

NB_RST#_R

L53 BLM18PG121SN1D_0603L53 BLM18PG121SN1D_0603

1 2

+3VALW

U16

U16 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

5

2

P

B

1

A

C492 0.1U_0402_16V7KC492 0.1U_0402_16V7K

1 2

C493 0.1U_0402_16V7KC493 0.1U_0402_16V7K

1 2

C494 0.1U_0402_16V7KC494 0.1U_0402_16V7K

1 2

C495 0.1U_0402_16V7KC495 0.1U_0402_16V7K

1 2

C496 0.1U_0402_16V7KC496 0.1U_0402_16V7K

1 2

C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

1 2

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K

1 2

C499 0.1U_0402_16V7KC499 0.1U_0402_16V7K

1 2

R305 562_0402_1%R305 562_0402_1% R306 2.05K_0402_1%R306 2.05K_0402_1%

1

2

4

Y

G

3

R312

R312 33_0402_5%@

33_0402_5%@

12

12 12

C504

2.2U_0603_6.3V4Z

PLT_RST#

Close to SB

Y3

+RTCBATT

D10

3

2

BAS40-04_SOT23-3

+CHGRTC

4 1

32.768KHZ_12.5P_1TJS125BJ4A421P

1

3

OUT

NC

2

IN

NC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

+SB_PCIEVDD

SB_32KHI

SB_32KHO

CPU_LDT_REQ# H_PROCHOT# H_PWRGD

SBR1@

C

D

PLT_RST# 12,15,26,27,32,33,36

RN3100K_0402_5% RN3100K_0402_5%

12

U15A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

218S7EALA11FG_BGA528_SB700

2008-09-25 2009-09-25

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

LPC

RTC XTAL

CPU

RTC

Compal Secret Data

Deciphered Date

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCIRST#

DEVSEL#

PCI INTERFACE

REQ3#/GPIO70 REQ4#/GPIO71

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

INTE#/GPIO33

INTF#/GPIO34

INTG#/GPIO35

CLOCK GENERATOR

INTH#/GPIO36

LPCCLK0 LPCCLK1

LFRAME#

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

INTRUDER_ALERT#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

CBE0# CBE1# CBE2# CBE3#

FRAME#

IRDY#

TRDY#

PAR

STOP# PERR# SERR# REQ0# REQ1# REQ2#

GNT0# GNT1# GNT2#

LOCK#

LAD0 LAD1 LAD2 LAD3

LDRQ0#

SERIRQ

RTCCLK

VBAT

D

R303

CLK_PCI_EC

CLK_PCI_SIO2

P4 P3 P1 P2 T4 T3

N1

U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3

PCI_AD23

Y2

PCI_AD24

AA2

PCI_AD25

AB4

PCI_AD26

AA1

PCI_AD27

AB3

PCI_AD28

AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

CLK_PCI_EC1 CLK_PCI_EC

G22

CLK_PCI_SIOC

E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15

C3 C2 B2

R308 22_0402_5%R308 22_0402_5% R310 22_0402_5%R310 22_0402_5%

+SB_VBAT

R303 100_0402_5%@

100_0402_5%@

1 2

R369

R369 100_0402_5%@

100_0402_5%@

1 2

PCI_CLK2 24 PCI_CLK3 24 PCI_CLK4 24 PCI_CLK5 24

PCI_AD23 24 PCI_AD24 24 PCI_AD25 24 PCI_AD26 24 PCI_AD27 24 PCI_AD28 24

T18PAD T18PAD T26PAD T26PAD

T15PAD T15PAD

T16PAD T16PAD

1 2 1 2

LPC_AD0 32,33 LPC_AD1 32,33 LPC_AD2 32,33 LPC_AD3 32,33

D17 CH751H-40PT_SOD323-2@D17 CH751H-40PT_SOD323-2@ R966 0_0402_5%R966 0_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

21

1 2

SERIRQ 32,33

RTC_CLK 24

Compal Electronics, Inc.

Schematic, M/B LA-5331P

E

C501

C501 100P_0402_50V8J@

100P_0402_50V8J@

1 2

C503

C503 100P_0402_50V8J@

100P_0402_50V8J@

1 2

CLK_PCI_EC 24,33 CLK_PCI_SIO2 24,32

EC & TPM &Debug

STRAP PIN

401716

20 54Tuesday, February 23, 2010

E

R965

@R965

@

300_0402_5%

12

LPC_FRAME# 32,33

of

+3VS

C

A

+3VALW

1 2

+3VS

1 1

2 2

3 3

+3VALW

+3VS

1 2

12

1 2

R320

2.2K_0402_5%@

2.2K_0402_5%@ R321

R321

2.2K_0402_5%@

2.2K_0402_5%@ R322

R322

2.2K_0402_5%@

2.2K_0402_5%@ R561

R561 1K_0402_5%

1K_0402_5%

R328

1.2K_0402_5%

1.2K_0402_5% R329

R329

1.2K_0402_5%

R331

2.2K_0402_5%

2.2K_0402_5% R332

R332

2.2K_0402_5%

2.2K_0402_5% RN2

RN2 100K_0402_5%

100K_0402_5%

R327

R327 100K_0402_5%

100K_0402_5%

12

R388

4.7K_0402_5%

SB_TEST2

SB_TEST1

SB_TEST0

EC_SWI_R#

SMB_CK_CLK0

SMB_CK_DAT0

SMB_CK_CLK1

SMB_CK_DAT1

EXP_CPPE#

EC_RSMRST#

SUS_STAT#

<S0>

< S0~ S5 ASF only >

share with USB OC PIN need always pull high (For Express card )

HDA_BITCLK_CODEC29 HDA_BITCLK_MDC32

STRAP PIN

B

+3VS

HPD19,37

Reserve for EMI request

10P_0402_50V8J@

C486

12

10P_0402_50V8J@

C485

12

HDA_SDOUT_MDC32

HDA_SDOUT_CODEC29 HDA_SDIN029 HDA_SDIN132

HDA_SYNC_MDC32

HDA_SYNC_CODEC29 HDA_RST#_CODEC29

HDA_RST#_MDC32 HDARST#24

demo circuit LID use RI#

PM_SLP_S3#33 PM_SLP_S5#33 PBTN_OUT#33 SB_PWRGD33,51 SUS_STAT#12,15

GATEA2033 KB_RST#33 EC_SCI#33 EC_SMI#33

EC_SWI_R#27,33

H_THERMTRIP#7 NB_PWRGD12

EC_RSMRST#33

SB_SPKR29 SMB_CK_CLK09,10,16,27 SMB_CK_DAT09,10,16,27

SMB_CK_CLK127

SMB_CK_DAT127

R400

4.7K_0402_5%@

1 2

R16

R16 0_0402_5%

0_0402_5%

1 2

EC_LID_OUT#33

EXP_CPPE#27

USB_OC#225,33 USB_OC#031,33

R333 33_0402_5%R333 33_0402_5%

1 2

R334 33_0402_5%R334 33_0402_5%

1 2

R335 33_0402_5%R335 33_0402_5%

1 2

R336 33_0402_5%R336 33_0402_5%

1 2

R337 33_0402_5%R337 33_0402_5%

1 2

R338 33_0402_5%R338 33_0402_5%

1 2

R339 33_0402_5%R339 33_0402_5%

1 2

R340 33_0402_5%R340 33_0402_5%

1 2

C

SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0

EC_SWI_R# H_THERMTRIP#

EC_RSMRST#

SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1

HDA_BITCLK

HDA_SDOUT HDA_SDIN0 HDA_SDIN1

HDA_SYNC

HDARST#

U15D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

218S7EALA11FG_BGA528_SB700SBR1@

SB700

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

USB OC

HD AUDIO

INTEGRATED uC

D

Part 4 of 5

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N

USB_FSD12P

USB_FSD12N

USB 1.1

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P

USB_HSD5N USB_HSD4P

USB 2.0

USB_HSD4N USB_HSD3P

USB_HSD3N

GPIO

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12

SCL3_LV/IMC_GPIO13

SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

Reserve for EMI request

1 2

C8

USB_RCOMP

G8

E6 E7

F7 E8

H11 J10

E11 F11

USB20_P9

A11

USB20_N9

B11

USB20_P8

C10

USB20_N8

D10

USB20_P7

G11

USB20_N7

H12

USB20_P6

E12

USB20_N6

E14

USB20_P5

C12

USB20_N5

D12

USB20_P4

B12

USB20_N4

A12 G12

G14

USB20_P2

H14

USB20_N2

H15

USB20_P1

A13

USB20_N1

B13

USB20_P0

B14

USB20_N0

A14 A18

B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

R311

R311 100_0402_5%

100_0402_5%

1 2

USB20_P9 18 USB20_N9 18

USB20_P8 27 USB20_N8 27

USB20_P7 31 USB20_N7 31

USB20_P6 31 USB20_N6 31

USB20_P5 27 USB20_N5 27

USB20_P4 28 USB20_N4 28

USB20_P2 25 USB20_N2 25

USB20_P1 31 USB20_N1 31

USB20_P0 31 USB20_N0 31

GPIO16 24 GPIO17 24

E

C617

C617 100P_0402_50V8J

100P_0402_50V8J

1 2

R323

11.8K_0402_1%

USB-9 Int Camera USB-8 WLAN USB-7 FP USB-6 Bluetooth USB-5 New Card USB-4 Card Reader (3 IN 1)

USB-2 USB/eSATA USB-1 Right side USB-0 Right side

STRAP PIN STRAP PIN

CLK_48M_USB 16

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

21 54Tuesday, February 23, 2010

E

CCustom

of

A

1 1

2 2

C516

10P_0402_50V8J

3 3

C517

12

Y4

Y4 25MHZ_20P

25MHZ_20P

SATA_X1

SATA_X2

12

R341

R341 10M_0402_5%

10M_0402_5%

HDD1

eSATA

ODD

+1.2V_HT

+3VS

B

SATA_STX_DRX_P125 SATA_STX_DRX_N125

SATA_RXN1_C25 SATA_RXP1_C25

SATA_STX_DRX_P225 SATA_STX_DRX_N225

SATA_RXN2_C25 SATA_RXP2_C25

SATA_STX_DRX_P325 SATA_STX_DRX_N325

SATA_RXN3_C25 SATA_RXP3_C25

BLM18PG121SN1D_0603

+3VS

L54

L55

1 2

SATA_LED#34

1U_0402_6.3V4Z

C524

12

C522

12

SATA_STX_DRX_P1 SATA_STX_DRX_N1

SATA_STX_DRX_P2 SATA_STX_DRX_N2

SATA_STX_DRX_P3 SATA_STX_DRX_N3

R342

R342 1K_0402_1%

1K_0402_1% R343

R343 10K_0402_5%

10K_0402_5%

2

1

+XTLVDD_SATA

1

2

@ C625

@

2

1

SATA_CAL SATA_X1 SATA_X2

+PLLVDD_SATA

C523

C523 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C625

0.1U_0402_16V4Z

SBR1@

C

U15B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

218S7EALA11FG_BGA528_SB700

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ IDE_IOR#

IDE_IOW#

IDE_CS1# IDE_CS3#

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3

FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD

AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15 J1

M8 M5 M7

P5 P8 R8

C6 B6 A6 A5 B5

A4 B4 C4 D4 D5 D6 A7 B7

F6 G7

D

SIDE_PORT_EN# MUXLESS_EN#

SPK_SEL

BT_DET#

+SB_AVDD

1

2

R198 10K_0402_5%R198 10K_0402_5%

1 2

R197 10K_0402_5%R197 10K_0402_5%

1 2

SPK_SEL 29 EC_THERM# 33

BT_DET# 31

SLP_CHG# 25 SLP_CHG_M3 25 SLP_CHG_M4 25

C525

0.1U_0402_16V4Z

1

C526

2.2U_0603_6.3V4Z

2

E

ENABLE

SIDE_PORT_EN#

MUXLESS_EN#

01

GPIO48,GPIO49 GOT INTERNAL PU 8.2K TO S0

+3VS

SLP_CHG#

SLP_CHG_M3

SLP_CHG_M4

2 1

1 2

+3VS

D41

D41 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

R562

R562 150K_0402_5%

150K_0402_5%

L56

L56 0_0603_5%

0_0603_5%

12

1 2

R571

R571 100K_0402_5%

100K_0402_5% R572

R572 100K_0402_5%

100K_0402_5% R582

R582 100K_0402_5%

100K_0402_5%

DISABLE

+3VALW

ACIN 33,34,45

+3VALW

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

22 54Tuesday, February 23, 2010

E

C

of

A

+3VS

1 1

C528 22U_0805_6.3V6M@C528 22U_0805_6.3V6M@ C531 1U_0402_6.3V4Z@C531 1U_0402_6.3V4Z@

C530 1U_0402_6.3V4Z@C530 1U_0402_6.3V4Z@ C533 1U_0402_6.3V4Z@C533 1U_0402_6.3V4Z@ C536 1U_0402_6.3V4Z@C536 1U_0402_6.3V4Z@ C535 1U_0402_6.3V4Z@C535 1U_0402_6.3V4Z@

C539 0.1U_0402_16V4Z@C539 0.1U_0402_16V4Z@ C541 0.1U_0402_16V4Z@C541 0.1U_0402_16V4Z@ C542 0.1U_0402_16V4Z@C542 0.1U_0402_16V4Z@

1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2

12

No IDE device unmount CAP

+3VS

L61

L61 0_0805_5%

0_0805_5%

+1.2V_HT

2 2

+1.2V_HT

+3VALW

3 3

12

C552 4.7U_0805_10V6KC552 4.7U_0805_10V6K

12

C553 1U_0402_6.3V4Z@C553 1U_0402_6.3V4Z@

1 2

C555 1U_0402_6.3V4ZC555 1U_0402_6.3V4Z

1 2

C554 1U_0402_6.3V4ZC554 1U_0402_6.3V4Z

1 2

C558 1U_0402_6.3V4ZC558 1U_0402_6.3V4Z

1 2

C557 0.1U_0402_16V4ZC557 0.1U_0402_16V4Z

1 2

C560 0.1U_0402_16V4ZC560 0.1U_0402_16V4Z

1 2

L63

L63 0_0805_5%

0_0805_5%

12

C566 22U_0805_6.3V6MC566 22U_0805_6.3V6M C567 1U_0402_6.3V4ZC567 1U_0402_6.3V4Z

1 2

C568 1U_0402_6.3V4ZC568 1U_0402_6.3V4Z

1 2

C571 0.1U_0402_16V4ZC571 0.1U_0402_16V4Z

1 2

C572 0.1U_0402_16V4ZC572 0.1U_0402_16V4Z

1 2

L66

L66 0_0805_5%

0_0805_5%

12

C576 10U_0805_10V4ZC576 10U_0805_10V4Z

1 2

C577 10U_0805_10V4ZC577 10U_0805_10V4Z

1 2

C580 1U_0402_6.3V4ZC580 1U_0402_6.3V4Z

1 2

C581 1U_0402_6.3V4ZC581 1U_0402_6.3V4Z

1 2

C583 0.1U_0402_16V4ZC583 0.1U_0402_16V4Z

1 2

C582 0.1U_0402_16V4ZC582 0.1U_0402_16V4Z

1 2

C584 0.1U_0402_16V4ZC584 0.1U_0402_16V4Z

1 2

+PCIE_VDDR

+1.2V_SATA

+AVDD_USB

B

AB21

AA21 AA22 AE25

AA14 AB18 AA15 AA17 AC18 AD17 AE17

T15

U16 U17

W7

AA4 AB5

Y20

P18 P19 P20

P21 R22 R24 R25

A16

B16 C16 D16 D17

E17

F15

F17

F18 G15 G17 G18

U15C

L9

M9 U9

V8 Y6

218S7EALA11FG_BGA528_SB700SBR1@

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12

VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4

PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7

AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7

AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

3.3V_S5 I/OCORE S5

SATA I/O

USB_PHY_1.2V_1 USB_PHY_1.2V_2

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

S5_1.2V_1 S5_1.2V_2

V5_VREF AVDDCK_3.3V AVDDCK_1.2V

AVDDC

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

G2 G4

A10 B10

AE7 J16 K17 E9

+1.2V_HT_R

+1.2V_HT

+S5_3V

+S5_1.2V

+1.2_USB

+V5_VREF +AVDDCK_3.3V +AVDDCK_1.2V +AVDDC

C

1 2

2

C578

0.1U_0402_16V4Z

1

L64

L64 0_0603_5%

0_0603_5%

L65

L65 0_0603_5%

0_0603_5%

L67

L67 0_0603_5%

0_0603_5%

12

R593

R593 0_0805_5%

0_0805_5%

1 2

R564

R564 0_0805_5%

0_0805_5%

1 2

12 12 12 12

12 12

C52910U_0805_6.3V6M C52910U_0805_6.3V6M

C5321U_0402_6.3V4Z C5321U_0402_6.3V4Z C5341U_0402_6.3V4Z C5341U_0402_6.3V4Z C5381U_0402_6.3V4Z C5381U_0402_6.3V4Z C5371U_0402_6.3V4Z C5371U_0402_6.3V4Z

C5270.1U_0402_16V4Z C5270.1U_0402_16V4Z C5400.1U_0402_16V4Z C5400.1U_0402_16V4Z

C55622U_0805_6.3V6M @C55622U_0805_6.3V6M @

C5592.2U_0603_6.3V4Z C5592.2U_0603_6.3V4Z C5612.2U_0603_6.3V4Z C5612.2U_0603_6.3V4Z

C5621U_0402_6.3V4Z C5621U_0402_6.3V4Z C5630.1U_0402_16V4Z C5630.1U_0402_16V4Z

C5640.1U_0402_16V4Z C5640.1U_0402_16V4Z C5650.1U_0402_16V4Z C5650.1U_0402_16V4Z

C5691U_0402_6.3V4Z C5691U_0402_6.3V4Z C5701U_0402_6.3V4Z C5701U_0402_6.3V4Z

C57310U_0805_10V4Z @C57310U_0805_10V4Z @ C5741U_0402_6.3V4Z C5741U_0402_6.3V4Z C5750.1U_0402_16V4Z C5750.1U_0402_16V4Z

2

C579

C579 1U_0603_10V4Z

1U_0603_10V4Z

1

C5852.2U_0603_6.3V4Z C5852.2U_0603_6.3V4Z C5860.1U_0402_16V4Z C5860.1U_0402_16V4Z

+1.2V_HT

+3VALW

+1.2VALW

+3VALW

D

R346

R346 1K_0402_5%

1K_0402_5%

12

D14

D14 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

+5VS

+3VS

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

H18

PCIE_CK_VSS_1

J17

PCIE_CK_VSS_2

J22

PCIE_CK_VSS_3

K25

PCIE_CK_VSS_4

M16

PCIE_CK_VSS_5

M17

PCIE_CK_VSS_6

M21

PCIE_CK_VSS_7

P16

PCIE_CK_VSS_8

F9

AVSSC

218S7EALA11FG_BGA528_SB700

SBR1@

218S7EALA11FG_BGA528_SB700

SBR1@

U15E

E

SB700

PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

Part 5 of 5

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42

GROUND

VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

L68

+AVDDCK_1.2V

+AVDDCK_3.3V

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

L68 0_0603_5%

0_0603_5%

12

C5872.2U_0603_6.3V4Z C5872.2U_0603_6.3V4Z

12

C5880.1U_0402_16V4Z C5880.1U_0402_16V4Z

12

L69

L69 0_0603_5%

0_0603_5%

12

C5892.2U_0603_6.3V4Z C5892.2U_0603_6.3V4Z

12

C5900.1U_0402_16V4Z C5900.1U_0402_16V4Z

12

Compal Secret Data

Deciphered Date

+1.2V_HT

+3VS

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

23 54Tuesday, February 23, 2010

E

CCustom

of

A

B

C

D

E

REQUIRED STRAPS

PCI_CLK2

@

BOOTFAIL TIMER ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

12

R348

R348 10K_0402_5%

10K_0402_5%

12

R358

R358 10K_0402_5%

10K_0402_5%

PULL

1 1

PCI_CLK220 PCI_CLK320 PCI_CLK420 PCI_CLK520 CLK_PCI_EC20,33 CLK_PCI_SIO220,32 RTC_CLK20 HDARST#21

2 2

GPIO1721 GPIO1621

HIGH

PULL LOW

+3VS +3VS +3VS +3VS

12

R347

@

10K_0402_5%

12

R357

R357 10K_0402_5%

10K_0402_5%

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

12

R349

@

10K_0402_5%

12

R359

@ R359

@

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

@

@ R360

@

12

R350

R350 10K_0402_5%

10K_0402_5%

12

R360 10K_0402_5%

10K_0402_5%

RESERVED

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

LPC_CLK0

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

+3VALW +3VALW+3VALW +3VALW +3VALW +3VALW

12

R351

@

10K_0402_5%

12

R361

R361 10K_0402_5%

10K_0402_5%

@

LPC_CLK1

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

12

R352

R352 10K_0402_5%

10K_0402_5%

12

R362

R362 10K_0402_5%

10K_0402_5%

@

RTC_CLK

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

12

R353

R353 10K_0402_5%

10K_0402_5%

12

R363

2.2K_0402_5%

AZ_RST_CD#

EC ENABLED

EC DISABLED

DEFAULT

12

R354

@

10K_0402_5%

12

R364

R364 10K_0402_5%

10K_0402_5%

GP17

GP16

Internal pull up

H,H = Reserved

H,L = SPI ROM

L,H = LPC ROM (Default) L,L = FWH ROM

12

R355

@

2.2K_0402_5%

12

R365

2.2K_0402_5%

@

12

R356

2.2K_0402_5%

SI2: mount 2.2K

12

R366

2.2K_0402_5%

Need to confirm if SB SPI ROM will mount

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

PCI_AD28

@

12

R373

2.2K_0402_5%

USE LONG RESET

DEFAULT

USE SHORT RESET

B

PULL

3 3

PCI_AD2820 PCI_AD2720 PCI_AD2620 PCI_AD2520 PCI_AD2420 PCI_AD2320

4 4

A

HIGH

PULL LOW

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

@

12

R374

2.2K_0402_5%

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

@

PCI_AD25 PCI_AD24

USE IDE PLL

DEFAULT

BYPASS IDE PLL

12

R375

2.2K_0402_5%

PCI_AD23

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

12

R376

@

2.2K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RESERVED

12

R377

@

2.2K_0402_5%

C

12

R378

@

2.2K_0402_5%

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

24 54Tuesday, February 23, 2010

E

of

C

A

< SATA HDD1 Conn >

JHDD

1 1

24

GND

23

GND

OCTEK_SAT-22SO1G_RV@

+5VS

1.2A

1

C387

C387 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS

SSD HDD need 400mA for 3V(PHISON)

2 2

1

@

@ C336

C336 10U_0805_10V4Z

10U_0805_10V4Z

2

1

GND

GND GND GND

GND

Reserved

GND

A+

AB-

B+

V33 V33 V33

V5 V5 V5

V12 V12 V12

2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SATA_TXP1 SATA_TXN1

SATA_IRX_DTX_N1 SATA_IRX_DTX_P1

+3VS

+5VS

Place closely JHDD0 SATA CONN.

1

C388

0.1U_0402_16V7K

2

1

C337

@

0.1U_0402_16V7K

2

1

C389

0.1U_0402_16V7K

2

1

C338

@

0.1U_0402_16V7K

2

C512 0.01U_0402_25V7KC512 0.01U_0402_25V7K

1 2

C513 0.01U_0402_25V7KC513 0.01U_0402_25V7K

1 2

C410 0.01U_0402_25V7KC410 0.01U_0402_25V7K

1 2

C412 0.01U_0402_25V7KC412 0.01U_0402_25V7K

1 2

1

C390

0.1U_0402_16V7K

2

+3VS rail reserve for SSD

1

C339

@

0.1U_0402_16V7K

2

B

SATA_STX_DRX_P1 22 SATA_STX_DRX_N1 22

SATA_RXN1_C 22 SATA_RXP1_C 22

< 16" SATA ODD Conn >

JODD

15

GND

14

GND

SANTA_206401-1_RV@

< 17" SATA ODD Conn >

JODDB

1 2 3 4 5 6 7 8

9 10 11 12

GND GND

E&T_6905-E12N-00R@

GND

+5V +5V

GND GND

1 2 3 4 5 6 7 8 9 10 11 12 13 14

1 2

A+

3

A-

4 5

B-

6

B+

7

8

DP

9 10 11

MD

12 13

+5VS

SATA_IRX_DTX_P3 SATA_IRX_DTX_N3

SATA_TXN3 SATA_TXP3

SATA_STX_DRX_P3_16 SATA_STX_DRX_N3_16

SATA_RXN3_C_16 SATA_RXP3_C_16

C

C427 0.01U_0402_25V7K16inch@ C427 0.01U_0402_25V7K16inch@

1 2

C426 0.01U_0402_25V7K16inch@ C426 0.01U_0402_25V7K16inch@

1 2

C545 0.01U_0402_25V7K16inch@ C545 0.01U_0402_25V7K16inch@

1 2

C544 0.01U_0402_25V7K16inch@ C544 0.01U_0402_25V7K16inch@

1 2

+5VS

C425 0.01U_0402_25V7K17inch@ C425 0.01U_0402_25V7K17inch@

1 2

C424 0.01U_0402_25V7K17inch@ C424 0.01U_0402_25V7K17inch@

1 2

C519 0.01U_0402_25V7K17inch@ C519 0.01U_0402_25V7K17inch@

1 2

C518 0.01U_0402_25V7K17inch@ C518 0.01U_0402_25V7K17inch@

1 2

SATA_STX_DRX_P3

SATA_STX_DRX_N3

SATA_RXN3_C

SATA_RXP3_C

SATA_RXP3_C 22

SATA_RXN3_C 22

SATA_STX_DRX_N3 22 SATA_STX_DRX_P3 22

D

+5VS

1

2

1.1A

1

C415

C414

C414 10U_0805_10V4Z

10U_0805_10V4Z

C415 10U_0805_10V4Z

10U_0805_10V4Z

2

Place component's closely ODD CONN.

1

@

@ C416

C416 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

E

1

C417

0.1U_0402_16V7K

2

1

C418

0.1U_0402_16V7K

2

< eSATA/USB >

SLP_CHG_M322 SLP_CHG_M422

USB20_P2_R_U USB20_P2_S_O USB20_N2_R_U

+USB_VCCB

3 3

4 4

Mode 3

Mode 4

C872 0.1U_0402_16V4Z@C872 0.1U_0402_16V4Z@

USB20_P2_R_U USB20_N2_R_U

USB20_P221 USB20_N221

USB20_P2 USB20_N2

SLP_CHG_M3

HIGH LOW HIGH

10/22 Add for USB Sleep & Charge M3/M4

@

U47

1

1OE#

4

2OE#

10

3OE#

13

4OE#

2

1A

5

2A

9

3A

12

4A

14

2

1

VCC

SN74CBT3125CPWR_TSSOP14P

U48

@ U48

@

1

1D+

2

1D-

3

2D+

4

2DGND5OE#

TS3USB221RSER_QFN10_2x1P5~D

R97 0_0402_5%R97 0_0402_5%

1 2

R98 0_0402_5%R98 0_0402_5%

1 2

GND

3

1B

6

2B

8

3B

11

4B

7

10

VCC

9

S

8

D+

7

D-

6

SLP_CHG_M4

LOW

A

+USB_VCCB +USB_VCCB

12

R960

@ R960

@

75K_0402_1%

USB20_N2_S_O

R962 100_0402_5%@R962 100_0402_5%@

1 2

+3VALW

@

C873 0.1U_0402_16V4Z

1 2 SLP_CHG# USB20_P2_R USB20_N2_R

12

R963

@ R963

@

51K_0402_1%

SLP_CHG# 22

Unmount this

USB20_P2_R USB20_N2_R

Mount this to by pass USB switch

SLP_CHG#

LOW

HIGH

FUNCTION

D=1D D=2D

B

12

R961

@ R961

@

43K_0402_1%

12

R964

@ R964

@

51K_0402_1%

USB_CHG_EN#33

Reserve for EMI request

R96 0_0402_5%

@

1 2

L46

USB20_P2_R USB20_P2_R_S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

L46

4

1

WCM-2012-900T_0805

R95 0_0402_5%@R95 0_0402_5%@

C

3

USB20_N2_R_SUSB20_N2_R

2

SATA_STX_DRX_P222

1 2

2008-09-25 2009-09-25

SATA_STX_DRX_N222

SATA_RXN2_C22 SATA_RXP2_C22

Compal Secret Data

Deciphered Date

+5VALW

USB20_N2_R_S USB20_P2_R_S

C520 0.01U_0402_25V7KC520 0.01U_0402_25V7K

1 2

C521 0.01U_0402_25V7KC521 0.01U_0402_25V7K

1 2

C361 0.01U_0402_25V7KC361 0.01U_0402_25V7K C357 0.01U_0402_25V7KC357 0.01U_0402_25V7K

D

D15

@D15

@ 1

PJDLC05_SOT23-3

12 12

+USB_VCCB

2A

U19

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

EN

RT9715BGS_SO8

W=60mils

C367 4.7U_0805_10V4Z@C367 4.7U_0805_10V4Z@

8 7 6 5

FLG

1 2

R584 0_0402_5%R584 0_0402_5%

1 2

eSATA/USB Conn

+USB_VCCB

W=60mils

1

+

2 3

Title

Size Document Number Rev

Date: Sheet

2

220U 6.3V M 6.3X5.7 LESR15M

SATA_TXP2 SATA_TXN2

SATA_RXN2 SATA_RXP2

Compal Electronics, Inc.

Schematic, M/B LA-5331P

C350

10 11

1 2 3 4

5 6 7 8 9

JESATA

VBUS DD+ GND

GND A+ AGND BB+ GND

FOX_3Q318111@

1

C352

0.1U_0402_16V7K

2

USB

ESATA

SHIELD SHIELD SHIELD SHIELD

401716

E

12 13 14 15

USB_OC#2 21,33

1

C351

C351 1000P_0402_50V7K

1000P_0402_50V7K

2

of

25 54Tuesday, February 23, 2010

CCustom

A

Place Close to Chip

CL9 0.1U_0402_16V7KCL9 0.1U_0402_16V7K

PCIE_PTX_C_IRX_P311

PCIE_PTX_C_IRX_N311 PCIE_ITX_C_PRX_P311 PCIE_ITX_C_PRX_N311

CLK_PCIE_LAN16 CLK_PCIE_LAN#16

1 1

+3V_LAN

1 2

+3VS

12

RL5

RL5 1K_0402_1%

1K_0402_1%

ISOLATEB

2 2

RL6

RL6 15K_0402_5%

15K_0402_5%

CLKREQ_LAN16

RL4

@RL4

@

10K_0402_5%

PLT_RST#12,15,20,27,32,33,36

LAN_WAKE_R#33

LAN_WAKE_R#

1 2

CL8 0.1U_0402_16V7KCL8 0.1U_0402_16V7K

1 2

RL3

2.49K_0402_1%

1 2

PCIE_PTX_IRX_P3 PCIE_PTX_IRX_N3

LAN_WAKE_R# ISOLATEB

LAN_X1 LAN_X2

27P_0402_50V8J

B

UL2

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_M

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKXTAL1

42

CKXTAL2

23

NC

24

NC

7

GND

14

GND

31

GND

47

GND

22

GNDTX

RTL8103EL-GR_LQFP48_7X7

1

CL17

2

LED2/EEDI/AUX

RTL8103EL-GR

YL1

12

25MHz_20pF_6X25000017

LED3/EEDO

LED1/EESK

EECS

LED0

MDIP0 MDIN0 MDIP1 MDIN1

VCTRL12A

VDDTX DVDD12 DVDD12 DVDD12 DVDD12

VCTRL12D

VDD33 VDD33

AVDD33

LAN_X2LAN_X1

33 34 35 32

38 2

3 5 6 8

NC

9

NC

11

NC

12

NC

4

NC

48 19

30 36 13 10

39

NC

44

NC

45 29

37 1

40

NC

43

NC

1

2

LAN_DO LAN_DI LAN_SK_LAN_LINK# LAN_CS

LAN_ACTIVITY# LAN_MDI0+

LAN_MDI0LAN_MDI1+ LAN_MDI1-

VCTRL12

CL18

CL18 27P_0402_50V8J

27P_0402_50V8J

C

RL1 3.6K_0402_5%RL1 3.6K_0402_5%

1 2

RL2 1K_0402_5%RL2 1K_0402_5%

+EVDD12 +LAN_VDD12

+LAN_VDD12 +3V_LAN

12

T25 PADT25 PAD +3V_LAN

D

Close to Pin10,13,30,36

2

CL2

0.1U_0402_16V4Z

1

2

CL3

0.1U_0402_16V4Z

1

Close to Pin1,37,29

2

CL10

0.1U_0402_16V4Z

1

VCTRL12

E

2

CL4

0.1U_0402_16V4Z

1

Close to Pin45

Close to Pin19

2

CL13

CL13 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

CL11

0.1U_0402_16V4Z

1

Close to Pin48

1

CL6

@

10U_0805_10V4Z

2

+LAN_VDD12

2

1

+LAN_VDD12

2

1

+EVDD12

2

1

+3V_LAN

2

1

2

1

CL5

0.1U_0402_16V4Z

CL15

0.1U_0402_16V4Z

CL14

CL14 1U_0402_6.3V4Z

1U_0402_6.3V4Z

CL12

0.1U_0402_16V4Z

CL7

0.1U_0402_16V4Z

Place these components colsed to LAN chip

CL20

0.01U_0402_25V7K

12

CL21

0.01U_0402_25V7K

12

Add RL11, RL12 for customer request Change RL7, RL10 from 300 to 150

3 3

4 4

LAN_ACTIVITY#

+3V_LAN

LAN_SK_LAN_LINK#

+3V_LAN

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

12 12

A

UL3

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

LF-H1201P-2

CL19

68P_0402_50V8J

RL7

RL7 150_0402_1%

150_0402_1% RL11

RL11 150_0402_1%

150_0402_1%

CL22

68P_0402_50V8J

RL10

RL10 150_0402_1%

150_0402_1% RL12

RL12 150_0402_1%

150_0402_1%

RJ45_GND LANGND

1 2

16

TX+

15

TX-

14

CT

13

NC

12

NC

11

CT

10

RX+

9

2

1

2

1

CL23

CL23 1000P_1808_3KV7K

1000P_1808_3KV7K

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI1+ RJ45_MIDI1-

RJ45_MIDI1-

RJ45_MIDI1+ RJ45_MIDI0RJ45_MIDI0+

< LAN Conn >

JLAN

12

Yellow LED-

11

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

TYCO_2068888-1_12P-T@

1

CL24

0.1U_0402_16V4Z

2

B

10/21 Add CL26, CL27 for customer request

CL26

CL26 1000P_0402_50V7K

1000P_0402_50V7K

1 2

CL27

CL27 1000P_0402_50V7K

1000P_0402_50V7K

1 2

SHLD2 SHLD1

1

CL25

4.7U_0603_6.3V6K

2

RL8

RL8 75_0402_1%

75_0402_1%

1 2

RL9

RL9 75_0402_1%

75_0402_1%

1 2

14 13

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

RJ45_GND

C

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

26 54Tuesday, February 23, 2010

E

of

C

A

B

C

D

E

< PCIe Mini Card for WLAN >

WLAN@

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

JWLAN

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND1

FOX_AS0B226-S40N-7F@

+3VS

1

CM17

0.01U_0402_25V7K

2

+1.5VS

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

GND2

WLAN@

+3VS

PLT_RST#

SMB_CK_CLK1 SMB_CK_DAT1

USB20_N8 USB20_P8

1

CM18

0.1U_0402_16V4Z

2

1

CM19

WLAN@

4.7U_0805_10V4Z

2

WL_OFF# 33

PLT_RST# 12,15,20,26,32,33,36

SMB_CK_CLK1 21 SMB_CK_DAT1 21

USB20_N8 21 USB20_P8 21

+1.5VS

1

CM20

WLAN@

0.01U_0402_25V7K

2

1 1

E51_TXD33 E51_RXD33

2 2

1

CM21

WLAN@

0.1U_0402_16V4Z

2

CLKREQ_MCARD2#16

CLK_PCIE_MCARD2#16 CLK_PCIE_MCARD216

PCIE_PTX_C_IRX_N211 PCIE_PTX_C_IRX_P211

PCIE_ITX_C_PRX_N211

PCIE_ITX_C_PRX_P211

RM6 0_0402_5%RM6 0_0402_5%

E51_RXD E51_RXD_R

1 2

RM7 0_0402_5%RM7 0_0402_5%

1 2

12

RM8

RM8 100K_0402_5%

100K_0402_5%

WLAN@

+3VS

1

CM22

4.7U_0805_10V4Z

2

E51_TXD_RE51_TXD

UN1

12

1.5Vin

14

+3VALW

RN1 100K_0402_5%EXPCARD@ RN1 100K_0402_5%EXPCARD@

1 2

3 3

RCLKEN

4 4

+3VS +3VS +3VS

12

RN5

@ RN5

@

10K_0402_5%

CLKREQ#

13

D

@

2

G

Q21

G

Q21 2N7002_SOT23-3

2N7002_SOT23-3

S

< Reserve for test >

EXPCARD@ RN6

EXPCARD@

1 2

A

@ RN4

@

RN6 0_0402_5%

0_0402_5%

12

RN4 10K_0402_5%

10K_0402_5%

CP_USB#

1

CN7

@

0.1U_0402_16V4Z

2

5

@

2

B

1

A

CLKREQ_NCARD#CLKREQ#

CLKREQ_NCARD#

4

Vcc

Y

G

UN2

UN2 NC7SZ32P5X_NL_SC70-5

NC7SZ32P5X_NL_SC70-5

3

CLKREQ_NCARD# 16

B

EXP_CPPE#21 CLK_PCIE_NCARD#16 CLK_PCIE_NCARD16

PCIE_PTX_C_IRX_N011 PCIE_PTX_C_IRX_P011

PCIE_ITX_C_PRX_N011

PCIE_ITX_C_PRX_P011

SMB_CK_CLK09,10,16,21

SMB_CK_DAT09,10,16,21

+1.5VS_CARD

+3VALW_CARD

+3VS_CARD

+3VS +3VS_CARD

+3VALW

PLT_RST#

SYSON33,35,50

SUSP#29,33,35,47,49,50,52

USB20_N521 USB20_P521

EC_SWI_R#21,33

/

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

EXP_CPPE# CP_USB# RCLKEN

CP_USB#

SMB_CK_CLK0 SMB_CK_DAT0

EC_SWI_R# PERST#

CLKREQ# EXP_CPPE#

C

1.5Vin

2

3.3Vin

4

3.3Vin AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

TPS2231MRGPR-2_TQFN20_4x4EXPCARD@

1.5Vout

3.3Vout

PERST#

Thermal_Pad

JEXP

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_130812-3_LT

SANTA_130812-3_LT @

@

2008-09-25 2009-09-25

60mils

11 13

40mils

3 5

40mils

15 19

OC#

8 16

NC

7

GND

21

31

GND

32

GND

29

GND

30

GND

Compal Secret Data

Deciphered Date

PERST#

+1.5VS_CARD+1.5VS

+3VALW_CARD

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

+1.5VS_CARD

1

CN5

EXPCARD@

CN5 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS_CARD

1

CN3

CN3 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VALW_CARD

1

CN1

CN1 10U_0805_10V4Z

10U_0805_10V4Z

2

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

Imax = 0.75A

EXPCARD@

Imax = 1.35A

EXPCARD@

Imax = 0.275A

EXPCARD@

E

1

2

1

2

1

2

27 54Tuesday, February 23, 2010

CN6

0.1U_0402_16V4Z

CN4

0.1U_0402_16V4Z

CN2

0.1U_0402_16V4Z

of

C

5

CARD@

+3VS_CR

1

2

RC2

RC2 0_0603_5%CARD@

0_0603_5%CARD@

+3VS

D D

+3VALW

1 2

RC4

RC4 0_0603_5%@

0_0603_5%@

confirm that whether can be removed

+3VS_CR

RC8

CARD@

100K_0402_5%

1 2

RST# RST#_R

1

CC8

CARD@

1U_0402_6.3V4Z

2

1

CC13

C C

CC13

0.1U_0402_16V4Z@

2

CARD@

12

RC10

RC10 0_0402_5%CARD@

0_0402_5%CARD@

RC16

RC16 0_0402_5%

0_0402_5%

MODE SEL

CC1

0.1U_0402_16V4Z

4

+VCC_3IN1

USB20_N421

USB20_P421

RC14

6.19K_0402_1%

CARD@

1 2

1

2

CARD@

CC5

CC5 1U_0402_6.3V4Z

1U_0402_6.3V4Z

CARD@

1 3 7

9 11 33

8 44 45 47 48

4

5 14

2 12

32

6 46

3

UC2

AV_PLL NC NC CARD_3V3 D3V3 D3V3

3V3_IN RST# MODE_SEL XTLO XTLI

DM DP GPIO0

RREF DGND

DGND AGND

AGND

RTS5159-VDD-GRCARD@

RC7

RC7 0_0402_5%CARD@

0_0402_5%CARD@

12

VREG

MS_D4

XD_CLE_SP19 XD_CE#_SP18

XD_ALE_SP17

SD_DAT2/XD_RE#_SP16

SD_DAT3/XD_WE#_SP15

SD_DAT4/XD_WP#/MS_D7_SP13

SD_DAT5/XD_D0/MS_D6_SP12 SD_CLK/XD_D1/MS_CLK_SP11 SD_DAT6/XD_D7/MS_D3_SP10

XD_RDY_SP14

MS_INS#_SP9 SD_DAT7/XD_D2/MS_D2_SP8 SD_DAT0/XD_D6/MS_D0_SP7 SD_DAT1/XD_D3/MS_D1_SP6

XD_D5_SP5

XD_D4/SD_DAT1_SP4

SD_CD#_SP3

SD_WP_SP2

XD_CD#_SP1

EEDI

XTAL_CTR

MS_D5

EEDO EECS EESK

SD_CMD

10 22 30

NC

43 42 41 40 39 38 37 35 34 31 29 28 27 26 25 23 21 20 19 18

13 24

15 16 17 36

SD_DATA2 SD_DATA3

SD_MS_CLK MS_DATA3_SD_DATA6 MSCD# MS_DATA2_SD_DATA7 SD_MS_DATA0 MS_DATA1 MSBS SD_DATA1 SDCD# SDWP#

XTAL_CTR

SDCMD

CC6

0.1U_0402_16V4ZCARD@

12

CC4

0.1U_0402_16V4ZCARD@

12

+3VS_CR

RST#_R MODE SEL XTLO XTLI

USB20_N4 USB20_P4 CR_LED#

RC15

RC15 0_0402_5%

0_0402_5%

1 2

CARD@

2

1

CC7

CC7 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1 2

RC11

RC11 22_0402_5%CARD@

22_0402_5%CARD@ RC12

RC12 22_0402_5%CARD@

22_0402_5%CARD@

SDCLK

MSCLK

1 2

RC18

RC18 10_0402_5%@

10_0402_5%@ RC17

RC17 10_0402_5%@

10_0402_5%@

1

CC15

CC15 10P_0402_50V8J@

10P_0402_50V8J@ CC14

CC14 10P_0402_50V8J@

10P_0402_50V8J@

< Card Reader LED >

+3VS

12

RC13

CARD@

B B

RC13 120_0402_5%

120_0402_5%

21

DC1

DC1 HT-110UYG-CT_YEL/GRNCARD@

HT-110UYG-CT_YEL/GRNCARD@

CR_LED#

Vf=2.0V(typ),2.4V(max)

CR_LED: Low when card reader is being accessed.

< 3 in 1 Card Reader >

JREAD

SD-WP SD-DAT1 SD-DAT0

SD-GND

MS-GND

MS-BS

SD-CLK MS-DAT1 MS-DAT0

SD-VCC

MS-DAT2

SD-GND

MS-INS

MS-DAT3

SD-CMD

MS-SCLK

MS-VCC

SD-DAT3

MS-GND

22

SD-DAT2

GND1

23

SD-CD

GND2

TAITW_R009-125-LR_RV@

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

SDWP# SD_DATA1 SD_MS_DATA0

MSBS SDCLK MS_DATA1 SD_MS_DATA0

MS_DATA2_SD_DATA7 MSCD#

MS_DATA3_SD_DATA6 SDCMD MSCLK

SD_DATA3 SD_DATA2

SDCD#

CARD@

1

CC11

0.1U_0402_16V4Z

2

+VCC_3IN1

CARD@

1

CC10

CC10 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+3VS_CR

Cost-down option

1 2

CC9

CC9 6P_0402_50V8D@

6P_0402_50V8D@

CC12

CC12 6P_0402_50V8D@

6P_0402_50V8D@

5

RC19

RC19 0_0402_5%CARD@

0_0402_5%CARD@

RC20

RC20 0_0402_5%CARD@

0_0402_5%CARD@

12

@ YC1

@

XTLI

XTAL_CTR

XTLI

YC1 12MHZ_16P_6X12000012

12MHZ_16P_6X12000012

XTLO

RNCC

0

NC NC

NC 10K

10K

4

USB AUTO DE-LINK

MS FORMATTER

YES

47P

YES

NC

680P

YES 180P 680P

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008-09-25 2009-09-25

YES

Compal Secret Data

Deciphered Date

Description

Recommended

Compatible with RTS5158E

LED ON LED ON

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

28 54Tuesday, February 23, 2010

1

of

C

< 48MHz >

CLK_48M_CR16

< 12MHz >

A A

A

+5VALW

UA1

2

CA9

@

1U_0402_6.3V4Z

1

1 1

2 2

SUSP#27,33,35,47,49,50,52

UA1

1

VIN

2

GND

3

SHDN#

APL5151-475BC-TRL_SOT23-5@

VOUT

5

4

BP

4.75V

HDA_BITCLK_CODEC21

+5VS

2

J2

@ J2

@

2

JUMP_43X39

1

CA11

@CA11

@

12

0.22U_0402_10V4Z

< EMI require >

HDA_RST#_CODEC21

+VDDA

2

CA10

@ CA10

@

1

1U_0402_6.3V4Z

@

+3VS

@ RA37

@

B

RA31

RA31 10_0402_5%

10_0402_5%

1 2 1

CA34

CA34 10P_0402_50V8J

10P_0402_50V8J

2

12

RA37

4.7K_0402_5%

2

CA42

0.01U_0402_25V7K

1

RA3

RA3 0_0603_5%

0_0603_5%

12

1

CA3

CA3 10U_0805_10V4Z

10U_0805_10V4Z

2

Int. Mic

Ext. Mic

GPIO0-->SPK_SEL HIGH: HARMAN LOW: NO-BRAND

MIC1_C_L30 MIC1_C_R30

MIC2_L30 MIC2_R30

1

CA4

CA4 10U_0805_10V4Z

10U_0805_10V4Z

2

HDA_SDOUT_CODEC21

HDA_SYNC_CODEC21

C

+AVDD +3VS_DVDD

40mil

1

CA5

0.1U_0402_16V4Z

2

HDA_SDIN021

SPK_SEL22

SENSE_A SENSE_B

MUTE#30

MUTE#

1

CA6

0.1U_0402_16V4Z

2

12

12 12

RA7

RA7 33_0402_5%

33_0402_5%

12

RA4 0_0402_5%RA4 0_0402_5%

1 2

12

C178

C178 33P_0402_50V8K@

33P_0402_50V8K@

Reserve for EMI request

CA45100P_0402_50V8J CA45100P_0402_50V8J

CA46100P_0402_50V8J CA46100P_0402_50V8J

CA47100P_0402_50V8J CA47100P_0402_50V8J

CA48100P_0402_50V8J CA48100P_0402_50V8J CA14100P_0402_50V8J CA14100P_0402_50V8J

HDA_SDIN0_R

1

CA53

CA53 100P_0402_50V8J

100P_0402_50V8J

2

UA2

14

LINE2-L

15

LINE2-R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

21

MIC1_L

22

MIC1_R

MONO_IN

12

BEEP_IN

6

BITCLK

5

SDATA_OUT

8

SDATA_IN

11

RESET#

10

SYNC

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

43

NC

4

DVSS

7

DVSS

ALC272-GR_LQFP48

DGND

ALC272-GR_LQFP48

need to re-link ALC272

38

AVDD125AVDD2

9

1

DVDD

DVDD_IO

MONO_OUT

DMIC_CLK1/2

DMIC_CLK3/4 LINE2_VREFO LINE1_VREFO

MIC1_VREFO

MIC2_VREFO

D

LOUT1_L LOUT1_R LOUT2_L LOUT2_R SPDIFO1

SPDIFO2 HPOUT_L HPOUT_R

CPVREF

VREF

JDREF

CBN CBP

AVSS1 AVSS2

30mil

1

CA1

0.1U_0402_16V4Z

2

1

CA7

0.1U_0402_16V4Z

2

35 36 39 41 48 45 33 32

37

46 44 20 18 28 19 31 27 40

CA17

30 29

26 42

AGND

1

CA2

CA2 10U_0805_10V4Z

10U_0805_10V4Z

2

1

CA8

CA8 10U_0805_10V4Z

10U_0805_10V4Z

2

HPL

RA5 63.4_0402_1%RA5 63.4_0402_1%

1 2

HPR

RA6 63.4_0402_1%RA6 63.4_0402_1%

1 2

10mil 10mil

1 2

RA10

20K_0402_1%

AC_VREF AC_JDREF

2.2U_0603_6.3V6K

1

CA52

CA52 100P_0402_50V8J

100P_0402_50V8J

2

CA16

2.2U_0603_6.3V6K

1

2

1 2

RA1

RA1 0_0603_5%

0_0603_5%

12

AMP_SPK_L 30

AMP_SPK_R 30

HP_L 30 HP_R 30

1

CA18

CA18 10U_0805_10V4Z

10U_0805_10V4Z

2

CA49

CA49 100P_0402_50V8J

100P_0402_50V8J

E

+3VS

12

CA51 1U_0402_6.3V4ZCA51 1U_0402_6.3V4Z

12

CA12 1U_0402_6.3V4ZCA12 1U_0402_6.3V4Z

1

CA19

0.1U_0402_16V4Z

2

+MIC1_VREFO +MIC2_VREFO

1

CA50

2

100P_0402_50V8J

A2 version

CA54 0.1U_0603_50V7KCA54 0.1U_0603_50V7K

1 2

CA55 0.1U_0603_50V7KCA55 0.1U_0603_50V7K

3 3

< SENSE_A & SENSE_B, place close to chip >

RA18

RA18 20K_0402_1%

20K_0402_1%

MIC_SENSE30

NBA_PLUG30

1 2

RA16

5.1K_0402_1%

5.1K_0402_1% RA17

RA17 20K_0402_1%MIC@

20K_0402_1%MIC@

ImpedanceSense Pin

39.2K

SENSE A

4 4

SENSE B

20K 10K PORT-C (PIN 23, 24)

5.1K

39.2K 20K 10K

5.1K

A

SENSE_A

SENSE_B

Codec Signals

PORT-A (PIN 39, 41) PORT-B (PIN 21, 22)

PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-H (PIN 37) PORT-I (PIN 32, 33)

Function

Ext. MIC FM tuner SPK out

Int. MIC

Headphone out

< MONO_IN SOURCE >

EC Beep

PCI Beep

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

EC_BEEP33

SB_SPKR21

Compal Secret Data

1 2

CA56 0.1U_0603_50V7KCA56 0.1U_0603_50V7K

1 2

CA57 0.1U_0603_50V7KCA57 0.1U_0603_50V7K

1 2

RA15 0_0603_5%RA15 0_0603_5%

1 2

Deciphered Date

D

RA8

RA8 47K_0402_5%

47K_0402_5% RA9

RA9 47K_0402_5%

47K_0402_5%

CA15

0.1U_0402_16V4Z

1 2

12

RA11

RA11 10K_0402_5%

10K_0402_5%

Title

Size Document Number Rev

Date: Sheet

MONO_IN

1

CA20

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

E

CCustom

of

29 54Tuesday, February 23, 2010

A

< TPA6017 Medium Range Amplifier >

1 1

CA29

0.033U_0402_25V7K

CA30

0.033U_0402_25V7K

6

0.033U_0402_25V7K

CA31

0.033U_0402_25V7K

CA32

0.033U_0402_25V7K

Rin(ohm)

90K 70K 45K 25K

AMP_SPK_R29

AMP_SPK_L29

2 2

GAIN0 GAIN1 Av(db)

0

0 01 1 11

10

0

15.6

21.6

LINE_C_OUTR

LINE_C_OUTL

MUTE#29

7

17

9

5

19

UA3

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

21

GND5

20

+5VS

16

15

6

VDD

PVDD1

PVDD2

GND41GND311GND213GND1

TPA6017A2_TSSOP20

< Volume Control >

3 3

+3VS

12

RA33

RA33 10K_0402_5%

10K_0402_5%

2

1

3

A

COM

5

DIP

A

B

DIP

4

SW2

SW_XRE094_3P

4 4

12

RA34

RA34 10K_0402_5%

10K_0402_5%

1 2

0.01U_0402_25V7K

RA35

RA35 10K_0402_5%

10K_0402_5%

RA36

RA36 10K_0402_5%

10K_0402_5%

CA37

1

2

+3VS

1

CA38

0.01U_0402_25V7K

2

GAIN0

3

GAIN1

18

ROUT+

14

ROUT-

4

LOUT+

8

LOUT-

12

NC

10

BYPASS

1 2

1

5

P

NC

A2Y

G

74LVC1G14GW_SOT353-5

3

B

1

CA23

CA23 10U_0805_10V4Z

10U_0805_10V4Z

2

SPKR+

SPKR-

SPKL+

SPKL-

Keep 10 mil width

AMP_BYPASS

CA35

0.1U_0402_16V4Z

UA4

4

B

1

CA24

0.1U_0402_16V4Z

2

CA33

0.47U_0603_10V7K

1

+3VS

12

RA32

RA32 100K_0402_5%

100K_0402_5%

1

CA36

0.1U_0402_16V4Z

2

1

CA25

0.1U_0402_16V4Z

2

10 dB

12

RA27

RA27 100K_0402_5%

100K_0402_5%

12

RA29

@ RA29

@

100K_0402_5%

UA5

1

CD1#

VCC

2

D1

CD2#

3

CP1

D2

4

SD1#

CP2

5

Q1

SD2#

6

Q1#

Q2

7

GND

Q2#

74LCX74MTC_TSSOP14

ENCODER_DIR 33 ENCODER_PULSE 33

C

D

< Ext. Mic >

RA21

RA21 1K_0402_5%

1K_0402_5%

12

1K_0402_5%

12

RA22

MIC@

MIC@ RA25

RA25 1K_0402_5%

1K_0402_5%

12

1K_0402_5%

12

RA26

RA26 MIC@

MIC@

DA4

DA4 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

1

DA5

DA5 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

@

+5VS

12

RA28

RA28 100K_0402_5%

100K_0402_5%

12

RA30

RA30 100K_0402_5%

100K_0402_5%

MIC1_C_L29

MIC1_C_R29

CA21 4.7U_0805_10V4ZCA21 4.7U_0805_10V4Z CA22 4.7U_0805_10V4ZCA22 4.7U_0805_10V4Z

< Int. Mic >

MIC2_L29

MIC2_R29

< Speaker Connector >

SPKL+ SPKLSPKR+ SPKR-

12 12

MIC@

MIC@ CA26

CA26 1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

1U_0402_6.3V4Z

12

CA28

CA28 MIC@

MIC@

LA3 FBMA-L11-160808-800LMT_0603LA3 FBMA-L11-160808-800LMT_0603

1 2

LA4 FBMA-L11-160808-800LMT_0603LA4 FBMA-L11-160808-800LMT_0603

1 2

LA5 FBMA-L11-160808-800LMT_0603LA5 FBMA-L11-160808-800LMT_0603

1 2

LA6 FBMA-L11-160808-800LMT_0603LA6 FBMA-L11-160808-800LMT_0603

1 2

< HeadPhone JACK >

NBA_PLUG29

HP_R29 HP_L29

+3VS

14 13 12 11 10 09

1

CA39

08

CA39

0.1U_0402_16V4Z

2

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

< Ext.MIC/LINE IN JACK >

MIC_SENSE29

MIC1_R

2008-09-25 2009-09-25

C

LA9 KC FBM-L11-160808-121LMT 0603LA9 KC FBM-L11-160808-121LMT 0603 LA10 KC FBM-L11-160808-121LMT 0603LA10 KC FBM-L11-160808-121LMT 0603

Compal Secret Data

LA7 KC FBM-L11-160808-121LMT 0603LA7 KC FBM-L11-160808-121LMT 0603

1 2

LA8 KC FBM-L11-160808-121LMT 0603LA8 KC FBM-L11-160808-121LMT 0603

1 2

1 2 1 2

1

DA7

@DA7

@

PACDN042Y3R_SOT23-3

Deciphered Date

D

CA44 0.1U_0402_16V4ZCA44 0.1U_0402_16V4Z

3 2

RA20

4.7K_0402_5%

12

RA23

4.7K_0402_5%

12

CA27 220P_0402_50V7KCA27 220P_0402_50V7K

1 2

2 3

SPK_L1 SPK_L2 SPK_R1

SPK_R2 3 2

1

CA43 0.1U_0402_16V4ZCA43 0.1U_0402_16V4Z

< EMI require >

2

1

DA6

@DA6

@

PACDN042Y3R_SOT23-3

1

< EMI require >

2

1

@

CA40

CA40 100P_0402_50V8J

100P_0402_50V8J

2

Title

Size Document Number Rev

Date: Sheet

E

DA1

DA1 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

DA2

DA2 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

RA24 4.7K_0402_5%MIC@ RA24 4.7K_0402_5%MIC@

1 2 3 4

3 2

Schematic, M/B LA-5331P

12

close to JMIC

@

@ RA38

RA38 0_0402_5%

0_0402_5%

1 2

close to JMIC

DA3

DA3 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

3 2

JMIC

@JMIC

@

INT_MIC

1

NC1

2

NC2

ACES_85204-0200N

5 4 3

6 2 1

401716

ACES_85204-0200N

JLINE

FOX_JA6333L-B3T0-7F@

E

5 4 3

6 2 1

JEXMIC

FOX_JA6333L-B3T0-7F@

J3

@J3

@

2

112

JUMP_43X39

close to Codec

JSPK

1 2 3 4

ACES_85204-0400N@

HP_R_L HP_L_L

MIC1_L_R MIC1_L_LMIC1_L

1

@

CA41

CA41 100P_0402_50V8J

100P_0402_50V8J

2

Compal Electronics, Inc.

MIC1_L MIC1_R

1

3 4

30 54Tuesday, February 23, 2010

+MIC1_VREFO

+MIC2_VREFO

INT_MIC_R 18

of

CCustom

A

< USB Right-side Board, USB port 0,1 >

B

C

D

E

< BlueTooth Interface, USB port6 >

+5VALW +USB_VCCA

1.4A

U25

1

GND

VOUT

2

VOUT

VIN

1 1

USB_EN#33

USB_EN#

VIN3VOUT

4

EN

RT9715BGS_SO8

FLG

W=60mils

C438 4.7U_0805_10V4ZC438 4.7U_0805_10V4Z

8 7 6

R422 0_0402_5%R422 0_0402_5%

1 2

5

1 2

USB_OC#0 21,33

BT_PWR#33

< Reserve for EMI request >

R107

@R107

@

0_0402_5%

1 2

L50

USB20_N021

USB20_P021

2 2

USB20_N121

USB20_P121

1

4

WCM-2012-900T_0805

1 2

L51

1

4

WCM-2012-900T_0805

1 2

0_0402_5%

2

3

R108

@R108

@

0_0402_5%

R109

@R109

@

0_0402_5%

2

3

R110

@R110

@

0_0402_5%

+USB_VCCA

W=60mils

USB20_N0_R USB20_P0_R

USB20_N1_R USB20_P1_R

JUSBB

1

2

3

4

5

6

7

8

9

10

11

12

13

GND

14

GND

E&T_6905-E12N-00R@

< Bluetooth Connector >

BT_RST#33

1 2

BT@

R440

BT@ R440

BT@

0_0402_5%

+3VS

R432

R432 100K_0402_5%

100K_0402_5%

1 2

@

1 2

BT_RESET#

+BT_VCC

C480

0.1U_0402_16V4Z

R441

R441 47K_0402_5%BT@

47K_0402_5%BT@

BT@

(MAX=200mA)

1

C483

4.7U_0805_10V4Z

2

C481

0.1U_0402_16V7K

1

C196

0.01U_0402_25V7K

2

+3VS

C482

BT@

0.1U_0402_16V4Z

S

BT@

G

2

Q25

D

AO3413_SOT23

1 3

0.1U_0402_16V4Z

+BT_VCC

Inrush current = 0A

JBT

12

GND2

11

GND1

10

9

8

7

6

5

4

3

2

1

ACES_87213-1000G@

BT@

USB20_P6 USB20_N6

R437 0_0402_5%BT@ R437 0_0402_5%BT@

R438 4.7K_0402_5%@ R438 4.7K_0402_5%@

+3VS

C479

0.1U_0402_16V4Z

1 2

R439

BT@ R439

BT@

4.7K_0402_5%

1 2

USB20_P621 USB20_N621

BT_DET#22

3 3

< Finger Printer, USB port 7 >

C468

R119

R119 0_0603_5%FP@

0_0603_5%FP@

+3VS

4 4

USB20_N721 USB20_P721

A

1 2

USB20_N7 USB20_P7

@D19

@

1

D19

PJDLC05_SOT23-3

+3VS_FP

JFP

JFP 1 2 3 4

ACES_85201-04051

1 2

R118

R118 0_0603_5%

0_0603_5% FP@

FP@

ACES_85201-04051

2 3

C468

0.1U_0402_16V4ZFP@

1 2

5

3

GND

6

4

GND

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

31 54Tuesday, February 23, 2010

E

CCustom

of

A

< SPI Flash 8Mb*1 >

+3VL

1

C786

0.1U_0402_16V4Z

2

1 1

1

@

2

C607

C607 10P_0402_50V8C

10P_0402_50V8C

1

@

2

C608

C608 10P_0402_50V8C

10P_0402_50V8C

SPI_CS#33

SPI_CLK33

20mils

EC_SPICLK

< LPC Debug Port >

Please place the PAD under DDR DIMM.

+3VS

H1

R622

1 2

R622 0_0402_5%

0_0402_5%

7

8

9

10

DEBUG_PAD@H1DEBUG_PAD@

SERIRQ20,33

2 2

LPC_AD320,33

LPC_AD120,33

LPC_FRAME#20,33

SERIRQ

LPC_AD3

LPC_AD1

LPC_FRAME#

SPI_CS# EC_SPICLK

1 2

56

PLT_RST#

4

LPC_AD2

3

LPC_AD0

2

1

B

U46

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L8005M2C-15G

R518

R518 10_0402_5%

10_0402_5%

R634

R634 22_0402_5%

22_0402_5%

1 2 2

C639

C639 22P_0402_50V8J

22P_0402_50V8J

1

4

VSS

2

C606

C606 10P_0402_50V8C

10P_0402_50V8C

EC_SI_SPI_SO 33EC_SO_SPI_SI33

Q

1 2

PLT_RST# 12,15,20,26,27,33,36

LPC_AD2 20,33

LPC_AD0 20,33

CLK_PCI_SIO2 20,24

C

D

E

< MDC 1.5 Conn >

JMDC

1

HDA_SDOUT_MDC21

HDA_SYNC_MDC21

HDA_SDIN121

HDA_RST#_MDC21

R495 33_0402_5%MDC@ R495 33_0402_5%MDC@

1 2

HDA_SDOUT_MDC HDA_SYNC_MDC

HDA_SDIN1_MDC

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

1

MDC@

MDC@ C778

C778 1000P_0402_50V7K

1000P_0402_50V7K

2

GND13GND14GND15GND16GND17GND

+3VALW

1

2

RES0 RES1

3.3V GND3 GND4

IAC_BITCLK

ACES_88018-124GMDC@

ACES_88018-124GMDC@ 18

MDC@

MDC@ C779

C779

0.1U_0402_16V4Z

2

+3VALW

4 6

+3VALW

8 10 12

12

R496

@

10_0402_5%

2

C777

@

10P_0402_50V8J

1

MDC@

MDC@ C780

C780

4.7U_0805_10V4Z

2

HDA_BITCLK_MDC 21

< KEYBOARD CONN 16" >

JKB1

34

KSO16

33 32

KSO17

31

3 3

30 29

KSO2

28

KSO1

27

KSO0

26

KSO4

25

KSO3

24

KSO5

23

KSO14

22

KSO6

21

KSO7

20

KSO13

19

KSO8

18

KSO9

17

KSO10

16

KSO11

15

KSO12

14

KSO15

13

KSI7

12

KSI2

11

KSI3

10

KSI4

9

KSI0

8

KSI5

7

KSI6

6

KSI1

5 4 3 2 1

ACES_88170-3400@

4 4

KSI[0..7] KSO[0..17]

CAPS_LED# 33 NUM_LED# 33

KSI[0..7] 33,34 KSO[0..17] 33,34

A

R502

1 2

300_0402_5%

R509

300_0402_5%

12

1

C781

0.1U_0402_16V4Z

2

+3VS

1

C782

0.1U_0402_16V4Z

2

< For EMI >

1

C783

0.1U_0402_16V4Z

2

B

< KEYBOARD CONN 17" > < For EMI >

KSO2

C725 100P_0402_50V8JC725 100P_0402_50V8J

1 2

C717 100P_0402_50V8JC717 100P_0402_50V8J

1 2

C721 100P_0402_50V8JC721 100P_0402_50V8J

1 2

C609 100P_0402_50V8JC609 100P_0402_50V8J

1 2

C724 100P_0402_50V8JC724 100P_0402_50V8J

1 2

C728 100P_0402_50V8JC728 100P_0402_50V8J

1 2

C730 100P_0402_50V8JC730 100P_0402_50V8J

1 2

C715 100P_0402_50V8JC715 100P_0402_50V8J

1 2

C732 100P_0402_50V8JC732 100P_0402_50V8J

1 2

C733 100P_0402_50V8JC733 100P_0402_50V8J

1 2

C740 100P_0402_50V8JC740 100P_0402_50V8J

1 2

C737 100P_0402_50V8JC737 100P_0402_50V8J

1 2

C729 100P_0402_50V8JC729 100P_0402_50V8J

1 2

C738 100P_0402_50V8JC738 100P_0402_50V8J

1 2

C718 100P_0402_50V8JC718 100P_0402_50V8J

1 2

C736 100P_0402_50V8JC736 100P_0402_50V8J

1 2

C716 100P_0402_50V8JC716 100P_0402_50V8J

1 2

C741 100P_0402_50V8JC741 100P_0402_50V8J

1 2

C726 100P_0402_50V8JC726 100P_0402_50V8J

1 2

C723 100P_0402_50V8JC723 100P_0402_50V8J

1 2

C731 100P_0402_50V8JC731 100P_0402_50V8J

1 2

C739 100P_0402_50V8JC739 100P_0402_50V8J

1 2

C735 100P_0402_50V8JC735 100P_0402_50V8J

1 2

C734 100P_0402_50V8JC734 100P_0402_50V8J

1 2

C722 100P_0402_50V8JC722 100P_0402_50V8J

1 2

C714 100P_0402_50V8JC714 100P_0402_50V8J

1 2

C870 100P_0402_50V8JC870 100P_0402_50V8J

1 2

C871 100P_0402_50V8JC871 100P_0402_50V8J

1 2

Size Document Number Rev

Date: Sheet

+3VS

KSO1

JKB2

34

KSO16

33 32

KSO17

31 30 29

KSO2

28

KSO1

27

KSO0

26

KSO4

25

KSO3

24

KSO5

23

KSO14

22

KSO6

21

KSO7

20

KSO13

19

KSO8

18

KSO9

17

KSO10

16

KSO11

15

KSO12

14

KSO15

13

KSI7

12

KSI2

11

KSI3

10

KSI4

9

KSI0

8

KSI5

7

KSI6

6

KSI1

5 4

CAPS_LED#

3 2

NUM_LED#

1

ACES_88170-3400@

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

KSO0 KSO4 KSO3 KSO5

KSO14

KSO6 KSO7

KSO13

KSO8

KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 CAPS_LED# NUM_LED#

KSO16 KSO17

D

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

CCustom

of

32 54Tuesday, February 23, 2010

E

A

B

C

D

E

+3VL +3VL_EC

12

R545

@ R545

@

20M_0402_5%

+3VL_EC

+EC_AVCC

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# ECRST# EC_SCI# WL_BT_LED#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# LID_SW#

BT_PWR# FAN_SPEED1 E51_TXD

E51_RXD ON/OFFBTN# PWR_SUSP_LED# NUM_LED#

CRY1

CRY2

+3VL_EC

1

2

10 12

13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

L80 0_0603_5%L80 0_0603_5%

1 2

C805

0.1U_0402_16V4Z

1 1

EC_SMB_DA2

EC_SMB_CK2

EC_SMB_DA1

EC_SMB_CK1

2 2

CEC_INT#

TP_CLK

TP_DATA

SYSON

SUSP#

LID_SW#

ON/OFFBTN#

KSO1

KSO2

3 3

R330 2.2K_0402_5%R330 2.2K_0402_5%

1 2

R326 2.2K_0402_5%R326 2.2K_0402_5%

1 2

R70 2.2K_0402_5%R70 2.2K_0402_5%

1 2

R77 2.2K_0402_5%R77 2.2K_0402_5%

1 2

R563 100K_0402_5%R563 100K_0402_5%

R534 4.7K_0402_5%R534 4.7K_0402_5%

R535 4.7K_0402_5%R535 4.7K_0402_5%

R539 10K_0402_5%R539 10K_0402_5%

R536 10K_0402_5%R536 10K_0402_5%

R538 100K_0402_5%R538 100K_0402_5%

R513 100K_0402_5%R513 100K_0402_5%

R947 47K_0402_5%R947 47K_0402_5%

R948 47K_0402_5%R948 47K_0402_5%

12

1 2

12

+3VS

+3VL

+5VS

+3VALW

+3VL

Reserve for EMI request

CLK_PCI_EC20,24

+3VL

C810

@C810

@

15P_0402_50V8J

1 2

R533 47K_0402_5%R533 47K_0402_5%

1 2

C811 0.1U_0402_16V4ZC811 0.1U_0402_16V4Z

1 2

12

R530

@R530

@

33_0402_5%

KSI[0..7]32,34 KSO[0..17]32,34

Add for KB926D2 issue. Please refer to KB926D-AN1-100 for detail

1 2

Y7

2

NC

3

NC

32.768KHZ_12.5PF_Q13MC14610002

1 2

R560

R560 150K_0402_5%

150K_0402_5%

1 2

ACIN_D

4 4

2 1

D33

D33 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

C326

12

100P_0402_50V8J

+3VL

ACIN 22,34,45

GATEA2021 KB_RST#21

SERIRQ20,32

LPC_FRAME#20,32

LPC_AD320,32 LPC_AD220,32 LPC_AD120,32 LPC_AD020,32

PLT_RST#12,15,20,26,27,32,36

EC_SCI#21

WL_BT_LED#34

KSI[0..7] KSO[0..17]

EC_SMB_CK119,46 EC_SMB_DA119,46 EC_SMB_CK27,34,44 EC_SMB_DA27,34,44

PM_SLP_S3#21 PM_SLP_S5#21 EC_LID_OUT# 21 EC_SMI#21 LID_SW#34

BT_PWR#31

FAN_SPEED15 VLDT_EN35 E51_TXD27 E51_RXD27

ON/OFFBTN#34

PWR_SUSP_LED#34

NUM_LED#32

C813

C813 15P_0402_50V8J

15P_0402_50V8J

1

OSC

4

OSC

C815

C815 15P_0402_50V8J

15P_0402_50V8J

L25

L25 0_0603_5%

0_0603_5%

12

U33

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

LPC & MISC

LAD0 PCICLK

PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

6

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

1 2

1

C806

0.1U_0402_16V4Z

2

SM Bus

1 2

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

C816

0.1U_0402_16V4Z

L810_0603_5% L810_0603_5%

1

C807

C807 1000P_0402_50V7K

1000P_0402_50V7K

2

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

KB926QFD3_LQFP128_14X14

69

ECAGND

1

C808

0.1U_0402_16V4Z

2

INVT_PWM

21 23 26

ACOFF

27

BATT_TEMPA

63 64 65 66 75 76

68

EN_DFAN1

70

IREF

71

CHGVADJ

72

83 84

ENCODER_DIR

85

ENCODER_PULSE

86

TP_CLK

87

TP_DATA

88

BT_RST#

97

WOL_EN#

98

USB_OC#2

99 109

119 120 126 128

73

CEC_INT#

74

FSTCHG

89

BATT_FULL_LED#

90 91

BATT_LOW_LED#

92

PWR_ON_LED#

93

SYSON

95

VR_ON

121

ACIN_D

127

EC_RSMRST#

100 101 102

EC_SWI#

103

SB_PWRGD

104

BKOFF#

105

WL_OFF#

106 107 108

110

ENBKL

112

HDPLOC

114 115

SUSP#

116

PBTN_OUT#

117

LAN_WAKE#

118

C814 4.7U_0805_10V4ZC814 4.7U_0805_10V4Z

124

1

2

12

EC_SWI# EC_SWI_R#

LAN_WAKE_R# EC_SWI_R#

LAN_WAKE#

C809

C809 1000P_0402_50V7K

1000P_0402_50V7K

INVT_PWM 18 EC_BEEP 29

ACOFF 47

BATT_TEMPA 46

ADP_V 47

DAC_BRIG 18 EN_DFAN1 5 IREF 47 CHGVADJ 47

USB_CHG_EN# 25

USB_EN# 31 ENCODER_DIR 30 ENCODER_PULSE 30

TP_CLK 34

TP_DATA 34

BT_RST# 31

WOL_EN# 35

USB_OC#2 21,25 VGATE 51

EC_SI_SPI_SO 32 EC_SO_SPI_SI 32 SPI_CLK 32 SPI_CS# 32

CEC_INT# 19 FSTCHG 47 BATT_FULL_LED# 34 CAPS_LED# 32 BATT_LOW_LED# 34 PWR_ON_LED# 34

SYSON 27,35,50

EC_RSMRST# 21

EC_ON 34,35

SB_PWRGD 21,51 BKOFF# 18 WL_OFF# 27 HDPINT 34

HDPACT 34 ENBKL 37 HDPLOC 34 EC_THERM# 22

SUSP# 27,29,35,47,49,50,52

1 2

PBTN_OUT# 21

R33

@R33

@

0_0402_5%

R34

R34 0_0402_5%

0_0402_5%

R24

@R24

@

0_0402_5%

R35

R35 0_0402_5%

0_0402_5%

1 2

LAN_WAKE_R#LAN_WAKE#

C812

C812 100P_0402_50V8J

100P_0402_50V8J

R145

R145 100K_0402_5%

100K_0402_5% C154

C154

0.22U_0603_16V4Z

R541

R541 10K_0402_5%

10K_0402_5%

12

ECAGND

ADP_I 47

VR_ON 51

EC_SWI_R# 21,27

LAN_WAKE_R# 26

USB_OC#0 21,31

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

33 54Tuesday, February 23, 2010

E

CCustom

of

A

< Power Button for Debug >

debug phase using

@

@ SW5

SW5

TOP side

1 1

EC_ON33,35

1 2

R514

10K_0402_5%

SMT1-05-A_4P

5

6

1 2

ON/OFFBTN#

3 4

13

D

Q19

2

G

2N7002_SOT23-3

S

ON/OFFBTN# 33

51_ON# 45

< DC-IN LED >

ACIN 22,33,45

2

G

D54

2 2

+3VALW

1 2

R515

R515 120_0402_5%

120_0402_5%

D54

2 1

HT-110UYG-CT_YEL/GRN

Vf=2.0V (typ), 2.4 V (max), If = 30mA (max)

G

1 3

D

2N7002_SOT23-3

2N7002_SOT23-3 Q20

Q20

S

< WiMAX LED >

Remove WiMAX LED control circuit

3 3

< HDD LED >

R546

R546 10K_0402_5%

10K_0402_5%

1 2

12

R548

R548 120_0402_5%

120_0402_5%

+3VS

< WL&BT LED >

+3VS

1 2

2 1

D46

D46 HT-110UYG-CT_YEL/GRN

HT-110UYG-CT_YEL/GRN

R550

R550 120_0402_5%WLAN@

120_0402_5%WLAN@

D50

WLAN@ D50

WLAN@

HT-110UD_1204_AMBER

3

Q18B

Q18B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

12

2

6 1

5

Q18A

Q18A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

< POWER-ON & SUSPEND LED >

4 4

+3VALW

R770 120_0402_5%R770 120_0402_5%

1 2

A

1

< Ultra Bright Amber >

D68

3

2

< Ultra Bright Yellow Green >

HT-210UD/UYG_AMB/GRN

PWR_ON_LED# 33

PWR_SUSP_LED# 33

B

SATA_LED# 22

WL_BT_LED# 33

B

C

H_3P0

H_3P0 @

@

H_3P0

H_3P0 @

@

H_3P7

H_3P7 @

@

H_3P0

H_3P0 @

@

FD4@FD4

1

< G - Sensor >

< Screw Hole >

H16

H15

H_3P0

1

@

H21

H22

H_3P0

1

@

H27

H28

H_3P0

1

@

H33

H34

H_3P7

1

@

H39

H40

H_3P0

H_3P1X4P1N

1

@

H42

H41

H_3P0

1

@

MDC: H30, H31 VGA: H38, H39, H41 CPU: H32, H33, H34, H35 Mini Card : H36, H37 Others: H15, H16, H17, H18, H19, H20, H21, H22, H23, H24, H25, H26, H27, H28, H29, H40, H42, H43, H47,H44

H18

H17

H_3P0

1

@

H23

H24

H_3P0

1

@

H30

H29

H_3P2

H_3P1N

1

@

H36

H35

H_3P7

1

@

H47

PCB Fedical Mark PAD

FD1@FD1

H_3P0

1

@

1

H44

H43

H_3P0N

1

@

H_3P0

H_3P0 @

@

H20

H19

H_3P0

1

@

H26

H25

H_3P0

1

@

H32

H31

H_3P2

1

@

H38

H37

H_3P7

1

@

FD2@FD2

FD3@FD3

@

1

H45

H_3P0

1

@

< LID Switch >

U34

17inch@ U34

17inch@

+3VALW

1

2

+3VALW

1

2

< EMI reserve >

+5VALW

< BATT CHARGE/FULL LED >

Vf=1.9V(typ),2.4V(max) for amber Vf=2.0V(typ),2.4V(max) for green If=30mA(max)

C645

17inch@C645

17inch@

0.1U_0402_16V4Z

16inch@ U36

16inch@

C646

16inch@C646

16inch@

0.1U_0402_16V4Z

+3VALW

APX9132HAI-TRG _SOT23-3

VDD2VOUT

U36 APX9132HAI-TRG _SOT23-3

APX9132HAI-TRG _SOT23-3

VDD2VOUT

C199 0.22U_0603_16V4ZC199 0.22U_0603_16V4Z C200 0.22U_0603_16V4ZC200 0.22U_0603_16V4Z C201 0.22U_0603_16V4ZC201 0.22U_0603_16V4Z C202 0.22U_0603_16V4ZC202 0.22U_0603_16V4Z C203 0.22U_0603_16V4ZC203 0.22U_0603_16V4Z C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z C213 0.1U_0402_16V4ZC213 0.1U_0402_16V4Z C248 0.1U_0402_16V4ZC248 0.1U_0402_16V4Z

1 2

GND

1

17inch@ C647

17inch@

10P_0402_50V8J

GND

1

16inch@ C648

16inch@

10P_0402_50V8J

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

3

C647

3

C648

R773

R773 120_0402_5%

120_0402_5%

LID_SW# 33

1

2

1

2

D70

1

HT-210UD/UYG_AMB/GRN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS_HDP

1

2

1.C199 : U19

2.C200 : PU5

3.Top side of PU12 for noise bounce.

4.C202 : U25

5.C203 : PU9

6.C205 : PU6

7.C213 : PJ5

8.C248 : Q35

< Ultra Bright Amber >

3

2

< Ultra Bright Yellow Green >

C

+5VS +3VS_HDP

2

CG12

G@

1U_0402_6.3V4Z

1

+3VS_HDP

G@

G@ CG7

CG7

0.1U_0402_16V4Z

1

G@

G@ CG8

CG8

0.1U_0402_16V4Z

2

HDPINT33

CG649 0.1U_0402_16V4ZG_2nd@ CG649 0.1U_0402_16V4ZG_2nd@ CG642 0.1U_0402_16V4ZG_2nd@ CG642 0.1U_0402_16V4ZG_2nd@ CG641 0.1U_0402_16V4ZG_2nd@ CG641 0.1U_0402_16V4ZG_2nd@

EC_SMB_CK27,33,44

HDPINT

12 12 12

+3VS_HDP

SELF_TEST

RG3

G@ RG3

G@

4.7K_0402_5%

12

RG4

G@ RG4

G@

4.7K_0402_5%

12

RG5

G@ RG5

G@

4.7K_0402_5%

12

RG6

G@ RG6

G@

4.7K_0402_5%

12

RG7

G@ RG7

G@

1K_0402_5%

12

< SW/B Connector >

JPOWER

BATT_FULL_LED# 33

BATT_LOW_LED# 33

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

GND GND

ACES_85201-1005N@

D

+5VS

G_1st@ UG1

G_1st@

SELF_TEST

G_2nd@ UG4

VOUTX VOUTY VOUTZ

SELF_TEST

G@ UG2

G@

10

1 2 3 4 5 6 7 8 9

10

G_2nd@

UG2

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

P1_7/CNTR00/INT10#

R5F211B4D34SP-PLSP0020JB-A

ON/OFFBTN#

1

KSO0

2

EC_PLAYBTN#

3

EC_REVBTN#

4

EC_FRDBTN#

5

EC_MUTEBTN#

6 7 8 9 10 11 12

D

R689 0_0603_5%@R689 0_0603_5%@

G@

UG3

1

IN

2

GND SHDN#3BYP

G9191-330T1U_SOT23-5

UG1

2

Vdd1

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH35TR_LGA16

UG4

2

XOUT

3

YOUT

4

ZOUT

9

0G-DET

7

SLEEP#

10

G-SELECT

13

ST

MMA7360LR2_LGA14

E

12

DG1

DG1 CH751H-40PT_SOD323-2G@

CH751H-40PT_SOD323-2G@

21

5

OUT

4

3

Voutx

5

Vouty

7

Voutz

10

NC1

11

NC2

14

NC3

15

NC4

16

NC5

1

GND1

13

GND2

6

VDD

1

NC

8

NC

11

NC

12

NC

14

NC

5

VSS

P1_5/RXD0/CNTR01/INT11#

P1_2/KI2#/AN10/CMP0_2

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

+3VS_HDP+3VS

12

VOUTX VOUTY VOUTZ

+3VS_HDP

P1_6/CLK0/SSI01

P1_4/TXD0

P1_3/KI3#/AN11/TZOUT

P4_2/VREF

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

CG14

0.22U_0402_10V4Z@

2

CG13

G@

1U_0402_6.3V4Z

1

CG1 0.033U_0402_16V7KG_1st@ CG1 0.033U_0402_16V7KG_1st@

1 2

CG2 0.033U_0402_16V7KG_1st@ CG2 0.033U_0402_16V7KG_1st@

1 2

CG3 0.033U_0402_16V7KG_1st@ CG3 0.033U_0402_16V7KG_1st@

1 2

11

12

13

14

15

16

17

18

19

20

VOUTZ

VOUTX

VOUTY

G@ RG9

G@

1 2

G@ RG10

G@

1 2

1

G@ CG6

G@

2

EC_SMB_DA2 7,33,44

< Touch/B Connector >

+5VS

1

C686

C686 220P_0402_50V7K@

220P_0402_50V7K@ C699

C699 220P_0402_50V7K@

220P_0402_50V7K@ C702

C702 220P_0402_50V7K@

220P_0402_50V7K@ C705

C705 220P_0402_50V7K@

220P_0402_50V7K@ C708

C708 220P_0402_50V7K@

220P_0402_50V7K@

2 3 4

34 54Tuesday, February 23, 2010

TP_CLK33

TP_DATA33

KSO0 32,33 KSI1 32,33 KSI3 32,33 KSI5 32,33 KSI2 32,33

Custom

Date: Sheet

< For EMI >

ON/OFFBTN#

EC_REVBTN#

EC_FRDBTN#

EC_PLAYBTN#

EC_MUTEBTN#

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

Schematic, M/B LA-5331P

1 2

401716

E

HDPACT 33

RG9 47K_0402_5%

47K_0402_5%

HDPLOC 33

RG10 47K_0402_5%

47K_0402_5%

+3VS_HDP

CG6

0.1U_0402_16V4Z

JTOUCH

1 2 3 4

ACES_85201-04051@

of

C

A

< +5VALW TO +5VS >

+5VALW

Q35

S

D

S

D

S

D

G

D

SI4800BDY_SO8

1 2 3

RUNON

4

8 7 6 5

1

C864

4.7U_0805_10V4Z

C864

2

1 1

+5VS

1

2

< +3VALW TO +3VS >

+3VALW +3VS

Q14

8

S

D

7

S

D

6

S

D

5

G

D

1

SI4800BDY_SO8

C840

4.7U_0805_10V4Z

2 2

< +3VALW TO +3V_LAN >

2

+3VALW +3VALW +3V_LAN

1 2 3 4

1

2

1

2

RUNON

C834

0.01U_0402_25V7K

Inrush current = 0A

1

C838

C839

C839 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C838

4.7U_0805_10V4Z

2

12

R556

@R556

@ 10M_0402_5%

10M_0402_5%

< close to PQ20, must EMI confirm >

Inrush current = 0A

C833

C833 1U_0402_6.3V4Z

1U_0402_6.3V4Z

< close to PQ20, must EMI confirm >

13

D

2

G

Q17

S

2N7002_SOT23-3

1

C835

4.7U_0805_10V4Z

2

12

SUSP

Vgs=-4.5V, Id=3A

B

+3VS

R152

R152 750K_0402_1%

750K_0402_1%

+5VALW

1

C204

0.1U_0402_16V7K

2

+3VS

1

C197

0.1U_0402_16V7K

2

+VSB

Inrush current = 0A

C

< +1.8V TO +1.8VS >

+1.8V

1

C842

4.7U_0805_10V4Z

2

< +1.2VALW TO +1.2V_HT >

+1.2VALW

1

C847

4.7U_0805_10V4Z

2

Q4

IRF8113PBF_SO8

8 7

5

4

1.8VS_ENABLE

12

R809

R809 10M_0402_5%

10M_0402_5%

12

R367

R367 1K_0402_5%

1K_0402_5%

1 2 36

Q11

IRF8113PBF_SO8

8 7

5

+1.8VS

Inrush current = 0A

1

C848

C848 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

C849

0.01U_0402_25V7K

2

1 2 36

4

12

R808

R808 10M_0402_5%

10M_0402_5%

D

2

C841

C841 10U_0805_10V4Z

10U_0805_10V4Z

1

R138

R138 750K_0402_1%

SUSP

2

G

Q13

Q13 2N7002_SOT23-3

2N7002_SOT23-3

750K_0402_1%

1

C862

4.7U_0805_10V4Z

2

61

+VSB

12

VLDT_EN#

2

Q12A

Q12A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

13

D

S

+1.2V_HT

Inrush current = 0A

1

C846

C846 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

C837

0.01U_0402_25V7K

2

1 2

E

1

+

C876

C876 330U_D2E_2.5VM_R15

330U_D2E_2.5VM_R15

2

R233

R233 330K_0402_5%

330K_0402_5%

+VSB

Rds<97m ohm

R17

R17 100K_0402_5%

100K_0402_5%

WOL_EN#33

3 3

WOL_EN#

1 2

R19

R19 47K_0402_5%

47K_0402_5%

2

C194

0.1U_0402_16V7K

1

C182

0.01U_0402_25V7K

2

G

2

@

S

Q38

D

AO3413_SOT23

1 3

1

C679

4.7U_0805_10V4Z

2

PJ29

@ PJ29

@

2

JUMP_43X79

1

C680

C680 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

< Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >

+5VL+5VL +5VL

12

R596

R596 100K_0402_5%

100K_0402_5%

3

61

Q142A

Q142A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2

4

SYSON#50

2N7002DW-7-F_SOT363-6

R595

100K_0402_5%

SYSON# SUSP EC_ON#

Q142B

5

+5VL

12

R598

R597

100K_0402_5%

VLDT_EN#

SUSP# 27,29,33,47,49,50,52SYSON27,33,50

VLDT_EN33

VLDT_EN

2N7002DW-7-F_SOT363-6

2

Q143A

61

R598 100K_0402_5%

100K_0402_5%

3

Q143B

2N7002DW-7-F_SOT363-6

5

4

EC_ON 33,34

< Discharge circuit >

+5VS +3VS

R239

R239 470_0805_5%

470_0805_5%

1 2

13

D

2

G

D

Q46

Q46 2N7002_SOT23-3

2N7002_SOT23-3

S

A

SUSP SUSP SUSP SUSPVLDT_EN# SYSON# SUSP

4 4

+1.8VS +0.9V

R279

R279 470_0805_5%

470_0805_5%

1 2

13

D

Q48

2

G

2N7002_SOT23-3

S

+1.2V_HT +1.8V

R280

R280 470_0805_5%

470_0805_5%

1 2 3

Q12B

Q12B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

B

2

G

R284

R284 470_0805_5%

470_0805_5%

1 2 13

D

Q41

Q41 2N7002_SOT23-3

2N7002_SOT23-3

S

+1.2VALW

R368

@

470_0805_5%

EC_ON# SYSON#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@

1 2 13

D

Q42

@

Q42

@

2

G

S

C

2N7002_SOT23-3

2008-09-25 2009-09-25

R288

R288 470_0805_5%

470_0805_5%

1 2 13

D

Q47

2

G

2N7002_SOT23-3

S

Compal Secret Data

Deciphered Date

2

G

R292

R292 470_0805_5%

470_0805_5%

1 2 13

D

S

D

Q49

Q49 2N7002_SOT23-3

2N7002_SOT23-3

+1.5VS

R293

R293 470_0805_5%

470_0805_5%

1 2 13

D

Q50

2

G

2N7002_SOT23-3

S

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

+1.1VS

R294

R294 470_0805_5%

470_0805_5%

1 2 13

D

Q52

2

G

2N7002_SOT23-3

S

Schematic, M/B LA-5331P

401716

E

of

35 54Tuesday, February 23, 2010

C

5

4

3

2

1

PCIE_GTX_C_MRX_P[0..15]11

PCIE_GTX_C_MRX_N[0..15]11

D D

C C

B B

PCIE_MTX_C_GRX_P[0..15]11

PCIE_MTX_C_GRX_N[0..15]11

PCIE_GTX_C_MRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

UV1A

Swap PCIE & polarity inversion

PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14

PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P13

PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12

PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P11

PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P10

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0

CLK_PCIE_VGA16 CLK_PCIE_VGA#16

PLT_RST#12,15,20,26,27,32,33

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AJ21

NC#1

AK21

NC#2

AH16

NC_PWRGOOD

AA30

PERSTB

216-0729002 A12 M96_BGA962

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP PCIE_CALRN

Swap PCIE & polarity inversion

PCIE_GTX_MRX_N15

Y33

PCIE_GTX_MRX_P15

Y32

PCIE_GTX_MRX_N14

W33

PCIE_GTX_MRX_P14

W32

PCIE_GTX_MRX_N13

U33

PCIE_GTX_MRX_P13

U32

PCIE_GTX_MRX_N12

U30

PCIE_GTX_MRX_P12

U29

PCIE_GTX_MRX_N11

T33

PCIE_GTX_MRX_P11

T32

PCIE_GTX_MRX_N10

T30

PCIE_GTX_MRX_P10

T29

PCIE_GTX_MRX_N9

P33

PCIE_GTX_MRX_P9

P32

PCIE_GTX_MRX_N8

P30

PCIE_GTX_MRX_P8

P29

PCIE_GTX_MRX_N7

N33

PCIE_GTX_MRX_P7

N32

PCIE_GTX_MRX_N6

N30

PCIE_GTX_MRX_P6

N29

PCIE_GTX_MRX_N5

L33

PCIE_GTX_MRX_P5

L32

PCIE_GTX_MRX_N4

L30

PCIE_GTX_MRX_P4

L29

PCIE_GTX_MRX_N3

K33

PCIE_GTX_MRX_P3

K32

PCIE_GTX_MRX_N2

J33

PCIE_GTX_MRX_P2

J32

PCIE_GTX_MRX_N1

K30

PCIE_GTX_MRX_P1

K29

PCIE_GTX_MRX_N0

H33

PCIE_GTX_MRX_P0

H32

M96@

Y30 Y29

RV4 1.27K_0402_1%RV4 1.27K_0402_1% RV5 2K_0402_1%RV5 2K_0402_1%

CV9 0.1U_0402_10V7KCV9 0.1U_0402_10V7K

1 2

CV10 0.1U_0402_10V7KCV10 0.1U_0402_10V7K

1 2

CV11 0.1U_0402_10V7KCV11 0.1U_0402_10V7K

1 2

CV12 0.1U_0402_10V7KCV12 0.1U_0402_10V7K

1 2

CV13 0.1U_0402_10V7KCV13 0.1U_0402_10V7K

1 2

CV14 0.1U_0402_10V7KCV14 0.1U_0402_10V7K

1 2

CV15 0.1U_0402_10V7KCV15 0.1U_0402_10V7K

1 2

CV16 0.1U_0402_10V7KCV16 0.1U_0402_10V7K

1 2

CV17 0.1U_0402_10V7KCV17 0.1U_0402_10V7K

1 2

CV18 0.1U_0402_10V7KCV18 0.1U_0402_10V7K

1 2

CV19 0.1U_0402_10V7KCV19 0.1U_0402_10V7K

1 2

CV20 0.1U_0402_10V7KCV20 0.1U_0402_10V7K

1 2

CV21 0.1U_0402_10V7KCV21 0.1U_0402_10V7K

1 2

CV22 0.1U_0402_10V7KCV22 0.1U_0402_10V7K

1 2

CV23 0.1U_0402_10V7KCV23 0.1U_0402_10V7K

1 2

CV24 0.1U_0402_10V7KCV24 0.1U_0402_10V7K

1 2

CV25 0.1U_0402_10V7KCV25 0.1U_0402_10V7K

1 2

CV26 0.1U_0402_10V7KCV26 0.1U_0402_10V7K

1 2

CV27 0.1U_0402_10V7KCV27 0.1U_0402_10V7K

1 2

CV28 0.1U_0402_10V7KCV28 0.1U_0402_10V7K

1 2

CV29 0.1U_0402_10V7KCV29 0.1U_0402_10V7K

1 2

CV30 0.1U_0402_10V7KCV30 0.1U_0402_10V7K

1 2

CV31 0.1U_0402_10V7KCV31 0.1U_0402_10V7K

1 2

CV32 0.1U_0402_10V7KCV32 0.1U_0402_10V7K

1 2

CV33 0.1U_0402_10V7KCV33 0.1U_0402_10V7K

1 2

CV34 0.1U_0402_10V7KCV34 0.1U_0402_10V7K

1 2

CV35 0.1U_0402_10V7KCV35 0.1U_0402_10V7K

1 2

CV36 0.1U_0402_10V7KCV36 0.1U_0402_10V7K

1 2

CV37 0.1U_0402_10V7KCV37 0.1U_0402_10V7K

1 2

CV38 0.1U_0402_10V7KCV38 0.1U_0402_10V7K

1 2

CV39 0.1U_0402_10V7KCV39 0.1U_0402_10V7K

1 2

CV40 0.1U_0402_10V7KCV40 0.1U_0402_10V7K

1 2

1 2 1 2

Close to UA1

PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14

PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13

PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12

PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11

PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10

PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9

PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8

PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7

PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6

PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5

PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4

PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3

PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2

PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0

+1.1VS

A A

Security Classification

2008/10/01 2009/10/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/01 2009/10/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

1

of

36 54Tuesday, February 23, 2010

of

36 54Tuesday, February 23, 2010

of

36 54Tuesday, February 23, 2010

C

5

+1.8VS

D D

12

+3VS_DELAY

12

C C

GPIO24_TRST#

12

+1.8VS

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

B B

BLM18PG121SN1D_0603

+1.1VS

A A

12

RV7

RV7 10K_0402_5%

10K_0402_5% @

@

12

RV11

RV11 10K_0402_5%

10K_0402_5% @

@

+VGA_CORE

@

RV22

RV22 10K_0402_5%

10K_0402_5%

@

RV23

RV23 10K_0402_5%

10K_0402_5%

BLM18PG121SN1D_0603

12

LV6

CV66

FOR EMI

12

LV7

10U_0603_6.3V6M

RV8

RV8 10K_0402_5%

10K_0402_5% @

@

RV12

RV12 10K_0402_5%

10K_0402_5% @

@

12

@

RV20

RV20 10K_0402_5%

10K_0402_5%

BB_EN

1

2

10U_0603_6.3V6M

0.1U_0402_16V4Z

1 CV60

CV60

2

5

12

0.1U_0402_16V4Z

CV57

1

CV61

2

1

2

1

2

RV9

RV9 10K_0402_5%

10K_0402_5% @

@

RV13

RV13 10K_0402_5%

10K_0402_5% @

@

CV58

300mA

+DPLL_VDDC

CV62

1U_0402_6.3V4Z

12

150mA

+DPLL_PVDD 1

CV59

CV59 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

27M_CLK16

RV10

RV10 10K_0402_5%

10K_0402_5% @

@

DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23

RV14

RV14 10K_0402_5%

10K_0402_5% @

@

LCD

GPU_GPIO044 GPU_GPIO144 GPU_GPIO244

ENBKL33

SOUT_GPIO844

SIN_GPIO944

GPU_GPIO1144 GPU_GPIO1244 GPU_GPIO1344

HPD19,21

VGA_PWRSEL52

27M_SSC16

THERM#_VGA44

ROMSE_GPIO2244

+1.8VS

RV25

249_0402_1%

27M_CLK XTALIN

+1.8VS

VRAM_DEC44

LCD_EDID_CLK18

LCD_EDID_DATA18

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2

RV18 10K_0402_5%RV18 10K_0402_5%

GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

VGA_PWRSEL 27M_SSC THERM#_VGA

12

RV24

RV24 499_0402_1%

499_0402_1%

+VGA_VREF

12

1 CV56

CV56

0.1U_0402_16V4Z

2

60.4_0402_1%

1 2

RV140

RV141

100_0402_1%

BLM18PG121SN1D_0603

12

LV8

10U_0603_6.3V6M

VRAM_ID044 VRAM_ID144 VRAM_ID244

1 2

RV21 10K_0402_5%@ RV21 10K_0402_5%@

1 2

12

1

CV63

2

DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23

BB_EN GPIO23_CLKREQ#

GPIO24_TRST#

GENERIC_C

GPU_THERMAL_D+44 GPU_THERMAL_D-44

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

CV64

2

4

LCD_EDID_CLK LCD_EDID_DATA

R_AC_IN

GPU_CTF

TV24TV24 TV26TV26 TV25TV25 TV27TV27 TV28TV28 TV29TV29

TV30TV30

+DPLL_PVDD

+DPLL_VDDC

+TSVDD

1

CV65

CV65 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

4

20mA

+TSVDD

AR10

AW10

AU10 AP10 AV11 AT11 AR12

AW12

AU12 AP12

AK26

AH20 AH18 AN16 AH23

AH17 AK17 AH15 AK16 AM16

AM14 AM13 AK14 AG30 AN14 AM17

AK13 AN13 AM23 AN23 AK23

AM24 AK19 AK20 AH26

AH24

AK24

AH13

AM32 AN32

AN31

AV33 AU34

AG29

AK32

AW8

AW3 AW5

AW6

AJ26

AJ23 AJ17 AJ13 AJ16 AL16

AL13 AJ14

AL24 AJ19 AJ20 AJ24

AF29

AJ32 AJ33

UV1B

MUTI GFX

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0 DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1 DVPDATA_2

AP6

DVPDATA_3 DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6 DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23

I2C

SCL SDA

GENERAL PURPOSE I/O

GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 GENERICF GENERICG

HPD1

VREFG

PLL/CLOCK

DPLL_PVDD DPLL_PVSS

DPLL_VDDC

XTALIN XTALOUT

DPLUS

THERMAL

DMINUS

TS_FDO TSVDD TSVSS

216-0729002 A12 M96_BGA962

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P TX0M_DPA2N

DPA

TX1P_DPA1P TX1M_DPA1N

TX2P_DPA0P TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P TX3M_DPB2N

DPB

TX4P_DPB1P TX4M_DPB1N

TX5P_DPB0P TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

DPD

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

DAC1

DAC2

DDC/AUX

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

HSYNC VSYNC

RSET

AVDD

AVSSQ

VDD1DI VSS1DI

G2B

COMP

H2SYNC V2SYNC

VDD2DI VSS2DI

A2VDD A2VDDQ A2VSSQ

R2SET

AUX1P

AUX1N

AUX2P

AUX2N

M96@

R

RB

G

GB

B

BB

R2

R2B

G2

B2

B2B

C Y

3

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39 AD37

AE36 AD35

AF37 AE38

AC36 AC38

AB34 AD34

AE34 AC33

AC34

AC30 AC31

AD30 AD31

AF30 AF31

AC32 AD32 AF32

AD29 AC29

AG31 AG32

AG33 AD33 AF33

AA29

1 2

RV26 715_0402_1%RV26 715_0402_1%

AM26 AN26

AM27 AL27

HDMICLK_VGA

AM19

HDMIDAT_VGA

AL19 AN20

AM20 AL30

AM30 AL29

AM29 AN21

AM21

CRT_CLK

AJ30

CRT_DATA

AJ31 AK30

AK29

3

2

UV1G

LVDS CONTROL

HDMI_CLK0+ 19 HDMI_CLK0- 19

HDMI_TXD0+ 19 HDMI_TXD0- 19

HDMI_TXD1+ 19 HDMI_TXD1- 19

HDMI_TXD2+ 19 HDMI_TXD2- 19

Near UV1

RED

1 2

RV15 150_0402_1%RV15 150_0402_1%

GREEN

1 2

RV16 150_0402_1%RV16 150_0402_1%

BLUE

1 2

RV17 150_0402_1%RV17 150_0402_1%

RED 17

GREEN 17

BLUE 17

R_HSYNC 17,44 R_VSYNC 17,44

1 2

RV19 499_0402_1%RV19 499_0402_1%

+AVDD_VGA

+VDD1DI

HSYNC_DAC2 44 VSYNC_DAC2 44

+VDD1DI

+A2VDD

+A2VDDQ

HDMICLK_VGA 19 HDMIDAT_VGA 19

CRT_CLK 17 CRT_DATA 17

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CRT

+VDD1DI

+A2VDD

HDMI

CRT

2008/10/01 2009/10/01

70mA

+AVDD_VGA

1

CV41

1U_0402_6.3V4Z

2

45mA

1

CV44

1U_0402_6.3V4Z

2

0.1U_0402_16V4Z

45mA

10mA

+A2VDDQ

1

CV5310U_0603_6.3V6M CV5310U_0603_6.3V6M

2

0.1U_0402_16V4Z

CRT_DATA CRT_CLK

HDMIDAT_VGA HDMICLK_VGA

Compal Secret Data

Deciphered Date

2

1

CV42

2

0.1U_0402_16V4Z

1

CV45

2

1 2 LV4 0_0603_5%LV4 0_0603_5%

1

CV54

2

RV27 4.7K_0402_5%RV27 4.7K_0402_5% RV28 4.7K_0402_5%RV28 4.7K_0402_5%

RV30 4.7K_0402_5%H@ RV30 4.7K_0402_5%H@ RV32 4.7K_0402_5%H@ RV32 4.7K_0402_5%H@

LVTMDP

216-0729002 A12 M96_BGA962

M96@

BLM18PG121SN1D_0603

1

CV43

10U_0603_6.3V6M

10U_0603_6.3V6M 2

BLM18PG121SN1D_0603

1

CV46

CV46 10U_0603_6.3V6M

10U_0603_6.3V6M

2

BLM18PG121SN1D_0603

LV5

1

CV55

CV55 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+3VS_DELAY

1 2 1 2

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N

12

LV1

12

LV2

+3VS_DELAY

12

1

AK27

VARY_BL

AJ27

DIGON

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35

TXOUT_U3P

AG36

TXOUT_U3N

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36

TXOUT_L3P

AP37

TXOUT_L3N

+1.8VS

LCD_EDID_DATA LCD_EDID_CLK VGA_PWRSEL

THERM#_VGA GPIO23_CLKREQ# R_AC_IN GENERIC_C

Title

Size Document Number Rev

Date: Sheet

ENVDD 18

1 2

RV6 10K_0402_5%@RV6 10K_0402_5%@

LCD_TZCLK+ 18 LCD_TZCLK- 18

LCD_TZOUT0+ 18 LCD_TZOUT0- 18

LCD_TZOUT1+ 18 LCD_TZOUT1- 18

LCD_TZOUT2+ 18 LCD_TZOUT2- 18

LCD_TXCLK+ 18 LCD_TXCLK- 18

LCD_TXOUT0+ 18 LCD_TXOUT0- 18

LCD_TXOUT1+ 18 LCD_TXOUT1- 18

LCD_TXOUT2+ 18 LCD_TXOUT2- 18

+3VS_DELAY

1 2

RV29 4.7K_0402_5%RV29 4.7K_0402_5%

1 2

RV31 4.7K_0402_5%RV31 4.7K_0402_5%

1 2

RV33 10K_0402_5%@RV33 10K_0402_5%@

1 2

RV35 10K_0402_5%RV35 10K_0402_5%

1 2

RV37 10K_0402_5%RV37 10K_0402_5%

1 2

RV38 10K_0402_5%@RV38 10K_0402_5%@

1 2

RV40 10K_0402_5%@RV40 10K_0402_5%@

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

1

C

of

37 54Tuesday, February 23, 2010

of

37 54Tuesday, February 23, 2010

of

37 54Tuesday, February 23, 2010

5

D D

1 2

+1.1VS

LV9 0_0603_5%LV9 0_0603_5%

4

UV1H

AP20 AP21

AP13 AT13

AN17 AP16

AP17 AW14 AW16

UV1H

NC_DPC_VDD18#1 NC_DPC_VDD18#2

DPC_VDD10#1 DPC_VDD10#2

DPC_VSSR#1 DPC_VSSR#2 DPC_VSSR#3 DPC_VSSR#4 DPC_VSSR#5

DP A/B POWERDP C/D POWER

NC_DPA_VDD18#1 NC_DPA_VDD18#2

DPA_VDD10#1 DPA_VDD10#2

DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5

3

AN24 AP24

200mA

+DPA_VDD10+DPC_VDD10

AP31 AP32

AN27 AP27 AP28 AW24 AW26

1 2 LV10 0_0603_5%LV10 0_0603_5%

+1.1VS

2

1

DPA_PVDD DPA_PVSS

DPB_PVDD DPB_PVSS

DPC_PVDD DPC_PVSS

DPD_PVDD DPD_PVSS

DPE_PVDD DPE_PVSS

AP25 AP26

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

AU28 AV27

AV29 AR28

AU18 AV17

AV19 AR18

AM37 AN38

AL38 AM35

1 2

RV42 150_0402_1%RV42 150_0402_1%

+DPA_PVDD

+DPB_PVDD

+DPC_PVDD

+DPD_PVDD

+DPE_PVDD

+DPB_VDD10

+DPA_PVDD

+DPB_PVDD

+DPC_PVDD

+DPD_PVDD

+DPE_PVDD

H@

20mA

2

CV7510U_0603_6.3V6MH@CV7510U_0603_6.3V6M

1

20mA

2

CV8710U_0603_6.3V6M CV8710U_0603_6.3V6M

1

20mA

1

CV1030.1U_0402_16V4Z CV1030.1U_0402_16V4Z

2

CV76

1

1U_0402_6.3V4Z

1U_0402_6.3V4Z H@

H@

2

CV88

1

1U_0402_6.3V4Z

1

CV102

2

1U_0402_6.3V4Z

BLM18PG121SN1D_0603

2

CV77

0.1U_0402_16V4Z

1

H@

1 2

LV14 0_0603_5%LV14 0_0603_5%

BLM18PG121SN1D_0603

2

CV89

0.1U_0402_16V4Z

1

1 2

LV17 0_0603_5%LV17 0_0603_5%

1 2

LV19 0_0603_5%LV19 0_0603_5%

BLM18PG121SN1D_0603

1

CV104

CV104 10U_0603_6.3V6M

10U_0603_6.3V6M

2

LV12

LV15

LV21

12

+1.1VS

+1.8VS

AP22

NC_DPD_VDD18#1

AP23

NC_DPD_VDD18#2

1 2

+1.1VS

LV11 0_0603_5%LV11 0_0603_5%

C C

BLM18PG121SN1D_0603

+1.8VS

BLM18PG121SN1D_0603

+1.1VS

B B

BLM18PG121SN1D_0603

+1.8VS

BLM18PG121SN1D_0603

+1.1VS

A A

LV20

LV18

LV13

LV16

12

2

1

12

2

1

12

2

1

2

CV9310U_0603_6.3V6M CV9310U_0603_6.3V6M

1

CV9910U_0603_6.3V6M CV9910U_0603_6.3V6M

1U_0402_6.3V4Z

+DPE_VDD18

2

CV7810U_0603_6.3V6M CV7810U_0603_6.3V6M

CV79

1

1U_0402_6.3V4Z

0.1U_0402_16V4Z

+DPE_VDD10

2

CV85

CV8410U_0603_6.3V6M CV8410U_0603_6.3V6M

1

1U_0402_6.3V4Z

0.1U_0402_16V4Z

200mA

+DPF_VDD18

2

CV94

1

1U_0402_6.3V4Z

0.1U_0402_16V4Z

100mA

+DPF_VDD10

2

CV100

1

0.1U_0402_16V4Z

200mA

2

CV80

1

100mA

2

CV86

1

2

CV95

1

CV101

+DPD_VDD10

RV41 150_0402_1%RV41 150_0402_1%

+DPE_VDD18

+DPE_VDD10

+DPF_VDD18

+DPF_VDD10

RV43 150_0402_1%RV43 150_0402_1%

AP14

DPD_VDD10#1

AP15

DPD_VDD10#2

AN19

DPD_VSSR#1

AP18

DPD_VSSR#2

AP19

DPD_VSSR#3

AW20

DPD_VSSR#4

AW22

DPD_VSSR#5

AW18

12

DPCD_CALR

AH34

DPE_VDD18#1

AJ34

DPE_VDD18#2

AL33

DPE_VDD10#1

AM33

DPE_VDD10#2

AN34

DPE_VSSR#1

AP39

DPE_VSSR#2

AR39

DPE_VSSR#3

AU37

DPE_VSSR#4

AW35

DPE_VSSR#5

AF34

DPF_VDD18#1

AG34

DPF_VDD18#2

AK33

DPF_VDD10#1

AK34

DPF_VDD10#2

AF39

DPF_VSSR#1

AH39

DPF_VSSR#2

AK39

DPF_VSSR#3

AL34

DPF_VSSR#4

AM34

DPF_VSSR#5

AM39

12

DPEF_CALR

216-0729002 A12 M96_BGA962

M96@

DP E/F POWER

NC_DPB_VDD18#1 NC_DPB_VDD18#2

DPB_VDD10#1 DPB_VDD10#2

DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5

DPAB_CALR

DP PLL POWER

NC_DPF_PVDD NC_DPF_PVSS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/01 2009/10/01

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

38 54Tuesday, February 23, 2010

1

C

of

5

1

+

CV108

CV108 330U_X_2VM_R6M

330U_X_2VM_R6M

2

D D

C C

BLM18PG121SN1D_0603

+1.8VS

10U_0603_6.3V6M

BLM18PG121SN1D_0603

+1.8VS

10U_0603_6.3V6M

B B

A A

PCIE_OK49

RV45 47K_0402_5%RV45 47K_0402_5%

1 2

CV105 10U_0603_6.3V6MCV105 10U_0603_6.3V6M

1 2

CV109 10U_0603_6.3V6MCV109 10U_0603_6.3V6M

1 2

CV131 10U_0603_6.3V6MCV131 10U_0603_6.3V6M

1 2

CV114 10U_0603_6.3V6MCV114 10U_0603_6.3V6M

1 2

CV117 10U_0603_6.3V6MCV117 10U_0603_6.3V6M

12

LV24

LV25

1 CV186

CV186

2

12

1 CV201

CV201

2

100mA

1

CV346

0.01U_0402_25V7K

2

1 2

CV228

0.1U_0402_16V4Z

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

CV190

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

CV202

2

QV1

QV1 AO3413_SOT23-3

AO3413_SOT23-3

D

1 3

2

G

1

2

+1.8VS

1

CV191

CV191 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

CV203

CV203 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+1.8VS

S

G

2

R147

R147 47K_0402_5%

47K_0402_5% 1 2 13

D

QV2

QV2 2N7002_SOT23-3

2N7002_SOT23-3

S

1 2

CV106 1U_0402_6.3V4ZCV106 1U_0402_6.3V4Z

1 2

CV110 1U_0402_6.3V4ZCV110 1U_0402_6.3V4Z

1 2

CV111 1U_0402_6.3V4ZCV111 1U_0402_6.3V4Z

1 2

CV115 1U_0402_6.3V4ZCV115 1U_0402_6.3V4Z

1 2

CV118 1U_0402_6.3V4ZCV118 1U_0402_6.3V4Z

1 2

CV121 1U_0402_6.3V4ZCV121 1U_0402_6.3V4Z

1 2

CV122 1U_0402_6.3V4ZCV122 1U_0402_6.3V4Z

1 2

CV124 1U_0402_6.3V4ZCV124 1U_0402_6.3V4Z

1 2

CV125 1U_0402_6.3V4ZCV125 1U_0402_6.3V4Z

1 2

CV141 1U_0402_6.3V4ZCV141 1U_0402_6.3V4Z

BLM18PG121SN1D_0603

LV23

LV23 CV149 10U_0603_6.3V6MCV149 10U_0603_6.3V6M CV153 1U_0402_6.3V4ZCV153 1U_0402_6.3V4Z CV157 1U_0402_6.3V4ZCV157 1U_0402_6.3V4Z CV161 0.1U_0402_16V4ZCV161 0.1U_0402_16V4Z CV165 1U_0402_6.3V4ZCV165 1U_0402_6.3V4Z

170mA

+VDDR5

+3VS_DELAY

170mA

BLM18PG121SN1D_0603

LV28

10U_0603_6.3V6M

+VGA_CORE

2

CV345

0.1U_0402_16V7K

1

RV44

RV44 100K_0402_5%

100K_0402_5%

1 2

4

12 1 2 1 2 1 2

12

1 2

1A

+1.5VS

0.1U_0402_16V4Z

12

BLM18PG121SN1D_0603

1

CV218

CV216

2

LV29

10U_0603_6.3V6M

2

CV249

0.1U_0402_16V4Z

1

4

FOR EMI

4A

1 2

CV107 1U_0402_6.3V4ZCV107 1U_0402_6.3V4Z

1 2

CV129 1U_0402_6.3V4ZCV129 1U_0402_6.3V4Z

1 2

CV112 1U_0402_6.3V4ZCV112 1U_0402_6.3V4Z

1 2

CV132 1U_0402_6.3V4ZCV132 1U_0402_6.3V4Z

1 2

CV119 1U_0402_6.3V4ZCV119 1U_0402_6.3V4Z

1 2

CV133 1U_0402_6.3V4ZCV133 1U_0402_6.3V4Z

1 2

CV123 1U_0402_6.3V4ZCV123 1U_0402_6.3V4Z

1 2

CV137 1U_0402_6.3V4ZCV137 1U_0402_6.3V4Z

1 2

CV140 1U_0402_6.3V4ZCV140 1U_0402_6.3V4Z

1 2

CV127 1U_0402_6.3V4ZCV127 1U_0402_6.3V4Z

136mA

+VDD_CT

1 2

CV178 10U_0603_6.3V6MCV178 10U_0603_6.3V6M

1 2

CV182 1U_0402_6.3V4ZCV182 1U_0402_6.3V4Z

1 2

CV187 1U_0402_6.3V4ZCV187 1U_0402_6.3V4Z

1 2

CV192 1U_0402_6.3V4ZCV192 1U_0402_6.3V4Z

BLM18PG121SN1D_0603

LV26

LV26 CV210 1U_0402_6.3V4ZCV210 1U_0402_6.3V4Z

BLM18PG121SN1D_0603

LV27

LV27 CV215

CV215

1

CV217

CV217 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1U_0402_6.3V4Z

12

CV219

1

CV220

2

+3VS+3VS_DELAY

+VGA_CORE

0.1U_0402_16V4Z

3

UV1E

+1.5VS

+VDD_CT

60mA

+VDDR5

+VDDR4+VDDR4

12

+VDDRHA

12

+VDDRHB

12

1U_0402_6.3V4Z

68mA

+PCIE_PVDD

414mA

2

1

CV221

+SPV10

1

2

CV223

CV222

2

1

1U_0402_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

UV1E

MEM I/O

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

LEVEL TRANSLATION

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

I/O

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR5#1

AF15

VDDR5#2

AG13

VDDR5#3

AG15

VDDR5#4

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#4

MEM CLK

M20

VDDRHA

M21

VSSRHA

V12

VDDRHB

U12

VSSRHB

PLL

AB37

PCIE_PVDD

H7

NC_MPV18#1

H8

NC_MPV18#2

AM10

NC_SPV18

AN9

SPV10

AN10

SPVSS

BACK BIAS

AA13

BBP#1

Y13

BBP#2

216-0729002 A12 M96_BGA962

2008/10/01 2009/10/01

3

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

VDDC#1

CORE

VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15

POWER

VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58 VDDC#59 VDDC#60 VDDC#61 VDDC#62 VDDC#63 VDDC#64 VDDC#65 VDDC#66 VDDC#67 VDDC#68 VDDC#69 VDDC#70 VDDC#71 VDDC#72 VDDC#73 VDDC#74

VDDCI#1

ISOLATED

VDDCI#2

CORE I/O

VDDCI#3 VDDCI#4

M96@

Compal Secret Data

Deciphered Date

+PCIE_VDDR_VGA

AA31 AA32 AA33 AA34 V28 W29 W30 Y31

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

AA15 AA17 AA20 AA22 AA24 AA27 AB13 AB16 AB18 AB21 AB23 AB26 AB28 AC12 AC15 AC17 AC20 AC22 AC24 AC27 AD13 AD16 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 M16 M18 M23 M26 N15 N17 N20 N22 N24 N27 R13 R16 R18 R21 R23 R26 T15 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V15 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 AH27 AH28

M15 N13 R12 T12

2

CV150 10U_0603_6.3V6MCV150 10U_0603_6.3V6M CV154 10U_0603_6.3V6MCV154 10U_0603_6.3V6M CV158 10U_0603_6.3V6MCV158 10U_0603_6.3V6M CV162 10U_0603_6.3V6MCV162 10U_0603_6.3V6M CV166 10U_0603_6.3V6MCV166 10U_0603_6.3V6M CV169 10U_0603_6.3V6MCV169 10U_0603_6.3V6M CV172 10U_0603_6.3V6MCV172 10U_0603_6.3V6M CV175 1U_0402_6.3V4ZCV175 1U_0402_6.3V4Z CV179 1U_0402_6.3V4ZCV179 1U_0402_6.3V4Z CV183 1U_0402_6.3V4ZCV183 1U_0402_6.3V4Z

+VDDCI

2

500mA

2A

1 2

CV135 10U_0603_6.3V6MCV135 10U_0603_6.3V6M

1 2

CV138 1U_0402_6.3V4ZCV138 1U_0402_6.3V4Z

1 2

CV126 1U_0402_6.3V4ZCV126 1U_0402_6.3V4Z

1 2

CV142 1U_0402_6.3V4ZCV142 1U_0402_6.3V4Z

1 2

CV143 1U_0402_6.3V4ZCV143 1U_0402_6.3V4Z

1 2

CV144 1U_0402_6.3V4ZCV144 1U_0402_6.3V4Z

1 2

CV147 1U_0402_6.3V4ZCV147 1U_0402_6.3V4Z

1 2

CV148 1U_0402_6.3V4ZCV148 1U_0402_6.3V4Z

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1

CV224

2

1U_0402_6.3V4Z

1

1 2

LV22 BLM18PG121SN1D_0603LV22 BLM18PG121SN1D_0603

1 2

CV128 10U_0603_6.3V6MCV128 10U_0603_6.3V6M

1 2

CV130 1U_0402_6.3V4ZCV130 1U_0402_6.3V4Z

1 2

CV113 1U_0402_6.3V4ZCV113 1U_0402_6.3V4Z

1 2

CV116 1U_0402_6.3V4ZCV116 1U_0402_6.3V4Z

1 2

CV120 1U_0402_6.3V4ZCV120 1U_0402_6.3V4Z

+1.1VS

1

+

2

1 2

CV151 1U_0402_6.3V4ZCV151 1U_0402_6.3V4Z

1 2

CV155 1U_0402_6.3V4ZCV155 1U_0402_6.3V4Z

1 2

CV159 1U_0402_6.3V4ZCV159 1U_0402_6.3V4Z

1 2

CV163 1U_0402_6.3V4ZCV163 1U_0402_6.3V4Z

1 2

CV167 1U_0402_6.3V4ZCV167 1U_0402_6.3V4Z

1 2

CV170 1U_0402_6.3V4ZCV170 1U_0402_6.3V4Z

1 2

CV173 1U_0402_6.3V4ZCV173 1U_0402_6.3V4Z

1 2

CV176 1U_0402_6.3V4ZCV176 1U_0402_6.3V4Z

1 2

CV180 1U_0402_6.3V4ZCV180 1U_0402_6.3V4Z

1 2

CV184 1U_0402_6.3V4ZCV184 1U_0402_6.3V4Z

1 2

CV188 1U_0402_6.3V4ZCV188 1U_0402_6.3V4Z

1 2

CV193 1U_0402_6.3V4ZCV193 1U_0402_6.3V4Z

1 2

CV195 1U_0402_6.3V4ZCV195 1U_0402_6.3V4Z

1 2

CV197 1U_0402_6.3V4ZCV197 1U_0402_6.3V4Z

1 2

CV199 1U_0402_6.3V4ZCV199 1U_0402_6.3V4Z

1 2

CV204 1U_0402_6.3V4ZCV204 1U_0402_6.3V4Z

1 2

CV206 1U_0402_6.3V4ZCV206 1U_0402_6.3V4Z

1 2

CV208 1U_0402_6.3V4ZCV208 1U_0402_6.3V4Z

1 2

CV211 1U_0402_6.3V4ZCV211 1U_0402_6.3V4Z

1 2

CV213 1U_0402_6.3V4ZCV213 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

Size Document Number Rev

Date: Sheet

CV225

Title

CV226

2

Compal Electronics, Inc.

1 2

CV134 1U_0402_6.3V4ZCV134 1U_0402_6.3V4Z

1 2

CV136 0.1U_0402_16V4ZCV136 0.1U_0402_16V4Z

1 2

CV139 0.1U_0402_16V4ZCV139 0.1U_0402_16V4Z

1

+

CV146

CV227

LV30

2

CV146 330U_X_2VM_R6M

330U_X_2VM_R6M

CV152 1U_0402_6.3V4ZCV152 1U_0402_6.3V4Z CV156 1U_0402_6.3V4ZCV156 1U_0402_6.3V4Z CV160 1U_0402_6.3V4ZCV160 1U_0402_6.3V4Z CV164 1U_0402_6.3V4ZCV164 1U_0402_6.3V4Z CV168 1U_0402_6.3V4ZCV168 1U_0402_6.3V4Z CV171 1U_0402_6.3V4ZCV171 1U_0402_6.3V4Z CV174 1U_0402_6.3V4ZCV174 1U_0402_6.3V4Z CV177 1U_0402_6.3V4ZCV177 1U_0402_6.3V4Z CV181 1U_0402_6.3V4ZCV181 1U_0402_6.3V4Z CV185 1U_0402_6.3V4ZCV185 1U_0402_6.3V4Z CV189 1U_0402_6.3V4ZCV189 1U_0402_6.3V4Z CV194 1U_0402_6.3V4ZCV194 1U_0402_6.3V4Z CV196 1U_0402_6.3V4ZCV196 1U_0402_6.3V4Z CV198 1U_0402_6.3V4ZCV198 1U_0402_6.3V4Z CV200 1U_0402_6.3V4ZCV200 1U_0402_6.3V4Z CV205 1U_0402_6.3V4ZCV205 1U_0402_6.3V4Z CV207 1U_0402_6.3V4ZCV207 1U_0402_6.3V4Z CV209 1U_0402_6.3V4ZCV209 1U_0402_6.3V4Z CV212 1U_0402_6.3V4ZCV212 1U_0402_6.3V4Z CV214 1U_0402_6.3V4ZCV214 1U_0402_6.3V4Z

1

CV145

CV145 330U_X_2VM_R6M

330U_X_2VM_R6M

BLM18PG121SN1D_0603

1

2

10U_0603_6.3V6M

Schematic, M/B LA-5331P

401716

12

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

25A

2A

39 54Tuesday, February 23, 2010

+1.8VS

+VGA_CORE

1

CV282

10U_0603_6.3V

10U_0603_6.3V 2

@

+VGA_CORE

of

12/09

C

5

UV1F

4

3

2

1

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

D D

C C

B B

A A

5

PCIE_VSS#10

J34

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#101

F17

GND#102

F19

GND#103

F21

GND#104

F23

GND#105

F25

GND#106

F27

GND#107

F29

GND#108

F31

GND#109

F33

GND#110

F7

GND#111

F9

GND#112

G2

GND#113

G6

GND#114

H9

GND#115

J2

GND#116

J27

GND#117

J6

GND#118

J8

GND#119

K14

GND#120

K7

GND#121

L11

GND#122

L17

GND#123

L2

GND#124

L22

GND#125

L24

GND#126

L6

GND#127

M17

GND#128

M22

GND#129

M24

GND#130

N16

GND#131

N18

GND#132

N2

GND#133

N21

GND#134

N23

GND#135

N26

GND#136

N6

GND#137

R15

GND#138

R17

GND#139

R2

GND#140

R20

GND#141

R22

GND#142

R24

GND#143

R27

GND#144

R6

GND#145

T11

GND#146

T13

GND#147

T16

GND#148

T18

GND#149

T21

GND#150

T23

GND#151

T26

GND#152

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#162

V18

GND#163

V21

GND#164

V23

GND#165

V26

GND#166

W2

GND#167

W6

GND#168

Y15

GND#169

Y17

GND#170

Y20

GND#171

Y22

GND#172

Y24

GND#173

Y27

GND#174

U13

GND#175

V13

GND#176

216-0729002 A12 M96_BGA962

4

GND

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 GND#99

GND#100

M96@

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AH29 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 AW34 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/01 2008/10/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

1

40 54Tuesday, February 23, 2010

of

C

5

4

3

2

1

12

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8

MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

MDB[0..63]

AA12

AD28 AK10

AL10

12

RV63

4.7K_0402_5%

AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6

AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5

Y12

2

C5 C3 E3 E1

F1 F3

F5 G4 H5 H6

J4 K6 K5

L4 M6 M1 M3 M5 N4 P6 P5 R4

T6

T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5

AJ4

MDA[0..63]

D D

C C

Close to pin L18

+1.5VS

12

RV46

100_0402_1%

+MVREFDA

1

12

CV229

12

CV229

0.1U_0402_16V4Z

2

+MVREFSA

1

CV231

2

0.1U_0402_16V4Z

+1.5VS

1 2 1 2 1 2

5

RV48

100_0402_1%

B B

Close to pin L20

+1.5VS

RV50

100_0402_1%

RV52

100_0402_1%

A A

MDA[0..63] 42

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8

MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+MVREFDA

RV53 243_0402_1%@ RV53 243_0402_1%@ RV54 243_0402_1%@ RV54 243_0402_1%@ RV55 243_0402_1%@ RV55 243_0402_1%@

RV56 243_0402_1%RV56 243_0402_1% RV57 243_0402_1%@ RV57 243_0402_1%@ RV60 243_0402_1%@ RV60 243_0402_1%@

UV1C

C37

DQA_0

C35

DQA_1

A35

DQA_2

E34

DQA_3

G32

DQA_4

D33

DQA_5

F32

DQA_6

E32

DQA_7

D31

DQA_8

F30

DQA_9

C30

DQA_10

A30

DQA_11

F28

DQA_12

C28

DQA_13

A28

DQA_14

E28

DQA_15

D27

DQA_16

F26

DQA_17

C26

DQA_18

A26

DQA_19

F24

DQA_20

C24

DQA_21

A24

DQA_22

E24

DQA_23

C22

DQA_24

A22

DQA_25

F22

DQA_26

D21

DQA_27

A20

DQA_28

F20

DQA_29

D19

DQA_30

E18

DQA_31

C18

DQA_32

A18

DQA_33

F18

DQA_34

D17

DQA_35

A16

DQA_36

F16

DQA_37

D15

DQA_38

E14

DQA_39

F14

DQA_40

D13

DQA_41

F12

DQA_42

A12

DQA_43

D11

DQA_44

F10

DQA_45

A10

DQA_46

C10

DQA_47

G13

DQA_48

H13

DQA_49

J13

DQA_50

H11

DQA_51

G10

DQA_52

G8

DQA_53

K9

DQA_54

K10

DQA_55

G9

DQA_56

A8

DQA_57

C8

DQA_58

E8

DQA_59

A6

DQA_60

C6

DQA_61

E6

DQA_62

A5

DQA_63

L18

MVREFDA

L20

MVREFSA

L27

NC_MEM_CALRN0

N12

NC_MEM_CALRN1

AG12

NC_MEM_CALRN2

M12

MEM_CALRP1

M27

NC_MEM_CALRP0

AH12

NC_MEM_CALRP2

216-0729002 A12 M96_BGA962

M96@

MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8

MAA_9 MAA_10 MAA_11 MAA_12

MAA_13/BA2 MAA_14/BA0 MAA_15/BA1

DQMA_0 DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6

MEMORY INTERFACE A

DQMA_7

QSA_0/RDQSA_0 QSA_1/RDQSA_1 QSA_2/RDQSA_2 QSA_3/RDQSA_3 QSA_4/RDQSA_4 QSA_5/RDQSA_5 QSA_6/RDQSA_6 QSA_7/RDQSA_7

QSA_0B/WDQSA_0 QSA_1B/WDQSA_1 QSA_2B/WDQSA_2 QSA_3B/WDQSA_3 QSA_4B/WDQSA_4 QSA_5B/WDQSA_5 QSA_6B/WDQSA_6 QSA_7B/WDQSA_7

ODTA0 ODTA1

CLKA0 CLKA0B

CLKA1 CLKA1B

RASA0B RASA1B

CASA0B CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0

CKEA1

WEA0B WEA1B

RSVD#1 RSVD#2 RSVD#3

RSVD#5 RSVD#6

RSVD#9

RSVD#11

4

MAA1

J23

MAA2

H24

MAA3

J24

MAA4

H26

MAA5 MAB4

J26

MAA6

H21

MAA7

G21

MAA8

H19

MAA9

H20

MAA10

L13

MAA11

G16

MAA12

J16

A_BA2

H16

A_BA0

J17

A_BA1

H17

DQMA#0

A32

DQMA#1

C32

DQMA#2

D23

DQMA#3

E22

DQMA#4

C14

DQMA#5

A14

DQMA#6

E10

DQMA#7

D9

QSA0

C34

QSA1

D29

QSA2

D25

QSA3

E20

QSA4

E16

QSA5

E12

QSA6

J10

QSA7

D7

QSA#0

A34

QSA#1

E30

QSA#2

E26

QSA#3

C20

QSA#4

C16

QSA#5

C12

QSA#6

J11

QSA#7

F8

ODTA0

J21

ODTA1

G19

CLKA0

H27

CLKA0#

G27

CLKA1

J14

CLKA1#

H14

RASA0#

K23

RASA1#

K19

CASA0#

K20

CASA1#

K17

CSA0#_0

K24 K27

CSA1#_0

M13 K16

CKEA0

K21

CKEA1

J20

WEA0#

K26

WEA1#

L15 AF28

AG28 AL31

H23 J19

T8 W8

MAA0

G24

MAA[12..0]

A_BA[2..0]

ODTA0 42 ODTA1 42

CLKA0 42 CLKA0# 42

CLKA1 42 CLKA1# 42

RASA0# 42 RASA1# 42

CASA0# 42 CASA1# 42

CSA0#_0 42

CSA1#_0 42

CKEA0 42 CKEA1 42

WEA0# 42 WEA1# 42

MAA[12..0] 42

A_BA[2..0] 42

DQMA#[7..0] 42

QSA[7..0] 42

QSA#[7..0] 42

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Close to pin Y12

+1.5VS

12

RV47

100_0402_1%

12 RV49

RV49

100_0402_1%

Close to pin AA12

+1.5VS

12

RV51 100_0402_1%RV51 100_0402_1%

+MVREFSB

12

1

RV58

CV232

0.1U_0402_16V4Z

2

100_0402_1%

2008/10/01 2009/10/01

Issued Date

3

2008/10/01 2009/10/01

+MVREFDB

1

CV230

0.1U_0402_16V4Z

2

1K_0402_5%

+3VS_DELAY

12

@

RV61

5.11K_0402_1%

TESTEN

4.7K_0402_5%

RV65

1 2

Compal Secret Data

RV62

Deciphered Date

MDB[0..63] 43

UV1D

DQB_0 DQB_1 DQB_2 DQB_3 DQB_4 DQB_5 DQB_6 DQB_7 DQB_8 DQB_9 DQB_10 DQB_11 DQB_12 DQB_13 DQB_14 DQB_15 DQB_16 DQB_17 DQB_18 DQB_19 DQB_20 DQB_21 DQB_22 DQB_23 DQB_24 DQB_25 DQB_26 DQB_27 DQB_28 DQB_29 DQB_30 DQB_31 DQB_32 DQB_33 DQB_34 DQB_35 DQB_36 DQB_37 DQB_38 DQB_39 DQB_40 DQB_41 DQB_42 DQB_43 DQB_44 DQB_45 DQB_46 DQB_47 DQB_48 DQB_49 DQB_50 DQB_51 DQB_52 DQB_53 DQB_54 DQB_55 DQB_56 DQB_57 DQB_58 DQB_59 DQB_60 DQB_61 DQB_62 DQB_63

MVREFDB MVREFSB

TESTEN CLKTESTA

CLKTESTB

216-0729002 A12 M96_BGA962

M96@

MEMORY INTERFACE B

QSB_0/RDQSB_0 QSB_1/RDQSB_1 QSB_2/RDQSB_2 QSB_3/RDQSB_3 QSB_4/RDQSB_4 QSB_5/RDQSB_5 QSB_6/RDQSB_6 QSB_7/RDQSB_7

QSB_0B/WDQSB_0 QSB_1B/WDQSB_1 QSB_2B/WDQSB_2 QSB_3B/WDQSB_3 QSB_4B/WDQSB_4 QSB_5B/WDQSB_5 QSB_6B/WDQSB_6 QSB_7B/WDQSB_7

M92-M2 uses memory group B only

MAB_0 MAB_1 MAB_2 MAB_3 MAB_4 MAB_5 MAB_6 MAB_7 MAB_8

MAB_9 MAB_10 MAB_11 MAB_12

MAB_13/BA2 MAB_14/BA0 MAB_15/BA1

DQMB_0 DQMB_1 DQMB_2 DQMB_3 DQMB_4 DQMB_5 DQMB_6 DQMB_7

ODTB0

ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B RASB0B

RASB1B CASB0B

CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0

CKEB1

WEB0B WEB1B

DRAM_RST

Title

Size Document Number Rev

Date: Sheet

MAB1

T9

MAB2

P9

MAB3

N7 N8

MAB5

N9

MAB6

U9

MAB7

U8

MAB8

Y9

MAB9

W9

MAB10

AC8

MAB11

AC9

MAB12

AA7

B_BA2

AA8

B_BA0

Y8

B_BA1

AA9

DQMB#0

H3

DQMB#1

H1

DQMB#2

T3

DQMB#3

T5

DQMB#4

AE4

DQMB#5

AF5

DQMB#6

AK6

DQMB#7

AK5

QSB0

F6

QSB1

K3

QSB2

P3

QSB3

V5

QSB4

AB5

QSB5

AH1

QSB6

AJ9

QSB7

AM5

QSB#0

G7

QSB#1

K1

QSB#2

P1

QSB#3

W4

QSB#4

AC4

QSB#5

AH3

QSB#6

AJ8

QSB#7

AM3

ODTB0

T7

ODTB1

W7

CLKB0

L9

CLKB0#

L8

CLKB1

AD8

CLKB1#

AD7

RASB0#

T10

RASB1#

Y10

CASB0#

W10

CASB1#

AA10

CSB0#_0

P10 L10

CSB1#_0

AD10 AC10

CKEB0

U10

CKEB1

AA11

WEB0#

N10

WEB1#

AB11

RV59 4.7K_0402_5%RV59 4.7K_0402_5%

AH11

RV64

@RV64

@

4.7K_0402_5%

1 2

Compal Electronics, Inc.

MAB0

P8

MAB[12..0]

B_BA[2..0]

ODTB0 43 ODTB1 43

CLKB0 43 CLKB0# 43

CLKB1 43 CLKB1# 43

RASB0# 43 RASB1# 43

CASB0# 43 CASB1# 43

CSB0#_0 43

CSB1#_0 43

CKEB0 43 CKEB1 43

WEB0# 43 WEB1# 43

12

+1.5VS

1

CV233

0.01U_0402_16V7K

2

Schematic, M/B LA-5331P

401716

1

MAB[12..0] 43

B_BA[2..0] 43

DQMB#[7..0] 43

QSB[7..0] 43

QSB#[7..0] 43

DRAM_RST# 42,43

41 54Tuesday, February 23, 2010

of

C

5

UV3

+VREFC_A1 +VREFD_A1

MAA[12..0]41

QSA[7..0]41

A_BA[2..0]

RV86 56_0402_1%

RV87 56_0402_1%

1 2

RV88 56_0402_1%

1 2

RV89 56_0402_1%

5

MDA[0..63]

1 2

8PCS@

1 2

8PCS@

DRAM_RST#41,43

RV66

243_0402_1%

4.99K_0402_1%

1

CV274

0.1U_0402_16V4Z

2

8PCS@

1

CV286

0.1U_0402_16V4Z

2

8PCS@

A_BA041 A_BA141 A_BA241

CLKA041 CLKA0#41 CKEA041

ODTA041 CSA0#_041 RASA0#41 CASA0#41 WEA0#41

QSA2 QSA0

DQMA#2 DQMA#0

QSA#2 QSA#0

12

8PCS@

+1.5VS +1.5VS +1.5VS +1.5VS

RV70

RV78

8PCS@

+1.5VS

8PCS@

MDA[0..63]41

D D

DQMA#[7..0]41

QSA#[7..0]41

A_BA[2..0]41

C C

B B

CLKA0

CLKA0#

CLKA1

A A

CLKA1#

UV3

M8

VREFCA

H1

VREFDQ

MAA0

N3

A0

MAA1

P7

A1

MAA2

P3

A2

MAA3

N2

A3

MAA4

P8

A4

MAA5

P2

A5

MAA6

R8

A6

MAA7

R2

A7

T8

A8

MAA9

R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96 @

@

8PCS@

+VREFC_A1

1

CV234

0.1U_0402_16V4Z

2

8PCS@

1U_0402_6.3V4Z

CV243

CV242

1

2

1U_0402_6.3V4Z

8PCS@

A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

MAA10 MAA11 MDA3 MAA12

12

1U_0402_6.3V4Z

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

4.99K_0402_1%

1U_0402_6.3V4Z

CV244

CV245

1

2

1U_0402_6.3V4Z

8PCS@

+1.5VS

4

UV2

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96 @

@

12

RV72

8PCS@RV72

8PCS@

+VREFC_A2 +VREFD_A2

12

1 CV236

8PCS@

1U_0402_6.3V4Z

CV250

1

2

1U_0402_6.3V4Z

8PCS@

1

2

8PCS@

CV236

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

1U_0402_6.3V4Z

CV251

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z 8PCS@

8PCS@

RV80

8PCS@

+1.5VS +1.5VS

Group2

Group0

RV67

RV67 243_0402_1%

243_0402_1%

1

CV276

2

8PCS@

+VREFC_A2 +VREFD_A2

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

A_BA0 A_BA1 A_BA2

CLKA0 CLKA0# CKEA0

ODTA0 CSA0#_0 RASA0# CASA0# WEA0#

QSA3 QSA1

DQMA#3 DQMA#1

QSA#3 QSA#1

DRAM_RST#

12

8PCS@

4.99K_0402_1%

8PCS@

10U_0603_6.3V

1

CV277

2

10U_0603_6.3V

8PCS@

MDA22

E3

DQL0

MDA19 +VREFD_A4

F7

DQL1

MDA21

F2

DQL2

MDA18

F8

DQL3

MDA23

H3

DQL4

MDA16

H8

DQL5

MDA20

G2

DQL6

MDA17

H7

DQL7

MDA0

D7

DQU0

MDA5MAA8

C3

DQU1

MDA1

C8

DQU2

MDA7

C2

DQU3

A7

DQU4

MDA4

A2

DQU5

MDA2

B8

DQU6

MDA6

A3

DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

RV71

RV79

8PCS@

1U_0402_6.3V4Z

CV246

1

2

4

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

CV247

1

2

1U_0402_6.3V4Z

8PCS@

10U_0603_6.3V

CV275

+1.5VS

8PCS@

+VREFD_A1

1 CV235

CV235

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

8PCS@

CV248

1

2

8PCS@

1

CV281

2

10U_0603_6.3V

8PCS@

3

UV5

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CV253

CV252

1

2

1U_0402_6.3V4Z

8PCS@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

RV73

4.99K_0402_1%

RV81

4.99K_0402_1%

8PCS@

1U_0402_6.3V4Z

CV254

1

2

1U_0402_6.3V4Z

8PCS@

3

CV255

MDA30 MDA24 MDA29 MDA26 MDA31 MDA27 MDA28

MDA15 MDA11 MDA14 MDA10 MDA13

MDA12

MDA9 MDA8

12

1

2

8PCS@RV73

8PCS@

CV256

+1.5VS

RV68

RV68 243_0402_1%

243_0402_1%

1 CV237

CV237

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

MDA25

E3

+VREFC_A3 +VREFD_A3

MAA0

Group3

Group1

2008/10/01 2009/10/01

MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

A_BA0 A_BA1 A_BA2

CLKA141 CLKA1#41 CKEA141

ODTA141 CSA1#_041 RASA1#41 CASA1#41 WEA1#41

QSA4 QSA5

DQMA#4 DQMA#5

QSA#4 QSA#5

DRAM_RST# DRAM_RST#

12

8PCS@

4.99K_0402_1%

UV5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

+1.5VS +1.5VS +1.5VS +1.5VS

@

12

RV74

8PCS@RV74

8PCS@

12

RV82

8PCS@

1U_0402_6.3V4Z

1U_0402_6.3V4Z 8PCS@

8PCS@

1 CV238

CV238

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

8PCS@

1U_0402_6.3V4Z

1

2

Compal Secret Data

CV258

CV259

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z 8PCS@

8PCS@

Deciphered Date

CV260

4.99K_0402_1%

CV261

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z 8PCS@

8PCS@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

RV75

RV83

8PCS@

1U_0402_6.3V4Z

CV262

1

2

8PCS@

+1.5VS

2

MDA35

E3

MDA32

F7

MDA38

F2

MDA34

F8

MDA37

H3

MDA36

H8

MDA39

G2

MDA33

H7

MDA43

D7

MDA44

C3

MDA40

C8

MDA45

C2

MDA42

A7

MDA46

A2

MDA41

B8

MDA47

A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

8PCS@RV75

8PCS@

+VREFD_A3+VREFC_A3

12

1 CV239

CV239

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

8PCS@

CV264

CV263

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z 8PCS@

8PCS@

10U_0603_6.3V

1

CV279

2

8PCS@

Group4

Group5

+1.5VS

RV69

RV69 243_0402_1%

243_0402_1%

1

CV283

2

10U_0603_6.3V

8PCS@

1

UV4

+VREFC_A4

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

A_BA0 A_BA1 A_BA2

CLKA1 CLKA1# CKEA1

ODTA1 CSA1#_0 RASA1# CASA1# WEA1#

QSA6 QSA7

DQMA#6 DQMA#7

QSA#6 QSA#7

12

8PCS@

RV76

4.99K_0402_1%

RV84

4.99K_0402_1%

8PCS@

+1.5VS

8PCS@

10U_0603_6.3V

1

CV280

CV284

2

10U_0603_6.3V

8PCS@

Date: Sheet

UV4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96 @

@

12

8PCS@RV76

8PCS@

12

1 CV240

CV240

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

8PCS@

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

2

Title

Size Document Number Rev

CV268

CV266

CV267

1

2

8PCS@

1U_0402_6.3V4Z

8PCS@

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

RV77

4.99K_0402_1%

RV85

4.99K_0402_1%

8PCS@

1U_0402_6.3V4Z

CV270

CV269

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z 8PCS@

8PCS@

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

CV271

1

2

1U_0402_6.3V4Z

1

MDA48 MDA51 MDA55 MDA54 MDA50 MDA52 MDA49

MDA53

MDA63 MDA58 MDA60 MDA59 MDA61 MDA56 MDA62 MDA57

8PCS@RV77

8PCS@

+VREFD_A4+VREFC_A4

1 CV241

CV241

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

8PCS@

CV272

1

2

8PCS@

+1.5VS

42 54Tuesday, February 23, 2010

Group6

Group7

of

C

5

UV6

+VREFC_B1 +VREFD_B1

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12

B_BA041 B_BA141 B_BA241

CLKB041 CLKB0#41 CKEB041

ODTB041 CSB0#_041 RASB0#41 CASB0#41 WEB0#41

QSB3 QSB1

DQMB#3 DQMB#1

QSB#3 QSB#1

12

2PCS@

RV94

4.99K_0402_1% 2PCS@

RV102

4.99K_0402_1%

4.99K_0402_1% 2PCS@

2PCS@

1

CV327

2

1

CV339

4PCS@

2

CLKB0

CLKB0#

CLKB1

CLKB1#

MDB[0..63]

DRAM_RST#41,42

RV90

RV90 243_0402_1%

243_0402_1%

1 2

RV110 56_0402_1%

2PCS@

1 2

RV111 56_0402_1%

2PCS@

0.1U_0402_16V4Z 2PCS@

1 2

RV112 56_0402_1%

4PCS@

1 2

RV113 56_0402_1%

4PCS@

0.1U_0402_16V4Z

5

MDB[0..63]41

D D

C C

B B

A A

MAB[12..0]41

DQMB#[7..0]41

QSB[7..0]41

QSB#[7..0]41

UV6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

+1.5VS +1.5VS +1.5VS +1.5VS +1.5VS +1.5VS +1.5VS +1.5VS

@

12

1 CV287

CV287

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

2PCS@

+1.5VS

1U_0402_6.3V4Z

CV298

1

2

1U_0402_6.3V4Z

2PCS@

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

4.99K_0402_1% 2PCS@

4.99K_0402_1%

1U_0402_6.3V4Z

CV299

CV300

1

2

1U_0402_6.3V4Z

2PCS@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CV301

1U_0402_6.3V4Z

2PCS@

+1.5VS

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

RV95

12

RV103

2PCS@

1U_0402_6.3V4Z

CV302

CV303

1

2

1U_0402_6.3V4Z

2PCS@

10U_0603_6.3V

CV329

4

UV7

CV306

2PCS@

1

2

2PCS@

1

2

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

12

CV307

1U_0402_6.3V4Z

2PCS@

UV7

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96 @

@

1 CV289

CV289

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

2PCS@

1U_0402_6.3V4Z

CV308

1

2

2PCS@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

1U_0402_6.3V4Z

CV310

CV309

1

2

1U_0402_6.3V4Z

2PCS@

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9

VSS

B3

VSS

E1

VSS

G8

VSS

J2

VSS

J8

VSS

M1

VSS

M9

VSS

P1

VSS

P9

VSS

T1

VSS

T9

VSS

B1 B9 D1 D8 E2 E8 F9 G1 G9

RV97

4.99K_0402_1%

RV105

4.99K_0402_1%

4.99K_0402_1% 2PCS@

2PCS@

CV312

CV311

1

2

1U_0402_6.3V4Z

Issued Date

MDB26 MDB28 MDB27 MDB31 MDB25 MDB30 MDB24 MDB29

MDB15 MDB10 MDB12 MDB11 MDB13 MDB9 MDB14 MDB8

+1.5VS +1.5VS

+1.5VS

1 CV288

CV288

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

2PCS@

CV304

1

2

1

CV330

2

10U_0603_6.3V

2PCS@

4

+VREFC_B2 +VREFD_B2

MAB0

Group3

Group1

2PCS@

MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12

B_BA0 B_BA1 B_BA2

CLKB0 CLKB0# CKEB0

ODTB0 CSB0#_0 RASB0# CASB0# WEB0#

QSB2 QSB0

DQMB#2 DQMB#0

QSB#2 QSB#0

DRAM_RST# DRAM_RST# DRAM_RST#

12

RV91

RV91 243_0402_1%

243_0402_1%

1

2

4.99K_0402_1% 2PCS@

4.99K_0402_1%

2PCS@

10U_0603_6.3V

1

CV331

2

2PCS@

RV96

RV104

2PCS@

+1.5VS

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

2PCS@

CV332

10U_0603_6.3V

3

MDB22 MDB20 MDB21 MDB18 MDB19 MDB17 MDB23 MDB16

MDB1 MDB6 MDB0 MDB4 MDB3 MDB7 MDB2 MDB5

+1.5VS

12

2PCS@RV97

2PCS@

12

2PCS@

UV8

+VREFC_B3 +VREFD_B3

MAB0

Group2

Group0

RV92

RV92 243_0402_1%

243_0402_1%

1 CV290

CV290

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12

B_BA0 B_BA1 B_BA2

CLKB141 CLKB1#41 CKEB141

ODTB141 CSB1#_041 RASB1#41 CASB1#41 WEB1#41

QSB4 QSB5

DQMB#4 DQMB#5

QSB#4 QSB#5

12

4PCS@

RV98

4.99K_0402_1%

RV106

4.99K_0402_1%

4.99K_0402_1% 4PCS@

4PCS@

+1.5VS

1

+

CV328

CV328 330U_X_2VM_R6M

330U_X_2VM_R6M 2PCS@

2PCS@

2

2008/10/01 2009/10/01

UV8

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96 @

@

12

4PCS@RV98

4PCS@

12

1 CV291

CV291

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

4PCS@

+1.5VS

1U_0402_6.3V4Z

CV295

CV314

1

2

1U_0402_6.3V4Z

4PCS@

Deciphered Date

1U_0402_6.3V4Z 4PCS@

4PCS@

Compal Secret Data

RV99

4.99K_0402_1%

RV107

4.99K_0402_1%

4.99K_0402_1% 4PCS@

4PCS@

1U_0402_6.3V4Z

CV315

1

2

4PCS@

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

12

4PCS@RV99

4PCS@

12

1U_0402_6.3V4Z

CV316

1

2

1U_0402_6.3V4Z

4PCS@

+1.5VS

2

UV9

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

K4W1G1646E-HC12_FBGA96 @

@

RV101

4.99K_0402_1%

RV109

4.99K_0402_1%

4.99K_0402_1% 4PCS@

4PCS@

1U_0402_6.3V4Z

CV296

CV321

CV322

1

2

1U_0402_6.3V4Z

4PCS@

CV337

10U_0603_6.3V

CV322

1

2

1U_0402_6.3V4Z

4PCS@

1

2

4PCS@

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

Group4

Group5

RV93

RV93 243_0402_1%

243_0402_1%

RV100

RV108

4PCS@

1

CV335

2

10U_0603_6.3V

4PCS@

+VREFC_B4 +VREFD_B4

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12

B_BA0 B_BA1 B_BA2

CLKB1 CLKB1# CKEB1

ODTB1 CSB1#_0 RASB1# CASB1# WEB1#

QSB6 QSB7

DQMB#6 DQMB#7

QSB#6 QSB#7

12

4PCS@

12

4PCS@RV100

4PCS@

12

1 CV293

CV293

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

4PCS@

+1.5VS

4PCS@

10U_0603_6.3V

1

CV336

2

4PCS@

Title

Size Document Number Rev

Custom

Date: Sheet

MDB34

E3

MDB37

F7

MDB32

F2

MDB39

F8

MDB35

H3

MDB38

H8

MDB33

G2

MDB36

H7

MDB44

D7

MDB43

C3

MDB47

C8

MDB41

C2

MDB45

A7

MDB40

A2

MDB46

B8

MDB42

A3

+1.5VS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VS +1.5VS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

4.99K_0402_1%

+VREFD_B3+VREFC_B3 +VREFD_B4+VREFC_B4+VREFC_B2 +VREFD_B2+VREFC_B1 +VREFD_B1

1 CV292

CV292

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

4PCS@

CV317

1

2

CV318

CV319

1

2

1U_0402_6.3V4Z

10U_0603_6.3V

CV334

CV334 4PCS@

4PCS@

4.99K_0402_1%

1

2

1

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

12

4PCS@RV101

4PCS@

12

1 CV294

CV294

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

4PCS@

1U_0402_6.3V4Z

CV323

CV297

1

2

1U_0402_6.3V4Z

4PCS@

1

MDB52

E3

MDB51

F7

MDB55

F2

MDB48

F8

MDB53

H3

MDB49

H8

MDB54

G2

MDB50

H7

MDB56

D7

MDB59

C3

MDB63

C8

MDB62

C2

MDB57

A7

MDB61

A2

MDB58

B8

MDB60

A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CV324

CV325

1

2

1U_0402_6.3V4Z

43 54Tuesday, February 23, 2010

+1.5VS

of

Group6

Group7

C

5

GPU by the system BIOS GPU by VBIOS

GPIO22 = 0 (BIOS_ROM_EN = 0)

GPIO[13:11]

D D

0 0 0 0 0 1 0 1 0

C C

MEMORY SIZE

128MB 256MB 64MB

GPIO22 = 1 (BIOS_ROM_EN = 1)

GPIO[13:11]

1 0 0

(M25P05A)

4

STRAPS

GPU_GPIO037 GPU_GPIO137 GPU_GPIO237 SOUT_GPIO837 SIN_GPIO937

ROMSE_GPIO2237

GPU_GPIO1137 GPU_GPIO1237 GPU_GPIO1337

R_VSYNC17,37

R_HSYNC17,37 HSYNC_DAC237 VSYNC_DAC237

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 SOUT_GPIO8 SIN_GPIO9

GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

RV114 10K_0402_5%@RV114 10K_0402_5%@ RV115 10K_0402_5%@RV115 10K_0402_5%@ RV116 10K_0402_5%@RV116 10K_0402_5%@ RV117 10K_0402_5%@RV117 10K_0402_5%@ RV118 10K_0402_5%@RV118 10K_0402_5%@ RV119 10K_0402_5%@RV119 10K_0402_5%@

RV120 10K_0402_5%RV120 10K_0402_5% RV121 10K_0402_5%@RV121 10K_0402_5%@ RV122 10K_0402_5%@RV122 10K_0402_5%@

RV123 10K_0402_5%HDMI@ RV123 10K_0402_5%HDMI@ RV124 10K_0402_5%HDMI@RV124 10K_0402_5%HDMI@ RV125 10K_0402_5%@RV125 10K_0402_5%@ RV126 10K_0402_5%@RV126 10K_0402_5%@

3

12 12 12 12 12 12

12 12 12

12 12 12 12

GPIO5_AC_BATT TEST

+3VS_DELAY

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

BIF_GEN2_EN_A

BIF_CLK_PM_EN

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA VSYNC_DAC2 IGNORE VIP DEVICE STRAPS

AUD[1]

RSVD

CONFIGURATION STRAPS

GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED

GPIO2

GPIO8

GPIO9 VGA Controller ENABLEDBIF_VGA DIS

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

HSYNC VSYNCAUD[0]

HSYNC_DAC2

GENERICC 0RSVD

2

DESCRIPTION OF DEFAULT SETTINGSPIN

PCIE GNE2 ENABLED

BIF_CLK_PM_EN 0

Enable Extermal BIOS device

ROM Configurations

AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort and HDMI if dongle is detected 1 0 Audio for DisplayPort only 1 1 Audio for both DisplayPort and HDMI

1

RECOMMENDED SETTINGS

0

0 (Enable)

0

010

0

1 1

0

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

GENERICC

GPIO21_BB_EN

+1.8VS

HSYNC_DAC2

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

GPIO_28_TDO

12

RV129

RV129 10K_0402_5%

10K_0402_5% @

@

B B

12

RV134

RV134 10K_0402_5%

10K_0402_5% @

@

12

RV130

RV130 10K_0402_5%

10K_0402_5% @

@

12

RV136

RV136 10K_0402_5%

10K_0402_5% @

@

12

RV132

RV132 10K_0402_5%

10K_0402_5% @

@

12

RV135

RV135 10K_0402_5%

10K_0402_5% @

@

12

RV133

RV133 10K_0402_5%

10K_0402_5%

12

RV137

RV137 10K_0402_5%

10K_0402_5% @

@

VRAM_ID0 37 VRAM_ID1 37 VRAM_ID2 37 VRAM_DEC 37

DDR3

VRAM_DEC 1

STRAPS

VRAM_ID[2:0]

DVPDATA (3,2,1)

GPU VRAM size Compal Part Number#

M92-M2 XT

M96-M2

M92-M2 XT

M96-M3

M92-M2 XT

512M 64Mx16 (x4)

1G 64Mx16 (x8)

256M 64Mx16 (x2)

512M 64Mx16 (x4)

1G 64Mx16 (x8)

256M 64Mx16 (x2)

Vendor Part Number#

HYN H5TQ1G63BFR-12C SA000032400

SA000035700SAM K4W1G1646E-HC12

VRAM_ID 2,1,0

0 0 0

0 0 1

0 1 0

1 0 0

0 1 1

1 0 1

External VGA Thermal Sensor

+3VS

UV1

1 2

RV198 0_0402_5%

THM@

A A

GPU_THERMAL_D+37

GPU_THERMAL_D-37

THM@

0.1U_0402_16V4Z

2200P_0402_50V7K

5

CV341

1 2

CV340

THM@CV341

THM@

1

2 THM@

THM@

UV11

1

VDD

2 3

SCLK

D+

SDATA

ALERT#

DTHERM#4GND

ADM1032ARMZ-2REEL_MSOP8

THM@

8 7 6 5

4

EC_SMB_CK2 7,33,34 EC_SMB_DA2 7,33,34 THERM#_VGA 37

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

UV1

M92-XT

M92@

Compal Secret Data

2008/10/01 2009/10/01

3

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

44 54Tuesday, February 23, 2010

1

C

of

A

B

C

D

PD1

PR20

2.2M_0402_5%

12

VS

12

PR2

5.6K_0402_5%

12

PR12 1K_1206_5%

1 2

PR14 1K_1206_5%

1 2

PR16 1K_1206_5%

1 2

12

PR23

10K_0402_1%

PR25

@PR25

@

66.5K_0402_1%

RTCVREF

PR4

10K_0402_1%

1 2

PACIN

12

PR7

PR7 10K_0402_1%

10K_0402_1%

Vin Detector

High 18.384 17.901 17.430 Low 17.728 17.257 16.976

12

PR17

PR17 499K_0402_1%

499K_0402_1%

12

PR24

12

13

D

S

PR24 499K_0402_1%

499K_0402_1%

PR26

PR26 191K_0402_1%

191K_0402_1%

47K_0402_1%

2

G

PQ2

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

13

PQ3

PQ3 DTC115EUA_SC70-3

DTC115EUA_SC70-3

ACIN 22,33,34

PACIN 47

B+

12

PC11

PC11 1000P_0402_50V7K

1000P_0402_50V7K

PR27

12

2

+5VALWP

PACIN

PL1

SMB3025500YA_2P

12

PC2

100P_0402_50V8J

100P_0402_50V8J <BOM Structure>

PR9

68_1206_5%

13

PJ2

112

JUMP_43X118@

JUMP_43X118@ PJ3

PJ3

112

JUMP_43X118@

PJ6

112

JUMP_43X118@

PJ9

112

JUMP_43X118@

PJ12

112

JUMP_43X118@

PL1

1 2

VIN

PD2

PD2 RLS4148_LL34-2

RLS4148_LL34-2

1 2 12

12

PC8

0.1U_0603_25V7K

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K <BOM Structure>

12

PR10

PR10 68_1206_5%

68_1206_5%

RTC Battery

-+

SP093MX0000

+NB_CORE+NB_COREP

+1.5VS+1.5VSP

PF1

10A_125V_451010MRL

PD3

RLS4148_LL34-2

PR11

200_0603_5%

1 2

PR13

100K_0402_1%

1 2

PR15

22K_0402_1%

3.3V

12

PC9

PC9 10U_0805_10V4Z

10U_0805_10V4Z

+5VALW

+0.9V+0.9VP

PF1

21

12

PU2 G920AT24U_SOT89-3

3

OUT

GND

DC_IN_S2

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K <BOM Structure>

PQ1

PQ1 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

N1

PC7

0.22U_1206_25V7K

IN

1

+1.8VP +1.8V

+1.2VALWP +1.2VALW

2

12

PR18

PR18 200_0603_5%

200_0603_5%

N2

2

12

PC10

1U_0805_25V4Z

2

(8A,320mils ,Via NO.= 16) OCP(min) = 8.87A

2

( 7A, 280mils , Via NO.=14 ) OCP(min) = 8.45A

2

(5A,200mils ,Via NO.=10) OCP(min) = 8.52A

2

(9A,360mils ,Via NO.=18) OCP(min) = 9.69A

DC301001M80

PJP1

1

+

2

+

SINGA_2DW-0005-B03@

PR21

560_0603_5%

1 2

2

3

-

4

-

51_ON#34

PJ1

JUMP_43X118@

1 1

2 2

+CHGRTC

3 3

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

BATT+

CHGRTCP

PR22

560_0603_5%

1 2

112

DC_IN_S1

RTCVREF

OCP(min) = 7.7A

PJ5

+5VALWP

+VSBP +VSB

2

112

JUMP_43X118@

(5A,200mils ,Via NO.= 10) OCP(min) = 7.9A

JUMP_43X118@

PJ8

2

112

JUMP_43X39@

(120mA,40mils ,Via NO.= 1)

PJ11

2

112

JUMP_43X79@

4 4

(3A,120mils ,Via NO.= 6)

JUMP_43X79@

VIN

12

PC4

PC4 100P_0402_50V8J

100P_0402_50V8J <BOM Structure>

PC5

0.068U_0402_10V6K

VS

PBJ1

MAXEL_ML1220T10@

+3VLP +3VL

VL +5VL

+2.5VSP +2.5VS

+VDDNBP +VDDNB

+RTCBATT

12

PJ23

2

JUMP_43X39@

(100mA,40mils ,Via NO.= 2)

(1A,40mils ,Via NO.= 2)

(4A, 160mils, Via NO.= 8)

JUMP_43X39@

PJ4

2

JUMP_43X39@

PJ7

2

JUMP_43X39@

PJ10

2

JUMP_43X79@

+RTCBATT

112

12

EN07,48 ACON47

VIN

12

PR3

84.5K_0402_1%

12

PR6

PR6 20K_0402_1%

20K_0402_1%

PR5

22K_0402_1%

1 2

12

PC6

PC6 .1U_0402_16V7K

.1U_0402_16V7K <BOM Structure>

VIN

PR19

100K_0402_1%

1 2

VL

PD5

RB715F_SOT323-3

2

1

3

1000P_0402_50V7K

+VGA_COREP +VGA_CORE

(20.14A,840mils ,Via NO.=42)

PR1

1M_0402_1%

1 2

N1

8

PU1A

3

P

+

O

2

-

G

LM393DG_SO8

4

12

PR8

10K_0402_1%

PD4

RLS4148_LL34-2

PU1B

7

O

LM393DG_SO8

12

PC12

1000P_0402_50V7K

Precharge detector

15.97V/14.84V FOR ADAPTOR

PJ31

2

JUMP_43X118@

PJ32

2

JUMP_43X118@

1

RTCVREF

3.3V

12

8

4

112

GLZ4.3B_LL34-2

N3

5

P

+

6

-

G

PC13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2009/9/252008/9/25

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

D

45 54Tuesday, February 23, 2010

C

of

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 95 degree C Recovery at 57 degree C

21

+3VLP

BATT_TEMPA 33

EC_SMB_DA1 19,33 EC_SMB_CK1 19,33

VMB

SMB3025500YA_2P

1 2

12

PC14

PC14 1000P_0402_50V7K

1000P_0402_50V7K

12

PR40

PR40 100K_0402_1%

100K_0402_1%

VL

47K_0402_1%

47K_0402_1% 1 2

8

PU3A

3

P

+

2

-

G

LM393DG_SO8

4

PR38

100K_0402_1%

PL2

BATT+

12

PC15

0.01U_0402_25V7K

100K_0402_1%_NCP15WF104F03RC

PH1

12

PC17

0.22U_0805_16V7K

VL

12

0.1U_0603_25V7K

12

PR36

PR33

13.7K_0402_1%

13.7K_0402_1% 1 2

15K_0402_1%

PC16

TM_REF1

12

PC18

1000P_0402_50V7K

PR31

O

12

VL

PR30

PR30 47K_0402_1%

47K_0402_1%

1 2

PD6

1

VL

PD6

RLS4148_LL34-2

2

G

12

2

G

13

D

PQ4

PQ4 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

13

D

PQ5

PQ5 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

ENTRIP1 48

ENTRIP2 7,48

PH2 near main Battery CONN :

1 1

2 2

Liverpool

PJP2

10

GND

11

GND

12

GND

13

GND

SUYIN_200045MR009G171ZR

@

Sunderland

PJP3

10

GND

11

GND

12

GND

13

GND

SUYIN_200045MR009G171ZR

@

PF2

15A_65V_451015MRL

1 2

PR28

1K_0402_1%

1

PR37

PR39

15A_65V_451015MRL

1 2

47K_0402_1%

12

PR29

+3VLP

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

EC_SMDA EC_SMCA

BATT_S1

BATT_P3 BATT_P4 BATT_P5 EC_SMDA EC_SMCA

100_0402_1%

BATT_P3 BATT_P4 BATT_P5

PR34

12

PR32

PR32 1K_0402_1%

1

PD16

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3 @

@

2

3

PR35

PR35 100_0402_1%

100_0402_1%

1 2

1K_0402_1%

PD15

2 3

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3 @

@

6.49K_0402_1%

1K_0402_1%

1 2

BATT_S1

1

2

BAT. thermal protection at 98 degree C Recovery at 60 degree C

VL

PQ6

TP0610K-T1-E3_SOT23-3

VL

1 2

B+

PR48

PR48 0_0402_5%

0_0402_5%

1 2

12

2

G

PC22 @ PC22

@

.1U_0402_16V7K

PR45

22K_0402_1%

1 2

13

D

PQ7

PQ7 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

3 3

PR47

100K_0402_1%

POK48,49

4 4

A

12

PR43

100K_0402_1%

12

PC19

@PC19

@

0.22U_1206_25V7K

B

13

2

+VSBP

12

PC20 @ PC20

@

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

100K_0402_1%_NCP15WF104F03RC

0.22U_0805_16V7K

PH3

@ PH3

@

PC21

Compal Secret Data

12

PH2

PH2 100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

14K_0402_1%

1 2

12

PR46

13.7K_0402_1%

Deciphered Date

C

PR44

TM_REF1

2009/9/252008/9/25

47K_0402_1%

1 2

5

+

6

-

VL

PR41

PR41 47K_0402_1%

PR42

8

P

G

4

47K_0402_1%

1 2

PU3B

7

O

LM393DG_SO8

Title

Size Document Number Rev

Date: Sheet

PD7

12

RLS4148_LL34-2

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

D

46 54Tuesday, February 23, 2010

C

of

A

PQ8

AO4407A_SO8

DTA144EUA_SC70-3

12

PR53

PR53 47K_0402_1%

47K_0402_1%

2

13

D

PQ16

PQ16 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

8 7

5

PACIN

DTC115EUA_SC70-3

ACOFF

VIN

1 1

2

G

2 2

PACIN45 ACON45

ACOFF33

PQ12

2

13

22K_0402_5%

1 2

4

PQ15

PQ15 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR67

PQ21

1 2 36

1 3

2

P2

12

PC27

0.1U_0603_25V7K

2

G

13

1 2 3 6

12

PR50

PR50 200K_0402_1%

200K_0402_1%

5600P_0402_25V7K

12

PR58

PR58 150K_0402_1%

150K_0402_1%

13

D

PQ19

PQ19 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

IREF33

PQ9

AO4407A_SO8

4

FSTCHG33

8 7

5

PC26

1 2

CSON

PC36

1 2

0.01U_0402_25V7K

PR68

154K_0402_1%

12

PR71

120K_0402_1%

P3

PR54

100K_0402_1%

PD10

1SS355_SOD323-2

1 2

PR57

10K_0402_1%

1 2

PC29

.1U_0402_16V7K

PC33

680P_0402_50V7K@

1 2

PC34 6800P_0402_25V7K

1 2

PR63 6.81K_0402_1%

1 2

100P_0402_50V8J@

PC38 .1U_0402_16V7K

ADP_I33

12

6251VREF

12

PC42

0.01U_0402_25V7K

CHGVADJ33

3 3

PR49=0.02, PR70=75k, PR73=20kIada=0~3.421A(65W) CP=3.15A Iada=0~3.947A(75W) CP=3.63A Iada=0~4.737A(90W) Iada=0~6.316A(120W)

CP=4.36A CP=5.81A

PR49=0.02, PR70=24k, PR73=20k

PR49=0.015, PR70=53.6k, PR73=20k

PR49=0.015, PR70=8.25k, PR73=26.7k CP= 92%*Iada

CP mode

Vaclim=2.39*(Rb//152K/(Rt//152K+Rb//152K)) Iinput=(1/PR49)((0.05*Vaclm)/2.39+0.05)

where Vaclm=1.09986V, Iinput=3.65A Vaclm=0.7717V, Iinput=4.41A Vaclm=0.4204V, Iinput=5.88A

CC=0.25A~3A IREF=1.016*Icharge IREF=0.254V~3.048V VCHLIM need over 95mV

4 4

CHGVADJ=(Vcell-4)/0.10627

Vcell 4V

4.2V

4.35V

CHGVADJ

0V

1.882V

3.2935V

B

PR49

0.015_2512_1%

1 2

PQ11 TP0610K-T1-E3_SOT23-3

12

6251VDD

12

PC37

1 2

53.6K_0402_1%

1 2

20K_0402_1%

15.4K_0402_1%

15.4K_0402_1% 1 2

47K_0402_1%

47K_0402_1% 1 2

PR70

PR73

PR74

PR75

31.6K_0402_1%

B+

4 3

PR203

10_0603_5%

13

100K_0402_1%

12

PR56

1

2

3

4

5

6

7

8

9

10

11

12

10_0603_5%

1 2

PU4

VDD

ACSET

EN

CELLS

ICOMP

VCOMP

ICM

VREF

CHLIM

ACLIM

VADJ

GND

ISL6251AHAZ-T_QSOP24

12

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

PD14

@ PD14

@

GLZ4.3B_LL34-2

DCIN

24

23

22

21

20

19

18

17

16

15

14

13

2

PC28

2.2U_0603_6.3V6K

PR59

100K_0402_1%

6251_EN CSON

PR65

6251VREF

6251aclim

12

PJ13

2

JUMP_43X79@

PQ13

PQ13 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PD9

2

1

RB715F_SOT323-3

PC30

0.1U_0603_25V7K

DCIN

PC32

0.047U_0603_16V7K

0.047U_0603_16V7K 1 2

1 2

PR61

20_0603_5%

PC35

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

PR69

2.2_0603_5%

BST_CHG

1 2

6251VDDP

DL_CHG

1 2

PR171

309K_0402_1%

12

PR172

47K_0402_1%

112

FSTCHG

2 3

12

PR60

20_0603_5%

20_0603_5% 1 2

PR62

20_0603_5%

1 2

PR64

2.2_0603_5%

0.1U_0603_25V7K

BST_CHGA

12

PD12

PD12 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PC43

4.7U_0805_6.3V6K

VIN

12

CSIN

CSIP

SUSP# 27,29,33,35,49,50,52

PR72

4.7_0603_5%

12

PC130

.1U_0402_16V7K

C

1 2

1 2 13

PL3

3 6

1 2 3 6

PR51

47K_0402_1%

1 2

1SS355_SOD323-2

2

1 2

1SS355_SOD323-2

0.1U_0603_25V7K

CHG

CHG_B+

12

PC24

PC23

10U_1206_25V6M

CSOP

12

PC39

12

6251VDD

PR202

10K_0402_1%

1 2

10U_1206_25V6M

578

3 6

241

578

3 6

241

ADP_V 33

PR52

10K_0402_1%

PQ14

DTC115EUA_SC70-3

PQ18

PQ18 AO4466_SO8

AO4466_SO8

10U_LF919AS-100M-P3_4.5A_20%

PQ20

PQ20 AO4466_SO8

AO4466_SO8

12

PR170

4.7_1206_5%

12

PC129

PC129 680P_0603_50V7K

680P_0603_50V7K

1 2

AO4407A_SO8

4

AO4407A_SO8

4

PD8

1 2

PD11

PC31

PR66

0.02_2512_1%

1 2

D

PQ10

8 7

5

PQ45

@PQ45

@

8 7

5

VIN

ACOFF

PR55

200K_0402_1%

1 2

12

4 3

VIN

13

D

PACIN

2

G

PQ17

S

SSM3K7002FU_SC70-3

PC40

10U_1206_25V6M

90W 4407A*1 120W 4407A*2

BATT+

12

PC41

10U_1206_25V6M

CELLS

CELL number

VDD

4

GND Float

-

3

2

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/9/25 2009/9/25

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

D

47 54Tuesday, February 23, 2010

of

C

5

4

3

2

1

AO4712 Rds(on) = 15/18

D D

Ipeak = 5A Imax = 3.5A F = 305K

B++

PJ30

12

PC179

0.1U_0402_25V6

2

112

JUMP_43X118@

12

PC48

PC49

4.7U_1206_25V6K

2200P_0402_50V7K

+3VALWP

12

PC50

4.7U_1206_25V6K

4.7U_LF919AS-4R7M-P3_5.2A_20%

1

+

PC54

2

220U_6.3VM_R15

PL5

1 2

PR84

@ PR84

@

4.7_1206_5%

PC56

@ PC56

@

680P_0603_50V7K

PQ23

PQ23 AO4466_SO8

AO4466_SO8

12

241

578

3 6

578

3 6

PQ24

PQ24 AO4712_SO8

AO4712_SO8

.1U_0402_16V7K

EN07,45

B+

C C

B+

PC51

4.7U_0805_10V6K

PC52

499K_0402_1%

+3VLP

12

1 2

0_0603_5%

PR86

1 2

PR82

Total capacitor 220uF

B B

ESR = 15mohm

PQ26

SSM3K7002FU_SC70-3

PQ26

ENTRIP2 7,46ENTRIP1 46

13

D

2

G

S

2

G

13

D

PQ27

PQ27 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PR87 PR87

100K_0402_1%

12

2VREF_51125

150K_0402_1%

BST_3V UG_3V LX_3V LG_3V

12

PC180 @ PC180

@

1U_0402_6.3V6K

PR76

13K_0402_1%

1 2

PR78

20K_0402_1%

1 2

PR80

1 2

PU5

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

2VREF_51125

12

PC44

0.22U_0603_10V7K

ENTRIP2

6

5

VFB2

ENTRIP2

SKIPSEL

EN0

14

13

1 2

PR88

0_0402_5%@

B++

Ipeak = 5A Imax = 3.5A F = 245K

PR77

30K_0402_1%

1 2

PR79

19.1K_0402_1%

1 2

PR81

150K_0402_1%

ENTRIP1

1 2

1

3

2

4

VFB1

VREF

TONSEL

GND

15

ENTRIP1

24

VO1

23

PGOOD

VBST1

DRVH1

LL1

DRVL1

VREG5

VIN

VCLK

TPS51125RGER_QFN24_4X4

17

16

18

12

PC58

12

4.7U_0805_10V6K

PC59

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

VL

PC45

PR83

1 2

0_0603_5%

B++

12

PC46

4.7U_1206_25V6K

POK 46,49

PC53

.1U_0402_16V7K

1 2

4.7U_1206_25V6K

2200P_0402_50V7K

12

PC47

4.7U_1206_25V6K

AO4712_SO8

PQ25

578

PQ22

AO4466_SO8

3 6

241

PL6

4.7U_LF919AS-4R7M-P3_5.2A_20%

1 2

578

3 6

12

PR85

@ PR85

@

4.7_1206_5%

12

PC57

@ PC57

@ 680P_0603_50V7K

241

680P_0603_50V7K

1

+

2

+5VALWP

PC55

220U_6.3VM_R15

Total capacitor 220uF ESR = 15mohm

0.1U_0603_25V7K

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Schematic, M/B LA-5331P

Tuesday, February 23, 2010

401716

1

48 54

of

C

VL

100K_0402_1%

1 2

VS

PR90

100K_0402_1%

A A

5

PR89

12

PR91

49.9K_0402_1%

12

13

D

PQ28

2

G

SSM3K7002FU_SC70-3

G

SSM3K7002FU_SC70-3

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/9/25 2009/9/25

3

5

D D

PR93

33K_0402_1%

1 2

PR96

PC65

12

PR101

1 2

0_0402_5%

PR104

100_0603_1%

1 2

4.7U_0603_6.3V6K

12

PC62

PC62 .1U_0402_16V7K

.1U_0402_16V7K

PC68

@ PC68

@ 47P_0402_50V8J

47P_0402_50V8J

1 2

PR98

9.53K_0402_1%

9.53K_0402_1% 1 2

PR99

20.5K_0402_1%

12

PC71

@PC71

@

.1U_0402_16V7K

12

PC74

+3VS

47P_0402_50V8J

12.1K_0402_1%

12

PR107

20.5K_0402_1%

SUSP#27,29,33,35,47,50,52

100_0603_1%

1 2

+5VALW

C C

B B

A A

4.7U_0603_6.3V6K

POK46,48

+5VALW

PCIE_OK39

PC77

@PC77

@

1 2

PR106

1 2

4

PR201

100K_0402_5%

1 2

3

NB_B+

578

PQ29

AO4466_SO8

PC63

1 2

0.1U_0603_25V7K

+5VALW

12

PC67

4.7U_0805_10V6K

PC72

1 2

0.1U_0603_25V7K

+5VALW

12

PC76

4.7U_0805_10V6K

PQ30

AO4712_SO8

PQ31

AO4466_SO8

PQ32

AO4712_SO8

3 6

578

3 6

578

3 6

578

3 6

241

PR92

255K_0402_1%

1 2

1

TON VOUT V5FILT VFB PGOOD

15

TP

EN_PSV

GND7PGND

PR100

255K_0402_1%

1 2

1

15

TP

EN_PSV

GND7PGND

8

PU6

2 3 4 5 6

PU7

2 3 4 5 6

PR94

0_0603_5%

1 2

14

13 12 11

1 2

15.4K_0402_1%

10

DL_NB

9

PR102

0_0603_5%

1 2

13 12 11

1 2

15.4K_0402_1%

10

DL_1.2V

9

DH_NB LX_NB

PR97

DH_1.2V LX_1.2V

PR105

VBST

DRVH

LL

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3.5x3.5

14

VBST

DRVH

LL

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3.5x3.5

BST_NB

BST_1.2V

12

PC60

4.7U_1206_25V6K

PL7

1.8UH_SIL104R-1R8PF_9.5A_30%

1.8UH_SIL104R-1R8PF_9.5A_30% 1 2

12

PR95

4.7_1206_5%

12

PC66

680P_0603_50V7K

1.2V_B+

12

PC69

4.7U_0805_25V6-K

PL8

2.2UH_PCMC063T-2R2MN_8A_20%

2.2UH_PCMC063T-2R2MN_8A_20% 1 2

12

PR103

4.7_1206_5%

12

PC75

680P_0603_50V7K

2

PJ14

12

PC61

PC177

4.7U_1206_25V6K

2

JUMP_43X118@

12

0.1U_0402_25V6

B+

112

Ipeak = 7A Imax = 4.9A

1

F = 315K

+1.1V

+NB_COREP

Total capacitor 550uF

112

ESR = 30mohm

B+

1

+

PC64

2

220U_6.3VM_R15

PJ15

12

PC70

1

PC173

2

100U_25V_M

4.7U_0805_25V6-K

2

JUMP_43X118@

+

Ipeak = 5A Imax = 3.5A F = 315K

+1.2VALWP

PC73

220U_6.3VM_R15

1

+

2

Total capacitor 220uF ESR = 15mohm

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/9/25 2009/9/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

49 54Tuesday, February 23, 2010

1

C

of

5

D D

SYSON27,33,35

+5VALW

C C

PR109

0_0402_5%

1 2

PR112

100_0603_1%

1 2

4.7U_0603_6.3V6K

PC83

12

PC80

@ PC80

@

.1U_0402_16V7K

12

PC85

@ PC85

@ 47P_0402_50V8J

47P_0402_50V8J

1 2

PR114

28.7K_0402_1%

28.7K_0402_1% 1 2

12

PR115

20.5K_0402_1%

2 3 4 5 6

PU8

TON VOUT V5FILT VFB PGOOD

4

PR108

255K_0402_1%

1 2

1

15

14

TP

EN_PSV

GND7PGND

TPS51117RGYR_QFN14_3.5x3.5

8

VBST

DRVH

TRIP

V5DRV

DRVL

LL

PR110

0_0603_5%

1 2

13 12 11

1 2

15.4K_0402_1%

10

DL_1.8VP

9

BST_1.8VP DH_1.8VP LX_1.8VP

PR113

PC81

1 2

0.1U_0603_25V7K

+5VALW

12

PC86

4.7U_0805_10V6K

PQ33

AO4466_SO8

PQ34

AO4712_SO8

3

578

3 6

578

3 6

241

1.8UH_SIL104R-1R8PF_9.5A_30%

241

51117_B+

12

1 2

12

PR111

12

PC84

12

PC78

4.7U_1206_25V6K

PL9

4.7_1206_5%

680P_0603_50V7K

SYSON#35

PC79

4.7U_1206_25V6K

12

PC178

0.1U_0402_25V6

PC82

PR121

0_0402_5%

1 2

.1U_0402_16V7K

2

JUMP_43X118@

1

+

2

220U_6.3VM_R15

4.7U_0805_6.3V6K

PC96

@PC96

@

12

PJ16

+1.8VP

PC89

2

112

+1.8V

1

2

12

13

D

G

S

B+

Ipeak = 8A Imax = 5.6A F = 315K

PJ18

PJ18 JUMP_43X79@

JUMP_43X79@

12

PR117

1K_0402_1%

12

PR119

1K_0402_1%

PQ36

PQ36 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Total capacitor 220uF ESR = 15mohm

PU10

2 3 4

APL5331KAC-TRL_SO8

12

PC94

PC94 10U_0805_6.3V6M

10U_0805_6.3V6M

PC91

.1U_0402_16V7K

12

VIN1VCNTL GND VREF VOUT

+0.9VP

1

6 5

NC

7

NC

8

NC

9

TP

+3VALW

12

PC90

PC90 1U_0603_6.3V6M

1U_0603_6.3V6M

12

PC139

.1U_0402_16V7K

12

Imax=7.25A Ipeak=10.30A Iocp=11.34A

PC144

@PC144

@

47P_0402_50V8J

1 2

PR180

20.5K_0402_1%

20.5K_0402_1% 1 2

12

PR181

20.5K_0402_1%

PR6=17.4K

DDR3

M96

M92 DDR3

B B

SUSP#27,29,33,35,47,49,52

+5VALW

A A

1.5VS

PR175

33K_0402_5%

1 2

PR178

100_0603_1%

100_0603_1% 1 2

4.7U_0603_6.3V6K

5

PC141

FSW=312KHz

1.5VSP_B+

578

PQ46

AO4466_SO8

PR174

255K_0402_1%

1 2

1

PU13

2

TON

EN_PSV

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

GND7PGND

4

PR176

2.2_0603_1%

1 2

15

14

TP

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

8

BST_1.5VSP

DH_1.5VSP LX_1.5VSP

1 2

PR179

17.4K_0402_1%

DL_1.5VSP

3 6

241

PC140

1 2

0.1U_0603_25V7K

+5VALW

AO4712_SO8

12

PC145

4.7U_0805_10V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PQ47

578

3

3 6

241

12

PC136

PC137

4.7U_1206_25V6K

PL14

1.8UH_SIL104R-1R8PF_9.5A_30%

1.8UH_SIL104R-1R8PF_9.5A_30% 1 2

12

PR177

@

PR177

@

4.7_1206_5%

12

PC142

@

680P_0603_50V7K

Compal Secret Data

2008/9/25 2009/9/25

Compal Secret Data

4.7U_1206_25V6K

PJ33

2

112

JUMP_43X118@

1

+

PC143

2

220U_6.3VM_R15

Deciphered Date

12

+1.5VSP

B+

PC138

@

680P_0402_50V7K

Ipeak = 9A Imax = 6.3A F = 315K

PJ19

+3VS

112

JUMP_43X39@

2

Total capacitor 880uF ESR = 2.5mohm

PU11

APL5508-25DC-TRL_SOT89-3

2

PC97

1U_0603_10V6K

Date: Sheet

2

IN

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Compal Electronics, Inc.

Schematic, M/B LA-5331P

GND

1

401716

OUT

3

1

12

PC98

4.7U_0805_6.3V6K

of

50 54Tuesday, February 23, 2010

of

50 54Tuesday, February 23, 2010

of

50 54Tuesday, February 23, 2010

+2.5VSP

C

A

1 1

+5VS +3VS

12

PR131

PR131 0_0402_5%

0_0402_5%

12

PR135

PR146

95.3K_0402_1%

CPU_VDD0_RUN_FB_H7 CPU_VDD0_RUN_FB_L7 CPU_VDD1_RUN_FB_L7

VW0

12

PC122

180P_0402_50V8J

PC127

12

1200P_0402_50V7K

PR135 10K_0402_1%@

10K_0402_1%@

12

COMP0

CPU_VDD1_RUN_FB_H7

12

PR134

105K_0402_1%

2 2

H_PWRGD7,20 SB_PWRGD21,33

VR_ON33

3 3

PR160

255_0402_1%

4 4

CPU_SVD7 CPU_SVC7

DIFF_0

PC121

4700P_0402_25V7K

12

PR162

1K_0402_5%

VGATE33

PR145

21.5K_0402_1%

12

A

1 2

PR139 0_0402_5%@ PR139 0_0402_5%@

1 2

PR140 0_0402_5%

12

FB_0

PR163

54.9K_0402_1%

12

PR168

36.5K_0402_1%@

+5VS

CPU_B+

12

PR132

PR132 105K_0402_1%@

105K_0402_1%@

12

PR137

PR137 105K_0402_1%@

105K_0402_1%@

ISL6265_PWROK

12

PR142

0_0402_5%

PR144

0_0402_5%

12

PC123

1000P_0402_50V7K

PR164

6.81K_0402_1%

6.81K_0402_1% 12

0.1U_0603_25V7K

0_0402_5%

PR123

2_0603_5%

1 2

PC105

0.1U_0603_16V7K

1 2

PR128

2_0603_5%

PC109

PU12

1 2 3 4 5

12

6 7 8

9 10 11 12

ISP0 ISN0

PR149

VSEN0

12

RTN1

12

PR151 0_0402_5%PR151 0_0402_5%

+1.8V

B

12

OFS/VFIXEN PGOOD PWROK SVD SVC ENABLE RBIAS OCSET VDIFF0 FB0 COMP0 VW0

0_0402_5%

PR150

PR161

@PR161

@

255_0402_1%

B

44.2K_0402_1%

12

48

47

46

VIN

VCC

FB_NB

ISL6265AHRTZ-T_TQFN48_6X6

VSEN0

ISN0

ISP0

15

14

13

RTN0

12

PR173 @ PR173

@

1 2

1K_0402_1%

PR157

0_0402_5%

12

DIFF_1

PC124

@PC124

@ 4700P_0402_25V7K

4700P_0402_25V7K

12

PR165

@PR165

@

1K_0402_5%

12

33P_0402_50V8J

PR122

1000P_0402_50V7K

44

45

FSET_NB

COMP_NB

RTN1

RTN0

17

16

VSEN1

PC99

12

1000P_0402_50V7K

PC104

12

PR126

22K_0402_1%

12

PR129

0_0402_5%

43

42

41

RTN_NB

VSEN_NB

OCSET_NB

VDIFF1

FB1

VSEN1

19

20

18

@PC125

@ 180P_0402_50V8J

180P_0402_50V8J

PR166

@PR166

@

54.9K_0402_1%

54.9K_0402_1% 12

PR169

36.5K_0402_1%@

12

PC102

12

PR130

11K_0402_1%

39

40

PGND_NB

LGATE_NB

VW1

COMP121ISP1

22

12

PC125

PC128

@PC128

@

12

1200P_0402_50V7K

C

CPU_B+

578

PC103

UGATE_NB

3 6

PHASE_NB

PR124

2.2_0603_1%

BOOT_NB

1 2

PC106

0.22U_0603_10V7K

LGATE_NB

CPU_VDDNB_RUN_FB_H 7

PHASE_NB

12

LGATE_NB PHASE_NB UGATE_NB

12

PR133

0_0402_5%

38

37

BOOT_NB

36

BOOT_NB

PHASE_NB

UGATE_NB

BOOT0

UGATE0

PHASE0

PGND0

LGATE0

PVCC

LGATE1

PGND1

PHASE1

UGATE1

BOOT1

ISN1

TP

23

24

49

ISN1

ISP1

VW1

COMP1FB_1

@PC126

@ 1000P_0402_50V7K

1000P_0402_50V7K

6.81K_0402_1%

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

35 34 33 32 31 30 29 28 27 26 25

PC126

PR167

@PR167

@

BOOT0 UGATE0 PHASE0

LGATE0

LGATE1

PHASE1 UGATE1 BOOT1

12

C

0.22U_0603_10V7K

CPU_VDDNB_RUN_FB_L 7

UGATE0

PHASE0

BOOT0

0.22U_0603_10V7K

+5VS

12

PC115

PC115 1U_0603_10V6K

1U_0603_10V6K

UGATE1

PHASE1

BOOT1

2008/9/25 2009/9/25

578

3 6

PR138

0_0603_5%

1 2

PC112

LGATE0

PR152

0_0603_5%

1 2

0.22U_0603_10V7K

LGATE1

Compal Secret Data

241

1 2

PC118

PC103

PQ37

PQ37 AO4466_SO8

AO4466_SO8

PQ38

AO4712_SO8

4

5

4

Deciphered Date

5

D

1

12

10U_1206_25V6M

12

PR125

4.7_1206_5%

12

PC108

PC108 680P_0603_50V7K

680P_0603_50V7K

PQ39

TPCA8030-H_SOP-ADV8-5

123

PQ40 @ PQ40

@

123 5

PQ42

TPCA8030-H_SOP-ADV8-5

123

PQ43

123 5

1

+

PC100

PC101

220U_25V_M

2

PL11

4.7U_LF919AS-4R7M-P3_5.2A_20%

4.7U_LF919AS-4R7M-P3_5.2A_20% 1 2

4

TPCA8028-H_SOP-ADVANCE8-5

PC116

4.7U_0805_25V6-K

4

TPCA8028-H_SOP-ADVANCE8-5

D

PL10

HCB4532KF-800T90_1812

1 2

+

1

2

12

PC110

PC111

4.7U_0805_25V6-K

PQ41

123 5

TPCA8028-H_SOP-ADVANCE8-5

12

PC117

PC171

4.7U_0805_25V6-K

PQ44

123 5

TPCA8028-H_SOP-ADVANCE8-5@

E

12

PC132

0.1U_0402_25V4K

+VDDNBP

12

PC133

0.1U_0402_25V4K

12

PC131

0.1U_0402_25V4K

12

PC174

PC135

PC134

0.1U_0402_25V4K

0.1U_0402_25V6

0.1U_0402_25V4K

Ipeak = 36A

+

PC107

PC107 220U_D2_4VM

220U_D2_4VM

CPU_B+

12

PC170

PC169

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

PR141

4.7_1206_5%

12

PC113

PC113 680P_0603_50V7K

680P_0603_50V7K

12

PC172

4.7U_0805_25V6-K

12

PR155

4.7_1206_5%

12

PC119

PC119 680P_0603_50V7K

680P_0603_50V7K

Custom

Date: Sheet

16.5K_0402_1%

1 2

ISP0

CPU_B+

+CPU_CORE_0 +CPU_CORE_1

0.36UH_PCMC104T-R36MN1R17_30A_20%

Title

Size Document Number Rev

Imax = 25.2A F = 300K

Total capacitor 1320uF ESR = 1.5mohm

PL12

1 2

PR143

1 2

ISP1

Compal Electronics, Inc.

4 3

PC114

12

0.1U_0603_16V7K

0.1U_0603_16V7K 12

PR147

4.02K_0402_1%

PL13

PR156

16.5K_0402_1%

PC120

0.1U_0603_16V7K

PR159

4.02K_0402_1%

Schematic, M/B LA-5331P

ISN0

PJ20

2

112

JUMP_43X118@

PJ21

2

112

JUMP_43X118@

4 3

12

ISN1

401716

E

12

PC175

PC176

0.1U_0402_25V6

+CPU_CORE_0

+CPU_CORE_1

of

51 54Tuesday, February 23, 2010

B+

12

0.1U_0402_25V6

EMC

C

5

9

PL15

1 2

B+_core

PC146

10U_1206_25VAK

PR189

0_0402_5%

12

10U_1206_25VAK

12

PC147

4.7U_0805_25V6-K

6269_VCC

12

PC156

2.2U_0603_6.3V6K

12

PC148

12

PC150

PC149

1000P_0402_50V7K

PC162

.1U_0402_16V7K

PC163

22P_0402_50V8J

12

PC151

1000P_0402_50V7K

12

B+

12

PC153

D D

,33,35,47,49,50

C C

1000P_0402_50V7K

SUSP#

1 2

FBMA-L11-453215-121LMA90T_2

12

PC154

680P_0402_50V7K

4

12

1000P_0402_50V7K

3

4

5

12

PR193

49.9K_0402_1%

12

PC165

PC165 2200P_0402_25V7K

2200P_0402_25V7K

8

PU14

GND

VIN

VCC

EN

NC6FB7FSET

LX_VCORE

2

1

16

UG

PHASE

PGOOD

APW7138NITRL_SSOP16

9

12

57.6K_0402_1%

PR194

DH_VCORE

BST_VCORE

15

BOOT

PVCC

LG

PGND

ISEN

VO

10

12

PC164

@ PC164

@

0.01U_0402_25V7K

1 2

PR183

2.2_0603_5%

+5VALW

12

14

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K DL_VCORE

13

12

ISEN_VCORE

11

1 2

PC152

0.1U_0603_25V7K

PR184

PR184 0_0603_5%

0_0603_5%

1 2

PR185

4.7_0603_5%

1 2

5.36K_0402_1%

3

6269_VCC

PC155

1 2

PR190

2

5

PQ48

4

TPCA8030-H_SOP-ADV8-5

123

0.56UH_MPC1040LR56_23A_20%

PQ50

@

4

123 5

PQ49

4

TPCA8028-H_SOP-ADVANCE8-5

@

123 5

TPCA8028-H_SOP-ADVANCE8-5

1 2

12

PR188

4.7_1206_5%

12

PC161

PC161 680P_0603_50V7K

680P_0603_50V7K

PL16

4.75K_0402_1%

PR195

PR191

1 2

1

2

0_0402_5%

1

+VGA_COREP

12

+

PC157

PC158

10U_1206_25VAK

330U_D2E_2.5VM_R9M

PR192

10_0402_1%

12

PC166

@PC166

@

1000P_0402_50V7K

PC159

10U_1206_25VAK

12

PC160

1000P_0402_50V7K

+VGA_CORE

+5VALW

PR196

23.7K_0402_1%

SSM3K7002FU_SC70-3

PQ51

1 2 13

D

S

23.7K_0402_1%

2

G

12

PR197

PR197 10K_0402_1%

PR199

10K_0402_1%

1 2

PC167

.1U_0402_16V7K

Title

Size Document Number Rev

Custom

Tuesday, February 23, 2010

Date: Sheet

10K_0402_1%

1 2

13

D

PQ52

S

SSM3K7002FU_SC70-3

Compal Electronics, Inc.

1 2

2

G

PR200

12

0_0402_5%

PC168

0.01U_0402_25V7K

Schematic, M/B LA-5331P

401716

1

52 54

VGA_PWRSEL 37

of

C

B B

12

PR198

7.5K_0402_1%

VFB(0.6)=Vout*Rbottom/(Rtop+Rbottom)

M96

VGA_PWSELECT

High

Low

resistor setting

A A

Core Voltage Level

0.98 V

1.1 V

PR26 = 4.75K PR30 =7.5K PR27 =23.7K

5

M92

Core Voltage Level

0.98 V

1.2 V

PR26 = 4.75K PR30 = 7.5K PR27 = 13K

4

FSW=1/(75E-12*57.6K)=231.48KHz

M96 M92

Imax=18.23A Ipeak=26.05A Iocp=28.65A

PR21=7.15K PQ5=unpop

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Imax=12.81A Ipeak=18.30A Iocp=20.14A

PR21=5.36K PQ5=unpop

2008/10/23

3

Compal Secret Data

Deciphered Date

2009/10/23

2

A

B

Version Change List ( P. I. R. List ) for Power Circuit

C

D

E

Page#

Item

Pre EVT modification

1 1

01. 2009/02/09 --> change UG3 to G9191-330T1U, P/N is SA000022I00

Title

Date

02. 2009/02/10 --> change UL3's P/N to SP050005V00

03. 2009/02/10 --> change R489 & R488 BOM structure

04. 2009/02/10 --> change R142 from 300 ohm to 150 ohm

05. 2009/02/10 --> change R143 from 1M ohm to 100K ohm

06. 2009/02/10 --> change JREAD footprint to TAITW_R009-125-LR_21P_RV-T

07. 2009/02/11 --> change +HDMI_5V_OUT circuit, add D18, R160, Q26, R557, C876 and change power

08. 2009/02/11 --> change UG1 P/N and velue to SA000039900 and TSH35TR

09. 2009/02/11 --> change location from CV2 to C706

10. 2009/02/13 --> remove WiMAX LED control circuit

11. 2009/02/17 --> remove Audio codec digital GND to analog GND net

12. 2009/02/17 --> Add JFAN1 for M96 FAN

13. 2009/02/17 --> change JTOUCH footprint

14. 2009/02/17 --> add NPTH Hole H42, H43

15. 2009/02/17 --> add CA12

16. 2009/02/17 --> change Int MIC ground to AGND between CA27 and J3

2 2

17. 2009/02/17 --> change UN1 P/N to SA00001SL20

18. 2009/02/17 --> Add JPWR1 for co-lay with JPOWER

19. 2009/02/19 --> add CA45, CA46, CA47, CA48, CA49, CA50, CA51, CA52, CA53

20. 2009/02/19 --> replace RA12, RA13, RA14 with CA54, CA55, CA56 and add CA57

21. 2009/02/19 --> Delete CV81, CV82, CV83, CV90, CV91, CV92, CV96, CV97, CV98

22. 2009/02/19 --> Change LV14, LV17, LV19 to 0 ohm

23. 2009/02/19 --> Swap M9X PCIE net & polarity inversion

24. 2009/02/19 --> Add CV345, CV346, R147 for soft start

25. 2009/02/19 --> Delete CV249, CV257, CV265, CV273, CV278, CV285, CV305, CV313, CV320, CV326, CV333, CV338

26. 2009/02/20 --> Add R189, R190 & Net：27MCLK, 27M_CLK, 27MSSC, 27M_SSC

27. 2009/02/20 --> Delete UV12, RV142, CV343, CV344, CV342, RV138, XV1, RV139

28. 2009/02/24 --> change R70, R77 from 4.7K to 2.2K

29. 2009/02/24 --> change R178 from 4.7K to 47K

30. 2009/02/26 --> change UG2 P/N to SA00003A600

31. 2009/02/27 --> change T9, T10, T11,T12, T19, T20 footprint to TPC24

3 3

32. 2009/02/27 --> Delete JFAN1

33. 2009/02/28 --> Change D36 from SC1B491D000 to SCS00002000

34. 2009/02/28 --> Change 5V camera power at JLVDS connector and add R968, R967, C274

35. 2009/02/28 --> Change SPI ROM from SST to MXIC

36. 2009/03/06 --> Change R556 BOM structure to @

37. 2009/03/06 --> Change D17, R965 BOM structure to @ and mount R966

38. 2009/03/06 --> Change RA16 from 5% to 1%

Pre DVT modification

39. 2009/03/10 --> Add ESD diode D19 for JFP

40. 2009/03/10 --> Change C686, C699, C702, C705, C708 P/N from SE074221K00 to SE074221K80

41. 2009/03/10 --> Change Y2 P/N from SJ114P3M730 to SJ114P3MG00

42. 2009/03/21 --> change R146 from 100k ohm to 10k ohm

43. 2009/03/21 --> change LAN_WAKE# & EC_SWI#

44. 2009/03/21 --> unmount USB sleep & charge, add R97 & R98

45. 2009/03/21 --> connect USB_OC#0 to LAN_WAKE# through 0 ohm (R35)

46. 2009/03/21 --> unmount HDMI CEC controller and related components.

4 4

47. 2009/03/21 --> change H42 from NPTH to PTH

48. 2009/03/21 --> change capacitor of SE068101K80 to SE071101J80

49. 2009/03/26 --> change F2 footprint to F_MINISMDC110F-2

50. 2009/03/26 --> Add R370 & R381

51. 2009/03/26 --> change R557’s BOM structure from H@ to @

52. 2009/03/26 --> change R440 from 0 ohm to 100k ohm

53. 2009/03/26 --> Mount R197 and add R198

54. 2009/03/26 --> Change RA1 & RA3 P/N to SD013000080

A

Request Owner

B

Issue Description

Solution Description

55. 2009/04/02 --> ADD RM8

56. 2009/04/02 --> Change R440 from 100k ohm to 0 ohm and unmount C480

57. 2009/04/02 --> Change +HDMI_5V_OUT circuit, add D20, D53

58. 2009/04/14 --> Add C205、C213、C248、C478、C484、CV66、CV249 for EMI request

59. 2009/04/14 --> Mount CA54、CA55、CA56、CA57 for EMI requrest

60. 2009/04/14 --> Add C876 for Power noise issue

61. 2009/04/14 --> Add D21 for Power issue

62. 2009/04/15 --> Del TV2、TV3、TV4、TV5、TV6、TV7、TV8、TV9、TV10、TV11、TV12、TV13、TV14、 TV15、TV16、TV17、TV18、TV19、TV20、TV21、TV22、TV23

63. 2009/04/17 --> Un-mount D12

Pre DVT modification

64. 2009/04/27 --> Un-mount DA6、DA7

65. 2009/04/27 --> Change C234、C876 P/N to SGA19331D00

66. 2009/04/27 --> Change RV45 P/N to SD028470280

67. 2009/04/27 --> Change RV140 P/N to SD034604A80

68. 2009/04/27 --> Un-mount R42

69. 2009/04/27 --> Mount R367

70. 2009/05/07 --> Change U25、U19 from SA005280110 to SA00002XX00

71. 2009/05/07 --> Change RA38 from LVDSSET@ to @

72. 2009/05/07 --> Change U34、U36 from SA00001NT00 to SA00001WP00

73. 2009/05/07 --> Change QV1 from SB923010020 to SB934130000

74. 2009/05/07 --> Change QV2 from SB000009610 to SB770020010

Pre PVT modification

75. 2009/05/24 --> Add H44,H45 H_3P0 for express dummy card

76. 2009/05/24 --> Change C350 from SF22001M300 to SF22001M200.

77. 2009/05/24 --> Add C178,C485,C486 for EMI request.

78. 2009/05/24 --> Del JPWR1

79. 2009/05/24 --> Del JPWR1,JCAM,R430,R428,C744,R20,R18

80. 2009/05/24 --> Change net name from USB20_N9_R_CAM & USB20_P9_R_CAM to USB20_N9_R & USB20_P9_R

81. 2009/05/24 --> Change UV2 ~ UV9 P/N & symbol to SA000035700

Pre Pre-MP modification

82. 2009/07/07 --> Change C643 & C652 to SE071120J80 .

83. 2009/07/07 --> Change C350 to SF000001H00.

84. 2009/08/06 --> Change Y7 PN from SJ100003D00 to SJ132P7KW10.

85. 2009/08/27 --> Change RV123 & RV124 BOM structure to HDMI@.

86. 2009/09/21 --> Change C9, C13, C70, C71, C83, C84, C95, C104, CL26, CL27 to SE074102K80

87. 2009/09/21 --> Change U34, U36 to SA00003GI00

88. 2009/10/02 --> Del RN2's BOM structure and move to SB side.

Pre EVT POWER modification

01. 2009/03/06 --> Mount PR95, PC66, PR170, PC129

EVT --> DVT modification P46 add PR203 10Ohm P46 change PR65 to 47K P47, 48, 49, 50 P45 change PR36 to 13.7K P50 change PC99 to SE071330J80 P47 change PR79 to 19.1K P50 change PR145=21.5K, PR146=95.3K, PR143 and PR156

P49 change PR175 = 33K, PC139 to mount P51 change PR199 = 10K P47, 48, 49 add 3PCS Cap.=0.1uF_0402 (PC177, PC178, PC179) on B+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/9/25 2009/9/25

PR82, 83, 94, 102, 110, 138, 152 change to SD013000080

=16.5K, PR147 and PR159=4.02K

Compal Secret Data

Deciphered Date

D

Rev.

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

53 54Tuesday, February 23, 2010

E

of

C

5

4

HW4 Product Improvement Record (P.I.R.)

< Tigris >

3

2

1

D D

< R1 for customer BOM STRUCTURE >

U3

RS880MN

RS880MN R1RS880MNR1@U3RS880MN R1RS880MNR1@

U3

RS880MC

RS880MC R1RS880MCR1@U3RS880MC R1RS880MCR1@

U3

RX881

RX881 R1RX881R1@U3RX881 R1RX881R1@

C C

U15

< R3 for mass production BOM STRUCTURE >

U3

RS880MN

RS880MN R3RS880MNR3@U3RS880MN R3RS880MNR3@

U3

RS880MC

RS880MC R3RS880MCR3@U3RS880MC R3RS880MCR3@

U3

RX881

RX881 R3RX881R3@U3RX881 R3RX881R3@

U15

SB710SB710

SB710 R1SB710R1@

SB710 R3SB710R3@

< DC Jack >

PJP1

DC-IN

B B

PJP1

PJP116inch_45@

PJP1

PJP117inch_45@

< PCB >

ZZZ

PCB

A A

ZZZ

PCB 075 LA-5331P REV1.0 M/B

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2009-09-252008-09-25

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Schematic, M/B LA-5331P

401716

54 54Tuesday, February 23, 2010

1

C

of

Compal LA-5331P NSWAE, Satellite L500, Satellite L500D, Satellite L550, LA-5331P NTWAE Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual