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CS4811GTR-01
Datasheet
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Cirrus Logic CS4811GTR-01, CS4811-KM, CS4811MXR-01 Datasheet

CS4811
Fixed Function Multi-Effects Audio Processor

Features

l Audio Processor for embedded
reverb/effects applications
– Proprietary 24-bit Audio Processing Engine – On-chip RAM (No external RAM required) – On-chip 24-bit ∆Σ ADC with 100 dB Dyn. Range – On-chip 24-bit ∆Σ DAC with 100 dB Dyn. Range – Automatically boots firmware from external
serial EEPROM
l Firmware availabl e for Guitar Effects or Mixer
Effects applications
l Single +5 V Supply l 100-pin Metric Quad Flat Pack (MQF P)

Description

The CS4811 is a complete audio effects processing system on a chip. This device integrates a proprietary 24­bit audio processing engine, large on-chip RAM memories, and a high performance 24-bit audio codec. A serial control port allows the device to boot firmware from a compact and low cost SPI or I features such as single +5 V operation simplify system design.
Firmware for the CS4811 is provided by Cirrus Logic. There are two different firmware codes available; one for guitar effects and one for audio mixers. The guitar effects firmware provides a host of electric guitar effects includ­ing spring reverb, delay, chorus, flange and tremolo. The mixer effects firmware provides a suite of effects such as digital r everb, d elay and chorus which are suit­able for use in audio mixers, karaoke and acoustic instrument amplifiers. The CDB4811GTR and CDB4811MXR evaluation boards allow easy evalua tion of the CS4811 device and the associated firmware.
ORDERING INFO
CS4811-KM -10 to +70°C 100-pin MQFP CDB4811GTR-01 Guitar Effects Evaluation Board CDB4811MXR-01 Mixer Effects Evaluation Board
2
C serial EEPROM. Other
I
XTO
XTI
AIN+
AIN-
CLOCK
MANAGER
ADC
OVL
DIGITAL HPF
Advance Product Information
SPI/I2C
24-BIT AUDIO PROCESSING
PIO0
SCL/CCLK
ENGINE
PIO1
PIO2
This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice.
SDA/CDOUT
SERIAL CONTROL PORT (SPI or I2C)
PIO3
Copyright  Cirrus Logic, Inc. 2000
AD1/CDIN
DIGITAL FILTER
RAM
(All Rights Reserved)
AD0/CS
RST
DAC
VOLTAGE
REFERENCE
OUTPUT STAGE
ANALOG LPF AND
AOUT+
AOUT-
CMOUT CMFILT+ CMFILT-
SEP ‘00
DS486PP2
1

TABLE OF CONTENTS

1. CHARACTERISTICS AND SPECIFICATIONS .................................. ....... ...... ....... ...... ....... ..... 4
ADC CHARACTERISTICS .......................................................................................................4
DAC CHARACTERISTICS .......................................................................................................5
SWITCHING CHARACTERISTICS ................................. ...... ....... ...... ....... ...... ....... ...... ............6
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MASTER..................................7
SWITCHING CHARACTERISTICS - CONTROL PORT - I
RECOMMENDED OPERATING CONDITIONS.......................................................................9
DIGITAL CHARACTERISTICS................................................................................................. 9
SWITCHING CHARACTERISTICS - PROGRAMMABLE I/O...................................................9
2. TYPICAL CONNECTION DIAGRAMS ................................................................................... 10
3. FUNCTIONAL DESCRIPTION ............................................................................................... 12
3.1 Overview ..........................................................................................................................12
3.2 Analog Inputs ...................................................................................................................12
3.2.1 Line Level Inputs ................................................................................................. 12
3.2.2 Digital High Pass Filter ........................................................................................12
3.3 Analog Outputs ................................................................................................................13
3.3.1 Line Level Outputs ..............................................................................................13
3.4 Clock Generation ............................................................................................................. 13
3.4.1 Clock Source .......................................................................................................13
3.5 Serial Control Port ............................................................................................................14
3.5.1 SPI Bus ...............................................................................................................14
3.5.1.1 SPI Mode ................................................................................................14
2
3.5.2 I
3.6 Resets ..............................................................................................................................15
4. POWER SUPPLY AND GROUNDING ................................................................................... 16
5. PIN DESCRIPTIONS ....................................................... ...... ............................................. . ... 17
6. PARAMETER DEFINITIONS ..................................................................................................21
7. PACKAGE DIMENSIONS ..................................................................................................... 22
C Bus ................................................................................................................14
3.5.2.1 I
CS4811
2
C MASTER......... ....... ...... ............8
2
C Mode ................................................................................................ 14
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
Preliminary product inf o rmation describes products whi ch are in production, but f or which full characteriza t i on da t a i s not yet available. Advance produ ct i nfor­mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document i s accurat e and reli able. However , t he infor mation is subje ct to chang e without noti ce and is provi d ed “AS IS” without warrant y of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other ri g ht s of third parties. This document is the pro perty of Cirrus Logi c, Inc. and i mplie s no licen se under patents, copyrights, tr ademarks, or trade secre ts. No part of this publication may be copied, reproduced , stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the pr i or writ ten consent of Cirrus Logic, Inc. Ite ms f rom any Ci rrus L ogi c websi t e or disk may be printed for use by the user. However, no part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade­marks and service marks can be found at http://www.cirrus.com.
2 DS486PP2

LIST OF FIGURES

CS4811
Figure 1. SPI Control Port Timing ............................................................................. 7
Figure 2. I
Figure 3. Typical Connection Diagram, Single-ended Input .................................... 10
Figure 4. Typical Connection Diagram, I
Figure 5. Typical Connection Diagram, SPI Mode .................................................. 11
Figure 6. Optional Line Input Buffer ........................................................................ 12
Figure 7. Butterworth Output Filters ........................................................................ 13
Figure 8. Output Mute Circuit .................................................................................. 13
Figure 9. Control Port Timing, SPI Master Mode Self-Boot ..................................... 14
Figure 10.Control Port Timing, I2C Master Mode Self-Boot ..................................... 15
Figure 11.CS4811 Suggested Layout ...................................................................... 16
Figure 12.Pin Assignments ...................................................................................... 17
2
C Control Port Timing .............................................................................. 8
2
C Mode .................................................. 11
DS486PP2 3

1. CHARACTERISTICS AND SPECIFICATIONS

CS4811

ADC CHARACTERISTICS (T

48 kHz; XTI = 12.2880 MHz; Measurement Bandwidth is 20 Hz to 20 kHz)
Parameters Symbol Min Typ Max Units
= 25° C; VA, VD = + 5 V; -1 dB Full Scale Input Sine wave, 997 Hz; Fs =
A
Analog Input Characteristics
ADC Conversion Stereo Audio channels 16 - 24 Bits Dynamic Range (A weighted, Note 4)
(unweighted, Note 4) Total Harmonic Distortion + Noise (Note 1,4) THD+N - -92 -87 dB Offset Error (with internal high pass filter enabled) (Note 5) - - 0 LSB Full Scale Input Voltage (Differential) 1.9 2.0 2.1 V Gain Drift (Note 2) - 100 - ppm/°C Input Resistance 10 - - kΩ Input Capacitance - - 15 pF CMOUT Output Voltage - 2.3 - V Common Mode Rejection Ratio (Note 2) CMRR 60 dB
93 90
100
97
-
-
dB dB
rms
High Pass Filter Characteristics
Frequency Response -3dB (Note 3)
-0.14dB (Note 3) Phase Deviation @ 20 Hz (Note 3) - 10 - Degree Passband Ripple - - 0 dB
-
-
3.7 20
-
-
Hz Hz
Notes: 1. Referenced to typical full-scale differential input voltage (2 V
2. Bench tested only.
3. Filter characteristics scale with output sample rate.
4. Measured using differential analog input circuit, see Figure 6.
5. Filter response is not tested but is guaranteed by design.
rms
).
4 DS486PP2
CS4811

DAC CHARACTERISTICS (T

48 kHz; XTI = 12.288 MHz; Measurement Bandwidth is 20 Hz to 20 kHz)
Parameters Symbol Min Typ Max Units
= 25° C; VA, VD = + 5 V; Full Scale Output Sine wave, 997 Hz; Fs =
A
Analog Output Characteristics - Minimum Attenuation, 10 kΩ, 100 pF load; unless otherwise specified.
DAC Resolution 16 - 24 Bits Dynamic Range (DAC not muted, A weighted) 95 100 - dB Total Harmonic Distortion + Noise THD+N - -90 -85 dB Offset Voltage (differential) (Note 6) - -20±5 - mV Offset Voltage (V+/V- relative to CMOUT) (Note 6) - -45/-28 - mV Full Scale Output Voltage (Differential) 1.9 2.0 2.1 V Gain Drift (Note 2) - 100 - ppm/°C Out of Band Energy (Fs/2 to 2Fs, Note 2) - -60 - dBFS Analog Output Load Resistance
Capacitance
10
-
-
-
-
100
rms
kΩ
pF
Analog Loopback Performance
Signal-to-Noise Ratio (CCIR-2K weighted, -20 dB input) CCIR-2K - 74 - dB
Power Supply
Power Supply Current Operating
Power Down (Note 7)
Power Supply Rejection (1 kHz, 10 mV
, Note 2) - 50 - dB
rms,
-
-
200
1
-
-
mA mA
Notes: 6. Measured with DAC calibration disabled.
7. Measured with XTI clock disabled.
Specifications are subject to change without notice.
DS486PP2 5
CS4811

SWITCHING CHARACTERISTICS (T

Parameters Symbol Min Typ Max Units
ADC & DAC Sample Rate Fs 30 - 50 kHz XTI Frequency XTI = 256Fs 7.68 - 12.8 MHz XTI Duty Cycle XTI =256Fs (Note 8) 40 - 60 % XTI Jitter Tolerance - 500 - ps RST
Low Time (Note 9) 500 - - ns
Notes: 8. Guaranteed by characterization but not tested.
9. On power-up, the CS4811 RST state.
pin should be asserted until the power supplies have reached steady
= 25° C; VA, VD = +5 V, outputs loaded with 30 pF)
A
6 DS486PP2
CS4811

SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MASTER (TA = 25° C,

VA, VD = 5 V; Inputs: lo gic 0 = DGND, logic 1 = VD, C
Parameter Symbol Min Typ Max Units
SPI Master (Self-Boot) Mode
(SPI/I2C = 0, SCPM/S = 1) CCLK Clock Frequency CCLK Low Time CCLK High Time CCLK Rise Time (Note 10) CCLK Fall Time (Note 10)
rising to CS falling
RST
High Time Between Transmissions
CS
Falling to CCLK Edge
CS
Falling to CDOUT valid
CS CCLK Falling to CDOUT valid CDIN to CCLK Rising Setup Time CCLK Rising to DATA Hold Time CCLK Falling to CS
rising
= 30 pF)
L
f
sck
t
scl
t
sch
t
r2
t
f2
t
srs
t
csh
t
css
t
dv
t
pd
t
dsu
t
dh
t
clcs
-Fs-kHz
-1/(2*Fs)-ns
-1/(2*Fs)-ns
-12-ns
-12-ns
-42-µs
37 - - µs
5--µs
- - 50 ns
--100ns 80 - - ns 80 - - ns 40 - - ns
Notes: 10. Measured with a 2.2 kΩ pullup resistor to VD.
RST
CS
CCLK
CDIN
CDOUT
t
srs
t
css
t
scl
t
t
f2
dsu
t
r2
t
sch
t
dh
t
clcs
t
csh
t
dv
t
pd

Figure 1. SPI Control Port Timing

DS486PP2 7
CS4811

SWITCHING CHARACTERISTICS - CONTROL PORT - I2C MASTER (T

VA, VD = 5 V; Inputs: lo gic 0 = DGND, logic 1 = VD, C
Parameter Symbol Min Typ Max Units
I2C® Master (Self-Boot) Mode
(SPI/I2C = 1, SCPM/S = 1) (Note 11) SCL Clock Frequency Clock Low Time Clock High Time Bus Free Time Between Transmissions
rising to start condition
RST Start Condition Hold Time Setup Time for Repeated Start Condition SDA Setup Time to SCL Rising SDA Hold Time from SCL Falling (Note 12) SCL falling to SDA Output Valid SCL and SDA Rise Time (Note 13) SCL and SDA Fall Time (Note 13) Setup Time for Stop Condition
Notes: 11. Use of the I
2
C bus interface requires a license from Philips. I2C is a registered trademark of Philips
Semiconductors.
12. Data must be held for sufficient time to bridge the worst case fall time of 300 ns for CCLK/SCL.
13. For both SDA transmitting and receiving.
= 30 pF)
L
f
scl
t
low
t
high
t
buf
t
irs
t
hdst
t
sust
t
sud
t
hdd
t
cldv
t
r
t
f
t
susp
-Fs-kHz
-1/(2*Fs)-µs
-1/(2*Fs)-µs
4.7 - - µs
-22-µs
4.0 - - µs
13.5 - - µs 250 - - ns
0--ns
--1.5µs
--1µs
--300ns
4.7 - - µs
= 25° C;
A
RST
t
SDA
SCL
(output)
irs
Stop Start
t
buf
t
hdst
t
low
t
cldv
t
hdd
t
high
t
sud
Repeated
Start
t
sust
t
hdst
Stop
t
f
t
r
t
susp

Figure 2. I2C Control Port Timing

8 DS486PP2
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