Cirrus Logic CS4228 Service Manual

Advance Product Information

This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.

1

Copyright  Cirrus Logic, Inc. 1999

(All Rights Reserved)

P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com

CS4228

24-Bit, 96 kHz Surround Sound Codec

Features

l Two 24-bit A/D Converters

- 102 dB dynamic range

- 90 dB THD+N

l Six 24-bit D/A Converters

- 103 dB dynamic range and SNR

- 90 dB THD+N

l Sample rates up to 100 kHz
l Pop-free Digital Output Volume Controls

- 90.5 dB range, 0.5 dB resolution (182 levels)

- Variable smooth ramp rate, 0.125 dB steps

l Mute Control pin for off-chip muting circuits
l On-chip Anti-alias and Output Filters
l De-emphasis filters for 32, 44.1 and 48 kHz

Description

The CS4228 codec provides two analog-to-digital and
six digital-to-analog delta- sigma converters, along with
volume controls, in a c ompact +5/+3.3 V, 28-pin SSOP
device. Combined with an IEC958 (SPDIF) receiver (like
the CS8414) and surround sound decoder (such as one
of the CS492x or CS493xx families), it is ideal for use in
DVD player, A/V recei ver and car audio systems sup­porting multiple stan dards such as Dolby Digital A C-3,
AAC, DTS, Dolby ProLogic, THX, and MPEG.

A flexible seri al audio interface allows operation in Left
Justified, Right Justified, I

2

S, or One Line Data modes.

ORDERING INFORMATION

CS4228-KS -10° to +70° C 28-pin SSOP
CDB4228 Evaluation Board

I

SCL/CCLK SDA/CDIN VD

AOUT1

LRCK
SCLK

SDIN1

SDOUT

SERIAL AUDIO

CONTROL PORT

DIGITAL FILTERS

ANALOG LOW PASS AND

OUTPUT STAGE

VA

AOUT2

AINL+
AINL-

SDIN2

MCLK

DGND

AOUT3

AOUT4

AINR+
AINR-

LEFT ADC

SDIN3

MUTECAD0/CS

RST

FILT

AOUT5

AOUT6

DIGITAL FILTERS

DATA INTERFACE

VL

RIGHT ADC

AGND

WITH DE-EMPHASIS

∆Σ

DAC #1

CLOCK MANAGER

MUTE CONTROL

∆Σ

DAC #2

∆Σ

DAC #3

∆Σ

DAC #4

∆Σ

DAC #5

∆Σ

DAC #6

DIGITAL VOLUME

DIGITAL VOLUME

DIGITAL VOLUME

DIGITAL VOLUME

DIGITAL VOLUME

DIGITAL VOLUME

DGND AGND

JUL ‘99

DS307PP1

CS4228

2 DS307PP1

TABLE OF CONTENTS

CHARACTERISTICS AND SPECIFICATIONS ................................................... 4

ANALOG CHARACTERISTICS................................................................... 4

DIGITAL CHARACTERISTICS.................................................................... 6

SWITCHING CHARACTERISTICS .................................... ....... ...... ....... ..... 6

SWITCHING CHARACTERISTICS - CONTROL PORT ............................. 8

ABSOLUTE MAXIMUM RATINGS............................................................ 10

RECOMMENDED OPERATING CONDITIONS........................................ 10

TYPICAL CONNECTION DIAGRAM .................................................................11

FUNCTIONAL DESCRIPTION .......................................................................... 12

Overview ......................... ................................ ................................ ..........12

Analog Inputs ............................................................................................ 12

Line Level Inputs ................................................................................ 12

High Pass Filter ..................................................................................12

Analog Outputs .........................................................................................12

Line Level Outputs .............................................................................12

Digital Volume Control ....................................................................... 13

Mute Control .............................................................................................13

Clock Generation ......................................................................................14

Clock Source ......................................................................................14

Synchronization ........ .......................... ......................... ....................... 14

Digital Interfaces ....................................................................................... 14

Serial Audio Interface Signals ............................................................ 14

Serial Audio Interface Formats ...........................................................14

Control Port Signals ..................................................................................14

SPI Mode ........................................................................................... 16

I

2

C Mode ............................................................................................ 16

Control Port Bit Definitions ........................................................................17

Power-up/Reset/Power Down Mode ......................................................... 17

Power Supply, Layout, and Grounding ..................................................... 18

REGISTER DESCRIPTION ................................................................................19

PIN DESCRIPTION............................................................................................. 24

PARAMETER DEFINITIONS ............................................................................. 28

PACKAGE DIMENSIONS .................................................................................. 29

Contacting Cirrus Logic Support

For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:

http://www.cirrus.com/corporate/contacts/

Dolby, Pro Logic, and AC-3 are trademarks of Dolby Laboratories Licensing Corporation.
Preliminary product info rmation describes products which are in production, but f or which full characteriza ti on data is not yet availab le. Advance product infor-

mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accur ate and reli able. However , the i nformati on is sub ject t o change with out no tice and i s provi ded “AS IS” withou t warranty of

any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties. This document is the property of Cirru s Logic, Inc. and implie s no licen se under patent s, copyri ghts, trademarks, or trade secre ts. No part of
this publication may be copied, reproduced , stored in a retr i eval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the pri or wri tten consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or di sk may be print ed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade­marks and service marks can be found at http://www.cirrus.com.

CS4228

DS307PP1 3

LIST OF FIGURES

Figure 1. Serial Audio Port Master Mode Timing ...................................................... 7

Figure 2. Serial Audio Port Slave Mode Timing ........................................................ 7

Figure 3. SPI Control Port Timing ............................................................................. 8

Figure 4. I

2

C Control Port Timing .............................................................................. 9

Figure 5. Recommended Connection Diagram ....................................................... 11

Figure 6. Optional Line Input Buffer ........................................................................ 12

Figure 7. Passive Output Filter with Mute ............................................................... 13

Figure 8. Butterworth Output Filter with Mute .......................................................... 13

Figure 9. Right Justified Serial Audio Formats ........................................................ 15

Figure 10.I

2

S Serial Audio Formats .......................................................................... 15

Figure 11.Left Justified Serial Audio Formats .......................................................... 15

Figure 12.One Line Data Serial Audio Format ......................................................... 16

Figure 13.Control Port Timing, SPI mode ................................................................ 17

Figure 14.Control Port Timing, I

2

C Mode ................................................................. 17

CS4228

4 DS307PP1

CHARACTERISTICS AND SPECIFICATIONS

ANALOG CHARACTERISTICS (Unless otherwise specified T

A

= 25°C; VA = +5V, V D = VL = +3.3V ;
Full Scale Input Sine wave, 1kHz; Fs = 44.1 kHz BRM, 96 kHz HRM; Measurement Bandwidth is 20 Hz to 20 kHz;
Local components as shown in "Recommended Connection Diagram"; SPI control mode, Left Justified serial for­mat, MCLK = 256 Fs BRM, 128 Fs HRM, SCLK = 64 Fs)

Notes: 1. Referenced to typical full-scale differential input voltage (2 Vrms).

2. Filter characteristics scale with output sample rate.

3. The analog modulator samples the input at 5.6448 MHz for an output sample rate of 44.1 kHz. There is
no rejection of input signals which are multiples of the sampling frequency (n × 5.6448 MHz ±20.0 kHz
where n = 0,1,2,3...).

4. Group delay for Fs = 44.1 kHz, t

gd

= 15/44.1 kHz = 340µs. Fs = sample rate.

Specifications are subject to change without notice

Base Rate Mode High Rate Mode

Parameter Symbol Min Typ Max Min Typ Max Units

Analog Input Characteristics

- Minimum gain setting (0 dB) Differential Input; unless otherwise specified.

ADC Resolution Stereo Audio channels

16 - 24 16 24 Bits

Total Harmonic Distortion

THD - 0.003 - - 0.003 - %

Dynamic Range (A weighted)

(unweighted)

TBD-102

99

-

-

TBD
TBD

102

99

-

-

dB
dB

Total Harmonic Distortion + Noise -1dB (Note 1)

THD+N - -90 TBD - -90 TBD dB

Interchannel Isolation

-90- -90- dB

Interchannel Gain Mismatch

- 0.1 - - 0.1 - dB

Offset Error (with high pass filter)

--0--0LSB

Full Scale Input Voltage (Differential):

5.66 5.66 Vp-p

Gain Drift

- 100 - - 100 - ppm/°C

Input Resistance

10--10--k

Ω

Input Capacitance

- - 15 15 pF

A/D Decimation Filter Characteristics

Passband (Note 2)

0.02 - 20.0 0.02 - 40 kHz

Passband Ripple

- - 0.01 - - 0.05 dB

Stopband (Note 2)

27.56 - 5617 66.53 - 5578 kHz

Stopband Attenuation (Note 3)

80--45--dB

Group Delay (Note 4)

t

gd

- 15/Fs - - 15/Fs - s

Group Delay Variation vs. Frequency

∆

t

gd

--0--0µs

High Pass Filter Characteristics

Frequency Response: -3 dB (Note 2)

-0.13 dB

-

-

3.4
20

-

-

-

-

3.4
20

-

-

Hz
Hz

Phase Deviation @ 20 Hz

(Note 2)

-10- -10-Degree

Passband Ripple

--0--0dB

CS4228

DS307PP1 5

ANALOG CHARACTERISTICS (Continued)

Notes: 5. The passband and stopband edges scale with frequency. For input word rates, Fs, other than 44.1 kHz,

the 0.01 dB passband edge is 0.4535×Fs and the stopband edge is 0.5465×Fs.

6. Digital filter characteristics.

7. Measurement bandwidth is 10 Hz to 3 Fs.

Specifications are subject to change without notice

Base Rate Mode High Rate Mode

Parameter Symbol Min Typ Max Min Typ Max Units

Analog Output Characteristics

- Minimum Attenuation, 10 kΩ, 100 pF load; unless otherwise specified.

DAC Resolution

16 - 24 16 24 Bits

Signal-to-Noise/Idle Channel Noise
(DAC muted, A weighted)

TBD 103 - TBD 103 - dB

Dynamic Range (DAC not muted, A weighted)

(DAC not muted, unweighted)

TBD-103

100

-

-

-

-

103
100

-

-

dB
dB

Total Harmonic Distortion

THD - 0.003 - - 0.003 - %

Total Harmonic Distortion + Noise

THD+N - -90 TBD - -90 - dB

Interchannel Isolation

-90- -90- dB

Interchannel Gain Mismatch

- 0.1 - - 0.1 - dB

Attenuation Step Size (All Outputs)

TBD 0.5 TBD TBD 0.5 TBD dB

Programmable Output Attenuation Span

TBD -90.5 - TBD -90.5 - dB

Offset Voltage

-10- -10- mV

Full Scale Output Voltage

TBD 1.3 TBD - 1.3 - Vrms

Gain Drift

- 100 - - 100 - ppm/°C

Analog Output Load

Minimum Load Resistance:

Maximum Load Capacitance:

-

-

10

100

-

-

-

-

10

100

-

-

k

Ω

pF

Combined Digital and Analog Filter Characteristics

Frequency Response 10 Hz to 20 kHz

±0.1 ±0.1 dB

Deviation from Linear Phase

- ±0.5 - - ±0.5 - Degrees

Passband: to 0.01 dB corner (Notes 5, 6)

0 - 20.0 0 - 40 kHz

Passband Ripple (Note 6)

- - ±0.01 - - ±0.01 dB

Stopband (Notes 5, 6)

24.1 - - 56 - - kHz

Stopband Attenuation (Notes 4, 7)

70--65--dB

Group Delay (Fs = Input Word Rate)

tgd - 16/Fs - - 16/Fs - s

Analog Loopback Performance

Signal-to-noise Ratio
(CCIR-2K weighted, -20 dB FS input)

CCIR-2K - TBD - - TBD - dB

CS4228

6 DS307PP1

ANALOG CHARACTERISTICS (Continued)

DIGITAL CHARACTERISTICS Unless otherwise specified (T

A

= 25 °C; VD = VL = +3.3V;

VA =+ 5V)

SWITCHING CHARACTERISTICS (T

A

= 25°C; VD = VL = +3.3V, VA = +5V, outputs loaded with

30 pF)

Power Supply

Symbol Min Ty p Max Min Typ Max Units

Power Supply Current Operating
VA = 5V, VD = VL = 3.3V VA

VL

VD

Power Down

VA
VL

VD

-

-

-

-

-

-

25

2

42

TBD

2

0.1

TBD
TBD
TBD

TBD
TBD
TBD

-

-

-

-

-

-

25

2

48

TBD

2

0.1

TBD
TBD
TBD

TBD
TBD
TBD

mA
mA
mA

mA
mA
mA

Power Supply Re je cti o n (1 kH z, 10 mV

rms

)

- 50 - 50 dB

Parameter Symbol Min Typ Max Units

High-level Input Voltage

V

IH

0.7xVL - - V

Low-level Input Voltage

V

IL

-0.3xVLV

High-level Output Voltage at I

0

= -2.0 mA

V

OH

VL - 1.0 - - V

Low-level Output Voltage at I

0

= 2.0 mA

V

OL

--0.4V

Input Leakage Current (Digital Inputs)

--10µA

Output Leakage Current (High-Impedance Digital Outp uts)

--10µA

Parameter Symbol Min Typ Max Units

Audio ADC's & DAC's Sample Rate BRM

HRM

Fs 30

60

-

-

50

100

kHz
kHz

MCLK Frequency

3.84 - 25.6 MHz

MCLK Duty Cycle BRM

MCLK =128, 384 Fs

MCLK = 256, 512 Fs

HRM

MCLK = 64, 192 Fs

MCLK = 128, 256 Fs

TBD

40

TBD

40

50

50

-

TBD

60

TBD

60

%
%

%
%

MCLK Jitter Tolerance

-500-ps

CS4228

DS307PP1 7

SWITCHING CHARACTERISTICS (Continued)

Notes: 8. After powering up the CS4228, RST

should be held low until the power supplies and clocks are settled.

Parameter Symbol Typ Max Units

RST

Low Time (Note 8)

1- -ms

SCLK Falling Edge to SDOUT Output Valid (DSCK=0)

t

dpd

-TBDns

LRCK Edge to MSB Valid

t

lrpd

-TBDns

SDIN Setup Time Before SCLK Rising Edge

t

ds

-TBDns

SDIN Hold Time After SCLK Rising Edge

t

dh

-TBDns

Master Mode

SCLK Falling to LRCK Edge

t

mslr

+10 - ns

SCLK Duty Cycle

50 - %

Slave Mode

SCLK Period

t

sckw

--ns

SCLK High Time

t

sckh

TBD - - ns

SCLK Low Time

t

sckl

TBD - - ns

SCLK rising to LRCK Edge (DSCK=0)

t

lrckd

TBD - - ns

LRCK Edge to SCLK Rising (DSCK=0)

t

lrcks

TBD - - ns

Figure 1. Serial Audio Port Master Mode Timing

t

mslr

SCLK*
(output)

LRCK
(output)

SDOUT

sckh

sckl

sckw

t

t

t

MSB

MSB-1

*SCLK shown for DSCK = 0.
SCLK inverted for DSCK = 1.

t

dpd

SDOUT

LRCK
(input)

SCLK*
(input)

SDIN1
SDIN2
SDIN3

dh

t

ds

t

lrpd

t

lrcks

t

lrckd

t

Figure 2. Serial Audio Port Slave Mode Timing

CS4228

8 DS307PP1

SWITCHING CHARACTERISTICS - CONTROL PORT (TA = 25°C, VD = VL = +3.3V,

VA = +5V; Inputs: logic 0 = DGND, logic 1 = VL+, C

L

= 30 pF)

Notes: 9. Data must be held for sufficient time to bridge the transition time of CCLK.

10. For F

SCK

< 1 MHz

Parameter Symbol Min Max Units

SPI Mode

(SDOUT > 47kΩ to GND)

CCLK Clock Frequency

f

sck

-6MHz

CS

High Time Between Transmissions

t

csh

1.0

µ

s

CS

Falling to CCLK Edge

t

css

20 ns

CCLK Low Time

t

scl

66 ns

CCLK High Time

t

sch

66 ns

CDIN to CCLK Rising Setup Time

t

dsu

40 ns

CCLK Rising to DATA Hold Time (Note 9)

t

dh

15 ns

Rise Time of CCLK and CDIN (Note 10)

t

r2

100 ns

Fall Time of CCLK and CDIN (Note 10)

t

f2

100 ns

t

r2

t

f2

t

dsu

t

dh

t

sch

t

scl

CS

CCLK

CDIN

t

css

t

csh

Figure 3. SPI Control Port Timing

CS4228

DS307PP1 9

SWITCHING CHARACTERISTICS - CONTROL PORT (T

A

= 25°C; VD = VL = +3.3V,

VA = +5V; Inputs: logic 0 = DGND, logic 1 = VL, C

L

= 30 pF)

Notes: 11. Use of the I

2

C bus interface requires a license from Philips. I2C is a registered trademark of Philips

Semiconductors.

12. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.

Parameter Symbol Min Max Units

I2C® Mode

(SDOUT < 47kΩ to ground) (Note 11)

SCL Clock Frequency

f

scl

-100kHz

Bus Free Time Between Transmissions

t

buf

4.7

µ

s

Start Condition Hold Time (prior to first clock pulse)

t

hdst

4.0

µ

s

Clock Low Time

t

low

4.7

µ

s

Clock High Time

t

high

4.0

µ

s

Setup Time for Repeated Start Condition

t

sust

4.7

µ

s

SDA Hold Time from SCL Falling (Note 12)

t

hdd

0

µ

s

SDA Setup Time to SCL Rising

t

sud

250 ns

Rise Time of Both SDA and SCL Lines

t

r

1

µ

s

Fall Time of Both SDA and SCL Lines

t

f

300 ns

Setup Time for Stop Condition

t

susp

4.7

µ

s

t

buf

t

hdst

t

hdst

t

low

t

r

t

f

t

hdd

t

high

t

sud

t

sust

t

susp

Stop Start

Start

Stop

Repeated

SDA

SCL

Figure 4. I2C Control Port Timing