CATALYST CAT93C56, CAT93C57 Service Manual
查询CAT93C57LA-1.8-GT2E供应商
CAT93C56/57 (Die Rev. E)
N
E
G
F
O
R
L
A
H
E
E
2K-Bit Microwire Serial EEPROM
FEATURES
■ High speed operation: 1MHz
■ Low power CMOS technology
■ 1.8 to 5.5 volt operation
■ Selectable x8 or x16 memory organization
■ Self-timed write cycle with auto-clear
■ Software write protection
DESCRIPTION
The CAT93C56/57 are 2K-bit Serial EEPROM memory
devices which are configured as either registers of 16
bits (ORG pin at VCC) or 8 bits (ORG pin at GND). Each
register can be written (or read) serially by using the
DI (or DO) pin. The CAT93C56/57 are manufactured
PIN CONFIGURATION
L
E
A
E
E
R
D
F
■ Sequential read
■ Power-up inadvertant write protection
■ 1,000,000 Program/erase cycles
■ 100 year data retention
■ Commercial, industrial and automotive
temperature ranges
■ RoHS-compliant packages
using Catalyst’s advanced CMOS EEPROM floating
gate technology. The devices are designed to endure
1,000,000 program/erase cycles and has a data retention of 100 years. The devices are available in 8-pin DIP,
SOIC, TSSOP and 8-pad TDFN packages.
FUNCTIONAL SYMBOL
TM
DIP Package (L)
1
CS
SK
DI
DO
8
2
7
3
6
5
4
SOIC Package (V)
1
CS
SK
DI
DO
8
2
7
3
6
4
5
V
CC
NC
ORG
GND
V
CC
NC NC
ORG
GND
SOIC Package (W)
1
NC
CC
CS
SK
2
3
4
V
SOIC Package (X)
1
CS
2
SK
3
DI
4
DO
8
7
6
5
8
7
6
5
TSSOP Package (Y) TDFN Package (ZD4)
CS
SK
DO
1
2
3
DI
4
8
7
6
5
V
CC
NC
ORG
GND
V
CC
NC
ORG
GND
8
7
6
5
Bottom View
For Ordering Information details, see page 8.
ORG
GND
DO
DI
V
ORG
GND
CC
1
2
3
4
CS
SK
DI
DO
V
CC
ORG
CS
SK
DI
GND
DO
PIN FUNCTIONS
Pin Name Function
CS Chip Select
SK Clock Input
DI Serial Data Input
DO Serial Data Output
V
CC
GND Ground
ORG Memory Organization
NC No Connection
Note: When the ORG pin is connected to VCC, the x16 organization is selected. When it is connected to ground, the x8 pin is
selected. If the ORG pin is left unconnected, then an internal pullup
device will select the x16 organization.
Power Supply
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice.
Doc. No. 1088, Rev. O
CAT93C56/57
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias .................. -55°C to +125°C
Storage Temperature ........................ -65°C to +150°C
Voltage on any Pin with
Respect to Ground
VCC with Respect to Ground ................ -2.0V to +7.0V
Package Power Dissipation
Capability (T
(1)
............. -2.0V to +VCC +2.0V
= 25°C) ................................... 1.0W
A
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of
the device at these or any other conditions outside of those
listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and
reliability.
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current
(2)
........................ 100 mA
RELIABILITY CHARACTERISTICS
Symbol Parameter Reference Test Method Min Typ Max Units
(3)
I
N
T
V
LTH
END
DR
ZAP
(3)
(3)
(3)(4)
Endurance MIL-STD-883, Test Method 1033 1,000,000 Cycles/Byte
Data Retention MIL-STD-883, Test Method 1008 100 Years
ESD Susceptibility MIL-STD-883, Test Method 3015 2000 Volts
Latch-Up JEDEC Standard 17 100 mA
D.C. OPERATING CHARACTERISTICS
VCC = +1.8V to +5.5V, unless otherwise specified.
Symbol Parameter Test Conditions Min Typ Max Units
V
V
V
V
I
CC1
I
CC2
I
SB1
I
I
V
V
V
V
SB2
I
LI
LO
IL1
IH1
IL2
IH2
OL1
OH1
OL2
OH2
Power Supply Current fSK = 1MHz 3 mA
(Write) VCC = 5.0V
Power Supply Current fSK = 1MHz 500 µA
(Read) VCC = 5.0V
Power Supply Current CS = 0V 10 µA
(Standby) (x8 Mode) ORG=GND
Power Supply Current CS=0V 0 10 µA
(Standby) (x16Mode) ORG=Float or V
Input Leakage Current VIN = 0V to V
Output Leakage Current V
= 0V to VCC,1µA
OUT
CC
CC
1 µA
(Including ORG pin) CS = 0V
Input Low Voltage 4.5V ≤ V
Input High Voltage 4.5V ≤ V
Input Low Voltage 1.8V ≤ V
Input High Voltage 1.8V ≤ V
Output Low Voltage 4.5V ≤ V
< 5.5V -0.1 0.8 V
CC
< 5.5V 2 V
CC
< 4.5V 0 V
CC
< 4.5V V
CC
< 5.5V 0.4 V
CC
x 0.7 VCC+1 V
CC
+ 1 V
CC
x 0.2 V
CC
IOL = 2.1mA
Output High Voltage 4.5V ≤ V
< 5.5V 2.4 V
CC
IOH = -400µA
Output Low Voltage 1.8V ≤ V
< 4.5V 0.2 V
CC
IOL = 1mA
Output High Voltage 1.8V ≤ V
< 4.5V V
CC
- 0.2 V
CC
IOH = -100µA
Note:
(1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) This parameter is tested initially and after a design or process change that affects the parameter.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V.
Doc. No. 1088, Rev. O
2
CAT93C56/57
PIN CAPACITANCE
Symbol Test Conditions Min Typ Max Units
(2)
C
OUT
(2)
C
IN
INSTRUCTION SET
Output Capacitance (DO) V
=0V 5 pF
OUT
Input Capacitance (CS, SK, DI, ORG) VIN=0V 5 pF
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A.C. CHARACTERISTICS
Limits
VCC =V
=V
CC
CC
=
1.8V-5.5V 2.5V-5.5V 4.5V-5.5V
Test
Symbol Parameter Conditions Min Max Min Max Min Max Units
t
CSS
t
CSH
t
DIS
t
DIH
t
PD1
t
PD0
(1)
t
HZ
t
EW
t
CSMIN
t
SKHI
t
SKLOW
t
SV
SK
MAX
Note:
(1) Address bit A8 for 256x8 ORG and A7 for 128x16 ORG are "Don't Care" bits, but must be kept at either a "1" or "0" for READ, WRITE
and ERASE commands.
(2) This parameter is tested initially and after a design or process change that affects the parameter.
CS Setup Time 200 100 50 ns
CS Hold Time 0 0 0 ns
DI Setup Time 400 200 100 ns
DI Hold Time 400 200 100 ns
Output Delay to 1 1 0.5 0.25 µs
Output Delay to 0 1 0.5 0.25 µs
Output Delay to High-Z 400 200 100 ns
CL = 100pF
(3)
Program/Erase Pulse Width 10 10 10 ms
Minimum CS Low Time 1 0.5 0.25 µs
Minimum SK High Time 1 0.5 0.25 µs
Minimum SK Low Time 1 0.5 0.25 µs
Output Delay to Status Valid 1 0.5 0.25 µs
Maximum Clock Frequency DC 250 DC 500 DC 1000 kHz
3
Doc. No. 1088, Rev. O
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