BenQ Joybook-DC, Joybook-R48 Schematics

5 4 3 2 1

A

CZC Confidential

D

Board name: Mother Board Schematic

Project name:

CPL S01 (R48)

CZC Digital technologies Co.,LTD

1. System Block Diagram & Schematic page description;

2. Power Block Diagram & Discription;

3. Annotations & information;

Version: VerC

Start Date:JAN 6,2010

C

VerA Release Data:

4. Schematic modify Item and history;

5. Power on & off Sequence;

6. ACPI Mode Switch Timings;

7. Power On Sequence Map;

8. CLOCK Distribution;

B

Hardware drawing by:

Power drawing by:

A

Manager Sign by:

Hardware check by:

Power check by:

EMI Check by:

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

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Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A4

A4

A4

Date: Sheet

Date: Sheet

Date: Sheet

zw

zw

zw

R48 C

R48 C

R48 C

156Thursday, April 22, 2010

156Thursday, April 22, 2010

156Thursday, April 22, 2010

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S45 System Block Ver:A

PWR_BTN Board

D D

TFT

VGA

HDMI

RJ45 Board

MUX

MUX

MUX

LVDS
VGA
HDMI

DDR3 1GB/512M

Madison/Park

PCIE X16

LVDS

VGA

HDMI

C C

ODD

HDD

2.5"

SATA

SATA

SPI

MB

Arrandale

FDI

PCH
HM55/HM57

DMI X4

DDRIII

DDRIII

SO-DIMM 0

+V1.5,+V0.75S

SO-DIMM 1

+V1.5,+V0.75S

PCIE X1

PCIE X1

PCIE X1

PCIE X1

AZALIA LINK

SATA

To RJ45

LAN Controller

AR8131M

USB2.0

USB2.0

Azalia Codec

ALC662

QKey & LID Board

PWR Switch

R5538/TPS2231/OZ2709

USB2.0

mini PCIE Card
3G

SIM SLOT

mini PCIE
Card

AN12948A

Express Card

R

L

USB AUDIO Board

HP Out

BIOS

LPC BUS

USB2.0

SPI

B B

KB Ctrl & EC

WPC8763L

USB2.0

Cardreader

UB6238N

SD/MS/MS Pro CARD

EC Code

USB2.0

KB Matrix

USB2.0

USB Port

Camera

Mic In

USB
Port

USB
Port

+

eSATA

LED

USB2.0

BT

TP

CZC Technology

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Title

Title

Title

<Title>

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<Title>

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A4

A4

A4

Date: Sheet

Date: Sheet

Date: Sheet

R48 C

R48 C

R48 C

zw

zw

zw

of

of

of

256Thursday, April 22, 2010

256Thursday, April 22, 2010

256Thursday, April 22, 2010

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POWER RAIL

+V3.3AUX
+V5AUX

D D

+V1.5
+V0.75S
+V5S
+V3.3S
+V1.5S
+V1.8S
+V1.5S
+V1.1S
+Vcore
GFXCORE

14.31818MHz
XTAL

AC Mode Battery Mode

S0 S1 S3 S4 S5

ON ONONON ON

ON ON

ON

ON

OFF OFF

ON

ONON

ONON

OFF

OFFON ON

OFF

ON OFFON

OFF OFF OFFON ON

OFF OFF OFFON ON

S0 S1 S3 S4 S5

ON ON ON

ON

ON

OFFOFF
OFF
OFFOFF
OFFOFFOFFONON

OFFOFFOFFONON

OFFOFFOFFONON
OFFOFFOFFONON OFFOFFOFFONON

25MHz
XTAL

ON

ONON

ON OFFON

ON
ONONON

OFF
OFF

OFF OFF OFFON ON

OFF OFF OFFON ON

OFF OFF
OFF OFF
OFF OFF

OFFOFF
OFF

OFFON ON

OFFOFF
OFFOFFOFFONON

OFFOFFOFFONON

OFFOFFOFFONON

C C

133MHz

133MHz
BCLK

100MHz

CK505

DMI

100MHz
SATA

PCH

Buffered
Mode

96MHz

B B

DOT

BCLK

100MHz
DMI

120MHz
DP

100MHz
PEG A

100MHz
PCIE

CPU

GPU

NEW CARD
Mini PCIE SLOT X2

14.31818MHz
REF

33MHz
PCI

KBC

100MHz
PCIE

48MHz

LAN

25MHz
XTAL

No stuff

CZC Technology

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Title

Title

Title

<Title>

<Title>

<Title>

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

R48 C

R48 C

R48 C

zw

zw

zw

356Thursday, April 22, 2010

356Thursday, April 22, 2010

356Thursday, April 22, 2010

A

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4

3

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Board stack up description

Voltage Rails

D D

C C

+VDC

+VCC_core

+V1.1S

+V0.75S

+V1.5S

+V1.5

+V3.3AUX

+V3.3S

+V5AUX

+V5S

Primary DC system power supply(9V-12V)

Core/VTT voltage for processor

1.8V For PCH CPU+V1.8S

1.05V /1.1V For PCH CPU GPU

0.75V DDRIII Termination voltage

1.5V for system power

1.5V power rail for DDRIII

3.3V always on power rail

3.3V main power rail

5V always on power rail

5V main power rail

+Vcore:0.75V-1.1V

I2C SMB Address

Device

Clock Generator

SO-DIMM0

SO-DIMM1

OZ8805LN

Thermal Diode G781

Address

1101 001x

1010 000x

1010 010x

0001 011x

1001 100x

Hex(W/R)

D2H/D3H

0xA0

0xA4

16H/17H

98H/99H

Bus

SMB_CLK/DATA

EC_I2C_CLK2/DATA2

EC_I2C_CLK/DATA

Master

PCH

EC

Power States

state

Full ON

S1M(Power On Suspend)

S3(Suspend to RAM)

S4(Suspend to DISK)

S5/Soft Off

With AC IN

G3

With Battery

signal

PM_SLP_S4#

HIGH

LOW

LOW

LOW

PM_SLP_S3#

HIGH

HIGH

LOW

LOW

LOW

LOW

+V*AUX

ON

ON

ON

ON

ON

OFF

+V*

ON

ON

OFF

OFF

OFF

+V*S

ON

ON
OFF

OFF

OFF

OFF

CLOCKS

ON

LOW

OFF

OFF

OFF

OFF

Wake up Events

B B

PCB Layers

Top(Signal1)

Ground

Signal2

Signal3

Power

Signal4

Ground

Bottom(Signal5)

Trace Impedence:50ohm +/-15%

PCB Layer Difference signal Impedence list

USB signal difference impedence 85ohm
LVDS signal difference impedence 85ohm
DDRIII signal difference impedence 85ohm
DDRIII CLK signal difference impedence 68ohm

Wake Events

LID switch from EC

Power Button from EC

Keyboard from EC

USB device

State Supported(AC)

S3 support

S3,S4,S5 support

No

No

[Option]:ns -- Component marked "ns" is not stuff
[Use State]:new --Component Marked "new" is new Materiel.

PCB Footprints

SOT23

1

3

5

4

SOT23_5

2

3

2ON1

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

<Title>

<Title>

<Title>

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

R48 C

R48 C

R48 C

zw

zw

zw

456Thursday, April 22, 2010

456Thursday, April 22, 2010

456Thursday, April 22, 2010

A

5

U1A

U1A

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

A24
C23
B22
A21

B24
D23
B23
A22

D24
G24
F23
H23

D25
F24
E23
G23

E22
D21
D19
D18
G21
E19
F21
G18

D22
C21
D20
C18
G22
E20
F20
G19

F17
E17

C17

F18
D17

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

FDI_FSYNC[0]
FDI_FSYNC[1]

FDI_INT

FDI_LSYNC[0]
FDI_LSYNC[1]

DMI_TXN014
DMI_TXN114
DMI_TXN214
DMI_TXN314

DMI_TXP014
DMI_TXP114
DMI_TXP214

D D

DMI_TXP314

DMI_RXN014
DMI_RXN114
DMI_RXN214
DMI_RXN314

DMI_RXP014
DMI_RXP114
DMI_RXP214
DMI_RXP314

FDI_TXN[7:0]14

FDI_TXP[7:0]14

FDI_FSYNC014
FDI_FSYNC114

FDI_INT14

FDI_LSYNC014
FDI_LSYNC114

C C

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

U1B

PECI_PCH

PLT_RSTL_R

U1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

H_COMP3

H_COMP2

H_COMP1

H_COMP0

TP_SKTOCC_L

TP1TP1

H_CATERR_L

R6 0

PM_DRAM_PWRGD14

H_THRMTRIP_L16

H_PM_SYNC14

H_CPUPWRGD16

H_CPUPWRGD16

BUF_PLT_RST_L

TP13TP13

R12

R12

R6 0

R319 0

R319 0

1.5K,1%

1.5K,1%

R0402_0

R0402_0

R0402_0

R0402_0

H_THRMTRIP_L

R489 0 nsR489 0 ns

R10 0

R10 0

R318 0

R318 0

H_VTTPWRGD

R0402_0

R0402_0

R0402_0

R0402_0

R18

R18
750

750

H_PROCHOT_L

H_CPURST_L

VCCPWRGOOD_R

VDDPWRGOOD_R

H_PECI16

H_PROCHOT#38

B B

BUF_PLT_RST_L15,41

4

PEG_IRCOMP_R

B26

PEG_ICOMPI

A26

PEG_ICOMPO

B27

PEG_RCOMPO

A25

PEG_RBIAS

K35

PEG_RX#[0]

J34

PEG_RX#[1]

J33

PEG_RX#[2]

DMI Intel(R) FDI

DMI Intel(R) FDI

MISC THERMAL

MISC THERMAL

PWR MANAGEMENT

PWR MANAGEMENT

G35

PEG_RX#[3]

G32

PEG_RX#[4]

F34

PEG_RX#[5]

F31

PEG_RX#[6]

D35

PEG_RX#[7]

E33

PEG_RX#[8]

C33

PEG_RX#[9]

D32

PEG_RX#[10]

B32

PEG_RX#[11]

C31

PEG_RX#[12]

B28

PEG_RX#[13]

B30

PEG_RX#[14]

A31

PEG_RX#[15]

J35

PEG_RX[0]

H34

PEG_RX[1]

H33

PEG_RX[2]

F35

PEG_RX[3]

G33

PEG_RX[4]

E34

PEG_RX[5]

F32

PEG_RX[6]

D34

PEG_RX[7]

F33

PEG_RX[8]

B33

PEG_RX[9]

D31

PEG_RX[10]

A32

PEG_RX[11]

C30

PEG_RX[12]

A28

PEG_RX[13]

B29

PEG_RX[14]

A30

PEG_RX[15]

L33

PEG_TX#[0]

M35

PEG_TX#[1]

M33

PEG_TX#[2]

M30

PEG_TX#[3]

L31

PEG_TX#[4]

K32

PEG_TX#[5]

M29

PEG_TX#[6]

J31

PEG_TX#[7]

K29

PEG_TX#[8]

H30

PEG_TX#[9]

H29

PEG_TX#[10]

F29

PEG_TX#[11]

E28

PEG_TX#[12]

D29

PEG_TX#[13]

D27

PEG_TX#[14]

C26

PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

L34

PEG_TX[0]

M34

PEG_TX[1]

M32

PEG_TX[2]

L30

PEG_TX[3]

M31

PEG_TX[4]

K31

PEG_TX[5]

M28

PEG_TX[6]

H31

PEG_TX[7]

K28

PEG_TX[8]

G30

PEG_TX[9]

G29

PEG_TX[10]

F28

PEG_TX[11]

E27

PEG_TX[12]

D28

PEG_TX[13]

C27

PEG_TX[14]

C25

PEG_TX[15]

A16

BCLK

B16

BCLK#

AR30

BCLK_ITP

AT30

BCLK_ITP#

E16

PEG_CLK

D16

PEG_CLK#

A18

DPLL_REF_SSCLK

A17

DPLL_REF_SSCLK#

CLOCKS

CLOCKS

DDR3

MISC

DDR3

MISC

JTAG & BPM

JTAG & BPM

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

PRDY#
PREQ#

TRST#

TDI_M

TDO_M

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

F6

AL1
AM1
AN1

AN15
AP15

AT28
AP27

AN28

TCK

AP28

TMS

AT27

AT29

TDI

AR27

TDO

AR29
AP29

AN25

DBR#

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

EXP_RBIAS

R2 750R2 750

C1 0.1uF/16V,X7R DGPUC1 0.1uF/16V,X7R DGPU
C2 0.1uF/16V,X7R DGPUC2 0.1uF/16V,X7R DGPU
C3 0.1uF/16V,X7R DGPUC3 0.1uF/16V,X7R DGPU
C4 0.1uF/16V,X7R DGPUC4 0.1uF/16V,X7R DGPU
C5 0.1uF/16V,X7R DGPUC5 0.1uF/16V,X7R DGPU
C6 0.1uF/16V,X7R DGPUC6 0.1uF/16V,X7R DGPU
C7 0.1uF/16V,X7R DGPUC7 0.1uF/16V,X7R DGPU
C8 0.1uF/16V,X7R DGPUC8 0.1uF/16V,X7R DGPU
C9 0.1uF/16V,X7R DGPUC9 0.1uF/16V,X7R DGPU
C10 0.1uF/16V,X7R DGPUC10 0.1uF/16V,X7R DGPU
C11 0.1uF/16V,X7R DGPUC11 0.1uF/16V,X7R DGPU
C12 0.1uF/16V,X7R DGPUC12 0.1uF/16V,X7R DGPU
C13 0.1uF/16V,X7R DGPUC13 0.1uF/16V,X7R DGPU
C14 0.1uF/16V,X7R DGPUC14 0.1uF/16V,X7R DGPU
C15 0.1uF/16V,X7R DGPUC15 0.1uF/16V,X7R DGPU
C16 0.1uF/16V,X7R DGPUC16 0.1uF/16V,X7R DGPU

C17 0.1uF/16V,X7R DGPUC17 0.1uF/16V,X7R DGPU
C18 0.1uF/16V,X7R DGPUC18 0.1uF/16V,X7R DGPU
C19 0.1uF/16V,X7R DGPUC19 0.1uF/16V,X7R DGPU
C20 0.1uF/16V,X7R DGPUC20 0.1uF/16V,X7R DGPU
C21 0.1uF/16V,X7R DGPUC21 0.1uF/16V,X7R DGPU
C22 0.1uF/16V,X7R DGPUC22 0.1uF/16V,X7R DGPU
C23 0.1uF/16V,X7R DGPUC23 0.1uF/16V,X7R DGPU
C24 0.1uF/16V,X7R DGPUC24 0.1uF/16V,X7R DGPU
C25 0.1uF/16V,X7R DGPUC25 0.1uF/16V,X7R DGPU
C26 0.1uF/16V,X7R DGPUC26 0.1uF/16V,X7R DGPU
C27 0.1uF/16V,X7R DGPUC27 0.1uF/16V,X7R DGPU
C28 0.1uF/16V,X7R DGPUC28 0.1uF/16V,X7R DGPU
C29 0.1uF/16V,X7R DGPUC29 0.1uF/16V,X7R DGPU
C30 0.1uF/16V,X7R DGPUC30 0.1uF/16V,X7R DGPU
C31 0.1uF/16V,X7R DGPUC31 0.1uF/16V,X7R DGPU
C32 0.1uF/16V,X7R DGPUC32 0.1uF/16V,X7R DGPU

Layout Note: All
resistors need to be
close to Processor
(ARD/CFD) to avoid stubs

CK_BCK1
CK_BCK1_L

CPU_DRAMRST_L

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

PM_EXTTS_L0
PM_EXTTS_L1

XDP_PREQ_L

XDP_TCLK
XDP_TMS
XDP_TRST_L

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M

XDP_TDO_M

PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0

PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0

R22 0

R22 0

49.9,1%R1 49.9,1%R1

PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0

PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0

TP64TP64

TP53TP53
TP54TP54

R161 51.1,1%R161 51.1,1%

R0402_0

R0402_0

R21 1KR21 1K

lane reversal

CLK_MCP_BCLK 12,16
CLK_MCP_BCLK_L 12,16

CLK_MCH_PEG 12,14
CLK_MCH_PEG_L 12,14

CLK_DP_P 14
CLK_DP_N 14

+V1.1S_VTT

R7
10K,1%R710K,1%

+V1.1S_VTT

+V3.3S

XDP_TMS

XDP_TDI_R

XDP_PREQ_L

XDP_TCLK

3

R8
10K,1%R810K,1%

R1054 0 nsR1054 0 ns

NO_STUFF

R9

R9

12.4K,1%

12.4K,1%

ns

ns

CAD Note:
TCLK: Provide a scope test point at the
Processor socket breakout via to verify
signal integrity of the first
platforms.

+V1.1S_VTT

NO_STUFF

R11 51.1,1% nsR11 51.1,1% ns

R13 51.1,1% nsR13 51.1,1% ns

R15 51.1,1% nsR15 51.1,1% ns

R19 51.1,1% nsR19 51.1,1% ns

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3PEG_TXN3
PEG_TXN4PEG_TXN4
PEG_TXN5PEG_TXN5
PEG_TXN6PEG_TXN6
PEG_TXN7PEG_TXN7
PEG_TXN8PEG_TXN8
PEG_TXN9PEG_TXN9
PEG_TXN10PEG_TXN10
PEG_TXN11PEG_TXN11
PEG_TXN12PEG_TXN12
PEG_TXN13PEG_TXN13
PEG_TXN14PEG_TXN14
PEG_TXN15PEG_TXN15

PEG_TXP0
PEG_TXP1PEG_TXP1
PEG_TXP2PEG_TXP2
PEG_TXP3PEG_TXP3
PEG_TXP4PEG_TXP4
PEG_TXP5PEG_TXP5
PEG_TXP6PEG_TXP6
PEG_TXP7PEG_TXP7
PEG_TXP8PEG_TXP8
PEG_TXP9PEG_TXP9
PEG_TXP10PEG_TXP10
PEG_TXP11PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PM_EXTTS#0_EC 9,27

PM_EXTTS_L1 9

XDP_TRST_L

PEG_RXN[15:0] 41

PEG_RXP[15:0] 41

CPU_DRAMRST_L

R17

R17

51.1,1%

51.1,1%

ns

ns

PEG_TXN[15:0] 41

PEG_TXP[15:0] 41

R874

R874
100K

100K

R873 0 R0402_0R873 0 R0402_0

V1_1S1_5S_PWROK33,36

R872 0 nsR872 0 ns

R927

R927
10K

10K

312

BSS138Q6BSS138
Q6

R876 0

R876 0

C1043

C1043
470pF/50V,X7R

470pF/50V,X7R

2

+V3.3AUX 13,14,15,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35
+V1.5S 7,16,21,22,28,35,36
+V1.5 7,8,10,11,33,35
+V1.1S_VTT 7,12,16,17,35,36
+V3.3S 9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48

+V1.5S_CPU 7

+V1.5

R8771KR877
1K

R875 0

R875 0

R0402_0

R0402_0

1

2

+V3.3AUX

VCC

VCC

GND

GND

R0402_0

R0402_0

53

DRAMRST_CNTRL_PCH 16DRAMRST_CNTRL8,27

C314

C314

0.1uF/16V,X7R

0.1uF/16V,X7R

4

SOT23_5

SOT23_5

SN74AHC1G08DBV

SN74AHC1G08DBV
U34

U34

DDR3_DRAMRST_L 10,11

DRAMPWRGD_CPU

1

+V3.3S

Processor Compensation Signals

H_COMP2

R25

R25

R24

R24

20,1%

20,1%

20,1%

20,1%

3

49.9,1%

49.9,1%

H_COMP1H_COMP3

H_COMP0

R26

R26

R27

R27

49.9,1%

49.9,1%

DDR3 Compensation Signals

SM_RCOMP_2

SM_RCOMP_1

SM_RCOMP_0

R32

R32

24.9,1%

24.9,1%

R31

R31

100,1%

100,1%

R33

R33

130,1%

130,1%

Layout Note:
Place these
resistors near
Processor

2

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

1

zw

zw

zw

of

of

of

556Thursday, April 22, 2010

556Thursday, April 22, 2010

556Thursday, April 22, 2010

R16

R16

1.5K,1%

1.5K,1%

+V1.5S_CPU

R23

R23

1.1K,1%

1.1K,1%

R34

R34
750

750

ns

ns

NO_STUFF

Processor Pullups

+V1.1S_VTT

R28

R28

49.9,1%

49.9,1%

H_CATERR_L

H_PROCHOT_L

H_CPURST_L

R2968R29

R30

R30
68

68

ns

ns

68

4

C235

C235

0.1uF/16V,X7R

A A

V1_1S1_5S_PWROK33,36

R490 1KR490 1K

C312

C312

0.1uF/16V,X7R

0.1uF/16V,X7R

1

2

0.1uF/16V,X7R

53

VCC

VCC

R14 1.5K,1%R14 1.5K,1%

4

GND

GND

SOT23_5

SOT23_5

SN74AHC1G08DBV

SN74AHC1G08DBV
U33

U33

H_VTTPWRGD

R20

R20
750

750

DRAMPWRGD_CPU

VDDPWRGOOD_R

5

5

U1C

U1C

D D

C C

B B

M_A_DQ[63:0]10

M_A_BS010
M_A_BS110
M_A_BS210

M_A_CAS_L10
M_A_RAS_L10
M_A_WE_L10

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4

M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_CAS_L
M_A_RAS_L
M_A_WE_L

AJ10

AL10
AK12

AK11

AM10

AR11
AL11

AT11
AP12

AM12

AN12

AM13

AT14
AT12
AL13
AR14
AP14

A10
C10

B10
D10
E10

H10

G10

AH5
AF5
AK6
AK7
AF6
AG5

AK8
AL7

AL8
AN8

AM9
AN9

AC3
AB2

AE1
AB3
AE9

SA_DQ[0]
SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15]
SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20]
SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39]
SA_DQ[40]

AJ9

SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]

U7

SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

4

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
AA7
P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_CKE0

M_CKE1M_A_DQ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS_L0
M_A_DQS_L1
M_A_DQS_L2
M_A_DQS_L3
M_A_DQS_L4
M_A_DQS_L5
M_A_DQS_L6
M_A_DQS_L7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_CLK_DDR0 10
M_CLK_DDR0_L 10
M_CKE0 10

M_CLK_DDR1 10
M_CLK_DDR1_L 10
M_CKE1 10

M_CS_L0 10
M_CS_L1 10

M_ODT0 10
M_ODT1 10

M_A_DM[7:0] 10

M_A_DQS_L[7:0] 10

M_A_DQS[7:0] 10

M_A_A[15:0] 10

3

U1D

U1D

M_B_DQ[63:0]11

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_BS011
M_B_BS111
M_B_BS211

M_B_CAS_L11
M_B_RAS_L11
M_B_WE_L11

M_B_CAS_L
M_B_RAS_L
M_B_WE_L

AM6

AM4
AM3

AR10
AT10

AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4

AN2
AK5
AK2

AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9

AB1

AC5

AC6

M1

M4

W5

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5

F3
G4
H6
G2

J6

J3
G1
G5

J2

J1

J5
K2

L3

K5
K4

N5

R7

Y7

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

2

W8

SB_CK[0]

W9

SB_CK#[0]

M3

SB_CKE[0]

V7

SB_CK[1]

V6

SB_CK#[1]

M2

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

AC7

SB_ODT[0]

AD1

SB_ODT[1]

D4

SB_DM[0]

E1

SB_DM[1]

H3

SB_DM[2]

K1

SB_DM[3]

AH1

SB_DM[4]

AL2

SB_DM[5]

AR4

SB_DM[6]

AT8

SB_DM[7]

D5

SB_DQS#[0]

F4

SB_DQS#[1]

J4

SB_DQS#[2]

L4

SB_DQS#[3]

AH2

SB_DQS#[4]

AL4

SB_DQS#[5]

AR5

SB_DQS#[6]

AR8

SB_DQS#[7]

C5

SB_DQS[0]

E3

SB_DQS[1]

H4

SB_DQS[2]

M5

SB_DQS[3]

AG2

SB_DQS[4]

AL5

SB_DQS[5]

AP5

SB_DQS[6]

AR7

SB_DQS[7]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS_L0
M_B_DQS_L1
M_B_DQS_L2
M_B_DQS_L3
M_B_DQS_L4
M_B_DQS_L5
M_B_DQS_L6
M_B_DQS_L7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

1

M_CLK_DDR2 11
M_CLK_DDR2_L 11
M_CKE2 11

M_CLK_DDR3 11
M_CLK_DDR3_L 11
M_CKE3 11

M_CS_L2 11
M_CS_L3 11

M_ODT2 11
M_ODT3 11

M_B_DM[7:0] 11

M_B_DQS_L[7:0] 11

M_B_DQS[7:0] 11

M_B_A[15:0] 11

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

OCD_CPU

OCD_CPU

A A

5

4

3

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

OCD_CPU

OCD_CPU

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A

A

A

Date: Sheet

Date: Sheet

Date: Sheet

2

R48 C

R48 C

R48 C

zw

zw

zw

656Thursday, April 22, 2010

656Thursday, April 22, 2010

656Thursday, April 22, 2010

1

of

of

of

5

U1F

U1F

+VCORE

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

D D

C C

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

CPU VIDS

CPU VIDS

SENSE LINES

SENSE LINES

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31

1.1V RAIL POWER

1.1V RAIL POWER

VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

PROC_DPRSLPVR

VTT_SELECT

ISENSE

VCC_SENSE

VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

G15

AN35

AJ34
AJ35

B15
A15

PSI_L

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

PM_DPRSLPVR_R

H_VTTVID1

TP_VTT_SENSE

TP_VSS_SENSE_VTT

C33

C33
10uF/10V X5R

10uF/10V X5R

H_VID[0:6] 38

CORE_IMON 38

C34

C34
10uF/10V X5R

10uF/10V X5R

C52

C52
22uF/6.3V,X5R

22uF/6.3V,X5R

TP5TP5

TP2TP2

TP3TP3

+VTT_43
+VTT_44

TP4TP4

C35

C35
10uF/10V X5R

10uF/10V X5R

+V1.1S

+VCORE

R1166

R1166
1K

1K

ns

ns

R11671KR1167
1K

R41

R41
100

100

R42

R42
100

100

C36

C36
10uF/10V X5R

10uF/10V X5R

C53

C53
22uF/6.3V,X5R

22uF/6.3V,X5R

R38 0R38 0
R39 0R39 0

C37

C37
10uF/10V X5R

10uF/10V X5R

+V1.1S

R11681KR1168
1K

VCC_SENSE 38
VSS_SENSE 38

4

C38

C38
10uF/10V X5R

10uF/10V X5R

+V1.1S_VTT

TP14TP14

C39

C39
10uF/10V X5R

10uF/10V X5R

+V1.1S_VTT

C40

C40
10uF/10V X5R

10uF/10V X5R

ns

ns

+V1.1S_VTT

+VCC_GFXCORE

+VCC_GFXCORE

C64

C64
10uF/10V X5R

10uF/10V X5R

3

C65

C65
10uF/10V X5R

10uF/10V X5R

+V1.1S_VTT

+V1.1S_VTT

C41

C41
22uF/6.3V,X5R

22uF/6.3V,X5R

C56

C56
22uF/6.3V,X5R

22uF/6.3V,X5R

C43

C43
22uF/6.3V,X5R

22uF/6.3V,X5R

C57

C57
22uF/6.3V,X5R

22uF/6.3V,X5R

C42

C42
10uF/10V X5R

10uF/10V X5R

C54

C54
22uF/6.3V,X5R

22uF/6.3V,X5R

C55

C55
22uF/6.3V,X5R

22uF/6.3V,X5R

C58

C58
22uF/6.3V,X5R

22uF/6.3V,X5R

C44

C44
10uF/10V X5R

10uF/10V X5R

U1G

U1G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

GRAPHICS

GRAPHICS

FDI PEG & DMI

FDI PEG & DMI

POWER

POWER

2

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

GRAPHICS VIDs

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66

1.1V1.8V

1.1V1.8V

VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

GFXVR_DPRSLPVR_R

VCC_AXG_SENSE 37
VSS_AXG_SENSE 37

1uF/10V,X5R

1uF/10V,X5R

C59

C59
1uF/10V,X5R

1uF/10V,X5R

GFXVR_VID_0 37
GFXVR_VID_1 37
GFXVR_VID_2 37
GFXVR_VID_3 37
GFXVR_VID_4 37
GFXVR_VID_5 37
GFXVR_VID_6 37

GFXVR_EN

GFXVR_IMON

C46

C46

C45

C45

1uF/10V,X5R

1uF/10V,X5R

+V1.1S_VTT

+V1.1S_VTT

C60

C60
1uF/10V,X5R

1uF/10V,X5R

1uF/10V,X5R

1uF/10V,X5R

1uF/10V,X5R

1uF/10V,X5R

C47

C47

C61

C61

2.2uF/6.3V,X7R

2.2uF/6.3V,X7R

C48

C48

GFX_IMON 37

C49

C49

1uF/10V,X5R

1uF/10V,X5R

GFXVR_EN 37

TP23TP23

C62

C62

4.7uF/10V,X5R

4.7uF/10V,X5R

GFXVR_DPRSLPVR_R

GFXVR_EN

+V1.1S_VTT

+V1.5S_CPU

C50

C50
22uF/6.3V,X5R

22uF/6.3V,X5R

+V1.8S

C63

C63
22uF/6.3V,X5R

22uF/6.3V,X5R

R36 1K nsR36 1K ns

C51

C51
22uF/6.3V,X5R

22uF/6.3V,X5R

1

10KR128ns10KR128

ns

470R35 470R35

GFXVR_EN

FB92 120ohm/100MHz,2.5A nsFB92 120ohm/100MHz,2.5Ans

FB93 120ohm/100MHz,2.5A nsFB93 120ohm/100MHz,2.5Ans

FB90 120ohm/100MHz,2.5AFB90 120ohm/100MHz,2.5A

FB91 120ohm/100MHz,2.5AFB91 120ohm/100MHz,2.5A

C136 0.1uF/16V,X7RC136 0.1uF/16V,X7R
C137 0.1uF/16V,X7RC137 0.1uF/16V,X7R
C138 0.1uF/16V,X7RC138 0.1uF/16V,X7R
C139 0.1uF/16V,X7RC139 0.1uF/16V,X7R
C143 0.1uF/16V,X7RC143 0.1uF/16V,X7R
C144 0.1uF/16V,X7RC144 0.1uF/16V,X7R

+V1.5

+V1.5S

+V1.5+V1.5S_CPU

DIMM0

DIMM1

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

B B

C68

C68
22uF/6.3V,X5R

22uF/6.3V,X5R

C80

C80
10uF/10V X5R

10uF/10V X5R

C91

C91
10uF/10V X5R

10uF/10V X5R

22u*12

C69

C69
22uF/6.3V,X5R

22uF/6.3V,X5R

C81

C81
10uF/10V X5R

10uF/10V X5R

C92

C92
10uF/10V X5R

10uF/10V X5R

C70

C70
22uF/6.3V,X5R

22uF/6.3V,X5R

C82

C82
10uF/10V X5R

10uF/10V X5R

C93

C93
10uF/10V X5R

10uF/10V X5R

C71

C71
22uF/6.3V,X5R

22uF/6.3V,X5R

10u*16

C83

C83
10uF/10V X5R

10uF/10V X5R

4

+VCORE

C66

C66
22uF/6.3V,X5R

22uF/6.3V,X5R

+VCORE

C78

A A

C78
10uF/10V X5R

10uF/10V X5R

+VCORE

C67

C67
22uF/6.3V,X5R

22uF/6.3V,X5R

C79

C79
10uF/10V X5R

10uF/10V X5R

C90

C90
10uF/10V X5R

10uF/10V X5R

5

C72

C72
22uF/6.3V,X5R

22uF/6.3V,X5R

C84

C84
10uF/10V X5R

10uF/10V X5R

+V1.1S 13,14,16,17,34,35,36
+VCC_GFXCORE 37
+V1.8S 15,16,28,34,36
+V1.1S_VTT 5,12,16,17,35,36
+VCORE 28,38
+V1.5 5,8,10,11,33,35
+V1.5S 16,21,22,28,35,36
+V1.5S_CPU 5

C73

C73
22uF/6.3V,X5R

22uF/6.3V,X5R

C85

C85
10uF/10V X5R

10uF/10V X5R

C74

C74
22uF/6.3V,X5R

22uF/6.3V,X5R

C86

C86
10uF/10V X5R

10uF/10V X5R

C75

C75
22uF/6.3V,X5R

22uF/6.3V,X5R

C87

C87
10uF/10V X5R

10uF/10V X5R

C76

C76
22uF/6.3V,X5R

22uF/6.3V,X5R

C88

C88
10uF/10V X5R

10uF/10V X5R

C77

C77
22uF/6.3V,X5R

22uF/6.3V,X5R

C89

C89
10uF/10V X5R

10uF/10V X5R

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet

Date: Sheet

3

2

Date: Sheet

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

1

zw

zw

zw

of

of

of

756Thursday, April 22, 2010

756Thursday, April 22, 2010

756Thursday, April 22, 2010

5

U1H

U1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

D D

C C

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

VSS

VSS

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34

VSS81

AE33

VSS82

AE32

VSS83

AE31

VSS84

AE30

VSS85

AE29

VSS86

AE28

VSS87

AE27

VSS88

AE26

VSS89

AE6

VSS90

AD10

VSS91

AC8

VSS92

AC4

VSS93

AC2

VSS94

AB35

VSS95

AB34

VSS96

AB33

VSS97

AB32

VSS98

AB31

VSS99

AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

4

U1I

U1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29
E24
E21
E18
E13
E11

D33
D30
D26

C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11

A29
A27
A23

VSS196
VSS197
VSS198
VSS199
VSS200
VSS201

E8

VSS202

E5

VSS203

E2

VSS204
VSS205
VSS206
VSS207

D9

VSS208

D6

VSS209

D3

VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226

B8

VSS227

B6

VSS228

B4

VSS229
VSS230
VSS231
VSS232

A9

VSS233

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

3

2

1

+V1.5 5,7,10,11,33,35

U1E

U1E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREFDQ

H17

SB_DIMM_VREFDQ

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

CFG0

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

CFG3

AL32

CFG[3]

CFG4

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

CFG7

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

IC,ARD_CFD_rPGA,R1P5

IC,ARD_CFD_rPGA,R1P5

RESERVED

RESERVED

R50 0 nsR50 0 ns
R51 0 nsR51 0 ns

ns

ns

VREF_CH_A_DIMM
VREF_CH_B_DIMM

R1046

R1046

R1047

R1047

100K

100K

100K

100K

H_RSVD17_R
H_RSVD18_R

M_VREF_DQ_DIMM0C10
M_VREF_DQ_DIMM1C11

B B

DRAMRST_CNTRL5,27

Close to DIMM

+V1.5

R1042

R1042
1K,1%

1K,1%

R1043

R1043
1K,1%

1K,1%

+V1.5

R1044

R1044
1K,1%

1K,1%

R1045

R1045
1K,1%

1K,1%

R71 0

R71 0

R91 0

R91 0

R0402_0

R0402_0

R0402_0

R0402_0

M_VREF_DQ_DIMM0C

M_VREF_DQ_DIMM1C

R43 0 nsR43 0 ns
R44 0 nsR44 0 ns

312

2N7002KQ72N7002K

Q7

2N7002KQ82N7002K

312

Q8

CFG7

R46 3.01K,1%

R46 3.01K,1%

NO_STUFF

A A

5

4

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD_NCTF_37

RSVD38
RSVD39

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD58

RSVD_TP_59
RSVD_TP_60

RSVD62

RSVD63

RSVD64

RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2

KEY

D15
C15

RSVD64_R

AJ15

RSVD65_R

AH15

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

TP_RSVD86

AP34

VSS

R61 0 nsR61 0 ns

R48 0 nsR48 0 ns
R49 0 nsR49 0 ns

3

PCI-Express Configuration Select

CFG0 1:Single PEG

0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

1 :Normal Operation
0 :Lane Numbers Reversed

CFG3

15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port
attached to Embedded Display Port

CFG4

0:Enabled; An external Display Port
device is connected to the Embedded
Display Port

2

CFG0

NO_STUFF

R45

R45

3.01K,1%

3.01K,1%

ns

ns

CFG3

R47

R47

3.01K,1%

3.01K,1%

CFG4

R52

R52

3.01K,1%

3.01K,1%

ns

ns

NO_STUFF

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

Date: Sheet

Date: Sheet

Date: Sheet

Layout Note:
Location of all CFG strap resistors needs
to be close to trace to minimize stub

CZC Technology

CZC Technology

CZC Technology

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

A3

A3

A3

zw

zw

zw

R48 C

R48 C

R48 C

1

of

of

of

856Thursday, April 22, 2010

856Thursday, April 22, 2010

856Thursday, April 22, 2010

5

A

4

3

2

1

D D

C C

+V3.3S

R1053

R1053

R1050

R1050

10K

10K

10K

10K

ns

ns

ns

ns

Input To EC

PM_EXTTS_DIMM27

PM_EXTTS_L15

R1051 0 nsR1051 0 ns

R1052 0 nsR1052 0 ns

TS#_DIMM0_110,11

PM_EXTTS#0_EC5,27

TO EC output

TS#_DIMM0_1

R1048 0 nsR1048 0 ns

R1049 0 nsR1049 0 ns

+V3.3S

+V3.3S

EC_SMB1_CLK14,22,27

EC_SMB1_DAT14,22,27

PM_THRM_DN#

G781_PULLHIGH

+V3.3S 5,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48

R320 ns

R320 ns

100

100

0.1uF/16V,X7R

0.1uF/16V,X7R

ns

ns

8

7

6

4

SOIC8_1P27_3P9

SOIC8_1P27_3P9

ns

ns

C141

C141

SMBCLK

SMBDATA

ALERT#

THERM#

12

vdd

1

VCC

G781

G781
ADM1032AR

ADM1032AR
LM86CIM

LM86CIM
MAX6657MSA

MAX6657MSA
SOIC-8

SOIC-8

GND

5

U2

U2

2

DXP

2200pF/25V,X7R ns

2200pF/25V,X7R ns

3

DXN

W83L771ASG

W83L771ASG

EC_SMB1_CLK14,22,27

EC_SMB1_DAT14,22,27

G781_PULLHIGH

C140

C140

PM_THRM_DN#

TSSOP8_P65_3P0

TSSOP8_P65_3P0

12

THERMDA

THERMDC

8

SMBCLK

7

SMBDATA

6

ALERT#

4

THERM#

vdd

5

1

1

DXP

VCC

DXN

G781

G781
ADM1032AR

ADM1032AR
LM86CIM

LM86CIM
MAX6657MSA

MAX6657MSA
SOIC-8

SOIC-8

GND

W83L771 TSSOP8

W83L771 TSSOP8

ns

ns

U28

U28

2 3

Q155

Q155
MMBT3904-F

MMBT3904-F

ns

ns

2

3

Under DIMM

THERMDA

THERMDC

B B

A

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

<Title>

<Title>

<Title>

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet of

R48 C

R48 C

R48 C

zw

zw

zw

956Thursday, April 22, 2010

956Thursday, April 22, 2010

956Thursday, April 22, 2010

of

of

5

4

3

2

1

Channel A High :9.2mm

DIMM1A

M_A_A[15:0]6

D D

M_A_BS06
M_A_BS16
M_A_BS26
M_CS_L06
M_CS_L16
M_CLK_DDR06
M_CLK_DDR0_L6
M_CLK_DDR16
M_CLK_DDR1_L6
M_CKE06
M_CKE16
M_A_CAS_L6
M_A_RAS_L6
M_A_WE_L6

M_ODT06
M_ODT16

SODIMM0_1_SMB_CLK_R
SODIMM0_1_SMB_DATA_R

SMB_CLK_S211,12,14
SMB_DATA_S211,12,14

M_A_DM[7:0]6

C C

M_A_DQS[7:0]6

M_A_DQS_L[7:0]6

B B

+V1.5

M_CS_L0
M_CS_L1

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

SA0_DIM0
SA1_DIM0

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS_L0
M_A_DQS_L1
M_A_DQS_L2
M_A_DQS_L3
M_A_DQS_L4
M_A_DQS_L5
M_A_DQS_L6
M_A_DQS_L7

DIMM1A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRIIISODIMM-204PS_BLACK-RH-1

DDRIIISODIMM-204PS_BLACK-RH-1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ0

5

M_A_DQ1

7

M_A_DQ2

15

M_A_DQ3

17

M_A_DQ4

4

M_A_DQ5

6

M_A_DQ6

16

M_A_DQ7

18

M_A_DQ8

21

M_A_DQ9

23

M_A_DQ10

33

M_A_DQ11

35

M_A_DQ12

22

M_A_DQ13

24

M_A_DQ14

34

M_A_DQ15

36

M_A_DQ16

39

M_A_DQ17

41

M_A_DQ18

51

M_A_DQ19

53

M_A_DQ20

40

M_A_DQ21

42

M_A_DQ22

50

M_A_DQ23

52

M_A_DQ24

57

M_A_DQ25

59

M_A_DQ26

67

M_A_DQ27

69

M_A_DQ28

56

M_A_DQ29

58

M_A_DQ30

68

M_A_DQ31

70

M_A_DQ32

129

M_A_DQ33

131

M_A_DQ34

141

M_A_DQ35

143

M_A_DQ36

130

M_A_DQ37

132

M_A_DQ38

140

M_A_DQ39

142

M_A_DQ40

147

M_A_DQ41

149

M_A_DQ42

157

M_A_DQ43

159

M_A_DQ44

146

M_A_DQ45

148

M_A_DQ46

158

M_A_DQ47

160

M_A_DQ48

163

M_A_DQ49

165

M_A_DQ50

175

M_A_DQ51

177

M_A_DQ52

164

M_A_DQ53

166

M_A_DQ54

174

M_A_DQ55

176

M_A_DQ56

181

M_A_DQ57

183

M_A_DQ58

191

M_A_DQ59

193

M_A_DQ60

180

M_A_DQ61

182

M_A_DQ62

192

M_A_DQ63

194

M_A_DQ[63:0] 6

+V3.3S

C95

C95

C94

C94

2.2uF/6.3V,X7R

2.2uF/6.3V,X7R

0.1uF/16V,X7R

0.1uF/16V,X7R

TS#_DIMM0_19,11

DDR3_DRAMRST_L5,11

M_VREF_DQ_DIMM0C8

R1157 0 nsR1157 0 ns

M_VREF11,33

VRefCA on both SO-DIMMs can be connected by a single M_VREF_MCH trace

VRefDQ on both SO-DIMMs can be shared by a second separate M_VREF_MCH trace

+V0.75S

C100

C100
1uF/10V,X5R

1uF/10V,X5R

M_VREF_DQ_DIMM0C

C97

C97

C96

C96

2.2uF/6.3V,X7R

2.2uF/6.3V,X7R

0.1uF/16V,X7R

0.1uF/16V,X7R

M_VREF_DQ_DIMM0

C98

C98

C99

C99

0.1uF/16V,X7R

0.1uF/16V,X7R

2.2uF/6.3V,X7R

2.2uF/6.3V,X7R

C101

C101
1uF/10V,X5R

1uF/10V,X5R

C102

C102
1uF/10V,X5R

1uF/10V,X5R

+V1.5

C103

C103
1uF/10V,X5R

1uF/10V,X5R

DIMM1B

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

DDRIIISODIMM-204PS_BLACK-RH-1

DDRIIISODIMM-204PS_BLACK-RH-1

Place near Vtt pins

DIMM1B

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203

VTT

204

VTT

205

205

206

206

Place these caps
close to VTT1 and
VTT2. Place C21
on common path
for both DIMM's

+V0.75S

Place two capacitors close to the VR

Layout Note: Place

C110

C110

+

C107

C106

C105

C104

C104
10UF/6.3V,X5R

10UF/6.3V,X5R

+V3.3S

Note:
If SA0_DIM0 = 0, SA1_DIM0 = 0
SO-DIMM0 SPD Address is 0xA0
SO-DIMM0 TS Address is 0x30

If SA0_DIM0 = 1, SA1_DIM0 = 0

A A

SO-DIMM0 SPD Address is 0xA2
SO-DIMM0 TS Address is 0x32

NO_STUFF

R53

R53
10K

10K

ns

ns

R54

R54
10K

10K

R55

R55
10K

10K

SA0_DIM0
SA1_DIM0

5

C105
10UF/6.3V,X5R

10UF/6.3V,X5R

4

C106
10UF/6.3V,X5R

10UF/6.3V,X5R

C107
10UF/6.3V,X5R

10UF/6.3V,X5R

C108

C108
10UF/6.3V,X5R

10UF/6.3V,X5R

+V1.5 5,7,8,11,33,35
+V3.3S 5,9,11,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48
+V0.75S 11,28,33

C109

C109
10UF/6.3V,X5R

10UF/6.3V,X5R

3

+

220uF/6.3V,POSCAP

220uF/6.3V,POSCAP

ns

ns

NO_STUFF

these Caps near
SO-DIMM1.

+V1.5

C111

C111
1uF/10V,X5R

1uF/10V,X5R

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A

A

A

Date: Sheet

Date: Sheet

Date: Sheet

2

and one between the two DIMMs

C112

C112
1uF/10V,X5R

1uF/10V,X5R

CZC Technology

CZC Technology

CZC Technology

C113

C113
1uF/10V,X5R

1uF/10V,X5R

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

C114

C114
1uF/10V,X5R

1uF/10V,X5R

zw

zw

zw

of

of

of

10 56Thursday, April 22, 2010

10 56Thursday, April 22, 2010

10 56Thursday, April 22, 2010

1

5

4

3

2

1

Channel B High :5.2mm

DIMM2A

M_B_A[15:0]6

D D

M_B_BS06
M_B_BS16
M_B_BS26
M_CS_L26

M_CS_L36
M_CLK_DDR26
M_CLK_DDR2_L6
M_CLK_DDR36
M_CLK_DDR3_L6
M_CKE26
M_CKE36
M_B_CAS_L6
M_B_RAS_L6
M_B_WE_L6

SMB_CLK_S210,12,14

C C

SMB_DATA_S210,12,14

M_ODT26

M_ODT36

M_B_DM[7:0]6

M_B_DQS[7:0]6

M_B_DQS_L[7:0]6

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

SA0_DIM1
SA1_DIM1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS_L0
M_B_DQS_L1
M_B_DQS_L2
M_B_DQS_L3
M_B_DQS_L4
M_B_DQS_L5
M_B_DQS_L6
M_B_DQS_L7

B B

Note:
SO-DIMM1 SPD Address is 0xA4
SO-DIMM1 TS Address is 0x34

DIMM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDRIIISODIMM-204PS_BLACK-RH

DDRIIISODIMM-204PS_BLACK-RH

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQ1

7

M_B_DQ2

15

M_B_DQ3

17

M_B_DQ4

4

M_B_DQ5

6

M_B_DQ6

16

M_B_DQ7

18

M_B_DQ8

21

M_B_DQ9

23

M_B_DQ10

33

M_B_DQ11

35

M_B_DQ12

22

M_B_DQ13

24

M_B_DQ14

34

M_B_DQ15

36

M_B_DQ16

39

M_B_DQ17

41

M_B_DQ18

51

M_B_DQ19

53

M_B_DQ20

40

M_B_DQ21

42

M_B_DQ22

50

M_B_DQ23

52

M_B_DQ24

57

M_B_DQ25

59

M_B_DQ26

67

M_B_DQ27

69

M_B_DQ28

56

M_B_DQ29

58

M_B_DQ30

68

M_B_DQ31

70

M_B_DQ32

129

M_B_DQ33

131

M_B_DQ34

141

M_B_DQ35

143

M_B_DQ36

130

M_B_DQ37

132

M_B_DQ38

140

M_B_DQ39

142

M_B_DQ40

147

M_B_DQ41

149

M_B_DQ42

157

M_B_DQ43

159

M_B_DQ44

146

M_B_DQ45

148

M_B_DQ46

158

M_B_DQ47

160

M_B_DQ48

163

M_B_DQ49

165

M_B_DQ50

175

M_B_DQ51

177

M_B_DQ52

164

M_B_DQ53

166

M_B_DQ54

174

M_B_DQ55

176

M_B_DQ56

181

M_B_DQ57

183

M_B_DQ58

191

M_B_DQ59

193

M_B_DQ60

180

M_B_DQ61

182

M_B_DQ62

192

M_B_DQ63

194

SO-DIMM1 is placed farther from
the Processor than SO-DIMM0

M_B_DQ0

5

M_B_DQ[63:0] 6

M_VREF_DQ_DIMM1C8

R1158 0 nsR1158 0 ns

M_VREF10,33

VRefCA on both SO-DIMMs can be connected by a single M_VREF_MCH trace

VRefDQ on both SO-DIMMs can be shared by a second separate M_VREF_MCH trace

+V0.75S

C121

C121
1uF/10V,X5R

1uF/10V,X5R

+V1.5 5,7,8,10,33,35
+V3.3S 5,9,10,12,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48
+V0.75S 10,28,33

+V1.5

+V3.3S

C115

C115

0.1uF/16V,X7R

0.1uF/16V,X7R

M_VREF_DQ_DIMM1C

C117

C117

0.1uF/16V,X7R

0.1uF/16V,X7R

M_VREF_DQ_DIMM1

C119

C119

0.1uF/16V,X7R

0.1uF/16V,X7R

C122

C122
1uF/10V,X5R

1uF/10V,X5R

C116

C116

2.2uF/6.3V,X7R

2.2uF/6.3V,X7R

DDR3_DRAMRST_L5,10

C118

C118

2.2uF/6.3V,X7R

2.2uF/6.3V,X7R

C120

C120

2.2uF/6.3V,X7R

2.2uF/6.3V,X7R

C123

C123
1uF/10V,X5R

1uF/10V,X5R

TS#_DIMM0_19,10

C124

C124
1uF/10V,X5R

1uF/10V,X5R

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

DDRIIISODIMM-204PS_BLACK-RH

DDRIIISODIMM-204PS_BLACK-RH

Place near Vtt pins

DIMM2B

DIMM2B

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VTT
VTT

205
206

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

+V0.75S

203
204

205
206

+V1.5

+V3.3S

R56

R56
10K

10K

SA1_DIM1

SA0_DIM1

R57

R57
10K

A A

10K

5

+V1.5

C133

C132

C132
1uF/10V,X5R

1uF/10V,X5R

C133

0.1uF/16V,X7R

0.1uF/16V,X7R

C134

C134

0.1uF/16V,X7R

0.1uF/16V,X7R

C135

C135

0.1uF/16V,X7R

0.1uF/16V,X7R

4

3

C125

C125
10uF/10V X5R

10uF/10V X5R

C126

C126
10uF/10V X5R

10uF/10V X5R

C127

C127
10uF/10V X5R

10uF/10V X5R

C128

C128
10uF/10V X5R

10uF/10V X5R

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A

A

A

Date: Sheet

Date: Sheet

Date: Sheet

C129

C129
10uF/10V X5R

10uF/10V X5R

CZC Technology

CZC Technology

CZC Technology

C130

C130
10uF/10V X5R

10uF/10V X5R

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

2

C131

C131

+

+

220uF/2.5V

220uF/2.5V

ns

ns

R48 C

R48 C

R48 C

Layout Note: Place
these Caps near
SO-DIMM1.

zw

zw

zw

11 56Thursday, April 22, 2010

11 56Thursday, April 22, 2010

11 56Thursday, April 22, 2010

1

of

of

of

5

4

3

2

1

+V3.3S

Total Power:495mW
Typical current:IDD=150mA

U44

U44
IDTCV186-2C

+V3.3S

D D

C933

+V1.1S_VTT

Reserved for ICS9LPRS525

+V3.3S_CLK

R796

R796

R791

R791

10K

10K

10K

10K

ns

ns

ns

PCI3/CFGP

C C

ns

R797

R797

R793

R793

10K

10K

10K

10K

Design Note:

1.PCI2_TME
0=overclocking of CPU and SRC allowed
1=overclocking of CPU and SRC NOT allowed

2..PCIF5_ITP_EN
0=SRC8/SRC8#
1=ITP/ITP#
On powerup,The logic value on this pin determines Function 0 or Function 1

3.PCI4_SRC5_EN
0=PCI_STOP#/CPU_STOP#
1=SRC5/SRC5#
On powerup,The logic value on this pin determines Function 0 or Function 1

C933

10UF/6.3V,X5R

10UF/6.3V,X5R

FB84 300ohm/100MHz,1A

FB84 300ohm/100MHz,1A

ns

ns

R792

R792
10K

10K

ns

ns

R795

R795
10K

10K

R794

R794
10K

10K

FB83

FB83

300ohm/100MHz,1A

300ohm/100MHz,1A

VDDIO_CLK

PCI4_SRC5_ENPCI2_TME PCIF5_ITP_EN

+V3.3S_CLK

C941

C938

C938

0.1uF/16V,X7R

0.1uF/16V,X7R

C944

C944

0.1uF/16V,X7R

0.1uF/16V,X7R

1KR782 1KR782

C941

0.1uF/16V,X7R

0.1uF/16V,X7R

C945

C945

0.1uF/16V,X7R

0.1uF/16V,X7R

PCI2_TME
PCI3/CFGP
PCI4_SRC5_EN
PCIF5_ITP_EN

C937

C937

C936

10UF/6.3V,X5R

10UF/6.3V,X5R

C935

C935

0.1uF/16V,X7R

0.1uF/16V,X7R

C949

C949

0.1uF/16V,X7R

0.1uF/16V,X7R

CK505_FSC

CK505_FSB

CK505_FSA

C936

0.1uF/16V,X7R

0.1uF/16V,X7R

C942

C942

0.1uF/16V,X7R

0.1uF/16V,X7R

R781 10KR781 10K

R786 22R786 22

R787 2.2KR787 2.2K

R788 22R788 22

0.1uF/16V,X7R

0.1uF/16V,X7R

C943

C943

0.1uF/16V,X7R

0.1uF/16V,X7R

TP66TP66

C939

C939

0.1uF/16V,X7R

C940

C940

C946

C946

CLK_BUF_REF1414

0.1uF/16V,X7R

C934

C934

4.7uF/10V,X5R

4.7uF/10V,X5R

4.7uF/10V,X5R

4.7uF/10V,X5R

C947

C947

C948

C948

10UF/6.3V,X5R

10UF/6.3V,X5R

10UF/6.3V,X5R

10UF/6.3V,X5R

EXT_25/4824

IDTCV186-2C

TSSOP56_P5_6P1

TSSOP56_P5_6P1

2

VDD_PCI

9

VDD_48

16

VDD

31

VDD_SRC

47

VDD_CPU

53

VDD_REF

12

VDD_96_IO

20

VDD_PLL3_IO

26

VDD_SRC_IO1

37

VDD_SRC_IO2

41

VDD_CPU_IO

1

PCI0/CR#A

3

PCI1/CR#B

4

PCI2/TME

5

PCI3

6

PCI4/SRC5_EN

7

PCI_F5/ITP_EN

54

REF0/FSC/TEST_SEL

49

FSB/TEST_MODE

10

USB_48MHz/FSA

8

VSS_PCI

11

VSS_48

15

VSS_IO

19

VSS_PLL3

23

VSS_SRC1

34

VSS_SRC2

44

VSS_CPU

50

VSS_REF

CKPWRGD/PWRDWN#

SRC5#/CPU_STOP#

SRC5/PCI_STOP#

SRC1#/DREFSSCLK#

SRC1/DREFSSCLK

@3.3V Core and 3.3V IO

40

NC

48

56

SCLK

55

SDATA

52

XTAL_IN

51

XTAL_OUT

45

CPU0#

46

CPU0

42

CPU1#

43

CPU1

38

SRC8#/ITP#

39

SRC8/ITP

35

SRC7#/CR#_E

36

SRC7/CR#_F

32

SRC6#

33

SRC6

29
30

28

SRC4#

27

SRC4

25

SRC3#/CR#_D

24

SRC3/CR#_C

22

SRC2#/SATA#

21

SRC2/SATA

18
17

SRC0/DOT96

14
13

SRC0#/DOT96#

IO_VOUT

VR_PWRGD_CLKEN

SMB_CK SMB_CLK_S2

SMB_DAT SMB_DATA_S2

XTAL_IN
XTAL_OUT

CPU_STOP#
PCI_STOP#_R PCI_STOP#PCI_STOP#_R

R99 10KR99 10K

R127 0 nsR127 0 ns
R112 10KR112 10K

R62 0R62 0
R60 0R60 0

R68 0R68 0
R67 0R67 0

R66 0R66 0
R65 0R65 0

R64 0R64 0
R63 0R63 0

R700 R700
R690 R690

R75 0 nsR75 0 ns
R74 0 nsR74 0 ns

R72 0 nsR72 0 ns
R73 0 nsR73 0 ns

R98 0 nsR98 0 ns

R76 0 nsR76 0 ns
R77 0 nsR77 0 ns

CLK_BUF_CPU_BCLK_LCK505_CPU0_L
CLK_BUF_CPU_BCLKCK505_CPU0

CLK_BUF_EXP_NCK505_SRC2_L
CLK_BUF_EXP_PCK505_SRC2

CLK_BUF_CKSSCD_NCK505_SRC1_L
CLK_BUF_CKSSCD_PCK505_SRC1

CLK_BUF_DOT96_NCK505_SRC0_L
CLK_BUF_DOT96_PCK505_SRC0

+V3.3S 5,9,10,11,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48
+V1.1S_VTT 5,7,16,17,35,36

SMB_CLK_S2 10,11,14
SMB_DATA_S2 10,11,14

CLK_BUF_CPU_BCLK_L 14
CLK_BUF_CPU_BCLK 14

CLK_MCP_BCLK_L 5,16
CLK_MCP_BCLK 5,16

CLK_MCH_PEG_L 5,14
CLK_MCH_PEG 5,14

PCIE_REFCLKN
PCIE_REFCLKP

PCI_STOP# 16

PCIE_REFCLKN 14,41

PCIE_REFCLKP 14,41

PEG_CLKREQ#_CLK 14,42

CLK_BUF_EXP_N 14
CLK_BUF_EXP_P 14

CLK_BUF_CKSSCD_N 14
CLK_BUF_CKSSCD_P 14

CLK_BUF_DOT96_N 14
CLK_BUF_DOT96_P 14

IO_VOUT

R866 33R866 33

CPU_STOP#
PCI_STOP#_R

1

C1034

C1034

100pF/50V,NPO

100pF/50V,NPO

+V3.3S

R865

R865
15,1%

15,1%

Q92

Q92

MMBT3904-F

MMBT3904-F

2 3

R59 10KR59 10K
R108 10K nsR108 10K ns

+V3.3S

VDDIO_CLK

C927

C927

0.1uF/16V,X7R

0.1uF/16V,X7R

C950

C950

10UF/6.3V,X5R

10UF/6.3V,X5R

+V1.1S_VTT

R778

FSC

FSB

BSEL2

B B

1

00

0

00

FSA

BSEL1

BSEL0

0

1

1

11

1

000

00

1

11

0

111

Host Clock
frequency MHz

100

133

166

200

266

333

400

Reserved

CLK_BUF_REF14

EXT_25/48

C931 100pF/50V,NPO nsC931 100pF/50V,NPO ns

C932 100pF/50V,NPO nsC932 100pF/50V,NPO ns

R778
1K

1K

ns

ns

R7770R777
0

R776

R776
1K

1K

ns

ns

R7700R770
0

R78056R780
56

CK505_FSA

CK505_FSB

CK505_FSC

R772

R772
1K

1K

ns

ns

Y7

Y7

14.318MHz,18pf

14.318MHz,18pf

1 2

X2S60X35

X2S60X35

C925

C925
27pF/50V,NPO

27pF/50V,NPO

C926

C926
27pF/50V,NPO

27pF/50V,NPO

XTAL_IN

XTAL_OUT

+V3.3S

R783

R783
10K

10K

R918

R918
10K

10K

CLKEN#38

1

3

Q91

Q91
2N7002K

2N7002K

2

VR_PWRGD_CLKEN

R774

R774
10K

10K

ns

ns

A A

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A4

A4

A4

Date: Sheet

Date: Sheet

5

4

3

Date: Sheet

2

R48 C

R48 C

R48 C

zw

zw

zw

of

of

of

12 56Thursday, April 22, 2010

12 56Thursday, April 22, 2010

12 56Thursday, April 22, 2010

1

5

+V3.3AUX +V3.3_RTC

JCMOS - CMOS SETTING

C147

D1

2

BAT54CD1BAT54C

3

1

BAT_D

RTC Circuitry

R79 20K,1%R79 20K,1%

D D

R811MR81
1M

R821KR82
1K

3

Wafer2P125

Wafer2P125

RTCCN1

RTCCN1

HWS2_1P25R

HWS2_1P25R

1
2

4

RTC_ADHESIVE1

RTC_ADHESIVE1

RTC_Adhesive

C C

RTC_Adhesive

assembly

assembly

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_RST_L

PCH_JTAG_TCK

RTC_CBL1

RTC_CBL1

RTCBAT with Cable

RTCBAT with Cable

assembly

assembly

R84 51nsR84 51ns

R85 51nsR85 51ns

R86 51nsR86 51ns

R88 10K nsR88 10K ns

R89 51 nsR89 51 ns

NO_STUFF

R90 4.7KR90 4.7K

+V3.3S

R248 8.2K nsR248 8.2K ns

+

+

-

-

+V1.1S

C147
1uF/10V,X5R

1uF/10V,X5R

R78 20K,1%R78 20K,1%

C150

C150
1uF/10V,X5R

1uF/10V,X5R

INTVRMEN - Integrated SUS

1.1V VRM Enable ?HIGH

SPI_SI

SPI_SI

SAVE CMOS -- (1- 2) DEFAULT
CLEAR CMOS -- (2-3)

RTCRST_C

C149

C149

1uF/10V,X5R

1uF/10V,X5R

J4

J4

JOPEN

JOPEN
ns

ns

HDA_BIT_CLK25

HDA_SYNC25

HDA_SPKR25

HDA_RST_L25

HDA_SDIN025

HDA_SDIN125

HDA_SDOUT25

iTPM Enable/Disable

Enable iTPM : R333 stuff
Disable iTPM : R333 no stuff

J1

J1

JOPEN

JOPEN
ns

ns

+V3.3_RTC

B B

Layout Toplogy for SPI CLK and MOSI

L1 = 1-5"

L2 or L3 = 0.5-2"

L2 +/- L3 <= 0.1"

PCH

L1

MISO Topology Open

A A

5

SPI Device 1

L2

L3

SPI Device 2

4

C148

C148
18pF/50V,NPO

18pF/50V,NPO

32.768kHz,20ppm,12.5pF

32.768kHz,20ppm,12.5pF

1

23

X4S67x15

X4S67x15

4

C151

C151
18pF/50V,NPO

18pF/50V,NPO

Cap values depend on Xtal

C247 10pF/50V,NPO nsC247 10pF/50V,NPO ns

R164 33R164 33

R165 33R165 33

R173 33R173 33

R229 33R229 33

SPI_CLK

SPI_CS_L0

SPI_CS_L1

TP58TP58

SPI_SI

SPIMISO

+V3.3S

R95 1K nsR95 1K ns

R96 10KR96 10K

HDA_DOCK_EN_L

R971KR97
1K

4

Y2

Y2

SM_INTRUDER_L

R83

R83

TP7TP7

TP8TP8

HDA_DOCK_EN_L

TP_HDA_DOCK_RST_L

TP9TP9

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_RST_L

NO_STUFF

INT_SERIRQ

4

3

2

1

6

R80

R80
10M

10M

RTC_X1
RTC_X2

RTC_RST_L

SRTC_RST_L

PCH_INTVRMEN

332K,1%

332K,1%

HDA_SPKR

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

Flash Descriptor Security Override

HDA_DOCK_EN# BIOS_LOCK:

GPIO33

5

BIOS_LOCK

BIOS_LOCK
DIP MSS3

DIP MSS3

SWS7D67x26

SWS7D67x26

放在后盖下方。

7

U3A

U3A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

No Reboot Strap R86

No stuff = Default

HDA_SPKR

Stuff = No Reboot

LOCK=2-3 (default)
UNLOCK=1-2

HDA_SPKR

RTCIHDA

RTCIHDA

SPI JTAG

SPI JTAG

3

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

LPC

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

3

LDRQ0#

SERIRQ

R463

R463

3.3K

3.3K

D33
B33
C32
A32

C34

A34
F34

AB9

AK7
AK6
AK11
AK9

AH6
AH5
AH9
AH8

AF11
AF9
AF7
AF6

AH3
AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16

AF15

T3

Y9

V1

R464

R464

ns

ns

3.3K

3.3K

SPI_CS_L0
SPIMISO

WP#

SPI_CS_L0
SPIMISO

WP#

+V1.1S 7,14,16,17,34,35,36
+V3.3S 5,9,10,11,12,14,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48
+V3.3AUX 5,14,15,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35

+V3.3_RTC 17

LDRQ0_L
LDRQ1_L

C152 0.01uF/25V,X7RC152 0.01uF/25V,X7R
C153 0.01uF/25V,X7RC153 0.01uF/25V,X7R

C156 0.01uF/25V,X7RC156 0.01uF/25V,X7R
C157 0.01uF/25V,X7RC157 0.01uF/25V,X7R

HM55 No function.

C158 0.01uF/25V,X7RC158 0.01uF/25V,X7R
C159 0.01uF/25V,X7RC159 0.01uF/25V,X7R
C160 0.01uF/25V,X7RC160 0.01uF/25V,X7R
C161 0.01uF/25V,X7RC161 0.01uF/25V,X7R

+V1.1S

+V3.3S

+V3.3S

R462

R462
10K

10K

SPI_CS_L0
SPIMISO

WP#

+V3.3S

12

1
2
3

SATACOMP

SATA_DET_L0

SATA_DET_L1_R

U31

U31
W25Q32BVSSIG

W25Q32BVSSIG

SOIC8_1P27_3P9

SOIC8_1P27_3P9

1

CE#

2

SO

3

WP#

4

VSS

ns

ns

U30

U30
W25Q32BVSSIG

W25Q32BVSSIG

SOP8_1P27_5P3

SOP8_1P27_5P3

1

CE#

2

SO

3

WP#

4

VSS

R87 37.4,1%R87 37.4,1%

VDD

HOLD#

SCK

SI

VDD

HOLD#

SCK

SI

8
7
6
5

8
7
6
5

R94 10KR94 10K

R92 10KR92 10K

HOLD#
SPI_CLK
SPI_SI

HOLD#
SPI_CLK
SPI_SI

2

LPC_AD0 21,27
LPC_AD1 21,27
LPC_AD2 21,27
LPC_AD3 21,27

LPC_FRAME# 21,27

INT_SERIRQ 21,27

SATA_RXN0 23
SATA_RXP0 23
SATA_TXN0 23
SATA_TXP0 23

SATA_RXN1 23
SATA_RXP1 23
SATA_TXN1 23
SATA_TXP1 23

SATA_RXN2 22
SATA_RXP2 22
SATA_TXN2 22
SATA_TXP2 22

R869

R869
10K

10K

SATA_LED# 29

C405

C405

0.1uF/16V,X7R

0.1uF/16V,X7R

8

1

8

7

2

7

6

3

6

5

445

BIOS_CN2

BIOS_CN2

H2X4KZ

H2X4KZ

2X4 2mm

2X4 2mm

ns

ns

2

1

+V3.3S

LDRQ0_L
LDRQ1_L

Distance between the PCH and
cap on the "P" signal should
be identical distance between
the PCH and cap on the "N"
signal for same pair.

+V3.3S

+V3.3S

HOLD#
SPI_CLK
SPI_SI

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A4

A4

A4

Date: Sheet

Date: Sheet

Date: Sheet

R870 10KR870 10K
R871 10KR871 10K

zw

zw

zw

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

13 56Thursday, April 22, 2010

13 56Thursday, April 22, 2010

13 56Thursday, April 22, 2010

1

of

of

of

5

U3B

U3B

PCIE_RXN121
PCIE_RXP121
PCIE_TXN121
PCIE_TXP121

PCIE_RXN221
PCIE_RXP221
PCIE_TXN221
PCIE_TXP221

PCIE_RXN2_EXPRESS22
PCIE_RXP2_EXPRESS22
PCIE_TXN2_EXPRESS22
PCIE_TXP2_EXPRESS22

C170 0.1uF/16V,X7RC170 0.1uF/16V,X7R
C171 0.1uF/16V,X7RC171 0.1uF/16V,X7R

C172 0.1uF/16V,X7R 3GC172 0.1uF/16V,X7R 3G
C169 0.1uF/16V,X7R 3GC169 0.1uF/16V,X7R 3G

C358 0.1uF/16V,X7RC358 0.1uF/16V,X7R
C357 0.1uF/16V,X7RC357 0.1uF/16V,X7R

D D

PCIE_RXN6_LAN24

PCIE_RXP6_LAN24
PCIE_TXN6_LAN24
PCIE_TXP6_LAN24

C173 0.1uF/16V,X7RC173 0.1uF/16V,X7R
C174 0.1uF/16V,X7RC174 0.1uF/16V,X7R

HM55 No function.

+V3.3AUX

CLK_PCIE_LAN_L
CLK_PCIE_LAN

+V5S +V3.3S

312

R352 0 nsR352 0 ns

R106 10KR106 10K

+V3.3AUX

Q4

CLK_PCIE_MINICARD1_L21

CLK_PCIE_MINICARD121

CLK_PCIE_MINICARD2_L21

CLK_PCIE_MINICARD221

C C

CLK_MINICARD1_OE_L21

CLK_MINICARD2_OE_L21

GPP_CLK2_N22
GPP_CLK2_P22

EXPRESS_CLKREQ#22

CLK_PCIE_LAN_L24
CLK_PCIE_LAN24

CLK_PCIE_LAN_REQ_L24

SMB_CLK

CLK_MINICARD2_OE_L

R114 10KR114 10K

R117 10KR117 10K

2N7002KQ42N7002K

PCH_SRC0_CLKREQ_L

CLK_MINICARD1_OE_L

PCH_SRC3_CLKREQ_L

R118 0 R0402_0R118 0 R0402_0
R119 0 R0402_0R119 0 R0402_0

PCH_SRC5_CLKREQ_L

R129

R129

4.7K

4.7K

SMB_CLK_S2

SMB_CLK_S3

R360 0 R0402_0R360 0 R0402_0

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_RXN6_R
PCIE_RXP6_R
PCIE_TXN6_C
PCIE_TXP6_C

CK_PEG1_NCLK_PCIE_MINICARD1_L
CK_PEG1_PCLK_PCIE_MINICARD1

CK_PEG2_NCLK_PCIE_MINICARD2_L
CK_PEG2_PCLK_PCIE_MINICARD2

TP_CLKOUT_PCIE3N
TP_CLKOUT_PCIE3P

PCH_SRC4_CLKREQ_L

CK_PEGB_N
CK_PEGB_P

SMB_CLK_S2 10,11,12

SMB_CLK_S3 10,11,12

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

SMB_CLK_A 21,22,24

SMBus

SMBus

PCI-E*

PCI-E*

Link

Link

Controller

Controller

PEG_A_CLKRQ# / GPIO47

PEG

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

Clock Flex

SMB_DATA

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

312

R353 0 nsR353 0 ns

4

PCH_GPIO11

B9

SMB_CLK

H14

SMBCLK

SMB_DATA

C8

SMBDATA

PCH_UPEK_INIT_L

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

+V5S

2N7002KQ52N7002K
Q5

J14

C6

G8

M14

E10

G12

T13

T11

T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

SML0_CLK

SML0_DATA

PCH_GPIO74

SML1_CLK

R109 0 R0402_0R109 0 R0402_0

SML1_DATA

R110 0 R0402_0R110 0 R0402_0

PEG_CLKREQ_L

CK_PEG_N

R100 0 DGPUR100 0 DGPU

CK_PEG_P

R101 0 DGPUR101 0 DGPU

CK_DMI_N

R102 0 R0402_0R102 0 R0402_0

CK_DMI_P

R103 0 R0402_0R103 0 R0402_0

CK_DP0_N

R104 0 R0402_0R104 0 R0402_0

CK_DP0_P

R105 0 R0402_0R105 0 R0402_0

CLK_BUF_DOT96_N
CLK_BUF_DOT96_P

CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P

CLK_BUF_REF14

CLK_PCI_FB

25M_PCH01 XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

TP_CLK_FLEX0

TP_CLK_FLEX1

TP_CLK_FLEX2

TP_CLK_FLEX3

+V3.3S

R131

R131

4.7K

4.7K

SMB_DATA_S2

SMB_DATA_S3

R359 0 R0402_0R359 0 R0402_0

TP10TP10

TP11TP11

TP12TP12

TP15TP15

PCIE_REFCLKN

PCIE_REFCLKP

SMB_DATA_S2 10,11,12

SMB_DATA_S3 10,11,12

SMB_DATA_A 21,22,24

CLK_MCH_PEG_L
CLK_MCH_PEG

CLK_DP_N
CLK_DP_P

CLK_BUF_EXP_N 12
CLK_BUF_EXP_P 12

CLK_BUF_CPU_BCLK_L 12
CLK_BUF_CPU_BCLK 12

CLK_BUF_DOT96_N 12
CLK_BUF_DOT96_P 12

CLK_BUF_CKSSCD_N 12
CLK_BUF_CKSSCD_P 12

CLK_BUF_REF14 12

CLK_PCI_FB 15

R113 0 R0402_0R113 0 R0402_0

R115 91,1%R115 91,1%

R351

R351

If no IGP,stuff

0

0

ns

ns

EC_SMB1_CLK 9,22,27

EC_SMB1_DAT 9,22,27

PEG_CLKREQ#_CLK12,42

PCIE_REFCLKN 12,41
PCIE_REFCLKP 12,41

CLK_MCH_PEG_L 5,12
CLK_MCH_PEG 5,12

CLK_DP_N 5
CLK_DP_P 5

+V1.1S

X2 : D04-1001100-T16
D04-1001100-T02

PEG_CLKREQ#_CLK

PEG_CLKREQ_L

PEG_CLKREQ_L

R1161MR116
1M

1 2

3

+V3.3S 5,9,10,11,12,13,15,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48
+V3.3AUX 5,13,15,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35
+V5AUX 17,19,22,24,27,28,29,32,33,34,35,36
+V1.1S 7,13,16,17,34,35,36
+V5S 15,16,17,18,19,20,21,23,25,26,28,29,35,36,37,38

+V3.3S

R10551KR1055

1K

R111 0

R111 0

R0402_0

R0402_0

3

Q171

Q171

2N7002K

2N7002K

SOT23

SOT23

1

DGPU

DGPU

2

R107 10K

R107 10K

DGPU

DGPU

C177

Y10

Y10
25MHz,20pF

25MHz,20pF

C177

18pF/50V,NPO

18pF/50V,NPO

C178

C178

18pF/50V,NPO

18pF/50V,NPO

PCH_GPIO74

PCH_GPIO11

PCH_UPEK_INIT_L

SMB_CLK

SMB_DATA

SML0_CLK

SML0_DATA

SML1_CLK

SML1_DATA

Cap values depend on Xtal

R120 10KR120 10K

R121 10KR121 10K

R122 10KR122 10K

R123 2.2KR123 2.2K

R124 2.2KR124 2.2K

R125 2.2KR125 2.2K

R126 2.2KR126 2.2K

R130 2.2K nsR130 2.2K ns

R132 2.2K nsR132 2.2K ns

IGP Stuff

+V3.3AUX

DGPU_PWROK 16

2

1

U3C

U3C

MPWROK_R

AUXPWROK_R

AC_PRESENT

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

DMI_RXN05
DMI_RXN15

DMI_COMP_R

SYS_PWROK

PM_PCH_PWROK

MAIN_PWROK
PM_MPWROK

PWR_BTN#27

DMI_RXN25
DMI_RXN35

DMI_RXP05
DMI_RXP15
DMI_RXP25
DMI_RXP35

DMI_TXN05
DMI_TXN15
DMI_TXN25
DMI_TXN35

DMI_TXP05
DMI_TXP15
DMI_TXP25
DMI_TXP35

R144 0R144 0

R233 0R233 0

R304 0 nsR304 0 ns

R231 0 nsR231 0 ns

PM_SYSRST_L

0R465 ns0R465 ns

R146

R146

0 ns

0 ns

PM_RSMRST_PCHL PM_SLP_S4_L

SUS_PWR_ACK

PM_BATLOW#

B B

+V1.1S

R133

R133

49.9,1%

49.9,1%

+V3.3S

PM_PCH_PWROK

R141

R141
10K

10K

AUXPWROK_R

R147

R147
10K

10K

A A

LAN DISABLE

EC OD output

SUS_PWR_ACK_EC27

AC_PRESENT_EC27,42

PM_RSMRST#27,28,32,36

PM_BATLOW#27

must be high to startup

R1151 1KR1151 1K

PM_DRAM_PWRGD5

5

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_M#

TP23

System Power Management

System Power Management

PMSYNCH

SLP_LAN# / GPIO29

4

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

PM_CLKRUN_L

TP_SUS_CLK

TP_PM_SLP_DSWL

SUS_STAT# 19

TP16TP16

PM_SLP_S5_L

R230 0 R0402_0R230 0 R0402_0

PM_SLP_S3_L

R232 0 R0402_0R232 0 R0402_0

PM_SLP_M_L

R305 0R305 0

TP18TP18

H_PM_SYNC

PM_SLP_LAN_LPM_RI_L

If integrated Intel LAN is not supported on the platform,
GPIO29 must be left as No Connect. In addition,
this GPIO29 can not be used for any other purposes.

FDI_TXN0 5
FDI_TXN1 5
FDI_TXN2 5
FDI_TXN3 5
FDI_TXN4 5
FDI_TXN5 5
FDI_TXN6 5
FDI_TXN7 5

FDI_TXP0 5
FDI_TXP1 5
FDI_TXP2 5
FDI_TXP3 5
FDI_TXP4 5
FDI_TXP5 5
FDI_TXP6 5
FDI_TXP7 5

FDI_INT 5

FDI_FSYNC0 5

FDI_FSYNC1 5

FDI_LSYNC0 5

FDI_LSYNC1 5

R322 0 R0402_0R322 0 R0402_0

TP61TP61

SLP_S3#

PCIE_WAKE# 21,22,24

SLP_S4# 22,27,28,29

SLP_S3# 22,27,28,36

H_PM_SYNC 5

PM_CLKRUN# 27

+V3.3S

PM_CLKRUN_L

R136 8.2KR136 8.2K

R138 100KR138 100K

+V3.3S

C406

C406

0.1uF/16V,X7R

0.1uF/16V,X7R

SYS_PWROK

PM_PCH_PWROK

PM_MPWROK

0R466 R0402_00R466 R0402_0

0R467 R0402_00R467 R0402_0

3

53

VCC

VCC

1

2

U32

U32

SOT23_5

SOT23_5

SN74AHC1G08DBV

SN74AHC1G08DBV

MAIN_PWROK 27,36

IMVP_OK 19,27,28,38

4

GND

GND

2

SUS_PWR_ACK

AC_PRESENT

PM_RI_L

PM_BATLOW#PM_RSMRST_PCHL

PCIE_WAKE#

PM_SLP_LAN_L

PM_SYSRST_L

PWR_BTN#

+V3.3AUX

R134 10KR134 10K

R135 10KR135 10K

R137 10KR137 10K

R139 8.2KR139 8.2K

R140 1KR140 1K

R142 10K nsR142 10K ns

R143 10K nsR143 10K ns

R145 10KR145 10K

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

1

zw

zw

zw

of

of

of

14 56Thursday, April 22, 2010

14 56Thursday, April 22, 2010

14 56Thursday, April 22, 2010

5

U3D

HSYNC
VSYNC

T48
T47

Y48

AB48

Y45

AB46

V48

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53
AT49
AU52
AT53

AY51
AT48
AU50
AT51

AA52
AB53
AD53

V51
V53

Y53
Y51

AD48
AB51

U3D

L_BKLTEN
L_VDD_EN

L_BKLTCTL

L_DDC_CLK
L_DDC_DATA

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

LVDS

LVDS

CRT

CRT

L_BKLT_EN19

LVDS_VDD_EN19

L_BKLT_CTRL19

LVDS_DDC_CLK19
LVDS_DDC_DATA19

Place near PCH

D D

C C

+V3.3S

L_BKLT_EN

B B

A A

R148

R148

2.37K,1%

2.37K,1%

LVDSA_CLK_L19
LVDSA_CLK19

LVDSA_DATA0_L19
LVDSA_DATA1_L19
LVDSA_DATA2_L19

LVDSA_DATA019
LVDSA_DATA119
LVDSA_DATA219

LVDSB_CLK_L19
LVDSB_CLK19

LVDSB_DATA0_L19
LVDSB_DATA1_L19
LVDSB_DATA2_L19

LVDSB_DATA019
LVDSB_DATA119
LVDSB_DATA219

CRT_BLUE20
CRT_GREEN20
CRT_RED20

CRT_DDC_CLK20
CRT_DDC_DATA20

CRT_HSYNC20
CRT_VSYNC20

R468 2.2KR468 2.2K

R469 2.2KR469 2.2K

R292 2.2KR292 2.2K

R293 2.2KR293 2.2K

R156 10KR156 10K

R157 10KR157 10K

R163 100KR163 100K

CRT_DDC_CLK

CRT_DDC_DATA

LVDS_DDC_CLK

LVDS_DDC_DATA

L_CTRL_CLK

L_CTRL_DATA

+V5S 14,16,17,18,19,20,21,23,25,26,28,29,35,36,37,38
+V1.8S 7,16,28,34,36
+V3.3S 5,9,10,11,12,13,14,16,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48

+V5AUX 17,19,22,24,27,28,29,32,33,34,35,36

5

L_BKLT_EN
LVDS_VDD_EN

L_BKLT_CTRL

LVDS_DDC_CLK
LVDS_DDC_DATA

TP19TP19

R153 0R153 0
R154 0R154 0

L_CTRL_CLK
L_CTRL_DATA

LVDS_IBG

TP_LVDS_VBG

LVDSA_CLK_L

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2

R310 0R310 0
R311 0R311 0
R312 0R312 0

CRT_DDC_CLK
CRT_DDC_DATA

R155

R155
1K,1%

1K,1%

CRT_BLUE

CRT_GREEN

CRT_RED

Place the 3 resistors close to PCH

DAC_IREF_R

LO note: Place near PCH

R158 150,1%R158 150,1%

R160 150,1%R160 150,1%

R162 150,1%R162 150,1%

4

BJ46

SDVO_TVCLKINN

BG46

SDVO_TVCLKINP

BJ48

SDVO_STALLN

BG48

SDVO_STALLP

BF45

SDVO_INTN

BH45

SDVO_INTP

T51

SDVO_CTRLCLK

T53

SDVO_CTRLDATA

BG44

DDPB_AUXN

BJ44

DDPB_AUXP

AU38

DDPB_HPD

BD42

DDPB_0N

BC42

DDPB_0P

BJ42

DDPB_1N

BG42

DDPB_1P

BB40

DDPB_2N

BA40

DDPB_2P

AW38

DDPB_3N

BA38

DDPB_3P

Y49

DDPC_CTRLCLK

AB49

DDPC_CTRLDATA

BE44

DDPC_AUXN

BD44

DDPC_AUXP

AV40

DDPC_HPD

BE40

DDPC_0N

BD40

DDPC_0P

BF41

DDPC_1N

BH41

DDPC_1P

BD38

DDPC_2N

BC38

DDPC_2P

BB36

DDPC_3N

BA36

DDPC_3P

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

4

DPD_CTRLCK

U50

DPD_CTRLDAT

U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

DPD_HPD_PCH

R174

R174
100K

100K

UMA

UMA

DGPU_SELECT#18

DPD_HPD_PCH

+V5S

CLK_PCI_FB14

CLK_PCIF_PORT8021

Q154

Q154
2N7002K

2N7002K

UMA

UMA

CLK_LPC_KBC27

R317 0

R317 0

312

+V3.3S

DPD_CTRLCK 18
DPD_CTRLDAT 18

DPD_LANE0_N 18
DPD_LANE0_P 18
DPD_LANE1_N 18
DPD_LANE1_P 18
DPD_LANE2_N 18
DPD_LANE2_P 18
DPD_LANE3_N 18
DPD_LANE3_P 18

UMA

UMA

R1040

R1040
10K

10K

UMA

UMA

R1041

R1041
10K

10K

DGPU

DGPU

CLK_PCI_FB

CLK_PCIF_PORT80

NO_STUFF

PCI_IRDY_L
INT_PIRQD_L
PCI_REQ_L2
PCI_REQ_L1
PCI_SERR_L
PCI_DEVSEL_L
PCI_LOCK_L
PCI_PERR_L
PCI_REQ_L0
INT_PIRQB_L
INT_PIRQF_L
PCI_REQ_L3

INT_PIRQA_L
PCI_FRAME_L
PCI_TRDY_L
INT_PIRQH_L
INT_PIRQG_L
INT_PIRQC_L
INT_PIRQE_L
PCI_STOP_L

DGPU_PWM_SELECT#

10pF/50V,NPO

10pF/50V,NPO

ns

ns

DPD_HPD 18

TP34TP34

PLT_RST_L21,22,24

C179

C179

C180

C180

10pF/50V,NPO

10pF/50V,NPO

ns

ns

RN1 8.2KRN1 8.2K

1 2
3 4
5 6
7 8

RN2 8.2KRN2 8.2K

1 2
3 4
5 6
7 8

RN3 8.2KRN3 8.2K

1 2
3 4
5 6
7 8

RN4 8.2KRN4 8.2K

1 2
3 4
5 6
7 8

RN5 8.2KRN5 8.2K

1 2
3 4
5 6
7 8

R234 0

R234 0

TP20TP20

R168 47R168 47
R170 22R170 22

R171 47R171 47

C181

C181

10pF/50V,NPO

10pF/50V,NPO

ns

ns

+V3.3S

3

HW Strap Purpose PCH PIn

No Reboot
RSVD
A16 swap override
Integrated VRM Enable/Disable
Boot BIOS Strap bit [1] BBS[1]
Boot BIOS Strap bit[0] BBS[0]
ESI Strap (Server only)
Intel Anti-Theft Technology Enable
Flash Descriptor Security Override
TPM Functionality Disable
DMI Termination Voltage
RSVD
RSVD
RSVD
RSVD
RSVD

DMI Termination Voltage

Set to Vcc when LOW

NV_CLE

Set to Vcc/2 when HIGH

Intel Anti-Theft Technology Enable

NV_ALE High = Enabled Stuff PU

Low = Disabled Unstuff PU (Default)

U3E

U3E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

PCI

C/BE1#
C/BE2#
C/BE3#

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PCIRST#

SERR#
PERR#

IRDY#
PAR
DEVSEL#
FRAME#

PLOCK#

STOP#
TRDY#

PME#

PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

0R715 0R715

C182

C182

0.1uF/16V,X7R

0.1uF/16V,X7R

R177

R177

SN74AHC1G08DBV

SN74AHC1G08DBV

100K

100K

PCI

4

SOT23_5

SOT23_5

G42
H47
G34

INT_PIRQA_L

G38

INT_PIRQB_L

H51

INT_PIRQC_L

B37

INT_PIRQD_L

A44

PCI_REQ_L0

F51

PCI_REQ_L1

A46

PCI_REQ_L2

B45

PCI_REQ_L3

ns

ns

PCH_GPIO53

PCI_GNT_L3

INT_PIRQE_L
INT_PIRQF_L
INT_PIRQG_L
INT_PIRQH_L

PCIRST_L

PLT_RST_L

CLKOUT_PCI0
CLKOUT_PCI1

LPC_RST#21,27+V3.3AUX 5,13,14,16,17,19,21,22,24,25,27,28,29,30,31,32,34,35

PCI_GNT_L0
PCI_GNT_L1

PCI_SERR_L
PCI_PERR_L

PCI_IRDY_L

PCI_DEVSEL_L
PCI_FRAME_L

PCI_LOCK_L

PCI_STOP_L
PCI_TRDY_L

BUF_PLT_RST_L5,41

M53

F48
K45
F36
H53

B41
K53
A36
A48

K6

E44
E50

A42
H44
F46
C46

D49

D41
C48

M7

D5

N52
P53
P46
P51
P48

NV_DQS0
NV_DQS1

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12

NVRAM

NVRAM

NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_RCOMP

NV_WR#0_RE#
NV_WR#1_RE#

NV_WE#_CK0
NV_WE#_CK1

USBP10N

USB

USB

USBP11N

USBP12N

USBP13N

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

+V3.3S

53

VCC

VCC

GND

GND

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_ALE
NV_CLE

NV_RB#

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10P

USBP11P

USBP12P

USBP13P

1

2

U4

U4

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2

AV7

AY8
AY5

AV11
BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USB_BIAS

B25

D25

N16
J16
F16
L16
E14
G16
F12
T15

PLT_RST_L

SPKR
GPIO[34]
GNT[3]#/ GPIO[55]
INTVRMEN
GNT[1]#/ GPIO[51]
GNT[0]#
GNT[2]#/ GPIO[53]
NV_ALE
GPIO33/DOCK_EN#
SPI_MOSI
NV_CLE
HDA_SDO
GPIO[8]
GPIO[27]
HDA_SYNC
GPIO[15]

NV_CLE

NV_ALE

NV_ALE
NV_CLE

NV_RCOMP

HM55 No function.

USB_OC_L0
USB_OC_L1
USB_OC_L2
USB_OC_L3
USB_OC_L4
USB_OC_L5
USB_OC_L6CLKOUT_PCI3
USB_OC_L7

2

PCH_GPIO53

ESI Strap (Server only)

PCH_GPIO53

Low = Enabled

High = Disabled

+V1.8S

+V1.8S

NO_STUFF

R150

R150
1K

1K

ns

ns

NO_STUFF

R152

R152
10K

10K

ns

ns

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4
USB_PN5
USB_PP5

USB_PN8
USB_PP8

USB_PN6
USB_PP6
USB_PN7
USB_PP7

USB_OC_L3 22
USB_OC_L4 29

A16 swap override Strap/Top-Block
Swap Override jumper

Low = A16 swap

PCI_GNT#3

override/Top-Block
Swap Override enabled
High = Default

R159

R159

32.4,1%

32.4,1%

ns

ns

USB_PN0 21
USB_PP0 21

to rear IO

USB_PN1 21
USB_PP1 21
USB_PN2 22
USB_PP2 22
USB_PN3 26
USB_PP3 26

to PIN header

USB_PN4 29
USB_PP4 29
USB_PN5 19
USB_PP5 19

USB_PN8 29

to rear IO

USB_PP8 29
USB_PN9 28
USB_PP9 28
USB_PN10 28
USB_PP10 28
USB_PN11 24
USB_PP11 24
USB_PN6 22
USB_PP6 22
USB_PN7 22
USB_PP7 22

R166

R166

22.6,1%

22.6,1%

PCI_GNT_L0

PCI_GNT_L1

Boot BIOS Strap

PCI_GNT_L1

PCI_GNT_L0 Boot BIOS Location

0 LPC

0
0
1
1

Reserved

1

PCI

0

SPI1

PCI_GNT_L3

USB_OC_L6
USB_OC_L5
USB_OC_L7
USB_OC_L0
USB_OC_L2
USB_OC_L1
USB_OC_L3
USB_OC_L4

R175

R175
1K

1K

ns

ns

NO_STUFF

NO_STUFF

R149

R149
1K

1K

ns

ns

NO_STUFF

R151

R151
1K

1K

ns

ns

R167 10KR167 10K
R169 10KR169 10K
R301 10KR301 10K
R178 10KR178 10K
R172 10KR172 10K
R303 10KR303 10K
R249 10KR249 10K
R309 10KR309 10K

R176

R176
1K

1K

ns

ns

1

+V3.3AUX

Buffer to reduce loading on PLT_RST#.

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet

Date: Sheet

3

2

Date: Sheet

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

1

zw

zw

zw

of

of

of

15 56Thursday, April 22, 2010

15 56Thursday, April 22, 2010

15 56Thursday, April 22, 2010

5

LPC_SMI#

LPC_SMI#27

DGPU_HPD_INTR_L

TP56TP56

SCI#27

HOST_ALERT_L2

PM_LANPHY_ENABLE

PCI_STOP#12

DGPU_PWROK

DGPU

DGPU

TP57TP57

HOST_ALERT_L1

BIOS_REC

TP_GPIO24

SPI_CS_L2

DGPU_PWR_EN#

DGPU_PRSNT#

+V3.3AUX

D D

DRAMRST_CNTRL_PCH5

PLL On DIE VR Enable R156

Stuff : Disable PLL On DIE

GPIO27

No Stuff : Enable PLL On DIE

DGPU_PWROK14

MADISON_POWOK36,42

R185

R185
10K

10K

ns

ns

NO_STUFF

R188

R188
10K

10K

ns

ns

DGPU_HOLD_RST#41

R302 0

R302 0

+V3.3AUX

R193

R193

R195

R195
10K

10K

10K

10K

PCH_GPIO45

C C

VDDR3

DGPU_PWR_EN#_VDDR348

DGPU_PWR_EN#

R1072 1KnsR1072 1K

R338 0

R338 0

ns

1

ns

ns

R1006

R1006
100K

100K

ns

ns

B B

PCH_GPIO0

SCI#

GPIO27

GPIO35

MFG_MODE

CRB_SV_DET

SV_SET_UP

GPIO49

GPIO57

R1005

R1005
10K

10K

DGPU

DGPU

3

Q169

Q169
2N7002K

2N7002K

SOT23

SOT23
ns

ns

2

U3F

U3F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49 / TEMP_ALERT#

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

CRB_SV_DET

R214

R214
100K

100K

VDDC_VR_EN 35,36

R213 10K nsR213 10K ns

NO_STUFF

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

+V3.3S

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

A20GATE

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

PECI

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

TP24

4

TP_CLKOUT_SRC6N

AH45

TP_CLKOUT_SRC6P

AH46

AF48
AF47

U2

CK_BCK0_N

AM3

CK_BCK0_P CLK_MCP_BCLK

AM1

H_PECI_R

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

TP13_PCH

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

INIT3_3V_L

P6

TP_PCH_SST

C10

R181 0 R0402_0R181 0 R0402_0

R183 0 R0402_0R183 0 R0402_0

R186 0 R0402_0R186 0 R0402_0

PCH_THRMTRIPL_R

+V3.3S

R207

R207
10K

10K

R235

R235
10K

10K

ns

ns

TP21TP21
TP22TP22

H_RCIN_L

TP52TP52

TP65TP65

TP68TP68

TP67TP67

BIOS_REC

JCRV - BIOS RECOVERY
DISABLE -- (1- X) DEFAULT
ENABLE -- (1-2)

CLK_MCP_BCLK_L

NO_STUFF

R205

R205

3.01K,1%

3.01K,1%

ns

ns

A20M# 27

KB_RST# 27

+V1.1S

CLK_MCP_BCLK_L 5,12

CLK_MCP_BCLK 5,12

H_PECI 5

H_CPUPWRGD 5

+V3.3S

L3

L3

10uH/500mA

10uH/500mA

NO_STUFF

R18954.9K,1% R18954.9K,1%

+V1.1S

+V1.1S_VCCAPLL_EXP_R1

C191

C191
10uF/10V X5R

10uF/10V X5R

ns

ns

+V1.1S_VTT

56

C201

C201
10uF/10V X5R

10uF/10V X5R

ns

ns

R18756R187

C192

C192

0.1uF/16V,X7R

0.1uF/16V,X7R

+V1.1S_VCC_EXP7,13,14,17,34,35,36

+V1.1S

H_THRMTRIP_L 5

L2

L2

10uH/500mA

10uH/500mA

NO_STUFF

C193

C193

0.1uF/16V,X7R

0.1uF/16V,X7R

+V1.5S_1.8S

+V1.1S_VCCAPLL_FDI

+V1.1S

PM_LANPHY_ENABLE

HOST_ALERT_L1

HOST_ALERT_L2

SPI_CS_L2

GPIO57

H_RCIN_L

DGPU_PWR_EN#

DGPU_HPD_INTR_L

DGPU_PRSNT#

GPIO35

DGPU_HOLD_RST#

PCH_GPIO0

MFG_MODE

SV_SET_UP

LPC_SMI#

SCI#

GPIO49

PCI_STOP#

DGPU_PWROK

ns

ns

C194

C194

0.1uF/16V,X7R

0.1uF/16V,X7R

C197

C197

0.1uF/16V,X7R

0.1uF/16V,X7R

3

+V1.1S_PCH_VCC

C183

C183

0.1uF/16V,X7R

0.1uF/16V,X7R

+V1.1S_VCCAPLL_EXP

C189

C189
10uF/10V X5R

10uF/10V X5R

ns

ns

C195

C195

0.1uF/16V,X7R

0.1uF/16V,X7R

R371 10K nsR371 10K ns

R179 1KR179 1K

R180 10KR180 10K

R182 10KR182 10K

R184 10KR184 10K

R190 10KR190 10K

R191 1KR191 1K

R192 10KR192 10K

R194 10KR194 10K

R196 10KR196 10K

R197 10KR197 10K

R198 10KR198 10K

R199 10KR199 10K

R200 10KR200 10K

R201 10KR201 10K

R202 10KR202 10K

R203 10KR203 10K

R58 10KR58 10K

R204 100K nsR204 100K ns

+V3.3AUX

+V3.3S

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

AK24

BJ24

AN20
AN22

AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26

AV28
AW26
AW28

BA26

BA28

BB26

BB28

BC26

BC28

BD26

BD28

BE26

BE28

BG26

BG28

BH27

AN30

AN31

AN35

AT22

BJ18

AM23

U3G

U3G

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

VCCIO[24]

VCCAPLLEXP

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

VCCIO[54]
VCCIO[55]

VCC3_3[1]

VCCVRM[1]

VCCFDIPLL

VCCIO[1]

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

POWER

POWER

VCC CORE

VCC CORE

PCI E*

PCI E*

FDI

FDI

VCCADAC[1]

VCCADAC[2]

VSSA_DAC[1]

VSSA_DAC[2]

CRTLVDS

CRTLVDS

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

HVCMOS

HVCMOS

VCCVRM[2]

VCCDMI[1]

VCCDMI[2]

DMI

DMI

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]

NAND / SPI

NAND / SPI

VCCME3_3[3]
VCCME3_3[4]

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

2

+V1.1S 7,13,14,17,34,35,36
+V1.8S 7,15,28,34,36
+V3.3S 5,9,10,11,12,13,14,15,17,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48
+V3.3AUX 5,13,14,15,17,19,21,22,24,25,27,28,29,30,31,32,34,35
+V5AUX 17,19,22,24,27,28,29,32,33,34,35,36

+V1.5S_1.8S 17
+V1.1S_VTT 5,7,12,17,35,36

+V1.5S 7,21,22,28,35,36
+V5S 14,15,17,18,19,20,21,23,25,26,28,29,35,36,37,38

VDDR3 36,41,42,43,45,48

+V3.3S_LDO

FB2

VCCTX_LVD_J

C186

C186

0.01uF/25V,X7R

0.01uF/25V,X7R

C190

C190
1uF/10V,X5R

1uF/10V,X5R

C196

C196
1uF/10V,X5R

1uF/10V,X5R

C202

C202
1uF/10V,X5R

1uF/10V,X5R

C203

C203
1uF/10V,X5R

1uF/10V,X5R

+VCCA_DAC_1_2

C184

C184

0.01uF/25V,X7R

0.01uF/25V,X7R

AE50

AE52

AF53

AF51

AH38

AH39

AP43
AP45
AT46
AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

R208 0nsR208 0

C187

C187

0.01uF/25V,X7R

0.01uF/25V,X7R

C185

C185

0.1uF/16V,X7R

0.1uF/16V,X7R

ns

FB2

300ohm/100MHz,1A

300ohm/100MHz,1A

R206 0

R206 0

NO_STUFF

C188

C188
22uF/6.3V,X5R

22uF/6.3V,X5R

+V1.5S_1.8S

+V1.1S_VTT

+V1.8S

+V3.3S

+V3.3S

R0603

R0603

NO_STUFF

R209

R209
0

0

ns

ns

+V5S

L1

0.1uH/300mAL10.1uH/300mA

R211 100KR211 100K

C198

C198

C0402

C0402

1uF/10V,X5R

1uF/10V,X5R

+V1.8S

U5

U5
APL5315BI-TRL

APL5315BI-TRL

SOT23_5

SOT23_5

1

EN

2

GND

VIN3VOUT

1

+V3.3S

R210

R210
20K,1%

20K,1%

R0402

R0402

R212

R212

63.4K,1%

63.4K,1%

5

SET

0.8V

4

61.9k,1% ---63.4k

R0402

R0402

C199

C199
22uF/6.3V,X5R

22uF/6.3V,X5R

C200

C200

0.1uF/16V,X7R

0.1uF/16V,X7R

+V3.3S_LDO

+V1.1S

R215 0 ns

R215 0 ns

R0805

R0805

A A

5

4

3

+V1.5S

+V1.8S

NO_STUFF

NO_STUFF

R216 0 ns

R216 0 ns

R217 0

R217 0

+V1.5S_1.8S

R0805

R0805

R0805

R0805

2

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

1

zw

zw

zw

of

of

of

16 56Thursday, April 22, 2010

16 56Thursday, April 22, 2010

16 56Thursday, April 22, 2010

L4

L4

10uH/500mA

10uH/500mA

C206

C206

0.1uF/16V,X7R

0.1uF/16V,X7R

C210

C210

0.1uF/16V,X7R

0.1uF/16V,X7R

C217

C217
1uF/10V,X5R

1uF/10V,X5R

C229

C229

4.7uF/10V,X5R

4.7uF/10V,X5R

ns

ns

+V1.1S

+V1.5S_1.8S

5

C204

C204
10uF/10V X5R

10uF/10V X5R

ns

ns

C248 0.1uF/16V,X7RC248 0.1uF/16V,X7R

C212

C212

0.1uF/16V,X7R

0.1uF/16V,X7R

+V1.1S_VCCA_A_DPL

+V1.1S_VCCA_B_DPL

C231

C231

0.1uF/16V,X7R

0.1uF/16V,X7R

C214

C214

0.1uF/16V,X7R

0.1uF/16V,X7R

+VCCSST

C221

C221

0.1uF/16V,X7R

0.1uF/16V,X7R

C227

C227

0.1uF/16V,X7R

0.1uF/16V,X7R

+V1.1S_VCCA_CLK

C205

C205
1uF/10V,X5R

1uF/10V,X5R

ns

ns

TP_PCH_DSW

+VCCRTCEXT

C218

C218

0.1uF/16V,X7R

0.1uF/16V,X7R

C219

C219
1uF/10V,X5R

1uF/10V,X5R

+V1.1A_INT_VCCSUS

C224

C224

0.1uF/16V,X7R

0.1uF/16V,X7R

+V3.3S_VCCPCORE

C226

C226

0.1uF/16V,X7R

0.1uF/16V,X7R

C228

C228

0.1uF/16V,X7R

0.1uF/16V,X7R

C232

C232

0.1uF/16V,X7R

0.1uF/16V,X7R

AP51

AP53

AF23

AF24

Y20

AD38

AD39

AD41

AF43

AF41

AF42

V39

V41

V42

Y39

Y41

Y42

V9

AU24

BB51
BB53

BD51
BD53

AH23

AJ35

AH35

AF34

AH34

AF32

V12

Y22

P18

U19

U20

U22

V15

V16

Y16

AT18

AU18

A12

C1279

C1279
220uF/6.3V,FPCAP

220uF/6.3V,FPCAP

+

+

U3J

U3J

POWER

POWER

VCCACLK[1]

VCCACLK[2]

VCCLAN[1]

VCCLAN[2]

DCPSUSBYP

VCCME[1]

VCCME[2]

VCCME[3]

VCCME[4]

VCCME[5]

VCCME[6]

VCCME[7]

VCCME[8]

VCCME[9]

VCCME[10]

VCCME[11]

VCCME[12]

DCPRTC

VCCVRM[3]

VCCADPLLA[1]
VCCADPLLA[2]

Clock and Miscellaneous

Clock and Miscellaneous

VCCADPLLB[1]
VCCADPLLB[2]

VCCIO[21]
VCCIO[22]
VCCIO[23]

VCCIO[2]

VCCIO[3]

VCCIO[4]

DCPSST

DCPSUS

VCCSUS3_3[29]

VCCSUS3_3[30]

VCCSUS3_3[31]

VCCSUS3_3[32]

VCC3_3[5]

VCC3_3[6]

VCC3_3[7]

PCI/GPIO/LPC

PCI/GPIO/LPC

V_CPU_IO[1]

V_CPU_IO[2]

CPU

CPU

VCCRTC

RTC

RTC

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

+V1.1S

C233

C233

+

+

CESD66

CESD66

220uF/6.3V,POSCAP

220uF/6.3V,POSCAP

ns

ns

ns

ns

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]

USB

USB

VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

PCI/GPIO/LPC

PCI/GPIO/LPC

VCCSATAPLL[1]
VCCSATAPLL[2]

SATA

SATA

VCCSUSHDA

HDA

HDA

L6

10uH/500mAL610uH/500mA

L7

10uH/500mAL710uH/500mA

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCIO[56]

V5REF_SUS

VCC3_3[8]

VCC3_3[9]

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

V5REF

V24
V26
Y24
Y26

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3
AK1

AH22

AT20

AH19

AD20

AF22

AD19
AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

CT1

CT1
22uF/6.3V,TAN

22uF/6.3V,TAN

CT2

CT2
22uF/6.3V,TAN

22uF/6.3V,TAN

+V1.1S

NO_STUFF

+V1.1S

+V1.1S

D D

+V1.1S

+V3.3AUX

C C

+V3.3S

+V1.1S_VTT

+V3.3_RTC

B B

C207

C207
1uF/10V,X5R

1uF/10V,X5R

C208

C208

0.022uF/16V,X7R

0.022uF/16V,X7R

+V5A_PCH_VCC5REFSUS

C215

C215
1uF/10V,X5R

1uF/10V,X5R

C230

C230
1uF/10V,X5R

1uF/10V,X5R

+V1.1S_VCCA_A_DPL

C234

C234
1uF/10V,X5R

1uF/10V,X5R

+V1.1S_VCCA_B_DPL

C236

C236
1uF/10V,X5R

1uF/10V,X5R

4

C220

C220

0.1uF/16V,X7R

0.1uF/16V,X7R

+V1.5S_1.8S

+V3.3AUX

C216

C216

0.1uF/16V,X7R

0.1uF/16V,X7R

+V1.1S_VCCAPLL_L

C222

C222
1uF/10V,X5R

1uF/10V,X5R

ns

ns

+V1.1S

+V1.1S_VCCUSBCORE

C209

C209

0.1uF/16V,X7R

0.1uF/16V,X7R

C211

C211

0.1uF/16V,X7R

0.1uF/16V,X7R

+V5S_PCH_VCC5REF

C223

C223
10uF/10V X5R

10uF/10V X5R

ns

ns

+V1.1S

+V3.3AUX

+V1.1S

C213

C213
1uF/10V,X5R

1uF/10V,X5R

L5

L5

10uH/500mA

10uH/500mA

+V1.1S_VCC_SATA

+V3.3AUX

+V3.3AUX

+V3.3S

+V3.3S

ns

ns

NO_STUFF

132

R21810R218

10

C225

C225
1uF/10V,X5R

1uF/10V,X5R

D3
BAT54CD3BAT54C

+V5AUX

+V1.1S_VCCAPLL

+V1.1S

+V1.1S

+V3.3S

3

132

D2
BAT54CD2BAT54C

R21910R219

10

2

U3H

U3H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

+V5S

AD42
AD46
AD49

AD7

AE2
AE4

AF12

Y13

AH49

AU4
AF35
AP13
AN34
AF45
AF46
AF49

AF5
AF8

AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47

AH7

AJ19

AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34

AT5

AJ4

AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47

BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49

BB5
BC10
BC14
BC18

BC2
BC22
BC32
BC36
BC40
BC44
BC52

BH9
BD48
BD49

BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50

BE6
BE8

BF3
BF49
BF51
BG18
BG24

BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47

BH7

C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48

F49

G10
G14
G18

G22
G32
G36
G40
G44
G52

AF39

H16
H20
H30
H34
H38
H42

U3I

U3I

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]

B7

VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]

E6

VSS[238]

E8

VSS[239]
VSS[240]

F5

VSS[241]
VSS[242]
VSS[243]
VSS[244]

G2

VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

IbexPeak-M_Rev1_5

IbexPeak-M_Rev1_5

1

H49

VSS[259]

H5

VSS[260]

J24

VSS[261]

K11

VSS[262]

K43

VSS[263]

K47

VSS[264]

K7

VSS[265]

L14

VSS[266]

L18

VSS[267]

L2

VSS[268]

L22

VSS[269]

L32

VSS[270]

L36

VSS[271]

L40

VSS[272]

L52

VSS[273]

M12

VSS[274]

M16

VSS[275]

M20

VSS[276]

N38

VSS[277]

M34

VSS[278]

M38

VSS[279]

M42

VSS[280]

M46

VSS[281]

M49

VSS[282]

M5

VSS[283]

M8

VSS[284]

N24

VSS[285]

P11

VSS[286]

AD15

VSS[287]

P22

VSS[288]

P30

VSS[289]

P32

VSS[290]

P34

VSS[291]

P42

VSS[292]

P45

VSS[293]

P47

VSS[294]

R2

VSS[295]

R52

VSS[296]

T12

VSS[297]

T41

VSS[298]

T46

VSS[299]

T49

VSS[300]

T5

VSS[301]

T8

VSS[302]

U30

VSS[303]

U31

VSS[304]

U32

VSS[305]

U34

VSS[306]

P38

VSS[307]

V11

VSS[308]

P16

VSS[309]

V19

VSS[310]

V20

VSS[311]

V22

VSS[312]

V30

VSS[313]

V31

VSS[314]

V32

VSS[315]

V34

VSS[316]

V35

VSS[317]

V38

VSS[318]

V43

VSS[319]

V45

VSS[320]

V46

VSS[321]

V47

VSS[322]

V49

VSS[323]

V5

VSS[324]

V7

VSS[325]

V8

VSS[326]

W2

VSS[327]

W52

VSS[328]

Y11

VSS[329]

Y12

VSS[330]

Y15

VSS[331]

Y19

VSS[332]

Y23

VSS[333]

Y28

VSS[334]

Y30

VSS[335]

Y31

VSS[336]

Y32

VSS[337]

Y38

VSS[338]

Y43

VSS[339]

Y46

VSS[340]

P49

VSS[341]

Y5

VSS[342]

Y6

VSS[343]

Y8

VSS[344]

P24

VSS[345]

T43

VSS[346]

AD51

VSS[347]

AT8

VSS[348]

AD47

VSS[349]

Y47

VSS[350]

AT12

VSS[351]

AM6

VSS[352]

AT13

VSS[353]

AM5

VSS[354]

AK45

VSS[355]

AK39

VSS[356]

AV14

VSS[366]

+V5S 14,15,16,18,19,20,21,23,25,26,28,29,35,36,37,38
+V1.5S_1.8S 16
+V1.1S_VTT 5,7,12,16,35,36

+V1.1S 7,13,14,16,34,35,36
+V3.3_RTC 13
+V3.3S 5,9,10,11,12,13,14,15,16,18,19,20,21,22,24,25,27,28,29,34,35,36,37,38,48
+V3.3AUX 5,13,14,15,16,19,21,22,24,25,27,28,29,30,31,32,34,35
+V5AUX 19,22,24,27,28,29,32,33,34,35,36

A A

CZC Technology

CZC Technology

CZC Technology

Title

Title

Title

Size Project Name Rev

Size Project Name Rev

Size Project Name Rev

A3

A3

A3

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Panel &VGA connect

Panel &VGA connect

Panel &VGA connect

R48 C

R48 C

R48 C

1

zw

zw

zw

of

of

of

17 56Thursday, April 22, 2010

17 56Thursday, April 22, 2010

17 56Thursday, April 22, 2010