Austin Semiconductor, Inc.
512K x 8 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY SPECIFICATION
•SMD 5962-95600
•SMD 5962-95613
•MIL STD-883
FEATURES
•High Speed: 17, 20, 25, 35 and 45ns
•High-performance, low power military grade device
•Single +5V ±10% power supply
•Easy memory expansion with CE\ and OE\ options
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All inputs and outputs are TTL-compatible |
• |
Ease of upgradability from 1 Meg using the 32 pin |
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evolutionary version. |
OPTIONS |
MARKING |
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Timing |
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15ns access (contact factory) |
-15 |
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17ns access |
-17 |
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20ns access |
-20 |
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A18 |
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25ns access |
-25 |
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A16 |
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35ns access |
-35 |
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A14 |
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45ns access |
-45 |
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A12 |
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Operating Temperature Range |
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A7 |
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Military: -55oC to +125oC |
XT |
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A6 |
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Industrial: -40oC to +85oC |
IT |
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A5 |
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Packages |
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A4 |
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A3 |
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Ceramic Dip (600 mil) |
CW |
No. 112 |
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A2 |
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Ceramic Flatpack |
F |
No. 304 |
A1 |
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Ceramic LCC |
EC |
No. 209 |
A0 |
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Ceramic SOJ |
ECJ |
No. 502 |
I/O0 |
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I/O1 |
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Ceramic LCC (contact factory) |
ECA |
No. 208 |
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I/O2 |
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Options |
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Vss |
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2V data retention/ low power |
L |
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NOTE: Not all combinations of operating temperature, speed, data retention and low power are necessarily available. Please contact factory for availability of specific part number combinations.
GENERAL DESCRIPTION
The AS5C4008 is a 4 megabit monolithic CMOS SRAM, organized as a 512K x 8.
The evolutionary 32 pin device allows for easy upgrades from the 1 meg SRAM.
For flexibility in high-speed memory applications, ASI offers chip enable (CE\) and output enable (OE\) capabilities. These enhancements can place the outputs in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ and OE\ go LOW. This allows systems designers to meet low standby power requirements.
All devices operate from a single +5V power supply and all inputs are fully TTL-Compatible.
SRAM
AS5C4008
PIN ASSIGNMENT
(Top View)
32-Pin DIP (CW), 32-Pin LCC (EC)
32-Pin SOJ (ECJ)
A18 |
1 |
32 |
Vcc |
A16 |
2 |
31 |
A15 |
A14 |
3 |
30 |
A17 |
A12 |
4 |
29 |
WE\ |
A7 |
5 |
28 |
A13 |
A6 |
6 |
27 |
A8 |
A5 |
7 |
26 |
A9 |
A4 |
8 |
25 |
A11 |
A3 |
9 |
24 |
OE\ |
A2 |
10 |
23 |
A10 |
A1 |
11 |
22 |
CE\ |
A0 |
12 |
21 |
I/O7 |
I/O0 |
13 |
20 |
I/O6 |
I/O1 |
14 |
19 |
I/O5 |
I/O2 |
15 |
18 |
I/O4 |
Vss |
16 |
17 |
I/O3 |
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32-Pin Flat Pack (F)
1 |
32 |
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Vcc |
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2 |
31 |
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A15 |
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3 |
30 |
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A17 |
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4 |
29 |
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WE\ |
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5 |
28 |
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A13 |
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6 |
27 |
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A8 |
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7 |
26 |
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A9 |
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8 |
25 |
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A11 |
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9 |
24 |
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OE\ |
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10 |
23 |
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A10 |
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11 |
22 |
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CE\ |
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12 |
21 |
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I/O7 |
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13 |
20 |
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I/O6 |
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14 |
19 |
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I/O5 |
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15 |
18 |
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I/O4 |
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16 |
17 |
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I/O3 |
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32-Pin LCC (ECA)
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A12 |
A14 |
A16 |
A18 |
Vcc |
A15 |
A17 |
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4 |
3 |
2 |
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32 |
31 30 |
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A7 |
5 |
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1 |
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2 9 |
WE\ |
A6 |
6 |
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2 8 |
A13 |
A5 |
7 |
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2 7 |
A8 |
A4 |
8 |
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2 6 |
A9 |
A3 |
9 |
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2 5 |
A11 |
A2 |
1 0 |
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2 4 |
OE\ |
A1 |
1 1 |
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2 3 |
A10 |
A0 |
1 2 |
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2 2 |
CE\ |
I/O0 |
1 3 |
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2 1 |
I/O 7 |
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14 15 16 17 18 19 20 |
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I/O1 |
I/O2 |
Vss |
I/O3 |
I/O4 |
I/O5 |
I/O6 |
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For more products and information please visit our web site at www.austinsemiconductor.com
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AS5C4008 |
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. |
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Rev. 5.5 12/01 |
1 |
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A0:A18
SRAM
AS5C4008
Austin Semiconductor, Inc.
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FUNCTIONAL BLOCK DIAGRAM |
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Vcc |
GND |
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BufferInput |
DecoderRow |
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ControlI/O |
I/O7 |
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2,097,152 Bit |
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Memory Array |
I/O1 |
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CE\ |
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OE\ |
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WE\ |
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Column Decoder |
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Power |
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Down |
TRUTH TABLE
MODE |
OE\ |
CE\ |
WE\ |
DQ |
POWER |
STANDBY |
X |
H |
X |
High-Z |
STANDBY |
READ |
L |
L |
H |
Q |
ACTIVE |
NOT SELECTED |
H |
L |
H |
High-Z |
ACTIVE |
WRITE |
X |
L |
L |
D |
ACTIVE |
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AS5C4008 |
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. |
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Rev. 5.5 12/01 |
2 |
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SRAM
AS5C4008
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
Voltage on Vcc Supply Relative to Vss................... |
-.5V to +7.0V |
Storage Temperature ............................................ |
-65°C to +150°C |
Short Circuit Output Current (per I/O)….............................20mA |
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Voltage on any Pin Relative to Vss...................... |
-.5V to Vcc+1 V |
Maximum Junction Temperature**.................................... |
+150°C |
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
** Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC<T <125oC or -40oC to +85oC; Vcc = 5V +10%) |
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A |
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PARAMETER |
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CONDITION |
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SYMBOL |
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MIN |
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MAX |
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UNITS |
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NOTES |
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Input High (Logic 1) Voltage |
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VIH |
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2.2 |
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VCC +0.5 |
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V |
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1 |
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Input Low (Logic 0) Voltage |
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VIL |
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-0.5 |
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0.8 |
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V |
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1, 2 |
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Input Leakage Current |
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OV < VIN < Vcc |
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ILI |
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-10 |
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10 |
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μΑ |
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Output Leakage Current |
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Output(s) disabled |
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ILO |
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-10 |
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10 |
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μΑ |
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OV < VOUT < Vcc |
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Output High Voltage |
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IOH = -4.0 mA |
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VOH |
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2.4 |
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-- |
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V |
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1 |
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Output Low Voltage |
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IOL = 8.0 mA |
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VOL |
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--- |
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0.4 |
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V |
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1 |
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Supply Voltage |
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Vcc |
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4.5 |
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5.5 |
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V |
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1 |
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MAX |
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PARAMETER |
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CONDITIONS |
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SYM |
-15 |
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-17 |
-20 |
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-25 |
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-35 |
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-45 |
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UNITS |
NOTES |
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CE\ < VIL; Vcc = MAX |
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Power Supply Current: |
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f = MAX = 1/tRC |
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ICCSP |
225 |
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225 |
225 |
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225 |
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225 |
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225 |
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mA |
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3 |
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Operating |
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Outputs Open |
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L Version Only |
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ICCLP |
180 |
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180 |
180 |
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180 |
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180 |
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180 |
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mA |
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CE\ > VIH; Vcc = MAX |
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ISBTSP |
60 |
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60 |
60 |
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60 |
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60 |
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60 |
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mA |
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f = 0, Outputs Open |
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Power Supply Current: |
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L Version Only |
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ISBTLP |
30 |
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30 |
30 |
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30 |
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30 |
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30 |
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mA |
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Standby |
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CE\ < VCC -0.2V; Vcc = MAX |
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VIN < Vss +0.2V or |
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ISBCSP |
25 |
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25 |
25 |
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25 |
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25 |
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25 |
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mA |
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VIN > Vcc -0.2V; f = 0 |
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L Version Only |
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ISBCLP |
10 |
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10 |
10 |
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10 |
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10 |
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10 |
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mA |
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CAPACITANCE |
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PARAMETER |
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CONDITIONS |
SYMBOL |
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MAX |
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UNITS |
NOTES |
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Input Capacitance |
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o |
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CI |
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12 |
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pF |
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4 |
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TA = 25 C, f = 1MHz |
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Output Capactiance |
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VIN = 0 |
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14 |
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pF |
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AS5C4008 |
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. |
|
Rev. 5.5 12/01 |
3 |
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|
SRAM
AS5C4008
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55oC<T <125oC or -40oC to +85oC; Vcc = 5V +10%) |
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AS5C4008 |
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. |
|
Rev. 5.5 12/01 |
4 |
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|
SRAM
AS5C4008
Austin Semiconductor, Inc.
AC TEST CONDITIONS
...................................................Input pulse levels |
Vss to 3.0V |
Input rise and fall times ....................................................... |
3ns |
Input timing reference levels ............................................ |
1.5V |
Output reference levels ..................................................... |
1.5V |
Output load ............................................... |
See Figures 1 and 2 |
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Q |
167 ohms |
Q |
167 ohms |
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1.73V |
1.73V |
|||
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C=30pF |
|
C=5pF |
Fig. 1 Output Load Equivalent
NOTES
1.All voltages referenced to VSS (GND).
2.-2V for pulse width < 20ns
3.ICC is dependent on output loading and cycle rates.
4.This parameter is guaranteed but not tested.
5.Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted.
6.tLZCE, tLZWE, tLZOE, t HZCE, tHZOE and tHZWE are specified with CL = 5pF as in Fig. 2. Transition is measured ±200mV from steady state voltage.
7.At any given temperature and voltage condition, tHZCE is less than tLZCE, and tHZWE is less than tLZWE.
8.WE\ is HIGH for READ cycle.
Fig. 2 Output Load Equivalent
9.Device is continuously selected. Chip enables and output enables are held in their active state.
10.Address valid prior to, or coincident with, latest occurring chip enable.
11.tRC = Read Cycle Time.
12.Chip enable and write enable can initiate and terminate a WRITE cycle.
13.Output enable (OE\) is inactive (HIGH).
14.Output enable (OE\) is active (LOW).
15.ASI does not warrant functionality nor reliability of any product in which the junction temperature exceeds 150°C. Care should be taken to limit power to acceptable levels.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
DESCRIPTION |
CONDITIONS |
SYMBOL |
MIN |
MAX |
UNITS |
NOTES |
|
VCC for Retention Data |
CE\ > (Vcc -0.2V) |
VDR |
2 |
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V |
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VIN > (Vcc -0.2V) or < 0.2V |
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Data Retention Current |
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VCC = 2V |
ICCDR |
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4.5 |
mA |
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(L Version Only) |
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Chip Deselect to Data |
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tCDR |
0 |
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ns |
4 |
Retention Time |
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Operation Recovery Time |
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tR |
10 |
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ms |
4, 11 |
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AS5C4008 |
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. |
|
Rev. 5.5 12/01 |
5 |
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SRAM |
|
Austin Semiconductor, Inc. |
AS5C4008 |
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LOW VCC DATA RETENTION WAVEFORM |
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DATA RETENTION MODE |
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VDR >2V |
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Vcc |
4.5V |
4.5V |
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t |
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t |
VIH |
tCDR |
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tR |
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VDR |
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CE\ |
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VIL
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READ CYCLE NO. 1 8, 9 |
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(Write Enabled Controlled) |
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t |
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tRC |
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ADDRESS |
VALID |
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ttAA |
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ttOH |
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DQ |
PREVIOUS DATA VALID |
DATA VALID |
READ CYCLE NO. 2 7, 8, 10
(Write Enabled Controlled)
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t |
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tRC |
CE\ |
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t |
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tAOE |
t |
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t |
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tHZOE |
tLZOE |
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OE\ |
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t |
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t |
tLZCEt |
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tACE |
tHZCE |
DQ |
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DATA VALID |
ttPU |
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ttPD |
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Icc |
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|
AS5C4008 |
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. |
|
Rev. 5.5 12/01 |
6 |
|
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|