Atmel ATtiny2313/V Datasheet

Features

• Utilizes the AVR

• AVR – High-performance and Low-power RISC Architecture

– 120 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz

• Data and Non-volatile Program and Data Memories

– 2K Bytes of In-System Self Programmable Flash

Endurance 10,000 Write/Erase Cycles

– 128 Bytes In-System Programmable EEPROM

Endurance: 100,000 Write/Erase Cycles
– 128 Bytes Internal SRAM
– Programming Lock for Flash Program and EEPROM Data Security

• Peripheral Features

– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes
– Four PWM Channels
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator
– USI – Universal Serial Interface
– Full Duplex USART

• Special Microcontroller Features

– debugWIRE On-chip Debugging
– In-System Programmable via SPI Port
– External and Internal Interrupt Sources
– Low-power Idle, Power-down, and Standby Modes
– Enhanced Power-on Reset Circuit
– Programmable Brown-out Detection Circuit
– Internal Calibrated Oscillator

• I/O and Packages

– 18 Programmable I/O Lines
– 20-pin PDIP, 20-pin SOIC, 20-pad QFN/MLF

• Operating Voltages

– 1.8 – 5.5V (ATtiny2313V)
– 2.7 – 5.5V (ATtiny2313)

• Speed Grades

– ATtiny2313V: 0 – 4 MHz @ 1.8 - 5.5V, 0 – 10 MHz @ 2.7 – 5.5V
– ATtiny2313: 0 – 10 MHz @ 2.7 - 5.5V, 0 – 20 MHz @ 4.5 – 5.5V

• Typical Power Consumption

– Active Mode

1 MHz, 1.8V: 230 µA

32 kHz, 1.8V: 20 µA (including oscillator)
– Power-down Mode

< 0.1 µA at 1.8V

®

RISC Architecture

8-bit
Microcontroller
with 2K Bytes
In-System
Programmable
Flash

ATtiny2313/V

Preliminary

Summary

Rev. 2543LS–AVR–08/10

Pin

(

5)

Figure 1. Pinout ATtiny2313

Configurations

(RESET/dW) PA2

(RXD) PD0

(TXD) PD1
(XTAL2) PA1
(XTAL1) PA0

(CKOUT/XCK/INT0) PD2

(INT1) PD3

(T0) PD4

(OC0B/T1) PD5

(TXD) PD1

XTAL2) PA1

(XTAL1) PA0

CKOUT/XCK/INT0) PD2

(INT1) PD3

PDIP/SOIC

1
2
3
4
5
6
7
8
9
10

GND

PD0 (RXD)

20

1
2
3
4
5

6 7 8 9 10

VCC

20

PB7 (UCSK/SCL/PCINT7)

19

PB6 (MISO/DO/PCINT6)

18

PB5 (MOSI/DI/SDA/PCINT5)

17

PB4 (OC1B/PCINT4)

16

PB3 (OC1A/PCINT3)

15

PB2 (OC0A/PCINT2)

14

PB1 (AIN1/PCINT1)

13

PB0 (AIN0/PCINT0)

12

PD6 (ICP)

11

MLF

PA2 (RESET/dW)

VCC

PB7 (UCSK/SCK/PCINT7)

PB6 (MISO/DO/PCINT6)

19

18

17

16

15
14
13
12
11

PB5 (MOSI/DI/SDA/PCINT
PB4 (OC1B/PCINT4)
PB3 (OC1A/PCINT3)
PB2 (OC0A/PCINT2)
PB1 (AIN1/PCINT1)

GND

(T0) PD4

(ICP) PD6

(OC0B/T1) PD5

(AIN0/PCINT0) PB0

NOTE: Bottom pad should be soldered to ground.

Overview The ATtiny2313 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC

architecture. By executing powerful instructions in a single clock cycle, the ATtiny2313 achieves
throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con­sumption versus processing speed.

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ATtiny2313

2543LS–AVR–08/10

Block Diagram

PROGRAM
COUNTER

PROGRAM

FLASH

INSTRUCTION

REGISTER

GND

VCC

INSTRUCTION

DECODER

CONTROL

LINES

STACK

POINTER

SRAM

GENERAL
PURPOSE
REGISTER

ALU

STATUS

REGISTER

PROGRAMMING

LOGIC

SPI

8-BIT DATA BUS

XTAL1

XTAL2

RESET

INTERNAL

OSCILLATOR

OSCILLATOR

WATCHDOG

TIMER

TIMING AND

CONTROL

MCU CONTROL

REGISTER

MCU STATUS

REGISTER

TIMER/

COUNTERS

INTERRUPT

UNIT

EEPROM

USI

USART

ANALOG

COMPARATOR

DATA REGISTER

PORTB

DATA DIR.

REG. PORTB

DATA REGISTER

PORTA

DATA DIR.

REG. PORTA

PORTB DRIVERS

PB0 - PB7

PORTA DRIVERS

PA0 - PA2

DATA REGISTER

PORTD

DATA DIR.

REG. PORTD

PORTD DRIVERS

PD0 - PD6

ON-CHIP

DEBUGGER

INTERNAL
CALIBRATED
OSCILLATOR

ATtiny2313

Figure 2. Block Diagram

2543LS–AVR–08/10

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The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con­ventional CISC microcontrollers.

The ATtiny2313 provides the following features: 2K bytes of In-System Programmable Flash,
128 bytes EEPROM, 128 bytes SRAM, 18 general purpose I/O lines, 32 general purpose work­ing registers, a single-wire Interface for On-chip Debugging, two flexible Timer/Counters with
compare modes, internal and external interrupts, a serial programmable USART, Universal
Serial Interface with Start Condition Detector, a programmable Watchdog Timer with internal
Oscillator, and three software selectable power saving modes. The Idle mode stops the CPU
while allowing the SRAM, Timer/Counters, and interrupt system to continue functioning. The
Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip
functions until the next interrupt or hardware reset. In Standby mode, the crystal/resonator Oscil­lator is running while the rest of the device is sleeping. This allows very fast start-up combined
with low-power consumption.

The device is manufactured using Atmel’s high density non-volatile memory technology. The
On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI
serial interface, or by a conventional non-volatile memory programmer. By combining an 8-bit
RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATtiny2313
is a powerful microcontroller that provides a highly flexible and cost effective solution to many
embedded control applications.

The ATtiny2313 AVR is supported with a full suite of program and system development tools
including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators,
and Evaluation kits.

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ATtiny2313

2543LS–AVR–08/10

ATtiny2313

Pin Descriptions

VCC Digital supply voltage.

GND Ground.

Port A (PA2..PA0) Port A is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.

Port A also serves the functions of various special features of the ATtiny2313 as listed on page

53.

Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.

Port B also serves the functions of various special features of the ATtiny2313 as listed on page

53.

Port D (PD6..PD0) Port D is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.

Port D also serves the functions of various special features of the ATtiny2313 as listed on page

56.

RESET

XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL1

XTAL2 Output from the inverting Oscillator amplifier. XTAL2 is an alternate function for PA1.

Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in Table 15 on page

34. Shorter pulses are not guaranteed to generate a reset. The Reset Input is an alternate func-

tion for PA2 and dW.

is an alternate function for PA0.

2543LS–AVR–08/10

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General Information

Resources A comprehensive set of development tools, application notes and datasheets are available for

downloadon http://www.atmel.com/avr.

Code Examples This documentation contains simple code examples that briefly show how to use various parts of

the device. These code examples assume that the part specific header file is included before
compilation. Be aware that not all C compiler vendors include bit definitions in the header files
and interrupt handling in C is compiler dependent. Please confirm with the C compiler documen­tation for more details.

Disclaimer Typical values contained in this data sheet are based on simulations and characterization of

other AVR microcontrollers manufactured on the same process technology. Min and Max values
will be available after the device is characterized.

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ATtiny2313

2543LS–AVR–08/10