5
4
3
2
1
Z62FM Block Diagram
CPU VCORE
D D
PAGE 50
CPU
YONAH-2M
PAGE 2,3
FAN + SENSOR P o w e r On Seq u en ce
PAGE 4
PAGE 39
SYSTEM PWR
PAGE 51
CLOCK GEN
FSB
667MHz
LVDS & INV
PAGE 12
PortBAR3
C C
CRT
PAGE 38
PortBAR3
LPT
PAGE 38
SUPER I/O
SMSC
LN47N217
PAGE 25
KEYPAD
MATRIX
PAGE 37
EC IT8510E
INSTANT KEY
B B
PAGE 37
LED Control,
Guage
PAGE 37
ISA
ROM
PAGE 25
CRT & TV OUT
PAGE 13
PAGE 28,29
Azalia Codec
AD1986A
PAGE 21,22,23
LPC
33MHz
Azalia
HDD
PAGE 27
ODD
PAGE 27
MCH-M
Calistoga
945GM
PAGE 6,7,8,9,10,11
ICH7-M
PAGE
17,18,19,20
IDE
DMI interface
USB
Blue tooth
BT-183
USB 2.0
CON X4
PAGE 35
DDR2-667
PCIE *1
PCI
33MHz
ICS954310
PAGE 5
Dual Channel DDR2
SO-DIMM X 2
PAGE 14,15,16
MINI CARD
WLAN
PAGE 26
Giga LAN
RTL8110SB
PAGE 33,34
CardBus
R5C841
PAGE 30
BAT & CHARGER
PAGE 57
PCMCIA
PAGE 31
1394
PAGE 32
CARD READER
PAGE 32
A A
5
PAGE 24
4
MDC Conn
PortBAR3
USB
PAGE 38
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
3
2
Wednesday, August 23, 2006
Z62Fp
Engineer:
BLOCK DIAGRAM
Vincent VY Huang
16 9
1
Rev
1.0
5
H_A#[16..3] 6
H_REQ#[4..0] 6
H_A#[31..17] 6
4
3
2
1
H_D#[0..63] 6
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_COMP0
R10 27.4Ohm
H_COMP1
R11 54.9Ohm
H_COMP2
R12 27.4Ohm
R14 54.9Ohm
H_COMP3
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
Layout Note:
Comp0,2 connect with Z0=27.4 ohm,
make trace length shorter than 0.5".
Comp1,3 connect with Z0=54.9 ohm,
make trace length shorter than 0.5".
Comp[3:0] at least 25 mils away from
any other toggling signal.
27.4 ohm connects with an ~18mil
wide trace to comp0.
54.9 ohm connect with 5mil-wide
to comp1
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
1 2
1 2
1 2
1 2
T4 TPC28T
1
GND
H_DPRSTP# 17,50
H_DPSLP# 17
H_DPWR# 6
H_PWRGD 17
H_CPUSLP# 6,17
PM_PSI# 50
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2
K3
H2
K2
J3
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
B25
U1A
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
RSVD[10]
RSVD[11]
SOCKET479P
ADDR GROUP 0
ADDR GROUP 1
PROCHOT#
THERM HCLK RESERVED
THERMTRIP#
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
XDP/ITP SIGNALS
DBR#
THERMDA
THERMDC
BCLK[0]
BCLK[1]
RSVD[12]
RSVD[A2]
RSVD[13]
RSVD[14]
RSVD[15]
RSVD[16]
RSVD[17]
RSVD[18]
RSVD[19]
RSVD[20]
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
D21
A24
A25
C7
A22
A21
T22
A2
D2
F6
D3
C1
AF1
D22
C23
C24
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BR0# 6
H_IERR#
H_INIT# 17
H_LOCK# 6
H_RS#0
H_RS#1
H_RS#2
H_HIT# 6
H_HITM# 6
T2
TPC28T
1
R3 56Ohm /X
R4 56Ohm
1 2
R5 56Ohm
1 2
1
R7 56Ohm
TPC28T
1 2
R8 56Ohm
1 2
H_PROCHOT_S#
CLK_CPU_BCLK 5
CLK_CPU_BCLK# 5
H_A#3
D D
H_ADSTB#0 6
C C
H_ADSTB#1 6
H_A20M# 17
H_FERR# 17
H_IGNNE# 17
H_STPCLK# 17
H_INTR 17
H_SMI# 17
B B
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_NMI 17
12G04600479A
R1.1_NO26
2.5A
+VCCP
+VCCP_AGTL+
A A
+VCCP 3,5,6,9,17,20,52
+VCCP_AGTL+ 3,5,6,9,17,20,52
1
THRO_CPU 28
1
+VCCP_AGTL+
R1
56Ohm
+VCCP_AGTL+
1 2
R2
T1
54.9Ohm
TPC28T
H_CPURST# 6
H_RS#0 6
H_RS#1 6
H_RS#2 6
H_TRDY# 6
+VCCP_AGTL+
T588
68 ± 5% pull-up to Vcc1_05
If PROCHOT# is not used, then it must be
terminated with a 56 pull-up resistor to VCCP.
If PROCHOT# is routed between CPU, IMVP and
MCH, pull-up resistor has to be 75 ± 5%
H_PROCHOT_S# H_PWRGD
3 2
R2.0_NO7
3
D
Q200
2N7002
G
S
2
GND
/X
1
GND
T3
1
TPC28T
CPU_THRM_DA 4
CPU_THRM_DC 4
PM_THRMTRIP# 4,17
+VCCP_AGTL+ +VCCP_AGTL+ +VCCP +VCCP_AGTL+
R17
56Ohm
C1
0.1UF/10V
/X
+VCCP_AGTL+
1 2
R9
1KOhm
1%
1 2
<500 mil (55 Ohm)
T/B trace 5.5 ,
Space 25
R16
2KOhm
1%
1 2
GND GND
R18
56Ohm
/X
H_DSTBN#0 6
H_DSTBP#0 6
H_DINV#0 6
H_DSTBN#1 6
H_DSTBP#1 6
H_DINV#1 6
GTL_REF
/X
R13 1KOhm
1 2
R15 51Ohm
1 2
GND
CPU_BSEL0 5
CPU_BSEL1 5
CPU_BSEL2 5
BCLK
FSB BSEL2 BSEL1 BSEL0
533 L L H 133
667 L H H
166
AD26
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
H26
F26
K22
H25
H23
G22
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
C26
D25
B22
B23
C21
J24
J23
J26
U1B
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
BSEL[0]
BSEL[1]
BSEL[2]
SOCKET479P
DATA GRP 0
DATA GRP 2 DATA GRP 3
DSTBN[2]#
DSTBP[2]#
DINV[2]#
DATA GRP 1
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
MISC
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
PWRGOOD
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DPWR#
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
CPU_BSEL0 H_PWRGD
CPU_BSEL1
CPU_BSEL2
12G04600479A
Title :
YONAH CPU (1)
ASUSTeK COMPUTER INC
Size Project Name
Custom
5
4
3
2
Date: Sheet of
Z62Fp
Wednesday, August 23, 2006
Engineer:
Vincent VY Huang
1
Rev
26 9
1.0
5
4
3
2
1
YUNAH FSB667
LFM TYP HFM
VCC 1.14V 1.2V 1.356V
C4 C3 C0
ICC 0.9A 7.59A 27A
D D
+VCORE
C C
B B
A10
A12
A13
A15
A17
A18
A20
B10
B12
B14
B15
B17
B18
B20
C10
C12
C13
C15
C17
C18
D10
D12
D14
D15
D17
D18
E10
E12
E13
E15
E17
E18
E20
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
A7
A9
B7
B9
C9
D9
E7
E9
F7
F9
U1C
VCC[1]
VCC[2]
VCC[3]
VCC[4]
VCC[5]
VCC[6]
VCC[7]
VCC[8]
VCC[9]
VCC[10]
VCC[11]
VCC[12]
VCC[13]
VCC[14]
VCC[15]
VCC[16]
VCC[17]
VCC[18]
VCC[19]
VCC[20]
VCC[21]
VCC[22]
VCC[23]
VCC[24]
VCC[25]
VCC[26]
VCC[27]
VCC[28]
VCC[29]
VCC[30]
VCC[31]
VCC[32]
VCC[33]
VCC[34]
VCC[35]
VCC[36]
VCC[37]
VCC[38]
VCC[39]
VCC[40]
VCC[41]
VCC[42]
VCC[43]
VCC[44]
VCC[45]
VCC[46]
VCC[47]
VCC[48]
VCC[49]
VCC[50]
VCC[51]
VCC[52]
VCC[53]
VCC[54]
VCC[55]
VCC[56]
VCC[57]
VCC[58]
VCC[59]
VCC[60]
VCC[61]
VCC[62]
VCC[63]
VCC[64]
VCCSENSE
VCC[65]
VCC[66]
VCC[67]
VSSSENSE
SOCKET479P
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]
VCC[100]
VCCP[1]
VCCP[2]
VCCP[3]
VCCP[4]
VCCP[5]
VCCP[6]
VCCP[7]
VCCP[8]
VCCP[9]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
12G04600479A
Layout note:Route
VCCSENSE and
VSSSENSE trace at
27.4 ohm with 25
mils spacing
A A
mismatch and 18mils
trace on 7mils
spacing.
Place pull-up/down
resisters within 1
inch of CPU.
5
YUNAH FSB667
Min Typ Max
VCCP 0.997V 1.05V 1.102V
Min Typ Max
ICCP 2.5A
+VCORE
+VCCP_AGTL+
+VCCA_CPU
1 2
0Ohm
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
VCCSENSE
VSSSENSE
7 8
5 6
3 4
1 2
7 8
5 6
3 4
GND
1 2
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
1 2
R20
100Ohm
RN2D
RN2C
RN2B
RN2A
RN1D
RN1C
RN1B
R19
100Ohm
VCCSENCE/VSSSENCE
need to be routed as
27.4ohm
RN1A
VR_VID0 50
VR_VID1 50
VR_VID2 50
VR_VID3 50
VR_VID4 50
VR_VID5 50
VR_VID6 50
+VCORE
VCCSENSE 50
VSSSENSE 50
4
GND
U1D
A4
VSS[1]
A8
VSS[2]
A11
VSS[3]
A14
VSS[4]
A16
VSS[5]
A19
VSS[6]
A23
VSS[7]
A26
VSS[8]
B6
VSS[9]
B8
VSS[10]
B11
VSS[11]
B13
VSS[12]
B16
VSS[13]
B19
VSS[14]
B21
VSS[15]
B24
VSS[16]
C5
VSS[17]
C8
VSS[18]
C11
VSS[19]
C14
VSS[20]
C16
VSS[21]
C19
VSS[22]
C2
VSS[23]
C22
VSS[24]
C25
VSS[25]
D1
VSS[26]
D4
VSS[27]
D8
VSS[28]
D11
VSS[29]
D13
VSS[30]
D16
VSS[31]
D19
VSS[32]
D23
VSS[33]
D26
VSS[34]
E3
VSS[35]
E6
VSS[36]
E8
VSS[37]
E11
VSS[38]
E14
VSS[39]
E16
VSS[40]
E19
VSS[41]
E21
VSS[42]
E24
VSS[43]
F5
VSS[44]
F8
VSS[45]
F11
VSS[46]
F13
VSS[47]
F16
VSS[48]
F19
VSS[49]
F2
VSS[50]
F22
VSS[51]
F25
VSS[52]
G4
VSS[53]
G1
VSS[54]
G23
VSS[55]
G26
VSS[56]
H3
VSS[57]
H6
VSS[58]
H21
VSS[59]
H24
VSS[60]
J2
VSS[61]
J5
VSS[62]
J22
VSS[63]
J25
VSS[64]
K1
VSS[65]
K4
VSS[66]
K23
VSS[67]
K26
VSS[68]
L3
VSS[69]
L6
VSS[70]
L21
VSS[71]
L24
VSS[72]
M2
VSS[73]
M5
VSS[74]
M22
VSS[75]
M25
VSS[76]
N1
VSS[77]
N4
VSS[78]
N23
VSS[79]
N26
VSS[80]
P3
VSS[81]
SOCKET479P
12G04600479A
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
GND
+VCORE
1 2
1 2
+1.5VS +VCCA_CPU
C2
10UF/6.3V
/X
C24
10UF/6.3V
/X
1 2
C3
10UF/6.3V
/X
1 2
C25
10UF/6.3V
/X
GND GND
0.12A
3
+VCCP_AGTL+
+VCORE
+1.5VS
Vcc Core Decoupling Caps
Place these on bottom side.
Place these caps on North side Secondary
1 2
+
CE1
330UF/2V_7343D
/X
GND
Place these caps on North side Secondary
1 2
C4
10UF/6.3V
1 2
Place these caps on North side Primary
1 2
C12
10UF/6.3V
1 2
C13
10UF/6.3V
Place these caps on South side Primary
C18
10UF/6.3V
1 2
C19
10UF/6.3V
1 2
Place these caps on South side Secondary
1 2
GND
1 2
C26
10UF/6.3V
/X
GND GND GND GND
Place these caps on South side Secondary
1 2
+
GND
checklist suggests
10uF POSCAP
Close to B26
(VCCA)
+VCCA_CPU
1 2
C5
10UF/6.3V
/X
1 2
C14
10UF/6.3V
/X
1 2
C20
10UF/6.3V
/X
GND
1 2
C27
10UF/6.3V
/X
CE4
330UF/2V_7343D
/X
120mA / 20mil
+VCCA_PROC
1 2
1 2
C41
10UF/10V
GND
2
C6
10UF/6.3V
1 2
GND GND GND GND GND
1 2
GND
C28
10UF/6.3V
C40
0.01UF/10V
1 2
C7
10UF/6.3V
C15
10UF/6.3V
C21
10UF/6.3V
GND GND GND
1 2
C29
10UF/6.3V
/X
+VCCP_AGTL+
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
+VCCP_AGTL+ 2,5,6,9,17,20,52
+VCORE 50
+1.5VS 9,10,20,26,36,52
1 2
1 2
C16
10UF/6.3V
/X
1 2
C22
10UF/6.3V
/X
1 2
CE54 100UF/2.5V
1 2
1 2
C34
0.1UF/10V
+
C8
10UF/6.3V
/X
C30
10UF/6.3V
1 2
C35
0.1UF/10V
1 2
GND GND GND GND GND GND GND GND
1 2
GND
GND
1 2
0.1UF/10V
C9
10UF/6.3V
/X
C31
10UF/6.3V
checklist suggests
0.1uF X5R
1 2
C36
C37
0.1UF/10V
GND
GND GND GND GND GND
+V1.05S (VCCP_CPU)
Decoupling Capacitor
(Place near CPU)
Title :
Engineer:
Wednesday, August 23, 2006
Z62Fp
1
1 2
1 2
0.1UF/10V
C38
C39
0.1UF/10V
Yonah CPU (2)
Vincent VY Huang
36 9
Rev
1.0
5
Fan Speed Control
D D
KBC will issue a
analog ( a voltage
level ) signal.
SW: FAN_DA1 must
be low during S3
R23
2N7002
5
Q3
/X
PM_THRMTRIP# 2,7,17
1 2
14.7KOhm
3 2
3
D
1
1
G
S
2
GND GND
THRM_CPU# 28
FAN0_DA 28
DLY_OP_SD 22
C C
B B
A A
1%
R26
10KOhm
/X
R1.1_NO36
+V5S_FAN
RN3B
10KOhm
1 2
1 2
330Ohm
+3VA_EC
3 4
1 2
GND
R34
R1269
100KOhm
1 2
Using a OP AMP and
fine-tuning the level,
we can improve the fan
speed accuracy.
C42 1000PF/50V
GND
R25
15KOhm
P/N change to
1%
06-010112010 for
cost down
OVER_TEMP# 28
+3VS
1 2
3
Q7
C
1
B
E
2
PMBS3904
GND
+5VS
Q5
3 2
3
D
2N7002
3
2
5
6
R29
1MOhm
1
1
G
1 2
A+
+
A-
-
B+
+
B-
-
LM358MX
GND
2
S
4
U2
VCC
AO
BO
GND
1 2
C45
0.22UF/6.3V
4
+12V
8
1
7
4
GND
OVER_TEMP#
1
1
G
SMB1_CLK 28
SMB1_DAT 28
GND
+3VA
R1.1_NO2
R28
10KOhm
/X
1 2
3 2
3
D
Q6
2N7002
S
2
GND
1 2
R35
4.7KOhm
1 2
R24
10KOhm
/X
1 2
VSUS_ON
SMB1_CLK
SMB1_DAT
SMBALERT#
R22
330Ohm
+3VS
+3VS
7 8
RN3D
10KOhm
+5VS
1 2
C43
0.1UF/10V
GND
+3VS
5 6
RN3C
10KOhm
3 4
5
GND
VSUS_ON 51
+3VS
C47
0.1UF/10V
Q2
SI2301BDS_T1_E3
2 3
S
2
G
1
1
6 1
2
Q4B
UM6K1N
GND
1 2
U3
8
SCLK
7
SDATA
6
ALERT#/THERM2#
ADT7461ARMZ
3
+V5S_FAN
D
3
1 2
C1073
22UF/6.3V
GND
Q4A
UM6K1N
Standby Mode: 3uA(Max. 10uA)
Full Active: 0.5 mA(Max. 1mA)
+3.3VS_THM
VDD
D+
THERM# GND
3
D1
1 2
GND
1
2
3
D-
4 5
1N4148W
OVER_TEMP#
2
When fan speed is
very slow, after RC
integrator the level
of FANSP1 will be
very low that may
make south bridge do
the wrong detection.
+VCORE
+12V
+5VS
+3VS
+3VA
R1.1_NO22
4"-8"
1 2
C46
2200PF/50V
4"-8"
+VCORE 3,50
+12V 35,36,61
+5VS 13,19,20,21,22,27,36,37,38,50,61
+3VS 5,7,9,11,12,13,14,15,19,20,21,22,24,25,26,27,28,30,36,39,50,52,60,61
+3VA 12,20,22,24,25,28,29,39,54,59,63
U6 output maximum will be 10.5V (VCC-1.5V) which will
damage sourth bridge. Add a MOS to tansfer it to +3V
level.
CPU_THRM_DA 2
CPU_THRM_DC 2
2
1
+3V S
1 2
R21
10KOhm
CPU FAN
+5VS
1 2
RN3A
10KOhm
FANSP1
C44
100PF/50V
+V5S_FAN
1 2
GND
GND
Route H_THERMDA and H_THERMDC
on the same layer
------------------OTHER SIGNALS
12 mils
===============GND
10 mils
=========H_THERMDA(10 mils)
10 mils
=========H_THERMDC(10 mils)
10 mils
=========GND
12 mils
---------------------OTHER SIGNALS
3 2
3
1
1
G
2
GND
4 5
HOLD1
1
2
3
HOLD2
GND
12G170000038
FAN0_TACH 28
D
Q1
2N7002
S
Must confirm
pin1,pin2,pin3
signal
CN7
WtoB_CON_3P
Avoid BPSB,Power
Title :
THER-SENSOR,FAN
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
Wednesday, August 23, 2006
Z62Fp
Engineer:
Vincent VY Huang
46 9
1
Rev
1.0
5
Request
Control net
PCIE_REQ1#
PCIE_REQ2#
PCIE_REQ3#
PCIE_REQ4#
D D
C C
B B
A A
PCIE2(#),PCIE4(#)
PCIE3(#),PCIE5(#),
PCIE7(#)
CLK_USB48 19
CLK_LAN_PCI 33
CLK_CBPCI 30,41
CLK_SIOPCI 25
CLK_ECPCI 28
CLK_TPMLPC 24
CLK_ICHPCI 18
SMB_CLK_S 14,15,19,24,26
SMB_DAT_S 14,15,19,24,26
R1.1_NO46
R70,R77,R79,R83
change to 39ohm
Net name
None PCIE0(#),PCIE6(#)
None PCIE1(#),PCIE8(#)
CLK_PCIE_MINICARD1(#)
None
X1
14.318Mhz
12
1 2
C64
27PF/50V
CLK_LCD_SSCG# 7
GND
CLK_LCD_SSCG 7
/X
GND
1 2
C68 10PF/50V
C66 10PF/50V
/X
1 2
1 2
C65
27PF/50V
R72 33Ohm
C69 10PF/50V
/X
/X
1 2
+VCCP_AGTL+
GND
1 2
C61
10UF/10V
GND
CPU_BSEL0 2
CPU_BSEL1 2
R70 39Ohm
1 2
1 2
+3VS_CLK
+3VS_CLK
+3VS_CLK
C72 10PF/50V
C70 10PF/50V
C73 10PF/50V
C71 10PF/50V
/X
/X
/X
1 2
1 2
1 2
1 2
4
R40
1KOhm
1 2
/X
R42
1KOhm
1 2
/X
1KOhm
1 2
R44
/X
1KOhm
1 2
R46
/X
+3VS_CLK
R56
1 2
2.2Ohm
C62
0.1UF/10V
+3VS_VDDA
GND
R1008 33Ohm
1 2
R1009 33Ohm
1 2
R68 33Ohm
1 2
R69 2.2KOhm
GND
R77 39Ohm
1 2
R79 39Ohm
1 2
R508 10KOhm
R81 33Ohm
1 2
R1024 10KOhm
1 2
R83 39Ohm
1 2
R84 10KOhm
1 2
GND
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
1 2
1 2
R85
475Ohm
1 2
R510
1 2
0Ohm
PCICLK5
R71 10KOhm
1 2
PCICLK4
PCICLK3
PCICLK2
1 2
PCICLK_F1
PCICLK_F0
GND
R41
1 2
R45
1 2
R47 0Ohm
1 2
0Ohm
0Ohm
+3VS
GND
1 2
C49
0.1UF/10V
MCH_BSEL0 7
MCH_BSEL1 7
MCH_BSEL2 7
Pin34 is PWRSAVE#
IC1
21
VDDPCIEX1
28
VDDPCIEX2
42
VDDPCIEX3
34
VDD
50
VDDCPU
45
VDDA
46
GNDA
58
X1
57
X2
17
27FIX/LCD_SSCGT/PCIEX0T
18
27SS/LCD_SSCGC/PCIEX0C
FSA
12
FSLA/USB_48MHz
16
FSLB/TEST_MODE
5
SELPCIEX0_LCD#PCICLK5
4
PCICLK4
3
PCICLK3
64
PCICLK2/REQ_SEL
9
SELLCD_27#/PCICLK_F1
8
ITP_EN/PCICLK_F0
54
SCLK
55
SDATA
47
IREF
2
GND1
6
GND2
13
GND3
29
GND4
37
GND5
53
GND6
59
GND7
ICS954310BGLFT
1 2
C50
0.1UF/10V
120Ohm/100Mhz
2 1
L2
120Ohm/100Mhz
+3VS_VDDPCI
1
7
VDDPCI1
VDDPCI2
CPUCLKT2_ITP/PCIEXT8
CPUCLKC2_ITP/PCIEXC8
internal
pull high
REF1/FSLC/TEST_SEL
3
Bclk BSEL0FSB
133
533
667
166
L1
2 1
1 2
C56
0.1UF/10V
VDDREF
PCI/PCIEX_STOP#
CPU_STOP#
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
PEREQ1#/PCIEXT7
PEREQ2#/PCIEXC7
PCIEXT6
PCIEXC6
PCIEXT5
PCIEXC5
PCIEXT4
PCIEXC4
PCIEXT3
PCIEXC3
PCIEXT2
PCIEXC2
PCIEXT1
PCIEXC1
SATACLKT
SATACLKC
DOTT_96MHz
DOTC_96MHz
PEREQ3#
PEREQ4#
Vtt_PwrGd#/PD
FSLC FSLB FSLA
BSEL1
BSEL2
L
LHH LH
+3VS_CLK
1 2
1 2
C51
C52
10UF/10V
0.1UF/10V
1 2
1 2
C57
C58
0.1UF/10V
10UF/10V
R53
GND
2.2Ohm
+3VS_VDD48
11
VDD48
REF0
+3VS_VDDREF
56
63
62
CLK_MCH
49
CLK_MCH#
48
CLK_CPU
52
CLK_CPU#
51
44
43
R65 10KOhm
41
40
R66 10KOhm
39
38
PCIE5
36
PCIE#5
35
PCIE4
30
PCIE#4
31
PCIE3
24
PCIE#3
25
PCIE2
22
PCIE#2
23
PCIE1
19
PCIE#1
20
SATACLKT
26
SATACLKC
27
DOT96
14
DOT96#
15
R506 10KOhm
32
R507 0Ohm /X
33
R509 10KOhm
10
REF1
61
REF0
60
R76 33Ohm
R78 33Ohm
R504 33Ohm
R505 33Ohm
R80 33Ohm
R82 33Ohm
R1017 33Ohm
R1018 33Ohm
+3VS_CLK
1 2
1 2
C54
C53
0.1UF/10V
0.1UF/10V
GND
1 2
C59
0.1UF/10V
1 2
R61 33Ohm
R62 33Ohm
R63 33Ohm
R64 33Ohm
1
1
1 2
1 2
1 2
1 2
1 2
1 2
1
1
1 2
1 2
R90 33Ohm
1 2
R91 33Ohm
1 2
STP_PCI# 19
STP_CPU# 19,50
1 2
1 2
1 2
1 2
1
1
1 2
1 2
1
1
T11 TPC28T
T12 TPC28T
T576 TPC28T
T577 TPC28T
T15 TPC28T
1
T16 TPC28T
1
1 2
1 2
1 2
R89
1 2
2.2KOhm
GND
T5 TPC28T
T6 TPC28T
T9 TPC28T
T10 TPC28T
+VCCP_AGTL+
1 2
C55
0.1UF/10V
1 2
C60
10UF/10V
GND
+3VS
MCH_CLK_REQ# 7
CLKREQ# 26
+3VS
CPU_BSEL2 2
2
+3VS
R54
1Ohm
1 2
C63
1 2
0.1UF/10V
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_MINICARD 26
CLK_PCIE_MINICARD# 26
CLK_PCIE_ICH 18
CLK_PCIE_ICH# 18
CLK_UMA_96M 7
CLK_UMA_96M# 7
CLK_14_SIO 25
CLK_ICH14 19
+3VS
1 2
1
+VCCP_AGTL+ 2,3,6,9,17,20,52
+3VS 4,7,9,11,12,13,14,15,19,20,21,22,24,25,26,27,28,30,36,39,50,52,60,61
PLACE termination close to source IC
GND
R87
10KOhm
/X
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_LCD_SSCG
CLK_LCD_SSCG#
CLK_UMA_96M
CLK_UMA_96M#
CLK_PCIE_MINICARD
CLK_PCIE_MINICARD#
CLK_EN# 50
R48 49.9Ohm
R49 49.9Ohm
R50 49.9Ohm
R51 49.9Ohm
R52 49.9Ohm
R55 49.9Ohm
R57 49.9Ohm
R58 49.9Ohm
R59 49.9Ohm
R60 49.9Ohm
R1020 49.9Ohm
R1021 49.9Ohm
R500 49.9Ohm
R501 49.9Ohm
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
GND
Title :
CLOCK GEN
ASUSTeK COMPUTER INC
Size Project Name
Custom
5
4
3
2
Date: Sheet
Z62Fp
Engineer:
Vincent VY Huang
1
Rev
56 9 Wednesday, August 23, 2006
1.0
of
5
4
3
2
1
H_XRCOMP
R92
24.9Ohm
1 2
D D
C C
B B
GND
+VCCP
+VCCP
GND
+VCCP
GND
R94
54.9Ohm
H_XSCOMP
1 2
R96
221Ohm
1 2
R98
100Ohm
1 2
R100
221Ohm
1 2
R101
100Ohm
1 2
10/20mils 10/20mils
5.5/20 mils
1 2
C74
0.1UF/10V
GND
Signal voltage level = 0.3125*VCCP
Trace should be 10 mil wide with
20 mil spacing
1 2
C77
0.1UF/10V
GND
H_YRCOMP
1 2
GND
+VCCP
1 2
H_XSWING
H_YSWING
R93
24.9Ohm
R95
54.9Ohm
H_YSCOMP
10/20mils
5.5/20 mils
10/20mils
H_D#[0..63] 2 H_A#[31..3] 2
+VCCP
+VCCP_AGTL+
+VCCP_AGTL+
R97
100Ohm
1 2
R99
200Ohm
1 2
GND
H_CPUSLP# 2
H_TRDY# 2
<500 mil (55 Ohm)
T/B trace 5.5 ,
Space 25
1 2
GND
W11
AA10
AC9
AB11
AC11
AC2
AD1
AD9
AC1
AD7
AC6
AD10
AD4
AC8
AG2
AG1
K11
T10
U11
T11
AB7
AA9
Y10
AB8
AA4
AA7
AA2
AA6
AA1
AB4
AB3
AB5
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
G4
T3
U7
U9
W9
T1
T8
T4
W7
U5
T9
W6
T5
W4
W3
Y3
Y7
W5
W2
Y8
E1
E2
E4
Y1
U1
W1
U4A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
CALISTOGA_Q137
HOST
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_AVREF
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_DVREF
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
H_CPUSLP#_R
E3
E7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_ADS# 2
H_ADSTB#0 2
H_ADSTB#1 2
H_BNR# 2
H_BPRI# 2
H_BR0# 2
H_CPURST# 2
H_DBSY# 2
H_DEFER# 2
H_DPWR# 2
H_DRDY# 2
H_DINV#0 2
H_DINV#1 2
H_DINV#2 2
H_DINV#3 2
H_DSTBN#0 2
H_DSTBN#1 2
H_DSTBN#2 2
H_DSTBN#3 2
H_DSTBP#0 2
H_DSTBP#1 2
H_DSTBP#2 2
H_DSTBP#3 2
H_HIT# 2
H_HITM# 2
H_LOCK# 2
R102
0Ohm
1 2
H_VREF
H_REQ#[4..0] 2
H_RS#[0..2] 2
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5
CLK_MCH_BCLK
CLK_MCH_BCLK#
+VCCP 2,3,5,9,17,20,52
+VCCP_AG T L + 2,3,5,9,17,20,52
0.1uF should be placed
100mils or less from GMCH
C76
pin.
0.1UF/10V
A A
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
5
4
3
2
Wednesday, August 23, 2006
Z62Fp
Engineer:
Calistoga MCH (1)
Vincent VY Huang
66 9
1
Rev
1.0
5
R1.1
+3VS
R700 10KOhm
1 2
R701 10KOhm
1 2
R104 10KOhm
R103 10KOhm
D D
C C
B B
A A
1 2
GND
GND
GND
DAC_HSYNC_GM
DAC_VSYNC_GM
R107
1.5KOhm
R113 150Ohm
R114 150Ohm
R115 150Ohm
4.99KOhm
R1014 150Ohm
1 2
R1015 150Ohm
1 2
R1016 150Ohm
1 2
5
1 2
1 2
T21
TPC28T
GND
1 2
1 2
1 2
1 2
R117
GND
R1011 39Ohm
1 2
R1012 39Ohm
1 2
L_BKLTCTL
L_BKLTEN
L_CTLA_CLK
L_CTLB_DATA
EDID_CLK
EDID_DAT
L_IBG
L_VBG
1
L_VDDEN
L_VREFH
L_VREFL
LVDS_LCLKN
LVDS_LCLKP
LVDS_UCLKN
LVDS_UCLKP
LVDS_L0N
LVDS_L1N
LVDS_L2N
LVDS_L0P
LVDS_L1P
LVDS_L2P
LVDS_U0N
LVDS_U1N
LVDS_U2N
LVDS_U0P
LVDS_U1P
LVDS_U2P
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
GND
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
GND
1 2
GND
R118
255Ohm
1%
U4C
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLK_CTLA
H29
L_DATA_CTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DATA#_0
B35
LA_DATA#_1
A37
LA_DATA#_2
B37
LA_DATA_0
B34
LA_DATA_1
A36
LA_DATA_2
G30
LB_DATA#_0
D30
LB_DATA#_1
F29
LB_DATA#_2
F30
LB_DATA_0
D29
LB_DATA_1
F28
LB_DATA_2
A16
TV_DACA_OUT
C18
TV_DACB_OUT
A19
TV_DACC_OUT
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
E23
CRT_BLUE
D23
CRT_BLUE#
C22
CRT_GREEN
B22
CRT_GREEN#
A21
CRT_RED
B21
CRT_RED#
C26
CRT_DDC_CLK
C25
CRT_DDC_DATA
G23
CRT_HSYNC
J22
CRT_IREF
H23
CRT_VSYNC
CALISTOGA_Q137
LVDS_L0N 12
LVDS_L0P 12
LVDS_L1N 12
LVDS_L1P 12
LVDS_L2N 12
LVDS_L2P 12
LVDS_LCLKN 12
LVDS_LCLKP 12
LVDS_U0N 12
LVDS_U0P 12
LVDS_U1N 12
LVDS_U1P 12
LVDS_U2N 12
LVDS_U2P 12
LVDS_UCLKN 12
LVDS_UCLKP 12
LVDS
TV
VGA
4
+1.5VS_PCIE
R105
1 2
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
PCI-EXPRESS GRAPHICS
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
L_BKLTCTL 12 PM_DPRSLPVR 50
EDID_CLK 12
EDID_DAT 12
TV_DACA_OUT 13
TV_DACB_OUT 13
TV_DACC_OUT 13
CRT_RED 13
CRT_GREEN 13
CRT_BLUE 13
DAC_HSYNC_GM 13
DAC_VSYNC_GM 13
CRT_DDC_DATA 13
CRT_DDC_CLK 13
4
D40
D38
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
24.9Ohm
L_BKLTEN
MCH_CFG_11 11
MCH_CFG_16 11
MCH_CFG_18 11
MCH_CFG_19 11
GND
MCH_CFG_5 11
MCH_CFG_7 11
MCH_CFG_9 11
MCH_ICH_SYNC# 18
MCH_CLK_REQ# 5
R702
100KOhm
1 2
+3VS
PLT_RST# 18,19,27,28
1 2
1 2
PM_THRMTRIP# 4,17
L_BKLTEN 12 L_VDDEN 12
R106
10KOhm
R108
10KOhm
/X
MCH_BSEL0 5
MCH_BSEL1 5
MCH_BSEL2 5
MCH_CFG_5
MCH_CFG_7
MCH_CFG_16
MCH_CFG_18
MCH_CFG_19
PM_BMBUSY# 19
ICH7_PWROK 19,28
3
PM_EXTTS#0
PM_EXTTS#1
MCH_CFG_9
T557 TPC28T
T559 TPC28T
T560 TPC28T
T26 TPC28T
T561 TPC28T
R116
100Ohm
3
U4B
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
K30
TV_DCONSEL_0
J29
TV_DCONSEL_1
A41
RSVD_11
A35
RSVD_12
A34
RSVD_13
D28
RSVD_14
D27
RSVD_15
K16
CFG_0
K18
CFG_1
J18
AH33
AH34
BA41
BA40
BA39
AY41
AW41
AW1
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
G28
F25
H26
G6
H28
H27
K28
H32
D1
C41
C1
BA3
BA2
BA1
B41
B2
AY1
A40
A4
A39
A3
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#
SDVO_CTRLCLK
SDVO_CTRLDATA
ICH_SYNC#
CLK_REQ#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
CALISTOGA_Q137
R2.0_NO10
T22 TPC28T
1
T23 TPC28T
1
T24 TPC28T
1
T25 TPC28T
1
1
1
1
1
1
T27 TPC28T
1
T28 TPC28T
1
PM_EXTTS#0
PM_EXTTS#1
RST_IN#_MCH
1 2
PM_EXTTS#1 PM_DPRSLPVR
RSVD
CFG
PM
MISC NC
2
SM_OCDCOMP_0
SM_OCDCOMP_1
DDR MUXING CLK
D_REFSSCLKIN#
D_REFSSCLKIN
DMI
M_VREF_MCH
+1.5VS_PCIE
2
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
SM_VREF_0
SM_VREF_1
G_CLKIN#
D_REFCLKIN#
D_REFCLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
+3VS
+1.5VS
+1.8V
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
G_CLKIN
1
AY35
AR1
AW7
AW40
AW35
AT1
AY7
AY40
M_CKE0
AU20
M_CKE1
AT20
M_CKE2
BA29
M_CKE3
AY29
M_CS#0
AW13
M_CS#1
AW12
M_CS#2
AY21
M_CS#3
AW21
M_OCDCOMP0
AL20
M_OCDCOMP1
AF10
M_ODT0
BA13
M_ODT1
BA12
M_ODT2
AY20
M_ODT3
AU21
M_RCOMP#
AV9
M_RCOMP
AT9
AK1
AK41
AF33
AG33
A27
A26
C40
D41
DMI_TXN0
AE35
DMI_TXN1
AF39
DMI_TXN2
AG35
DMI_TXN3
AH39
DMI_TXP0
AC35
DMI_TXP1
AE39
DMI_TXP2
AF35
DMI_TXP3
AG39
DMI_RXN0
AE37
DMI_RXN1
AF41
DMI_RXN2
AG37
DMI_RXN3
AH41
DMI_RXP0
AC37
DMI_RXP1
AE41
DMI_RXP2
AF37
DMI_RXP3
AG41
R1.1_NO38
+3VS 4,5,9,11,12,13,14,15,19,20,21,22,24,25,26,27,28,30,36,39,50,52,60,61
M_VREF_MCH 14,15,16
+1.5VS 3,9,10,20,26,36,52
+1.5VS_PCIE 9
+1.8V 10,14,15,16,36,53
M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR2 14
M_CLK_DDR3 14
M_CLK_DDR#0 15
M_CLK_DDR#1 15
M_CLK_DDR#2 14
M_CLK_DDR#3 14
Layout Note: Route as short
as possible.
R109 40.2Ohm/X
R110 40.2Ohm/X
R111 80.6Ohm
1 2
R112 80.6Ohm
M_VREF_MCH
1 2
1 2
1 2
CLK_MCH_3GPLL# 5
CLK_MCH_3GPLL 5
CLK_UMA_96M# 5
CLK_UMA_96M 5
CLK_LCD_SSCG# 5
CLK_LCD_SSCG 5
DMI_TXN[0..3] 18
DMI_TXP[0..3] 18
DMI_RXN[0..3] 18
DMI_RXP[0..3] 18
M_VREF_MCH
C778
0.1UF/16V
Each place near by BGA
ball
1 2
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
Z62Fp
Wednesday, August 23, 2006
Engineer:
1
M_CKE[0..3] 14,15,16
M_CS#[0..3] 14,15,16
M_ODT[0..3] 14,15,16
GND
+1.8V
GND
R1.1_NO25
1 2
C779
0.1UF/16V
GND
Calistoga PCI-E (2)
Vincent VY Huang
Rev
1.0
69 7
5
4
3
2
1
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_RAS#
SB_WE#
M_B_DM[0..7] 14
M_B_DQS[0..7] 14
M_B_DQS#[0..7] 14
M_B_A[0..13] 14,16
AT24
AV23
AY28
AR24
M_B_DM0
AK36
M_B_DM1
AR38
M_B_DM2
AT36
M_B_DM3
BA31
M_B_DM4
AL17
M_B_DM5
AH8
M_B_DM6
BA5
M_B_DM7
AN4
M_B_DQS0
AM39
M_B_DQS1
AT39
M_B_DQS2
AU35
M_B_DQS3
AR29
M_B_DQS4
AR16
M_B_DQS5
AR10
M_B_DQS6
AR7
M_B_DQS7
AN5
M_B_DQS#0
AM40
M_B_DQS#1
AU39
M_B_DQS#2
AT35
M_B_DQS#3
AP29
M_B_DQS#4
AP16
M_B_DQS#5
AT10
M_B_DQS#6
AT7
M_B_DQS#7
AP5
M_B_A0
AY23
M_B_A1
AW24
M_B_A2
AY24
M_B_A3
AR28
M_B_A4
AT27
M_B_A5
AT28
M_B_A6
AU27
M_B_A7
AV28
M_B_A8
AV27
M_B_A9
AW27
M_B_A10
AV24
M_B_A11
BA27
M_B_A12
AY27
M_B_A13
AR23
AU23
AK16
AK18
AR27
1
1
T30 TPC28T
T32 TPC28T
M_B_BS#0 14,16
M_B_BS#1 14,16
M_B_BS#2 14,16
M_B_CAS# 14,16
M_B_RAS# 14,16 M_A_RAS# 15,16
M_B_WE# 14,16
D D
M_A_DQ[0..63] 15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
C C
B B
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
U4D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
CALISTOGA_Q137
DDR SYSTEM MEMORY A
SA_RCVENOUT#
SA_BS_0
SA_BS_1
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVENIN#
SA_WE#
AU12
AV14
BA20
AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
1
1
T29 TPC28T
T31 TPC28T
M_A_BS#0 15,16
M_A_BS#1 15,16
M_A_BS#2 15,16
M_A_CAS# 15,16
M_A_WE# 15,16
M_A_DM[0..7] 15
M_A_DQS[0..7] 15
M_A_DQS#[0..7] 15
M_A_A[0..13] 15,16
M_B_DQ[0..63] 14
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AN10
AK13
AH11
AK10
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ9
AJ8
AJ5
AJ3
U4E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
CALISTOGA_Q137
DDR SYSTEM MEMORY B
SB_RCVENOUT#
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RCVENIN#
A A
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
5
4
3
2
Date: Sheet of
Z62Fp
Wednesday, August 23, 2006
Engineer:
Calistoga DDR2 (3)
Vincent VY Huang
1
Rev
1.0
69 8
C898
10Ohm
1 2
0.1UF/10V
1 2
3
2 1
1 2
C920
22UF/6.3V
1 2
C921
22UF/6.3V
5
C899
D77
1 2
C902
0.022UF/25V
1 2
C955
0.1UF/10V
GND
GND
GND GND
GND GND
1 2
GND GND
5
VCCA_3GBG
2 mA
1
2
BAT54C
1 2
GND GND
1 2
10UF/10V
1 2
C82
0.1UF/10V
R1.1_NO37
1 2
CE50
10UF/10V
1 2
+
CE10
470UF/2.5V
/X
1 2
+
CE13
470UF/2.5V
/X
1 2
C85
0.1UF/10V
C87
0.1UF/10V
1 2
C901
0.1UF/10V
GND GND GND GND
+VCCP_GMCH
C903
0.1UF/10V
VCC3G
1 2
C904
10UF/10V
GND GND
VCCA3GPLL
1 2
C83
10UF/10V
GND GND
VCCAUX
1 2
C912
0.1UF/10V
GND GND
VCCA_DPLLA
50 mA
1 2
C916
0.1UF/10V
GND
VCCA_DPLLB
50 mA
1 2
C919
0.1UF/10V
VCCA_HPLL
45 mA
VCCA_MPLL
45 mA
1 2
1 2
C91
C92
0.1UF/10V
4.7UF/10V
GND
GND
VCCTX_LVDS
60 mA
+2.5VS_CRTDAC
+1.5VS_PCIE
1500 mA
C905
+1.5VS_3GPLL
+1.5VS_VCCAUX
Place filter
components close
to GMCH
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
NOTE:0.1UF CAPS USED IN
+1.5VS, +3.3VS
+2.5VS should be placed within
200 mils of edge.
VCCA_3GBG
NOTE:0.1uF caps in
1.5SxPLL need to be
located as edge caps
within 200 mils.
+2.5VS
D D
1 2
C900
0.1UF/10V
VCC_SYNC,
near GMCH
70 mA
+1.5VS
C C
B B
A A
1 2
0.01UF/25V
VCCA_LVDS
10 mA
R1026
L87
120Ohm/100Mhz
VCCA_CRTDAC
L88
2 1
120Ohm/100Mhz
L90
2 1
30Ohm/100Mhz
L3
2 1
30Ohm/100Mhz
L4
2 1
30Ohm/100Mhz
L5
2 1
120Ohm/100Mhz
L6
2 1
120Ohm/100Mhz
+1.5VS
VCCD_LVDS
1 2
C95
0.1UF/10V
GND GND
+1.5VS
VCCD_TVDAC
1 2
C84
0.022UF/25V
+1.5VS
VCCDQ_TVDAC
1 2
C86
0.022UF/25V
4
3MM_OPEN_5MIL
/X
JP28
1 2
12
3MM_OPEN_5MIL
/X
JP29
1 2
12
20 mA
1 2
C96
10UF/10V
1 2
C909
0.1UF/10V
GND GND
1 2
C913
0.1UF/10V
GND GND
4
24 mA
+VCCP_GMCH +VCCP
R1.1_NO5
+2.5VS
+2.5VS_CRTDAC
GND
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
+3.3VS_TVBG
+3.3VS_TVDACA
+3.3VS_TVDACB
+3.3VS_TVDACC
+1.5VS_VCCAUX
+1.05VS 3500 mA
+1.5VS 5500mA
+2.5VS
+1.5VS_PCIE
+1.5VS_3GPLL
+2.5VS
+1.5VS
+1.5VS
+1.5VS
+3VS
+1.5VS
GND
GND
GND
H22
C30
B30
A30
AJ41
AB41
Y41
V41
R41
N41
AC33
G41
H41
F21
E21
G21
B26
C39
AF1
A38
B39
AF2
H20
G20
E19
F19
C20
D20
E20
F20
AH1
AH2
A28
B28
C28
D21
A23
B23
B25
H19
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12
L41
3
U4H
VCCSYNC
VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS
VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCD_TVDAC
VCC_HV0
VCC_HV1
VCC_HV2
VCCD_QTVDAC
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
CALISTOGA_Q137
3
where VCCD_HMPLL 150
mA?
POWER
VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
+VCCP_AGTL+
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
2
2
+3VS
VTTLF_CAP3
GND
VTTLF_CAP2
VTTLF_CAP1
1 2
0.47UF/16V
GND
+VCCP_AGTL+
+VCCP_GMCH
+1.5VS_PCIE
+3VS
+2.5VS
+1.5VS
+VCCP_AGTL+ 2,3,5,6,17,20,52
+VCCP_GMCH 10
+1.5VS_PCIE 7
+3VS 4,5,7,11,12,13,14,15,19,20,21,22,24,25,26,27,28,30,36,39,50,52,60,61
+2.5VS 13,36,54
+1.5VS 3,10,20,26,36,52
PLACE ON THE EDGE PLACE IN CAVITY
800 mA
+3VS
1 2
GND
R1027
10Ohm
180Ohm/100Mhz
1 2
C88
0.47UF/16V
1 2
C89
GND
1 2
C79
4.7UF/10V
C93
10UF/10V
D78
3
1 2
L89
2 1
C90
0.22UF/6.3V
VCCHV
40 mA
1 2
GND
1 2
C906
10UF/10V
GND
1 2
C80
2.2UF/6.3V
C94
0.1UF/10V
1
2
BAT54C
1 2
C956
0.1UF/10V
+1.5VS
1 2
C81
0.22UF/6.3V
1 2
C907
0.022UF/25V
1 2
C910
0.022UF/25V
1 2
C914
0.022UF/25V
1 2
C917
0.022UF/25V
GND GND
1 2
C957
0.1UF/10V
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
Wednesday, August 23, 2006
Z62Fp
Engineer:
1
+VCCP_AGTL+
1 2
+
CE8
330UF/2V_7343D
/X
GND GND
+3.3VS_TVBG
VCCA_TVBG
1 2
C908
0.1UF/10V
GND GND GND
+3.3VS_TVDACA
VCCA_TVDACA
1 2
C911
0.1UF/10V
GND GND
+3.3VS_TVDACB
VCCA_TVDACB
1 2
C915
0.1UF/10V
GND GND
+3.3VS_TVDACC
VCCA_TVDACC
1 2
C918
0.1UF/10V
1 2
C958
0.1UF/10V
Calistoga Power (4)
Vincent VY Huang
1
R1.1_NO40
all
120 mA
R2.0_NO12
+1.5VS
1 2
C959
0.1UF/10V
Rev
1.0
69 9
+VCCP_GMCH
U4F
AA33
VCC_0
W33
VCC_1
P33
VCC_2
N33
VCC_3
L33
VCC_4
J33
VCC_5
AA32
VCC_6
Y32
VCC_7
W32
VCC_8
V32
VCC_9
P32
VCC_10
D D
N32
VCC_11
M32
VCC_12
L32
VCC_13
J32
VCC_14
AA31
VCC_15
W31
VCC_16
V31
VCC_17
T31
VCC_18
R31
VCC_19
P31
VCC_20
N31
VCC_21
M31
VCC_22
AA30
VCC_23
Y30
VCC_24
W30
VCC_25
V30
VCC_26
U30
VCC_27
T30
VCC_28
R30
VCC_29
P30
VCC_30
N30
VCC_31
M30
VCC_32
L30
VCC_33
AA29
VCC_34
Y29
VCC_35
W29
VCC_36
V29
VCC_37
U29
VCC_38
R29
VCC_39
P29
VCC_40
M29
C C
VCC_41
L29
VCC_42
AB28
VCC_43
AA28
VCC_44
Y28
VCC_45
V28
VCC_46
U28
VCC_47
T28
VCC_48
R28
VCC_49
P28
VCC_50
N28
VCC_51
M28
VCC_52
L28
VCC_53
P27
VCC_54
N27
VCC_55
M27
VCC_56
L27
VCC_57
P26
VCC_58
N26
VCC_59
L26
VCC_60
N25
VCC_61
M25
VCC_62
L25
VCC_63
P24
VCC_64
N24
VCC_65
M24
VCC_66
AB23
VCC_67
AA23
VCC_68
Y23
VCC_69
P23
VCC_70
N23
VCC_71
B B
M23
VCC_72
L23
VCC_73
AC22
VCC_74
AB22
VCC_75
Y22
VCC_76
W22
VCC_77
P22
VCC_78
N22
VCC_79
M22
VCC_80
L22
VCC_81
AC21
VCC_82
AA21
VCC_83
W21
VCC_84
N21
VCC_85
M21
VCC_86
L21
VCC_87
AC20
VCC_88
AB20
VCC_89
Y20
VCC_90
W20
VCC_91
P20
VCC_92
N20
VCC_93
M20
VCC_94
L20
VCC_95
AB19
VCC_96
AA19
VCC_97
Y19
VCC_98
N19
VCC_99
M19
VCC_100
L19
VCC_101
N18
A A
VCC_102
M18
VCC_103
L18
VCC_104
P17
VCC_105
N17
VCC_106
M17
VCC_107
N16
VCC_108
M16
VCC_109
L16
VCC_110
5
VCC
5
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
CALISTOGA_Q137
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
1 2
C97
0.47UF/16V
GND GND
1 2
C105
0.47UF/16V
GND
4
+VCCP_GMCH
AD27
AC27
R1.1_NO27
1 2
+
/X
1 2
+
1 2
1 2
1 2
1 2
VCC(GMCH Core)
1 2
1 2
AB27
AA27
W27
AD26
AC26
AB26
AA26
W26
AD25
AC25
AB25
AA25
W25
AD24
AC24
AB24
AA24
W24
AD23
AD22
AD21
AD20
AD19
AD18
AC18
AB18
AA18
W18
Y27
V27
U27
T27
R27
Y26
V26
U26
T26
R26
Y25
V25
U25
T25
R25
Y24
V24
U24
T24
R24
V23
U23
T23
R23
V22
U22
T22
R22
V21
U21
T21
R21
V20
U20
T20
R20
V19
U19
T19
Y18
V18
U18
T18
1 2
C98
0.47UF/16V
GND
+VCCP_GMCH
CE15
100UF/2.5V
CE16
100UF/2.5V
C99
10UF/10V
C100
10UF/10V
C101
1UF/10V
C102
0.22UF/6.3V
C103
0.22UF/6.3V
C104
0.22UF/6.3V
Place in cavity
+1.8V
1 2
C110
0.47UF/16V
4
1 2
1 2
GND GND
C107
0.47UF/16V
C108
10UF/10V
U4G
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
CALISTOGA_Q137
1 2
C109
10UF/10V
+1.8V
1 2
+
CE51
100UF/2.5V
/X
GND GND
3
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
1 2
+
CE52
100UF/2.5V
/X
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
1 2
+
CE53
100UF/2.5V
NCTF
GND
Should be placed near BA15
1 2
C106
0.47UF/16V
3
R1.1_NO30
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
+1.5VS
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
GND
GND
AV10
AP10
AL10
AJ10
AG10
AC10
W10
AW9
AW3
D11
B11
U10
BA9
AR9
AH9
AB9
AG8
AD8
AA8
BA7
AV7
AP7
AL7
AH7
AF7
AC7
AG6
AD6
AB6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AY3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
AT2
AR2
AP2
AK2
AD2
AB2
AL1
J11
Y9
R9
G9
E9
A9
U8
K8
C8
AJ7
R7
G7
D7
Y6
U6
N6
K6
H6
B6
AJ4
Y4
U4
R4
C4
G3
AJ2
Y2
U2
N2
H2
C2
U4J
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
J4
VSS_331
F4
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
T2
VSS_354
VSS_355
J2
VSS_356
VSS_357
F2
VSS_358
VSS_359
VSS_360
CALISTOGA_Q137
+1.5VS
+1.8V
+VCCP_GMCH
VSS
2
+1.5VS 3,9,20,26,36,52
+1.8V 7,14,15,16,36,53
+VCCP_GMCH 9
2
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
GND
AK34
AG34
AF34
AE34
AC34
AW33
AV33
AR33
AE33
AB33
M33
G33
AH32
AG32
AF32
AE32
AC32
AB32
G32
AY31
AV31
AN31
AJ31
AG31
AB31
AB30
AT29
AN29
AB29
G29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
AP27
AM27
AK27
G27
AN26
M26
AK25
BA24
AU24
AL24
AW23
C34
Y33
V33
T33
R33
H33
F33
D33
B33
B32
Y31
E30
T29
N29
K29
E29
C29
B29
A29
J28
E28
J27
F27
C27
B27
K26
F26
D26
P25
K25
H25
E25
D25
A25
U4I
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
CALISTOGA_Q137
VSS
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
GND
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
Z62Fp
Wednesday, August 23, 2006
Engineer:
1
Clistoga GND (5)
Vincent VY Huang
1
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
GND
Rev
1.0
69 10
5
4
3
2
1
CFG5 : DMI X2 Select
MCH_CFG_5 7
LOW = DMI X 2
HIGH = DMI X 4 (Default)
R121
GND
1 2
2.2KOhm
/X
D D
CFG7 : CPU STRAP
MCH_CFG_7 7
C C
B B
MCH_CFG_9 7
MCH_CFG_11 7
LOW = Reserved
HIGH = Mobility CPU (Default)
R123
2.2KOhm
/X
1 2
GND
CFG9 : PCIE GRAPHIC LANE
LOW = REVERSE LANES
R127
HIGH = NORMAL OPERATION (Default)
2.2KOhm
/X
1 2
GND
CFG11 : Reserved but need to be pull lo w
R125
2.2KOhm
/X
1 2
GND
MCH_CFG_16 7
R124
2.2KOhm
/X
1 2
GND
+3VS
R1.1_NO6
R126
1KOhm
/X
MCH_CFG_18 7
MCH_CFG_19 7
1 2
+3VS
1 2
R129
1KOhm
/X
CFG16 : FSB DYNAMIC ODT
LOW = Dynamic ODT Disabled
HIGH = Dynamic ODT Enabled (Default)
CFG18 : GMCH Core Voltage Level
LOW = 1.05V (Default)
HIGH = 1.5V
CFG19 : DMI LANE REVERSAL
LOW = NORMAL
HIGH = LANES REVERSED
CFG
2:0
4:3
5
6
7
8
9
11:10
13:12
15:14
16
17
SDVO_C
TRLDATA
18
19
20
CFG[17..3] have internal pullup r es i st o rs .
CFG[19..18] have internal pulldown resi s to r s.
SDVOCRTL_DATA has internal pulldown
resistors.
All are sampled with respect to the
leading edge of the GMCH PWROK
FSB Freq select
DMI X 2 Select
CPU Strap
PCIE Graphics
Lane Reversal
XOR/ALLZ
FSB Dynamic ODT
SDVO Present
VCC select
DMI Lane
Reversal
SDVO/PCIE
concurrent
001 = FSB533
011 = FSB667
0 = DMI X 2
1 = DMI X 4 (Default)
0 = Reserved
1 = Mobile CPU (Default)
0 = Reverse Lanes
1 = Normal (Default)
00 = Partial Clock Gating Disable
01 = XOR Mode Enabled
10 = All-Z Mode Enabled
11 = Normal operation (Default)
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default)
0 = No SDVO Card Present (Default)
1 = SDVO Card Present
0 = 1.05V (Default)
1 = 1.5V
0 = Normal (Default)
1 = Reverse Lanes
0 = Only SDVO or PCIE x1 is
operational(Default)
1 = SDVO and PCIE x1 are operating
simultaneously via the PEG port
A A
5
4
+2.5VS
3
+2.5VS 9,13,36,54
Calistoga Strapping
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
2
Date: Sheet
Z62Fp
Engineer:
Vincent VY Huang
1
Rev
11 69 Wednesday, August 23, 2006
1.0
of
5
4
3
2
1
L1204
/USB
+3VS
+5V_USB35 +5V
1 2
+
GND
Title :
Engineer:
1
PANEL_ID1
R1201
1 2
10KOhm
PANEL_ID0
R1202
1 2
10KOhm
C1204
0.1UF/10V
1 2
/USB
CE1200
47UF/6.3V
/USB
LVDS & INVERTER
Vincent VY Huang
12 69 Wednesday, August 23, 2006
of
GND
Rev
1.0
3V-3.6V
Full Active: 410 mA(Max. 500 mA)
3-3.6V
S0-S1M:410 mA(500 mA Max.)
1 2
C755
0.1UF/10V
L59
80Ohm/100Mhz
C757
0.1UF/10V
1
2
D54
RB717F
L1202
120Ohm/100Mhz
+3VS
1 2
C754
0.01UF/10V
GND
2 1
1 2
1 2
C758
C759
10UF/10V
1UF/10V
USB_PN6_B 18
USB_PP6_B 18
+3VS +3VA AC_BAT_SYS
3
3
/X
2 1
INTMIC_A_GND_CON
2 1
INTMIC_A_CON
2 1
1 2
C1202
1000PF/50V
1000PF/50V
Inverter Board
built in 14.1W
LCD Backlight Control
D D
LCD Power
+3VS
R810
100KOhm
1 2
3 2
3
D
Q68
1
L_VDDEN 7
C C
1
G
R812
100KOhm
1 2
GND GND
S
2
2N7002
+12VS
3
1
1
G
2
GND
INVERTER Interface
BIOS
LCD_BACKOFF#:When user push
"Fn+F7" button, BIOS active this
pin to turn off back light.
B B
BIOS
BACK_ADJ: KBC
output D/A
A A
signal ( adjust
voltage level)
to adjust Back
light.
SI3865: US$0.22
tune charge/discharge time
1 2
R811
10KOhm
R1022
1 2
100KOhm
LCD_BACKOFF# 28
1 2
GND
LID_SW#
10PF/50V
1 2
/X
C756
1UF/25V
+3VA
C762
PCI_RST# 18,24,25,26,30,33
L_BKLTEN 7
LID_SW# 28,39
120Ohm/100Mhz
120Ohm/100Mhz
INTMIC_A 23
Magnatic Switch
For LID_SW# On/OFF
1 2
/X
3 2
D
S
Q69
2N7002
L_BKLTCTL 7
BRIGHT_PWM 28
1
2
3
C1200
0.1UF/10V
L64
L107
Q67
D
G
SI3456BDV
U1200
1
VDD
2
OUTPUT
A3212ELHLT
R1.1
2 1
2 1
1000PF/50V
S
GND
1 2
6
5
+3VSLCD
4
3
C1201
GND_AUDIO
1 2
GND
D53
RB717F
1
2
L1200 120Ohm/100Mhz
L1201 120Ohm/100Mhz
LCD Panel
5
4
3
Cable Requirement:
Impedence: 100 ohm +/- 10%
Length Mismatch <= 10 mils
Twisted Pair(Not Ribbon)
Maximum Length <= 16"
+3.3VS_LCD
1 2
C760
0.1UF/10V
GND
1 2
R813
10KOhm
L62
120Ohm/100Mhz
2 1
1 2
1 2
C765
C763
0.1UF/25V
L60
80Ohm/100Mhz
2 1
1 2
C764
1UF/25V
Z62FP_NO4
3 4
1 2
1 2
C766
1000PF/50V
LVDS_L0N 7
LVDS_L0P 7
LVDS_L1N 7
LVDS_L1P 7
LVDS_L2N 7
LVDS_L2P 7
0OHM
0OHM
LVDS_LCLKN 7
LVDS_LCLKP 7
EDID_CLK 7
EDID_DAT 7
+3.3VS_LCD
RN1200B
RN1200A
L61
80Ohm/100Mhz
2 1
AC_INV
1 2
C767
0.1UF/10V
LCD LVDS Interface
31 32
SIDE1 SIDE2
11
13
15
17
19
21
23
25
27
29
CON25
BTOB_CON_30P
LP6-_B
LP6+_B
1 2
D1201
EGA10603V05A1
/X
1
1
3
3
5
5
7
7
9
9
11
13
15
17
19
21
23
25
27
29
ESD Guard
Close to
USB Port
LP6-_B
LP6+_B
ASUSTeK COMPUTER INC
Date: Sheet
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
1 2
C761
0.1UF/10V
30
12G17001030B
GND
GND GND
1 2
D1200
EGA10603V05A1
/X
GND
CON26
WTOB_CON_20P
21 22
GND1 GND2
1 2
1 2
3 4
3 4
5 6
5 6
7 8
7 8
9 10
9 10
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
12G17001020A
700Vrms@5 mArms
(Min. 3 mArms)6
mArms(Max. 6.5
mArms)
2
+3.3VS_LCD
+5V_USB35
Size Project Name
Custom
LVDS_U1N 7
LVDS_U1P 7
LVDS_U0N 7
LVDS_U0P 7
LVDS_U2N 7
LVDS_U2P 7
LVDS_UCLKN 7
LVDS_UCLKP 7
PANEL_ID1 25
PANEL_ID0 25
PANEL ID1 = 1 : WXGA+ 1440x900
PANEL ID1 = 0 : WXGA 1280x800
PANEL ID0 RESERVE FOR VENDOR
80Ohm/100Mhz
2 1
Z62Fp
5
4
3
2
1
checklist suggests 47ohm/100MHz
GND
GND
1 2
C125
10PF/50V
1 2
C127
10PF/50V
1 2
C135
10PF/50V
120Ohm/100Mhz
L15
120Ohm/100Mhz
L18
120Ohm/100Mhz
L20
R143
1 2
R144
1 2
R145
1 2
R146
1 2
CRT_R_CON
2 1
1 2
C126
22PF/25V
GND
CRT_G_CON
2 1
1 2
C128
22PF/25V
GND GND
CRT_B_CON
2 1
1 2
C136
22PF/25V
GND
0Ohm
0Ohm
0Ohm
0Ohm
HSYNC_CON
C137
47PF/50V
/X
1 2
GND
VSYNC_CON
C138
47PF/50V
/X
1 2
GND
DDC_DAT_CON
C139
47PF/50V
1 2
GND
DDC_CLK_CON
C140
47PF/50V
1 2
GND
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet
TV OUT CRT OUT
checklist suggests
D D
TV_DACA_OUT 7
TV_DACB_OUT 7
TV_DACC_OUT 7
C C
B B
DAC_VSYNC_GM 7
DAC_HSYNC_GM 7
DAC_R_PB 38
DAC_G_PB 38
DAC_B_PB 38
A A
DDC2BD_5 38
DDC2BC_5 38
HSYNC_PB 38
VSYNC_PB 38
DAC_R_PB
DAC_G_PB
DAC_B_PB
DDC2BD_5
DDC2BC_5
HSYNC_PB
CRT_VSYNC
1 2
1 2
R140
R139
150Ohm
150Ohm
Place Terminator
close to
Connector
1
2
3 4
1
2
3 4
1 2
R1010 39Ohm
1 2
GND
U98
74LVC1G32GV
B
A
GND
B
A
GND
U99
74LVC1G32GV
TV_DACA_OUT TV_CVBS_CON
TV_DACB_OUT
TV_DACC_OUT
1 2
R141
C129
150Ohm
5.6PF/50V
5
VCC
Y
5
VCC
Y
HSYNC_PBS
To PortBar III
5
150ohm/100MHz & 6pF
120Ohm/100Mhz
1 2
C130
5.6PF/50V
+12VS
L16
L17
L19
2 1
120Ohm/100Mhz
2 1
120Ohm/100Mhz
2 1
+3VS
+3VS
+3VS
1 2
C132
5.6PF/50V
GND
GND
GND
1 2
C131
5.6PF/50V
GND GND GND
2
1
2
1
2
1
1 2
5.6PF/50V
D7
BAV99
/X
D9
BAV99
/X
D11
BAV99
/X
TV_C_CON
C133
PLACE ESD
Diodes near
R2.0_NO10
+3VS
+3VS
PR_IN# 38
CRT_RED 7
CRT_GREEN 7
TV port
Q204B
5
UM6K1N
3 4
2
6 1
Q204A
UM6K1N
PR_IN#
DAC_R_PB
CRT_RED_L HSYNC_PBS
DAC_G_PB
CRT_GREEN_L DAC_B_PB
4
1 2
R1264 39Ohm
R1265 0Ohm
U80
1
IN
2
S1A
3
S2A
4
DA
5
S1B
6
S2B
7
DB
8
GND
PI5V330SWE
IN : 0 = S1
: 1 = S2
TV_Y_CON
1 2
C134
5.6PF/50V
TV_DACA_OUT
3
TV_DACB_OUT
3
TV_DACC_OUT
3
1 2
16
VCC
15
EN#
14
S1D
13
S2D
12
DD
11
S1C
10
S2C
9
DC
+2.5VS
+2.5VS
+2.5VS
CRT_VSYNC
CRT_HSYNC
+5VSUS
HSYNC_CRTS
CRT_HSYNC
CRT_BLUE_L
+5VS
CON5
1
1
P_GND1
4
4
2
2
5
5
7
7
6
6
3
3
P_GND2
MINI_DIN_7P
12G14101107D
D8
2
1
BAV99
/X
GND
D10
2
1
BAV99
GND
/X
D12
2
1
BAV99
/X
GND
PLACE ESD
Diodes near
VGA port
R2.0_NO1
R1013 39Ohm
1 2
CRT_BLUE 7
D1300
1 2
1N4148W
8
9
GND
CRT_RED_L
3
CRT_GREEN_L
3
CRT_BLUE_L
3
HSYNC_CRT
+5VS_CRT
3
CRT_DDC_DATA 7
for Full
turn on
CRT_DDC_CLK 7
+5VS_CRT
+3VS
CRT_RED_L
CRT_GREEN_L
CRT_BLUE_L
+3VS
R147 6.8KOhm
1 2
R148 6.8KOhm
1 2
R149 2.2KOhm
1 2
R150 2.2KOhm
1 2
R137
150Ohm
1 2
R138
150Ohm
1 2
R142
150Ohm
1 2
Q203A
UM6K1N
6 1
2
5
3 4
Q203B
UM6K1N
CRT_DDC_DATA
CRT_DDC_CLK
HSYNC_CRT
CRT_VSYNC
DDC2BD_5
DDC2BC_5
DDC2BD_5
DDC2BC_5
2
13
14
12
15
D_SUB_15P
Z62Fp
CON4
1
RED
2
GREEN
3
BLUE
HSYNC
VSYNC
DATA
DCLK
12G101102152
Title :
Engineer:
CRT
GND5
10
1
SIDE_G16
SIDE_G17
GND4
7
8
GND3
6
GND
15
PIN
1
GND2
5
GND1
9
VCC
4
NC1
11
NC2
16
17
CRT & TV OUT
Vincent VY Huang
13 69 Wednesday, August 23, 2006
of
Rev
1.0
5
D D
C C
B B
SMBus
address A2h
4
NO STUFF *
M_CLK_DDR3
PLACE NEAR SO-DIMM_0
M_CLK_DDR#3
M_CLK_DDR2
PLACE NEAR SO-DIMM_0
M_CLK_DDR#2
+3VS
GND
M_CLK_DDR#2 7
M_CLK_DDR#3 7
R1.1_NO33
3
M_B_A[0..13] 8,16
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_BS#2 8,16
M_B_BS#0 8,16
M_B_BS#1 8,16
M_CS#2 7,16
M_CS#3 7,16
M_CLK_DDR2 7
M_CLK_DDR3 7
M_CKE2 7,16
M_CKE3 7,16
M_B_CAS# 8,16
M_B_RAS# 8,16
M_B_WE# 8,16
SMB_CLK_S 5,15,19,24,26
SMB_DAT_S 5,15,19,24,26
M_ODT2 7,16
M_ODT3 7,16
For
Data
Swap
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
M_B_DQS7
M_B_DQS6
M_B_DQS5
M_B_DQS4
M_B_DQS3
M_B_DQS2
M_B_DQS1
M_B_DQS0
M_B_DQS#7
M_B_DQS#6
M_B_DQS#5
M_B_DQS#4
M_B_DQS#3
M_B_DQS#2
M_B_DQS#1
M_B_DQS#0
12G025122007
U5A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR_DIMM_200P_A
M_B_DQS[0..7] 8
M_B_DQS#[0..7] 8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DM[0..7] 8
M_B_DQ58
5
M_B_DQ63
7
M_B_DQ56
17
M_B_DQ60
19
M_B_DQ62
4
M_B_DQ61
6
M_B_DQ57
14
M_B_DQ59
16
M_B_DQ50
23
M_B_DQ55
25
M_B_DQ49
35
M_B_DQ53
37
M_B_DQ51
20
M_B_DQ54
22
M_B_DQ52
36
M_B_DQ48
38
M_B_DQ43
43
M_B_DQ41
45
M_B_DQ40
55
M_B_DQ46
57
M_B_DQ42
44
M_B_DQ47
46
M_B_DQ45
56
M_B_DQ44
58
M_B_DQ34
61
M_B_DQ38
63
M_B_DQ32
73
M_B_DQ36
75
M_B_DQ35
62
M_B_DQ39
64
M_B_DQ37
74
M_B_DQ33
76
M_B_DQ27
123
M_B_DQ30
125
M_B_DQ28
135
M_B_DQ29
137
M_B_DQ31
124
M_B_DQ26
126
M_B_DQ25
134
M_B_DQ24
136
M_B_DQ18
141
M_B_DQ19
143
M_B_DQ20
151
M_B_DQ16
153
M_B_DQ22
140
M_B_DQ23
142
M_B_DQ21
152
M_B_DQ17
154
M_B_DQ9
157
M_B_DQ15
159
M_B_DQ10
173
M_B_DQ8
175
M_B_DQ14
158
M_B_DQ11
160
M_B_DQ13
174
M_B_DQ12
176
M_B_DQ6
179
M_B_DQ7
181
M_B_DQ4
189
M_B_DQ1
191
M_B_DQ2
180
M_B_DQ3
182
M_B_DQ5
192
M_B_DQ0
194
Group7
Group6
Group5
Group4
Group3
VREF -> 10/10 mils
M_VREF_DIMM1
Group2
Group1
Group0
2
M_VREF_DIMM1
+1.8V
+3VS
+3VS
M_VREF_DIMM1 7,15,16
+1.8V 7,10,15,16,36,53
+3VS 4,5,7,9,11,12,13,15,19,20,21,22,24,25,26,27,28,30,36,39,50,52,60,61
M_B_DQ[0..63] 8
+1.8V
112
111
117
96
95
118
81
82
87
103
88
104
199
83
120
50
69
163
1
201
202
203
204
47
133
183
77
12
48
184
78
71
72
121
122
196
193
8
GND
GND
1 2
C143
2.2UF/6.3V
1 2
C145
2.2UF/6.3V
GND
GND
1 2
C144
0.1UF/10V
1 2
C146
0.1UF/10V
GND
Layout Note: Place these Caps near SO DIMM 1
1
U5B
VDD1
VSS16
VDD2
VSS17
VDD3
VSS18
VDD4
VSS19
VDD5
VSS20
VDD6
VSS21
VDD7
VSS22
VDD8
VSS23
VDD9
VSS24
VDD10
VSS25
VDD11
VSS26
VDD12
VSS27
VSS28
VDDSPD
VSS29
VSS30
NC1
VSS31
NC2
VSS32
NC3
VSS33
NC4
VSS34
NCTEST
VSS35
VSS36
VREF
VSS37
VSS38
GND0
VSS39
GND1
VSS40
VSS41
VSS42
NP_NC1
VSS43
NP_NC2
VSS44
VSS1
VSS45
VSS2
VSS46
VSS3
VSS47
VSS4
VSS48
VSS5
VSS49
VSS6
VSS50
VSS7
VSS51
VSS8
VSS52
VSS9
VSS53
VSS10
VSS54
VSS11
VSS55
VSS12
VSS56
VSS13
VSS57
VSS14
VSS15
DDR_DIMM_200P_A
12G025122007
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
GND
Layout Note: Place these High-Freq decoupling Caps near the GMCH
Layout Note: Place these Caps near SO DIMM 1
+1.8V
C151
0.1UF/10V
1 2
C156
2.2UF/6.3V
1 2
C152
0.1UF/10V
GND
1 2
C157
2.2UF/6.3V
GND
1 2
C153
0.1UF/10V
GND GND
1 2
C158
2.2UF/6.3V
1 2
C154
0.1UF/10V
2
GND
1 2
C159
2.2UF/6.3V
1 2
1 2
C155
2.2UF/6.3V
GND
GND GND
A A
5
4
Layout Note: Place these resistors near the GMCH
+1.8V
GND
3
+1.8V
1 2
C149
0.1UF/10V
GND GND GND
1 2
C150
0.1UF/10V
1 2
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet
Z62Fp
Engineer:
1
1 2
C147
C148
0.1UF/10V
0.1UF/10V
GND
DDR2_SO-DIMM(1)
Vincent VY Huang
of
14 69 Wednesday, August 23, 2006
Rev
1.0
5
4
3
2
1
M_A_A[0..13] 8,16
M_A_DM[0..7] 8
M_A_DQS[0..7] 8
M_A_DQS#[0..7] 8
D D
C C
SMBus
address A0h
GND
GND
B B
NO STUFF *
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 7
M_CLK_DDR#1 7
M_CLK_DDR0 7
M_CLK_DDR#0 7
R1.1_NO33
PLACE NEAR SO-DIMM_1
PLACE NEAR SO-DIMM_1
M_A_BS#2 8,16
M_A_BS#0 8,16
M_A_BS#1 8,16
M_CS#0 7,16
M_CS#1 7,16
M_CKE0 7,16
M_CKE1 7,16
M_A_CAS# 8,16
M_A_RAS# 8,16
M_A_WE# 8,16
SMB_CLK_S 5,14,19,24,26
SMB_DAT_S 5,14,19,24,26
M_ODT0 7,16
M_ODT1 7,16
For
Data
Swap
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
M_A_DQS7
M_A_DQS6
M_A_DQS5
M_A_DQS4
M_A_DQS3
M_A_DQS2
M_A_DQS1
M_A_DQS0
M_A_DQS#7
M_A_DQS#6
M_A_DQS#5
M_A_DQS#4
M_A_DQS#3
M_A_DQS#2
M_A_DQS#1
M_A_DQS#0
M_A_DQ[0..63] 8
U8A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR_DIMM_200P
12G025C22000
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
+1.8V
+3VS
M_VREF_DIMM0
M_A_DQ63
5
M_A_DQ59
7
M_A_DQ57
17
M_A_DQ60
19
M_A_DQ58
4
M_A_DQ62
6
M_A_DQ61
14
M_A_DQ56
16
M_A_DQ55
23
M_A_DQ51
25
M_A_DQ52
35
M_A_DQ53
37
M_A_DQ54
20
M_A_DQ50
22
M_A_DQ49
36
M_A_DQ48
38
M_A_DQ43
43
M_A_DQ41
45
M_A_DQ42
55
M_A_DQ40
57
M_A_DQ46
44
M_A_DQ47
46
M_A_DQ44
56
M_A_DQ45
58
M_A_DQ32
61
M_A_DQ35
63
M_A_DQ36
73
M_A_DQ37
75
M_A_DQ39
62
M_A_DQ38
64
M_A_DQ33
74
M_A_DQ34
76
M_A_DQ31
123
M_A_DQ26
125
M_A_DQ24
135
M_A_DQ25
137
M_A_DQ27
124
M_A_DQ30
126
M_A_DQ29
134
M_A_DQ28
136
M_A_DQ22
141
M_A_DQ19
143
M_A_DQ21
151
M_A_DQ20
153
M_A_DQ18
140
M_A_DQ23
142
M_A_DQ16
152
M_A_DQ17
154
M_A_DQ11
157
M_A_DQ9
159
M_A_DQ14
173
M_A_DQ8
175
M_A_DQ10
158
M_A_DQ15
160
M_A_DQ12
174
M_A_DQ13
176
M_A_DQ2
179
M_A_DQ3
181
M_A_DQ5
189
M_A_DQ1
191
M_A_DQ7
180
M_A_DQ6
182
M_A_DQ4
192
M_A_DQ0
194
Group7
Group6
Group5
Group4
Group3
Group2
Group1
Group0
+3VS
VREF -> 10/10 mils
M_VREF_DIMM0
+1.8V 7,10,14,16,36,53
+3VS 4,5,7,9,11,12,13,14,19,20,21,22,24,25,26,27,28,30,36,39,50,52,60,61
M_VREF_DIMM0 7,14,16
+1.8V
112
111
117
96
95
118
81
82
87
103
88
104
1 2
C209
2.2UF/6.3V
GND GND
1 2
C211
2.2UF/6.3V
GND
GND
1 2
C210
0.1UF/10V
1 2
C212
0.1UF/10V
GND
199
83
120
50
69
163
1
201
202
203
204
47
133
183
77
12
48
184
78
71
72
121
122
196
193
8
Layout Note: Place these Caps near SO DIMM 0
+1.8V
Layout Note: Place these Caps near SO DIMM 0
+1.8V
1 2
C217
2.2UF/6.3V
GND
1 2
C213
0.1UF/10V
1 2
C218
2.2UF/6.3V
1 2
U8B
VDD1
VSS16
VDD2
VSS17
VDD3
VSS18
VDD4
VSS19
VDD5
VSS20
VDD6
VSS21
VDD7
VSS22
VDD8
VSS23
VDD9
VSS24
VDD10
VSS25
VDD11
VSS26
VDD12
VSS27
VSS28
VDDSPD
VSS29
VSS30
NC1
VSS31
NC2
VSS32
NC3
VSS33
NC4
VSS34
NCTEST
VSS35
VSS36
VREF
VSS37
VSS38
GND0
VSS39
GND1
VSS40
VSS41
VSS42
NP_NC1
VSS43
NP_NC2
VSS44
VSS1
VSS45
VSS2
VSS46
VSS3
VSS47
VSS4
VSS48
VSS5
VSS49
VSS6
VSS50
VSS7
VSS51
VSS8
VSS52
VSS9
VSS53
VSS10
VSS54
VSS11
VSS55
VSS12
VSS56
VSS13
VSS57
VSS14
VSS15
DDR_DIMM_200P
12G025C22000
1 2
C215
C214
0.1UF/10V
0.1UF/10V
GND
1 2
C219
2.2UF/6.3V
GND GND
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
1 2
C216
0.1UF/10V
1 2
C220
2.2UF/6.3V
GND
1 2
C221
2.2UF/6.3V
GMCH=====>SODIMM1=>SODIMM0
A A
GND
GND
GND
GND
GND
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
5
4
3
2
Date: Sheet
Z62Fp
Engineer:
DDR2 SO-DIMM(0)
Vincent VY Huang
15 69 Wednesday, August 23, 2006
1
Rev
1.0
of
5
4
3
2
1
M_VREF_DIMM0
M_VREF_DIMM1
M_VREF_MCH
+0.9VS
D D
0.01UF/50V
+0.9VS
C C
1 2
C222
0.1UF/10V
GND
C1601
1 2
1 2
C223
0.1UF/10V
+1.8V
R1600
10KOhm
1 2
R1601
10KOhm
1 2
1 2
C224
0.1UF/10V
+5V
1 2
5 2
U1600
V+
1
+
3
V-
LMV321IDBVR
R1602 0Ohm
1 2
1 2
1 2
C225
C226
0.1UF/10V
0.1UF/10V
C1600
0.1UF/10V
4
/X
1 2
C227
0.1UF/10V
/X
1 2
C228
0.1UF/10V
M_VREF_DIMM0 7,14,15
M_VREF_DIMM1 7,14,15
M_VREF_MCH 7,14,15
+0.9VS 36,53
1 2
C1602
1UF/10V
1 2
1 2
C229
0.1UF/10V
C230
0.1UF/10V
1 2
C231
0.1UF/10V
R1.1_NO23
Z62FP_NO7
M_VREF_DIMM1
M_VREF_MCH
M_VREF_DIMM0
1 2
C232
0.1UF/10V
1 2
C233
0.1UF/10V
1 2
C234
0.1UF/10V
M_A_A[0..13] 8,15
M_A_BS#[0..2] 8,15
M_A_CAS# 8,15
M_A_RAS# 8,15
M_A_WE# 8,15
M_B_A[0..13] 8,14
M_B_BS#[0..2] 8,14
M_B_CAS# 8,14
M_B_RAS# 8,14
M_B_WE# 8,14
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
+0.9VS
1 2
C237
0.1UF/10V
1 2
C238
0.1UF/10V
1 2
C239
0.1UF/10V
1 2
C240
0.1UF/10V
1 2
C241
0.1UF/10V
1 2
C242
0.1UF/10V
1 2
C243
0.1UF/10V
1 2
1 2
B B
GND
C235
0.1UF/10V
C236
0.1UF/10V
1 2
C244
0.1UF/10V
1 2
C245
0.1UF/10V
1 2
C246
0.1UF/10V
1 2
C247
0.1UF/10V
M_CS#[0..3] 7,14,15
M_ODT[0..3] 7,14,15
M_CKE[0..3] 7,14,15
+0.9VS
NEED TO SWAP
56Ohm
56Ohm
56Ohm
56Ohm
RN7A
RN7B
RN7C
RN7D
RN7E
RN7F
RN7G
RN7H
RN8A
RN8B
RN8C
RN8D
RN8E
RN8F
RN8G
RN8H
RN9A
RN9B
RN9C
RN9D
RN9E
RN9F
RN9G
RN9H
RN14A
RN14B
RN14C
RN14D
RN10A
RN10B
RN10C
RN10D
RN10E
RN10F
RN10G
RN10H
RN11A
RN11B
RN11C
RN11D
RN11E
RN11F
RN11G
RN11H
RN12A
RN12B
RN12C
RN12D
RN12E
RN12F
RN12G
RN12H
1 16
56Ohm
2 15
56Ohm
3 14
56Ohm
4 13
56Ohm
5 12
56Ohm
6 11
56Ohm
7 10
56Ohm
8 9
56Ohm
1 16
56Ohm
2 15
56Ohm
3 14
56Ohm
4 13
56Ohm
5 12
56Ohm
6 11
56Ohm
7 10
56Ohm
8 9
56Ohm
1 16
56Ohm
2 15
56Ohm
3 14
56Ohm
4 13
56Ohm
5 12
56Ohm
6 11
56Ohm
7 10
56Ohm
8 9
56Ohm
1 2
3 4
5 6
7 8
1 16
56Ohm
2 15
56Ohm
3 14
56Ohm
4 13
56Ohm
5 12
56Ohm
6 11
56Ohm
7 10
56Ohm
8 9
56Ohm
1 16
56Ohm
2 15
56Ohm
3 14
56Ohm
4 13
56Ohm
5 12
56Ohm
6 11
56Ohm
7 10
56Ohm
8 9
56Ohm
1 16
56Ohm
2 15
56Ohm
3 14
56Ohm
4 13
56Ohm
5 12
56Ohm
6 11
56Ohm
7 10
56Ohm
8 9
56Ohm
M_B_A10
M_B_A3
M_B_A8
M_B_A12
M_B_BS#2
M_B_A9
M_CKE2
M_CKE3
M_B_BS#1
M_B_A1
M_B_A0
M_B_A2
M_B_A4
M_B_A6
M_B_A7
M_B_A11
M_B_CAS#
M_B_WE#
M_B_A5
M_B_BS#0
M_B_A13
M_ODT2
M_CS#2
M_B_RAS#
M_ODT3
M_CS#3
M_CKE0
M_A_BS#2
M_A_A12
M_A_A9
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_A2
M_A_A0
M_A_A6
M_A_A7
M_A_A4
M_A_A11
M_A_RAS#
M_A_BS#1
M_A_A13
M_A_A10
M_A_BS#0
M_A_WE#
M_A_CAS#
M_CS#1
1 2
3 4
5 6
7 8
A A
5
4
3
2
RN13A
56Ohm
RN13B
56Ohm
RN13C
56Ohm
RN13D
56Ohm
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet
M_ODT1
M_CKE1
M_CS#0
M_ODT0
Z62Fp
Title :
Engineer:
1
DDR2 TERM
Vincent VY Huang
16 69 Wednesday, August 23, 2006
Rev
1.0
of
5
C203 12PF/50V
1 2
D D
C205 12PF/50V
1 2
GND
+VCC_RTC
R207
C C
ACZ_BCLK_AUD 21
ACZ_BCLK_MDC 24
ACZ_SYNC_AUD 21
ACZ_SYNC_MDC 24
ACZ_RST#_AUD 21
ACZ_RST#_MDC 24
B B
ACZ_SDOUT_AUD 21
ACZ_SDOUT_MDC 24
+VCC_RTC
+VCCP_ICH
+1.5VS_PCIE_ICH
+3VA
+3VS
A A
+5VS
+1.5VS
+VCCP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
5
39Ohm
R208
39Ohm
R209
39Ohm
R211
39Ohm
R213
39Ohm
R215
39Ohm
R217
39Ohm
R219
ACZ_SDOUT
39Ohm
+VCC_RTC 20
+VCCP_ICH 2,3,5,6,9,20,52
+1.5VS_PCIE_ICH 18,20
+3VA 4,12,20,22,24,25,28,29,39,54,59,63
+3VS 4,5,7,9,11,12,13,14,15,19,20,21,22,24,25,26,27,28,30,36,39,50,52,60,61
+5VS 4,13,19,20,21,22,27,36,37,38,50,61
+1.5VS 3,9,10,20,26,36,52
+VCCP 2,3,5,6,9,20,52
R200
180KOhm
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
4
R1.1_NO43
X2
32.768Khz
12
1 2
1 2
1 2
C206
0.1UF/10V
GND
IDE_PDIOR# 27
4
JRST1
12
SGL_JUMP
T80 TPC28T
GND
GND
GND
R199
10MOhm
1 2
RTC_X1
AB1
RTC_X2
AB2
1 2
T1700
1
PWROK rising
PWROK rising
AA3
AF18
AF3
AE3
AG2
AH2
AF7
AE7
AG6
AH6
AF1
AE1
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
W4
W1
W3
R201
1MOhm
+VCC_RTC
R214
1 2
0Ohm
R216
1 2
0Ohm
1 2
R202 10KOhm
EE_DOUT
1
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0 21
ACZ_SDIN1 24
ACZ_SDOUT
T82 TPC28T
1
T83 TPC28T
1
T84 TPC28T
1
T85 TPC28T
1
T86 TPC28T
1
R218
1 2
0Ohm
R220
1 2
0Ohm
R1700 0Ohm
IDE_PDIOW# 27
IDE_PDDACK# 27
INT_IRQ14 27
IDE_PIORDY 27
IDE_PDDREQ 27
1 2
ACZ_SDOUT PWROK rising
ACZ_SYNC PWROK rising PD
EE_CS PD
EE_DOUT
GNT2#
GNT5#/GPIO17#
GNT4#/GPIO48
3
U6A
RTCX1
RTCX2
RTCRST#
Y5
INTRUDER#
INTVRMEN
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT
EE_DIN
V3
LAN_CLK
U3
LAN_RSTSYNC
U5
LAN_RXD0
V4
LAN_RXD1
T5
LAN_RXD2
U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2
U1
ACZ_BCLK
R6
ACZ_SYNC
R5
ACZ_RST#
T2
ACZ_SDIN0
T3
ACZ_SDIN1
T1
ACZ_SDIN2
T4
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ICH7M
TP3 pull low: allow entrance to XOR Chain testing
TP3 not pull low: sets bit 1 of RPC.PC
sets bit 0 of RPC.PC
should not be pulled high
should not be pulled low
should not be pulled low
low: "top-block swap" mode
GNT5# GNT4#
0 1 SPI
1 0 PCI
1 1 LPC
RTC LAN
CPU LPC
GPIO49/CPUPWRGD
AC-97/AZALIA SATA
IDE
3
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME#
A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#
THERMTRIP#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
DCS1#
DCS3#
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
AH28
R204 0Ohm/X
AG27
R206 0Ohm
AF24
AH25
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
AF26
AB15
R1701 0Ohm
AE14
R1702 0Ohm
AG13
AF13
AD14
AC13
AD12
AC12
AE12
R1703 0Ohm
AF12
R1704 0Ohm
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
PD
PU
PU
PU GNT3#
PU
2
1 2
1 2
1 2
1 2
1 2
1 2
GPIO16
/DPRSLPVR
GPIO25
INTVRMEN
LINKALERT#
REQ[4:1]#
SATALED#
SPKR
TP3
2
LPC_AD0 24,25,28,41
LPC_AD1 24,25,28,41
LPC_AD2 24,25,28,41
LPC_AD3 24,25,28,41
LPC_DRQ#0 19,25
LPC_DRQ#1 24
LPC_FRAME# 24,25,28,41
A20GATE 28
H_A20M# 2
H_CPUSLP# 2
H_DPSLP# 2
H_IGNNE# 2
H_INIT# 2
H_INTR 2
RCIN# 28
H_NMI 2
H_SMI# 2
H_STPCLK# 2
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_PDA0 27
IDE_PDA1 27
IDE_PDA2 27
IDE_PDCS1# 27
IDE_PDCS3# 27
H_DPRSTP# 2,50
H_PWRGD 2
R212
24.9Ohm
RSMRST# rising
PWROK rising
PWROK rising
PWROK rising
1 2
ASUSTeK COMPUTER INC
Date: Sheet
+VCCP_ICH
R205
56Ohm
H_FERR# 2
24 ± 5% series termination
T81 TPC28T
1
+VCCP_ICH
56Ohm
should not be pulled high
should not be pulled low
high: Enable integrated VccSus1_05 VRM ALWAYS
REQUIRE an extenal pull-up R
should not be pulled low
high: "No reboot" mode
should not be pulled low unless
using XOR Chain testing
Size Project Name
Custom
resistor placed within 2" from
Intel 82801GBM, 56 ± 5%
pull-up resistor has to be
within 2" from the series
R210
resistor
PM_THRMTRIP# 2,4,7
IDE_PDD[15:0] 27
Z62Fp
1
Title :
Engineer:
1
PD
PU
Need
PU
Conditional
PU
PD
PU
ICH7-M (1/4)
Vincent VY Huang
17 69 Wednesday, August 23, 2006
Rev
1.0
of
5
4
3
2
1
1
1
1
1
1
E18
C18
A16
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
AE5
AD5
AG4
AH4
AD9
1 2
U6B
AD0
AD1
AD2
F18
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
F11
AD21
F10
AD22
E9
AD23
D9
AD24
B9
AD25
A8
AD26
A6
AD27
C7
AD28
B6
AD29
E6
AD30
D6
AD31
Interrupt I/F
A3
PIRQA#
B4
PIRQB#
C5
PIRQC#
B5
PIRQD#
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
ICH7M
USB_OC_0#
USB_OC_1#
USB_OC_2#
USB_OC_3#
USB_OC_4#
USB_OC_5#
USB_OC_6#
USB_OC_7#
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
PCI
R2
P6
P1
P5
P2
D3
C4
D5
D4
E5
C3
A2
B3
MISC
U6D
PERn1
PERp1
PETn1
PETp1
PERn2
PERp2
PETn2
PETp2
PERn3
PERp3
PETn3
PETp3
PERn4
PERp4
PETn4
PETp4
PERn5
PERp5
PETn5
PETp5
PERn6
PERp6
PETn6
PETp6
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
ICH7M
D7
REQ0#
E7
GNT0#
C16
REQ1#
D16
GNT1#
C17
REQ2#
D17
GNT2#
E13
REQ3#
F13
GNT3#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
RSVD_6
RSVD_7
RSVD_8
RSVD_9
A13
A14
C8
D8
B15
C12
D12
C15
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
C26
A9
B19
G8
F7
F8
G7
AE9
AG8
AH8
F21
AH20
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
MCH_SYNC#
PCI-Express SPI
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
USB
USBRBIAS#
3
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
DMI_CLKP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS
PCI_REQ#0 19
PCI_REQ#1 19,30
PCI_GNT#1 30
PCI_REQ#2 19,33
PCI_GNT#2 33
PCI_REQ#3 19
PCI_REQ#4 19
PCI_REQ#5 19
PCI_C/BE#0 30,33
PCI_C/BE#1 30,33
PCI_C/BE#2 30,33
PCI_C/BE#3 30,33
PCI_IRDY# 19,30,33
PCI_PAR 30,33
PCI_DEVSEL# 19,30,33
PCI_PERR# 19,30,33
PCI_LOCK# 19
PCI_SERR# 19,30,33
PCI_STOP# 19,30,33
PCI_TRDY# 19,30,33
PCI_FRAME# 19,30,33
CLK_ICHPCI 5
PME# 19,33
PCI_INTE# 19
PCI_INTF# 19
PCI_INTG# 19
PCI_INTH# 19
T50 TPC28T
1
T52 TPC28T
1
T54 TPC28T
1
T56 TPC28T
1
MCH_ICH_SYNC# 7
V26
V25
U28
U27
Y26
Y25
W28
W27
AB26
AB25
AA28
AA27
AD25
AD24
AC28
AC27
AE28
AE27
C25
D25
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
D1
USBRBIAS
1
1
PCI_GNT#4
PCI_RST#_ICH
PLT_RST#_SB
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
CLK_PCIE_ICH# 5
CLK_PCIE_ICH 5
R196
1 2
24.9Ohm
USB_PN0_B 35
USB_PP0_B 35
USB_PN1_B 35
USB_PP1_B 35
USB_PN2_B 35
USB_PP2_B 35
USB_PN3_B 35
USB_PP3_B 35
USB_PN4_B 38
USB_PP4_B 38
USB_PN5_B 26
USB_PP5_B 26
USB_PN6_B 12
USB_PP6_B 12
USB_PN7_B 26
USB_PP7_B 26
R197
1 2
22.6Ohm
T1800 TPC28T
T48 TPC28T
R193
1 2
1KOhm /X
R194
1 2
1KOhm /X
GND
GND
PLT_RST# 7,19,27,28
Do not connect to reset on
PCI slots or PCI down
devices.
+1.5VS_PCIE_ICH
2
11
LPC
PCI 0
10
01 SPI
SN74LV08APWR
Pull-ups must be placed
within 500 mils from
Intel 82801GBM pins
GNT#4
GNT#5
1
(default) 1
1
0
1
+3V
C194
0.1UF/10V
1 2
PCI_RST# 12,24,25,26,30,33
VCC
6
GND
3
+3V
U7B
14 7
4
5
1 2
C196
0.01UF/10V
/X
14 7
VCC
GND
SN74LV08APWR
U7A
1
2
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet
Z62Fp
Engineer:
1
PCI_RST#_ICH
R2.0_NO10
PLT_RST#_SB
ICH7-M (2/4)
Vincent VY Huang
of
18 69 Wednesday, August 23, 2006
Rev
1.0
PCI_AD[31:0] 30,33
D D
DEVICE
LAN
CARDBUS
C C
Internal
SM Bus INTB#
SATA INTB#
PATA
AC97
Modem
AC97
Audio
B B
A A
IDSEL REQ/GNT INT
INTA#
INTB#
INTA#
+3VSUS
AD23
AD17
RN5A
RN5B
RN5C
RN5D
RN6A
RN6B
RN6C
RN6D
REQ2#/GNT2#
REQ1#/GNT1#
EIP INTA#
INTD# U3P
INTC#
U2P
INTB#
U1P
INTA#
U0P
INTA#
Audio
1 2
10KOhm
3 4
10KOhm
5 6
10KOhm
7 8
10KOhm
1 2
10KOhm
3 4
10KOhm
5 6
10KOhm
7 8
10KOhm
5
PCIE6 INTB#
PCIE5
PCIE4
PCIE3
PCIE2
PCIE1
USB_OC_1#
USB_OC_6#
USB_OC_7#
USB_OC_2#
USB_OC_4#
USB_OC_0#
USB_OC_5#
USB_OC_3#
INT A#
INT B#,
INT C#,
INT D#
INTA#
INTD#
INTC#
INTB#
INTA# HD
PCI_INTA# 19,33
PCI_INTB# 19,30
PCI_INTC# 19,30
PCI_INTD# 19,30
T49 TPC28T
T51 TPC28T
T53 TPC28T
T55 TPC28T
T57 TPC28T
T562 TPC28T
T563 TPC28T
T564 TPC28T
T565 TPC28T
PCIE_RXN2_MINICARD 26
PCIE_RXP2_MINICARD 26
PCIE_TXN2_MINICARD 26
PCIE_TXP2_MINICARD 26
T58 TPC28T
T59 TPC28T
T60 TPC28T
T61 TPC28T
T62 TPC28T
T63 TPC28T
T64 TPC28T
T65 TPC28T
T66 TPC28T
T67 TPC28T
T68 TPC28T
T69 TPC28T
T70 TPC28T
T71 TPC28T
T72 TPC28T
T73 TPC28T
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11 PCI_GNT#5
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
1
1
1
1
1
1
1
1
1
C1800 0.1UF/10V
C1801 0.1UF/10V
1 2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T74 TPC28T
T75 TPC28T
T76 TPC28T
T77 TPC28T
T78 TPC28T
4
5
4
3
2
1
GPIO:
[0,6,7,16:23,32:39,48] - 3.3V core,
[1:5] - 5V core,
[8:15,24:31] - 3.3V resume,
[40:47] - N/A
[49] - V_CPU_IO
0 needs to check power plane again
D D
checklist
suggests
+3V
C C
B B
A A
+3VSUS
SB_WAKE# 26
INT_SERIRQ 24,25,28,30
PM_THERM# 28
EXTSMI# 28
+3VSUS
IMVPOK 39
R2.0_NO3
+3V
R156 10KOhm
BT_LED_EN# 37
R1903
1 2
1KOhm
SMB_CLK_S 5,14,15,24,26
SMB_DAT_S 5,14,15,24,26
PCB_VID 0 1 2
MB V1.0 0 0 0
5
SPKR_SB 21
1 2
PM_BMBUSY# 7
R157 10KOhm
1 2
PM_CLKRUN# 24,30,33
WLAN_ON# 26
R160 0Ohm
1 2
+3VSUS +3VSUS +3VSUS
PCB_ID0
PCB_ID1
PCB_ID2
For PCI compliance, SMBus signals should be routed to either all or none of the PCI slots in a chassis.
These signals should not be connected to SMLINK
SMB_CLK
SMB_DAT
LINKALERT#
SM_LINK0
SM_LINK1
RING#
SUS_STAT#
STP_PCI# 5
STP_CPU# 5,50
T42 TPC28T
BT_ON 26
R182
8.2KOhm
/X
1 2
R190
8.2KOhm
1 2
PCB_ID2
1
VRMPWRGD
T46 TPC28T
RF_OFF_SW#
+5VS
1
1
G
3
2
3 2
D
S
Q16
2N7002
+5VS
1
1
G
3
2
3 2
D
S
Q17
2N7002
PCB_VID3 : PROJECT CODE
R183
8.2KOhm
/X
1 2
R191
8.2KOhm
1 2
GND
1
C22
AB18
AC20
AF21
AG18
AC19
AH21
AF20
AD22
AC21
AC18
SMB_CLK
SMB_DAT
R184
8.2KOhm
/X
1 2
R192
8.2KOhm
1 2
U6C
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
GPIO0/BM_BUSY#
B23
SMBALERT#/GPIO11
GPIO18/STPPCI#
GPIO20/STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
GPIO32/CLKRUN#
GPIO33/AZ_DOCK_EN#
U2
GPIO34/AZ_DOCK_RST#
F20
WAKE#
SERIRQ
THRM#
VRMPWRGD
GPIO6
GPIO7
E21
GPIO8
ICH7M
SATA
SMB
Clocks
GPIO16/DPRSLPVR
SYS GPIO
Power MGT
GPIO
internal pull up
4
GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
GPIO
GPIO37/SATA3GP
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
TP0/BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39
ICH7_PWROK
RF_OFF_SW#
PWRLED_1HZ
SATA_DET#0
KB_SCI#
SIO_SMI#
802_LED_EN#
CB_SD#
BT_LED_EN#
BT_ON
WLAN_ON#
AF19
AH18
AH19
AE19
AC1
B2
C20
B24
D23
F22
AA4
AC22
C21
C23
C19
Y4
E20
A20
F19
E19
PWRLED_1HZ
R4
E22
R3
D20
AD21
PCB_ID0
AD20
PCB_ID1
AE20
+5VS
1
1
3 2
3
D
Q15
2N7002
/X
R165
1 2
R168
1 2
R175
1 2
R177
1 2
R179
1 2
R180
1 2
R181
1 2
R185
1 2
R187
1 2
R189
1 2
R154 100Ohm
R155 100Ohm
PM_BATLOW#
SATA_DET#0
1
1
1
G
VRMPWRGD
2
S
1 2
GND
8.2KOhm
8.2KOhm
8.2KOhm
10KOhm
8.2KOhm
8.2KOhm
8.2KOhm
/X
8.2KOhm
8.2KOhm
8.2KOhm
1 2
1 2
T38 TPC28T
1
CLK_ICH14 5
T39 TPC28T
1
R2.0_NO10
PM_DPRSLPVR 50
PM_PWRBTN# 28
T43 TPC28T
T44 TPC28T
T47 TPC28T
R161
10KOhm
/X
+3VS
+3VSUS
GND
GND
GND
PM_SUSB# 28
PM_SUSC# 28
PM_RSMRST# 28
KB_SCI# 28
SIO_SMI# 25
802_LED_EN# 37
CB_SD# 30
3
1
GND
1
1 2
T41 TPC28T
T40 TPC28T
R158
10KOhm
GND
C193
10PF/50V
1 2
GND
PLT_RST# 7,18,27,28
R159
10KOhm
1 2
checklist
suggests
+3V
SM_LINK1
LINKALERT#
SM_LINK0
internal pull down
CLK_USB48 5
/X
ICH7_PWROK 7,28
If ICH7M embedded Lan
controller was used,
"LAN_RST#" should be
connected to "RSMRST#"
RING#
RN4A
RN4B
RN4C
RN4D
PM_DPRSLPVR
PM_RSMRST#
D16
1 2
1N4148W
1 2
1 2
3 4
5 6
7 8
R166
R169
1 2
1 2
R176
1 2
1 2
1 2
R162 8.2KOhm
10KOhm
10KOhm
10KOhm
10KOhm
R171 8.2KOhm
R173 4.7KOhm
R186
R188
PM_BATLOW#
SMB_CLK
SMB_DAT
PM_BATLOW#
SUS_STAT#
PME# 18,33
PCI_FRAME#
RP1A
1 5
PCI_FRAME# 18,30,33
PCI_IRDY# 18,30,33
PCI_TRDY# 18,30,33
PCI_STOP# 18,30,33
PCI_SERR# 18,30,33
PCI_DEVSEL# 18,30,33
PCI_PERR# 18,30,33
PCI_LOCK# 18
PCI_INTA# 18,33
PCI_INTB# 18,30
PCI_INTC# 18,30
PCI_INTD# 18,30
PCI_INTE# 18
PCI_INTF# 18
PCI_INTG# 18
PCI_INTH# 18
PCI_REQ#0 18
PCI_REQ#1 18
PCI_REQ#2 18
BAT_LL# 28
+3VSUS
2.2KOhm
1 2
2.2KOhm
1 2
/X
10KOhm
/X
100KOhm
/X
10KOhm
GND
PCI_REQ#3 18
PCI_REQ#5 18
PCI_REQ#4 18
PM_CLKRUN#
PM_THERM#
INT_SERIRQ
STP_PCI#
STP_CPU#
LPC_DRQ#0 17
SMB_CLK_S
SMB_DAT_S
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_SERR#
PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
PCI_INTE#
PCI_INTF#
PCI_INTG#
PCI_INTH#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#5
PCI_REQ#4
RP1B
RP1C
RP1D
RP1E
RP1F
RP1G
RP1H
RP2A
RP2B
RP2C
RP2D
RP2E
RP2F
RP2G
RP2H
RP3A
RP3B
RP3C
RP3D
RP3E
RP3F
RP3G
RP3H
2 5
3 5
4 5
6 5
7 5
8 5
9 5
1 5
2 5
3 5
4 5
6 5
7 5
8 5
9 5
1 5
2 5
3 5
4 5
6 5
7 5
8 5
9 5
R163 10KOhm
1 2
R164 10KOhm
1 2
/X
R167 10KOhm
1 2
/X
R170 8.2KOhm
1 2
/X
R172 2.2KOhm
R174 2.2KOhm
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
8.2KOHM
Title :
ASUSTeK COMPUTER INC
Size Project Name
Custom
2
Date: Sheet
Z62Fp
Engineer:
1
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
1 2
1 2
ICH7-M (3/4)
Vincent VY Huang
19 69 Wednesday, August 23, 2006
+3VS
Rev
1.0
of
5
+5VS
1 2
D D
+5VSUS
R152
1 2
10Ohm
GND
+1.5VS
L21
R153
1 2
1Ohm
+3VS
GND
2 1
1 2
C187
0.1UF/10V
GND
5
80Ohm/100Mhz
C C
+1.5VS
B B
A A
+3VSUS
1
2
D15
BAT54C
3
1 2
C164
0.1UF/10V
+1.5VS_PCIE_ICH
1 2
+
CE20
100UF/2.5V
L22
2 1
80Ohm/100Mhz
100Ohm
1 2
+1.5VS
1 2
GND
+3VSUS
GND
R151
C169
0.1UF/10V
1 2
C177
10UF/10V
C183
0.1UF/10V
1 2
C189
0.1UF/10V
+1.5VS
1 2
GND
2
GND
1 2
+3VS
1 2
C173
0.1UF/10V
GND
C191
0.1UF/10V
+3VS
1
D14
BAT54C
3
1 2
C162
0.1UF/10V
C170
0.1UF/10V
1 2
C178
0.01UF/50V
GND
1 2
C184
0.1UF/10V
GND
+1.5VS
GND
T36 TPC28T
0.77A
1 2
C171
0.1UF/10V
1 2
C190
1UF/10V
1.01A
1
4
U6F
G10
V5REF_1
AD17
V5REF_2
F6
V5REF_Sus
AA22
Vcc1_5_B_1
AA23
Vcc1_5_B_2
AB22
Vcc1_5_B_3
AB23
Vcc1_5_B_4
AC23
Vcc1_5_B_5
AC24
Vcc1_5_B_6
AC25
Vcc1_5_B_7
AC26
Vcc1_5_B_8
AD26
Vcc1_5_B_9
AD27
Vcc1_5_B_10
AD28
Vcc1_5_B_11
D26
Vcc1_5_B_12
D27
Vcc1_5_B_13
D28
Vcc1_5_B_14
E24
Vcc1_5_B_15
E25
Vcc1_5_B_16
E26
Vcc1_5_B_17
F23
Vcc1_5_B_18
F24
Vcc1_5_B_19
G22
Vcc1_5_B_20
G23
Vcc1_5_B_21
H22
Vcc1_5_B_22
H23
Vcc1_5_B_23
J22
Vcc1_5_B_24
J23
Vcc1_5_B_25
K22
Vcc1_5_B_26
K23
Vcc1_5_B_27
L22
Vcc1_5_B_28
L23
Vcc1_5_B_29
M22
Vcc1_5_B_30
M23
Vcc1_5_B_31
N22
Vcc1_5_B_32
N23
Vcc1_5_B_33
P22
Vcc1_5_B_34
P23
Vcc1_5_B_35
R22
Vcc1_5_B_36
R23
Vcc1_5_B_37
R24
Vcc1_5_B_38
R25
Vcc1_5_B_39
R26
Vcc1_5_B_40
T22
Vcc1_5_B_41
T23
Vcc1_5_B_42
T26
Vcc1_5_B_43
T27
Vcc1_5_B_44
T28
Vcc1_5_B_45
U22
Vcc1_5_B_46
U23
Vcc1_5_B_47
V22
Vcc1_5_B_48
V23
Vcc1_5_B_49
W22
Vcc1_5_B_50
W23
Vcc1_5_B_51
Y22
Vcc1_5_B_52
Y23
Vcc1_5_B_53
B27
Vcc3_3_1
AG28
VccDMIPLL
AB7
Vcc1_5_A_1
AC6
Vcc1_5_A_2
AC7
Vcc1_5_A_3
AD6
Vcc1_5_A_4
AE6
Vcc1_5_A_5
AF5
Vcc1_5_A_6
AF6
Vcc1_5_A_7
AG5
Vcc1_5_A_8
AH5
Vcc1_5_A_9
AD2
VccSATAPLL
AH11
Vcc3_3_2
AB10
Vcc1_5_A_10
AB9
Vcc1_5_A_11
AC10
Vcc1_5_A_12
AD10
Vcc1_5_A_13
AE10
Vcc1_5_A_14
AF10
Vcc1_5_A_15
AF9
Vcc1_5_A_16
AG9
Vcc1_5_A_17
AH9
Vcc1_5_A_18
E3
VccSus3_3_19
C1
VccUSBPLL
AA2
VccSus1_05/VccLAN1_05_1
Y7
VccSus1_05/VccLAN1_05_2
ICH7M
4
Vcc1_05_1
Vcc1_05_2
Vcc1_05_3
Vcc1_05_4
Vcc1_05_5
Vcc1_05_6
Vcc1_05_7
Vcc1_05_8
Vcc1_05_9
Vcc1_05_10
CORE
Vcc1_05_11
Vcc1_05_12
Vcc1_05_13
Vcc1_05_14
Vcc1_05_15
Vcc1_05_16
Vcc1_05_17
Vcc1_05_18
Vcc1_05_19
VCCPAUX
Vcc1_05_20
VccSus3_3/VccLAN3_3_1
VccSus3_3/VccLAN3_3_2
VccSus3_3/VccLAN3_3_3
VccSus3_3/VccLAN3_3_4
Vcc3_3/VccHDA
VccSus3_3/VccSusHDA
V_CPU_IO1
V_CPU_IO2
V_CPU_IO3
IDE PCI USB
USB CORE
Vcc3_3_3
Vcc3_3_4
Vcc3_3_5
Vcc3_3_6
Vcc3_3_7
Vcc3_3_8
Vcc3_3_9
Vcc3_3_10
Vcc3_3_11
Vcc3_3_12
Vcc3_3_13
Vcc3_3_14
Vcc3_3_15
Vcc3_3_16
Vcc3_3_17
Vcc3_3_18
Vcc3_3_19
Vcc3_3_20
Vcc3_3_21
VccRTC
VccSus3_3_1
VccSus3_3_2
VccSus3_3_3
VccSus3_3_4
VccSus3_3_5
VccSus3_3_6
VccSus3_3_7
VccSus3_3_8
VccSus3_3_9
VccSus3_3_10
VccSus3_3_11
VccSus3_3_12
VccSus3_3_13
VccSus3_3_14
VccSus3_3_15
VccSus3_3_16
VccSus3_3_17
VccSus3_3_18
Vcc1_5_A_19
Vcc1_5_A_20
Vcc1_5_A_21
Vcc1_5_A_22
Vcc1_5_A_23
Vcc1_5_A_24
Vcc1_5_A_25
VccSus1_05_1
VccSus1_05_2
VccSus1_05_3
Vcc1_5_A_26
Vcc1_5_A_27
Vcc1_5_A_28
Vcc1_5_A_29
Vcc1_5_A_30
VCCA3GP
ARX
ATX
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V5
V1
W2
W7
U6
R7
AE23
AE26
AH26
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5
P7
A24
C24
D19
D22
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
AB17
AC17
T7
F17
G17
AB8
AC8
K7
C28
G20
A1
H6
H7
J6
J7
0.04mA
0.33A
390mA
1.27A
1
0.1UF/10V
3
+3VSUS
1 2
1 2
C181
0.1UF/10V
1 2
C185
0.1UF/10V
T33 TPC28T
C192
3
1 2
C163
0.1UF/10V
GND
C174
0.1UF/10V
+1.5VS
1 2
C188
0.1UF/10V
GND
+1.5VS
1 2
GND
R2.0_NO10
+3VS
1 2
C166
0.1UF/10V
C172
0.1UF/10V
1 2
C175
0.1UF/10V
C182
0.1UF/10V
C186
0.1UF/10V
+3VSUS
T377
1
341
SIDE1
1 2
1UF/10V
2
1
1 2
C160
0.1UF/10V
1 2
GND
GND
1 2
GND
1 2
GND
12G17100002C
2
R1.1_NO26
1 2
C180
0.1UF/10V
+3VS
GND
1 2
C165
0.1UF/10V
2
1
RB715F
2
+VCCP
D50
+VCCP_ICH
1 2
+
C161
CE19
470UF/2.5V
/X
GND
If ICH7 embedded Lan controller was
used, these pins should connect to
+3VSUS for S3-S5 wake up.
+VCCP_ICH
1 2
C168
4.7U/6.3V
GND
1 2
C179
0.1UF/10V
R808
1 2
1KOhm
BT1
WTOB_CON_2P
+VCC_RTC
GND
RTC_BAT_R RTC_BAT
2
+3VS
SIDE2
1 2
C167
0.1UF/10V
1 2
C176
0.1UF/10V
GND
U6E
A4
Vss1
A23
Vss2
B1
Vss3
B8
Vss4
B11
Vss5
B14
Vss6
B17
Vss7
B20
Vss8
B26
Vss9
B28
Vss10
C2
Vss11
C6
Vss12
C27
Vss13
D10
Vss14
D13
Vss15
D18
Vss16
D21
Vss17
D24
Vss18
E1
Vss19
E2
Vss20
E4
Vss21
E8
Vss22
E15
Vss23
F3
Vss24
F4
Vss25
F5
Vss26
F12
Vss27
F27
Vss28
F28
Vss29
G1
Vss30
G2
Vss31
G5
Vss32
G6
Vss33
G9
Vss34
G14
Vss35
G18
Vss36
G21
Vss37
G24
Vss38
G25
Vss39
G26
Vss40
H3
Vss41
H4
Vss42
H5
Vss43
H24
Vss44
H27
Vss45
H28
Vss46
J1
Vss47
J2
Vss48
J5
Vss49
J24
Vss50
J25
Vss51
J26
Vss52
K24
Vss53
K27
Vss54
K28
Vss55
L13
Vss56
L15
Vss57
L24
Vss58
L25
Vss59
L26
Vss60
M3
Vss61
M4
Vss62
M5
Vss63
M12
Vss64
M13
Vss65
M14
Vss66
M15
Vss67
M16
Vss68
M17
Vss69
M24
Vss70
M27
Vss71
M28
Vss72
N1
Vss73
N2
Vss74
N5
Vss75
N6
Vss76
N11
Vss77
N12
Vss78
N13
Vss79
N14
Vss80
N15
Vss81
N16
Vss82
N17
Vss83
N18
Vss84
N24
Vss85
N25
Vss86
N26
Vss87
P3
Vss88
P4
+VCC_RTC +3VA
3
1 2
C753
1UF/10V
GND GND
ASUSTeK COMPUTER INC
Size Project Name
Custom
Date: Sheet of
Vss89
P12
Vss90
P13
Vss91
P14
Vss92
P15
Vss93
P16
Vss94
P17
Vss95
P24
Vss96
P27
Vss97
ICH7M
Wednesday, August 23, 2006
Z62Fp
Vss98
Vss99
Vss100
Vss101
Vss102
Vss103
Vss104
Vss105
Vss106
Vss107
Vss108
Vss109
Vss110
Vss111
Vss112
Vss113
Vss114
Vss115
Vss116
Vss117
Vss118
Vss119
Vss120
Vss121
Vss122
Vss123
Vss124
Vss125
Vss126
Vss127
Vss128
Vss129
Vss130
Vss131
Vss132
Vss133
Vss134
Vss135
Vss136
Vss137
Vss138
Vss139
Vss140
Vss141
Vss142
Vss143
Vss144
Vss145
Vss146
Vss147
Vss148
Vss149
Vss150
Vss151
Vss152
Vss153
Vss154
Vss155
Vss156
Vss157
Vss158
Vss159
Vss160
Vss161
Vss162
Vss163
Vss164
Vss165
Vss166
Vss167
Vss168
Vss169
Vss170
Vss171
Vss172
Vss173
Vss174
Vss175
Vss176
Vss177
Vss178
Vss179
Vss180
Vss181
Vss182
Vss183
Vss184
Vss185
Vss186
Vss187
Vss188
Vss189
Vss190
Vss191
Vss192
Vss193
Vss194
Title :
Engineer:
1
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
ICH7-M (4/4)
Vincent VY Huang
1
Rev
1.0
69 20
5
4
3
2
1
VCC
1 2
R468
4.7KOhm
1 2
1 2
Y
1UF/10V
R476
2.4KOhm
R479
4.7KOhm
5
C619
C625
1UF/10V
C628
1UF/10V
+3VS
1 2
1 2
1 2
C609 0.01UF/10V
1 2
C610 0.1UF/10V
SPKR_CB 30
D D
C C
SPKR_SB 19
CD_L_A 27
CD_GND_A 27
CD_R_A 27
1 2
C614 0.1UF/10V
1 2
R465
1 2
4.7KOhm
R473
1 2
2.4KOhm
R477
1 2
4.7KOhm
U35
A
1
B
2
3 4
GND
NC7SZ86P5X
/X
GND_AUDIO
GND_AUDIO
GND_AUDIO
For Vista
B B
EXTMIC_JD# 22
A A
JACK_IN# 22
5
+5V_AUDIO
1 2
R2127
100KOhm
+5V_AUDIO
1 2
3 4
5
GND_AUDIO
CD-L
CD-G
CD-R
2
GND_AUDIO
R2130
100KOhm
Q2101B
UM6K1N
+5V_AUDIO
1 2
6 1
Q2101A
2
UM6K1N
GND_AUDIO
R2.0_NO10
R2125
100KOhm
Q2100A
UM6K1N
6 1
4
PCSPKI
3 4
Q2100B
5
UM6K1N
GND_AUDIO
R2129 40.2KOhm 1%
R2131
0Ohm
/X
1 2
JACK_SENSE_A
1 2
R2124 20KOhm 1%
R2126
0Ohm
/X
1 2
JACK_SENSE_A
1 2
MUTE_POP_AZGPIO# 22
ACZ_SDOUT_AUD 17
ACZ_BCLK_AUD 17
ACZ_SDIN0 17
ACZ_SYNC_AUD 17
ACZ_RST#_AUD 17
PCSPKI PCSPKI_AC
1 2
R470 4.7KOhm
1 2
1 2
1 2
1 2
1 2
R2.0_NO10
1 2
GND_AUDIO
R1.1_NO12
1 2
C621 1UF/10V
1 2
C624
0.1UF/10V
R463 0Ohm
R464 0Ohm
R466 0Ohm
C620 10PF/50V/X
R467 39Ohm
R471
4.7KOhm
3
1 2
C611
10UF/10V
GPO
/X
SDATA_OUT
BIT_CLK
SDATA_IN
SYNC
PCBEEP
R474 2.49KOhm
R475 2.49KOhm
1 2
C612
0.1UF/10V
10KOhm
R2100
1 2
0Ohm
R2101
1 2
0Ohm
R2102
1 2
0Ohm
R2103
1 2
0Ohm
+3VS
1 2
C613
0.1UF/10V
1 2
R472
R1.1_NO41
GND_AUDIO
49
GND
1
DVDD1
2
AC97CK
3
GPO
4
DVSS1
5
SDATA_OUT
6
BIT_CLK
7
DVSS2
8
SDATA_IN
9
DVDD2
10
SYNC
11
RESET#
12
PCBEEP
JACK_SENSE_A +5V_AUDIO
JACK_SENSE_B
CD-L
CD-G
CD-R
1 2
C633
10UF/10V
GND
5V-5VA LDO
4847464544434241403938
EAPD
AVSS4
AVSS3
AVDD5
AVDD4
S/PDIF_OUT
LINE_OUT_L
LINE_OUT_R
HEADPHONE_R
PHONE_IN
AUX_L
AUX_R
JACK_SENSE_A
MIC_1
CD_R
CD_GND
CD_L
JACK_SENSE_B
131415
16
17
MIC_2
MIC_1
1 2
C2103
1UF/10V
GND_AUDIO
+5VS
1 2
C634
1UF/10V
SUSB# 24,28,33,36,60,61
GND
R1281
1 2
0Ohm
R1282
1 2
0Ohm
R483
1 2
0Ohm
GND_AUDIO
2
S/PDIF
LINE_OUT_R
LINE_OUT_L
U36
37
AD1986AJCPZ
AVDD2
MONO_OUT
SURR_OUT_R
HEADPHONE_L
SURR_OUT_L
AVDD3
VREF_OUT/C/LFE
LFE_OUT
CENTER_OUT
AVSS2
VREF_OUT/LINE_IN
VREF_OUT/MIC_1/2
VREF_FILT
AVSS1
AVDD1
LINE_IN_R
LINE_IN_L
MIC_2
24232221201918
C626 1UF/10V
C627 1UF/10V
U37
1
IN
2
GND
3 4
EN NR/FB
TPS793475DBVR
EAR_R 22
EAR_L 22
1 2
C617
10UF/10V
GND_AUDIO
C622
10UF/10V
GND_AUDIO
R2133
1 2
1KOhm
T778
TPC28T
1
1 2
GND_AUDIO
Z62Fp
S/PDIF 22
1 2
1 2
1 2
C623
0.1UF/10V
1 2
C635
10UF/10V
C615 1UF/10V
1 2
C616 1UF/10V
1 2
AVDD
36
35
34
33
C2101 1UF/10V
32
C2102
31
1UF/10V
30
29
28
VREF_FILT
27
26
25
T143
TPC28T
1
T144
TPC28T
1
1 2
1 2
OUT
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
+5V_AUDIO
5
GND_AUDIO
C631
0.1UF/10V
1 2
1 2
OUT_R 22
OUT_L 22
C618
0.1UF/10V
0Ohm
R2132
VREFOUT_MIC 22
VREFOUT_MIC 22
Title :
Engineer:
1
+5V_AUDIO
VREFOUT_MIC_E 23
EXT_MIC 22
AZALIA AD1986A
Vincent VY Huang
21 69 Wednesday, August 23, 2006
INT_MIC 23
of
Rev
1.0