Asus z61ae Schematics

5

D D

4

3

2

1

Z61Ae SCHEMATIC V2.0

PAGE

SYSTEM PAGE REF.

4

DOTHAN CPU-1

5

DOTHAN CPU-2

6

CPU CAP & THERMAL SENSOR

7

ALVISO: CPU

8

ALVISO: DDR2 & DMI & PEG
ALVISO: DDR2

9

ALVISO: POWER & Caps

10

ALVISO: GND & NCTF & Straps

11

DDR2 SO-DIMM_0

12

DDR2 SO-DIMM_1

13

DDR2 ADDRESS TERMINATION

C C

B B

14

LVDS & INVERTER CONNECTOR

15

CRT

16
17

ICH6M--SATA/LPC/IDE/PM (1)

18

ICH6M--PCI/DMIUSB/PCIE (2)

19

ICH6M--PWR/GND(3)

20

ICH6M--PULL UP/STRAP (4)

21

CLOCK ICS954206

22

HDD & SWAP BAY CONN

23

USB PORTS

24

SUPER I/O LPC47N217

25

SCREW HOLE
PORT BAR 3

26

KBC 38857

27

SM BUS & POWER PORT

28

LAN-RTL8101L

29

RJ45 / RJ11

30
31

MINIPCI
PCI CARDBUS R5C841

32
33

PCI PCMCIA SOCKET A
PCI IEEE1394A & 3 IN1 CON

34

FAN CONTROL

35

FWH BIOS/Bluetooth Conn.

36

AUDIO CODEC ALC880

37

AUDIO_AMP_MB (TPA0212)

38

MIC AMP & MDC Conn.

39
40

LED BOARD
TP CONN

41

DISCHARGE MOS/EMI

42

Content

PAGE

POWER PAGE REF.

POWER-ON SEQUENCE

43

VCORE ADP3205

44

SYSTEM

45

2.5V & 1.5V & 1.8V & 1.05V

46

1.5VA & DDR2

47

PIC16C54/PWROK

48
49

BATCONN

50

CHARGER
BATLOW/SD#

51
52

LOAD SWITCH

53

+5VLCM

Content

Notice

The Z61Ae project code is ?

01

CON17/CON19 are SMT Level(SMT Request);DC Jack J6 is DIP Level.

02

CN1/J1/U23 are changed to DIP Level(They will drop in SMT reflow ).

03

J4 is changed to DIP.Due to it will broken in reflow.

Need to add ME and Power 59 level BOM in EE 60 BOM

04

Check FWH IC 05-001017122 in BOM.

05

Alviso U49 need to be changed to C1 version 02-010002640 (INTEL

06

ALVISO-GM SL8G2),second source is 02-010002610(C0 version)
AMI BIOS LABEL P/N:15-135001010.

07

It need to add in P/R 59-MID BOM by ME.

08

J2 need to be unmounted at PR stage for ATS power test

R501(255 ohm) 10G213255013010 need to add second source 10-003412515.

09

Add ACCL PCB Vendor 08-26ZA0020W???-->Need to create in SMT level.

10

Need add other PCB vendors by document manager.
All 0.01uF/25V/X7R (P/N:11-034110320) need to add 11-034110323

11

into second source.
MINIPCI Connector (P/N:12-023511240) need to add 12-023521243

12

into second source.
All CHIP RES. ARRAY 10 OHM(0402) 8R16P (P/N:10-124901000) need

13

to add 10-12490100A into second source.(ECR is NA12958)

If delete debug card function,R876 and R628 mount 0 ohm.

14

If use another power

15

switch method.D30 unmount.
If use another power

16

switch method.C616
mount 0.1uF/0402

A A

Title :

Z61AE PAGE REF.

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

157Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

Z61Ae: DOTHAN/ALVISO-GM BLOCK DIAGRAM

Main Battery is Li-ION 8 cells(4*2),16.8V(4.2V*4),4400mAH(2200mAH*2),65W(3.7V*4cell*4.4A) battery pack.
Second battery is Li-ION 6 cells(3*2),12.6V(4.2*3),3600mAH(1800mAH*2),40W(3.7V*3 cells*3.6A)battery pack.

BATTERY

D D

CLOCK
GEN.
ICS954206

PAGE 21

2 TYPE

3 X 2 &
4 X 2

PAGE 49

SWITCH BOARD CON

FUNCTION KEY

PAGE 40

LED

TOUCHPAD CONN

PAGE 41

Dothan

478 uFCPGA

LVDS &
INV.

PAGE 15

CRT
CONN

PAGE 16

TO PORT BAR3
CONN.

C C

B B

(FOR CRT)

PAGE 26

TO PORT BAR3
CONN.
(FROM USB
PORT2)

PAGE 26

TO BLUETOOTH
(FROM USB
PORT5)

R1.1-S01

PAGE 31

VCORE

SYSTEM

1.5V,1.8V,

1.05V,2.5V

CHARGE

PIC16C54
BATCON

PAGE 44

PAGE 45

PAGE 46

PAGE 50

PAGE 48,49

PAGE 22

SWITCH

PAGE 16

HDD
Master

PAGE 26

USB X4

PAGE 23

SATA TO PATA
SII3811CNU

PAGE 22

SUPER I/O
LPC47N217

PAGE 24

TO PORT BAR3
CONN.
(FOR LPT)

USB2.0

LPC, 33MHz

KEYBOARD
CONTROLLER
M3885XHP

PAGE 27

INTERNAL
KEYBOARD

PAGE 27

SWAP BAY
(HOT

PAGE 22

PLUG)

PAGE 4,5

PAGE 7,8,9,10,11

SATA BUS

PATA BUS

HOST BUS

AGTL

1.468V,133MHZ

ALVISO

Intel 915GM C1 version

1257 uFCBGA

DMI x4

ICH6-M

Intel ICH6 B2 version

609 BGA

PAGE 17,18,19,20

AMI 4MB FLASH

FWH

PAGE 36

MIC AMP
NJM2100

PAGE 39

....

DDR2 SDRAM 400/533MHz

AC LINK / ACZ

Azalia
ALC880-H

PAGE 37

AUDIO AMP
TPA0212

MDC CONN.

PAGE 38

SPDIF

PAGE 38

MIC IN

PAGE 38

CPU
CAP

PAGE 6

PCI_BUS

PAGE 39

3 IN 1 CARD
READER
(MMC/SD/
MS-PRO)

PAGE 34

1394
SLOT

PAGE 34

DDR2 400/533
SODIMM X2

+1.8V
+0.9VS

PAGE 12,13

BATLOW/SD#

LOAD Switch

PAGE 51,53

A A

+0.9VS

DC IN (19V
DC,3.42A,65W)

PAGE 52

PAGE 47

PAGE 53

CN2

CRT

5

4

CON5

USB

CON2

PORT BAR 3

TOP VIEW

CON4

USB

PIN1

PIN2

3

CON1

PIN1

PIN2

CON3

RJ45

POWER
SEQENCE

PAGE 43

....

RESET

PAGE 43

DDR
CAP/RES

PAGE 13,14

SM_BUS

PAGE 28

PAGE 35

PAGE 35

3.3V, 33MHz

CARDBUS

RICOH
R5C841

PAGE 32,33

CARDBUS
1 SLOT

VCCA, VCCB
VPPA, VPPB

PAGE 33

LAN 10/100M

LAN-RTL8101L

PAGE 29

LAN IO

PAGE 30

SWITCH

PAGE 26

TO PORT BAR3
CONN.
(FOR LAN)

PAGE 26

PORT BAR III part number is 90-N6W1P1010

CN3

LPT

J1

DCIN

2

FAN
CON.

H/W MONITOR
THERMAL
(ADT7463)

SCREW
HOLE

PAGE 25

RTC

PAGE 17

MINI PCI
TYPE III

PAGE 31

RJ11 JACK
RJ45
CONN

PAGE 30

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

DISCHARGE
CIRCUIT

PAGE 42

Z61Ae

Title :

Engineer:

1

BLOCK DIAGRAM

Sam Wang

of

257Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

***********GPIO setting is not final in this page.*********

***********Please reference Z61Ae GPIO setting document.*********

D D

PCI Device
Chipset (Host to PCI)
Mini_PCI
LAN-RTL8101L

CardBus

1394

ICH6M_GPIO Use As Signal Name Power

GPI 00 GPI
GPI 01 GPI
GPI 02 GPI
GPI 03 GPI
GPI 04 GPI
GPI 05 GPI

C C

B B

GPI 07 GPI
GPI 08 GPI EXT_SMI#_3A
GPI 09 GPI
GPI 10 GPI

GPI 12 GPI
GPI 13 GPI
GPI 14 GPI
GPI 15 GPI
GPO 16 GPO
GPO 17 GPO
GPO 19 BLINK

GPO 23 GPO
GPIO24 GPO
GPIO25 GPO
GPI 26 GPI
GPIO27 GPI
GPIO28 GPI
GPI 29 GPI
GPI 30 GPI
GPI 31 GPI
GPIO33 GPO
GPIO34 GPO
GPI 40 GPI
GPI 41 GPI
GPO 48 GPO
GPO 49 GPO N/A (CPUPWRGD)

IDSEL#

(AD30 internal)
AD18
AD16
AD17
AD17

KBDDT0
KBDDT1

N/A (PIRQE#)
N/A (PIRQF#)
N/A (PIRQG#)
N/A (PIRQH#)

BMBUSY#GPI 06 GPI

N/A (USB_OC#4)

N/A (USB_OC#5)
LID_ICH_3AGPI 11 GPI
KBDSCI_3

BAT1_LLOW#_ICH6
BAT2_LLOW#_ICH6

BACK_OFF#GPO 21 GPO
FWH_WP#

CB_SD#
IHZ_ICH6

PCB_VID0
PCB_VID1
PCB_VID2

ACIN_OC_3

OP_SD#

PCB_VID3
BATSEL_2P

REQ/GNT#

n/a

3
0C
1
1
13 IN 1 C

Interrupts

B,D

B
A

PC/PCI

USE_ASM38857_GPIO SIGNAL_NAME

P23

P22

P20

P42

P43

P45

P50

P51

P52

P53 GPO BT_ON

P54

P55

P56

P57

P67

P66

P65

P64

P63

P62

P61 GPI

P60

P77

GPO

GPO

GPOP21

GPO

GPI

GPOP44

GPO

GPO

GPI

GPI

GPO

GPO

GPI

GPI

GPI

GPI

GPI

GPI

GPIOP76

GPIO

BAT_LEARN

BAT_SEL

KBCRSMGPO

WATCHDOG

CHG_FULL_OC

KBDCPURST_3Q

KBC_GA20GPO

KBSCI_3QGPOP46

PM_CLKRUN#P47 GPI

BAT_LOW#_KBCGPO

XIDE_EN#_3

BAYDOCK_IN#

BAY_RST

BAT1_IN#_OC

ADJ_BL

BAT2_IN#_OC

DISTP#

MARATHON_#

ACIN_OCGPI

LID_ICH#_3

802_ON

INTERNET#

EMAIL#

SMD_BAT

SMC_BAT

SMBUS ADDRESS :

Azalia : PCI_INTB#
USB 0,1 : PCI_INTA#
USB 2,3 : PCI_INTD#
USB 4,5 : PCI_INTC#

DDR_SODIMM0 = 1010010x ( A4 )
DDR_SODIMM1 = 1010000x ( A0 )

CLK = 1101001x ( D2 )

P27

P26

P25

P24

P41

P40 KBC_EXTSMIGPO

R5C593_GPIO

IRQ4

IRQ5

IRQ7

GPI23

GPI40

GPI41

GPI42

GPI43

GPI44

GPI45

GPI46

GPI47

GPO

GPO

GPO

GPO

GPO

USE_AS

GPOIRQ3

GPO

GPO

GPO

GPI

GPI

GPI

GPI

GPI

GPI

GPI

GPO

GPO

SIGNAL_NAMEUSE_ASM38857_GPIO

SCROLLOCK#

NUM_LED#

CAP_LED#

SET_PCIRSTNS#

EMAIL_LED#

SIGNAL_NAME

SIGNAL_NAMEUSE_AS47N217_GPIO

PID_0

PID_1

BAY_IN0

BAY_IN1

A A

Schematic information

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

357Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

CPU Socket P/N : 12-046004791

C169

H_D#[63:0] <7>

H_DINV#2 <7>
H_DSTBN#2 <7>
H_DSTBP#2 <7>

H_DINV#3 <7>
H_DSTBN#3 <7>
H_DSTBP#3 <7>

12

12

C260

C263
10UF/10V

/*

R146

0Ohm

0.01UF

+3VS

12

12

C172

12

C171

0.1UF

0.01UF

CPU_F_SEL

R838

1 2

0Ohm

/*

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

For FSB(400/533)

U20

1

SHDN#

2

GND
IN3OUT

G913C

Vset=1.25

Vout=1.25*(1+A/B)

1 2

3

1

G

2

Title :

Engineer:

Z61Ae

1

SET

VCCA_FB

R137

80.6KOhm

D

S

Q17
2N7002

/*

VCCA_FB

5

+1.8VS_PROC

4

A

R136
20KOhm

1 2

B

R138
100KOhm

1 2

DOTHAN CPU (1)

Sam Wang

457Thursday, June 09, 2005

C166

12

2200P

Rev

2.0

of

D D

C C

B B

VCCA layout: T / S :
100 mil / 25 mil

H_A#[16:3]<7>

H_ADSTB#0<7>

H_REQ#[4:0]<7>

H_A#[31:17]<7>

H_ADSTB#1<7>

DPWR#<7>

CLK_CPU_BCLK<21>

CLK_CPU_BCLK#<21>

H_A20M#<17>

H_FERR#<17>
H_IGNNE#<17>
H_DPSLP#<17>

H_CPUSLP#<7,17>

H_INTR<17>

H_NMI<17>

H_SMI#<17>

H_STPCLK#<17>

H_PWRGD<17>

VR_VID[5:0]<44>

1.05V OUTPUT

120mA

H_THERMDA<35>
H_THERMDC<35>

H_THRMTRIP_S#<6>

PM_PSI#<44>

CPU_BSEL0<21>
CPU_BSEL1<21>

FSB BSEL1 BSEL0 BSEL0

400 0 N/A 1
533 0 N/A 0

A A

5

A-STEP B-STEP

H_A#16
H_A#15
H_A#14
H_A#13
H_A#12
H_A#11
H_A#10
H_A#9
H_A#8
H_A#7
H_A#6
H_A#5
H_A#4
H_A#3

H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0

H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
H_A#26
H_A#25
H_A#24
H_A#23
H_A#22
H_A#21
H_A#20
H_A#19
H_A#18
H_A#17

T68

1

R455 49.9Ohm 1%

12

R456 49.9Ohm 1%

12

VR_VID5
VR_VID4
VR_VID3
VR_VID2
VR_VID1
VR_VID0

+1.8VS_VCCA

+1.8VS_PROC

H_PROCHOT_S#

T264

T87
T263

Reserve for ITP

H_BPM#5
H_PROCHOT_S#
H_PWRGD

U48B

AA2

Y3

AA3

U1
Y1
Y4

W2

T4

W1

V2
R3
V3
U4
P4
U3
T1
P1
T2
P3
R2

AF1
AE1
AF3
AD6
AE2
AD5
AC6
AB4
AD2
AE4
AD3
AC3
AC7
AC4
AF4
AE5

C19

SOCKET479P

P/N = 12-046004791

T73

1

B15
B14
A16
A15

C2

OD

D3

A3
B7

A6
D1
D4

B4
C6

OD

E4
H4

G4
G3

F3

F2

E2

AC26

N1

B1

F26
B18

A18
C17
B17

E1

C16

C3

1

C14
AF7

1

B2

1

R464

56Ohm

/*

1 2

1 2

OD

A[16]#
A[15]#
A[14]#
A[13]#
A[12]#
A[11]#
A[10]#
A[9]#
A[8]#
A[7]#
A[6]#
A[5]#
A[4]#
A[3]#
ADSTB[0]#
REQ[4]#
REQ[3]#
REQ[2]#
REQ[1]#
REQ[0]#

A[31]#
A[30]#
A[29]#
A[28]#
A[27]#
A[26]#
A[25]#
A[24]#
A[23]#
A[22]#
A[21]#
A[20]#
A[19]#
A[18]#
A[17]#
ADSTB[1]#

DPWR#

U48C

BCLK[0]
BCLK[1]
ITP_CLK[0]
ITP_CLK[1]

A20M#
FERR#
IGNNE#
DPSLP#
SLP#
LINT0
LINT1
SMI#
STPCLK#

PWRGOOD
VID[5]

VID[4]
VID[3]
VID[2]
VID[1]
VID[0]

VCCA[3]
VCCA[2]
VCCA[1]
VCCA[0]

THERMDA
THERMDC
THERMTRIP#
PROCHOT#

RSVD5
RSVD4
RSVD3
RSVD2
RSVD1
RSVD0

SOCKET479P

+VCCP+VCCP+VCCP

R453

56Ohm

ADS#
PRDY#
PREQ#

BNR#

BPRI#

DBR#

ADDRESS GROUP 0ADDRESS GROUP 1

DEFER#

DRDY#
DBSY#

BR0#

CONTROL

IERR#

INIT#

LOCK#

RESET#

RS[2]#
RS[1]#
RS[0]#

TRDY#

HIT#

HITM#

COMP[3]
COMP[2]

HOSTCLKLEGACY CPU

COMP[1]
COMP[0]

BPM[3]#
BPM[2]#
BPM[1]#
BPM[0]#

GTLREF[3]
GTLREF[2]
GTLREF[1]
GTLREF[0]

TEST1
TEST2

MISC

TRST#

VCCSENSE

VSSSENSE

R234

200Ohm

1 2

1KOhm /*

Reserve for ITP

4

R235

N2
A10
B10

L1
J3

A7

L4
H2
M2

N4

A4

B5

J2

B11
L2
K1
H1

M3

K3
K4

AB1
AB2
P26
P25

C9
A9
B8
C8

AC1
G1
E26
AD26

C5
F23

A13

TCK

C12

TDI

A12

TDO

C11

TMS

B13

AE7

AF6

12

H_IERR#

OD

H_RS#2
H_RS#1
H_RS#0

1

T100

1

T238

R466 1KOhm /*

1 2

R147 1KOhm /*

R461 150Ohm

R459 680Ohm

VCCSENSE

VSSSENSE

R468 56Ohm

H_COMP3
H_COMP2
H_COMP1
H_COMP0

H_BPM#0 <6>
H_BPM#1 <6>
H_BPM#2 <6>
H_BPM#3 <6>

Z0=55 ohm < 0.5''

12

12

12

R184 54.9Ohm

R201 54.9Ohm

H_PWRGD_ITP <6>

H_ADS# <7>
H_BPM#4 <6>
H_BPM#5 <6>

H_BNR# <7>
H_BPRI# <7>

H_DBRESET# <6,17>

H_DEFER# <7>
H_DRDY# <7>
H_DBSY# <7>

H_BR0# <7>

+VCCP

12

H_INIT# <17>

+VCCP

H_LOCK# <7>

H_RS#[2:0] <7>
H_TRDY# <7>

H_HIT# <7>
H_HITM# <7>

H_DPRSTP# <17>

GTLREF0

TDI <6>
TCK <6>

+VCCP

TDO <6>
TMS <6>

TRST# <6>

12

/*1%

12

/*1%

R228

54.9Ohm

/*1%

1 2

H_CPURST# <7>

Reserve for ITP
Place resistance close ITP

+VCCP

R144
1KOhm

1 2

R145

2KOhm

1%

1 2

R1.1-S29

+5V

H_COMP3
H_COMP2
H_COMP1
H_COMP0

R148

10KOhm

/*

R2.0-S11

3

H_D#15
H_D#14 H_D#46
H_D#13
H_D#12
H_D#11
H_D#10
H_D#9
H_D#8
H_D#7
H_D#6
H_D#5
H_D#4
H_D#3
H_D#2
H_D#1

H_DINV#0<7>

H_DSTBN#0<7>

H_DSTBP#0<7>

H_DINV#1<7>

H_DSTBN#1<7>

H_DSTBP#1<7>

H_D#0

H_D#31
H_D#30
H_D#29
H_D#28
H_D#27
H_D#26
H_D#25
H_D#24
H_D#23
H_D#22
H_D#21
H_D#20
H_D#19
H_D#18
H_D#17
H_D#16

R1.1-S30

+1.8VS_PROC

12

C167
10UF/10V

A-2 STEPPING 1.8V/1.5V
B STEPPING 1.5V only

12

R232 54.9Ohm 1%

12

R233 27.4Ohm 1%

12

R143 54.9Ohm 1%

1 2

R142 27.4Ohm 1%

S

D

+1.8VS_PROC+1.8VS_VCCA

3

2

G

1

Q16 SI2302DS

/*

12

3

D

Q18

1

VCCA_1.8_EN# <21>

G

S

2

2N7002

/*

Switch default is PIN3 and PIN4 ON.
For FSB 400 CPU.

SW2 switch TO PIN1 "pin1 & 4 OPEN"==>133MHz/1.5V"VCCA0
SW2 switch TO PIN4 "pin1 & 4 SHORT"==>100MHz/1.8V"VCCA0

SW2 switch TO PIN2 "pin2 & 3 OPEN"==>DOTHAN 533
SW2 switch TO PIN3 "pin2 & 3 SHORT"=>CELERON/BANIAS/DOTHAN400

+3VS

100

133

U48A

C25

D[15]#

E23

D[14]#

B23

D[13]#

C26

D[12]#

E24

D[11]#

D24

D[10]#

B24

D[9]#

C20

D[8]#

B20

D[7]#

A21

D[6]#

B26

D[5]#

A24

DATA GROUP 0DATA GROUP 1

D[4]#

B21

D[3]#

A22

D[2]#

A25

D[1]#

A19

D[0]#

D25

DINV[0]#

C23

DSTBN[0]#

C22

DSTBP[0]#

K25

D[31]#

N25

D[30]#

H26

D[29]#

M25

D[28]#

N24

D[27]#

L26

D[26]#

J25

D[25]#

M23

D[24]#

J23

D[23]#

G24

D[22]#

F25

D[21]#

H24

D[20]#

M26

D[19]#

L23

D[18]#

G25

D[17]#

H23

D[16]#

J26

DINV[1]#

K24

DSTBN[1]#

L24

DSTBP[1]#

SOCKET479P

12

12

C170

C264
10UF/10V

0.01UF

/*

D[47]#
D[46]#
D[45]#
D[44]#
D[43]#
D[42]#
D[41]#
D[40]#
D[39]#
D[38]#
D[37]#
D[36]#

DATA GROUP 2DATA GROUP 3

D[35]#
D[34]#
D[33]#
D[32]#

DINV[2]#
DSTBN[2]#
DSTBP[2]#

D[63]#
D[62]#
D[61]#
D[60]#
D[59]#
D[58]#
D[57]#
D[56]#
D[55]#
D[54]#
D[53]#
D[52]#
D[51]#
D[50]#
D[49]#
D[48]#

DINV[3]#
DSTBN[3]#
DSTBP[3]#

+1.8VS_VCCA

12

C262

0.01UF

Y25
AA26
Y23
V26
U25
V24
U26
AA23
R23
R26
R24
V23
U23
T25
AA24
Y26
T24
W25
W24

AF26
AF22
AF25
AD21
AE21
AF20
AD24
AF23
AE22
AD23
AC25
AC22
AC20
AB24
AC23
AB25
AD20
AE24
AE25

12

/*

Place near CPU pin

Layout note:
COMP0 and COMP2 need to be Zo=27.4ohm traces.
Best estimate is 18mil wide trace for outer
layers and
14mil if on internal layer. See RDDP of
Banias.
Traces should be shorter than 0.5". Refer to
latest CS layout

COMP1, COMP3 should be routed as Zo=55ohm
traces shorter than 0.5"

PM_SUSB#<17,21,29,32,37,40,43,48,52>

If CPU_F_SEL=LOW

-->+1.8VS_PROC=1.81V
CPU_F_SEL=OPEN

-->+1.8VS_PROC=1.5V

1 2

4

1

R139
100KOhm

/*

CPU_F_SEL

2 3

+1.8VS_VCCA

OTHER

SW2
SWITCH_4P

DOTHAN

+1.8VS_PROC

2

H_D#47
H_D#45

H_D#44
H_D#43
H_D#42
H_D#41
H_D#40
H_D#39
H_D#38
H_D#37
H_D#36
H_D#35
H_D#34
H_D#33
H_D#32

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_D#53
H_D#52
H_D#51
H_D#50
H_D#49
H_D#48

C168
10UF/10V

12

0.01UF

VCCA_1.8_EN<21>

5

D D

U48D

W4

VCCQ[1]

P23

VCCQ[0]

D10

VCCP1

D12

VCCP2

D14

VCCP3

D16

VCCP4

E11

VCCP5

E13

VCCP6

E15

VCCP7

F10

VCCP8

F12

VCCP9

F14

VCCP10

F16

VCCP11

K6

VCCP12

L5

VCCP13

L21

VCCP14

M6

VCCP15

M22

VCCP16

N5

VCCP17

N21

VCCP18

P6

VCCP19

P22

VCCP20

R5

VCCP21

R21

C C

B B

VCCP22

T6

VCCP23

T22

VCCP24

U21

VCCP25

VCC

VCC64

VCC65

VCC66

VCC67

VCC68

VCC69

VCC70

VCC71

VCC72

AF8

AF10

AF12

AF14

AF16

AF18

AE13

AE15

AE17

AE19

VCC63

VCC62

AE11

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8

VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60

VCC61

SOCKET479P

AE9

D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18

4

+VCORE+VCCP

AF24

AF21

AF19

AF17

AF15

AF13

AF11

AF9

AF5

AF2

AE26

AE23

AE20

VSS187

VSS70

VSS186

VSS185

VSS71J1VSS72J4VSS73J6VSS74

AE18

VSS184

VSS183

VSS182

VSS181

VSS180

VSS75

VSS76K2VSS77

K5

J22

J24

K21

A2
A5

A8
A11
A14
A17
A20
A23
A26

B3

B6

B9
B12
B16
B19
B22
B25

C1
C4

C7
C10
C13
C15
C18
C21
C24

D2

D5

D7

D9
D11
D13
D15
D17
D19
D21
D23
D26

E3
E6

E8
E10
E12
E14
E16
E18
E20
E22
E25

F1

F4

F5

F7

F9
F11
F13
F15
F17
F19
F21
F24

G2
G6

G22

SOCKET479P

U48E

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64

VSS192

VSS191

VSS190

VSS189

VSS188

VSS65

VSS66

VSS67H3VSS68H5VSS69

H21

H25

G23

G26

AE16

AE14

AE12

AE10

VSS179

VSS178

VSS177

VSS176

GND

VSS79

VSS78

K26

K23

3

AE8

AE6

AE3

AD25

AD22

AD19

AD17

AD15

AD13

AD11

AD9

AD7

AD4

AD1

AC24

VSS160

AC21

VSS159

AC18

VSS175

VSS174

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS88

VSS87M5VSS86M4VSS85M1VSS84

VSS83

VSS82L6VSS81L3VSS80

L25

L22

M24

M21

VSS158

VSS166

VSS165

VSS164

VSS163

VSS162

VSS161

AC16

VSS157

AC14

VSS156

AC12

VSS155

AC10

VSS154

AC8

VSS153

AC5

VSS152

AC2

VSS151

AB26

VSS150

AB23

VSS149

AB21

VSS148

AB19

VSS147

AB17

VSS146

AB15

VSS145

AB13

VSS144

AB11

VSS143

AB9

VSS142

AB7

VSS141

AB5

VSS140

AB3

VSS139

AA25

VSS138

AA22

VSS137

AA20

VSS136

AA18

VSS135

AA16

VSS134

AA14

VSS133

AA12

VSS132

AA10

VSS131

AA8

VSS130

AA6

VSS129

AA4

VSS128

AA1

VSS127

Y24

VSS126

Y21

VSS125

Y5

VSS124

Y2

VSS123

W26

VSS122

W23

VSS121

W22

VSS120

W6

VSS119

W3

VSS118

V25

VSS117

V21

VSS116

V5

VSS115

V4

VSS114

V1

VSS113

U24

VSS112

U22

VSS111

U6

VSS110

U2

VSS109

T26

VSS108

T23

VSS107

T21

VSS106

T5

VSS105

T3

VSS104

R25

VSS103

R22

VSS102

R6

VSS101

R4

VSS100

R1

VSS99

P24

VSS98

P21

VSS97

VSS95P2VSS94

VSS93

VSS92

VSS91N6VSS90N3VSS89

VSS96

P5

N26

N23

N22

2

MOBILE DOTHAN VID TABLE

0 0 0 0 0 0 1.708V
0 0 0 0 0 1 1.692V
0 0 0 0 1 0 1.676V
0 0 0 0 1 1 1.660V
0 0 0 1 0 0 1.644V
0 0 0 1 0 1 1.628V
0 0 0 1 1 0 1.612V
0 0 0 1 1 1 1.596V
0 0 1 0 0 0 1.580V
0 0 1 0 0 1 1.564V
0 0 1 0 1 0 1.548V
0 0 1 0 1 1 1.532V
0 0 1 1 0 0 1.516V
0 0 1 1 0 1 1.500V
0 0 1 1 1 0 1.484V
0 0 1 1 1 1 1.468V
0 1 0 0 0 0 1.452V
0 1 0 0 0 1 1.436V
0 1 0 0 1 0 1.420V
0 1 0 0 1 1 1.404V
0 1 0 1 0 0 1.388V
0 1 0 1 0 1 1.372V
0 1 0 1 1 0 1.356V
0 1 0 1 1 1 1.340V
0 1 1 0 0 0 1.324V
0 1 1 0 0 1 1.308V
0 1 1 0 1 0 1.292V
0 1 1 0 1 1 1.276V
0 1 1 1 0 0 1.260V
0 1 1 1 0 1 1.244V
0 1 1 1 1 0 1.228V
0 1 1 1 1 1 1.212V

VID[5..0]VID[5..0]

1 0 0 0 0 0 1.196V
1 0 0 0 0 1 1.180V
1 0 0 0 1 0 1.164V
1 0 0 0 1 1 1.148V
1 0 0 1 0 0 1.132V
1 0 0 1 0 1 1.116V
1 0 0 1 1 0 1.100V
1 0 0 1 1 1 1.084V
1 0 1 0 0 0 1.068V
1 0 1 0 0 1 1.052V
1 0 1 0 1 0 1.036V
1 0 1 0 1 1 1.020V
1 0 1 1 0 0 1.004V
1 0 1 1 0 1 0.988V
1 0 1 1 1 0 0.972V
1 0 1 1 1 1 0.956V
1 1 0 0 0 0 0.940V
1 1 0 0 0 1 0.924V
1 1 0 0 1 0 0.908V
1 1 0 0 1 1 0.892V
1 1 0 1 0 0 0.876V
1 1 0 1 0 1 0.860V
1 1 0 1 1 0 0.844V
1 1 0 1 1 1 0.828V
1 1 1 0 0 0 0.812V
1 1 1 0 0 1 0.796V
1 1 1 0 1 0 0.780V
1 1 1 0 1 1 0.764V
1 1 1 1 0 0 0.748V
1 1 1 1 0 1 0.732V
1 1 1 1 1 0 0.716V
1 1 1 1 1 1 0.700V

VoltageVoltage

1

A A

Title :

DOTHAN CPU (2)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

557Thursday, June 09, 2005

Rev

2.0

5

VCORE 10uF/10V * 35
220uF/2V * 4
VCCP 0.1uF * 10 for CPU

D D

+VCORE 10uF is
/6.3V/0805/X5R as
M7V R2.0

+VCORE

R1.1-S32

27A for 1.8G

12

C202
10UF

12

C228
10UF

12

C198
10UF

12

C196
10UF

150uF * 1 for CPU

0.1uF * 10 for Alviso
150uF * 2 for Alviso

4.7uF * 1 for Alviso

2.2uF * 1 for Alviso

0.47uF * 2 for Alviso on A6 B2 G1 V1

0.22uF * 2 for Alviso on A6 B2 G1 V1

Decoupling guide from INTEL

12

12

12

12

C229
10UF

C195
10UF

C214
10UF

12

12

C197
10UF

C215
10UF

C462
10UF

4

12

12

C216

C184

10UF

10UF

12

12

C231

C466

10UF

10UF

12

12

C181
10UF

12

C482
10UF

12

C180

C199

10UF

10UF

12

12

C192

C232

10UF

10UF

3

2

+VCCP

12

12

R462

R460

R465

39.2Ohm

54.9Ohm

1KOhm

1%

1

T270

1

T269

1

T111

1

T74

1

T251

1

T248

1

T253

1

T254

1 2

/*1%

/*

CLK_ITP_BCLK <21>
CLK_ITP_BCLK# <21>
H_CPURST#_ITP <7>
H_DBRESET# <4,17>
TDO <4>
TRST# <4>
TDI <4>
TMS <4>

1

12

12

C211
10UF

C C

R1.1-S32

B B

12

+VCCP

C230
10UF

12

150U/4.0V

2.5A for 1.8G

+

CE19

C212
10UF

12

12

C227

C220

10UF

10UF

12

+

CE9

220UF/2V

12

12

0.1UF

0.1UF

C469

C464

12

C465

0.1UF

12

C480

0.1UF

12

12

12

+

C218
10UF

CE11

220UF/2V

12

0.1UF

12

0.1UF

C479

C481

C219
10UF

12

C472

0.1UF

DOTHAN VID TABLE

C3/C4

CPU
FREQ.

1.8G

1.7G

HFM
VOLTAGE

1.6G 1.2G

1.308V

LFM

1G1.4G

0.6G

0.844V

0.748V

1.196V1.228V1.260V1.292V

12

12

C190
10UF

12

+

CE20

220UF/2V

/*

12

C463

0.1UF

C191
10UF

NEAR CPU
PIN W4

12

12

C188

C478

10UF

10UF

H_PWRGD_ITP<4>

CTL_CLK<8>
CTL_DATA<8>

+2.5VS

NEAR CPU
PIN P23

12

0.1UF

C474

12

C471

0.1UF

+VCCP

R127

75Ohm

1 2

R452 0Ohm

H_THRMTRIP_S#<4>

GMCH_THRMTRIP#<8>

BUF_PLT_RST#<8,17,18,22,24,27,36>

12

R457 0Ohm

12

/*

R498

2.2KOhm

/*

1 2

+VCCP

Q90

E12

PMBS3904

1 2

B

R445

330Ohm

C

1 2

3

R497

2.2KOhm

/*

1 2

C457

0.1UF

H_BPM#5<4>
H_BPM#4<4>

H_BPM#3<4>
H_BPM#2<4>

H_BPM#1<4>
H_BPM#0<4>

TCK<4>

R458

27.4Ohm

1%

S

2

G

1

T257

1

T256

1

T83

1

T82

1

T258

1

T79

1

T124

1

T277

1

T273

1

D

Q84

3

2N7002

T245

H_THRMTRIP# <17>

OTP_RESET# <43,48>

12

1

A A

CPU CAP/THERMAL

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

657Thursday, June 09, 2005

Rev

2.0

5

D D

R478

24.9Ohm

1%

1 2

+VCCP

R479

54.9Ohm

1%

1 2

+VCCP

R474

221Ohm

1%

+VCCP

+VCCP

1 2

1 2

1 2

1 2

1 2

R473
100Ohm

1%

1 2

R472

24.9Ohm

1%

R476

54.9Ohm

1%

R470
221Ohm

1%

R471

100Ohm

1%

/*

12

/*

H_YSWING

12

H_XSWING

C491
10UF/10V

C490
10UF/10V

C C

B B

H_XRCOMP

H_XSCOMP

H_YRCOMP

H_YSCOMP

4

U49 Original P/N is 02-010002600(ALVISO-PM)
Z61AE R1.0 use C0 version part number is 02-010002610 (ALVISO GM)
U49 need to change to new C1 version 02-010002640 (INTEL ALVISO-GM SL8G2)
R1.1 has changed it in symbol.

H_D#[0..63]<4>

12

C494

0.1UF

12

C489

0.1UF

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING

3

U49D

E4

HD0#

E1

HD1#

F4

HD2#

H7

HD3#

E2

HD4#

F1

HD5#

E3

HD6#

D3

HD7#

K7

HD8#

F2

HD9#

J7

HD10#

J8

HD11#

H6

HD12#

F3

HD13#

K8

HD14#

H5

HD15#

H1

HD16#

H2

HD17#

K5

HD18#

K6

HD19#

J4

HD20#

G3

HD21#

H3

HD22#

J1

HD23#

L5

HD24#

K4

HD25#

J5

HD26#

P7

HD27#

L7

HD28#

J3

HD29#

P5

HD30#

L3

HD31#

U7

HD32#

V6

HD33#

R6

HD34#

R5

HD35#

P3

HD36#

T8

HD37#

R7

HD38#

R8

HD39#

U8

HD40#

R4

HD41#

T4

HD42#

T5

HD43#

R1

HD44#

T3

HD45#

V8

HD46#

U6

HD47#

W6

HD48#

U3

HD49#

V5

HD50#

W8

HD51#

W7

HD52#

U2

HD53#

U1

HD54#

Y5

HD55#

Y2

HD56#

V4

HD57#

Y7

HD58#

W1

HD59#

W3

HD60#

Y3

HD61#

Y6

HD62#

W2

HD63#

C1

HXRCOMP

C2

HXSCOMP

D1

HXSWING

T1

HYRCOMP

L1

HYSCOMP

P1

HYSWING

ALVISO_BGA1257

02-010002640

HADSTB0#
HADSTB1#

HBREQ0#

HCPURST#

HCLKINN
HCLKINP

HOST

HDBSY#

HDEFER#

HDINV0#
HDINV1#
HDINV2#
HDINV3#
HDPWR#

HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#

HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#

HEDRDY#

HHITM#

HLOCK#

HPCREQ#

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#

HCPUSLP#

HTRDY#

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#

HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HADS#

HVREF
HBNR#
HBPR#

HHIT#

HRS0#
HRS1#
HRS2#

G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13

F8
B9
E13
J11
A5
D5
E7
H10

R225 22.6Ohm

AB1
AB2

C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_ADS#
H_ADSTB#0
H_ADSTB#1

H_BNR#
H_BPRI#
H_BR0#
H_CPURST#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2

H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
TP_H_EDRDY#

TP_H_PCREQ#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

12

/*1%

2

H_ADS# <4>
H_ADSTB#0 <4>
H_ADSTB#1 <4>

H_BNR# <4>
H_BPRI# <4>
H_BR0# <4>
H_CPURST# <4>

H_CPURST#_ITP <6>
CLK_MCH_BCLK# <21>

CLK_MCH_BCLK <21>
H_DBSY# <4>

H_DRDY# <4>
H_DSTBN#0 <4>
H_DSTBN#1 <4>
H_DSTBN#2 <4>
H_DSTBN#3 <4>
H_DSTBP#0 <4>
H_DSTBP#1 <4>
H_DSTBP#2 <4>
H_DSTBP#3 <4>

H_HIT# <4>
H_HITM# <4>
H_LOCK# <4>

H_REQ#0 <4>
H_REQ#1 <4>
H_REQ#2 <4>
H_REQ#3 <4>
H_REQ#4 <4>

H_A#[3..31] <4>

H_DEFER# <4>
H_DINV#0 <4>
H_DINV#1 <4>
H_DINV#2 <4>
H_DINV#3 <4>
DPWR# <4>

T121

1

T274

1

H_RS#0 <4>
H_RS#1 <4>
H_RS#2 <4>
H_CPUSLP# <4,17>
H_TRDY# <4>

+VCCP

1 2

1 2

R216
100Ohm

1%

R217
200Ohm

1%

1

12

C257

0.1UF

A A

Title :

Alviso--CPU (1)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

757Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

SDVO SMbus have

D D

DMI_TXN[0..3]<18>

DMI_TXP[0..3]<18>

DMI_RXN[0..3]<18>

DMI_RXP[0..3]<18>

T63

TP_SMCK2

1

T70

TP_SMCK5

1

T69

TP_SMCK#2

1

T72

C C

Layout Note:
Route as short
as possible.

R677

R678

40.2Ohm

40.2Ohm

1%

1%

1 2

B B

TP_SMCK#5

1

1 2

+1.8V

R150

1 2

80.6Ohm

1%

DCLK0<13>
DCLK1<13>

DCLK3<12>
DCLK4<12>

DCLK0#<13>
DCLK1#<13>

DCLK3#<12>
DCLK4#<12>

SCKE0<13,14>
SCKE1<13,14>
SCKE2<12,14>
SCKE3<12,14>

SCS0#<13,14>
SCS1#<13,14>
SCS2#<12,14>
SCS3#<12,14>

M_OCDCOMP0
M_OCDCOMP1

ODT0<13,14>
ODT1<13,14>
ODT2<12,14>
ODT3<12,14>

M_RCOMPN
M_RCOMPP

R158

80.6Ohm

1%

1 2

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

VTT_REF

SMXSLEW
SMYSLEW

Zo=55 ohm
Zo=55 ohm

AA31
AB35
AC31
AD35

AA35
AB31
AC35

AA33
AB37
AC33
AD37

AA37
AB33
AC37

AM33
AE11

AJ34
AC10
AN33
AE10

AJ33
AD10
AP21

AM21
AH21
AK21

AN16
AM14
AH15
AG16

AF22

AF16
AP14

AL15
AM11
AN10

AK10
AK11

AF37
AE27

AE28

AF10

Y31

Y33

AL1

AF6

AK1

AF5

AD1

AF9

U49A

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMITXP0
DMITXP1
DMITXP2
DMITXP3

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

ALVISO_BGA1257

02-010002640

G16

CFG0

H13

CFG1

G14

CFG2

F16

CFG3

F15

CFG4

G15

CFG5

E16

CFG6

D17

CFG7

J16

CFG8

D15

CFG9

E15

CFG10

D14

CFG11

E14

CFG12

H12

CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19

CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

PM

THRMTRIP#

PWROK

RSTIN#

DREF_CLKN
DREF_CLKP

DREF_SSCLKN

CLK

DREF_SSCLKP

NC

NC10
NC11

C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
C37
D37

AP37

NC1

AN37

NC2

AP36

NC3

AP2

NC4

AP1

NC5

AN1

NC6

B1

NC7

A2

NC8

B37

NC9

A36
A37

DMIDDR MUXING

R229 1KOhm

CFG3

1

CFG4

1

CFG5
CFG6
CFG7
CFG8

1

CFG9
CFG10

1

CFG11

1

CFG12

1

CFG13

1

CFG14

1

CFG15

1

CFG16
CFG17

1

CFG18

TPC28t

CFG19
CFG20

1

1

1

1

1

1

1

1

PM_EXTTS#0
PM_EXTTS#1

MCH_PWROK

12

R173 100Ohm

1%

TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
TP_NC10
TP_NC11

12

T122

1
1
1
1
1
1
1
1
1
1
1

internal pull down

+2.5VS

MCH_SEL1 <21>
MCH_SEL0 <21>

T116
T120

CFG5 <11>
CFG6 <11>
CFG7 <11>

T123

CFG9 <11>

T137
T135
T125
T115
T140
T138

CFG16 <11>
CFG18 <11>

CFG19 <11>

T132
T126
T109
T131
T142
T146
T133
T136

LCD_BACKEN_GM<15>

PM_BMBUSY# <17>

GMCH_THRMTRIP# <6>
BUF_PLT_RST# <6,17,18,22,24,27,36>

T47
T49
T48
T51
T54
T53
T268
T275
T267
T272
T271

LCD_VDD_EN_GM<15>

DREFCLK# <21>
DREFCLK <21>
DREFSSCLK# <21>
DREFSSCLK <21>

SDVOCRTL_DATA Int PD
0 : No SDVO device
1 : SDVO device present

T106
T103

CLK_MCH_3GPLL#<21>

CLK_MCH_3GPLL<21>

DDC2BC_GM<16>
DDC2BD_GM<16>

DAC_B_GM<16>
DAC_G_GM<16>
DAC_R_GM<16>

ADJ_BL_GM<15>

CTL_CLK<6>

CTL_DATA<6>
DDCCLK_GM<15>
DDCDATA_GM<15>

LVDS_CLKAM_GM<15>

LVDS_CLKAP_GM<15>

LVDS_CLKBM_GM<15>

LVDS_CLKBP_GM<15>

LVDS_YA0M_GM<15>
LVDS_YA1M_GM<15>
LVDS_YA2M_GM<15>

LVDS_YA0P_GM<15>
LVDS_YA1P_GM<15>
LVDS_YA2P_GM<15>

LVDS_YB0M_GM<15>
LVDS_YB1M_GM<15>
LVDS_YB2M_GM<15>

LVDS_YB0P_GM<15>
LVDS_YB1P_GM<15>
LVDS_YB2P_GM<15>

SDVO_SMDATA

1

SDVO_SMCLK

1

TVDAC_A_GM
TVDAC_B_GM
TVDAC_C_GM
TV_REFSET_GM
TVDAC_A_GM#
TVDAC_B_GM#
TVDAC_C_GM#

DAC_B_GM
DAC_B_GM#
DAC_G_GM
DAC_G_GM#
DAC_R_GM
DAC_R_GM#
VSYNC_GM
HSYNC_GM
REFSET_GM

T143

1

T141

1

T150

1

T145

1

DDCCLK_GM
DDCDATA_GM

L_IBG
L_LVBG
L_LVREFH
L_LVREFL

Disable TV_OUT :
TVDAC A/B/C and TVIRTN A/B/C and TV_REFSET
and VCCA_TVDAC A/B/C ... ( ALL TV POWER )
connect to GND

U49F

H24

AB29
AC29

H25

A15
C16
A17

J18
B15
B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

J20

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

B30
B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CRTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

ALVISO_BGA1257

02-010002640

EXP_COMPI

EXP_ICOMPO

EXP_RXN0

MISCTVVGALVDS

EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

EXP_TXN8

EXP_TXN9

PCI-EXPRESS GRAPHICS

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D36
D34

E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

PCI-E signals can be left NC, If unused.

+1.8V

R725

10KOhm

1 2

12

C725

R726

0.01UF
10KOhm

1 2

A A

+5V

12

C724

0.1UF

VTT_REF

52

U65

V+

1

+

4

3

­V-

LMV321

5

T340

1

12

C726

1UF/10V

MCH_PWROK

DAC_B_GM
DAC_G_GM
DAC_R_GM
REFSET_GM

255 ohm main source is 10G213255013010.
Second source is 10-003412515.

DAC_VSYNC_GM<16>
DAC_HSYNC_GM<16>

4

1 2

R202 0Ohm /*

1 2

R203 0Ohm

R246 150Ohm

1 2

R252 150Ohm

1 2

R253 150Ohm

1 2

R501 255Ohm

1 2

10G213255013010

R222

1 2

R227

39Ohm

1 2

39Ohm

VCC_MCH_VRPWRGD <44,48>
ICH6_PWROK <17,43>

DAC_B_GM#
DAC_G_GM#
DAC_R_GM#

VSYNC_GM
HSYNC_GM

+2.5VS

PM_EXTTS#0

RN50A

1 2

10KOhm

3 4

10KOhm

5 6

10KOhm

7 8

10KOhm

R499

1 2

1.5KOhm 1%

3

RN50B
RN50C
RN50D

L_IBG

PM_EXTTS#1
DDCDATA_GM
DDCCLK_GM

Title :

Z61Ae

ASUSTECH CO.,LTD.

Size Project Name

C

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

857Thursday, June 09, 2005

Rev

2.0

5

D D

4

3

2

1

M_A_DQ[0..63]<13> M_B_DQ[0..63]<12>

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AG35
AH35

AL35
AL37

AH36

AJ35

AK37

AL34
AM36
AN35
AP32
AM31
AM34
AM35

AL32
AM32
AN31
AP31
AN28
AP28

AL30
AM30
AM28

AL28
AP27
AM27
AM23
AM22

AL23
AM24
AN22
AP22

AP11
AP10

AM9
AL9
AL6
AP7

AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5

U49B

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

ALVISO_BGA1257

02-010002640

AK15

SA_BS0#

AK16

SA_BS1#

AL21

SA_BS2#

AJ37

SA_DM0

AP35

SA_DM1

AL29

SA_DM2

AP24

SA_DM3

AP9

SA_DM4

AP4

SA_DM5

AJ2

SA_DM6

AD3

SA_DM7

AK36

SA_DQS0

AP33

SA_DQS1

AN29

SA_DQS2

AP23

SA_DQS3

AM8

SA_DQS4

AM4

SA_DQS5

AJ1

SA_DQS6

AE5

SA_DQS7

AK35

SA_DQS0#

AP34

SA_DQS1#

AN30

SA_DQS2#

AN23

SA_DQS3#

AN8

SA_DQS4#

AM5

SA_DQS5#

AH1

SA_DQS6#

AE4

SA_DQS7#

AL17

SA_MA0

AP17

SA_MA1

AP18

SA_MA2

AM17

SA_MA3

AN18

SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#

SA_RCVENIN#

SA_WE#

AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15

AN15
AP16
AF29
AF28
AP15

DDR SYSTEM MEMORY A

SA_RCVENOUT#

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

TP_MA_RCVENIN#
TP_MA_RCVENOUT#

M_A_BS#0 <13,14>
M_A_BS#1 <13,14>
M_A_BS#2 <13,14>

M_A_DM[0..7] <13>

M_A_DQS[0..7] <13>

M_A_DQS#[0..7] <13>

M_A_A[0..13] <13,14>

T57 TPC28t

1

T65 TPC28t

1

M_A_CAS# <13,14>
M_A_RAS# <13,14>

M_A_WE# <13,14>

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AE31
AE32
AG32
AG36
AE34
AE33

AF31

AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31

AJ31
AK30

AJ30
AH29
AH28
AK29
AH30
AH27
AG28

AF24
AG23

AJ22
AK22
AH24
AH23
AG22

AJ21
AG10

AH11
AH10

AG9
AG8
AH8

AJ9

AK9

AJ7

AK6

AJ4
AH5
AK8

AJ8

AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

U49C

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

ALVISO_BGA1257

02-010002640

AJ15

SB_BS0#

AG17

SB_BS1#

AG21

SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7

DDR SYSTEM MEMORY B

SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

SB_WE#

M_B_DM0

AF32

M_B_DM1

AK34

M_B_DM2

AK27

M_B_DM3

AK24

M_B_DM4

AJ10

M_B_DM5

AK5

M_B_DM6

AE7

M_B_DM7

AB7

M_B_DQS0

AF34

M_B_DQS1

AK32

M_B_DQS2

AJ28

M_B_DQS3

AK23

M_B_DQS4

AM10

M_B_DQS5

AH6

M_B_DQS6

AF8

M_B_DQS7

AB4

M_B_DQS#0

AF35

M_B_DQS#1

AK33

M_B_DQS#2

AK28

M_B_DQS#3

AJ23

M_B_DQS#4

AL10

M_B_DQS#5

AH7

M_B_DQS#6

AF7

M_B_DQS#7

AB5
AH17

AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15

AH14
AK14

TP_MB_RCVENIN#

AF15

TP_MB_RCVENOUT#

AF14
AH16

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

M_B_BS#0 <12,14>
M_B_BS#1 <12,14>
M_B_BS#2 <12,14>

T60 TPC28t

1

T62 TPC28t

1

M_B_DM[0..7] <12>

M_B_DQS[0..7] <12>

M_B_DQS#[0..7] <12>

M_B_A[0..13] <12,14>

M_B_CAS# <12,14>
M_B_RAS# <12,14>

M_B_WE# <12,14>

A A

Title :

Alviso--DDR2 (3)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

957Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

3

246

135

1

D67
BAT54C

/*

8

7

+2.5VS +3VS

+VCC_GMCH_CORE +1.5VS

1

2

3

246

135

D38
BAT54C

8

7

RN49
10Ohm

RN52A
22Ohm

2

1

D41
BAT54C

3

RN52D
22Ohm

3 4

7 8

5 6

1 2

RN52B

RN52C

22Ohm

22Ohm

R1.1-S18

12

C760

0.1UF

+2.5VS

R10

P10

N10

M10

K10

J10

VTT18

VTT19

VTT20

VTT21

VTT22

VTT23Y9VTT24W9VTT25U9VTT26R9VTT27P9VTT28N9VTT29M9VTT30L9VTT31J9VTT32N8VTT33M8VTT34N7VTT35M7VTT36N6VTT37M6VTT39N5VTT40M5VTT41N4VTT42M4VTT43N3VTT44M3VTT45N2VTT46M2VTT47B2VTT48V1VTT49N1VTT50M1VTT51

VCCSM59

VCCSM60

VCCSM61

VCCSM62

VCCSM63

VCCSM64

AB9

AP8

AE1

AM1

AB11

AB10

AC11

Note: All VCCSM pins
shorted internally.

V1.8_DDR_CAP6
V1.8_DDR_CAP4
V1.8_DDR_CAP3

12

C503
10UF/10V

0.1UF

+1.5VS

12

C237

0.1UF

Place near pin
A25, B25, B26

VCC_SYNC

12

+

CE17

150U/4.0V

R784 0Ohm
R785 0Ohm

W10

V10

U10

T10

VTT14

VTT15

VTT16

VTT17

VCCSM55

VCCSM56

VCCSM57

VCCSM58

AF12

AE12

AD11

AG12

12

C207

0.1UF

12

+1.5VS_MPLL

1 2
1 2

L11

K11

VTT11

VTT12

VTT13

VCCSM52

VCCSM53

VCCSM54

AJ12

AH12

C224
10UF/10V

+1.5VS

+1.5VS_HPLL

12

+

AE17

12

AA2

VCCSM33

AE18

+

AA1

VCCA_HPLL

VCCA_MPLL

VCCSM31

VCCSM32

AE19

12

CE28
150U/4.0V

C35

AE20

C461

0.1UF

12

VCCA_DPLLB

VCCSM30

B23

VCCA_DPLLA

VCCSM29

AE21

C501

0.01UF

AC1

AE22

AC2

VCCH_MPLL0

VCCSM28

AE23

CE12

150U/4.0V

12

+

VCCH_MPLL1

VCCSM26

VCCSM27

AE24

12

CE14

150U/4.0V

K18

K17

VCC47

VCC48

VCCSM24

VCCSM25

AF25

AE25

C459

0.1UF

L76

21

120Ohm/100Mhz

12

C476

0.1UF

VCCA_CRTDAC
VCC_SYNC

/*

H20

K13

J13

K12

W11

V11

U11

T11

R11

P11

N11

M11

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VCCSM45

VCCSM46

VCCSM47

VCCSM48

VCCSM49

VCCSM50

VCCSM51

AL12

AF13

AE13

AP12

AK12

AN12

AG13

AM12

12

12

C458

C449

0.1UF

0.1UF

C186

10UF/10V

G19

F19

E19

VTT0

VTT1

VTT2

VTT3

VCC_SYNC

VSSA_CRTDAC

VCCA_CRTDAC0

VCCA_CRTDAC1

VCCSM34

VCCSM35

VCCSM36

VCCSM37

VCCSM38

VCCSM39

VCCSM40

VCCSM41

VCCSM42

VCCSM43

VCCSM44

AJ13

AL13

AE16

AE15

AE14

AP13

AK13

AN13

AH13

AM13

Note: All VCCSM pins
shorted internally.

12

C454

0.1UF

+1.8V

12

12

C453

0.1UF

+2.5VS

12

C500

0.1UF

12

C223

0.1UF

+1.5VS_DPLLB

12

U19

K19

W18

V18

T18

VCC43

VCC44

VCC45

VCC46

POWER

VCCSM20

VCCSM21

VCCSM22

VCCSM23

AJ25

AL25

AK25

AH25

AG25

L38

120Ohm/100Mhz

120Ohm/100Mhz

C271

0.1UF

T20

K20

V19

VCC39

VCC40

VCC41

VCC42

VCCSM16

VCCSM17

VCCSM18

VCCSM19

AP25

AN25

AM25

V1.8_DDR_CAP5
V1.8_DDR_CAP2
V1.8_DDR_CAP1

+2.5VS

21

L43

W20

U20

VCC37

VCC38

VCCSM14

VCCSM15

AF26

AE26

C509
10UF/10V

+1.5VS_DPLLA

12

+

CE15

150U/4.0V

21

U27

T27

R27

P27

N27

M27

L27

K27

J27

H27

K26

H26

K25

J25

K24

K23

K22

K21

VCC19

VCC20

VCC21

VCC22

VCC23

VCC24

VCC25

VCC26

VCC27

VCC28

VCC29

VCC30

VCC31

VCC32

VCC33

VCC34

VCC35

VCC36

VCCHV0

VCCHV1

VCCHV2

VCCSM0

VCCSM1

VCCSM2

VCCSM3

VCCSM4

VCCSM5

VCCSM6

VCCSM7

VCCSM8

VCCSM9

VCCSM10

VCCSM11

VCCSM12

VCCSM13

B22

B21

AJ26

AL26

AP26

AK26

AN26

AH26

AG26

AM26

12

12

C502

0.1UF

A21

AP29

AH37

AD28

AD27

AC27

AM37

+1.5VS

12

12

V27

C498

0.1UF

VCC18

C272

0.1UF

G28

A35

VCC17

VCCA_LVDS

12

H28

J28

VCC16

A25

12

C250
10UF/10V

L28

K28

VCC14

VCC15

VCCD_LVDS1

VCCD_LVDS2

B26

B25

C497

0.01UF

L42

120Ohm/100Mhz

12

C244
10UF/10V

R28

P28

N28

M28

VCC10

VCC11

VCC12

VCC13

VCCD_TVDAC

VCCDQ_TVDAC

VCCD_LVDS0

D19

H17

VCCDQ_TVDAC

VCCD_TVDAC

21

U28

T28

VCC7

VCC8

VCC9

VCCA_TVBG

VSSA_TVBG

H18

G18

VCCA_TVBG

12

C247
10UF/10V

K29

J29

V28

VCC4

VCC5

VCC6

VCCA_TVDACC0

VCCA_TVDACC1

F18

E18

VCCA_TVDACC

12

C236

0.1UF

T29

R29

N29

M29

U49G

ALVISO_BGA1257

VCC0

VCC1

VCC2

VCC3

02-010002640

VCCA_TVDACA0

VCCA_TVDACA1

VCCA_TVDACB0

VCCA_TVDACB1

F17

E17

D18

C18

Disable TV_OUT

VCCA_TVDACA

==> All TV POWER short to GND

VCCA_TVDACB

Place near pin A35

R857

1 2

4.3Ohm

C762

2.2UF/16V

R1.1-S32

+2.5VS_CRTDAC

R783
0Ohm

/*

1 2

12

12

C496

0.1UF

12

C495

0.1UF

+1.5VS

+1.5VS

120Ohm/100Mhz

+VCCP

VCCP_GMCH_CAP1
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3

12

C492

0.1UF

12

C475

0.1UF

L37

21

120Ohm/100Mhz

L78

21

C759
1UF

1.05V

CE13
150U/4.0V

/*

CAP4

G1

1 2

+2.5VS

+1.5VS_3GPLL

12

+1.5VS

12

C265

0.1UF

12

C233

0.1UF

+

CE18

150U/4.0V

/*

12

12

+

VCCA_3GPLL2

VCCA_3GBG

VSSA_3GBG

F37

Y27

G37

12

+1.5VS_PCIE

12

L36

120Ohm/100Mhz

C267

0.01UF

VCCA_3GPLL1

Y29

Y28

C239
10UF/10V

C248

0.1UF

21

VCCA_3GPLL0

12

12

C243

0.1UF

A6

VTT38

VCC3G2

VCC3G3

VCC3G4

VCC3G5

VCC3G6

J37

L37

U37

R37

N37

12

C241
10UF/10V

+1.5VS_DDRDLL

12

C261

0.1UF

VCC3G1

W37

C205

0.1UF

12

AE37

C240
10UF/10V

R1.1-S18

VCCA_SM3

VCC3G0

AF19

AF18

12

+

150U/4.0V

VCCA_SM2

CE10

VCCA_SM1

AP19

+2.5VS

AF20

VCCA_SM0

+2.5VS_CRTDAC

VCCTX_LVDS0

VCCTX_LVDS1

VCCTX_LVDS2

B28

A28

A27

12

C499

R1.1-S18

Int VGA

+2.5VS

12

C761

0.1UF

D D

C C

B B

+VCC_GMCH_CORE

2

R1.1-S18

RN60
10Ohm

/*

+2.5VS_CRTDAC

+VCC_GMCH_CORE

1.05V

12

12

C246

C255

0.1UF

0.1UF

1.8V: 1A for DDR2 400 1 channel
2A for DDR2 400 2 channel

1.3A for DDR2 533 1 channel

2.7A for DDR2 533 2 channel

1.05VS:850mA for CPU
3100mA for external gfx

1.5VS: 1264mA

2.5VS: 293mA
3VS: 120mA

A A

Title :

Alviso--POWER (4)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

10 57Thursday, June 09, 2005

Rev

2.0

5

D D

AL24

AN24

A26

E26

G26

J26

B27

E27

G27

W27

AA27

AB27

AF27

AG27

AJ27

AL27

AN27

E28

W28

AA28

AB28

AC28

A29

VSS267

VSS266

VSS265

VSS264

VSS263

VSS262

VSS261

VSS129

VSS128

VSS127

VSS126

VSS125

VSS124

VSS123

VSS122

VSS121

VSS120

VSS119

VSS118

VSS117

VSS116

VSS115

4

D29

E29

F29

G29

H29

L29

P29

U29

V29

W29

AA29

AD29

AG29

AJ29

AM29

C30

Y30

AA30

AB30

AC30

AE30

AP30

D31

E31

F31

G31

H31

J31

K31

L31

M31

N31

P31

R31

T31

U31

V31

W31

AD31

AG31

VSS99

VSS98

VSS97

VSS96

VSS95

VSS94

VSS93

VSS92

VSS91

VSS90

VSS89

VSS88

VSS87

VSS86

VSS85

VSS84

VSS83

VSS82

VSS81

VSS80

VSS79

VSS78

VSS77

VSS76

VSS114

VSS113

VSS112

VSS111

VSS110

VSS109

VSS108

VSS107

VSS106

VSS105

VSS104

VSS103

VSS102

VSS101

VSS100

VSS75

3

AL31

A32

C32

Y32

AA32

AB32

AC32

AD32

AJ32

AN32

D33

E33

F33

G33

H33

J33

K33

L33

M33

N33

P33

R33

T33

U33

V33

W33

AD33

AF33

AL33

C34

AA34

AB34

AC34

AD34

AH34

AN34

B35

D35

E35

F35

VSS74

VSS73

VSS72

VSS71

VSS70

VSS69

VSS68

VSS67

VSS66

VSS65

VSS64

VSS63

VSS62

VSS61

VSS60

VSS59

VSS58

VSS57

VSS56

VSS55

VSS54

VSS53

VSS52

VSS51

VSS50

VSS49

VSS48

VSS47

VSS46

VSS45

VSS44

VSS43

VSS42

VSS41

VSS40

VSS39

VSS38

VSS37

VSS36

VSS35

2

AN36

E37

H37

K37

M37

P37

T37

V37

Y37

VSS8

VSS7

VSS6

VSS5

VSS4

VSS3

VSS2

AG37

U49H

ALVISO_BGA1257

VSS1

VSS0

02-010002640

G35

H35

J35

K35

L35

M35

N35

P35

R35

T35

U35

V35

W35

Y35

AE35

C36

AA36

AB36

AC36

AD36

AE36

AF36

AJ36

AL36

VSS34

VSS33

VSS32

VSS31

VSS30

VSS29

VSS28

VSS27

VSS26

VSS25

VSS24

VSS23

VSS22

VSS21

VSS20

VSS19

VSS18

VSS17

VSS9

VSS16

VSS15

VSS14

VSS13

VSS12

VSS11

VSS10

1

VSS

VSSALVDS

VSS271Y1VSS270D2VSS269G2VSS268J2VSS260L2VSS259P2VSS258T2VSS257V2VSS256

B36

VSS255

VSS254

VSS253

VSS252

VSS251A3VSS250C3VSS249

VSS248

VSS247

VSS246

VSS245C4VSS244H4VSS243L4VSS242P4VSS241U4VSS240Y4VSS239

VSS238

VSS237E5VSS236W5VSS235

VSS234

VSS233B6VSS232J6VSS231L6VSS230P6VSS229T6VSS228

VSS227

VSS226

VSS225

VSS224G7VSS223V7VSS222

VSS221

VSS220

VSS219

VSS218C8VSS217E8VSS216L8VSS215P8VSS214Y8VSS213

VSS212A9VSS211H9VSS210K9VSS209T9VSS208V9VSS207

VSS206

VSS205

VSS204

VSS203

VSS202

VSS201

VSS200

VSS199

VSS198

VSS197

VSS196

VSS195

VSS194

VSS193

VSS192

VSS191

VSS190

VSS189

VSS188

VSS187

VSS186

VSS185

VSS184

VSS183

VSS182

VSS181

VSS180

VSS179

VSS178

VSS177

VSS176

VSS175

VSS174

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS166

VSS165

VSS164

VSS162

VSS161

VSS160

VSS159

VSS158

VSS157

VSS156

VSS155

VSS154

VSS153

VSS152

VSS151

VSS150

VSS149

VSS148

VSS147

VSS146

VSS145

VSS144

VSS143

VSS142

VSS141

VSS140

VSS139

VSS138

VSS137

VSS136

VSS135

VSS134

VSS133

VSS132

VSS131

VSS163

J12

AJ3

AL2

AE2

AA3

AD2

AB3

AH2

AN2

AC3

AL5

AF4

AP5

AN4

AJ6

AA6

AE6

AA7

AC6

AG7

AL8

AK7

AN7

L10

F11

Y10

Y11

D10

AA9

AE9

AC9

H11

AH9

AN9

AJ11

AL11

AF11

AA10

AA11

AG11

J14

F14

B12

A14

B14

K14

K15

A16

D12

AN11

AJ14

AG14

K16

C15

D16

H16

C17

G17

AL14

AN14

AJ17

AL16

AF17

J19

T19

A18

B18

C19

H19

U18

AL18

AN17

F20

A20

E20

V20

D20

G20

W19

AG19

AK20

AN19

J22

F21

A22

E22

C21

D22

AL22

AF21

AN21

AH22

VSS130

J24

F24

B24

H23

D24

AJ24

AF23

AG24

+1.8V

AC22

AD22

AC23

AD23

AC24

AD24

AC25

AD25

AC26

AD26

L17

M17

N17

P17

T17

U17

V17

W17

L18

M18

N18

P18

R18

Y18

L19

M19

N19

P19

R19

Y19

L20

M20

N20

P20

R20

Y20

L21

M21

N21

P21

T21

U21

V21

W21

L22

M22

N22

P22

R22

T22

U22

V22

W22

L23

M23

N23

P23

R23

T23

U23

V23

W23

L24

M24

N24

P24

R24

T24

U24

V24

W24

L25

M25

N25

P25

R25

T25

U25

AB12

AC12

AD12

AB13

AC13

AD13

AC14

AD14

AC15

AD15

AC16

AD16

AC17

AD17

AC18

AD18

AC19

AD19

AC20

AD20

AC21

C C

VCCSM_NCTF31

VCCSM_NCTF30

VCCSM_NCTF29

VCCSM_NCTF28

VCCSM_NCTF27

VCCSM_NCTF26

VCCSM_NCTF25

VCCSM_NCTF24

VCCSM_NCTF23

VCCSM_NCTF22

VCCSM_NCTF21

VCCSM_NCTF20

VCCSM_NCTF19

+VCC_GMCH_CORE

AD21

VCC_NCTF78

VCC_NCTF77

VCC_NCTF76

VCC_NCTF75

VCC_NCTF74

VCC_NCTF73

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF63

VCC_NCTF62

VCC_NCTF61

VCC_NCTF60

VCC_NCTF59

VCC_NCTF58

VCC_NCTF57

VCC_NCTF56

VCC_NCTF55

VCC_NCTF54

VCC_NCTF53

VCC_NCTF52

VCC_NCTF51

VCC_NCTF50

VCC_NCTF49

VCC_NCTF48

VCC_NCTF47

VCC_NCTF46

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF42

VCC_NCTF41

VCC_NCTF40

VCC_NCTF39

VCC_NCTF38

VCC_NCTF37

VCC_NCTF36

VCC_NCTF35

VCC_NCTF34

VCC_NCTF33

VCC_NCTF32

VCC_NCTF31

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCCSM_NCTF9

VCCSM_NCTF8

VCCSM_NCTF7

VCCSM_NCTF6

VCCSM_NCTF5

VCCSM_NCTF4

VCCSM_NCTF3

VCCSM_NCTF2

VCCSM_NCTF1

VCCSM_NCTF18

VCCSM_NCTF17

VCCSM_NCTF16

VCCSM_NCTF15

VCCSM_NCTF14

VCCSM_NCTF13

VCCSM_NCTF12

VCCSM_NCTF11

VCCSM_NCTF10

VTT_NCTF17

VTT_NCTF16

VTT_NCTF15

VTT_NCTF14

L12

P12

N12

M12

VCCSM_NCTF0

VTT_NCTF13

VTT_NCTF12

VTT_NCTF11

VTT_NCTF10

VTT_NCTF9

VTT_NCTF8

VTT_NCTF7

VTT_NCTF6

VTT_NCTF5

VTT_NCTF4

VTT_NCTF3

VTT_NCTF2

VTT_NCTF1

VTT_NCTF0

VSS_NCTF68

VSS_NCTF67

VSS_NCTF66

VSS_NCTF65

VSS_NCTF64

VSS_NCTF63

L13

T12

R12

U12

T13

V12

P13

V13

N13

R13

U13

M13

W12

W13

L14

Y12

Y13

M14

AA12

AA13

NCTF

VSS_NCTF62

VSS_NCTF61

VSS_NCTF60

VSS_NCTF59

VSS_NCTF58

VSS_NCTF57

VSS_NCTF56

VSS_NCTF55

VSS_NCTF54

VSS_NCTF53

VSS_NCTF52

VSS_NCTF51

VSS_NCTF50

VSS_NCTF49

VSS_NCTF48

VSS_NCTF47

VSS_NCTF46

VSS_NCTF45

VSS_NCTF44

VSS_NCTF43

VSS_NCTF42

VSS_NCTF41

VSS_NCTF40

VSS_NCTF39

VSS_NCTF38

VSS_NCTF37

VSS_NCTF36

VSS_NCTF35

VSS_NCTF34

VSS_NCTF33

VSS_NCTF32

VSS_NCTF31

VSS_NCTF30

VSS_NCTF29

VSS_NCTF28

VSS_NCTF27

L15

T14

P14

V14

Y14

N14

R14

U14

P15

N15

R15

M15

W14

AA14

AB14

L16

T15

V15

Y15

U15

W15

T16

P16

V16

Y16

N16

R16

M16

AA15

AB15

Y17

U16

R17

W16

AA16

AB16

VCC_NCTF19

VSS_NCTF26

VSS_NCTF25

VSS_NCTF24

VSS_NCTF23

VSS_NCTF22

VSS_NCTF21

VSS_NCTF20

VSS_NCTF19

AA17

R21

AB17

AA18

AB18

AA19

AB19

AA20

AB20

V25

VCC_NCTF18

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF14

VCC_NCTF13

VCC_NCTF12

VCC_NCTF11

VCC_NCTF10

VSS_NCTF18

VSS_NCTF17

VSS_NCTF16

VSS_NCTF15

VSS_NCTF14

VSS_NCTF13

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

Y21

Y22

Y23

AA21

AB21

AA22

AB22

AA23

+VCC_GMCH_CORE

W25

L26

M26

N26

P26

R26

T26

U26

V26

W26

U49E

ALVISO_BGA1257

02-010002640

VCC_NCTF9

VCC_NCTF8

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF3

VCC_NCTF2

VCC_NCTF1

VCC_NCTF0

VSS_NCTF9

VSS_NCTF8

VSS_NCTF7

VSS_NCTF6

VSS_NCTF5

VSS_NCTF4

VSS_NCTF3

VSS_NCTF2

VSS_NCTF1

VSS_NCTF0

Y24

Y25

Y26

AB23

AA24

AB24

AA25

AB25

AA26

AB26

NCTF pin can share the via each other or even leave NC

CFG5 : LOW = DMI X 2

V

B B

CFG5<8>

HIGH = DMI X 4 (Default)

R245

2.2KOhm

/*

1 2

CFG7 : CPU STRAP

CFG7<8>

LOW = Mobile Prescott

V

HIGH = Dothan CPU (Default)

R251

2.2KOhm

/*

1 2

CFG9 : PCIE GRAPHIC LANE

CFG9<8>

R249

2.2KOhm

/*

1 2

CFG18 : GMCH CORE SELECT

+2.5VS

V

R238

1KOhm

/*

1 2

CFG18<8>

LOW = REVERSE LANE

V

HIGH = NORMAL OPERATION (Default)

LOW = 1.05V (Default)
HIGH = 1.5V

CFG16 : FSB DYNAMIC ODT

CFG16<8>

CFG [ 2 : 0 ]
533 0 0 1
400 1 0 1

SDVOCRTL_DATA :
LOW = No SDVO device present (Default)

CFG[17..3] have internal pullup resistors.
CFG[19..18] have internal pulldown resistors.
SDVOCRTL_DATA has internal pulldown resistors.

LOW = Dynamic ODT Disabled

V

HIGH = Dynamic ODT Enabled (Default)

R223

2.2KOhm

/*

1 2

CFG [13:12]
1 1 : Normal operation
1 0 : Z MODE
0 1 : Xor MODE

CFG19 : CPU VTT SELECT

+2.5VS

R239

1KOhm

/*

1 2

CFG19<8>

CFG6 : LOW = DDR2 SDRAM

HIGH = DDR SDRAM (Default)

CFG6<8>

R250

2.2KOhm

1 2

V

LOW = 1.05V (Default)
HIGH = 1.2V

V

A A

Title :

Alviso-GND/NCTF/Strap(5)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

11 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

M_B_DQ[0..63] <9>

B102
B101
B100

B105

B116

B107
B106
B110
B115

B164
B166

B113
B108
B109
B198
B200
B197
B195

B114
B119

B130
B147
B170
B185

B131
B148
B169
B188

B129
B146
B167
B186

B111
B117

B103

B133
B183

B121
B193

B199

B99
B98
B97
B94
B92
B93
B91

B90
B89

B86
B84
B85

B30
B32

B79
B80

B10
B26
B52
B67

B13
B31
B51
B70

B11
B29
B49
B68

B95
B81
B87

B47

B77
B71

B41
B53
B59
B65

B1

R1.1-S20

CON21B

B:A0
B:A1
B:A2
B:A3
B:A4
B:A5
B:A6
B:A7
B:A8
B:A9
B:A10/AP
B:A11
B:A12
B:A13
B:A14
B:A15
B:A16_BA2
B:BA0
B:BA1
B:S0#
B:S1#
B:CK0
B:CK0#
B:CK1
B:CK1#
B:CKE0
B:CKE1
B:CBS#
B:RAS#
B:WE#
B:SA0
B:SA1
B:SCL
B:SDA

B:ODT0
B:ODT1

B:DM0
B:DM1
B:DM2
B:DM3
B:DM4
B:DM5
B:DM6
B:DM7

B:DQS0
B:DQS1
B:DQS2
B:DQS3
B:DQS4
B:DQS5
B:DQS6
B:DQS7
B:DQS0#
B:DQS1#
B:DQS2#
B:DQS3#
B:DQS4#
B:DQS5#
B:DQS6#
B:DQS7#

B:VDD2
B:VDD3
B:VDD5
B:VDD7
B:VDD9
B:VDD10

B:VSS1
B:VSS2
B:VSS3
B:VSS4
B:VSS9
B:VSS11
B:VSS14
B:VSS18
B:VSS19
B:VSS22
B:VSS23

B:VDDSPD
B:VREF

DDR_DIMM_331P

B:DQ0
B:DQ1
B:DQ2
B:DQ3
B:DQ4
B:DQ5
B:DQ6
B:DQ7
B:DQ8

B:DQ9
B:DQ10
B:DQ11
B:DQ12
B:DQ13
B:DQ14
B:DQ15
B:DQ16
B:DQ17
B:DQ18
B:DQ19
B:DQ20
B:DQ21
B:DQ22
B:DQ23
B:DQ24
B:DQ25
B:DQ26
B:DQ27
B:DQ28
B:DQ29
B:DQ30
B:DQ31
B:DQ32
B:DQ33
B:DQ34
B:DQ35
B:DQ36
B:DQ37
B:DQ38
B:DQ39
B:DQ40
B:DQ41
B:DQ42
B:DQ43
B:DQ44
B:DQ45
B:DQ46
B:DQ47
B:DQ48
B:DQ49
B:DQ50
B:DQ51
B:DQ52
B:DQ53
B:DQ54
B:DQ55
B:DQ56
B:DQ57
B:DQ58
B:DQ59
B:DQ60
B:DQ61
B:DQ62
B:DQ63

B:VSS26
B:VSS27
B:VSS29
B:VSS30
B:VSS31
B:VSS33
B:VSS34
B:VSS37
B:VSS38
B:VSS39
B:VSS40
B:VSS47
B:VSS48
B:VSS49
B:VSS50
B:VSS51
B:VSS52

B:NC1

B:NC2

B:NC3

B:NC4

B:NCTEST

B5
B7
B17
B19
B4
B6
B14
B16
B23
B25
B35
B37
B20
B22
B36
B38
B43
B45
B55
B57
B44
B46
B56
B58
B61
B63
B73
B75
B62
B64
B74
B76
B123
B125
B135
B137
B124
B126
B134
B136
B141
B143
B151
B153
B140
B142
B152
B154
B157
B159
B173
B175
B158
B160
B174
B176
B179
B181
B189
B191
B180
B182
B192
B194

B127
B139
B145
B165
B171
B177
B187
B9
B21
B33
B155
B3
B15
B27
B39
B149
B161

B83
B120
B50
B69
B163

M_B_DQ0
M_B_DQ6
M_B_DQ2
M_B_DQ3
M_B_DQ7
M_B_DQ1
M_B_DQ5
M_B_DQ4
M_B_DQ8
M_B_DQ9
M_B_DQ15
M_B_DQ14
M_B_DQ12
M_B_DQ13
M_B_DQ11
M_B_DQ10
M_B_DQ20
M_B_DQ16
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ29
M_B_DQ28
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ36
M_B_DQ34
M_B_DQ38
M_B_DQ33
M_B_DQ37
M_B_DQ39
M_B_DQ35M_B_DM1
M_B_DQ45
M_B_DQ44
M_B_DQ42
M_B_DQ47
M_B_DQ40
M_B_DQ41
M_B_DQ43
M_B_DQ46
M_B_DQ53
M_B_DQ48
M_B_DQ54
M_B_DQ50
M_B_DQ52
M_B_DQ49
M_B_DQ55
M_B_DQ51
M_B_DQ61
M_B_DQ56
M_B_DQ60
M_B_DQ58
M_B_DQ59
M_B_DQ57
M_B_DQ62
M_B_DQ63

GND

DDR2 DIMM SOCKET and
SCHEMATC is the same as A6V.

M_B_A[0..13]<9,14>

M_B_A0
M_B_A1
M_B_A2
M_B_A3

R2.0-S03

C734

0.1UF

c0402

M_B_DM0
M_B_DM2

M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

GND

12

GND

M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

C743

0.1UF

c0402

D D

C C

DCLK3

C722

PLACE NEAR SO-DIMM_0

10PF

c0402

1 2

DCLK3#

DCLK4

C723

PLACE NEAR SO-DIMM_0

10PF

c0402

1 2

DCLK4#

GND

+3VS

R724
10KOhm

1 2

r0402

M_B_BS#2<9,14>
M_B_BS#0<9,14>
M_B_BS#1<9,14>

SCS2#<8,14>
SCS3#<8,14>

DCLK3<8>

DCLK3#<8>

DCLK4<8>

DCLK4#<8>

SCKE2<8,14>

SCKE3<8,14>
M_B_CAS#<9,14>
M_B_RAS#<9,14>

M_B_WE#<9,14>

SCL_3S<13,21,28,35>
SDA_3S<13,21,28,35>

ODT2<8,14>
ODT3<8,14>

M_B_DM[0..7]<9>

M_B_DQS[0..7]<9>

M_B_DQS#[0..7]<9>

Layout Note: Place these High-Freq decoupling Caps near the GMCH

B B

+1.8V

GND

12

C727

0.1UF

c0402

12

12

C729

C728

0.1UF

0.1UF

c0402

c0402

GND

GND GND

12

C730

0.1UF

c0402

Layout Note: Place these resistors near the GMCH

+1.8V

A A

12

12

C737

2.2uF/6.3V

C738

2.2uF/6.3V

GNDGND GND

12

GND GND

C739

2.2uF/6.3V

12

C740

2.2uF/6.3V

12

C741

2.2uF/6.3V

Layout Note: Place these Caps near SO DIMM 0

+1.8V

12

C731

0.1UF

c0402

GND GND

+3VS

GND

VREF -> 10/10
mils

VTT_REF

Layout Note: Place these Caps near SO DIMM 0

GND

12

12

C735

0.1UF

c0402

C732

0.1UF

c0402

GND

GND

12

12

C736

0.1UF

c0402

C733

0.1UF

c0402

12

GND

12

C742

2.2uF/6.3V

Title :

DDR2 SO-DIMM_0

ASUSTECH CO.,LTD.

Size Project Name

Custom

5

4

3

2

Date: Sheet

Z61Ae

Engineer:

Sam Wang

Rev

2.0

of

1

12 57Thursday, June 09, 2005

5

4

3

2

1

M_A_A[0..13]<9,14>

M_A_A0

A102

M_A_A1

A101

M_A_A2 M_A_DQ2

A100

M_A_A3
M_A_A4
M_A_A5
M_A_A6

D D

DCLK0

C744

PLACE NEAR SO-DIMM_1

10PF

c0402

1 2

DCLK0#

DCLK1

C745

PLACE NEAR SO-DIMM_1

10PF

c0402

1 2

DCLK1#

R2.0-S03

C C

GND

GND

M_A_BS#2<9,14>
M_A_BS#0<9,14>

M_A_BS#1<9,14>

SCS0#<8,14>
SCS1#<8,14>

DCLK0<8>

DCLK0#<8>

DCLK1<8>

DCLK1#<8>

SCKE0<8,14>

SCKE1<8,14>
M_A_CAS#<9,14>
M_A_RAS#<9,14>

M_A_WE#<9,14>

SCL_3S<12,21,28,35>
SDA_3S<12,21,28,35>

ODT0<8,14>

ODT1<8,14>

M_A_DM[0..7]<9>

M_A_DQS[0..7]<9>

M_A_DQS#[0..7]<9>

M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6 M_A_DQ55
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

A99
A98
A97
A94
A92
A93
A91

A105

A90
A89

A116

A86
A84
A85

A107
A106
A110
A115

A30

A32
A164
A166

A79

A80
A113
A108
A109
A198
A200
A197
A195

A114
A119

A10

A26

A52

A67
A130
A147
A170
A185

A13

A31

A51

A70
A131
A148
A169
A188

A11

A29

A49

A68
A129
A146
A167
A186

CON21A

A:A0
A:A1
A:A2
A:A3
A:A4
A:A5
A:A6
A:A7
A:A8
A:A9
A:A10/AP
A:A11
A:A12
A:A13
A:A14
A:A15
A:A16_BA2

A:BA0
A:BA1
A:S0#
A:S1#
A:CK0
A:CK0#
A:CK1
A:CK1#
A:CKE0
A:CKE1
A:CAS#
A:RAS#
A:WE#
A:SA0
A:SA1
A:SCL
A:SDA

A:ODT0
A:ODT1

A:DM0
A:DM1
A:DM2
A:DM3
A:DM4
A:DM5
A:DM6
A:DM7

A:DQS0
A:DQS1
A:DQS2
A:DQS3
A:DQS4
A:DQS5
A:DQS6
A:DQS7
A:DQS0#
A:DQS1#
A:DQS2#
A:DQS3#
A:DQS4#
A:DQS5#
A:DQS6#
A:DQS7#

R1.1-S20

A:DQ0
A:DQ1
A:DQ2
A:DQ3
A:DQ4
A:DQ5
A:DQ6
A:DQ7
A:DQ8

A:DQ9
A:DQ10
A:DQ11
A:DQ12
A:DQ13
A:DQ14
A:DQ15
A:DQ16
A:DQ17
A:DQ18
A:DQ19
A:DQ20
A:DQ21
A:DQ22
A:DQ23
A:DQ24
A:DQ25
A:DQ26
A:DQ27
A:DQ28
A:DQ29
A:DQ30
A:DQ31
A:DQ32
A:DQ33
A:DQ34
A:DQ35
A:DQ36
A:DQ37
A:DQ38
A:DQ39
A:DQ40
A:DQ41
A:DQ42
A:DQ43
A:DQ44
A:DQ45
A:DQ46
A:DQ47
A:DQ48
A:DQ49
A:DQ50
A:DQ51
A:DQ52
A:DQ53
A:DQ54
A:DQ55
A:DQ56
A:DQ57
A:DQ58
A:DQ59
A:DQ60
A:DQ61
A:DQ62
A:DQ63

A5
A7
A17
A19
A4
A6
A14
A16
A23
A25
A35
A37
A20
A22
A36
A38
A43
A45
A55
A57
A44
A46
A56
A58
A61
A63
A73
A75
A62
A64
A74
A76
A123
A125
A135
A137
A124
A126
A134
A136
A141
A143
A151
A153
A140
A142
A152
A154
A157
A159
A173
A175
A158
A160
A174
A176
A179
A181
A189
A191
A180
A182
A192
A194

M_A_DQ5
M_A_DQ4

M_A_DQ7
M_A_DQ0
M_A_DQ1
M_A_DQ6
M_A_DQ3
M_A_DQ9
M_A_DQ12
M_A_DQ14
M_A_DQ15
M_A_DQ8
M_A_DQ13
M_A_DQ10
M_A_DQ11
M_A_DQ21
M_A_DQ23
M_A_DQ19
M_A_DQ22
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ20
M_A_DQ28
M_A_DQ29
M_A_DQ26
M_A_DQ27
M_A_DQ24
M_A_DQ25
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ35
M_A_DQ34
M_A_DQ37
M_A_DQ36
M_A_DQ38
M_A_DQ39
M_A_DQ45
M_A_DQ40
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ44
M_A_DQ47
M_A_DQ46
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ48
M_A_DQ49

M_A_DQ54
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ57
M_A_DQ56
M_A_DQ58
M_A_DQ59

M_A_DQ[0..63] <9>

Layout Note: Place these Caps near SO DIMM 1

B B

Layout Note: Place these Caps near SO DIMM 1

+1.8V

12

C750

2.2uF/6.3V

12

C751

2.2uF/6.3V

GNDGND GNDGND

12

C752

2.2uF/6.3V

GND

12

C753

2.2uF/6.3V

12

C754

2.2uF/6.3V

SO-DIMM 1 is placed father from
the GMCH than SO-DIMM 0

A A

+1.8V

GND

12

C746

0.1UF

c0402

12

C747

0.1UF

c0402

GND GND

+3VS

VTT_REF

VREF -> 10/10
mils

12

GND

C748

0.1UF

c0402

12

C755

0.1UF

c0402

GND

12

C749

0.1UF

c0402

GND

12

C756

0.1UF

c0402

GND

12

GND

C757

2.2uF/6.3V

GND

12

C758

0.1UF

c0402

A112

A:VDD1

A96

A:VDD4

A118

A:VDD6

A82

A:VDD8

A88

A:VDD11

A104

A:VDD12

A12

A:VSS5

A48

A:VSS6

A184

A:VSS7

A78

A:VSS8

A72

A:VSS10

A122

A:VSS12

A196

A:VSS13

A8

A:VSS15

A18

A:VSS16

A24

A:VSS17

A42

A:VSS20

A199

A:VDDSPD

A1

A:VREF

DDR_DIMM_331P

NP_NC1

201

202

NP_NC2

NP_NC3

203

204

NP_NC4

205

GND1

206

GND2

208

GND3

207

GND4

A:VSS21
A:VSS24
A:VSS25
A:VSS28
A:VSS32
A:VSS35
A:VSS36
A:VSS41
A:VSS42
A:VSS43
A:VSS44
A:VSS45
A:VSS46
A:VSS53
A:VSS54
A:VSS55
A:VSS56
A:VSS57

A:NC1

A:NC2

A:NC3

A:NC4

A:NCTEST

A54
A60
A66
A128
A172
A178
A190
A34
A132
A144
A156
A168
A2
A28
A40
A138
A150
A162

A83
A120
A50
A69
A163

GND

DDR2 DIMM SOCKET and SCHEMATC
is the same as A6V.

Title :

DDR2 SO-DIMM_1

ASUSTECH CO.,LTD.

Size Project Name

Custom

5

4

3

2

Date: Sheet

Z61Ae

Engineer:

Sam Wang

Rev

2.0

of

1

13 57Thursday, June 09, 2005

5

D D

R1.1-S28

C C

+0.9VS

12

C692

0.1UF

12

12

C693

0.1UF

C694

0.1UF

12

Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

+0.9VS

12

12

12

C706

B B

C705

0.1UF

0.1UF

C707

0.1UF

12

C695

0.1UF

C708

0.1UF

4

M_A_A[0..13] <9,13>

M_A_BS#[0..2] <9,13>

M_B_A[0..13] <9,12>

M_B_BS#[0..2] <9,12>

SCKE[0:3] <8,12,13>

ODT[0:3] <8,12,13>

12

C696

0.1UF

12

C709

0.1UF

12

12

C697

0.1UF

12

C710

0.1UF

12

C698

0.1UF

12

C711

0.1UF

12

C699

C700

0.1UF

0.1UF

12

12

C713

C712

0.1UF

0.1UF

12

12

C701

0.1UF

12

C714

0.1UF

12

C702

0.1UF

12

12

C715

0.1UF

C703

0.1UF

C716

0.1UF

3

+0.9VS

R685 56Ohm

1 2

R686 56Ohm

1 2

R687 56Ohm

1 2

R688 56Ohm

1 2

R689 56Ohm

1 2

R690 56Ohm

1 2

R691 56Ohm

1 2

R692 56Ohm

1 2

R693 56Ohm

1 2

R694 56Ohm

1 2

R696 56Ohm

1 2

R697 56Ohm

1 2

R699 56Ohm

1 2

R700 56Ohm

1 2

R701 56Ohm

1 2

R702 56Ohm

1 2

R703 56Ohm

1 2

R704 56Ohm

1 2

R705 56Ohm

1 2

R706 56Ohm

1 2

R707 56Ohm

1 2

R708 56Ohm

12

C704

0.1UF

12

C717

0.1UF

1 2

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

RN56A
RN56B
RN56C
RN56D
RN56E
RN56F
RN56G
RN56H

RN57A
RN57B
RN57C
RN57D
RN57E
RN57F
RN57G
RN57H

RN58A
RN58B
RN58C
RN58D
RN58E
RN58F
RN58G
RN58H

RN59A
RN59B
RN59C
RN59D
RN59E
RN59F
RN59G
RN59H

2

SCKE0
SCKE1
SCKE2
SCKE3

ODT0
ODT1
ODT2
ODT3

M_A_A13
M_A_BS#1

M_B_A12
M_A_RAS#

M_B_BS#2
M_B_A10
M_B_A3

M_B_CAS#
M_B_A5
M_B_WE#

SCS0#
SCS1#
SCS2#
SCS3#

M_A_CAS#
M_A_BS#0
M_A_WE#
M_B_BS#0
M_A_A10
M_A_A1

M_B_A13
M_B_RAS#
M_B_BS#1
M_B_A0
M_B_A2
M_B_A6
M_A_A8
M_B_A11

M_A_A0
M_A_A2
M_A_A4
M_A_A6
M_A_A7
M_A_A11
M_B_A4
M_B_A7

M_B_A1
M_A_A5
M_A_A3
M_A_A9
M_B_A8
M_B_A9
M_A_A12
M_A_BS#2

M_A_RAS# <9,13>

M_B_CAS# <9,12>
M_B_WE# <9,12>

SCS0# <8,13>
SCS1# <8,13>
SCS2# <8,12>
SCS3# <8,12>

M_A_CAS# <9,13>
M_A_WE# <9,13>

M_B_RAS# <9,12>

1

A A

DDR2 TERMINATION

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

14 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

TO SUPPORT SPWG PANEL(EDID)

+2.5VS

Q146

2N7002

/*

3

D

Q147

1

2N7002

G

S

/*

2

3

D

D D

DDCDATA_GM<8>

DDCCLK_GM<8>

C C

1

G

S

2

PID_0
PID_1

L21

1KOhm/100MHz

PID_0<24>
PID_1<24>

R25

10KOhm

+3VS

2 1
2 1

L23

1KOhm/100MHz

R37
10KOhm

1 2

1 2

12

C271000PF

12

C251000PF

A theoretical maximum limit is calculated at 1.923 Gbit/s

C800

1 2

0.1UF
L22

+LCD_VCC

LVDS_CLKBM_GM<8>
LVDS_CLKBP_GM<8>

LVDS_YB1M_GM<8>
LVDS_YB1P_GM<8>

LVDS_YB2P_GM<8>
LVDS_YB2M_GM<8>

LVDS_YB0P_GM<8>
LVDS_YB0M_GM<8>

LVDS_CLKAM_GM<8>

LVDS_CLKAP_GM<8>

LVDS_YA2P_GM<8>
LVDS_YA2M_GM<8>

LVDS_YA1P_GM<8>
LVDS_YA1M_GM<8>

LVDS_YA0M_GM<8>
LVDS_YA0P_GM<8>

LVDS_CLKBM_GM
LVDS_CLKBP_GM

LVDS_YB1M_GM
LVDS_YB1P_GM

LVDS_YB2P_GM
LVDS_YB2M_GM

LVDS_YB0P_GM
LVDS_YB0M_GM

LVDS_CLKAM_GM
LVDS_CLKAP_GM

LVDS_YA2P_GM
LVDS_YA2M_GM

LVDS_YA1P_GM
LVDS_YA1M_GM

LVDS_YA0M_GM
LVDS_YA0P_GM

21

120Ohm/100Mhz

LVDS

+3VS

CON2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

hold_gnd2

hold_gnd1

CON Part Number Modify as M3N

35

31
32
33
34

LVDS default Cable is 08-20C28012N.(None EDID function)
It default PID setting is PID_0 = 1 and PID_1 = 0 on cable.

36

To support EDID function that need new cable.
Panel ID is LCD vendor apply to system

WtoB_2P

Panel Size Resolution Pixels Aspect Ratio

14.1” XGA 1024 x 768 4:3

14.1” SXGA+ 1400 x 10504:3

14.1” UXGA 1600 x 12004:3

CNT

S

D

Q4

3

2

G

2N7002

1

+3VSUS +12VS

B B

LCD_VDD_EN_GM<8>

R46

10KOhm

A A

5

R24

10KOhm

1 2

D5

1 2

RB751V_40

R47

12

470KOhm

3

D

Q3

1

2N7002

G

S

2

1 2

R41
1MOhm

1 2

R858

LCDVCC_ON

0Ohm

1 2

3

D

Q6

1

2N7002

G

S

2

12

C64

0.01UF

12

4

C51

0.01UF

G

D

S

564

80Ohm/100Mhz

12

123

C31

0.1UF

Q2

SI3456DV

L24

21

1 2

100Ohm

3 4

100Ohm

+3VS

+LCD_VCC

12

C30

0.1UF

RN2A
RN2B

12

C42

1UF/10V

12

ADJ_BL_GM<8>

To support PWM inverter.

ADJ_BL<27>

LID_SW#<40,43>

12

R340

1KOhm

C41
10UF/10V

3

3

+LCD_VCC

VCC

GND

R21 100KOhm

+3V

147

U42A

1
2

LV08A

1 2

1
2

R342

10KOhm

12

D3

RB717F

3

L91
1KOhm/100MHz

2 1

/*

L17

2 1

1KOhm/100MHz

L14

2 1

1KOhm/100MHz

AC_BAT_SYS

2 1

80Ohm/100Mhz

12

12

C15

0.1UF

BACK_OFF# <17,20>
LCD_BACKEN_GM <8>

L8

C20

0.1UF

2

+VCC_INVERTOR

1A

12

C11

0.1UF/25V

INVERTOR
CNT

Date: Sheet

CON Part Number Modify as M3N

CON1

1

VCC1

2

VCC2

3

GND1

4

GND2

5

VREF

6

BKEN

7

PWM

WTOB_CON_7P

ASUSTECH CO.,LTD.

Size Project Name

C

Z61Ae

8

9

8

9

1

Title :

Engineer:

LVDS & INVERTER CONN.

Sam Wang

of

15 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

CON Part Number Modify as M3N

1

2

3

13

14

12

15

7846S_15G2T

CON10

RED

GREEN

BLUE

HSYNC

VSYNC

DATA

DCLK

VCC

NC1
NC2

15

PIN

CRT

1

SIDE_G16
SIDE_G17

GND2

GND3

GND4

GND510GND1

6

7

8

5

9

4
11

16
17

D D

+12VS

12

+3VS

R318

RN27D

2.2KOhm

DAC_R
DAC_G
DAC_B

0Ohm

Q53A UM6K1N

2

5

Q53BUM6K1N

3

1

G

2

61

34

D

Q55

S

2N7002

R317 39Ohm

R325 0Ohm

+5VS_CRT

RN27A

2.2KOhm

1 2

3

D

1

G

S

2

1 2

RN27B

2.2KOhm

3 4

Q54
2N7002

12

DDC2BD_5
DDC2BC_5

U40

B

1

5

VCC

A

DAC_VSYNC_GM<8>

DAC_HSYNC_GM<8>

C C

+2.5VS

B B

DDC2BD_GM<8>
DDC2BC_GM<8>

2
3 4

GND

Y

VCC

Y

5 6

5

DAC_IO_P

RN27C

2.2KOhm

+3VS

7 8

U39

74LVC1G32GV

B

1

A

2
3 4

GND

74LVC1G32GV

DAC_R_GM<8>
DAC_G_GM<8>

DAC_B_GM<8>

Zo= 50 ohm

VSYNC_CRT

HSYNC_Q

DAC_R_CRT
DAC_G_CRT
DAC_B_CRT

DAC_IO_P

DAC_R_CRT

DAC_B_CRT

DAC_G_CRT

R319

1%

150Ohm

1 2

12

C6
47pF/50V

12

RED
GREEN
BLUE
DDC2BD
HSYNC
VSYNC
DDC2BC

C8
47pF/50V

12

C2
47pF/50V

21

L1 0.068UH

21

L2 0.068UH

21

DDC2BD_5
HSYNC_CRT
VSYNC_CRT

C350

8.2PF/50V

/*

+12VS

+5VS

12

C351

8.2PF/50V

/*

1 2

PR_IN#
DAC_R_PB
DAC_R_CRT
DAC_R
DAC_G_PB
DAC_G_CRT
DAC_G

DAC_R_PB<26>
DAC_G_PB<26>

DAC_B_PB<26>
DDC2BD_5<26>
DDC2BC_5<26>

HSYNC_PB<26>

VSYNC_PB<26>

DDC2BC_5

R326

10KOhm

1.2PF/50V

U10

1
2
3
4
5
6
7
8

12

C346

/*

Intel Recommend
C = 10pF / 22pF / 10pF
Bead = 47 ohm /100Mhz

1

Q59 2N7002

G

3

2

D

S

16

IN

VCC

15

S1A

EN#

14

S2A

S1D

13

DA

S2D

12

S1B

DD

11

S2B

S1C

10

DB

S2C

9

GND

DC

PI5V330W16

IN : 0 = S1
: 1 = S2

DAC_R_PB
DAC_G_PB
DAC_B_PB
DDC2BD_5
DDC2BC_5
HSYNC_PB
VSYNC_CRT

R321

12

C349

1%

150Ohm

1 2

8.2PF/50V

/*

R320

1%

150Ohm

1 2

D25

1

3

2

BAV99

D26

1

3

2

BAV99

D27

1

3

2

BAV99

12

PR_IN#<26>

L3 0.068UH

L6 120Ohm/100Mhz
L7 120Ohm/100Mhz
L4 120Ohm/100Mhz
L5 120Ohm/100Mhz

12

C348

1.2PF/50V

/*

12

C347

1.2PF/50V

/*

+5VS_CRT

+5V

HSYNC_PBS
HSYNC_CRTS
HSYNC_Q
DAC_B_PB
DAC_B_CRT
DAC_B

R343 39Ohm

1 2

21
21
21
21

12

C3

8.2PF/50V

1 2

R38 39Ohm

HSYNC_PBS

12

C4

8.2PF/50V

HSYNC_CRT

12

C7

8.2PF/50V

12

C5
47pF/50V

RED

GREEN

BLUE

HSYNC

VSYNC

DDC2BD

DDC2BC

To PortBar III

A A

Title :

CRT

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

16 57Thursday, June 09, 2005

Rev

2.0

5

U15 Original P/N is 02-010002500(ICH6-M-None MP Version)
U15 (SB) need to change to 02-010004402(ICH6-M-MP B2 Version)
R1.1 has changed it in symbol.

R1.1-S22

SATA_ICH_TXN0

AD13
AG15
AE15
AC13
AB13
AB12
AF13
AE13
AB11
AD11
AC11
AE14
AD12
AF14
AF15
AD14

AB15
AB14
AE16
AC14
AF16

AC16
AB17
AC17

AD16
AE17

AB16

SATA_ICH_TXP0

U15C

DD_15
DD_14
DD_13
DD_12
DD_11
DD_10
DD_9
DD_8
DD_7
DD_6
DD_5
DD_4
DD_3
DD_2
DD_1
DD_0

DDACK#
DDREQ
DIOR#
DIOW#
IORDY

DA0
DA1
DA2

DCS1#
DCS3#

IDEIRQ

ICH6_M

02-010004402

D D

IDE_PDD[0..15]<22>

C C

B B

R86
10MOhm

1 2

IDE_PDD15
IDE_PDD14
IDE_PDD13
IDE_PDD12
IDE_PDD11
IDE_PDD10
IDE_PDD9
IDE_PDD8
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

IDE_PDDACK#<22>

IDE_PDDREQ<22>

IDE_PDIOR#<22>
IDE_PDIOW#<22>
IDE_PIORDY<22>

IDE_PDA0<22>
IDE_PDA1<22>
IDE_PDA2<22>

IDE_PDCS1#<22>
IDE_PDCS3#<22>

INT_IRQ14<20,22>

RTC_X2RTC_X1

SATA_0RXN
SATA_0RXP

SATA_0TXN

SATA_0TXP
SATA_1RXN
SATA_1RXP

SATA_1TXN

SATA_1TXP
SATA_2RXN
SATA_2RXP

SATA_2TXN

SATA_2TXP
SATA_3RXN
SATA_3RXP

SATA_3TXN

SATA_3TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

SMBCLK

SMBDATA

LINKALERT#

SMLINK_0
SMLINK_1

SATALED#
SATA_0GP/GPI26
SATA_1GP/GPI29
SATA_2GP/GPI30
SATA_3GP/GPI31

INTRUDER#

RSMRST#

RTCX1

RTCX2

RTCRST#

INTVRMEN

SPKR

4

12

C763 3900PF/50V

12

C764 3900PF/50V

PLACE CLOSELY TOGETHER

SATA_ICH_RXN0

AE3

SATA_ICH_RXP0

AD3

SATA_ICH_TXN0

AG2

SATA_ICH_TXP0

AF2
AC5
AD5
AF4
AG4
AD7
AC7
AF6
AG6
AC9
AD9
AF8
AG8

AC2
AC1

AG11
AF11

R1.1-S35

1 2

1 2

0Ohm

3 4

0Ohm

5 6

0Ohm

7 8

0Ohm

CLK_PCIE_SATA# <21>
CLK_PCIE_SATA <21>

R122

24.9Ohm

1%

R1.1-S22

Y4
W5

Y5
W4
U6

AC19
AF17
AE18
AF18
AG18
AA3

Y3

Y1

Y2

AA2

AA5

F8

SCL_3A <20,28>
SDA_3A <20,28>

SATA[x]GP pins if unused require

8.2-k to 10-k pull-up to Vcc3_3.

LINKALERT# <20>
SM_LINK0 <20,28>
SM_LINK1 <20,28>

R1.1-S22

1 2

1 2

8.2KOhm

RTC_X1

RTC_X2

RTC_RST#

1 2

R391 10KOhm

1 2

ICH_SPKR <20,37>

SATALED# <22>
PCB_VID2 <20>

12

R1.1 _ NO17

+3VSUS

/*

R123 8.2KOhm

R124
R111 1MOhm

R390 0Ohm

R1.1-S34

RTC CMOS CLEAR
(RTC_CLR)

Azalia_BCLK_R
Azalia_SYNC
Azalia_RST#
Azalia_SDOUT

SATA_BRIDGE_RXN0 <22>
SATA_BRIDGE_RXP0 <22>

SATA_ICH_RXN0 <22>
SATA_ICH_RXP0 <22>

RN61A

RN61B

RN61C
RN61D

+3VS

+VCCP

+3VS

H_FERR#<4>

ACIN_OC_3 <27>

+VCC_RTC

PM_RSMRST# <43>

+VCC_RTC

1

JRST1

1

SGL_JUMP

2

/*

2

3

1 2

RA8 39Ohm

1 2

RA3 39Ohm

1 2

RA6 39Ohm

1 2

RA2 39Ohm

1 2

RA7 39Ohm

1 2

RA4 39Ohm

1 2

RA5 39Ohm

1 2

RA1 39Ohm

Unused SATA pin

- Connect RX, RBIAS, CLK to GND

- Leave TX, LED# as NC

BATSEL_2P<20>

LPC_AD0<24,27,33,36>
LPC_AD1<24,27,33,36>
LPC_AD2<24,27,33,36>
LPC_AD3<24,27,33,36>

LPC_DRQ#0<20,24>

LPC_FRAME#<24,27,33,36>

Azalia_BCLK_R
Azalia_RST#

Azalia_SDIN0<37>
Azalia_SDIN1<39>

Azalia_SDOUT<20>
Azalia_SYNC<20>

CLK_ICH14<21>

EEP_DOUT<20>

EE_DOUT: Internal weak pull up
EE_CS: Internal weak pull down

56Ohm

R423

1 2

12

R106

20KOhm

12

C141
1UF/10V

X7R

R32 0Ohm
R31 0Ohm

R29 0Ohm
R30 0Ohm

H_CPUSLP# R94 : B STEP NO STUFF
H_DPRSTP# R95 : A STEP NO STUFF

HA20GATE<27>

H_A20M#<4>

H_CPUSLP#<4,7>

PM_DPRSLPVR<44>

H_DPRSTP#<4>
H_DPSLP#<4>
H_IGNNE#<4>
FWH_INIT#<36>
H_INIT#<4>
H_INTR<4>

H_NMI<4>

KBDCPURST<27>

INT_SERIRQ<20,24,27,32>
H_SMI#<4>
H_STPCLK#<4>

H_THRMTRIP#<6>

Azalia_BCLK_AUD <37>
Azalia_SYNC_AUD <37>
Azalia_RST#_AUD <37,38>
Azalia_SDOUT_AUD <37>
Azalia_BCLK_MDC <39>
Azalia_SYNC_MDC <39>
Azalia_RST#_MDC <39>
Azalia_SDOUT_MDC <39>

R72 0Ohm

1 2

R68 0Ohm

1 2

R63 0Ohm

1 2

R64 0Ohm

1 2

R74 0Ohm

1 2

C22 10PF /*

1 2
1 2

1 2
1 2

R197 0Ohm/*

1 2

R420 0Ohm/*

1 2

R422 56Ohm

1 2

BATSEL_2P

12

T219

R126
56Ohm

2

R421

12

U15D

P4

LDRQ_1#/GPIO41

P2

LAD_0/FWH0

N3

LAD_1/FWH1

N5

LAD_2/FWH2

N4

LAD_3/FWH3

N6

LDRQ_0#

P3

LFRAME#/FWH4

C10

ACZ_BIT_CLK

A10

ACZ_RST#

F11

ACZ_SDIN_0

F10

ACZ_SDIN_1

B10

ACZ_SDIN_2

C9

ACZ_SDOUT

B9

ACZ_SYNC

E10

CLK14

D12

1

12

AF22
AF23
AE27
AE20
AE24
AD27
AG26
AE22
AF27
AG24
AF24
AF25
AD23
AB20
AG27
AE26
AE23

F13
D11
B12

F12
B11
E12
E11
C13
C12
C11
E13

EE_CS
EE_DIN
EE_DOUT
EE_SHCLK

LAN_CLK
LAN_RSTSYNC
LAN_RXD_0
LAN_RXD_1
LAN_RXD_2
LAN_TXD_0
LAN_TXD_1
LAN_TXD_2

A20GATE
A20M#
CPUSLP#
DPRSLPVR/TP_1
DPRSLP#/TP_2
DPSTP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
NMI
RCIN#
SERIRQ
SMI#
STPCLK#
THRMTRIP#

ICH6_M

02-010004402

BMBUSY#/GPI6

SMBALERT#/GPIO11

STP_PCI#/GPO18

STP_CPU#/GPO20

CLKRUN#/GPIO32

CPUPWRGD/GPIO49

SUS_STAT#/LPCPD#

GPI7
GPI8

GPI12

GPI13
GPIO19
GPIO21

GPIO23
GPIO24
GPIO25
GPIO27
GPIO28

GPIO33
GPIO34

MCH_SYNC#

PWRBTN#

SLP_S3#
SLP_S4#
SLP_S5#

SUSCLK

SYS_RESET#

LAN_RST#

BATLOW#

TP_3

VRMPWRGD

THRM#

WAKE#

PWROK

RI#

AD19
AE19
R1
W6
M2
R6
AC21
AB21
AD22
AD20
AD21
V3
P5
R3
T3
AF19
AF20
AC18
AG25

AG21
U1
T2

T4
T5
T6

W3
V6
U2
V5
V2
U3

AF21
AC20

U5
AA1

SUSCLK

LAN_RST#

BAT1_LLOW#_ICH6

SB_GPIO19

XIDE_EN#_3

1

T229

ICH6_PWROK

1KOhm

ICH6_PWROK

8.2KOhm

MCH_SYNC# <20>
PM_PWRBTN# <43>
PM_RI# <20>

PM_SUSB# <4,21,29,32,37,40,43,48,52>
PM_SUSC# <43,52>

PM_SUS_STAT# <20,24>

T230

1

1 2

/*

1 2

1 2

R87 0Ohm

R84 0Ohm/*

R85 10KOhm

1 2

PM_THRM# <20,35>

R75

12

ICH6_PWROK <8,43>

+3VS

PM_BMBUSY# <8>
GPI7 <20>
EXTSMI#_3A <27>
LID_ICH#_3A <20,43>
KBDSCI_3 <27>
BAT1_LLOW#_ICH6 <20>
STP_PCI# <21>

STP_CPU# <21,44>
BACK_OFF# <15,20>
FWH_WP# <20,36>
CB_SD# <20,32>
ICH6_1HZ <40>
PCB_VID0 <20>
PCB_VID1 <20>
PM_CLKRUN# <20,24,27,31,32>

OP_SD# <20,38>
H_PWRGD <4>

AUXPWROK <43>

+3VSUS

R7810KOhm

H_DBRESET# <4,6>

R810Ohm

BUF_PLT_RST# <6,8,18,22,24,27,36>
PM_BATLOW# <20>
TP3 <20>

12

BAT_LLOW#_OC <51>

+3VSUS

1

+3VS

12

R786

8.2KOhm

/*

1

R2.0-S09

R2.0-S07

T350

CHECK_MODE <40>

XIDE_EN#_3 <22>

R1.1-S22

2

Y1

12

C131
15P

A A

R2.0-S03

112

SIDE

32.768KHZ CITIZEN 12.5PF/20PPM

3

07-010303271

GND

5

12

C130
15P

BAT1_LLOW#<48,51>

NC1

SPKL-

SPKL+

NC2

WtoB_2P

U36

3
1
2
4

D7
RB751V_40

BAT1_LLOW#_ICH6

12

C340

12

0.1UF

/*

RTC_BAT

T35

1

R130

1KOhm

+VCC_RTC+3VALWAYS

D10

2

12

3

1

RB715F

12

C147

1UF/10V

BATSEL_2P#<49,50>

CON Part Number Modify as ME

RTC BAT

4

3

2

BATSEL_2P

3

D

Q9

1

2N7002

G

S

/*

2

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

Z61Ae

1

Title :

ICH6M--SATA/LPC/IDE/PM (1)

Sam Wang

of

17 57Thursday, June 09, 2005

Rev

2.0

5

D D

PCI_PAR<29,31,32>
PCI_DEVSEL#<20,29,31,32>
CLK_ICHPCI<21>

PCI_IRDY#<20,29,31,32>
PME_SB#<20,29>
PCI_SERR#<20,29,31,32>
PCI_STOP#<20,29,31,32>
PCI_LOCK#<20>
PCI_TRDY#<20,29,31,32>
PCI_PERR#<20,29,31,32>
PCI_FRAME#<20,29,31,32>

PCI_GNT#0<29>
PCI_GNT#1<32>

PCI_GNT#3<31>
GPIO17<20>

GPIO16<20>

PCI_REQ#0<20,29>
PCI_REQ#1<20,32>
PCI_REQ#2<20>

C C

PCI_REQ#3<20,31>

PCB_VID3<20>

KBDDT1<20,27>
KBDDT0<20,27>

PCI_INTA#<20,32>
PCI_INTB#<20,31,32>
PCI_INTC#<20,29,32>

PCI_INTD#<20,31>
PCI_INTE#<20>
PCI_INTF#<20>
PCI_INTG#<20>
PCI_INTH#<20>

T222
T221

PCI_RST#_ICH
PLT_RST#_SB

PCI_GNT#2

1
1

4

E1
C3
G6
R2
R5

A3

P6
G5

J1
C5

J2

E3

J3

C1

B6

F1
C8

E7

F6
D8

L5

B5
M5

B8

F7

E8

B7

N2

L2
M1

L3
D9
C7
C6
M3

U15A

PAR
DEVSEL#
PCICLK
PCIRST#
PLTRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#

GNT_0#
GNT_1#
GNT_2#
GNT_3#
GNT_4#/GPIO48
GNT_5#/GPIO17
GNT_6#/GPIO16

REQ_0#
REQ_1#
REQ_2#
REQ_3#
REQ_4#/GPIO40
REQ_5#/GPIO1
REQ_6#/GPIO0

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

AD_0
AD_1
AD_2
AD_3
AD_4
AD_5
AD_6
AD_7
AD_8

AD_9
AD_10
AD_11
AD_12
AD_13
AD_14
AD_15
AD_16
AD_17
AD_18
AD_19
AD_20
AD_21
AD_22
AD_23
AD_24
AD_25
AD_26
AD_27
AD_28
AD_29
AD_30
AD_31

C_BE_3#
C_BE_2#
C_BE_1#
C_BE_0#

3

PCI_AD0

E2

PCI_AD1

E5

PCI_AD2

C2

PCI_AD3

F5

PCI_AD4

F3

PCI_AD5

E9

PCI_AD6

F2

PCI_AD7

D6

PCI_AD8

E6

PCI_AD9

D3

PCI_AD10

A2

PCI_AD11

D2

PCI_AD12

D5

PCI_AD13

H3

PCI_AD14

B4

PCI_AD15

J5

PCI_AD16

K2

PCI_AD17

K5

PCI_AD18

D4

PCI_AD19

L6

PCI_AD20

G3

PCI_AD21

H4

PCI_AD22

H2

PCI_AD23

H5

PCI_AD24

B3

PCI_AD25

M6

PCI_AD26

B2

PCI_AD27

K6

PCI_AD28

K3

PCI_AD29

A5

PCI_AD30

L1

PCI_AD31

K4

G2
G4
H6
J6

PCI_C/BE#3 <29,31,32>
PCI_C/BE#2 <29,31,32>
PCI_C/BE#1 <29,31,32>
PCI_C/BE#0 <29,31,32>

PCI_AD[0..31] <29,31,32>

DMI_RXN0<8>
DMI_RXP0<8>

DMI_RXN1<8>
DMI_RXP1<8>

DMI_RXN2<8>
DMI_RXP2<8>

DMI_RXN3<8>
DMI_RXP3<8>

+1.5VS

DMI_TXN0<8>
DMI_TXP0<8>

DMI_TXN1<8>
DMI_TXP1<8>

DMI_TXN2<8>
DMI_TXP2<8>

DMI_TXN3<8>
DMI_TXP3<8>

T23
T21

T24
T225

T227
T226

T32
T29

R360

1 2

24.9Ohm

1
1

1
1

1
1

1
1

AB24
AB23
AA27
AA26

T25
T24
R27
R26
V25
V24
U27
U26
Y25

Y24
W27
W26

H25

H24

G27
G26
K25
K24

J27

J26

M25
M24

L27

L26

P24
P23
N27
N26

F24
F23

U15B

DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP

HSIN_0
HSIP_0
HSON_0
HSOP_0
HSIN_1
HSIP_1
HSON_1
HSOP_1
HSIN_2
HSIP_2
HSON_2
HSOP_2
HSIN_3
HSIP_3
HSON_3
HSOP_3

DMI_ZCOMP
DMI_IRCOMP

2

USBP_0N
USBP_0P
USBP_1N
USBP_1P
USBP_2N
USBP_2P
USBP_3N
USBP_3P
USBP_4N
USBP_4P
USBP_5N
USBP_5P
USBP_6N
USBP_6P
USBP_7N
USBP_7P

OC_0#
OC_1#
OC_2#
OC_3#

OC_4#/GPIO9
OC_5#/GPIO10
OC_6#/GPIO14
OC_7#/GPIO15

USBRBIAS

USBRBIAS#

CLK48

C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14

C27
B27
B26
C26
C23
D23
C25
C24

B22
A22

A27

BAT2_LLOW#_ICH6

USBRBIAS

PLACE within
500 mils of
ICH.

R26

1 2

22.6Ohm

1%

CLK_USB48 <21>

USB_PN0 <23>
USB_PP0 <23>
USB_PN1 <23>
USB_PP1 <23>
USB_PN2 <26>
USB_PP2 <26>
USB_PN3 <23>
USB_PP3 <23>
USB_PN4 <23>
USB_PP4 <23>
USB_PN5 <31>
USB_PP5 <31>

USB_OC#01 <23>
USB_OC#23 <23>

USB_OC#4 <20>
USB_OC#5 <20>
BAT2_LLOW#_ICH6 <20>
GPIO15 <20>

1

PLACE within 500 mils of ICH.

+3V

U42B

147

VCC

D32

RB751V_40

GND

PCI_RST#

12

C445

0.01UF

BAT2_LLOW#_ICH6

12

4
5

LV08A

12

U45

B

1

VCC

A

2
3 4

GND

74LVC1G32GV

0.1UF

Y

ICH6_M

02-010004402

+3V

C443

5

4

PCI_RST#<22,29,31,32>

BUF_PLT_RST#<6,8,17,22,24,27,36>

PCI_RSTNS# <27>

6

B B

SET_PCIRSTNS#<27>

A A

BAT2_LLOW#<48,51>

5

1 2

R435 10KOhm

12

R434
47KOhm

C375

1 2

0.1UF
U42C

147

VCC

8

GND

LV08A

+3V

U42D

147

VCC

11

12
13

GND

LV08A

C376

0.01UF

/*

PCI_RST#_ICH

9
10

PLT_RST#_SB

12

3

CLK_PCIE_ICH#<21>
CLK_PCIE_ICH<21>

+3V

AD25

DMI_CLKN

AC25

DMI_CLKP

ICH6_M

02-010004402

Can be issue SCI or SMI List: GPIO0~GPIO15
Resume Power Well GPIO List: GPIO8,11,13,14,15,24,25,27,28

Only GPI Pin: GPI0~8,11~15,26,29,30,31,40(5V),41
Only GPO Pin: GPIO16~17,19,21,23,48
Can be GPIO: GPIO24,25,27,28,33,34

Resume Power Input Pin List:
BATLOW#,AC_SDIN[0:1],LAN_RST#,
OC[7:0]#,PME#,PWRBTN#,RI#,SMBALERT#,SYS_RESET#,USBRBIAS#

ASUSTECH CO.,LTD.

Size Project Name

C

2

Date: Sheet

Z61Ae

Title :

Engineer:

1

ICH6M--PCI/DMIUSB/PCIE (2)

Sam Wang

of

18 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

+1.5VS

+3VS

+3VSUS

C408

0.01UF

+3VS

10UF/10V

1 2

R34 0Ohm

1 2

R33 0Ohm

Place 0.01uF
within 100mils

D2

F01J4L

0.1UF

of ICH near pin
AA19

Place 0.1uFx1 near AG10
Place 0.1uFx1 near E26, E27
Place 0.1uFx2 near AG13, AG16
Place 0.1uFx3 near A2~A6, D1~H1

V5REF

C34

+3.3VS_LAN

Place near PIN A13

D D

C C

+3VS

+5VS

12

R28
100Ohm

1 2

12

12

C38
1UF/10V

Place near PIN A8

Place near PIN V7

1 2

+3VSUS

+VCC_RTC

R35 0Ohm

C414

0.1UF

12

B B

+5VSUS +3VSUS

12

R36
10Ohm

1 2

12

12

C32
1UF/10V

Place BOTH within 100mils of
ICH near pin A17

D1

F01J4L

V5REF_SUS

C370

0.1UF

R1.1-S28

Place near PIN A8

+1.5VS

ICH6_CORE

12

12

12

C369

C403

0.1UF

Place 0.1uF within 100mils
of ICH near pin AG23

C374

0.1UF

0.1UF

Place 4X0.1uF
Distribute near
pin ICH6
Package edge

Place BOTH
within 100mils of
ICH near pin D27

USB_CORE

12

C392

0.1UF

+VCCP

PCI_IDE_CORE

12

12

C393

C372

0.1UF

C40

0.1UF

C413

0.1UF

C159

0.1UF

0.1UF

12

12

C416

C381

0.1UF

0.1UF

12

12

C36

0.1UF

12

C35

0.1UF

12

12

C373

0.1UF

+3.3VA_ICH

12

C366

0.1UF

12

C404

0.1UF

+1.5VS_LAN

C158

C426

0.1UF

12

R365

1 2

0Ohm

/*

12

C399

0.1UF

12

C386

0.1UF

12

C54

0.1UF

12

C412

0.1UF

+VCCPSUS

+3.3VA_ICH

12

C401

0.1UF

C377 0.1UF

12

12

12

12

C423

0.1UF

+1.5VA_USB

12

AA19
AA20
AA21

AB22
AD26
AG23

AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19

AA10
AG10

L11
L12
L14
L16

L17
M11
M17

P11
P17
T11

T17
U11
U12
U14
U16
U17

G8
D24
D25
D26
D27

E20
E21
E22
E23
E24
F20

G20

F9

A6
B1

E4
H1
H7

J7

L4

L7
M7

P1

E26

A13

F14
G13
G14

A11

U4

V1
V7

W2

Y7
A17
B17

C16
C17
D16

E16
F15
F16
F18

G15
G16
G17
G18

A24

AB3

R7

U7
G19
G10
G11

U15E

VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25
VCC1_5_26
VCC1_5_27
VCC1_5_28
VCC1_5_29
VCC1_5_30
VCC1_5_31
VCC1_5_32
VCC1_5_33
VCC1_5_34
VCC1_5_35
VCC1_5_36
VCC1_5_37
VCC1_5_38
VCC1_5_39
VCC1_5_40
VCC1_5_41
VCC1_5_42
VCC1_5_43
VCC1_5_44
VCC1_5_45
VCC1_5_46
VCC1_5_47
VCC1_5_48
VCC1_5_49
VCC1_5_50
VCC1_5_51
VCC1_5_52

V_CPU_IO_1
V_CPU_IO_2
V_CPU_IO_3

VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
VCC3_3_22

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12
VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCCSUS3_3_19
VCCSUS3_3_20
VCCSUS3_3_21
VCCSUS3_3_22
VCCSUS3_3_23
VCCSUS3_3_24

VCCRTC
VCCSUS1_5_A
VCCSUS1_5_B
VCCSUS1_5_C
VCCSUS1_5_D
VCCSUS1_5_E

V5REF1
V5REF2

VCC2_5_1
VCC2_5_2

V5REF_SUS

VCCDMIPLL

VCCSATAPLL

VCCUSBPLL

VCCDMIPWR1
VCCDMIPWR2
VCCDMIPWR3
VCCDMIPWR4
VCCDMIPWR5
VCCDMIPWR6
VCCDMIPWR7
VCCDMIPWR8

VCCDMIPWR9
VCCDMIPWR10
VCCDMIPWR11
VCCDMIPWR12
VCCDMIPWR13
VCCDMIPWR14
VCCDMIPWR15
VCCDMIPWR16
VCCDMIPWR17
VCCDMIPWR18
VCCDMIPWR19
VCCDMIPWR20
VCCDMIPWR21
VCCDMIPWR22
VCCDMIPWR23
VCCDMIPWR24
VCCDMIPWR25
VCCDMIPWR26
VCCDMIPWR27
VCCDMIPWR28
VCCDMIPWR29
VCCDMIPWR30
VCCDMIPWR31
VCCDMIPWR32
VCCDMIPWR33
VCCDMIPWR34
VCCDMIPWR35
VCCDMIPWR36
VCCDMIPWR37
VCCDMIPWR38
VCCDMIPWR39
VCCDMIPWR40
VCCDMIPWR41
VCCDMIPWR42
VCCDMIPWR43
VCCDMIPWR44
VCCDMIPWR45

VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8

VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15
VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20

A8
AA18

AB18
P7

V5REF_SUS

F21

AC27
AE1
A25
AA22

AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22

AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AG5
AF5
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9

ICH6_M

02-010004402

V5REF

+2.5VS_PCI_IDE

VCCDPLL

12

C133

0.01UF

+1.5VS_SATAPLL

+1.5VS_USBPLL

12

+

CE7

150U/4.0V

/*

Place 150uF, 3 X 0.1uF
within 100mils of ICH near
pin F27, P27, AB27

+1.5VS_USBPLL

+1.5VS_SATA

12

C391

0.1UF

12

C400

0.1UF

+1.5VS

12

C157

0.1UF

C37

0.01UF

120Ohm/100Mhz

12

C411

0.1UF

L32

21

12

12

C156

0.1UF

R27

1 2

0Ohm

12

+1.5VS

Place within
100mils of ICH
near pin AG5

Place within
100mils of ICH
near pin AG9

+2.5VS

+1.5VS

12

C126
10UF/10V

+1.5VS

C415

0.1UF

+1.5VS

1.5VS: 2.355A

2.5VS: 15mA
3VS: 243mA
3VSUS: 23mA

1.5VSUS: 170mA
5VSUS: 10mA
VCCP: 14mA
RTC: 5uA

U15F

A1

VSS1

A12

VSS2

A15

VSS3

A19

VSS4

A21

VSS5

A23

VSS6

A26

VSS7

A4

VSS8

A7

VSS9

A9

VSS10

AA11

VSS11

AA13

VSS12

AA16

VSS13

AA4

VSS14

AB1

VSS15

AB10

VSS16

AB19

VSS17

AB2

VSS18

AB7

VSS19

AB9

VSS20

AC10

VSS21

AC12

VSS22

AC22

VSS23

AC23

VSS24

AC24

VSS25

AC26

VSS26

AC3

VSS27

AC6

VSS28

AD1

VSS29

AD10

VSS30

AD15

VSS31

AD18

VSS32

AD2

VSS33

AD24

VSS34

AD6

VSS35

AE10

VSS36

AE11

VSS37

AE12

VSS38

AE2

VSS39

AE21

VSS40

AE25

VSS41

AE6

VSS42

AE7

VSS43

AF1

VSS44

AF12

VSS45

AF26

VSS46

AF3

VSS47

AF7

VSS48

AG1

VSS49

AG12

VSS50

AG14

VSS51

AG17

VSS52

AG20

VSS53

AG22

VSS54

AG3

VSS55

AG7

VSS56

B13

VSS57

B15

VSS58

B19

VSS59

B21

VSS60

B23

VSS61

B25

VSS62

C14

VSS63

C18

VSS64

C20

VSS65

C22

VSS66

C4

VSS67

D1

VSS68

D10

VSS69

D13

VSS70

D14

VSS71

D18

VSS72

D20

VSS73

D22

VSS74

D7

VSS75

E14

VSS76

E15

VSS77

E18

VSS78

E19

VSS79

E25

VSS80

F17

VSS81

F19

VSS82

F22

VSS83

F4

VSS84

G1

VSS85

G12

VSS86

ICH6_M

Power Seq.
+1.8V rise time < 2ms
+1.5VS --> +VCCP
+5VS --> +3VS --> +2.5VS
+5VSUS --> +3VSUS --> +1.5VSUS

VCCRTC --> RTCRST# > 5ms
+3VALWAYS --> RSMRST# > 5ms
+3VALWAYS --> LAN_RST# > 10ms
+3VS(LAN) --> LAN_RST# > 10ms
+3VS,+1.5VS --> PWROK,PM_VATE > 99ms

VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173

G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
K1
K23
K26
K27
K7
L13
L15
L23
L24
L25
M12
M13
M14
M15
M16
M23
M26
M27
M4
N1
N11
N12
N13
N14
N15
N16
N17
N7
P12
P13
P14
P15
P16
P22
R11
R12
R13
R14
R15
R16
R17
R23
R24
R25
R4
T1
T12
T13
T14
T15
T16
T23
T26
T27
T7
U13
U15
U23
U24
U25
V23
V26
V27
V4
W1
W23
W25
W7
Y23
Y26
Y27
Y6
W24
E27
B24
AF10

A A

Title :

ICH6M--PWR/GND(3)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

19 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

D D

PCI_FRAME#<18,29,31,32>
PCI_IRDY#<18,29,31,32>
PCI_TRDY#<18,29,31,32>
PCI_STOP#<18,29,31,32>
PCI_SERR#<18,29,31,32>

PCI_DEVSEL#<18,29,31,32>

PCI_PERR#<18,29,31,32>
PCI_LOCK#<18>
INT_SERIRQ<17,24,27,32>
PM_THRM#<17,35>
PCI_REQ#0<18,29>
PCI_REQ#1<18,32>
PCI_REQ#2<18>
PCI_REQ#3<18,31>

GPI7<17>

PCI_INTD#<18,31>

C C

B B

PCI_INTC#<18,29,32>
PCI_INTA#<18,32>
PCI_INTB#<18,31,32>

MCH_SYNC#<17>

BATSEL_2P<17>

PM_RI#<17>

GPIO15<18>

LID_ICH#_3A<17,43>
USB_OC#4<18>

USB_OC#5<18>
BAT1_LLOW#_ICH6<17>
BAT2_LLOW#_ICH6<18>

LINKALERT#<17>

SCL_3A<17,28>

SDA_3A<17,28>

SM_LINK0<17,28>
SM_LINK1<17,28>

PM_BATLOW#<17>

CB_SD#<17,32>

PME_SB#<18,29>

1 5
2 5
3 5
4 5
6 5
7 5
8 5
9 5
1 5
2 5
3 5
4 5
6 5
7 5
8 5
9 5
1 5
2 5
3 5
4 5
6 5
7 5
8 5
9 5

1 5
2 5
3 5
4 5
6 5
7 5
8 5
9 5

R402 10KOhm

R400

2.2KOhm

R401

2.2KOhm

1 2

10KOhm

3 4

10KOhm

5 6

10KOhm

7 8

10KOhm

12

R378 10KOhm

/*

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

8.2KOhm

10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm

12

12

12

RN4A
RN4B
RN4C
RN4D

+3VS

RP1A

10

RP1B

10

RP1C

10

RP1D

10

RP1E
RP1F
RP1G
RP1H
RP7A
RP7B
RP7C
RP7D
RP7E
RP7F
RP7G
RP7H
RP2A
RP2B
RP2C
RP2D
RP2E
RP2F
RP2G
RP2H

RP6A
RP6B
RP6C
RP6D
RP6E
RP6F
RP6G
RP6H

+3VSUS

+3VSUS

12

C76

0.1UF

10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10

10
10
10
10
10
10
10
10

+3VS

+3VS

+3VS

INTERNAL PULL-DOWN
PULL-UP : PCI Express
Port config bit 1

R22 10KOhm

INTERNAL PULL-DOWN
PULL-UP : PCI Express
Port config bit 0

R15 10KOhm

R393 10KOhm

INTERNAL PULL-UP
PULL-DOWN : PCI
Express Port chain
test

INTERNAL PULL-DOWN
PULL-UP : NO REBOOT

R368

1KOhm /*

R356

1KOhm /*

INTERNAL PULL-UP
PULL-DOWN :
RESERVED

R359

1KOhm /*

INTERNAL PULL-UP
PULL-DOWN : Boot BIOS
destination select

R347

1KOhm /*

INTERNAL PULL-UP
PULL-DOWN
:TOP-BLOCK SWAP

INTERNAL PULL-DOWN SIGNALS :

AC_BITCLK, AC_RST# , AC_SDIN[2:0] ,
AC_SDOUT , AC_SYNC , DPSLPVR ,
LAN_CLK , PDD[7] , PDDREQ , SPKR ,
USB[7:0][P,N]

INTERNAL PULL-UP SIGNALS :
EE_DIN , EE_DOUT , EE_CS ,

GPIO[17:16] , LAD[3:0]# ,
LDRQ[0:1] , LAN_RXD[2:0] ,
PME# , PWRBTN# , TP3 ,
SATALED# ,
GNT[4:0]

+3VS

12

/*

12

/*

12

/*

12

12

12

12

Azalia_SYNC <17>

TP3 <17>

ICH_SPKR <17,37>

EEP_DOUT <17>

GPIO17 <18>

GPIO16 <18>

BACK_OFF#<15,17>Azalia_SDOUT <17>

PM_SUS_STAT#<17,24>

LPC_DRQ#0<17,24>

FWH_WP#<17,36>
OP_SD#<17,38>

R1.1-S21

PCB_VID0<17>
PCB_VID1<17>
PCB_VID2<17>
PCB_VID3<18>

PCB_VID 2 1 0
MB V1.0 0 0 0
MB V1.1 0 0 1
MB V1.2 0 1 0
MB V2.0 0 1 1 (V)

R408 10KOhm

R394 4.7KOhm

PCB_VID0
PCB_VID1
PCB_VID2
PCB_VID3

R371

R415 100KOhm
R416 10KOhm

+3VSUS

12

12

R59

R66

100KOhm

100KOhm

12

12

R65

R60

10KOhm

10KOhm

/*

/*

12

/*

12

/*

8.2KOhm

12

/*

12
12

+3VSUS

/*

12

R787

100KOhm

12

12

R120

100KOhm

/*

12

R121
10KOhm

PCB_VID3 : PROJECT CODE
1 = Z61Ae (V)
0 = Z61A

Z61Ae

R361
10KOhm

Z61A

+3VS

RP5A

KBDDT0<18,27>
KBDDT1<18,27>

PCI_INTE#<18>

A A

5

PCI_INTF#<18>
PCI_INTG#<18>
PCI_INTH#<18>

PM_CLKRUN#<17,24,27,31,32>

INT_IRQ14<17,22>

RP5B
RP5C
RP5D
RP5E
RP5F
RP5G
RP5H

1 5

8.2KOhm

2 5

8.2KOhm

3 5

8.2KOhm

4 5

8.2KOhm

6 5

8.2KOhm

7 5

8.2KOhm

8 5

8.2KOhm

9 5

8.2KOhm

10
10
10
10
10
10
10
10

ICH6M--PULL UP/STRAP (4)

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

20 57Thursday, June 09, 2005

Rev

2.0

5

R494

CPU_BSEL0<4>
CPU_BSEL1<4>

D D

C C

R1.1-S32

12

C540

B B

0.1UF

12

C550

0.1UF

+3VS +VCCP +VCCP+3VS

12

12

R513
1KOhm

/*

CLK_USB48<18>

CLK_LANPCI<29>
CLK_CBPCI<32>
CLK_DBPCI<33>

CLK_KBCPCI<27>
CLK_SIOPCI<24>
CLK_MINIPCI<31>

CLK_FWHPCI<36>
CLK_ICHPCI<18>

+3VS

120Ohm/100Mhz

+3.3VS_CLKVDD1

12

C541

0.1UF

2.2OHM

R257
1KOhm

/*

R571

L81

R1.1-S32

12

12

C555

0.1UF

12

+3V_CLKA

C511
10UF/10V

C552

0.1UF

R1.1-S01

CLK_BSEL1

DREFSSCLK<8>
DREFSSCLK#<8>

R529

2.2OHM

12

C516

0.1UF

R792
0Ohm

1 2

12

R1.1-S22

1 2
1 2

Install when B STEP CPU

12

R482
10KOhm

R493

0Ohm

/*

1 2

C554 5PF

1 2
/*

21

1Ohm
R502

33PCIF3
33PCIF4
33PCIF5

33PCIF0

1 2

33PCIF1
CLK_PWR_GD#

USB/FSA
DOT96

DOT96#

R558
R557

1 2
1 2

+3V_CLK

33Ohm
33Ohm

PCIE3
PCIE#3
SRCCLKT_SATA
SRCCLKC_SATA

0Ohm
0Ohm

12

1 2

1 2
/*

C559 5PF

CLK_BSEL0

R254

CLK_BSEL1

R1.1-S06

R258
10KOhm

R255

0Ohm

/*

C561 5PF

C545 5PF

C560 5PF

1 2

1 2

1 2

/*

/*

/*

Clock Gen. P/N:06-011295010 is an error part number.
And P/N:06-011338110 is right part number.
It is Green Part.(AP-106847 to change it.)

1 2

1 2

CLK_BSEL1
CLK_BSEL0

1 2

C551 5PF

C508 5PF

1 2

1 2

/*

/*

U54

1

VDDPCI0

2

GND0

3

PCICLK3

4

PCICLK4

5

PCICLK5

6

GND1

7

VDDPCI1

8

ITP_EN/PCICLK_F0

9

SEL100_96MHZ#/PCICLK_F1

10

Vtt_PwrGd#/PD

11

VDD48

12

FSLA/USB_48MHz

13

GND2

14

DOTT_96MHz

15

DOTC_96MHz

16

FSLB/TEST_MODE

17

96MHz_SST/SRCCLKT0

18

96MHz_SSC/SRCCLKC0

19

SRCCLKT1

20

SRCCLKC1

21

VDDSRC0

22

SRCCLKT2

23

SRCCLKC2

24

SRCCLKT3

25

SRCCLKC3

26

SRCCLKT4_SATA

27

SRCCLKC4_SATA

28

VDDSRC1

ICS954206

06-011338110

R256
0Ohm

0Ohm
R514

1 2
/*

P/N:06-011338110

A A

R1.1-S43

C531
33PF/50V

5

4

B STEP

CPU_BSEL0

C558 5PF

C556 5PF

1 2
/*

CPUCLKT2_ITP/SRCCLKT7

CPUCLKC2_ITP/SRCCLKC7

CITIZEN 20PF/30PPM
07-010311430

12

CPU_BSEL1 HOST CLOCK
0
1

Because CPU output only 1.05V and NB
is only input type,if we use 1K ohm
will drop 1.05V to NB.May be not
enough.Therefore,change to 0 ohm.

10-k pull-up to +3VS
define pin35 36 as ITP CLK
10-k pull-down to gnd
define pin35 36 as SRC CLK

REF1/FSLC/TEST_SEL

X4

12

14.318MHZ

0
0 100

MCH_SEL1 <8>

MCH_SEL0 <8>

R580
10KOhm

R563 33Ohm

1 2

R1.1-S02

R566 8.2Ohm

1 2

R567 5.1Ohm

1 2

R568 33Ohm

1 2

R553 5.1Ohm

1 2

R552 5.1Ohm

1 2

R522 27Ohm

1 2

R570 33Ohm

1 2

R565 33Ohm

1 2

+3VS

R564

10KOhm

1 2

56

PCICLK2

CPU_STOP#

CPUCLKT0
CPUCLKC0

CPUCLKT1
CPUCLKC1

SRCCLKT6
SRCCLKC6
SRCCLKT5
SRCCLKC5

4

REF0

GND3

VDDREF

SDATA

SCLK

GND4

VDDCPU

IREF
GNDA
VDDA

VDDSRC2

GND5

12

X1
X2

C525
33PF/50V

55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29

PCI/SRC_STOP#

10-k pull-up to +3VS
define pin17 18 as 100MHz
10-k pull-down to gnd
define pin17 18 as 96MHz

CLK_STP_PCI#
CLK_STP_CPU#

XIN_CLKGENXOUT_CLKGEN

133

+3VS

1 2

USB/FSA

33PCIF5
33PCIF4
33PCIF3
33PCIF2
33PCIF1
33PCIF0

R569

10KOhm

1 2

33PCIF2

REFO

XIN_CLKGEN
XOUT_CLKGEN

VDD_REF_CR

CPU0
CPU0#

CPU1
CPU1#
IREF

ITP_BCLK
ITP_BCLK#

PCIE5
PCIE#5

SDA_3S <12,13,28,35>
SCL_3S <12,13,28,35>

+3V_CLKA

R1.1-S32

+3VS

12

C557

0.1UF

R1.1-S22

R1.1-S29

R709

1 2

10KOhm

C518 0.1UF

1 2

R533

475Ohm

1%

1 2

12

C538

0.1UF

3

L82
120Ohm/100Mhz

CLK_STP_PCI#
CLK_STP_CPU#

CPU1
CPU1#

CPU0
CPU0#

ITP_BCLK
ITP_BCLK#

PCIE5
PCIE#5

PCIE3
PCIE#3

SRCCLKT_SATA
SRCCLKC_SATA

CLK_BSEL0

3

21

12

C543

10UF/10V

R523 0Ohm

1 2

R500 0Ohm

1 2

R509 33Ohm

1 2

R508 33Ohm

1 2

R511 33Ohm

1 2

R510 33Ohm

1 2

R507 33Ohm/*

1 2

R506 33Ohm/*

1 2

R505 33Ohm

1 2

R504 33Ohm

1 2

R556 33Ohm

1 2

R555 33Ohm

1 2

R788 33Ohm

1 2

R790 33Ohm

1 2

DOT96
DOT96#

CLK_PWR_GD#

R1.1-S02

REFO

R1.1-S29

+3V_CLK

12

C530

10UF/10V

R560
R559

1 2
1 2

33Ohm
33Ohm

R520 22Ohm

1 2

R519 22Ohm

1 2

VRM_PWRGD<44,48>

12

12

C549

C533

0.1UF

0.47U

STP_PCI# <17>
STP_CPU# <17,44>

CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>

CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>

CLK_ITP_BCLK <6>
CLK_ITP_BCLK# <6>

CLK_MCH_3GPLL <8>
CLK_MCH_3GPLL# <8>

CLK_PCIE_ICH <18>
CLK_PCIE_ICH# <18>

CLK_PCIE_SATA <17>
CLK_PCIE_SATA# <17>

C506 5PF

1 2
/*

0Ohm /*

12

C548

0.1UF

1 2
/*

R243

1 2

+3V_CLK

12

12

C515

0.1UF

DREFCLK <8>
DREFCLK# <8>

CLK_PWR_GD# <44>

C505 5PF

+3VS

3

1

G

2

C517

0.1UF

CLK_ICH14 <17>
CLK_SIO14 <24>

R244
10KOhm

/*

1 2

CLK_PWR_GD#

D

Q33
2N7002

S

/*

2

1

PLACE termination close to clock gen.

+3VSUS

/*

/*

1 2

1 2

R241
20KOhm

R242
10KOhm

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_ITP_BCLK
CLK_ITP_BCLK#

DREFCLK
DREFCLK#

CLK_PCIE_ICH
CLK_PCIE_ICH#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

CLK_PCIE_SATA
CLK_PCIE_SATA#

DREFSSCLK
DREFSSCLK#

B

1

/*

+3VS

/*

R247
100KOhm

1 2

3

C

E
2

CLK_BSEL0

V

Q32

PMBS3904

R490 49.9Ohm

1 2

R489 49.9Ohm

R492 49.9Ohm
R491 49.9Ohm

R488 49.9Ohm
R487 49.9Ohm

R575 49.9Ohm
R574 49.9Ohm

R486 49.9Ohm
R485 49.9Ohm

R789 49.9Ohm
R791 49.9Ohm

FS_C FS_B FS_A

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

1%

1 2

1%

1 2

1%

1 2

1%
1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

ICS ICS954206 FREQUENCY TABLE

12
11

7

/*1%
/*1%

R579
R578

49.9Ohm

49.9Ohm

1%
1%

1%
1%

R577
R576

49.9Ohm

49.9Ohm

SRC

CPU
MHz

266 100 33.33 14.318 48.00 96.00
133 100 33.33 14.318 48.00 96.00
200 100 33.33 14.318 48.00 96.00
166 100 33.33 14.318 48.00 96.00
333 100 33.33 14.318 48.00 96.00
100 100 33.33 14.318 48.00 96.00
400 100 33.33 14.318 48.00 96.00

10

U29B

D

PR

CK

VCC

GND

CLR

SN74LVC74APWR

13

PM_SUSB#

C268
1000PF

1 2

/*

PCI

MHz

MHz

reserved 14.318 48.00 96.00

+3VALWAYS

9

Q

8

Q#

14

REF

USB
MHz

DOT
MHz

MHz

VCCA_1.8_EN <4>
VCCA_1.8_EN# <4>

PM_SUSB# <4,17,29,32,37,40,43,48,52>

74HC74 TRUTH TABLE

PRE# CLR# CLK D Q Q'

L H X X H L
H L X X L H
L L X X float float
H H T H H L
H H T L L H
H H L X Qo Qo'

Title :

CLOCK ICS954206

ASUSTECH CO.,LTD.

Size Project Name

C

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

21 57Thursday, June 09, 2005

Rev

2.0

5

Support Hot
SWAP

R1.1-S22

+3VS

D D

12

C776

0.1UF

C C

B B

XIDE_EN#_3<17>

+3VS

A A

R830

10KOhm

IOINPIN

R834

10KOhm

IDE_BDA2
IDE_BDA0
IDE_BDA1

IDE_BINTRQ
IDE_BDMACK#
IDE_BIORDY

IDE_BDIOR#
IDE_BDIOW#
IDE_BDMARQ
IDE_BDD15
IDE_BDD0
IDE_BDD14
IDE_BDD1

+3VS

R817
10KOhm

1 2

R821 100KOhm

1 2

BAYDOCK_IN#

R826 8.2KOhm

1 2

+3VS +3VS

12

/*

STP_DISABLE#

12

/*

+1.8VS

IDE_BRST#

D69
RB751V_40

/*

R831

10KOhm

R835

10KOhm

/*

5

12

U66

49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65

+3VS

12

C786

0.47U

IDE_BDMARQ
IDE_BDD7
IDE_BINTRQ

12

12

IDE_DA2
IDE_DA0
IDE_DA1
VDDO_1
IDE_INTRQ
IDE_DMACK_b
IDE_IORDY
VDDI_1
VSS1
IDE_DIOR_b
IDE_DIOW_b
IDE_DMARQ_b
IDE_DD15
IDE_DD00
IDE_DD14
IDE_DD01
GND

+12VS

1

G

+1.8VS

+3VS

T351

T352

T353

1

1

1

1

IDE_BDCS0#

IDE_BDCS1#

47

IDE_CS0_b48IDE_CS1_b

IDE_DD131IDE_DD022IDE_DD123VDDO_24IDE_DD035IDE_DD116IDE_DD047VSS28VDDI_29IDE_DD1010IDE_DD0511IDE_DD0912IDE_DD0613IDE_DD0814IDE_DD0715IDE_RESET_b

IDE_BDD12

IDE_BDD2

IDE_BDD13

R812 22Ohm

R816
100KOhm

1 2

XIDE_EN_12VS

Q166

3

2N7002

D

S

2

IOINSEL0

STP_PIN38

ODCS

STP_PIN36

STP_PIN39

44

41

46

42

45

43

38

37

VSS4

VSS3

ODCS

VDDI_3

VDDO_3

Reserved1

Reserved2

Reserved340Reserved439Reserved5

DD_DISABLE_b

SYS_RESET_b

IDE_BDD3

1

G

R823 5.6KOhm
R824 10KOhm
R827 10KOhm

R832

10KOhm

IDE_BDD8

IDE_BDD6

IDE_BDD5

IDE_BDD9

IDE_BDD10

IDE_BDD4

IDE_BDD11

1 2

+5VS

Q167

3

2N7002

D

12

C782

0.1UF

S

2

R822 100KOhm

12

1 2

D70
RB751V_40

1 2
1 2
1 2

+3VS +3VS

12

/*

Reserved636Reserved735Reserved834Reserved9

R810
10KOhm

/*

T355

T354

T356

T357

1

1

1

STP_PIN33

STP_PIN35

STP_PIN34

33

TXP

TXN
GNDA2
VDDA2

RXN

RXP

REXT
GNDA1
VDDA1
XTALO

XTALI/CLKI

IOINSEL1

IOINPIN

IOINSEL0

SII3811CNU

16

IDE_BDD7

1

D

235

G

Q165
SI3456DV

12

12

C787

0.47U

R833

10KOhm

IOINSEL1

12

S

/*

+1.8VS

6
4

+5VDOCK

R819
100KOhm

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

12

+3VS

12

C773

0.1UF

XO_STP
XI_STP

STP_DISABLE#

IOINSEL1
IOINPIN
IOINSEL0
IDERST#_5

12

C783

0.1UF

4

+3VS +1.8VS

12

12

C768

C769

0.1UF

L96
120Ohm/100Mhz

12

12

FOR SIL3811

C775

C774

0.1UF

0.1UF

SATA_BRIDGE_TXP0
SATA_BRIDGE_TXN0

C777 3900PF/50V

R811 1KOhm

XO_STP

C779
27P

11-033027000

R2.0-S04

X6 Main Source is 07-010732500 (Fujicom)
Second source is 07-010212500 (TXC)
Symbol is changed to 07-010732500.

PCI_RST#<18,29,31,32>

BUF_PLT_RST#<6,8,17,18,24,27,36>

+3VS

BAY_RST<27>

12

R818 10KOhm

12

C784

0.1UF

HDD_LED_5S#<40>

SATALED#<17>

OPEN DRAIN.

4

0.1UF

21

12

C778

3900PF/50V

1 2

1

12

1 2

R815 10KOhm

BAY_RST

BAY_RST#

C785
100PF

1 2

Q171
2N7002

3

D

12

C770

0.1UF

+1.8VS

12

1%

R839

12

10MOhm
X6

25MHZ

X1

GND2

GND12x2

07-010732500

GND

1 2

R813 0Ohm

1 2

R814 0Ohm

1

3

1

G

2

1

G

2

S

4
3

G

D

S

12

12

C772

C771

0.1UF

0.1UF

SATA_ICH_RXP0 <17>
SATA_ICH_RXN0 <17>

SATA_BRIDGE_RXN0 <17>
SATA_BRIDGE_RXP0 <17>

XI_STP

12

C780
27P

11-033027000

IDERST#_5

/*

3

D

Q164
2N7002

S

2

Q168
2N7002

3

D

Q169

1

2N7002

G

S

2

3

D

Q170

1

G

S

2

2N7002

SATALED#

U67

A

1

B

2
3 4

GND

NC7SZ08P5X

12

R825 100KOhm

1 2

R828 1KOhm

D71 RB751V_40

1 2
1 2

R829 0Ohm

/*

1 2

D72 RB751V_40

3

2

1

HDD CONNECTOR

P/N:12-16150044N

+5VS

12

12

C59

R382
10KOhm

10UF/10V

IDE_BRST#
IDE_BDD7
IDE_BDD6
IDE_BDD5

+3VS

R744

4.7KOhm

IDE_PIORDY<17>

INT_IRQ14<17,20>

IDE_PIORDY

INT_IRQ14

R2.0-S05

12

C307

0.1UF

1 2

+3VS

10KOhm

10KOhm

10KOhm

10KOhm

3 4

5 6

7 8

1 2

RN26B

RN26A

RN26C

RN26D

12

C320

0.1UF

+3VS

R383

4.7KOhm

1 2

IDE_PIORDY

1 2

R859 0Ohm

1 2

R860 0Ohm

BAY_IN0
BAY_IN1

BAYDOCK_IN#

12

C329

0.1UF

+5VDOCK

12

XIDE_EN_12VS

3

Q161
2N7002

/*

IDE_PIORDY_X

C371
10UF/10V

D

IDE_PDIOR#<17>
IDE_PDIOW#<17>
IDE_PDDREQ<17>
IDE_PDDACK#<17>

IDE_IRQ14

1

3

D

IDE_BIORDY

+5VS

C781 0.1UF

1 2

5

VCC

Y

R820
22Ohm

1 2

IDERST#_5S

+3VS

IDE_PDASP#

IDE_BDASP#

3

IDE_BDD4
IDE_BDD3
IDE_BDD2
IDE_BDD1
IDE_BDD0

IDE_BDMARQ
IDE_BDIOW#
IDE_BDIOR#

IDE_BDMACK#
IDE_BINTRQ
IDE_BDA1
IDE_BDA0
IDE_BDCS0#
IDE_BDASP#

12

12

C312

0.1UF

G

2

S

1

G

Q162
2N7002

2

/*

S

IDE_PDA0<17>
IDE_PDA1<17>
IDE_PDA2<17>

IDE_PDCS1#<17>
IDE_PDCS3#<17>

CD-L_A<37>

CD_GND_A<37>

CD-R_A<37>

CD-L_A

CD-R_A CD_GND_A

C317

10UF/10V

IDE_PIORDY_X

T349

IDE_PDD[15:0]<17>

12

R652 10KOhm

1 2

R653 10KOhm

12

C365

2

0.1UF

1

IDERST#_5S
IDE_PDASP#
IDE_IRQ14
IDE_PDIOR#
IDE_PDIOW#
IDE_PDDREQ
IDE_PDDACK#
IDE_PDIAG

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_PDA0
IDE_PDA1
IDE_PDA2

IDE_PDCS1#
IDE_PDCS3#

CD-L_A

CD_GND_A

CD-R_A

44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10

8
6
4
2

R284

1 2

470Ohm

IDE_PDD[15:0]

44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

46

43

43

41

41

39

39

P_NC2

37

37

35

35

33

33

31

31

29

29

27

27

25

25

23

23

21

21

19

19

17

17

15

15

13

13

11

11

9

9

7

7

5

5

3

3

1

1

P_NC1

45

CON14
HDD_CON_2X22P

R285
1KOhm

/*

IDE_PCSEL

CON9

7

7

55

55

19

19

9

9

4

4

5

5

2

2

6

6

8

8

3

3

1

1

43

43

45

45

47

47

49

49

51

51

53

53

56

56

54

54

52

52

50

50

48

48

46

46

44

44

42

42

15

15

13

13

10

10

17

17

12

12

59

59

57

57

58

58

60

60

ZIF_CON_60P

IDE_BDD8
IDE_BDD9
IDE_BDD10
IDE_BDD11
IDE_BDD12
IDE_BDD13
IDE_BDD14
IDE_BDD15

IDE_BCSEL

IDE_BDIAG
IDE_BDA2
IDE_BDCS1#

+5VDOCK +5VDOCK

1 2

21

16

21

16

POWER

CDROM

GND

11

33

11

33

T348

1

ODD CONNECTOR

CON Part Number as M3N
P/N:12-182006000

25

31

232325

27

292931

18

35

37

39
41

40
36
32
28
14
24
26
22

FDD

34

1

FPC

20

60

61

38

61

38

30

62

62

ASUSTECH CO.,LTD.

Size Project Name

A2

Date: Sheet

+5VS

12

27

18

35

37

39
41

40
36
32
28
14
24
26
22

34

20

30

12

C364

0.1UF

CSEL(ASUS)
H:Master
L:Slave

PCSEL : Pull-Down, HDD as Master

12

R389

470Ohm

BAYDOCK_IN#

BAY_IN0

BAY_IN1

Z61Ae

1

C318

0.1UF

Z61AE Default
CSEL(Standard)
L:Master
H:Slave

Title :

Engineer:

12

12

C302

C316

0.1UF

10UF/10V

BAYDOCK_IN# <27>

BAY_IN0 <24>

BAY_IN1 <24>

HDD & ODD CONN & HOT SWAP

Sam Wang

of

22 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

RESERVE 0402 PAD for USB ESD diode.

USBP4-_3
USBP4+_3
USBP3-_3
USBP3+_3

12

C801

0.01UF

D D

C C

/*

USB_PN4<18>
USB_PP4<18>

USB_PN3<18>
USB_PP3<18>

USB_PP1<18>
USB_PN1<18>

USB_PP0<18>
USB_PN0<18>

12

C803

0.01UF

/*

12

C804

0.01UF

/*

12

C802

0.01UF

/*

12

C805

0.01UF

/*

L63
90OHM/370mA

09G092090200
23

23

L64
90OHM/370mA

09G092090200

L15
90OHM/370mA

09G092090200
23

23

L16
90OHM/370mA

09G092090200

12

12

C806

C807

0.01UF

0.01UF

/*

/*

14

14

14

14

12

C808

0.01UF

/*

USBP4-_3
USBP4+_3

USBP3-_3
USBP3+_3

USBP1+_3
USBP1-_3
USBP0+_3
USBP0-_3

USBP1+_3
USBP1-_3
USBP0+_3
USBP0-_3

USBP4+_3
USBP4-_3
+5VUSB2

USBP3+_3
USBP3-_3
+5VUSB3

USBP0+_3
USBP0-_3
+5VUSB0

USBP1+_3
USBP1-_3
+5VUSB1

CON12

8
7
6
5

4
3
2
1

CON13

8
7
6
5

4
3
2
1

GND4
GND2
0P+
0P­VCC2

GND1
1P+
1P­VCC1

GND4
GND2
0P+
0P­VCC2

GND1
1P+
1P­VCC1

GND3

GND3

10

USB_CON_2X4P

9

10

USB_CON_2X4P

9

CON Part Number Modify as ME

USB

CON Part Number Modify as ME

USB

B B

+5V

12

R2.0-S25

SUSC_PWR

SUSC_PWR <52>

U6

EN#/EN4FLG

3

IN_2

2

IN_1

1

GND

G528P1U

C26

0.1UF/25V

+3VSUS

R354

5
6
7
8

100KOhm

1 2

R879 0Ohm

+5VUSB_01

+5V

12

SUSC_PWR

U7

3
2
1

G528P1U

EN#/EN4FLG
IN_2

OUT_3

IN_1

OUT_2

GND

OUT_1

12

C810

0.1uF/10V

/*

R2.0-S25

USB_OC#01 <18>

12

80Ohm/100Mhz

80Ohm/100Mhz

12

+

CE4
47UF/6.3V

L19

+5VUSB0

21

12

C17

0.1UF/25V

L20

+5VUSB1

21

12

C19

0.1UF/25V

C39

0.1UF/25V

Vdroop fail if use 150U

A A

5

4

3

OUT_3

OUT_2

OUT_1

+3VSUS

1 2

5

R878 0Ohm

6
7
8

2

R353

100KOhm

+5VUSB_23

12

C809

0.1uF/10V

/*

L66

+5VUSB2

21

80Ohm/100Mhz

USB_OC#23 <18>

12

80Ohm/100Mhz

12

+

CE2
47UF/6.3V

12

C355

0.1UF/25V

L65

+5VUSB3

21

12

C356

0.1UF/25V

Vdroop fail if use 150U

Title :

USB PORTS

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

23 57Thursday, June 09, 2005

Rev

2.0

5

D D

4

3

2

1

Super I/O

+3VS

LPT_ACK#<26>
LPT_ERR#<26>

C C

B B

LPT_AFD#<26>
LPT_STB#<26>

CLK_SIO14<21>

LPC_AD0<17,27,33,36>
LPC_AD1<17,27,33,36>

LPC_AD2<17,27,33,36>
LPC_AD3<17,27,33,36>

LPC_FRAME#<17,27,33,36>

LPC_DRQ#0<17,20>

BUF_PLT_RST#<6,8,17,18,22,27,36>
PM_SUS_STAT#<17,20>

PM_CLKRUN#<17,20,27,31,32>

CLK_SIOPCI<21>
INT_SERIRQ<17,20,27,32>

DSR1#

CTS1#
RI1#

DCD1#
IO_PME#

+3VS

+3VS

1 2

R3 0Ohm /*

+3VS

R11 10KOhm /*
R12 10KOhm /*
R13 10KOhm /*
R1 10KOhm /*
R2 10KOhm

R14 10KOhm

+3VS

1 2

10KOhm

3 4

10KOhm

5 6

10KOhm

7 8

10KOhm

51

53

60

62

64

63

U1

1

nRTS1

2

nCTS1

3

nDTR1

4

nRI1

5

nDCD1

6

IO_PME#

7

VTR

8

VSS1

9

CLOCKI

10

LAD0

11

VCC1

12

LAD1

13

LAD2

14

LAD3

15

LFRAME#

16

LDRQ#

LPC47N217

LPCPD#
CLK_SIOPCI

12
12
12
12
12

12

RN1A

/*

RN1B

/*

RN1C

/*

RN1D

/*

61

TXD1

RXD1

nDSR1

nSTROBE

PCI_RESET#17LPCPD#18CLKRUN#19PCI_CLK20SER_IRQ21VSS222GP4023GP4124GP4225VCC226GP4327GP4428GP4529GP4630GP4731GP10

GPI14
GPI13
IO_SMI#
IO_PME#
LPCPD#

SYSOPT

CTS1#
RI1#
DSR1#
DCD1#

52

58

59

54

56

57

55

PE

PD449PD550PD6

PD7

nALF

nERROR

VSS4

SLCT

nACK

VCC4

BUSY

+3VS

48

PD3

47

PD2

46

PD1

45

VCC3

44

PD0

43

VSS3

42

nSLCTIN

41

nINIT

40

GP23

39

IRMODE/IRRX3

38

IRTX2

37

IRRX2

36

GP14/IRQIN2

35

GP13/IRQIN1

34

GP12/IO_SMI#

33

GP11/SYSOPT

32

SYSOPT=0 --> 0x002E
SYSOPT=1 --> 0x004F

CLK_SIOPCI

12

C9

5PF

/*

GPI14
GPI13
IO_SMI#
SYSOPT

LPT_BUSY <26>
LPT_PE <26>
LPT_SLCT <26>
LPT_PD7 <26>
LPT_PD6 <26>
LPT_PD5 <26>
LPT_PD4 <26>

LPT_PD3 <26>
LPT_PD2 <26>
LPT_PD1 <26>

LPT_PD0 <26>
LPT_SLIN# <26>

LPT_INIT# <26>

802_ON# <40>
BAY_IN1 <22>
BAY_IN0 <22>

PID_1 <15>
PID_0 <15>

+3VS

12

C12

0.1UF

+3VS

+3VS

12

C24
10UF/10V

12

C21

0.1UF

12

C1

0.1UF

12

C352

0.1UF

A A

SUPER I/O LPC47N217

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

24 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

H1

1

C111D91
H2

1

1

1

1

1

1

1

1

1

1

1

1

1

H7

C111D91

C111D91
H3

C111D91
H5

C111D91
H8

C111D91
H13

C111D91
H10

C111D91
H20

C111D91
H19

C111D91
H18

C111D91
H23

C111D91
H21

C111D91
H22

C111D91

D D

C C

AGND_A

H9

1

C67D67N

H24

1

C91D91N

H16

1

c158d138

H12

1

c158d138

H17

1

c158d138

H11

1

c158d138

FIXED HOLE CPU

R1.1-S13

MDC_NUT

North bridge heatsink nut

R1.1-S16
EMI request.

Place Below X1

Need to change part number in BOM
to 13-N7510M270.
R1.1 has changed it in symbol.

H4

1

CT197CB87D47

13-N7510M270

H6

1

CT197CB87D47

13-N7510M270

H14

1

C217D130

H15

1

C217D130

MDC _NUT
Type:SMD TOP SIDE
Part Number
:13-N7510M270

North bridge heatsink nut
Type:SMD TOP SIDE
Part Number :13-N9980M100

Need to change part number in BOM
to 13-N7510M270.
R1.1 has changed it in symbol.

H25

/*

1

CT197CB87D47

13-N7510M270

B B

For EMI DDR Finger spring.
Need to add part number.

EMI1

1

1

EMI_SPRING_PAD

13-NDV50S010

EMI2

1

1

EMI_SPRING_PAD

13-NDV50S010

EMI3

1

1

EMI_SPRING_PAD

13-NDV50S010
/*

EMI4

1

1

EMI_SPRING_PAD

13-NDV50S010
/*

EMI5

1

1

EMI_SPRING_PAD

13-NDV50S010
N/A

A A

5

4

3

R2.0-S20
EMI request.

EMI SPRING
Type:SMD BOTTOM SIDE
Part Number :13-NDV50S010

FOR TOP EMI SPRING.

2

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

Z61Ae

1

Z61Ae

Sam Wang

Rev

2.0

of

25 57Thursday, June 09, 2005

5

4

3

2

1

PR_IN#

L11

21

75Ohm/100Mhz

L10

DAC_R_PB_Q

21

12

R1.1-S37

L_RDP_PR

DAC_G_PB_Q

+5VS

12

R8

1 2

10KOhm

+3VSUS

12

R23
10KOhm

4 A(Typ)

Q1

SI3457DV

6
5

S

4

R20

1 2

100KOhm

A/D_DOCK_PR

12

C13

0.1UF/25V

PORT BAR III

For Port Bar OC

U4

1

OUT

2

GND
SET3ON#

AAT4610

+5VSUS

34
32
30
28
26
24
22
20
18
16
14
12
10

8
6
4

2
68
66
64
62
60
58
56
54
52
50
48
46
44
42
40
38
36

12

R847
10KOhm

/*

1 2

D4
RB751V_40

A/D_DOCK_PR

1

D

2
3

G

R19

1 2

20KOhm

PR_IN#_Q

R1.1-S04

For EMI (NEAR CONNECTOR)

+5VA/D_DOCK_PR +5VS

12

C16

0.1UF/25V

12

C14

0.1UF

12

C23

0.1UF

R1.1-S23

+5VS

CN3

33

33

34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
68
66
64
62
60
58
56
54
52
50
48
46
44
42
40
38
36

69697070717172

IN

31
29
27
25
23
21
19
17
15
13
11

9
7
5
3

1
67
65
63
61
59
57
55
53
51
49
47
45
43
41
39
37
35

72

DOCKING_68P

5
4

31
29
27
25
23
21
19

L_TDN_PR

17

L_RDN_PR

15
13
11
9
7

PR_IN#_Q

5
3
1
67
65
63
61
59
57
55
53
51
49
47
45
43
41
39
37
35

DAC_B_PB_Q

+5V

12

C28

4.7U

+5VS

+5V_PR

75Ohm/100Mhz

USB_PP2 <18>

LPT_STB# <24>
LPT_PD1 <24>
LPT_PD3 <24>

DDC2BD_5 <16>

LPT_ACK# <24>
LPT_PD4 <24>
LPT_INIT# <24>
LPT_AFD# <24>
LPT_SLCT <24>

L9

DDC2BC_5 <16>

21

DAC_B_PB <16>

LPT_SLCT

LPT_SLIN#
LPT_INIT#
LPT_ERR#
LPT_AFD#
LPT_PE
LPT_ACK#
LPT_PD6
LPT_PD4

LPT_BUSY
LPT_PD5
LPT_PD2
LPT_PD0
LPT_PD7
LPT_PD3
LPT_PD1
LPT_STB#

1 2

R808

2.7KOhm

1 5

2.7KOhm

2 5

2.7KOhm

3 5

2.7KOhm

4 5

2.7KOhm

6 5

2.7KOhm

7 5

2.7KOhm

8 5

2.7KOhm

9 5

2.7KOhm

1 5

2.7KOhm

2 5

2.7KOhm

3 5

2.7KOhm

4 5

2.7KOhm

6 5

2.7KOhm

7 5

2.7KOhm

8 5

2.7KOhm

9 5

2.7KOhm

12

D68

SS0540

12
12
12
12

12

0Ohm

0Ohm /*

U5

1
2
3
4
5
6
7

PI5C3257

R329
150Ohm

R336

R338

S
IA0
IA1
YA
IB0
IB1
YB
GND8YC

12

12

VCC

E#
ID0
ID1

YD
IC0
IC1

L_TDP_MB
L_TDN_MBL_TDP_PR
L_RDP_MB
L_RDN_MB

16
15
14
13
12
11
10
9

L_RDN_PR
L_RDN_MB
L_RDN
L_RDP_PR
L_RDP_MB
L_RDP

L_TDP_MB <30>
L_TDN_MB <30>
L_RDP_MB <30>
L_RDN_MB <30>

12

C33

0.1UF

DAC_G_PB
DAC_R_PB
DAC_B_PB

L_TDP
L_TDN
L_RDP
L_RDN

12

R327
150Ohm

R18 0Ohm /*
R10 0Ohm /*
R9 0Ohm /*
R17 0Ohm /*

+5VSUS

+3VSUS

PR_IN#
L_TDP_PR
L_TDP_MB
L_TDP
L_TDN_PR
L_TDN_MB
L_TDN

12

R328
150Ohm

L_TDP<29>
L_TDN<29>
L_RDP<29>
L_RDN<29>

RP8A
RP8B

10

RP8C

10

RP8D

10

RP8E

10

RP8F

10

RP8G

10

RP8H

10
10

RP9A
RP9B

10

RP9C

10

RP9D

10

RP9E

10

RP9F

10

RP9G

10

RP9H

10
10

OE S Out
============
L L B1
L H B2
H X NC

D D

PR_IN#<16>

A/D_DOCK_IN DOCK_VIN_P

C C

USB_PN2<18>

LPT_PD0<24>
LPT_PD2<24>
LPT_PD5<24> LPT_PD7 <24>

LPT_BUSY<24>
VSYNC_PB<16>
DAC_G_PB<16>

B B

A A

LPT_PE<24>

LPT_PD6<24>

LPT_SLIN#<24>

LPT_ERR#<24>

HSYNC_PB<16>
DAC_R_PB<16>

+12VS

+5V_PR

L18

4532

680 Ohm/ 100MHz

R7 0Ohm

75Ohm/100Mhz

+5V_PR

C10

0.47U

Title :

PORT BAR 3

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

26 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

+5VS

+3VS

1

RN51A

RN51B

RN51D

RN51C

D D

C C

R1.1-S22
R1.1-S22

B B

A A

P2.1 Low : Power Button Override disable
Input Event only at P54, P55, P60 - P67

P50, P43, P54, P55 are wake-up event
inputs when KBC in standby mode

R266

470KOhm

1 5

10KOhm

1 2

WATCHDOG<35>
CHG_FULL_OC<48>

BAT_LOW#_KBC<40>

BAY_RST<22>

BT_ON<31>
BAYDOCK_IN#<22>
BAT1_IN#_OC<53>

ADJ_BL<15>
BAT2_IN#_OC<53>

ACIN_OC<53>

LID_ICH#_3<43>

BAT_SEL=0 --> BAT2
BAT_SEL=1 --> BAT1

BAT_SEL
SMCLK_BAT2
SMCLK_BAT1
SMC_BAT
SMDATA_BAT2
SMDATA_BAT1
SMD_BAT

5

1
2
3
4
5
6
7

U32

S
IA0
IA1
YA
IB0
IB1
YB
GND8YC

PI5C3257

VCC

E#
ID0
ID1

YD
IC0
IC1

10

10

2 5

10KOhm

RP4B

RP4A

16
15
14
13
12
11
10
9

+3V

10

10

10

7 5

6 5

3 5

4 5

10KOhm

10KOhm

10KOhm

10KOhm

RP4E

RP4C

RP4D

C718 0.1UF

+5V

12

C294

0.1UF

10

RP4F

12

10

8 5

10KOhm

RP4G

10

9 5

10KOhm

RP4H

LID_ICH#_3
INTERNET#

BAT2_IN#_OC

DISTP#

MARATHON#

ACIN_OC

BAT_LEARN<50>

KBCRSM<43>

PM_CLKRUN#<17,20,24,31,32>

DISTP#<40>
MARATHON#<40>

802_ON<31,40>
INTERNET#<40>
EMAIL#<40>

INTCLK_5S<41>

INTDATA_5S<41>

KEYBOARD CONN

CON Part Number Modify as M3N

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

KBDDT1 KBDDT0 Matrix
1 1 US
1 0 UK
0 0 JP

4

EC should set
OP_SD low in S3,
keep from leakage.

INT_SERIRQ<17,20,24,32>
CLK_KBCPCI<21>

BUF_PLT_RST#<6,8,17,18,22,24,36>

LPC_FRAME#<17,24,33,36>
LPC_AD3<17,24,33,36>
LPC_AD2<17,24,33,36>
LPC_AD1<17,24,33,36>
LPC_AD0<17,24,33,36>

P23
BAT_LEARN
BAT_SEL
KBCRSM

WATCHDOG
KBCPURST_3Q

KBC_GA20
KBSCI_3Q
PM_CLKRUN#

BAT_LOW#_KBC

T358

BAY_RST
BT_ON
BAYDOCK_IN#
BAT1_IN#_OC

T359

ADJ_BL
BAT2_IN#_OC

DISTP#
MARATHON_#
ACIN_OC
LID_ICH#_3

INTERNET_#
EMAIL_#

KBDCLK_5S
MOUSECLK_5S
INTCLK_5S
KBDDATA_5S
MOUSEDATA_5S
INTDATA_5S

SMC_BAT
SMD_BAT

CON6

5

KSI0

6

KSI1

8

KSI2

9

KSI3

10

KSI4

11

KSI5

14

KSI6

15

KSI7

NC0
NC1

1

KSO0

NC2

2

KSO1

NC3

3

KSO2

4

KSO3

7

KSO4

12

KSO5

13

KSO6

16

KSO7

17

KSO8

18

KSO9

19

KSO10

20

KSO11

21

KSO12

22

KSO13

23

KSO14

24

KSO15

FPC_CON_28P

1

1

25
26
27
28

KBC_P51

KBC_P56

KBDDT0
KBDDT1

63
64
65
66
67
68
69
70

35
36
37
38

23
22
21
20
19
18

17
16
15
14
13
12
11
10

74
75
76
77
78
79
80

1

4
5
6
7
8
9

2
3

C280

1 2

5PF

/*

U31

P87/SERIRQ
P86/LCLK
P85/LRESET#
P84/LFRAME#
P83/LAD3
P82/LAD2
P81/LAD1
P80/LAD0

P54,P55,P43,P50 are

P23

wake-up event

P22
P21

inputs when KBC in

P20

standby mode

P42/INT0
P43/INT1*
P44/RXD
P45/TXD
P46/SCLK1
P47/SRDY1#/CLKRUN#

P50/INT5*
P51/INT20
P52/INT30/1-WIRE1
P53/INT40/1-WIRE2
P54/CNTR0*
P55/CNTR1*
P56/DA1/PWM01
P57/DA2/PWM11

P67/AN7
P66/AN6
P65/AN5
P64/AN4
P63/AN3
P62/AN2
P61/AN1
P60/AN0

P75/INT41
P74/INT31
P73/INT21
P72
P71
P70

P77/SCL
P76/SDA

M38857

KBDDT0 <18,20>
KBDDT1 <18,20>

80mA

P17/KSO15
P16/KOS14
P15/KSO13
P14/KSO12
P13/KSO11
P12/KSO10

P11/KSO9
P10/KSO8
P07/KSO7
P06/KSO6
P05/KSO5
P04/KSO4
P03/KSO3
P02/KSO2
P01/KSO1
P00/KSO0

P37/KSI8
P36/KSI7
P35/KSI6
P34/KSI5
P33/KSI4

P32/KSI3
P31/PWM10/KSI2
P30/PWM00/KSI0

P40/XCOUT

P41/XCIN

RESET#

CNVSS

3

VREF

XOUT

AVSS

10KOhm

10KOhm

10KOhm

10KOhm

1 2

3 4

7 8

Q92

G

2

S

3

D

2N7002

KBC_EXTSMI

1

12

Q104

G

2

S

R535

10KOhm

Z61Ae

5 6

1

+3VSUS

12

R536

10KOhm

3

D

2N7002

G

S

2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

MOUSEDATA_5S
MOUSECLK_5S
KBDDATA_5S
KBDCLK_5S

Title :

Engineer:

1

Q101

RP3A
RP3B
RP3C
RP3D
RP3E
RP3F
RP3G
RP3H

HA20GATE <17>

KBDCPURST <17>

KBDSCI_3 <17>

ACIN_OC_3 <17>

EXTSMI#_3A <17>

1 5

10KOhm

10

2 5

10KOhm

10

3 5

10KOhm

10

4 5

10KOhm

10

6 5

10KOhm

10

7 5

10KOhm

10

8 5

10KOhm

10

9 5

10KOhm

10

+5VS

RN22B

RN22A

RN22C

10KOhm

10KOhm

10KOhm

10KOhm

7 8

3 4

1 2

5 6

KBC 38857

Sam Wang

27 57Thursday, June 09, 2005

+3V

RN22D

Rev

2.0

of

Q97

1

KBC_GA20

KBCPURST_3Q

X2

8MHZ

1 2

+3V

BAT_SEL

P2.1 Need Pull Low

R270

10KOhm

1 2

RN23A
RN23B
RN23D
RN25B

3

RN53A
RN53B
RN53C
RN53D

RN23C
RN25A
RN25C
RN25D

RN24A
RN24B
RN24C
RN24D

KBSCI_3Q

ACIN_OC

C285

1 2

5PF

C279

1 2

5PF

4.7KOhm

12

4.7KOhm

34

4.7KOhm

78

4.7KOhm

34

SMCLK_BAT1
SMDATA_BAT1
SMCLK_BAT2
SMDATA_BAT2

R267
47KOhm

/*

C283 0.1UF

1 2

+3V

1 2

C284

0.1UF

71

VCC

72

SCROLLOCK#

31

P27

NUM_LED#

32

P26

CAP_LED#

33

P25

SET_PCIRSTNS#

34

P24

XIN

VSS

39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54

55
56
57
58
59
60
61
62

28
29

27
26

25
24

30
73

KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

X1_KBC
X2_KBC

KBC_EXTSMI

EMAIL_LED#

PCI_RSTNS#

+3V

12

RN54A

RN54B

RN54D

RN54C

10KOhm

10KOhm

10KOhm

10KOhm

7 8

5 6

1 2

3 4

Follow M3N

SCROLLOCK# <40>
NUM_LED# <40>
CAP_LED# <40>
SET_PCIRSTNS# <18>

X1_KBC

X2_KBC

EMAIL_LED# <40>

PCI_RSTNS# <18>

+5VS

12

+3V

SMDATA_BAT1<49>
SMDATA_BAT2<49>

R262
1MOhm

/*

SMCLK_BAT1<49>
SMCLK_BAT2<49>

2

G

3

2

D

S

2N7002

Q100

1

G

3

D

S

2N7002

For Audio DJ, Must be Removed

10KOhm

BAT_LOW#_KBC

12

10KOhm

KBSCI_3Q

34

10KOhm

BAT1_IN#_OC

56

10KOhm

78

4.7KOhm

56

4.7KOhm

12

4.7KOhm

56

4.7KOhm

78

10KOhm

12

10KOhm

34

10KOhm

56

10KOhm

78

SMCLK_BAT1
SMCLK_BAT2

SMDATA_BAT2

EMAIL_#
SMC_BAT
SMDATA_BAT1
SMD_BAT

KBCPURST_3Q
KBC_GA20
INTDATA_5S
INTCLK_5S

R1.1-S19

2

1

3

D

2N7002

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

5

D D

ICH6-M

ICH6-M

C C

4

Connect SMLINK and SMBUS

SM_LINK0<17,20>

SM_LINK1<17,20>

+5VS

2

SCL_3A<17,20> SCL_3S <12,13,21,35>

for SMBus 2.0 compliance.

61

Q77A

UM6K1N

/*

34

5

Q77B

UM6K1N

/*

Q81

3

D

2N7002

3

+3VS+3VS

+5VS

1

G

2

S

Q80

3

D

2N7002

R442

R441

4.7KOhm

1 2

4.7KOhm

1 2

1

G

2

S

2

SDA_3S <12,13,21,35>SDA_3A<17,20>

Termal Sensor,
Clock Generator
DDR2 SO-DIMM
TPM

1

+3VALWAYS

+3VSUS

+5VALWAYS

+5VSUS

+3V

+5V
+12V
+3VS
+5VS

+12VS

+VCORE

B B

A A

+VCCP

+2.5VS

+1.8VS

+0.9VS

+1.5VS

+VCC_RTC

+1.8V

+VCC_GMCH_CORE

+VCCCB

+VPPCB

VTT_REF

A/D_DOCK_IN

+3VALWAYS <17,21,33,40,43,45,46,52>
+3VSUS <15,17,19,20,21,23,26,27,29,43,52>
+5VALWAYS <46,48>
+5VSUS <19,26,52>

+3V <15,18,27,29,31,32,33,34,38,39,40,42,43,47,52>
+5V <4,8,16,23,26,27,33,37,40,41,42,43,52,53>
+12V <34,38,42,52>
+3VS <4,10,12,13,15,16,17,19,20,21,22,24,27,31,32,35,36,37,42,43,44,47,48,52>
+5VS <16,19,22,26,27,29,31,35,38,40,42,52>
+12VS <15,16,22,26,35,42,46,52>
+VCORE <5,6,35,44>
+VCCP <4,5,6,7,10,17,19,21,47>

+2.5VS <6,8,10,11,15,16,19,42,46>
+1.8VS <22,42,52>
+0.9VS <14,47>
+1.5VS <10,18,19,42,46>
+VCC_RTC <17,19>
+1.8V <8,10,11,12,13,32,42,46,47>
+VCC_GMCH_CORE <10,11,47,48>
+VCCCB <32,33>
+VPPCB <33>
VTT_REF <8,12,13>
A/D_DOCK_IN <26,50,53>

SM BUS & POWER PORT

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

28 57Thursday, June 09, 2005

Rev

2.0

5

4

3

GND

2

1

R1.1-S14

C765

C766

10UF/10V

10UF/10V

1 2

D D

AVDDL

GND

+5VS

+2.5VSUS_LAN

12

C65
10PF

GND

L_TDP
L_TDN
L_RDP
L_RDN

GND

GND

R862
1KOhm

R863
15KOhm

1%

PCI_AD31
PCI_AD30
PCI_AD29

PCI_AD28
PCI_AD27

PCI_AD26
PCI_AD25

PCI_AD24

PCI_AD16

R861 0Ohm

12

12

1 2

R355
33Ohm

L_TDP<26>

L_TDN<26>
L_RDP<26>
L_RDN<26>

PM_SUSB#<4,17,21,32,37,40,43,48,52>

PCI_INTC#<18,20,32>

PCI_RST#<18,22,31,32>

PCI_GNT#0<18>

PCI_REQ#0<18,20>
PCI_C/BE#3<18,31,32>

C C

CLK_LANPCI<21>

/*

R1.1-S33

GND

ISOLATEB

/*

12

76

LED2

77

LED1

78

LED0

79

INTBB

80

INTAB

81

RTSB

82

GNTB

83

REQB

84

CBE3B

85

AD31

86

AD30

87

AD29

88

GND_8

89

AD28

90

VDD_5

91

AD27

92

AD26

93

AD25

94

VDD25_2

95

VDD_6

96

AD24

97

PCICLK

98

IDSEL

99

GPIO1

100

GPIO0

RTL8101L

R403

4.99KOhm

1 2

74

73

66

65

68

69

67

72

71

75

U13

70

NC

TXD-

TXD+

AVDD

AC_RSTB1GND_12AC_SYNC3AC_DOUT4AC_DIN5VDD_16AC_BCK7AD238AD229AD2110AD2011AD1912AD1813AD1714AD1615GND_216CBE2B17FRAMEB18IRDYB19TRDYB20DEVSELB21VDD_222STOPB23PAR24PERRB

RXIN-

RXIN+

AVDD_2

PCI_AD21

PCI_AD22

PCI_AD23

RTSET

GND_6

PCI_AD19

PCI_AD20

GND_7

ISOLATEB

64

63

LWAKE

PCI_AD18

1 2

XTAL1

62

RTT3

GND_5

PCI_AD16

PCI_AD17

X161X2

XTAL2

60

59

AVDD_1

1 2

58

AVDD25_1

C120

0.1uF/10V

57

PMEB

L29

120Ohm/100Mhz

EESK

EECS

EEDI/AUX

53

56

54

55

EEDI

EESK

EECS

VCTRL

21

EEDO

52

51

EEDO

25

CLKRUNB

VDD25_1

ROMCS/OEB

VDD_4

GND_4

CBE0B

VDD_3

AD10
AD11
AD12

GND_3

AD13
AD14

AD15
CBE1B
SERRB

+2.5VSUS_LAN

PME_SB#

50
49
48

PCI_AD0

47

AD0
AD1
AD2

AD3
AD4
AD5
AD6
AD7

AD8
AD9

PCI_AD1

46

PCI_AD2

45
44

PCI_AD3

43

PCI_AD4

42

PCI_AD5

41

PCI_AD6

40

PCI_AD7

39
38
37

PCI_AD8

36

PCI_AD9

35

PCI_AD10

34

PCI_AD11

33

PCI_AD12

32
31

PCI_AD13

30

PCI_AD14

29

PCI_AD15

28
27
26

PME_SB# <18,20>

+2.5VSUS_LAN

PCI_C/BE#0 <18,31,32>

PCI_C/BE#1 <18,31,32>
PCI_SERR# <18,20,31,32>

+3VSUS_LAN

PCI_STOP# <18,20,31,32>
PCI_PERR# <18,20,31,32>
PCI_PAR <18,31,32>
PCI_TRDY# <18,20,31,32>
PCI_IRDY# <18,20,31,32>
PCI_FRAME# <18,20,31,32>
PCI_DEVSEL# <18,20,31,32>
PCI_C/BE#2 <18,31,32>

PCI_AD[31:0] <18,31,32>

B B

+3VSUS_LAN

12

R405

Close to

+3VSUS_LAN

A A

RTL8100CL

120Ohm/100Mhz

C124 0.1uF/10V

12

C123 0.1uF/10V

12

GND

L69

21

R83 49.9Ohm
R82 49.9Ohm

R80 49.9Ohm
R79 49.9Ohm

5

20 mil

12

C407

0.1uF/10V

GND

AVDDL

12

C121

0.1uF/10V

GND

L_TDP

12

L_TDN

12

L_RDP

12

L_RDN

12

+3VSUS

GND

12

C52

0.1uF/10V

R1.1-S14

C767
10UF/10V

12

GND

12

12

GND

12

C44

10UF/10V

C56

0.1uF/10V

0.1uF/10V

GND

C89

R1.1-S32

12

C86

0.1uF/10V

GND

4

30 mil

12

C79

0.1uF/10V

GNDGND

+2.5VSUS_LAN

12

C55

0.1uF/10V

GND

+3VSUS_LAN

12

C78

0.1uF/10V

GND

3

R1.1-S14

The Crystal should be placed
far away from I/O ports,
important or high frequency
signal traces (Tx, Rx,power),
magnetics or board edges.

XTAL1

C127
15P

R2.0-S09

5.6K

U18

EECS

1

CS

R869
10MOhm /*

X1

25MHZ

GND2

GND

2
3

12

SK
DI
DO4GND

AT93C46

4
3

VCC

DC

ORG

12

EESK
EEDI/AUX
EEDO

1

X1
GND12x2

12

07-010732500

8
7
6
5

C128
15P

XTAL2

+3VSUS_LAN

12

C73

0.1uF/10V

GND

GND

PCI_PME#<31,32>

X1 Main Source is 07-010732500 (Fujicom)
Second source is 07-010212500 (TXC)
Symbol is changed to 07-010732500.

2

RN48A
10KOhm

+3V+3V

pull up to

34

12

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

2

G

S

Q87
2N7002

1

VccSus3_3

RN48B

by internal

10KOhm

pull-up
resistor

3

D

Z61Ae

Title :

Engineer:

1

PME_SB#

LAN-RTL8101L

Sam Wang

of

29 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

D D

TO MDC CONN.

P/N:12-170000021

RJ11 CONNECTOR

P/N:12-142111060

CON Part Number Modify as MECON Part Number Modify as ME

U2

3

NC1

SPKL-

SPKL+

NC2

WtoB_2P

C C

The 10/100M magnetics U3701 should be placed as
close as possible to the J3701 connector.

L_RDP_MB<26>
L_RDN_MB<26>

L_TDP_MB<26>
L_TDN_MB<26>

12

12

C63

B B

0.1uF/10V

C797

0.1uF/10V

1
2
3

6
7
8

4
5

U8

RD+
RD­RDCT

PTCT/TDCT
TD+
TD-

NC1
NC2

LF8423

RXCT
TXCT

16

RX+

15

RX-

14
11

10

TX+

9

TX-

12

NC3

13

NC4

RJ11_TIP_CON

1

RJ11_RING_CON

2
4

LAN_RDP
LAN_RDN

RXCT
TXCT

LAN_TDP
LAN_TDN

L61
1KOhm/100MHz

21
21

1KOhm/100MHz
L62

RJ11_TIP
RJ11_RING

12

C795

1000PF/3KV

12

C796

1000PF/3KV

RJ11

J3

5
1
2
6

3

4

LAN RJ45 CONNECTOR

P/N:12-140111080

CON Part Number Modify as ME

To improve symmetry.

R842 75Ohm

1 2

R843 75Ohm

1 2

FOR EMI

C358

0.1uF/10V

12

12

C792

R793

1 2

0Ohm

LAN_TDN

180Ohm/330mA

/*

LAN_TDP LAN_TXP

A A

LAN_RDN

180Ohm/330mA

/*

LAN_RDP

R794

R795

R796

L12

1 2

1 2

L13

1 2

14

23

0Ohm

0Ohm

14

23

0Ohm

LAN_TXN

LAN_RXN

LAN_RXP

0.1uF/10V

R2.0-S08

R844 75Ohm

1 2

R845 75Ohm

1 2

RXCT
TXCT

LAN_RXN

LAN_RXP
LAN_TXN
LAN_TXP

12

C788
5PF

/*

12

12

C789
5PF

/*

R1.1-S14

5

4

3

2

CON11

8
7
6
5
4
3
2
1

12

C791

C790

5PF

5PF

/*

/*

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

8
7
6
5
4
3
2
1

RJ45

P_GND2
NP_NC2

NP_NC1
P_GND1

Z61Ae

10
12

11
9

Title :

Engineer:

1

RJ45 / RJ11

Sam Wang

30 57Thursday, June 09, 2005

Rev

2.0

of

5

4

3

2

1

MINIPCI Connector (P/N:12-023511240) need to add
12-023521243 into second source.

PCI_AD[31:0]<18,29,32>

D D

802_ACTLED<40>

802_ON<27,40>
PCI_INTD#<18,20>

CLK_MINIPCI<21>
PCI_REQ#3<18,20>

PCI_C/BE#3<18,29,32>

PCI_C/BE#2<18,29,32>
PCI_IRDY#<18,20,29,32>
PM_CLKRUN#<17,20,24,27,32>

PCI_SERR#<18,20,29,32>
PCI_PERR#<18,20,29,32>

PCI_C/BE#1<18,29,32>

C C

PCI_AD[31:0]

CON4

125

TIP
LAN_RESERV1
LAN_RESERV3
LAN_RESERV4
LAN_RESERV6
LAN_RESERV8
LAN_RESERV9
LAN_RESERV11
INTB#

3.3V_7
RESERVED9
GROUND15
CLK
GROUND4
REQ#

3.3V_4
AD[31]
AD[29]
GROUND8
AD[27]
AD[25]
RESERVED8
C/BE[3]#
AD[23]
GROUND11
AD[21]
AD[19]
GROUND13
AD[17]
C/BE[2]#
IRDY#

3.3V_8
CLKRUN#
SERR#
GROUND14
PERR#
C/BE[1]#
AD[14]
GROUND16
AD[12]
AD[10]
GROUND2
AD[08]
AD[07]

3.3V_2
AD[05]
RESERVED4
AD[03]
5V_2
AD[01]
GROUND6
AC_SYNC
AC_SDATA_IN
AC_BIT_CLK
AC_CODEC_ID1#
MOD_AUDIO_MON
AUDIO_GND2
S_AUDIO_OUT
S_AUDIO_OGND
AUDIO_GND1
RESERVED7
VCC5A

126

LAN_RESERV2

SIDE1

SIDE2

LAN_RESERV5

LAN_RESERV7
LAN_RESERV10
LAN_RESERV12
LAN_RESERV13
LAN_RESERV14

RESERVED3

3.3VAUX1

GROUND7

RESERVED6

GROUND9

GROUND10

GROUND12

GROUND1

RESERVED1
RESERVED2

GROUND3

AC_SDATA_OUT

AC_CODEC_ID0#

AC_RESET#

RESERVED5

GROUND5

S_AUDIO_IN

S_AUDIO_I GND

AUDIO_GND

MCPIACT#

3.3VAUX2

POST1

POST2

127

128

RING

INTA#

RST#

3.3V_3
GNT#

PME#

AD[30]

3.3V_5

AD[28]
AD[26]
AD[24]
IDSEL

AD[22]
AD[20]

AD[18]
AD[16]

FRAME#

TRDY#
STOP#

3.3V_6

DEVSEL#

AD[15]
AD[13]
AD[11]

AD[09]

C/BE[0]#

3.3V_1

AD[06]
AD[04]
AD[02]
AD[00]

M66EN

5V_1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56

PAR

58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

1
3

802_ACTLED (Internal Pull-High) 802_ACTLED (Internal Pull-High)

802_ACTLED 802_ACTLED

PCI_AD31

12

PCI_AD29

C66

5PF

/*

+5VS

PCI_AD27
PCI_AD25
CH_SATA

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_AD14
PCI_AD12

PCI_AD10
PCI_AD8

PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1

R49

1 2

1 2

R712 0Ohm

0Ohm/*

5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123

MINI_PCI

12-023511240

+3VS

CON Part Number Modify as M3N

1 2

R71 0Ohm

/*

+5VS

+3V

12

R70 100Ohm

PCI_INTB# <18,20,32>

PCI_RST# <18,22,29,32>
PCI_GNT#3 <18>

PCI_PME#
BT_PRIOITY
PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+3V

PCI_PME# <29,32>

PCI_PAR <18,29,32>

PCI_FRAME# <18,20,29,32>
PCI_TRDY# <18,20,29,32>
PCI_STOP# <18,20,29,32>

PCI_DEVSEL# <18,20,29,32>

PCI_C/BE#0 <18,29,32>

+3VS

12

C61
10UF/10V

12

C93

0.1UF

12

12

C92

0.1UF

+3V

+5VS

12

12

C69

0.1UF

C58
10UF/10V

C60
10UF/10V

12

C94

0.1UF

12

12

C68

0.1UF

C91

0.1UF

12

12

C62

C95

0.1UF

0.1UF

12

C90

0.1UF

MINIPCI CONNECTOR

B B

1 2

R716 0Ohm

14

R717
0Ohm

/*

L92
200Ohm

/*

23

1 2

R715 0Ohm

1 2

4

R719
0Ohm

/*

1 2

USB_PP5<18>

USB_PN5<18>

R1.1-S38

+3V

12

A A

BT_ON<27>

5

BT_ON

R84610KOhm

Bluetooth Conn.

R2.0-S03

CON20

12

SIDE2

11

SIDE1

10

BT_USB_PP5
BT_USB_PN5 BT_LED

BT_HW_DIS#

BT_ON#

3

D

Q150

1

2N7002

G

S

2

9
8
7

WTOB_10P

+3V

12

10
9
8
7

C719

0.1UF

2 1

80Ohm/100Mhz

l0805

+3V_BT

BT_LED <40>

+3V_BT

MINIPCI & BLUETOOTH Conn.

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

31 57Thursday, June 09, 2005

Rev

2.0

BT_PRIOITY

6

6

BT_HW_DIS#

5

5

CH_SATA

4

4

3

3

2

2

1

1

Q149

1 2

R718
100KOhm

SI2305DS

S

2 3

2

3

1

1

L93

D

3

G

12

C720

0.1UF

5

4

3

2

1

+3VS

D D

C C

B B

2mA

+1.8V

1 2

58mA

R649 0Ohm

1 2

R615 0Ohm

1 2

R647 0Ohm /*

VCC_ROUT_CB

12

C587

0.47U

Open Drain:
PME#,
SERR#,
INTn#

VCC_3V POWER :
PME#, SPKROUT, RI_OUT#
HWSUSP#, GBRST#, IRQn
CCD1#, CCD2#, VS1# , VS2#
TEST, VCC5EN#, VCC3EN#
VPPEN0, VPPEN1, SD/MS I/F

VCCPCI POWER :
PCI BUS

VCC_SLOT POWER :
CARD_BUS,
CAUDIO , CSTSCHG

12

12

C628
10UF/10V

/*

/*

R646 100KOhm

PCI_AD[31:0]<18,29,31>

PCI_PAR<18,29,31> SD/MSDAT3<34>

PCI_C/BE#[3:0]<18,29,31>

PCI_REQ#1<18,20>
PCI_GNT#1<18>

PCI_FRAME#<18,20,29,31>

PCI_IRDY#<18,20,29,31>

PCI_TRDY#<18,20,29,31>

PCI_DEVSEL#<18,20,29,31>

PCI_STOP#<18,20,29,31>
PCI_PERR#<18,20,29,31>
PCI_SERR#<18,20,29,31>

PCI_RST#<18,22,29,31>

CLK_CBPCI<21>

PM_CLKRUN#<17,20,24,27,31>

PCI_PME#<29,31>

12

C624

0.1UF

C629
10UF/10V

12

C606

0.1UF

12

C609

0.47U

12

VCC_RIN_CB

12

C623

0.1UF

VCC_ROUT_CB

12

12

/*

L.C.A

C619

0.1UF

C593

0.1UF

CB_GBRST#

12

C603
5PF

12

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CB_IDSEL_J

R1.1-S01

PCI_AD17 CB_IDSEL_J

CB_GBRST#

C620

0.1UF

12

C611
5PF

L.C.A

R616 100Ohm

R604 100KOhm

1 2

C598 0.22UF

W11

W12

R11
R12

E13
E14

T11
V11

T12
V12

W3

R6

L1

R7

M2
M1
N5
N4
N2
N1

P5

P4
R4
R2
R1

T2

T1
U2
U1

V1

T7

V7
W7
R8

T8

V8
W8
R9

V9
W9

V6

P2
W2
W6

T9

P1
M4

M5

V3

V4
W4

T5

V5
W5

T6
G2

L4

K1

L5
G4

R5C841

12

C621

0.01UF

U59B

VCC_PCI3V_1
VCC_PCI3V_2
VCC_PCI3V_3

VCC_RIN_1
VCC_RIN_2
VCC_ROUT_1
VCC_ROUT_2
REGEN#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL

REQ#
GNT#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

GBRST#
PCIRST#
PCICLK

CLKRUN#
RI_OUT#/PME#

12

12

+3V ==> CB_GBRST#

+3V

1ms < T < 100ms

VCC_3V_1
VCC_3V_3
VCC_3V_4

VCC_3V_2

VCC_MD3V

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

GND10
AGND_1
AGND_2
AGND_3
AGND_4
AGND_5
AGND_6

TEST

HWSPND#
SPKROUT

UDIO5
UDIO4
UDIO3
UDIO2
UDIO1

UDIO0/SRIRQ#

INTA#
INTB#
INTC#

VCC_RIN_CB

F5
J19
K19

G5

A4

J1
J5
K5
E9
R10
T10
V10
W10
L15
M19
A9
B9
D9
D14
A15
B15

F4

CB_HWSUSP#

F2
F1

G1
H5
H4
H2
H1
J4

J2
K4
K2
L2

NC1

MDIO00--> SD Card Detect
MDIO01--> MS Card Detect
MDIO02--> XD Card Enable
MDIO03--> SD Write Protect XD Card Ready/Busy#
MDIO04--> SD/MS/XD Card Power0 Control
MDIO05--> XD Card Write Protect
MDIO06--> SD/MSXD LED
MDIO07--> SD/MS External Clock
MDIO08--> SD Command/MS Bus State /XD Card Write Enable
MDIO09--> SD/MS Clock /XD Card Read Enable
MDIO10--> SD/MS/XD Data 0
MDIO11--> SD/MS/XD Data 1
MDIO12--> SD/MS/XD Data 2
MDIO13--> SD/MS/XD Data 3
MDIO14--> XD Data 4
MDIO15--> XD Data 5
MDIO16--> XD Data 6
MDIO17--> XD Data 7
MDIO18--> XD Card Command Latch
MDIO19--> XD Card Address Latch

R648

12

0Ohm

12

12

C570

C608

0.1UF

10UF/10V

+3V

12

12

C579

C564

1000PF

10UF/10V

+3V

R599

10KOhm

1 2

12

R603 100KOhm

SPKRCB PULL DOWN : USE SROM

1

T305

1

T310

1

T307

+3V

37mA

C600
1000PF

12

12

C601

0.1UF

SPKRCB <37>

C604

12

1394_SDA <34>
1394_SCL <34>

INT_SERIRQ <17,20,24,27>

PCI_INTB# <18,20,31>
PCI_INTA# <18,20>
PCI_INTC# <18,20,29>

1000PF

1 2

R286 0Ohm

SHIELD GND

+3V

SD/MSDAT2<34>
SD/MSDAT1<34>

SD/MSDAT0<34>
SD/MSCLK<34>
SDCMD_MSBS<34>

SHIELD GND

SD/MSPWR<34>
SDWP#<34>

MSCD#<34>
SDCD#<34>

L.C.A

R595 0Ohm

GBRST# POWER SEQ
+3V ==> (GBRST#/CB_HWSUSP#) ==>PCIRST#

H/W SUSPEND# POWER SEQ :
SUSPEND : CB_HWSUSP# LO=> PCIRST# LO=> +3VS OFF
RESUME : +3VS ON => PCIRST# HI=> CB_HWSUSP# HI

CB_HWSUSP#

C1

D1

E1

C2

D2

E2

E4

E8

D8

B8
A8
E7

D7

B7
A7
E6

D6

B6

12

A6

D5

B5
A5
B4
B3
A3
A2
B1

R5C841

U59A

NC2

NC3

NC4

NC5

NC6

NC7

NC8

MDIO19
MDIO18

MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10

MDIO09
MDIO08
MDIO07
MDIO06
MDIO05
MDIO04
MDIO03
MDIO02
MDIO01
MDIO00

1 2

D50 RB751V_40

/*

1 2

D46 RB751V_40

J18

CADR25

J15

CADR24

K16

CADR23

L16

CADR22

L18

CADR21

M16

CADR20

N19

CADR19

N16

CADR18

P16

CADR17

L19

CADR16

K15

CADR15

N18

CADR14

N15

CADR13

K18

CADR12

R18

CADR11

U19

CADR10

R19

CADR9

P15

CADR8

J16

CADR7

H15

CADR6

H18

CADR5

G15

CADR4

G18

CADR3

F15

CADR2

F18

CADR1

E16

CADR0

U18

CDATA15

W18

CDATA14

V17

CDATA13

V16

CDATA12

V15

CDATA11

B19

CDATA10

C18

CDATA9

D18

CDATA8

W17

CDATA7

W16

CDATA6

W15

CDATA5

T15

CDATA4

R14

CDATA3

C19

CDATA2

D19

CDATA1

E19

CDATA0

T19

OE#

M15

WE#

T18

CE2#

V19

CE1#

F16

REG#

H19

RESET

G16

WAIT#

A18

WP/IOIS16#

M18

RDY/IREQ#

F19

BVD2

E18

BVD1

H16

VS2#

R16

VS1#

D15

CD2#

T14

CD1#

G19

INPACK#

P18

IORD#

P19

IOWR#

90 ohm

V14

USBDP

W14

USBDM

1 2

R637 100KOhm

W13

VPPEN1

V13

VPPEN0

T13

VCC3EN#

R13

VCC5EN#

R1.1-S10

PM_SUSB# <4,17,21,29,37,40,43,48,52>

CB_SD# <17,20>

AD19/A25 <33>
AD17/A24 <33>
CFRAME#/A23 <33>
CTRDY#/A22 <33>
CDEVSEL#/A21 <33>
CSTOP#/A20 <33>
CBLOCK#/A19 <33>
RFU/A18 <33>
AD16/A17 <33>

CIRDY#/A15 <33>
CPERR#/A14 <33>
CPAR/A13 <33>
CBE2#/A12 <33>
AD12/A11 <33>
AD9/A10 <33>
AD14/A9 <33>
CBE1#/A8 <33>
AD18/A7 <33>
AD20/A6 <33>
AD21/A5 <33>
AD22/A4 <33>
AD23/A3 <33>
AD24/A2 <33>
AD25/A1 <33>
AD26/A0 <33>

AD8/D15 <33>
RFU/D14 <33>
AD6/D13 <33>
AD4/D12 <33>
AD2/D11 <33>
AD31/D10 <33>
AD30/D9 <33>
AD28/D8 <33>
AD7/D7 <33>
AD5/D6 <33>
AD3/D5 <33>
AD1/D4 <33>
AD0/D3 <33>
RFU/D2 <33>
AD29/D1 <33>
AD27/D0 <33>

AD11/OE# <33>
CGNT#/WE# <33>
AD10/CE2# <33>
CBE0#/CE1# <33>
CBE3#/REG# <33>

CSERR#/WAIT# <33>
CCLKRUN#/IOIS16# <33>
CINT#/IREQ# <33>
CAUDIO/SPKR_IN#/BVD2 <33>
CSTSCHG/STSCHG#/BVD1 <33>
CVS2 <33>
CVS1 <33>
CCD2# <33>
CCD1# <33>
CREQ#/INPACK# <33>

AD13/IORD# <33>
AD15/IOWR# <33>

AVPP1 <33>
AVPP0 <33>
AVCC3# <33>
AVCC5# <33>

UDIO03 H : Enable SD
UDIO04 H : Enable MS
VPPEN0 L : Disable XD

R619

1 2

22Ohm

C595 0.01UF

1 2

L.C.A

CRST#/RESET <33>

+VCCCB

R634

100KOhm

/*

1 2

CCLKRUN#/IOIS16#

12

C612
5PF

CCLK/A16 <33>

SHIELD GND

R2.0-S13

A A

PCI CARDBUS R5C841

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

32 57Thursday, June 09, 2005

Rev

2.0

5

AVCC_PHYCB:Must not be off on the suspend
mode because of the power supply for Cable
interface block

L85

37mA

+3V

D D

C C

1 2

R592 10KOhm

B B

A A

21

U59C

D11

CPS

A16

XI

B16

XO

A14

FIL0

B14

REXT

D13

VREF

E12

NC9

R5C841

X2_1394

12

TXC 16PF/30PPM 8*4.5*1.6mm

120Ohm/100Mhz

+3V

CPS

X2_1394

X1_1394

1 2

C573 0.01UF

1394_FIL

1%

1394_REF

1 2

C581 0.01UF

X5 Main Source is 07-010222450 (TXC)
Second source is 07-010722451 (Fujicom)

AVCC_PHY_CB

C565
10UF/10V

X5

12

24.576MHZ

07-010222450

R1.1-S32

12

C575

0.1UF

12

C578
1000PF

AVCC_PHY_1
AVCC_PHY_2
AVCC_PHY_3
AVCC_PHY_4

TPBIAS0

TPBN0
TPBP0

TPAN0
TPAP0

TPBIAS1

TPBN1
TPBP1

TPAN1
TPAP1

X1_1394

12

C576

0.1UF

E10
E11
A17
B17

D12

A13
B13

Layout: SHIELD GND

A12
B12

CINT#/IREQ#
CSERR#/WAIT#
CREQ#/INPACK#
CAUDIO/SPKR_IN#/BVD2

D10

A11
B11

A10
B10

4

12

C569
1000PF

AVCC_PHY_CB

TPBIAS0

TPB0-_1
TPB0+_1

TPA0-_1
TPA0+_1

CSTOP#/A20
CDEVSEL#/A21
CTRDY#/A22
CIRDY#/A15

CSTSCHG/STSCHG#/BVD1
CBLOCK#/A19
CPERR#/A14
CCLKRUN#/IOIS16#

TPB1-_1
TPB1+_1

TPBIAS0 <34>

TPB0-_1 <34>
TPB0+_1 <34>

TPA0-_1 <34>
TPA0+_1 <34>

T315

1

T158

1

T184

1

T159

1

T172

1

T313

1

T308

1

T303

1

T147

1

T149

1

T162

1

T157

1

CCD1#<32>

CSTSCHG/STSCHG#/BVD1

3

C528

0.1UF

+5V

12

12

/*

C547
10UF/10V

12

/*

C546
10UF/10V

C539

0.1UF

+3V

12

C537

0.1UF

VCC5_EN
VCC3_EN

AVPP0<32>
AVPP1<32>

+VPPCB

12

C523

0.1UF

U52

1

VCC5_EN

2

VCC3_EN

3

EN0

4

EN1

5

FLG

6

NC1

7

NC2
VPPOUT8VCCOUT1

R5531V002

GND

VCC5IN2

VCCOUT3

VCC5IN1

VCCOUT2

VCC3IN

+VCCCB

16
15
14
13
12
11
10

NC3

9

12

12

C536

0.1UF

FOR PCMCIA DEBUG CARD

If delete debug card function,R876
and R628 mount 0 ohm.

CBDEBUGEN#

Q99

1

2N7002

G

2

AVCC5#<32>

AVCC3#<32>

CLK_DBPCI<21>

LPC_FRAME#<17,24,27,36>

LPC_AD0<17,24,27,36>
LPC_AD1<17,24,27,36>
LPC_AD2<17,24,27,36>

LPC_AD3<17,24,27,36>

DIS_FWH<36>

T148

CBDEBUGEN#

+3V

147

U51A

VCC

1
2

R483

1MOhm

1 2

3

GND

LV08A

+3V

100KOhm

S

R876 0Ohm

1 2

10KOhm

CBDEBUGEN#

D39 RB751V_40

3

A0

7

A1

11

A2

17

A3

21

A4

4

B0

8

B1

14

1

B2

18

B3

22

B4

1

BE#

13

BX

PCMCIA DEBUG CARD MUX

3

Q31

D

1

G

S

2

2N7002

R260

C274

12

1 2

0.1UF

R628

74CBT3383

+3V

12

3

VCC5_EN

D

/*

VCC3_EN

12

12

U30

2

C0

6

C1

10

C2

16

C3

20

C4

5

D0

9

D1

15

D2

19

D3

23

D4

24

VCC

12

GND

1 2

R259 100KOhm

3
2

R503

10KOhm

CCLKRUN#/IOIS16#
CAUDIO/SPKR_IN#/BVD2
CPERR#/A14
RFU/D2
RFU/D14

RFU/A18
CSERR#/WAIT#
CBLOCK#/A19

+5V

+3VALWAYS

U29A

1

CK

CLR

D
GND7VCC

PR

4

SN74LVC74APWR

+3V

6

Q#

CBDEBUGEN#

5

Q

14

2

1

CON Part Number Modify as M3N

+VCCCB+VPPCB

12

12

C303

C304

0.1UF

10UF/10V

AD0/D3<32>
AD1/D4<32>
AD3/D5<32>
AD5/D6<32>
AD7/D7<32>
CBE0#/CE1#<32>
AD9/A10<32>
AD11/OE#<32>
AD12/A11<32>
AD14/A9<32>
CBE1#/A8<32>
CPAR/A13<32>
CPERR#/A14<32>
CGNT#/WE#<32>
CINT#/IREQ#<32>

CCLK/A16<32>
CIRDY#/A15<32>
CBE2#/A12<32>
AD18/A7<32>
AD20/A6<32>
AD21/A5<32>
AD22/A4<32>
AD23/A3<32>
AD24/A2<32>
AD25/A1<32>
AD26/A0<32>
AD27/D0<32>
AD29/D1<32>
RFU/D2<32>

CCLKRUN#/IOIS16#<32>

CCD1#

12

AD2/D11<32>

C281

AD4/D12<32>

270PF/50V

C273

0.1UF

1 2

AD6/D13<32>
RFU/D14<32>
AD8/D15<32>
AD10/CE2#<32>
CVS1<32>
AD13/IORD#<32>
AD15/IOWR#<32>
AD16/A17<32>
RFU/A18<32>
CBLOCK#/A19<32>
CSTOP#/A20<32>
CDEVSEL#/A21<32>

CTRDY#/A22<32>
CFRAME#/A23<32>
AD17/A24<32>
AD19/A25<32>
CVS2<32>
CRST#/RESET<32>
CSERR#/WAIT#<32>
CREQ#/INPACK#<32>
CBE3#/REG#<32>

CAUDIO/SPKR_IN#/BVD2<32>

CSTSCHG/STSCHG#/BVD1<32>

AD28/D8<32>
AD30/D9<32>
AD31/D10<32>
CCD2#<32>

C335

270PF/50V

12

PCMCIA

12

C296

0.1UF

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72

12

C291
10UF/10V

CON8

1

12-160400683

GND_01

2

AD0/D3

3

AD1/D4

4

AD3/D5

5

AD5/D6

6

AD7/D7

7

CBE0#/CE1#

8

AD9/A10

9

AD11/OE#
AD12/A11
AD14/A9
CBE1#/A8
PAR/A13
PERR#/A14
GNT#/WE#
INT#/IREQ#/READY
VCC1
VPP1
CCLK/A16
IRDY#/A15
CBE2#/A12
AD18/A7
AD20/A6
AD21/A5
AD22/A4
AD23/A3
AD24/A2
AD25/A1
AD26/A0
AD27/D0
AD29/D1
RFU/D2
CCLKRUN#/IOIS16#/WP
GND_02
GND_03
CCD1#/CD1#
AD2/D11
AD4/D12
AD6/D13
RFU/D14
AD8/D15
AD10/CE2#
CVS1/VS1#
AD13/IORD#
AD15/IOWR#
AD16/A17
RFU/A18
CBLOCK#/A19
STOP#/A20
DEVSEL#/A21
VCC2
VPP2
TRDY#/A22
FRAME#/A23
AD17/A24
AD19/A25
CVS2/VS2#
RST#/RESET
SERR#/WAIT#
REQ#/INPACK#
CBE3#/REG#
CAUDIO/SPKR#
CSTSCHG/STSCHG#
AD28/D8
AD30/D9
AD31/D10
CCD2#/CD2#
GND_04
HC1
HC2
HC3
HC4

TX25-80P-6ST-H1

CCD1# CCD2#
L L 16bit
OTHER 32bit

CL

NP_NC1
NP_NC2

73
74

C563
22PF

1 2

5

C562
22PF

1 2

R2.0-S09

PCI PCMCIA SOCKET A

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

33 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

CON Part Number Modify as M3N

D D

1394A

6

U23

LTPB0-

1

556

1

7

7

8

8

IEEE1394_CON4P

C C

LTPB0+

2

2

LTPA0-

3

3

LTPA0+

4

4

LTPA0­LTPA0+
LTPB0­LTPB0+

LTPA0+ TPA0+_1

LTPB0- TPB0-_1

CO-LAYOUT

R196 0Ohm
R195 0Ohm
R193 0Ohm
R194 0Ohm

12
12
12
12

L35
200Ohm

/*

1 4

2 3

L34
200Ohm

/*

1 4

2 3

CO-LAYOUT

TPA0-_1LTPA0-

TPB0+_1LTPB0+

R590 56Ohm

R591 56Ohm

R589 56Ohm

R588 56Ohm

1.CLOSE TO R5C592

2.The area is as compact as possible,length < 10 mm

3.TPA Pair and TPB pair mismatch < 2.5mm

4.No via recommend , maxmium is one.

5.Total length < 50 mm

6.Differential impedance is 110+/- 6 ohm

7.TPA Pair trace or TPB pair trace mismatch < 1.25mm

12

1%

12

1%

12

1%

12

1%

1 2

C567 0.01UF

1 2

C574 0.33U

R582 5.11KOhm

1 2

C566 270PF/50V

TPBIAS0 <33>
TPA0-_1 <33>
TPA0+_1 <33>
TPB0-_1 <33>
TPB0+_1 <33>

12

+3V

12

C544

0.1UF

1
2
3
4

U57

A0
A1
A2
GND

AT24C02N

R550

R551

10KOhm

8

VCC

7

WP

6

SCL

5

SDA

10KOhm

1 2

1 2

1394_SCL <32>
1394_SDA <32>

B B

Solve MS Duo Adaptor

Q107

3

2N7002

2N7002

D

1

Q105

Z61Ae

short problem

SD_DAT1

S

2

G

Engineer:

1

SD_DAT2

PCI IEEE1394A & 3 IN1 CON

Title :

Sam Wang

of

34 57Thursday, June 09, 2005

Rev

2.0

SDCMD_MSBS<32>

SD/MSDAT1<32>
SD/MSDAT0<32>
SD/MSDAT2<32>
MSCD#<32>
SD/MSDAT3<32>

SD/MSCLK<32>

+MC_VCC

R1.1-S27

12

R809
150KOhm

A A

SD_DAT2 SD/MSDAT0
SD/MSDAT3
SDCMD_MSBS

5

19

CON18

24

NP_NC1

23

GND

9

9

1

1

2

2

3

3

4

4

CARD_READER_19P

CON Part Number Modify as ME

10101111121213131414151516161717181819

21

21

25

NP_NC2

22

22

8

8

7

7

6

6

5

5

20

20

SD_DAT1

SD/MSCLK

4

SDCD# <32>

+MC_VCC

SD/MSDAT1

+3V

R659

10KOhm

1 2

3

D

Q138

SD/MSPWR<32>

SDWP# <32>

R631
10KOhm

3

D

1 2

Q131

1

SI2304DS

G

S

2

1

2N7002

G

S

2

3

23

2

S

Q139

R1.1-S32

SI2301DS

1

1

G

D

3

12

C602

0.1UF

+MC_VCC

12

C627

0.1UF

Place as close to
card reader socket
as possible

2

+12V

SD/MSDAT2

R543 10KOhm

2N7002

S

D

3

2

G

1

Q106

SD_CD

12

3

D

1

SDCD#

G

S

2

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

5

4

3

2

1

+VCORE

C221

12

PWM1/XTO

2.5V/SMBALERT#
12V/VID5

5V/THERM#

12

C446

1UF/10V

0.1UF

FAN1_PWM

24
23

Vccp

VID4

D1+

D1-

D2+

D2-

SMB_ALERT#

22

OD

21

5V/THERM#

20
19
18
17
16
15

ADD_SEL

14
13

PM_THRM# function select one

1. Fan full speed

2. Fan full speed & Throttling function

3. Fan full speed & Critical Shutdown

H_THERMDA <4>
H_THERMDC <4>

D D

SDA_3S<12,13,21,28>
SCL_3S<12,13,21,28>

SDA_3S
SCL_3S

FAN1_TACH

BIOS setting:

C209

0.1UF

+5VS

U22

1

SDA

2

SCL

3

GND

4

VCC

5

VID0

6

VID1

7

VID2

8

1 2

VID3

9

TACH3

10

PWM2/SMBALERT#

11

TACH1
TACH212PWM3/ADDRESS_ENABLE#

ADT7463

TACH4/ADDRESS_SELECT/THERM#

Salve address
ADD_SEL L= 0x2C
ADD_SEL H=
0x2D

105 degree will down CPU frequence.
110 degree will shutdown system.

C C

B B

FAN1_ON#

3

D

Q85

1

2N7002

G

S

2

WATCHDOG<27>

R1.1-S12

+5VS

+5VS

1

G

3

D

C201 1000PF

1 2

5/10/10 mil

+5VS_FAN1
+5VS_FB1

Q86 SI2301DS

S

2 3

2

R151

1 2

100KOhm

/*

+3VS

R157

10KOhm

1 2

R154

10KOhm

/*

1 2

GND

D

3

G

1

1

R447 1KOhm

0.1UF /*

ADD_SEL

+5VS_FAN1

12

C179

12

FAN1_ON_R#

R172

0Ohm

1 2

PM_THRM#

2

S

Q19
2N7002/*

H_THERMDAH_THERMDC

3
2
5
6

U21

A+

+

A-

-

B+

+

B-

-

LM358DR

PM_THRM# <17,20>

5V/THERM# <43>

+5VS

+12VS

C174

12

0.1UF

8

VCC

FAN1_ON_R# FAN1_ON#

1

AO

BO

7
4

GND

1 2

R448 1KOhm

+5VS_FB1

R446

1KOhm

/*

1 2

1 2

R160 150KOhm

1 2

R156 150KOhm

12

C200
1UF/10V

+5VS

+3VS

12

C467

0.1UF

R162 10KOhm
R159 10KOhm

R174 10KOhm

+5VS_FAN1

12

+

CO-LAYOUT

FAN1_PWM
FAN1_DC

12

C187
1UF/10V

FAN1_PWM

12

FAN1_TACH

12

SMB_ALERT#

12

/*

CON Part Number Modify as M3N

FAN1_TACH

45

CON16

HOLD1

1
2
3

HOLD2

WtoB_8P

OK

12

+

C456
CE16
22uF/6.3V

47UF/6.3V

/*

R1.1-S12

1 2

+5VS_FB1

R152

10MOhm

/*

A A

Title :

FAN CONTROL

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

35 57Thursday, June 09, 2005

Rev

2.0

5

D D

4

3

2

1

FWH BIOS SOCKET

+3VS

C493

C485

0.1UF

0.1UF

12

12

C486

10uF/10V

R469
100Ohm

BUF_PLT_RST#<6,8,17,18,22,24,27>

C C

FWH_WP#<17,20>

DIS_FWH<33>

LPC_AD0<17,24,27,33>
LPC_AD1<17,24,27,33>
LPC_AD2<17,24,27,33>
LPC_AD3<17,24,27,33>

1 2

+3VS

R477 2.7KOhm

1 2

BUF_PCI_RST#

FWH_FGPI1
FWH_FGPI0

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

FWH SOCKET(S/R and E/R use it.)
Part Number :12-043000321

FWH IC (P/R use it.)
SST 49LF004A-33-4C-N
Part Number :05-001017122

12

CLK_FWHPCI <21>

12

C484

FWHHINIT#
LPC_FRAME#

5PF

R475

2.7KOhm

12

FWH_INIT# <17>
LPC_FRAME# <17,24,27,33>

FWH_FGPI4

FWH_FGPI2

FWH_FGPI3

30

32

1

3

2

31

A84A9

5
6
7
8

9
10
11
12
13

A7
A6
A5
A4/TBL#
A3
A2
A1
A0
DQ0

VPP

RST#

DQ114DQ215GND116DQ317DQ418DQ519DQ6

VCC2

A10

R/C#/CLK

INIT#/OE#

20

GNDA
VCCA
GND2
VCC1

WE#

RY/BY#

DQ7

U50
WHUB

05-001017122

29

IC

28
27
26
25
24
23
22
21

B B

R2.0 has changed WHUB socket symbol
to BIOS IC 05-001017122.

AMI BIOS LABEL P/N:15-135001010.
It need to add in P/R 59-MID BOM by ME.

A A

Title :

FWH BIOS

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

36 57Thursday, June 09, 2005

Rev

2.0

A

1 1

2 2

SPKRCB<32>

ICH_SPKR<17,20>

3 3

C380

0.1UF

C379

0.1UF

12

12

R374 1KOhm

R372 1KOhm

R373
10KOhm

D33

2

3

1

DAN202K

R375

10KOhm

12

R395

10KOhm

12

12

C410

12

0.1UF

R1.1-S26

+3VS

B

+3VS_AUD

21

10uF/10V

/*

C132

12

R1.1-S08

12

12

C115

0.1UF

DEL_POP<38>

R67 0Ohm

1 2

1 2

MONO_CODEC_A

12

C85
10PF

/*

HEADPHONE_L<38>

HEADPHONE_R<38>

C82

0.1UF

33Ohm

R73

SE/BTL#_A<38>

DEL_POP

Azalia_BCLK_D

Azalia_SDOUT_AUD<17>

Azalia_BCLK_AUD<17>

Azalia_SYNC_AUD<17>

L31

80Ohm/100Mhz

Azalia_SDIN0<17>

Azalia_RST#_AUD<17,38>

R1.1-S06

HeadPhone use Pin14 and Pin15.When HeadPhone
plug-in then H/W will disable internal
speaker.
Internal and External Microphone use Pin21 and
Pin22.When external MIC plug-in then H/W will
disable internal Microphone.

+3VS_AUD

12

C88
10PF

/*

C

R1.1-S09

R88

1 2

40.2KOhm

/*

10
11
12

10Ohm

1
2
3
4
5
6
7
8
9

R797

DVDD1
GPIO0
GPIO1
DVSS1
SDATA_OUT
BITCLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PCBEEP

1 2

AGND_A

45

48

47

44

46

SPDIFO

LFE_OUT

SPDIFI/EPAD

SURRBACK_OUT_L

SURRBACK_OUT_R

LINE2_L14LINE2_R15MIC2_L16MIC2_R17CD_L18CD_GND

Sense_A

13

42

43

41

AVSS2

CEN_OUT

SURR_OUT_R

LINE1_VREFO_L

CD_R20MIC1_L21MIC1_R22LINE1_L23LINE1_R

19

SPDIF_A <38>

R_41_A
L_39_A

+5V_AUD

U16
ALC880_H

38

39

37

40

02-611000413

AVDD2

JDREF/NC

SURR_OUT_L

LINE1_VREFO_R

FRONT_OUT_R
FRONT_OUT_L

Sense_B

DCVOL

MIC1_VREFO_R

LINE2_VREFO

MIC2_VREFO

MIC1_VREFO_L

VREF
AVSS1
AVDD1

24

C397 1UF/10V /*
C402 1UF/10V /*

R58
20KOhm 1%

1 2

1 2

R798

39.2KOhm/*1%

R1.1-S07

R_36_A

36

L_35_A

35
34
33
32
31
30
29
28
27
26
25

+5V_AUD

C138
1UF/10V

C137
1UF/10V

1UF/10V

1UF/10V

1UF/10V

12
12

/*

R864 0Ohm
R865 0Ohm

AGND_A

12

12

C134

12

1 2

C135

AGND_A

12

1 2

C136

AGND_A

12

1 2

AGND_A

D

AGND_A

1 2

R410
47KOhm

1 2

R411
47KOhm

1 2

R412
47KOhm

R397

47KOhm

R398

47KOhm

R399

47KOhm

E

+5V

12

R799
10KOhm

12
12

/*

OUTR_A <38>
OUTL_A <38>

R1.1-S08

VREFOUT_A <39>

12

12

C129
10uF/10V

AGND_A

MIC_A <39>

CD-L_A <22>

CD_GND_A <22>

CD-R_A <22>

C103

0.1UF

12

C99
1UF/10V

/*

R1.1-S14

4 4

Vout=1.250*(1+A/B)=4.842

12
12

A

10uF/10V

+5V_AUD

12

C80

12

12

C139

C81

0.1UF

0.1UF

AGND_A

C

12

C70

0.1UF

06-007191010 IS G913C

U12

1

SHDN#

2

GND
IN3OUT

G913C

5

SET

4

34.8KOhm

C390 2200P
R370 100KOhm

R377

B

1 2

34K/1% for MAX8863

34.8K/1% for G913C

PM_SUSB#<4,17,21,29,32,40,43,48,52>

5 5

A

+5V

>30 mil or shape

L28

21

80Ohm/100Mhz

DIGITAL

B

12

C74

10uF/10V

R433 0Ohm

1 2

R388 0Ohm

1 2

R425 0Ohm

1 2

R369 0Ohm

1 2

/*

D

AGND_A

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

Z61Ae

E

AUDIO CODEC ALC880-H

Sam Wang

of

37 57Thursday, June 09, 2005

Rev

2.0

A

R2.0-S12

1 1

OUTL_A<37>

AUDIO
OUT

100KOhm

R426

AMP

+5VAMP

R409 100KOhm

OPTIC_HP_A

HP_IN_A#

+12V

+3V

R427
1MOhm

1 2

1 2

R870
22KOhm

1 2

3

Q11

D

2N7002

1

MUTE

G

S

2

3

D

Q10

1

2N7002

G

S

2

AGND_A

Azalia_RST#_AUD<17,37>

OP_SD#

DEL_POP<37>

A

2 2

HEADPHONE_R<37>

3 3

4 4

5 5

DEPOP#

HEADPHONE_L<37>

R1.1-S08

+5VAMP

R429
10KOhm

R430
0Ohm

1 2

R104
0Ohm

R2.0-S12 R2.0-S12

2 3

Q75 SI2301DS

12

R800
0Ohm

1 2

12

C149

2.2UF/16V

R804
0Ohm

1 2

R56
100KOhm

D6

1
2

DAP202K

D75
RB751V_40

/*

R103
39KOhm

/*

S

2

1

G

MUTE_EN

Q12
SI1902DL

12

/*

AGND_A

3

2

+3V

3

1 2

1 2

G

1

1

D

S

1 2

R848

10KOhm

1 2

/*

R849
0Ohm

1 2

1 2

AGND_A

OPTIC_VCC_A

D

3

Q76

2N7002

HP_R_MOS_S

4

S2

3

D9 RB751V_40

DEPOP#

R115 2.2MOhm

1 2

C145
1UF/10V

C151

0.47U

1 2

100KOhm

5

6

G2

HP_L_MOS_S

1 2

C155

0.47U

1 2

R380

1 2

D1

S11G12D2

HP_R_MOS_D

12

B

L33

21

U17

RLINEIN

SHUTDOWN#

HP/LINE#

SE/BTL#

PC-BEEP

TSSOP 24

U44

A

1

VCC

B

2
3 4

GND

NC7SZ08M5

Digital

Q13

6

SI1902DL

D1

S11G12D2

R1.1-S06

HP_IN_A#

+5PVDD

12

AGND_A

24

GND4

23
22
21

ROUT+

20

RHPIN

19

VDD

18

PVDD2

17
16

ROUT-

15
14
13

GND3

+5VS

5

Y

R1.1-S06

12

R802
1KOhm

/*

AGND_A AGND_A

C146
10uF/10V

+5VAMP

SPDIF_O_A

12

/*

SE/BTL#_A <37>

R803
1KOhm

12

C152

0.1UF

R431

1 2

R432

0OHM

1 2

0OHM

SPKR+_MB_A

SE/BTL#_A

CE5

+

1 2

22UF/10V

CE6

+

1 2

22UF/10V

+5VS

80Ohm/100Mhz

+5PVDD

1

GND1

2

GAIN0

3

SPKL+_MB_A

SPKL-_MB_A SPKR-_MB_A

C161

0.47U

1 2

AGND_A

SPDIF_A<37>

12

C398

1UF/10V

R801
0Ohm

/*

HP_L_MOS_D

R805
0Ohm

1 2

/*

12

C162

0.47U

AGND_A

GAIN1

4

LOUT+

5

LLINEIN

6

LHPIN

7

PVDD1

8

RIN

9

LOUT-

10

LIN

11

BYPASS

12

GND2

TPA0212

AGND_A AGND_A

12

SPKR+_MB_AHEADPHONE_R

5

4

S2

G2

3

SPKL+_MB_AHEADPHONE_L

SE/BTL#_A

3

D

Q15

1

2N7002

G

S

2

3

Q14

D

1

G

S

2

2N7002

AGND_A

B

C

+5VAMP +5VAMP

12

SE/BTL#_A

GAIN0 GAIN1 SE/BTL# AV (V/V)

0 0 0 -2(DEFAULT)

+5PVDD

1UF/10V

2_AJK_R_A
2_AJK_L_A

1 2

C144

0 1 0 -6
1 0 0 -12
1 1 0 -24
X X 1 -1

1 2

R105
0Ohm

R91

39KOhm

/*

1 2

AGND_A

21

L72 1KOhm/100MHz

21

L75 1KOhm/100MHz

22UF instead of 47UF for space

AOUTR_C_A

1 2

R112 100Ohm

AOUTL_C_A

1 2

R116 100Ohm

R428 0OHM

1 2

R376 0OHM

1 2

AGND_A

R880 0Ohm

1 2

1 2

/*

/*

C

R881 0Ohm

12

R117

C148

10KOhm

1UF/10V

Close to OP

AGND_A

OP_SD# <17,20>
OUTR_A <37>

HP_JACK_R_A
HP_JACK_L_A

C427

12

12

AGND_A

100PF/50V

12

R90
1KOhm

C422

100PF/50V

2_AJK_R_A

2_AJK_L_A

12

R110
1KOhm

R1.1-S25

CON Part Number Modify as ME

OPTIC_VCC_A
SPDIF_O_A

WtoB_2P

NC2

SPKL+

SPKL-

NC1

U9

OPTIC_HP_A

HP_IN_A#

1 2

D8 RB751V_40

4
2
1
3

SPKR+_MB_A
SPKR-_MB_A
SPKL+_MB_A
SPKL-_MB_A

+5VAMP

MIC_AGND_A
INT_MIC_A

1KOhm/100MHz

L51 220Ohm/100Mhz
L49 220Ohm/100Mhz
L48 220Ohm/100Mhz
L50 220Ohm/100Mhz

R404

R406

10KOhm

10KOhm

1 2

1 2

L71 1KOhm/100MHz

21

L70

1KOhm/100MHz

12

C424

0.1UF

AGND_A

21

L26

D

21
21
21
21

1 2

3 4

/*

/*

/*

21

12

C420
100PF/50V

21

L74 1KOhm/100MHz

21

L73 1KOhm/100MHz

12

C417
100PF/50V

12

R2.0-S03

J1 Original P/N is 12-140001088
need to change to 12-140101080 in BOM.
R1.1 has changed it in symbol.

L68

INT_MIC_JACK_A 1_AJK_A

MIC_IN_A<39>

L25
120Ohm/100Mhz

21

INT_MIC_JACK_A

12

C67
100PF/50V

MGND

D

1KOhm/100MHz

21
21

L67
1KOhm/100MHz

MGND

SPKR+_MB_CON_A
SPKR-_MB_CON_A
SPKL+_MB_CON_A
SPKL-_MB_CON_A

CN2C

CN2A

CN2D

CN2B

150PF

150PF

150PF

150PF

5 6

7 8

/*

C425
100PF/50V

MIC_JACKIN

JPA1

1 2

SHORTPIN

/*

E

CON Part Number Modify as ME

U37

5

NC1

1

1

2

2

3

3

4

4

6

NC2

WtoB_CON_4P

CON Part Number Modify as ME

J1

5
4
2
3
1

11
12

8
7

12-140101080

9

6

10

modify 0106

CN1

5
4
3
6
2
1

AUDIO JACK

C394

100PF/50V

12

PHONE_5P

CON Part Number Modify as M3N

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

Z61Ae

E

R

L

Title :

7
8
9
10

MIC

AUDIO_AMP_MB (TPA0212)

Sam Wang

of

38 57Thursday, June 09, 2005

Rev

2.0

A

B

C

D

E

E E

Azalia MDC MODEM

CON Part Number Modify as A4S

CON5

Azalia_SDOUT_MDC<17>

Azalia_SYNC_MDC<17>

Azalia_SDIN1<17>

Azalia_RST#_MDC<17>

D D

C C

11

BTOB_CON_12P

19

13

15

17

1

1

3

3

5

5

7

7

9

9
11

14

GND1

GND2

16

GND3

GND4

18

GND5

GND6

2

2

4

4

6

NP_NC1

6

8

8

10

10

12

12

NP_NC2

20

12

C419

0.1UF/25V

12

C418

0.1UF/25V

+3V

Azalia_BCLK_MDC <17>

12

C421
10PF

/*

R1.1-S05

R2.0-S10

12

R54 100KOhm

1 2

R55 100KOhm

Bias voltage for MIC1 jack

2.5V/3.75Vreference voltage

B B

A A

A

VREFOUT_A<37>

12

C140
10uF/10V

R385

2.2KOhm

1 2

AGND_A

MIC_IN_A<38>

MIC_IN_A

high-pass filter cutoff frequency
fC=1/(2*3.14*C696*R468)=159 Hz

B

C396

AGND_A

12

1UF/10V

1 2

C116 39P

R392 270KOhm

12

C406
1UF/10V

R379

10KOhm

AGND_A

12

12

R384

10KOhm

12

C395

1UF/10V

AGND_A

12

R807
0Ohm

1 2

/*

C

MIC AMP

4490_POS

A+

3

A-

4490_NEG

2

B+

5

B-

6

NJM2100M

C84 39P

Gain=-R788/R468=-10

MIC_A

U14

VCC

+

AO

-

+

BO

-

GND

R69
200KOhm

1 2

1 2

+5V_AUD

C98

0.1UF

12

AGND_A

MIC_A <37>

L30

21

120Ohm/100Mhz

AGND_A

0Ohm

/*

+5VMIC
MIC_A

12

8
1

R57

7
4

R1.1-S13

MIC AMP & MDC Conn.

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

D

Date: Sheet

Engineer:

Z61Ae

E

Sam Wang

of

39 57Thursday, June 09, 2005

Rev

2.0

A

ZIF_FPC_20P

24

SIDE3

SIDE4

+5VLCM

PWRLED#

1 1

R1.1-S31

+3VALWAYS

2 2

+5VS

802BTLED#

HDDLED#
SCROLLOCK#_R
CAPLED#

PWR_SW#

SCROLLOCK#<27>

NUM
LED(GREEN)

LED

NUM_LED#<27>

3 3

CAP
LED(GREEN)

CAP_LED#<27>

20
18
16
14
12
10

8
6
4
2

22

1 2

R345 560Ohm

LED BOARD

1 2

R344 560Ohm

LED BOARD

1 2

R346 560Ohm

20
18
16
14
12
10
8
6
4
2
SIDE2

19
17
15
13
11

9
7
5
3
1

SIDE1

CON3

GREEN LED

GREEN LED

23
19
17
15
13
11
9
7
5
3
1
21

SCROLLOCK#_R

+5VS

|

|

NUMLED#

+5VS

|

|

CAPLED#

B

CHGLED#

EMAILLED#

INTERNET#

NUMLED#

MARATHON#

DISTP#
LID_SW#

EMAIL#

C

+5V

|

+5V

E-MAIL

LID_SW# <15,43>PWR_SW#<43>

EMAIL_LED#<27>

LED(BLUE)

R52

1 2

0Ohm

CHARGE
LED(ORANGE)

CHG_EN#<48,50>

GREEN LED

HDDLED#

+5V

|

BLUE
LED

|

LED BOARD

R43

1 2

680Ohm

Q148

2N7002

+5VS

|

|

R357 560Ohm

BLUE LED

3

D

G

S

2

/*

+5VLCM

ORANGE LED

1

LED BOARD

1 2

LED BOARD

1

|

|

1 2
3

2

D

S

|

CHGLED#

R334
680Ohm

3

2

EMAILLED#

D28
RB717F

Q60
2N7002

1

G

HDD_LED_5S# <22>

INSTANT
KEY

BT_LED <31>

R2.0-S04

LED BOARD

ICH6_1HZ

BAT_LOW#

D

+3V

10KOhm

5 6

RN21C

+3V

10KOhm

7 8

RN21D

+3V

10KOhm

1 2

RN3A

+3V

1 2

1 2

1 2

C47
1UF/10V

C45
1UF/10V

C46
1UF/10V

EMAIL# <27>

INTERNET# <27>

V2.0

MARATHON# <27>

E

R341
680Ohm

WLAN_LED#

12

Q64

2N7002

1

G

802_ON# <24>

R2.0-S04

SUSC#_PWR<46,52>

3

3

Q65

D

D

2N7002

1

G

S

S

2

2

/*

R721

390Ohm

/*

1 2

For Intel WLAN
Card.(Default)

R2.0-S09

Q163
2N7002

1

G

BAT_LOW#_MOSBAT_LOW#

3

2

D

S

C

R1.1-S11

10KOhm

3 4

RN3B

+3V

R484

+3V

1 2

U51B

1MOhm

147

VCC

6

4
5

GND

LV08A

C48
1UF/10V

1 2

Q30

R-1

C

3

DTC144EK

D

DISTP# <27>

D74
RB751V_40

D73
RB751V_40

47K

B1

R-2

47K

E

2

CHECK_MODE

12

PM_SUSB

12

BAT_LOW#_LED <51>

BAT_LOW#_KBC <27>

CHECK_MODE <17>

PM_SUSB <42,43>

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Z61Ae

R2.0-S09

Title :

Engineer:

E

LED BOARD

Sam Wang

40 57Thursday, June 09, 2005

Rev

2.0

of

10KOhm

R720
0Ohm

1 2

Q206

2N7002

/*

R339

802BTLED#

+3V

1 2

3

D

G

S

2

802_ON_EN

1

802_ON#

+5V

Q61

2N7002

|

GREEN
LED

|

PWRLED#

Power LED current limit resistor,if
330 ohm-->get 3.7mA

R335

150 ohm-->get 9.7mA

220Ohm

3

D

S

2

G

Q62
2N7002

1

220 ohm-->get 6.4mA

PM_SUSB# <4,17,21,29,32,37,43,48,52>ICH6_1HZ<17>

1 2

3

D

1

G

S

2

802_ON<27,31> 802_ACTLED <31>

POWER
LED(GREEN)

LED BOARD

4 4

For ASUS WLAN Card.

5 5

A

B

5

D D

4

3

2

1

C275

0.1UF

SUSB#_PWR_ON <52>

+5V

12

C282

0.1UF

12

12

C276
100PF

INTDATA_5S_A

INTCLK_5S_A

C277
100PF

INTDATA_5S_A
INTCLK_5S_A

CON Part Number Modify as M3N

TOUCH PAD CNT

+5VS_TP_A

1
2
3
4
5
6
7
8
9

10

CON7

1

11

2

12

3

13

4

14

5

15

6

16

7

17

8

18

9

19

10

20

FPC_CON_20P

11
12
13
14
15
16
17
18
19
20

C C

+5VS_TP

INTDATA_5S<27>
INTCLK_5S<27>

B B

T151

TPC28t

1

+5VS_TP

4.86V

12

C278

0.1UF

+5VS_TP +5VS_TP_A

L45 80Ohm/100Mhz
L46 1KOhm/100MHz

L47 1KOhm/100MHz

1

Q34

G

3

2

D

S

2N7002

21
21

21

12

A A

Title :

TouchPad CONN

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

41 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

POWER DISCHARGE CIRCUIT

D D

+3VS

+5VS

RN70A
220Ohm

/*

1 2

61

Q200A

UM6K1N

PM_SUSB

/*

PM_SUSB<40,43>

C C

B B

2

Q200B
UM6K1N

/*

5

+1.8VS

R873

330Ohm

/*

+12VS

1 2

3

D

Q204

1

2N7002

G

S

/*

2

3 4

34

1 2

RN70B
220Ohm

/*

UM6K1N

/*

R874

330Ohm

/*

Q201A

+1.5VS

+2.5VS

RN70C
220Ohm

/*

5 6

RN70D

Q201B
UM6K1N

/*

220Ohm

/*

7 8

34

5

PM_SUSC<43>

PM_SUSC

61

2

R875

330Ohm

/*

1 2

Q202A
UM6K1N

/*

+3V

+5V

RN71A

220Ohm

/*

1 2

61

2

Q202B
UM6K1N

/*

3 4

34

5

RN71B

220Ohm

/*

Q203A

UM6K1N

/*

+12V

RN72A

220Ohm

/*

1 2

61

2

RN72B

220Ohm

/*

3 4

1 2

R871

330Ohm

/*

Q203B

UM6K1N

+1.8V

R872

330Ohm

/*

1 2

34

5

/*

3

D

Q205

1

2N7002

G

S

/*

2

A A

DISCHARGE MOS/EMI

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

42 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

+3VALWAYS

12

D D

C C

B B

A A

U41A

RESET

74LVC14APW_T

+3VSUS

147

VCC

1 2

GND

VR_PWRGD_DLY<51>

PM_SUSB#<4,17,21,29,32,37,40,48,52>

PM_SUSC#<17,52>

12

C357

T233

0.1UF

1

PM_RSMRST#

12

12

R330

C359

10KOhm

1UF/10V

+3VS

12

R546

1MOhm

VR_PWRGD_DLY

12

C367

0.22UF

D29

1

3

2

DAN202K

PM_PWRBTN#<17>

5V/THERM#<35>

PM_SUSC# PM_SUSC

PM_RSMRST# <17>

+3VSUS

Q68

1

G

2N7002

+3VS

1 2

1 2

+3VS

+3VSUS

147

VCC

13 12

GND

74LVC14APW_T

SW Part Number Modify as M3N

12

C798

0.1UF

/*

+3VSUS

1 2

3

D

S

2

R352

100KOhm

C363

1000PF

/*

S

2

U41F

R351

100KOhm

G

1

147

74LVC14APW_T

VCC

3 4

GND

U41B

+3VSUS

R337

10KOhm

1 2

3

D

Q69

1

G

S

2

2N7002

D

Q66

3

2N7002

/*

PM_SUSC <42>

At boot, KBCRSM need to be set low
for normal operation

VCC

GND

1

SW1

147

1
334

50mA/12V

2

2

4

0Ohm /*

10KOhm

1 2

PM_SUSB <40,42>

U41D

98

74LVC14APW_T

+3V

KBCRSM<27>

R323

100Ohm

R332

R333

1 2

R316 10KOhm

R324

100KOhm

12

12

5 6

147

VCC

GND

+3VSUS

12

1 2

12

C353

0.22UF

AUXPWROK <17>

ICH6_PWROK <8,17>

147

74LVC14APW_T

VCC

GND

U41C

U41E

1110

74LVC14APW_T

+5V

1
2

12

C345

0.1UF

C354

1UF/10V

RN55A
100KOhm

147

VCC

GND

74ACT08DR

+3VSUS

3

1

G

2

12

SW_SW#

CPU_VRON <44,46>

PWR_ON#

P/R need to
unmount for
ATS power
test in
factory.

U38A

3

PM_SUSC#

1 2

D

S

R322
47KOhm

RESET

Q57
2N7002

100KOhm

3 4

2N7002

1

1

+3VALWAYS

RN55B

Q121

1

3

G

2

3

G

2

3

D

1

G

2

100KOhm

5 6

RN55C

PWR_ON

3

D

G

S

2

R331

1MOhm

1

J2

1

1MM_OPEN_5MIL

2

/*

2

D

Q58

2N7002

S

D

Q70

2N7002

S

RST_BTN#

S

+3VSUS

RST_BTN# <48>

R2.0-S01

Q56
2N7002

/*

VSUS_OFF#<48>

1 2
12

C360

0.22UF

/*

VSUS_OFF#

10

12

D

PR

11

CK

7

GND

CLR

13

If use another power
switch method.D30
unmount.

D30
RB751V_40

1 2

R2.0-S01

R1.1-S24

12

+3VALWAYS

U60B

9

Q

8

Q#

14

VCC

SN74LVC74APWR

RN55D

SW_SW#

+3VALWAYS

PWR_ON

150KOhm
R610

R350

1MOhm

1 2

R606

1 2

10KOhm

100KOhm

Q67
2N7002

D

3

R866
0Ohm

/*

PM_SUSC#

PM_SUSC

0.1UF
C582

1 2

+3VALWAYS

78

S

2

G

1

12

10KOhm

1 2

R611

C589
1000PF

1 2

+3VALWAYS

1 2

12

/*

1 2
12

12

1

G

R349
100KOhm

C361

0.1UF

/*

R362
0Ohm

C362

R623

100KOhm

1 2

3

D

Q133

S

2

2N7002

3

PMBS3906
Q122

PWR_SW# <40>

R2.0-S01

R363

1 2

0Ohm

D31
RB751V_40

0.1UF

R2.0-S06

C617

0.01UF

12

150KOhm
R607

51KOhm

B

E12

C

VSUS_ON# <45>

LID_ICH#_3A <17,20>

LID_SW# <15,40>

C615

0.1UF

U60A
SN74LVC74APWR

12

R626

100KOhm

1 2

If use another power
switch method.C616
mount 0.1uF/0402

12

R605

+3VALWAYS

SUSC#_FALL_Q SUSC#_FALL

PM_SUSC

+3VSUS

R2.0-S05

LID_ICH#_3 <27>

2
3

D55

RB751V_40

R853
0Ohm

R854
0Ohm

R856
0Ohm

/*

4

PR

GND7VCC
D
CK

CLR

1

12

C616
1000PF

1 2

PWR_ON#

OTP_RESET#<6,48>

SHUT_DOWN#<51>

12

12

12

1 2

14
5

Q

6

Q#

R622 10KOhm

1 2

R851 1MOhm/*
R877 330KOhm

1 2

D76

RB751V_40

/*

PM_SUSC#

SUSC#_FALL_Q

R711
39KOhm

1 2

+3VSUS

12

/*

PWR_ON

+3VALWAYS

ACIN#<53>

/*

R609
1MOhm

D52
RB751V_40

/*

Q125

2N7002

/*

+3VALWAYS

2

S

G

Q173

1

2N7002

/*

D

3

12

R852
1MOhm

/*

12

C794

0.47U

/*

+5VLCM

12

R618

10KOhm

/*

D54

1
2

RB717F

R617

/*

470KOhm

1 2

Q120

2N7002

12

Q123

SUSC#_FALL

12

3

1

G

2

2N7002

D

12

C590

4.7UF/6.3V

/*

S

74HC74 TRUTH TABLE

PRE# CLR# CLK D Q Q'

L H X X H L
H L X X L H
L L X X float float
H H T H H L
H H T L L H
H H L X Qo Qo'

R2.0-S05

3

3

1

G

2

3

1

G

2

1 2

3

D

S

2

VSUS_OFF#

D

S

D

S

R2.0-S05

R850
1MOhm

/*

+3VALWAYS

1

G

Q174
2N7002

/*

3

D

S

2

G

1

G

Q175
2N7002

/*

1

1 2

3

D

S

2

U68

5

VCC

4

74LVC1G08GW

/*

C793

0.047U

Q172

+3V

D

S

/*

2N7002

/*

1 2

3

2

GND3OUTY

R855

G

1

INB

2

INA

100KOhm

/*

Q176
2N7002

/*

1

PM_SUSC#

R2.0-S05

Title :

POWER-ON SEQUENCE

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

43 57Thursday, June 09, 2005

Rev

2.0

A

+5VO

VR_VID0
VR_VID1
VR_VID2

TPC32t

1

TPC32t

1

TPC32t

1

+5VO

+5VO

+3VS

STP_CPU#<17,21>

CPU_VRON<43,46>

VR_VID0<4>
VR_VID1<4>
VR_VID2<4>
VR_VID3<4>
VR_VID4<4>
VR_VID5<4>

PM_PSI#<4>

VR_VID3
VR_VID4
VR_VID5

STPCPU#

DPRSLPVR

PSI#

R186 100KOhm

1 2

+3VS

R188 100KOhm

1 2

R187 100KOhm

1 2

R224 100KOhm

12

/*

R213

1 2

0Ohm

R237

1 2

0Ohm

/*

/*

/*

R178 0Ohm

R179 0Ohm

1 2

1 2

1 2

R181

1 2

0Ohm

1 2

R176 0Ohm

1 2

R209 0Ohm r0402

1 2

R212 0Ohm r0402

R199 1KOhm/*

1 2

R219

1 2

100KOhm

U26

NC

1

A

2
3 4

GND

U27

NC

1

A

2
3 4

GND

GND

1 1

T105
T89
T78

2 2

VCC_MCH_VRPWRGD<8,48>

CLK_PWR_GD#<21>

VRM_PWRGD<21,48>
VR_PWRGD<51>

3 3

PM_DPRSLPVR<17>

4 4

DPRSLPVR

5 5

CLK_PWR_GD#

for C4 fast exit event

A

/*

R180 0Ohm

R166 0Ohm

1 2

r0402

NC7ST04M5

NC7ST04M5

/*

1 2

GND

R169 0Ohm

T102

1

TPC32t

T95

1 2

R163 47KOhm

1 2

R164 47KOhm

1 2

R165 47KOhm

1 2

R167 47KOhm

1 2

R168 47KOhm

1 2

R171 47KOhm

/*

R170 0Ohm

1 2

T94

T101

TPC32t

TPC32t

TPC32t

1

1

1

5

VCC

Y

5

VCC

Y

/*
/*
/*
/*
/*
/*

T91

T93

T98

TPC32t

TPC32t

TPC32t

1

1

1

R221
1MOhm

1 2

GND

12

C252

0.01uF/25V

+5VO

61

Q28A

2

UM6K1N

R214 36.5KOhm

34

Q28B

5

UM6K1N

GND

B

VID 0 1 2 3 4 5

1.308V 1 0 0 1 1 0

0.956V 1 1 1 1 0 1

T75

T114

T104

TPC32t

TPC32t

TPC32t

1

1

1

R215

15KOhm

1 2

CLK_PWR_GD#

DELAY_VR_PWRGD_O

GND

12

12

C245 47P

C258 0.47U

R231

GND

05/06/01

1%

12

12

R218
121KOhm

GND

B

MCH_OK

VR_VID0
VR_VID1
VR_VID2
VR_VID3
VR_VID4
VR_VID5

DPRSLPVR

STPCPU#

VRON

12

R226
100KOhm

1%

12

75KOhm

TIME

PSI#

12

C253
100P

TIME

12

GND

U25

12

VCC

22

SYSOK

24

CLKEN#

23

IMVPOK

30

D0

29

D1

28

D2

27

D3

26

D4

25

D5

6

S0

7

S1

8

S2

3

B0

4

B1

5

B2

43

SUS

44

DPSLP#

21

PSI#

9

SHDN#

2

TON

14

CCV

10

REF

11

ILIM

1

TIME

31

DD0#

MAX1987ETM

GND

R230 10Ohm

C254

4.7u

1%

R208

1 2

100KOhm

VDD

BSTM

DHM

LXM
DLM

PGND

GND1
GND2

CMN
CMP

OAIN+

OAIN-

NEG

CCI

POS

CSP
CSN

BSTS

DHS

LXS
DLS

12

V+

FB

1 2

36
42
32
34
33
35
37

13
49
46
45
20
19

18
16

17
15

48
47

41
39
40
38

R211

1.21KOhm

C

+5VO

+5VO

1 2

C234 470PF

1 2

R205 2.7Ohm

R192 360Ohm

1 2

R204

1 2

4.7KOhm

C

12

GND

1 2

R177 2.7Ohm

3

GND

C238

1%

1 2

4700P

C210

4.7u

1 2

2
1

D13RB717F

R206 1MOhm

05/06/01

05/06/01

R867

1 2

2.2Ohm

05/06/01

C222

0.1UF

1 2

05/06/01

1 2

R182 511Ohm

1 2

R191 511Ohm

05/06/01

C235

1 2

0.1UF

R183 1KOhm

1 2

R190 1KOhm

1 2

CSP

R868

1 2

2.2Ohm

1000PF

/*

05/06/01

567

8

Q20

G

SI4392DY

SD

123

4

567

8

D

Q22
SI4336DY_T1_E3

G

SOP8

S

142

3

12

C183
1000PF

/*

05/06/01

567

8

Q93

G

SI4392DY

SD

123

4

05/06/01

567

8

D

Q94
SI4336DY_T1_E3

G

SOP8

S

142

3

12

C514

D

05/02/23

T76

TPC32t

1

D34

EC31QS04

1 2

GND

05/02/23

T80

TPC32t

1

D16

EC31QS04

1 2

GND

D

12

+

C455

12

+

C534

12

+

C173

5.6UF/25V

L77

0.56UH

AC_BAT_SYS

12

+

C527

5.6UF/25V

GND

L79

0.56UH

E

AC_BAT_SYS

AC_BAT_SYS

C0805

12

12

C177

5.6UF/25V

21

CMP

5.6UF/25V

21

Date: Sheet of

1000PF

C176 1U

GND

R463

1 2

3mOhm

05/06/01

C0805

12

12

C513

1U

1000PF

C521

R467

1 2

3mOhm

ASUSTECH CO.,LTD.

Size Project Name

Custom

T44

1

12

+

T319

TPC32t

1

12

+

C487

T50

TPC32t

1

Z61Ae

+VCORE

TPC32t

C468

470UF/2.5V

/*

T40

T31

TPC32t

1

1

T52

T55

TPC32t

TPC32t

1

1

05/06/01

330UF/2V /*

T240

T215

TPC32t

TPC32t

1

1

Title :

Engineer:

TPC32t

1

E

T261

TPC32t

1

12

+

C477

470UF/2.5V

T304

1

T260

TPC32t

1

T59

TPC32t

T288

1

Z61Ae

TPC32t

GND

TPC32t

T244

TPC32t

1

1

T262

TPC32t

1

T86

TPC32t

1

T84

TPC32t

1

+VCORE

(27A)

12

C488

0.1UF/25V

T290

TPC32t

1

GND

ADAMS LIN

44 57Thursday, June 09, 2005

T249

TPC32t

Rev

2.0

A

B

C

D

SIGNAL

E

VSUS_ON#

IN:

POWER

05/02/23

VOSENSE1
PLLFLTR
PLLIN
FCB
ITH1
SGND

3.3VOUT
ITH2

SIDE1

C643

5600P

12

C636

RUN_5VO

32

29

30

31

NC

NC_3

SENSE1-

SENSE1+

9

RUN_3VO

12

C635 180PF/50V

1 2

64.9KOhm

1000PF

3V_5V_PRWGD

27

28

PGOOD

RUN/SS1

BOOST1

EXTVCC

INTVCC

BOOST2

C638

1000PF

R655

26

TG1

PGND

12

BG1

BG2

C653

25

SW1

VIN

NC_216SW215TG214RUN/SS213SENSE2+12SENSE2-11NC_110VOSENSE2

1UF

U62

24
23
22
21
20
19
18
17

1 1

+5VO

3728_INTVCC

05/06/01

12

2 2

3 3

12

R645 107KOhm

C634 180PF/50V

12

R644 20KOhm

12

C630 1000PF

12

12

R642 150KOhm

C625 220P

12

C631 1000PF

12

R636 150KOhm

R633

100KOhm

1 2

05/06/01

12

C632220P

12

R641 0Ohm/*

12

C641

4700P

GND

R632100KOhm

/*

1 2

1
2
3
4
5
6
7
8

33

12

R6400Ohm

12

R643

1 2

20KOhm

GND

12

GND

LTC3728LX

+3VO

1 2

R670 10Ohm

3728_INTVCC

1

12

C655

4.7u

GND

+5VO

T335
TPC32t

378_INTVCC

GND

3

D59

RB717F

C648

1 2

1
2

C647 0.1UF/25V

1 2

0.1UF/25V

GND

Q143

D1_1

2

D1_2

3

G2

4

S2 S1/D2_1

SI4914DY

Vref = 0.8 V

4 4

5 5

3V_5V_PWRGD<48>

VPLLFLTR=1.2V 400K
VPLLFLTR=0V 260K
VPLLFLTR>=2.4V 550K

+3VO

12

R660
100KOhm

3V_5V_PRWGD

+3VALWAYS

Q144

2N7002

D57

RUN_3VO

2

3

RB715F

1

RUN_5VO

12

R669
100KOhm

3

D

VSUS_ON#<43>

1

G

S

2

GND

567

8

G

SD

123

4

567

8

G

SD

123

4

05/02/23

81

G1

7

S1/D2_3

6

S1/D2_2

5

AC_BAT_SYS

Q119

SI4800BDY

Q124

C649

C584

1

SI4894DY-TI

12

12

T317
TPC32t

+

+

5.6UF/25V

1 2

GND

5.6UF/25V

1

AC_BAT_SYS

D51

FS1J4TP

T334
TPC32t

12

+

C585

5.6UF/25V

GND

L87

3

1

1

4.8UH

AC_BAT_SYS

12

C651

1U

GND

L88

4.7UH

DCR=13m ohm

12

C586

0.1UF/25V

(7A,OCP=8.4A)

12

+

GND

1

12

+

GND

100UF/6.3V

T192
TPC32t

CE25

150UF/4V

1

1

1

T328
TPC32t

12

T43
TPC32t

T326
TPC32t

3

2

2

R650

1 2

7mOhm

+5VO

12

+

CE27

CE26

100UF/6.3V

05/06/01

(5A)

+3VO

21

R627

1 2

10mOhm

1

C642
1UF/10V

1

1

12

C613

T202
TPC32t

T17
TPC32t

T323
TPC32t

1UF/10V

1

1

1

1

T18
TPC32t

T332
TPC32t

T187
TPC32t

T327
TPC32t

1

1

1

T12
TPC32t

05/06/01

IN:

OUT:

T118
TPC32t

T318
TPC32t

1

T13
TPC32t

AC_BAT_SYS

+3VO
+5VO

Title :

Z61Ae

E

ADAMS LIN

45 57Thursday, June 09, 2005

Rev

2.0

ASUSTECH CO.,LTD.

Size Project Name

Custom

A

B

C

D

Date: Sheet of

Z61Ae

Engineer:

A

VREF5

100KOhm

Q44A

2

2

C298

0.027U

/*

100KOhm

Q39A
UM6K1N

+5VALWAYS

+3VALWAYS

ON_1.5

61

GND

2

ON_1.8

61

GND

12

1.8_2.5_1.5_1_PWRGD<48>

61

12

GND

C322

2200P

VREF5

1 2

1 2

AC_BAT_SYS

12

GND

T186

TPC32t

T144

TPC32t

C325

2700P

R298

10KOhm

R290

0Ohm

/*

R288

0Ohm

ON_1.05

C290

2200P

1

1

+1.5VO

1 2

12

12

12

12

C310 47pF/50V

TPC32t

T183

1 1

SUSC#_PWR<40,52>

2 2

3 3

CPU_VRON<43,44>

4 4

VREF5

5 5

VREF3

SUSC#_PWR

C330

0.01uF/25V

/*

SUSC#_PWR

VREF5

+12VS

R301
27KOhm

1 2

R722

10KOhm

1 2

SUSB#_PWR<47,52>

T182

TPC32t

T181

TPC32t

1 2

R274 0Ohm

VREF5 ON_1.05

R2710Ohm

1 2

12

C721

0.01uF/25V

JP8

1

112

1MM_OPEN_5MIL

JP9

1

112

1MM_OPEN_5MIL

A

12

1

R302

R2940Ohm

5

D17

UM6K1N

UM6K1N

34

1 2

Q44B

5

12

UM6K1N

12

100KOhm

R305

Q45A

UM6K1N

34

Q45B
UM6K1N

1SS355

/*

12

ON_2.5

12

GND GNDGND

12

R269

34

Q39B

5

2

2

R293

8.06K

C319

5600P

R291

1.8KOhm

2005
05 31

12

12

330Ohm

12

C308 0.1UF

GND

12

R272100KOhm

+3VO

2005
05 31

B

C315

3300pF/50V

R292

1 2

10.2KOhm

4700PF/50V

2005
05 31

ON_1.8

ON_1.5

1 2
1 2

R279

1.8KOhm

B

R304

R295

1.5KOhm

R283

100KOhm

R281

100KOhm

ON_2.5

1 2
12

1 2
12

R297

1 2

12

1 2

C3000.01uF/25V

R273

680Ohm

C293

1000PF

+1.05VO

+1.8VO

12.1KOhm

C327

U33

10
11
12

1
2
3
4
5
6
7
8
9

TPS5130

12

12

C326

3300P

12

R296

330Ohm

1 2

C328 0.01uF/25V

48

INV1

FB1
SS_STBY1
INV2
FB2
SS_STBY2
PWM_SEL
CT
GND
REF
STBY_VREF5
STBY_VREF3.3
STBY_LDO

SS_STBY313FB314INV315PGOUT16PG_DELAY17TRIP318VIN_SENSE319LH320OUT3_U21LL322OUT3_D23OUTGND3

12

C295

0.1UF

GND

R277

11.8KOhm

47

46

FLT

LH1

12

R275

49.9KOhm

1 2

GND

45

44

OUT1_U

1 2

C297 0.1UF/25V/*

2005
05 31

43

42

LL1

OUT1_D

R27612.7KOhm

OUTGND1

40

41

TRIP1

VIN_SENSE12

C332

R299 10.7KOhm

C333 0.1UF/25V

37

38

39

TRIP2

OUT2_D

OUTGND2

OUT2_U

VREF3.3

VREF5

REG5V_IN

LDO_IN

LDO_CUR

LDO_GATE

LDO_OUT

INV_LDO

24

C299

12

0.1UF/25V

C

TPC32t

R300

1 2

12.7KOhm

0.1UF/25V

/*

1 2

+1.8VGND
+1.5VGND

LL2

LH2

VIN

+1.05VGND

C

12

36
35
34
33
32
31
30
29
28
27
26
25

12

/*

T170

1

D18

1SS355

VREF3
VREF5

12

TPC32t

R303 2.7Ohm

C324

0.1UF

12

C311 4.7uF/25V

12

T298

1

12

12

GND

C314 4.7uF/25V

1 2

GND

D20

1 2

VREF5

R282

10KOhm

C331

0.1UF/25V

1SS355

D21

1 2

1SS355

+5VO

C309 0.1UF /*

12

SI4800BDY

Q117

SI4894DY-TI

12

12

C321 0.1UF/25V

C305

0.1UF
R280

1 2

19.6KOhm

AC_BAT_SYS

567

G

4

567

G

4

/*

12

567

G

4

567

G

4

8

Q118

SD

123

8

SD

123

+1.05VGND

8

SD

123

8

SD

123

AC_BAT_SYS

Q42

SI4800BDY

Q41

SI4894DY-TI

+1.8VGND

567

G

4

D48

1 2

FS1J4TP

D

L84

1.8UH

D19

FS1J4TP

1 2

Q126

D1_1

2

S1/D2_3

D1_2

3

G2

S1/D2_2

4

S2 S1/D2_1

SI4914DY

+1.5VGND

R278 20mOhm

1 2

8

Q40

SI4800BDY

SD

123

+2.5VO

05/02/23

12

12

+

+

C588 5.6UF/25V

C597 5.6UF/25V

JP17

1 2

SHORT_PIN

D

05/02/23

12

12

+

+

C301 5.6UF/25V

C306 5.6UF/25V

+1.8VO

21

T96

TPC32t

TPC32t

1

AC_BAT_SYS

AC_BAT_SYS

T306

TPC32t

1

81

G1

7
6
5

TPC32t

+2.5VO

12

10UF/6.3V

GND

L83

1.8UH

TPC32t

GND

E

SIGNAL

POWER IN:

OUT:

TPC32t

JP7 SHORT_PIN

1 2

TPC32t

T67

CE21

1

T286

1

12

+

GND

TPC32t

150UF/2V

T282

1

GND

T287

TPC32t

1

12

12

10UF/6.3V

+

CE22

150UF/2V

GND

+1.8VGND

(7A)

+1.8VO

T155

1

05/02/23

12

+

C607 5.6UF/25V

JP18

1 2

SHORT_PIN

+3VO

T165

1

C286

T241

TPC32t

1

L86

3.7UH

21

T231

1

12

C288

0.1UF/25V

GND

TPC32t

(1A)

T285

1

12

+

GND

TPC32t

T297

21

TPC32t

(7A)

CE23

330UF/2V

TPC32t

+1.5VO

T299

1

1

T16

TPC32t

1

GND

TPC32t

JP6

2

112

1MM_OPEN_5MIL

+1.05VO

T281

1

+1.05VO

+1.5VO

12

+

GND

T167

1

CE24

150UF/2V

Title :

ASUSTECH CO.,LTD.

Size Project Name

Custom

Date: Sheet

Z61Ae

Engineer:

E

SUSB#_PWR

IN:

SUSC#_PWR

CPU_VRON

AC_BAT_SYS
+5VO

+1.8V
+1.5V
+2.5V
+VCC_GMCH_CORE
+5VALWAYS
+3VALWAYS

JP14

2

112

3MM_OPEN_5MIL

C553

(4A)

JP16

2

112

3MM_OPEN_5MIL

+2.5VS

Z61Ae

ADAMS LIN

46 57Thursday, June 09, 2005

+1.8V

(5.6A)

TPC32t

T36

1

of

TPC32t

T45

1

+1.5VS

Rev

2.0

A

B

C

D

E

SUSB#_PWR

IN:SIGNAL

CPU_VRON

IN:

OUT:

12

+3VSUS
+3V
+1.8V

+0.9VS
+1.5VSUS
+VCCP
+VCC_GMCH_CORE

SUSB#_PWR

+3V

12

R42

100KOhm

61

POWER

2

R48

0Ohm

1

T6
TPC32t

+0.9VS

JP2

+3VS

12

R836

0Ohm

/*

CRTDAC_EN

12

C799

0.1UF/25V

/*

05/06/01

+1.8V

1

1
2

2

12

+

2MM_OPEN_5MIL

1

CE3

100U/2.5V

T11

TPC32t

+0.9VO

JP4

1

1
2

2

2MM_OPEN_5MIL

12

C71
10UF/6.3V

TPC32t

T4

1

GND

T278
TPC32t

1

1

T25
TPC32t

Vref=1.215V

1

IN

2

GND
EN3ADJ

SI9183DT

/*

1
2

T316

TPC32t

1

U3

5

OUT

4

U11

VIN

VCNTL2

GND

VOUT

VCNTL13REFEN

RT9173ACL5

+1.8V

12

12

UM6K1N

+2.5VS_CRTDAC

R40100KOhm

R39100KOhm

Q5B

12

T15
TPC32t

1

34

C18

4.7u

/*

UM6K1N

5

Q5A

TPC32t

T8

1

R16

10.7KOhm

/*

1 2

R6
10KOhm

/*

1 2

+3V

6
5
4

12

C57
10UF/6.3V

1 1

TPC32t
T284

1

12

C535

0.1UF/25V

GND

2 2

+1.05VO +VCC_GMCH_CORE

3 3

TPC32t
T289

1

12

GND

C524

0.1UF/25V

JP15

112

3MM_OPEN_5MIL

JP13

112

3MM_OPEN_5MIL

TPC32t
T283

2

1

+VCCP+1.05VO

(3A)

TPC32t
T99

2

1

(3A)

GND

4 4

+0.9VO

R51

20KOhm

1 2

B

1

R50

165KOhm

5 5

A

B

C

1 2

R62

100KOhm

1 2

3

C

E
2

Q7
PMBS3904

GND

+3VS

R61

100KOhm

1 2

3

D

1

G

Q8

S

2

2N7002

D

VTT_PWRGD <48>

ASUSTECH CO.,LTD.

Size Project Name

Custom

Date: Sheet of

Z61Ae

SUSB#_PWR<46,52>

Title :

Engineer:

E

Z61Ae

ADAMS LIN

47 57Thursday, June 09, 2005

Rev

2.0

A

B

C

D

E

05/02/18

U34

R313

C336

1UF

T188
TPC32t

1

R311

47KOhm

1 2

10KOhm

1 2

12

GND

C339

1UF

R312

1MOhm

1 3

12

X3

GND

2

4MHZ

GNDGND

1

D37

1 2

T296

T204

TPC32t

TPC32t

1

1

V0402MHS03

T85
TPC32t

1

T207
TPC32t

1

GND

U35

1

RA2

2

RA3

3

T0CKL

4

MCLR#/Vpp

5

Vss1

6

Vss2

7

RB0

8

RB1

9

RB2

10

RB3

PIC16C54C_04/SS

120104

OSC1/CLKIN

OSC2/CLKOUT

RA1
RA0

Vdd2
Vdd1

RB7
RB6
RB5
RB4

20
19
18
17
16
15
14
13
12
11

T189

1 2

TPC32t

1

T280

T179

TPC32t

1 1

BAT2_SW1<49>
BAT2_SW2<49>

AC_APR_UC<50,51>

TS1#<49,53>
TS2#<49,51,53>

EOC<50>

2 2

R315 62KOhm

1 2

D24

1 2

TPC32t

1

V0402MHS03

SOT23_S5_NB

5

VCC

4

VOUT

PST9142

TPC32t

1

T214

SUB

GND

1

NC

2
3

GNDGND

T198
TPC32t

1

T216
TPC32t

1

T190
TPC32t

1

T81
TPC32t

1

R314 62KOhm

T294
TPC32t

1

D23

1SS355

1 2

T178
TPC32t

1

+5VLCM

BAT1_SW1 <49>
BAT1_SW2 <49>

BAT1_LLOW# <17,51>
BAT2_LLOW# <18,51>
CTRL <50>
CHG_EN# <40,50>

CHG_FULL_OC <27>

RST_BTN# <43>

CHG_EN#
LOW: CHARGER ENABLE

TPC32t

T185

12

VCC

TPC32t

T107

1

1

95 DEGREE C

R240

23.2KOhm

/*

1 2

RT1

2

112

100KOhm

/*

+5VALWAYS

TPC32t

T108

5

1

4

R264

10KOhm

1 2

R265

30KOhm

1 2

12

R248
100KOhm

/*

+3VS +3VS+VCC_GMCH_CORE

R261

100KOhm

Q36

1 2

3

C

B

1

E
2

PMBS3904

GND

OTP_RESET# <6,43>

1

G

THERMAL PROTECTION
PLACE UNDER CPU

GND

12

R263

100KOhm

3

D

Q37

2N7002

S

2

VCC_MCH_VRPWRGD <8,44>

T30

1

TPC32t

VTT_PWRGD<47>

T37

1

TPC32t

T338

1

TPC32t

3V_5V_PWRGD<45>

1.8_2.5_1.5_1_PWRGD<46>

T175

1

TPC32t

147

U64A

VCC

1
2

12
13

GND

147

VCC

GND

3

LV08A

U64D

11

LV08A

+3VS

12

C637

0.1UF

GND

147

U64B

VCC

4
5

VRM_PWRGD<21,44>

PM_SUSB#<4,17,21,29,32,37,40,43,52>

TPC32t
T337

1

GND

LV08A

GND

T113
TPC32t

POWERGD

6

1

Q145B
UM6K1N

5

1SS355

34

D58

147

U64C

VCC

9

10

GND

LV08A

R663

1MOhm

1 2

2

12

C654

1UF

GND

+5VALWAYS

3 3

C266

0.01uF/25V

/*

U28

1

NC

2

SUB
GND3VOUT

PST9013

/*

GND

4 4

12

C287

0.22U

5 5

8

61

Adapter mode

BAT1 charge

BAT1 Discharge

BAT2 Discharge

POWERGD

Q145A
UM6K1N

Charge/Discharge Pins logic table

BAT1_SW1 BAT1_SW2 BAT2_SW1 BAT2_SW2 CTRL

L

HLHHH

L

H

L

HHH

L

H

L

VSUS_OFF# <43>

HBAT2 charge L

L

H

L

L

H

L

H

L

Title :

Z61Ae

E

ADAMS LIN

48 57Thursday, June 09, 2005

Rev

2.0

ASUSTECH CO.,LTD.

Size Project Name

Custom

A

B

C

D

Date: Sheet of

Z61Ae

Engineer:

5

4

3

2

1

5750

15UF/25V

Q91

R-1

47K

R198

1 2

75KOhm

/*

GND

AC_BAT_SYS

12

12

+

+

C483

7343

7343

5750

GND

3
C

B1

E

R-2
47K

PDTC144EK

2

GND

AD_IN_DS# <51>

C341 0.1UF

1 2

T212
TPC32t

1

T210
TPC32t

1

12

C473

L57

120Ohm/100Mhz

L55

120Ohm/100Mhz

1

L54

L53

120Ohm/100Mhz

120Ohm/100Mhz

C342

100PF

15UF/25V

21

L52 150Ohm/100Mhz

21

L56

21

120Ohm/100Mhz

T211TPC32t

21

21

12

C343

100PF

GND

BAT1_S

12

21

C344

100PF

BAT1_S <51,53>

BAT1

BATSEL_2P# <17,50>
SMCLK_BAT1 <27>

SMDATA_BAT1 <27>

TS1# <48,53>

1 2

8
7
6
5

1

G

R175

100KOhm

Q26

TPC8107

3

D

S

2

SD

G

1
2
3
4

Q24

2N7002

BAT2_SW2<48>

T39
TPC32t

1

1 2

R200100KOhm

1 2

T213

T209

TPC32t

TPC32t

1

BATT_CON_8P

T292
TPC32t

1

1
2
3
4

R185100KOhm

1 2

220KOhm

1SS355

D15

D14

1
2

RB715F

T208
TPC32t

1

1

CON19

T309
TPC32t

Q23

S D

G

TPC8107

R189

T205
TPC32t

1

1

8
7
6
5

12

3

1

T71
TPC32t

GND

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

R309100KOhm

1 2

1 2

12

Q51

S D

1
2
3
4

G

TPC8107

R308220KOhm

R-1

47K

PDTC144EK

R306

1 2

75KOhm

/*

BAT2_S <51,53>

BAT2

TS2#

8
7
6
5

3

Q46

C

B1

E

R-2
47K

2

SMCLK_BAT2 <27>

SMDATA_BAT2 <27>

12

C242

100PF

TS2# <48,51,53>

BAT1

D D

BAT1_SW1<48>

8
7
6
5

Q52

TPC8107

1

G

R307100KOhm

SD

1
2
3
4

G

R310100KOhm

1 2

BAT1_SW2<48>

3

D

Q47

D22

S

2

2N7002

1SS355

1 2

C C

GND

C2700.1UF

1 2

T265

C2690.1UF

TPC32t

1 2

CON Part Number Modify as M3N

B B

BATT_CON_6P

6
5
4
3
2

1

CON17

1

1

1

1

T259

T239

T217

T291

TPC32t

TPC32t

TPC32t

TPC32t

T97
TPC32t

1

GND

T119

T112

TPC32t

TPC32t

1

1

T92 TPC32t

T88

1

TPC32t

1

12

GND

T266
TPC32t

1

1

L80

120Ohm/100Mhz

L41

21

L40

120Ohm/100Mhz

120Ohm/100Mhz

C251

100PF

BAT2_S

21

L44 150Ohm/100Mhz

21

21

L39

21

120Ohm/100Mhz

12

C256

100PF

BAT2

BAT2BAT1 AC_BAT_SYSAC_BAT_SYS

BAT2_SW1<48>

3

D

Q48

1

2N7002

G

S

2

CON Part Number Modify as M3N

A A

Title :

Z61Ae

1

ADAMS LIN

49 57Thursday, June 09, 2005

Rev

2.0

ASUSTECH CO.,LTD.

Size Project Name

Custom

5

4

3

2

Date: Sheet of

Z61Ae

Engineer:

A

A/D_VIN

A/D_VIN_O

1 1

MAX1909_PDS<53>

A/D_VIN_O

LDO : 5.4V
REF : 4.2235V

R597

100KOhm

1 2

2 2

R594

1 2

26.7KOhm

GND

AC_IN Threshold 2.089Vmax
A/D_DOCK_IN > 18.158V
active

3 3

4 4

5 5

Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF]
Rsense(ADin)=0.02 ohm
VCLS= 3.685V
=> Iin(max)=3.39A
=> Constant Power = 19 * 3.42 = 64.4W

Charge Current Ichg = [0.075V/Rsen(CHG)]*[VICTL/3.6V]
Rsense(CHG)=0.015 ohm
VICTL= 1.8Vor 0.9
=> Ichg = 2.5A or 1.25A

Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] }
VCTL= 1.576V
=> Cell = 4.2V

Mode pin : Vmode > 2.8V (trie to LDO pin) ----> 4 Cells

VICTL< 0.8V or DCIN < 7V -->Charger Disable

Pre_CHG_V = 3.1mV
Pre_CHG_I = 300mA

TPC32t
T301

1

AC_APR_UC<48,51>

CTRL<48>
BAT_LEARN<27>

2.0 > Vmode > 1.6V (floating) ----> 3 Cells

0.8 > Vmode (trie to GND) ----> Learning mode

A

R593

1 2

R596

1 2

GND

100KOhm

R586

GND

05/02/18

20KOhm

R583

1 2

T176
TPC32t

137KOhm

H=4S1P(1.25A)
L=4S2P(2.5A)

BATSEL_2P#<17,49>

MAX1909_LDO

100KOhm

1

1

1 2

3

D

G

S

2

EOC<48>

GND

R598

9.31KOhm
Q110
2N7002

122704

R561

47KOhm

1 2

CHG_EN#<40,48>

+5VCHG

R58719.6KOhm

1 2

R581

1 2

GND

R585

100KOhm

1909_REF

TPC32t
T300

1

14.7KOhm

C542

T206
TPC32t

1

Q111
IRLML2402

D

3

12

GND

A/D_DOCK_IN

D49
1SS400

R60153.6KOhm

TPC32t
T177

1 2

R600

1 2

39.2KOhm

GND

S

2

G

1

0.01uF/25V

B

12

MAX1909_LDO

12

GND

1

1

G

U55

5

VCC

Y

NC7SZ08M5

B

C

12

GND

C583 0.1UF/25V

28

29

26

25

27

PDL

PDS

CSSP

GND2

IINP8CLS9ICTL10VCTL11CCI12CCV13CCS

IINP

C591

12

C577 0.1UF/25V

R547 100KOhm

A/D_DOCK_IN

12

C592 0.1UF/25V

23

22

24

DHI

SRC

DHIV

CSSN

DLOV

DLO

PGND

CSIP

CSIN

BATT

GND1

14

12

10KOhm

1 2

CHG_CCV

0.01uF/25V

12

C596

GND

05/02/18

8

V+

7

OUTB

1

OUTA

U56 LMV393

N41437175

MAX1909_LDO

R602

33Ohm

1 2

C594 0.1UF/25V

1 2

R710

21
20
19
18
17
16
15

12

C599

0.047U

0.1UF/16V

4

V-

GND

IINP

6

-B

input current mointer output

5

+B

CHG_CCV

2

-A

voltage regulation loop compensation

3

+A

0.764V(300mA)

C

R562 10KOhm

1 2

GND GND

4

G

567

567

G

4

BAT_CHG

+5VLCM

1 2

R554 10KOhm

123

S D

Q130

8

8

Q128

SD

123

R638
100KOhm

R573

1 2

10KOhm

R572

1 2

45.3KOhm

SI4835BDY

SI4800BDY

R624100KOhm

12

C618

0.1UF/25V

1909_REF

1909_REF

T311
TPC32t

1

1 2

567

D2

P

G2

4

1

D53

EC31QS04

CHG_GND

D2

S2

3

3

G

2

12

GND

C580 0.1UF/25V

CHG_GND

U58

1

DCIN

2

LDO

3

ACIN

4

REF

5

PKPRES#

6

ACOK

7

12

12

C572 1U

C571 1U

C568 1U

GND

GND

Q109

3

2N7002

D

S

2

GND

1

A

1

B

2
34

GND

MODE

MAX1909

R584 10KOhm

1 2

3

D

Q112

2N7002

G

S

2

GND

R542 100KOhm

GND

05/02/23

12

+

C614

5.6UF/25V

CHG_GND

L89

10UH

TPC32t

BAT1

81

D1S1D1 G1

P

2

D

Q129

2N7002

S

GND

D

T325

D

E

T66
TPC32t

1

12

+

C610

5.6UF/25V

/*

T77
TPC32t

1

GND

T129

5750

7343

TPC32t

12

+

C650
15UF/25V

GND

1

21

R667

1 2

15mOhm

1

BAT_CHG

Q135SI4925DY

R220100KOhm

3

D

Q272N7002

1

G

S

2

GND

:

　筿砏玥

1. ,Adapter IN

ㄢ聋筿　　　　　
　癸材　聋筿　　筿 　　材　聋筿

2. ,Adapter IN

材　聋筿　┪琌材　聋筿　　　

Detect , ,

　　聋筿　　　 碞癸　　聋筿　　筿 　　　埂　ゎ

3. , ,

璝　聋筿　　　埂 　　础　　　聋筿　 玥　　础

,ê

　　筿　 　埂　　　　ㄓ　　埂　 聋筿　

4. ,

璝　聋筿　タ　　筿 　　础　　　聋筿　
玥　　　　　筿筿　 　埂　 　癸础　　筿　　筿

ASUSTECH CO.,LTD.

Size Project Name

Custom

Date: Sheet

T169
TPC32t

1

T128
TPC32t

1

BAT_CHG

567

D2

D2

P

G2

S2

3

4

Z61Ae

AC_BAT_SYS

T90

BAT2

TPC32t

1

81

D1S1D1 G1

P

2

12

C249

0.1UF/25V

,

,,

BAT_CHG

Q29SI4925DY

+5VLCM

D

S

Title :

Engineer:

E

R210

200KOhm

1 2

3

Q252N7002

1

G

2

CTRL=H CHARGE BAT1

CTRL=L CHARGE BAT2

Z61Ae

ADAMS LIN

50 57Thursday, June 09, 2005

CTRLCTRL

Rev

2.0

of

5

+5VLCM

12

C529

0.1UF

/*

GND

D D

T174
TPC32t

1

1
2

1

F02JK2E

/*

T295

TPC32t

D47

Q113

R-1

B1

3

47K

DTC144EK

/*

/*

R-2
47K

4

TPC32t

Q115

2N7002

/*

BAT_LLOW#_OC <17>

T173

R545100KOhm

1 2

3
C

E

2

1

3

D

1

G

S

2

GND

3

2

SHUT_DOWN#_DS
BATLL1_DS#
BATLL2_DS#
BAT_LOW#_DS

AC_APR_UC<48,50>

1

D43

1SS355

12

12

D42

1SS355

T171
TPC32t

1

D45

1SS355

12

D44

1SS355

AD_IN_DS# <49>

3

D

Q98

1

2N7002

G

S

2

GND

12

+5VLCM

1 2

4.7KOhm

T160
TPC32t

BATLL1_DS#

1

U53

1

OUTPUT2

2

OUTPUT1

3

V+

4

INPUT1-

5

INPUT1+

6

INPUT2­INPUT2+7INPUT3-

LM339MX

R526

1 2

150KOhm

R517

4.7KOhm

1 2

1 2

3

D

1

G

2

R544

BAT1_LLOW# <17,48>

BAT1_LLOW# H -> L =13.425V

L -> H =14.1V

3

D

Q116

1

2N7002

G

S

2

GND

VR_PWRGD_DLY <43>

14

OUTPUT3

13

OUTPUT4

12

GND

11

INPUT4+

10

INPUT4-

9

INPUT3+

8

AC_BAT_SYS +5VLCM

+2.5VREF

R495

560KOhm

1 2

R496

S

649KOhm

Q95

2N7002

R512

200KOhm

1 2

12

C519 0.1UF

VR_PWRGD <44>

GND

C504 0.1UF

T320
TPC32t

D56

1

T293
TPC32t

1

C

Q103

BC847BPN

E
1

1
1

T203
TPC32t

2

3

DAN202K

BAT1 & BAT2 in , shut_down# = 9.5V
BAT1 only , shut_down# = 11.657V

SHUT_DOWN# <43>

12

1 2

C520 0.1UF/25V

2

BAT2_LOW#<53>
BAT1_LOW#<53>

AC_BAT_SYS

R51547KOhm

R516100KOhm

+5VLCM

D40

12

3

1SS355

1 2

SHUT_DOWN#_DS

12

R538

100KOhm

GND

12

1 2

470KOhm

R524

1 2

456
E

BB

C

R537

10KOhm

1 2

12

C532 4.7u

23

1 2

1 2

GND

R525

649KOhm

R527

143KOhm

+5VLCM

R5304.7KOhm

1 2

R532

1 2

4.7KOhm

R534

634KOhm

100KOhm

R531

1 2

100KOhm

BAT2_S

R540 196KOhm

TS2#<48,49,53>

R541

1 2

1 2

12

C5260.1UF

1 2

GND

+2.5VREF

4

C C

R539100KOhm

T41

1 2

TPC32t

BAT2_LLOW#<18,48>

BAT2_LLOW# H -> L =10.112V

B B

A A

TPC32t

BATLL2_DS#

1

L -> H =11.04V

5

T156

1

+2.5VREF

3

D

Q114

1

G

S

2

2N7002

BAT1_S

12

C522

0.1UF

R528

47KOhm

+5VLCM

T134

R661

R662

122704

100KOhm

1 2

3

D

1

G

S

2

R630

1MOhm

1 2

GND

BAT_LOW#_DS

Q137

2N7002

ASUSTECH CO.,LTD.

Size Project Name

Custom

Date: Sheet of

100KOhm

1 2

3

D

1

G

S

2

Z61Ae

TPC32t

1

Q140
2N7002

Engineer:

Title :

1

BAT_LOW#_LED <40>

Z61Ae

ADAMS LIN

51 57Thursday, June 09, 2005

Rev

2.0

A

B

C

D

E

C334

0.1UF/25V

GND

C645

0.1UF/25V

GND

2

+12VS

T42

TPC32t

1

+1.8VS

JP11

2

112

2MM_OPEN_5MIL

JP22

2

112

3MM_OPEN_5MIL

(0.3A)

T5
TPC32t

T3
TPC32t

TPC32t
T2

1

(2A)

1

+3VS

(4A)

1

+5VS

(0.01A)

+12VS

C626

0.1UF/25V

1 2

GND

AC_BAT_SYS

SUSC#_PWR

+3VO

+5VO

U61

1

OUT

IN

2

GND
EN3NC or ADJ

MIC5235BM5

05/06/01

SUSB#_PWR

5

4

Q38B

UM6K1N

+3VALWAYS

R268100KOhm

1 2

34

5

GND

JP19

2

112

1MM_OPEN_5MIL

JP20

2

112

1MM_OPEN_5MIL

Q38A

UM6K1N

2

R620

845KOhm

1 2

R614

95.3KOhm

1 2

GND

61

TPC32t

+3VSUS

T7

1

TPC32t

+5VSUS

T200

1

T312

TPC32t

1

12

SUSB#_PWR_ON

12

C289

/*

(0.4A)

(0.01A)

+12VO

C605 4.7u

R2.0-S01

0.22UF

+1.8VO

1 1

TPC32t

TPC32t

T193

T201

1

SUSB#_PWR<46,47>

1

TPC32t
T110

1

TPC32t
T314

1

PM_SUSB#<4,17,21,29,32,37,40,43,48>

TPC32t
T324

1

+12VS

D61

/*

R666 100KOhm

/*

T28

TPC32t

1

T22

TPC32t

1

1SS355

12

12

1 2

C652

1 2

GND

/*

R621 0Ohm

SUSB#_PWR_ON

0.1UF/25V

SUSB#_PWR_ON<41>

2 2

3 3

+3VO

+5VO

+12VO

1
2
3

1
2
3

8
7
6
5

Q127
UMC4N

47K

47K

12 3

Q35

D

G

PMN45EN

Q50

D

G

PMN45EN

Q142

SD

G

SI4800BDY

C

BB

47K

E

6
5

S

4

6
5

S

4

1
2
3
4

SUSB#_PWR_ON

46

E

10K

C

R5180Ohm

1 2

C337 0.1UF/25V

12

GND

/*

1 2

R612

27KOhm

C512

1000PF

TPC32t
T199

TPC32t
T336

JP5

112

1MM_OPEN_5MIL

TPC32t
T194

1

1

12

TPC32t
T339

1

1

12

GND

12

R613100KOhm

1 2

GNDGND

TPC32t

TPC32t

T321

T191

1

TPC32t
T64

TPC32t
T322

1

PM_SUSC#<17,43>

1

TPC32t
T331

1

1

T228

TPC32t

1

A

T180

TPC32t

1

R287 0Ohm

1 2

4 4

5 5

+3VO

+5VO

+12VO

SUSC#_PWR<40,46>

Q49

1

D

2
3

G

PMN45EN

Q132

SD

8
7
6
5

G

SI4800BDY

R639 0Ohm

1 2

B

6
5

S

4

1
2
3
4

SUSC#_PWR_ON

TPC32t

TPC32t

T196

T197

1

1

TPC32t

TPC32t

T330

T329

1

1

C622 0.1UF/25V N/A

1 2

R635 10KOhm

GND

TPC32t

12

T232

TPC32t

JP10

112

12

2MM_OPEN_5MIL

C338

0.1UF/25V

GND

JP21

112

3MM_OPEN_5MIL

12

C633

0.1UF/25V

GND

1

(0.1A)

+12V

C

T235

2

2

TPC32t
T10

1

+3V

(3.5A)

+5V

SUSC_PWR<23>

SUSC#_PWR

D

(2A)

1

+3VALWAYS

R289100KOhm

Q43A

1 2

SUSC_PWR

Q43B

UM6K1N

ASUSTECH CO.,LTD.

Date: Sheet

UM6K1N

34

5

GND

Size Project Name

Custom

Z61Ae

SUSC#_PWR_ON

61

2

12

/*

Title :

Engineer:

E

C313

0.22UF

Z61Ae

R2.0-S01

ADAMS LIN

of

52 57Thursday, June 09, 2005

Rev

2.0

A

1

1

1 2

1 2

T218
TPC32t

12

1 2

R674

R675

100KOhm

1

C175

1UF

D11

1SS355

T26
TPC32t

1

1
2
3
4

R149
10KOhm

1 2

T153
TPC32t

1

560KOhm

1 2

115KOhm

1 2

Q21

S D

G

TPC8107

R658

R657

12

+2.5VREF

C644

0.1UF

T223

T27

TPC32t

TPC32t

A/D_DOCK_IN

1 1

2 2

3 3

4 4

5 5

A/D_DOCK_IN

MAX1909_PDS<50>

BAT1_S<49,51>

BAT2_S<49,51>

1

T154
TPC32t

330KOhm

12

C656

1000P

A

8
7
6
5

T246
TPC32t

1

1 2

12

C657

1000P

GND

T247
TPC32t

R665

4.7KOhm

1 2

4.7KOhm

1

+2.5VREF

R676

T56
TPC32t

1

12

B

T58
TPC32t

C203

1UF

B

1

1 2

U47 LM3480

2

IN

R153

20mOhm

3

GND

1 2

TS2#<48,49,51>

OUT

GND

1MOhm

T46
TPC32t

R668

3
2

5
6

4

1

T243
TPC32t

1

1

U63

+A

-A

+B

-B

V-

LMV393

1 2

1MOhm
R673

D12

1
3

FD6JK3TP

12

C470

1UF

2 1

C460 1UF/10V

OUTA

OUTB

V+

T276

TPC32t

1

T250
TPC32t

1

2

D35

1
2

F02JK2E

R450

4.7KOhm

3

U46

LM4040BIM3_2.5

1 2

D60

12

1SS355

1

7

8

12

+5VLCM

12

R480

100KOhm

5

12

C510

1000PF/16V

T242
TPC32t

T152
TPC32t

3

C639

0.1UF

1

1

1 2

D621SS355

12

R481

34

Q96B
UM6K1N

GND

T252
TPC32t

1

T279
TPC32t

1

+5VLCM

R664

12

100KOhm

2

C

T255
TPC32t

1

AC_BAT_SYS

A/D_VIN_O
A/D_VIN
+5VCHG
+5V

+5VLCM

+5VLCM

+2.5VREF

+2.5VREF

1. ADAPTER IN CIRCUIT

2. +5VCHG

3. +5VLCM & +2.5VREF

12

R656

BAT1_LOW#(H--L)=
BAT1_LOW#(L--H)= 14.67V

BAT1_LOW# <51>

BAT2_LOW# <51>

BAT2_IN#_OC <27>

100KOhm

1

61

1 2

T161

TPC32t

Q96A
UM6K1N

100KOhm

BATTERY2 IN CIRCUIT

C

BAT2_LOW#(H--L)=
BAT2_LOW#(L--H)=10.75V

CON Part Number Modify as ME

T20

TPC28t

1

J6

6

P_GND

5

NP_NC

4

P_GND1

DC_PWR_JACK_3P

3
2
1

DC IN

T224

TPC28t

1

T14
TPC28t

D

ACIN_OC<27>

ACIN#<43>

AC_BAT_SYS

T163

TPC32t

1

Q134

3

D

2N7002

1

G

S

2

3
C

E

2

A/D_DOCK_IN

12

R625

100KOhm

TPC32t

T302

1

R-1

B1

47K

R-2
47K

Q136
DTC144EK

12

12

GND

R672

68KOhm

R67110KOhm

1

12

T333

TPC32t

C646 0.1UF/25V

E

ADAPTER IN DETECT

T168

TPC32t

12

34

Q141B
UM6K1N

GND

1

R654100KOhm

61

2

BAT1_IN#_OC <27>

Q141A
UM6K1N

+5VLCM

12

R651 100KOhm

T195

TPC32t

1

TS1#<48,49>

12

C640

1000PF/16V

5

BATTERY1 IN CIRCUIT

T220

TPC28t

1

T164
TPC28t

D

1

12

C72

0.1UF/25V

1

T19

TPC28t

1

A/D_VIN_P

1

T166
TPC28t

L27

150Ohm/100Mhz

1

T130
TPC28t

21

12

C50

0.1UF

12

C49

1U

C75

0.1UF

12

Title :

ASUSTECH CO.,LTD.

Size Project Name

Custom

Date: Sheet

Z61Ae

Engineer:

E

A/D_DOCK_IN
A/D_DOCK_IN <26,50>

Z61Ae

ADAMS LIN

of

53 57Thursday, June 09, 2005

Rev

2.0

A

B

C

D

E

A/D_DOCK_IN

1 1

AC_BAT_SYS

LM3480-5

(Regulator)

VSUSON#

LTC3728LX

(Controllor)

+5VCHG +5VLCM

(20mA)

+3VO

+12VO

SWITCH
(F02JK2E)

(5A)

+3VSUS

LM4040BIM

(Regulator)

SI9183DT

(Regulator)

+2.5VREF

+1.5VSUS/*

South Bridge
supply

+5VO

(8A)

+5VSUS

SUSC#_PWR

2 2

MIC5233BM5

(SI4800DY)
SUSB#_PWR
SUSC#_PWR

(UMC4N)

+1.8VO

(7A)

+12V

+5V

+3V

+1.8V

SUSB#_PWR

RT9173ACL5

+0.9VS

(Regulator)

+1.5VS+1.5VO (4A)

PMN45EN

+5VO

3 3

TPS5130

(Controllor)

VREF3
VREF5

+3VALWAYS
+5VALWAYS

(7A)

+2.5VS(1A)+2.5VO

CPU_VRON

SWITCH+1.05VO

(PMN45EN)

+VCC_GMCH_CORE

+1.8VS

+VCCP

SUSB#_PWR

(UMC4N)

+12VS

+5VS

4 4

+3VS

(SI4800DY)

CPU_VRON

+5VO

5 5

A

MAX1987

(Controllor)

VRM_PWRGD, CLK_EN#

VR_VID0 - VR_VID5, STP_CPU#, PM_DPRSLPVR, PM_PSI#

B

C

+VCORE

ASUSTECH CO.,LTD.

Size Project Name

Custom

D

Date: Sheet of

(27A)

Z61Ae

Title :

Engineer:

E

Power Flowchart

Sam Wang

54 57Thursday, June 09, 2005

Rev

2.0

5

4

3

2

1

CPU Diff Pair

D D

CPU Diff Pair

3GIO Diff Pair

CPU
(Dothan)

HPLL MPLL

MCH
(Alviso 915GM)

DPLL

LVDS PLL

3GPLL

DDR2 CLK

Memory slot

Dot 96M Diff Pair

C C

CLK GEN
(ICS954206)

3GIO Diff Pair

USB 48M

USB
PLL

3GPLL
(for DMI)

Ref 14M

Ref 14M

PCI 33M

B B

PCI 33M

PCI 33M

PCI 33M

SIO
LPC47N217

CARDBUS&1394
R5C841

24.576M

ICH6-M

LAN

25M

PCI 33M

PCI 33M

A A

PCI 33M

5

14.318M

4

FWH

KBC

8M

DEBUG PORT

24M

Azalia

3

32.768K

Title :

CLK MAP

ASUSTECH CO.,LTD.

Size Project Name

C

2

Date: Sheet

Engineer:

Z61Ae

1

Sam Wang

of

55 57Thursday, June 09, 2005

Rev

2.0

A

B

C

D

E

A/D_DOCK_IN

+5VLCM
+2.5VREF

2

Power On

1 1

AC_BAT_SYS

+3VALWAYS
+5VALWAYS

1

+3VALWAYS

3

VSUS_ON#

T418

Stratup
Circuit

T17

4

PM_PWRBTN#

PM_RSMRST#

T16

SWITCH

ICH6

PWROK

PM_SUSC#

PM_SUSB#

5
6

VRMPWRGD

+3VSUS
+5VSUS

2 2

+1.5VSUS
+2.5VSUS

T20

11

T278

11

H_PWRGD

PLT_RST#

5

SUSC#

T102

+1.8V
+3V
+5V
+12V

10

ICH6_PWROK

T378

ALVISO

12

H_CPURST#

T321

CPU

PWROK

3 3

9

+1.8VS

CLK_PWR_GD#

T62

CK-410M

+0.9VS
+1.5VS

6

SUSB#

4 4

T181

+2.5VS
+3VS
+5VS
+12VS

Power On Sequence

Delay

CPU_VRON

T230

+VCORE

+VCCP

1 12

7

8

5 5

T195

ASUSTECH CO.,LTD.

Size Project Name

Custom

A

B

C

D

Date: Sheet of

Z61Ae

Title :

Engineer:

E

Z61Ae Power On Sequence

Sam Wang

56 57Thursday, June 09, 2005

Rev

2.0

A

B

C

D

E

Power

R1.0

1 1

System

R1.1

R1.1-S01 --> To fine tune power sequence and power select.
R1.1-S02 --> To fine tune clock quality.
R1.1-S03 --> ME change H4 & H6 & H25 to 13-N7510M270 (It need to modify in BOM by self.)
R1.1-S04 --> CE1 not used.Release space for bluetooth.
R1.1-S05 --> Follow W3V R2.1
R1.1-S06 --> RealTek suggestion.(To support MicroSoft new HCT12.1 test program.)
R1.1-S07 --> RealTek suggestion.To support Sofeware Jack Detect(JD) function.
R1.1-S08 --> To avoid POP sound when system BOOT.
R1.1-S09 --> To fine tune SPDIF_A signal quality.
R1.1-S10 --> unmount R629.(Due to dual pull low with R637.)
R1.1-S11 --> To avoid charge LED flash when adapter in and remove battery.
R1.1-S12 --> To support alert by BIOS control and delete R174 dual pull high.
R1.1-S13 --> Bypass MIC amplifer to improve MIC signal quality.

2 2

3 3

R1.1-S14 --> RealTek suggestion.
R1.1-S15 --> To use thinner than before.
R1.1-S16 --> Follow M6V/A R2.1
R1.1-S17 --> For factory testing.Sofeware can use the GPIO into test mode.
R1.1-S18 --> To solve CRT ripple problem.
R1.1-S19 --> Delete BAYDOCK_IN# pull high.Due to dual pull high with RN26.
R1.1-S20 --> Change DDR2 SODIMM to DUAL DDR2 DIMM.
R1.1-S21 --> Update PCB_VID.
R1.1-S22 --> To support HDD/ODD Hot SWAP.
R1.1-S23 --> To slove QTC bug for PRINTER PORT fail.(Run QA+PRO V)
R1.1-S24 --> For factory ATS power test at P/R stage.
R1.1-S25 --> To match ME new MIC cable defination.
R1.1-S26 --> Change to digital groung.To avoid noise.
R1.1-S27 --> RICOH suggestion.
R1.1-S28 --> Del unused Components and Net to release free space.
R1.1-S29 --> To avoid VCCA wrong Value.
R1.1-S30 --> delete unmount part to release MB space.
R1.1-S31 --> Due to KB Cover shut down cause Sys. Power on.
R1.1-S32 --> Unmount C for Cost down.
R1.1-S33 --> Fine tune LAN driving.
R1.1-S34 --> Change JRST1 PCB footprint for Layout suggestion.
R1.1-S35 --> Change R to RPACK for Cost down.
R1.1-S36 --> Fine tune -R value.
R1.1-S37 --> For Port Bar LAN Wake-up.
R1.1-S38 --> Give BT_ON signal a default state.

R2.0

R2.0-S01 --> To fine tune power sequence.
R2.0-S02 --> To fine tune crystal PPM.
R2.0-S03 --> To modify some mistake in V1.1.
R2.0-S04 --> To Re-define LED.
R2.0-S05 --> To get power switch signal when end-user press power key quickly.(over 30ms then PWR_ON# will be low.)
R2.0-S06 --> To avoid +3VSUS sometimes re-start in battery mode then loss 10mA arround.(Add 39K ohm can make +3VSUS low faster and U60 IC will shutdown faster.)
R2.0-S07 --> To solve can not resume when battery low.
R2.0-S08 --> To add 0.1u by EMI request.
R2.0-S09 --> To check O/S or DOS mdoe.To control power LED flash when battery low about 10%.DOS mode H/W detect battery then flash LED.O/S mode S/W detect 10% from gauge then inform LED to flash.
R2.0-S10 --> Mount MIC amplifer to improve MIC volume.
R2.0-S11 --> To set Switch default for Dothan.
R2.0-S12 --> To fine tune Speaker volume.
R2.0-S13 --> Fine tune CB_GBRST# timing.
R2.0-S14 --> To solve USB device leakage to +5V in S3.When use USB HDD storage that need power adapter.

Revision History

4 4

5 5

Title :

Revision History

ASUSTECH CO.,LTD.

Size Project Name

C

A

B

C

D

Date: Sheet

Engineer:

Z61Ae

E

Sam Wang

of

57 57Thursday, June 09, 2005

Rev

2.0