Asus X409FA,X409FB,X409FJ,X409FL Schematic
SYSTEM PAGE REF.
PAGE
003
004
005
006
009 CPU_CFG,RSVD
014
016
019
020
021
022
023
024
025
026
027
028
030
031
032
033
034
037
039 HDD Board_SATA_HDD
041
042
047
048
052
055
056 Hall Sensor & Power Switch
057 DSG_Discharge
058 PRO_Protect
060 PW_DC_DC & BAT IN
065
068 B to B Connector
070
071
072 VGA_nVIDIA_N16V/S_FB-DDR3
074 VGA_nVIDIA_N16V/S_DISPLAY
075 GPU_GPIO_THERM
076 GPU_XTAL/STRAPPING
077 GPU_PWG/GND
078 GPU_Power_Sel
80
81
82
83 PW_I/O_DDR(RT8202A+uP7711)
84
85 PW_GPU_+VGA_CORE(RT8202A)
87
88
91 PW_LOAD SWITCH
95 SYSTEM HISTORY
96
97
98
Content
Block Diagram001
System Setting002
CPU_DISPLAY
CPU_DDR4
CPU_LPC,SPI,SMB,CLINK
CPU_POEWR
CPU_MISC,JTAG008
DDR4_SO-DIMM_A
DDR4_SO-DIMM_B
DDR3 CA_DQ VOLTAGE
CPU_PCH_CSI2,EMMC
CPU_PCH_CGPIO, LPIO, MISC
CPU_PCH_AUDIO,SDIO,SDXC
CPU_PCH_PCIE,USB,SATA
CPU_PCH_CLOCK SIGNALS,RTC
CPU_PCH_SYS_POWER
CPU_PCH_POEWR,GND
CPU_PCH_POEWR,GND
PCH-SPI ROM,OTH
KBC_ITE8995E/DX
KBC_KB & TP
RST_Reset Circuit
LAN-RTL8111GUX
LAN_RJ45
AUD-ALC3251-CG036
AUD-
AUD-SPEAKER038
IO Board_USB_LED_FPC_Screw
IO Board_CR_AU6465R
DEBUG_LPC044
LVDS_eDP045
D-Sub046
DDI_VGA
HDMI
Thermal Sensor & Fan050
SATA_ODD051
USB3.0 Port
NGFF_SSD_HDD053
NGFF_WLAN_BT054
USB3.0_TYPEC
SKEW_HOLE_SMT_NUT
GPU_PCI-EXPRESS
GPU_MEMORY INTERFACE-A
PW_VCORE(ISL95831)
PW_SYSTEM(RT8206A)
PW_I/O_VCCP(RT8202A)
PW_LDO_+1.8VS(LDO)
PW_I/O_+0.8VS(LDO)
PW_CHARGER(MB39A132)
POWER FLOWCHART92
POWER-ON SEQUENCE
POWER-ON TIMING_AC MODE
POWER-ON TIMING_DC MODE
BLOCK DIAGRAM
EDP Panel
Page 45
HDMI CON
Page 48
Finger print
Page 31
Touchpad
Page 31
Keyboard
Page 31
Charger
Page 89
M.2 SSD
(Reserve)
HP Combo Jack
PWM Fan
Debug Conn.
SMB0
HDD
INT. AMIC
INT. DMIC
SPEAKER
Page 50
Page 39
Page 53
Page 45
Page 45
Page 41
Page 41
SPI
I2C
Page 44
ITE8225E/DX
IO Board
Reset Circuit
X409FB SCHEMATIC Revision2.0
（FA：UMA）(45W)
（FB：DGPU = Nvidia N16V-GMR1, MX110）(65W)
（FJ：DGPU = Nvidia N17S-G0, MX230）(65W)
（FL：DGPU = Nvidia N17S-G2, MX250）(65W)
eDP
DDI2
Page 28
LPC
SPI
EC
Page 30
SPI
SPI ROM
SATA Port0
SATA Port2
PCIE13~16
Reltek Codec
ALC3251-CG
Page 36
Discharge Circuit
Page 32
CPU
Whiskey lake-U42
PCH
8th Generation
Intel Processor Families
I/O for U Platforms
SATA
HDA
DC & BATT. Conn.
PCIE
CNVi
USB2.0
Page 20~27
USB3.0
DDR4 2400 MHZ
DDR4 2400 MHZ
Port5~8
Port10
Port8
Port5
Port4
Port2
Port1
Port1
Port3
Port3&4
Page 60Page 57
Screw Holes
DDR4 on board
DDR4 SO-DIMM
Nvidia GPU
N16V/N17S
Page 70~78
WLAN&BT(CNVi)
CMOS Camera
CardReader
AU6465RB63-GCF
USB2.0 Conn
USB3.1 Gen1 Type-A
USB3.1 Gen1 Type-C
Page 65
Page 54
Page 45
Page 42
Page 41
Page 55
Page 52
Page14
Page16
IO Board
<Variant Name>
Power
VCCORE/VCCGT/VCCSA
Load Switch
1.0VSUS/1.8VSUS
1.2V & VTT & 2.5V
3VDSW & 5VSUS
Charger
Power Protect
NVVDD
FBVDDQ
PEX_VDD
Project Name
Title :
Block Diagram
Size
Dept.:
Custom
Date: Sheet
Friday, February 22, 2019
Engineer:
ASUSTeK
Page 80~81
NB3EE2
1
Page 88
Page 83
Page 86
Page 87
Page 89
Page 90
Page 91
Page 92
Page 97
Rev
R1.0X409F
101
of
Display
Port
A
B
C HDMI
DDI1 mapping
DDPB
DDI2 mapping
DDPC
eDP
HDMI_TXN2<48>
HDMI_TXP2<48>
HDMI_TXN1<48>
HDMI_TXP1<48>
HDMI_TXN0<48>
HDMI_TXP0<48>
HDMI_CLKN<48>
HDMI_CLKP<48>
Compensation for DP/eDP/DDI
Interface
+VCCIO
R0301
24.9Ohm
1%
1 2
DDPC_SCL_PCH<48>
DDPC_SDA_PCH<48>
Enable DDI2 Port for
HDMI
T0301
DISP_COMP
1
GPP_H17
U0301A
AL5
DDI1_TXN[0]
AL6
DDI1_TXP[0]
AJ5
DDI1_TXN[1]
AJ6
DDI1_TXP[1]
AF6
DDI1_TXN[2]
AF5
DDI1_TXP[2]
AE5
DDI1_TXN[3]
AE6
DDI1_TXP[3]
AC4
DDI2_TXN[0]
AC3
DDI2_TXP[0]
AC1
DDI2_TXN[1]
AC2
DDI2_TXP[1]
AE4
DDI2_TXN[2]
AE3
DDI2_TXP[2]
AE1
DDI2_TXN[3]
AE2
DDI2_TXP[3]
AM6
DISP_RCOMP
CC8
GPP_E18/DPPB_CTRLCLK/
CC9
GPP_E19/DPPB_CTRLDATA
CH4
GPP_E20/DPPC_CTRLCLK
CH3
GPP_E21/DPPC_CTRLDATA
CP4
GPP_E22/DPPD_CTRLCLK
CN4
GPP_E23/DPPD_CTRLDATA
CR26
GPP_H16/DDPF_CTRLCLK
CP26
GPP_H17/DDPF_CTRLDATA
BGA1528P
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUX_N
EDP_AUX_P
DISP_UTILS
DDI1_AUX_N
DDI1_AUX_P
DDI2_AUX_N
DDI2_AUX_P
DDI3_AUX_N
DDI3_AUX_P
GPP_E13/DDPB_HPD0/DISP_MISC0
GPP_E14/DDPC_HPD1/DISP_MISC1
GPP_E15/DPPD_HPD2/DISP_MISC2
GPP_E16/DPPE_HPD3/DISP_MISC3
GPP_E17/EDP_HPD/DISP_MISC4
eDP_BKLTEN
eDP_VDDEN
eDP_BKLTCTL
CNV_BT_HOST_WAKE#
AG4
AG3
AG2
AG1
AJ4
AJ3
AJ2
AJ1
AH4
AH3
AM7
AC7
AC6
AD4
AD3
AG7
AG6
CN6
CM6
CP7
CP6
CM7
CK11
CG11
CH11
EDP_TX0_DN <45>
EDP_TX0_DP <45>
EDP_TX1_DN <45>
EDP_TX1_DP <45>
EDP_TX2_DN <45>
EDP_TX2_DP <45>
EDP_TX3_DN <45>
EDP_TX3_DP <45>
EDP_AUX_DN <45>
EDP_AUX_DP <45>
HDMI_HPD <48>
EXT_SMI# <30>
EXT_SCI# <30>
EDP_HPD <45>
EDP_BKLT_EN <45>
EDP_VDD_EN <45>
EDP_BKLT_CTL <45>
EXT_SMI#
EXT_SCI#
EDP_HPD
10KOHM
1
10KOHM
3
R0303 10KOhm@
1 2
+3VS
2
RN0301A
4
RN0301B
Project Name
X409F
Title :
CPU_DISPLAY
Size
Dept.:
B
Date: Sheet
Friday, February 22, 2019
ASUSTeK
Engineer:
NB3EE2
3
Rev
R1.0
101
of
Main Board
Memory Channel A
U0301B
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
DDR4(IL) / LPDDR3-DDR4(NIL)
A26
DDR0_DQ[0]/DDR0_DQ[0]
D26
DDR0_DQ[1]/DDR0_DQ[1]
D28
DDR0_DQ[2]/DDR0_DQ[2]
C28
DDR0_DQ[3]/DDR0_DQ[3]
B26
DDR0_DQ[4]/DDR0_DQ[4]
C26
DDR0_DQ[5]/DDR0_DQ[5]
B28
DDR0_DQ[6]/DDR0_DQ[6]
A28
DDR0_DQ[7]/DDR0_DQ[7]
B30
DDR0_DQ[8]/DDR0_DQ[8]
D30
DDR0_DQ[9]/DDR0_DQ[9]
B33
DDR0_DQ[10]/DDR0_DQ[10]
D32
DDR0_DQ[11]/DDR0_DQ[11]
A30
DDR0_DQ[12]/DDR0_DQ[12]
C30
DDR0_DQ[13]/DDR0_DQ[13]
B32
DDR0_DQ[14]/DDR0_DQ[14]
C32
DDR0_DQ[15]/DDR0_DQ[15]
H37
DDR0_DQ[16]/DDR0_DQ[32]
H34
DDR0_DQ[17]/DDR0_DQ[33]
K34
DDR0_DQ[18]/DDR0_DQ[34]
K35
DDR0_DQ[19]/DDR0_DQ[35]
H36
DDR0_DQ[20]/DDR0_DQ[36]
H35
DDR0_DQ[21]/DDR0_DQ[37]
K36
DDR0_DQ[22]/DDR0_DQ[38]
K37
DDR0_DQ[23]/DDR0_DQ[39]
N36
DDR0_DQ[24]/DDR0_DQ[40]
N34
DDR0_DQ[25]/DDR0_DQ[41]
R37
DDR0_DQ[26]/DDR0_DQ[42]
R34
DDR0_DQ[27]/DDR0_DQ[43]
N37
DDR0_DQ[28]/DDR0_DQ[44]
N35
DDR0_DQ[29]/DDR0_DQ[45]
R36
DDR0_DQ[30]/DDR0_DQ[46]
R35
DDR0_DQ[31]/DDR0_DQ[47]
AN35
DDR0_DQ[32]/DDR1_DQ[0]
AN34
DDR0_DQ[33]/DDR1_DQ[1]
AR35
DDR0_DQ[34]/DDR1_DQ[2]
AR34
DDR0_DQ[35]/DDR1_DQ[3]
AN37
DDR0_DQ[36]/DDR1_DQ[4]
AN36
DDR0_DQ[37]/DDR1_DQ[5]
AR36
DDR0_DQ[38]/DDR1_DQ[6]
AR37
DDR0_DQ[39]/DDR1_DQ[7]
AU35
DDR0_DQ[40]/DDR1_DQ[8]
AU34
DDR0_DQ[41]/DDR1_DQ[9]
AW35
DDR0_DQ[42]/DDR1_DQ[10]
AW34
DDR0_DQ[43]/DDR1_DQ[11]
AU37
DDR0_DQ[44]/DDR1_DQ[12]
AU36
DDR0_DQ[45]/DDR1_DQ[13]
AW36
DDR0_DQ[46]/DDR1_DQ[14]
AW37
DDR0_DQ[47]/DDR1_DQ[15]
BA35
DDR0_DQ[48]/DDR1_DQ[32]
BA34
DDR0_DQ[49]/DDR1_DQ[33]
BC35
DDR0_DQ[50]/DDR1_DQ[34]
BC34
DDR0_DQ[51]/DDR1_DQ[35]
BA37
DDR0_DQ[52]/DDR1_DQ[36]
BA36
DDR0_DQ[53]/DDR1_DQ[37]
BC36
DDR0_DQ[54]/DDR1_DQ[38]
BC37
DDR0_DQ[55]/DDR1_DQ[39]
BE35
DDR0_DQ[56]/DDR1_DQ[40]
BE34
DDR0_DQ[57]/DDR1_DQ[41]
BG35
DDR0_DQ[58]/DDR1_DQ[42]
BG34
DDR0_DQ[59]/DDR1_DQ[43]
BE37
DDR0_DQ[60]/DDR1_DQ[44]
BE36
DDR0_DQ[61]/DDR1_DQ[45]
BG36
DDR0_DQ[62]/DDR1_DQ[46]
BG37
DDR0_DQ[63]/DDR1_DQ[47]
BGA1528P
VTT
Enable
M_A_DQ[63:0]<14>
DDR_VTT_CTRL
R0404 0OHM@
1 2
LPDDR3 / DDR4
DDR0_CKN[0]/DDR0_CKN[0]
DDR0_CKP[0]/DDR0_CKP[0]
DDR0_CKN[1]/DDR0_CKN[1]
DDR0_CKP[1]/DDR0_CKP[1]
DDR0_CKE[0]/DDR0_CKE[0]
DDR0_CKE[1]/DDR0_CKE[1]
DDR0_CKE[2]/NC
DDR0_CKE[3]/NC
DDR0_CS#[0]/DDR0_CS#[0]
DDR0_CS#[1]/DDR0_CS#[1]
DDR0_ODT[0]/DDR0_ODT[0]
NC/DDR0_ODT[1]
DDR0_CAB[9]/DDR0_MA[0]
DDR0_CAB[8]/DDR0_MA[1]
DDR0_CAB[5]/DDR0_MA[2]
NC/DDR0_MA[3]
NC/DDR0_MA[4]
DDR0_CAA[0]/DDR0_MA[5]
DDR0_CAA[2]/DDR0_MA[6]
DDR0_CAA[4]/DDR0_MA[7]
DDR0_CAA[3]/DDR0_MA[8]
DDR0_CAA[1]/DDR0_MA[9]
DDR0_CAB[7]/DDR0_MA[10]
DDR0_CAA[7]/DDR0_MA[11]
DDR0_CAA[6]/DDR0_MA[12]
DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAB[2]/DDR0_MA[14]
DDR0_CAB[1]/DDR0_MA[15]
DDR0_CAB[3]/DDR0_MA[16]
DDR0_CAB[4]/DDR0_BA[0]
DDR0_CAB[6]/DDR0_BA[1]
DDR0_CAA[5]/DDR0_BG[0]
DDR0_CAA[8]/DDR0_ACT#
DDR0_CAA[9]/DDR0_BG[1]
DDR4(IL) / LPDDR3-DDR4(NIL)
DDR0_DQSN[0]/DDR0_DQSN[0]
DDR0_DQSP[0]/DDR0_DQSP[0]
DDR0_DQSN[1]/DDR0_DQSN[1]
DDR0_DQSP[1]/DDR0_DQSP[1]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
NC/DDR0_ALERT#
DDR0_VREF_DQ[0]
DDR0_VREF_DQ[1]
DDR1_VREF_DQ
NC/DDR0_PAR
DDR_VREF_CA
DDR_VTT_CTL
GND
V32
V31
T32
T31
U36
U37
U34
U35
AE32
AF32
AE31
AF31
AC37
AC36
M_A_A0
AC34
M_A_A1
AC35
M_A_A2
AA35
M_A_A3
AB35
M_A_A4
AA37
M_A_A5
AA36
M_A_A6
AB34
M_A_A7
W36
M_A_A8
Y31
M_A_A9
W34
M_A_A10
AA34
M_A_A11
AC32
M_A_A12
M_A_A13
AC31
AB32
Y32
W32
AB31
V34
V35
W35
C27
D27
M_A_DQS#0
D31
M_A_DQS0
C31
M_A_DQS#1
J35
M_A_DQS1
J34
M_A_DQS#2
P34
M_A_DQS2
P35
M_A_DQS#3
AP35
M_A_DQS3
AP34
M_A_DQS#4
AV34
M_A_DQS4
AV35
M_A_DQS#5
BB35
M_A_DQS5
BB34
M_A_DQS#6
BF34
M_A_DQS6
BF35
M_A_DQS#7
M_A_DQS7
W37
W31
F36
D35
D37
E36
C35
DDR_VTT_CTRL
U0401
1
NC
A
2
3 4
GND
U74AUP1G07G-AL5-R
M_A_CLK_DDR#0 <13,14>
M_A_CLK_DDR0 <13,14>
M_A_CKE0 <13,14>
M_A_CS#0 <13,14>
M_A_ODT0 <13,14>
M_A_WE# <13,14>
M_A_CAS# <13,14>
M_A_RAS# <13,14>
M_A_BA0 <13,14>
M_A_BA1 <13,14>
M_A_BG0 <13,14>
M_A_ACT# <13,14>
M_A_BG1 <14>
20180713 Jacky add M_A_BG1
IL or NIL
Check?
M_A_ALERT# <13,14>
M_A_PAR <13,14>
SA_DIMM_VREFCA <19>
SB_DIMM_VREFCA <19>
5
VCC
Y
M_A_A[13:0] <13,14>
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DQS#[7:0] <14>
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS[7:0] <14>
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
+3VS+1.2V
12
12
C0402
R0403
0.1UF/10V
200KOhm
GND
DDR_PG_CTRL <86>
M_B_DQ[63:0]<16>
Input(A) Output(Y)
H
Z
L
L
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
DRAMRST#
Memory Channel B
U0301C
DDR4(IL) / LPDDR3-DDR4(NIL)
J22
DDR1_DQ[0]/DDR0_DQ[16]
H25
DDR1_DQ[1]/DDR0_DQ[17]
G22
DDR1_DQ[2]/DDR0_DQ[18]
H22
DDR1_DQ[3]/DDR0_DQ[19]
F25
DDR1_DQ[4]/DDR0_DQ[20]
J25
DDR1_DQ[5]/DDR0_DQ[21]
G25
DDR1_DQ[6]/DDR0_DQ[22]
F22
DDR1_DQ[7]/DDR0_DQ[23]
D22
DDR1_DQ[8]/DDR0_DQ[24]
C22
DDR1_DQ[9]/DDR0_DQ[25]
C24
DDR1_DQ[10]/DDR0_DQ[26]
D24
DDR1_DQ[11]/DDR0_DQ[27]
A22
DDR1_DQ[12]/DDR0_DQ[28]
B22
DDR1_DQ[13]/DDR0_DQ[29]
A24
DDR1_DQ[14]/DDR0_DQ[30]
B24
DDR1_DQ[15]/DDR0_DQ[31]
G31
DDR1_DQ[16]/DDR0_DQ[48]
G32
DDR1_DQ[17]/DDR0_DQ[49]
H29
DDR1_DQ[18]/DDR0_DQ[50]
H28
DDR1_DQ[19]/DDR0_DQ[51]
G28
DDR1_DQ[20]/DDR0_DQ[52]
G29
DDR1_DQ[21]/DDR0_DQ[53]
H31
DDR1_DQ[22]/DDR0_DQ[54]
H32
DDR1_DQ[23]/DDR0_DQ[55]
L31
DDR1_DQ[24]/DDR0_DQ[56]
L32
DDR1_DQ[25]/DDR0_DQ[57]
N29
DDR1_DQ[26]/DDR0_DQ[58]
N28
DDR1_DQ[27]/DDR0_DQ[59]
L28
DDR1_DQ[28]/DDR0_DQ[60]
L29
DDR1_DQ[29]/DDR0_DQ[61]
N31
DDR1_DQ[30]/DDR0_DQ[62]
N32
DDR1_DQ[31]/DDR0_DQ[63]
AJ29
DDR1_DQ[32]/DDR1_DQ[16]
AJ30
DDR1_DQ[33]/DDR1_DQ[17]
AM32
DDR1_DQ[34]/DDR1_DQ[18]
AM31
DDR1_DQ[35]/DDR1_DQ[19]
AM30
DDR1_DQ[36]/DDR1_DQ[20]
AM29
DDR1_DQ[37]/DDR1_DQ[21]
AJ31
DDR1_DQ[38]/DDR1_DQ[22]
AJ32
DDR1_DQ[39]/DDR1_DQ[23]
AR31
DDR1_DQ[40]/DDR1_DQ[24]
AR32
DDR1_DQ[41]/DDR1_DQ[25]
AV30
DDR1_DQ[42]/DDR1_DQ[26]
AV29
DDR1_DQ[43]/DDR1_DQ[27]
AR30
DDR1_DQ[44]/DDR1_DQ[28]
AR29
DDR1_DQ[45]/DDR1_DQ[29]
AV32
DDR1_DQ[46]/DDR1_DQ[30]
AV31
DDR1_DQ[47]/DDR1_DQ[31]
BA32
DDR1_DQ[48]/DDR1_DQ[48]
BA31
DDR1_DQ[49]/DDR1_DQ[49]
BD31
DDR1_DQ[50]/DDR1_DQ[50]
BGA1528P
BD32
DDR1_DQ[51]/DDR1_DQ[51]
BA30
DDR1_DQ[52]/DDR1_DQ[52]
BA29
DDR1_DQ[53]/DDR1_DQ[53]
BD29
DDR1_DQ[54]/DDR1_DQ[54]
BD30
DDR1_DQ[55]/DDR1_DQ[55]
BG31
DDR1_DQ[56]/DDR1_DQ[56]
BG32
DDR1_DQ[57]/DDR1_DQ[57]
BK32
DDR1_DQ[58]/DDR1_DQ[58]
BK31
DDR1_DQ[59]/DDR1_DQ[59]
BG29
DDR1_DQ[60]/DDR1_DQ[60]
BG30
DDR1_DQ[61]/DDR1_DQ[61]
BK30
DDR1_DQ[62]/DDR1_DQ[62]
BK29
DDR1_DQ[63]/DDR1_DQ[63]
DRAMRST#
DDR4(IL) / LPDDR3-DDR4(NIL)
+1.2V
12
R0401
470Ohm
1%
LPDDR3 / DDR4
DDR1_CKN[0]/DDR1_CKN[0]
DDR1_CKP[0]/DDR1_CKP[0]
DDR1_CKN[1]/DDR1_CKN[1]
DDR1_CKP[1]/DDR1_CKP[1]
DDR1_CKE[0]/DDR1_CKE[0]
DDR1_CKE[1]/DDR1_CKE[1]
DDR1_CS#[0]/DDR1_CS#[0]
DDR1_CS#[1]/DDR1_CS#[1]
DDR1_ODT[0]/DDR1_ODT[0]
DDR1_CAB[9]/DDR1_MA[0]
DDR1_CAB[8]/DDR1_MA[1]
DDR1_CAB[5]/DDR1_MA[2]
DDR1_CAA[0]/DDR1_MA[5]
DDR1_CAA[2]/DDR1_MA[6]
DDR1_CAA[4]/DDR1_MA[7]
DDR1_CAA[3]/DDR1_MA[8]
DDR1_CAA[1]/DDR1_MA[9]
DDR1_CAB[7]/DDR1_MA[10]
DDR1_CAA[7]/DDR1_MA[11]
DDR1_CAA[6]/DDR1_MA[12]
DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAB[1]/DDR1_MA[15]
DDR1_CAB[3]/DDR1_MA[16]
DDR1_CAB[4]/DDR1_BA[0]
DDR1_CAB[6]/DDR1_BA[1]
DDR1_CAA[5]/DDR1_BG[0]
DDR1_CAA[9]/DDR1_BG[1]
DDR1_CAA[8]/DDR1_ACT#
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR1_DQSN[6]/DDR1_DQSN[6]
DDR1_DQSP[6]/DDR1_DQSP[6]
DDR1_DQSN[7]/DDR1_DQSN[7]
DDR1_DQSP[7]/DDR1_DQSP[7]
SL0401
DDR1_CKE[2]/NC
DDR1_CKE[3]/NC
NC/DDR1_ODT[1]
NC/DDR1_MA[3]
NC/DDR1_MA[4]
NC/DDR1_ALERT#
NC/DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
@
0402
AF28
AF29
AE28
AE29
T28
T29
V28
V29
AL37
AL35
AL36
AL34
AG36
AG35
AF34
AG37
AE35
AF35
AE37
AC29
AE36
AB29
AG34
AC28
AB28
AK35
AJ35
AK34
AJ34
AJ37
AJ36
W29
Y28
W28
H24
G24
C23
D23
G30
H30
L30
N30
AL31
AL30
AU31
AU30
BC31
BC30
BH31
BH30
Y29
AE34
BU31
BN28
BN27
BN29
21
GND
M_B_CLK_DDR#0 <16>
M_B_CLK_DDR0 <16>
M_B_CLK_DDR#1 <16>
M_B_CLK_DDR1 <16>
M_B_CKE0 <16>
M_B_CKE1 <16>
M_B_CS#0 <16>
M_B_CS#1 <16>
M_B_ODT0 <16>
M_B_ODT1 <16>
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_WE# <16>
M_B_CAS# <16>
M_B_RAS# <16>
M_B_BA0 <16>
M_B_BA1 <16>
M_B_BG0 <16>
M_B_BG1 <16>
M_B_ACT# <16>
M_B_DQS#0
M_B_DQS0
M_B_DQS#1
M_B_DQS1
M_B_DQS#2
M_B_DQS2
IL or NIL
M_B_DQS#3
Check?
M_B_DQS3
M_B_DQS#4
M_B_DQS4
M_B_DQS#5
M_B_DQS5
M_B_DQS#6
M_B_DQS6
M_B_DQS#7
M_B_DQS7
M_B_ALERT# <16>
M_B_PAR <16>
DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
12
C0401
0.1UF/6.3V
@
DDR4_DRAMRST# <14,16>
12
C0403
0.1UF/6.3V
@
GND
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A[13:0] <16>
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DQS#[7:0] <16>
M_B_DQS[7:0] <16>
DDR4 COMPENSATION
SIGNALS
1 2
R0405 121Ohm 1%
SM_RCOMP_0
1 2
R0406 80.6Ohm 1%
SM_RCOMP_1
1 2
R0407 100Ohm 1%
SM_RCOMP_2
GND
Project Name
X409F
Title :
CPU_DDR4
Size
Dept.:
Engineer:
ASUSTeK
D
Date: Sheet
Friday, February 22, 2019
NB3EE2
Rev
R1.0
101
of
4
SPI0_MOSI
CRB 4.7K PU? & Place to avoid
stub
PU Resistor in Page
28
SPI0_IO2 CRB 20K PU? & Place to avoid
stub
PU Resistor in Page
28
CRB 20K PU? & Place to avoid
SPI0_IO3
stub
SPI_CLK_SPI_2<28>
SPI_SO_SPI_2<28>
SPI_SI_SPI_2<28>
PCH_SPI_DQ2<28>
PCH_SPI_DQ3<28>
SPI_CS#0_SPI_2<28>
RC_IN# PU in EC
side
INT_SERIRQ PU in EC
side
50ohm for 3.3V
Power
33ohm for 1.8V
Power
1 2
R0503 49.9Ohm
1 2
R0504 49.9Ohm
1 2
R0505 49.9Ohm
1 2
R0506 49.9Ohm
1 2
R0507 49.9Ohm
21
R0508
0402
RC_IN#<30>
INT_SERIRQ<30>
SPI_CLK_PCH
SPI_SO_PCH
SPI_SI_PCH
SPI_DQ2_PCH
SPI_DQ3_PCH
SPI_CS0#_PCH
For DIMM
U0301E
CH37
SPI0_CLK
CF37
SPI0_MISO
CF36
SPI0_MOSI
CF34
SPI0_IO2
CG34
SPI0_IO3
CG36
SPI0_CS0#
CG35
SPI0_CS1#
CH34
SPI0_CS2#
CF20
GPP_D1/SPI1_CLK/BK1/SBK1
CG22
GPP_D2/SPI1_MISO_IO1/BK2/SBK2
CF22
GPP_D3/SPI1_MOSI_IO0/BK3/SBK3
CG23
GPP_D21/SPI1_IO2
CH23
GPP_D22/SPI1_IO3
CG20
GPP_D0/SPI1_CS0#/BK0/SBK0
CH7
CL_CLK
CH8
CL_DATA
CH9
CL_RST#
BV29
GPP_A0/RCIN#/TIME_SYNC1
BV28
GPP_A6/SERIRQ
BGA1528P
+12VS+3VSUS +3VS
RN0501A
2.2KOhm
1 2
SMB_CK
SMBus
0
SMB_DATA
12
RN0501B
2.2KOhm
3 4
2
61
Q0501A
EM6K1-G-T2R
EM6K1-G-T2R
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
R0512
100KOhm
5
34
Q0501B
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
RN0502B
2.2KOhm
SPD
CK14
CH15
SMB_CK
CJ15
SMB_DATA
GPP_C2
CH14
CF15
SML0_CLK
CG15
SML0_DATA
GPP_C5
CN15
CM15
SML1_CLK
CC34
SML1_DATA
SML1ALERT#
CA29
BY29
PCH_LAD0
BY27
PCH_LAD1
BV27
PCH_LAD2
CA28
PCH_LAD3
CA27
BV32
BV30
CLK_LPC_eSPI_PCH_X1
BY30
CLK_DEBUG_X1
RN0502A
2.2KOhm
3 4
1 2
1 2
R0520 15Ohm
1 2
R0521 15Ohm
1 2
R0522 15Ohm
1 2
R0523 15Ohm
1 2
R0502 33Ohm
1 2
R0501 33Ohm
/DEBUG
SMB_CK_DIMM <16>
To DIMM
SPD
SMB_DATA_DIMM <16>
LPC_AD0 <30,44>
LPC_AD1 <30,44>
LPC_AD2 <30,44>
LPC_AD3 <30,44>
LPC_FRAME# <30,44>
ESPI_RESET# <30,44>
CLK_LPC_eSPI_PCH <30,44>
CLK_DEBUG <44>
PM_CLKRUN# <30>
20180827 Jacky mount RN0503 and RN0504
SML1_CLK
SML1_DATA
SML0_CLK
SML0_DATA
PM_CLKRUN#
GPP_C5 for Normal PCIe WLAN WAKE#
Output
GPP_B23 for Intel DCI-OOB Function (Default = 0)
SML1ALERT#
GPP_C5
GPP_C5: weak internal pull
down
PU
eSPI is selected for EC
LPC is selected for EC
PD
(Default)
+3VSUS
RN0503A2.2KOhm
1 2
RN0503B2.2KOhm
3 4
RN0504A2.2KOhm
1 2
RN0504B2.2KOhm
3 4
+3VS
12
R050910KOhm
+3VSUS
12
R0511150KOhm
eSPI or
LPC
/eSPI
+3VSUS
R05144.7KOhm
12
Main Board
PU Resistor in Page
28
Transport Layer Security (TLS)
Confidentiality
GPP_C2
GPP_C2: weak internal pull
down
PU Enable (to support Intel AMT with
TLS)
Disable Intel ME TLS ipher suite
( no confodentiality)(Default)
PD
Project Name
CPU_LPC,SPI,SMBus,CLINK
Dept.:
Friday, February 22, 2019
X409F
ASUSTeK
Title :
Size
C
Date: Sheet
+3VSUS
@
R05154.7KOhm
12
Rev
R1.0
Engineer:
NB3EE2
101
of
5
+VCCCORE +VCCCORE
U0301L
AN9
VCCCORE1
AN10
VCCCORE2
AN24
VCCCORE3
AN26
VCCCORE4
AN27
VCCCORE5
AP2
VCCCORE6
AP9
VCCCORE7
AP24
VCCCORE8
AP26
VCCCORE9
AR5
VCCCORE10
AR6
VCCCORE11
AR7
VCCCORE12
AR8
VCCCORE13
AR10
VCCCORE14
AR25
VCCCORE15
AR27
VCCCORE16
AT9
VCCCORE17
AT24
VCCCORE18
AT26
VCCCORE19
AU5
VCCCORE20
AU6
VCCCORE21
AU7
VCCCORE22
AU8
VCCCORE23
AU9
VCCCORE24
AU24
VCCCORE25
AU25
VCCCORE26
AU26
VCCCORE27
AU27
VCCCORE28
AV2
VCCCORE29
AV5
VCCCORE30
AV7
VCCCORE31
AV10
VCCCORE32
AV27
VCCCORE33
AW5
VCCCORE34
AW6
VCCCORE35
AW7
VCCCORE36
AW8
VCCCORE37
AW9
VCCCORE38
AW10
VCCCORE39
BB9
RSVD4
BC24
RSVD5
AY9
RSVD6
BB24
RSVD7
BGA1528P
VCCCORE40
VCCCORE41
VCCCORE42
VCCCORE43
VCCCORE44
VCCCORE45
VCCCORE46
VCCCORE47
VCCCORE48
VCCCORE49
VCCCORE50
VCCCORE51
VCCCORE52
VCCCORE53
VCCCORE54
VCCCORE55
VCCCORE56
VCCCORE57
VCCCORE58
VCCCORE59
VCCCORE60
VCCCORE61
VCCCORE62
VCCCORE63
VCCCORE64
VCCCORE65
VCCCORE66
VCCCORE67
VCCCORE68
VCCCORE69
VCCCORE70
VCCCORE71
VCCCORE72
VCCCORE73
VCCCORE74
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
RSVD8
VCCSTG2
Place underthe
package
+VCCGT
12
12
AW24
AW25
AW26
AW27
AY24
AY26
BA5
BA7
BA8
BA25
BA27
BB2
BB26
BC5
BC6
BC7
BC9
BC10
BC26
BC27
BD5
BD8
BD10
BD25
BD27
BE9
BE24
BE25
BE26
BE27
BF2
BF9
BF24
BF26
BG27
AN6
AN5
AA3
H_CPU_SVIDALRT#
AA1
H_CPU_SVIDCK
AA2
H_CPU_SVIDDAT
Y3
BG3
12
C0629
C0628
1UF/6.3V
1UF/6.3V
12
C0660
C0661
1UF/6.3V
1UF/6.3V
@
@
12
12
C0630
1UF/6.3V
12
12
C0665
1UF/6.3V
@
P_VCCCORE_VCCSENSE_50ohm <80>
P_VCCCORE_VSSSENSE_50ohm <80>
+VCCSTG
20180926 Shihhao
Reserve 1UF/6.3V*10 for +VCCGT & VCCCORE
12
C0631
C0632
1UF/6.3V
1UF/6.3V
@
@
12
C0663
C0664
1UF/6.3V
1UF/6.3V
@
@
H_CPU_SVIDDAT
H_CPU_SVIDCK
H_CPU_SVIDALRT#
Place underthe
package
+VCCCORE
U0301M
A5
VCCGT1
A6
VCCGT2
A8
VCCGT3
12
C0604
10UF/6.3V
A11
VCCGT4
A12
VCCGT5
A14
VCCGT6
A15
VCCGT7
A17
VCCGT8
A18
VCCGT9
A20
VCCGT10
AA9
VCCGT/VCCCORE1
AB2
VCCGT/VCCCORE2
AB8
VCCGT/VCCCORE3
AB9
VCCGT/VCCCORE4
AB10
VCCGT/VCCCORE5
AC8
VCCGT/VCCCORE6
AD9
VCCGT/VCCCORE7
AE8
VCCGT/VCCCORE8
AE9
VCCGT/VCCCORE9
AE10
VCCGT/VCCCORE10
AF2
VCCGT/VCCCORE11
AF8
VCCGT/VCCCORE12
AF10
VCCGT/VCCCORE13
AG8
VCCGT/VCCCORE14
AG9
VCCGT/VCCCORE15
AH9
VCCGT/VCCCORE16
AJ8
VCCGT/VCCCORE17
AJ10
VCCGT/VCCCORE18
AK2
VCCGT/VCCCORE19
AK9
VCCGT/VCCCORE20
AL8
VCCGT/VCCCORE21
AL9
VCCGT/VCCCORE22
AL10
VCCGT/VCCCORE23
AM8
VCCGT/VCCCORE24
B3
VCCGT11
B4
VCCGT12
B6
VCCGT13
B8
VCCGT14
B11
VCCGT15
B14
VCCGT16
B17
VCCGT17
B20
VCCGT18
C2
VCCGT19
C3
VCCGT20
C6
VCCGT21
C7
VCCGT22
C8
VCCGT23
C11
VCCGT24
C12
VCCGT25
C14
VCCGT26
C15
VCCGT27
C17
VCCGT28
C18
VCCGT29
C20
VCCGT30
D4
VCCGT31
D7
VCCGT32
D11
VCCGT33
D12
VCCGT34
D14
VCCGT35
Y10
VCCGT/VCCCORE25Y8VCCGT/VCCCORE27
BGA1528P
+1.2V
12
C0662
1UF/6.3V
VCCGT/VCCCORE26
3.3A
12
C0613
1UF/6.3V
12
C0608
10UF/6.3V
ES1or ES2?
+VCCCORE
+VCCST
R0601
100Ohm
21
0402
21
0402
220Ohm 1%
1 2
12
C0669
C0671
1UF/6.3V
1UF/6.3V
12
C0682
C0683
1UF/6.3V
1UF/6.3V
@
@
1%
1 2
P_SVID_DATA_50OHM_X2 <80>
+VCCGT
P_SVID_CLK_50OHM_X2 <80>
+VCCST
R0602
56Ohm
5%
1 2
P_SVID_ALERT#_50OHM_X2 <80>
Place underthe
package
+VCCIO
12
12
C0619
12
C0673
1UF/6.3V
@
12
C0685
1UF/6.3V
@
1UF/6.3V
12
12
C0638
10UF/6.3V
4.066A(Volume
Mode)
C0605
1UF/6.3V
C0639
10UF/6.3V
ES1or ES2?
+VCCCORE
12
12
C0621
C0622
1UF/6.3V
1UF/6.3V
12
12
12
C0636
C0641
C0640
10UF/6.3V
10UF/6.3V
10UF/6.3V
@
SVID DATA
SL0609
SVID CLOCK
SL0617
SVID ALERT
R0603
12
12
12
C0670
C0674
1UF/6.3V
1UF/6.3V
@
12
12
12
C0680
C0681
1UF/6.3V
1UF/6.3V
@
@
D15
VCCGT36
D17
VCCGT37
D18
VCCGT38
D20
VCCGT39
E4
VCCGT40
F5
VCCGT41
F6
VCCGT42
F7
VCCGT43
F8
VCCGT44
F11
VCCGT45
F14
VCCGT46
F17
VCCGT47
F20
VCCGT48
G11
VCCGT49
G12
VCCGT50
G14
VCCGT51
G15
VCCGT52
G17
VCCGT53
G18
VCCGT54
G20
VCCGT55
H5
VCCGT56
H6
VCCGT57
H7
VCCGT58
H8
VCCGT59
H11
VCCGT60
H12
VCCGT61
H14
VCCGT62
H15
VCCGT63
H17
VCCGT64
H18
VCCGT65
H20
VCCGT66
J7
VCCGT67
J8
VCCGT68
J11
VCCGT69
J14
VCCGT70
J17
VCCGT71
J20
VCCGT72
K2
VCCGT73
K11
VCCGT74
L7
VCCGT75
L8
VCCGT76
L10
VCCGT77
M9
VCCGT78
N7
VCCGT79
N8
VCCGT80
N9
VCCGT81
N10
VCCGT82
P2
VCCGT83
P8
VCCGT84
R9
VCCGT85
T8
VCCGT86
T9
VCCGT87
T10
VCCGT88
U8
VCCGT89
U10
VCCGT90
V2
V9
VCCGT91
W8
VCCGT92
W9
VCCGT93
E3
VCCGT_SENSE
D2
VSSGT_SENSE
Place underthe
package
12
C0627
1UF/6.3V
12
C0609
10UF/6.3V
+VCCGT+VCCGT
12
C0624
1UF/6.3V
12
C0614
10UF/6.3V
ES1or ES2?
+VCCCORE
P_VCCGT_VCCSENSE_50ohm <80>
P_VCCGT_VSSSENSE_50ohm <80>
12
12
C0625
C0603
10UF/6.3V
22UF/6.3V
@
12
12
C0634
C0626
10UF/6.3V
1UF/6.3V
@
+VCCST
60mA
12
12
C0616
C0601
1UF/6.3V
1UF/6.3V
+VCCSTG
12
12
C0602
C0649
1UF/6.3V
1UF/6.3V
@
21
SL0618
0402
12
12
C0606
10UF/6.3V
@
12
C0637
10UF/6.3V
+VCCSA
C0607
10UF/6.3V
@
1
C0651
1UF/6.3V
2
1
C0612
10UF/6.3V
2
20mA
+VCCPLL_OC
+1.0V_VCCPLL+VCCST
12
C0675
1UF/6.3V
Place underthe
package
6A
1
C0633
1UF/6.3V
2
1
C0615
10UF/6.3V
2
+1.2V
U0301N
BGA1528P
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
RSVD9
VCCST1
VCCST2
VCCSTG1
VCCSTG3
VCCPLL_OC1
VCCPLL_OC2
VCCPLL_1
VCCPLL_2
AK24
VCCIO_OUT_1
AK26
VCCIO_OUT_2
AL24
VCCIO_OUT_3
AL25
VCCIO_OUT_4
AL26
VCCIO_OUT_5
AL27
VCCIO_OUT_6
AM25
VCCIO_OUT_7
AM27
VCCIO_OUT_8
BH24
VCCIO_OUT_9
BH25
VCCIO_OUT_10
BH26
VCCIO_OUT_11
BH27
VCCIO_OUT_12
BJ24
VCCIO_OUT_13
BJ26
VCCIO_OUT_14
BP16
VCCIO_OUT_15
BP18
VCCIO_OUT_16
BG8
VCCSA2
BG10
VCCSA1
BH9
VCCSA3
BJ8
VCCSA5
BJ9
VCCSA6
BJ10
VCCSA4
BK8
VCCSA9
BK25
VCCSA7
BK27
VCCSA8
BL8
VCCSA13
BL9
VCCSA14
BL10
VCCSA10
BL24
VCCSA11
BL26
VCCSA12
BM24
VCCSA15
BN25
VCCSA16
BP28
VCCIO_SENSE
BP29
VSSIO_SENSE
BE7
VSSSA_SENSE
BG7
VCCSA_SENSE
12
1
C0610
C0611
22UF/6.3V
22UF/6.3V
2
12
1
C0623
C0686
10UF/6.3V
10UF/6.3V
@
2
3.3A
AD36
AH32
AH36
AM36
AN32
AW32
AY3 6
BE32
BH36
R32
Y36
BC28
BP11
BP2
BG1
BG2
120mA
BL27
12
C0650
1UF/6.3V
BM26
BR11
BT11
130mA
C0676
1 2
0.1UF/6.3V
12
12
C0635
C0655
1UF/6.3V
1UF/6.3V
12
12
12
C0617
C0618
10UF/6.3V
C0620
10UF/6.3V
10UF/6.3V
+VCCIO
4.26A
+VCCSA
6A
P_VCCSA_VSSSENSE_50OHM <80>
P_VCCSA_VCCSENSE_50OHM <80>
20181022 Shihhao
Reserve VCCSA_SENSE for comet lake
ProjectName
Title :
CPU_POEWR
Size
Dept.:
Engineer:
ASUSTeK
D
Date: Sheet
Friday,February 22,2019
NB3EE2
Rev
R1.0X409F
101
of
6
+VCCST
12
1 2
PROCHOT#
R0801
1KOhm
1%
R0802
49.9Ohm
1%
T0801@
PECI_EC<30>
R0803
49.9Ohm
1%
1 2
PU Power change from VCCIO to VCCSTG
499OHM 1%
1 2
R0804
1
T0808@
T0809@
T0806@
T0807@
+VCCSTG
H_CATERR#
PECI_EC
PROCHOT#
THERMTRIP#
1
1
1
1
12
R0805
1KOhm
1%
PROCHOT_D#_R
12
C0801
43PF/50V
XDP_BPM#_0
XDP_BPM#_1
XDP_BPM#_2
XDP_BPM#_3
@
CB34
CC35
BP27
BW25
AA4
AR1
Y4
BJ1
U1
U2
U3
U4
CE9
CN3
L5
N5
U0301D
CATERR#
PECI
PROCHOT#
THRMTRIP#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
RSVD1
RSVD2
BGA1528P
2 1
2 1
2 1
0402
0402
0402
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
PCH_TRST#
PCH_JTAGX
PROC_PREQ#
PROC_PRDY#
SL0801
SL0802
SL0803
T6
U6
XDP_TCLK_CPU
Y5
XDP_TDI_CPU
T5
XDP_TDO_CPU
AB6
XDP_TMS_CPU
XDP_TRST_CPU#
W6
U5
PCH_JTAG_TCK
W5
XDP_TDI_PCH
P5
XDP_TDO_PCH
Y6
XDP_TMS_PCH
P6
XDP_TRST_PCH#
XDP_TCLK_PCH
W2
W1
XDP_PREQ#
XDP_PRDY#
THRO_CPU# <30>
IMVP8_VRHOT# <80>
PWRLIMIT#_CPU <89>
20190128 Shihhao
Reserve DCI schematic
XDP_TDO_CPU
XDP_TCLK_CPU
From EC ( by Thremal Sensor)
OD Gate (100ohm PD)
OD Gate (100ohm PD)
+VCCSTG
1 2
R0807 51OHM
@/DCI
1 2
R0806 51OHM
@/DCI
1 2
R0810
XDP_TCLK_CPU XDP_TCLK_PCH
XDP_TDI_CPU
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TRST_CPU#
0Ohm @/DCI
1 2
R0811
0Ohm @/DCI
1 2
R0812
0Ohm @/DCI
1 2
R0813
0Ohm @/DCI
1 2
R0814
0Ohm @/DCI
XDP_TDI_PCH
XDP_TDO_PCH
XDP_TMS_PCH
XDP_TRST_PCH#
TP for Boundary Scan Test
PCH_JTAG_TCK
XDP_PRDY#
XDP_PREQ#
nbs_r0201_h10_000s
nbs_r0201_h10_000s
Main Board
1
T0815
1
T0816
1
T0817
Project Name
X409F
Title :
CPU_MISC,JTAG
Size
Dept.:
B
Date: Sheet
ASUSTeK
Friday, February 22, 2019
Engineer:
NB3EE2
8
Rev
R1.0
101
of
TP for Boundary Scan Test
1
T0910TPC26T_50
CFG3
1
T0911TPC26T_50
ITP_PMODE
eDP
Enable
XDP_CFG_4 CFG_RCOMP
1 2
R0902
1KOhm
1%
For
Debug
U0301Q
T4
CFG[0]
R4
CFG[1]
T3
CFG[2]
R3
CFG[3]
CFG3
XDP_CFG_4
CFG_RCOMP
ITP_PMODE
12
R0903
49.9Ohm
1%
J4
CFG[4]
M4
CFG[5]
J3
CFG[6]
M3
CFG[7]
R2
CFG[8]
N2
CFG[9]
R1
CFG[10]
N1
CFG[11]
J2
CFG[12]
L2
CFG[13]
J1
CFG[14]
L1
CFG[15]
L3
CFG[16]
N3
CFG[18]
L4
CFG[17]
N4
CFG[19]
AB5
CFG_RCOMP
W4
ITP_PMODE
CG2
RSVD38
CG1
RSVD39
H4
RSVD40
H3
RSVD41
BV24
RSVD42
BV25
RSVD43
G3
RSVD62
G4
RSVD63
BK36
RSVD44
BK35
RSVD45
W3
RSVD46
AM4
RSVD47
AM3
RSVD70
A35
RSVD48
D34
RSVD49
G2
RSVD50
G1
RSVD51
BGA1528P
RSVD_TP2
RSVD_TP3
IST_TRIG
RSVD_TP4
RSVD74
RSVD73
RSVD78
RSVD77
RSVD75
RSVD76
RSVD52
RSVD53
RSVD54
RSVD71
RSVD72
RSVD55
RSVD56
RSVD57
RSVD58
RSVD67
RSVD66
RSVD69
RSVD68
VSS434
RSVD64
RSVD59
RSVD60
RSVD79
RSVD61
RSVD65
SKTOCC#
F37
F34
CP36
CN36
IST_TRIG
BJ36
BJ34
BK34
TP1
BR18
TP2
BT9
BT8
BP8
BP9
CR4
CP3
CR3
AT3
AU3
AN1
AN2
AN4
AN3
AL2
AL1
AL4
AL3
BP34
TP3
BP36
BP35
TP4
C34
A34
B35
CR35
CNV_RSVD
AH26
AJ27
E1
SKTOCC#
1
T0901 @
575962_WHL_DDR4_RVP_TDK_Rev1p1
1
T0903 @
1
T0902 @
U0301O
K12
RSVD10
K14
RSVD11
K15
RSVD12
K17
RSVD13
K18
RSVD14
K20
RSVD15
L25
RSVD16
M24
RSVD17
M26
RSVD18
P24
RSVD19
P26
RSVD20
R24
RSVD21
R25
RSVD22
R26
RSVD23
W25
RSVD24
V24
RSVD25
Y25
RSVD26
Y24
RSVD27
BGA1528P
Main Board
AA24
RSVD28
AA26
RSVD29
AB25
RSVD30
AC24
RSVD31
AC25
RSVD32
AC26
RSVD33
AD24
RSVD34
AD26
RSVD35
V25
RSVD36
T25
RSVD37
CFG0
CFG4
NO STALL STALL
01 NOTE
STALL RESET SEQUENCE
AFTER PCU PLL LOCK
UNTIL DE-ASSERTED
eDP ENABLEDISABLE ENABLE
Project Name
CPU_CFG,RSVD
ASUSTeK
X409F
Engineer:
Title :
Size
Dept.:
Custom
Date: Sheet
Friday, February 22, 2019
NB3EE2
9
Rev
R1.0
101
of
M_A_A[13:0]<4,14>
M_A_A11
M_A_A10
M_A_A4
M_A_A8
M_A_A2
M_A_A13
M_A_A9
1 2
36Ohm
3 4
36Ohm
5 6
36Ohm
7 8
36Ohm
7 8
36Ohm
3 4
36Ohm
1 2
36Ohm
5 6
36Ohm
7 8
36Ohm
5 6
36Ohm
7 8
36Ohm
3 4
36Ohm
5 6
36Ohm
3 4
36Ohm
5 6
36Ohm
3 4
36Ohm
7 8
36Ohm
3 4
36Ohm
3 4
36Ohm
5 6
36Ohm
1 2
36Ohm
1 2
36Ohm
7 8
36Ohm
1 2
36Ohm
1 2
36Ohm
5 6
36Ohm
1 2
36Ohm
7 8
36Ohm
1 2
R1307
36OHM
/RAM/DDP
M_A_ODT0<4,14>
M_A_CKE0<4,14>
M_A_WE#<4,14>
M_A_CS#0<4,14>
M_A_A7
M_A_A0
M_A_A6
M_A_ACT#<4,14>
M_A_BG0<4,14>
M_A_CAS#<4,14>
M_A_RAS#<4,14>
M_A_BA1<4,14>
M_A_BA1
M_A_BA0<4,14>
M_A_PAR<4,14>
M_A_A3
M_A_A1
M_A_A12
M_A_A5
M_A_BG1_R<14>
20180928 Jacky change M_A_BG1_R 36 ohm for /RAM/DDP
RN1307A
RN1307B
RN1306C
RN1304D
RN1305D
RN1301B
RN1301A
RN1302C
RN1307D
RN1301C
RN1301D
RN1306B
RN1307C
RN1303B
RN1304C
RN1304B
RN1302D
RN1302B
RN1305B
RN1305C
RN1305A
RN1302A
RN1303D
RN1304A
RN1303A
RN1303C
RN1306A
RN1306D
+1.2V
R1306
1 2
51.1Ohm
1%
20180920 Shihhao
Change DDR_CLK termination resistor value to 33ohm
0320 Jasper
12
C1308
10UF/6.3V
@
GND
(follow PDG)
R1305
1 2
33Ohm
R1303
1 2
33Ohm
M_A_CLK_DDR0 <4,14>
12
C1301
3300PF/50V
M_A_CLK_DDR#0 <4,14>
@
0.01UF/25V
C1304
12
M_A_ALERT#<4,14>
M_A_CLK_DDR0_R
+VTT
12
C1302
10UF/6.3V
@
GND
+VTT
+1.2V
Project Name
DDR4
Dept.:
Friday, February 22, 2019
ASUSTeK
X409F
Engineer:
Title :
Size
C
Date: Sheet
NB3EE2
13
Rev
R1.0
101
of
M_A_BG1<4> M_A_BG1_R <13>
1 2
R1420
/RAM/DDP
0OHM
1 2
R1425
/RAM/SDP
0OHM
GND
20180713 Jacky add
1 2
DDP_UZQ_1401
R1421 240Ohm/RAM/DDP 1%
1 2
DDP_UZQ_1402
R1422 240Ohm/RAM/DDP 1%
1 2
DDP_UZQ_1403
R1423 240Ohm/RAM/DDP 1%
1 2
DDP_UZQ_1404
R1424 240Ohm/RAM/DDP 1%
GND
M_A_VREFCA
12
C1411
2.2UF/10V
GND
+1.2V
20180713 follow X441 remove 51 ohm
+2.5V
M_A_A13
M_A_CAS#
M_A_RAS#
M_A_CLK_DDR0
M_A_CLK_DDR#0
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_ACT#
M_A_ALERT#
M_A_PAR
DDR4_DRAMRST#
ZQ_U1401
+1.2V
GND
M_A_VREFCA
12
C1412
2.2UF/10V
GND
+1.2V
20180713 follow X441 remove 51 ohm
DDR4_DRAMRST#
+2.5V
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_BA0
M_A_BA1
M_A_BG0
M_A_CLK_DDR0
M_A_CLK_DDR#0
M_A_CKE0
M_A_ODT0
M_A_CS#0
M_A_ACT#
M_A_ALERT#
M_A_PAR
ZQ_U1404
M1
P3
P7
R3
N7
N3
P8
P2
R8
R2
R7
M3
T2
M7
T8
L2
M8
L8
N2
N8
M2
K7
K8
K2
K3
L7
L3
P9
E2
E7
T3
P1
F9
N9
B1
R9
T7
U1404
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
CAS_n/A15
RAS_n/A16
BA0
BA1
BG0
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
NF/UDM_n/UDBI_n
NF/LDM_n/LDBI_n
PAR
RESET_n
ZQ
TEN
VPP1
VPP2
NC
MT40A512M16JY-083E
/onbdram
M4
A3
DQ8
B8
M_A_DQ48
DQ9
C3
M_A_DQ51
DQ10
C7
M_A_DQ52
DQ11
C2
M_A_DQ50
DQ12
C8
M_A_DQ53
DQ13
D3
M_A_DQ55
DQ14
D7
M_A_DQ49
DQ15
M_A_DQ54
B7
UDQS_t
A7
M_A_DQS6
UDQS_c
M_A_DQS#6
G2
DQ0
F7
M_A_DQ57
DQ1
H3
M_A_DQ58
DQ2
H7
M_A_DQ60
DQ3
H2
M_A_DQ63
DQ4
H8
M_A_DQ56
DQ5
J3
M_A_DQ59
DQ6
J7
M_A_DQ61
DQ7
M_A_DQ62
M_A_DQS7
M_A_DQS#7
DDP_UZQ_1404
+1.2V
M_A_BG1_R
GND
G3
LDQS_t
F3
LDQS_c
B3
VDD1
B9
VDD2
D1
VDD3
G7
VDD4
J1
VDD5
J9
VDD6
L1
VDD7
L9
VDD8
R1
VDD9
T9
VDD10
A1
VDDQ1
A9
VDDQ2
C1
VDDQ3
D9
VDDQ4
F2
VDDQ5
F8
VDDQ6
G1
VDDQ7
G9
VDDQ8
J2
VDDQ9
J8
VDDQ10
B2
VSS1
E1
VSS2
E9
VSS3
G8
VSS4
K1
VSS5
K9
VSS6
M9
VSS7
N1
VSS8
T1
VSS9
A2
VSSQ1
A8
VSSQ2
C9
VSSQ3
D2
VSSQ4
D8
VSSQ5
E3
VSSQ6
E8
VSSQ7
F1
VSSQ8
H1
VSSQ9
H9
VSSQ10
U1401
M1
VREFCA
P3
A0
P7
M_A_A0
A1
R3
M_A_A1
A2
N7
M_A_A2
A3
N3
M_A_A3
A4
P8
M_A_A4
A5
P2
M_A_A5
A6
R8
M_A_A6
A7
R2
M_A_A7
A8
R7
M_A_A8
A9
M3
M_A_A9
A10/AP
T2
M_A_A10
A11
M7
M_A_A11
A12/BC_n
T8
M_A_A12
A13
L2
WE_n/A14
M8
M_A_WE#
CAS_n/A15
L8
RAS_n/A16
N2
BA0
N8
M_A_BA0
BA1
M_A_BA1
M2
BG0
M_A_BG0
K7
CK_t
K8
CK_c
K2
CKE
K3
ODT
L7
CS_n
L3
ACT_n
P9
ALERT_n
E2
NF/UDM_n/UDBI_n
E7
NF/LDM_n/LDBI_n
T3
PAR
P1
RESET_n
F9
ZQ
N9
TEN
B1
VPP1
R9
VPP2
T7
NC
MT40A512M16JY-083E
/onbdram
M1
A3
DQ8
B8
M_A_DQ1
DQ9
C3
M_A_DQ3
DQ10
C7
M_A_DQ5
DQ11
C2
M_A_DQ6
DQ12
C8
M_A_DQ4
DQ13
D3
M_A_DQ7
DQ14
D7
M_A_DQ0
DQ15
M_A_DQ2
B7
UDQS_t
A7
M_A_DQS0
UDQS_c
M_A_DQS#0
G2
DQ0
F7
M_A_DQ8
DQ1
H3
M_A_DQ14
DQ2
H7
M_A_DQ15
DQ3
H2
M_A_DQ11
DQ4
H8
M_A_DQ12
DQ5
J3
M_A_DQ9
DQ6
J7
M_A_DQ13
DQ7
M_A_DQ10
G3
LDQS_t
F3
M_A_DQS1
LDQS_c
M_A_DQS#1
B3
VDD1
B9
VDD2
D1
VDD3
G7
VDD4
J1
VDD5
J9
VDD6
L1
VDD7
L9
VDD8
R1
VDD9
T9
VDD10
A1
VDDQ1
A9
VDDQ2
C1
VDDQ3
D9
VDDQ4
F2
VDDQ5
F8
VDDQ6
G1
VDDQ7
G9
VDDQ8
J2
VDDQ9
J8
VDDQ10
B2
VSS1
E1
VSS2
E9
VSS3
G8
DDP_UZQ_1401
VSS4
K1
VSS5
K9
VSS6
M9
VSS7
N1
M_A_BG1_R
VSS8
T1
VSS9
A2
VSSQ1
A8
VSSQ2
C9
VSSQ3
D2
VSSQ4
D8
VSSQ5
E3
VSSQ6
E8
VSSQ7
F1
VSSQ8
H1
VSSQ9
H9
VSSQ10
M_A_VREFCA
12
GND
+1.2V
+1.2V +1.2V
20180713 follow X441 remove 51 ohm
+2.5V
GND
U1402
M1
VREFCA
C1410
2.2UF/10V
P3
A0
P7
M_A_A0
A1
R3
M_A_A1
A2
N7
M_A_A2
A3
N3
M_A_A3
A4
P8
M_A_A4
A5
P2
M_A_A5
A6
R8
M_A_A6
A7
R2
M_A_A7
A8
R7
M_A_A8
A9
M3
M_A_A9
A10/AP
T2
M_A_A10
A11
M7
M_A_A11
A12/BC_n
T8
M_A_A12
A13
L2
M_A_A13
WE_n/A14
M8
M_A_WE#
CAS_n/A15
L8
M_A_CAS#
RAS_n/A16
M_A_RAS#
N2
BA0
N8
M_A_BA0
BA1
M_A_BA1
M2
BG0
M_A_BG0
K7
CK_t
K8
M_A_CLK_DDR0
CK_c
M_A_CLK_DDR#0
K2
CKE
M_A_CKE0
K3
ODT
L7
M_A_ODT0
CS_n
L3
M_A_CS#0
ACT_n
P9
M_A_ACT#
ALERT_n
M_A_ALERT#
E2
NF/UDM_n/UDBI_n
E7
NF/LDM_n/LDBI_n
T3
PAR
M_A_PAR
P1
RESET_n
DDR4_DRAMRST#
F9
ZQ
ZQ_U1402
N9
TEN
B1
VPP1
R9
VPP2
T7
NC
MT40A512M16JY-083E
/onbdram
A3
DQ8
B8
M_A_DQ17
DQ9
C3
M_A_DQ18
DQ10
C7
M_A_DQ20
DQ11
C2
M_A_DQ22
DQ12
C8
M_A_DQ16
DQ13
D3
M_A_DQ23
DQ14
D7
M_A_DQ21
DQ15
M_A_DQ19
B7
UDQS_t
A7
M_A_DQS2
UDQS_c
M_A_DQS#2
G2
DQ0
F7
M_A_DQ28
DQ1
H3
M_A_DQ31
DQ2
H7
M_A_DQ25
DQ3
H2
M_A_DQ30
DQ4
H8
M_A_DQ29
DQ5
J3
M_A_DQ27
DQ6
J7
M_A_DQ24
DQ7
M_A_DQ26
+1.2V
M_A_DQS3
M_A_DQS#3
DDP_UZQ_1402 DDP_UZQ_1403
M_A_BG1_R M_A_BG1_R
GND
M2
G3
LDQS_t
F3
LDQS_c
B3
VDD1
B9
VDD2
D1
VDD3
G7
VDD4
J1
VDD5
J9
VDD6
L1
VDD7
L9
VDD8
R1
VDD9
T9
VDD10
A1
VDDQ1
A9
VDDQ2
C1
VDDQ3
D9
VDDQ4
F2
VDDQ5
F8
VDDQ6
G1
VDDQ7
G9
VDDQ8
J2
VDDQ9
J8
VDDQ10
B2
VSS1
E1
VSS2
E9
VSS3
G8
VSS4
K1
VSS5
K9
VSS6
M9
VSS7
N1
VSS8
T1
VSS9
A2
VSSQ1
A8
VSSQ2
C9
VSSQ3
D2
VSSQ4
D8
VSSQ5
E3
VSSQ6
E8
VSSQ7
F1
VSSQ8
H1
VSSQ9
H9
VSSQ10
M_A_VREFCA
GND
20180713 follow X441 remove 51 ohm
+2.5V
U1403
M1
12
VREFCA
C1413
2.2UF/10V
P3
A0
P7
M_A_A0
A1
R3
M_A_A1
A2
N7
M_A_A2
A3
N3
M_A_A3
A4
P8
M_A_A4
A5
P2
M_A_A5
A6
R8
M_A_A6
A7
R2
M_A_A7
A8
R7
M_A_A8
A9
M3
M_A_A9
A10/AP
T2
M_A_A10
A11
M7
M_A_A11
A12/BC_n
T8
M_A_A12
A13
L2
M_A_A13
WE_n/A14
M8
M_A_WE#
CAS_n/A15
L8
M_A_CAS#
RAS_n/A16
M_A_RAS#
N2
BA0
N8
M_A_BA0
BA1
M_A_BA1
M2
BG0
M_A_BG0
K7
CK_t
K8
M_A_CLK_DDR0
CK_c
M_A_CLK_DDR#0
K2
CKE
M_A_CKE0
K3
ODT
L7
M_A_ODT0
CS_n
L3
M_A_CS#0
ACT_n
P9
M_A_ACT#
ALERT_n
M_A_ALERT#
E2
NF/UDM_n/UDBI_n
E7
NF/LDM_n/LDBI_n
T3
PAR
M_A_PAR
P1
RESET_n
DDR4_DRAMRST#
F9
ZQ
ZQ_U1403
N9
TEN
B1
VPP1
R9
VPP2
T7
NC
MT40A512M16JY-083E
/onbdram
M3
A3
DQ8
B8
M_A_DQ35
DQ9
C3
M_A_DQ33
DQ10
C7
M_A_DQ32
DQ11
C2
M_A_DQ39
DQ12
C8
M_A_DQ37
DQ13
D3
M_A_DQ34
DQ14
D7
M_A_DQ36
DQ15
M_A_DQ38
B7
UDQS_t
A7
M_A_DQS4
UDQS_c
M_A_DQS#4
G2
DQ0
F7
M_A_DQ41
DQ1
H3
M_A_DQ47
DQ2
H7
M_A_DQ43
DQ3
H2
M_A_DQ46
DQ4
H8
M_A_DQ40
DQ5
J3
M_A_DQ44
DQ6
J7
M_A_DQ45
DQ7
M_A_DQ42
G3
LDQS_t
F3
M_A_DQS5
LDQS_c
M_A_DQS#5
B3
VDD1
B9
VDD2
D1
VDD3
G7
VDD4
J1
VDD5
J9
VDD6
L1
VDD7
L9
VDD8
R1
VDD9
T9
VDD10
A1
VDDQ1
A9
VDDQ2
C1
VDDQ3
D9
VDDQ4
F2
VDDQ5
F8
VDDQ6
G1
VDDQ7
G9
VDDQ8
J2
VDDQ9
J8
VDDQ10
B2
VSS1
E1
VSS2
E9
VSS3
G8
VSS4
K1
VSS5
K9
VSS6
M9
VSS7
N1
VSS8
T1
VSS9
A2
VSSQ1
A8
VSSQ2
C9
VSSQ3
D2
VSSQ4
D8
VSSQ5
E3
VSSQ6
E8
VSSQ7
F1
VSSQ8
H1
VSSQ9
H9
VSSQ10
M_A_A[13:0]<4,13>
M_A_BA[1:0]<4,13>
M_A_BG0<4,13>
M_A_CLK_DDR#0<4,13>
M_A_CLK_DDR0<4,13>
M_A_CKE0<4,13>
M_A_CS#0<4,13>
M_A_ODT0<4,13>
M_A_RAS#<4,13>
M_A_WE#<4,13>
M_A_CAS#<4,13>
M_A_ALERT#<4,13>
M_A_PAR<4,13>
M_A_ACT#<4,13>
DDR4_DRAMRST#<4,16>
20181109 Shihhao
Remove mem test pin 1kohm PD
R1402 240Ohm 1%
ZQ_U1401
R1404 240Ohm 1%
ZQ_U1402
R1401 240Ohm 1%
ZQ_U1403
ZQ_U1404
R1403 240Ohm 1%
M_A_DQS[7:0] <4>
M_A_DQS#[7:0] <4>
M_A_DQ[63:0] <4>
12
12
12
12
+1.2V
C1444
C1445
C1443
C1442
1 2
1 2
1 2
1 2
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
@
Close U1401 Close U1402
GND
+2.5V
C1432
C1431
1 2
1 2
1UF/6.3V
1UF/6.3V
@
Close U1401
GND
GND
+1.2V
C1404
C1402
C1403
1 2
1 2
1 2
1UF/6.3V
1UF/6.3V
1UF/6.3V
@
GND
+2.5V
C1433
C1434
1 2
1 2
1UF/6.3V
1UF/6.3V
@
Close U1402 Close U1403 Close U1404
GND
Close U1403 Close U1404
C1408
C1405
1 2
1 2
1UF/6.3V
1UF/6.3V
@
+2.5V
C1435
C1436
1 2
1 2
1UF/6.3V
1UF/6.3V
GND
+VTT
C1418
C1499
1 2
1 2
1UF/6.3V
1UF/6.3V
GND
+1.2V
C1407
C1406
1 2
1 2
1UF/6.3V
1UF/6.3V
@
Close U1403 Close U1404
GND
+2.5V
C1438
C1439
1 2
1 2
1UF/6.3V
1UF/6.3V
@
GND
+VTT
C1421
C1420
1 2
1 2
1UF/6.3V
1UF/6.3V
N/A
GND
C1415
C1409
1 2
1 2
1UF/6.3V
1UF/6.3V
@
C1428
12
nbs_c0603_h37_000s
10UF/6.3V
@
+1.2V
@
GND
nbs_c0603_h37_000s
+1.2V
C1426
C1427
C1429
C1417
C1414
C1416
1 2
1 2
1 2
1UF/6.3V
1UF/6.3V
1UF/6.3V
+2.5V
C1446
C1440
12
12
nbs_c0603_h37_000s
@
10UF/6.3V
10UF/6.3V
GND
+VTT
C1423
12
nbs_c0603_h37_000s
1 2
1UF/6.3V
10UF/6.3V
GND
12
nbs_c0603_h37_000s
C1441
C1437
12
12
@
nbs_c0603_h37_000s
nbs_c0603_h37_000s
@
10UF/6.3V
10UF/6.3V
C1424
@
C1430
12
12
12
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
GND
Project Name
X409F
Title :
DDR4_SO-DIMM-A
Size
Dept.:
Engineer:
ASUSTeK
D
Date: Sheet
Friday, February 22, 2019
NB3EE2
Rev
R1.0
101
of
14
M_B_VREFCA
12
C1613
1UF/6.3V
+3VS
21
SL1604
0402
GND GND
20180713 Jacky chage 10K to SL
12
C1614
0.1UF/10V
21
SL1603
0402
21
SL1605
0402
M_B_WE#<4>
M_B_CAS#<4>
M_B_RAS#<4>
M_B_ACT#<4>
M_B_PAR<4>
M_B_ALERT#<4>
DDR4_DRAMRST#<4,14>
SMB_DATA_DIMM<5>
SMBus Slave Address:
A4H
M_B_DIMM0_SA2
M_B_DIMM0_SA1
M_B_DIMM0_SA0
Place close to SO-DIMM Socket (+VTT
J1601A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DIMM0_S2
M_B_DIMM0_S3
137
139
138
140
109
11 0
149
157
155
161
11 5
11 3
150
145
144
133
132
131
128
126
127
122
125
121
146
120
11 9
158
151
156
152
11 4
143
11 6
134
108
164
254
253
166
260
256
92
91
101
105
88
87
100
104
12
33
54
75
178
199
220
241
96
162
165
DDR4_DIMM_260P
CK0_T
CK0_C
CK1_T
CK1_C
CKE0
CKE1
S0*
S1*
ODT0
ODT1
BG0
BG1
BA0
BA1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14_WE*
A15_CAS*
A16_RAS*
ACT*
PARITY
ALERT*
EVENT*
RESET*
VREFCA
SDA
SCL
SA2
SA1
SA0
CB0_NC
CB1_NC
CB2_NC
CB3_NC
CB4_NC
CB5_NC
CB6_NC
CB7_NC
DM0*/DBI0*
DM1*/DBI1*
DM2*/DBI2*
DM3*/DBI3*
DM4*/DBI4*
DM5*/DBI5*
DM6*/DBI6*
DM7*/DBI7*
DM8*/DBI8*
S2*/C0
S3*/C1
M_B_CLK_DDR0<4>
M_B_CLK_DDR#0<4>
M_B_CLK_DDR1<4>
M_B_CLK_DDR#1<4>
M_B_CKE0<4>
M_B_CKE1<4>
M_B_CS#0<4>
M_B_CS#1<4>
M_B_ODT0<4>
M_B_ODT1<4>
M_B_BG0<4>
M_B_BG1<4>
M_B_BA0<4>
M_B_BA1<4>
M_B_A[13:0]<4>
SMB_CK_DIMM<5>
For ECC
M_B_DIMM0_SA2
M_B_DIMM0_SA1
M_B_DIMM0_SA0
+1.2V
1
T1601@
1
T1602@
DQS0_T
DQS1_T
DQS2_T
DQS3_T
DQS4_T
DQS5_T
DQS6_T
DQS7_T
DQS8_T
DQS0_C
DQS1_C
DQS2_C
DQS3_C
DQS4_C
DQS5_C
DQS6_C
DQS7_C
DQS8_C
8
DQ0
7
M_B_DQ12
DQ1
20
M_B_DQ9
DQ2
21
M_B_DQ14
DQ3
4
M_B_DQ10
DQ4
3
M_B_DQ8
DQ5
16
M_B_DQ13
DQ6
17
M_B_DQ15
DQ7
28
M_B_DQ11
DQ8
29
M_B_DQ3
DQ9
41
M_B_DQ2
DQ10
42
M_B_DQ4
DQ11
24
M_B_DQ6
DQ12
25
M_B_DQ0
DQ13
38
M_B_DQ7
DQ14
37
M_B_DQ1
DQ15
50
M_B_DQ5
DQ16
49
M_B_DQ21
DQ17
62
M_B_DQ16
DQ18
63
M_B_DQ22
DQ19
46
M_B_DQ19
DQ20
45
M_B_DQ20
DQ21
58
M_B_DQ17
DQ22
59
M_B_DQ23
DQ23
70
M_B_DQ18
DQ24
71
M_B_DQ28
DQ25
83
M_B_DQ24
DQ26
84
M_B_DQ31
DQ27
66
M_B_DQ26
DQ28
67
M_B_DQ29
DQ29
79
M_B_DQ25
DQ30
80
M_B_DQ30
DQ31
174
M_B_DQ27
DQ32
173
M_B_DQ32
DQ33
187
M_B_DQ38
DQ34
186
M_B_DQ37
DQ35
170
M_B_DQ35
DQ36
169
M_B_DQ33
DQ37
183
M_B_DQ39
DQ38
182
M_B_DQ36
DQ39
195
M_B_DQ34
DQ40
194
M_B_DQ45
DQ41
207
M_B_DQ40
DQ42
208
M_B_DQ46
DQ43
191
M_B_DQ42
DQ44
190
M_B_DQ44
DQ45
203
M_B_DQ41
DQ46
204
M_B_DQ47
DQ47
216
M_B_DQ43
DQ48
215
M_B_DQ49
DQ49
228
M_B_DQ52
DQ50
229
M_B_DQ51
DQ51
211
M_B_DQ55
DQ52
212
M_B_DQ53
DQ53
224
M_B_DQ48
DQ54
225
M_B_DQ54
DQ55
237
M_B_DQ50
DQ56
236
M_B_DQ57
DQ57
249
M_B_DQ60
DQ58
250
M_B_DQ58
DQ59
232
M_B_DQ62
DQ60
233
M_B_DQ61
DQ61
245
M_B_DQ56
DQ62
246
M_B_DQ59
DQ63
M_B_DQ63
13
34
M_B_DQS1
55
M_B_DQS0
76
M_B_DQS2
179
M_B_DQS3
200
M_B_DQS4
221
M_B_DQS5
242
M_B_DQS6
97
M_B_DQS7
11
32
M_B_DQS#1
53
M_B_DQS#0
74
M_B_DQS#2
177
M_B_DQS#3
198
M_B_DQS#4
219
M_B_DQS#5
240
M_B_DQS#6
95
M_B_DQS#7
M_B_DQ[63:0] <4>
1
0
2
3
4
5
6
7
M_B_DQS[7:0] <4>
M_B_DQS#[7:0] <4>
+1.2V
12
12
12
Place close to SO-DIMM Socket (+VDD
Pin)
12
12
C1602
C1601
10UF/6.3V
10UF/6.3V
@
12
C1607
C1606
1UF/6.3V
10UF/6.3V
@
12
C1630
C1631
10UF/6.3V
10UF/6.3V
@
20181217 Shihhao
Change C1607, C1609 package size to 0402(EMS bug)
12
C1603
10UF/6.3V
@
12
12
C1608
1UF/6.3V
12
12
C1632
1UF/6.3V
@
C1604
10UF/6.3V
C1609
1UF/6.3V
C1633
1UF/6.3V
12
C1605
10UF/6.3V
@
@
12
C1610
1UF/6.3V
12
C1634
1UF/6.3V
@
J1601B
163
VDD19
160
VDD18
159
VDD17
154
VDD16
153
VDD15
148
VDD14
147
VDD13
142
VDD12
141
VDD11
136
VDD10
135
VDD9
130
VDD8
129
VDD7
124
VDD6
123
VDD5
11 8
VDD4
11 7
VDD3
11 2
VDD2
11 1
VDD1
251
VSS1
247
VSS2
243
VSS3
239
VSS4
235
VSS5
231
VSS6
227
VSS7
223
VSS8
217
VSS9
213
VSS10
209
VSS11
205
VSS12
201
VSS13
197
VSS14
193
VSS15
189
VSS16
185
VSS17
181
VSS18
175
VSS19
171
VSS20
167
VSS21
107
VSS22
103
VSS23
99
VSS24
93
VSS25
89
VSS26
85
VSS27
81
VSS28
77
VSS29
73
VSS30
69
VSS31
65
VSS32
61
VSS33
57
VSS34
51
VSS35
47
VSS36
43
VSS37
39
VSS38
35
VSS39
31
VSS40
27
VSS41
23
VSS42
19
VSS43
15
VSS44
9
VSS45
5
VSS46
1
VSS47
DDR4_DIMM_260P
GND
VDDSPD
NP_NC1
NP_NC2
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
258
VTT
259
VPP2
257
VPP1
255
263
264
261
MT1
262
MT2
252
248
244
238
234
230
226
222
218
214
210
206
202
196
192
188
184
180
176
172
168
106
102
98
94
90
86
82
78
72
68
64
60
56
52
48
44
40
36
30
26
22
18
14
10
6
2
Pin)
+2.5V
12
1
C1612
0.1UF/10V
2
+2.5V
12
C1625
10UF/6.3V
@
Place close to SO-DIMM Socket (+VPP
Pin)
C1618
10UF/6.3V
@
+VTT
12
1
2
+3VS
1
C1611
2.2UF/6.3V
@
2
1
2
C1619
0.1UF/10V
C1626
10UF/6.3V
@
C1620
1UF/6.3V
12
12
C1627
C1628
1UF/6.3V
1UF/6.3V
GND
GNDGND GND
Close to memory down
Close to SO-DIMM B
+1.2V
R1904
2.7 change to 2.2
SA_DIMM_VREFCA<4>
12
C1903
0.022UF/16V
+V_VREF_CA_RC
12
R1901
24.9Ohm
1%
R1902
1 2
2.7Ohm
1.8KOHM
1%
1 2
R1903
1.8KOHM
1%
1 2
Close to Memory Down
GND
M_A_VREFCA
SB_DIMM_VREFCA<4>
1 2
1
C1902
0.022UF/25V
2
1
R1908
24.9Ohm
1%
2
GND
+1.2V
R1905
1KOhm
1%
1 2
R1907
2Ohm
1%
R1906
1KOhm
1%
1 2
GND
Title :
DDR4_CA_DQ_VREF
Size
Dept.:
Custom
Date: Sheet
Friday, February 22, 2019
ASUSTeK
Project Name
X409F
M_B_VREFCA
Engineer:
NB3EE2
19
Rev
R1.0
101
of
+3VSUS
CNVi WiFi
Bus
1 2
R2030 10KOhm@
1 2
R2031 10KOhm@
For UART
Debug
CNV_WR_CLKN_PCH<54>
CNV_WR_CLKP_PCH<54>
CNV_WT_CLKN_PCH<54>
CNV_WT_CLKP_PCH<54>
CNV_WR_D0N_PCH<54>
CNV_WR_D0P_PCH<54>
CNV_WR_D1N_PCH<54>
CNV_WR_D1P_PCH<54>
CNV_WT_D0N_PCH<54>
CNV_WT_D0P_PCH<54>
CNV_WT_D1N_PCH<54>
CNV_WT_D1P_PCH<54>
UART0_RXD
UART0_TXD
CNV_WR_D0N_PCH
CNV_WR_D0P_PCH
CNV_WR_D1N_PCH
CNV_WR_D1P_PCH
CNV_WT_D0N_PCH
CNV_WT_D0P_PCH
CNV_WT_D1N_PCH
CNV_WT_D1P_PCH
CNV_WR_CLKN_PCH
CNV_WR_CLKP_PCH
CNV_WT_CLKN_PCH
CNV_WT_CLKP_PCH
1 2
R2001 150Ohm1% /CNVi
GND
T2001@
T2002@
T2005@
1
SL2001 @
1
SL2002 @
1
2 1
0402
2 1
0402
CNV_PA_BLANKING
UART0_RXD
UART0_TXD
U0301I
CR30
CNV_WR_D0N
CP30
CNV_WR_D0P
CM30
CNV_WR_D1N
CN30
CNV_WR_D1P
CN32
CNV_WT_D0N
CM32
CNV_WT_D0P
CP33
CNV_WT_D1N
CN33
CNV_WT_D1P
CN31
CNV_WR_CLKN
CP31
CNV_WR_CLKP
CP34
CNV_WT_CLKN
CN34
CNV_WT_CLKP
CP32
CNV_WT_RCOMP_0
CR32
CNV_WT_RCOMP_1
CP20
GPP_F0/CNV_PA_BLANKING
CK19
GPP_F1
CG17
GPP_F2
CR14
GPP_C8/UART0_RXD
CP14
GPP_C9/UART0_TXD
CN14
GPP_C10/UART0_RTS#
CM14
GPP_C11/UART0_CTS#
CJ17
GPP_F8/CNV_MFUART2_RXD
CH17
GPP_F9/CNV_MFUART2_TXD
CF17
GPP_F23/A4WP_PRESENT
BGA1528P
GPP_H18/CPU_C10_GATE#
GPP_H19/TIMESYNC[0]
GPP_H21/XTAL_FREQ_SELECT
GPP_H22
GPP_H23
GPP_F10
GPP_D4/IMGCLKOUT0/BK4/SBK4
GPP_F3
GPP_H20/IMGCLKOUT1
GPP_F12/EMMC_DATA0
GPP_F13/EMMC_DATA1
GPP_F14/EMMC_DATA2
GPP_F15/EMMC_DATA3
GPP_F16/EMMC_DATA4
GPP_F17/EMMC_DATA5
GPP_F18/EMMC_DATA6
GPP_F19/EMMC_DATA7
GPP_F20/EMMC_RCLK
GPP_F21/EMMC_CLK
GPP_F11/EMMC_CMD
GPP_F22/EMMC_RESET#
EMMC_RCOMP
CN27
CPU_C10_GATE#
CM27
TIME_SYNC_0
CF25
CN26
GPP_H21
CM26
CK17
GPP_H23
BV35
GPD7
CN20
CG25
CH25
CR20
CM20
CN19
CM19
CN18
CR18
CP18
CM18
CM16
CP16
CR16
CN16
CK15
GPD7
R2088
200Ohm 1%
1 2
EMMC_RCOMP
20181101 Shihhao
Merge SD, EMMC RCOMP
20181227
add R2088 (EMMC RCOMP trace length out of spec)
CPU_C10_GATE# <30>
1
T2003 @
XTAL Frequency
Select
+3VSUS
R2010 4.7KOhm 1%
GPP_H21
R2011 20KOhm @1%
GPP_H21: weak internal pull
down
PU
24MHz XTAL frequency selected (Need PU)
38.4 XTAL frequency selected.
PD
(Default)
eSPI Flash Sharing
Mode
GPP_H23
GND
GPP_H23: weak internal pull
down
PU
Slave Attached Flash Sharing (SAFS)
enabled
Master Attached Flash Sharing (MAFS) enabled
PD
(Default)
1 2
12
R20032.2kOHM @
12
R200510KOhm @
12
GND
+3VSUS
GND
0402
1 2
21
SUSB_EC#<30,57,88>
PM_SUSB#<25,30,58,88>
20181018 Shihhao
Reserve SUSB_EC# & PM_SUSB# for VCCIO_Gate sequence
SL2005
+3VSUS
U2001
6
1
VCC
B
5
CPU_C10_GATE#
R20800Ohm @
2
NC
A
3
GND4Y
74LVC1G08GM
GND
1 2
R20320Ohm @
GND
VCCIO_Gate <88>
R2033
100KOhm
1 2
@
GPD7
GPD7: XTAL INPUT MODE (HVM
ONLY)
PU
PD
XTAL is
Attached
XTAL Input is Single
Ended
GPD7
1 2
+3VA_DSW
12
R2004100KOhm
@
R200620KOhm
GND
+1.8VSUS
FollowCRB, To Aviod RSPSignals
FromFloating
InCase InternalPU NOTEnabled
R211620KOhm
12
R211520KOhm
12
I2C1_SCL_TCH_PAD
I2C1_SDA_TCH_PAD
PCB ID0
GPP_D9
PCB_ID0
CNV_BRI_RSP_PCH
CNV_RGI_RSP_PCH
RN2101A
2.2KOHM
+3VS
34
12
RN2101B
2.2KOHM
+3VS
1 2
1 2
20180614 change DGPU_FB_CLAMP_GPIO to GC_FB_EN
CNViBT Traffic&
ControlData
I2C1_SCL_TCH_PAD <31>
I2C1_SDA_TCH_PAD <31>
20181115 Shihhao
Change GPP_D10 for AMIC/DMIC strap
ID1
PCB
GPP_D10
AMIC_ID
GPP_D10
high=DMIC
low= AMIC
R2111
10KOhm
@
R2112
10KOhm
@
PCB_ID1
Main Board
15ohmfor
3.3VPower
0ohm for
1.8VPower
1 2
+3VSUS
CNV_BRI_RSP_PCH
CNV_RGI_DT_PCH
CNV_BRI_DT_PCH
CNV_RGI_RSP_PCH
I2C2_SDA_PCH
I2C2_SCL_PCH
R2126 33Ohm
R2127 33Ohm /CNVi
I2C0Reserved for
To u c h Panel
12
RN2102A
2.2KOHM
@
R2105 15Ohm
2 1
SL2101
0402
1 2
R2101 15Ohm
1 2
R2102 15Ohm
1 2
R2103 15Ohm
@
R2110 2.2kOHM
1 2
1 2
1 2
Default=
75ohm
+3VS
34
RN2102B
2.2KOHM
@
R2113 0Ohm
R2114 0Ohm
GSPI0_CS#<31>
PCI_INTA_eSPI#<30,44>
GSPI0_CLK_FP<31>
GSPI0_MISO_FP<31>
GSPI0_MOSI_FP<31>
BT_ON_GATE<54>
GPU_EVENT#<76>
GC6_FB_EN<30,76,77>
CNV_BRI_RSP_PCH<54>
CNV_RGI_DT_PCH<54>
CNV_BRI_DT_PCH<54>
CNV_RGI_RSP_PCH<54>
DGPU_PWROK<24,77>
GPU_RST#<70>
DGPU_PWR_EN#<77>
WLAN_ON_GATE<54>
+3VS
R2120
10KOhm
@/DMIC
1 2
R2121
10KOhm
/AMIC
1 2
PIRQA#
GSPI0_CLK
GSPI0_MISO
GSPI0_MOSI
PME#
PCH_GPPB22
/CNVi
CNV_RGI_DT
CNV_BRI_DT
I2C1_SDA_TCH_PAD
I2C1_SCL_TCH_PAD
I2C2_SDA_PCH
I2C2_SCL_PCH
@
1 2
1 2
@
CC27
GPP_B15/GSPI0_CS0#
CC32
GPP_A7/PIRQA#/GSPI0_CS1#
CE28
GPP_B16/GSPI0_CLK
CE27
GPP_B17/GSPI0_MISO
CE29
GPP_B18/GSPI0_MOSI
CA31
GPP_B19/GSPI1_CS0#
CA32
GPP_A11/PME#/GSPI1_CS1#/
CC29
GPP_B20/GSPI1_CLK
CC30
GPP_B21/GSPI1_MISO
CA30
GPP_B22/GSPI1_MOSI
CK20
GPP_F5/CNV_BRI_RSP
CG19
GPP_F6/CNV_RGI_DT
CJ20
GPP_F4/CNV_BRI_DT
CH19
GPP_F7/CNV_RGI_RSP
CR12
GPP_C20/UART2_RXD
CP12
GPP_C21/UART2_TXD
CN12
GPP_C22/UART2_RTS#
CM12
GPP_C23/UART2_CTS#
CM11
GPP_C16/I2C0_SDA
CN11
GPP_C17/I2C0_SCL
CK12
GPP_C18/I2C1_SDA
CJ12
GPP_C19/I2C1_SCL
CF27
GPP_H4/I2C2_SDA
CF29
GPP_H5/I2C2_SCL
CH27
GPP_H6/I2C3_SDA
CH28
GPP_H7/I2C3_SCL
CJ30
GPP_H8/I2C4_SDA
CJ31
GPP_H9/I2C4_SCL
BGA1528P
U0301F
I2C2_SDA_KEY_BOARD <30>
I2C2_SCL_KEY_BOARD <30>
SD_VDD2_PWR_EN#
GPP_A12/ISH_GP6
GPP_D15
GPP_D16
GPP_C14
GPP_C15
GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D11/ISH_SPI_MISO/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_H10/I2C5_SDA/ISH_I2C2_SDA
GPP_H11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD
GPP_D14/ISH_UART0_TXD
/ISH_UART0_RTS#/GSPI2_CS1#
/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
/UART1_RTS#/ISH_UART1_RTS#
/UART1_CTS#/ISH_UART1_CTS#
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
/BM_BUSY#/SX_EXIT_HOLDOFF#
CN22
CR22
PCB_ID0
CM22
PCB_ID1
CP22
CK22
R2166 0Ohm@
CH20
CH22
CJ22
CJ27
CJ29
CM24
CN23
CM23
CR24
CG12
CH12
DIMM_SEL0
CF12
DIMM_SEL1
CG14
DIMM_SEL2
BW35
BW34
CA37
CA36
CA35
CA34
BW37
Onboard Memory PCB-ID:
GPC_12 => DIMM_SEL0
GPC_13 => DIMM_SEL1
GPC_14 => DIMM_SEL2
03012-00020500
MICRON/MT40A512M16LY-075:E
03012-00020700
SAMSUNG/K4A8G165WC-BCTD
03012-00040200
MICRON/MT40A1G16KNR-075:E
03012-00040500
HYNIX/H5ANAG6NCMR-VKC
@/PCBID
R2188 0Ohm
12
R2160 10KOhm
R2162 10KOhm
R2164 10KOhm
12
20180724 Jacky follow X412UB
TP_Disable#_R <31>
nbs_r0201_h10_000s
1 2
1 2
1 2
DDR4 Table
PCB_ID0_C <45>
TOUCHPAD_INTR# <31>
HID_KB_INT# <30>
FP_INTR# <31>
AS_FP_RST# <31>
R2161 10KOhm
/onbdram
DIMM_SEL0
R2163 10KOhm
DIMM_SEL1
/onbdram
R2165 10KOhm
/onbdram
DIMM_SEL2
CHA
MICRON 4GB(SDP)
CHA
SAMSUNG 4GB(SDP)
MICRON 8GB(DDP)
CHA
CHA HYNIX 8GB(DDP)
Needto Check?CRB 20KPU forJTAG
ODTDisable
GPP_D12GPP_D12
TOUCHPAD_INTR#
HID_KB_INT#
FP_INTR#
AS_FP_RST#
PCI_INTA_eSPI#
DGPU_PWR_EN#
GPU_RST#
nbs_r0201_h10_000s
1 2
/onbdram
1 2
/onbdram
1 2
/onbdram
DIMM_SEL#
0 1 2
0 0 0
1
1
1 1
1
R2154 10KOhm
R2156 10KOhm
R2155 10KOhm@/FP
R2122 10KOhm@/FP
R2104 10KOhm
R2157 10KOhm@/VGA
R2117 10KOhm@/VGA
R2118 10KOhm
Key Part List
1
00
00
1
00
00
0
11
0
11
R2129 100KOhm
1 2
1 2
@/HID_KEYBOARD
1 2
1 2
1 2
1 2
1 2
1 2
@/VGA
+3VSUS
+3VSUS
1 2
+3VS
+3VSUS
+3VS
Boot BIOS
Strap Bit
+3VS +3VS
12
R2108
2.2kOHM
@
PCH_GPPB22 GSPI0_MOSI
GPP_B22: weal internal pull down
PU LPC
PD SPI (Default)
GPP_F6
PU
PD
M.2 CNVi
Mode Select
CNV_RGI_DT_PCH
IntegratedCNVi disable(forM.2
CNViCard)
Integrated
CNVienable
PUin M.2
Side
@R5401
R2106
75KOhm
@
1 2
NOTE:Enable NoReboot
PCHwill disablethe TCOTimersystem
rebootfeature
Thisfunction isuseful whenrunning
ITP/XDP
GPP_B18: weak internal pull down
PU Enable
PD Disable (Default)
No Reboot
12
R2109
2.2kOHM
@
ProjectName
Title :
CPU_PCH_GSPI,I2C,CNVi_2
Size
Dept.:
ASUSTeK
D
Date: Sheet
Friday,February 22,2019
Engineer:
NB3EE2
Rev
R1.0X409F
101
of
21
HD
Audio
HDA_BCLK_SSP0_SCLK<36>
HDA_SYNC_SSP0_SFRM<36>
HDA_RST#_SSP_MCLK<37,38>
HDA_SDO_SSP0_TXD<36>
HDA_BCLK_SSP0_SCLK
GND
Place RN2201 near
PCH
1 2
1 2
1 2
1 2
RF
requirement
/CNVi
/CNVi
R221133Ohm
HDA_BCLK_SSP0_SCLK_R
R221233Ohm
HDA_SYNC_SSP0_SFRM_R
R221333Ohm
HDA_RST#_SSP_MCLK_R
R221433Ohm
HDA_SDO_SSP0_TXD_R
@
C2201 10PF/50V
1 2
12
R220775KOhm
M.2_BT_PCMFRM_CRF_RST_N
12
R220475KOhm
M.2_BT_PCMOUT_CLKREQ0
ACZ_SDOUT:(1) PCH: Internal PD 20k
ohm, VIL=0.35V, VIH=0.65~3.3V (2)
ALC269:VIL<0.35*3.3V, VIH>0.65*3.3V
ACZ_SDOUT is a signal used for Flash
Descriptor security Override/ME debug mode
HIGH : get overrideen, LOW : disable override
U0301G
BN34
HDA_SYNC/I2S0_SFRM
HDA_SYNC_SSP0_SFRM_R
HDA_BCLK_SSP0_SCLK_R
HDA_SDI0_SSP0_RXD<36>
CNVi RST & CLKREQ
BT Audio(I2S) Bus
GND
PCH DMIC for
ISST
M.2_BT_PCMFRM_CRF_RST_N<54>
M.2_BT_PCMOUT_CLKREQ0<54>
HDA_SDO_SSP0_TXD_R
HDA_SDI0_SSP0_RXD
HDA_RST#_SSP_MCLK_R
DMIC_CLK_PCH<45>
DMIC_DAT_PCH<45>
PCH_GPPB14
BN37
HDA_BCLK/I2S0_SCLK
BN36
HDA_SDO/I2S0_TXD
BN35
HDA_SDI0/I2S0_RXD
BL36
HDA_SDI1/I2S1_RXD/SNDW1_DATA
BL35
HDA_RST#/I2S1_SCLK/SNDW1_CLK
CK23
GPP_D23/I2S_MCLK
BL37
I2S1_SFRM/SNDW2_CLK
BL34
I2S1_TXD/SNDW2_DATA
CJ32
GPP_H1/I2S2_SFRM/
CH32
GPP_H0/I2S2_SCLK/
CH29
GPP_H2/I2S2_TXD/
CH30
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO
CP24
GPP_D19/DMIC_CLK0/SNDW4_CLK
CN24
GPP_D20/DMIC_DATA0/SNDW4_DATA
CK25
GPP_D17/DMIC_CLK1/SNDW3_CLK
CJ25
GPP_D18/DMIC_DATA1/SNDW3_DATA
CF35
GPP_B14/SPKR
BGA1528P
CNV_BT_I2S_BCLK/CNV_RF_RESET#
CNV_BT_I2S_SCLK
CNV_BT_I2S_SDI/MODEM_CLKREQ
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
SD_1P8_RCOMP
SD_3P3_RCOMP
CH36
CL35
CL36
CM35
CN35
CH35
CK36
CK34
BW36
BY31
CK33
CM34
20181101 Shihhao
Merge SD, EMMC RCOMP
SD_RCOMP
R2205
200Ohm
1 2
1%
GND
UX303 0809
+3VSUS
+1.8VSUS
12
12
R2202
R2201
3.3KOHM
@
1KOhm
HDA_SDO_SSP0_TXD
20160113 X541UV modify net
R2203
330Ohm
1 2
Q2201_D
32
D
Q2201
2N7002K
PCH_SPI_OV<30>
1
G
S
GND
Top Swap Override
+3VS
12
R2210 2.2kOHM@
PCH_GPPB14: weak internal pull down
PU Enable
PD Disable (default)
PCH_GPPB14
Project Name
X409F
Rev
PCIENB_RXN[3:0]<70>
PCIENB_RXP[3:0]<70>
PCIEG_RXN[3:0]<70>
PCIEG_RXP[3:0]<70>
SATA_SSD_RXN<53>
SATA_SSD_RXP<53>
SATA_SSD_TXN<53>
SATA_SSD_TXP<53>
PCIE RCOMP 100 OHM
1%
CX2301 220NF/6.3V
PCIEG_RXN0
CX2302 220NF/6.3V
CX2303 220NF/6.3V
CX2304 220NF/6.3V
PCIEG_RXN1
PCIEG_RXP1 PCIENB_TXP1
CX2305 220NF/6.3V
PCIEG_RXN2
CX2306 220NF/6.3V
CX2307 220NF/6.3V
CX2308 220NF/6.3V
PCIEG_RXN3 PCIENB_TXN3
PCIEG_RXP3
PCIE_RXN_WLAN<54>
PCIE_RXP_WLAN<54>
PCIE_TXN_WLAN<54>
PCIE_TXP_WLAN<54>
SATA_RXN0<39>
SATA_RXP0<39>
SATA_TXN0<39>
SATA_TXP0<39>
PCIE_SSD_RXN3<53>
PCIE_SSD_RXP3<53>
PCIE_SSD_TXN3<53>
PCIE_SSD_TXP3<53>
PCIE_SSD_RXN2<53>
PCIE_SSD_RXP2<53>
PCIE_SSD_TXN2<53>
PCIE_SSD_TXP2<53>
PCIE_SSD_RXN1<53>
PCIE_SSD_RXP1<53>
PCIE_SSD_TXN1<53>
PCIE_SSD_TXP1<53>
R2394 0Ohm /Pre_U
R2395 0Ohm /Pre_U
SATA_SSD_RXN
SATA_SSD_RXP
R2396 0Ohm /Pre_U
R2397 0Ohm /Pre_U
SATA_SSD_TXN
SATA_SSD_TXP
R2316
100Ohm
1%
1 2
R2390 0Ohm @/Base_U
SATA_SSD_RXN
R2391 0Ohm @/Base_U
R2392 0Ohm @/Base_U
SATA_SSD_RXP
SATA_SSD_TXN
R2393 0Ohm @/Base_U
SATA_SSD_TXP
20180918 Shihhao
Colay PCIE port12 for SATA SSD ( Mainstream U )
PCIe Mapping
Table
PCIe Controller
1#
PCIe Controller
2#
PCIe Controller
3#
PCIe Controller
4#
Note: GPU PCIe x4 is in PCIe
Controller 2#!
/VGA
PCIENB_RXN0
12
PCIENB_RXP0
12
PCIENB_TXN0
PCIENB_TXP0PCIEG_RXP0
/VGA
PCIENB_RXN1
/VGA
12
PCIENB_RXP1
12
PCIENB_TXN1
/VGA
PCIENB_RXN2
/VGA
12
PCIENB_RXP2
12
PCIENB_TXN2
PCIENB_TXP2PCIEG_RXP2
/VGA
/VGA
PCIENB_RXN3
12
PCIENB_RXP3
12
PCIENB_TXP3
/VGA
BN10
SATA_SSD_RXN_1A
SATA_SSD_RXP_1A
SATA_SSD_TXN_1A
SATA_SSD_TXP_1A
12
12
SATA_SSD_RXN_2
12
SATA_SSD_RXP_2
12
SATA_SSD_TXN_2
SATA_SSD_TXP_2
PCIE_RCOMPN
PCIE_RCOMPP
12
12
12
12
SATA_SSD_RXN_1A
SATA_SSD_RXP_1A
SATA_SSD_TXN_1A
SATA_SSD_TXP_1A
CR28
CP28
CN28
CM28
U0301H
BW9
PCIE5_RXN/USB31_5_RXN
BW8
PCIE5_RXP/USB31_5_RXP
BW4
PCIE5_TXN/USB31_5_TXN
BW3
PCIE5_TXP/USB31_5_TXP
BU6
PCIE6_RXN/USB31_6_RXN
BU5
PCIE6_RXP/USB31_6_RXP
BU4
PCIE6_TXN/USB31_6_TXN
BU3
PCIE6_TXP/USB31_6_TXP
BT7
PCIE7_RXN
BT6
PCIE7_RXP
BU2
PCIE7_TXN
BU1
PCIE7_TXP
BU9
PCIE8_RXN
BU8
PCIE8_RXP
BT4
PCIE8_TXN
BT3
PCIE8_TXP
BP5
PCIE9_RXN
BP6
PCIE9_RXP
BR2
PCIE9_TXN
BR1
PCIE9_TXP
BN6
PCIE10_RXN
BN5
PCIE10_RXP
BR4
PCIE10_TXN
BR3
PCIE10_TXP
PCIE11_RXN/SATA0_RXN
BN8
PCIE11_RXP/SATA0_RXP
BN4
PCIE11_TXN/SATA0_TXN
BN3
PCIE11_TXP/SATA0_TXP
BL6
PCIE12_RXN/SATA1A_RXN
BL5
PCIE12_RXP/SATA1A_RXP
BN2
PCIE12_TXN/SATA1A_TXN
BN1
PCIE12_TXP/SATA1A_TXP
BK6
PCIE13_RXN
BK5
PCIE13_RXP
BM4
PCIE13_TXN
BM3
PCIE13_TXP
BJ6
PCIE14_RXN
BJ5
PCIE14_RXP
BL2
PCIE14_TXN
BL1
PCIE14_TXP
BG5
PCIE15_RXN/SATA1B_RXN
BG6
PCIE15_RXP/SATA1B_RXP
BL4
PCIE15_TXN/SATA1B_TXN
BL3
PCIE15_TXP/SATA1B_TXP
BE5
PCIE16_RXN/SATA2_RXN
BE6
PCIE16_RXP/SATA2_RXP
BJ4
PCIE16_TXN/SATA2_TXN
BJ3
PCIE16_TXP/SATA2_TXP
CE6
PCIE_RCOMP_N
CE5
PCIE_RCOMP_P
GPP_H12/M2_SKT2_CFG0
GPP_H13/M2_SKT2_CFG1
GPP_H14/M2_SKT2_CFG2
GPP_H15/M2_SKT2_CFG3
BGA1528P
USB3.1 PORT
1
TYPE-A
2
USB3.1 PORT
3
TYPE-C
USB3.1 PORT
4
TYPE-C
GPU
5
X4_Lane0
GPU
6
X4_Lane1
GPU
7
X4_Lane2
GPU
8
X4_Lane3
9
WLAN
10
X1
SATA0_HDD
11
SATA_M.2_SSD(Reserved)
12
PCIE&SATA_M.2_SSD_Lane3
13
PCIE&SATA_M.2_SSD_Lane2
14
PCIE&SATA_M.2_SSD_Lane1
15
PCIE&SATA_M.2_SSD_Lane0
16
PCIE2_RXN
PCIE2_RXP
PCIE2_TXN
PCIE2_TXP
PCIE1_RXN/USB31_1_RXN
PCIE1_RXP/USB31_1_RXP
PCIE1_TXN/USB31_1_TXN
PCIE1_TXP/USB31_1_TXP
/USB31_2_RXN/SSIC_1_RXN
/USB31_2_RXP/SSIC_1_RXP
/USB31_2_TXN/SSIC_1_TXN
/USB31_2_TXP/SSIC_1_TXP
PCIE3_RXN/USB31_3_RXN
PCIE3_RXP/USB31_3_RXP
PCIE3_TXN/USB31_3_TXN
PCIE3_TXP/USB31_3_TXP
PCIE4_RXN/USB31_4_RXN
PCIE4_RXP/USB31_4_RXP
PCIE4_TXN/USB31_4_TXN
PCIE4_TXP/USB31_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB_VBUSSENSE
GPP_E9/USB2_OC0#/GP_BSSB_CLK
GPP_E10/USB2_OC1#/GP_BSSB_DI
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#/SPI1_CS1#
CB5
CB6
CA4
CA3
BY8
BY9
CA2
CA1
BY7
BY6
BY4
BY3
BW6
BW5
BW2
BW1
CE3
CE4
CE1
CE2
CG3
CG4
CD3
CD4
CG5
CG6
CC1
CC2
CG8
CG9
CB8
CB9
CH5
CH6
CC3
CC4
CC5
CE8
USB_ID
CC6
CK6
CK5
CK8
CK9
CP8
CR8
CM8
CN8
CM10
CP10
CN7
AR3
RSVD3
USB2.0 & USB3.1 Mapping
Table
USB
2.0
1
USB3.0 Port type-A
2
IO USB2.0 Port
3
USB3.0 Port type-C
4
5
Camera
6
IO USB2.0 Port
7
N/A
8
N/A
N/A
9
BT
10
USB_PN1 <52>
USB_PP1 <52>
USB_PN2 <40>
USB_PP2 <40>
USB_PN3 <55>
USB_PP3 <55>
USB_PN4 <40>
USB_PP4 <40>
USB_PN5 <45>
USB_PP5 <45>
USB_PN6 <40>
USB_PP6 <40>
20180911 Shihhao
Change BT usb port8 to port10 for mainstream CPU
USB_PN10 <54>
USB_PP10 <54>
1 2
R2315 113Ohm 1%
USB2_COMP
R2322 1KOhm
USB2_VBUSSENSE
USB_OC_1_2#
USB_OC_3_4#
USB_OC_5_6#
USB_OC_7_8#
SATA_ODD_PRSNT_R#
3 4
10KOhm
5 6
10KOhm
7 8
10KOhm
1 2
10KOhm
USB3_1
USB3_2
USB3_3
USB3_4Card Reader
U3_1_RXDN1 <52>
U3_1_RXDP1 <52>
U3_1_TXDN1 <52>
U3_1_TXDP1 <52>
U3_2_RXDN3 <55>
U3_2_RXDP3 <55>
U3_2_TXDN3 <55>
U3_2_TXDP3 <55>
U3_2_RXDN4 <55>
U3_2_RXDP4 <55>
U3_2_TXDN4 <55>
U3_2_TXDP4 <55>
USB3.0 Port
type-A
IO USB2.0
Port
USB3.0 Port
type-C
Cardreader
Camera
IO USB2.0
20181012 Shihhao
Port
Add USB port6 for USB2.0
Bluetooth
12
RN2301B
RN2301C
RN2301D
RN2301A
SATA_SSD_DEVSLP <53>
MSATA_MPCIE_DET# <53>
WHL-U :
High =>
PCIE
Low =>
SATA
USB
3.1
USB 3.1 GEN-1 type-A (SW Charger+)
USB 3.1 GEN-1 type-C
USB 3.1 GEN-1 type-C
USB3.1 GEN-1
TYPE-A
USB3.1 GEN-1
TYPE-C
USB3.1 GEN-1
TYPE-C
+3VSUS
+3VS
R2355 10KOhm
MSATA_MPCIE_DET#
Tommy 2016/4/20 Unmount SATA_ODD_PRSNT_R# and DIRECT_ESATA_DETECT_R# PD/PU resistor.
Change the PU voltage to +3VSUS,
2016/6/22 Remove det
PU, page 51 have pull
high resistor.
1 2
+3VSUS
R2302
10KOhm
@
1 2
DIRECT_ESATA_DETECT_R# SATA_ODD_PRSNT_R#DIRECT_ESATA_DETECT_R#
R2306
10KOhm
@
1 2
GND
Title :
CPU_PCH_PCIE,USB,SATA
Size
Dept.:
ASUSTeK
C
Date: Sheet
Friday, February 22, 2019
+3VSUS
2
1
2
1
GND
Project Name
X409F
R2303
10KOhm
R2305
10KOhm
@
@
Engineer:
NB3EE2
23
Rev
R1.0
101
of
+3VS
+3VA_RTC
Check PCIE Device
CLK_REQ
5 6
10KOhm
7 8
10KOhm
1 2
10KOhm
3 4
10KOhm
R2421 20KOhm 1%
nbs_r0402_h16_000s
R2420 20KOhm 1%
nbs_r0402_h16_000s
To NV GPU
To PCIE
M.2 SSD
To
WLAN
RN2401C
RN2401D
RN2401A
RN2401B
U0301J
AW2
CLKOUT_PCIE_N0
AY3
CLKOUT_PCIE_P0
CF32
GPP_B5/SRCCLKREQ0#
CLK_PCIE_PEG#_PCH<70>
CLK_PCIE_PEG_PCH<70>
CLK_PCIE_NGFF_SSD#<53>
CLK_PCIE_NGFF_SSD<53>
CLK_PCIE_WLAN#<54>
CLK_PCIE_WLAN<54>
CLK_REQ_SSD#<53>
CLK_REQ_WLAN#<54>
CLK_PEG_REQ#
BC1
CLKOUT_PCIE_N1
BC2
CLKOUT_PCIE_P1
CE32
GPP_B6/SRCCLKREQ1#
BD3
CLKOUT_PCIE_N2
BC3
CLKOUT_PCIE_P2
CF30
GPP_B7/SRCCLKREQ2#
BH3
CLKOUT_PCIE_N3
BH4
CLKOUT_PCIE_P3
CE31
GPP_B8/SRCCLKREQ3#
BA1
CLKOUT_PCIE_N4
BA2
CLKOUT_PCIE_P[4]
CE30
GPP_B9/SRCCLKREQ4#
BE1
CLKOUT_PCIE_N5
BE2
CLKOUT_PCIE_P5
CF31
GPP_B10/SRCCLKREQ5#
BGA1528P
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL_IN
XTAL_OUT
XCLK_BIASREF
CLKIN_XTAL
SRTCRST#
RTCRST#
AU1
AU2
BT32
SUS_CLK
CK3
CK2
XTAL24_IN
XTAL24_OUT
CJ1
CM3
CLK_BIASREF
CLKIN_XTAL
BN31
RTCX1
BN32
RTC_X1
RTCX2
RTC_X2
BR37
BR34
SRTC_RST#
RTC_RST#
12
R2407 0Ohm @
1 2
R2403 60.4Ohm 1%
12
R2405
10KOhm
/CNVi
GND GND
SUS_CLK_CON <54>
GND
20180828 Jacky Change to SL2404
2 1
SL2404
0402
12
C2401
2.2PF/50V
@
1
2
GND
D2401
AZ5325-01F
@
CLKIN_XTAL_PCH <54>
20180821 Jacky follow X705FD
C2408
XTAL24_IN
20180614 Jacky follow UX530
CLK_REQ_SSD#
CLK_PEG_REQ#
CLK_REQ_WLAN#
12
12
SRC2
SRC1
SRC4
SRC5
GND
GND
SRTC_RST#
12
C2407
1UF/6.3V
12
C2406
1UF/6.3V
C2402
1UF/6.3V
1 2
@
RTC_RST#
C2410
1UF/6.3V
1 2
@
Reserved for X705 NO
BOOT Issue
SRTC_RST# <32>
RTC_RST# <32>
VGA CLK SRC
DGPU_PWROK<21,77>
Jack 2017/10/24 modify to CK_REQ_P0#
12
R2430
1%
300KOhm
nbs_r0201_h10_000s
12
R2431
1%
470KOhm
GND
XTAL24_OUT
CLK_PEG_REQ#
61
Q2422A
2
UM6K1N
RTC_X1
PEX_CLKREQ#<70>
34
Q2422B
5
UM6K1N
RTC_X2 RTC_X2_R
+V3.3A_RTC GENERATION
20180914 Shihhao
Change R2401 to 0ohm & unmount R2426 (RTC MAX 3.46V from EDS)
P_RTC_LDO3v3
1
2
1
2
+3VA
21
SL2405
0402
3.3A_RTC_D
R2426
45.3KOhm
1%
@
1 2
GND
12
R2402 1KOhm
R2418
10MOhm
5%
N/A
R2406
200KOhm
N/A
SL2402
0402
07009-00112500
D2402
BAT54CW
1
2
21
3
X2403
24MHZ
N/A
32.768khz
07009-00065700
X2402
N/A
+3VA_RTC
12
27PF/50V
N/A
4
2
C2409
1 3
12
27PF/50V
N/A
GND
C2404
1 2
GND
15PF/50V
1
N/A
2
C2405
1 2
GND
15PF/50V
N/A
12
C2403
1UF/10V
GND
Project Name
Title :
CPU_PCH_CLOCK SIGNALS,RTC
Size
Dept.:
ASUSTeK
C
Date: Sheet
Friday, February 22, 2019
Engineer:
NB3EE2
24
Rev
R1.0X409F
101
of
+3VSUS
1 2
R2508 10KOhm
1 2
R2509 10KOhm
10KOHM
34
10KOHM
12
SUSWARN#<30>
PCH_SUSACK#<30>
ME_SusPwrDnAck_R
RN2502B
RN2502A
PM_SYSRST_R#
SUSWARN#
PM_RSMRST#_PCH
DPWROK_EC
62Ohm
1 2
VCCST_PWRGD_PCH<58>
DPWROK_EC<30,58>
PM_RSMRST#_PCH DPWROK_R
2 1
SL2513
0402
R2514 0Ohm@
R2507
2 1
SL2553
R2554 0Ohm@
12
Main Board
U0301K
BJ35
GPP_B13/PLTRST#
PLT_RST#
PM_SYSRST_R#
PM_RSMRST#_PCH
1
T2501@
H_CPUPWRGD_R
2 1
0402
VCCST_PWRGD_R
PM_SYSPWROK_PCH
PM_PWROK_PCH
ME_SusPwrDnAck_R
SUSACK_R#
GPD2_LAN_WAKE#
GPD11_LANPHYPC
0402
12
SL2512
PCIE_WAKE#<54>
CN10
SYS_RESET#
BR36
RSMRST#
AR2
PROCPWRGD
BJ2
VCCST_PWRGOOD
CR10
SYS_PWROK
BP31
PCH_PWROK
BP30
DSW_PWROK
BV34
GPP_A13/SUSWARN#/SUSPWRDACK
BY32
GPP_A15/SUSACK#
BU30
WAKE#
BU32
GPD2/LAN_WAKE#
BU34
GPD11/LANPHYPC
BGA1528P
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SPL_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
INTRUDER#
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
INPUT3VSEL
BJ37
BU36
BU27
BT29
BU29
BT31
BT30
BU37
BU28
BU35
BV36
BR35
CC37
CC36
BT27
PCH_SLP_S0#
PCH_SLP_LAN#
PCH_SLP_WLAN#
ME_AC_PRESENT_PCH
PM_BATLOW_R#
SM_INTRUDER#
MPHY_PWREN
INPUT3VSEL
1
1
1
T2505@
T2503@
T2504@
PM_SUSB# <20,30,58,88>
PM_SUSC# <30,86>
PM_SLP_SUS# <30>
PM_PWRBTN# <30>
GPP_B2for CNVi BTUART
WAKE#
GPP_B2_BT_UART_WAKE_N <54>
INTRUDER#Default is 330Kohm inIntel CRB
MPHY_PWRENDefault is 100Kohm inIntel CRB
PM_BATLOW_R#
SM_INTRUDER#
MPHY_PWREN
R2512 10KOhm
R2559 1MOhm
R2506 100KOhm
1 2
1 2
+3VA_DSW
+3VA_RTC
12
+3VSUS
+3VA_DSW
12
R2523 1KOhm
1 2
R2510 10KOhm
1 2
R2511 10KOhm@
12
PM_SYSPWROK<30>
ALL_SYSTEM_PWRGD<30,58,80>
PM_PWROK<30>
PM_RSMRST#<30>
ME_AC_PRESENT<30>
PCIE_WAKE#
GPD2_LAN_WAKE#
GPD11_LANPHYPC
R253410KOhm @
PM_PWROK_PCH
1 2
R2540 1KOhm
12
R2530 0Ohm@
1 2
R2552 1KOhm
12
12
R2538
R2539
100KOhm
10KOhm
GND
GND
3VA_DSW_PWRGD<30,58,87>
IMVP8_PWRGD<30,80>
1 2
R2542 1KOhm
R2541 10KOhm@
1N4148WS
07G001001131
3VA_DSW_PWRGD
DPWROK_R
+3VSUS +3VA_DSW
R2505
R2504
R2502
12
R2503
100KOhm
10KOhm
10KOhm
10KOhm
1 2
1 2
1 2
@
@
@
PM_SYSPWROK_PCH
PM_PWROK_PCH
12
D2504
12
N/A
D2501
1
3
2
BAT54AW
D2502
1N4148WS
12
07G001001131
N/A
D2503
1
3
2
BAT54CW
PM_RSMRST#_PCH
ME_AC_PRESENT_PCH
High-> 3.0V
Low->
3.3V
1
2
PLT_RST#
12
R2521
100KOhm
GND
3
GND
@
20180823 unmount U2501 and add R2518
INPUT3VSEL
U2501
INB
VCC
INA
GND4OUTY
74LVC1G08GW
06G004092010
@
2
0402
PLT_RST# <32>
+3VA_DSW
PR2501
4.7KOhm
1%
@
1 2
PR2502
4.7KOhm
1%
1 2
+3VSUS
12
C2501
0.1UF/16V
@
5
GND
BUF_PLT_RST# <30,53,54,70>
12
R2501
CPU_PCH_SYS_POWER_Control
Dept.:
Friday,February 22,2019
ASUSTeK
100KOhm
GND
ProjectName
X409F
Engineer:
1
SL2588
Title :
Size
C
Date: Sheet
NB3EE2
25
Rev
R1.0
101
of
VCCDSW_1P5(24mA) NO Driven
(De-coupling)
+1.8VSUS
+1.0VSUS_VCCPRIM
+1.8VSUS_VCCPRIM
+3VSUS_VCCPRIM
+VCCPRIM_CORE
+1.0VSUS_VCCAPLL
+1.0VSUS_VCCMPHY
+1.0VSUS_VCCAPLL
+3VA_DSW_PCH
SL2633
+3VSUS_SPI
+1.0VSUS_VCCPRIM
+1.0VSUS_VCCMPHY
+3VSUS
C2632
1UF/6.3V
+1.0VM_VCCAMPHYPLL
+1.0VSUS_VCCDUSB
0402
Del ShortPin for
layout
SL2635
0805
U0301P
BP20
VCCPRIM_1P05_1
BW16
VCCPRIM_1P05_2
BW18
VCCPRIM_1P05_3
BW19
VCCPRIM_1P05_4
BY16
VCCPRIM_1P05_5
CA14
VCCPRIM_1P05_6
CC15
VCCPRIM_1P8_1
CD15
VCCPRIM_1P8_2
CD16
VCCPRIM_1P8_3
CP17
VCCPRIM_1P8_4
CB22
VCCPRIM_3P3_1
CB23
VCCPRIM_3P3_2
CC22
VCCPRIM_3P3_3
CC23
VCCPRIM_3P3_4
CD22
VCCPRIM_3P3_5
CD23
VCCPRIM_3P3_6
CP29
VCCPRIM_3P3_7
BU15
VCCPRIM_CORE1
BU22
VCCPRIM_CORE2
BV15
VCCPRIM_CORE3
BV16
VCCPRIM_CORE4
BV18
VCCPRIM_CORE5
BV19
VCCPRIM_CORE6
BV20
VCCPRIM_CORE7
BV22
VCCPRIM_CORE8
BW20
VCCPRIM_CORE9
BW22
VCCPRIM_CORE10
CA12
VCCPRIM_CORE11
CA16
VCCPRIM_CORE12
CA18
VCCPRIM_CORE13
CA19
VCCPRIM_CORE14
CA20
VCCPRIM_CORE15
CB12
VCCPRIM_CORE16
CB14
VCCPRIM_CORE17
VCCDSW_1P5
12
+3VA_DSW_PCH+3VA_DSW
C2620
22UF/6.3V
@
CB15
VCCPRIM_CORE18
BT24
VCCDSW_1P05
BU14
VCCAPLL_1P05_1
BV12
VCCPRIM_MPHY_1P05_1
BW12
VCCPRIM_MPHY_1P05_3
BW14
VCCPRIM_MPHY_1P05_4
BY12
VCCPRIM_MPHY_1P05_5
BY14
VCCPRIM_MPHY_1P05_6
BV2
VCCAMPHYPLL_1P05
BR15
VCCAPLL_1P05_2
CC12
VCCDUSB_1P05
BR24
VCCDSW_3P3_1
BT20
VCCHDA
BV23
VCCSPI
BT18
VCCPRIM_1P05_7
BT19
VCCPRIM_1P05_8
BU18
VCCPRIM_1P05_9
BU19
VCCPRIM_1P05_10
BT22
VCCPRIM_1P05_11
BP22
VCCPRIM_1P05_12
BV14
VCCPRIM_MPHY_1P05_2
BGA1528P
1mA
12
C2631
1UF/6.3V
+3VSUS_PCH
12
12
C2622
C2628
1UF/6.3V
1UF/6.3V
@
1 2
21
21
Del ShortPin for
layout
VCCPRIM_3P3_8
VCCRTC
VCCPRIM_1P05_13
DCPRTC
VCCPRIM_1P05_14
VCCAPLL_1P05_3
VCCA_BCLK_1P05
VCCAPLL_1P05_4
VCCA_SRC_1P05
VCCA_XTAL_1P05
VCCDPHY_1P24_2
VCCDPHY_1P24_4
VCCDPHY_1P24_1
VCCDPHY_1P24_3
VCCDPHY_1P24_5
VCCDSW_3P3_2
VCCA_19P2_1P05
VCCPRIM_1P8_5
VCCPRIM_1P8_6
VCCPRIM_1P8_7
VCCPRIM_1P8_8
VCCPRIM_1P8_9
VCCPRIM_3P3_9
VCCPRIM_3P3_10
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
20180824 all 10m ohm change to SL
CB16
BR23
BY20
BP24
BR20
BT12
BP14
BR14
BU12
CP5
BY24
CA24
BY23
CA23
CP25
BT23
BR12
CC18
CC19
CD18
CD19
CP23
BW23
BP23
CB36
CB35
+3VSUS_VCCPRIM
12
+1.0VSUS_VCCPRIM
+1.0VSUS_VCCAPLL
199mA
C2629
1UF/6.3V
+3VSUS_VCCPRIM
+VCCDPHY_1P24
+1.8VSUS_VCCPRIM
+3VSUS_VCCPRIM
DCPRTC
+1.0VSUS_BCLK
+1.0VSUS_SRC
+1.0VSUS_XTAL
+3VA_RTC
12
C2608
C2609
1UF/6.3V
0.1UF/6.3V
C2610
0.1UF/6.3V
1 2
@
Volume Mode
+VCCPRIM_CORE is merged with 1.0VSUS
+1.0VSUS
1 2
20180913 Shihhao
Unmount C2610 (follow PDG)
VCCDPHY_1P24(610mA) NO Driven
(De-coupling)
+VCCLDOSRAM_1P24
+3VA_DSW_PCH
+1.0VSUS_19P2
SL2634
0805
20180913 Shihhao
Remove R2615 and tie to C2623 (follow PDG)
21
+1.0VSUS
20181101 Shihhao
C2609, C2610 --> 0201
+VCCPRIM_CORE
12
C2689
1UF/6.3V
Del ShortPin for
layout
Del ShortPin for
layout
Del ShortPin for
layout
Del ShortPin for
layout
+1.0VSUS_VCCPRIM
L2602
21
120Ohm/100Mhz
Irat=300mA
nbs_l0402_h24_000s
SL2608
0402
L2603
21
120Ohm/100Mhz
Irat=300mA
nbs_l0402_h24_000s
L2601
21
120Ohm/100Mhz
Irat=300mA
nbs_l0402_h24_000s
12
C2601
1UF/6.3V
21
1.625A
12
C2602
1UF/6.3V
+1.0VSUS_VCCAPLL
12
C2611
1UF/6.3V
+1.0VSUS_VCCMPHY
12
C2604
1UF/6.3V
+1.0VM_VCCAMPHYPLL
12
C2607
1UF/6.3V
+1.0VSUS_BCLK
12
C2616
1UF/6.3V
@
+1.0VSUS_SRC
12
C2618
1UF/6.3V
+1.0VSUS_XTAL
12
C2621
1UF/6.3V
+1.0VSUS_19P2
12
C2624
1UF/6.3V
+1.0VSUS_VCCDUSB
12
1
C2603
1UF/6.3V
2
Analog for BCLK/OPI/Audio
Power(102mA)
HSIO Digital PLL
Power
12
C2613
4.7UF/6.3V
HSIO Analog PLL
Power(152mA)
12
C2625
1UF/6.3V
Analog BCLK
Power(9mA)
Analog PCIe Clock
Power(42mA)
Analog XTAL
Power(2mA)
Analog Reference
Power(27mA)
USB Digital
Power(280mA)
C2606
10UF/6.3V
12
12
C2640
C2634
10UF/6.3V
10UF/6.3V
@
SL2636
21
0805
12
C2623
1 2
4.7UF/6.3V
C2644
22UF/6.3V
12
12
C2630
C2612
22UF/6.3V
22UF/6.3V
(4.26A)
12
12
12
C2614
22UF/6.3V
C2615
22UF/6.3V
C2617
1UF/6.3V
12
C2619
22UF/6.3V
12
12
C2641
1UF/6.3V
C2633
22UF/6.3V
@
+1.8VSUS
Del ShortPin for
layout
+1.8VSUS_VCCPRIM
696mA
12
C2605
1UF/6.3V
3.3V & 1.8V for SPI
+3VSUS_PCH
12
C2688
4.7UF/6.3V
Default 3.3V for SPI
Power
Power
+3VSUS_SPI
2mA
12
C2627
1UF/6.3V
Project Name
CPU_PCH_POWER
Dept.:
Friday, February 22, 2019
X409F
ASUSTeK
Title :
Size
C
Date: Sheet
Engineer:
NB3EE2
26
Rev
R1.0
101
of
CR34
CP35
CM37
CK37
AE24
AE26
AG24
AG26
AH24
AH25
CN37
BK10
AB27
BK28
AB30
AB33
BK33
AB36
CM13
CM17
AC10
CM21
AC27
CM25
AC30
CM29
CM31
AD33
CM33
AD35
U0301S
AM10
AM28
AM33
BU23
AM35
BU24
BU25
AN25
AN28
AN29
AN30
AN31
BW11
BW15
AR28
BW24
AU10
AU28
AU29
BT35
VSS_145
D6
VSS_146
AL32
VSS_147
BT36
VSS_148
D8
VSS_149
AL7
VSS_150
D9
VSS_151
VSS_152
BU11
VSS_153
E23
VSS_154
VSS_155
E27
VSS_156
VSS_157
VSS_158
E29
VSS_159
VSS_160
VSS_161
E31
VSS_162
VSS_163
E33
VSS_164
VSS_165
BU7
VSS_166
E9
VSS_167
VSS_168
BV11
VSS_169
F12
VSS_170
VSS_171
F15
VSS_172
VSS_173
F18
VSS_174
VSS_175
BV3
VSS_176
F2
VSS_177
AN7
VSS_178
BV31
VSS_179
F21
VSS_180
AN8
VSS_181
BV33
VSS_182
F24
VSS_183
BV4
VSS_184
F3
VSS_185
AP3
VSS_186
VSS_187
F4
VSS_188
AP33
VSS_189
VSS_190
G21
VSS_191
AP36
VSS_192
G27
VSS_193
AP4
VSS_194
G33
VSS_195
VSS_196
G35
VSS_197
G36
VSS_198
AT33
VSS_199
VSS_200
G9
VSS_201
AT35
VSS_202
H21
VSS_203
AT36
VSS_204
BW7
VSS_205
H27
VSS_206
AT4
VSS_207
BY11
VSS_208
VSS_209
BY15
VSS_210
H9
VSS_211
VSS_212
BY22
VSS_213
J12
VSS_214
VSS_215
J15
VSS_216
BGA1528P
U0301R
VSS_1
BT5
VSS_2
BY5
VSS_3
VSS_4
VSS_5
VSS_6
AW1
VSS_7
CM1
VSS_8
BD6
VSS_9
AY4
VSS_10
B34
VSS_11
E35
VSS_12
A4
VSS_13
VSS_14
VSS_15
AF25
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
B2
VSS_21
B36
VSS_22
C36
VSS_23
C37
VSS_24
CN1
VSS_25
CN2
VSS_26
VSS_27
CP2
VSS_28
D1
VSS_29
A32
VSS_30
F33
VSS_31
A3
VSS_32
BJ7
VSS_33
CJ36
VSS_34
A36
VSS_35
VSS_36
CJ4
VSS_37
VSS_38
BK2
VSS_39
CK1
VSS_40
AB3
VSS_41
VSS_42
VSS_43
BK3
VSS_44
CK4
VSS_45
VSS_46
VSS_47
CK7
VSS_48
VSS_49
BK4
VSS_50
CL2
VSS_51
AB4
VSS_52
BK7
VSS_53
VSS_54
AB7
VSS_55
BL25
VSS_56
VSS_57
VSS_58
BL28
VSS_59
VSS_60
VSS_61
BL29
VSS_62
VSS_63
VSS_64
BL30
VSS_65
VSS_66
BL31
VSS_67
VSS_68
VSS_69
BL32
VSS_70
VSS_71
VSS_72
BGA1528P
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
BL7
AE25
BM33
CM5
AE27
BM35
CM9
AE30
BM36
CN13
AE7
BM9
CN17
AF27
BN30
CN21
AF3
BN7
CN25
AF30
CN29
AF33
BP15
AF36
AF4
CN5
AF7
BP25
CN9
AG10
BP3
CP1
BP32
CP11
AH27
BP33
CP13
AH28
BP4
CP15
AH29
BP7
CP19
AH30
CP21
AH31
BR19
CP27
AH33
BR25
AH35
CP37
AJ25
BT15
AJ28
BT16
CP9
AJ7
CR2
AK3
CR36
AK33
D21
AK36
BT25
D25
AK4
BT28
AL28
BT33
D5
AL29
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
BY25
J18
AU32
BY28
J21
AV25
BY33
J24
AV28
BY35
J33
AV3
BY36
J36
AV33
J6
AV36
C1
K21
AV4
C21
K22
AV6
C25
K24
AV8
C29
K25
AW28
C33
K27
AW29
C4
K28
AW3
C9
K29
AW30
CA11
K3
AW31
CA15
K30
AY33
CA22
K31
AY35
K32
B12
K4
B15
CA25
K9
B18
CB11
L27
B21
L33
B23
L35
B25
CB18
L36
B27
CB19
L6
B29
CB2
N25
B31
CB20
N27
CB25
CB33
BA10
CC11
BA28
CC20
CC25
BB33
CC28
BB36
CC31
BC25
CD11
CD12
BC29
CD14
BC32
CD24
CD25
CE33
BD28
CE35
BD33
CE36
BD35
BD36
CF11
BE10
CF14
BE28
BE29
U0301T
N6
VSS_290
B37
VSS_291
CB3
VSS_292
P10
VSS_293
B5
VSS_294
VSS_295
P3
VSS_296
B7
VSS_297
CB4
VSS_298
P33
VSS_299
B9
VSS_300
CB7
VSS_301
P36
VSS_302
VSS_303
VSS_304
P4
VSS_305
VSS_306
P7
VSS_307
BA3
VSS_308
VSS_309
R27
VSS_310
BB3
VSS_311
VSS_312
R28
VSS_313
VSS_314
VSS_315
R29
VSS_316
VSS_317
VSS_318
R30
VSS_319
BB4
VSS_320
CC7
VSS_321
R31
VSS_322
VSS_323
VSS_324
T27
VSS_325
VSS_326
T30
VSS_327
VSS_328
VSS_329
T33
VSS_330
T35
VSS_331
VSS_332
VSS_333
T36
VSS_334
VSS_335
T7
VSS_336
BC8
VSS_337
VSS_338
U26
VSS_339
VSS_340
VSS_341
U7
VSS_342
VSS_343
VSS_344
V26
VSS_345
VSS_346
CE7
VSS_347
V27
VSS_348
VSS_349
VSS_350
V3
VSS_351
VSS_352
VSS_353
V30
VSS_354
VSS_355
CF19
VSS_356
V33
VSS_357
VSS_358
CF2
VSS_359
V36
VSS_360
BE3
VSS_361
BGA1528P
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
VSS_407
VSS_408
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
CF23
V4
BE30
CF28
W10
BE31
CF3
W27
CF4
W30
BF3
CG33
W7
BF33
CG7
BF36
Y26
BF4
CH31
Y27
BG25
Y30
BG28
CJ11
Y33
CJ14
Y35
BH28
CJ19
Y7
BH29
CJ23
BH32
CJ28
BH33
CJ33
BH35
CJ35
BP19
BR16
BY18
BY19
CC16
BU16
CC14
BR22
BU20
CD20
BT14
BP12
CB24
CC24
J5
U24
BD7
AR4
AU4
AW4
BA6
BC4
BE4
BE8
BA4
BD4
BG4
CJ2
CJ3
AM5
CM4
AC5
AG5
CR6
Project Name
X409F
Title :
CPU_PCH_GND
Size
Dept.:
B
Date: Sheet
ASUSTeK
Friday, February 22, 2019
Engineer:
NB3EE2
27
Rev
R1.0
101
of
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