Asus X407UBR Schematic

X407UBR SCHEMATIC

Revision 1.0

NoN coNNected StaNdby

（UAR：UMA）(45W) (Power BOM)

（UBR：DGPU = Nvidia N16V-GMR1, MX110）(65W) (Power BOM)

(UFR：DGPU = Nvidia N16S-GTR, MX130）(65W) (Power BOM)

BOM

Title :

LVDSCONNECTOR

Size

C

Date: Wednesday, Mar ch 07,2018 Sheet 47 of

Dept.:

ASUSTeK COMPUTER INC.

Project Name

X407UA/UV

Engineer:

BrianChen

Rev

R1.0

102

SYSTEM PAGE REF.

PAGE

001_Block Diagram

002_System Setting

003_CP U_DISPLAY

004_CP U_DDR4

005_CP U_LPC,SPI ,SMB,CLIN K

006_CP U_POEWR

008_CP U_MISC,JT AG

009_CP U_CFG,RSV D

010_CP U_POWER_C AP

016_DD R4_SO-DIM M_A_REV

017_DD R4_SO-DIM M_B_STD

018_DD R4_CA_DQ_ VOLTAGE

019_DD R4

020_CP U_PCH_CSI 2,EMMC

021_CPU_PCH_C GPIO, LPIO, MISC

022_CP U_PCH_AUD IO,SDIO,S DXC

023_CP U_PCH_PCI E,USB,SAT A

024_CPU_PCH_C LOCK SIGNALS,RTC

025_CP U_PCH_SYS _POWER

026_CP U_PCH_POE WR,GND

027_CP U_PCH_POE WR,GND

028_PCH-SPI R OM,OTH /DEBUG PORT

029_Silego_Green_CLK_Gen

030_KB C_IT8995E /CX

031_KB C_KB,TP

032_RST_Reset Circuit

036_AU D-ALC3251

037_AUD-HEADP HONE JACK

038_AU D_SPEAKER

042_CardReade r Connector

045_eDP Connector

048_HDMI-type D

050_FAN & SENSOR

051_NG FF(KEY-M) _SSD

052_USB 3.0 + 2.0 CONN

053_NG FF(KEY-E) _WLAN

057_DSG_Discharge

058_PR O_Protect

059_Power & WIFI & CAP LED&LID

060_DC_DC & BAT IN

064_

065_ME_Conn & Sk ew Hole

066_

067_

068_HDD COnnector

069_EM I

070_VG A_nVIDIA_ N16V/S_PC IE

071_VG A_nVIDIA_ N16V/S_FB -IF

072_VG A_nVIDIA_ N16V/S_FB -DDR3

073_VG A_nVIDIA_ N16V/S_VD D

074_VG A_nVIDIA_ N16V/S_DI SPLAY

075_VG A_nVIDIA_ N16V/S_RO M,XTAL

076_VG A_nVIDIA_ N16V/S_GP IO

077_VG A_nVIDIA_ N16V/S_PO WER

080_PW_IMVP8 (1) (RT3601BCGQW) 081_PW_IMVP8 (2) (RT3601BCGQW) 083_PW_+1.0VSUS / +1.8VSUS 084_PW_+1.2VS 086_PW_1.35V/+0.675VS (UP9011Q) 087_PW_+3VADSW/+5VSUS (RT8249C) 088_PW_LOADSWITCH

089.PW_CHARGER(BQ24780) 090_PW_PROTECTION 091_PW_DGPU_2PHASE(RT8815A)

Conten t

BLOCKDIAGRAM

Touchpad

Page31

Keyboard

Page31

Charger

Page88

CPU Thermal Sensor

Page50

DIMM Thermal Sensor

Page14

INT. AMIC

Audio Jack

Page37

Speaker L/R

I2C

SMB0

SMB1

Audio Codec

eDP Panel

HDMI type A

Debug Conn.

ALC3251

Page36Page38

SPI

Page45

Page48

EC

IT8995E

Page68

NGFF SSD

Page51

DDI _2

SPI ROM

W25Q64FVSSIQ

HDD

Page30

Page28

SAT A_0

Gen3

SAT A_2

eDP

DDI_ 2

DDI_ 1

SML 1

I2C1

LPC

8th Generation Intel Processor Families I/O for U/Y Platforms

SPI

Azalia

HDA

CPU

Kabylake R- U42

Page 3~9

PCH

SATA

Gen2

DDR4 2133 MHz

SMB

PCI E

USB 2. 0

USB 3. 0

DDR4 so-dimm

PCI E_1~ 4

PCI E_9/1 0/11/ 12

PCI E_6

USB 2.0 _8

USB 2.0 _6

USB 2.0 _2

USB 2.0 _4

USB 2.0 _1

USB 3.0 _1

Page 13~15,19

Nvidia

MX110/MX130

N16V -GMR1/N16 S-GT R

VRAM x32 gDDR52GB

NGFF SSD

Page51

WLAN + BT

Page53

CMOS Camera

Page45

USB 2.0 Standard Conn. 1 port

Page52

Card Reader

Page42

USB 3.0 Standard Conn. 1 ports

Page52

Page 70~79

Power

+VCCGT +VCCCORE +VCCST

+1.0VSUS / +1.8VSUS

+0.95VSG

+VCCPRIM_CORE

+1.2V / +VTT / +2.5V

+3VADSW/+5VSUS

Load Switch

Charger

+VDDC

+VCCSA

Page 80 &81

Page 83

Page 84

Page 86

Page 87

Page 88

Page 89

Page 91

Control ler

Convert er

LDO

MOSFET

A/D_D OCK_IN

AC_BA T_SYS

P0A03BEA

5VSUS_ON

P0A03BEA

RT8249 C

H-MOS PEA28BA*1 L-MOS PEA28BA*1

SMB0_DAT

SMB0_CLK

SN2867R UYR

ACDRV

H-MOS PEA28BA*1 L-MOS PEA28BA*1

+3VA

+3VAO

+5VO

P0A03BEA

DCDRV

ACOK

SN1409049-1

PS_ON

PEA32DY-1

PS_ON

PEA32DY-2

SUSB#_EC

+3VA_DSW

AC_BA T_SYS

BAT

+3VA

+3VA_EC

+5VSUS

+5V

+5VS

+5VS_ PWR

+3VA_ DSW

Imax =10.3A

Imax =8.3A

3VADSW_ON

H-MOS PEA28BA*1 L-MOS PEA28BA*1

3VA_DSW_PWRGD

VSUS_ON

SUSC#_EC

SUSB#_EC

VSUS_ON

SUSC#_EC

PEA32DY-2

SN1409049-2

PEA32DY-1

UP0132A

PUMD12

+1.8VSUSO

1.8VSUS_PWRGD

+3VSUS

+3V

+3VS

+1.8V SUS

+12VS US

+12V

+5VS_PWR

+5VSUS

DDR_PG_CTRL

+5VS_PWR

NVDD_PWR_E N

NVDD_PWM_ VID

VCCIN_EN

VR_SVID_ALERT#

VR_SVID_DATA

VR_SVID_CLK

5VSUS_Delay

1.35V_ON

NCP81206

H-MOS NTMFS4C09*1 L-MOS NTMFS4C06*1

H-MOS PEA28BA*1 L-MOS PEA28BA*1

RT8248 A

H-MOS PEA16BA*1 L-MOS PEA16BA*1

RT8248 A

H-MOS PEA16BA*1 L-MOS PEA16BA*1

RT8815 A

H-MOS NTMFS4C09*1 L-MOS NTMFS4C06*1

+1.05VO

+1.35VO

3VA_DSW_PWRGD

IMVP8_PWRGD

1.35V_PWRGD

NVDD_PWRGD

SUSC#_EC

SUSB#_EC

MPHY_PWREN

SUSC#_EC

SUSB#_EC

PEA32DY-1

PEA32DY-2

PUMD12

+12V

+12VS

+12VD X

+VCCC ORE

+VCCGT

+VCCS A

+1.0V SUS

Imax =31A

Imax =29A

Imax =5.1A

Imax =12A

+VCCS T

+VCCI O

Imax =13A

+1.2V

VTT

Imax =51A

+NVVD D

BOM

Title : PW_FL OW CHA R T

Size

Dept.: NB Power Team Engineer:

Custom

ProjectName

X407UA/UV

Rev

R1.0

Power

Sheet 100 of 102Date: Wednesday, March 07, 2018

AC

-IN Mode

(EC to power)

+3VA_DSW/+5VSUS/+12VSUS

(PCH to EC)

(power to EC)

(EC to PCH)

+3VA/+3VA_EC

1

(to EC)

5VSUS_ON

3

3VA_DSW_ON

ME_SusPwrDnAck_R

4

3VSUS_PWRGD

5

6

AC_PRESENT

7

(to EC)

9

EC_RST#

2

PM_RSMRST#

PWR_SW#

8

PM_PWRBTN#

X541UV/UA Power-On Sequence Timing Diagram Rev.0.1

(pull up to +3VSUS)

T0=20ms (spec.>=10ms)

T1<200ms(check)

(falling edge)

T2=50ms

(PCH to EC)

PM_SUSB#/SLP_LAN#

(PCH to EC)

12

(PCH to power)

(EC to power)

+1.2V/+2.5V/+3V/+12V/+VCCST

(EC to power)

+1.8VS/+3VS/+5VS/+12VS +VCCIO/+VccSTG

(power to EC)

(EC to PCH)

15

ALL_SYSTEM_PWRGD

16

17

(PCH to EC)

PM_SLP_A#

10

PM_SUSC#

11

ME_SLP_M_EC#

SUSC_EC#

13

SUSB_EC#

14

VccST/VccPLL

IMVP8_PWRGD

PM_PWROK_PCH

PCH_SUS_STAT#

PLT_RST#

18

+VCCGT

+VCCSA

THERMTRIP#

BOM

Title :

Size

C

Power OnTim ing

Dept.:

ASUSTeK COMPUTER INC. Engineer:

ProjectNa me

X407UA/UV

Brian Che n

Rev

R1.0

DC

-IN Mode

(EC to power)

+3VA_DSW/+5VSUS/+12VSUS

(PCH to EC)

(power to EC)

(EC to PCH)

+3VA/+3VA_EC

1

(to EC)

5VSUS_ON

3

ME_SusPwrDnAck_R

4

3VSUS_PWRGD

5

6

AC_PRESENT

7

(to EC)

9

EC_RST#

2

3VA_DSW_ON

PM_RSMRST#

PWR_SW#

8

PM_PWRBTN#

X541UV/UA Power-On Sequence Timing Diagram Rev.0.1

(pull up to +3VSUS)

T0=20ms (spec.>=10ms)

T1<200ms(check)

(falling edge)

T2=50ms

(PCH to EC)

(PCH to EC) (PCH to power)

(EC to power)

10

PM_SUSB#/SLP_LAN#

12

ME_SLP_M_EC#

11

13

+1.2V/+2.5V/+3V/+12V/+VCCST

(EC to power)

+1.8VS/+3VS/+5VS/+12VS +VCCIO/+VccSTG

14

VccST/VccPLL

(power to EC)

(EC to PCH)

(PCH to EC)

15

ALL_SYSTEM_PWRGD

16

PM_PWROK_PCH

17

PCH_SUS_STAT#

IMVP8_PWRGD

18

PM_SLP_A#

PM_SUSC#

SUSC_EC#

SUSB_EC#

+VCCSA

PLT_RST#

+VCCGT

THERMTRIP#

BOM

Title :

Size

C

Power OnTim ing

Dept.:

ASUSTeK COMPUTER INC. En gineer:

ProjectNa me

X407UA/UV

Brian Che n

Rev

R1.0

PR8318

100KOh m

@

VSUS_ON31,58 ,84,89

PT830*請放置 PU8302旁;並請放置Trace 上!

PT8303

P_1.0VSUS_HG_30

P_1.0VSUS_LX_30

P_1.0VSUS_LG_30

1

NB_TPC20 T

PT8301

1

NB_TPC20 T

PT8302

1

NB_TPC20 T

+3VSUS

2 1

P_1.0VSUS_LX_30

PD8301

BAT54CW

1

3

2

12

PR8303 30KOhm

PR8306

178KOh m

PR8306 close toPU8302

f=420kHz

PR8304 620KOh m

1 2

@

12

PC8313

0.1UF/ 25V

12

VFB=0.75V

GND

P_1.0VSUS_FB_10 P_1.0VSUS_LDO_EN_10 P_1.0VSUS_EN_10 P_1.0VSUS_TON_10

1.0VSUS_ PWRGD59

P_1.0VSUS_FB_10

820PF /50V PC8315

2 1

PR8309

12

3.48K Ohm

12

PR8311 10KOhm

GND GND

GND

12

PC8301

0.1UF/ 25V

GND

P_1.0VSUS_VSENS_10

GND

+5VSUS_PWR

PR8321

2.2Ohm 5%

P_1.0VSUS_VSENS_10

PC8P3_014.0VSUS_VIN_S

0.033 UF/16V

2 1

PU8302 RT8248 AGQW

10

2

1

nbs_c0603_h37_000s

12

GND

6 7 8 9

nbs_r0 603_h24_000s

FB S3 S5 TON PGOOD

PC8307 1UF/25 V

5

4

GND1

VDDQ

VTTREF

11 VID

12 VDD

13 CS

+1.0VSUS (RT8248AGQW)

3

1

2

23

GND4

VTTSNS

VTTGND

22

GND3

21

GND2

20

VTT

19

VLDOIN

18

BOOT

17

UGATE

16

PHASE

14 PGND

15 LGATE

GND

P_1.0VSUS_VDDP_30

P_1.0VSUS_CS_10

12

RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA

PR8310

OCP=14~16A

200KOh m

20160530 modify

P_1.0VSUS_BST_RP_R380315

0402

P_1.0VSUS_LG_30

12

P_1.0VSUS_LOSENS_10

nbs_r0 603_h24_000s

P_1.0VSUS_RESENS_10

P_1.0VSUS_BST_30 1 2 P_1.0VSUS_HG_30 P_1.0VSUS_LX_30

PR8313 10Ohm

PSL8303

1 2

@

0Ohm 5%

PC8302

0.1UF/ 25V

1 2

nbs_c0 603_h37_000s

1 2

PC8310 @ 2200P F/50V

PR8302 10KOhm @

2 1

5

D

4

G S

123

5

D

4

G S

123

GND

PSP8301

SHORT_PAD @

12

PCI8301 10UF/2 5V

nbs_c0 805_h57_000s nbs_c0805_h5 7_000s

GND

PQH8301

PEA16BA

[HF]CYNTEC/PEUB063T-1R0MS

PL8302 1UH Irat=12A

2 1

7x7x3mm

12

PC8317 @ 1000P F/50V

nbs_c0 603_h37_000s

PQL8302

PEA16BA

P_1.0VSUS_SNB_S

12

PR8320 @

5%

1Ohm

nbs_r1 206_h30_000s

12

PCI8303 10UF/2 5V @

AC_BAT_SYS

12

+ PCE8301

68UF/2 5V

h=6mm

PJP8301 @ 1MM_OPE N_5MIL

1

2

1 2

Imax=7.45A

+1.0VO

PJP8303 @ 3MM_OPE N_5MIL

1

c0805 ,nb_c0805_h5 7_hdi

22UF/6.3V

PCO8306

12

SHORT_PAD

@

12

PSP8302

480mil

c0805 ,nb_c0805_h5 7_hdi

22UF/6 .3V

PC8305

1

2

PC8303

PC8320

12

2

1 2

560UF/2.5V

PCE8302

12

+

@

6mm

+1.0VSUS

Imax=1A

+1.8VSUS

1

2 1

2

2 1

PJP8302

1MM_OPE N_5MIL

@

PC8311 10UF/6 .3V @

+1.8VSUSO

2 1

PC8309 10UF/6 .3V

@ PSP8303

SHORT_PAD

1.8VSUS_ PWRGD59

PR8314

12.7K OHM

1 2

12

PC8319 @ 1000P F/50V

2 1

3A LDO REF=0.8V

+1.8VSUS [For PCH]

VSUS_ON31,58 ,84,89

1.8VSUS_ PWRGD P_1.8VSUS_FB_10 P_1.8VSUS_EN_10

12

PR8308 10KOhm

PR8312 0O hm

2 1

BAT54CW

3

PU8301 APL5930CQBI-TRG

GND3 GND2 GND1

1

10

POK VCNTL

2

FB EN

3

8

VOUT1 VIN3

4 VOUT2 VIN2 5 VOUT3 VIN1

PD8302

12

@

1

2

GND

13 12

11

9

7 6

PC8318

0.1UF/ 16V @

+5VSUS

+3VA_DSW

12

PC8316 1UF/16 V

PR8307 10KOhm @

12

PC8314 10UF/6 .3V

Title :

PW_+1.0VSUS / +1.8VSUS

Size

Dept.:

C

NB Power Team

Project Name

X540UVK

Engineer:

Andy

Rev

R0.1

PT860* 請放置 PU8 600旁 ;並請放置Trace 上!

PT8601

P_1V2_HG_30

P_1V2_LX_3 0

P_1V2_LG_30

1

NB_TP C20T

PT8602

1

NB_TP C20T

PT8603

1

NB_TP C20T

+1.2V / +VTT / +2.5V[For Memory]

PR8630 PD8600 0Ohm BAT54AW

PM_SUSC#26,31

1.2V_ON31

DDR_ PG_CTRL5

1

2

1

2

1 2

PR8613 10KOh m

3

PD8601 @ BAT54CW

PR8616 0Ohm

P_1V2_LX_3 0

3

P_1V2_EN_10

12

PC8613

0.22UF/10V

f=420k Hz

PR8607 620K Ohm

2

1

12

P_1V2_LDO_E N_10

12

PC8614

0.1UF/25V @

59 1.2V _PWRGD

VFB=0.75V

PR8621

2

1 P_1V2_FB_10

178K Ohm

PC8612 820PF/50V

2 1

PR8611

6.2KOhm

2

1 P_1V2_V SENS_10

PR8612 10KOh m

2 1

GND GND

P_1V2_FB_1 0 P_1V2_LDO_E N_10 P_1V2_EN_10 P_1V2_TON_10

12

PC8611

0.1UF/25V

GND

PR8601

2.2Ohm

nbs_r0603_ h24_000 s

PC8602 1UF/25V nbs_c0603 _h37_00 0s

1

PU8600 RT8248AGQW

+5VSUS

AC_BAT_SYS

PC8615

0.1UF/25V

2 1

P_1V2_VSENS _10

P_1V2_VTTREF_ 10

GND

5

4

3

2

1

GND1

VDDQ

GND4

VTTREF

VTTSNS

VTTGND

GND3

21 6 7

8 S5 9 TON

10

2 1

5%

12

GND GND

GND2

FB

S3

PGOOD

VTT

19 +VTT

VLDOIN

18 P_1V2_LD OIN_30

BOOT

17

UGATE

16 P_1V2_HG_30

PHASE

11 VID

12 VDD

13 CS

14 PGND

15 LGATE

P_1V2_LG_30

P_1V2_VDD_30

P_1V2_CS_1 0

GND GND

12

PR8603 402K Ohm

+VTT

12

PC8600

PC8601 10UF/6.3V

P_1V2_BST_30

10UF/6.3V

+1.2V

@

21

PSL8601

0603

nbs_r0603_ h24_000 s 0.1UF/25 V

1 2 1 2

12

PC8604 1UF/25V nbs_c0603 _h37_00 0s

GND

nbs_c0805 _h37_00 0sn bs_c0805_h3 7_000s

23 22

20

P_1V2_LX_3 0

RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA OCP=13 A

PR8606 P_1V2_B ST_R_30 0Ohm 5% PC860 3

nbs_c0603 _h37_00 0s

PR8609 10Ohm

2 1

PSL8602

21

0402

@

P_1V2_LOSENS_ 10

AC_BAT_SYS

PCI8601

PCI8603

10UF/25V

10UF/25V N/A

2 1

nbs_c0805 _h57_00 0s

20160316

2 1

7x7x3mm

[HE]CYNT EC/PEUB 063T-1R 0MS

PC8609 1000PF/50 V

nbs_c0603 _h37_00 0s @

P_1V2_SNB_S

1 2 12

PR8608

5%

1Ohm nbs_r1206_ h30_000 s

@

GND

PL8600 1UH Irat=12A

5

D

PQH8601

QM1830M3

4

S

G

123

12

PR8604 10KOhm @

5

D

PQL8602

QM1830M3

4

G S

123

PC8608 1000PF/50 V

2 1

@

PSP8601 @

SHORT_PAD

1 2

P_1V2_VO_S

12

+1.2V

h=6mm

Imax=10.06A

OCP=13A

+1.2V

PJP8601

1

480mil

c0805,nb _c0805_h5 7_hdi

22UF/6.3V

PCO8606

SHORT_PAD

12

PSP8600

@

1

2

c0805,nb _c0805_h5 7_hdi

22UF/6.3V

PC8607

PC8605

12

1

2

1 2

@

3MM_SHORT_ PIN

c0805,nb _c0805_h5 7_hdi

22UF/6.3V

1

@

PC8610

+ P CE8601

330UF/2V

2

Imax= 3A

OCP=4.5A

+2.5V

PJP8602 @ 1MM_S HORT_PIN

1 2

+2.5VO

PC8619 10UF/6.3V @

2 1

nbs_c0805 _h57_00 0sn bs_c0805_h5 7_000s

PC8616 10UF/6.3V

@ PSP8602

SHORT_PAD

12

3A LDO REF=0.8V

2.5V _PWRG D59

PR8623

21.5KOhm

1 2

PC8606 @ 1000PF/50 V

2 1

+2.5V

PU8601 APL5930CQBI -TRG

13

GND3

12

GND2

11

GND1

10

1

POK VCNTL

2

FB EN

3

VOUT1 VIN3

4

VOUT2 VIN2

5 6

VOUT3 VIN1

9 8 7

2.5V _PWRG D P_2.5V_FB _10 P_2.5V_RCE N_10

12

PR8602 10KOh m

+5VSUS

PD8602 @

PR8615

BAT54AW

0Ohm @ 1

2

1

3

PC8620 PR8614

0.1UF/25V 10KOhm

@

2 1

+3VA_DSW

12

PC8617 1UF/16V

PR8622 10KOhm @

12

PC8618 10UF/6.3V

PM_SUSC#

2

1.2V_ON

12

Title :

Size

A2

Date: Wednesday, March 07, 2018

PW_+1.2V/+VTT/+2.5V

Dept.:

NB Power team

Project Name

X540UVK

Enginee r:

Rev

R0.1

Andy

87

Sheet

102

of

+5VSUS

+5VSUS_PWR

to PJP87020511

AC_BAT_SY S

0603

PSL87 05 @

21

Imax =9.81A

PJP87 02 @ 3MM_ SHORT_ PIN

1

2

1 2

PC872 3

22UF/6 .3V

@

20160415_Modify 20170517_Modify

PJP87 01 @ 1MM_ OPEN_ 5MIL

1

2

1 2

PCE870 2

68UF/2 5V

h=6mm

[HF]CYNTE C/PEUB063T-3 R3MS

+5VSUSO

12

PCE870 3 220UF/ 6.3V

2 1

V-Chip h=4.5mm

P_5VSUS_ VSENS_10

12

PC870 9 PR8703 PC 8715

0.1UF/ 25V 10K Ohm 150PF /50V

+3VA_DSW / +5VSUS [System Power]

12

PC870 6

0.1UF/ 25V

P_5VSUS_ BST_R

1

PR870 5

5%

0Ohm

nbs_r0 603_h24_ 000s

P_5VSUS_ HG_30

P_5VSUS_ EN_10

P_12VS US_SKIPSEL_20

P_5VSUS_ LX_30 2

P_5VSUS_ BST_30

PU8701

+5VSUS IOCP=9.2A

PR870 2

P_5VSUS_ VIN_S

PL870 2

3.3UH Irat=6.5A

12

PCI870 1 10UF/2 5V

nbs_c0 805_h57 _000s

PQH8701

QM1830M3

21

D

4

GS

3

2 5

1

12

7x7x3mm

5

SHORT_PAD

1@

PSP870 5

2

12

D

PQL870 2

QM1830M3

4

GS

321

1 2

PC871 6

@

2200P F/50V

@

12

PR870 1

6.49K Ohm

P_5VSUS_ FB_10

1 2

30K OHM P_ 5VSUS_FB_10

1

30K OHM

+3VA_D SW IOCP=9.2A

P_5VSUS_ HG_30

P_5VSUS_ LX_30

P_5VSUS_ LG_30

PR870 6 +3VAO

2 P_3VADS W_FB_10

P_5VSUS_ CS_10

P_3VADSW _CS_10

3VADSW_ ON31

5VSU S_ON31,58

GND3 23GND2 22GND1

21

1 CS1 2 FB1 3 LDO3 4 FB2

5

CS2

PC870 2

6 E N2

4.7UF/ 6.3V

2 1

+3VAO

7 P GOOD8 PHASE29 B OOT

P_3VADSW _EN_10

PSL87 02 @

SHORT_LAND

1 2

0402

PSL87 03

SHORT_LAND

1 2

0402

PSL87 04 @

SHORT_LAND

1 2

0603

EN1

20

15

BOOT1

17

LG1

PHASE1

18

SKIPSE L

19

14

BYP1

13

LDO 5

12

VIN

11

LG2

2

10 UG 2

P_3VADSW _HG_30

P_3VADSW _BST_30

2P_3VAD SW_LX_30

PR870 8

5%

0Ohm

nbs_r0 603_h24_ 000s

1

P_3VADSW _BST_R

12

PC871 4

0.1UF/ 25V

3VA_DSW _PWRGD 26,31 ,59

P_3VADSW _EN_10

@

P_5VSUS_ EN_10

RT8249 CGQW

UG1

16

+3VA

P_5VSUS_ LG_30 +5VSUSO +5VAO

P_3VADSW _LG_30

PC870 5

4.7UF/ 6.3V

2 1

P_3VADSW _HG_30

P_3VADSW _LX_30

P_3VADSW _LG_30

AC_BAT_SY S

P_3VADSW _FB_10

1 2

PC870 3 2200P F/50V

4

G

123

4

G S

123

@

PT8713 PT8716

1 1

P_3VADSW _HG_30 P_5VSUS_ HG_30

PT8714 PT8717

1 1

P_3VADSW _LX_30 P_5VSUS_ LX_30

PT8715

1

P_3VADSW _LG_30 P_ 5VSUS_LG_30

PJP87 03 @

PCI870 7

PCI870 5 10UF/2 5V

10UF/2 5V

2 1

nbs_c0 603_h39 _000s

[HF]CYNTE C/PEUB063T- 3R3MS

PL870 1

3.3UH Irat=6.5A

7x7x3mm

12

PR872 7 680 KOhm

P_3VADSW _FBMLCC_10

12

PC870 8

0.01UF /50V

1MM_ OPEN_ 5MIL

P_3VADSW _VIN_S

5

D

S

5

D

2 1

PQH8704

QM1830M3

PQL870 3

QM1830M3

1

2

1 2

20160401 Modify

21

Close to PU8701

+3VADSW O

12

PC870 7 390PF /50V

PSP870 6

12

PC872 1 150PF /50V

@

PT8718

1

SHORT_PAD

1@

2

P_3VADSW _VSENS_10

12

PR870 4 PC8710

6.8KOh m 0.1 UF/25V

12

PR870 7 10K Ohm

AC_BAT_SY S

12

PCO871 1 22UF/6 .3V

Imax = 9.5A

PJP87 04 @ 3MM_ SHORT_ PIN

1

2

1 2

12

PC872 5 22UF/6 .3V

PC872 6 22UF/6 .3V

+3VA_DSW

12

PC872 7 22UF/6 .3V

@

+12VSUS

PSL87 01 1 2

0603

nbs_c0 603_h37 _000s

@

PC872 4

0.1UF/ 25V

2 1

P_12VS US_CP1_20P_3VADSW _LG_30 +5VSUSO

P_12VS US_CP4_20

12

PC871 8

0.1UF/ 25V

2 1

PC870 1

0.1UF/ 25V

P_12VS US_CP2_20

請 check 整份線路 +12VSUS total 並聯對地電阻不得小於10kOhm

6

5

BAT54SDW

PD870 1

1

2

34

P_12VS US_CP3_20

12

PC872 2

0.1UF/ 25V nbs_c0 603_h37 _000s

Adaptor Mode (IMVP8)

S3

PS_ON 1

3VADSW_ON

3VSUS _ON

5VSUS _ON

1.35V_ ON

SUSC_EC#

SUSB_EC#

CS S4

-

1

-

1

-

1

-

1

-

1

-

1

0

-

TPC28T

1

@

TPC28T

+3VADSW O

+3VA_DSW

1

+5VSUSO

1

@ @

+5VSUS

PT8709 PT8702 PT8706 PT8701 PT8708

+5VAO

+12VSUS

GND

PT8703 P T8712 PT8 704

GND GND

Battery Mode (IMVP8)

S5 S5 with USB Charger+S0

DS3

-

TPC28T

1

0

1

0

1

+3VAO

1

+3VA

1

GND

1

@ @ @ @ @

1

-

1

0

-

1

0

-

0

-

0

TPC28T

1

TPC28T

1

TPC28T

1

PT8710 PT8711 PT8707 PT8 705

TPC28T

1

@ @ @ @

3VADSW_ON 1 - -

3VSUS _ON 1 - - 0 0 0

5VSUS _ON 1 - - 1 0 0 1

SUSC_EC# 1 - -

SUSB_EC# 1

BOM

Title :

Size

Custom

Date: Wednesday, March 07, 2018

S0 CS S3 DS3 S4 S5 S5 with USB Charger+

PS_ON 1 - - 1 0 0 1

1.35V_ ON

1 - - 1 0 0

1

0 0 0

- - 0 0 0

Project Name

X540U VK

PW_+3VA_DSW/+5VSUS

Dept.:

NB Pow erTea m

Engineer:

Sheet

Andy

88

of

0

Rev

R0.1

102

2016/11/18X542UA_R1.0#84,Modify to GDDR5

72 FBA_CLK0 72 FBA_CLK0#

72 FBA_CMD[0:15]

72 FBA_DBI[7..0]

72 FBA_EDC[7..0]

FBA Partition Memory (1 of 2)

1KOhmFBA_CMD13

12

/VGA

FBA_D5 FBA_D0 FBA_D2 FBA_D4 FBA_D7 FBA_D3 FBA_D6 FBA_D1 FBA_D12 FBA_D8 FBA_D15 FBA_D9 FBA_D13 FBA_D14 FBA_D11 FBA_D10 FBA_D18 FBA_D20 FBA_D19 FBA_D23 FBA_D16 FBA_D21 FBA_D17 FBA_D22 FBA_D24 FBA_D26 FBA_D27 FBA_D25 FBA_D31 FBA_D30 FBA_D28 FBA_D29

FBA_CMD9 FBA_CMD6 FBA_CMD7 FBA_CMD4 FBA_CMD3 FBA_CMD1 FBA_CMD2 FBA_CMD11 FBA_CMD10

FBA_EDC0

FBA_EDC1

FBA_EDC2

FBA_EDC3

FBA_DBI0

FBA_DBI1

FBA_DBI2

FBA_DBI3

FBA_CMD12 FBA_CMD15

FBA_CMD14 J11 FBA_CLK0# J12 FBA_CLK0

FBA_CMD0 FBA_CMD5

FBA_SEN1

820PFF/5B0AV_VREFC0

FBA_CMD8

MF=0 non- Mirror

U7201

M2

DQ7/DQ31 VDDQ1

M4

DQ6/DQ30 VDDQ2

N2

DQ5/DQ29

N4

DQ4/DQ28

T2

DQ3/DQ27

T4

DQ2/DQ26

U2

DQ1/DQ25

U4

DQ0/DQ24

M13

DQ15/DQ23

M11

DQ14/DQ22

N13

DQ13/DQ21

N11

DQ12/DQ20

T13

DQ11/DQ19

T11

DQ10/DQ18

U13

DQ9/DQ17

U11

F13

DQ8/DQ16 DQ23/DQ15

F11

DQ22/DQ14

E13

DQ21/DQ13

E11

DQ20/DQ12

B13

DQ19/DQ11

B11

DQ18/DQ10

A13

DQ17/DQ9

A11

DQ16/DQ8

F2

DQ31/DQ7

F4

DQ30/DQ6

E2

DQ29/DQ5

E4

DQ28/DQ4

B2

DQ27/DQ3

B4

DQ26/DQ2

A2

DQ25/DQ1

A4

DQ24/DQ0

J5

A12/A13

K4

A0/A10/A8/A7

K5

A1/A9/A11/A6

K10

A3/BA3/A5/BA1

K11

H10

A2/BA0/A4/BA2 A5/BA1/A3/BA3

H11

A4/BA2/A2/BA0

H5

H4

A6/A11/A1/A9

A7/A8/A0/A10

D4

D5

WCK23/WCK01

WCK23#/WCK01#

P4

P5

WCK01/WCK23

WCK01#/WCK23#

R2

EDC0/EDC3

R13

EDC1/EDC2

C13

C2

EDC2/EDC1

EDC3/EDC0

P2

DBI0#/DBI3#

P13

DBI1#/DBI2#

D13

DBI2#/DBI1#

D2

DBI3#/DBI0#

G3

L3

CAS#/RAS#

RAS#/CAS#

J3

CKE# CK# CK

G12

WE#/CS#

L12

CS#/WE#

J13

ZQ

J10

SEN

J2

RESET#

J1

MF

A5

Vpp/NC

U5

Vpp/NC1

A10

VREFD1

U10

VREFD2

J14

VREFC

J4

ABI#

K4G41325FE-HC28 /VGA

72 FBA_D[0:63]

FBA_D[0:63]

20161215ByteSWAP 20161216bitdSWAP

FBA_D7 FBA_D6 FBA_D5 FBA_D4 FBA_D3 FBA_D2 FBA_D1 FBA_D0

FBA_D15 FBA_D14 FBA_D13 FBA_D12 FBA_D11

GND

72 FBA_WCK23 72 FBA_WCK23#

72 FBA_WCK01 72 FBA_WCK01#

FBA_D10 FBA_D9 FBA_D8

FBA_D23 FBA_D22 FBA_D21 FBA_D20 FBA_D19 FBA_D18 FBA_D17 FBA_D16

FBA_D31 FBA_D30 FBA_D29 FBA_D28 FBA_D27 FBA_D26 FBA_D25 FBA_D24

20161215SWAP

R7202 1%1 /VGA 2121Ohm R7203 1 /VGA 2 1KOhm FBA_ZQ1

R7204/VGA

2

MF=0 non-Mi rror

1 FBA_MF1

FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3 FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7

FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7

FBA_CLK0

R7239

80.6Ohm /VGA 1%

1 2

FBA_CLK0#

FBA_CLK1

R7240

80.6Ohm /VGA 1%

1 2

FBA_CLK1#

X507 remove C7 202/C7 203

GND

C7204

+FBVDDQ

B1 B3

B12

VDDQ3

B14

VDDQ4

D1

VDDQ5

D3

VDDQ6

D12

VDDQ7

D14

VDDQ8

E5

VDDQ9

E10

VDDQ10

F1

VDDQ11

F3

VDDQ12

F12

VDDQ13

F14

VDDQ14

G2

VDDQ15

G13

VDDQ16

H3

VDDQ17

H12

VDDQ18

K3

VDDQ19

K12

VDDQ20

L2

VDDQ21

L13

VDDQ22

M1

VDDQ23

M3

VDDQ24

M12

VDDQ25

M14

VDDQ26

N5

VDDQ27

N10

VDDQ28

P1

VDDQ29

P3

VDDQ30

P12

VDDQ31

P14

VDDQ32

T1

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

C5

VDD1

C10

VDD2

D11

VDD3

G1

VDD4

G4

VDD5

G11

VDD6

G14

VDD7

L1

VDD8

L4

VDD9

L11

VDD10

L14

VDD11

P11

VDD12

R5

VDD13

R10

VDD14

A1

VSSQ1

A3

VSSQ2

A12

VSSQ3

A14

VSSQ4

C1

VSSQ5

C3

VSSQ6

C4

VSSQ7

C11

VSSQ8

C12

VSSQ9

C14

VSSQ10

E1

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

VSSQ14

F5

VSSQ15

F10

VSSQ16

H2

VSSQ17

H13

VSSQ18

K2

VSSQ19

K13

VSSQ20

M5

VSSQ21

M10

VSSQ22

N1

VSSQ23

N3

VSSQ24

N12

VSSQ25

N14

VSSQ26

R1

VSSQ27

R3

VSSQ28

R4

VSSQ29

R11

VSSQ30

R12

VSSQ31

R14

VSSQ32

U1

VSSQ33

U3

VSSQ34

U12

VSSQ35

U14

VSSQ36

B5

VSS1

B10

VSS2

D10

VSS3

G5

VSS4

G10

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L5

VSS10

L10

VSS11

P10

VSS12

T5

VSS13

T10

VSS14

GND

GDDR5 X32

72 FBA_CLK1 72 FBA_CLK1#

72 FBA_CMD[16:31]

FBA_D[0:63]

FBA_D63 FBA_D62

20161214SWAP

FBA_D61 FBA_D60 FBA_D59 FBA_D58 FBA_D57 FBA_D56

FBA_D55 FBA_D54

20161214SWAP

FBA_D53 FBA_D52 FBA_D51 FBA_D50 FBA_D49 FBA_D48

FBA_D47 FBA_D46 FBA_D45 FBA_D44 FBA_D43 FBA_D42 FBA_D41 FBA_D40

FBA_D39 FBA_D38 FBA_D37 FBA_D36 FBA_D35 FBA_D34 FBA_D33 FBA_D32

72 FBA_WCK45 72 FBA_WCK45#

72 FBA_WCK67 72 FBA_WCK67#

R7207 1%1 /VGA 2121Ohm

GND

R7205 1 /VGA 2 1KOhmFBA_ZQ3

R7206/VGA

GND

2

MF=0 non-Mi rror

X507 remove C7 206/C7 207

GND

1 FBA_MF3

12

C7205

1KOhmFBA_CMD29

820PFF/5B0AV_VREFC1

/VGA

FBA_D56 FBA_D58 FBA_D59 FBA_D57 FBA_D60 FBA_D63 FBA_D61 FBA_D62 FBA_D54 FBA_D55 FBA_D52 FBA_D53 FBA_D48 FBA_D51 FBA_D49 FBA_D50 FBA_D46 FBA_D40 FBA_D45 FBA_D41 FBA_D47 FBA_D42 FBA_D44 FBA_D43 FBA_D33 FBA_D35 FBA_D32 FBA_D37 FBA_D39 FBA_D36 FBA_D34 FBA_D38

FBA_CMD25 FBA_CMD22 K5 FBA_CMD23 K10 FBA_CMD20 K11 FBA_CMD19 H10 FBA_CMD17 H11 FBA_CMD18 FBA_CMD27 FBA_CMD26

FBA_EDC7

FBA_EDC6

FBA_EDC5

FBA_EDC4

FBA_DBI7

FBA_DBI6

FBA_DBI5

FBA_DBI4

FBA_CMD28 FBA_CMD31

FBA_CMD30 J11 FBA_CLK1# J12 FBA_CLK1

FBA_CMD16 L12

FBA_CMD21

FBA_SEN3

FBA_CMD24

FBA Partition Memory (2 of 2)

MF=0 non- Mirror

U7203

A4/BA2/A2/BA0

M2 M4

N2 N4 T2 T4 U2

U4 M13 M11 N13 N11 T13 T11 U13 U11

DQ23/DQ15

F11 E13 E11 B13 B11 A13 A11

F2

F4

E2

E4

B2

B4

A2

A4

J5

K4

H5

A7/A8/A0/A10

D4

WCK23#/WCK01#

P4

WCK01#/WCK23#

R2 R13 C13

EDC3/EDC0

P2

DBI1#/DBI2#

D13

D2

G3

RAS#/CAS#

J3

G12

J13 J10

J2

J1

A5

U5

A10 U10

J14

J4

DQ7/DQ31 VDDQ1 DQ6/DQ30 VDDQ2 DQ5/DQ29 DQ4/DQ28

DQ3/DQ27 DQ2/DQ26 DQ1/DQ25 DQ0/DQ24 DQ15/DQ23 DQ14/DQ22 DQ13/DQ21 DQ12/DQ20 DQ11/DQ19 DQ10/DQ18 DQ9/DQ17

F13

DQ8/DQ16

DQ22/DQ14 DQ21/DQ13 DQ20/DQ12 DQ19/DQ11 DQ18/DQ10 DQ17/DQ9 DQ16/DQ8 DQ31/DQ7 DQ30/DQ6 DQ29/DQ5 DQ28/DQ4

DQ27/DQ3 DQ26/DQ2 DQ25/DQ1 DQ24/DQ0

A12/A13 A0/A10/A8/A7 A1/A9/A11/A6 A3/BA3/A5/BA1 A2/BA0/A4/BA2 A5/BA1/A3/BA3

H4

A6/A11/A1/A9

D5

WCK23/WCK01

P5

WCK01/WCK23

EDC0/EDC3 EDC1/EDC2

C2

EDC2/EDC1

P13

DBI0#/DBI3#

DBI2#/DBI1# DBI3#/DBI0#

L3

CAS#/RAS#

CKE# CK# CK

WE#/CS#

CS#/WE#

ZQ SEN

RESET# MF

Vpp/NC Vpp/NC1

VREFD1 VREFD2

VREFC

ABI#

K4G41325FE-HC28 /VGA

B1 B3

B12

VDDQ3

B14

VDDQ4

D1

VDDQ5

D3

VDDQ6

D12

VDDQ7

D14

VDDQ8

E5

VDDQ9

E10

VDDQ10

F1

VDDQ11

F3

VDDQ12

F12

VDDQ13

F14

VDDQ14

G2

VDDQ15

G13

VDDQ16

H3

VDDQ17

H12

VDDQ18

K3

VDDQ19

K12

VDDQ20

L2

VDDQ21

L13

VDDQ22

M1

VDDQ23

M3

VDDQ24

M12

VDDQ25

M14

VDDQ26

N5

VDDQ27

N10

VDDQ28

P1

VDDQ29

P3

VDDQ30

P12

VDDQ31

P14

VDDQ32

T1

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

C5

VDD1

C10

VDD2

D11

VDD3

G1

VDD4

G4

VDD5

G11

VDD6

G14

VDD7

L1

VDD8

L4

VDD9

L11

VDD10

L14

VDD11

P11

VDD12

R5

VDD13

R10

VDD14

A1

VSSQ1

A3

VSSQ2

A12

VSSQ3

A14

VSSQ4

C1

VSSQ5

C3

VSSQ6

C4

VSSQ7

C11

VSSQ8

C12

VSSQ9

C14

VSSQ10

E1

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

VSSQ14

F5

VSSQ15

F10

VSSQ16

H2

VSSQ17

H13

VSSQ18

K2

VSSQ19

K13

VSSQ20

M5

VSSQ21

M10

VSSQ22

N1

VSSQ23

N3

VSSQ24

N12

VSSQ25

N14

VSSQ26

R1

VSSQ27

R3

VSSQ28

R4

VSSQ29

R11

VSSQ30

R12

VSSQ31

R14

VSSQ32

U1

VSSQ33

U3

VSSQ34

U12

VSSQ35

U14

VSSQ36

B5

VSS1

B10

VSS2

D10

VSS3

G5

VSS4

G10

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L5

VSS10

L10

VSS11

P10

VSS12

T5

VSS13

T10

VSS14

+FBVDDQ

GND

77MEM _VREF_CTL

+FBVDDQ

R7235 549Ohm /VGA

1 2

FBA_VREFC0

R7236

1.33KOhm /VGA

1 2

GND

1 2

61

2

GND

R7238 1 2 0Ohm

/VGA

R7237 931Ohm /VGA

Q7201A UM6K1N

/VGA

+FBVDDQ

R7220 549Ohm @/VGA

1 2

FBA_VREFC1

MEM_VREF_CTL

R7222 931Ohm @/VGA

1 2

34

Q7201B

5

UM6K1N

/VGA

GND

+FBVDDQ

12

0603

12

C7225 C7226 10UF/6.3V 10UF/6.3V10UF/6.3V @/VGA /VGA /VGA

C7227

12

C7235C7236

4.7UF/6.3V 4.7UF/6.3V 10UF/6.3V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 1UF/6.3V 4.7UF/6.3V 1UF/6.3V 1UF/6.3V1UF/6.3V /VGA /VGA /VGA /VGA /VGA /VGA /@VGA @/VGA @/VGA @/VGA /VGA @/VGA /VGA @/VGA @/VGA/@VGA

12

C7251 C7252 C7253 C7254

0.1UF/10V /VGA

12

C7237 C7238 C7239 C7240 C7241 C7242 C7243 C7244 C7245 C7246 C7247 C7248 C7249C7250

12

1UF/6.3V

/VGA

12

C7228

C7229

10UF/6.3V

/VGA

@/VGA

12

2.2UF/6.3V /VGA

12

C7255 C7256 C7257 C7258

2.2UF/6.3V /VGA

12

C7231

C7230 10UF/6.3V @/VGA

C7232 C7233 10UF/6.3V 10UF/6.3V10UF/6.3V

10UF/6.3V

@/VGA @/VGA@/VGA

@/VGA

12

1UF/6.3V

2.2UF/6.3V

/VGA

LD R1.2 [chip] Add Ce7201/02

12

+ CE7201

+ CE7202

C7234

470uF/2V

@/VGA

2 1

12

C7259

C7260

2.2UF/6.3V

/VGA

12

C7261 1UF/6.3V /VGA

12

C7262

C7263

1UF/6.3V

/VGA

12

C7264 1UF/6.3V

C7266

C7265

1UF/6.3V

0.1UF/10V

/VGA

GND

R7221

1.33KOhm @/VGA

1 2

GND

A/D_DOCK_I N

P_CHG_CMP OUT_1091

A/D_MAX_P OWER31 MB_MA X_POW ER31

200mil

PC8905 1000PF/50 V

1 2

A/D_DOCK_I N

AD : 17.8V

P_CHG_ACD ET_1091

PC8917 47PF/50V

SMB0_DAT31,61

SMB0_CLK31,61

P_CHG_CMPI N_1091

D

3

12

PQ8901 QM3056M6AC

1 2

G S

2

P_CHG_ACM OS_G_20

12

PR8905 1MOhm

PR8929 127K Ohm

12

PR8909 100K Ohm @

PR8916 0Ohm 5%

1 2

1

P_IMVP8_P SYS_INF O81

PR8924 20KOh m

PSL8901 @

1 2

0402

1 2

0402

PSL8903 @

P_CHG_ACM OS_S_20

1

PR8937

4.7MOhm

2

12

P_CHG_REG N_20

AC_IN_OC#31,77

2 1

1 2

12

PC8922

0.047UF/50 V

nbs_c0603 _h37_00 0s

PR8934

4.02 KOHM

PC8912

0.1UF/25V

<=40W <=120W >=120W

PQ8902 QM0930M3

3

S G

D

5

2 1

4

PR8936

4.02 KOHM

PSL8902

2 1

0402

@

P_CHG_ACD ET_10

+3VACC+3VACC

12

PR8914 100K Ohm

PR8903

93.1 KOhm

1 2

P_CHG_PA TH_19V_ SHAPE

12

PR8911

1 2

100K Ohm

PQ8905A

PC8907 47PF/50V

2 1

P_CHG_IDC HG_10 P_CHG_PMON _10 P_CHG_PRO CHOT#_1 0 P_CHG_SDA _5 P_CHG_SCL _5

BAT1_IN_OC#31

+3VSUS

PR8828 SET x : 0V =>0 OHM 30W: 0.4V =>14k 40W: 0.8V =>32k 45W: 1.2V =>57.6k 65W: 1.6V =>93.1k 75W: 2.0V =>150k 90W: 2.4V =>270k 120W: 2.8V =>560k x : 3.3V =>@

A/D_DOCK_I N

2

1 6

EM6K1-G-T2 R

P_CHG_IAD P_10

PSL8904

0402

AC_OK

21

1 2

10KOh m

BAT

@

PR8933

12

PU8901

8 9 PMON

10 PROCHOT#

11

SDA

12 SCL 13 C MPIN

14

CMPOU T

SN2867RU YR

IDCHG

0.1UF/25V

PR8928

1 2

1KOhm

PC8910

0.1UF/25V @

2

1

PC8909

PD8903 BAT54CW

IADP

15 BATPRES#

PR8938 10mOHM nbs_r0612_ h28_000 s

1 2

PJ8803 .PJ8804 請從PR88 06內側中間拉線。

12

@

12

P_CHG_ACO K_10

P_CHG_ACD RV_20

P_CHG_CMSRC_20

P_CHG_ACP _10

P_CHG_AC N_10

4

6

3

2

7

5

1

ACP

ACN

ACOK

ACDET

ACDRV

CMSRC

16 TB_STAT#

17 BATSRC

18 BATDRV

19 SRN

20 SRP

21 ILIM

P_CHG_BATDRV_20

P_CHG_SR N_10

P_CHG_BATPRES#_10

P_CHG_TB_STA T#_10

P_CHG_BA TSRC_20

P_CHG_SRP _10

nbs_r1206_ h28_000 s

3

1 2

PSP8903 SHORT_PAD

PC8903

0.1UF/25V

1 2

33

GND6

32

GND5

31

GND4

30

GND3

29

GND2

28

VCC

27 P_CHG_VC C_20

PHASE

26 P_CHG_ LX_30

HIDRV

25 P_CHG_HG_3 0

BTST

24 P_CHG_BS T_30

REGN

23 P_CHG_REGN _20

LODRV

22 P_CHG_LG_ 30

GND1

P_CHG_ILIM_1 0

12

PR8919 100K Ohm

nbs_r0603_ h39_000 s

1 2

10OHM PR8912

PR8932 10Oh m 5%

12

nbs_r0603_ h39_000 s

1 2

10OHM PR8931

PSP8904 SHORT_PAD

@

PC8915

0.1UF/25V

PC8926

0.1UF/25V @

P_CHG_VCC _20

1 2

PR8921

180K Ohm

I limit : Charge 6 A

DisCharge 24A

PR8938 25m 10m 5m

12

PC8921 1UF/25V nbs_c0603 _h37_00 0s

PR8918 0Ohm

1 2

P_CHG_BS T_R_30

P_CHG_REG N_20

12

PC8920

2.2UF/16V

12

PC8913

0.1UF/25V

12

PC8929

0.1UF/25V

+3VA

1

12

PC8901

0.1UF/25V

P_CHG_PRO CHOT#_1 0

EPC NB G

1 2

P_CHG_LX_ 30

12

PC8928

0.047UF/50 V

nbs_c0603 _h37_00 0s

3

P_CHG_LG_30

PD8901 BAT54CW

2

1 2

+5VS_PW R

PR8917 150K OHM

1 2

PR8927 10KOhm @

PR8901 0Ohm

PR8908 10KOhm @

for shipping mode

12

PR8940 20KOh m

@

PR8923

4.02 KOHM

PC8914 2200PF/50 V @

P_CHG_BA TSRC_20

SHORT_PAD

1

PSP8902

2

@

12

P_PL_AC_ THROTTL E_GPU_10

1

12

+P CE8904

68UF/25V @

h=6m m

PR8922 1MOhm @

1 2

P_CHG_BA TDRV_20

12

PCI8901 PCI8902 10UF/25V 10UF/25V

nbs_c0805 _h57_00 0s

nbs_c0805 _h57_000s

PL8901

3.3UH Irat=6. 5A

2 1

[HE]CYNT EC/PEUB 063T-3R 3MS

PC8925

@

1000PF/50 V

P_CHG_SNB _20

PR8910 @ 1Ohm

PD8902 BAT54CW

2

3 P_PL_AC_ THROTTLE _10

1

PR8913 1MOhm

5

200mil

12

@

4 3 1 2

AC_BAT_S YS

5

D

PQH8901

QM1830M3

4

G S

123

2 1

5

D

PQL8901

QM1830M3

nbs_c0603 _h37_00 0s

4

G S

12

123

nbs_r1206_ h30_000 s 5%

PR8920 150K OHM

1 2

PQ8908A EM6K1-G-T2 R

2

NEW_ PWRLI MIT#_C P

U

1 6

AC_OK

12

P_CHG_RSE NS_SHA PE

SHORT_PAD

PSP8901

EM6K1-G-T2 R

PQ8905B

PC8908 270PF/50V

2 1

+ PCE8901

68UF/25V

1

2

@

AC_BAT_S YS

h=6m m

PR8926 10mOHM

nbs_r0612_ h28_000 s

1 2

240mil

D

4

G S

1

2 5

2

P_CHG_BA TDRV_G_2 0

1 2

PC8918

0.01UF/50V

PR8906 10OHM nbs_r0603_ h39_000 s

1 2

240mil

10UF/25V

PC8906

12

PR8935 0Ohm @

1 2

PQ8904B EM6K1-G-T2 R

5

4 3

PR8942 100Oh m

1 2

PQ8908B EM6K1-G-T2 R

5

4 3

VGA_ALERT_P# ---> GPIO9 dGPU_PD# ---> GPIO12

PR8904 0Ohm

1 2

1@ PR8925 2

0Ohm

PQ8904A EM6K1-G-T2 R

2

1 6

QM0930M3

PQ8903

3

10UF/25V

PC8916

AC_BAT_S YS

10UF/25V

PC8924

12

PWRLIMIT_E C# 31

PWRLIMIT#_ CPU 9

VGA_ALER T_P# 77

dGPU_ PD# 77

PJP8901 @ 3MM_OP EN_5MI L

2 1

12

BAT_CONBAT

BOM

Title :

PW_CHARGER

Size

Dept.:

A2

Date: Wednesday, March 07, 2018

NB Power Team

Project Name

X540UVK

Enginee r:

Sheet 90

Rev

R0.1

Andy

of 102

Address Selecti on Table

Address

0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70

PR9001 10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k

PR9002 Open 8.2k 6.2k 6.8k 4.7k 3.6k 2.7k 2k

Registe r Address

0x00 0x01 0x02 0x03 0x04 0x0 5 0x06

Address

R/W

W W W

Temp. alert thresholds etting

Function

R R R R

Sensed temp. data

bit 4 =0

bit 5 =0

bit 6 =0

WhenALERT# assert

Address Selecti on Table

Address

0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70

PR9008 10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k

PR9009 Open 8.2k 6.2k 6.8k 4.7k 3.6k 2.7k 2k

PTR9000 place near PQ890 1 Close to ACF ET

PTR9000 100k Ohm

12

PC9000

0.1UF/25V

2 1

PTR9002 place near BAT Conne ct

105C @ 5k PTR900 1 40C @51k

100k Ohm

12

PC9001

0.1UF/25V

2 1

GND

PTR9002 place near PL8901 or PQL8901(CHG page)

PTR9002

105C @5k

100k Ohm

40C @51k

12

PC9002

0.1UF/25V

2 1

GND

DC Jack Thermal Latch

P_LATCH_ ACDET_1 0

P_TEMPSE NS_VCC_ 30

PR9003 12KOH M

2 11%

1.0 ~3 .56V

PR9004 12KOH M

2 1

1%

1.0 ~3 .56V

PR9005 12KOH M

1%

1.0 ~3 .56V

PSL9003

SHORT_LA ND

1

2

0402

P_LATCH_ OUT_10

PQ9001B EM6K1-G-T2 R

PR9013 20KOh m

12

P_TEMPSE NS_ADDR _10 P_TEMPSE NS_TM3_1 0 P_TEMPSE NS_TM2_1 0 P_TEMPSE NS_TM1_1 0

5

P_LATCH_ OUT#_10 PQ9001A

4 3

GND

P_CHG_ACD ET_10 90

PR9001 10KOh m

2

PR9002 2KOHM

1 @ 2

P_CHG_REG N_20

1 2

1 P_TEMPSE NS_VCC_ 30

GNDGND

PR9014

100K Ohm

EM6K1-G-T2 R

1 2 3 4

1 6

GND

PU9000

ALT/ADD TM3 TM2

TM1

UP190 5AMA8

P_CHG_REG N_20

2

ALERT# pull low if sens ed temp . is higher than sett ing

8

SDA

7

P_TEMPSE NS_SDA_ 30

SCL

6

P_TEMPSE NS_SCL_ 30

GND

5

VCC5

P_TEMPSE NS_VCC_ 30

GND

+5VSUS_PW R

PR9006 2.2 Ohm 5% nbs_r0603_ h24_000 s

12

PR9017 10KOh m

P_CHG_CMPI N_1090

P_CHG_CMP OUT_10 90

PR9018

1 2

10KOh m

1 2

12

GND

PTR9 003 plac e near DCJACK

PC9003 1UF/16V nbs_c0603 _h37_00 0s

PC9008

1UF/25V

PC9005 47PF/50V @

1 2

PSL9001 GND 1

2

0402

P@SL9002

2 1

0402

@

1 2

PC9004 47PF/50V GND @

P_CHG_REG N_20

12

GND

1 2

PTR9003 100k Ohm

PR9022

7.32 KOhm

SMB1_DAT 29, 31,91

SMB1_CLK 29, 31,91

Check 其他頁是否有 pull high 到 3.3V

47KOH M

2

47KOH M

PTR9004

PC9007

0.1UF/25V

2 1

PC9010

0.1UF/25V

2 1

0.1UF/25V

2 1

1

12

P_TEMPSE NS_6_VC C_30

PR9007 12KOH M

2 11%

1.0 ~3 .56V

PR9010 12KOH M

12

1%

1.0 ~3 .56V

PR9012 12KOH M

12

1%

1.0 ~3 .56V

PR9008

4.3K OHM

1 2

P_TEMPSE NS_6_VC C_30

PR9009

3.6K Ohm

1 2

GNDGND

P_TEMPSE NS_6_AD DR_10 P_TEMPSE NS_6_TM3 _10 P_TEMPSE NS_6_TM2 _10 4 P_GPU_VRM _TEMP_S ENSOR_1 0

1

ALT/ADD

2

TM3

3

TM2

PU9001

TM1

UP190 5AMA8

PC9006 47PF/50V @/V GA

1 2

GND

PL9001

2 1

GND

PC9009 47PF/50V GND @/V GA

PC9011 1UF/16V nbs_c0603 _h37_00 0s

0402

PSL9004 @/V GA

2 1

0402

1 2

8

SDA

P_TEMPSE NS_6_SD A_30

7

SCL

P_TEMPSE NS_6_SC L_30

6

GND

5

VCC5

P_TEMPSE NS_6_VC C_30

GND

+5VSUS

1 2

PR9011 2 .2Ohm 5% nbs_r0603_ h24_000 s

@/V GA

SMB1_DAT 29, 31,91

SMB1_CLK 29 ,31,91

Check 其他頁是否有 pull high 到 3.3V

PTR7807 place near VRAM.

TR7806 place nearGPU

105C @ 5k P TR9005 40C @ 51k

GND

P_GPU_VRM _TEMP_S ENSOR_1 092

P_GPU_VRM _TEMP_S ENSOR_1 0

105C @ 5k PC9012 40C @ 51k

GND

Title :

PW_PROTECTION

Size

Dept.:

A2

Date: Wednesday, March 0 7, 2018

NB Power Team

Project Name

X540UVK

Enginee r:

Sheet 91

Rev

R0.1

Andy

of 102

82

P_IMVP8_CORE1_HG_30

P_IMVP8_CORE1_LX_30

82

P_IMVP8_CORE1_LG_30

82

82 P_IMVP8_GT_HG_30 82 P_IMVP8_GT_LX_30 82 P_IMVP8_GT_LG_30

82 P_IMVP8_CORE_VIN_S

P_IMVP8_CORE2_PWM_1082

P_IMVP8_CORE_DRVEN_10

VREF_0.6V

12

PR8001

12.1KOhm 1%

12

PR8027

2.61KOHM 1%

12

PR8024 22Ohm 5%

Skylake IMVP8 Power [For CPU]

PSL8001

PC8026 47PF/50V

2 1

PR8060

1 2

0Ohm

PR8042

1 2

0Ohm

+VCCGT 1

1 2

PC8065

4.7UF/6.3V

PR8061

0Ohm

PR8044

0Ohm PR8064

PR8029

49.9KOhm

1

ADP=65W

1 2

1

IMON_MAIN

2

SET1

3

FB_MAIN

4

COMP_MAIN

5

SET2

6

SET3

7

ISEN1N_MAIN

8

ISEN2N_MAIN

9

ISEN2P_MAIN

10

ISEN1P_MAIN

11

TSEN_MAIN

12

VIN

13

PR8050 100Ohm

PR8059 100Ohm

PR8025 100Ohm

100Ohm

1 2

0402

PR8020 0Ohm 5%

VCC

PR8008 1Ohm 5%

nbs_r0603_h24_000s

2 1

12

2

Psys FF=3.2V PR8029 33W - 97.6K /10G21297621 4031 45W - 71.5K /10G21271521 4030 65W - 49.9K /10G21249921 4030 90W - 35.7K /10G21235721 4030 120W - 26.7K /10G212267 214031

PR8056

8.25kOhm 1%

PR8018 22KOhm 1%

1 2

PR8039 30KOHM 1%

Frequency=500kHz

12

PR8046

26.1KOhm 1%

12

PR8006

18.7KOhm 1% PR8031 1 49. 9Ohm 2 PSL8002

Place C lose to PL81 02

P_IMVP8_CORE_TSEN_R_10

1 2

PR8057

12

PR8035

PR8048

11.5KOHM

5.76KOhm 1%

1%

12

PR8026

PR8058 300Ohm

49.9Ohm 1%

1%

PR8065 330KOHM 1%

12

PR8033 330KOHM 1%

110KOHM 1%

PTR8002

1 2

100kOhm 1%

Place Close to PQ L8102

P_IMVP8_PSYS_INFO90 IMVP8_PWRGD 26,31

P_VCCCORE_VCCSENSE_ R_50ohm

12

PR8045

1 2

PC8079

0.01UF/50V

3.6KOhm 1%

P_IMVP8_CORE_IMON_10 P_IMVP8_SET1_10 P_IMVP8_CORE_FB_10 P_IMVP8_CORE_COMP_10 P_IMVP8_SET2_10 P_IMVP8_SET3_10 P_IMVP8_CORE_CSN1_10 P_IMVP8_CORE_CSN2_10 P_IMVP8_CORE_CSP2_10 P_IMVP8_CORE_CSP1_10 P_IMVP8_CORE_TSEN_10

P_IMVP8_VIN_10

P_IMVP8_VCC_20

2 1

PR8062 1Ohm

+5VSUS_PWR

2 1

1 2

PTRL8002

100kOhm 1%

2 1

PR8054 10OHM

P_IMVP8_CORE_VIN_S

PC8081

1 2

47PF/50V

Place C lose to CPU

+VCCCORE

7 P_VCCCORE_VCCSENSE_50ohm

7 P_VCCCORE_VSSSENSE_50ohm

Place C lose to CPU

7 P_VCCGT_VCCSENSE_50ohm

7 P_VCCGT_VSSSENSE_50ohm

21

2

GND5 57GND4 56GND3 55GND2 54GND1

VREF_0.6V

P_IMVP8_CORE_VSN_10

P_IMVP8_CORE_VSEN_10

P_IMVP8_PSYS_10

53

52

51

50

49

PSYS

FB_SA

RGND_SA 48COMP_SA

VSEN_MAIN

RGND_MAIN

14 BOOT_SA

15 UGATE_SA

16 PHASE_SA

17 LGATE_SA

18 PVCC

19 LGATE_MAIN20 PHASE_MAIN21 UGATE_MAIN22 BOOT_MAIN

P_IMVP8_PVCC_20

12

PC8053

2.2UF/6.3V

@

PC8023

1 2

1000PF/50 V

2 1

PC8007 1000PF/50 V

P_VCCCORE_VSSSENSE_R_ 50ohm

@

PC8024

1 2

1000PF/50 V

P_VCCGT_VCCSENSE_R_50o hm

2 1

PC8025 1000PF/50 V

P_VCCGT_VSSSENSE_R_50o hm

47

46

P_IMVP8_CORE1_LG_30

P_IMVP8_CORE1_LX_30

1

P_IMVP8_SA_CSN_10

P_IMVP8_SA_CSP_10 2

45

44

ISENP_SA

ISENN_SA

VREF06/PSET

PR8037 1Ohm

P_IMVP8_CORE1_HG_30

P_IMVP8_CORE1_BST_30

2 1

PC8030

0.1UF/25V

nbs_c0603 _h37_000s

PR8000 P_IMVP8_VREF_0.6V_S

3.9Ohm 1% PC8000

1 2

PR8030

53.6KOhm 1%

IMVP8_PWRGD_L

P_IMVP8_EN_10 P_IMVP8_CORE2_PWM_10

P_IMVP8_SA_IMON_10

43

42

41

40

EN

IMON_SA

PWM_MAIN

VR_READY

IMON_AUXI ISENP_AUXI ISENN_AUXI

VSEN_AUXI COMP_AUXI RGND_AUXI

TSEN_AUXI

23 LGATE_AUXI24 PHASE_AUXI25 UGATE_AUXI26 BOOT_AUXI

P_IMVP8_GT_BST_30

P_IMVP8_GT_LX_30 P_IMVP8_GT_LG_30

1 2

12

0.47UF/16V

1 2

PU8001 ATK1604ACGQW

39

DRVEN

38

P_IMVP8_CORE_DRVEN_10

VCLK

37

P_SVID_CLK_X1

ALERT#

36

P_SVID_ALERT#_X1

VDIO

35

P_SVID_DATA_X1

VR_HOT#

34

P_IMVP8_VR_HOT#_10

33

P_IMVP8_GT_IMON_10

32

P_IMVP8_GT_CSP_10

31

P_IMVP8_GT_CSN_10

30

P_IMVP8_GT_VSEN_10 P_VCCGT_VCCSENSE_R_50o hm

29

P_IMVP8_GT_COMP_10

28

P_IMVP8_GT_VSN_10

FB_AUXI

27

P_IMVP8_GT_FB_10

PR8004 1Ohm

1 2

P_IMVP8_GT_BST_R_30P_IMVP8_GT_HG_30

1 2

PC8010

0.1UF/25V

nbs_c0603 _h37_000s

P_IMVP8_CORE1_BST_R_30

PC8008

PR8040

100Ohm

1

PC8020 1000PF/50 V

@

PR8043

100Ohm

1

PC8021 1000PF/50 V

@

220PF/50V

2 1

PR8070 10KOhm 1%

2

2 +5VSUS_PWR @

2

2 +5VSUS_PWR @

PC8009 220PF/50V

2 1

PR8073 10KOhm 1%

2 1

82PF/50V

PR8053

54.9KOhm 1%

1

1 2

PR8023 22KOhm 1%

1

1 2

PC8016

0402

PSL8006

2 1

82PF/50V

0402

PSL8007

PC8011

PC8080 47PF/50V

21

PR8011 PR8041

45.3Ohm 110Ohm @

PR8032 1 10Ohm 2

1 2

PR8009 0Ohm 5%

1 2

PR8028 110KOHM 1%

PTR8001

1 2

100kOhm 1%

Place C lose to PQL8 101

Place C lose to PU80 01

P_IMVP8_CORE_COMP_10P_VCCCORE_VCCSENSE_ R_50ohm

P_IMVP8_CORE_FB_10

P_IMVP8_CORE_VSN_10

Place C lose to PU80 01

P_IMVP8_GT_COMP_10

P_IMVP8_GT_FB_10

P_IMVP8_GT_VSN_10

P_IMVP8_SVID_VCC_10

12

0402

P_IMVP8_GT_TSEN_R_10P_IMVP8_GT_TSEN_10

1 2

21

174KOhm

PR8019

PSL8004

PSL8005

21

0402

PR8034 1Ohm 5% nbs_r0603_h24_000s

12

PC8015

PR8010

0.1UF/25V

100Ohm

2 1

nbs_c0603 _h37_000s

1 2

PR8074 100Ohm

VREF_0.6V

PR8013 37.4K Ohm 1%

1 2

VREF_0.6V

1 2

PR8002

8.66KOhm 1%

1%

2 1

P_IMVP8_CORE_ISEN-_1082

P_IMVP8_CORE_ISEN+_1082

P_IMVP8_CORE_ISEN2-_1082

P_IMVP8_CORE_ISEN2+_1082

ALL_SYSTEM_PWRGD 26,31,59,70

+VCCST

12

P_SVID_CLK_50OHM_X2 P_SVID_ALERT#_50OHM_X2 P_SVID_DATA_50OHM_X2 IMVP8_VRHOT#

Disable SA @ 10Kohm 0ohm 0ohm

Enable SA 0ohm @ 4.7Kohm 2.37Kohm

P_IMVP8_SA_CSP_10

P_IMVP8_SA_CSN_10

P_IMVP8_GT_ISEN-_1082

P_IMVP8_GT_ISEN+_1082

P_IMVP8_GT_CSP_10

P_IMVP8_GT_CSN_10

P_IMVP8_CORE_CSP1_10

P_IMVP8_CORE_CSN1_10

P_IMVP8_CORE_CSP2_10

P_IMVP8_CORE_CSN2_10

PR8005 PR8075 PR8017

U42

0ohm @ @

U22

7

9

PR8063 PR8072 PR8038 PR8052

PR8067 2KOhm 1%

1 2

PR8068

1.1KOhm 1%

1 2

P_IMPV8_CORE1_LX_R_10

PR8069

1.1KOhm 1%

1 2

/U42

0ohm@ 1Kohm

7

P_IMPV8_GT_LX_R_10

P_IMPV8_CORE2_LX_R_10

PR8051 PR8069

1.1Kohm

PR8055 2KOhm 1%

1 2

PR8016

1.1KOhm 1%

1 2

PR8051

1.1KOhm 1%

1 2

@

P_IMVP8_GT_CSP_R_10

/U42

1.1Kohm

@

PR8003 PR8066

1.4Kohm 1.4Kohm

PR8052 0Ohm 5%

1 2

PR8007

2.74KOhm 1%

1 2

@

PC8002

0.1UF/16V

1 2

PR8014

4.7KOhm 1%

1 2

PTRL8004

1 2

4.7KOhm 3%

Place C lose to PL81 01

PC8003

0.1UF/16V

1 2

PR8015 590OHM @

1

PC8004

0.1UF/16V

PR8017

0Ohm /U22

1

2

PC8001

@

0.1uF/25V

PR8072 1KOhm

1 2

+5VSUS_PWR

N/A

PC8006

0.1UF/25V

2 1

PC8012

0.1UF/25V

2 1

2

PC8018

0.1UF/25V

2 1

12

PR8005 /U42 0Ohm

5%

1 2

/U42

PR8075 /U22

1KOhm

1

2

+5VSUS_PWR

PC8014

0.1UF/25V

2 1

N/A

Main Board

DDI2 mapping

Displ ay Port

A EDP

B

C HDM I

HDMI_DATA2N_PCH

49

HDMI_DATA2P_PCH

49

HDMI_DATA1N_PCH

49

HDMI_DATA1P_PCH

49

HDMI_DATA0N_PCH

49

HDMI_DATA0P_PCH

49 49

HDMI_CLKN_PCH

49

HDMI_CLKP_PCH

PDG#543016 DDI1 mapping DDPB

COMPENSA TION PU FOR DP

DDPC

+VCCSA

R0301

24.9Ohm 20170717 Brian 1%

1 2

EDP_COMP

Change R0301.2 +VCCIO_CPU to +VCCSA for CPU VCORE p lane.

49 49

DDPB_SCL_PCH DDPB_SDA_PCH

DDPC_SCL_PCH DDPC_SDA_PCH

EDP_COMP

U0301A

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLCLK

L12

GPP_E19/DDPB_CT RLDATA

N7

GPP_E20/DDPC_CT RLCLK

N8

GPP_E21/DDPC_CTRLDATA

N11

GPP_E22/DDPD_CTRLCLK

N12

GPP_E23/DDPD_CTRLDATA

E52

EDP_RCOMP

SKL-ULT

Intel Version ASUS P/N

DDI

DISPLAYSIDEBANDS

EDP

EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]

EDP_AUXN EDP_AUXP

EDP_DISP_UTIL

DDI1_AUXN DDI1_AUXP DDI2_AUXN

DDI2_AUXP DDI3_AUXN DDI3_AUXP

GPP_E13/DDPB_H PD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_H PD3

GPP_E17/EDP_HPD

EDP_BKLTEN

EDP_BKLTCTL

EDP_VDDEN

C47

C46 D46 C45 A45 B45 A47

B47

E45

F45

B52

DP_UTIL

G50

F50 E48 F48

DDI2_AUX_DN

G46

DDI2_AUX_DP

F46

L9

L7 L6 N9

EXT_SMI# SL0304

L10

EXT_SCI#_X1

EDP_HPD_CON

R12

R11

LCD_BACKEN_PCH_X1

U13

L_BKLTCTL_PCH_X1 L_VDDEN_PCH_X1

R0302 0Ohm@

1 2

T0301

1

T0302

1

1 2

0402

SL0301 SL0302 SL0303

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_AUXN EDP_AUXP

1 2

0402

1

0402

1

0402

HDMI_HP EXT_SMI# EXT_SCI# EDP_HPD_CON

2 2

46 46 46 46

46

49 31

31

46

L_BKLT_EN EDP_BRIGHTNESS L_VDDEN_PCH

+3VS

R0305 10KOhm

EXT_SMI#

EXT_SCI#_X1

DDPB_SCL_PCH R0307 DDPB_SDA_PCH

2016021 7 X541UV/UA R1.1 Unstuff R0304

46

2017050 5 X540UPR2 DEL DSUB CONN

46

2017051 1 X506UA De l R0303

46

/Chane R0307 to @

R0306

R0304

1 1

@

1

@

1 2

2

10KOhm

2

10KOhm

2

10KOhm

BOM

Title :

Size

Custom

Date:

Wednesday, March 07, 2018

Project Name

X407UA/UV

CPU_DISPLAY

Dept.:

ASUSTeK COMPUTER INC. Engineer:

Brian Chen

Sheet

Rev

R1.0

of 102

4

29 29 29 29

Main Board

U0301E

SPI - FLASH

SPI0_C LK SPI0_M ISO SPI0_M OSI SPI0_IO2 SPI0_IO3 SPI0_C S0# SPI0_C S1# SPI0_C S2#

SPI - TOUCH GPP_C7 /SML1DATA

M2

GPP_D1 /SPI1_CLK

M3

GPP_D2 /SPI1_MIS O

J4

GPP_D3 /SPI1_MOS I

V1

GPP_D2 1/SPI1_IO2

V2

GPP_D2 2/SPI1_IO3

M1

GPP_D0 /SPI1_CS#

G3

CL_CLK

G2

CL_DATA

G1

CL_RST#

GPP_A0 /RCIN#

GPP_A6 /SERIRQ

SKL-ULT

REV = <R EV>

C LINK

LPC

CL_CK CL_DATA CL_RST#

AW13

AV2

AW3

AV3

AW2

AU4 AU3 AU2 AU1

AY11

SPI_CL K_SPI_2

29

SPI_SO_ SPI_2 SPI_SI_ SPI_2 PCH_SP I_DQ2 PCH_SP I_DQ3

29

SPI_CS #0_SPI_2

R0503 1 R0510 1 R0509 1 2 15Ohm R0539 1 R0540 1

SL050 4

2 1

0402

RC_IN#31,70

INT_SERIR Q31

2 15Ohm 2 15Ohm

T0502 T0501 T0503

SPI_CL K_SPI_2_X1 SPI_SO_ SPI_2_X1 SPI_SI_ SPI_2_X1 PCH_SP I_DQ2_X1 PCH_SP I_DQ3_X1 SPI_CS #0_SPI_2_X1

1 1 1

INT_SERIR Q

SMBUS, SMLI NK

GPP_B2 3/SML1ALERT# /PCHHOT#

GPP_A5 /LFRAME#/E SPI_CS#

GPP_A1 4/SUS_STA T#/ESPI_RE SET#

GPP_A9 /CLKOUT_LP C0/ESPI_CLK

GPP_C0 /SMBCLK

GPP_C1 /SMBDATA

GPP_C2 /SMBALERT#

GPP_C3 /SML0CLK

GPP_C4 /SML0DATA

GPP_C5 /SML0ALERT#

GPP_C6 /SML1CLK

GPP_A1 /LAD0/ESPI_ IO0 GPP_A2 /LAD1/ESPI_ IO1 GPP_A3 /LAD2/ESPI_ IO2 GPP_A4 /LAD3/ESPI_ IO3

GPP_A1 0/CLKOUT_L PC1

GPP_A8 /CLKRUN#

R7 R8

SMB_C K

R10

SMB_D ATA

GPP_C2

R9 W2

SML0_ CK

W1

SML0_ DATA

GPP_C5

W3 V3 AM7

SML1A LERT#

AY13 BA13 BB13 AY12 BA12 BA11

AW9 AY9

CLK_K BCPCI_PCH_X1

AW11

CLK_TPM PCI_PCH_X1

PM_CLK RUN#

+3VSU S +3VS

SML1_ CK SML1_ DATA

LPC_AD0 LPC_AD1 LPC_AD2 LPC_A D3

LPC_FR AME#

R0512 1 R0514 1

/DEBUG

29,31 29,31 29,31 29,31

X507 Modify R 0514 optional to /DEBUG

29,31

2 33Ohm 2 22Ohm

29

1

TO DIMM / VGA / TP

T0504

CLK_K BCPCI_PCH CLK_DE BUG

PM_CLK RUN#

31

29

31

+3VS

R0522 8.2 KOhm

R0519 1 2 10KOhm

+3VSU S

1

R0508 2 15 0KOHM

RN0501 B 2 .2KOHM

RN0501 A 2 .2KOHM

RN0502 B 2 .2KOHM

RN0502 A 2 .2KOHM

3 4

1 2

3 4

1 2

+12VS

12

34

RN0503 A

12

PM_CLK RUN#

INT_SERIR Q

SML1A LERT#

SML1_ CK

SML1_ DATA

SML0_ CK

SML0_ DATA

2.2KOH M 2.2KOH M

SMB_C K

SMB_D ATA

RN0503 B

Q0501A

EM6K1 -G-T2R

2

61

EM6K1 -G-T2R

Q0501B

5

34

SMB_C K_S3

SMB_D ATA_S3

RN0504 A

2.2KOH M

34

12

RN0504 B

2.2KOH M

SMB_C K_S3 17,18

TO DIMM

SMB_D ATA_S3 17,18

Transp ort Lay er Secur ity (TLS ) Con fident ialit y

+3VSU S

@

R0507 10KOhm

1 2

GPP_C5: weak internal pull down

PU SPI BUS

PD LPC is se lected for EC (Default)

GPP_C5 GPP_C2

+3VSU S

@

R0506 10KOhm

1 2

GPP_C2: weak internal pull down

PU Enable

PD

Disabl e Intel ME TLS ipher s uite ( no confodentiality)(Default)

BOM

Title :

CPU_LPC,SPI,SMB,CLINK

Size

Dept.:

Custo m

Date: W ednesday, M arch 07,2018

Project Name

X407UA/UV

ASUSTe K COMPUTER INC. Engineer:

Sheet

Brian Chen

6 of

ev

R1.0

102

+VCCCOR E

U0301L

CPUPOWER1OF4

A30

VCC_A30

A34

VCC_A34

A39

VCC_A39

A44

VCC_A44

AK33

VCC_AK 33

AK35

VCC_AK 35

AK37

VCC_AK 37

AK38

VCC_AK 38

AK40

VCC_AK 40

AL33

VCC_AL3 3

AL37

VCC_AL3 7

AL40

VCC_AL4 0

AM32

VCC_AM 32

AM33

VCC_AM 33

AM35

VCC_AM 35

AM37

VCC_AM 37

AM38

VCC_AM 38

G30

VCC_G30

K32

RSVD_K 32

AK32

AB62

RSVD_A K32

VCCOPC_ AB62

P62

VCCOPC_ P62

V62

VCCOPC_ V62

H63

VCC_OPC _1P8_H63

G61

VCC_OPC _1P8_G61

AC63 REV =<REV>

VCCOPC_ SENSE

AE63

VSSOPC _SENSE

AE62

VCCEOP IO_1

AG62

VCCEOP IO_2

AL63

VCCEOP IO_SENSE

AJ62

VSSEOPI O_SENSE

SKL-ULT

CPU W/OPC

+VCCIO +VCCSTG

1 2

SL0630

0.04A

0603

Volume Segment +VCCIO is supplied +1.0VS (shared with +VCCSTG)

+VCCCOR E

G32

VCC_G32

G33

VCC_G33

G35

VCC_G35

G37

VCC_G37

G38

VCC_G38

G40

VCC_G40

G42

VCC_G42

J30

VCC_J30

J33

VCC_J33

J37

VCC_J37

J40

VCC_J40

K33

VCC_K33

K35

VCC_K35

K37

VCC_K37

K38

VCC_K38

K40

VCC_K40

K42

VCC_K42

K43

VCC_K43

E32

VCC_SE NSE

P_VCCCO RE_VCCSENSE_5 0OHM 81

E33

VSS_S ENSE

P_VCCCO RE_VSSSENSE_ 50OHM

B63

VIDALE RT#

A63 P_SVID_ALERT#_X3

VIDSCK

D64 P_SVID_CL K_X3 +VCCSTG

VIDSOUT

P_SVID_DATA_X3

G20

VCCSTG_G 20

P_SVID_DATA_X3

20151230 LAUOYUT此3組訊號請將 SVID ALERT 擺中間

81

P_SVID_ALERT#_X3

P_SVID_CLK_X3

SVID DATA

SL0609 1 2

0402

SVID ALERT

R0604 1 2 220Ohm

SVID CLOCK

SL0617 1 2

0402

+1.0V_VCCST

1 2

R0605 56Ohm

R1.0-3

R0606 100Ohm

1%

P_SVID_DATA_50OHM_X2 81

P_SVID _ALERT#_50OHM _X2 81

P_SVID _CLK_50OHM_X2 81

+VCCCOR E

1 2

U22_VCCGT_U42_VCCCORE

+VCCGT

1 R0654 2

0Ohm

nbs_r06 03_h24_000s

/U22

81 P _VCCGT_VCCSE NSE_50OHM

CPU - VCCGT DECAPS- Underneath the package

+VCCGT

81 P_ VCCGT_VSSSENSE _50OHM

31A 2+2

12

C0601 C 0604 C0620 C 0607 C0608 C0609 C0610 10UF/6. 3V10 UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/ 6.3V10U F/6.3V 10UF/6.3V 10UF/6.3V 10UF/6 .3V10UF /6.3V1 0UF/6.3V 10UF/6.3V

12

C0628 C0629 C06 30 C0631 C0632 C0652 C06 43 C 0654 1UF/6. 3V 1UF/6.3V 1UF/ 6.3V 1UF/6. 3V 1UF/6.3V 1UF /6.3V 1UF/6 .3V 1UF/ 6.3V

@ @ @ @ @ @ @ @

121212

C0640 C0613 C06 56 C0667

1UF/6. 3V 1UF/6.3V 1UF/ 6.3V 1UF/6. 3V

+VCCGT

R0655 0Ohm /U42

10114-00193000

R0656

1 2

0Ohm /U22

U22_VCCG T

12

@ @ @ @ @ @ @ @ @

12

A48

VCCGT1

A53

VCCGT2

A58

VCCGT3

A62

VCCGT4

A66

VCCGT5

AA63

VCCGT6

AA64

VCCGT7

AA66

VCCGT8

AA67

VCCGT9

AA69

VCCGT10

AA70

VCCGT11

AA71

VCCGT12

AC64

VCCGT13

AC65

VCCGT14

AC66

VCCGT15

AC67

VCCGT16

AC68

VCCGT17

AC69

VCCGT18

AC70

VCCGT19

AC71

VCCGT20

J43

VCCGT21

J45

VCCGT22

J46

VCCGT23

J48

VCCGT24

J50

VCCGT25

J52

VCCGT26

J53

VCCGT27

J55

VCCGT28

J56

VCCGT29

J58 J60 REV =<REV>

VCCGT31

K48

VCCGT32

K50

VCCGT33

K52

VCCGT34

K53

VCCGT35

K55

VCCGT36

K56

VCCGT37

K58

VCCGT38

K60

VCCGT39

L62

VCCGT40

L63

VCCGT41

L64

VCCGT42

L65

VCCGT43

L66

VCCGT44

L67

VCCGT45

L68

VCCGT46

L69

VCCGT47

L70

VCCGT48

L71

VCCGT49

M62

VCCGT50

N63

VCCGT51

N64

VCCGT52

N66

VCCGT53

N67

VCCGT54

N69

J70

VCCGT_SE NSE

J69

VSSGT_ SENSE

SKL-ULT

12

+1.2V

SL0610 1 2

0603

+VDDQ_C PU_CLK

12

+VCCPL L_OC

R0633 1 2 0Ohm

nbs_r06 03_h24_000s

@

C0663

1UF/6. 3V

2 1

+1.2V

+VCCST

2

SL0634 1

0603

+VCCIO 7.94A 318mil

to PJP8104 4.5A180m il to U0301N 3.4A 136mil to SL0630 0.04A1.6m il

2

SL0601 1

0805

SL0603 1 2

0805

+VCCSA

CPU - VCCSA DECAPS- Underneath the package

5.1A

U0301M

CPUPOWER2OF4

VCCGTX_AK 42 VCCGTX_AK 43

VCCGT30

VCCGT55

VCCGTX_AK 45 VCCGTX_AK 46 VCCGTX_AK 48 VCCGTX_AK 50 VCCGTX_AK 52 VCCGTX_AK 53 VCCGTX_AK 55 VCCGTX_AK 56 VCCGTX_AK 58 VCCGTX_AK 60 VCCGTX_AK 70 VCCGTX_AL 43 VCCGTX_AL 46 VCCGTX_AL 50 VCCGTX_AL 53 VCCGTX_AL 56 VCCGTX_AL 60 VCCGTX_AM 48 VCCGTX_AM 50 VCCGTX_AM 52 VCCGTX_AM 53 VCCGTX_AM 56 VCCGTX_AM 58 VCCGTX_AU5 8 VCCGTX_AU6 3 VCCGTX_BB 57 VCCGTX_BB 66

VCCGTX_SE NSE

VSSGTX_S ENSE

12

C0611 C 0626 C0617 C0660 C0659

12

VCCGT56 VCCGT57 VCCGT58 VCCGT59 VCCGT60 VCCGT61 VCCGT62 VCCGT63 VCCGT64 VCCGT65 VCCGT66 VCCGT67 VCCGT68 VCCGT69 VCCGT70 VCCGT71 VCCGT72 VCCGT73 VCCGT74 VCCGT75 VCCGT76 VCCGT77 VCCGT78 VCCGT79 VCCGT80

N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62

AK42 AK43 AK45

AK46

AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66

AK62 AL61

12

+VCCGT

R0657

1 2

0Ohm /U22f

U42_VCCC ORE

R0634 0 Ohm /@

R0635 2 0Ohm 1 /@ P_VCCGT_VCCSE NSE_50OHM

2 1 P_VCCGT_V SSSENSE_50O HM

12

C0636

C0666

1UF/6. 3V

@

20160119 X541UV SL0633-->R0633

+1.2V

+VCCCOR E+VCCGTX

R0659 0Ohm

/U42

1 2

R0658

1 2

0Ohm /U22f

C0638

1UF/6. 3V

+1.2V

C0615 10UF/6. 3V

+1.0V_VCCST

+VDDQ_C PU_CLK

+VCCSTG

+1.0V_VCCPLL

CPU - VDDQ DECAPS- Place close to the package

2A

12

C0662 C0618 C0603 C0 606 C061 4 C0658

@

10UF/6. 3V 10UF/6.3V @10UF/6.3V 10UF/6.3V

20170727 Brian Unmount C0603/C0662 For POI costdown.

+1.0V_VCCST

120mA

12

C0616 1UF/6. 3V

+VCCSA

CPU - VCCIO DECAPS- Place close to the package

3.1A

12

C0625 C0612 10UF/6. 3V 10UF/6.3V

@ @

U0301N

CPUPOWER3OF4

AU23

VDDQ_AU 23

AU28

VDDQ_AU 28

AU35

VDDQ_AU 35

AU42

VDDQ_AU 42

BB23

VDDQ_BB 23

BB32

VDDQ_BB 32

BB41

VDDQ_BB 41

BB47

VDDQ_BB 47

BB51

VDDQ_BB 51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A 22

AL23

VCCPLL_ OC

K20

VCCPLL_ K20

K21

VCCPLL_ K21

SKL-ULT

REV =<REV>

12

SL0602 1

20170717 Br ian Change SL0601.2 +VCCIO_CPU to+VCCSA for CPU VCORE plane.

12

22UF/6. 3V

+1.0V_VCCPLL+ VCCST

2

120mA

0603

12

C0622

20170718 Brian

1UF/6. 3V

2 1

Remove C0621/C0619/C0605/C0635 a nd

C0637/0655 change to mount for CPU Vcore.

12

C0649 C0650 10UF/6. 3V 10UF/6.3V

@ @

VCCIO_S ENSE VSSIO_ SENSE

VSSSA _SENSE VCCSA_ SENSE

N/A N/A

nbs_c0 603_h39_000 s

C0602 1UF/6. 3V

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA9 VCCSA1 0 VCCSA1 1 VCCSA1 2 VCCSA1 3 VCCSA1 4

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7

AK28 AK30 AL30 AL42 AM28

AM30 AM42

AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27

K28 K30

AM23 AM22

H21

H20

12

22UF/6. 3V nbs_c0 603_h39_000 s

+VCCSA

20170717 Brian Change +VCCIO_CPU to+VCCSA for CPU VCORE plane.

+VCCSA

12

N/A C06 48 22UF/6. 3V nbs_c0 603_h39_000 s

CPU - VCCGT DECAPS- Place close to the package

+VCCGT

CAP above 22UF move to PWR page

12

C0651

1UF/6. 3V

+VCCSA

CPU - VCCSA DECAPS- Place close to the package

12

C0633

C0653

1UF/6. 3V

12

C0664 C0639 C0641 C0668 10UF/6. 3V 10UF/6. 3V 10 UF/6.3V 10UF/6.3V

12

C0637 C0655 1UF/6. 3V 1UF/6.3V

12

C0657 1UF/6. 3V

@

BOM

ProjectN ame

X407UA/UV

Title : CPU_POEWR

Size

Dept.:

ASUSTeK COMPUTE R INC. Engineer: Brian Chen

D

Date: Wednesday, M arch07, 2018 S heet 7 of102

Rev

R1.0

Main Board

+1.0V_VCCST

1

T0801

R080211% 21KOhm

PECI_EC31

T0803 T0804

R0813

49.9Ohm 1%

1 2

CPU SIDEBAND SIGNALS

R0808

H_PROCHOT_D# H_PROCHOT_D#_R

1 2

499OHM

H_CATERR# PECI_EC H_PROCHOT_D# THERMTRIP#

1 1

XDP_BPM2 XDP_BPM3

R0812

49.9Ohm 1%

1 2

+VCCSTG

R0811

49.9Ohm 1%

1 2

12

R0809 1KOhm

12

C0801 43PF/50V

@

U0301D

D63

CATERR#

A54

PECI

C65

PROCHOT#

C63

THERMTRIP#

A65

SKTOCC#

C55

BPM#[0]

D55

BPM#[1]

B54

BPM#[2]

C56

BPM#[3]

A6 A7

BA5

AY5

AT16

PROC_POPIRCOMP

AU16

PCH_OPIRCOMP

H66

OPCE_RCOMP

H65

OPC_RCOMP

SKL-ULT

REV =<REV>

R0810

49.9Ohm 1%

1 2

CPUMISC

GPP_E3/CPU_GP0 PCH_JTAG_TDI GPP_E7/CPU_GP1 PCH_JTAG_TDO GPP_B3/CPU_GP2 PCH_JTAG_TMS GPP_B4/CPU_GP3 PCH_TRST#

20150108 Checking SL0801~0803 near device side

JTAG

PROC_TCK

PROC_TDI

PROC_TDO

PROC_TMS

PROC_TRST#

PCH_JTAG_TCK

JTAGX

B61 D60

XDP_TCLK_CPU

A61

XDP_TDI_CPU

C60

XDP_TDO_CPU

B59

XDP_TMS_CPU

XDP_TRST_CPU#

B56 D59

PCH_JTAG_TCK

A56

PCH_JTAG_TDI

C59

PCH_JTAG_TDO

C61

PCH_JTAG_TMS

A59

PCH_TRST# XDP_TCK_JTAGX

20160218 X541UV R0803,R0804,R0805,R0807,R0814,R0820,R0806 unstuff

XDP_TDI_CPU PCH_JTAG_TDI

XDP_TDO_CPU PCH_JTAG_TDO

XDP_TMS_CPU PCH_JTAG_TMS

XDP_TRST_CPU# PCH_TRST#

1

R0803

R0804

T0802

@

1

+VCCSTG

@

2

0Ohm

2

0Ohm@

2

0OhmR0805 1@

2

0OhmR0807 1@

2

0OhmR0814 1@

XDP_TDO_CPUXDP_TCLK_CPU XDP_TCK_JTAGX

XDP_TCLK_CPU

R0820

R0806

1 2

@

1 2

51Ohm

OD

2 1

SL0802

SL0801

SL0803

THRO_CPU# 31

IMVP8_VRHOT# 81

PWRLIMIT#_CPU 90

0402

2 1

0402

2 1

0402

BOM

Title :

Size

B

Date:

Wednesday, March 07, 2018

Project Name

X407UA/UV

CPU_MISC,JTAG,CLK

Dept.:

ASUSTeK COMPUTER INC. Engineer:

Sheet

Brian Chen

9

ev

R1.0

102

of

Main Board

U0301S

E68

CFG[0]

B67

CFG[1]

D65

CFG[2]

D67

CFG[3]

E70

CFG4 XTAL24_U42_OUT

R0902

49.9Ohm 1%

1 2

CFG[4]

C68

CFG[5]

D68

CFG[6]

C67

CFG[7]

F71

CFG[8]

G69

CFG[9]

F70

CFG[10]

G68

CFG[11]

H70 REV = <REV>

CFG[12]

G71

CFG[13]

H69

CFG[14]

G70

CFG[15]

E63

CFG[16]

F63

CFG[17]

E66

CFG[18]

F66

CFG[19]

E60

CFG_RCOMP

E8

ITP_PMODE

AY2

RSVD_AY2

AY1

RSVD_AY1

D1

RSVD_D1

D3

RSVD_D3

K46

RSVD_K46

K45

RSVD_K45

AL25

RSVD_AL25

AL27

RSVD_AL27

C71

RSVD_C71

B70

RSVD_B70

F60

RSVD_F60

A52

RSVD_A52

BA70

RSVD_TP_BA70

BA68

RSVD_TP_BA68

J71

RSVD_J71

J68

RSVD_J68

F65

VSS_F65

G65

VSS_G65

F61

RSVD_F61

E61

RSVD_E61

SKL-ULT

RESERVEDSIGNALS-1

RSVD_TP_BB68 RSVD_TP_BB69

RSVD_TP_AK13

RSVD_TP_AK12

RSVD_BB2

RSVD_BA3

RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2

RSVD_B3 RSVD_A3

RSVD_AW1

RSVD_E1 RSVD_E2

RSVD_BA4 RSVD_BB4

RSVD_A4 RSVD_C4

RSVD_A69 RSVD_B69

RSVD_AY3

RSVD_D71 RSVD_C70

RSVD_C54 RSVD_D54

VSS_AY71

ZVM#

RSVD_TP_AW71 RSVD_TP_AW70

MSM#

PROC_SELECT#

TP5 TP6

TP4

TP1 TP2

BB68 BB69

C2

A3

E2

BA4 BB4

B69

C70

D54

AY71 AR56

AW71 AW70

AP56

C64

AU5 AT5

D4 B2

A4 C4

AY4 BB3

AK13 AK12

BB2 BA3

D5

B3

AW1

E1

BB5

A69

AY3

D71

C54

R0905

1 @ 2

100KOhm

+1.0V_VCCST

C0901 1UF/6.3V

2 1

@

C0902 1UF/6.3V

2 1

@

2017102 3 Jack A dd XTAL 2 4M for KBL-R.

XTAL 24MHz

XTAL24_U42_IN

XTAL24_U42_OUT

SL0901

2 1

SL0902

2 1

U0301T

RSVD_AW69 RSVD_AW68 RSVD_AU56 RSVD_AW48 RSVD_C7 RSVD_U12 RSVD_U11 RSVD_H11

SPARE

RSVD_F6 RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52

F6 E3 C11 B11 A11 D12 C12 F52

AW69 AW68

AU56

AW48

U12 U11 H11

C7

RSEKVL=-U<LTREV>

07009-00062000

12

R0907 1MOhm /U42

R0904 0OHM

1

2 XTAL24_OUT_X2

/U42 27PF/50V

X0902 24Mhz /U42

XTAL24_U42_IN

1 3

C0903

2 1

27PF/50V /U42

4

2

C0904

2 1

/U42 GND

CFG STRAPS

CFG4

CFG0 NO STAL L STALL

CFG4 DISA BLE ENABLE eDP ENABLE

R0901 1 2 1KOhm

1 0 NOTE

STALL RESET SEQ UENC E AFTER PCU PLL LOCK UNTIL DE-ASS ERTE D

BOM

Title :

CPU_CFG, RSVD

Size

Dept.:

Custom

Date: Wednesday, March 07,2018

Project Name

X407 UA/U V

ASUSTeK COMPUTER INC. Engineer:

Sheet

Brian Chen

10 of

ev

R1.0

102

2016/11/23 X542UA_#86, Add SO-DIMM (ChA), r emove P13, P14 & P 15 DRAM

M_A_CLK _DDR05 M_A_CLK _DDR#0

5

M_A_CLK _DDR1

5

M_A_CLK _DDR#1

5

M_A_CKE 0

5

M_A_CKE 1

5

M_A_CS# 0

5

M_A_CS# 1

5

M_A_ODT0

5

M_A_ODT1

5

M_A_BG0

5

M_A_BG1

5

M_A_BA0

5

M_A_BA1

5

M_A_A[13 :0]

5

M_A_VREF CA

12

C1617

0.1UF/ 10V

GND GND

+1.2V

1 2

12

C1612

2.2UF/ 10V

R1605 240Ohm

M_A_WE #5 M_A_CAS#

5

M_A_RAS#

5

M_A_ACT#5

M_A_PAR5 M_A_ALER T#5

DDR4_D RAMRST#5 ,18,70

SMB_DATA_S3

6,18

SMB_CK_S3

Place close to SO-DIMM

+1.2V

For ECC

'EVENT_N': INDICATES THERMAL EVENT ON DI MM. NON-ECC DIMM: NOT CON NECTE D

EVENT# ON ECC DI MM: KE EP A PULL UP IF NO PIN IN PC H

T1601 T1602

M_A_DIMM 0_EVENT#

M_A_DIMM 0_SA2 M_A_DIMM 0_SA1 M_A_DIMM 0_SA0

1

M_A_DIMM 0_S2

1

M_A_DIMM 0_S3

J1601 A

137

CK0_T

139

CK0_C

138

CK1_T

140

CK1_C

109

CKE0

110

CKE1

149

S0*

157

S1*

155

ODT0

161

ODT1

115

BG0

113

BG1

150

BA0

145

BA1

144

A0

133

M_A_A0

A1

132

M_A_A1

A2

131

M_A_A2

A3

128

M_A_A3

A4

M_A_A4

126

A5

127

M_A_A5

A6

122

M_A_A6

A7

M_A_A7

125

A8

121

M_A_A8

A9

M_A_A9

146

A10_AP

120

M_A_A10

A11 A12

M_A_A11

119

A13

158

M_A_A12

A14_WE*

M_A_A13

151

A15_CAS*

156

A16_RAS*

152

ACT*

114

PARITY

143

ALERT*

116

EVENT*

134

RESET*

108

VREFCA

164

SDA

254

SCL

253

SA2

166

SA1

260

SA0

256

CB0_NC

92

CB1_NC

91

CB2_NC

101

CB3_NC

105

CB4_NC

88

CB5_NC

87

CB6_NC

100

CB7_NC

104

12

DM0*/DBI0 *

33

DM1*/DBI1 *

54

DM2*/DBI2 *

75

DM3*/DBI3 *

178

DM4*/DBI4 *

199

DM5*/DBI5 *

220

DM6*/DBI6 *

241

DM7*/DBI7 *

96

DM8*/DBI 8*

162

S2*/C0

165

S3*/C1

DDR4_DI MM_260P

12002-00082100

20170707 Bria n Change J1601 12002-00080100 to 12 002- 00082 100( 5.2H ).

DQS0_T DQS1_T DQS2_T DQS3_T DQS4_T DQS5_T DQS6_T DQS7_T DQS8_T

DQS0_C DQS1_C DQS2_C DQS3_C DQS4_C DQS5_C DQS6_C DQS7_C DQS8_C

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41 42 24 25 38 37 50 49 62 63 46 45 58 59 70 71 83 84 66 67 79 80 174 173 187 186 170 169 183 182 195 194 207 208 191 190 203 204 216 215 228 229 211 212 224 225 237 236 249 250 232 233 245 246

13 34 55 76 179 200 221 242 97

11 32 53 74 177 198 219 240 95

2016/12/05 X542UA_R1.0 #98, DDR SWAP

2016/12/07 X542UA_R1.0 #A3, DDR SWAP

SW AP

M_A_DQ4 M_A_DQ1 M_A_DQ7 M_A_DQ3 M_A_DQ0 M_A_DQ5 M_A_DQ6 M_A_DQ2

M_A_DQ8 M_A_DQ1 3 M_A_DQ1 0 M_A_DQ11 M_A_DQ9 M_A_DQ1 2 M_A_DQ1 5 M_A_DQ1 4

M_A_DQ1 8 M_A_DQ1 7 M_A_DQ1 6 M_A_DQ2 3 M_A_DQ2 0 M_A_DQ2 1 M_A_DQ1 9 M_A_DQ2 2

M_A_DQ2 8 M_A_DQ2 7 M_A_DQ3 0 M_A_DQ2 5

M_A_DQ2 4

M_A_DQ2 9 M_A_DQ3 1 M_A_DQ2 6

M_A_DQ3 5 M_A_DQ3 6 M_A_DQ3 9 M_A_DQ3 3 M_A_DQ3 2 M_A_DQ3 7 M_A_DQ3 8 M_A_DQ3 4

M_A_DQ4 1 M_A_DQ4 4

M_A_DQ4 7

M_A_DQ4 3 M_A_DQ4 0 M_A_DQ4 5 M_A_DQ4 6 M_A_DQ4 2

M_A_DQ4 8 M_A_DQ5 2 M_A_DQ5 5 M_A_DQ5 0 M_A_DQ5 1 M_A_DQ5 3 M_A_DQ5 4 M_A_DQ4 9

M_A_DQ5 7

M_A_DQ5 8 M_A_DQ6 3 M_A_DQ6 2

M_A_DQ6 0

M_A_DQ5 6

M_A_DQ6 1

M_A_DQ5 9

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_DQS# 0 M_A_DQS# 1 M_A_DQS# 2 M_A_DQS# 3 M_A_DQS# 4 M_A_DQS# 5 M_A_DQS# 6 M_A_DQS# 7

D0

D1

D2

D3

D4

D5

D6

D7

X507/2017/06/06 SWAP

M_A_DQ[ 63:0] 5

2017/0606 X507 SWAP

M_A_DQS[ 7:0]

M_A_DQS# [7:0]

J1601 B

163

VDD19

160

VDD18

159

VDD17

154

VDD16

153

VDD15

148

VDD14

147

VDD13

142

VDD12

141

VDD11

136

VDD10

VDDSPD

135

VDD9

130

VDD8

129

VDD7

124

VDD6

123

VDD5

118

VDD4

117

VDD3

112

VDD2

111

VDD1

NP_NC1 NP_NC2

251 247 243 239 235 231 227 223 217 213 209 205 201 197 193 189 185 181 175 171 167 107 103

5

GND GND

VSS1

VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23

99

VSS24

93

VSS25

89

VSS26

85

VSS27

81

VSS28

77

VSS29

73

VSS30

69

VSS31

65

VSS32

61

VSS33

57

VSS34

51

VSS35

47

VSS36

43

VSS37

39

VSS38

35

VSS39

31

VSS40

27

VSS41

23

VSS42

19

VSS43

15

VSS44

9

VSS45

5

VSS46

1

VSS47

DDR4_DI MM_260P

VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94

+2.5V+1.2V

+VTT

258

VTT

259

VPP2

257

VPP1

SL1604

12

C1628

0.1UF/ 10V

MT1 MT2

255

263 264

261

262

252 248 244 238 234 230 226 222 218 214 210 206 202 196 192 188 184 180 176 172 168 106 102 98 94 90 86 82 78 72 68 64 60 56 52 48 44 40 36 30 26 22 18 14 10 6 2

GND GND

+3VS

1 2

C1627

2.2UF/ 10V

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

0402

20170719 Brian Remove CE1601 and add C1 629/ C1630 /C16 31.

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

2017/03/16 X542UA_R2.0 #03, Modify SA0 to pull do wn

+3VS +3VS +3VS

R1601

@

0Ohm

1 2

21

SL1603

0402

Place close to SO-DIMM

GND GND

+VTT

nbs_c0 603_h37_000s

12

C1603 10UF/6 .3V

GND G ND GND

nbs_c0 603_h37_000s

Place close to SO-DIMM Socke t (+VTT Pin)

2017/02/06 X542UA_R1.1 #26, EMI sol ution

+1.2V

nbs_c0 603_h37_000s nbs_c0603_ h37_000s nbs_ c0603_h37_ 000s

12

GND GND GND GND GND

20170727 Bria n Add C1605/C1621/C1624 For POI cost dow n.

2017/02/06 X542UA_R1.1 #26, EMI sol ution

12

C1622

C1619

0.1UF/ 16V

10UF/6 .3V

@/EMI

@

12

GND

12

C1606

10UF/6 .3V

@

GND GND GND GND GND

nbs_c0 603_h37_000s nbs_c0603_ h37_000s nbs_ c0603_h37_ 000s

C1616

0.1UF/ 16V C160 5 @/EMI 1UF/6 .3V

12

@ C1631 22UF/6 .3V

@ C1629 22UF/6 .3V

nbs_c0 603_h39_000s nbs_c06 03_h39_000s n bs_c060 3_h39_000s

GPNlD

ace close to

12

C1618 C1 613

10UF/6 .3V 10UF/6.3 V

12

C1611 C1 625 C1 621 C1624 1UF/6. 3V 1UF/6.3V 2. 2UF/6.3V 1 UF/6.3V

R1609

R1602

@

0Ohm

1 2

M_A_DIMM 0_SA2 M_A_DIMM 0_SA1 M_A_DIMM 0_SA0

21

SL1601

SL1602

0402

GND

WRITE A DDRESS: 0X

+2.5V

nbs_c0 603_h37_000s

12

C1608 C1 604 10UF/6 .3V

nbs_c0 603_h37_000s

2017/02/06 X542UA_R1.1 #26, EMI solu tion

12

@ C1630 22UF/6 .3V

GND

SO-DIMM Sock et (VDD Pin)

12

C1626 C1 614

10UF/6 .3V

@

12

GNDGND GND GND

Place close to SO-DIMM Socke t (+VPP Pin)

12

10UF/6 .3V

GND

12

10UF/6 .3V

12

@

C1610 10UF/6 .3V

12

C1607 C1 615

0.1UF/ 16V 0.1UF /16V @/EMI @/EMI

12

C1602 C1 620

@

GND GND

nbs_c0 603_h37_000s

12

C1609 1UF/6. 3V

12

10UF/6 .3V 10UF/6 .3V

@/EMI

nbs_c0 603_h37_000s

12

C1623 1UF/6. 3V

GNDGNDGND

BOM

Title :

Size

Project Name

X507UA/UV

DDR3_ON -BO ARD_ B_L3 2

Dept.:

NB2_RD1 _EE1

Engine er:

Bull Tsai

Rev

R2.0

2016/11/16 X542UA_#78, Remove R1709

+1.2V

M_B_VRE FCA

12

C1704

0.1UF/ 10V

GND GND

Place close to SO-DIMM

1 2

C1701

2.2UF/ 10V

R1707 240Ohm

M_B_CL K_DDR05 M_B_CL K_DDR#0

5

M_B_CL K_DDR1

5

M_B_CL K_DDR#1

5

M_B_CK E0

5

M_B_CK E1

5

M_B_CS #0

5

M_B_CS #1

5

M_B_ODT 0

5

M_B_ODT 1

5

M_B_BG 0

5

M_B_BG 1

5

M_B_BA0

5

M_B_BA1

5

M_B_A[1 3:0]

5

M_B_W E#5 M_B_CAS #

5

M_B_RAS #

5

M_B_ACT#5

M_B_PAR5 M_B_ALE RT#5

DDR4_D RAMRST#5 ,17,70

SMB_DATA_S3

6,17

SMB_CK_S3

+1.2V

'EVENT_N': INDICATES THERMAL EVENT ON DI MM. NON-ECC DIMM: NOT CON NECTE D

For ECC

T1702 T1701

M_B_DI MM0_EVENT#

M_B_DI MM0_SA2 M_B_DI MM0_SA1 M_B_DI MM0_SA0

1 1

EVENT# ON ECC DI MM: KE EP A PULL UP IF NO PIN IN PC H

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

M_B_DI MM0_S2 M_B_DI MM0_S3

J1701 A

137

CK0_T

139

CK0_C

138

CK1_T

140

CK1_C

109

CKE0

110

CKE1

149

S0*

157

S1*

155

ODT0

161

ODT1

115

BG0

113

BG1

150

BA0

145

BA1

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10_AP

120

A11 A12

119

A13

158

A14_WE*

151

A15_CAS*

156

A16_RAS*

152

ACT*

114

PARITY

143

ALERT*

116

EVENT*

134

RESET*

108

VREFCA

164

SDA

254

SCL

253

SA2

166

SA1

260

SA0

256

CB0_NC

92

CB1_NC

91

CB2_NC

101

CB3_NC

105

CB4_NC

88

CB5_NC

87

CB6_NC

100

CB7_NC

104

12

DM0*/DBI0 *

33

DM1*/DBI1 *

54

DM2*/DBI2 *

75

DM3*/DBI3 *

178

DM4*/DBI4 *

199

DM5*/DBI5 *

220

DM6*/DBI6 *

241

DM7*/DBI7 *

96

DM8*/DBI 8*

162

S2*/C0

165

S3*/C1

DDR4_DI MM_260P

DQS0_T DQS1_T DQS2_T DQS3_T DQS4_T DQS5_T DQS6_T DQS7_T DQS8_T

DQS0_C DQS1_C DQS2_C DQS3_C DQS4_C DQS5_C DQS6_C DQS7_C DQS8_C

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41 42 24 25 38 37 50 49 62 63 46 45 58 59 70 71 83 84 66 67 79 80 174 173 187 186 170 169 183 182 195 194 207 208 191 190 203 204 216 215 228 229 211 212 224 225 237 236 249 250 232 233 245 246

13 34 55 76 179 200 221 242 97

11 32 53 74 177 198 219 240 95

2016/12/05 X542UA_R1.0 #99, DDR SWAP

SW AP

M_B_DQ8

M_B_DQ1 2

M_B_DQ1 5

M_B_DQ 11

M_B_DQ1 3

M_B_DQ9

M_B_DQ1 0

M_B_DQ1 4

M_B_DQ4

M_B_DQ5

M_B_DQ7

M_B_DQ6

M_B_DQ1

M_B_DQ0

M_B_DQ3

M_B_DQ2

M_B_DQ2 0

M_B_DQ1 7

M_B_DQ2 1

M_B_DQ2 2

M_B_DQ1 9

M_B_DQ1 6

M_B_DQ2 3

M_B_DQ1 8

M_B_DQ2 8 M_B_DQ2 4

M_B_DQ2 6

M_B_DQ2 7

M_B_DQ2 9

M_B_DQ2 5

M_B_DQ3 1

M_B_DQ3 0

M_B_DQ3 6

M_B_DQ3 2

M_B_DQ3 9

M_B_DQ3 4

M_B_DQ3 3

M_B_DQ3 7

M_B_DQ3 8

M_B_DQ3 5

M_B_DQ4 1

M_B_DQ4 0

M_B_DQ4 2 M_B_DQ4 7

M_B_DQ4 5

M_B_DQ4 4

M_B_DQ4 3

M_B_DQ4 6

M_B_DQ5 5

M_B_DQ5 3

M_B_DQ5 4

M_B_DQ4 8

M_B_DQ5 2

M_B_DQ4 9

M_B_DQ5 1

M_B_DQ5 0

M_B_DQ5 7

M_B_DQ5 9

M_B_DQ6 2

M_B_DQ6 1

M_B_DQ5 8

M_B_DQ5 6

M_B_DQ6 0 M_B_DQ6 3

M_B_DQS 1 M_B_DQS 0 M_B_DQS 2 M_B_DQS 3 M_B_DQS 4 M_B_DQS 5 M_B_DQS 6 M_B_DQS 7

M_B_DQS #1 M_B_DQS #0 M_B_DQS #2 M_B_DQS #3 M_B_DQS #4 M_B_DQS #5 M_B_DQS #6 M_B_DQS #7

12002-00080300

20170707 Bria n Change J1701 12002-00082500 to 12 002- 00080 300( 4H).

M_B_DQ[ 63:0] 5

D1

2017/0606 X507 SWAP

D0

2017/0606 X507 SWAP

D2

2017/0606 X507 SWAP

D3

2017/0606 X507 SWAP

D4

2017/0606 X507 SWAP

D5

2017/0606 X507 SWAP

D6

2017/0606 X507 SWAP

D7

2017/0606 X507 SWAP

M_B_DQS [7:0]

20161205 swap

M_B_DQS #[7:0]

20161205 swap

J1701 B

163

VDD19

160

VDD18

159

VDD17

154

VDD16

153

VDD15

148

VDD14

147

VDD13

142

VDD12

141

VDD11

136

VDD10

VDDSPD

135

VDD9

130

VDD8

129

VDD7

124

VDD6

123

VDD5

118

VDD4

117

VDD3

112

VDD2

111

VDD1

NP_NC1 NP_NC2

251 247 243 239 235 231 227 223 217 213 209 205 201 197 193 189 185 181 175 171 167 107 103

5

GND GND

VSS1

VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23

99

VSS24

93

VSS25

89

VSS26

85

VSS27

81

VSS28

77

VSS29

73

VSS30

69

VSS31

65

VSS32

61

VSS33

57

VSS34

51

VSS35

47

VSS36

43

VSS37

39

VSS38

35

VSS39

31

VSS40

27

VSS41

23

VSS42

19

VSS43

15

VSS44

9

VSS45

5

VSS46

1

VSS47

DDR4_DI MM_260P

VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94

+2.5V+1.2V

1 2

C1709

2.2UF/ 10V

+3VS

SL1704

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

0402

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

Place close to SO-DI MM

+VTT

nbs_c0 603_h37_000s

12

C1711 10UF/6 .3V

GND GND GND

nbs_c0 603_h37_000s

Place close to SO-DIMM Socke t (+VTT Pin)

2017/02/06 X542UA_R1.1 #26, EMI sol ution

+1.2V

12

C1717

C1726

0.1UF/ 16V

10UF/6 .3V

@/EMI

@

20170707 Bria n Remove CE1701 for no-lo catio n.

+3VS +3VS +3VS

21

SL1702

R1703

@

0Ohm

0402

1 2

21

GND

R1701

SL1703

@

0Ohm

0402

1 2

GND

WRITE ADDRESS: 0XA4

+2.5V

nbs_c0 603_h37_000s

Place close to SO-DIMM Socke t (+VPP Pin)

R1704

@

0Ohm

1 2

M_B_DI MM0_SA2 M_B_DI MM0_SA1 M_B_DI MM0_SA0

21

SL1701

0402

GND

nbs_c0 603_h37_000s

12

C1725 C1 710 10UF/6 .3V

GNDGND GND G ND

12

10UF/6 .3V

@

12

C1727 C1 721 1UF/6. 3V

1UF/6. 3V

@

+VTT

258

VTT

259

VPP2

257

VPP1

255

263 264

261

MT1

262

MT2

252 248 244 238 234 230 226 222 218 214 210 206 202 196 192 188 184 180 176 172 168 106 102 98 94 90 86 82 78 72 68 64 60 56 52 48 44 40 36 30 26 22 18 14 10 6 2

12

C1705

0.1UF/ 10V

GND GND

12

Place close to SO-DIMM Socket (VDD Pin )

12

C1712 C1 715 C1707

10UF/6 .3V

@/EMI

GND GND GND GND GND

nbs_c0 603_h37_000s nbs_c0603_ h37_000s nbs_ c0603_h37_ 000s

nbs_c0 603_h37_000s nbs_c0603_ h37_000s nbs_ c0603_h37_ 000s nbs_c06 03_h37_000s

12

C1708 1UF/6. 3V

@

GND GND GND GND GND GND

20170727 Bria n Add C1703/C1716 and unmount C1715/C1719 For POI cost do wn.

2017/02/06 X542UA_R1.1 #26, EMI sol ution

10UF/6 .3V 10UF/6.3 V

@

12

C1718

0.1UF/ 16V @/EMI

12

C1702 C1 714 1UF/6. 3V 1UF/6.3V

12

C1722 C1 719

10UF/6 .3V

@/EMI

12

C1703 10UF/6 .3V

10UF/6 .3V

@

GND

nbs_c0 603_h37_000s

12

C1723

0.1UF/ 16V C 1724 C1 720 @/EMI

1UF/6. 3V 1UF/6.3V

@

12

C1716 C1 706

10UF/6 .3V 10UF/6 .3V

GND GND

12

C1713 1UF/6. 3V

GNDGND

Title :

DDR4_SO -DIMM_1

Size

Dept.:

C

Date: Wednesday, March 07,2018

Project Name

X507UA/UV

Engine er:

Sheet 18 of

Bull Tsai

Rev

R2.0

102

Asus X407UBR Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual