Asus ME370T Schematic

ME370T (Nakasi)

1.0

2012/02/08

HEADSET

HEADSET JACK

Speaker

DMIC KNOWLES
SPM0423HD4H-WB

Touch screen

ELAN

LCD Panel

EXT MIC

Internal D MIC

Battery Gauge

Charger

SMB347

Micro HDMI

LVDS

LVDS

LVDSLVDS

GEN1_SMB_3V3

GEN1_SMB_3V3

GEN1_SMB_3V3GEN1_SMB_3V3

GEN2_I2C_3V3

GEN2_I2C_3V3

GEN2_I2C_3V3GEN2_I2C_3V3

I/O Board & TP

EXTERNAL
SD SCOKET

USB Conn.

Docking USB Port

USB*3 , Line out ,
Mic In , DC Jack

Docking

Transmitter

TI SN75LVDS83B

Audio DSP

FM34

I2S CODEC

ALC5642

PWR_I2C_1V8

PWR_I2C_1V8

PWR_I2C_1V8PWR_I2C_1V8

HDMI

HDMI

HDMIHDMI

DDC_I2C 5V0

DDC_I2C 5V0

DDC_I2C 5V0DDC_I2C 5V0

LCD_RGB_1V8

LCD_RGB_1V8

LCD_RGB_1V8 LCD_RGB_1V8

Gen1_I2C_1V8

Gen1_I2C_1V8

Gen1_I2C_1V8Gen1_I2C_1V8

I2S_1V8

I2S_1V8

I2S_1V8I2S_1V8

PWR_I2C_1V8

PWR_I2C_1V8

PWR_I2C_1V8PWR_I2C_1V8

USB_1_3V3

USB_1_3V3

USB_1_3V3USB_1_3V3

USB_3_3V3

USB_3_3V3

USB_3_3V3USB_3_3V3

Gen1_I2C_1V8

Gen1_I2C_1V8

Gen1_I2C_1V8Gen1_I2C_1V8

MIPI_CSIB_1V2

MIPI_CSIB_1V2

MIPI_CSIB_1V2MIPI_CSIB_1V2

Tegra

T30L

Kai

Front
Camera module

Aptina 1040

PWR_I2C_1V8

PWR_I2C_1V8

PWR_I2C_1V8PWR_I2C_1V8

DDR3L x 32_1V35

DDR3L x 32_1V35

DDR3L x 32_1V35DDR3L x 32_1V35

HSMMC x8_1V8

HSMMC x8_1V8

HSMMC x8_1V8HSMMC x8_1V8

JTAG_1V8

JTAG_1V8

JTAG_1V8JTAG_1V8

UART_4_1V8

UART_4_1V8

UART_4_1V8UART_4_1V8

GEN2_I2C_1V8

GEN2_I2C_1V8

GEN2_I2C_1V8GEN2_I2C_1V8

SDIO_1_1V8

SDIO_1_1V8

SDIO_1_1V8SDIO_1_1V8
UART_3_1V8

UART_3_1V8

UART_3_1V8UART_3_1V8

32.768KHz

32.768KHz

32.768KHz32.768KHz

32.768KHz

32.768KHz

32.768KHz32.768KHz

UART_2_1V8

UART_2_1V8

UART_2_1V8UART_2_1V8

MIPI_CSIA_1V2

MIPI_CSIA_1V2

MIPI_CSIA_1V2MIPI_CSIA_1V2

CAM_I2C_1V8

CAM_I2C_1V8

CAM_I2C_1V8CAM_I2C_1V8

CAM_I2C_1V8

CAM_I2C_1V8

CAM_I2C_1V8CAM_I2C_1V8

CAM_I2C_1V8

CAM_I2C_1V8

CAM_I2C_1V8CAM_I2C_1V8

CAM_I2C_1V8

CAM_I2C_1V8

CAM_I2C_1V8CAM_I2C_1V8

Controls

Controls

ControlsControls

32.768KHz

32.768KHz

32.768KHz32.768KHz

XTAL 12MHZ

Rear
Camera module

OV5650

Light sensor

LSC3010

E-COMPASS

AICHI AMI304

Gyro sensor

Invensense MPU-6050

PMIC

MAXIM
MAX77663

Thermal Sensor

OnSemi NCT72

DDR3L 256M x8 x4pcs
1333(667MHz)

eMMC 8GB

Debug Port

EC

NUVOTON
NPCE795LA0DX

WIFI + BT

Azurewave AW/NH-665

XTAL 37.4MHz

TCXO 26MHz

GPS

Broadcom BCM4751

Antenna

Antenna

NFC NXP PN65

XTAL 27.12MHz

XTAL

32.768KHz

Button FPC

Power Button
Volume Up & Down
Reset Button

Antenna

5

ME370T (Nakasi)

Power Tree

D D

Power Source

USB Conn.

Dock Conn.

C C

VDD_AC_BAT

(VPH_PWR_CHGR)

B B

A A

VDD_USB1_VBUS

DOCK_5V

page 49

Charger

SMB347

page 48

Buck-Boost

TPS63020

page 48

Boost

RT9276GQW

page 50~52

PMIC

MAX77663

MBATT,
MON,

Internal Usage

GPIO_INA &
AVSD

SD0

SD1

SD2

SD3

IN_LDO4/6

U27

page 31

LDO S-1132

2.8V. 300mA

CAM1_LDO_EN(T30 KB_ROW6)

U28

page 31

LDO S-1132

2.8V. 300mA

CAM2_LDO_EN(T30 KB_ROW8)

5

VBATT

EN_3V3_SYS(PMU GPIO3)

VDD_5V0_SYS

5V. 1A

EN_5V0_SBY(T30 GMI_AD11)

VDD_1V0_GEN

VDD_1V2_SOC

LDO4

LDO6

VDD_PMU_LDO4_1V2

1.2V. 150mA, PMIC

VDD_PMU_LDO6_3V_1V8 T30

3/1.8V. 150mA, PMIC

page 27

page 44

AVDD_CAM1 Camera AVDD

AVDD_VCM CAMERA AF VCM

VDD_SPK Codec Speaker Amp.

NFC_VBAT NFC VBAT

Battery

page 21

+3VSUS

3.3V. 2A

page 29

LDO S-1167

3.3V. 150mA

VDD_5V0_SYS enable

VCC_LED

T30 CPU

1.05V, 6.1A, Terga (Tj=90, 1.3GHz)1.05V. 6A, PMIC

T30 CORE

U30

for Touch Sensor

VDD_CPU

VDD_CORE

1.2V, 2.5A, Terga1.2V. 3A, PMIC

T30

VDD_RTC

VDDIO_SDMMC1

4

TP_3V3

page 29

4

+1.35V

1.35V. 1.5A, PMIC

page 52

PMIC

MAX77663

IN_LDO2

IN_LDO3/5

page 52

PMIC

MAX77663

IN_LDO0/1

IN_LDO7/8

DRAM Chip 256Mb x8bits x4pcs

page 19

170mA x4, each DRAM chip

3

LDO2

LDO3

LDO5

+3VSUS_CPU

VDD_PNL

page 22

page 25

page 26

page 26

page 41

page 41

LDO0

LDO1

LDO7

LDO8

3

VDD_PMU_LDO2_2V8 T30

2.8V. 150mA, PMIC

VDD_PMU_LDO3_2V8

2.8V. 300mA, PMIC

VDD_PMU_LDO5

2.8V. 300mA, PMIC

page 5

Power SW
NCT352

page 14

Power SW
NCT352

page 21

Power SW
NCT352

VDD_LVDS_30

VDD_ALS

VDD_GYRO

AVDD_ECOM

WiFi_BT_VCC_3V3

GPS_VDD_BAT_3V3

VDD_PMU_LDO0_1V0 T30

1.0V. 150mA, PMIC

VDD_PMU_LDO1

VDD_PMU_LDO7_1V2

1.2V. 450mA, PMIC

VDD_PMU_LDO8_1V2

1.2V. 300mA, PMIC

VDD_DDR_RX

page 20

VCORE_EMMC_S

page 31

U1

T30

EN_VDD_FUSE (T30 LCD_PWR1)

T30

U14

T30

EN_AVDD_USB (MAX77663 GPIO2)

page 26

for eMMC VCC200mA

VDDIO_CAM

Camera VDDIO

VDD_FUSE

VDD_3V3_GMI

AVDD_USB

VCORE_TEMP

for Thermal Sensor

T30

VDDIO_PEX_CTL

TBD (no use)

U8

VCC_LCD3V3

for LCD Panel

EN_VDD_PNL (T30 LCD_M1)

for LVDS Transmitter

VCC

VDD_LVDS_30

LVDSVCC

VDD_LVDS_F_30

PLLVCC

VDD_LVDS_PLL_30

for Hall Sensor, ALS

for Gyro VDD

for E-compass AVDD

for Wifi/BT Module

for GPS

VDD_DDR_HS

No usage150mA, PMIC

T30

AVDD_DSI_CSI

T30

AVDD_PLLA_P_C

AVDD_PLLM

AVDD_PLLU_D

AVDD_PLLX

T30

VDDIO_DDR

Max. 710mA

VDD_DDR3L for DDR3L VDD

VDDQ_DDR3L for DDR3L VDDQ

2

VDD_1V8_GEN

1.8V. 2.0A, PMIC

2

page 20

page 22

page 26

page 26

page 27

VDD_1V8_GEN_CPU

Q2

page 14

Load SW
PMOS

CORE_PWR_REQ

VDD_1V8_CDC

page 27

page 41

page 43

page 44

page 50

PMIC

MAX77663

Internal Usage

GPIO_INB

1

T30

AVDD_OSC

T30

VDDIO_SYS

T30

VDDIO_CAM

T30

VDDIO_LCD

T30

VDDIO_BB

T30

VDDIO_UART

T30

VDD_IO_AUDIO

T30

VDDIO_SDMMC4

T30

VDDIO_SDMMC3

T30

AVDD_USB_PLL

for eMMC VCCQ

VDDIO_HSMMC

for LVDS Transmitter

IOVCC

IOVCC_30

VDDIO_GYRO for Gyro VLOGIC

DVDD_ECOM for E-compass DVDD

for Audio Codec

DBVDD

VDB_CDC

CPVDD

VCP_CDC

AVDD

AVDD_CDC_F

DCVDD

DACREF_CDC

VDD_1V8_DMIC

for DMIC VDD

WiFi_BT_VDDIO_1V8

for Wifi/BT Module

GPS_VDD_IO_1V8 for GPS

NFC_PVDD for NFC

Title :

Title :

Title :

02.POWER TREE

02.POWER TREE

02.POWER TREE

Engineer:

Richard Lin

Engineer:

Richard Lin

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

ME370T

ME370T

ME370T

1

Richard Lin

Rev

Rev

Rev

2.0

2.0

2.0

2 60Thursday, March 01, 2012

2 60Thursday, March 01, 2012

2 60Thursday, March 01, 2012

TF300T_T3
Power On/Off

5

4

3

2

1

D D

AC_BAT_SYS

AC_OK

+3VA_PAL(PU8805)

3.3V

3.3V

3.3V

PWR_SW#

3.3V

+3VA_EC (PU8806)

AC_BAT_SYS

P_+5VSO_EN_10 (Q7900)EC to PU8100

5V

+5VSUS (PU8100)

1.8V

VDD_1V8_PMU_VRTC(PMU VRTC)

A/D_IN

C C

PMU_ONKEY#SW# to PMU

EN_5V0_SBY(PMU GPIO0)

VDD_5V0_SBY(PQ9106, 2A)

VDD_RTC(PMU LDO4)

PMU to T3 VDD_1V8_GEN(PMU SWIO)

VDD_CORE(PMU SW1)PMU to T3

PMU to T3

VDD_PMU_LDO7(T3 AVDD_PLLx)

3.3V

1.8V

5V

1.8V

1.2V

1.1V

CLK_32K_IN(PMU)PMU to T3

T3 XTAL

B B

System Clock(T3 26MHz)

EN_VDD_1V35(EN_DDR, PMU GPIO7)

+1.8V

5.0V

1.8V

1.35V

+1.2V(for DDR3L 1.35V)

5.0V

PMU to PU8100

T3 to Q1603

EN_3V3_SYS(PMU GPIO6)

EN_3V3_EMMC(T3)

1.8V

2.85V

VCORE_eMMC_S(Q1603)

PMU to T3

PMU to T3

PMU to T3

PMU to T3

A A

T3 to PMU

PMU to T3

VDD_DDR_HS(PMU LDO8)

1.0V

VDD_SATA(PMU LDO2)

VDD_PEX(PMU LDO1) (EEPROM OFF)

SYS_RESET#(PMU)

CPU_PWR_REQ(TERGA)

VDD_CPU(PMU SW)

1.05V

1.05V

1.8V

1.8V

1.0V

+1.05VS/+1.2VS/+1.5VS

OTHERS

5

(PMU LDOs, Switched Rails)

4

Title :

Title :

Title :

Timing

Timing

Timing

Engineer:

Richard Lin

Engineer:

Richard Lin

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Pr oject Name

Size Pr oject Name

Size Pr oject Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

ME370T

ME370T

ME370T

1

Richard Lin

3 60Thursday, March 01, 2012

3 60Thursday, March 01, 2012

3 60Thursday, March 01, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

TF300T T3
power on/off map

1201

D D

C C

B B

A A

Adapter

A/D IN

Buck
Boost

AC_BAT_SYS

Charger
BQ24740

BAT

EN_VDD_BL

<7>VDD_1V8_GEN

Sequence:
<1>--><2>--><2A>--><2B>--><2C>--><2D>-->
<3>--><4>--><5>--><6>--><6A>--><7>--><8>-->
<9>--><10>--><10A>--><10B>--><11>--><12>--><13>

Button

BAT

Battery
Pack

<1>PWR_SW#

LDO <2B>+3VA_EC

LDO +3V_PAL

<10A> EN_3V3_SYS

P-MOS
SI2305DS

EN

P-MOS
SI2305DS

EN<OFF>EN_1V8_CAM

Power Latch

<2A>P_+3VA_EN

TI
TPS51125ARGER

EN1
EN2

<2C> P_+5VSO_EN_10

VCC_LED

VDDIO_CAM

<2A>P_+3VA_EN

SW1 <10B>+3VSUS(+3VSO1)

<3>+5VSUS(+5VSO1)

SW2

LDO <4>+3VA

LCD panel backlight

<6>EN_VDD_SOC

<10>+3VSUS(+3VSO1)

<OFF>VDD_5V0_SYS

<7>VDD_1V8_GEN

VDD_CELL_LCL

<5>VDD_1V8_PMU_VRTC

AP_OVERHEAT#

HOT_RST

<2D>PMU_ONKEY#

<10B>+3VSUS

EN_VDD_FUSE

<10B>VDD_PNL(+3VSUS)

EN_VDD_PNL

<10B>+3VSUS

EN_3V3_COM

<5>EN_5V0_SBY

<OFF>EN_5V0_SYS

<OFF>DOCK_IN

<10B>+3VSUS

<5A>VDD_5V0_SBY

***

@

P-MOS
SI2305DS

EN

P-MOS
SI2305DS

EN

P-MOS
SI2305DS

EN

N-MOS
IRFHS8342TRPBF

EN

N-MOS
IRFHS8342TRPBF

EN

P-MOS
SI2305DS

EN

P-MOS
SI2305DS

EN

P-MOS
SI2305DS

EN

V5IN

VCC1

VCC2

VCCIO

VCC7

VCC6

VCC5

VCC4

VCC3

VDDIO

VBACKUP

GPIO4
GPIO5
PWRDN(power down)
HOT_RST
PWRON

time slot duration: 2ms

VDD_FUSE

VCC_LCD3V3

WiFi_BT_VCC_3V3

<5A>VDD_5V0_SBY

VDD_5V0_SYS

HDMI_VBUS_EN_AIO

<OFF>+5VSUS_DOCK

<11>VCC_TCH

<6A>VDD_1V2_SOC T30

EN2
EN1

SLEEP

NRESPWRON

PWR_INT#

CLK32KOUT

SW

SW1

SW2

SWIO

VRTC

LDO1
LDO2

LDO3

LDO4

LDO5

LDO6

LDO7

LDO8

GPIO0
GPIO2
GPIO6
GPIO7

EEPROM

T30

<10B>+3VSUS

CAM1_LDO_EN EN

LCD panel

WIFI+BT

<10B>+3VSUS

CAM2_LDO_EN EN

**

***

P-MOS
SI2305DS

EN

<13>CPU_PWR_REQ

CORE_PWR_REQ

<12>SYS_RESET#

PWR_INT#

<9>CLK_32K_IN

<0FF>VDD_CPU

<0FF>VDD_1V2_GEN

<9>+1.2V

<7>VDD_1V8_GEN

<5>VDD_1V8_PMU_VRTC

<11>VCORE_eMMC_S(core power)

<OFF>VDD_SD_S

<OFF> VDDIO_SDMMC1

<4>VDD_RTC

<OFF>VDD_PMU_LDO5

<OFF>VDD_PMU_LDO6

<9>VDD_PMU_LDO7(T3 AVDD_PLLx)

<11>VDD_DDR_HS

<5>EN_5V0_SBY
<6>EN_VDD_SOC
<10>EN_3V3_SYS
<9>EN_DDR

<10B>+3VSUS

<9>+1.2V

HVDD_PEX
VDD_FUSE

LDO 2.85V
RT9193-2HGU5

LDO 2.85V
RT9193-2HGU5

VDDIO_HDMI_CONN_AIO

CPU_PWR_REQ
CORE_PWR_REQ
SYS_RESET_N
PWR_INT_N
CLK_32K_IN

VDD_CPU

VDD_CORE

VDD_1V8_GEN

@

VDD_SATA

VDD_RTC

VDDIO_SDMMC1(3.3V)

AVDD_DSI_CSI(1.2V)

AVDD_PLLx

VDD_DDR_HS

AVDD_USB
VDD_DDR_RX
AVDD_HDMI
VDDIO_GMI
VDD_PEX_CTL
VDDIO_LCD

VDDIO_DDR
HVDD_PEX(3.3V)
VPP_FUSE(3.3V)

AVDD_CAM1

AVDD_VCM

* ***

5

4

3

2

5

VDD_PMU_LDO4_1V2

1.2V

0.9~1.0V

D D

VDD_1V0_GEN

1.0~1.2V

0622

+3VSUS_CPU VDD_FUSE

12

C C

C24

C24

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

EN_VDD_FUSE10

VDD_FUSE_DISABLE

VDD_1V2_SOC

0720

MAX77663 LDO4

MAX77663 SD0(6A)

MAX77663 SD1(3A)

Unmount

R1

R1
0R2J /@

0R2J /@

1 2

U1

U1

OUT

IN

GND

NCT3521U N/A

NCT3521U N/A

R2

R2
300R1F N/A

300R1F N/A

1 2

12

R3

R3

100KR1J

100KR1J

/@

/@

12

R4

R4
100KR1J

100KR1J

N/A

N/A

EN3DIS

Unmount

1
2

5

4

VDDIO_UART

VDD_RTC

VDD_CPU

VDD_CORE

0720 default di sable FUSE fun ction

B B

A A

5

4

BOM

需需需需需需需需需需需需需需需需

02004-00120000 C.S T30-R-A3 FCBGA-728

0620

U2A

U2A

1/22 CORE POWER

1/22 CORE POWER

A2

GND_001

A29

GND_002

AC11

GND_003

AC14

GND_004

AC17

GND_005

AC2

GND_006

AC20

GND_007

AC23

GND_008

AC26

GND_009

AC29

GND_010

AC5

GND_011

AC8

GND_012

AF11

GND_013

AF14

GND_014

AF17

GND_015

AF2

GND_016

AF20

GND_017

AF23

GND_018

AF26

GND_019

AF29

GND_020

AF5

GND_021

AF8

GND_022

AJ1

GND_023

AJ11

GND_024

AJ14

GND_025

AJ17

GND_026

AJ2

GND_027

AJ20

GND_028

AJ23

GND_029

AJ26

GND_030

AJ29

GND_031

AJ30

GND_032

AJ5

GND_033

AJ8

GND_034

AK2

GND_035

AK29

GND_036

B1

GND_037

B11

GND_038

B14

GND_039

B17

GND_040

B2

GND_041

B20

GND_042

B23

GND_043

B26

GND_044

B29

GND_045

B30

GND_046

B5

GND_047

B8

GND_048

E11

GND_049

E14

GND_050

E17

GND_051

E2

GND_052

E20

GND_053

E23

GND_054

E26

GND_055

E29

GND_056

E5

GND_057

E8

GND_058

H11

GND_059

H14

GND_060

H17

GND_061

H2

GND_062

H20

GND_063

H23

GND_064

H26

GND_065

H29

GND_066

H5

GND_067

H8

GND_068

L2

GND_069

L23

GND_070

L26

GND_071

L29

GND_072

L5

GND_073

L8

GND_074

M12

GND_075

M14

GND_076

M16

GND_077

M18

GND_078

N13

GND_079

N15

GND_080

N17

GND_081

N19

GND_082

P12

GND_083

P18

GND_084

P2

GND_085

P23

GND_086

P26

GND_087

P29

GND_088

P5

GND_089

P8

GND_090

R13

GND_091

R15

GND_092

R16

GND_093

R19

GND_094

T12

GND_095

T15

GND_096

T16

GND_097

T18

GND_098

U13

GND_099

U19

GND_100

U2

GND_101

U23

GND_102

U26

GND_103

U29

GND_104

U5

GND_105

U8

GND_106

V12

GND_107

V14

GND_108

V16

GND_109

V18

GND_110

W12

GND_111

W13

GND_112

W15

GND_113

W17

GND_114

W19

GND_115

Y2

GND_116

Y23

GND_117

Y26

GND_118

Y29

GND_119

Y5

GND_120

Y8

GND_121

T30L-R-P-A3

T30L-R-P-A3

T30

T30

4

(1.0 ~ 1.2V)

(1.0 ~ 1.2V)

VDD_RTC_0001
VDD_RTC_0002

0.9~1.0V

(0.9 ~ 1.0V)

(0.9 ~ 1.0V)

1.0~1.2V

(1.0 ~ 1.2V)

(1.0 ~ 1.2V)

VDD_CPU_SENSE

GND_CPU_SENSE

VVDD_CPU_SENSE

VGND_CORE_SENSE

VDD_CORE_SENSE

GND_CORE_SENSE

(3.3V)

(3.3V)

(3.3V)

(3.3V)

VDD_CPU_01
VDD_CPU_02
VDD_CPU_03
VDD_CPU_04
VDD_CPU_05
VDD_CPU_06
VDD_CPU_07
VDD_CPU_08
VDD_CPU_09
VDD_CPU_10
VDD_CPU_11
VDD_CPU_12
VDD_CPU_13
VDD_CPU_14
VDD_CPU_15
VDD_CPU_16
VDD_CPU_17
VDD_CPU_18
VDD_CPU_19
VDD_CPU_20
VDD_CPU_21
VDD_CPU_22

VDD_CORE_01
VDD_CORE_02
VDD_CORE_03
VDD_CORE_04
VDD_CORE_05
VDD_CORE_06
VDD_CORE_07
VDD_CORE_08
VDD_CORE_09
VDD_CORE_10
VDD_CORE_11
VDD_CORE_12
VDD_CORE_13
VDD_CORE_14
VDD_CORE_15
VDD_CORE_16
VDD_CORE_17
VDD_CORE_18
VDD_CORE_19
VDD_CORE_20
VDD_CORE_21
VDD_CORE_22
VDD_CORE_23
VDD_CORE_24
VDD_CORE_25
VDD_CORE_26
VDD_CORE_27
VDD_CORE_28

VPP_KFUSE

1.2V

VPP_FUSE

V22
V23

H10
J10
J8
K8
K9
M7
M8
M9
N8
N9
P14
P15
P16
P17
R14
R17
T14
T17
U14
U15
U16
U17

M13
M15
M17
M19
N12
N14
N16
N18
N7
P13
P19
R12
R18
R7
R8
R9
T13
T19
T8
T9
U18
V13
V15
V17
V19
W14
W16
W18

AB12

AB15

AB16

AA23

W23

W22

AB8

AA4

3

3

VDD_CPU_SENSE_T30

GND_CPU_SENSE_T30

VDD_CORE_SENSE_T30

GND_CORE_SENSE_T30

VPP_KFUSE

R5

R5

10KR1J

10KR1J

N/A

N/A

VDD_RTC

VDD_CPU

VDD_CORE

12

VDD_CORE

12

1220 add

R6

R6
1KR1J

1KR1J

/@

/@

Unmount

1 2

1 2

2

C1

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C4

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C6

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C8

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C7

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C3

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C10

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C13

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C15

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C20

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C22

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C18

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C26

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C27

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C28

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C25
33P25VNPOC1J

33P25VNPOC1J

C14

N/AC14

N/A

22U6.3VX5RC5M

22U6.3VX5RC5M

C17

N/AC17

N/A

22U6.3VX5RC5M

22U6.3VX5RC5M

VDD_RTC

VDD_CPU

VDD_CORE VDD_CORE

0614 remove VDD_CPU_SENSE

Note: Place the 0402 shunts close to Tegra side

VDD_CPU_SENSE_T30 VDD_CPU_SENSE

GND_CPU_SENSE_T30

Short Copper

Short Copper

GND_CORE_SENSE_T30

VDD_FUSE

12

C30

C30

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

2

1

N/AC1

N/A

N/AC2

N/A

VDD_CPU

N/AC4

N/A

N/AC6

N/A

N/AC8

N/A

N/AC7

N/A

N/AC3

N/A

N/AC10

N/A

N/AC13

N/A

0906 NV add

1 2

1 2

1 2

1 2

C5

N/AC5

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C29

/@C29

/@

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C9

N/AC9

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C11
8P25VNPOC1J

8P25VNPOC1J

0906 NV add

N/AC15

N/A

N/AC12

N/A

N/AC20

N/A

N/AC22

N/A

N/AC18

N/A

N/AC26

N/A

N/AC27

N/A

N/AC28

N/A

N/AC25

N/A

PJP1

PJP1
SHORT_PIN

SHORT_PIN

/@

/@

12

P05

P05
P05

P05

PJP2

PJP2
SHORT_PIN

SHORT_PIN

PJP3

PJP3
SHORT_PIN

SHORT_PIN

P05

P05
P05

P05

PJP4

PJP4
SHORT_PIN

SHORT_PIN

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

/@

/@

12

/@

/@

12

/@

/@

12

GND_CPU_SENSE

VDD_CORE_SENSEVDD_CORE_SENSE_T30

GND_CORE_SENSE

ME370T

ME370T

ME370T

C16

1 2

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C19

1 2

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C21

1 2

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C23

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

MAX77663 SD0 sense

VDD_CORE_SENSE 51

MAX77663 SD1 sense

GND_CORE_SENSE 51

Title :

Title :

Title :

T30 Core & Fuse

T30 Core & Fuse

T30 Core & Fuse

Engineer:

Engineer:

Engineer:

1

N/AC11

N/A

N/AC16

N/A

N/AC19

N/A

/@C21

/@

/@C23

/@

VDD_CPU_SENSE 51

GND_CPU_SENSE 51

Richard Lin

Richard Lin

Richard Lin

5 60Saturday, March 24, 2012

5 60Saturday, March 24, 2012

5 60Saturday, March 24, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

1.2V

VDD_PMU_LDO8_1V2

MAX77663 LDO8

VDD_PMU_LDO8_1V2_CPU

1.2V

1.2V

1.2V

1.2V

R8

R8

N/A

N/A

1.8V

D D

PMU

R1.0
R1.2

12

C31

C31

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

N/A

N/A

12

C37

C37

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

DOWN

AVDD_PLLA_P_C

POR Deep Sleep

PUPD

100K

UP

100K

UP

100K

UP

100K

UP

100K

UP

100K

UP

100K

UP

100K

UP

100K

100K

100K

100K

100K

100K

50K

50K

50K

50K

50K

50K

50K

50K

50K

50K

AVDD_OSC

AVDD_PLLU_D VDDIO_SYS

C C

VDDIO_SYS

COL0

COL1

COL2

COL3

COL4

COL5

COL6

B B

COL7

ROW0

ROW1

ROW2

ROW3

ROW4

ROW5

ROW6

ROW7

ROW8

ROW9

ROW10

ROW11

ROW12

ROW13

ROW14

ROW15

A A

1 2

0R3J

0R3J

MAX77663 SD2 (2A)

VDD_1V8_PMU_DCDC2

VDD_PMU_LDO7

1.1V

1.2V

12

C34

C34

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

12

C38

C38

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

PinState

PU

PU

PU

PU

PU

PU

PU

PU

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

PD

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

Config. Reset

VDD_1V8_GEN_CPUVDD_1V8_GEN

Remove C35, C36
for AVDD_PLLX &
AVDD_PLLM

PUPD After Wake

PJ1

/@PJ1

/@

12

SHORT_PIN

SHORT_PIN

Short Copper

1.8V

1.8V

VDD_1V8_GEN_CPU

AVDD_PLLA_P_C

AVDD_PLLU_D

4

VDD_PMU_LDO8_1V2_CPU

VDD_PMU_LDO8_1V2_CPU

Remove AVDD_PLLX

Remove AVDD_PLLM

AVDD_OSC

AVDD_PLLE_no_use

VDDIO_SYS

L7

L7

21

30Ohm/100Mhz

30Ohm/100Mhz

0906 NV change

U2B

U2B

2/22 OSC, PLL & SYS

2/22 OSC, PLL & SYS

1.8V

(1.8V)

(1.8V)

F30

AVDD_OSC

(1.1V)

(1.1V)

H13

AVDD_PLLA_P_C

(1.1V)

(1.1V)

J12

AVDD_PLLX

(1.1V)

(1.1V)

J13

AVDD_PLLM

(1.1V)

(1.1V)

AA8

AVDD_PLLU_D

(1.1V)

(1.1V)

AD7

AVDD_PLLU_D2

(1.05V)

(1.05V)

AA22

AVDD_PLLE

(1.8/3.3V)

(1.8/3.3V)

K29

VDDIO_SYS_1

K30

VDDIO_SYS_2

<Value>

<Value>

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

N/A

N/A

1.2V

1.2V

1.2V

1.2V

1.05V

1.8V

AVDD_PLLA_P_C

AVDD_PLLU_D

VDDIO_SYSVDD_1V8_GEN_CPU

AVDD_OSC

AUDIO&PERIPHERAL

CPU

DRAM

USB&DSI

PCIE&SATA

XTAL_IN

XTAL_OUT

NC37

PWR_I2C_SCL
PWR_I2C_SDA

SYS_RESET_N

PWR_INT_N

CORE_PWR_REQ

CPU_PWR_REQ

SYS_CLK_REQ

CLK_32K_IN

CLK_32K_OUT

KB_COL00
KB_COL01
KB_COL02
KB_COL03
KB_COL04
KB_COL05
KB_COL06
KB_COL07

KB_ROW00
KB_ROW01
KB_ROW02
KB_ROW03
KB_ROW04
KB_ROW05
KB_ROW06
KB_ROW07
KB_ROW08
KB_ROW09
KB_ROW10
KB_ROW11
KB_ROW12
KB_ROW13
KB_ROW14
KB_ROW15

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST_N

JTAG_RTCK

THERM_DN
THERM_DP

OWR

HDMI_CEC

TEST_MODE_EN

3

XTAL_IN

T30

XTAL_OUT

T29

XTAL_OUT_R

H12

remove PLL_S_PLL_LF

M24
N27

N28

M22

N25
R24

T23

R22
U27

J30
N26
V25
R26
W26
R30
P27
N29

T26
M23
V27
M28
N24
N30
T24
T25
R27
M26
R25
M27
N23
V28
M25
V26

T27
R29
T28
R23
T22
V24

M30
M29

N22

AC18

R28

0721

NC

12P50VNPOC2J

12P50VNPOC2J

N/A

N/A

Change

PWR_I2C_SCL
PWR_I2C_SDA

SYS_RESET#

PWR_INT#

CORE_PWR_REQ
CPU_PWR_REQ

CLK_32K_IN
CLK_32K_OUT

PCB_ID2
PCB_ID5

PCB_ID3

PCB_ID4

PCB_ID0
PCB_ID1
CAM1_LDO_EN

CAM2_LDO_EN

LL_BAT_T30

1V8_O_LID#

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRT_N
JTAG_RTCK

THERMD_N
THERMD_P

TEST_MODE_EN

C32

C32

12

R10

R10
0R1J

0R1J

N/A

N/A

12

Unmount

1 2

0R1J /@

0R1J /@

R26
0R1J

0R1J

1 2

R9

N/AR9

N/A

2MR2J

2MR2J

1 2

Change

X1

N/AX1

N/A

12MHz

12MHz

1 3

2

4

TXC/7V12000011

VDDIO_SYS VDDIO_SYS

12

R11

R11

R12

R12

1KR1J

1KR1J

1KR1J

1KR1J

N/A

N/A

N/A

N/A

R16

R16

1 2

1KR1J N/A

1KR1J N/A

KB_COL0
KB_COL1
KB_COL2
KB_COL3
SNN_KB_COL4
SNN_KB_COL5

0802 ID5

SNN_KB_COL6
SNN_KB_COL7

KB_ROW0
KB_ROW1
KB_ROW2
SNN_KB_ROW3
SNN_CAM_I2C_SEL0
SNN_CAM_I2C_SEL1
CAM1_LDO_EN
CAM2_LDO_EN
CAM3_LDO_EN
SNN_CAM1_AF_PWDN*
SNN_CAM2_AF_PWDN*
CAM3_AF_PWDN*
SNN_KB_ROW12
SNN_KB_ROW13
SNN_KB_ROW14
SNN_KB_ROW15

R21

R21

Unmount

N/AR26

N/A

Power from MAX77663

MAX77663 LDO8 1.2V to T30 AVDD_PLLx

MAX77663 SD2 1.8V (VDD_1V8_PMU_DCDC2) to VDD_1V8_GEN

Signal to & from MAX77663

SYS_RESET# from MAX77663 nRSTIO, check reset circuit(p.32) and PMU side

PWR_INT# from MAX77663 nIRQ, check PU resister in PMU side(100k PU to VDD_1V8_GEN)

CORE_PWR_REQ to MAX77663 EN1, check PU resister in PMU side(100k PU to VDD_1V8_GEN)

CPU_PWR_REQ to MAX77663 EN2, check PD resister in PMU side(100k PD)

CLK_32K_IN from MAX77663 GPIO4, check PU resister in PMU side(100k PU to VDD_1V8_GEN)

X1 change to 12MHz XTAL

Change

12

C33

C33
12P50VNPOC2J

12P50VNPOC2J

N/A

N/A

C32 & C33 change to 12pF

12

1227 R0732 100K -> 10K

PWR_I2C_SCL 26,27,49,50
PWR_I2C_SDA 26,27,49,50

SYS_RESET# 20,32,50

JTAG_TRST#

PWR_INT# 50

CLK_32K_IN 50

CLK_32K_OUT 40,41,43

PWR_SW#_BUTTON_R 33

VOL_UP_BUTTON 32
VOL_DWN_BUTTON 32

KB_ROW0 32,33

NFC_GPIO4_R 44

CAM1_LDO_EN 31

CAM2_LDO_EN 31

SMB347_USB51HC 33
SMB347_SUSP 33

LL_BAT_T30 33

1V8_O_LID# 25

NFC_VEN 44

JTAG_TCK 24

JTAG_TDO 24

JTAG_RTCK 24

THERMD_N 26

THERMD_P 26

ROW10, 11 for charger control

TEMP_ALERT#_KAI form Thermal Sensor

JTAG_TDI 24

JTAG_TMS 24
JTAG_TRST# 24

2

VDDIO_SYS

12

0229 NV change
10k -> 100k

TEMP_ALERT#_KAI 26

R14

R14
100KR1J

100KR1J

N/A

N/A

12

R15

R15

100KR1J

100KR1J

N/A

N/A

CPU_PWR_REQ PD
100k in KAI design

JTAG_TRT_N

12

R24

R24

100KR1J

100KR1J

N/A

N/A

CORE_PWR_REQ 14,50
CPU_PWR_REQ 50

Pin to Pin

Unmount

Unmount

Unmount

1

PCBID
ID5 ID4 ID3
0 0 0 for ME370 T SR3

PCBID
ID2 = 0 for BCM47511
ID2 = 1 for BCM4751

PCBID
ID1 ID0
0 0 AW-NH660 BCM4330

1 0 AW-NH665 BCM4330

PCB_ID0

PCB_ID1

PCB_ID2

PCB_ID3

PCB_ID4

PCB_ID5

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

Unmount

1 2
1 2

Unmount

1 2
1 2

R18100KR1J /@ /PCBID/WIFIR18100KR1J /@/PCBID/WIFI
R17100KR1J /PC BID/WIFIR17100KR1J /PC BID/WIFI

R19100KR1J /PC BID/WIFIR19100KR1J /PC BID/WIFI
R20100KR1J /@ /PCBID/WIFIR20100KR1J /@/PCBID/WIFI

R22100KR1J /PC BID/GPSR22100KR1J /PC BID/GPS
R27100KR1J /@ /PCBID/GPSR27100KR1J /@/PCBID/GPS

R23100KR1J /@ /PCBID/PROJECTR23100KR1J /@ /PCBID/PROJECT
R25100KR1J /PC BID/PROJECTR25100KR1J /PCBID/ PROJECT

R31100KR1J /@ /PCBID/PROJECTR31100KR1J /@ /PCBID/PROJECT
R28100KR1J /PC BID/PROJECTR28100KR1J /PCBID/ PROJECT

R30100KR1J /@ /PCBID/PROJECTR30100KR1J /@ /PCBID/PROJECT
R29100KR1J /PC BID/PROJECTR29100KR1J /PCBID/ PROJECT

VDD_1V8_GEN_CPU

Title :

Title :

Title :

01.Block Diagram

01.Block Diagram

01.Block Diagram

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

6 60Thursday, March 22, 2012

6 60Thursday, March 22, 2012

6 60Thursday, March 22, 2012

Rev

Rev

Rev

2.0

2.0

2.0

3.3V

5

R35

R35

1 2

0R3J

0R3J

TPS63020 buck-boost

4

N/A

N/A

+3VSUS_CPU+3VSUS

3.3V

VDD_3V3_GMI+3VSUS_CPU

3

2

1

D D

C C

B B

VDDIO_GMI

AD00

AD01

AD02

AD03

AD04

AD05

AD06

AD07

AD08

AD09

AD10

AD11

AD12

AD13

AD14

AD15

A16

A17

A18

A19

CS0

CS1

CS2

CS3

CS4

CS6

CS7

ADV_N

CLK

RST_N

WAIT

WP_N

IORDY

OE_N

WR_N

DQS

VDD_3V3_GMI

PUPD1PinState

None

None

None

NoneZZ

None

NoneZZ

None

NoneZZ

None

NoneZZ

DOWN

100K

DOWN

100K

None Z

None

None Z

None

None

None Z

None

NoneZZ

UP

100K

100K

UP

100K

UP

100K

UP

100K

UP

100K

UP

100K

UP

None

None10

UP

100K

UP

100K

UP PU100K

UP PU100K

None 1

None 1

None Z

POR

1 2

1 2

Z

Z

PD

PD

Z

Z

Z

PU

PU

1

PU

PU

PU

0

PU

10U6.3VX5RC3M

10U6.3VX5RC3M

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C39

N/AC39

N/A

C40

N/AC40

N/A

Deep Sleep

PUPD After Wake

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Config. Hold

Config. Hold

Config.

Config. Hold

Config.

Config.

Disable Reset

Disable Reset

Config.

Disable Reset

Config.

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Disable Reset

Hold

Reset

Reset

Reset

Reset

ResetConfig.

ResetConfig.

VDD_3V3_GMI

C1
C2
D1

U2D

U2D

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

4/22 GMI

4/22 GMI

(1.8/3.3V)

(1.8/3.3V)

VDDIO_GMI_1
VDDIO_GMI_2
VDDIO_GMI_3

3.3V

GMI_AD00
GMI_AD01
GMI_AD02
GMI_AD03
GMI_AD04
GMI_AD05
GMI_AD06
GMI_AD07
GMI_AD08
GMI_AD09
GMI_AD10
GMI_AD11
GMI_AD12
GMI_AD13
GMI_AD14
GMI_AD15

GMI_A16
GMI_A17
GMI_A18
GMI_A19

GMI_CS0_N
GMI_CS1_N
GMI_CS2_N
GMI_CS3_N
GMI_CS4_N
GMI_CS6_N
GMI_CS7_N

GMI_ADV_N

GMI_CLK

GMI_RST_N

GMI_WAIT

GMI_WP_N

GMI_IORDY

GMI_OE_N

GMI_WR_N

GMI_DQS

GEN2_I2C_SCL
GEN2_I2C_SDA

NAND_D0

F8

NAND_D1

G6

NAND_D2

D3

NAND_D3

E4

NAND_D4

G2

NAND_D5

D2

NAND_D6

B3

NAND_D7

G1

LCD_BL_PWM

H6

NC

F4
E7

TS_WAKEUP#

F3

TS_IRQ#

F5
F7

TS_RESET#_3V3

J2
F1

NC

H4

NC

J6

NC

C4

NC

J3

NC

J4

NC

K7

NC

F6

NC

A3
D6
J5

FTM_MODE#

J7

NAND_ALE

E6

NAND_CLE

A4

D4
B4
D5

C3

NAND_RE#

F2

NAND_WE#

G4

G3

GEN2_I2C_SCL

G5

GEN2_I2C_SDA

G7

LCD1_BL_PWM
PWM_3D
LCD1_BL_EN
EN_VDD_BL1
TS_IRQ*

TS_RESET*
CARD_PEX_RST#

SPI4_SCK
SPI4_DOUT
SPI4_DIN
SPI4_CS1

PCB_ID6
PCB_ID7
PCB_ID8

LCD_LANDSCAPE
SNN_TP_IRQ#
SNN_GMI_CS6
WW_WAKE*

SNN_GMI_RST*
RECOVERY_MODE*
MFG_MODE_R

SNN_GMI_DQS

R44, R45 (GEN2_I2C PU) placed on P.29

R44, R45 (GEN2_I2C PU) placed on P.29

R44, R45 (GEN2_I2C PU) placed on P.29R44, R45 (GEN2_I2C PU) placed on P.29

NAND_D0 18
NAND_D1 18
NAND_D2 18
NAND_D3 18
NAND_D4 18
NAND_D5 18
NAND_D6 18
NAND_D7 18

LCD_BL_PWM 23

TS_WAKEUP# 29,48

TS_IRQ# 29

TS_RESET#_3V3 29

TS_WAKEUP# for TS 5V enable (PD 1M on page.48)

TS_WAKEUP# for TS 5V enable (PD 1M on page.48)

TS_WAKEUP# for TS 5V enable (PD 1M on page.48)TS_WAKEUP# for TS 5V enable (PD 1M on page.48)

SNN_GMI_CS0
CHARGER_STAT

SNN_GMI_CS2

NAND_ALE 18

NAND_CLE 18,26

NAND_CLE for AP thermal shut down in KAI

NAND_CLE for AP thermal shut down in KAI

NAND_CLE for AP thermal shut down in KAINAND_CLE for AP thermal shut down in KAI

NAND_RE# 18
NAND_WE# 18

VDD_3V3_GMI VDD_3V3_GMI

Boot Straps

GEN2_I2C_SCL 29
GEN2_I2C_SDA 29

TS I2C

LCD_BL_PWM

FTM_MODE#

PCBID
ID7 ID6
0 0 ALC5631Q
0 1 WM8903
1 0 ALC5642
1 1 Reserved

PCBID
ID8 Reserved

PCB_ID6

1 2
1 2

Unmount

PCB_ID7

1 2
1 2

Unmount

PCB_ID8

1 2
1 2

R43

N/AR43

N/A

330KR1J

330KR1J

1 2

VDD_3V3_GMI

12

R316

R316
1MR1J

1MR1J

N/A

N/A

R37100KR1J /@/PCBI D/CODECR37100KR1J /@/PCBI D/CODEC
R36100KR1J /PCBID/ CODECR36100KR1J /PCBID/CODEC

R38100KR1J /PCBID/ CODECR38100KR1J /PCBID/CODEC
R39100KR1J /@/PCBI D/CODECR39100KR1J /@/PCBI D/CODEC

R40100KR1J /@/PCBI DR40100KR1J /@/PCBI D
R41100KR1J /PCBIDR41100KR1J /PCBID

T51

/@T51

/@

1

tpc40t_np_68

tpc40t_np_68

VDD_3V3_GMI

A A

Title :

Title :

Title :

T30 GMI IF

T30 GMI IF

T30 GMI IF

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

7 60Wednesday, March 21, 2012

7 60Wednesday, March 21, 2012

7 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

from PMIC

D D

2.8V

+1.35V

VDD_PMU_LDO2_2V8

MAX77663 SD3(2A)

MAX77663 LDO2

VDDIO_DDR

VDD_DDR_RX

from PMIC

1.0V

VDD_PMU_LDO0_1V0

MAX77663 LDO0

VDD_DDR_HS

from PMIC

C41

N/AC41

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C43

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C44

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C42

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C45

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C46
10U6.3VX5RC3M

10U6.3VX5RC3M
C47
10U6.3VX5RC3M

10U6.3VX5RC3M
C48
10U6.3VX5RC3M

10U6.3VX5RC3M

C60

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C61

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C64

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C67

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C49

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C50

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

N/A

N/AC43

N/A

N/AC44

N/A

N/AC42

N/A

N/AC45

N/A

N/AC46

N/A

N/AC47

N/A

N/AC48

N/A

N/AC60

N/A

N/AC61

N/A

N/AC64

N/A

N/AC67

N/A

N/AC49

N/A

N/AC50

N/A

VDDIO_DDR

C C

VDDIO_DDR

VDD_DDR_HS

VDD_DDR_RX

B B

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

4

U2C

U2C

3/22 DDR3/LPDDR2

3/22 DDR3/LPDDR2

(1.2/1.25/1.35/1.5)

(1.2/1.25/1.35/1.5)

VDDIO_DDR

0620

1.35V

VDD_DDR_RX

G16
G19
H15
H16
H18
H19
H21
H22
J15
J16
J18
J19
J21
J23
K22
K23

A27

VDDIO_DDR_01
VDDIO_DDR_02
VDDIO_DDR_03
VDDIO_DDR_04
VDDIO_DDR_05
VDDIO_DDR_06
VDDIO_DDR_07
VDDIO_DDR_08
VDDIO_DDR_09
VDDIO_DDR_10
VDDIO_DDR_11
VDDIO_DDR_12
VDDIO_DDR_13
VDDIO_DDR_14
VDDIO_DDR_15
VDDIO_DDR_16

(2.8/3.3V)

(2.8/3.3V)

VDD_DDR_RX

3.3V

(1.00V)

(1.00V)

VDD_DDR_HS

E10

H9

VDD_DDR_HS_1
VDD_DDR_HS_2

1.0V

0503

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

3

DDR_DQ00
DDR_DQ01
DDR_DQ02
DDR_DQ03
DDR_DQ04
DDR_DQ05
DDR_DQ06
DDR_DQ07
DDR_DQ08
DDR_DQ09
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31

DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3

DDR_DQS0N
DDR_DQS0P

DDR_DQS1N
DDR_DQS1P

DDR_DQS2N
DDR_DQS2P

DDR_DQS3N
DDR_DQS3P

DDR_A00
DDR_A01
DDR_A02
DDR_A03
DDR_A04
DDR_A05
DDR_A06
DDR_A07
DDR_A08
DDR_A09
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14

DDR_RAS_N
DDR_CAS_N

DDR_WE_N

DDR_BA0
DDR_BA1
DDR_BA2

DDR_CS0_N
DDR_CS1_N

DDR_ODT0
DDR_ODT1

DDR_CKE0
DDR_CKE1

DDR_CLK_N

DDR_CLK

DDR_RESET

DDR_QUSE0
DDR_QUSE1
DDR_QUSE2
DDR_QUSE3

DDR_COMP_PU

DDR_COMP_PD

2

R49

R49
0R1J

0R1J

1 2

0R1J

0R1J

1 2

R52

Unmount

N/A

N/A

DDR_DQ[31..0] 19

DDR_DM[3..0] 19

DDR_DQS0N 19
DDR_DQS0P 19

DDR_DQS1N 19
DDR_DQS1P 19

DDR_DQS2N 19
DDR_DQS2P 19

DDR_DQS3N 19
DDR_DQS3P 19

DDR_A[14..0] 19

/@

/@

/@R52

/@

VDDIO_DDR

DDR_RESET_N

Unmount

R4810KR1J /@R4810KR1J /@

1 2

0906 NV change to UM

R50

R50

45.3R2F

45.3R2F

N/A

N/A

12

12

DDR_DQ0

D24

DDR_DQ1

B25

DDR_DQ2

A25

DDR_DQ3

D21

DDR_DQ4

A24

DDR_DQ5

A21

DDR_DQ6

A22

DDR_DQ7

B22

DDR_DQ8

C15

DDR_DQ9

A13

DDR_DQ10

C12

DDR_DQ11

B13

DDR_DQ12

C13

DDR_DQ13

A10

DDR_DQ14

B10

DDR_DQ15

C10

DDR_DQ16

G22

DDR_DQ17

D22

DDR_DQ18

D25

DDR_DQ19

F23

DDR_DQ20

G21

DDR_DQ21

E25

DDR_DQ22

F24

DDR_DQ23

F22

DDR_DQ24

F13

DDR_DQ25

G13

DDR_DQ26

G10

DDR_DQ27

D13

DDR_DQ28

G9

DDR_DQ29

F10

DDR_DQ30

D10

DDR_DQ31

F12

DDR_DM0

C22

DDR_DM1

D12

DDR_DM2

E22

DDR_DM3

G12

DDR_DQS0N

B24

DDR_DQS0P

C24

DDR_DQS1N

B12

DDR_DQS1P

A12

DDR_DQS2N

E24

DDR_DQS2P

D23

DDR_DQS3N

E12

DDR_DQS3P

D11

DDR_A0

D20

DDR_A1

G15

DDR_A2

A18

DDR_A3

D14

DDR_A4

B19

DDR_A5

A16

DDR_A6

C21

DDR_A7

A15

DDR_A8

D15

DDR_A9

C16

DDR_A10

E16

DDR_A11

D18

DDR_A12

E15

DDR_A13

A19

DDR_A14

B16

DDR_RAS_N

G18

DDR_CAS_N

D17

DDR_WE_N

D19

DDR_BA0_N

F15

DDR_BA1_N

E21

DDR_BA2_N

F21

DDR_CS0_N

F16

DDR_CS1_N

E19

DDR_ODT0_N

D16
F18

DDR_CKE0

F19
E18

DDR_CLKN

B18

DDR_CLKP

C18

DDR_RESET_N

C19

DDR_QUSE0

D27

DDR_QUSE1

D26

DDR_QUSE2

E9

DDR_QUSE3

F9

DDR_COMP_PU

B21

DDR_COMP_PD

B15

DDR_RAS_N 19

DDR_CAS_N 19

DDR_WE_N 19

DDR_BA0_N 19

DDR_BA1_N 19

DDR_BA2_N 19

DDR_CS0_N 19

DDR_CS1_N 19

DDR_ODT0_N 19

DDR_CKE0 19

DDR_RESET_N 19

No Use

No Use

R53

R53

40.2R2F N /A

40.2R2F N /A

1 2

1 2

40.2R2F

40.2R2F
R54

R54

VDDIO_DDR

DDR_CLK_R_C

C51

C51

0.01U10VX7RC1K

0.01U10VX7RC1K

N/A

N/A

12

1

R51

R51

45.3R2F

45.3R2F

N/A

N/A

DDR_CLKN 19
DDR_CLKP 19

A A

Title :

Title :

Title :

T30 DDR

T30 DDR

T30 DDR

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

8 60Wednesday, March 21, 2012

8 60Wednesday, March 21, 2012

8 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

0502

CSI_CLKAN
CSI_CLKAP

CSI_D1AN
CSI_D1AP

CSI_D2AN
CSI_D2AP

CSI_CLKBN
CSI_CLKBP

CSI_D1BN
CSI_D1BP

DSI_CSI_RUP

DSI_CSI_RDN

DSI_CSI_TEST_OUT

T30 VI

VI_MCLK

VI_PCLK

VI_HSYNC
VI_VSYNC

VI_DO0
VI_DO1
VI_DO2
VI_DO3
VI_DO4
VI_DO5
VI_DO6
VI_DO7
VI_DO8
VI_DO9
VI_DO10
VI_DO11

1.2V

D D

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

MAX77663 LDO7

AVDD_DSI_CSI

12

C52

C52

N/A

N/A

AVDD_DSI_CSIVDD_PMU_LDO7_1V2

12

C53

C53

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

N/A

N/A

0620

U2H

U2H

7/22 DSI & CSI

7/22 DSI & CSI

(1.2V)

(1.2V)

AVDD_DSI_CSI

AB6

AVDD_DSI_CSI

1.2V

C C

B B

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

1.8V

DSI_CSI_TEST_OUT

0626

VDDIO_CAM_T30SVDD_1V8_GEN_CPU

CSI_CLKAN
CSI_CLKAP

CSI_D1AN
CSI_D1AP

CSI_D2AN
CSI_D2AP

CSI_CLKBN
CSI_CLKBP

CSI_D1BN
CSI_D1BP

CSI_D2BN
CSI_D2BP

DSI_CLKAN
DSI_CLKAP

DSI_D1AN
DSI_D1AP

DSI_D2AN
DSI_D2AP

DSI_CSI_RUP

DSI_CSI_RDN

AC4
AD4

AD3
AD2

AE2
AE3

AG3
AG2

AD1
AE1

AH2
AH1

AA1
AB1

AB2
AB3

AA2
AA3

AG4

AJ3

AB4

T30 GPIO

PRO_RST#

HDMI_VBUS_EN_OC#

EN_VDDIO_SD
EN_VDD_MC

BAT_IN_CPU#
COMPASS_DRDY
ALS_INT#_MB
GS_INT
LVDS_SHTDN#
CAM_RST_2M
EN_VDD_PNL
DSP_RST#
EN_VDD_FUSE
EN_HVDD_PEX
DSP_PWDN#
SDMMC1_WP

1 2

0626

VDDIO_CAM_T30S

12

C54

C54

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

VDDIO_CAM_T30S

A A

5

12

C55

C55

4.7U6.3VX5RC2MN/A

4.7U6.3VX5RC2MN/A

AD9

U2G

U2G

18/22 CAM

18/22 CAM

(1.8/2.8 ~ 3.3V)

(1.8/2.8 ~ 3.3V)

VDDIO_CAM

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

0626

1.8V

CAM_I2C_SCL

CAM_I2C_SDA

CAM_MCLK

GPIO_PBB0
GPIO_PBB3
GPIO_PBB4
GPIO_PBB5
GPIO_PBB6
GPIO_PBB7

GPIO_PCC1
GPIO_PCC2

4

CAM_I2C_SDA

AH7

VI_MCLK

AD5

CAM_RST_5M

AF6
AD6
AG7

PWDN_5M

AE5
AE6

PWDN_2M

AE7

NC

AC6

TEMP_ALERT#

AG6

CAM_I2C_SCL

AG5

T30S pin

AA1

BB

W5

BB

W5

BB

AA3

BB

V4

BB

AC11

BB

AF6

BB

AA9

BB

AP18

LCD

AM14

CAM

AG33

UART

V8

BB

AM36

UART

X

XX

AM16

CAM

D36

AUDIO

CSI_CLKAN 31
CSI_CLKAP 31

CSI_D1AN 31
CSI_D1AP 31

CSI_D2AN 31
CSI_D2AP 31

CSI_CLKBN 31
CSI_CLKBP 31

CSI_D1BN 31
CSI_D1BP 31

R58

R58

49.9R2F

49.9R2F

N/A

N/A

0626 0626

VDD_1V8_GEN VDD_1V8_GEN

12

2.2KR1J

2.2KR1J

R59

R59

N/A

N/A

12

CAM2_PWDN

FRONT_SEL

R60

R60

2.2KR1J

2.2KR1J

N/A

N/A

3

GPIO

Camera 1 (Rear)

Camera 2 (Front)

AVDD_DSI_CSI

R56

R56
453R2F

453R2F

N/A

N/A

1 2

R57

R57

49.9R2F

49.9R2F

N/A

N/A

1 2

CAM_I2C_SCL 25,26,31,44

CAM_I2C_SDA 25,26,31,44

CAM_RST_5M 31

PWDN_5M 31

PWDN_2M 31

TEMP_ALERT# 26

R61
33R2J

33R2J

1 2

12

C56

/@C56

/@

33P25VNPOC1J

33P25VNPOC1J

Unmount

12/23 RF add 33P

VDDIO_VI

D00

D01

D02

D03

D04

D05

D06

D07

D08

D09

D10

D11

MCLK

PCLK

HSYNC

VSYNC

VDDIO_CAM

PBB0

PBB3

PBB4

PBB5

PBB6

PBB7

PCC1

PCC2

N/AR61

N/A

CAM_MCLK 31

CW/0228
Check SI

POR

PUPD PinState

DOWN

15K

DOWN

DOWN

15K

DOWN

15K

DOWN

15K

DOWN

DOWN

15K

DOWN

15K

DOWN

15K

DOWN

DOWN

15K

DOWN

15K

DOWN

15K

DOWN

DOWN

15K

DOWN

15K

POR

PUPD PinState

None

None

None

None

None

None

UP

50K

UP

50K

2

PD

PD15K

PD

PD

PD

PD15K

PD

PD

PD

PD15K

PD

PD

PD

PD15K

PD

PD

Deep Sleep

PUPD After Wake

Disable Hold

Disable Hold

Disable Hold

Config. Hold

Disable Hold

Disable Hold

Disable Hold

Disable Hold

Disable Hold

Disable Hold

Disable

Disable Hold

Disable Hold

Disable Hold

Disable Hold

Disable Hold

Deep Sleep

PUPD After Wake

Config.

Z

Config.

Z

Config.

Z

Config.

Z

Z

Config.

Z

Config.

PU

Config.

PU

Config. Reset

Hold

Hold

Hold

Hold

Hold

Hold

Hold

Hold

Title :

Title :

Title :

T30 DSI/CSI,CAM

T30 DSI/CSI,CAM

T30 DSI/CSI,CAM

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

9 60Tuesday, March 20, 2012

9 60Tuesday, March 20, 2012

9 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

1.8V

D D

C C

VDD_1V8_GEN_CPU VDDIO_LCD

C57

N/AC57

VDDIO_LCD

1 2

1 2

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C58

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C59

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/AC58

N/A

N/AC59

N/A

VDDIO_LCD

4

U2I

U2I

8/22 LCD

8/22 LCD

1.8V

AB13
AC13

VDDIO_LCD_1
VDDIO_LCD_2

(1.8 ~ 3.3V)

(1.8 ~ 3.3V)

LCD_PCLK

LCD_WR_N

LCD_DE

LCD_HSYNC

LCD_VSYNC

LCD_D00
LCD_D01
LCD_D02
LCD_D03
LCD_D04
LCD_D05
LCD_D06
LCD_D07
LCD_D08
LCD_D09
LCD_D10
LCD_D11
LCD_D12
LCD_D13
LCD_D14
LCD_D15
LCD_D16
LCD_D17
LCD_D18
LCD_D19
LCD_D20
LCD_D21
LCD_D22
LCD_D23

LCD_M1

LCD_PWR0
LCD_PWR1
LCD_PWR2

LCD_SCK
LCD_CS0_N
LCD_CS1_N

LCD_SDOUT

LCD_SDIN

LCD_DC0

LCD_DC1

CRT_HSYNC
CRT_VSYNC

DDC_SCL
DDC_SDA

HDMI_INT

AG11

AH16
AG9
AF16
AF10

AE8
AF12
AD10
AK15
AK16
AK10
AK12
AG16
AG8
AD15
AK9
AJ12
AF9
AC12
AD12
AE18
AF13
AH15
AE9
AE10
AH13
AH9
AE13
AK13

AG12

AJ9
AG10
AH12

AG15
AJ15
AC10
AJ13
AH10

AE15
AE12

AD13
AJ16

AG14
AJ10

AG13

NC
NC
NC
NC
NC
NC

EN_VDD_PNL

NC

EN_VDD_FUSE

NC

COMPASS_DRDY

ALS_INT#_MB

LVDS_SHTDN#

0721

3

LCD_PCLK

SNN_LCD_ER#

LCD_DE
LCD_HSYNC
LCD_VSYNC

LCD_D0
LCD_D1
LCD_D2
LCD_D3
LCD_D4
LCD_D5
LCD_D6
LCD_D7
LCD_D8
LCD_D9
LCD_D10
LCD_D11
LCD_D12
LCD_D13
LCD_D14
LCD_D15
LCD_D16
LCD_D17

EN_VDD_PNL1

SNN_LCD_PWR0
EN_3V3_FUSE
SNN_LCD_PWR2

SDMMC_WP*
BAT_DET*
COMPASS_DRDY
SNN_LCD_SDOUT
ALS_IRQ*

LVDS1_SHTDN*
SNN_LCD_DC1

SNN_CRT_HSYNC
SNN_CRT_VSYNC

EN_VDD_PNL 21,48

EN_VDD_FUSE 5

0621

COMPASS_DRDY 26

ALS_INT#_MB 25

LVDS_SHTDN# 22

LCD_PCLK 22

LCD_DE 22
LCD_HSYNC 22
LCD_VSYNC 22

LCD_D[17..0] 22

2

VDDIO_LCD

LCD_M1

LCD_PWR0

LCD_PWR1

LCD_PWR2

LCD_SCK

LCD_CS0_N

LCD_CS1_N

LCD_SDOUT

LCD_SDIN

LCD_DC0

LCD_DC1

0502

POR

PUPD PinState

DOWN PD100K

DOWN PD100K

DOWN PD100K

DOWN PD100K

UP 100K PU

UP 100K PU

UP 100K PU

UP 100K PU

UP 100K PU

DOWN 100K

DOWN 100K

PD

PD

1

Deep Sleep

PUPD After Wake

Disable

Disable

Disable

Disable

Disable

Disable

Disable

Disable Hold

Disable Hold

Disable Hold

Disable Hold

Hold

Hold

Hold

Hold

Hold

Hold

Hold

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

B B

A A

Title :

Title :

Title :

T30 LCD

T30 LCD

T30 LCD

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

10 60Tuesday, March 20, 2012

10 60Tuesday, March 20, 2012

10 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

3.3V

D D

1.8V

AE4
AF4

AF7

U2K

U2K

T30L-R-P-A3

T30L-R-P-A3

10/22 HDMI

10/22 HDMI

3.3V

AVDD_HDMI_1
AVDD_HDMI_2

(3.3V)

(3.3V)

1.8V

AVDD_HDMI_PLL

(1.8V)

(1.8V)

HDMI_TXCN
HDMI_TXCP

HDMI_TXD0N

HDMI_TXD0P

HDMI_TXD1N

HDMI_TXD1P

HDMI_TXD2N

HDMI_TXD2P

HDMI_PROBE

HDMI_RSET

AK3
AK4

AJ4
AH4

AH6
AJ6

AK7
AJ7

AG1

AH3

HDMI Conn.

All HDMI pins & powers leave NC when HDMI is not be used.

U2J

U2J

9/22 VDAC

9/22 VDAC

AK6

AVDD_VDAC

(2.8V)

(2.8V)

C C

T30L-R-P-A3

T30L-R-P-A3

VDAC_R
VDAC_G
VDAC_B

VDAC_VREF

VDAC_RSET

AB7
AA9
AA7

AA5

AA6

All VDAC pins & powers leave NC

CEC

B B

0818 NC son't support CEC

A A

Title :

Title :

Title :

T30 HDMI,VGA

T30 HDMI,VGA

T30 HDMI,VGA

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

11 60Saturday, March 03, 2012

11 60Saturday, March 03, 2012

11 60Saturday, March 03, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

VDDIO_BB

1.8V

D D

C69

VDDIO_BB

C C

1 2

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K
C70

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

1.8V

VDDIO_UART

12

C71

C71

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

B B

N/A

VDDIO_BBVDD_1V8_GEN_CPU

N/AC69

N/A

N/AC70

N/A

VDDIO_UARTVDD_1V8_GEN_CPU

VDDIO_UART

AA30

4

U2S

U2S

W1

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

U2R

U2R

14/22 UART

14/22 UART

(1.8/3.3V)

(1.8/3.3V)

VDDIO_UART

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

12/22 BB

12/22 BB

1.8V

VDDIO_BB

(1.8/3.3V)

(1.8/3.3V)

1.8V

ULPI_DATA0
ULPI_DATA1
ULPI_DATA2
ULPI_DATA3
ULPI_DATA4
ULPI_DATA5
ULPI_DATA6
ULPI_DATA7

ULPI_CLK

ULPI_DIR
ULPI_NXT
ULPI_STP

DAP3_DIN

DAP3_DOUT

DAP3_FS

DAP3_SCLK

GPIO_PV0
GPIO_PV1

GEN1_I2C_SCL
GEN1_I2C_SDA

UART2_TXD

UART2_RXD
UART2_RTS_N
UART2_CTS_N

UART3_TXD

UART3_RXD
UART3_RTS_N
UART3_CTS_N

Z

GPIO_PU0

Z

GPIO_PU1

Z

GPIO_PU2

Z

GPIO_PU3

Z

GPIO_PU4

Z

GPIO_PU5

Z

GPIO_PU6

DAP4_DIN

DAP4_DOUT

DAP4_FS

DAP4_SCLK

CLK3_OUT
CLK3_REQ

3

Note: 'EN_VDD_SDMMC1' reserved for power gating

UART1_TXD

R3

UART1_RXD

V1
N1

WLAN_MAC_WAKEN

T3
P4

NC

T4

NC

T1

CAM_RST_2M

T2

UART4_TXD

M2

UART4_RXD

M4
N2
N4

NC

CDC_LDO1_EN

N3
M3
R4
R6

AP_ONKEY#

R1

AP_ACOK#

R2

DEBUG_GPIO0
DEBUG_GPIO1
DBG_IRQ#
WF_WAKEUP
ACC_IRQ*
SNN_ULPI_DATA5
SNN_ULPI_DATA6
SNN_ULPI_DATA7

EN_VDD_SDMMC1
EN_VDDIO_VID_OC*
EN_3V3_MODEN
SNN_DAP3_SCLK

SNN_D_AP_ONKEY#
SNN_D_AP_ACOK#

GPI : Disable SD card write protection

JTAG

不不不不不不不不不不不不不不不不不不不不, 需需需需需需需需

+3VSUS_CPU +3VSUS_CPU

12

R75

R75

4.7KR1J

4.7KR1J

N/A

N/A

BT_EN
BT_WAKEUP
GPS_PWRON
GPS_RST*
MB_DET_DOCK*
GPS_IRQ#
BT_IRQ*

12

R76

R76

4.7KR1J

4.7KR1J

N/A

N/A

AB25
V29

W25
AB28
AB26
AA25

AC27
W27
AB29
W29

AA28
V30
AB30
AB27
AC25
W30
AA27

AA29
W28
AA24
AA26

Y27
W24

0906 NV change

2.2K -> 4.7K

GEN1_I2C_SCL
GEN1_I2C_SDA

GPS_UART2_TXD
GPS_UART2_RXD
GPS_UART2_RTS#
GPS_UART2_CTS#

BT_UART3_TXD
BT_UART3_RXD
BT_UART3_RTS#
BT_UART3_CTS#

BT_EN
BT_WAKEUP
GPS_PWRON

DOCK_IN#
AP_CHARGING#

BT_IRQ#

DAP4_DIN
DAP4_DOUT
DAP4_FS
DAP4_SCLK

CLK3_OUT
CLK3_REQ

WLAN_MAC_WAKEN 41

CAM_RST_2M 31

CDC_LDO1_EN 27

AP_ONKEY# 33
AP_ACOK# 33

No Use

DSP_1V8_EN -> CODEC_1V8_EN

TX/RX GND

Cardhu use 4.7K

GEN1_I2C_SCL
GEN1_I2C_SDA

GPS_UART2_TXD 43

GPS_UART2_RXD 43

GPS_UART2_RTS# 43

GPS_UART2_CTS# 43

BT_UART3_TXD 41

BT_UART3_RXD 41

BT_UART3_RTS# 41

BT_UART3_CTS# 41

BT_EN 40,41
BT_WAKEUP 40,41
GPS_PWRON 40,43

DOCK_IN# 28
AP_CHARGING# 33

BT_IRQ# 41

DAP4_DIN 41
DAP4_DOUT 41
DAP4_FS 41
DAP4_SCLK 41

GEN1_I2C no use
KAI -- ALS, Compass, G yro, NFC I2C connect to GEN1 I2C
Current connect to CAM_I2C

DOCK_IN# -> MAX8903B_CHG#_1V8

williams 0602

2

Debug??

GPIO

Debug??

UART4_TXD

UART4_RXD

UART1_TXD

UART1_RXD

GPS UART

BT UART

GPIO

BT PCM

VDDIO_BB

DATA0

DATA1

DATA2

DATA3

DATA4

DATA5

DATA6

DATA7

PV0

PV1

VDDIO_BB

DAP3_DIN

DAP3_DOUT

DAP3_FS

DAP3_SCLK 100K

Unmount

1 2

1 2

1 2

1 2

R690R1J /@R690R1J /@

R700R1J /@R700R1J /@

R720R1J N/AR720R1J N/A

R730R1J N/AR730R1J N/A

VDDIO_UART

PU0

PU1

PU2

PU3

PU4

PU5

PU6 None Z

POR

PUPD PinState

UP 100K

UP 100K

UP 100K

UP 100K

UP 100K

UP 100K

UP PU

100K

UP 100K

None Z

None Z

POR

PUPD PinState

DOWN 100K

100K

DOWN

100K

DOWN

DOWN

VDD_1V8_GEN_CPU

12

R71

R71
1MR1J

1MR1J

/@

/@

12

R74

R74
1MR1J

1MR1J

N/A

N/A

POR

PUPD PinState

None Z

None

None

None

None

None

Deep Sleep

PUPD After Wake

PU

Disable

PU Disable

PU

Disable

PU

Config.

PU

Config. Hold

PU

Disable

Disable

Disable Hold

PU

Config. Hold

Config. Hold

Deep Sleep

PUPD After Wake

PD

Disable

PD Disable

PD

Disable

PD

Disable

Unmount

UART_DEBUG_TXD 24,28

UART_DEBUG_RXD 24,28

0902

PUPD After Wake

Disable Hold

Z

Disable

Z

Disable

Z

Disable

Z

Disable

Z

Config.

Config.

1

Hold

Hold

Hold

Hold

Hold

Hold

Hold

Hold

Hold

Hold

Deep Sleep

Hold

Hold

Hold

Hold

Hold

Hold

A A

Title :

Title :

Title :

T30 BB,UART

T30 BB,UART

T30 BB,UART

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

12 60Tuesday, March 20, 2012

12 60Tuesday, March 20, 2012

12 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

D D

1.8V

VDD_IO_AUDIO DAP_MCLK1 27

C C

B B

VDD_IO_AUDIOVDD_1V8_GEN_CPU

C30

U2Q

U2Q

13/22 AUDIO

13/22 AUDIO

1.8V

VDDIO_AUDIO

(1.8/3.3V)

(1.8/3.3V)

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

VDD_IO_AUDIO

12

C72

C72

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

CLK1_OUT
CLK1_REQ

DAP1_SCLK

DAP1_FS

DAP1_DOUT

DAP1_DIN

DAP2_SCLK

DAP2_FS

DAP2_DOUT

DAP2_DIN

SPDIF_IN

SPDIF_OUT

SPI1_SCK

SPI1_CS0_N

SPI1_MOSI
SPI1_MISO

SPI2_SCK
SPI2_CS0_N
SPI2_CS1_N
SPI2_CS2_N

SPI2_MOSI
SPI2_MISO

Change

09002-00050000 N/A

DAP_MCLK1_H

C27

NC

F26

G29
D28
G26
G25

DAP2_SCLK_H

C28

DAP2_FS_H

C29

DAP2_DOUT

G27

DAP2_DIN

F27

NC
NC

NC

SNN_SPDIF_IN
SNN_SPDIF_OUT

HOOK_DET#_CPU
CDC_IRQ#
HEAD_DET#

LINOUT_DET

GYRO_INT

H27
A28

B28
J24
F29
F28

D29
G28
F25
E27
B27
D30

SNN_MODEM_AUDIO_CLK
SNN_MODEM_AUDIO_CS
SNN_MODEM_AUDIO_DI
SNN_MODEM_AUDIO_DOUT

SNN_DIS_5V_SWITCH
SNN_SATA_DET*
HP_DET*
CDC_IRQ*
NFC_IRQ*NC
GYRO_IRQ*

DAP2_DOUT 27

DAP2_DIN 27

HOOK_DET#_CPU

CDC_IRQ# 27
HEAD_DET# 28

LINOUT_DET 28
NFC_IRQ_R 44

GYRO_INT 26

27P25VNPOC1J

27P25VNPOC1J

C75

C75

/@

/@

27P25VNPOC1J

27P25VNPOC1J

GPIO

12

C73

C73
33P25VNPOC1J

33P25VNPOC1J

N/A

N/A

12

C89

C89

/@

/@

09002-00050000 N/A

R77 0R1J

R77 0R1J

1 2

R78 33R1J N/AR78 33R1J N/A

1 2

R79 33R1J N/AR79 33R1J N/A

1 2

12

C76

C76
27P25VNPOC1J

27P25VNPOC1J

/@

/@

Unmount

1 2

12

Unmount

R2340R1JN/A R2340R1JN/A

12

C74

C74
33P25VNPOC1J

33P25VNPOC1J

/@

/@

Unmount

HOOK_DET# 28

DAP2_SCLK 27
DAP2_FS 27

REMOVE FM I2S 0609

CODEC

0229 EMI add

VDD_IO_AUDIO

SPI2_SCK

SPI2_CS0_N

SPI2_CS1_N

SPI2_CS2_N

SPI2_MOSI

SPI2_MISO

POR

PUPD PinState

UP 100K

UP 100K

UP 100K

UP 100K

DOWN 100K

DOWN 100K

PU

PU

PU

PU

PDPDDisable

Deep Sleep

PUPD After Wake

Disable

Disable Reset

Config.

Config.

Disable

Reset

Hold

Hold

Hold

Hold

A A

Title :

Title :

Title :

T30 AUDIO

T30 AUDIO

T30 AUDIO

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

13 60Tuesday, March 20, 2012

13 60Tuesday, March 20, 2012

13 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

3.3V

D D

TPS63020 buck-boost

+3VSUS AVDD_USB

12

0720

C62

C62

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

AVDD_USB_DISCHARGE

EN_AVDD_USB50

1 2

5

IN

4

DIS

1 2

R68

R68
0R2J /@

0R2J /@

U14

U14

OUT
GND

EN

NCT3521U

NCT3521U

330R1J

330R1J
R66

1
2
3

N/A

N/A

N/AR66

N/A

MAX77663 GPIO2

Signal from MAX77663

EN_AVDD_USB from MAX77663 GPIO2, check PU resister in PMU side(100k PU to VPH_PWR_CHGR)

C77

N/AC77

AVDD_USB

C C

1 2

1 2

1.8V

T30 AVDD_USB_PL L 1.8V

VDD_1V8_GEN AVDD_USB_PLL

B B

1 2

CORE_PWR_REQ6,50

Q2

Q2
SI2305DS

SI2305DS

N/A

N/A

R63

N/AR63

N/A

EN_AVDD_USB_PLL__SWITCH_1

100KR1J

100KR1J

From T30

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C78

N/AC78

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

SI2305DS 2nd Source
07G005C69010 P-MOSFET EMF44P02J SOT-23
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
07G005051310 P-MOSFET NTR2101PT1G SOT-23
07G00538101L P-MOSFET AP2305GN SOT-23

AVDD_USB_PLL_1

Unmount

D

S

D

S

2 3

2

2

3

3

G

G

12

1

1

1

12

R64

R64
10KR1J

10KR1J

N/A

N/A

EN_AVDD_USB_PLL_SWITCH_3

61

Q3A

Q3A
UM6K1N

UM6K1N

2

N/A

N/A

C63

C63
100P25VNPOC1J

100P25VNPOC1J

/@

/@

5

12

R62

R62
330R1J

330R1J

N/A

N/A

34

Q3B

Q3B
UM6K1N

UM6K1N

N/A

N/A

Vth=1.5V

EN_AVDD_USB_PLL__SWITCH_2

R80

30Ohm/100Mhz

30Ohm/100Mhz

21

4

N/AR80

N/A

AVDD_USB_PLL

12

C79

C79

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

3

AVDD_USB

AVDD_USB_PLL

0229 EMI add
Close to CPU

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

Unmount

0620

U2L

U2L

11/22 USB

11/22 USB

(3.3V)

(3.3V)

3.3V

U12

AVDD_USB

(1.8V)

(1.8V)

1.8V

U4

AVDD_USB_PLL

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

U2N

U2N

16/22 IC_USB

16/22 IC_USB

V9

AVDD_IC_USB

(1.8V)

(1.8V)

USB1_VBUS

C90

C90

/@

/@

2

USB1_VBUS

12

C80

C80

0.1U6.3VX5RC1K

12

USB1_DN
USB1_DP

0.1U6.3VX5RC1K

Unmount

C81

C81

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

N/A

N/A

1014 TF201 add

W5

W3
W2

T7

/@

/@

USB1_VBUS

USB1_DN
USB1_DP

USB1_ID

AVDD_USB

USB1_VBUS

12

USB1_VBUS

ACC1_DETECT

Q6

Q6

SI2305DS

SI2305DS

D

D

3

3

G

G

1

1

1

ACOK_DOCKOK_3

12

R82

R82
100KR1J

100KR1J

N/A

N/A

ACOK_DOCKOK_2

61

Q5A

Q5A
UM6K1N

UM6K1N

2

N/A

N/A

USB1_VBUS

USB1_DN 28,49
USB1_DP 28,49

0229 EMI add

Close to CPU

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

Unmount

SNN_USB2_VUS

V5

USB2_VBUS

T6

USB2_DN

T5

USB2_DP

ACC2_DETECT

USB3_VBUS

USB3_DN
USB3_DP

ACC3_DETECT

USB_REXT

IC_USB_DN
IC_USB_DP

W4

R5

V3
V2

V4

Y4

W8
W9

SNN_USB2_ID

SNN_USB3_VUS

SNN_USB3_ID

USB_RSET

SNN_IC_USB_DNSNN_AVDD_IC_USB
SNN_IC_USB_DP

12

R84

R84
1KR1F

1KR1F

N/A

N/A

VDD_USB1_VBUS

S

S

N/A

N/A

23

2

2

R81

R81
1MR1J N/A

1MR1J N/A

1 2

SI2305DS 2nd Source
07G005C69010 P-MOSFET EMF44P02J SOT-23
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
07G005051310 P-MOSFET NTR2101PT1G SOT-23
07G00538101L P-MOSFET AP2305GN SOT-23

AVDD_USB

12

100KR1J

100KR1J

12

C156

C156

/@

/@

3G Module

Dock USB HUB

1

USB VBUS

R83

R83

/@

/@

Unmount

USB Conn.(OTG)

USB1_ID 28

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

A A

Note:

1. once USB1 is connected and USB1_VBUS is a wake source, our EMC, CPU would run at max frequency and voltage.

2. USB1_VBUS must be powered w hen force recovery mode.

3. USB1_VBUS is powered with U SB_DP/N data transition, SW wil l recognize that a HOST PC is plugged in.

5

4

3

W7

U2M

U2M

15/22 HSIC

15/22 HSIC

(1.2V)

(1.2V)

VDDIO_HSIC

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

IC_USB_REXT

HSIC_DATA

HSIC_STROBE

HSIC_REXT

HSIC_DATA

V6

HSIC_STROBE

V7

W6

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

ME370T

ME370T

ME370T

1

T30 USB,HSIC,ICUSB

T30 USB,HSIC,ICUSB

T30 USB,HSIC,ICUSB

Richard Lin

Richard Lin

Richard Lin

14 60Wednesday, March 21, 2012

14 60Wednesday, March 21, 2012

14 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

SNN_IC_USB_REXT

V8

5

D D

1.8V

VDDIO_SDMMC4

1 2

1 2

VDDIO_SDMMC4VDD_1V8_GEN_CPU

C82

N/AC82

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C83

N/AC83

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

VDDIO_SDMMC4

4

0620

U2E

U2E

(1.2/1.8V)

(1.2/1.8V)

D8

VDDIO_SDMMC4

5/22 SDMMC4

5/22 SDMMC4

1.8V

SDMMC4_DAT0
SDMMC4_DAT1
SDMMC4_DAT2
SDMMC4_DAT3
SDMMC4_DAT4
SDMMC4_DAT5
SDMMC4_DAT6
SDMMC4_DAT7

SDMMC4_CLK

SDMMC4_CMD

SDMMC4_RST_N

3

SDMMC4_DAT0

B9

SDMMC4_DAT1

B6

SDMMC4_DAT2

C6

SDMMC4_DAT3

A6

SDMMC4_DAT4

B7

SDMMC4_DAT5

A7

SDMMC4_DAT6

D7

SDMMC4_DAT7

D9

SDMMC4_CLK_T30

A9

SDMMC4_CMD_T30

C7

SDMMC4_RST#

C9

SDMMC4_DAT0 20
SDMMC4_DAT1 20
SDMMC4_DAT2 20
SDMMC4_DAT3 20
SDMMC4_DAT4 20
SDMMC4_DAT5 20
SDMMC4_DAT6 20
SDMMC4_DAT7 20

SDMMC4_RST# 20

eMMC

2

1

SDMMC4_CLK_T30

SDMMC4_CMD_T30

C65

C65

33P25VNPOC1J

0613Y

33P25VNPOC1J

Unmount

SDMMC1_COMP_PU

SDMMC1_COMP_PD

SDMMC3_DAT0
SDMMC3_DAT1
SDMMC3_DAT2
SDMMC3_DAT3

WF_RST#
WIFI_EN

SDMMC3_CLK
SDMMC3_CMD

SDMMC3_COMP_PU

SDMMC3_COMP_PD

/@

/@

SNN_GPIO_PV2

SNN_GPIO_PV3

EN_3V3_EMMC
EN_3V3_COM
WF_RST*
WF_EN

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

3.3V/1.8V

VDD_PMU_LDO6_3V_1V8

C C

VDDIO_SDMMC1

1 2

0R1J /@

0R1J /@

0229
NV recommend VDDIO_SDMMC1 connect to
GND when SDMMC1 is not using

1 2

1 2

Change C85 change to 0ohm

1.8V

B B

MAX77663 LDO6

VDDIO_SDMMC3

1 2

1 2

Unmount

R34

R34

VDDIO_SDMMC1

C84

/@C84

/@

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C85

N/A

C85

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

10G211000007010

10G211000007010

VDDIO_SDMMC3VDD_1V8_GEN_CPU

C86

N/AC86

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C87

N/AC87

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

VDDIO_SDMMC1

Unmount

VDDIO_SDMMC3

J1

G24

0620

U2P

U2P

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

0620

U2O

U2O

T30L-R-P-A3

T30L-R-P-A3

N/A

N/A

17/22 SDMMC1

17/22 SDMMC1

3.3V/1.8V

(1.8/2.8 ~ 3.3V)

(1.8/2.8 ~ 3.3V)

VDDIO_SDMMC1

T30s has onchip 47k pull-ups

6/22 SDMMC3

6/22 SDMMC3

(1.8/2.8 ~ 3.3V)

(1.8/2.8 ~ 3.3V)

VDDIO_SDMMC3

1.8V

Internal Pull-up resistors on DATA & CMD is 15K

K1

SDMMC1_DAT0

K3

SDMMC1_DAT1

K2

SDMMC1_DAT2

K4

SDMMC1_DAT3

M6

SDMMC1_CLK

N6

SDMMC1_CMD

GPIO_PV2
GPIO_PV3

CLK2_OUT
CLK2_REQ

L4

K6

NC

M5

NC

M1

NC

K5

NC

N5

SDMMC1_COMP_PU

SDMMC1_COMP_PD

Note: 'EN_3V3_EMMC' reserved for power gating

L27

SDMMC3_DAT0

J26

SDMMC3_DAT1

J28

SDMMC3_DAT2

K26

SDMMC3_DAT3

J27

SDMMC3_DAT4

K25

SDMMC3_DAT5

K24

SDMMC3_DAT6

K28

SDMMC3_DAT7

G30

SDMMC3_CLK

J29

SDMMC3_CMD

SDMMC3_COMP_PU

SDMMC3_COMP_PD

J25

K27

12

1 2

1 2

12

C66

C66
33P25VNPOC1J

33P25VNPOC1J

/@

/@

0217 EMI add

Unmount

1 2

1 2

R88

R88

33.2R1F N /A

33.2R1F N /A

1 2

33.2R1F N /A

33.2R1F N /A

1 2

R89

R89

N/A R32

N/A

0R1J

0R1J

N/A R33

N/A

0R1J

0R1J

SDMMC3_DAT0 40
SDMMC3_DAT1 40
SDMMC3_DAT2 40
SDMMC3_DAT3 40

WF_RST# 40,41
WIFI_EN 40,41

SDMMC3_CLK 40

SDMMC3_CMD 40

R32

R33

R8633.2R1F /@R8633.2R1F / @

R8733.2R1F /@R8733.2R1F / @

0614

VDDIO_SDMMC3

SDMMC4_CLK

SDMMC4_CMD

SD Card

VDDIO_SDMMC1

No Use

WIFI

WIFI

GPIO

SDMMC4_CLK 20

SDMMC4_CMD 20

VDDIO_SDMMC1

GPIO_PV2

GPIO_PV3

VDDIO_SDMMC3

SDMMC3_DAT4

SDMMC3_DAT5

SDMMC3_DAT6

SDMMC3_DAT7

POR

PUPD PinState

None Z

None

POR

PUPD PinState

UP 15K

UP 15K

UP 15K

UP 15K

PUPD After Wake

Disable Hold

Z

Disable

PUPD After Wake

PU

Config.

PU

Config.

PU

Config.

PU

Config.

Deep Sleep

Deep Sleep

Hold

Hold

Hold

Hold

Hold

A A

Title :

Title :

Title :

T30 SDMMC,eMMC

T30 SDMMC,eMMC

T30 SDMMC,eMMC

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

15 60Tuesday, March 20, 2012

15 60Tuesday, March 20, 2012

15 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

D D

C C

R91

R91
0R2J /@

0R2J /@

3.3V

1 2

Unmount

VDDIO_PEX_CTL+3VSUS_CPU

4

AB18
AB19

AD22

AB21

AC22

AE23

3

U2T

U2T

20/22 PEX

20/22 PEX

(1.05V)

(1.05V)

AVDD_PEXA_1
AVDD_PEXA_2

1.05V

(1.05V)

(1.05V)

VDD_PEXA

1.05V

(3.3V)

(3.3V)

HVDD_PEX

3.3V

(1.05V)

(1.05V)

AVDD_PEXB

1.05V

(1.05V)

(1.05V)

VDD_PEXB

1.05V

PEX_L0_TXN
PEX_L0_TXP

PEX_L0_RXN
PEX_L0_RXP

PEX_L1_TXN
PEX_L1_TXP

PEX_L1_RXN
PEX_L1_RXP

PEX_L2_TXN
PEX_L2_TXP

PEX_L2_RXN
PEX_L2_RXP

PEX_L3_TXN
PEX_L3_TXP

PEX_L3_RXN
PEX_L3_RXP

PEX_L4_TXN
PEX_L4_TXP

PEX_L4_RXN
PEX_L4_RXP

PEX_L5_TXN
PEX_L5_TXP

PEX_L5_RXN
PEX_L5_RXP

AG18
AF18

AJ19
AH19

AF19
AG19

AK22
AK21

AJ18
AH18

AK19
AK18

AK24
AK25

AJ21
AH21

AG21
AF21

AJ24
AH24

AJ25
AH25

AG22
AG23

2

1

(1.05V)

(1.05V)

B B

U2U

U2U

21/22 NC

21/22 NC

(1.05V)

AVDD_SATA

VDD_SATA

HVDD_SATA

AVDD_SATA_PLL

(1.05V)

(1.05V)

(1.05V)

(3.3V)

(3.3V)

(1.05V)

(1.05V)

SATA_TESTCLKN

SATA_TESTCLKP

SATA_L0_TXN
SATA_L0_TXP

SATA_L0_RXN

SATA_L0_RXP

SATA_TERMP

AD16
AE16

AE19
AD19

AE21
AD21

AD18

4

AC15

AF15

AC16

AG17

A A

T30L-R-P-A3

T30L-R-P-A3

5

VDDIO_PEX_CTL

C88

C88

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

10G212000004010

10G212000004010

N/A

N/A

C88 change to 0ohm (0402)

Change

AE24

AVDD_PEX_PLL

1.05V

(3.3V)

(3.3V)

AF24

VDDIO_PEX_CTL

T30L-R-P-A3

T30L-R-P-A3

3.3V

3

12

PEX_L0_CLKREQ_N

PEX_L0_PRSNT_N

PEX_L0_RST_N

PEX_L1_CLKREQ_N

PEX_L1_PRSNT_N

PEX_L1_RST_N

PEX_L2_CLKREQ_N

PEX_L2_PRSNT_N

PEX_L2_RST_N

PEX_TESTCLKN
PEX_TESTCLKP

PEX_CLK1N

PEX_CLK1P

PEX_CLK2N

PEX_CLK2P

PEX_CLK3N

PEX_CLK3P

PEX_REFCLKN
PEX_REFCLKP

PEX_WAKE_N

PEX_TERMP

AK28
AK27

AB24
AB23

AH27
AJ27

AJ22
AH22

AG24
AD25
AG26

AD26
AD24
AG27

AC21
AE22
AG25

AF22

AJ28
AH28

AG20

Title :

Title :

Title :

T30 PCIe

T30 PCIe

T30 PCIe

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

16 60Saturday, March 03, 2012

16 60Saturday, March 03, 2012

16 60Saturday, March 03, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

D D

U2F

U2F

19/22 VI

19/22 VI

(1.2 / 1.8V)

(1.2 / 1.8V)

AH30

VDDIO_VI

C C

T30L-R-P-A3

T30L-R-P-A3

B B

VI_MCLK

VI_PCLK

VI_HSYNC
VI_VSYNC

VI_D00
VI_D01
VI_D02
VI_D03
VI_D04
VI_D05
VI_D06
VI_D07
VI_D08
VI_D09
VI_D10
VI_D11

4

AE26

AF25

AD27
AG30

AF27
AD30
AH29
AG28
AE27
AE25
AG29
AD29
AE29
AD28
AE30
AE28

U2V

U2V

22/22 NC

22/22 NC

T30L-R-P-A3

T30L-R-P-A3

3

AB10

NC38

AB5

NC39

AC19

NC40

AC9

NC41

C25

NC42

E13

NC43

H25

NC44

AB11

NC_1

AB14

NC_2

AB17

NC_3

AB20

NC_4

AB22

NC_5

AB9

NC_6

AE11

NC_7

AE14

NC_8

AE17

NC_9

AE20

NC_10

F11

NC_11

F14

NC_12

F17

NC_13

F20

NC_14

J11

NC_15

J14

NC_16

J17

NC_17

J20

NC_18

J22

NC_19

J9

NC_20

L22

NC_21

L25

NC_22

L6

NC_23

L9

NC_24

P22

NC_25

P25

NC_26

P6

NC_27

P9

NC_28

U22

NC_29

U25

NC_30

U6

NC_31

U9

NC_32

Y22

NC_33

Y25

NC_34

Y6

NC_35

Y9

NC_36

2

1

A A

Title :

Title :

Title :

T30 NC

T30 NC

T30 NC

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

17 60Saturday, March 03, 2012

17 60Saturday, March 03, 2012

17 60Saturday, March 03, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

Determine Boot Device to be config.

AD0

eMMC primary x4
eMMC primary x8

0

1
1 1
0 0

1 1
0 0
0

ELPIDA DDR3LRS 256MBx4 EDJ2108 EDBG-DJL-F
Hynix DDR3LM 256MBx4 H5TC2G8 3CFR-H9R 03006-00 031200

TBD

TBD

eMMC secondary x4

NAND w/ block & page offset=1

1

SNOR (Non-Muxed , x16)

0

HYNIX 8GB
Kingston 8GB

TBD

TBD

NAND

Mobile LBA NAND
FlexMuxOneNAND

eSD x4

SPI Flash
SNOR (Muxed, x1 6)
SNOR (Muxed, x3 2)

MuxOneNAND

SATA

eMMC secondary x8

Use fuse data

Select Memory Type

Select eMMC Type

H26M42001FMR F BGA-153
KE44B-26BN F BGA169

YM 0502
DG05576900 V1.3 P75

03006-00030900

03100-00120000
05G002514010

R100 R101 R102 R103

V V

V

V

V

V

R96 R97 R98 R99

V V

V

V

V

V

V

V

V

V

SKU1&3

SKU2&4

SKU1&2

SKU3&4

AD3 AD2 AD1

0 0 0 0
0 0 0
0
0
0
0 0
0 0
0
1
1
1
1
1
1
1
1

AD5 AD4

000

1 1

20120302

AD7 AD6

000

1 1

0
0
1
1 1
1 1
1 1 1
0 0 0
0 0
0 001

1
1 1
1 1
1 1 1

1
01

1
011

Boot Source:eMM C as default

0502

D D

12

12

R93

R93

R94

R94

100KR1J

100KR1J

100KR1J

100KR1J

N/A

N/A

N/A

N/A

Default value
should set to 10

Note:

1. NAND_D[3:0] have internal 100K pull up.

RAM Code

VDD_3V3_GMI VDD_3V3_GMI VDD_3V3_GMI VDD_3V3_GMI

12

R96

R96
100KR1J

100KR1J

/@/BOOTSTRAP/eMMC

C C

/@/BOOTSTRAP/eMMC

R97

R97
100KR1J

100KR1J

/BOOTSTRAP/eMMC

/BOOTSTRAP/eMMC

Default value
should set to 00

12

R98

R98

100KR1J

100KR1J

/@/BOOTSTRAP/eMMC

/@/BOOTSTRAP/eMMC

12

100KR1J

100KR1J

/BOOTSTRAP/eMMC

/BOOTSTRAP/eMMC

Note:

1. NAND_D[7:4] do NOT have internal 100K pull up.

/@/BOOTSTRAP/DDR

/@/BOOTSTRAP/DDR

12

/BOOTSTRAP/DDR

/BOOTSTRAP/DDR

R99

R99

VDD_3V3_GMI

12

R95

R95
100KR1J

100KR1J

N/A

N/A

Default value
should set to 00

12

12

R100

R100
100KR1J

100KR1J

12

12

R101

R101
100KR1J

100KR1J

Default value
should set to 11

12

R92

R92

100KR1J

100KR1J

N/A

N/A

AD[3:0] 0001 (T 30S CRB)

AD[7:0] 0000 (T 30S CRB)

R102

R102
100KR1J

100KR1J

/BOOTSTRAP/DDR

/BOOTSTRAP/DDR

R103

R103
100KR1J

100KR1J

/@/BOOTSTRAP/DDR

/@/BOOTSTRAP/DDR

Remove RECOVERY_MODE# & DEV_MODE#

NAND_D0 7

NAND_D1 7

NAND_D2 7

NAND_D3 7

NAND_D0
NAND_D1
NAND_D2
NAND_D3

NAND_D4 7

NAND_D5 7

NAND_D6 7

NAND_D7 7

NAND_D4
NAND_D5
NAND_D6
NAND_D7

For what?

VDD_3V3_GMI VDD_3V3_GMI

B B

A A

12

R104

R104
100KR1J

100KR1J

N/A

N/A

0502

Default value
should set to 10

5

12

R107

R107
100KR1J

100KR1J

N/A

N/A

Default value
should set to 01

12

47KR1J

47KR1J

R108

R108
100KR1J

100KR1J

N/A

N/A

12

R106

R106

N/A

N/A

12

R109

R109
0R1J

0R1J

/@

/@

Unmount

N/A

N/A

1 2

F_RECOVERY# 24,32

NAND_RE# 7

NAND_CLE 7,26

NAND_ALE 7

NAND_WE# 7

NAND_RE#

R10547KR1J

R10547KR1J

NAND_CLE
NAND_ALE
NAND_WE#

F_RECOVERY#

4

NAND_CLE

0
0

1 1

RECOVERY

0
1

NAND_ALE

Serial JTAG chain, MPCORE and AVP

0
1
01

MPCore only JTAG

AVP only JTAG

Description

USB Recovery Mode

Boot from secondary device

Description

Reserved

Title :

Title :

Title :

Boot Straps

Boot Straps

Boot Straps

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

18 60Tuesday, March 20, 2012

18 60Tuesday, March 20, 2012

18 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

VDD_DDR3LVDDQ_DDR3L

+1.35V

from PMIC

03006-00030900

D D

ELPIDA DDR3LRS 256MBx4 EDJ2108 EDBG-DJL-F

03006-00031200
Hynix DDR3LM 256MBx4 H5TC2G8 3CFR-H9R

C93

VDDQ_DDR3L VDDQ_DDR3L

VDD_DDR3L

C C

B B

A A

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

R113

R113

7.5KOhm

7.5KOhm

DDR_VREFDQ

R114

R114

7.5KOhm

7.5KOhm

R115

R115

7.5KOhm

7.5KOhm

DDR_VREFCA

R118

R118

7.5KOhm

7.5KOhm

10U6.3VX5RC3M

10U6.3VX5RC3M
C100

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C98

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C101

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C103

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C105

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C107
10U6.3VX5RC3M

10U6.3VX5RC3M
C109

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C111

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C113

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C115

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C117

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C119

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C121

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C123

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C125

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

VDD_DDR3L

1%N/A

1%N/A

1 2

1%N/A

1%N/A

1 2

VDD_DDR3L

1%N/A

1%N/A

1 2

1%N/A

1%N/A

1 2

12

12

5

N/AC93

N/A

N/AC100

N/A

N/AC98

N/A

N/AC101

N/A

N/AC103

N/A

N/AC105

N/A

N/AC107

N/A

N/AC109

N/A

N/AC111

N/A

N/AC113

N/A

N/AC115

N/A

N/AC117

N/A

N/AC119

N/A

N/AC121

N/A

N/AC123

N/A

N/AC125

N/A

C127

C127

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

C132

C132

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

MAX77663 SD3(2A)

1 2

1 2

1 2

1 2

1 2

1 2

VDD_DDR3L

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

C96
10U6.3VX5RC3M

10U6.3VX5RC3M
C97

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C99

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C102

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C104

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C106

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C108
10U6.3VX5RC3M

10U6.3VX5RC3M
C110

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C112

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C114

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C116

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C118

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C120

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C122

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C124

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C126

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

DDR_CS0_N8
DDR_CS1_N8

DDR_CLKP8
DDR_CLKN8

DDR_CKE08

DDR_RAS_N8
DDR_CAS_N8

DDR_WE_N8

DDR_BA0_N8
DDR_BA1_N8
DDR_BA2_N8

DDR_DQS0N8
DDR_DQS0P8

DDR_DQS1N8
DDR_DQS1P8

DDR_DQS2N8
DDR_DQS2P8

DDR_DQS3N8
DDR_DQS3P8

DDR_ODT0_N8

DDR_RESET_N8

N/AC96

N/A

N/AC97

N/A

N/AC99

N/A

N/AC102

N/A

N/AC104

N/A

N/AC106

N/A

N/AC108

N/A

N/AC110

N/A

N/AC112

N/A

N/AC114

N/A

N/AC116

N/A

N/AC118

N/A

N/AC120

N/A

N/AC122

N/A

N/AC124

N/A

N/AC126

N/A

DDR_CS0_N
DDR_CS1_N

DDR_BA0_N
DDR_BA1_N
DDR_BA2_N

DDR_DQ[31..0]8

DDR_DM[3..0]8

DDR_A[14..0]8

DDR_CLKP
DDR_CLKN

DDR_CKE0

DDR_RAS_N
DDR_CAS_N

DDR_WE_N

DDR_DQS0N
DDR_DQS0P

DDR_DQS1N
DDR_DQS1P

DDR_DQS2N
DDR_DQS2P

DDR_DQS3N
DDR_DQS3P

DDR_ODT0_N

DDR_RESET_N

4

DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ5
DDR_DQ6
DDR_DQ7
DDR_DQ8

DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ17
DDR_DQ18
DDR_DQ19
DDR_DQ20
DDR_DQ21
DDR_DQ22
DDR_DQ23
DDR_DQ24
DDR_DQ25
DDR_DQ26
DDR_DQ27
DDR_DQ28
DDR_DQ29
DDR_DQ30
DDR_DQ31

DDR_DM0

DDR_DM1

DDR_DM2

DDR_DM3

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8

DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14

12

12

C128

N/AC128

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C131

C131

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

N/A

N/A

R116243R1F

R116243R1F

1 2

4

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C91

C91

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

1 2

DDR_VREFCA
DDR_VREFDQ

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8

DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14

DDR_BA0_N
DDR_BA1_N
DDR_BA2_N

DDR_CLKP

DDR_CLKN

DDR_CKE0

DDR_ODT0_N

DDR_CS0_N
DDR_RAS_N
DDR_CAS_N
DDR_WE_N

DDR_DQS3P
DDR_DQS3N

DDR_RESET_N

DDR3L_ZQ3_0

DDR_CS1_N

12

C92

N/AC92

N/A

N/A

N/A

R111243R1F

R111243R1F

U5 HYNIX/ H5TC2G83CFR-H9R

U5 HYNIX/ H5TC2G83CFR-H9R

/DDR

/DDR

J8
E1

K3
L7
L3
K2
L8

L2
M8
M2
N8
M3
H7
M7

K7
N3
N7

J2

K8

J3

F7
G7
G9

G1
H2

F3
G3
H3

C3
D3

A7

B7

N2

H8

A3

F1

F9
H1
H9

J7

03006-00031200

03006-00031200

3

03006-00031200

03006-00031200

U3 HYNIX/ H5TC2G83CFR-H9R

U3 HYNIX/ H5TC2G83CFR-H9R

/DDR

/DDR

DDR_VREFCA

J8

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

VDDQ1
VDDQ2
VDDQ3
VDDQ4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

3

VREFCA

E1

VREFDQ

K3

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC#

N3

A13

N7

A14

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK#

G9

CKE

G1

ODT

H2

CS#

F3

RAS#

G3

CAS#

H3

WE#

C3

DQS

D3

DQS#

A7

NU/TDQS#

B7

DM/TDQS

N2

RESET#

H8

ZQ

A3

NC1

F1

NC2

F9

NC3

H1

NC4

H9

NC5

J7

NC6

B3

DQ0

C7

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DDR_DQ26

C2
C8
E3
E8
D2
E7

A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

DDR_VREFDQ

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8

DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14

DDR_BA0_N
DDR_BA1_N
DDR_BA2_N

DDR_CLKP
DDR_CLKN
DDR_CKE0

DDR_ODT0_N
DDR_CS0_N
DDR_RAS_N
DDR_CAS_N
DDR_WE_N

DDR_DQS0P
DDR_DQS0N

DDR_DM0 DDR_DM1

DDR_RESET_N

DDR3L_ZQ0_0

DDR_CS1_N

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

BA0
BA1
BA2

CK
CK#
CKE

ODT
CS#
RAS#
CAS#
WE#

DQS
DQS#

NU/TDQS#
DM/TDQS

RESET#

ZQ

NC1

NC2
NC3
NC4
NC5
NC6

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

VDDQ1
VDDQ2
VDDQ3
VDDQ4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

DDR_DQ25
DDR_DQ30

DDR_DQ24
DDR_DQ31
DDR_DQ28
DDR_DQ29
DDR_DQ27

VDD_DDR3L

VDDQ_DDR3L

B3
C7
C2
C8
E3
E8
D2
E7

A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

DDR_DQ2
DDR_DQ4
DDR_DQ6

DDR_DQ3

DDR_DQ7
DDR_DQ1
DDR_DQ0
DDR_DQ5

VDD_DDR3L

VDDQ_DDR3L

12

C129

C129

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

12

C130

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

1 2

2

12

12

C95

N/AC95

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C94

C94

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

N/A

N/A

R112243R1F

R112243R1F

1 2

03006-00031200

03006-00031200

U6 HYNIX/ H5TC2G83CFR-H9R

U6 HYNIX/ H5TC2G83CFR-H9R

/DDR

/DDR

DDR_VREFCA

J8

M8
M2
N8
M3
H7
M7

N3
N7

G7
G9

G1
H2

G3
H3

C3
D3

N2

H8

H1
H9

E1

K3
L7
L3
K2
L8
L2

K7

J2
K8
J3

F7

F3

A7
B7

A3

F1
F9

J7

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

BA0
BA1
BA2

CK
CK#
CKE

ODT
CS#
RAS#
CAS#
WE#

DQS
DQS#

NU/TDQS#
DM/TDQS

RESET#

ZQ

NC1

NC2
NC3
NC4
NC5
NC6

DDR_VREFDQ

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6

R117243R1F

R117243R1F

DDR_A7
DDR_A8

DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14

DDR_BA0_N
DDR_BA1_N
DDR_BA2_N

DDR_CLKP
DDR_CLKN
DDR_CKE0

DDR_ODT0_N
DDR_CS0_N
DDR_RAS_N
DDR_CAS_N
DDR_WE_N

DDR_DQS2P
DDR_DQS2N

DDR_DM2DDR_DM3

DDR_RESET_N

DDR3L_ZQ2_0

DDR_CS1_N

2

N/AC130

N/A

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8

DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14

DDR_BA0_N
DDR_BA1_N
DDR_BA2_N

DDR_CLKP
DDR_CLKN
DDR_CKE0

DDR_ODT0_N
DDR_CS0_N
DDR_RAS_N
DDR_CAS_N
DDR_WE_N

DDR_DQS1P
DDR_DQS1N

DDR_RESET_N

DDR3L_ZQ1_0

DDR_CS1_N

03006-00031200

03006-00031200

U4 HYNIX/ H5TC2G83CFR-H9R

U4 HYNIX/ H5TC2G83CFR-H9R

/DDR

/DDR

DDR_VREFCA

J8

DDR_VREFDQ

VDDQ1
VDDQ2
VDDQ3
VDDQ4

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

VREFCA

E1

VREFDQ

K3

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC#

N3

A13

N7

A14

J2

BA0

K8

BA1

J3

BA2

F7

CK

G7

CK#

G9

CKE

G1

ODT

H2

CS#

F3

RAS#

G3

CAS#

H3

WE#

C3

DQS

D3

DQS#

A7

NU/TDQS#

B7

DM/TDQS

N2

RESET#

H8

ZQ

A3

NC1

F1

NC2

F9

NC3

H1

NC4

H9

NC5

J7

NC6

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

A2

VDD1

A9

VDD2

D7

VDD3

G2

VDD4

G8

VDD5

K1

VDD6

K9

VDD7

M1

VDD8

M9

VDD9

B9
C1
E2
E9

A1

VSS1

A8

VSS2

B1

VSS3

D8

VSS4

F2

VSS5

F8

VSS6

J1

VSS7

J9

VSS8

L1

VSS9

L9

VSS10

N1

VSS11

N9

VSS12

B2
B8
C9
D1
D9

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DDR_DQ19

DDR_DQ21

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

VDDQ1
VDDQ2
VDDQ3
VDDQ4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

DDR_DQ20
DDR_DQ16
DDR_DQ22

DDR_DQ17

DDR_DQ23
DDR_DQ18

VDD_DDR3L

VDDQ_DDR3L

1

B3
C7
C2
C8
E3
E8
D2
E7

A2
A9
D7
G2
G8
K1
K9
M1
M9

B9
C1
E2
E9

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

B2
B8
C9
D1
D9

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

ME370T

ME370T

ME370T

1

DDR_DQ9
DDR_DQ12
DDR_DQ8
DDR_DQ14
DDR_DQ11
DDR_DQ15
DDR_DQ13
DDR_DQ10

VDD_DDR3L

VDDQ_DDR3L

DDR3L

DDR3L

DDR3L

Richard Lin

Richard Lin

Richard Lin

Rev

Rev

Rev

2.0

2.0

19 60Tuesday, March 20, 2012

19 60Tuesday, March 20, 2012

19 60Tuesday, March 20, 2012

2.0

eMMC I/F

5

4

3

2

1

D D

VDD_1V8_GEN

1.8V

VDDIO_HSMMC

2.8V

MAX77663 SD2 (2A)

C133

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C135

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

MAX77663 LDO3

VDDIO_HSMMC

0906 NV add

C134

N/AC134

N/AC133

N/A

VDDIO_HSMMC

N/AC135

N/A

1 2

1 2

1 2

VCORE_eMMC_SVDD_PMU_LDO3_2V8

1U6.3VX5RC2K

1U6.3VX5RC2K
C136

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C137

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/AC136

N/A

N/AC137

N/A

03100-00120000
HYNIX 8GB

05G002514010
Kingston 8GB

H26M42001FMR F BGA-153

KE44B-26BN F BGA169

0906 NV add

C152

N/AC152

C150

N/AC150

C C

B B

A A

VCORE_eMMC_S

1 2

1 2

1 2

5

1U6.3VX5RC2K

1U6.3VX5RC2K
C138

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C151

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/AC138

N/A

N/AC151

N/A

VCORE_eMMC_S

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

SDMMC4_DAT6
SDMMC4_DAT5
SDMMC4_DAT4
SDMMC4_DAT3
SDMMC4_DAT2
SDMMC4_DAT1
SDMMC4_DAT0

SDMMC4_CMD
SDMMC4_CLK

VCORE_eMMC_S

VDDIO_HSMMC

C154

C154

N/A

N/A

1 2

1 2

12

N/A

1U6.3VX5RC2K

1U6.3VX5RC2K

C153

N/AC153

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

SDMMC4_RST#15

SYS_RESET#6,32,50

KAI ref. design

U7A

U7A

/eMMC

/eMMC

SD I/F

SDMMC4_DAT7

VCCI_EMMC

Footprint 12x16_14x18 colay

4

SD I/F

J6

DAT7

J5

DAT6

J4

DAT5

J3

DAT4

J2

DAT3

H5

DAT2

H4

DAT1

H3

DAT0

W5

CMD

W6

CLK

POWER/GND

POWER/GND

M6

VCC0

N5

VCC1

T10

VCC2

U9

VCC3

K6

VCCQ0

W4

VCCQ1

Y4

VCCQ2

AA3

VCCQ3

AA5

VCCQ4

K2

VCCI

HYNIX H26M42001FMR

HYNIX H26M42001FMR

03100-00120000

03100-00120000

03100-00120000

VSS0
VSS1
VSS2
VSS3

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4

M7
P5
R10
U8

K4
Y2
Y5
AA4
AA6

Unmount

R402

1 2

0R1J

0R1J

1 2

0R1J N/A

0R1J N/A
R403

R403

SDMMC4_DAT015
SDMMC4_DAT115
SDMMC4_DAT215
SDMMC4_DAT315
SDMMC4_DAT415
SDMMC4_DAT515
SDMMC4_DAT615
SDMMC4_DAT715

SDMMC4_CMD15

SDMMC4_CLK15

/@R402

/@

SDMMC4_RST#_eMMC

A4
A6
A9

A11

B2

B13

D1

D14

H1
H2
H6
H7
H8

H9
H10
H11
H12
H13
H14

J1
J7
J8

J9
J10
J11
J12
J13
J14

K1

K3

K5

K7

K8

K9
K10

HYNIX H26M42001FMR

HYNIX H26M42001FMR

03100-00120000

03100-00120000

U7B

U7B

/eMMC

/eMMC

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34

SDMMC4_DAT0
SDMMC4_DAT1
SDMMC4_DAT2
SDMMC4_DAT3
SDMMC4_DAT4
SDMMC4_DAT5
SDMMC4_DAT6
SDMMC4_DAT7

SDMMC4_CMD
SDMMC4_CLK

AH4

AH6

AH9

AH11

NC135

NC136

NC137

NC138

NC35

NC36

NC37

NC38

K11

K12

K13

K14

3

AG13

NC134

NC39L1NC40L2NC41L3NC42

YM 0502
DG05576900 V1.3 P63

VDDIO_HSMMC

12

12

12

/@

/@

/@

/@

12

/@

/@

/@

/@

12

12

/@

/@

12

/@

/@

/@

/@

R120

R120

4.7KR1J

4.7KR1J

N/A

N/A

12

/@

/@

12

12

/@

/@

CW/0320
Change to 4.7K by Cardhu.

12

R121

R121

4.7KR1J

4.7KR1J

/@

/@

Unmount

SDMMC4_RST#_eMMCSDMMC4_RST#

12

12

/@

/@

/@

/@

EMI

C148

AA9

NC126

AA7

AA8

NC124

NC125

C139

C139
33P25VNPOC1J

33P25VNPOC1J

Y13

Y14

AA1

AA2

NC119

NC120

NC121

NC122

NC123

NC86L4NC52

NC53

M10

M12

M13

C148
33P25VNPOC1J

33P25VNPOC1J

Y12

M14

C146

C146
33P25VNPOC1J

33P25VNPOC1J

AA10

AA11

AA12

AA13

AA14

AE1

AE14

AG2

NC127

NC128

NC129

NC130

NC131

NC132

NC133

NC43

NC44

NC45M1NC46M2NC47M3NC48M5NC49M8NC50M9NC51

L12

L13

L14

Y11

NC118

NC54

Y10

NC117

NC55N1NC56N2NC57N3NC58

C142

C142
33P25VNPOC1J

33P25VNPOC1J

C141

C141
33P25VNPOC1J

33P25VNPOC1J

NC59

NC60

NC61

N10

N12

N13

N14

W14

NC109

NC110Y1NC111Y3NC112Y6NC113Y7NC114Y8NC115Y9NC116

NC62P1NC63P2NC64P3NC65

C143

C143
33P25VNPOC1J

33P25VNPOC1J

W11

W12

W13

NC107

NC108

P10

P12

W10

NC106

NC66

P13

NC103
NC102

NC104W9NC105

NC101
NC100

RST_n

NC67

NC68

P14

C144

C144
33P25VNPOC1J

33P25VNPOC1J

NC99
NC98
NC97
NC96
NC95
NC94
NC93
NC92
NC91
NC90
NC89
NC88
NC87

NC85
NC84
NC83
NC82
NC81
NC80
NC79
NC78
NC77
NC76
NC75
NC74
NC73
NC72
NC71
NC70
NC69

C145

C145
33P25VNPOC1J

33P25VNPOC1J

W8
W7
W3
W2
W1
V14
V13
V12
V3
V2
V1
U14
U13
U12
U10
U7
U6
U5
U3
U2
U1
T14
T13
T12
T5
T3
T2
T1
R14
R13
R12
R5
R3
R2
R1

C149

C149

33P25VNPOC1J

33P25VNPOC1J

C172

C172
33P25VNPOC1J

33P25VNPOC1J

SDMMC4_RST#_eMMC

Check

2

C147

C147
33P25VNPOC1J

33P25VNPOC1J

Unmount

Title :

Title :

Title :

eMMC

eMMC

eMMC

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

20 60Tuesday, March 20, 2012

20 60Tuesday, March 20, 2012

20 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

LCD PNL power Switch

TPS63020 buck-boost

3.3V

D D

VDD_PNL VCC_LCD3V3

1 2

N/A

N/A

12

R125

C157

C157

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

R125
330R1J

330R1J

5

IN

4

NCT3521U

NCT3521U

VCC_LCD3V3_SW_DIS

U8

U8

OUT

GND

EN3DIS

VDD_PNL+3VSUS

C155

N/AC155

1
2

N/A

N/A

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

EN_VDD_PNL10,48

LCD BL power Switch

C C

VPH_PWR_CHGR

0223 change from VBATT

B B

EN_VDD_PNL_R

C158

C158

100P25VNPOC1J

100P25VNPOC1J

/@

/@

Unmount

R128

R128
0R3

0R3

1 2

Remove for Hydis panel

12

12

R127

R127
1MR1J

1MR1J

N/A

N/A

1201
R1907 100K -> 1M

Close to LCD Connector

2.8~5.5V

N/A

N/A

12

C161

C161
1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

VCC_LED

A A

Title :

Title :

Title :

LCD panel power

LCD panel power

LCD panel power

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

21 60Tuesday, March 20, 2012

21 60Tuesday, March 20, 2012

21 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

EMI FILTER

12

U9

N/AU9

N/A

LCD_D12

7

LCD_D13

18bit LCD panel

D D

1.8V

C C

B B

3.3V

+3VSUS

TPS63020 buck-boost

VDD_LVDS_30

VDD_LVDS_PLL_30

VDD_LVDS_F_30

VDD_LVDS_30

IOVCC_30

LCD_D[17..0]10

MAX77663 SD2 (2A)

VDD_LVDS_30

R135

N/AR135

N/A

0R2J

0R2J

1 2

C163

1 2

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C164

1 2

0.01U10VX7RC1K

0.01U10VX7RC1K
C165

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C166

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C167

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C168

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C140

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C170

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

R134
0R2J

0R2J

1 2

L2

N/AL2

N/A

120Ohm/100Mhz

120Ohm/100Mhz

L3 120Ohm/ 100Mhz

L3 120Ohm/ 100Mhz

N/A

N/A

N/AC163

N/A

N/AC164

N/A

N/AC165

N/A

N/AC166

N/A

N/AC167

N/A

N/AC168

N/A

N/AC140

N/A

N/AC170

N/A

N/AR134

N/A

21

VDD_LVDS_F_30

21

VDD_LVDS_PLL_30

TF201 0906 add

IOVCC_30VDD_1V8_GEN

LCD_D14

LCD_D15

8

9

10

NFA21SL307X1A45L

NFA21SL307X1A45L

LCDC_C_R0

3

LCDC_C_R1

4

LCDC_C_R2

5

LCDC_C_R3

6

12

U12

LCD_D16

7

LCD_D17

8

9

LCD_D7

10

NFA21SL307X1A45L

NFA21SL307X1A45L

LCD_HSYNC10
LCD_VSYNC10
LCD_DE10

LCD_PCLK10

LVDS_SHTDN#10

LCD_PCLK
LVDS_SHTDN#

C171

C171
10P50VNPOC1J

10P50VNPOC1J

LCD_D8

LCD_D9

LCD_D10

LCD_D11

N/AU12

N/A

3

LCDC_C_R5

4

LCDC_C_G0LCD_D6

5

LCDC_C_G1

6

12

R144

R144

12

1MR1J

1MR1J

N/A

/@

/@

N/A

1201

Unmount

R9807
100K -> 1M

LCDC_C_R6
LCDC_C_R7
LCDC_C_G6
LCDC_C_G7
LCDC_C_B6
LCDC_C_B7

U10

U10

7

8

9

10

NFA21SL307X1A45L

NFA21SL307X1A45L

R143 0R1JN/A R 143 0R1JN/A

1 2

R142 0R1JN/A R 142 0R1JN/A

1 2

10P50VNPOC1J

10P50VNPOC1J

Unmount

N/A

N/A

12

LCDC_C_G2

3

LCDC_C_G3

4

LCDC_C_G4

5

LCDC_C_G5

6

12

U13

N/AU13

7

8

9

10

NFA21SL307X1A45L

NFA21SL307X1A45L

N/A

LCD_D0

LCD_D1

LCD_D2

LCD_D3

3

4

5

6

LCDC_C_B0LCDC_C_R4

LCDC_C_B1

LCDC_C_B2

LCDC_C_B3

LCD_D4

LCD_D5

EMI FILTER

U39

LVDS_EN_30

U39

J2

D0

K1

D1

K2

D2

J3

D3

K3

D4

J4

D6

K5

D7

K6

D8

J6

D9

G5

D12

G6

D13

F6

D14

E5

D15

D5

D18

C6

D19

B6

D20

B5

D21

A6

D22

A4

D24

B4

D25

A3

D26

J1

D27

K4

D5

H4

D10

H6

D11

E6

D16

D6

D17

A5

D23

A2

CLKIN

B3

SHTDN#

SN75LVDS83BZQLR

SN75LVDS83BZQLR

N/A

N/A

CLKP

CLKM

IOVCC2

LVDSVCC

PLLVCC

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

GND10

IOVCC1
CLKSEL

H2

Y0P

H1

Y0M

G2

Y1P

G1

Y1M

E2

Y2P

E1

Y2M

C2

Y3P

C1

Y3M

D2
D1

H5

VCC

G4

F1

B2

A1
B1
C3
C5
D3
F2
F5
G3
H3
J5

C4
D4

LCDC_C_R0
LCDC_C_R1
LCDC_C_R2
LCDC_C_R3
LCDC_C_R4
LCDC_C_R5
LCDC_C_G0

LCDC_C_G1
LCDC_C_G2
LCDC_C_G3
LCDC_C_G4
LCDC_C_G5
LCDC_C_B0
LCDC_C_B1

LCDC_C_B2
LCDC_C_B3
LCDC_C_B4

LCDC_C_B5
LCDC_HSYNC_CLCD_HSYNC
LCDC_VSYNC_CLCD_VSYNC
LCDC_DEN_CLCD_DE

LCDC_C_R6

LCDC_C_R7

LCDC_C_G6

LCDC_C_G7

LCDC_C_B6

LCDC_C_B7

LCDC_PCLK_C_30

12

C169

C169

/@

/@

For Y3P and Y3M use
As Y3P and Y3M are open, so
connect pin 50, 2, 8, 10, 16,
18 to GND

For Y3P and Y3M use
As Y3P and Y3M are open, so connect pin 50(D27),
2(D2), 8(D10), 10(D11), 16(D16), 18(D17) to GND

12

U11

N/AU11

N/A

LCDC_C_B4

7

8

9

10

LVDS_R_F_30

3

LCDC_C_B5

4

5

6

NFA21SL307X1A45L

NFA21SL307X1A45L

R136

R136
100R1J

100R1J

/@

/@

1 2

R137

R137

100R1J

TXE3P_30
TXE3N_30

TXECK1P_30
TXECK1N_30 TXE2N_30

VDD_LVDS_30
IOVCC_30

VDD_LVDS_F_30

VDD_LVDS_PLL_30

IOVCC_30

R140

R140
100R1J

100R1J

/@

/@

1 2

IOVCC_30

12

12

R141

R141
100KR1J

100KR1J

N/A

N/A

R145

R145
100KR1J

100KR1J

/@

/@

R139

R139
100R1J

100R1J

1 2

/@

/@

R138

R138
100R1J

100R1J

1 2

100R1J

/@

/@

1 2

/@

/@

Unmount

Unmount

TXE0P_30
TXE0N_30

TXE1P_30
TXE1N_30

TXE2P_30

TXE0P_30 23
TXE0N_30 23

TXE1P_30 23
TXE1N_30 23

TXE2P_30 23
TXE2N_30 23

TXECK1P_30 23
TXECK1N_30 23

Unmount

A A

LVDS_EN_30

1 2

C185

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@C185

/@

0229 EMI add

Title :

Title :

Title :

LVDS transmitter_30

LVDS transmitter_30

LVDS transmitter_30

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

22 60Tuesday, March 20, 2012

22 60Tuesday, March 20, 2012

22 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

LCD PNL power Switch

From +3VSUS

D D

From +3VSUS thr ough SW

3.3V

VCC_LCD3V3

Close to LCD Connector

1 2

1 2

C173

N/AC173

N/A

1U6.3VX5RC2K

1U6.3VX5RC2K
C174

N/AC174

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

LCD BL power Switch

C178

N/AC178

U16

U16

N/A

1U6.3VX5RC2K

1U6.3VX5RC2K
C179

N/AC179

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

12

3

4

5

6

N/A

N/A

TXE2N_R_30

TXE2P_R_30

TXECK1N_R_30

TXECK1P_R_30

Unmount

C175

/@C175

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C176

/@C176

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C177

/@C177

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C180

/@C180

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C181

/@C181

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C182

/@C182

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C183

/@C183

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C184

/@C184

/@

12

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

EMI Cap.

TXE0N_R_30

TXE0P_R_30

TXE1N_R_30

TXE1P_R_30

TXE2N_R_30

TXE2P_R_30

TXECK1N_R_30

TXECK1P_R_30

CON5

N/A

CON5

N/A

BTOB_CON_30P

BTOB_CON_30P

SIDE1

SIDE4
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

SIDE2

SIDE3

12016-00070700

12016-00070700

31
1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

32

VCC_LCD3V3

VCC_LED

34

TXE0N_R_30
TXE0P_R_30

TXE1N_R_30
TXE1P_R_30

TXE2N_R_30
TXE2P_R_30

TXECK1N_R_30
TXECK1P_R_30

LCD_BL_PWM7

LCD_BL_PWM

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
33

CON5 2nd source
MATSUSHITA/AXT530124
12G161H00307

4.2V

1 2

1 2

C C

VCC_LED

Close to LCD Connector

B B

LVDS EMI Filter

12

0805 SIZE 0805 SIZE

U15

U15

TXE0N

TXE0N_3022

TXE0P_3022

TXE1N_3022

TXE1P_3022

7

TXE0P_30

8

TXE1N_30

9

TXE1P_30

10

NFA21SL307X1A45L

NFA21SL307X1A45L

TXE0N_R_30

3

TXE0P_R_30

4

TXE1N_R_30

5

6

N/A

N/A

TXE1P_R_30

TXECK1N_3022

TXECK1P_3022

TXE2N_3022

TXE2P_3022

TXE2N_30

TXE2P_30

TXECK1N_30

TXECK1P_30

NFA21SL307X1A45L

NFA21SL307X1A45L

7

8

9

10

A A

Title :

Title :

Title :

LCD Connector

LCD Connector

LCD Connector

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

23 60Tuesday, March 20, 2012

23 60Tuesday, March 20, 2012

23 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

D D

4

3

2

1

VDD_1V8_GEN_CPU

12

R146

R146
10KR1J

10KR1J

N/A

N/A

12

R147

R147

10KR1J

10KR1J

N/A

N/A

JTAG

JTAG_TCK6
JTAG_TDI6

JTAG_TDO6

JTAG_TMS6

JTAG_TRST#6

JTAG_RTCK6

1

T1/@T1

/@

C C

R148

R148
10KR1J

10KR1J

12

/@

/@

0226 delete debug port power

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST#
JTAG_RTCK
JTAG_RESOUT#

12

R149

R149

100KR1J

100KR1J

N/A

N/A

0705

J1

J1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

BtoB_CON_24P

BtoB_CON_24P

/@/DUG

/@/DUG
MATSUSHITA/AXK6F24347YG

MATSUSHITA/AXK6F24347YG
12G160800244

12G160800244

BtoB CON 24P,0.5mm,M,1.5H,S/T

BtoB CON 24P,0.5mm,M,1.5H,S/T

HEADER

Unmount

UART_DEBUG_TXD

2

2

UART_DEBUG_RXD

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

HOT_RST#
F_RECOVERY#

UART_DEBUG_TXD
UART_DEBUG_RXD

Debug UART

UART_DEBUG_TXD 12,28
UART_DEBUG_RXD 12,28

HOT_RST# 32

F_RECOVERY# 18,32

T15 /@T15 /@

1

T16 /@T16 /@

1

Unmount

B B

A A

Title :

Title :

Title :

Debug Connector

Debug Connector

Debug Connector

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

24 60Tuesday, March 20, 2012

24 60Tuesday, March 20, 2012

24 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

MAX77663 SD2 (2A)

+3VSUS_CPU VDD_1V8_GEN_CPU

12

R150

R150
1MR1J

1MR1J

N/A

N/A

12

C186

C186
10P50VNPOC1J

10P50VNPOC1J

/@

/@

3

Unmount

D1

N/AD1

N/A

RB520CS_30

RB520CS_30

12

RB520CS 2nd Source
07004-00030200 - SCHOTTKY BAT54TM SOD923
07G004045223 SCHOTTKY RB520CS-30 VMN2 [GA] ROHM
07G004250110 SCHOTTKY RB520G-30 SOD723 [GA] PANJIT

12

R151

R151
100KR1J

100KR1J

N/A

N/A

1V8_O_LID# 6

12

C188

C188

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

TPS63020 buck-boost

PR 0217

O_LID#

U17

U17

1

VDD

GND

2

Output

EC2618NLB1GR

EC2618NLB1GR

06G051025010

06G051025010
N/A

N/A

Hall Sensor

TPS63020 buck-boost

D D

C C

+3VSUS_CPU

12

C187

C187

1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

GND GND

Note:

1. VDD power su pply range is + 2.7V to +3.3V.

Ambient Light Sensor

C189

N/AC189

1U6.3VX5RC2K

1U6.3VX5RC2K

C190

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

U18

U18

EP101 BOM

1

VDD

2

GND
SEL3INT

AL3010 N/A

AL3010 N/A

N/A

N/AC190

N/A

CW/0302
Change to 1.8V for ALS.

6

SDA

5

SCL

4

ALS_SDA
ALS_SCL

1.8V level

VDD_ALS

TPS63020 buck-boost

B B

+3VSUS

VDD_ALS

VDD_ALS

1 2

1 2

CW/0310
Follow EP101, change P/N

ALS_SEL ALS_INT#_MB

CAM_I2C_SDA9,26,31,44
CAM_I2C_SCL9,26,31,44

1201

R3137
10K -> 100K

ALS_INT#_MB10

A A

VDD_1V8_GEN

12

R156

R156
100KR1J

100KR1J

N/A

N/A

5

ALS_SDA
ALS_SCL

ALS_INT#_MB

4

Slave address

GND

VDD

NC

R:00111001(39h)
W:00111000(38h)

R:00111101(3Dh)
W:00111100(3Ch)

R:00111111(3Fh)
W:00111110(3Eh)

7 bit

1C

1D

1E

ALS_SEL

3

VDD_ALS

12

R155

R155
0R1J

0R1J

/@

/@

12

R157

R157
0R1J

0R1J

N/A

N/A

Unmount

Title :

Title :

Title :

Hall & ALS

Hall & ALS

Hall & ALS

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

25 60Wednesday, March 21, 2012

25 60Wednesday, March 21, 2012

25 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

Thermal Sensor 1

4

3

2

1

R158

R158
0R2J

0R2J

THERMD_P

THERMD_N

1 2

N/A

N/A

R162

R162
100R1J

100R1J

1 2

N/A

N/A

1000P25VX7RC1K

1000P25VX7RC1K

R166

R166
100R1J

100R1J

1 2

N/A

N/A

VCORE_TEMP+3VSUS

+3VSUS detect

12

C193

C193

N/A

N/A

VCORE_TEMP

12

R161

R161
100R1J

100R1J

N/A

N/A

TEMP_VDD

12

C194

N/AC194

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

TEMP_THERMD_P
TEMP_THERMD_N TEMP_ALERT_3V3#

TEMP_THERMAL#

U20

U20

1
2
3
4

OD

NCT72CMTR2G

NCT72CMTR2G

VDD
D+
D­THERM#

ALERT#/THERM2#

3.3V

D D

THERMD_P6

THERMD_N6

VDD_1V8_GEN

VDD_1V8_GEN_CPU

R171

R171
10KR1J

10KR1J

N/A

1103
U20

C C

06G023124010 TEMP. SENSOR NCT1008CMT3R2G
change to
06023-00030100 TEMP. SENSOR NCT72CMTR2G

N/A

Gyro Sensor

B B

GYRO_SCL

R1790R1J N/AR1790R1J N /A

CAM_I2C_SCL9,25,31,44
CAM_I2C_SDA9,25,31,44

Unmount

100P25VNPOC1J

100P25VNPOC1J

A A

1 2
1 2

CW/0223
Remove Gyro CLKIN.

C204

C204

/@

/@

MPU-6050 02134-00010000

GYRO_CLKIN

12

VDDIO_GYRO

Unmount

C206

C206

0.01U10VX7RC1K

0.01U10VX7RC1K

/@

/@

Note:

1. VDD power su pply range is + 1.8V to +3.6V.

2. VIO max. vol tage is VDD.

3. VOH=0.9xVIO & VOL=0.3xVIO.

4. VIH=0.8xVIO & VIL=0.2xVIO

Gyro AD0 High : I2C Address 11 01001b
Gyro AD0 Low : I2C Address 11 01000b

5

R1780R1J N/AR1780R1J N /A

GYRO_IME_DAT
GYRO_IME_CLK

12

GYRO_SDA

U21

U21
MPU-6050

MPU-6050

N/A

N/A

1
2
3
4
5
6

GYRO_AD0

CLKIN
NC1
NC2
NC3
NC4
IME_DA

GYRO_CLKOUT

21

22

23

24

SCL

SDA

CLKOUT

IME_CL7VLOGIC8AD09REGOUT10FSYNC11INT

GYRO_REGOUT

12

GYRO_CPOUT

20

RESV2

GYRO_FSYNC

C207

C207

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

1201
R172 100K -> 1M

12

R172

R172

12

1MR1J

1MR1J

N/A

N/A

TEMP_THERMAL#_REV

61

2

Q9A

Q9A

UM6K1N

UM6K1N

N/A

N/A

+3VSUS

VDD_1V8_GEN VDDIO_GYRO

CPOUT chage to 0.22nF

12

C203

C203
220P25VX7RC1K

220P25VX7RC1K

N/A

N/A

19

18

GND1

17

NC8

RESV1

CPOUT

16

NC7

15

NC6

14

NC5

13

VDD

12

GYRO_FSYNC

12

0.1U16VX7RC2K

0.1U16VX7RC2K

C195 1uF -> 0.1uF

NAND_CLE7,18

VDD_GYRO

GYRO_INT 13

4

VDD_1V8_GEN_CPU

TEMP_ALERT_3V3#

06023-00030100

06023-00030100

8

SCLK

7

SDATA

6
5

GND

N/A

N/A

Signal to MAX77663

34

Q9B

Q9B
UM6K1N

UM6K1N

N/A

N/A

5

C195

C195

N/A

N/A

1201

Unmount

VDD_GYRO

1 2

1 2

1 2

GYRO_FSYNC

GYRO_CLKIN

GYRO_CLKOUT

C197

1U6.3VX5RC2K

1U6.3VX5RC2K

C199

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C200

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

12

R160

R160

10KR1J

10KR1J

N/A

N/A

Unmount

0R1J /@

0R1J /@

1 2

R163

R163

1 2

N/A

N/A

R1590R1J

R1590R1J

TEMP_ALERT# 9

TEMP_ALERT#_KAI 6

0217 KAI modify

PWR_I2C_SCL 6,27,49,50
PWR_I2C_SDA 6,27,49,50

VDD_5V0_AC_BAT

AP_OVERHEAT# to MAX77663 SHDN, NAND_CLE reverse circuit on PMU side

AP_OVERHEAT# 50

THERMAL#_R 50

OD

R170

R170
0R1J

0R1J

1 2

N/A

N/A

VPH_PWR_CHGR

12

R168

R168
10KR1J

10KR1J

N/A

N/A

0322 delete R640 & R641

61

Q8A

NAND_CLE_THERMAL

Q8A
UM6K1N

UM6K1N

2

N/A

N/A

0217 KAI modify

E-COMPASS

N/AC197

N/A

N/AC199

N/A

N/AC200

N/A

0720

02143-00010000

1 2

1 2

1 2

GYRO_AD0

R180100KR1J N/AR180100KR1J N/A

R181100KR1J N/AR181100KR1J N/A

R182100KR1J N/AR182100KR1J N/A

VDD_GYRO

12

12

R185

R185
1KR1J

1KR1J

/@

/@

Unmount

R186

R186
1KR1J

1KR1J

N/A

N/A

COMPASS_DRDY10

COMPASS_DRDY

MS_I2C_SCL

CAM_I2C_SCL9,25,31,44
CAM_I2C_SDA9,25,31,44

Note:

1. DVDD power supply range is +1.7V to +2.8V.

2. AVDD power supply range is +2.4V to +3.6V.

3. Let VREG & VPP NC for reference.

4. DRDY is +1.8V level out and active high.

3

Signal to MAX77663

Note:

1. Low pass fil ter (R=100ohm & C=1nF) to redu ce CM/DIFF nois e.

2. THERM# & ALE RT# provide ope n-drain, active low output.

3. VDD power su pply range is + 3.0V to +3.6V.

4. Route D+/D- tracks close to gether and w/ g rounded guard.

+3VSUS AVDD_ECOM

VDD_1V8_GEN DVDD_ECOM

CAM_I2C_SCL
CAM_I2C_SDA

CAD0_DAU

8

DRDY

7

SCL

6

VPP

DVDD_ECOM

9

10

ADDR

5

1 2
1 2

1 2

1 2

1 2

1 2

DVDD

INT4SDA

C196
1U6.3VX5RC2K

1U6.3VX5RC2K
C198

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C201

0.01U10VX7RC1K

0.01U10VX7RC1K
C202

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

U22

U22

1

AVDD

2

GND

3

VREG

AMI306

AMI306

N/A

N/A

ECOMPASS_INT

MS_I2C_SDA

R1870R1J N /AR1870R1J N/A
R1880R1J N /AR1880R1J N/A

N/AC196

N/A

N/AC198

N/A

N/AC201

N/A

N/AC202

N/A

ECOMPASS_VREG

C205

C205

1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

T3/@T3

1

/@

MS_I2C_SCLMS_I2C_SCL
MS_I2C_SDA

12

ADDR

H

L

AVDD_ECOM

I2C Address

1Fh/read

1Dh/read

2

GNDGND

1Eh/write

1Ch/write

CAD0_DAU

AVDD_ECOM

12

R183

R183

10KR1J

10KR1J

/@

/@

Unmount

12

R184

R184

10KR1J

10KR1J

N/A

N/A

GND

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

ME370T

ME370T

ME370T

1

Sensors

Sensors

Sensors

Richard Lin

Richard Lin

Richard Lin

26 60Thursday, March 22, 2012

26 60Thursday, March 22, 2012

26 60Thursday, March 22, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

Codec VDD 1.8V

VDD_1V8_CDCVDD_1V8_GEN

0226

D D

Codec 1.8V change to system 1.8V power
VDD_1V8_GEN

PMU LDO5 change to camera 1.8V

4

R189
0R2J

0R2J

L4

L5

R193
0R2J

0R2J

1 2

1 2

R190
0R2J

0R2J

1 2

10Ohm/100Mhz

10Ohm/100Mhz

10Ohm/100Mhz

10Ohm/100Mhz

N/AR193

N/A

1.8V

VDD_1V8_CDC

AVDD_CDC_F

VDD_1V8_GEN

N/AR189

N/A

N/AR190

N/A

N/AL4

N/A

21

N/AL5

N/A

21

VDD_1V8_DMIC

3

VDB_CDC

VCP_CDC

AVDD_CDC_F

DACREF_CDC

VDB_CDC

VCP_CDC

AVDD_CDC_F

DACREF_CDC

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

C208

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M
C209

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C210

10U6.3VX5RC3M

10U6.3VX5RC3M

C211

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C213

10U6.3VX5RC3M

10U6.3VX5RC3M

C214

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C215

10U6.3VX5RC3M

10U6.3VX5RC3M

C216

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

2

N/AC208

N/A

N/AC209

N/A

GND

N/AC210

N/A

N/AC211

N/A

GND

N/AC213

N/A

N/AC214

N/A

GND

N/AC215

N/A

N/AC216

N/A

GND

1

VDD_5V0_AC_BAT

VPH_PWR_CHGR

VPH

C C

80Ohm/100Mhz

80Ohm/100Mhz

Codec Realtek ALC5642

VDD_1V8_CDC

12

R313

R313
10KR1J

10KR1J

N/A

N/A

GND

12

GND

MIC1_P28

MIC1_N28

C228

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C235

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

1 2
1 2
1 2
1 2
1 2

12

R212

R212
100R1J

100R1J

/@

/@

CDC_LDO1_EN_5642

R198

R198
1MR1J

1MR1J

/@

/@

MICBIAS28

DMIC_DAT

N/AC228

N/A

N/AC235

N/A

R2030R1J N/A R2030R1J N/A
R2040R1J N/A R2040R1J N/A
R2060R1J N/A R2060R1J N/A
R2080R1J N/A R2080R1J N/A
R2070R1J N/A R2070R1J N/A

12

C240

C240
27P25VNPOC1J

27P25VNPOC1J

/@

/@

MIC1_P

MIC1_N

DACREF_CDC

ALC5642_VREF2

12

ALC5642_VREF1

12

DAP_MCLK1_5642
DAP2_SCLK_5642
DAP2_FS_5642
DAP2_DOUT_5642
DAP2_DIN_5642

0R1J

0R1J

CDC_LDO1_EN12

From T30

1 2

R199

R199

/@

/@

Unmount

B B

DAP_MCLK113

DAP_MCLK1_5642

DAP2_SCLK_5642

27P25VNPOC1J

27P25VNPOC1J

DAP2_SCLK13

DAP2_FS13

DAP2_DOUT13

DAP2_DIN13

12

C239

C239

/@

/@

T30
DAP2

A A

Unmount

DAP2_FS_5642

27P25VNPOC1J

27P25VNPOC1J

12

C243

C243

Unmount

/@

/@

5

MICBIAS

VDD_SPK

VDD_MIC_CDC

AVDD_CDC_F

U24

U24

4

MICBIAS1

5

IN1P/DMIC1_DAT

6

IN1N/DMIC2_DAT/JD1

7

IN2P

8

IN2N/JD2

10

DACREF

12

VREF2

11

VREF1

37

MCLK

36

BCLK1

35

LRCK1

33

DACDAT1

34

ADCDAT1

30

BCLK2

29

LRCK2

31

DACDAT2

32

ADCDAT2

ALC5642

ALC5642

N/A

N/A

15

42

43

23

2

46

3

AVDD

DBVDD

CPVDD

DCVDD

MICVDD

SPKVDDL

SPKVDDR

GPIO2/DMIC_SCL

AGND

GND250GND1

CPGND

9

49

22

GND

4

CPP2

CPN2

CPP1

CPN1

CPVPP
CPVEE

HPO_L
HPO_R
HPOFB

SPO_LP
SPO_LN
SPO_RP

SPO_RN

MONOP
MONON

LOUTR

LOUTL

GPIO1/IRQ

LDO1_EN

VCORE_CDC

VDB_CDC

VCP_CDC

ALC5642_CPP2

19

ALC5642_CPN2

18

ALC5642_CPP1

20

ALC5642_CPN1

21

ALC5642_CPVPP

24
27

ALC5642_CPVEE

GND

SPK_OUT_L+
SPK_OUT_L­SPK_OUT_R+
SPK_OUT_R-

MONOOUTP
MONOOUTN

LINEOUTR
LINEOUTL

CODEC_I2C_SCL

CODEC_I2C_SDA

27P25VNPOC1J

27P25VNPOC1J

HP_OUT_L
HP_OUT_R

CDC_LDO1_EN_5642

28
26
25

1
48
45
47

13
14

17
16

41
40
44

38

SCL

39

SDA

L6

L6

21

VCORE_CDC

2.2U10VX5RC3K

2.2U10VX5RC3K

C258

C258

/@

/@

N/A

N/A

C229

1 2

1 2

1 2

1 2

N/AC229

N/A

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

DMIC_LR
CDC_IRQ#

12

GNDGND

VDD_SPK

C231

C227

1 2

1 2

C230

N/AC230

N/A

2.2U10VX5RC3K

2.2U10VX5RC3K

N/AC231

N/A

N/AC227

N/A

HP_OUT_L 28
HP_OUT_R 28

R211 0R1J N/AR211 0R1J N/A
R210 0R1J N/AR210 0R1J N/A

12

C259

C259

27P25VNPOC1J

27P25VNPOC1J

/@

/@

Unmount

VDD_SPK

VDD_MIC_CDC

C225

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M
C226

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

GND

0229 EMI add

N/AC225

N/A

N/AC226

N/A

CDC_IRQ# 13

12
12

3

C217

1 2

10U6.3VX5RC3M

10U6.3VX5RC3M

C218

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C219

1 2

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M
C220

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

GND

PWR_I2C_SCL 6,26,49,50
PWR_I2C_SDA 6,26,49,50

N/AC217

N/A

N/AC218

N/A

GND

N/AC219

N/A

N/AC220

N/A

GND

DMIC

Unmount

VDD_1V8_DMIC

12

R197

R197
10KR1J

10KR1J

/@

/@

DMIC_CS DMIC_DAT_U 23

12

R209

R209
10KR1J

10KR1J

N/A

N/A

VDD_1V8_DMIC

U23

N/AU23

N/A

1

Ground1

2

Left/Right
Ground23Clock

SPM0423HD4H-WB

SPM0423HD4H-WB

04G160008210

04G160008210

Power(Vdd)

Data

33P25VNPOC1J

33P25VNPOC1J

6
5
4

C223

C223

Unmount

1 2

1 2

VDD_1V8_DMIC

12

/@

/@

C221

1U6.3VX5RC2K

1U6.3VX5RC2K

C222

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

12

C224

C224
33P25VNPOC1J

33P25VNPOC1J

/@

/@

/@C221

/@

N/AC222

N/A

DMIC_LR_U23

Unmount

CS

Drives data after High-Z after

High

Rising clock edge

Low

Falling clock edge Rising clock edge

Forte media: 04G160007713
KNOWLES/SPM0423HD4H-WB:04G160008210

DMIC_DAT_U23
DMIC_LR_U23

Falling clock edge

R214 0R1J N/AR214 0R1J N/A
R213 0R1J N/AR213 0R1J N/A

12
12

DMIC_DAT
DMIC_LR

0229 EMI add

SPEAKER CONN.

Unmount

R201

HP_OUT_L

HP_OUT_R

1 2

1 2

SPK_OUT_L-

SPK_OUT_R-

SPK_OUT_R+

C241

N/AC241

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C242

N/AC242

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

Unmount

Unmount

HP_OUT_L_C

HP_OUT_R_C

R201
0R1J

0R1J

1 2

N/A

N/A

27P25VNPOC1J

27P25VNPOC1J

R200

R200
0R1J N/A

0R1J N/A

1 2

R205

R205
0R1J N/A

0R1J N/A

1 2

27P25VNPOC1J

27P25VNPOC1J

R202

R202
0R1J N/ A

0R1J N/ A

1 2

12

R215

R215
20R1F

20R1F

N/A

N/A

2

12

C232

C232

/@

/@

C236

C236

/@

/@

12

R216

R216
20R1F

20R1F

N/A

N/A

GND

GND

GND

12

GND

GND

12

C233

C233
27P25VNPOC1J

27P25VNPOC1J

/@

/@

12

C234

C234
27P25VNPOC1J

27P25VNPOC1J

/@

/@

12

C237

C237
27P25VNPOC1J

27P25VNPOC1J

/@

/@

12

C238

C238
27P25VNPOC1J

27P25VNPOC1J

/@

/@

SPK_OUT_L+_CONSPK_OUT_L+

SPK_OUT_L-_CON

SPK_OUT_R-_CON

SPK_OUT_R+_CON

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

CON2

CON2

4

4

SIDE2

3

3

2

2
11SIDE1

WTOB_CON_4P

WTOB_CON_4P

N/A

N/A

12G171030040

12G171030040

ME370T

ME370T

ME370T

1

6

5

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

GND

Codec ALC5642

Codec ALC5642

Codec ALC5642

Richard Lin

Richard Lin

Richard Lin

27 60Tuesday, March 20, 2012

27 60Tuesday, March 20, 2012

27 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

External. Microphone

MICBIAS27

D D

C6701 1uF -> 0.1uF

MIC1_N27

MIC1_P27

C C

MICBIAS

EXT. Headphone

HEAD_DET#13

HP_OUT_L27

HP_OUT_R27

EP101
PR 0217D

B B

UART_DEBUG_RXD12, 24

TF201X add UART through Phone Jack 0930

To Tegra3 GPIO_PU5

A A

HEAD_DET# HP_DET#

R224

N/AR224

N/A

0R1J

0R1J

1 2

R226

N/AR226

N/A

0R1J

0R1J

1 2

Unmount

UART_DEBUG_TXD12,24

DOCK_IN#12

330KR1J

330KR1J

LINOUT_DET13

UM6K1N

UM6K1N

5

1213

C246

C246

0.1U10VX5RC2K

0.1U10VX5RC2K

1 2

N/A

N/A

12

C248

C248
1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

GND

HP_OUTR_L

HP_OUTR_R

R228

R228

330R1J

330R1J

/@

/@

GND

UART_DEBUG_TXD

UART_DEBUG_RXD

DOCK_IN#

VDD_1V8_GEN

12

R256

R256

N/A

N/A

61

Q12A

Q12A

N/A

N/A

GND

R217

R217
470R1J

470R1J

Unmount

12

2

MIC1BIAS_IO

N/A

N/A

12

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

12

R218

R218
1KR1J

1KR1J

N/A

N/A

PR 0214 support iphone headphone

1213 R6775 0 ohm -> 68 ohms

R219

R219
68R1J

68R1J

1 2

N/A

N/A

12

R220

R220

100KR1J

100KR1J

N/A

N/A

HOOK_DET

12

C253

C253

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@

/@

GND

L9

1 2

22U6.3VX5RC5M

22U6.3VX5RC5M

L10

1 2

22U6.3VX5RC5M

22U6.3VX5RC5M

12

R229

R229
330R1J

330R1J

/@

/@

GND

R230

R230

HPOUTL2

1KR1J N/A

1KR1J N/A

1 2

1 2

VDD_1V8_GEN

R257

R257

10KR1J

10KR1J

N/A

N/A

1KR1J

1KR1J
R231

R231

12

Q12B

Q12B

UM6K1N

UM6K1N

HPOUTR2

HPOUTR2

N/A

N/A

VDD_1V8_GEN

12

34

N/A

N/A

GND

R293

R293
330KR1J

330KR1J

N/A

N/A

MIC1P_R_LRC

12

GND

VDD_1V8_GEN

L8

L8

N/A

N/A

N/AL9

N/A

N/AL10

N/A

220P25VX7RC1K

220P25VX7RC1K

5

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

12

C244

C244

N/A

N/A

GND GND

L29

C247

C247
220P50VNPOC2J

220P50VNPOC2J

N/A

N/A

R221

R221
330KR1J

330KR1J

N/A

N/A

21

10Ohm/100Mhz

10Ohm/100Mhz

12

C256

C256

N/A

N/A

DOCK_5V_IN

12

C284

C284

N/A

N/A

GND

12

C245

C245
10U6.3VX5RC3M

10U6.3VX5RC3M

N/A

N/A

EP101/0318
Add Cap.

N/AL29

N/A

10Ohm/100Mhz

10Ohm/100Mhz

21

VDD_1V8_GEN

5

GND

R223

R223
330KR1J

330KR1J

N/A

N/A

1 2

EP101
PR 0215B RF request

HPOUTL2_R

HPOUTR2_R

12

GND

DOCK_5V

12

12

GND

1201

12

R6712
100K -> 330K

34

Q5B

Q5B
UM6K1N

UM6K1N

N/A

N/A

C257

C257
220P25VX7RC1K

220P25VX7RC1K

N/A

N/A

R308

R308
1KR1J

1KR1J

N/A

N/A

R309

R309
1MR1J

1MR1J

N/A

N/A

4

MIC1P_RMIC1P_RR

williams 0607

HOOK_DET# 13

1201

R6707
100K -> 330K

R225

R225
33R1J N/A

33R1J N/A

1 2

R227

R227
33R1J N/A

33R1J N/A

1 2

EP101
PR 0213

HPOUTL2

HPOUTR2

C251, C252, C271, C279
change to 07019-00010000

C249, C250, C269, C270
change to 07019-00010000

VI/OVI/O

VI/OVI/O

3 4

VDD_USB1_VBUS

VBUS

VBUS

5

2

GND

GND

GND

USB1_D_FN

VI/O

VI/O

6

D2

D2
IP4223-CZ6

IP4223-CZ6

/@

/@

VI/O

VI/O

1

USB1_D_FPHPOUTL2

ESD

HPOUTR2

Unmount

4pin Docking Connector

0229 EMI & Safety add

R321

R321
0R6 N/A

0R6 N/A

1 2

0229 EMI add

HPOUTL2 HPOUTL2_SPRING

HPOUTR2

ESD

Unmount

220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

12

12

C320

C320

/@

/@

C319, C320, C326, C327, C328 change
to 07019-00010000

3

C319

C319
220P50VNPOC2J

220P50VNPOC2J

/@

/@

07019-00010000

07019-00010000

R263
0R1J

0R1J

1 2

R311
0R1J

0R1J

1 2

220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

N/AR263

N/A

N/AR311

N/A

C327

C327

N/A

N/A

22pin FFC Connector

Mic & Headphone Conn.

VDD_USB1_VBUS

C336

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C338

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C339

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

Also connect to SMB347

Also connect to SMB347

VDD_USB1_VBUS_CONN

C337

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C331

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C332

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C334

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C335

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

DOCK_5V

DOCK_5V_SPRINGDOCK_5V

HPOUTR2_SPRING

12

12

C326

C326
220P50VNPOC2J

220P50VNPOC2J

N/A

N/A

07019-00010000

07019-00010000

GNDGNDGND GND

ESD

ESD

ESD

/@C336

/@

/@C338

/@

/@C339

/@

/@C337

/@

/@C331

/@

/@C332

/@

/@C334

/@

/@C335

/@

Change

1 2

Change

2

HP_DET#

Unmount

HPOUTR2

Unmount

GND

GND

ESD

220P50VNPOC2J

220P50VNPOC2J

220P50VNPOC2J

220P50VNPOC2J

VDD_USB1_VBUS

USB1_ID14

C328

C328

220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

DOCK_5V_SPRING

0229 EMI add

12

C279

C279

/@

/@

12

C270

C270

/@

/@

USB1_DP14,49

USB1_DN14,49

C254

C254

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

USB1_D_FP
USB1_D_FN

VDD_USB1_VBUS_CONN

N/A

N/A

GND

DOCK_5V_SPRING

12

C321

C321
10U6.3VX5RC3M

10U6.3VX5RC3M

/@

/@

11G233210625310

11G233210625310

Unmount

GND

R258

R258
0R2J N/ A

0R2J N/ A

1 2

R260

R260
0R2J N/ A

0R2J N/ A

1 2

12

C271

C271
220P50VNPOC2J

220P50VNPOC2J

/@

/@

12

C269

C269
220P50VNPOC2J

220P50VNPOC2J

/@

/@

USB1_ID

1 2

220P50VNPOC2J

220P50VNPOC2J

R235

R235
0R2J N/ A

0R2J N/ A

1 2

R236

R236
0R2J N/ A

0R2J N/ A

1 2

220P50VNPOC2J

220P50VNPOC2J

R322

R322
0R6 N/A

0R6 N/A

1 2

12

R222

R222
100KR1J

100KR1J

/@

/@

12

C252

C252

N/A

N/A

12

C250

C250

N/A

N/A

RN1B0OHM

RN1B0OHM

34

N/A

N/A

90Ohm/100Mhz

90Ohm/100Mhz
L11

/@L11

/@

1 4

2 3

RN1A0OHM

RN1A0OHM

12

N/A

N/A

R233

R233
0R2J N/ A

0R2J N/ A

1 2

USB1_ID_CON

ESD

C255 change to
07019-00010000

22

GND

22

21
20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

CON1

CON1
FPC_CON_22P

FPC_CON_22P

12018-00360200

12018-00360200

N/A

N/A

ME370T

ME370T

ME370T

HP_DET#_CONN

HPOUTR2_CONN
HPOUTL2_CONN

MIC1P_R_CONN

USB1_ID_CON

DOCK_5V

HPOUTL2_SPRING

HPOUTR2_SPRING

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

HP_DET#_CONN

MIC1P_R_CONNMIC1P_R

12

C251

C251
220P50VNPOC2J

220P50VNPOC2J

N/A

N/A

GNDGNDGND GND

HPOUTL2_CONNHPOUTL2

HPOUTR2_CONN

HPOUTR2_CONN

12

C249

C249
220P50VNPOC2J

220P50VNPOC2J

N/A

N/A

GNDGNDGND GND

1 2

SIDE22421

SIDE1

1

1

1

1

1

1

1

1

Engineer:

Engineer:

Engineer:

1

ESD

Change

ESD

Change

VDD_USB1_VBUS_CONN

USB1_D_FP

Unmount

USB1_D_FN

USB1_ID_CON

C255

N/AC255

N/A

220P50VNPOC2J

220P50VNPOC2J

Change

23

U51

U51
EMI_SPRING_PAD

EMI_SPRING_PAD

N/A

N/A

U52

U52
EMI_SPRING_PAD

EMI_SPRING_PAD

N/A

N/A

U53

U53
EMI_SPRING_PAD

EMI_SPRING_PAD

N/A

N/A

U54

U54
EMI_SPRING_PAD

EMI_SPRING_PAD

N/A

N/A

Title :

Title :

Title :

Audio/USB Conn.

Audio/USB Conn.

Audio/USB Conn.

Richard Lin

Richard Lin

Richard Lin

28 60Saturday, March 24, 2012

28 60Saturday, March 24, 2012

28 60Saturday, March 24, 2012

Rev

Rev

Rev

2.0

2.0

2.0

From 5V boost Circuit

VDD_5V0_SYS

Vin=5V

D D

Touch interface

Reset

Interrupt

C C

5

R310

R310
0R1J

0R1J

/@

/@

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

TP_3V3

1 2

1MR1J

1MR1J

R241

R241
0R1JN/ A

0R1JN/ A

VCC_TCH

VCC_TCH

R232

R232

100KR1J

100KR1J

N/A

N/A

C262

C262

/@

/@

GND_TP

12

R237

R237

N/A

N/A

R244

R244
0R1J N/ A

0R1J N/ A

1 2

R247

R247
0R1J N/ A

0R1J N/ A

1 2
1 2

0R1J N/ A

0R1J N/ A
R248

R248

12

C261

C261

1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

GND_TP GND_TP

12

EN, High>1.5V

EN, Low<0.25V

R239

N/AR239

N/A

10KR1J

10KR1J

1 2

R240

R240
0R1J

0R1J

/@

/@

TP_RESET#

12

TP_+3V_EN

1 2

12

1 2

TP_INT#

TP_SDA
TP_SCL

P_+3V3_VIN_20

C260

C260

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

0R1J

0R1J
R238

R238

N/A

N/A

Unmount

R242

R242
10KR1J N/A

10KR1J N/A

12

Vout=3.1V , Iout=150mA

RESET#_1036

3624_RESET#_1036

TP_RESET#_R

L12

L12
120Ohm /@

120Ohm /@

21

Unmount

TS_WAKEUP#7,48

1 2

Unmount

TS_RESET#_3V37

TS_IRQ#7

GEN2_I2C_SDA7

GEN2_I2C_SCL7

4

For once 5V boost unused

L14

L14
120Ohm /@

120Ohm /@

VDD_AC_BAT VCC_TCH

+3VSUS VCC_TCH

L15

L15
120Ohm N/A

120Ohm N/A

21

21

3V_Power_Supply for Touch

U30

U30

6

VIN

5

VSS2

4

ON/OFF

S-1167B31-I6T2G

S-1167B31-I6T2G

N/A

N/A

06G029075018

06G029075018

VOUT

VSS1

P_+3V3_VO_20

1
2
3

NC

1U6.3VX5RC2K

1U6.3VX5RC2K

GND_TP

TP_SDA

TP_SCL

TP_INT#

TP_3V3

12

C263

C263

N/A

N/A

GND_TP GND_TPGND_TP

1 2

1 2

1 2

12

C264

C264

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

R2432.2KR1JN/ A R2432.2KR1JN/ A

R2452.2KR1JN/ A R2452.2KR1JN/ A

R2461MR1JN/A R2461MR1JN/A

TP_3V3

3

2

1

to 5V boost enable

TS_WAKEUP#7,48

EN_5V0_SBY 7,48

Connectivity refer to Touch sensor spec

I/O

TOUCH_Y30
TOUCH_Y32
TOUCH_Y34

TOUCH_X1
TOUCH_X3
TOUCH_X5
TOUCH_X7
TOUCH_X9
TOUCH_X11
TOUCH_X13
TOUCH_X15
TOUCH_X17
TOUCH_X19
TOUCH_X21

EKTF3624_TDO

TOUCH_SENSOR_CONFIG

TOUCH_Y1
TOUCH_Y3
TOUCH_Y5
TOUCH_Y7
TOUCH_Y9
TOUCH_Y11
TOUCH_Y13
TOUCH_Y15
TOUCH_Y17
TOUCH_Y19
TOUCH_Y21
TOUCH_Y23
TOUCH_Y25
TOUCH_Y27
TOUCH_Y29 TOUCH_Y28

J2

J2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

FPC_CON_31P

FPC_CON_31P

12018-00110000

12018-00110000
N/A

N/A

J3

J3

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

FPC_CON_31P

FPC_CON_31P

12018-00110000

12018-00110000
N/A

N/A

TOUCH_Y31

2

2

TOUCH_Y33

4

4

6

6

8

8

TOUCH_X2

10

10

TOUCH_X4

12

12

TOUCH_X6

14

14

TOUCH_X8

16

16

TOUCH_X10

18

18

TOUCH_X12

FPC1FPC2

20

20

TOUCH_X14

22

22

TOUCH_X16

24

24

TOUCH_X18

26

26

TOUCH_X20

28

28

30

30

0610

0610

06100610

修修修

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

GND_TPGND_TP

12018-00110000

TOUCH_Y2
TOUCH_Y4
TOUCH_Y6
TOUCH_Y8
TOUCH_Y10
TOUCH_Y12
TOUCH_Y14
TOUCH_Y16
TOUCH_Y18
TOUCH_Y20
TOUCH_Y22
TOUCH_Y24
TOUCH_Y26

GND

GND

1 2

1 2

Unmount

EKTF3624_U_AVDD
EKTF3624_U_V1P8

C267

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C268

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

U26

U26
EKTFQ3624-AS003BW

EKTFQ3624-AS003BW

N/A

N/A

N/AC267

N/A

/@C268

/@

GND_TP

1

GND/JTAG_SEL/GNDIO

2

CLKI/PA6

3

CLKO/PA7

4

SPI_CS/PA0

5

SPI_SCK/SCL/PA1

6

SPI_SDI/SDA/PA2

7

SPI_SDO/PA3

8

RESETB

9

SCL/PA4

10

EXT_SYNC/PA8

11

EXTINT0/PA9

12

EXTINT1/PA10

TOUCH_SPI_CS
TOUCH_SPI_SCK
TOUCH_SPI_MOSI
TOUCH_SPI_MISO

TP_3V3TP_3V3

GND_TP

43

44

45

46

47

48

50

VCC

GND149GND2

VCC3K

VCC3IO

DAVCC/AVCC2

DAGND/AGND2

EKTF3624

SPI2_CS/PA1113SPI2_SCK/PA1214SPI2_SDI/PA1315SPI2_SDO/PA1416TDO/PB017DAVCC/AVCC118DAGND/AGND119TP120TP221TP322TP423TP5

EKTF3624_TDO

EKTF3624_UM_AVDD

1 2

TP1837TP1938TP2039TP2140TP2241TP2342TP24

24

TOUCH_X20
TOUCH_X21

TOUCH_TX_DRIVE

C274

N/AC274

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

TP17
TP16
TP15
TP14
TP13
TP12
TP11
TP10

36
35
34
33
32
31
30
29
28

TP9

27

TP8

26

TP7

25

TP6

GND_TP

TOUCH_Y24
TOUCH_Y23
TOUCH_Y22
TOUCH_Y21
TOUCH_Y20
TOUCH_Y19

TP1049TP1150TP1251TP1352TP1453TP1554TP1655TP17

EKTH1036_C1N

EKTH1036_C1P

EKTH1036_C4P

EKTH1036_C3P

EKTH1036_C2P

EKTH1036_VOUT

EKTH1036_VH

EKTH1036_VOUT

48

56

1

TP18

2

TP19

3

TP20

4

TP21

5

TP22

6

TP23

7

TP24

8

TP25

9

TP26

10

TP27

11

TP28

12

TP29

13

TP30

14

TP31

C276
1U6.3VX5RC2K

1U6.3VX5RC2K
C277

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C278

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C280

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

58

GND157GND2

EKTH1036

TP3215TP3316TP3417TP3518VH19VOUT20C4P21C3P22C1N23C1P24C2P25C2N26VCI/AVDD27AGND/VSS/GND

N/AC276

N/A

N/AC277

N/A

N/AC278

N/A

/@C280

/@

GND_TP

GND_TP

TOUCH_Y18
TOUCH_Y17
TOUCH_Y16
TOUCH_Y15
TOUCH_Y14
TOUCH_Y13
TOUCH_Y12
TOUCH_Y11
TOUCH_Y10
TOUCH_Y9
TOUCH_Y8
TOUCH_Y7
TOUCH_Y6

TP_3V3

TOUCH_Y5

1 2

1 2

1 2

1 2

U25

U25
EKTH1036BW

EKTH1036BW

N/A

N/A

TOUCH_Y4
TOUCH_Y3
TOUCH_Y2
TOUCH_Y1

B B

A A

Power &
Charge Pump

EKTH1036_C2N

TP443TP544TP645TP746TP847TP9

TX_DRIVE

EXT_SYNC

SPI_SDO

SPI_SDI

SPI_SCK

SPI_CS

RESETB

CLKI

VCCIO

VCC3K

28

GND_TP

EKTH1036_VCI

1 2

1 2

TOUCH_Y25
TOUCH_Y26
TOUCH_Y27
TOUCH_Y28
TOUCH_Y29
TOUCH_Y30
TOUCH_Y31
TOUCH_Y32

TP3
TP2
TP1
TP0

C272
1U25VX5RC3K

1U25VX5RC3K
C275
1U25VX5RC3K

1U25VX5RC3K

1 2

1 2

1 2

42
41
40
39

TOUCH_TX_DRIVE

38

TOUCH_EXT_SYNC

37

TOUCH_SPI_MISO

36

TOUCH_SPI_MOSI

35

TOUCH_SPI_SCK

34

TOUCH_SPI_CS

33

RESET#_1036

32

TOUCH_M_CLK

31
30
29

R252

R252

0R1J N/ A

0R1J N/ A

N/AC272

N/A

N/AC275

N/A

R253

R253
0R1J

0R1J

/@

/@

R254

R254
0R1J

0R1J

/@

/@

R255

R255
0R1J

0R1J

/@

/@

TOUCH_Y33
TOUCH_Y34

12

GND_TP

12

C285
1U10VX5RC2K

1U10VX5RC2K

12

C281
1U25VX5RC3K

1U25VX5RC3K

12

C282

1U10VX5RC2K

1U10VX5RC2K

12

C283
1U25VX5RC3K

1U25VX5RC3K

TP_3V3

12

C273

C273

1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

GND_TP

EKTH1036_C1P

N/AC285

N/A

EKTH1036_C1N

N/AC281

N/A

EKTH1036_C3P

EKTH1036_C2P

N/AC282

N/A

EKTH1036_C2N

N/AC283

N/A

EKTH1036_C4P

1U6.3VX5RC2K

1U6.3VX5RC2K

TP_3V3

TP_3V3

C265

C265

N/A

N/A

GND_TP

Unmount

12

1U6.3VX5RC2K

1U6.3VX5RC2K

R249

R249

10KR1J N/A

10KR1J N/A

1 2

R250
100KR1J

100KR1J

1 2

1 2

R251

R251
100KR1J / @

100KR1J / @

12

C266

C266

N/A

N/A

GND_TPGND_TP

GND_TP

T8

/@T8

/@

TPC26B

TPC26B

T9

/@T9

/@

TPC26B

TPC26B

EKTF3624_TDO

N/AR250

N/A

TOUCH_SENSOR_CONFIG

TOUCH_M_CLK

EKTF3624_JTAG_TMS

1

TP_SCL
TP_SDA
EKTF3624_JTAG_TDO

1

TP_RESET#_R
TP_INT#
TOUCH_EXT_SYNC
3624_RESET#_1036
TOUCH_SENSOR_CONFIG

Unmount

5

4

3

TOUCH_X1
TOUCH_X2
TOUCH_X3
TOUCH_X4
TOUCH_X5
TOUCH_X6
TOUCH_X7

TOUCH_X8
TOUCH_X9
TOUCH_X10
TOUCH_X11
TOUCH_X12
TOUCH_X13
TOUCH_X14
TOUCH_X15
TOUCH_X16
TOUCH_X17
TOUCH_X18
TOUCH_X19

2

GND_TP

GND

GND_TP

0224 change GND_TP to GND

Title :

Title :

Title :

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Touch Sensor, Conn.

Touch Sensor, Conn.

Touch Sensor, Conn.

Richard Lin

Richard Lin

Richard Lin

29 60Wednesday, March 21, 2012

29 60Wednesday, March 21, 2012

29 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

D D

4

3

2

1

C C

VDD_CELL_LCL

BAT_COINCELL 50

0804

12

C316

C316
10U6.3VX5RC3M

10U6.3VX5RC3M

N/A

N/A

B B

A A

Title :

Title :

Title :

Coin Cell

Coin Cell

Coin Cell

Richard Lin

Richard Lin

1

Richard Lin

30 60Tuesday, March 20, 2012

30 60Tuesday, March 20, 2012

30 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

5

4

3

2

1

Camera VDDIO 1. 8V Camera AVDD Camera VCM Powe r

R259

N/AR259

VDD_PMU_LDO5

D D

MAX77663 LDO5

0226
VDDIO_CAM change to PMU LDO5

Delete Q13, Q14, R258, R260, R263, C279
Change R259 from 1M -> 0ohm

0R2J

0R2J

1 2

N/A

VDDIO_CAM

VDD_5V0_AC_BAT VDD_5V0_AC_BAT

VPH_PWR_CHGR VPH_PWR_CHGR

CAM1_LDO_EN6

CAM1_AVDD_EN VCM_AVDD_EN

C397

C397

1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

12

12

R261

R261
1MR1J

1MR1J

N/A

N/A

U27

U27

6

VIN

5

VSS2

4

ON/OFF

S-1132B28-I6T2G

S-1132B28-I6T2G

N/A

N/A

VOUT

VSS1

NC

AVDD_CAM1

1
2
3

12

C400

C400
1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

CAM2_LDO_EN6

C398

C398

1U6.3VX5RC2K

1U6.3VX5RC2K

12

12

/@

/@

R262

R262
1MR1J

1MR1J

N/A

N/A

U28

U28

6

VIN

5

VSS2

4

ON/OFF

S-1132B28-I6T2G

S-1132B28-I6T2G

/@

/@

VOUT

VSS1

NC

AVDD_VCM

1
2
3

12

C399

C399
1U6.3VX5RC2K

1U6.3VX5RC2K

/@

/@

VDDIO_CAM

1 2

1 2

C286

1U6.3VX5RC2K

1U6.3VX5RC2K

C287

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

1201

R3427 100K -> 1M

N/AC286

N/A

N/AC287

N/A

1201

R3428 100K -> 1M

MIPI

5M Camera (Rear)

C C

12018-00050000

12018-00050000

FPC_CON_24P

/@

/@

R264 15R1J

R264 15R1J

CAM_MCLK9

Unmount Unmount

B B

12

PWDN_5M9
CAM_RST_5M9

1 2

C288

C288
10P50VNPOC1J

10P50VNPOC1J

/@

/@

CAM_MCLK_R_5M

CSI_CLKAP9
CSI_CLKAN9

CSI_D1AN9
CSI_D1AP9

CSI_D2AN9

CSI_D2AP9

CAM_I2C_SCL9,25,26,44

CAM_I2C_SDA9,25,26,44

PWDN_5M_R
CAM_RST_5M_R

12

C289

C289
10P50VNPOC1J

10P50VNPOC1J

/@

/@

AVDD_VCM

PWDN_5M_R

CAM_RST_5M_R

VDDIO_CAM

AVDD_CAM1

CSI_CLKAP_RCSI_CLKAP
CSI_CLKAN_RCSI_CLKAN

CSI_D1AN_RCSI_D1AN
CSI_D1AP_RCSI_D1AP

CSI_D2AN_RCSI_D2AN
CSI_D2AP_RCSI_D2AP

CAM_I2C_SCL_5R
CAM_I2C_SDA_5R

N/A

N/A

1 2

N/A

N/A

1 2

R2671MR1J

R2671MR1J

GND

R2691MR1J

R2691MR1J

GND

FPC_CON_24P

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

CON3

CON3

/@

/@

SIDE1

SIDE2

25

26

CSI_CLKBP
CSI_CLKBN

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

Unmount

CSI_D2AN
CSI_D2AP

C297

C297

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

12

12

C291

C291

C292

C292

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@

/@

/@

/@

12

12

C298

C298

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@

/@

/@

/@

Unmount

1.2M Camera (Front)

AVDD_CAM1

VDDIO_CAM

23

J4

N/A

N/A

C290

C290

/@

/@

CAM_MCLK_R_1M2

12

CSI_CLKAP
CSI_CLKANCAM_I 2C_SDA

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

CSI_D1BPCSI_D1AN
CSI_D1BN

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

R265 15R1J

R265 15R1J

CAM_MCLK9

Unmount

CSI_CLKBP9 CSI_D1BN 9
CSI_CLKBN9

CAM_I2C_SCL

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

CSI_D1AP

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

1 2

10P50VNPOC1J

10P50VNPOC1J

CSI_CLKBP
CSI_CLKBN

12

12

C296

C296

C293

C293

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@

/@

/@

/@

12

12

C300

C300

C299

C299

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@

/@

/@

/@

J4

112

SIDE424SIDE3

334
556
778

9

9

10

11

121211

13

141413

15

15

16
171718
191920

SIDE222SIDE1

21

12016-00100000

12016-00100000

BTOB_CON_20P

BTOB_CON_20P

N/A

N/A

J4 2nd source
PANASONIC/AXT520124
12G161H0020A

12

12

C295

C295

C294

C294

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@

/@

/@

/@

12

12

C302

C302

C301

C301

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

/@

/@

/@

/@

RF Requst

AVDD_CAM1

2
4
6
8
10

16
18
20

PWDN_2M_R
CAM_RST_2M_R

PWDN_2M

CAM_RST_2M

N/A

N/A

1 2

N/A

N/A

1 2

CAM_RST_2M 12
CAM_I2C_SCL 9,25,26,44
CAM_I2C_SDA 9,25,26,44

R2661MR1J

R2661MR1J

R2681MR1J

R2681MR1J

PWDN_2M 9

CSI_D1BP 9

GND

GND

A A

Title :

Title :

Title :

01.Block Diagram

01.Block Diagram

01.Block Diagram

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

31 60Tuesday, March 27, 2012

31 60Tuesday, March 27, 2012

31 60Tuesday, March 27, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

HOT_RST# inverse for PMIC

Reset Button

10KR1J

D D

HOT_RST#24

RST_SW# HOT_RST_R1

10KR1J

R277
0R1J

0R1J

1 2

C305

C305

1U6.3VX5RC2K

1U6.3VX5RC2K

/@

/@

VPH_PWR_CHGR

12

R276

R276

N/A

N/A

1

N/AR277

N/A

12

VDD_5V0_AC_BAT

SI2305DS 2nd Source
07G005C69010 P-MOSFET EMF44P02J SOT-23

23

2

2

S

S

1

1

G

G

D

D

3

3

12

07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
07G005051310 P-MOSFET NTR2101PT1G SOT-23

Q15

Q15

07G00538101L P-MOSFET AP2305GN SOT-23

SI2305DS

SI2305DS

N/A

N/A

R279

R279

330KR1J

330KR1J

N/A

N/A

PMU internal PD 200~400k

D4
BAT54CW

BAT54CW

2

1

N/AD4

N/A

Unmount

PWRON Key long press RESET for PMIC

C C

PWR_SW#33

VDD_5V0_AC_BAT

VPH_PWR_CHGR

12

Q16A

N/AQ16A

N/A

UM6K1N

UM6K1N

2

61

PWR_SW#

PWR_SW#_DELAY_RC2

12

R270

R270
10MR1J

10MR1J

N/A

N/A

C303

C303
1U6.3VX5RC2K

1U6.3VX5RC2K

N/A

N/A

VDD_5V0_AC_BAT

VPH_PWR_CHGR

12

R272

R272
100KR1J

100KR1J

5

N/A

N/A

PWR_SW#_RESET_DELAY

34

Q16B

Q16B
UM6K1N

UM6K1N

N/A

N/A

VDD_5V0_AC_BAT

VPH_PWR_CHGR

23

2

2

S

S

Q23

Q23

1

1

SI2305DS

SI2305DS

1

G

G

N/A

N/A

D

D

3

3

HOT_RST_R2

12

R305

R305

330KR1J

330KR1J

N/A

N/A

SI2305DS 2nd Source
07G005C69010 P-MOSFET EMF44P02J SOT-23
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
07G005051310 P-MOSFET NTR2101PT1G SOT-23
07G00538101L P-MOSFET AP2305GN SOT-23

HOT_RST

3

12

R271

R271

100KR1J

100KR1J

N/A

N/A

MAX77663 SD2 (2A)

VDD_1V8_PMU_DCDC2

VDD_1V8_GEN

12

R278

R278

4.7KR1J

4.7KR1J

N/A

N/A

SYS_RESET#_SOURCE

34

Q8B

Q8B

5

UM6K1N

UM6K1N

N/A

N/A

12

C304

C304
1000P25VX7RC1K

1000P25VX7RC1K

N/A

N/A

SYS_RESET# to MAX77663 nRSTIO & T30 SYS_RESETn

R312

N/AR312

N/A

0R1J

0R1J

1 2

SYS_RESET# 6, 20,50

FORCE_RECOVERY#

TF201 0901 modi fy

CW:T30 pull high 50~100K internally.

VOL_UP_BUTTON6

VDD_1V8_GEN

12

R274

R274
100KR1J

100KR1J

N/A

N/A

FORCE_R_Q1 FORCE_R _Q2

34

Q17B

Q17B
UM6K1N

UM6K1N

5

N/A

N/A

GND

VOL_UP
H = 1.8V
L = 0V

R275

1 2

0R1J

0R1J

+3VSUS

Unmount

12

R273

R273
100KR1J

100KR1J

/@

/@

Q

N/AR275

N/A

12

C333

C333

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

/@

/@

GND

61

Q17A

Q17A
UM6K1N

UM6K1N

2

N/A

N/A

GND

Unmount

F_RECOVERY# 18,24

QA B

0 0 0

001 1

1 1

1 1 1

B B

8pin Button Connector

CON4

N/A

CON4

N/A

FPC_CON_8P

1 2

1 2

1 2

1 2

1 2

Change

FPC_CON_8P

8

8

7

7

SIDE2

6

6

5

5

4

4

3

3

2

2

SIDE1

1

1

12018-00210800

12018-00210800

C307

C307
220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

C308

C308
220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

C310

C310
220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

C311

C311
220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

C312

C312

07019-00010000

07019-00010000

220P50VNPOC2J

220P50VNPOC2J

10

9

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

Title :

Title :

Title :

Buttons /Conn.

Buttons /Conn.

Buttons /Conn.

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

32 60Wednesday, March 21, 2012

32 60Wednesday, March 21, 2012

32 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

1
1
1
1
1
1

PWR_SW#_CTL_CONN
PWR_SW#_BUTTON_CONN

VOL_DWN_BUTTON_R
KB_ROW0_SW
VOL_UP_BUTTON_R

RST_SW#_BUTTON

PWR_SW#_CTL_CONN

PWR_SW#_BUTTON_CONN

VOL_UP_BUTTON_R

VOL_DWN_BUTTON_R

KB_ROW0_SW

ESD
C307, C308, C310, C311, C312
change to 07019-00010000

C324

C324

C323

C323

C325

C325

C329

C329

C322

C322

C330

C330

PWR_SW#_CTL

PWR_SW#_BUTTON

VOL_DWN_BUTTON
VOL_UP_BUTTON

KB_ROW0

PWR_SW#_CTL

12

PWR_SW#_BUTTON

12

VOL_DWN_BUTTON

12

VOL_UP_BUTTON

12

12

12

KB_ROW0

RST_SW#

PWR_SW#_CTL33

PWR_SW#_BUTTON33

VOL_DWN_BUTTON6

VOL_UP_BUTTON6

KB_ROW06, 33

Unmount

A A

Change

/@

/@

220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

/@

/@

220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

/@

/@

220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

/@

/@

220P50VNPOC2J

220P50VNPOC2J

07019-00010000

07019-00010000

/@

/@

07019-00010000

07019-00010000

220P50VNPOC2J

220P50VNPOC2J

/@

/@

07019-00010000

07019-00010000

220P50VNPOC2J

220P50VNPOC2J

R314 0R1J N/AR314 0R1J N/A

R315 0R1J N/AR315 0R1J N/A

12

C306

C306
33P25VNPOC1J

33P25VNPOC1J

/@

/@

Unmount

1 2

1 2

R297 0R1J N/AR297 0R1J N/A

1 2

R286 0R1J N/AR286 0R1J N/A

1 2

R280 0R1J N/AR280 0R1J N/A

1 2

PWR_SW#_CTL_CONN

PWR_SW#_BUTTON_CONN

VOL_DWN_BUTTON_R
VOL_UP_BUTTON_R

KB_ROW0_SW

RST SW

RST_SW#

R304 0R1J N/AR304 0R1J N/A

1 2

RST_SW#_BUTTON

ESD
C309 change to
07019-00010000

12

C309

C309
220P50VNPOC2J

220P50VNPOC2J

N/A

N/A

07019-00010000

07019-00010000

GND

Change

T10/@ T10/@
T11/@ T11/@
T12/@ T12/@
T14/@ T14/@
T13/@ T13/@
T17/@ T17/@

ESD
change to 07019-00010000

5

4

3

5

Power Button

PWR_SW#_BUTTON_R6

Tegra KB COL0

KB_ROW06,32

Tegra KB ROW0

D D

PWR_SW#32

C C

Q19A

N/AQ19A

N/A

UM6K1N

UM6K1N

KB_ROW0_NMOS PWR_SW#_BUTTON

6 1

2

12

R284

R284
0R1J

0R1J

N/A

N/A

PWR_SW#_CTL_0ohm

5

3 4

Q18B

Q18B
UM6K1N

UM6K1N

N/A

N/A

PWR_SW# PWR_SW#_DELAY

VPH_PWR_CHGR

12

2MR1J

2MR1J
R288

2

Q18A

Q18A
UM6K1N

UM6K1N

N/A

N/A

R288

N/A

N/A

61

Q19B
UM6K1N

UM6K1N

5

12

VDD_5V0_AC_BAT

VPH_PWR_CHGR

12

Q22B

Q22B
UM6K1N

UM6K1N

N/A

N/A

34

5

VDD_5V0_AC_BAT

PWR_SW#_DELAY_RC1

12

C315

C315

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

N/A

N/A

34

C313

C313

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

R290

R290
100KR1J

100KR1J

N/A

N/A

N/AQ19B

N/A

1230

1230

12301230
EMC add

EMC add

EMC addEMC add

VPH_PWR_CHGR

2

12

R281

R281

10KR1J

10KR1J

N/A

N/A

PWR_SW#_CTL

12

R285

R285
1MR1J

1MR1J

N/A

N/A

BAT_LOW#

12

R289

R289
220KR1J

220KR1J

N/A

N/A

61

Q22A

Q22A

UM6K1N

UM6K1N

4

VDD_5V0_AC_BAT

ONKEY_PMIC

N/A

N/A

PWR_SW#_BUTTON 32

PWR_SW#_CTL 32

34

Q21B

Q21B
UM6K1N

UM6K1N

5

Page 32

DAU BD PWR_SW# BUTTON

N/A

N/A

PMU_ONKEY#

PMU_ONKEY# 50

ACOK#_PMIC to MAX77663 ACOK, check Polarity(active Low) on PMU side

3

PWRBTN Logic

Signal to MAX77663

PMU_ONKEY# to MAX77663 EN0, check Polarity on PMU side

PWR_SW#

2

PR 0217

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

Unmount

VDD_5V0_AC_BAT

12

R282

R282
1MR1J

1MR1J

N/A

N/A

12

C314

C314

/@

/@

GND

VPH_PWR_CHGR

23

2

2

S

S

Q20

Q20
SI2305DS

SI2305DS

1

1

N/A

N/A

1

G

G

D

D

3

3

ONKEY_R1 ONKEY_R2

12

R295

R295
10KR1J

10KR1J

SI2305DS 2nd Source

N/A

N/A

07G005C69010 P-MOSFET EMF44P02J SOT-23
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
07G005051310 P-MOSFET NTR2101PT1G SOT-23
07G00538101L P-MOSFET AP2305GN SOT-23

R287

N/AR287

N/A

1KR1J

1KR1J

1 2

1

VDD_1V8_GEN

12

61

2

R283

R283
10KR1J

10KR1J

N/A

N/A

AP_ONKEY#

Q21A

Q21A
UM6K1N

UM6K1N

N/A

N/A

AP_ONKEY# 12

Charger Related Signals

VDD_5V0_AC_BAT

VDD_1V8_GEN

12

R298

R298

10KR1J

10KR1J

N/A

To Tegra3

AP_ACOK#12

RB520CS 2nd Source
07004-00030200 - SCHOTTKY BAT54TM SOD923

B B

Charger OD output (INOK/SYSOK, SMB347 E2 pin)
PU 1M (VPH_PWR) on charger page(p.49)
preset to ACtive Low
L --> AC/USB IN

07G004045223 SCHOTTKY RB520CS-30 VMN2 [GA] ROHM
07G004250110 SCHOTTKY RB520G-30 SOD723 [GA] PANJIT

AP_ACOK#

N/A

To Tegra3

AP_CHARGING#12

AP_CHARGING#

RB520CS_30

RB520CS_30

VDD_1V8_GEN

R294

R294

10KR1J

10KR1J

N/A

N/A

D6

D6

1 2

12

VPH_PWR_CHGR

12

R291

R291
1MR1J

1MR1J

Signal from SMB347

N/A

N/A

N/A

N/A

ACOK#_PMIC_R ACOK#_PMIC

R2920R1J

R2920R1J

1 2

N/A

N/A

SMB347_ACOK# 49

Signal to MAX77663

R303

R303
0R1J

0R1J

1 2

N/A

N/A

ACOK#_PMIC 50

Signal from SMB347

SMB347_STAT 49

Charger OD output (STAT, SMB347 F5 pin)
PU 1M (VPH_PWR) on charger page(p.49)
preset to ACtive Low
L --> charging
H --> other status

Battery Voltage Low Detection

VBATT

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

VBATT

R299
10KR1J

10KR1J

1 2

12

C317

C317

N/A

N/A

3% Battry capacity : 3.4V

N/AR299

N/A

12

C318

C318
10U6.3VX5RC3M

10U6.3VX5RC3M

N/A

N/A

U29

U29

4

VDD

3

NC

S-1000N34-I4T1G

S-1000N34-I4T1G

N/A

N/A

1

OUT

2

VSS

VDD_5V0_AC_BAT

VPH_PWR_CHGR

12

R296

R296
100KR1J

100KR1J

N/A

N/A

R300

N/AR300

N/A

0R1J

0R1J

1 2

VDD_1V8_GEN

23

2

2

S

S

Q27

Q27
SI2305DS

SI2305DS

1

1

BAT_LOW#RESET_IC BAT_LOW#_R

N/A

N/A

1

G

G

D

D

3

3

12

SI2305DS 2nd Source
07G005C69010 P-MOSFET EMF44P02J SOT-23
07G005051130 P-MOSFET SI2305DS-T1-E3 SOT-2
07G005051310 P-MOSFET NTR2101PT1G SOT-23
07G00538101L P-MOSFET AP2305GN SOT-23

R301

N/AR301

1KR1J

1KR1J

1 2

N/A

LL_BAT_R LL_BAT_T30

R302

R302
100KR1J

100KR1J

N/A

N/A

LL_BAT_T30 6

A A

From Tegra3

SMB347_USB51HC6

SMB347_SUSP6

1 2

N/A

N/A

1 2

N/A

N/A

R3060R1J

R3060R1J

R3070R1J

R3070R1J

SMB347_USB51HC_CHGR 49

SMB347_SUSP_CHGR 49

Signal to SMB347

ROW10, 11 for charger control

Title :

Title :

Title :

T30 Core & Fuse

T30 Core & Fuse

T30 Core & Fuse

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

33 60Wednesday, March 21, 2012

33 60Wednesday, March 21, 2012

33 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

Unmount

CLIP3

CLIP2

CLIP1

CLIP1

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

D D

/@

CLIP8

CLIP8

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP2

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP9

CLIP9

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP3

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP10

CLIP10

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP4

CLIP4

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP5

CLIP5

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP6

CLIP6

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP7

CLIP7

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

Unmount

CLIP13

CLIP11

CLIP11

1

GND1

PTH NPTH

H1

H1

/@

/@

1

C138D75

C138D75

H2

H2

/@

/@

1

C138D75

C138D75

H3

H3

/@

/@

C C

1

C138D75

C138D75

H4

H4

/@

/@

1

C138D75

C138D75

GND GND

H5

H5

1

C138D75

C138D75

H6

H6

1

C138D75

C138D75

H7

H7

1

C138D75

C138D75

H8

H8

1

C138D75

C138D75

H9

/@

/@

/@

/@

/@

/@

/@

/@

H9

1

C59D59N

C59D59N

H10

H10

1

C59D59N

C59D59N

H11

H11

1

C59D59N

C59D59N

H12

H12

1

C43D43N

C43D43N

/@

/@

/@

/@

/@

/@

/@

/@

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP12

CLIP12

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP13

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

CLIP14

CLIP14

1

GND1

2

GND2

3

GND3

4

GND4

5

GND5

SHIELDING_5P

SHIELDING_5P

13GOK0310M100-10

13GOK0310M100-10

/@

/@

U61

U61

N/A

N/A

1

1

EMI_SPRING_PAD

EMI_SPRING_PAD

U62

U62

N/A

N/A

1

1

EMI_SPRING_PAD

EMI_SPRING_PAD

GND

B B

A A

Title :

Title :

Title :

EMC, Screw hole

EMC, Screw hole

EMC, Screw hole

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

39 60Tuesday, March 27, 2012

39 60Tuesday, March 27, 2012

39 60Tuesday, March 27, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

WIFI SDIO

Unmount

SDMMC3_CLK

12

C4001

C4001
8P25VNPOC1J

8P25VNPOC1J

/@

/@

SDMMC3_CMD

SDMMC3_DAT0

SDMMC3_DAT1

SDMMC3_DAT2

SDMMC3_DAT3

CLK_32K_OUT

12

0502

C4002

C4002
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

Unmount

SDMMC3_CLK15

D D

C C

SDMMC3_CMD15

SDMMC3_DAT015

SDMMC3_DAT115

SDMMC3_DAT215

SDMMC3_DAT315

WF_RST#15,41

WLAN_MAC_WAKEN12,41

CLK_32K_OUT6,41,43

BT

BT_UART3_RXD12,41

BT_UART3_TXD12,41

BT_UART3_RTS#12,41

BT_UART3_CTS#12,41

VDD_1V8_GEN

Unmount

1 2

1 2

1 2

1 2

1 2

1 2

12

R4011

R4011
47KR1J

47KR1J

/@

/@

R40010R1J R40010R1J

R40020R1J R40020R1J

R40030R1J R40030R1J

R40040R1J R40040R1J

R40050R1J R40050R1J

R40060R1J R40060R1J

CW/0228
Follow Cardhu, change to 0ohm.

BT_UART_TXD 12,41

BT_UART_RXD 12,41

BT_UART_CTS_N 12,41

BT_UART_RTS_N 12,41

12

12

R4013

R4013

R4012

R4012

47KR1J

47KR1J

47KR1J

47KR1J

/@

/@

/@

/@

SDIO_CLK_SPI_CLK

SDIO_CMD_SPI_DI

SDIO_DATA0_SPI_DO

SDIO_DATA1_SPI_IRQ

SDIO_DATA2_SPI_NC

SDIO_DATA3_SPI_CS

WL_SHUTDOWN_N_RST_NWF_RST#

WL_HOST_WAKEWLAN_MAC_WAKEN

12

12

R4014

R4014

R4015

R4015

47KR1J

47KR1J

47KR1J

47KR1J

/@

/@

/@

/@

remove FM

12

R4017

R4017
47KR1J

47KR1J

/@

/@

12

R4018

R4018
47KR1J

47KR1J

/@

/@

SDIO_CLK_SPI_CLK 41

SDIO_CMD_SPI_DI 41

SDIO_DATA0_SPI_DO 41

SDIO_DATA1_SPI_IRQ 41

SDIO_DATA2_SPI_NC 41

SDIO_DATA3_SPI_CS 41

WL_SHUTDOWN_N_RST_N 15,41

WL_HOST_WAKE 12,41

WiFi_RTC_CLK 6,41,43

WL_EN 15,41WIFI_EN15,41

12

R4016

R4016
47KR1J

47KR1J

/@

/@

Unmount

CW/0318
Add EMI Cap.

SDIO_CLK_SPI_CLK

SDIO_CMD_SPI_DI

CW/0322
Add EMI VARISTOR.

WL_EN

12

C4007

C4007
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

12

C4008

C4008
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

12

D4003

D4003
TVL040201AB0

TVL040201AB0

/@

/@

SDIO_DATA0_SPI_DO

SDIO_DATA1_SPI_IRQ

12

C4009

C4009
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

12

C4010

C4010
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

SDIO_DATA2_SPI_NC

12

SDIO_DATA3_SPI_CS

12

C4011

C4011
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

C4012

C4012
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

BT_RST_N

1 2

1MR1J

1MR1J
R4089

R4089

BT_WAKE

1 2

1MR1J

CW/0322
Add PD

B B

BT_WAKEUP12,41

BT_IRQ#12,41

1MR1J
R4090

R4090

GND

GND

BT_WAKE

BT_HOST_WAKE

BT_RST_N

1201

R4089 & R4090
100K -> 1M

BT_WAKE 12,41

BT_HOST_WAKE 12,41

BT_RST_N 12,41BT_EN12,41

12

C4003

C4003
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

Unmount

GPS

GPS_UART2_RTS#12,43

GPS_UART2_CTS#12,43

GPS_UART2_RXD12,43

GPS_UART2_TXD12,43

A A

CLK_32K_OUT6,41,43

GPS_PWRON12,43

CW/0322
Add PD

0502

GPS_POWER_ON#

5

1MR1J N/A

1MR1J N/A

1 2

R4091

R4091

1201

R4091 100K -> 1M

GPS_nCTS

GPS_nRTS

GPS_TX

GPS_RX

GPS_RTCCLK

GPS_POWER_ON#

12

GND

C4004

C4004
100PF5VNPOC1J

100PF5VNPOC1J

/@

/@

Unmount

GPS_nCTS 12,43

GPS_nRTS 12,43

GPS_TX 12,43

GPS_RX 12,43

GPS_RTCCLK 6,41,43

GPS_POWER_ON# 12,43

remove FM audio interface,

BT PCM

remove proximit y to 3G path co ntrol 0609

4

0502

DAP4_SCLK12,41

DAP4_FS12,41

DAP4_DIN12,41

DAP4_DOUT12,41

BT_PCM_CLK

BT_PCM_SYNC

BT_PCM_OUT

BT_PCM_IN

BT_PCM_CLK 12,41

BT_PCM_SYNC 12,41

BT_PCM_OUT 12,41

BT_PCM_IN 12,41

3

Title :

Title :

Title :

RF Interface

RF Interface

RF Interface

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

40 60Tuesday, March 20, 2012

40 60Tuesday, March 20, 2012

40 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

L4109

L4109

$1.3NH

$1.3NH
/@

/@

WiFi_BT_VCC_3V3

T4306 /@T4306 /@

1

BT_PCM_OUT 12
BT_PCM_SYNC 12

SDIO_CLK_SPI_CLK 40

BT_UART_TXD 12
BT_UART_CTS_N 12

WL_HOST_WAKE 12

2

0221 ME370T
L4110 unmount
R4105/R4110 0ohm

R4105

R4105

2.7NH/300mA

2.7NH/300mA

10G212000004010

10G212000004010

12

N/A

N/A

21

L4110

L4110

0.5pF/50V

0.5pF/50V

11G23200R564320

11G23200R564320

/@

/@

SDIO_CMD_SPI_DI 40

SDIO_DATA2_SPI_NC 40

BT_PCM_CLK 12

BT_PCM_IN 12

SDIO_DATA3_SPI_CS 40
SDIO_DATA0_SPI_DO 40

SDIO_DATA1_SPI_IRQ 40

BT_UART_RXD 12

BT_UART_RTS_N 12

Main Ant

U7912

U7912

N/A

ANT_BT_WL_4ANT_BT_WL_3

21

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

N/A

1

1

EMI_SPRING_PAD

EMI_SPRING_PAD

U7913

U7913

N/A

N/A

1

1

EMI_SPRING_PAD

EMI_SPRING_PAD

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

ME370T

ME370T

ME370T

1

Wifi/BT Combo

Wifi/BT Combo

Wifi/BT Combo

Richard Lin

Richard Lin

Richard Lin

41 60Tuesday, March 20, 2012

41 60Tuesday, March 20, 2012

41 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

L4106

L4106

N/A

N/A

21

21

12

C4138

C4138

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

WL_SHUTDOWN_N_RST_N15,40

WiFi_BT_VDDIO_1V8VDD_1V8_GEN

WiFi_BT_VCC_3V3+3VSUS

VDD_1P4

C4139

C4139

10U6.3VX5RC3M

10U6.3VX5RC3M

N/A

N/A

VDD1P2_LNLDO1_OUT

BT_RST_N12,40

BT_WAKE12,40

WL_EN15,40

WiFi_RTC_CLK6,40,43

L4107

2 1

12

2.2UH

2.2UH

Irat=1.7A

Irat=1.7A

BT_HOST_WAKE12

R4136 0R1J N/AR4136 0R1J N/A

R4137 0R1J /@R4137 0R1J /@

R4131 0R1J N/AR4131 0R1J N/A

SR_PA_OUT

N/AL4107

N/A

CBUCK_OUT

VDD_2P5_OUT

SR_PA_OUT

VDD_1P4

R4133 0R1J

R4133 0R1J

1 2

N/A

N/A

12

R4132

R4132
0R1J

0R1J

N/A

N/A

1 2

1 2

1 2

WiFi_BT_VCC_3V3

BT_HOST_WAKE

BT_SHUTDOWN_N
BT_RST_N

WL_GPIO_6

BT_WAKE

Unmount

12

C4117

C4117

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
/@

/@

VDD1P2_LNLDO1_OUT

Close to C2

VDD1P2_LNLDO1_OUT

Close to J3

VDD1P2_LNLDO1_OUT

ANT_BT_WL_1

AZWAVE/AW-NH665

AZWAVE/AW-NH665

0C011-00060000

0C011-00060000

VDD1P2_LDO_OUT

WL_EN_RST_N

RTC_CLK_EXT_WIFI

1.8V

D D

WiFi_BT_VCC_3V3

C4143

C4143

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

CLOSE PIN A2

C C

B B

A A

3.3V

12

12

C4142

C4142

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

N/A

N/A

U4303

Azurewave AW-NH665
0C011-00060000

VDD_1P4

Close to C1

VDD_2P5_OUT

Close to B3 & B4

SR_PA_OUT

Close to B9

VDD1P2_LDO_OUT

Close to D1

VDD1P2_LDO_OUT

Close to E2

Change

12

C9719

C9719
10U6.3VX5RC3M

10U6.3VX5RC3M

N/A

N/A

1 2

1 2

1 2

1 2

1 2

1 2

1 2

120Ohm

120Ohm

L4102 60Ohm/100Mhz

L4102 60Ohm/100Mhz

N/A

N/A

NBS_L0603_H39_000S

NBS_L0603_H39_000S

10G213000003010

10G213000003010

L4102 change to 0ohm

WiFi_BT_VDDIO_1V8

C4140

N/AC4140

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M
C4149

N/AC4149

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C4144

N/AC4144

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C4147

N/AC4147

N/A

1U6.3VX5RC2K

1U6.3VX5RC2K

C4151

N/AC4151

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C4366

N/AC4366

N/A

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C4367

N/AC4367

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

Unmount

5

4

RF solution

ANT_BT_WL_1

C4145

N/AC4145

N/A

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K
C4150

N/AC4150

N/A

1 2

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C4146

N/AC4146

N/A

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

U4303

U4303

A1

GND1

A2

VBAT_IN

A3

SR_PA_OUT

A4

GND2

A5

ANT_FM_RX

A6

ANT_FM_TX

A7

FM_AUDIO_R

A8

FM_AUDIO_L

A9

GND3

B1

CBUCK_OUT

B2

GND4

B3

VOUT_2P5_OUT

B4

VOUT_2P5_IN

B5

GND5

B6

BT_I2S_CLK

B7

BT_HOST_WAKE

B8

GND6

B9

VDD_BT_PA

C1

VIN_LDO

C2

VDD_LN_OUT

C3

BT_SHUTDOWN_N

C4

BT_RST_N

C5

GND7

C6

WL_GPIO_6

C7

BT_I2S_WS

C8

BT_WAKE

C9

GND8

N/A

N/A

T4107/@ T4107/@

For Debug use only

WL_EN_RST_N

1201

R4138
100K -> 1M

0825

L4104

L4104

$1.3NH

$1.3NH

H5

H6

H7

H8

H9

J1

J2

J3

J6

J7

J9

NC2

GND18

GND19

GND20J4GND21J5GND22

GND23J8GND24

ANT_2G4

VDD_LN_IN

ANT_AUX_EN

HSIC_STROBE

VDD_WL_PA_A_MODE

VDD1P2_CLDO_OUTD1WL_SHUTDOWN_N_RST_ND2RTC_CLKD3GND9D4BT_I2S_DOD5WL_GPIO_5D6BT_I2S_DID7GND10D8NC1D9GND11E1VDD_COREE2WL_UART_TXE3WL_GPIO_2E4GND12E5WL_GPIO_1E6BT_UART_RTS_NE7BT_UART_RXDE8GND13

WL_UART_TX

1

12

R4138

R4138
1MR1J

1MR1J

N/A

N/A

3

21

/@

/@

SR_PA_OUT

Close to A3

SR_PA_OUT

Close to H2

H1

H2

H3

H4

VDDIO

VDD_WL_PA

GND17

VDDIO_RF

WL_UART_RX

HSIC_DATA

ANT_MAIN_EN

BT_PCM_OUT

BT_PCM_SYNC

SDIO_CMD_SPI_DI

SDIO_DATA2_SPI_NC

SDIO_CLK_SPI_CLK

BT_UART_TXD
BT_UART_CTS_N
WL_HOST_WAKE

BT_PCM_CLK

BT_PCM_IN
SDIO_DATA3_SPI_CS
SDIO_DATA0_SPI_DO

SDIO_DATA1_SPI_IRQ

E9

R4104

R4104

0R2J

0R2J

N/A

N/A

GND16

GND15

GND14

12

WiFi_BT_VCC_3V3

SR_PA_OUT

WiFi_BT_VDDIO_1V8

G9
G8
G7
G6
G5
G4
G3
G2
G1
F9
F8
F7
F6
F5
F4
F3
F2
F1

C4135

N/AC4135

N/A

1 2

1U6.3VX5RC2K

1U6.3VX5RC2K

C4136

N/AC4136

N/A

1 2

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

C4148

N/AC4148

N/A

1 2

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

WL_UART_RX

For Debug use only

BT_PCM_OUT

BT_PCM_SYNC
SDIO_CMD_SPI_DI
SDIO_DATA2_SPI_NC
SDIO_CLK_SPI_CLK

BT_UART_TXD

BT_UART_CTS_N
WL_HOST_WAKE

BT_PCM_CLK

BT_PCM_IN
SDIO_DATA3_SPI_CS
SDIO_DATA0_SPI_DO
SDIO_DATA1_SPI_IRQ

BT_UART_RXD

BT_UART_RTS_N

5

4

3

2

1

02G561020900 C.S BCM4751IFBG FBGA100

600Ohm/100Mhz

600Ohm/100Mhz

L4309

N/AL4309

N/A

21

12

N/A

N/A

C7917

C7917
1000PF/25V

1000PF/25V

(0201)

U7930

U7930

1

1

EMI_SPRING_PAD

EMI_SPRING_PAD
U7931

U7931

1

1

N/A

N/A

EMI_SPRING_PAD

EMI_SPRING_PAD

REG_1V8

GPS_BCM_IN1

12

C7919 1PF/25V

C7919 1PF/25V

(0201)

N/A

N/A

N/A

N/A

ST Pre-LNA

GPS_BCM_IN2

1

2

5

GPS_VDD_IO_1V8

GPS_POWER_ON#12,40

U7915

/GPS

U7915

/GPS

Unbalance_port1

Unbalance_port2

GND1

GND3

GND2

1580MHZ

1580MHZ

09G061041350

09G061041350

X4301

X4301

1

NC1/VCO/ENABLE/DISABLE#

2

NC2

3

GND

26MHZ

26MHZ

N/A

N/A

4

3

Unmount

GPS_IN_BCM2

12

GPS_RTCCLK6,40,41

R4305
100KR1J

100KR1J

1 2

C7925

C7925

9.1NH

9.1NH

N/A

N/A

L4308

L4308

1.8PF/50V

1.8PF/50V

N/A

N/A

6

VCC

5

NC3

4

OUTPUT

C4315

C4315

$0.22U6.3VX5RC2K

$0.22U6.3VX5RC2K

N/AR4305

N/A

GPS_IN_BCM0

21

REG_1V8

C4306

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

1 2

BCM47511_TCXO_OUT_26M

BCM47511_TCXO_OUT_26M

12

/@

/@

1 2

N/A

N/A

BCM47511_RST#

N/AC4306

N/A

R43020R 1J

R43020R 1J

12

C7916

C7916
1000PF/25V

1000PF/25V

N/A

L4303

L4303

5.6NH N/A

D D

GPS_BCM_ANT1

5.6NH N/A

21

L4302

L4302

$4.7NH

$4.7NH
/@

/@

N/A

GPS_BCM_ANT3

21

(0201)

R4306
0R1J

0R1J

Unmount

0221 ME370T

L4111 unmount
R4316/R4317 0ohm

N/A

10G212000004010

10G212000004010

R4316

R4316

2.4P50VNPOC2J

2.4P50VNPOC2J

Ant_1

N/A

N/A

12

21

L4111

L4111

8.2NH

8.2NH
/@

C C

/@

U7909

U7909

N/A

N/A

1

1

EMI_SPRING_PAD

EMI_SPRING_PAD

U7908

U7908

N/A

N/A

1

1

EMI_SPRING_PAD

EMI_SPRING_PAD

N/A

C7918

C7918

1000PF/50V

1000PF/50V

Ant_2 GPS_BCM_ANT1

21

L4112

L4112

$1.3NH

$1.3NH
/@

/@

/@

12

Unmount

N/A

N/A

C7920

C7920

1000PF/50V

1000PF/50V

12

U4302

N/AU4302

N/A

7

VCC1
GND1

OUTPUT

INPUT3POWER_SAVE

UPC8236T6N-E2-A

UPC8236T6N-E2-A

10G212000004010

10G212000004010

R4317

R4317

2.4P50VNPOC2J

2.4P50VNPOC2J

N/A

N/A

12

GND2
VCC2

6
5
4

21

L4116

L4116

$1.3NH

$1.3NH
/@

/@

1
2

N/AR4306

N/A

1 2

Ant_4 Ant_3

21

L4115

L4115

$1.3NH

$1.3NH
/@

/@

GPS_BCM_IN3

GPS_LNA_EN

Unmount

B B

VDD_1V8_GEN

A A

+3VSUS

L4304

L4304

GPS_VDDIO

21

N/A

N/A

120Ohm

120Ohm

L4305

L4305

GPS_VDD_RF

21

N/A

N/A

120Ohm

120Ohm

12

C4314

C4314

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

N/A

N/A

12

C4313

C4313

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

N/A

N/A

GPS_VDD_IO_1V8

GPS_VDD_BAT_3V3

GPS_VDD_BAT_3V3

C4309

C4309

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

N/A

N/A

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

12

C4308

C4308

C4307

C4307

N/A

N/A

N/A

N/A

BCM47511_VDD_PRE

12

BCM47511_VDD1P2_CORE

12

EP101
PR 0213

02038-00010100 C.S BCM47511IFBG FBGA100

09G061041350 SAW FILTER 1575.42MHZ
09G061226010 SAW FILTER 1580MHZ

L4306

L4306
600Ohm/100Mhz

600Ohm/100Mhz

N/A

N/A

/GPS

/GPS

U4301

U4301
BCM4751IFBG

BCM4751IFBG

K9

GPS_RFIP

J8

GPS_VSSIF

J9

GPS_VSSPLL

K8

GPS_VSSLNA1

K10

GPS_VSSLNA2

E10

GNDIFP

A4

GPS_CAL

G10

TCXO

K2

LPO_IN

F10

ADCP

F8

VDDADC

G9

ADCN

A8

GPS_SYNC/PPS_OUT

A7

IF_VALID

A5

RST_N

J4

REGPU

H2

TM1

K1

TM2

B3

TM3

D2

SDA1

C1

SCL1

F2

XA_1

F7

XA_2

H3

XA_3

H4

XA_4

J2

XA_5

G8

XA_6

G7

XA_7

J1

XA_8

G6

XA_9

G4

XA_10

G1

XA_11

F1

XA_12

G5

XA_13

C10

XA_14

C8

XA_15

D5

XA_16

D8

XA_17

D6

XA_18

D9

XA_19

J5

VDD_BAT

H5

VDD_PRE

E9

VDDIFP

G2

VDDC1

C7

VDDC2

C3

VDDC3

K5

VDD1p2_CORE

C6

VDDIO1

D7

VDDIO2

F3

12

VDDIO3

BCM47511_RTCCLK_R

GPS_VDD_IO_1V8

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

GPS_IN_BCM0

C4305

C4305

N/A

N/A

2 1

J10

K7

GPS_VDDIF

GPS_VDDLNA

CLK IF

CLK IF

SYS IF

SYS IF

RART/I2C IF

RART/I2C IF

MEMORY

MEMORY

PWR

PWR

H10

GPS_VDDPLL

RF

RF

BCM47511_VDD1P2_GRF

K6

VDD1p2_GRF

GPS_AUXOP

GPS_AUXON

CAL_REQ

VSSADC1
VSSADC2

AUX_HI

VDD_AUX_O

VDD_AUX_IN

HOST_REQ

LNA_EN

C_GPIO_6
C_GPIO_7

D_GPIO_5
D_GPIO_6

REF_CAP

SCL2/UART_TX

SDA2/UART_RX

UART_nRTS
UART_nCTS

XD_0
XD_1
XD_2
XD_3
XD_4
XD_5
XD_6
XD_7

XD_8

XD_9
XD_10
XD_11
XD_12
XD_13
XD_14
XD_15

XCS_N

XWE_N

XOE_N

AVSS1
AVSS2

VSSC1
VSSC2
VSSC3
VSSC4
VSSC5

NC

U4301

U7915

J7

H8

B7

H9
F9

K4

H6

H7

A6

B6

A3
B5

A2
H1

J6

E1
D1
B2
A1

E5
B1
E6
D4
C4
E3
F6
E7

C2
D10
B4
A9
A10
B9
C9
B10

F5
E4
E2

E8

J3
K3

G3
F4
B8
C5
D3

BCM4751

02G561020900

09G061041350

12

C4310

C4310

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

N/A

N/A

BCM47511_REF_CAP

GPS_VDD_BAT_3V3

GPS_LNA_EN

C4312

C4312

1 2

N/A

N/A

0.01U10VX7RC1K

0.01U10VX7RC1K

BCM47511

02038-00010100

09G061226010

REG_1V8

12

C4311

C4311

0.22U6.3VX5RC2K

0.22U6.3VX5RC2K

N/A

N/A

GPS_VDD_IO_1V8

Unmount

12

R4304

R4304

$100KR1J

$100KR1J
/@

/@

GPS_TX 12

GPS_RX 12

GPS_nRTS 12

GPS_nCTS 12

CW/0228
Check VDD_BAT & VDDIO & RST_N sequence.

remove proximit y to 3G path co ntrol 0609

5

Title :

Title :

Title :

GPS

GPS

GPS

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

43 60Tuesday, March 20, 2012

43 60Tuesday, March 20, 2012

43 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

R4411
0R2J

0R2J

N/AR4411

N/A

NFC_SDA_R
NFC_SCL_R
NFC_IRQ_R
NFC_GPIO4_R

NFC_VEN

CAM_I2C_SDA9,25,26,31

D D

1.8V

CAM_I2C_SCL9,25,26,31

NFC_IRQ_R13

NFC_GPIO4_R6
NFC_VEN6

1 2

1 2
1 2
1 2
1 2

12

R4405

R4405
1MR1J

1MR1J

N/A

N/A

NFC_PVDDVDD_1V8_GEN

VDD_5V0_AC_BAT

R4412

N/AR4412

N/A

1 2

0R2J

0R2J

12

C4405

C C

B B

C4405

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

N/A

N/A

1UF6.3VX5RC2K

1UF6.3VX5RC2K

NFC_IF1

R4406

R4406
0R1J

0R1J

N/A

N/A

1 2

IF0(ADDR0)IF1(ADDR1) ADDRESS

000

1
1

C4407

C4407

1
0
1

12

C4406
1UF6.3VX5RC2K

1UF6.3VX5RC2K

12

N/A

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

NFC_VBATVPH_PWR_CHGR

N/AC4406

N/A

C4408

C4408

N/A

N/A

C4410

C4410

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

28H
29H
2AH
2BH

NFC_VBAT

NFC_PVDD

12

N/A

N/A

12

C4409

C4409
1UF6.3VX5RC2K

1UF6.3VX5RC2K

N/A

N/A

12

R44010R1J N/AR44010R1J N/A
R44020R1J N/AR44020R1J N/A
R44030R1J N/AR44030R1J N/A
R44040R1J N/AR44040R1J N/A

NFC_PVDD

NFC_VBAT

NFC_VCO
NFC_VDHF

NFC_AVDD
NFC_DVDD

NFC_TVDD

NFC_SDA
NFC_SCL
NFC_IRQ
NFC_GPIO4

NFC_VEN

NFC_IF1
NFC_SDA
NFC_SCL
NFC_IRQ

TX1
TX2
RX
VMID
PF1
PF2

10P50VNPOC1J

10P50VNPOC1J

1 2

1 2

1 2

1 2

NFC_XTAL1

NFC_XTAL2

C4401

1U6.3VX5RC2K

1U6.3VX5RC2K

C4402

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

C4403

1U6.3VX5RC2K

1U6.3VX5RC2K

C4404

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

U4401

U4401

D8

VBAT

F8

VBAT2

D1

VCO_VDD

C1

VDHF

A8

PMUVCC

G7

PMU_GND

F6

VSS

G1

AVDD_in

F2

AVDD_out

A5

DVDD

A4

PVDD

G8

TVDD

F7

TVDD_OUT

E8

VEN_MON

B7

VEN

E4

IF0

B4

IF1

C4

IF2

D4

IF3

A3

IRQ

C8

SVDD

E7

SIGIN

D7

SIGOUT

B8

SIMVCC

C7

SWIO

D6

EXT_SW_CTRL

H6

TX1

H7

TX2

H4

RX

G4

VMID

G5

ANT1

G6

ANT2

PN65NET1/C205020

PN65NET1/C205020

N/A

N/A

C4411

C4411

N/A

N/A

12

4

N/AC4401

N/A

N/AC4402

N/A

N/AC4403

N/A

N/AC4404

N/A

X4401

N/A X4401

N/A

27.12Mhz

27.12Mhz

4

TEST10

IFSEL0
IFSEL1
IFSEL2

2

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
TEST8
TEST9

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7

RFU1
RFU2
RFU3

TVSS2
TVSS1

PVSS

DVSS
AVSS2
AVSS1
XTAL1
XTAL2

13

12

A6
B6
C5
D5
E5
H2
F3
G2
G3
C6
E3
D3
C3
C2
B1
B2
B3
A1
A7
E6
H1
A2
F4
F5
H8
H5
B5
D2
H3
E2
E1
F1

C4412

C4412
10P50VNPOC1J

10P50VNPOC1J

N/A

N/A

NFC_PVDD

NFC_GPIO4

NFC_GPIO6

IF_SEL1

NFC_XTAL1
NFC_XTAL2

NFC_PVDD

12

1 2

R4407

R4407
100KR1J

100KR1J

N/A

N/A

R4408

R4408
0R1J

0R1J

/@

/@

RX

VMID

TX1

TX2

UNMOUNT

12

C3620

C3620
100NF10V

100NF10V

N/A

N/A

R4452

R4452
0Ohm

0Ohm

N/A

N/A

1 2

R4453

R4453
0Ohm

0Ohm

N/A

N/A

1 2

1 2

R4451
1KOhm

1KOhm

TX11

TX21

3

C3619

C3619

RXV

12

1NF/25V

1NF/25V

R9814

R9814

N/A

N/A

2KOhm

N/AL4451

N/A

C3607

C3607

180pF/50V

180pF/50V

N/A

N/A

N/AL4452

N/A

C3616

C3616

180pF/50V

180pF/50V

N/A

N/A

2KOhm

N/A

N/A

UNMOUNT

1 2

C3637

C3637

/@

/@

12

18PF/50V

18PF/50V

C3631

C3631

TX12

21

1 2

21

1 2

12

N/A

N/A

18PF/50V

18PF/50V

C3640

/@ C3640

/@

12

18PF/50V

18PF/50V

C3632

C3632

TX22

12

18PF/50V

18PF/50V

N/A

N/A

UNMOUNT

PF1

PF2

TX13

12

C3641

C3641
10PF/50V

10PF/50V

N/A

N/A

TX23

12

C3634

C3634
10PF/50V

10PF/50V

N/A

N/A

C3642

C3642
39PF/50V

39PF/50V

C3635

C3635
39PF/50V

39PF/50V

C3636

C3636
39PF/50V

39PF/50V

C3643

C3643
39PF/50V

39PF/50V

UNMOUNT

12

/@

/@

12

N/A

N/A

N/A

N/A

12

12

/@

/@

12

C3638

C3638

10PF/50V

10PF/50V

12

C3639

C3639

10PF/50V

10PF/50V

N/AR4451

N/A

L4451

560NH

560NH

L4452

560NH

560NH

2

ANT Matching

R4454

R4454
0Ohm

0Ohm

N/A

N/A

1 2

/@

/@

R4455

R4455
0Ohm

0Ohm

N/A

N/A

1 2

/@

/@

feed3

feed4

U7921

U7921

1

Feed3

1

EMI_SPRING_PAD

EMI_SPRING_PAD

U7920

U7920

1

Feed4

1

EMI_SPRING_PAD

EMI_SPRING_PAD

N/A

N/A

N/A

N/A

1

A A

Title :

Title :

Title :

NFC

NFC

NFC

Jamie Tseng

Jamie Tseng

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Jamie Tseng

44 60Thursday, March 22, 2012

44 60Thursday, March 22, 2012

44 60Thursday, March 22, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

Page.48

D D

Page.48

Page.49

Page.49

Page.49

Page.49

Page.51

Page.51

Page.51

Page.51

C C

+3VSUS +3VSUS

VDD_5V0_SYS VDD_5V0_SYS

VBATT VBATT

VDD_USB1_VBUS VDD_USB1_VBUS

VDD_CPU

VDD_CORE

VDD_1V8_GEN VDD_1V8_GEN

+1.35V +1.35V

MAX77663 SD0(6A)

MAX77663 SD1(3A)

MAX77663 SD2 (2A)

MAX77663 SD3(2A)

SMB347_DC_INDOCK_5V

VDD_AC_BATVPH_PWR_CHGR

VDD_1V0_GEN

VDD_1V2_SOC

PowerSYSTEM

B B

A A

Title :

Title :

Title :

BB-POWER I/F

BB-POWER I/F

BB-POWER I/F

Richard Lin

Richard Lin

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Richard Lin

45 60Thursday, March 01, 2012

45 60Thursday, March 01, 2012

45 60Thursday, March 01, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

4

3

2

1

BAT=3V~4.2V

VDD_AC_BAT

PL8201

N/APL8201

120mil120mil

D D

21

1 2

0.1UF/10V

0.1UF/10V

N/A

N/A

GND

N/A

80Ohm/100Mhz

80Ohm/100Mhz

120mil

120mil

PS/SYNC

Power Save Mode

PWM Mode

External Sync. Mode External Clock

C C

PS/SYNC , EN
Hi ----> over 1.2V
Low --> under 0.4V

GND (<0.4V)

>1.2V

12

PC8211

PC8211

GND GND

EN_VDD_PNL10,21

EN_3V3_SYS50

PC8200

PC8200

22UF/6.3V

22UF/6.3V

N/A

N/A

P_+3VSO_VIN

12

PC8205

PC8205

22UF/6.3V

22UF/6.3V

N/A

N/A

PC8204

PC8204

0.1UF/10V

0.1UF/10V

1 2

GND

/@

/@

PR8211 0Ohm

PR8211 0Ohm

1 2

nbs_r0201_h10_000s

nbs_r0201_h10_000s

N/A

N/A

PR8207

PR8207

100KOhm

100KOhm

PR8200

PR8200
0Ohm

0Ohm

r0201

r0201
/@

/@

P_+3VSO_VIN_S

P_+3VSO_EN_10

/@

/@

1 2

P_+3VSO_VINA_10

P_+3VSO_PS/SYNC_10

12

PR8201

PR8201
0Ohm

0Ohm

N/A

N/A
nbs_r0201_h10_000s

nbs_r0201_h10_000s

GND

PR8208

1 2

0Ohm

0Ohm

12

r0201

r0201

N/APR8208

N/A

+5VSUS POWER SUPPLY

RT9276_SW

Iq=25uA , Isd=1uA

PU8400

PU8400

9

VOUT

LX

6

VBAT

FB/NC

7

LBI

LBO

10

PGOOD#

PGND

1

EN

GND1
GND2

RT9276GQW

RT9276GQW

/@

/@

+5VSUS_Iin = 1A

BAT=3V~4.2V

VDD_AC_BAT

B B

PL8400

80Ohm/100Mhz

80Ohm/100Mhz

21

PC8400

PC8400
/@

/@

N/A

N/A

/@PL8400

/@

12

PR8400

PR8400

100KR1J

100KR1J

PR8401

PR8401

/@

/@

1MR1J

1MR1J

/@

/@

PL8401 2.2UH

PL8401 2.2UH

Irat=1.7A

Irat=1.7A

1 2

1 2

/@

/@

RT9376_LBI

21

EN_5V0_SBY

+3VSUS POWER SUPPLY

+3VSUS_Iout = 2.5A

PL8200 2.2UH

2

3

4
8

5
11

GND

12

PC8207

PC8207
1000PF/50V

1000PF/50V

/@

/@

PU8200

PU8200

8
9

11
10

12

1

13

2

16

TPS63020DSJR

TPS63020DSJR

N/A

N/A

P_+3VSO_EN_10

L1_1
L1_2

VIN2
VIN1

EN

VINA

PS/SYNC

GND1
GND2

PL8200 2.2UH

Irat=2.75A N/A

Irat=2.75A N/A

4.4x4.2x1.2mm

RT9276_VOUT

RT9276_FB

RT9276_LBO_R

PR8403

PR8403
1MR2F

1MR2F

/@

/@

21

1 2

1 2

VOUT_1
VOUT_2

PC8401

PC8401
10P25VNPOC1J

10P25VNPOC1J

/@

/@

1 2

PR8404

PR8404
110KOHM

110KOHM

/@

/@

PR8405

PR8405
1MR1J

1MR1J

1 2

/@

/@

P_+3VSO_LX2_SP_+3VSO_LX1_S

L2_1
L2_2

FB

PG

PGND

PJP8400 / @

PJP8400 / @

1 2

r0805_short_h28

r0805_short_h28

Iq=50uA , Isd=1uA

6
7

4
5

P_+3VSO_FB_10

3

P_+3VSO_PG_10

14

15

GND

nbs_r0201_h12_000s

nbs_r0201_h12_000s

VDD_5V0_SYS

PC8403

PC8403
10U6.3VX5RC3M

10U6.3VX5RC3M

1 2

/@

/@

VDD_1V8_GEN

1 2

PR8206
1MOhm

1MOhm

120mil

120mil

120mil120mil

12

PC8208

PC8208

22UF/6.3V

22UF/6.3V

N/A

N/A

GND GND

1 2

+3VO

/@PR8206

/@

Vo=0.5*(1+R1/R2)=3.28V

5VO

PC8405

PC8405

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

1 2

/@

/@

12

N/A

N/A

PR8204
68KOhm

68KOhm

+3VO

PC8209

PC8209

22UF/6.3V

22UF/6.3V

1 2

1 2

12

GND

PR8202

PR8202
1MOHM

1MOHM

N/APR8204

N/A

PR8203
180KOhm

180KOhm

+3VSUS

PJP8201

PJP8201

120 mil

120 mil

120 mil120 mil

1 2

/@

/@

R0805

R0805

12

nbs_r0805_short_h28_000s

nbs_r0805_short_h28_000s

PJ8200

PJ8200
SHORT_PIN

SHORT_PIN

0805=>50mil

/@

22UF/6.3V

22UF/6.3V

N/A

N/A

PC8201

4.7pF/50V

4.7pF/50V

N/APR8203

N/A

P_+3VSO_FB_R_10

12

N/APC8201

N/A

GND

/@

PC8212

PC8212

N/A

N/A

EN_5V0_SBY7,29

A A

5

PR8402

PR8402
1MR1J

1MR1J

N/A

N/A

1 2

Title :

Title :

Title :

5V & 3.3V External

5V & 3.3V External

5V & 3.3V External

Timmy Wu

Timmy Wu

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Timmy Wu

48 60Wednesday, March 21, 2012

48 60Wednesday, March 21, 2012

48 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

5

SMB347_DC_IN from Docking Conn.

SMB347_USB_IN from Micro USB Conn.

VDD_USB1_VBUS

PC8923

N/APC8923

N/A

1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

SMB347_DC_IN

12

PC8921

N/APC8921

N/A

10UF/16V

10UF/16V

c0805

c0805

PWR_I2C_SCL6,26,27,50

PWR_I2C_SDA6,26,27,50

SMB347_USB51HC_CHGR33

SMB347_STAT33

SMB347_SUSP_CHGR33

SMB347_ACOK#33

D D

12

For layout

C C

SMB347_USB_IN

R9947

R9947

N/A

N/A

1 2

0Ohm

0Ohm

0805

PR8907 0R 2JPR8907 0R2J

1 2

PR8908 0R 2JPR8908 0R2J

1 2

USB1_DP14,28

USB1_DN14,28

12

PC8922

PC8922
10UF/16V

10UF/16V

N/A

N/A

PC8919 1U10VX5RC2K

PC8919 1U10VX5RC2K

PR8902 100R1J

PR8902 100R1J

N/A

N/A

PR8903 100R1J

PR8903 100R1J

N/A

N/A

Charger preset to LOW enable

VDD_AC_BAT VDD_AC_BAT VDD_AC_BAT

12

PR9120

PR9120
100KOhm

100KOhm

5% N/A

5% N/A

SMB347_USB51HC_CHGR SMB347_EN SMB347_SUSP_CHGR

/@

1 2

T8900/@T8900

4

SMB347_DC_IN

N/A

N/A

USB1_ID

1

SMB_I2C_SCL

SMB_I2C_SDA

USB1_D_FP_SMB347

12

USB1_D_FN_SMB347

12

SMB347_EN

12

PR9127

PR9127
100KOhm

100KOhm

5%

5%
/@

/@

SMB347_VDDCAP

SMB347_VDDCAP

PU8900

PU8900

A5

DCIN1

B5

DCIN2

A1

USBIN1

B1

USBIN2

C1

VDDCAP

F1

OTG/ID

F5

STAT

F2

SCL

F3

SDA

D3

SUSP

E2

INOK/SYSOK(CHG_DET_N)

E1

D+

D1

D-

D2

USB5/1/HC(USB9/1.5/HC)

C4

EN

SMB347ET1699Y

SMB347ET1699Y

N/A

N/A

12

PR9129

PR9129
100KOhm

100KOhm

5% N/A

5% N/A

1

2

PD8900

PD8900

BAT54CW

BAT54CW

GND2

F4

3

PR8905453R2F

PC8917 10UF/16V

PC8917 10UF/16V

1 2

PC8918 10UF/16V

PC8918 10UF/16V

1 2

PC8916 22NF/16V

PC8916 22NF/16V

1 2

P_CHG_SW

1 2

/@

/@

PC8920

PC8920
47PF/50V

47PF/50V

SMB347_THRM

PR8905453R2F

12

PR8904453R2F

PR8904453R2F

12

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

12

P_CHG_SW

12

PC8869
470PF/50V

470PF/50V

nbs_c0603_h37_000s

nbs_c0603_h37_000s

P_CHG_SNB_S

12

PR8804

PR8804
1Ohm

1Ohm

N/A

N/A

N/A

N/A

N/A

N/A

PL8902

N/APL8902

N/A

21

1UH

1UH

123

G

G

S

S

PQ8902

PQ8902
P261AFEA

P261AFEA

N/A

N/A

D

D

876

5

876

5

5 4

VBATT
VBATT

N/APC8869

N/A

SMB347_VDDCAP

PR8901

PR8901

10KR1J

10KR1J

N/A

N/A

SMB457_BOOT

3

N/A

N/A

A4

MIDDCIN

A2

MIDUSBIN

B2

BOOT

A3

SW1

B3

SW2

D4

VSYS1

D5

VSYS2

C2

FETDRV

E4

CHGOUT1

E5

CHGOUT2

PJP8901 SH ORT_PIN

PJP8901 SH ORT_PIN

E3

VBATT

VCHG

THERM

GND1

C5

VCHG

B4

C3

12

1 2

1 2

1 2

PRT8900

PRT8900
10KOHM

10KOHM

N/A

N/A

2

PD8901

PD8901
MMSZ5245B-7-F

MMSZ5245B-7-F

N/A

N/A

VDD_AC_BAT

0Ohm

0Ohm

nbs_r0201_h12_000s

nbs_r0201_h12_000s

PR8906

PR8906

N/A

N/A

VDD_AC_BAT

VDD_AC_BAT

VBATT

VBATT

1 2

1 2

1 2

1 2

22U6.3VX5RC5M

22U6.3VX5RC5M

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

1000P25VX7RC1K

1000P25VX7RC1K

1 2

1 2

BAT CON

CON7312

CON7312

8

SIDE2

7

WTOB_CON_6P

WTOB_CON_6P

N/A

N/A

PC8911

22U6.3VX5RC5M

22U6.3VX5RC5M

PC8902

4.7UF6.3VX5RC2K

4.7UF6.3VX5RC2K
PC8904

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

PC8906

N/APC8906

N/A

PC8907

N/APC8907

N/A

12

PC8908

N/APC8908

N/A

12

PC8909

N/APC8909

N/A

0.1U6.3VX5RC1K

0.1U6.3VX5RC1K

PC8910
1000P25VX7RC1K

1000P25VX7RC1K

1

240 mil

240 mil

240 mil240 mil

VBATT

6

6

5

5

PWR_I2C_SCL

4

4

PWR_I2C_SDA

3

3

2

2
11SIDE1

N/APC8911

N/A

N/APC8902

N/A

N/APC8904

N/A

N/APC8910

N/A

12

PR9121

SMB347_STAT

PR9121
100KOhm

100KOhm

5%

5%
/@

/@

VDD_AC_BAT

B B

Delete PR9131 because PU resistor is placed on
page33(R294)

A A

5

12

PR9128

PR9128
100KOhm

100KOhm

5% N/A

5% N/A

12

PR9130

PR9130
100KOhm

100KOhm

5%

5%

/@

/@

Title :

Title :

Title :

Charger SMB347

Charger SMB347

Charger SMB347

Timmy Wu

Timmy Wu

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

1

Timmy Wu

49 60Wednesday, March 21, 2012

49 60Wednesday, March 21, 2012

49 60Wednesday, March 21, 2012

Rev

Rev

Rev

2.0

2.0

2.0

Main PMIC Page 1 of 3 (DC I/P, Reset, GPIO & Crystals)

PWR_I2C_SDA6,26,27 ,49
PWR_I2C_SCL6,26,27,49

BAT_COINCELL30

BAT_COINCELL

VDD_1V8_GEN

CORE_PWR_REQ6,14

CORE_PWR_REQ to MAX77663 EN1, PU resister R14 in CPU side (100k PU to VDD_1V8_GEN), delete R9114

CPU_PWR_REQ to MAX77663 EN2, PD resister R15 in CPU side(100k PD), delete R9118

AP_OVERHEAT#26

CPU_PWR_REQ6

PR9115 0R1J

nbs_r0201_h12_000s

nbs_r0201_h12_000s

PR9116 0R1J

nbs_r0201_h12_000s

nbs_r0201_h12_000s

ACOK#_PMIC33

PWR_INT#6

1 2

1 2

N/APR9115 0R1J

N/A

N/APR9116 0R1J

N/A

PR9107

PR9107

0R1J

0R1J

1 2

nbs_r0201_h12_000s

nbs_r0201_h12_000s

12

PR9113

100KR1J

100KR1J

nbs_r0201_h12_000s

nbs_r0201_h12_000s
5%

5%

VDD_1V8_GEN

PR9131 0R2JPR9131 0R2J
PR9132 0R2JPR9132 0R2J

VDD_AC_BAT

N/A

N/A

Note: 1.1K is not needed for this battery

N/APR9113

N/A

Active Low

Active - High

Active - High

Active - Low

Active High or Low

1 2
1 2

PMU_CGND

12

PMU_VBACKUP

PC9105

N/APC9105

N/A

0.1UF/6.3V

0.1UF/6.3V

nbs_c0201_h13_000s

nbs_c0201_h13_000s

PMU_I2C_SDA
PMU_I2C_SCL

1 2

1 2

N/A

N/A

PMU_ONKEY#_R_PMIC

CORE_PWR_REQ_PMU

CPU_PWR_REQ_PMU

12

PC9106

0.1UF/6.3V

0.1UF/6.3V

nbs_c0201_h13_000s

nbs_c0201_h13_000s

12

PC9107

0.1UF/6.3V

0.1UF/6.3V

nbs_c0201_h13_000s

nbs_c0201_h13_000s

MAX_XTAL_IN

X3101

X3101

32.768khz

32.768khz

MAX_XTAL_OUT

PU900C

PU900C

E3

INI2C

F2

SDA

E2

SCL

C3

N/APC9106

N/A

MBATT

A2

MON

D10

BBATT

N/APC9107

N/A

A10

XGND_1

B10

XIN

1/3

1/3

G6

GPIO_INA

GPIO_INB

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

G5

G7

H7

G8

H8

G3

H3

G4

H4

VDD_AC_BAT

12

PC9110

PC9110

0.1UF/6.3V

N/A

0.1UF/6.3V

N/A

nbs_c0201_h13_000s

nbs_c0201_h13_000s

VDD_1V8_GEN

12

PC9111

N/APC9111

N/A

0.1UF/6.3V

0.1UF/6.3V

nbs_c0201_h13_000s

nbs_c0201_h13_000s

PR9109

PR9109
100KR1J

N/A

100KR1J

N/A

nbs_r0201_h12_000s

nbs_r0201_h12_000s

5%

5%

CPU_PWR_REQ_PMU_GPIO

PWM, VRTC domain

VDD_AC_BAT

12

12

PR9110

PR9110

100KR1J

100KR1J

nbs_r0201_h12_000s

nbs_r0201_h12_000s
5%

5%

PR9122 0R1J

0229 EMI add

VDD_1V8_GEN

N/A

N/A

1 2

nbs_r0201_h12_000s

nbs_r0201_h12_000s

12

PR9111

PR9111
47KR1J

47KR1J

N/A

N/A

N/APR9122 0R1J

N/A

EN_AVDD_USB from MAX77663 GPIO2, check PU resister in PMU side(100k PU to VPH_PWR_CHGR)

EN_AVDD_USB_PMIC

EN_3V3_SYS_R

PMU_CLK32K_OUT_GPIO4

????

CPU_PWR_REQ 6

PR9124 0R1J

1 2

nbs_r0201_h12_000s

nbs_r0201_h12_000s

PR9125 0R1J

1 2

nbs_r0201_h12_000s

nbs_r0201_h12_000s

PR9126 33R1J

1 2

nbs_r0201_h12_000s

nbs_r0201_h12_000s

N/APR9126 33R1J

N/A

N/APR9124 0R1J

N/A

N/APR9125 0R1J

N/A

CLK_32K_IN

EN_AVDD_USB 14

EN_3V3_SYS 48

CLK_32K_IN 6

SYS_RESET# to MAX77663 nRSTIO & T30 SYS_RESETn, R278 PU 4.7K to VDD_1V8_GEN on page.32, delete PR9112

CLK_32K_IN

SYS_RESET#

SYS_RESET# 6,20,3 2

GPIOx Alternate Mode
GPIO0 Low-Power Mode Control Input
GPIO1 Flexible Power Sequencer Output
GPIO2 Flexible Power Sequencer Output
GPIO3 Flexible Power Sequencer Output
GPIO4 32kHz Output (32K_OUT1)
GPIO5 SD0 Dynamic Voltage Scaling Input
GPIO6 SD1 Dynamic Voltage Scaling Input
GPIO7 Reference Output 1.25V buffered reference output.

C10

C9

C7

C5

C6

E10

E5

C8

D2

MAX77612AEMJ+

MAX77612AEMJ+

N/A

N/A

XOUT

XGND_2

EN0

EN1

EN2

SHDN

LID

ACOK

NIRQ

MAX77663

MAX77663

NRST_IO

32K_OUT

GND_1
GND_2
GND_3
GND_4
GND_5

GND_6
GND(SNSN_SD4)
GND(SNSP_SD4)

GND(FB_SD4)

F9

nbs_c0201_h13_000s

nbs_c0201_h13_000s

PMU_CLK32K_OUT

D9

E4
D5
D6
D7
E6
E7
F3
F4
F5

PR9117 33R1J

PR9117 33R1J

FB_SD0 51

/@

/@
nbs_r0201_h12_000s

nbs_r0201_h12_000s

0.1UF/6.3V

0.1UF/6.3V

1 2

PC9109

PC9109

12

/@

/@

PJ9102

PJ9101

PJ9101
SHORT_PIN

SHORT_PIN

PMU_ONKEY#33

THERMAL#_R26

R2613

R2613

0R1J

0R1J

1 2

nbs_r0201_h12_000s

nbs_r0201_h12_000s

1 2

/@

/@

PMU_ONKEY#_R

/@

/@

PR9114

PR9114

0R1J

0R1J

1 2

nbs_r0201_h12_000s

nbs_r0201_h12_000s

N/A

N/A

12

PC9108

PC9108

0.1UF/6.3V

0.1UF/6.3V

nbs_c0201_h13_000s

nbs_c0201_h13_000s
/@

/@

PMU_CGND

PJ9102

1 2

SHORT_PIN

SHORT_PIN
/@

/@

0229 EMI add

Title :

Title :

Title :

PMIC 1/3

PMIC 1/3

PMIC 1/3

Timmy Wu

Timmy Wu

Timmy Wu

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Nam e

Size Project Nam e

Size Project Nam e

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

Rev

Rev

Rev

2.0

2.0

2.0

50 60Tuesday, March 20, 2012

50 60Tuesday, March 20, 2012

50 60Tuesday, March 20, 2012

Main PMIC Page 2 of 3 (Main DC/DC Converters)

VDD_AC_BAT

VDD_AC_BAT

VDD_AC_BAT

VDD_AC_BAT

VDD_AC_BAT

VDD_AC_BAT

PJP9305

PJP9305

/@

/@

1 2

R0805

R0805

nbs_r0805_short_h28_000s

nbs_r0805_short_h28_000s

PJP9306

PJP9306

/@

/@

1 2

R0805

R0805

nbs_r0805_short_h28_000s

nbs_r0805_short_h28_000s

PJP9307

PJP9307

/@

/@

1 2

R0603

R0603

PJP9308

PJP9308

/@

/@

1 2

R0603

R0603

PJP9311

PJP9311

/@

/@

1 2

R0603

R0603

12

N/A

N/A

12

VDD_AC_BAT

VDD_AC_BAT_INA_SD0

VDD_AC_BAT_INB_SD0

VDD_AC_BAT_IN_SD1

12

PC9302

PC9302

10UF/6.3V

10UF/6.3V

N/A

N/A

12

PC9303

PC9303

10UF/6.3V

10UF/6.3V

N/A

N/A

12

PC9304

PC9304

10UF/6.3V

10UF/6.3V

N/A

N/A

For layout

VDD_AC_BAT_IN_SD2

12

PC9317
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

VDD_AC_BAT_IN_SD3

12

PC9318
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PR9151

PR9151
0R1J

0R1J

nbs_r0201_h12_000s

nbs_r0201_h12_000s

PR9152

PR9152
0R1J

0R1J

nbs_r0201_h12_000s

nbs_r0201_h12_000s
/@

/@

Unmount

D_SD3 Logic Level SD3 Default Voltage
MBATT (logic high) 1.35V
Unconnected 1.5V
GND (logic low) 1.2V

12

PC9305

PC9305

10UF/6.3V

N/APC9317

N/A

N/APC9318

N/A

10UF/6.3V

N/A

N/A

12

PC9306

PC9306

10UF/6.3V

10UF/6.3V

N/A

N/A

MAX_D_SD3

PU900A

PU900A

B2

AVSD

H9

INA_SD0(IN_SD4)

J9

INA_SD0(IN_SD0)

H2

INB_SD0_1(IN_SD4)

J2

INB_SD0_2(IN_SD4)

H10

IN_SD1_1

J10

IN_SD1_2

H1

IN_SD2_1

J1

IN_SD2_2

B1

IN_SD3_1

A1

IN_SD3_2

D4

D_SD3

MAX77612AEMJ+

MAX77612AEMJ+

N/A

N/A

2/3

2/3

6000mA

3000mA

2000mA

2000mA

LXA_SD0_1(LX_SD0)
LXA_SD0_2(LX_SD0)

LXB_SD0_1(LX_SD4)
LXB_SD0_2(LX_SD4)

PGA_SD0_1(PG_SD0)
PGA_SD0_2(PG_SD0)

PGB_SD0_1(PG_SD4)
PGB_SD0_2(PG_SD4)

SNSP_SD0
SNSN_SD0

LX_SD1_1
LX_SD1_2

SNSP_SD1
SNSN_SD1

LX_SD2_1
LX_SD2_2

PG_SD2_1
PG_SD2_2

MAX77663

MAX77663

LX_SD3_1
LX_SD3_2

FB_SD0

PG_SD1

FB_SD1

FB_SD2

PG_SD3

FB_SD3

PL9304

1UH

PL9304

LXA_SD0

J7
J8

LXB_SD0

J3
J4

H6
J6

H5
J5

FB_SD0

F6

F7
F8

LX_SD1 VDD_PMU_1V2_DCDC1_RS

G9
G10

F10

D8

E9
E8

LX_SD2 VDD_1V8_PMU_DCDC2

G1
G2

E1
F1

FB_SD2

D3

LX_SD3

C1
C2

D1

C4

FB_SD3

Irat=4.2A N /A

Irat=4.2A N /A

PL9305

PL9305

Irat=4.2A N /A

Irat=4.2A N /A

PL9306

PL9306

Irat=4.2A N /A

Irat=4.2A N /A

PL9303

PL9303

1UH N/A

1UH N/A

2520/2.3A

PL9302

PL9302

1UH N/A

1UH N/A

2520/2.3A

1UH

1UH

1UH

1UH

1UH

12

12

21

12

21

12

nbs_c0805_h55_000s

nbs_c0805_h55_000s

12

PC9307

PC9307

22UF/6.3V

22UF/6.3V

N/A

N/A

PC9309

PC9309

22UF/6.3V

22UF/6.3V

N/A

N/A

PC9310

PC9310
10UF/6.3V

10UF/6.3V

nbs_c0603_h37_000s

nbs_c0603_h37_000s

N/A

N/A

PC9311

PC9311

22UF/6.3V

22UF/6.3V

N/A

N/A

PC9308

PC9308

22UF/6.3V

22UF/6.3V

N/A

N/A

12

remove and bypass the shunt after routing

PJP9301

PJP9301
SHORT_PIN

SHORT_PIN
/@

/@

FB_SD0 50

12

remove and bypass the shunt after routing

PJP9302

PJP9302
SHORT_PIN

SHORT_PIN
/@

/@

12

PC9312

PC9312
10UF/6.3V

10UF/6.3V

nbs_c0603_h37_000s

nbs_c0603_h37_000s
N/A

N/A

12

12

PJP9303

PJP9303
SHORT_PIN

SHORT_PIN
/@

/@

PJP9304

PJP9304
SHORT_PIN

SHORT_PIN
/@

/@

VDD_1V0_GEN

12

+

+

PCE9301

PCE9301
100UF/6.3V

100UF/6.3V

/@

/@

GND

VDD_CORE_SENSE 5
GND_CORE_SENSE 5

remove and bypass the shunt after routing

remove and bypass the shunt after routing

VDD_CPU_SENSE 5

GND_CPU_SENSE 5

PJP9312

PJP9312

1 2

R0805 nbs_r0805_short_h28_000s

R0805 nbs_r0805_short_h28_000s

PJP9309

PJP9309

1 2

R0805

R0805

nbs_r0805_short_h28_000s

nbs_r0805_short_h28_000s

/@

/@

/@

/@

VDD_1V2_SOC

VDD_1V8_GEN

+1.35V

Title :

Title :

Title :

PMIC 2/3

PMIC 2/3

PMIC 2/3

Timmy Wu

Timmy Wu

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

Timmy Wu

51 60Tuesday, March 20, 2012

51 60Tuesday, March 20, 2012

51 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0

Main PMIC Page 3 of 3 (LDO's)

PR9205

N/APR9205

N/A

N/APR9206

N/A

N/APR9207

N/A

N/APR9208

N/A

N/APR9209

N/A

PMU_LDO_0_1_IN_1V35

12

PC9213
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_2_IN_3V3

12

PC9214
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_3_5_IN_3V3

12

PC9215
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_4_6_IN_VPH

12

PC9216
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_7_8_IN_1V35

12

PC9217
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

+1.35V

+3VSUS

+3VSUS

VDD_AC_BAT

+1.35V

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9206

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9207

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9208

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9209

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PU900B

PU900B

B8

IN_LDO0_1

N/APC9213

N/A

A6

IN_LDO2

N/APC9214

N/A

A4

IN_LDO3_5

N/APC9215

N/A

B4

IN_LDO4_6

N/APC9216

N/A

A8

IN_LDO7_8

N/APC9217

N/A

MAX77612AEMJ+

MAX77612AEMJ+

N/A

N/A

3/3

3/3

OUT_LDO0

150mA

OUT_LDO1

150mA

OUT_LDO2

150mA

OUT_LDO3

300mA

OUT_LDO5

150mA

OUT_LDO4

150mA

OUT_LDO6

150mA

MAX77663

MAX77663

OUT_LDO7

450mA

300mA

OUT_LDO8

B7

B9

B6

A3

A5

B3

B5

A7

A9

PMU_LDO_OUT_0

12

PC9204
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_OUT_1

12

PC9205
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_OUT_2

12

PC9206
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_OUT_3

PC9207

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

nbs_c0402_h22_000s

nbs_c0402_h22_000s

1 2

PMU_LDO_OUT_5

12

PC9208
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_OUT_4

12

PC9209
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_OUT_6

12

PC9210
1U6.3VX5RC2K

1U6.3VX5RC2K

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_OUT_7

12

PC9211

4.7U6.3VX5RC2M

4.7U6.3VX5RC2M

nbs_c0402_h22_000s

nbs_c0402_h22_000s

PMU_LDO_OUT_8

PC9212

2.2U6.3VX5RC2M

2.2U6.3VX5RC2M

nbs_c0402_h22_000s

nbs_c0402_h22_000s

1 2

N/APC9204

N/A

N/APC9205

N/A

N/APC9206

N/A

N/APC9207

N/A

N/APC9208

N/A

N/APC9209

N/A

N/APC9210

N/A

N/APC9211

N/A

N/APC9212

N/A

VDD_PMU_LDO1

no use

VDD_PMU_LDO5

to Camera 1.8V

PR9210

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9212

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9213

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9215

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9216

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9217

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

PR9218

1 2

0R2J

0R2J

nbs_r0402_h16_000s

nbs_r0402_h16_000s

N/APR9210

N/A

N/APR9212

N/A

N/APR9213

N/A

N/APR9215

N/A

/@PR9216

/@

N/APR9217

N/A

N/APR9218

N/A

VDD_PMU_LDO0_1V0

to T30 VDD_DDR_HS

VDD_PMU_LDO2_2V8

to T30 VDD_DDR_RX

VDD_PMU_LDO3_2V8

to eMMC Vcore(VCORE_EMMC_S)

VDD_PMU_LDO4_1V2

to T30 AVDD_DSI_CSI

VDD_PMU_LDO6_3V_1V8

to T30 VDDIO_SDMMC1 No use

VDD_PMU_LDO7_1V2

to T30 AVDD_DSI_CSI

VDD_PMU_LDO8_1V2

to T30 AVDD_PLLx

Title :

Title :

Title :

PMIC 3/3

PMIC 3/3

PMIC 3/3

Timmy Wu

Timmy Wu

Engineer:

Engineer:

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

ASUSTeK COMPUTER INC. EPAD

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

ME370T

ME370T

ME370T

Timmy Wu

52 60Tuesday, March 20, 2012

52 60Tuesday, March 20, 2012

52 60Tuesday, March 20, 2012

Rev

Rev

Rev

2.0

2.0

2.0