Asus A3G Schematics

5

4

3

2

01

1

FILE LIST

D D

A3G
BLOCK
DIAGRAM

FAN

39

THERMAL

05

DOTHAN

21W

03

04

POWER
(IMVP4)

41

42

44

43

46

45

47

49

48

50

PSB

LCD

C C

B B

CLOCK
GEN

22

Function
Key

40

1394

CARDBUS

26

25

AUDIO AMP
& MIC

36

35

TV

CRT

11

24

PCMCIA

27

A A

LVDS

C/Y/COMP

RGB

12 14

13

MINIPCI

34

37

VGA(M11)

9W

15

16

AC'97
CODEC

MDC

23

LAN

MCHM

AGP

MONTARA

-PM

DDR

11W

52

17

AC97

06

08

07

HUB

IDE
Ultra

ICH4

ATA100

2.9W

PCI

18

USB 2.0

USB X6

38

20

19

21

KBC

30

DDR TERMINATION

10

DUAL DDR SODIMM

09

SECONDARY IDE

29

PRIMARY IDE

28

LPC

SIO

31

PRINTER
PORT

32

DEBUG
PORT

33

IR&LPT

32

01_BLOCK DIAGRAM
02_POWER DIAGRAM
03_CPU-DOTHAN(HOST)
04_CPU-DOTHAN(PWR)
05_THERMAL
06_NB-MCHM1
07_NB-MCHM2
08_NB-MCHM3
09_DUAL_DDR
10_DDR_TERMINATION

51

11_VGA_M11-Disp Sys
12_VGA_M11-Mem IF
13_VGA_M11-PWR/GND
14_VGA_M11-VM TERMINATION
15_VGA_M11-Video RAM
16_BACKLIGHT&LCD CON
17_TV-OUT & CRT CON
18_ICH4-M(HUB_PCI)
19_ICH4-M(IDE_AC97)
20_ICH4-M(USB_PM)
21_ICH4-M(POWER)
22_CLOCK-ICS950815
23_LAN-RTL8100CL
24_MINIPCI
25_CB1394-R5C593(1)
26_CB1394-R5C593(2)
27_PCMCIA SOCKET
28_IDE-HD
29_IDE-ODD
30_KBC-M38857
31_SuperI/O&FWH
32_IR&LPT_PORT
33_DEBUG PORT
34_CODEC-ALC650
35_AUDIO AMP
36_MIC
37_MDC&RJ45&RJ11
38_USB
39_FAN&Audio DJ
40_FUNCTION KEY
41_PWR & RESET SEQ
42_VCORE
43_VGACORE
44_SYSTEM
45_2.5V&1.5V&1.35V&1.05V
46_1.25V&1.8V
47_PIC16C54C
48_CHARGER
49_AC_BAT_SYS
50_BATLOW/SD#
51_LOAD SWITCH
52_SCREW_HOLES
53_Clock Map
54_Platform Power Delivery Map
55_System Power Sequence(1)
56_System Power Sequence(2)
57_Revision History

Title :

BLOCK DIAGRAM

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

HD_NB TEAM

of

153Thursday, August 19, 2004

Rev

1.2

5

D D

AC_BAT_SYS

(2A)

CPU_VRON

MAX1987

4

+VCORE

3

VR_VID0-VR_VID5
PM_STPCPU#.,PM_DPRSLPVR.,PCI#.,MCH_OK.,CLK_EN#

(25A)

VRM_PWRGD

2

1

(1A)

(2.5A)

C C

(2A)

MAX1844

SUSC#.

LTC3728
(Regulator)

+5VAO

TPS5130

SUSC#

SUSC#

SUSB#

(6A)

+V3.3SUS

+1.5VO

+2.5VO

(4.2A)

CPU_VRON

(8.625A)+VGACORE

(5A)

(1.35A)

(8.2A)

+1.2VO

+1.05VO

VGA_PWRGD

+5VO
+12VO

(1.9A) (1.9A)

(2.8A)

(5.5A)
(0.2A)

+V1.5

+V2.5

+V1.2S

+VCCP

(1.35A)

(8.2A)

(2.8A)

SUSB#
SUSB#

SUSB#

SUSB#

+V5S
+V3.3S
+V5
+V3
+V12S
+V12

+V1.5S
+V2.5S

(5.5A)
(5A)
(5.5A)
(5A)
(0.2A)
(0.2A)

(1.35A)
(8.2A)

A/D_VIN

BAT_S

TS

Power
Signal
Circuit

SHUT_DOWN#
BAT_IN#_OC
ACIN_OC
AC_APR_UC

SUSB#

+V2.5

+2.5VO

B B

+V3.3SUS +V1.5SUSSI9183DT

(0.5A)

(0.6A)

(2.25A)

CM8562

(Regulator)

SUSC#

MIC37101-1.8

LDO

(LDO)

PIC + TL494

(Charge)

+V1.25S

(0.8A)

(1A)

+1.8VO

(1.35A)(0.7A)

BAT

(2.5A) (10.5A)

+V1.8

(0.8A)
(0.8A)

SUSB#

SWITCH

+V1.8S

(0.8A)

SUSB#

AC_APR_UC

SMC_BAT
SMD_BAT

TS#

PIC16C54B/C

CHG EN
CHG LED
PWR LED
BAT_LLOW

FDS6679

FD6JK3TP

MIC5223MB

A A

5

(Regulator)

(10.5A)(10.5A)

(6.4A) (10mA)(6.4A)

+3VAO

A/D_VIN

(10mA)(2mA) (10mA)

4

+3VALWAYS

L78L05ACUTR

(Regulator)

+5VO

+5VCHG

3

(20mA)

(100mA)

SWITCH

(F02JK2E)

+5VLCM

(120mA)

LM4040BIM3X
(Regulator)

+2.5VREF

(500uA)

2

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

A3G

1

POWER DIAGRAM

EDDY ZHAO

of

257Thursday, August 19, 2004

Rev

1.2

5

4

3

2

1

CPU Pin A1 need to be enlarged(M)

D D

WIDTH:4mils
SPACE >= 1:2
STROBE SPACE >=1:3
GROUP SPACE >=1:5

C C

LENGTH: 0.5" - 6.5"
(#0012)

H_A#[16:3]<8>

H_ADSTB#0<8>

H_REQ#[4:0]<8>

H_A#[31:17]<8>

H_ADSTB#1<8>

H_DPWR#<6>

H_A#16
H_A#15
H_A#14
H_A#13
H_A#12
H_A#11
H_A#10
H_A#9
H_A#8
H_A#7
H_A#6
H_A#5
H_A#4
H_A#3

H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0

H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
H_A#26
H_A#25
H_A#24
H_A#23
H_A#22
H_A#21
H_A#20
H_A#19
H_A#18
H_A#17

1"-6.5"

AA2

Y3

AA3

U1
Y1
Y4

W2

T4

W1

V2
R3
V3
U4
P4
U3
T1
P1
T2
P3
R2

AF1
AE1
AF3
AD6
AE2
AD5
AC6
AB4
AD2
AE4
AD3
AC3
AC7
AC4
AF4
AE5

C19

U42B

A[16]#
A[15]#
A[14]#
A[13]#
A[12]#
A[11]#
A[10]#
A[9]#
A[8]#
A[7]#
A[6]#
A[5]#
A[4]#
A[3]#
ADSTB[0]#
REQ[4]#
REQ[3]#
REQ[2]#
REQ[1]#
REQ[0]#

A[31]#
A[30]#
A[29]#
A[28]#
A[27]#
A[26]#
A[25]#
A[24]#
A[23]#
A[22]#
A[21]#
A[20]#
A[19]#
A[18]#
A[17]#
ADSTB[1]#

DPWR#

SOCKET479P

ADS#
PRDY#
PREQ#

BNR#

BPRI#

DBR#

ADDRESS GROUP 0ADDRESS GROUP 1

DEFER#

DRDY#
DBSY#

BR0#

CONTROL

IERR#

INIT#

LOCK#

RESET#

RS[2]#
RS[1]#
RS[0]#

TRDY#

HIT#

HITM#

N2

H_PRDY#

A10

H_PREQ#

B10
L1

J3

A7

L4
H2
M2

H_BR0#

N4

H_IERR#

A4

0.5"-12"

B5

<=10"

J2

<=10"

B11

<=3"

H_RS#2

L2

H_RS#1

K1

H_RS#0

H1
M3

K3
K4

R362

1 2

56Ohm

H_ADS# <7>

H_BNR# <7>
H_BPRI# <7>

H_DEFER# <7>
H_DRDY# <7>
H_DBSY# <7>

H_BR0# <7>

H_INIT# <20,31>

H_LOCK# <7>

H_CPURST# <8>

H_RS#[2:0] <7>
H_TRDY# <7>

H_HIT# <7>
H_HITM# <7>

WIDTH: 5 mils
SPACE >= 1:2
GROUP SPACE >=1:5
Breakout Length:<=200 mil
LENGTH: 1" - 6.5"(OPT: 4"+/-0.5")
(#0011)

+VCCP

Here IERR# is not routed as
a test point or to any
optional system receiver

RESET# Signal Routing with
NO ITP700FLEX Connector

H_D#[63:0] <8>

H_DINV2# <8>
H_DSTBN#2 <8>
H_DSTBP#2 <8>

H_DINV3# <8>
H_DSTBN#3 <8>
H_DSTBP#3 <8>

WIDTH:4mils
SPACE >= 1:3
GROUP SPACE >=1:5

LENGTH: 0.5" - 5.5"
(#0012)

C25
E23
B23
C26
E24
D24
B24
C20
B20
A21
B26
A24
B21
A22
A25
A19
D25
C23
C22

K25
N25
H26
M25
N24
L26
J25
M23
J23
G24
F25
H24
M26
L23
G25
H23
J26
K24
L24

U42A

D[15]#
D[14]#
D[13]#
D[12]#
D[11]#
D[10]#
D[9]#
D[8]#
D[7]#
D[6]#
D[5]#
D[4]#
D[3]#
D[2]#
D[1]#
D[0]#
DINV[0]#
DSTBN[0]#
DSTBP[0]#

D[31]#
D[30]#
D[29]#
D[28]#
D[27]#
D[26]#
D[25]#
D[24]#
D[23]#
D[22]#
D[21]#
D[20]#
D[19]#
D[18]#
D[17]#
D[16]#
DINV[1]#
DSTBN[1]#
DSTBP[1]#

SOCKET479P

D[47]#
D[46]#
D[45]#
D[44]#
D[43]#
D[42]#
D[41]#
D[40]#
D[39]#
D[38]#
D[37]#

DATA GROUP 0DATA GROUP 1

D[36]#

DATA GROUP 2DATA GROUP 3

D[35]#
D[34]#
D[33]#
D[32]#

DINV[2]#
DSTBN[2]#
DSTBP[2]#

D[63]#
D[62]#
D[61]#
D[60]#
D[59]#
D[58]#
D[57]#
D[56]#
D[55]#
D[54]#
D[53]#
D[52]#
D[51]#
D[50]#
D[49]#
D[48]#

DINV[3]#
DSTBN[3]#
DSTBP[3]#

Y25
AA26
Y23
V26
U25
V24
U26
AA23
R23
R26
R24
V23
U23
T25
AA24
Y26
T24
W25
W24

AF26
AF22
AF25
AD21
AE21
AF20
AD24
AF23
AE22
AD23
AC25
AC22
AC20
AB24
AC23
AB25
AD20
AE24
AE25

H_D#47
H_D#46
H_D#45
H_D#44
H_D#43
H_D#42
H_D#41
H_D#40
H_D#39
H_D#38
H_D#37
H_D#36
H_D#35
H_D#34
H_D#33
H_D#32

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_D#53
H_D#52
H_D#51
H_D#50
H_D#49
H_D#48

H_D#15
H_D#14
H_D#13
H_D#12
H_D#11
H_D#10
H_D#9
H_D#8
H_D#7
H_D#6
H_D#5
H_D#4
H_D#3
H_D#2
H_D#1

H_DINV0#<8>
H_DSTBN#0<8>
H_DSTBP#0<8>

H_DINV1#<8>
H_DSTBN#1<8>
H_DSTBP#1<8>

H_D#0

H_D#31
H_D#30
H_D#29
H_D#28
H_D#27
H_D#26
H_D#25
H_D#24
H_D#23
H_D#22
H_D#21
H_D#20
H_D#19
H_D#18
H_D#17
H_D#16

CPU PLL
CIRCUITS

+V1.8S

12

12

12

B B

12

12

A A

C426

0.01uF/25V

GND

+V1.8S_AC26

C420

0.01uF/25V

GND

+V1.8S_N1

C166

0.01uF/25V

GND

+V1.8S_B1

C167

0.01uF/25V

GND

C425

10uF

U42C

B15

CLK_CPU100<22>

T12TPC28t

12

C423

10uF

12

C170

10uF

12

C171

Close to Pin
VCCA[3..1] of CPU

10uF

5

T13TPC28t

CLK_CPU100#<22>

1
1

/X
/X

H_A20M#<20>
H_FERR#<20>
H_IGNNE#<20>
H_DPSLP#<6,20>
H_CPUSLP#<20>
H_INTR<20>
H_NMI<20>
H_SMI#<20>
H_STPCLK#<20>

H_PWRGD<20>

+V1.8S_AC26
+V1.8S_N1
+V1.8S_B1
+V1.8S

H_THERMDA<5>
H_THERMDC<5,11>

H_THRMTRIP_S#<5,20>

PM_PSI#<42>

2"-8"

B14

2"-8"

ITP_CLK

A16

ITP_CLK#

A15

<=10"

C2
D3

0.5"-12"

A3

<=10"

B7

<=10"

A6

<=10"

D1

<=10"

D4

<=10"

B4

<=10"
<=10"

C6

E4

<=10"

H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

H_PROCHOT#

T26TPC28t

1

T1TPC28t

1

T21TPC28t

1

T27TPC28t

1

H_RSVD3
H_RSVD2
H_RSVD1
H_RSVD0

H4
G4
G3

F3
F2
E2

AC26

N1

B1

F26

B18
A18
C17
B17

E1

C16

C3
C14
AF7

B2

SOCKET479P

4

BCLK[0]
BCLK[1]
ITP_CLK[0]
ITP_CLK[1]

A20M#
FERR#
IGNNE#
DPSLP#
SLP#
LINT0
LINT1
SMI#
STPCLK#

PWRGOOD
VID[5]

VID[4]
VID[3]
VID[2]
VID[1]
VID[0]

VCCA[3]
VCCA[2]
VCCA[1]
VCCA[0]

THERMDA
THERMDC
THERMTRIP#
PROCHOT#

RSVD5
RSVD4
RSVD3
RSVD2
RSVD1
RSVD0

H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

COMP[3]
COMP[2]

HOSTCLKLEGACY CPU

COMP[1]
COMP[0]

BPM[3]#
BPM[2]#
BPM[1]#
BPM[0]#

GTLREF[3]
GTLREF[2]
GTLREF[1]
GTLREF[0]

TEST1
TEST2

MISC

TRST#

VCCSENSE

VSSSENSE

VR_VID5 <42>
VR_VID4 <42>
VR_VID3 <42>
VR_VID2 <42>
VR_VID1 <42>
VR_VID0 <42>

CPU_COMP3

AB1

CPU_COMP2

AB2

CPU_COMP1

P26

CPU_COMP0

P25

H_BPM#3

C9

H_BPM#2

A9

H_BPM#1

B8

H_BPM#0

C8

AC1
G1
E26

H_GTLREF0

AD26

C5
F23

H_TCK

A13

TCK

H_TDI

C12

TDI

H_TDO

A12

TDO

H_TMS

C11

TMS

H_TRST#

B13

AE7

AF6

T2 TPC28t

1

T15 TPC28t

1

T19 TPC28t

1

T3 TPC28t

1

TOPOLOGY 2C:
CMOS Signals:
LINT0/INTR,LINT1/NMI,A20M#,
IGNNE#,SLP#,SMI#,and STPCLK#
CPU-ICH:0.5" - 12"

3

TOPOLOGY 2A:
Open Drain (OD) Signal
R-CPU-ICH Y-FORK
CPU-ICH: 0.5" - 12"
R - CPU <= 3"
(#0013)

H_PWRGD

TOPOLOGY 2B:
CMOS Signals
MCH-CPU-ICH4
MCH-CPU:0.5"-6.5"
CPU-ICH4:0.5"-12"
(#0013)

H_DPSLP#

TOPOLOGY 3:
CMOS Signals
CPU-ICH-R-LSC-FWH
CPU-ICH:0.5" - 12"
R - LSC <= 3"
LSC-FWH:0.5"-6"(#0013)

H_INIT#

Close to Pin A12 of CPU
Width= 5 mils
Length <= 2"

+VCCP

TOPOLOGY 1B:
Open Drain (OD) Signal

12

CPU-ICH-R
CPU-ICH: 0.5" - 12"

R78

ICH-R <= 3"

332Ohm

(#0013)

TOPOLOGY 1C:
Open Drain (OD) Signal
CPU-R-LSC-ICH
CPU-R: 0.5" - 12"
R - LSC<= 3"
LSC-ICH:0.5"-12"

TOPOLOGY 1B:
Open Drain (OD) Signal
CPU-ICH-R
CPU-ICH: 0.5" - 12"
ICH-R <= 3"
(#0013)

CPU DEBUG PORT

R341 200Ohm /ITP

H_PREQ#

R336 56Ohm /ITP

H_PRDY#

Close to Pin A8 of CPU

CPU JTAG

R333

H_TMS

R330

H_TDO

R328

H_TDI

R327

H_TCK

R325

H_TRST#

1 2
1 2

1 2
1 2
1 2
1 2
1 2

H_FERR#

H_PROCHOT#

H_THRMTRIP_S#

39Ohm
56Ohm
150Ohm

27.4Ohm
680Ohm

2

+VCCP

/ITP

+VCCP

GND

+VCCP

+VCCP

+VCCP

12

R192

56Ohm

12

R320

56Ohm

12

R194

56Ohm

H_GTLREF0
LENGTH <=0.5"
WIDTH = 5 mils
SPACE >= 25 mils

X BPSB(#0004)

CPU_COMP2 :
Analog
Length <= 0.5"
Width = 20 mils(L1/L4)
Space>= 25 mils
X BPSB(#0001)

CPU_COMP2

1 2

Pin AD1,AC2 of BANIAS

CPU_COMP3 :
Analog
Length <= 0.5"
Width = 5 mils
Space>= 25 mils
X BPSB(#0001)

CPU_COMP3

1 2

Pin AD1,AC2 of BANIAS

+VCCP

Close to

12

Pin AD26

R308

of CPU

1KOhm

H_GTLREF0

12

Same Side w/ CPU

R307

2KOhm

GND

CPU_COMP0 :
Analog
Length <= 0.5"
Width = 20 mils(L1/L4)
Space>= 25 mils
X BPSB(#0001)

R95

27.4Ohm

56Ohm

CPU_COMP0

GND

R96

CPU_COMP1

GND

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

1 2

27.4Ohm

CPU_COMP1 :
Analog
Length <= 0.5"
Width = 5 mils
Space>= 25 mils
X BPSB(#0001)

1 2

56Ohm

A3G

R309

R310

Engineer:

1

GND

GND

Title :

CPU-DOTHAN(HOST)

EDDY ZHAO

Rev

1.2

357Thursday, August 19, 2004

of

5

4

3

2

1

Target VCC (Std Voltage) :
HFM: 1.308V
LFM: 0.956V
Target Deeper Sleep Vcc =

D D

0.745 V

+VCORE

D6

VCC2D8VCC1

E17

D22

D20

D18

VCC4

VCC3

F20

F18

E21

E19

VCC9

VCC8E9VCC7E7VCC6E5VCC5

VCC14

VCC13F8VCC12F6VCC11

VCC10

VCC15

K22

J21

H22

G21

F22

VCC22

VCC21J5VCC20

VCC19H6VCC18

VCC17G5VCC16

VCC

VCCP1

VCCP2

VCCP3

VCCP4

VCCP5

VCCP6

VCCP7

VCCP8

VCCP9

VCCP10

VCCP11

VCCP12K6VCCP13L5VCCP14

VCCQ[1]W4VCCQ[0]

E11

E13

P23

+VCCP

C C

12

12

C150

0.1uF/10V

GND

+VCORE

12

C439

10uF

12

B B

C69

10uF

12

C168

10uF

12

C147

10uF

E15

D10

D12

D14

D16

C61

0.1uF/10V

These pins should be connected to VCCP on the
motherboard. However, these connections should enable
addition of decoupling on the VCCQ lines if
necessary.

12

12

C107

10uF

12

12

C68

10uF

12

12

C165

10uF

12

12

C75

10uF

VCCP15M6VCCP16

L21

F10

F12

F14

F16

M22

12

C70

C468

10uF

10uF

12

C456

C108

10uF

10uF

12

C445

C136

10uF

10uF

12

C76

C77

10uF

10uF

V22

VCC27W5VCC26

VCC25V6VCC24U5VCC23

VCCP17N5VCCP18

VCCP19P6VCCP20

N21

12

12

12

12

TDP:
21W (Std Voltage)
10W (Low Voltage)
5W (Ultra Low
Voltage)

AA7

AA5

Y22

W21

VCC32

VCC31

VCC30

VCC29Y6VCC28

VCCP21R5VCCP22

VCCP23T6VCCP24

T22

P22

R21

C469

10uF

C463
10uF

C460

10uF

C78

10uF

U42E

AC24

AC21

AC18

AC16

AC14

AC12

AC10

AC8

AC5

AC2

AB26

AB23

AB21

AB19

AB17

AB15

AB13

AB11

AB9

AB7

AB5

AB3

AA25

AA22

AA20

AA18

AA16

AA14

AA12

AA10

AA8

AA6

AA4

AA1

Y24

Y21

W26

W23

W22

V25

V21

U24

U22

T26

T23

T21

VSS160

VSS159

VSS158

VSS157

VSS156

VSS155

VSS154

VSS153

VSS152

VSS151

VSS150

VSS149

VSS148

VSS147

VSS146

VSS145

VSS144

VSS143

VSS142

VSS141

VSS140

VSS139

VSS138

VSS137

VSS136

VSS135

VSS134

VSS133

VSS132

VSS131

VSS130

VSS129

VSS128

VSS127

VSS126

VSS125

VSS124Y5VSS123Y2VSS122

VSS121

VSS120

VSS119W6VSS118W3VSS117

VSS116

VSS115V5VSS114V4VSS113V1VSS112

VSS111

VSS110U6VSS109U2VSS108

VSS107

VSS106

VSS49

VSS50F1VSS51F4VSS52F5VSS53F7VSS54F9VSS55

E25

12

C474

0.1uF/10V

F11

12

VSS105T5VSS104T3VSS103

VSS56

F13

F15

C473

0.1uF/10V

AD1

VSS161

AD4

VSS162

AD7

VSS163

AA9

VCC55

VCC54

VCC53

VCC52

VCC51

VCC50

VCC49

VCC48

VCC47

VCC46

VCC45

VCC44

VCC43

VCC42

VCC41

VCC40

VCC39

VCC38

VCC37

VCC36

VCC35

VCC34

VCC33

VCCP25

+VCCP

U21

12

12

12

C442

C448

10uF

10uF

12

12

C106

C135

10uF

10uF

12

12

C436

C475

10uF

10uF

12

C137

10uF

12

C441

C467

10uF

10uF

12

12

C132

C71

10uF

10uF

12

C146

10uF

VCC56

VCC57

VCC58

VCC59

VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72

VCC60

SOCKET479P

AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18

Mid Frequency
Decoupling (Place
around Processor)

High Frequency
Decoupling (Place
underneath
Processor) using
10uF/6.3V X5R

+VCORE
Bulk
Decoupling

U42D

AD18

AD16

AD14

AD12

AD10

AD8

AC19

AC17

AC15

AC13

AC11

AC9

AB22

AB20

AB18

AB16

AB14

AB12

AB10

AB8

AB6

AA21

AA19

AA17

AA15

AA13

AA11

AD9

VSS164

AD11

VSS165

AD13

VSS166

AD15

VSS167

AD17

VSS168

AD19

VSS169

AD22

VSS170

AD25

VSS171

AE3

VSS172

AE6

VSS173

AE8

VSS174

AE10

VSS175

AE12

VSS176

AE14

VSS177

AE16

VSS178

AE18

VSS179

AE20

VSS180

AE23

VSS181

AE26

VSS182

AF2

VSS183

AF5

VSS184

AF9

VSS185

AF11

VSS186

AF13

VSS187

AF15

VSS188

AF17

VSS189

AF19

VSS190

AF21

VSS191

AF24

VSS192

VSS1A2VSS2A5VSS3A8VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10B3VSS11B6VSS12B9VSS13

VSS14

VSS15

VSS16

VSS17

VSS18C1VSS19C4VSS20C7VSS21

A11

A14

A17

A20

A23

A26

B12

B16

B19

B22

B25

C10

GND

+VCCP

+VCCP (CPU) Decoupling Capacitor

GND

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27D2VSS28D5VSS29D7VSS30D9VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS37

VSS38

VSS39E3VSS40E6VSS41E8VSS42

VSS43

VSS44

VSS45

VSS46

VSS47

VSS48

E10

E12

E14

E16

E18

E20

C13

C15

C18

C21

C24

D11

D13

D15

D17

D19

D21

D23

D26

E22

(Place near CPU)

12

C440

0.1uF/10V

12

C438

0.1uF/10V

12

C437

0.1uF/10V

12

12

+

+

GND

CE15

CE11

150U/4.0V

150U/4.0V

Two 150-UF POSCAPs with an ESR of 36 mOhm(typ) should be used for bulk decoupling. One
capacitor should be placed next to the processor socket and one capacitor in close
proximity to the MCH package.

Ten 0.1-UF X7R capacitors in a 0603 form factor should be placed on the secondary side
of the motherboard under the processor socket cavity next to the VCCP pins of the
processor. Five capacitors should be spread out near the Data signal side and five
capacitors near the Address signal side of the processor socket's pin-map.

12

C472

0.1uF/10V

12

C458

0.1uF/10V

12

C449

0.1uF/10V

SOCKET479P

R25

R22

R4

P24

P21

VSS99R1VSS98

VSS97

VSS102

VSS101R6VSS100

P5

VSS96

P2

VSS95

N26

VSS94

N23

VSS93

N22

VSS92

N6

VSS91

N3

VSS90

M24

VSS89

M21

VSS88

M5

VSS87

M4

VSS86

M1

VSS85

L25

VSS84

L22

VSS83

L6

VSS82

L3

VSS81

K26

VSS80

K23

VSS79

K21

VSS78

K5

VSS77

K2

VSS76

J24

VSS75

J22

VSS74

J6

VSS73

J4

VSS72

J1

VSS71

H25

VSS70

H21

VSS69

H5

VSS68

H3

VSS67

G26

VSS66

G23

VSS65

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62G2VSS63G6VSS64

F17

F19

F21

F24

G22

12

12

C471

C470

0.1uF/10V

0.1uF/10V

12

12

C105

10uF

Four 200 uF are located in IMVP4

A A

C134

12

C133

10uF

10uF

GND

Title :

CPU-DOTHAN(PWR)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

EDDY ZHAO

of

457Thursday, August 19, 2004

Rev

1.2

5

D D

C C

4

Route H_THERMDA and H_THERMDC on the same layer
Route VGA_THEM_DP and VGA_THEM_DN on the same layer

------------------------------------OTHER SIGNALS
12 mils
==============================GND
10 mils
==================H_THERMDA(10 mils)
10 mils
==================H_THERMDC(10 mils)
10 mils
==================GND
12 mils

-----------------------------------------OTHER SIGNALS

3

2

1

Avoid BPSB,Power

+V3.3S +V3.3S_THM

R375

1 2

OS#_OC

47Ohm

12

C509

2200P

C503

2200P

1 2

VGA_THEM_DP<11>

B B

VGA_THEM_DN<3,11>

H_THERMDC<3,11>

H_THERMDA<3>

OS#_OC<39>

Different from A3N Thermal Control
A3N use Max6657
G3N use Max6695

12

C502

0.1uF/10V

GND

U44

1

VCC

2

DXP1

3

DXN

4

DXP2

5

OT1#

Standby Mode: 3uA(Max. 10uA)
Full Active: 0.5 mA(Max. 1mA)

10

OT2#

SMBDATA

ALERT#
SMBCLK

SDA_3S

9
8

SCL_3S

7
6

GND

SCL_3S&SDA_3S(PULL_UP 10K
IN PAGE19)

H_THRMTRIP_S# <3,20>
SDA_3S <9,19,22>
PM_THRM# <20,39>
SCL_3S <9,19,22>

H_THRMTRIP_S##(PULL_UP 56Ohm IN PAGE3)
PM_THRM#(PULL_UP 10K IN PAGE39)

OS#_OC(PULL_UP 10K IN PAGE 39)

GND

A A

Title :

THERMAL

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

EDDY ZHAO

of

557Thursday, August 19, 2004

Rev

1.2

5

AGP_AD[31:0]<11>

D D

AGP_C/BE#[3:0]<11>

12

+V1.8S

R334

<0.5"

36.5Ohm

CLK_MCH66<22>

AGP_SBA[7:0]<11>

AGP_SB_STB<11>
AGP_SB_STB#<11>

PCI_RST#<11,18,28,33>

R90

1 2

30.1Ohm

AGP_FRAME#<11>
AGP_DEVSEL#<11>
AGP_IRDY#<11>
AGP_TRDY#<11>
AGP_STOP#<11>

AGP_REQ#<11>

AGP_GNT#<11>

AGP_AD_STB0<11>
AGP_AD_STB0#<11>
AGP_AD_STB1<11>
AGP_AD_STB1#<11>

AGP_RBF#<11>
AGP_WBF#<11>

AGP_ST0
AGP_ST1
AGP_ST2

HUB_PD[10:0]<18>

AGP_PAR<11>

HUB_PSTRB<18>
HUB_PSTRB#<18>

M_RCOMP

H_DPSLP#<3,20>

NOTE:
GRCOMP SHUOULD BE

C C

B B

A A

10 MILS WIDE LESS

THEN 0.5'' FROM 855PM

R49

1 2

36.5Ohm

R601 USE 36.5 OHM
FOR 55 OHM BOARD
IMPEDANCE AGP
ROUTING

AGP_ST[2:0]<11>

+V1.5S

12

R91

4.7KOhm

+V1.25S

12

C156

The length of C603 to

0.1uF/10V

SMRCOMP pin should <1''

C603 decouping capacitor
should be placed near to
SMRCOMP pin

DDR_CKE0<9,10>
DDR_CKE1<9,10>
DDR_CKE2<9,10>
DDR_CKE3<9,10>

DDR_BS0#<9>

DDR_BS1#<9>
DDR_CS0#<9,10>
DDR_CS1#<9,10>
DDR_CS2#<9,10>
DDR_CS3#<9,10>

T10TPC28t /X

H_DPWR#<3>

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_RCOMP
AGP_VREF

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PSTRB
HUB_PSTRB#

MCH_HLZCOMP

HUB_VREF_MCH

MCH_TEST#

MCH_RCVEN

1

AA28
AB25
AB27
AA27
AB26

AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24

AA23

AG24
AH25
AD25
AA21

AC27
AC28

AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25
AF27
AF26

AE22
AE23
AF22
AG25
AF24
AG26

AD26
AD27

R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26

Y23

V25
V23
Y25

Y24
W28
W27
W24
W23
W25

P22

R24

R23

P25

P24

N27

P23
M26
M25

L28

L27
M27

N28
M24

N25

N24

P27

P26

J27
H27
H26

G23
E22
H23
F23

G12
G13

E9
F7
F9
E7

J28
G15
G14

V8

Y8

U43A

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GCBE0#
GCBE1#
GCBE2#
GCBE3#

GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
GRCOMP
AGPREF
66IN

AD_STB0
AD_STB0#
AD_STB1
AD_STB1#

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#

RBF#
WBF#
PIPE#
ST0
ST1
ST2

HI_0
HI_1
HI_2
HI_3
HI_4
HI_5
HI_6
HI_7
HI_8
HI_9
HI_10
HI_STB
HI_STB#
HLRCOMP
HI_REF

RSTIN#
RSVD1
TESTIN#

SCKE0
SCKE1
SCKE2
SCKE3

SBS0
SBS1
SCS0#
SCS1#
SCS2#
SCS3#

SMRCOMP
RCVENIN#
RCVENOUT#

NC0
NC1

DPSLP#

DPWR#

AGP

HUB

MCH_M

4

MEOMERY

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8

SMA9
SMA10
SMA11
SMA12

RSVD2

SDQ0

SDQ1

SDQ2

SDQ3

SDQ4

SDQ5

SDQ6

SDQ7

SDQ8

SDQ9

SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29

MEOMERY

SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

SWE#

SCAS#
SRAS#

SCK0

SCK0#

SCK1

SCK1#

SCK2

SCK2#

SCK3

SCK3#

SCK4

SCK4#

SCK5

SCK5#

SMVREF0
SMVREF1

E12
F17
E16
G17
G18
E18
F19
G20
G19
F21
F13
E20
G21
G22

G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E8
E11
B9
B7
C7
C6
D6
D4
B3
E6
B5
C4
E4
C3
D3
F4
F3
B2
C2
E2
G4
C16
D16
B15
C14
B17
C17
C15
D14

F26
C26
C23
B19
D12
C8
C5
E3
E15

G11
G8
F11

J25
K25
G5
F5
G24
E24
G25
J24
G6
G7
K23
J23

J9
J21

_DDR_AA0
_DDR_AA1
_DDR_AA2
_DDR_AA3
_DDR_AA4
_DDR_AA5
_DDR_AA6
_DDR_AA7
_DDR_AA8
_DDR_AA9
_DDR_AA10
_DDR_AA11
_DDR_AA12

DDR_DATA0
DDR_DATA1
DDR_DATA2
DDR_DATA3
DDR_DATA4
DDR_DATA5
DDR_DATA6
DDR_DATA7
DDR_DATA8
DDR_DATA9
DDR_DATA10
DDR_DATA11
DDR_DATA12
DDR_DATA13
DDR_DATA14
DDR_DATA15
DDR_DATA16
DDR_DATA17
DDR_DATA18
DDR_DATA19
DDR_DATA20
DDR_DATA21
DDR_DATA22
DDR_DATA23
DDR_DATA24
DDR_DATA25
DDR_DATA26
DDR_DATA27
DDR_DATA28
DDR_DATA29
DDR_DATA30
DDR_DATA31
DDR_DATA32
DDR_DATA33
DDR_DATA34
DDR_DATA35
DDR_DATA36
DDR_DATA37
DDR_DATA38
DDR_DATA39
DDR_DATA40
DDR_DATA41
DDR_DATA42
DDR_DATA43
DDR_DATA44
DDR_DATA45
DDR_DATA46
DDR_DATA47
DDR_DATA48
DDR_DATA49
DDR_DATA50
DDR_DATA51
DDR_DATA52
DDR_DATA53
DDR_DATA54
DDR_DATA55
DDR_DATA56
DDR_DATA57
DDR_DATA58
DDR_DATA59
DDR_DATA60
DDR_DATA61
DDR_DATA62
DDR_DATA63

DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5
DDR_DQS6
DDR_DQS7

DDR_AA0 <9>
DDR_AA1 <9>
DDR_AA2 <9>
DDR_AA3 <9>
DDR_AA4 <9>
DDR_AA5 <9>
DDR_AA6 <9>
DDR_AA7 <9>
DDR_AA8 <9>
DDR_AA9 <9>
DDR_AA10 <9>
DDR_AA11 <9>
DDR_AA12 <9>

DDR_WE# <9>
DDR_CAS# <9>
DDR_RAS# <9>

CLK_DDR0 <9>
CLK_DDR0# <9>
CLK_DDR1 <9>
CLK_DDR1# <9>
CLK_DDR2 <9>
CLK_DDR2# <9>
CLK_DDR3 <9>
CLK_DDR3# <9>
CLK_DDR4 <9>
CLK_DDR4# <9>
CLK_DDR5 <9>
CLK_DDR5# <9>

DDR_VREF

3

_DDR_DATA[63:0] <9,10>
_DDR_DQS[7:0] <9,10>

Close to MCH

_DDR_DATA3
_DDR_DATA6
_DDR_DATA7
_DDR_DATA2
_DDR_DATA4
_DDR_DATA5
_DDR_DATA0
_DDR_DATA1

_DDR_DQS0

_DDR_DATA15
_DDR_DATA11
_DDR_DATA10
_DDR_DATA14
_DDR_DATA9

_DDR_DATA8
_DDR_DATA12

_DDR_DQS1

_DDR_DATA19
_DDR_DATA23
_DDR_DATA22
_DDR_DATA18
_DDR_DATA17

_DDR_DATA21
_DDR_DATA20

_DDR_DQS2
_DDR_DATA31

_DDR_DATA27
_DDR_DATA26
_DDR_DATA30
_DDR_DATA29

_DDR_DATA28
_DDR_DATA25

_DDR_DQS3

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

DDR_DATA3

RN23A10Ohm

DDR_DATA6

RN23B10Ohm

DDR_DATA7

RN23C10Ohm

DDR_DATA2

RN23D10Ohm

DDR_DATA4

RN23E10Ohm

DDR_DATA5

RN23F10Ohm

DDR_DATA0

RN23G10Ohm

DDR_DATA1

RN23H10Ohm

DDR_DQS0

R17810Ohm

DDR_DATA15

RN22A10Ohm

DDR_DATA11

RN22B10Ohm

DDR_DATA10

RN22C10Ohm

DDR_DATA14

RN22D10Ohm

DDR_DATA9

RN22E10Ohm

DDR_DATA13_DDR_DATA13

RN22F10Ohm

DDR_DATA8

RN22G10Ohm

DDR_DATA12

RN22H10Ohm

DDR_DQS1

R17510Ohm

DDR_DATA19

RN21A10Ohm

DDR_DATA23

RN21B10Ohm

DDR_DATA22

RN21C10Ohm

DDR_DATA18

RN21D10Ohm

DDR_DATA17

RN21E10Ohm

DDR_DATA16_DDR_DATA16

RN21F10Ohm

DDR_DATA21

RN21G10Ohm

DDR_DATA20

RN21H10Ohm

DDR_DQS2

R17910Ohm

DDR_DATA31

RN20A10Ohm

DDR_DATA27

RN20B10Ohm

DDR_DATA26

RN20C10Ohm

DDR_DATA30

RN20D10Ohm

DDR_DATA29

RN20E10Ohm

DDR_DATA24_DDR_DATA24

RN20F10Ohm

DDR_DATA28

RN20G10Ohm

DDR_DATA25

RN20H10Ohm

DDR_DQS3

R18010Ohm

_DDR_DATA39
_DDR_DATA34
_DDR_DATA35
_DDR_DATA37
_DDR_DATA36

_DDR_DATA33
_DDR_DATA32

_DDR_DQS4

_DDR_DATA47
_DDR_DATA46
_DDR_DATA43
_DDR_DATA42
_DDR_DATA44

_DDR_DATA41
_DDR_DATA40

_DDR_DQS5

_DDR_DATA55
_DDR_DATA50
_DDR_DATA51
_DDR_DATA54
_DDR_DATA53

_DDR_DATA48
_DDR_DATA49

_DDR_DQS6
_DDR_DATA61

_DDR_DATA63
_DDR_DATA62
_DDR_DATA58
_DDR_DATA60

_DDR_DATA57
_DDR_DATA56

_DDR_DQS7

Intel suggested that DDR_VREF should
be turned off in S3-S5. But measure the
leakage because there is no +V2.5S.

+V2.5

12

R171
10KOhm

1

12

C232

0.1uF/10V

12

3

R170
10KOhm

Place C605,R619,R620 close to U601.P26

+V5

12

C223

U13

DDR_VREF

4

0.1uF/10V

1.225V-1.275V
S0-S1M:10 mA(Max.
50 mA)

52

V+

+

­V-

LMV321

MCH--------R619&R620 <=3"

HUB_VREF_MCH

12

C139

0.01uF/25V

2

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2

+V1.8S_MCH

12

R79

12

R80
150Ohm

GND

150Ohm

1

DDR_DATA39

RN17A10Ohm

DDR_DATA34

RN17B10Ohm

DDR_DATA35

RN17C10Ohm

DDR_DATA37

RN17D10Ohm

DDR_DATA36

RN17E10Ohm

DDR_DATA38_DDR_DATA38

RN17F10Ohm

DDR_DATA33

RN17G10Ohm

DDR_DATA32

RN17H10Ohm

DDR_DQS4

R18110Ohm

DDR_DATA47

RN16A10Ohm

DDR_DATA46

RN16B10Ohm

DDR_DATA43

RN16C10Ohm

DDR_DATA42

RN16D10Ohm

DDR_DATA44

RN16E10Ohm

DDR_DATA45_DDR_DATA45

RN16F10Ohm

DDR_DATA41

RN16G10Ohm

DDR_DATA40

RN16H10Ohm

DDR_DQS5

R17410Ohm

DDR_DATA55

RN15A10Ohm

DDR_DATA50

RN15B10Ohm

DDR_DATA51

RN15C10Ohm

DDR_DATA54

RN15D10Ohm

DDR_DATA53

RN15E10Ohm

DDR_DATA52_DDR_DATA52

RN15F10Ohm

DDR_DATA48

RN15G10Ohm

DDR_DATA49

RN15H10Ohm

DDR_DQS6

R17310Ohm

DDR_DATA61

RN14A10Ohm

DDR_DATA63

RN14B10Ohm

DDR_DATA62

RN14C10Ohm

DDR_DATA58

RN14D10Ohm

DDR_DATA60

RN14E10Ohm

DDR_DATA59_DDR_DATA59

RN14F10Ohm

DDR_DATA57

RN14G10Ohm

DDR_DATA56

RN14H10Ohm

DDR_DQS7

R17210Ohm

+V1.5S

12

R48

1KOhm

AGP_VREF

12

R52

1KOhm

12

C91

0.1uF/10V

Title :

NB-MCHM1

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

Benny Liang

of

657Thursday, August 19, 2004

Rev

1.2

5

4

3

2

1

D D

C C

B B

All decoupling capacitances should Be
placed near to the associated pins.

+V1.5S

12

+

12

12

150U/4.0V

+V1.2S

+V1.8S

+V1.8S

CE18

12

150U/4.0V

C128

12

+

CE9

150U/4.0V

0.01UF/10V

12

2.2UF/6.3V

C464

C141

0.01UF/10V

+

CE16

0.01UF/10V

12

C115

0.01UF/10V

C462

12

0.01UF/10V

12

12

C116

0.1U

12

C118

10uF

C73

C142

0.01UF/10V

12

0.01UF/10V

12

C144

0.22UF/10V

12

C145

U43B

AA22

VCC1_5_0

12

12

C143

C138

0.01UF/10V

+V1.8S_MCH

C112

12

C103

C92

0.01UF/10V

12

12

C125

0.022U

0.047UF/10V

0.1U

12

C149

10uF

12

0.01UF/10V

AA26

AB21
AC29
AD21
AD23
AE26
AF23
AG29

VCC1_5_1

R22

VCC1_5_2

R29

VCC1_5_3

U22

VCC1_5_4

U26

VCC1_5_5

W22

VCC1_5_6

W29

VCC1_5_7
VCC1_5_8
VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14

AJ25

VCC1_5_15

N14

VCC0

N16

VCC1

P13

VCC2

P15

VCC3

P17

VCC4

R14

VCC5

R16

VCC6

T15

VCC7

U14

VCC8

U16

VCC9

L25

VCC1_8_0

L29

VCC1_8_1

M22

VCC1_8_2

N23

VCC1_8_3

N26

VCC1_8_4

G16

RSVD3

G10

RSVD4

G9

RSVD5

H7

RSVD6

H4

ETS#

H3

RSVD7

G3

RSVD8

G2

RSVD9

T17

VCCGA

T13

VCCHA

MCH_M

HOST

ADS#

HTRDY#

DRDY#

DEFER#

HITM#

HLOCK#

BNR#
BPR#

DBSY#

RS0#
RS1#
RS2#

VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8

VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8

VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37

U7
V4
W2
Y4
Y3
Y5

HIT#

W3
V7

BR0

V3
Y7
V5

H_RS#0

W7

H_RS#1

W5

H_RS#2

W6
AB10

AB14
AB18
AB20
AB8
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23
M8
T8

A13
A17
A21
A25
A5
A9
C1
C29
D11
D15
D19
D23
D25
D7
E5
F10
F14
F16
F18
F22
G1
G29
H10
H12
H14
H16
H18
H20
H22
H24
H5
H8
J6
K22
K24
K26
K7
L23

H_ADS# <3>
H_TRDY# <3>
H_DRDY# <3>
H_DEFER# <3>
H_HITM# <3>
H_HIT# <3>
H_LOCK# <3>
H_BR0# <3>
H_BNR# <3>
H_BPRI# <3>
H_DBSY# <3>

H_RS#[2:0] <3>

12

C148

0.1uF/10V

12

C172

0.1uF/10V

12

C179

0.1uF/10V

12

C180

0.1uF/10V

12

C174
1UF/10V

/EMI

12

C59

0.1uF/10V

12

12

12

12

C224
1UF/10V

/EMI

C177

0.1uF/10V

C158

0.1uF/10V

C157

0.1uF/10V

12

C90

0.1uF/10V

12

12

C163

0.1uF/10V

12

12

C215
1UF/10V

/EMI

C178

0.1uF/10V

C154

0.1uF/10V

12

12

C169
1UF/10V

/EMI

12

C114

0.1uF/10V

C164

0.1uF/10V

12

C161

0.1uF/10V

12

+

CE13
150U/4.0V

+VCCP

12

+

CE17
150U/4.0V

12

C153

0.1uF/10V

+V2.5

AA29

AB11
AB13
AB15
AB17
AB19
AB22

AC18
AC20
AC21
AC23
AC26

AD10
AD12
AD14
AD16
AD19
AD22

AE18
AE20
AE29

AF11
AF13
AF15
AF17
AF19
AF21
AF25

AG18
AG20
AG22
AH19
AH21
AH23

AJ11
AJ13
AJ15
AJ17
AJ27

U43D

A11

VSS0

A15

VSS1

A19

VSS2

A23

VSS3

A27

VSS4

A3

VSS5

A7

VSS6

AA1

VSS7
VSS8

AA4

VSS9

AA8

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16

AB6

VSS17

AB9

VSS18

AC1

VSS19
VSS20
VSS21
VSS22
VSS23
VSS24

AC4

VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31

AD6

VSS32

AD8

VSS33

AE1

VSS34
VSS35
VSS36
VSS37

AE4

VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45

AF5

VSS46

AF7

VSS47

AF9

VSS48

AG1

VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60

AJ3

VSS61

AJ5

VSS62

AJ7

VSS63

AJ9

VSS64

D13

VSS65

D17

VSS66

D21

VSS67

D5

VSS68

D9

VSS69

E1

VSS70

MCH_M

VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141

E14
E26
E29
F12
F15
F20
F24
F6
F8
G26
H11
H13
H15
H17
H19
H21
H6
H9
J1
J22
J26
J29
J4
J7
K27
K6
L1
L22
L24
L26
L4
L8
M23
M6
N1
N13
N15
N17
N22
N29
N4
N8
P14
P16
P6
R1
R13
R15
R17
R26
R4
R8
T14
T16
T22
T6
U1
U13
U15
U17
U29
U4
U8
V22
V6
W1
W26
W4
W8
Y22
Y6

A A

Title :

NB-MCHM2

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

Benny Liang

of

757Thursday, August 19, 2004

Rev

1.2

5

D D

C C

B B

R61

301Ohm

+VCCP

12

12

R57

150Ohm

12

C95

0.01UF/10V

4

HSWING [1:0]
18 MIL TRACE
10 MIL SPACE

MCH_HSWNG0

R68

27.4Ohm

12

R315 27.4Ohm

12

R64

301Ohm

MCH_HRCOMP1

MCH_HRCOMP0

+VCCP

12

12

R63

150Ohm

12

C93

0.01UF/10V

CLK_MCH100#<22>
CLK_MCH100<22>

H_CPURST#<3>

LAYOUT NOTE:
H_CPURST# FORKS
AT 855PM PIN

MCH_HSWNG1

3

H_A#[31:3]<3> H_D#[63:0] <3>

H_REQ#[4:0]<3>

H_ADSTB#0<3>
H_ADSTB#1<3>

C801 should be placed closer to de HSWNG0 than R805
and R807

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

MCH_HRCOMP1
MCH_HSWNG1
MCH_HRCOMP0
MCH_HSWNG0

H_DSTBN#0<3>
H_DSTBN#1<3>
H_DSTBN#2<3>
H_DSTBN#3<3>
H_DSTBP#0<3>
H_DSTBP#1<3>
H_DSTBP#2<3>
H_DSTBP#3<3>
H_DINV0#<3>
H_DINV1#<3>
H_DINV2#<3>
H_DINV3#<3>

MCH_GTLREF

AC13
AD13

AD11
AC15

AE11
AC16

AD15
AE17

AB12
AB16

AC2
AA7

AD4
AF6

AD3
AG6

AD5
AG5
AH9

AA9

U6
R2

U3
R3

R6
N2
N5
N3

M3
M4
M5

N6

U2
R7

U5
R5

N7

M7

T5

P7
T3
P4
P3
P5

J3

L5
K3
J2

L6
L2
K5
L3
L7
K4
J5

T7

T4

K8
J8

P8

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADSTB0#
HADSTB1#

BCLK#
BCLK
HRCOMP1
HSWNG1
HRCOMP0
HSWNG0

HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
DBI0#
DBI1#
DBI2#
DBI3#

CPURST#
HVREF0

HVREF1
HVREF2
HVREF3
HVREF4

U43C

HOST

MCH_M

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AE5
AF3
AC6
AC3
AF4
AE2
AG4
AG2
AE7
AE8
AH2
AC7
AG3
AD7
AH7
AE6
AC8
AG8
AG7
AH3
AF8
AH5
AC11
AC12
AE9
AC10
AE10
AD9
AG9
AC9
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

2

C802 should be placed closer to de HSWNG1 than R806 and R808

1

+VCCP

12

R71

49.9Ohm

12

12

R62

100Ohm

1 2

A A

5

C102

0.22UF/10V

C83

0.22UF/10V

4

12

MCH_GTLREF

C127

1UF/10V

Place R809 close to HVREF4 and R810 close to
HVREF1

3

Title :

NB-MCHM3

ASUSTECH CO.,LTD.

Size Project Name

C

2

Date: Sheet

Engineer:

A3G

1

Benny Liang

of

857Thursday, August 19, 2004

Rev

1.2

5

4

3

2

1

D D

_DDR_DATA[63:0]<6,10>

All decoupling capacitances should Be
placed near to the associated pins.

FOR +V2.5 DECOUPLING

+V2.5 +V2.5

JP29A

1

VREF0

3

_DDR_DATA0

+V3.3S

RN19A10Ohm
RN19B10Ohm

RN19C10Ohm
RN19D10Ohm
RN19E10Ohm
RN19F10Ohm

RN19G10Ohm
RN19H10Ohm

_DDR_DATA1

_DDR_DATA2
_DDR_DATA3

_DDR_DATA8
_DDR_DATA9

_DDR_DATA10
_DDR_DATA11

_DDR_DATA16
_DDR_DATA17

_DDR_DATA18
_DDR_DATA19

_DDR_DATA24
_DDR_DATA25

_DDR_DATA26
_DDR_DATA27

_DDR_AA12
_DDR_AA9

_DDR_AA7
_DDR_AA5
_DDR_AA3
_DDR_AA1

_DDR_AA10
_DDR_BS0#
_DDR_WE#

_DDR_DATA32
_DDR_DATA33

_DDR_DATA34
_DDR_DATA35

_DDR_DATA40
_DDR_DATA41

_DDR_DATA42
_DDR_DATA43

_DDR_DATA48
_DDR_DATA49

_DDR_DATA50
_DDR_DATA51

_DDR_DATA56
_DDR_DATA57

_DDR_DATA58
_DDR_DATA59

12

C550

0.1uF/10V

GND

4

_DDR_DQS0<6,10>

_DDR_DQS1<6,10>

CLK_DDR0<6>

CLK_DDR0#<6>

C C

_DDR_AA[12:0]<10>
_DDR_BS0#<10>
_DDR_WE#<10>
_DDR_BS1#<10>
_DDR_RAS#<10>
_DDR_CAS#<10>

DDR_AA12<6>

DDR_AA9<6>
DDR_AA7<6>

DDR_AA5<6>
DDR_AA3<6>
DDR_AA1<6>

DDR_AA10<6>
DDR_BS0#<6>

B B

DDR_WE#<6>

_DDR_DQS2<6,10>

_DDR_DQS3<6,10>

CLK_DDR2<6>

CLK_DDR2#<6>
DDR_CKE1<6,10>

1 16
2 15

3 14
4 13
5 12
6 11

7 10
8 9

R177 10Ohm

1 2
DDR_CS0#<6,10>

Rn902 and R902 should be placed close to MCH

_DDR_DQS4<6,10>

_DDR_DQS5<6,10>

_DDR_DQS6<6,10>

_DDR_DQS7<6,10>

A A

5

SDA_3S<5,19,22>

SCL_3S<5,19,22>

VSS0

5

DQ0

7

DQ1

9

VDD0

11

DQS0

13

DQ2

15

VSS2

17

DQ3

19

DQ8

21

VDD2

23

DQ9

25

DQS1

27

VSS4

29

DQ10

31

DQ11

33

VDD4

35A

A: CK0

37A

A: CK0#

39

VSS7

41

DQ16

43

DQ17

45

VDD7

47

DQS2

49

DQ18

51

VSS9

53

DQ19

55

DQ24

57

VDD9

59

DQ25

61

DQS3

63

VSS11

65

DQ26

67

DQ27

69

VDD11

85

DU_0

87

VSS13

89A

A: CK2

91A

A: CK2#

93

VDD14

95A

A: CKE1

97

DU/A13

99

A12

101

A9

103

VSS16

105

A7

107

A5

109

A3

111

A1

113

VDD16

115

A10/AP

117

BA0

119

WE#

121A

A: S0#

123

DU_1

125

VSS18

127

DQ32

129

DQ33

131

VDD18

133

DQS4

135

DQ34

137

VSS20

139

DQ35

141

DQ40

143

VDD20

145

DQ41

147

DQS5

149

VSS22

151

DQ42

153

DQ43

155

VDD22

157

VDD24

159

VSS24

161

VSS25

163

DQ48

165

DQ49

167

VDD25

169

DQS6

171

DQ50

173

VSS27

175

DQ51

177

DQ56

179

VDD27

181

DQ57

183

DQS7

185

VSS29

187

DQ58

189

DQ59

191

VDD29

193

SDA

195

SCL

197

VDDSPD

199

VDDID

GND GND

VREF1

VSS1

VDD1

VSS3

DQ12
VDD3
DQ13

VSS5
DQ14
DQ15
VDD5
VDD6

VSS6

VSS8
DQ20
DQ21
VDD8

DQ22

VSS10

DQ23
DQ28

VDD10

DQ29

VSS12

DQ30
DQ31

VDD12

DU/RESET#

VSS14
VSS15
VDD13
VDD15

A: CKE0

DU/BA2

VSS17

VDD17

RAS#
CAS#

A: S1#

DU_3

VSS19

DQ36
DQ37

VDD19

DQ38

VSS21

DQ39
DQ44

VDD21

DQ45

VSS23

DQ46
DQ47

VDD23

A: CK1#

A: CK1
VSS26

DQ52
DQ53

VDD26

DQ54

VSS28

DQ55
DQ60

VDD28

DQ61

VSS30

DQ62
DQ63

VDD30
A: SA0
A: SA1
A: SA2

DU_2

DQ4
DQ5

DM0
DQ6

DQ7

DM1

DM2

DM3

A11

A8
A6

A4
A2
A0

BA1

DM4

DM5

DM6

DM7

+V2.5

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70

86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_VREFDDR_VREF

_DDR_DATA4
_DDR_DATA5

_DDR_DATA6
_DDR_DATA7

_DDR_DATA12
_DDR_DATA13

_DDR_DATA14
_DDR_DATA15

_DDR_DATA20
_DDR_DATA21

_DDR_DATA22
_DDR_DATA23

_DDR_DATA28
_DDR_DATA29

_DDR_DATA30
_DDR_DATA31

_DDR_AA11
_DDR_AA8

_DDR_AA6
_DDR_AA4
_DDR_AA2
_DDR_AA0

_DDR_BS1#
_DDR_RAS#
_DDR_CAS#

_DDR_DATA36
_DDR_DATA37

_DDR_DATA38
_DDR_DATA39

_DDR_DATA44
_DDR_DATA45

_DDR_DATA46
_DDR_DATA47

_DDR_DATA52
_DDR_DATA53

_DDR_DATA54
_DDR_DATA55

_DDR_DATA60
_DDR_DATA61

_DDR_DATA62
_DDR_DATA63

DDR_CKE0 <6,10>

3 14
6 11

7 10
4 13
5 12
2 15

8 9
1 16

R176 10Ohm

1 2

DDR_CS1# <6,10>

CLK_DDR1# <6>
CLK_DDR1 <6>

3

RN18C10Ohm
RN18F10Ohm

RN18G10Ohm
RN18D10Ohm
RN18E10Ohm
RN18B10Ohm

RN18H10Ohm
RN18A10Ohm

DDR_AA11 <6>
DDR_AA8 <6>

DDR_AA6 <6>
DDR_AA4 <6>
DDR_AA2 <6>
DDR_AA0 <6>

DDR_BS1# <6>
DDR_RAS# <6>
DDR_CAS# <6>

Rn901 and R901 should be placed close to MCH

CLK_DDR3<6>
CLK_DDR3#<6>
CLK_DDR5<6>
CLK_DDR5#<6>
DDR_CKE3<6,10>
DDR_CS2#<6,10>

2.375V - 2.625V(+/- 5%)
S0-S3: 8.12 A

12

+

CE21

150U/4.0V

+V2.5

12

+

CE22

150U/4.0V

DDR_VREF

12

GND

GND

2

12

+

CE19

150U/4.0V

12

+

150U/4.0V

C560

0.1uF/10V

CE20

35
37
89
91
95

121

201
202
203
204

JP29B

B: CK0
B: CK0#
B: CK2
B: CK2#
B: CKE1
B: S0#

NC0
NC1
NC2
NC3

+V2.5

B: CKE0

B: S1#

B: CK1#

B: CK1
B: SA0
B: SA1
B: SA2

NP_NC7
NP_NC6
NP_NC5
NP_NC4

C551 0.1uF/10V

1 2

C557 0.1uF/10V

1 2

C531 0.1uF/10V

1 2

C530 0.1uF/10V

1 2

C554 0.1uF/10V

1 2

C553 0.1uF/10V

1 2

C552 0.1uF/10V

1 2

C555 0.1uF/10V

1 2

C556 0.1uF/10V

1 2

C529 0.1uF/10V

1 2

C532 0.1uF/10V

1 2

C535 0.1uF/10V

1 2

C559 0.1uF/10V

1 2

C536 0.1uF/10V

1 2

C534 0.1uF/10V

1 2

C533 0.1uF/10V

1 2

C558 0.1uF/10V

1 2

C263

1 2

1UF/10V

/EMI

96B
122B
158B
160B
194B

1 2

R196 10KOhm

196B
198B

208
207
206
205

GND

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

+V2.5

12

+V5s

+V2.5

12

+V1.5s

DDR_CKE2 <6,10>
DDR_CS3# <6,10>
CLK_DDR4# <6>
CLK_DDR4 <6>

+V3.3S

A3G

C275
1UF/10V

/EMI

C291
1UF/10V

/EMI

1

12

Title :

Engineer:

C240
1UF/10V

/EMI

DUAL_DDR

Benny Liang

of

957Thursday, August 19, 2004

Rev

1.2

5

4

3

2

1

D D

C C

B B

All termination registers
should Be placed near to
the associated pins of
SO-DIMM1

_DDR_DATA2
_DDR_DQS0
_DDR_DATA6
_DDR_DATA7
_DDR_DATA4
_DDR_DATA5
_DDR_DATA1
_DDR_DATA0
_DDR_DATA17
_DDR_DATA16
_DDR_DATA23
_DDR_DATA22
_DDR_DATA21
_DDR_DATA20
_DDR_DATA11
_DDR_DATA10
_DDR_DQS1
_DDR_DATA9
_DDR_DATA15
_DDR_DATA13
_DDR_DATA14
_DDR_DATA12
_DDR_DATA8
_DDR_DATA3
_DDR_DQS5
_DDR_DATA41
_DDR_DATA40
_DDR_DATA35
_DDR_DATA38
_DDR_DATA39
_DDR_DATA37
_DDR_DATA36
_DDR_DATA49
_DDR_DATA48
_DDR_DATA46
_DDR_DATA47
_DDR_DATA44
_DDR_DATA45
_DDR_DATA43
_DDR_DATA42
_DDR_DATA56
_DDR_DATA51
_DDR_DATA50
_DDR_DATA54
_DDR_DATA55
_DDR_DATA52
_DDR_DATA53
_DDR_DQS6
_DDR_DATA62
_DDR_DATA63
_DDR_DATA60
_DDR_DATA61
_DDR_DATA59
_DDR_DATA58
_DDR_DQS7
_DDR_DATA57

_DDR_AA[12:0]<9>

_DDR_DATA[63:0]<6,9>

_DDR_DQS[7:0]<6,9>

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

4 13

56Ohm

6 11

56Ohm

5 12

56Ohm

8 9

56Ohm

7 10

56Ohm

1 16

56Ohm

2 15

56Ohm

4 13

56Ohm

3 14

56Ohm

6 11

56Ohm

5 12

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

3 14

56Ohm

5 12

56Ohm

4 13

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

1 16

56Ohm

2 15

56Ohm

4 13

56Ohm

3 14

56Ohm

5 12

56Ohm

6 11

56Ohm

7 10

56Ohm

8 9

56Ohm

RN64A
RN64B
RN64C
RN64D
RN64E
RN64F
RN64G
RN64H
RN62A
RN62B
RN62C
RN62D
RN62E
RN62F
RN62G
RN62H
RN63A
RN63B
RN63C
RN63D
RN63E
RN63F
RN63G
RN63H
RN56A
RN56B
RN56C
RN56D
RN56F
RN56E
RN56H
RN56G
RN55A
RN55B
RN55D
RN55C
RN55F
RN55E
RN55G
RN55H
RN54A
RN54B
RN54C
RN54E
RN54D
RN54F
RN54G
RN54H
RN53A
RN53B
RN53D
RN53C
RN53E
RN53F
RN53G
RN53H

+V1.25S

+V1.25S

FOR +V1.25S DECOUPLING

Place one cap between every 2 pullup resistors to +V1.25S

+V1.25S

_DDR_DATA24
_DDR_DATA19
_DDR_DATA18
_DDR_DQS2
_DDR_DATA30
_DDR_DATA31
_DDR_DATA28
_DDR_DATA29

_DDR_AA12

_DDR_CAS#<9>
_DDR_RAS#<9>

_DDR_BS1#<9>

DDR_CS2#<6,9>
DDR_CS0#<6,9>
DDR_CS3#<6,9>
DDR_CS1#<6,9>

DDR_CKE3<6,9>
DDR_CKE0<6,9>
DDR_CKE2<6,9>
DDR_CKE1<6,9>

_DDR_WE#<9>
_DDR_BS0#<9>

_DDR_CAS#
_DDR_RAS#
_DDR_AA4
_DDR_AA0
_DDR_AA2
_DDR_AA11
_DDR_BS1#

DDR_CS2#

DDR_CS0#
DDR_CS3#
DDR_CS1#

DDR_CKE3
DDR_CKE0
DDR_CKE2
DDR_CKE1

_DDR_DATA27
_DDR_DATA26
_DDR_DQS3
_DDR_DATA25

_DDR_DATA34
_DDR_DQS4
_DDR_DATA33
_DDR_DATA32

_DDR_AA6
_DDR_AA8

_DDR_WE#
_DDR_BS0#
_DDR_AA10
_DDR_AA1
_DDR_AA3
_DDR_AA5
_DDR_AA7
_DDR_AA9

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4

1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm
56Ohm
56Ohm

56Ohm
56Ohm

56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm

RN58A
RN58B
RN58C
RN58D

RN66A
RN66B
RN66C
RN66D

RN67A
RN67B
RN67C
RN67D

RN57A
RN57B
RN57C
RN57D

RN65A
RN65B

RN61A
RN61B
RN61C
RN61D
RN61E
RN61F
RN61G
RN61H

RN60A
RN60B
RN60C
RN60D
RN60E
RN60F
RN60G
RN60H

RN59A
RN59B
RN59C
RN59D
RN59E
RN59F
RN59G
RN59H

12

C578

0.1uF/10V

12

C576

0.1uF/10V

12

C579

0.1uF/10V

12

C577

0.1uF/10V

12

12

+V1.25S

C582

0.1uF/10V

C580

0.1uF/10V

12

12

C584

0.1uF/10V

C581

0.1uF/10V

12

C586

0.1uF/10V

12

C583

0.1uF/10V

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

C587

0.1uF/10V

+V1.25S

C585

0.1uF/10V

CN13A
CN13B
CN13C
CN13D

CN15A
CN15B
CN15C
CN15D

CN11A
CN11B
CN11C
CN11D

CN8A
CN8B
CN8C
CN8D

CN12A
CN12B
CN12C
CN12D

CN14A
CN14B
CN14C
CN14D

CN10A
CN10B
CN10C
CN10D

CN9A
CN9B
CN9C
CN9D

12

C591

0.1uF/10V

12

C588

0.1uF/10V

12

C590

0.1uF/10V

12

C589

0.1uF/10V

12

12

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

All decoupling capacitances should Be
placed near to the associated pins.

12

12

12

12

C595

C594

0.1uF/10V

0.1uF/10V

12

12

C593

C592

0.1uF/10V

0.1uF/10V

These chip capacitors should be
placed equationally near the
termination resistors

GND

C265

0.1uF/10V

C597

0.1uF/10V

12

C575

0.1uF/10V

12

C596

0.1uF/10V

12

12

C266

0.1uF/10V

C267

0.1uF/10V

12

C268

0.1uF/10V

12

C264

0.1uF/10V

A A

Title :

DDR_TERMINATION

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

Benny Liang

of

10 57Thursday, August 19, 2004

Rev

1.2

5

A

4

3

2

1

+V3.3_VGA

T16 TPC28t

1

T17 TPC28t

1

T14 TPC28t

1

T8 TPC28t

1

T20 TPC28t

1

T18 TPC28t

1

T24 TPC28t

1

T22 TPC28t

1

T23 TPC28t

1

T7 TPC28t

1

T25 TPC28t

1

PWR_PLY = H, VGACORE=1.0V
PWR_PLY = L, VGACORE=1.2V

GND

T6 TPC28t

1

T9 TPC28t

1

T5 TPC28t

1

T4 TPC28t

1

GND

RN49D
RN49C
RN49B
RN49A

C483

0.001uF/50V

/M11-P

GND

Place R313 close
to VGA

M11-P: Pull-up to [1,1]
M9+X: not stuff [0,0]

+V3.3_VGA

+V3.3_VGA

R353

4.7KOhm

/M11-P

1 2

12

12

R352

C482

4.7KOhm

0.1uF/10V

/M11-P

/M11-P

1 2

GND

GNDGND

M11-P: need GPIO_VREF
M9+X: not stuff

Place C483 & C482
close to VGA

M11-P Strap-pin

GPIO[1:0] = 11 (iPD) ; refclk 2 taps earlier than feedback clk (recommended)
GPIO[3:2] = 00 (iPD) ; 0 tap delay between x1clk and x2clk (recommended)
GPIO[6:4] = 000 (iPD) ; AGP8X_DETb = 1, AGP4X, 1.5V, AD16
GPIO[8] = 0 (iPD) ; ID Enable
GPIO[13:11,9] = 0000 (iPD) ; No ROM, CHG_ID=0 (default setting)
ZV_LCDDATA[17:16] = 00 (ASIC defalt) ; single function device
ZV_LCDDATA[20] = 1 (iPD) ; No slave VIP host port device

LCD PID2 PID1 PID0

14.1 XGA 1 1 1

15.0 XGA 1 0 1

15.0 SXGA+ 0 1 1

Title :

M11-Disp Sys

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

A3G

Pommy Lu

11 57Thursday, August 19, 2004

Rev

1.2

of

R_AD_STB0
R_AD_STB1
R_SB_STB

+V3.3_VGA

21

AA26
AA25
AA27

AG30
AG28

AF28

AD26

AE26
AC26
AE29

AB29
AD28

AD29
AC28
AC29
AA28
AA29

AF29
AD27
AE28

AB28

AB26
AB25
AC25

AK21

AJ23

AJ22
AK22

AJ24
AK24

AG23
AG24

AK25

AJ25
AH28

AJ29
AH27

AE25
AG26

AH30
AH29
AG29

H29
H28

J29

J28
K29
K28

L29

L28
N28
P29
P28
R29
R28
T29
T28
U29
N25
R26
P25
R27
R25
T25
T26
U25
V27

W26
W25

Y26
Y25

N29
U28
P26
U26

M25
N26
V29
V28

W29
W28

M28
V25

Y28
Y29

M29
V26

M26
M27

E8
B6

U40A /M11-P

AD0

Part 1 of 7

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PCICLK
RST#
REQ#
GNT#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
INTA#

WBF#
RBF#

AD_STBF_0
AD_STBF_1
SB_STBF

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

ST0
ST1
ST2

SB_STBS
ADSTBS_0
ADSTBS_1

AGPREF
AGPTEST

DBI_LO
DBI_HI
AGP8X_DET#

R2SET
C_R_Pr

Y_G_Y
COMP_B_Pb

H2SYNC
V2SYNC

DDC3CLK
DDC3DATA

SSIN
SSOUT
XTALIN
XTALOUT
TESTEN

TEST_YCLK(NC)
TEST_MCLK(NC)
PLLTEST(NC)

SUS_STAT#
STP_AGP#
AGP_BUSY#
RSTB_MSK(NC)

AGP

PWR

PCI / AGP

AGP2X4X

8X

DAC2SSCLK

MAN

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16

DVOMODE

ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9

DVO / EXT TMDS / GPIOLVDSTMDSDAC1

ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23

ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3

(NC)VREFG

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN

TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

TXCLK_UN

TXCLK_UP

DIGON

BLON
TX0M

TX0P

TX1M

TX1P

TX2M

TX2P
TXCM
TXCP

DDC2CLK

DDC2DATA

HPD1

HSYNC

VSYNC

RSET

DDC1DATA

DDC1CLK

AUXWIN

DPLUS

DMINUS

THERM

AGPFBSKEW0

AJ5

AGPFBSKEW1

AH5

GPU_GPIO2

AJ4

GPU_GPIO3

AK4

GPU_GPIO4

AH4

GPU_GPIO5

AF4

GPU_GPIO6

AJ3

GPU_GPIO7

AK3

GPU_GPIO8

AH3

GPU_GPIO9

AJ2
AH2

GPU_GPIO11

AH1

GPU_GPIO12

AG3

GPU_GPIO13

AG1
AG2

PWR_PLY

AF3

MCLK_SSIN

AF2
AE10
AH6

AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10

ZV_LCDDATA12

AE6

ZV_LCDDATA13

AG6

ZV_LCDDATA14

AF6

ZV_LCDDATA15

AE7

AGP_MULTIFUNC0

AF7

AGP_MULTIFUNC1

AE8
AG8
AF8

VIP_HAD0_DEVICE

AE9
AF9
AG10
AF10

ZV_VSYNC

AJ10

ZV_HREF

AK10

VIP_INT

AJ11

ZV_PCLK

AH11

GPIO_VREF

AG4

AK16
AH16
AH17
AJ16
AH18
AJ17
AK19
AH19
AK18
AJ18
AG16
AF16
AG17
AF17
AF18
AE18
AH20
AG20
AF19
AG19

AE12
AG12

AJ13
AH14
AJ14
AH15
AJ15
AK15
AH13
AK13

AE13
AE14

AF12
AK27

R

AJ27

G

AJ26

B

AG25
AH25

R313 499Ohm

AH26

1 2

AF25
AF24

AUXWIN

AF26

AF11
AE11

10KOhm /M11-P

R339

1 2

R335

1 2

10KOhm /M11-P

PWR_PLY <43>

R69

1 2

10KOhm

R344 10KOhm

1 2

R342 10KOhm

1 2

R77 10KOhm

1 2

PANEL_ID0 <16>
PANEL_ID1 <16>
PANEL_ID2 <16>

7 8

10KOhm

5 6

10KOhm

3 4

10KOhm

1 2

10KOhm

LVDS_L0N <16>
LVDS_L0P <16>
LVDS_L1N <16>
LVDS_L1P <16>
LVDS_L2N <16>
LVDS_L2P <16>

LVDS_CLK_LN <16>
LVDS_CLK_LP <16>
LVDS_U0N <16>
LVDS_U0P <16>
LVDS_U1N <16>
LVDS_U1P <16>
LVDS_U2N <16>
LVDS_U2P <16>

LVDS_CLK_UN <16>
LVDS_CLK_UP <16>

LVDS_VDD_EN <16>
LVDS_BLCTRL <16>

R66 100KOhm

1 2

CRT_R <17>
CRT_G <17>
CRT_B <17>

CRT_HS <17>
CRT_VS <17>

CRT_AVSSQ <13>
CRT_DDC_DATA <17>

CRT_DDC_CLK <17>

VGA_THEM_DP <5>
VGA_THEM_DN <3,5>

AGP_AD[31..0]<6>

AGP BUS signals is pulled-up by 855PM internal

D D

+V1.5S

R27

4.7KOhm

1 2

R28

4.7KOhm

1 2

GND

C C

+V3.3_VGA

B B

1 2

R39 22Ohm

/MCLK

R76
0Ohm

/MCLK

R31

47Ohm

C32

12

0.1uF/10V

PM_SUS_STAT#

XIN

R32 1MOhm

1 2

12

C38

20pF/50V

U3

1

XIN

2

VSS

3

SRS
ModOUT4REF

P1819B

/MCLK

V_AGPTEST

V_AGPREF

Place C32 close
to M11 pin

AGP_SBA[7..0]<6>

Place R314
close to VGA

PM_C3_STAT#

AUXWIN

X1

12

XOUT

27MHZ

12

GND

8

XOUT

7

VDD

6

PD#

5

AGP_C/BE#[3..0]<6>

+V3.3_VGA

C39
20pF/50V

MCLK_VDD

R75
0Ohm

/MCLK

GND GND

1 2

GND

R20 10KOhm

1 2

R21 10KOhm

1 2

R22 10KOhm

1 2

XIN XOUT
SRS

1 2

GND

SRS D_C Spread Deviation
0 NA -1.25% (DOWN)
1 NA -1.75% (DOWN)

+V1.5S

1 2

1 2

CLK_AGP66<22>
PCI_RST#<6,18,28,33>

AGP_REQ#<6>

AGP_GNT#<6>

AGP_PAR<6>
AGP_STOP#<6>

AGP_DEVSEL#<6>

AGP_TRDY#<6>
AGP_IRDY#<6>

AGP_FRAME#<6>

PCI_INTA#<19,26>
AGP_WBF#<6>

AGP_RBF#<6>
AGP_AD_STB0<6>
AGP_AD_STB1<6>
AGP_SB_STB<6>

AGP_SB_STB#<6>

AGP_AD_STB0#<6>
AGP_AD_STB1#<6>

1 2

R23 10KOhm

TV_A2VSSQ<13>

TV_COMP/Pb<17>

R82
R81

PM_SUS_STAT#<20>
PM_C3_STAT#<20,43>

AGP_BUSY#<20>

R83 56Ohm

/MCLK

AGP_ST0<6>
AGP_ST1<6>
AGP_ST2<6>

TV_C/Pr<17>
TV_Y/Y<17>

GND

GND

T192 TPC28t
T193 TPC28t

0Ohm

1 2

0Ohm

1 2

1 2

R343 1KOhm

1 2

R361 1KOhm

XTAL_INMCLK_SSIN

R74
33Ohm

/MCLK

1 2

R518

1 2

R519

1 2

R520

1 2

R395

1 2

R515

1 2

R522 0Ohm

1 2

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

R521 0Ohm

1 2

R516

1 2

R517

1 2

1
1

/M11-P
/M11-P

12

C84

0.01UF/10V

/MCLK

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

R_TRDY#

10Ohm

R_IRDY#

10Ohm

R_FRAME#

10Ohm

0Ohm
0Ohm

R_SB_STB#
R_AD_STB0#

0Ohm

R_AD_STB1#

0Ohm

V_AGPREF
V_AGPTEST

AGP_8X_DET#

R314 715 Ohm

1 2

SSIN
SSOUT
XTAL_IN
XTAL_OUT
TESTEN

TEST_YCLK
TEST_MCLK

RSTB_MSK

L20

120Ohm/100Mhz

/MCLK

12

C110

2.2UF/6.3V

/MCLK

A

5

D D

4

3

2

1

GPU_DQA[63..0]<15>

C C

B B

GPU_DQA0
GPU_DQA1
GPU_DQA2
GPU_DQA3
GPU_DQA4
GPU_DQA5
GPU_DQA6
GPU_DQA7
GPU_DQA8
GPU_DQA9
GPU_DQA10
GPU_DQA11
GPU_DQA12
GPU_DQA13
GPU_DQA14
GPU_DQA15
GPU_DQA16
GPU_DQA17
GPU_DQA18
GPU_DQA19
GPU_DQA20
GPU_DQA21
GPU_DQA22
GPU_DQA23
GPU_DQA24
GPU_DQA25
GPU_DQA26
GPU_DQA27
GPU_DQA28
GPU_DQA29
GPU_DQA30
GPU_DQA31
GPU_DQA32
GPU_DQA33
GPU_DQA34
GPU_DQA35
GPU_DQA36
GPU_DQA37
GPU_DQA38
GPU_DQA39
GPU_DQA40
GPU_DQA41
GPU_DQA42
GPU_DQA43
GPU_DQA44
GPU_DQA45
GPU_DQA46
GPU_DQA47
GPU_DQA48
GPU_DQA49
GPU_DQA50
GPU_DQA51
GPU_DQA52
GPU_DQA53
GPU_DQA54
GPU_DQA55
GPU_DQA56
GPU_DQA57
GPU_DQA58
GPU_DQA59
GPU_DQA60
GPU_DQA61
GPU_DQA62
GPU_DQA63

U40B /M11-P

L25

DQA0

L26

DQA1

K25

DQA2

K26

DQA3

J26

DQA4

H25

DQA5

H26

DQA6

G26

DQA7

G30

DQA8

D29

DQA9

D28

DQA10

E28

DQA11

E29

DQA12

G29

DQA13

G28

DQA14

F28

DQA15

G25

DQA16

F26

DQA17

E26

DQA18

F25

DQA19

E24

DQA20

F23

DQA21

E23

DQA22

D22

DQA23

B29

DQA24

C29

DQA25

C25

DQA26

C27

DQA27

B28

DQA28

B25

DQA29

C26

DQA30

B26

DQA31

F17

DQA32

E17

DQA33

D16

DQA34

F16

DQA35

E15

DQA36

F14

DQA37

E14

DQA38

F13

DQA39

C17

DQA40

B18

DQA41

B17

DQA42

B15

DQA43

C13

DQA44

B14

DQA45

C14

DQA46

C16

DQA47

A13

DQA48

A12

DQA49

C12

DQA50

B12

DQA51

C10

DQA52

C9

DQA53

B9

DQA54

B10

DQA55

E13

DQA56

E12

DQA57

E10

DQA58

F12

DQA59

F11

DQA60

E9

DQA61

F9

DQA62

F8

DQA63

E22

Part 2 of 7

MAA0

B22

MAA1

B23

MAA2

B24

MAA3

C23

MAA4

C22

MAA5

F22

MAA6

F21

MAA7

C21

MAA8

A24

MAA9

C24

MAA10

A25

MAA11

E21

(MAA13)MAA12

B20

(MAA12)MAA13

C19

(NC)MAA14

J25

DQMA#0

F29

DQMA#1

E25

DQMA#2

A27

DQMA#3

F15

DQMA#4

C15

DQMA#5

C11

DQMA#6

E11

DQMA#7

J27

QSA0

F30

QSA1

F24

QSA2

B27

QSA3

E16

QSA4

B16

QSA5

B11

QSA6

F10

QSA7

A19

RASA#

E18

CASA#

E19

WEA#

E20

CSA0#

F20

CSA1#

B19

CKEA

MEMORY INTERFACE A

CLKA0

CLKA0#

CLKA1

CLKA1#

MVREFD

(NC)MVREFS

DIMA_0
DIMA_1

B21
C20

C18
A18

B7
B8

D30
B13

GPU_MAA0
GPU_MAA1
GPU_MAA2
GPU_MAA3
GPU_MAA4
GPU_MAA5
GPU_MAA6
GPU_MAA7
GPU_MAA8
GPU_MAA9
GPU_MAA10
GPU_MAA11
GPU_MAA12
GPU_MAA13

GPU_DQMA#0
GPU_DQMA#1
GPU_DQMA#2
GPU_DQMA#3
GPU_DQMA#4
GPU_DQMA#5
GPU_DQMA#6
GPU_DQMA#7

GPU_QSA0
GPU_QSA1
GPU_QSA2
GPU_QSA3
GPU_QSA4
GPU_QSA5
GPU_QSA6
GPU_QSA7

MVREFD
MVREFS

R73 0Ohm

1 2

/M11-P

Place Capacitors
close to M11

GPU_MAA[13..0]<15>

GPU_DQMA#[7..0] <14>

GPU_QSA[7..0] <14>

GPU_RASA# <14>
GPU_CASA# <14>
GPU_WEA# <14>
GPU_CSA0# <14>
GPU_CSA1# <14> GPU_CSB1# <14>
GPU_CKEA <14>

GPU_CLKA0 <14>
GPU_CLKA0# <14>

GPU_CLKA1 <14>
GPU_CLKA1# <14>

12

GND GND

C109

GPU_DQB[63..0]<15>

+V2.5_VRAM

R323

4.7KOhm

1 2

12

R326

C457

4.7KOhm

0.1uF/10V

10uF

1 2

GND

GPU_DQB0
GPU_DQB1
GPU_DQB2
GPU_DQB3
GPU_DQB4
GPU_DQB5
GPU_DQB6
GPU_DQB7
GPU_DQB8
GPU_DQB9
GPU_DQB10
GPU_DQB11
GPU_DQB12
GPU_DQB13
GPU_DQB14
GPU_DQB15
GPU_DQB16
GPU_DQB17
GPU_DQB18
GPU_DQB19
GPU_DQB20
GPU_DQB21
GPU_DQB22
GPU_DQB23
GPU_DQB24
GPU_DQB25
GPU_DQB26
GPU_DQB27
GPU_DQB28
GPU_DQB29
GPU_DQB30
GPU_DQB31
GPU_DQB32
GPU_DQB33
GPU_DQB34
GPU_DQB35
GPU_DQB36
GPU_DQB37
GPU_DQB38
GPU_DQB39
GPU_DQB40
GPU_DQB41
GPU_DQB42
GPU_DQB43
GPU_DQB44
GPU_DQB45
GPU_DQB46
GPU_DQB47
GPU_DQB48
GPU_DQB49
GPU_DQB50
GPU_DQB51
GPU_DQB52
GPU_DQB53
GPU_DQB54
GPU_DQB55
GPU_DQB56
GPU_DQB57
GPU_DQB58
GPU_DQB59
GPU_DQB60
GPU_DQB61
GPU_DQB62
GPU_DQB63

U40C /M11-P

D7

DQB0

F7

DQB1

E7

DQB2

G6

DQB3

G5

DQB4

F5

DQB5

E5

DQB6

C4

DQB7

B5

DQB8

C5

DQB9

A4

DQB10

B4

DQB11

C2

DQB12

D3

DQB13

D1

DQB14

D2

DQB15

G4

DQB16

H6

DQB17

H5

DQB18

J6

DQB19

K5

DQB20

K4

DQB21

L6

DQB22

L5

DQB23

G2

DQB24

F3

DQB25

H2

DQB26

E2

DQB27

F2

DQB28

J3

DQB29

F1

DQB30

H3

DQB31

U6

DQB32

U5

DQB33

U3

DQB34

V6

DQB35

W5

DQB36

W4

DQB37

Y6

DQB38

Y5

DQB39

U2

DQB40

V2

DQB41

V1

DQB42

V3

DQB43

W3

DQB44

Y2

DQB45

Y3

DQB46

AA2

DQB47

AA6

DQB48

AA5

DQB49

AB6

DQB50

AB5

DQB51

AD6

DQB52

AD5

DQB53

AE5

DQB54

AE4

DQB55

AB2

DQB56

AB3

DQB57

AC2

DQB58

AC3

DQB59

AD3

DQB60

AE1

DQB61

AE2

DQB62

AE3

DQB63

N5

Part 3 of 7

MAB0

M1

MAB1

M3

MAB2

L3

MAB3

L2

MAB4

M2

MAB5

M5

MAB6

P6

MAB7

N3

MAB8

K2

MAB9

K3

MAB10

J2

MAB11

P5

(MAB13)MAB12

P3

(MAB12)MAB13

P2

(NC)MAB14

E6

DQMB#0

B2

DQMB#1

J5

DQMB#2

G3

DQMB#3

W6

DQMB#4

W2

DQMB#5

AC6

DQMB#6

AD2

DQMB#7

F6

QSB0

B3

QSB1

K6

QSB2

G1

QSB3

V5

QSB4

W1

QSB5

AC5

QSB6

AD1

QSB7

R2

RASB#

T5

CASB#

T6

WEB#

MEMORY INTERFACE B

CSB0#
CSB1#

CKEB

CLKB0

CLKB0#

CLKB1

CLKB1#

DIMB_0
DIMB_1

ROMCS#

MEMVMODE_0
MEMVMODE_1

MEMTEST

R5
R6
R3
N1

N2
T2

T3

E3
AA3

AF5
C6

C7
C8

GPU_MAB0
GPU_MAB1
GPU_MAB2
GPU_MAB3
GPU_MAB4
GPU_MAB5
GPU_MAB6
GPU_MAB7
GPU_MAB8
GPU_MAB9
GPU_MAB10
GPU_MAB11
GPU_MAB12
GPU_MAB13

GPU_DQMB#0
GPU_DQMB#1
GPU_DQMB#2
GPU_DQMB#3
GPU_DQMB#4
GPU_DQMB#5
GPU_DQMB#6
GPU_DQMB#7

GPU_QSB0
GPU_QSB1
GPU_QSB2
GPU_QSB3
GPU_QSB4
GPU_QSB5
GPU_QSB6
GPU_QSB7

MEMTEST

GPU_RASB# <14>
GPU_CASB# <14>
GPU_WEB# <14>
GPU_CSB0# <14>

GPU_CKEB <14>
GPU_CLKB0 <14>

GPU_CLKB0# <14>
GPU_CLKB1 <14>

GPU_CLKB1# <14>

R347 10KOhm

1 2
1 2

R340 10KOhm

1 2

R72 45.3Ohm

+V1.8S

GND

GPU_MAB[13..0] <15>

GPU_DQMB#[7..0] <14>

GPU_QSB[7..0] <14>

For 2.5V VDDR1
MEMVMODE_0 = VDDC~1.8V
MEMVMODE_1 = GND

A A

Title :

M11-Mem IF

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

Pommy Lu

of

12 57Thursday, August 19, 2004

Rev

1.2

5

place Decoupling Capacitors close to M11

+V2.5_VRAM

Memory I/O Power

D D

12

+

12

CE14

C98

10uF

22U/10V

+V2.5S

+V1.8S

+V1.8S

+V1.8S

C C

+V1.8S

+V2.5_VRAM

GND

+V2.5S

B B

+V1.8S

GND

+V1.8S

GND

+V1.8S

A A

GND

+V1.8S

GND

12

12

12

C86

10uF

C52

10uF

C54

10uF

L18

120Ohm/100Mhz

L14

120Ohm/100Mhz

L19

120Ohm/100Mhz

L57

120Ohm/100Mhz

L58

120Ohm/100Mhz

L16

220Ohm/100Mhz

L56

120Ohm/100Mhz

L11

120Ohm/100Mhz

L10

120Ohm/100Mhz

L54

120Ohm/100Mhz

L53

120Ohm/100Mhz

L13

120Ohm/100Mhz

L17

120Ohm/100Mhz

L8

120Ohm/100Mhz

L9

120Ohm/100Mhz

21

21

21

21

21

21

21

21

21

21

21

21

21

21

21

/M11-P

/M9+X

12

+

12

10uF

CE6
22U/10V

C113

12

0.1uF/10V

12

12

12

12

12

12

12

12

12

5

S0-S3: 530mA

VDDR

12

C481

C74

0.1uF/10V

12

C72

10uF

GND

12

C96

10uF

GND

12

C446

10uF

GND

12

C451

10uF

GND

12

C33

10uF

1UF/10V

GND

12

C434

10uF

GND

12

C53

0.1uF/10V

12

C432

10uF

S0-S3: 7mA

12

C63

10uF

12

C47

10uF

12

12

C111

C119

0.01UF/10V

0.1uF/10V

S0-S3: 100mA

LVDS_LVDDR_25

LVDS I/O Power

C82

0.1uF/10V

S0-S3: 30mA

LVDS_LVDDR_18

LVDS Digital Logic Power

C62

0.1uF/10V

S0-S3: 6mA

LVDS_LPVDD

LVDS/TMDS PLL Power

C447

0.1uF/10V

S0-S3: 30mA

TMDS_TXVDDR

TMDS I/O Power

C452

0.1uF/10V

S0-S3: 530mA

Memory Clock Power

MEMCLK_VDDRH

12

C130

C45

0.01UF/10V

S0-S3: 120mA

TV_A2VDD

C435

0.1uF/10V

S0-S3: 66mA

S0-S3: 66mA

TV_A2VDDQ

TV_A2VSSQ

S0-S3: 66mA

CRT_AVDD

C431

0.1uF/10V

CRT_AVSSQ

CRT_VDDDI

C64

0.1uF/10V

CRT_VSSDI

S0-S3: 21mA

PLL_PVDD

C46

0.1uF/10V

PLL_PVSS

TV_A2VSSQ <11>

CRT_AVSSQ <11>

DAC Digital Power

PLL Power

12

C121

0.01UF/10V

R84 0Ohm

1 2

12

C479

0.01UF/10V

GND

R65

LVDS_LVDDR_25
LVDS_LVDDR_18

LVDS_LPVDD

TMDS_TXVDDR

MEMCLK_VDDRH

TV_A2VDD

TV_A2VDDQ
CRT_AVDD

CRT_VDDDI

PLL_PVDD
MEMPLL_MPVDD

+V1.8S

GND

/M11-P

1 2

0Ohm

/M11-P

4

U40D /M11-P

T7
R4
R1
N8
N7
M4

L27

L8

J24
J23

J8

J7

J4

J1

H10
H13
H15
H17

T8

V4

V7

V8

AA1
AA4
AA7
AA8

A3

A9

A15
A21
A28

B1

B30
D26
D23
D20
D17
D14
D11

D8
D5

E27

F4
G7

G10
G13
G15
G19
G22
G27
H22
H19

AD4

T4
N4

D19
D13

AE17
AE20
AE15

AF21
AJ20

AK12

AF13
AF14

F18

N6

AG21
AH21

AF22

AH24

AE24
AE22

AK28

A7

L59

21

120Ohm/100Mhz

L60

21

120Ohm/100Mhz

4

VDDR1_1
VDDR1_2(CLKBFB)
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_44
VDDR1_45
VDDR1_46
VDDR1_47
VDDR1_48
VDDR1_49
VDDR1_50
VDDR1_51
VDDR1_52
VDDR1_53
VDDR1_54
VDDR1_55
VDDR1_56(CLKAFB)
VDDR1_57

LVDDR_25(LVDDR18_25)_1
LVDDR_25(LVDDR18_25)_2
LVDDR_18_1
LVDDR_18_2

LPVDD
TPVDD

TXVDDR_1
TXVDDR_2

VDDRH0
VDDRH1

A2VDD_1
A2VDD_2

A2VDDQ
AVDD

VDD1DI
VDD2DI

PVDD
MPVDD

+V2.5S

12

C43
1UF/10V

/EMI

GND

12

C129

10uF

Part 4 of 7

VDDC_63
VDDC_64
VDDC_65
VDDC_66
VDDC_67

(VDDC18)VDD15_1
(VDDC18)VDD15_2
(VDDC18)VDD15_3
(VDDC18)VDD15_4
(VDDC18)VDD15_5
(VDDC18)VDD15_6
(VDDC18)VDD15_7
(VDDC18)VDD15_8

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8

VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4
VDDR4_5

VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDP_6
VDDP_7
VDDP_8

VDDP_9
VDDP_10
VDDP_11
VDDP_12
VDDP_13
VDDP_14
VDDP_15
VDDP_16
VDDP_17
VDDP_18
VDDP_19
VDDP_20
VDDP_21

LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4

TXVSSR_1
TXVSSR_2
TXVSSR_3

VSSRH0

VSSRH1

A2VSSN_1
A2VSSN_2

A2VSSQ

I/O POWER

+V1.8S

12

C40
1UF/10V

/EMI

GND

S0-S3: 6mA

MEMPLL_MPVDD

12

C465

0.1uF/10V

MEMPLL_MPVSS

+V3.3_VGA

AC13
AD13
AD15
AC15
AC17

P8
Y8
AC11
AC20
Y23
L23
H20
H11

AD7
AD19
AD21
AD22
AC22
AC21
AC19
AC8

AG7
AD9
AC9
AC10
AD10

J30
AF27
AE30
AC27
AC23
AB30
AA24
AA23
Y27
W30
V23
V24
M23
M24
N30
P23
P27
T23
T24
T30
U27

AD24

AVSSQ

AF20
AE19
AE16
AF15

AJ19

LPVSS

AJ12

TPVSS

AH12
AG13
AG14

F19
M6

AH22
AJ21

AF23
AH23

AVSSN

AE23

VSS1DI

AE21

VSS2DI

AJ28

PVSS

A6

MPVSS

Memory PLL Power

12

C94

0.01UF/10V

GND

CRT_AVSSQ

TV_A2VSSQ

GND

CRT_VSSDI
PLL_PVSS
MEMPLL_MPVSS

12

12

GND

12

0.01UF/10V

GND

R386

1 2

R389

1 2

12

C122

0.01UF/10V

C117

0.1uF/10V

GND

C126

0.01UF/10V

C36

0OHM

0OHM

12

12

12

0.01UF/10V

3

/LEAK

/X_LEAK

12

C55

0.1uF/10V

C120

0.1uF/10V

C56

0.01UF/10V

1 2

0Ohm

C35

3

+V3.3S

+V3.3

12

12

R70

12

0.1uF/10V

12

C89

0.1uF/10V

C104

10uF

C25

0.1uF/10V

C37

12

12

C97

2.2UF/6.3V

2.2UF/6.3V

S0-S3: 160mA

12

+

CE2
22U/10V

S0-S3: 2mA

12

12

C80

10uF

0.1uF/10V

+V3.3_VGA

S0-S3: 2mA

S0-S3: 90mA

12

12

C51

0.1uF/10V

10uF

C277

C30

C123

AG15
AD12
AE27

AG11
AG18
AG22
AG27

G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12

K30
K27
K24
K23

AG5
AG9

AB4

+V3.3_VGA

12

12

10uF

A2
A10
A16
A22
A29

C1

C3
C28
C30
D27
D24
D21
D18
D15
D12

D9

D6

D4
F27

G9

H9

H8

H4

E4

S0-S3 MAX: 8.625A

+VGACORE

12

+

12

C67

10uF

22U/10V

GND

R15

/M11-P

1 2

0OHM

R16

/M9+X

1 2

0OHM

I/O Power

+

CE3
22U/10V

VDO Power

+V1.5S

12

+

CE4

C31

22U/10V

U40E /M11-P

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15

CORE GND

VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50

12

CE10

C81

10uF

+V1.5S

Power Between core and I/O

+V1.8S

AGP I/O Power

Part 5 of 7

VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

VSS_100

12

C100

2.2UF/6.3V

12

2

12

2.2UF/6.3V

C22
1UF/10V

/EMI

K8
K7
K1
L4
M30
M8
M7
N23
N24
N27
P4
R7
R8
R23
R24
R30
T27
T1
U4
U8
U23
V30
W7
W8
W23
W24
W27
Y4
AA30
AB27
AB24
AB23
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD30
AD25
AD18
AK2
AK29
AJ30
AJ1
D10
D25

2

C101

+VGACORE

GND

12

0.1uF/10V

12

C9
1UF/10V

/EMI

GNDGND

C124

12

0.1uF/10V

12

C14
1UF/10V

/EMI

1

U40F /M11-P

P17

VDDC_1

Part 6 of 7

P18

VDDC_2

C66

0.01UF/10V

12

C428
1UF/10V

/EMI

0.1uF/10V

GND

12

12

C60

C85

P19

VDDC_3

U12

VDDC_4

U13

VDDC_5

M10-P

U14

VDDC_6

U17

VDDC_7

(708 BGA)

U18

VDDC_8

U19

VDDC_9

V19

VDDC_10

V18

VDDC_11

M9+X

V17

VDDC_12

V14

VDDC_13

(708 BGA)

V13

VDDC_14

V12

VDDC_15

N18

VDDC_16

CENTER

N17

VDDC_17

N14

VDDC_18

ARRAY

W17

VDDC_19

W18

VDDC_20

W12

VDDC_21

W13

VDDC_22

W14

VDDC_23

N13

VDDC_24

N19

VDDC_25

M19

VDDC_26

M18

VDDC_27

M12

VDDC_28

N12

VDDC_29

M13

VDDC_30

M14

VDDC_31

P12

VDDC_32

P13

VDDC_33

P14

VDDC_34

M17

VDDC_35

W19

VDDC_36

L12

60 Ohm/100MHz

12

12

C49

C50

2.2UF/6.3V

2.2UF/6.3V

GND GND

MASK OFF CENTER BALL ARRAY WITH
M9+X (684BGA)

U40G /M11-P

Part 7 of 7

J10

VDDC_37

J12

VDDC_38

J14

VDDC_39
VDDC_40
VDDC_41
VDDC_42
VDDC_43
VDDC_44
VDDC_45
VDDC_46
VDDC_47
VDDC_48
VDDC_49
VDDC_50
VDDC_51
VDDC_52
VDDC_53
VDDC_54
VDDC_55
VDDC_56
VDDC_57
VDDC_58
VDDC_59
VDDC_60
VDDC_61
VDDC_62

A3G

M9+X
(708
BGA)
INNER
ROWS

VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138

J15
J16
J17
J19
J21

K9

K22

M9

M22

P9

P22

R9

R22

T9

T22

U9

U22

V9

V22

Y9
Y22
AB9

AB22

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124

VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4

21

12

0.1uF/10V

Title :

Engineer:

1

M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16

W16
M15
R19
T12

12

C87

J9
J11
J13
J18
J20
J22
L9
L22
N9
N22
W9
W22
AA9
AA22

M11-PWR/GND

GND

12

C88

10uF

0.01UF/10V

GND

Pommy Lu

of

13 57Thursday, August 19, 2004

C99

Rev

1.2

5

A

4

3

2

1

GPU_DQA[63..0]<12,15>

GPU_DQA2 VM_DQA8
GPU_DQA4 VM_DQA12

GPU_DQA7 VM_DQA14

D D

GPU_DQA13 VM_DQA24
GPU_DQA14 VM_DQA25

GPU_DQA17 VM_DQA16
GPU_DQA19 VM_DQA18

GPU_DQA29 VM_DQA6

GPU_DQA34 VM_DQA56
GPU_DQA36 VM_DQA60

GPU_DQA39 VM_DQA63

C C

GPU_DQMA#[7..0]<12> VM_DQMA#[7..0] <15> GPU_DQMB#[7..0]<12> VM_DQMB#[7..0] <15>

GPU_DQA47 VM_DQA42
GPU_DQA49 VM_DQA51

GPU_DQA52 VM_DQA52

GPU_DQA54 VM_DQA55

GPU_DQA60 VM_DQA37
GPU_DQA61 VM_DQA35

GPU_DQA63 VM_DQA39

GPU_DQMA#0

R316 10Ohm

1 2

R318 10Ohm

1 2

R338 10Ohm

GPU_DQMA#3
GPU_DQMA#4
GPU_DQMA#5
GPU_DQMA#6 VM_DQMA#6
GPU_DQMA#7

1 2

R331 10Ohm

1 2

R355 10Ohm

1 2

R349 10Ohm

1 2

R370 10Ohm

1 2

R364 10Ohm

1 2

VM_DQA9GPU_DQA0
VM_DQA10GPU_DQA1

VM_DQA11GPU_DQA3
VM_DQA13GPU_DQA5

VM_DQA15GPU_DQA6
VM_DQA26GPU_DQA8

VM_DQA29GPU_DQA9
VM_DQA28GPU_DQA10
VM_DQA30GPU_DQA11
VM_DQA31GPU_DQA12

VM_DQA27GPU_DQA15
VM_DQA23GPU_DQA16

VM_DQA17GPU_DQA18
VM_DQA20GPU_DQA20

VM_DQA21GPU_DQA21
VM_DQA22GPU_DQA22
VM_DQA19GPU_DQA23
VM_DQA1GPU_DQA24
VM_DQA0GPU_DQA25
VM_DQA7GPU_DQA26
VM_DQA2GPU_DQA27
VM_DQA3GPU_DQA28

VM_DQA4GPU_DQA30
VM_DQA5GPU_DQA31
VM_DQA58GPU_DQA32
VM_DQA57GPU_DQA33

VM_DQA59GPU_DQA35
VM_DQA61GPU_DQA37

VM_DQA62GPU_DQA38
VM_DQA40GPU_DQA40

VM_DQA41GPU_DQA41
VM_DQA43GPU_DQA42
VM_DQA44GPU_DQA43
VM_DQA46GPU_DQA44
VM_DQA47GPU_DQA45
VM_DQA45GPU_DQA46

VM_DQA49GPU_DQA48
VM_DQA53GPU_DQA50

VM_DQA50GPU_DQA51
VM_DQA54GPU_DQA53
VM_DQA48GPU_DQA55

VM_DQA32GPU_DQA56
VM_DQA33GPU_DQA57
VM_DQA36GPU_DQA58
VM_DQA34GPU_DQA59

VM_DQA38GPU_DQA62

VM_DQMA#1
VM_DQMA#3GPU_DQMA#1
VM_DQMA#2GPU_DQMA#2
VM_DQMA#0
VM_DQMA#7
VM_DQMA#5

VM_DQMA#4

VM_DQA[63..0] <12,15>

Place DQM, QS series termination
resistors CLOSE TO Memory

GPU_DQB[63..0]<12,15>

GPU_DQB0 VM_DQB0
GPU_DQB2 VM_DQB1

GPU_DQB3 VM_DQB7
GPU_DQB4 VM_DQB4
GPU_DQB5 VM_DQB5
GPU_DQB6 VM_DQB2
GPU_DQB7 VM_DQB3
GPU_DQB8 VM_DQB9
GPU_DQB9 VM_DQB8
GPU_DQB10 VM_DQB11
GPU_DQB11 VM_DQB10

GPU_DQB13 VM_DQB13
GPU_DQB14 VM_DQB14
GPU_DQB15 VM_DQB15
GPU_DQB16 VM_DQB18
GPU_DQB17 VM_DQB16
GPU_DQB18 VM_DQB19
GPU_DQB19 VM_DQB17

GPU_DQB21 VM_DQB21
GPU_DQB22 VM_DQB23

GPU_DQB24 VM_DQB26
GPU_DQB26 VM_DQB31

GPU_DQB29 VM_DQB29
GPU_DQB30 VM_DQB30

GPU_DQB32 VM_DQB57
GPU_DQB34 VM_DQB59

GPU_DQB35 VM_DQB56

GPU_DQB38 VM_DQB63
GPU_DQB40 VM_DQB40

GPU_DQB53 VM_DQB37

GPU_DQB58 VM_DQB51
GPU_DQB60 VM_DQB53

R360 10Ohm

GPU_DQMB#1
GPU_DQMB#2
GPU_DQMB#3
GPU_DQMB#4
GPU_DQMB#5 VM_DQMB#5

GPU_DQMB#7

1 2

R107 10Ohm

1 2

R106 10Ohm

1 2

R93 10Ohm

1 2

R357 10Ohm

1 2

R101 10Ohm

1 2

R363 10Ohm

1 2

R373 10Ohm

1 2

VM_DQB6GPU_DQB1

VM_DQB12GPU_DQB12

VM_DQB20GPU_DQB20

VM_DQB22GPU_DQB23
VM_DQB24GPU_DQB25
VM_DQB25GPU_DQB27

VM_DQB27GPU_DQB28

VM_DQB28GPU_DQB31
VM_DQB58GPU_DQB33

VM_DQB60GPU_DQB36
VM_DQB62GPU_DQB37

VM_DQB61GPU_DQB39
VM_DQB41GPU_DQB41

VM_DQB42GPU_DQB42
VM_DQB43GPU_DQB43
VM_DQB44GPU_DQB44
VM_DQB45GPU_DQB45
VM_DQB46GPU_DQB46
VM_DQB47GPU_DQB47
VM_DQB33GPU_DQB48
VM_DQB32GPU_DQB49
VM_DQB35GPU_DQB50
VM_DQB34GPU_DQB51
VM_DQB38GPU_DQB52

VM_DQB39GPU_DQB54
VM_DQB36GPU_DQB55
VM_DQB48GPU_DQB56
VM_DQB49GPU_DQB57

VM_DQB50GPU_DQB59
VM_DQB52GPU_DQB61

VM_DQB55GPU_DQB62
VM_DQB54GPU_DQB63

VM_DQMB#0GPU_DQMB#0
VM_DQMB#1
VM_DQMB#2
VM_DQMB#3
VM_DQMB#7

VM_DQMB#4GPU_DQMB#6
VM_DQMB#6

VM_DQB[63..0] <12,15>

B B

GPU_QSA[7..0]<12>

GPU_MAA[13..0]<12,15>

GPU_QSA0

R317 10Ohm

GPU_QSA1
GPU_QSA3

GPU_QSA4
GPU_QSA5
GPU_QSA6
GPU_QSA7

GPU_MAA2 VM_MAA2
GPU_MAA4 VM_MAA4

GPU_MAA5 VM_MAA5

1 2

R319 10Ohm

1 2

R337 10Ohm

1 2

R332 10Ohm

1 2

R354 10Ohm

1 2

R351 10Ohm

1 2

R369 10Ohm

1 2

R366 10Ohm

1 2

VM_QSA1
VM_QSA3
VM_QSA2GPU_QSA2
VM_QSA0
VM_QSA7
VM_QSA5
VM_QSA6
VM_QSA4

VM_MAA0GPU_MAA0
VM_MAA1GPU_MAA1

VM_MAA3GPU_MAA3

VM_MAA6GPU_MAA6
VM_MAA7GPU_MAA7
VM_MAA8GPU_MAA8
VM_MAA9GPU_MAA9
VM_MAA10GPU_MAA10
VM_MAA11GPU_MAA11
VM_MAA12GPU_MAA12
VM_MAA13GPU_MAA13

VM_QSA[7..0] <15>

VM_MAA[13..0] <12,15>

Place CLK series termination

GPU_QSB[7..0]<12>

GPU_MAB[13..0]<12,15>

GPU_QSB0

R359 10Ohm

GPU_QSB1

GPU_QSB4
GPU_QSB5
GPU_QSB6
GPU_QSB7

GPU_MAB1 VM_MAB1
GPU_MAB3 VM_MAB3
GPU_MAB5 VM_MAB5

GPU_MAB9 VM_MAB9
GPU_MAB10 VM_MAB10

GPU_MAB12 VM_MAB12

1 2

R103 10Ohm

1 2

R102 10Ohm

1 2

R94 10Ohm

1 2

R358 10Ohm

1 2

R105 10Ohm

1 2

R365 10Ohm

1 2

R371 10Ohm

1 2

VM_QSB0
VM_QSB1
VM_QSB2GPU_QSB2
VM_QSB3GPU_QSB3
VM_QSB7
VM_QSB5
VM_QSB4
VM_QSB6

VM_MAB0GPU_MAB0
VM_MAB2GPU_MAB2
VM_MAB4GPU_MAB4
VM_MAB6GPU_MAB6

VM_MAB7GPU_MAB7
VM_MAB8GPU_MAB8

VM_MAB11GPU_MAB11
VM_MAB13GPU_MAB13

VM_QSB[7..0] <15>

VM_MAB[13..0] <12,15>

resistors CLOSE TO GPU

R40 10Ohm

GPU_CLKA0<12>
GPU_CLKA0#<12>
GPU_CLKA1<12>
GPU_CLKA1#<12>
GPU_CKEA<12>
GPU_CSA1#<12> VM_CSA1# <15> GPU_CSB1#<12> VM_CSB1# <15>
GPU_CSA0#<12>
GPU_RASA#<12>
GPU_CASA#<12>
GPU_WEA#<12>

1 2

R41 10Ohm

1 2

R51 10Ohm

1 2

R47 10Ohm

1 2

R44 0Ohm

1 2

R185 0Ohm

1 2

RN9A

1 2

0Ohm

RN9B

3 4

0Ohm

RN9C

5 6

0Ohm

RN9D

7 8

0Ohm

VM_CLKA0 <15>
VM_CLKA0# <15>
VM_CLKA1 <15>
VM_CLKA1# <15>
VM_CKEA <15>

VM_CSA0# <15>
VM_RASA# <15>
VM_CASA# <15>
VM_WEA# <15>

GPU_CLKB0<12>
GPU_CLKB0#<12>
GPU_CLKB1<12>
GPU_CLKB1#<12>
GPU_CKEB<12>

GPU_CSB0#<12>
GPU_RASB#<12>
GPU_CASB#<12>
GPU_WEB#<12>

R89 10Ohm

1 2

R85 10Ohm

1 2

R87 10Ohm

1 2

R86 10Ohm

1 2

R88 0Ohm

1 2

R188 0Ohm

1 2

RN10A

1 2

0Ohm

RN10B

3 4

0Ohm

RN10C

5 6

0Ohm

RN10D

7 8

0Ohm

VM_CLKB0 <15>
VM_CLKB0# <15>
VM_CLKB1 <15>
VM_CLKB1# <15>
VM_CKEB <15>

VM_CSB0# <15>
VM_RASB# <15>
VM_CASB# <15>
VM_WEB# <15>

Title :

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

A3G

VRAM DAMPING

Pommy Lu

14 57Thursday, August 19, 2004

of

Rev

1.2

A

5

4

3

2

1

VM_CLKA0

R321

56.2Ohm

1 2

D D

R322

56.2Ohm

1 2

VM_CLKA0# VM_CLKA1#

VM_MAA[13..0]<12>

VM_CLKA0<14>

C C

B B

A A

VM_CLKA0#<14>

VM_CKEA<14>
VM_CSA0#<14>
VM_RASA#<14>
VM_CASA#<14>
VM_WEA#<14>

VM_QSA[3..0]<14>

VM_DQMA#[3..0]<14> VM_DQMA#[7..4]<14>

+V2.5_VRAM

R38

1KOhm

1 2

12

R37

1KOhm

1 2

GND GND

VM_CSA1#<14> VM_CSB1#<14>

placed C1505 close
to Video RAM

VM_MAA12
VM_MAA13

VM_MAA11
VM_MAA10
VM_MAA9
VM_MAA8
VM_MAA7
VM_MAA6
VM_MAA5
VM_MAA4
VM_MAA3
VM_MAA2
VM_MAA1
VM_MAA0

VM_QSA3
VM_QSA2
VM_QSA1
VM_QSA0

VM_DQMA#3
VM_DQMA#2
VM_DQMA#1
VM_DQMA#0

C48

0.1uF/10V

GND GND

12

C443

0.01UF/10V

GND GND GND GND

U4

N4

BA0

M5

BA1

M7

A11

L6

A10

M8

A9

N11

A8/AP

N10

A7

N9

A6

M9

A5

N8

A4

N7

A3

M6

A2

N6

A1

N5

A0

M11

CLK

M12

CLK#

N12

CKE

N2

CS#

M2

RAS#

L2

CAS#

L3

WE#

B13

DQS3

H2

DQS2

H13

DQS1

B2

DQS0

B12

DM3

H3

DM2

H12

DM1

B3

DM0

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

C4

NC1

C11

NC2

H4

NC3

H11

NC4

L12

NC5

L13

NC6

M3

NC7

M4

NC8

N3

NC9

F6

VSS TH1

F7

VSS TH2

F8

VSS TH3

F9

VSS TH4

G6

VSS TH5

G7

VSS TH6

G8

VSS TH7

G9

VSS TH8

H6

VSS TH9

H7

VSS TH10

H8

VSS TH11

H9

VSS TH12

J6

VSS TH13

J7

VSS TH14

J8

VSS TH15

J9

VSS TH16

HY5DU283222AF_33

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1

VSSQ2

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

B8
C9
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
K12

DQ9

K13

DQ8

E2

DQ7

D2

DQ6

D3

DQ5

C2

DQ4

B5

DQ3

B6

DQ2

C6

DQ1

B7

DQ0

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

VM_DQA[31..0]<12> VM_DQA[63..32]<12> VM_MAB[13..0] <12> VM_DQB[63..32]<12>VM_DQB[31..0]<12>

VM_DQA31
VM_DQA30
VM_DQA29
VM_DQA28
VM_DQA27
VM_DQA26
VM_DQA25
VM_DQA24
VM_DQA23
VM_DQA22
VM_DQA21
VM_DQA20
VM_DQA19
VM_DQA18
VM_DQA17
VM_DQA16
VM_DQA15
VM_DQA14
VM_DQA13
VM_DQA12
VM_DQA11
VM_DQA10
VM_DQA9
VM_DQA8
VM_DQA7
VM_DQA6
VM_DQA5
VM_DQA4
VM_DQA3
VM_DQA2
VM_DQA1
VM_DQA0

+V2.5_VRAM

+V2.5_VRAM

+V2.5_VRAM

placed C1506 close
to Video RAM

placed decoupling

GND

capacitors close
to Video RAM

VM_CLKA1

R350

56.2Ohm

1 2

U6

N4

BA0

M5

BA1

M7

A11

L6

A10

M8

A9

N11

A8/AP

N10

A7

N9

A6

M9

A5

N8

A4

N7

A3

M6

A2

N6

A1

N5

A0

M11

CLK

M12

CLK#

N12

CKE

N2

CS#

M2

RAS#

L2

CAS#

L3

WE#

B13

DQS3

H2

DQS2

H13

DQS1

B2

DQS0

B12

DM3

H3

DM2

H12

DM1

B3

DM0

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

C4

NC1

C11

NC2

H4

NC3

H11

NC4

L12

NC5

L13

NC6

M3

NC7

M4

NC8

N3

NC9

F6

VSS TH1

F7

VSS TH2

F8

VSS TH3

F9

VSS TH4

G6

VSS TH5

G7

VSS TH6

G8

VSS TH7

G9

VSS TH8

H6

VSS TH9

H7

VSS TH10

H8

VSS TH11

H9

VSS TH12

J6

VSS TH13

J7

VSS TH14

J8

VSS TH15

J9

VSS TH16

HY5DU283222AF_33

12

C480

0.01UF/10V

+V2.5_VRAM

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1

VSSQ2

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

VM_DQA63

B8

VM_DQA62

C9

VM_DQA61

B9

VM_DQA60

B10

VM_DQA59

C13

VM_DQA58

D12

VM_DQA57

D13

VM_DQA56

E13

VM_DQA55

K3

VM_DQA54

K2

VM_DQA53

J2

VM_DQA52

J3

VM_DQA51

G2

VM_DQA50

G3

VM_DQA49

F2

VM_DQA48

F3

VM_DQA47

F12

VM_DQA46

F13

VM_DQA45

G12

VM_DQA44

G13

VM_DQA43

J12

VM_DQA42

J13

VM_DQA41

K12

DQ9

VM_DQA40

K13

DQ8

VM_DQA39

E2

DQ7

VM_DQA38

D2

DQ6

VM_DQA37

D3

DQ5

VM_DQA36

C2

DQ4

VM_DQA35

B5

DQ3

VM_DQA34

B6

DQ2

VM_DQA33
VM_DQA32

+V2.5_VRAM

C6

DQ1

B7

DQ0

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

R348

56.2Ohm

1 2

VM_MAA[13..0]

VM_CLKA1<14>

VM_CLKA1#<14>

VM_QSA[7..4]<14>

R345

1KOhm

1 2

12

R346

1KOhm

1 2

GNDGND

VM_MAA12
VM_MAA13

VM_MAA11
VM_MAA10
VM_MAA9
VM_MAA8
VM_MAA7
VM_MAA6
VM_MAA5
VM_MAA4
VM_MAA3
VM_MAA2
VM_MAA1
VM_MAA0

VM_CKEA
VM_CSA0#
VM_RASA#
VM_CASA#
VM_WEA#

VM_QSA7
VM_QSA6
VM_QSA5
VM_QSA4

VM_DQMA#7
VM_DQMA#6
VM_DQMA#5
VM_DQMA#4

C478

0.1uF/10V

VM_CSA1# VM_CSB1#

GND

VM_CLKB0

VM_CLKB0#

VM_CLKB0<14>

VM_CLKB0#<14>

VM_CKEB<14>
VM_CSB0#<14>
VM_RASB#<14>
VM_CASB#<14>

VM_WEB#<14>

VM_QSB[3..0]<14>

VM_DQMB#[3..0]<14>

+V2.5_VRAM

R109

1KOhm

1 2

12

R115

C187

1KOhm

1 2

placed C1507 close
to Video RAM

0.1uF/10V

GNDGND

1 2

1 2

R134

56.2Ohm

R135

56.2Ohm

VM_MAB12
VM_MAB13

VM_MAB11
VM_MAB10
VM_MAB9
VM_MAB8
VM_MAB7
VM_MAB6
VM_MAB5
VM_MAB4
VM_MAB3
VM_MAB2
VM_MAB1
VM_MAB0

VM_QSB3
VM_QSB2
VM_QSB1
VM_QSB0

VM_DQMB#3
VM_DQMB#2
VM_DQMB#1
VM_DQMB#0

GND

12

N4

BA0

M5

BA1

M7

A11

L6

A10

M8

A9

N11

A8/AP

N10

A7

N9

A6

M9

A5

N8

A4

N7

A3

M6

A2

N6

A1

N5

A0

M11

CLK

M12

CLK#

N12

CKE

N2

CS#

M2

RAS#

L2

CAS#

L3

WE#

B13

DQS3

H2

DQS2

H13

DQS1

B2

DQS0

B12

DM3

H3

DM2

H12

DM1

B3

DM0

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

C4

NC1

C11

NC2

H4

NC3

H11

NC4

L12

NC5

L13

NC6

M3

NC7

M4

NC8

N3

NC9

F6

VSS TH1

F7

VSS TH2

F8

VSS TH3

F9

VSS TH4

G6

VSS TH5

G7

VSS TH6

G8

VSS TH7

G9

VSS TH8

H6

VSS TH9

H7

VSS TH10

H8

VSS TH11

H9

VSS TH12

J6

VSS TH13

J7

VSS TH14

J8

VSS TH15

J9

VSS TH16

C208

0.01UF/10V

U8

VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

HY5DU283222AF_33

+V2.5_VRAM

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

VM_CLKB1

R139

56.2Ohm

1 2

VM_QSB7
VM_QSB6
VM_QSB5
VM_QSB4

12

U7

N4

BA0

M5

BA1

M7

A11

L6

A10

M8

A9

N11

A8/AP

N10

A7

N9

A6

M9

A5

N8

A4

N7

A3

M6

A2

N6

A1

N5

A0

M11

CLK

M12

CLK#

N12

CKE

N2

CS#

M2

RAS#

L2

CAS#

L3

WE#

B13

DQS3

H2

DQS2

H13

DQS1

B2

DQS0

B12

DM3

H3

DM2

H12

DM1

B3

DM0

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

C4

NC1

C11

NC2

H4

NC3

H11

NC4

L12

NC5

L13

NC6

M3

NC7

M4

NC8

N3

NC9

F6

VSS TH1

F7

VSS TH2

F8

VSS TH3

F9

VSS TH4

G6

VSS TH5

G7

VSS TH6

G8

VSS TH7

G9

VSS TH8

H6

VSS TH9

H7

VSS TH10

H8

VSS TH11

H9

VSS TH12

J6

VSS TH13

J7

VSS TH14

J8

VSS TH15

J9

VSS TH16

HY5DU283222AF_33

C209

0.01UF/10V

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1

VSSQ2

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

VM_DQB63

B8

VM_DQB62

C9

VM_DQB61

B9

VM_DQB60

B10

VM_DQB59

C13

VM_DQB58

D12

VM_DQB57

D13

VM_DQB56

E13

VM_DQB55

K3

VM_DQB54

K2

VM_DQB53

J2

VM_DQB52

J3

VM_DQB51

G2

VM_DQB50

G3

VM_DQB49

F2

VM_DQB48

F3

VM_DQB47

F12

VM_DQB46

F13

VM_DQB45

G12

VM_DQB44

G13

VM_DQB43

J12

VM_DQB42

J13

VM_DQB41

K12

DQ9

VM_DQB40

K13

DQ8

VM_DQB39

E2

DQ7

VM_DQB38

D2

DQ6

VM_DQB37

D3

DQ5

VM_DQB36

C2

DQ4

VM_DQB35

B5

DQ3

VM_DQB34

B6

DQ2

VM_DQB33
VM_DQB32

+V2.5_VRAM

GND

C6

DQ1

B7

DQ0

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

R140

56.2Ohm

1 2

VM_CLKB1#

VM_DQB31

B8

VM_DQB30

C9

VM_DQB29

B9

VM_DQB28

B10

VM_DQB27

C13

VM_DQB26

D12

VM_DQB25

D13

VM_DQB24

E13

VM_DQB23

K3

VM_DQB22

K2

VM_DQB21

J2

VM_DQB20

J3

VM_DQB19

G2

VM_DQB18

G3

VM_DQB17

F2

VM_DQB16

F3

VM_DQB15

F12

VM_DQB14

F13

VM_DQB13

G12

VM_DQB12

G13

VM_DQB11

J12

VM_DQB10

J13

VM_DQB9

K12

DQ9

VM_DQB8

K13

DQ8

VM_DQB7

E2

DQ7

VM_DQB6

D2

DQ6

VM_DQB5

D3

DQ5

VM_DQB4

C2

DQ4

VM_DQB3

B5

DQ3

VM_DQB2

B6

DQ2

VM_DQB1
VM_DQB0

+V2.5_VRAM

GND

C6

DQ1

B7

DQ0

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

VM_MAB[13..0]

VM_CLKB1<14>

VM_CLKB1#<14>

VM_QSB[7..4]<14>

VM_DQMB#[7..4]<14>

+V2.5_VRAM

R138

1KOhm

1 2

R137

1KOhm

1 2

GNDGND

placed C1508 close
to Video RAM

12

C203

0.1uF/10V

VM_MAB12
VM_MAB13

VM_MAB11
VM_MAB10
VM_MAB9
VM_MAB8
VM_MAB7
VM_MAB6
VM_MAB5
VM_MAB4
VM_MAB3
VM_MAB2
VM_MAB1
VM_MAB0

VM_CKEB
VM_CSB0#
VM_RASB#
VM_CASB#
VM_WEB#

VM_DQMB#7
VM_DQMB#6
VM_DQMB#5
VM_DQMB#4

GND

12

12

C152

10uF

12

C159

C494

10uF

0.1uF/10V

GND GND

12

C498

0.1uF/10V

5

12

C506

0.1uF/10V

12

C493

0.1uF/10V

12

C500

0.1uF/10V

12

0.1uF/10V

GND

C484

12

C505

0.1uF/10V

12

C492

0.1uF/10V

12

0.1uF/10V

C495

12

C504

0.1uF/10V

12

12

12

C176

C181

10uF

10uF

4

12

C204
1UF/10V

/EMI

12

C205
1UF/10V

/EMI

GND

12

C490

C488

10uF

10uF

GND GND GND

12

12

C455

C453

0.1uF/10V

0.1uF/10V

3

12

C454

0.1uF/10V

12

C444

0.1uF/10V

12

C450

0.1uF/10V

12

C485

0.1uF/10V

12

C486

0.1uF/10V

12

12

C499

0.1uF/10V

12

C487

0.1uF/10V

2

C496

0.1uF/10V

12

12

C182

C489

10uF

10uF

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

A3G

Title :

Engineer:

1

M11-Video RAM

Pommy Lu

of

15 57Thursday, August 19, 2004

Rev

1.2

5

4

3

2

1

+V12S+V3.3S

R5

D D

R504 0Ohm

1 2

/M9+X

R505 0Ohm

1 2

GND

C390

0.001uF/50V

1 2

R1
100KOhm

/M9+X

1
2

/M11-P

BAT54A

1SS355

12

D1

3

D2

12

LVDS_VDD_EN<11>

M11-P: Internal PD, not stuff R1
M9+X: stuff R1

C C

BACK_OFF#<20>

LID_SW#<41> USB_WLAN_ON# <20>

Backlignt: Level Control

B B

INVERT_DA<30>

LVDS_BLCTRL<11>

INTMIC_A<36>

1MOhm

/M11-P

1 2

34

Q3B

UM6K1N

5

GND GND GND

AC_BAT_SYS+V3.3S +V3.3A

R2
10KOhm

1 2

L1 120Ohm/100Mhz
L36 120Ohm/100Mhz
L37 120Ohm/100Mhz

L35 120Ohm/100Mhz
L34 120Ohm/100Mhz

L39 80Ohm/100Mhz

21
21
21

21
21

R3

100KOhm

1 2

61

Q3A

UM6K1N

2

Hall Sensor Power

21

L38
120Ohm/100Mhz

12

12

C387

C388

100PF

100PF

GNDGND GND GND

D3

12

1SS355

+V3.3S

Q6

1

D

2
3

G

SI3456DV

12

C1

0.1UF/25V

12

12

C386

C385

0.1UF/25V

C389

0.1uF/10V

0.1UF/25V

21

2
4
6

8
10
12
14
16
18
20
22

12

GNDGND_AUDIO

placed BEAD close to CON1603

R8

1 2

100Ohm

6
5

S

4

12

C4

0.1uF/10V

placed BEAD close to CON1

CON2

WTOB_CON_20P

2
4
6
8
10
12
14
16
18
20
SIDE2

SIDE1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

L4

21

80Ohm/100Mhz

12

12

C8

0.001uF/50V

12

C401

0.1U

/X

+V3.3S_LCD

12

C384

0.1uF/10V

+V5_USB01 +V5

C12

0.1U

1 2

12

12

C405

C399

0.1U

0.1U

/X

/X

12

C7

C5

1UF/10V

L6 80Ohm/100Mhz

10uF

21

12

C400

0.1U

/X

USB PORT 1 for CAMERA
USB PORT 0 for WLAN

USB_P0- <38>
USB_P0+ <38>

USB_P1- <38>
USB_P1+ <38>

GND

12

+

CE1
100UF/16V

31

CON1

LVDS_CLK_LP<11>
LVDS_CLK_LN<11>

LVDS_L2P<11>
LVDS_L2N<11>

LVDS_L1P<11>
LVDS_L1N<11>

LVDS_L0P<11>
LVDS_L0N<11>

PANEL_ID0<11>
PANEL_ID2<11>

+V3.3S_LCD +V3.3S_LCD

A A

PANEL_ID2

12

C6

0.1uF/10V

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

WTOB_2X15P

GND GND GNDGND

2

2

4

SIDE1

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

SIDE2

32

12

PANEL_ID1PANEL_ID0

C3

0.1uF/10V

LVDS_CLK_UP <11>
LVDS_CLK_UN <11>

LVDS_U2P <11>
LVDS_U2N <11>

LVDS_U1P <11>
LVDS_U1N <11>

LVDS_U0P <11>
LVDS_U0N <11>

PANEL_ID1 <11>

PANEL_ID0
PANEL_ID1
PANEL_ID2

1 2

10KOhm

3 4

10KOhm

5 6

10KOhm

7 8

10KOhm

RN47A
RN47B
RN47C
RN47D

+V3.3_VGA

LCD CON

Title :

BL&LCD CON

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

Pommy Lu

of

16 57Thursday, August 19, 2004

Rev

1.2

5

A

4

3

2

1

CRT CON

D D

L75 1.8nH

C729

82PF/50V

L76 1.8nH

C731

82PF/50V

L77 1.8nH

C733

82PF/50V

21

12

C730

82PF/50V

GND

21

12

C732

82PF/50V

GND

21

12

C734

82PF/50V

GND

TV_Y/Y<11>

12

RN75B
75Ohm

3 4

GND

C C

TV_C/Pr<11>

TV_COMP/Pb<11>

B B

GND

12

RN75D
75Ohm

7 8

GND

GND

12

RN75C
75Ohm

5 6

GND

GND

R512

1 2

0OHM

R513

1 2

0OHM

R514

1 2

0OHM

For EMI Bead
Near the
Connector

TV_Y

TV_Pr

TV_Pb

TV_Pb

TV_Y
TV_Pr

2
7

4
6

5
1

3

12-141011072

BUF_PCI_RST#<18,23,24,25,30,31>

TV-OUT

CON17
6PX2

9

CVBS1

HC2

CVBS2
Y

C

NC
GND0

GND1

HC1

8

GND

5

+V3.3SUS

12

34

RN5A
100KOHM

Q10B
UM6K1N

+V12S

34

RN5B
100KOHM

61

Q10A
UM6K1N

2

GND

+V1.5S

+V1.5S

+V1.5S

D36

2

3

1

GND

BAV99

D37

2
1

GND

BAV99

D38

2
1

GND

BAV99

CRT_R<11>

RN4D
75Ohm

7 8

3

CRT_G<11>

3

CRT_B<11>

+V5S

+V5S

12

3 4

RN3A

2.2KOhm

2.2KOhm
RN76B

Q8A UM6K1N

Q8B UM6K1N

Q9A UM6K1N

Q9B UM6K1N

CRT_HS<11>

CRT_VS<11>

CRT_DDC_DATA<11>

CRT_DDC_CLK<11>

GND

RN4B

75Ohm

3 4

GND

RN4C

75Ohm

5 6

GND

61

2

5

34

61

2

5

34

placed BEAD close to CON1701Place RN & C close to M11

L40 75Ohm/100MHz

21

12

C402

3.3PF/50V

L41 75Ohm/100MHz

21

12

C403

3.3PF/50V

L42 75Ohm/100MHz

21

12

C404

3.3PF/50V

R297 39Ohm

1 2

R298 39Ohm

1 2

L43 75Ohm/100MHz

21

L44 75Ohm/100MHz

21

GND

GND

GND

GND

GND

GND

GND

12

C392

3.3PF/50V

12

C393

3.3PF/50V

12

C394

3.3PF/50V

12

C396
5PF

12

C397
5PF

12

C395
5PF

12

C398
5PF

1

RED

2

GREEN

3

BLUE

13

HSYNC

14

VSYNC

12

DATA

15

DCLK

7846S_15G2T

CON8

CRT

SIDE_G16
SIDE_G17

GND4

GND510GND1

7

8

GND

GND3

9

VCC

4

NC1

11

NC2

15

PIN

1

16
17

GND2

6

5

GND

Title :

TV-OUT & CRT CON

ASUSTECH CO.,LTD.

Size Project Name

C

Date: Sheet

Engineer:

A3G

Pommy Lu

17 57Thursday, August 19, 2004

A

Rev

1.2

of

5

D D

Strap
Option

Default: Pull-Down
Pull-High for Hub

C C

Interface 1.5
Buffer Mode

HUB_RCOMP_ICH4

2/3 board impedance

12

R207

36.5Ohm

R-ICH4 <= 0.5"

GND

+V1.8S_ICHHUB

ICH4(R1806)<=3"0.9V +/- 2%

HUB_VREF_ICH4<21>

Place R&C close to U20.M23 and U20.R22. If it is difficult to match

B B

A A

3", should generated two local reference voltage circuit

+V3.3S

12

R200

PCI_RST#

GND

HUB_VSWING_ICH4

12

12

C269

0.01uF/25V

10KOhm

U18

A

1

5

VCC

B

2
3 4

GND

Y

NC7SZ08P5X

Meet LPC reset >= 60 us
(Add Buffer)

C604

0.01uF/25V

+V3.3

BUF_PCI_RST# <17,23,24,25,30,31>

12

C253

0.1uF/10V

GND

12

12

R210
150Ohm

R406
150Ohm

4

Use Daisy-Chain
Topology

HUB_PD[10:0]<6>

HUB_PSTRB#<6>
HUB_PSTRB<6>

GND

LPC_AD0<24,30,31,33>
LPC_AD1<24,30,31,33>
LPC_AD2<24,30,31,33>
LPC_AD3<24,30,31,33>

LPC_FRAME#<24,30,31,33>

+V3.3S

CLK_ICH33<22>

LPC_DRQ#0<31>

R216 10KOhm

R219 10KOhm

PCI_DEVSEL#<23,24,25>
PCI_FRAME#<23,24,25>

PCI_IRDY#<23,24,25>
PCI_TRDY#<23,24,25>
PCI_STOP#<23,24,25>

PCI_PAR<23,24,25>

PCI_PERR#<23,24,25>

PCI_SERR#<23,24,25>

PME_SB#<23>

PCI_RST#<6,11,28,33>

12

C598
5PF

/X

GND

PM_CLKRUN#<24,25,30>

12
12

design
guideline
recommended

HUB_PD0
HUB_PD2

HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

1 2

HUB_RCOMP_ICH4
HUB_VSWING_ICH4

PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#

PCI_PERR#

PCI_SERR#

PCI_LOCK#
PCI_RST#

4"-8.5"

+V3.3S

12

R21456Ohm

R201

10KOhm

3

LxWxH=31x31x2.38

U20A

<=6"

L19

HI0

<=6"

L20

HI1

<=6"

M19

HI2

<=6"

M21

HI3

<=6"

P19

HI4

<=6"

R19

HI5

<=6"

T20

HI6

<=6"

R20

HI7

<=6"

P23

HI8

<=6"

L22

HI9

<=6"

N22

HI10

K21

HI11

N20

HI_STB#/HI_STBF

P21

HI_STB/HI_STBS

R23

HICOMP

R22

HI_VSWING

D10

EE_CS

D11

EE_DIN

A8

EE_DOUT

C12

EE_SHCLK

T2

LAD0/FWH0

R4

LAD1/FWH1

T4

LAD2/FWH2

U2

LAD3/FWH3

T5

LFRAME#/FWH4

U4

LDRQ1#

U3

LDRQ0#

M3

DEVSEL#

F1

FRAME#

L5

IRDY#

F2

TRDY#

F3

STOP#

G1

PAR

L4

PERR#

K5

SERR#

W2

PME#

M2

PLOCK#

U5

PCIRST#

P5

PCICLK

AC2

CLKRUN#/GPIO24

FW82801DBM

C/BE0#
C/BE1#
C/BE2#
C/BE3#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

REQB#/REQ5#/GPIO1

REQA#/GPIO0

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#

GNTB#/GNT5#GPIO17

GNTA#/GPIO16

AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

2

+V3.3S_ICH

PCI_FRAME#

PCI_IRDY#

PCI_TRDY#

PCI_STOP#

PCI_SERR#

PCI_DEVSEL#

PCI_PERR#

PCI_LOCK#

PCI_REQ#0

PCI_REQ#1

PCI_REQ#2

PCI_REQ#3

PCI_REQ#4

+V3.3S

design guideline recommend 8.2kohm

PCI_REQ#

CB&1394

MINIPCI

LAN

IDSEL

CB&1394

MINIPCI

LAN

PCI_REQ#?

PCI_REQ#0

PCI_REQ#1

PCI_REQ#2

PCI_AD?

PCI_AD21

PCI_AD20

PCI_AD16

PCI_C/BE#0 <23,24,25>
PCI_C/BE#1 <23,24,25>
PCI_C/BE#2 <23,24,25>
PCI_C/BE#3 <23,24,25>

PCI_REQ#0 <25>
PCI_REQ#1 <24>
PCI_REQ#2 <23>

R222 10KOhm
R223 10KOhm

PCI_GNT#0 <25>
PCI_GNT#1 <24>
PCI_GNT#2 <23>

T30 TPC28t

1

PCI_AD[31:0] <23,24,25,26>

INT_IRQ14<19,28>

INT_IRQ15<19,29>

INT_SERIRQ<19,24,25,30,31>

1 2
1 2

PCI_AD0

H5

AD0

PCI_AD1HUB_PD1

J3

AD1

PCI_AD2

H3

AD2

PCI_AD3

K1

AD3

PCI_AD4

G5

AD4

PCI_AD5

J4

AD5

PCI_AD6

H4

AD6

PCI_AD7

J5

AD7

PCI_AD8

K2

AD8

PCI_AD9

G2

AD9

PCI_AD10

L1

PCI_AD11

G4

PCI_AD12

L2

PCI_AD13

H2

PCI_AD14

L3

PCI_AD15

F5

PCI_AD16

F4

PCI_AD17

N1

PCI_AD18

E5

PCI_AD19

N2

PCI_AD20

E3

PCI_AD21

N3

PCI_AD22

E4

PCI_AD23

M5

PCI_AD24

E2

PCI_AD25

P1

PCI_AD26

E1

PCI_AD27

P2

PCI_AD28

D3

PCI_AD29

R1

PCI_AD30

D2

PCI_AD31

P4
J2

K4
M4
N4

PCI_REQ#0

B1

PCI_REQ#1

A2

PCI_REQ#2

B3

PCI_REQ#3

C7

PCI_REQ#4

B6
A6
B5

C1
E6
A7
B7
D6
C5

ICH_GPIO16

E8

ICH4 pin E8

Strap Option

Default:Pull-High 20K

Pull-Down for BIOS
TOP-BLOCK SWAP

1 5

8.2KOhm

2 5

8.2KOhm

3 5

8.2KOhm

4 5

8.2KOhm

6 5

8.2KOhm

7 5

8.2KOhm

8 5

8.2KOhm

9 5

8.2KOhm

1 5

8.2KOhm

2 5

8.2KOhm

3 5

8.2KOhm

4 5

8.2KOhm

6 5

8.2KOhm

7 5

8.2KOhm

8 5

8.2KOhm

9 5

8.2KOhm

RP4A

10

RP4B

10

RP4C

10

RP4D

10

RP4E

10

RP4F

10

RP4G

10

RP4H

10

+V3.3S

RP2A

10

RP2B

10

RP2C

10

RP2D

10

RP2E

10

RP2F

10

RP2G

10

RP2H

10

1

Title :

ICH4-M(HUB_PCI)

ASUSTECH CO.,LTD.

Size Project Name

C

5

4

3

2

Date: Sheet

Engineer:

A3G

1

charlie_xie

of

18 57Thursday, August 19, 2004

Rev

1.2