THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
NOTE: ACCEL, GYRO, COMPASS ALL USING SPI (VIA OSCAR) FOR AP COMMUNICATION.
0101001X 0X29 0X52
1010001X 0X51 0XA2
1100011X 0X63 0XC6
0010000X 0X10 0X20
0001100X 0X0C 0X18
0010000X 0X10 0X20
63
SYNC_MASTER=N56_MLB
PAGE TITLE
SOC:MAIN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=08/29/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
2 OF 55
SHEET
2 OF 54
124578
SIZE
A
D
876543
12
FIJI: DIGITAL I/O,BOOTSTRAPPING
PP1V8
2 3 5 6 7
10 11 12 13 15 20 23
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
1
1
1
R0302
R0303
R0304
2.2K
2.2K
5%
1/32W
01005
PMU_TO_AP_PRE_UVLO_L_R
AP_TO_PMU_SOCHOT1_L_R
5%
1/32W
MF
MF
01005
2
AP_TO_EEPROM_I2C_SCL
AP_BI_EEPROM_I2C_SDA
NO CONNECTED ON MLB
USED FOR PCIE NAND
DWI_CLK
DWI_DO
SOCHOT0
SOCHOT1
2.2K
5%
1/32W
MF
01005
2
AM32
AM31
Y31
Y30
AH1
AH2
AN1
NC
AN2
NC
AL29
45_AP_TO_PMU_AND_BL_DWI_CLK
AL30
45_AP_TO_PMU_AND_BL_DWI_DO
AR31
AP31
AN30
NC
AN31
NC
AN33
NC
AN32
NC
AM30
NC
C32
OSCAR_TO_AP_ISP_UART_RXD
C33
AP_ISP_TO_OSCAR_UART_TXD
AJ31
AJ32
AL5
NC
AB1
45_AP_TO_TOUCH_CLK32K_RESET_L
AH30
NC
AB4
NC
D
ROOM=SOC
R0301
33.2
45_AP_TO_CODEC_I2S0_MCLK
PP1V8_SDRAM
3 4
10 12 13 14
15 17 26 29
PP1V8_ALWAYS
5
12 14 26
ROOM=SOC
1
ROOM=SOC
R0314
220K
5%
1/32W
MF
01005
R0313
392K
2
1/32W
01005
BOARD_ID3
BOOT_CONFIG0
C
BOOT_CONFIG1
AP_TO_HEADSET_HS3_CTRL
18
AP_TO_HEADSET_HS4_CTRL
18
BUTTON_TO_AP_VOL_UP_L
8
13
BUTTON_TO_AP_VOL_DOWN_L
8
13
SPKAMP_TO_AP_INT_L
16
AP_TO_SPKAMP_BEE_GEES
16
AP_TO_SPKAMP_RESET_L
16
1
AP_TO_BT_WAKE
29
AP_TO_BB_RST_L
29
1%
AP_TO_WLAN_JTAG_SWCLK
29
MF
2
AP_TO_WLAN_JTAG_SWDIO
29
13 21
BUTTON_TO_AP_MENU_KEY_L
8
13
BUTTON_TO_AP_HOLD_KEY_L
PMU_TO_AP_IRQ_L
13
BB_TO_AP_IPC_GPIO1
29
AP_TO_BB_WAKE_MODEM
29
AP_TO_STOCKHOLM_SIM_SEL
29
AP_TO_PMU_KEEPACT
13
BB_TO_AP_DEVICE_RDY
29
BB_TO_AP_GPS_SYNC
29
AP_TO_BB_HOST_RDY
29
BB_TO_AP_RESET_DET_L
29
BOOT_CONFIG1
27
FORCE_DFU
25
DFU STATUS
BOOT_CONFIG2
BOARD_ID4
BOARD_REV3
BOARD_REV2
BOARD_REV1
BOARD_REV0
CODEC_TO_AP_INT_L
10
AP_TO_RADIO_ON_L
29
BOARD_REV3
27
BOARD_REV2
27
BOARD_REV0
27
AP_TO_BB_COREDUMP
29
BUTTON_TO_AP_RINGER_A
8
13
BB_TO_AP_IPC_GPIO
29
AP_TO_VIBE_EN
14
AC1
GPIO0
AC2
GPIO1
AC3
GPIO2
AC4
GPIO3
AD1
GPIO4
AD2
GPIO5
AD3
GPIO6
AD4
GPIO7
AG30
GPIO8
AG31
GPIO9
AG32
GPIO10
Y3
GPIO11
Y4
GPIO12
AK31
GPIO13
AE1
GPIO14
AF30
GPIO15
AE2
GPIO16
NC
AE3
GPIO17
AE4
GPIO18
NC
AK32
GPIO19
AF3
GPIO20
NC
AF4
GPIO21
AH4
GPIO22
AJ1
GPIO23
AD29
GPIO24
AJ2
GPIO25
AK33
GPIO26
AJ30
GPIO27
NC
AJ3
GPIO28
NC
AJ4
GPIO29
NC
AD30
GPIO30
AC30
GPIO31
AC31
GPIO32
NC
AB29
GPIO33
NC
AK1
GPIO34
AK2
GPIO35
AK3
GPIO36
NC
AK4
GPIO37
AM29
GPIO38
AB30
GPIO40
AB31
GPIO41
AL3
GPIO42
U0201
POP-FIJI-1GB-DDR-B0
GRP2
BGA
SYM 2 OF 13
TMR32_PWM0
TMR32_PWM1
TMR32_PWM2
GRP2
UART0_RXD
UART0_TXD
UART1_CTSN
UART1_RTSN
UART1_RXD
UART1_TXD
UART2_CTSN
UART2_RTSN
GRP3
UART2_RXD
UART2_TXD
UART3_CTSN
UART3_RTSN
UART3_RXD
UART3_TXD
UART4_CTSN
UART4_RTSN
GRP3
UART4_RXD
UART4_TXD
UART5_RTXD
GRP2GRP4GRP4GRP4
UART6_RXD
UART6_TXD
UART7_RXD
UART7_TXD
UART8_RXD
GRP2
UART8_TXD
AM3
OSCAR_BI_AP_TIME_SYNC_HOST_INT
AM4
AN3
NC
AL2
TRISTAR_TO_AP_DEBUG_UART0_RXD
AL1
AP_TO_TRISTAR_DEBUG_UART0_TXD
H30
H31
H32
H33
AL31
AM33
AL32
AL33
F30
STOCKHOLM_TO_AP_UART3_CTS_L
G30
AP_TO_STOCKHOLM_UART3_RTS_L
G31
STOCKHOLM_TO_AP_UART3_RXD
G32
AP_TO_STOCKHOLM_UART3_TXD
AE31
AF31
AE32
AE33
AG4
AM2
TRISTAR_TO_AP_ACC_UART6_RXD
AM1
AP_TO_TRISTAR_ACC_UART6_TXD
B30
NC
A30
AF2
AF1
AP_TO_VIBE_TRIG
BT_TO_AP_UART1_CTS_L
AP_TO_BT_UART1_RTS_L
BT_TO_AP_UART1_RXD
AP_TO_BT_UART1_TXD
BB_TO_AP_UART2_CTS_L
AP_TO_BB_UART2_RTS_L
BB_TO_AP_UART2_RXD
AP_TO_BB_UART2_TXD
WLAN_TO_AP_UART4_CTS_L
AP_TO_WLAN_UART4_RTS_L
WLAN_TO_AP_UART4_RXD
AP_TO_WLAN_UART4_TXD
AP_TO_TIGRIS_SWI
AP_TO_WLAN_DEVICE_WAKE
OSCAR_TO_AP_UART_RXD
AP_TO_OSCAR_UART_TXD
22
14
17
17
29
29
29
29
29
29
17 29
17 29
29
29
29
29
29
29
29
29
14
17
17
29
22
22
10
45_AP_TO_SPKAMP_I2S2_MCLK
16
BLUETOOTH
BASEBAND
STOCKHOLM
WIFI UART
GAS GAUGE
CODEC XSP & SPKR AMP
B
AP_TO_MESA_SPI_CLK
21
12
1/32W
01005
CODEC ASP
BLUETOOTH
ROOM=SOC
R0311
33.2
12
1/32W
01005
PP0303
P2MM-NSM
ROOM=SOC
BASEBAND
CODEC VSP
BOARD_ID2
BOARD_ID1
BOARD_ID0
CODEC
GRAPE
ROOM=SOC
R0340
12
45_AP_TO_CODEC_I2S0_MCLK_R
1%
45_AP_TO_CODEC_ASP_I2S0_BCLK
10
MF
AP_TO_CODEC_ASP_I2S0_LRCLK
10
CODEC_TO_AP_ASP_I2S0_DIN
10
AP_TO_CODEC_ASP_I2S0_DOUT
10
45_AP_TO_BT_I2S1_BCLK
29
AP_TO_BT_I2S1_LRCLK
29
BT_TO_AP_I2S1_DIN
29
AP_TO_BT_I2S1_DOUT
29
45_AP_TO_SPKAMP_I2S2_MCLK_R
1%
45_AP_TO_CODEC_XSP_I2S2_BCLK
10 16
MF
AP_TO_CODEC_XSP_I2S2_LRCLK
10 16
CODEC_TO_AP_XSP_I2S2_DIN
10 16
AP_TO_CODEC_XSP_I2S2_DOUT
10 16
ALS_TO_AP_INT_L
11
SM
1
29
45_AP_TO_BB_I2S3_BCLK
PP
AP_TO_BB_I2S3_LRCLK
29
BB_TO_AP_I2S3_DIN
29
AP_TO_BB_I2S3_DOUT
29
TRISTAR_TO_AP_INT
13 17
45_AP_TO_CODEC_VSP_I2S4_BCLK
10
AP_TO_CODEC_VSP_I2S4_LRCLK
10
CODEC_TO_AP_VSP_I2S4_DIN
10
AP_TO_CODEC_VSP_I2S4_DOUT
10
BOARD_ID2
26 27
BOARD_ID1
27
CODEC_TO_AP_SPI_MISO
10
AP_TO_CODEC_SPI_MOSI
10
AP_TO_CODEC_SPI_CLK
10
AP_TO_CODEC_SPI_CS_L
10
TOUCH_TO_AP_SPI_MISO
24
AP_TO_TOUCH_SPI_MOSI
24
AP_TO_TOUCH_SPI_CLK
24
AP_TO_TOUCH_SPI_CS_L
24
MESA_TO_AP_SPI_MISO
21
AP_TO_MESA_SPI_MOSI
21
AP_TO_MESA_SPI_CLK_R
MESA_TO_AP_INT
21
01005
0.00
D26
I2S0_MCK
U30
I2S0_BCLK
U31
I2S0_LRCK
U32
I2S0_DIN
U33
I2S0_DOUT
R30
I2S1_MCK
NC
P30
I2S1_BCLK
T30
I2S1_LRCK
R31
I2S1_DIN
T31
I2S1_DOUT
D25
I2S2_MCK
N30
I2S2_BCLK
N31
I2S2_LRCK
P32
I2S2_DIN
P33
I2S2_DOUT
AA2
I2S3_MCK
AA4
I2S3_BCLK
AA3
I2S3_LRCK
Y1
I2S3_DIN
Y2
I2S3_DOUT
AB32
I2S4_MCK
AB33
I2S4_BCLK
AA30
I2S4_LRCK
AA32
I2S4_DIN
AA33
I2S4_DOUT
AG1
SPI0_MISO
AG2
SPI0_MOSI
AG3
SPI0_SCLK
NC
AH3
SPI0_SSIN
NC
J3
SPI1_MISO
J2
SPI1_MOSI
J1
SPI1_SCLK
J4
SPI1_SSIN
F33
SPI2_MISO
F32
SPI2_MOSI
E32
SPI2_SCLK
E31
SPI2_SSIN
AD33
SPI3_MISO
AD32
SPI3_MOSI
AD31
SPI3_SCLK
AE30
SPI3_SSIN
U0201
POP-FIJI-1GB-DDR-B0
SYM 3 OF 13
GRP4
GRP2
GRP3
GRP1
GRP4GRP2
GRP3
BGA
I2C0_SCL
I2C0_SDA
I2C1_SCL
GRP3
I2C1_SDA
I2C2_SCL
I2C2_SDA
GRP2
I2C3_SCL
I2C3_SDA
SEP_I2C_SCL
SEP_I2C_SDA
SEP_SPI_SCLK
SEP_SPI_SSIN
GRP3
SEP_SPI_MISO
SEP_SPI_MOSI
SEP_GPIO0
ISP_UART0_RXD
GRP4
ISP_UART0_TXD
GRP3
DISP_VSYNC
CLK32K_OUT
GRP2
CPU_SLEEP_STATUS
NAND_SYS_CLK
R0305
2
2.2K
1/32W
01005
1
5%
MF
2
13 15
13 15
3
3
22
22
R0306
1.33K
1%
1/32W
MF
01005
R0310
24
10K
1/32W
01005
ROOM=SOC
1/32W
R0312
ROOM=SOC
1
R0308
1.33K
1/32W
01005
2
PP1V8
1
5%
MF
2
1/32W
0.00
12
ROOM=SOC
24 25 26 27
1
1%
MF
2
2 3 5 6 7
24 25 26 27
R0315
0.00
12
0%
ROOM=SOC
MF
01005
PMU_TO_AP_PRE_UVLO_L
PP1V8_SDRAM
NOSTUFF
1
R0307
10K
5%
1/32W
MF
01005
2
ROOM=SOC
MF0%
01005
P2MM-NSM
1
PP
SM
PP0301
P2MM-NSM
1
PP
SM
PP0302
AP_TO_I2C0_SCL
AP_BI_I2C0_SDA
AP_TO_I2C1_SCL
AP_BI_I2C1_SDA
AP_TO_I2C2_SCL
AP_BI_I2C2_SDA
P2MM-NSM
PP
SM
PP0305
P2MM-NSM
PP
SM
PP0304
10 11 12 13 15 20 23
3 4
10 12 13 14 15
17 26 29
AP_TO_PMU_SOCHOT1_L
13 15 17
13 15 17
14 16 21
14 16 21
11 20
11 20
D
C
13
B
13
ANTI-ROLLBACK EEPROM
ONSEMI EEPROM
APN:335S0894
PP1V8
2 3 5 6 7
10 11 12 13 15 20 23
24 25 26 27
AP_BI_EEPROM_I2C_SDA
3
AP_TO_EEPROM_I2C_SCL
3
1
R0316
2.2K
5%
1/32W
MF
01005
2
ROOM=E_SE
VCC
U0301
CAT24C08C4A
WLCSP
B1B2
SCLSDA
1
C0301
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=E_SE
1
R0317
2.2K
5%
1/32W
MF
01005
2
ROOM=E_SE
A
VSS
ROOM=E_SE
A2A1
63
REMOVED HOLD + MENU KEY
BUFFERS SINCE NOT NEEDED FOR FIJI
SYNC_MASTER=N56_MLB
PAGE TITLE
SOC:I/OS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
Apple Inc.
R
SYNC_DATE=08/29/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
4 OF 55
SHEET
4 OF 54
124578
876543
FIJI: VDDIOD,VDDIO18,VDD_VAR_SOC
12
JUST A FEW GNDS
C22
C23
C24
C25
C26
C27
C28
D10
D12
D13
D18
D19
D20
D21
D22
D23
D24
D27
E11
E15
E17
E19
E21
E23
E24
E25
E26
E27
E28
F10
F12
F14
F16
F18
F20
F22
F24
F27
F29
F31
G11
G13
G15
G17
G19
G21
G23
G25
G27
G28
H10
H12
H14
H17
H18
H20
H22
H24
H26
H27
H29
J11
J13
J16
J19
J21
J23
J25
J27
J28
U0201
POP-FIJI-1GB-DDR-B0
C3
C4
C5
C6
C9
D4
D5
D6
D8
D9
E6
E7
E9
VSS
F6
F8
G6
G9
H2
H5
H6
H7
H8
BGA
SYM 12 OF 13
VSS
AJ15
AJ18
AJ20
AJ22
AJ26
AJ28
AJ5
AK10
AK14
AK16
AK24
AK27
AK28
AK29
AK6
AK8
AL11
AL13
AL15
AL17
AL19
AL21
AL23
AL25
AL27
AL6
AL7
AL9
AM10
AM11
AM12
AM13
AM14
AM15
AM16
AM17
AM18
AM19
AM20
AM21
AM22
AM23
AM24
AM26
AM28
AM5
AM6
AM7
AM8
AM9
AN25
AN26
AN27
AN28
AN29
AN5
AN6
AP1
AP10
AP12
AP14
AP17
AP19
AP2
AP21
AP24
AP3
AP32
AP33
AP5
AP7
AR1
AR2
AR3
AR32
AR33
AR5
B1
B18
B2
B20
B32
B33
C10
C11
C15
C16
C17
C18
C19
C20
A1
A2
A32
A33
AA11
D
AA15
AA20
AA24
AA26
AA27
AA28
AA31
AA5
AA7
AA9
AB12
AB14
AB17
AB19
AB21
AB27
AB28
AB6
AB7
AB8
AC11
AC13
AC15
AC20
AC22
AC24
C
AC26
AC28
AC32
AC5
AC6
AC9
VSS
AD10
AD12
AD17
AD23
AD27
AD28
AD5
AD7
AD8
AE13
AE18
AE20
AE24
AE26
AE27
AE28
AE29
AE6
AE7
AF10
AF12
AF14
AF16
AF19
AF21
AF28
AF32
AG11
AG13
AG15
AG20
AG22
AG24
AG26
AG28
AH12
AH14
AH17
AH19
AH21
AH23
AH25
AH27
AH28
AJ11
AJ13
AE9
AF5
AF6
AF8
AG5
AG7
AG9
AH6
AH8
B
A
U0201
POP-FIJI-1GB-DDR-B0
BGA
SYM 11 OF 13
VSS
J29
J30
J31
J32
J9
K10
K12
K14
K17
K18
K20
K22
K24
K26
K28
K29
K30
K31
K32
K6
K8
L1
L11
L13
L15
L17
L19
L2
L21
L23
L25
L27
L29
L30
L31
L32
L5
L7
L9
M10
M12
M14
M18
M2
M20
M22
M24
M26
M28
M29
M3
M30
M31
M32
M4
M5
M6
M8
N11
N13
N15
N17
N19
N2
N21
N23
N25
N27
N29
N3
N32
N7
N9
P10
P12
P14
P16
P18
P2
P20
P22
P24
P26
P28
P29
P3
P31
P4
P5
P6
P8
C21
PP_VAR_SOC
12 26
1
C0508
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=SOC
ROOM=SOC
C0503
4.3UF
20%
4V
CERM
0402
143
2
ROOM=SOC
C0507
1UF
20%
4V
CERM
0402
143
2
ROOM=SOC
C0509
1UF
20%
4V
CERM
0402
143
2
ROOM=SOC
C0510
0.47UF
20%
6.3V
CERM
0402
143
2
VDDIOD, VDDIO18
CAPS FOR VDDIOD ARE SHARED WITH VDDQ
PP1V2
2 4
11 12 26
E16
E18
F15
F17
AK11
AK19
AK21
AK23
AK7
AK9
AL10
AL12
AL18
AL20
AL22
AL8
K27
L28
M27
N28
P27
R28
T27
U28
V27
W28
K7
L6
M7
N6
P7
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDRCA
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR0DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
POP-FIJI-1GB-DDR-B0
SYM 9 OF 13
1.2V
U0201
BGA
1.8V
VDDIO18_GRP1
VDDIO18_GRP2
VDDIO18_GRP2
VDDIO18_GRP2
VDDIO18_GRP2
VDDIO18_GRP2
VDDIO18_GRP3
VDDIO18_GRP3
VDDIO18_GRP3
VDDIO18_GRP3
VDDIO18_GRP4
VDDIO18_GRP4
VDDIO18_GRP4
VDDIO18_GRP7
VDDIO18_PPN
VDDIO18_PPN
VDDIO18_PPN
VDDIO18_PPN
VDDIO18_PPN
J6
ROOM=SOC
1
C0501
AB5
AE5
AH5
T6
W5
AA29
AC29
AF29
AJ29
F25
F28
H28
T5
AK13
AK15
AK17
AL14
AL16
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=SOC
1.0UF
20%
6.3V
X5R
0201-1
PP1V8_ALWAYS
1
2
1
C0520
0.1UF
20%
4V
2
X5R
01005
ROOM=SOC
C0511
GRP7 POWERS GPIO11,12 (BUTTONS)
3
12 14 26
ROOM=SOC
C0502
1UF
20%
4V
CERM
0402
143
2
ROOM=SOC
C0506
0.47UF
20%
6.3V
CERM
0402
143
2
PP1V8
2 3 6 7
10 11 12 13 15 20 23 24
25 26 27
12
45_BUCK2_FB
63
VDD_SRAM, VDD_SOC
U0201
POP-FIJI-1GB-DDR-B0
G24
G26
H16
H19
H21
H23
H25
J15
J17
J18
J20
J22
J24
K16
K19
K21
K23
K25
L18
L20
L22
VDD_VAR_SOC
L24
0.90V - 0.95V
1.8A @ 105C
M19
M21
M23
M25
N18
N20
N22
N24
P19
P21
P23
P25
R20
R22
R24
T21
T23
T25
U20
U22
U24
V21
V23
V25
W20
W22
W24
W26
VDD_VAR_SOC_SENSE
SYNC_MASTER=N56_MLB
PAGE TITLE
SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
BGA
SYM 8 OF 13
Apple Inc.
R
PP0501
P2MM-NSM
SM
PP
ROOM=SOC
V10
V12
V14
V16
V18
V2
V20
V22
V24
V26
V28
V29
V3
V30
V31
V32
V4
V5
V6
V8
W11
W13
W15
W19
W2
W23
W25
VSS
W27
W29
W3
W30
W31
W32
W33
W6
W7
W9
Y10
Y12
Y14
Y17
Y21
Y28
Y29
Y5
Y6
Y8
VSS_SENSE
CPU_VSS_SENSE
AA13
SYNC_DATE=08/29/2013
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
SHEET
124578
7.0.0
5 OF 55
5 OF 54
SIZE
D
C
B
A
D
876543
FIJI: NAND + 12X17 NAND PKG
SUPPORT FOR PPN1.5 (1.8V IO) ONLY
12
D
1
1000MA
VCC
VSS
F2M6B6
OMIT_TABLE
ROOM=NAND
U0604
L3F6B2
C0609
0.47UF
20%
4V
2
X7S
0204
ROOM=NAND
N7
N1
LGA
A7
M2
1
C0623
100PF
5%
16V
2
NP0-C0G
01005
ROOM=NAND
PP1V2_NAND_VDDI
26
PP1V8
PP1V8
10 11 12 13 15 20 23
2 3 5 6 7
24 25 26 27
C
AP_TO_NAND_ANC0_CEN0_L
6
AP_BI_NAND_ANC0_IO<0>
6
AP_BI_NAND_ANC0_IO<1>
6
AP_BI_NAND_ANC0_IO<2>
6
AP_BI_NAND_ANC0_IO<3>
6
AP_BI_NAND_ANC0_IO<4>
6
AP_BI_NAND_ANC0_IO<5>
6
AP_BI_NAND_ANC0_IO<6>
6
AP_BI_NAND_ANC0_IO<7>
6
AP_TO_NAND_ANC0_ALE
6
AP_TO_NAND_ANC0_CLE
6
AP_TO_NAND_ANC0_WE_L
6
45_AP_TO_NAND_ANC0_RE_L
240
1%
MF
6
45_AP_BI_NAND_ANC0_DQS
6
45_AP_PPN0_ZQ
AP_TO_NAND_ANC_DQVREF
6
R0601
1/32W
01005
ROOM=SOC
1
R0607
100K
5%
1/32W
MF
01005
2
ROOM=SOC
AN16
PPN0_CEN0
AP16
PPN0_CEN1
NC
AN22
PPN0_IO0
AP22
PPN0_IO1
AN21
PPN0_IO2
AN20
PPN0_IO3
AN19
PPN0_IO4
AN18
PPN0_IO5
AP18
PPN0_IO6
AN17
PPN0_IO7
AP23
PPN0_ALE
AN23
PPN0_CLE
AR23
PPN0_WEN
AP20
PPN0_REN
AR18
PPN0_DQS
AR20
PPN0_ZQ
AR21
PPN0_VREF
U0201
POP-FIJI-1GB-DDR-B0
BGA
SYM 4 OF 13
PPN1_CEN0
PPN1_CEN1
PPN1_IO0
PPN1_IO1
PPN1_IO2
PPN1_IO3
PPN1_IO4
PPN1_IO5
PPN1_IO6
PPN1_IO7
PPN1_ALE
PPN1_CLE
PPN1_WEN
PPN1_REN
PPN1_DQS
PPN1_ZQ
PPN1_VREF
AN8
AN7
AN9
AN10
AN11
AP11
AN12
AN14
AN15
AP15
AP9
AP8
AR9
AN13
AP13
AR12
AR10
1
R0608
100K
5%
1/32W
MF
01005
2
ROOM=SOC
NC
45_AP_TO_NAND_ANC1_RE_L
2 3 5 6 7
10 11 12 13 15 20 23
24 25 26 27
AP_TO_NAND_ANC1_CEN0_L
AP_TO_NAND_ANC1_ALE
AP_TO_NAND_ANC1_CLE
AP_TO_NAND_ANC1_WE_L
45_AP_BI_NAND_ANC1_DQS
45_AP_PPN1_ZQ
AP_TO_NAND_ANC_DQVREF
6
6
6
6
6
R0602
6
240
1212
1%
1/32W
MF
01005
ROOM=SOC
6
THE TOTAL INDUCTANCE SEEN BY THE NAND SHOULD BE <2NH
1
C0625
100PF
5%
16V
2
NP0-C0G
01005
ROOM=NAND
AP_BI_NAND_ANC1_IO<0>
AP_BI_NAND_ANC1_IO<1>
AP_BI_NAND_ANC1_IO<2>
AP_BI_NAND_ANC1_IO<3>
AP_BI_NAND_ANC1_IO<4>
AP_BI_NAND_ANC1_IO<5>
AP_BI_NAND_ANC1_IO<6>
AP_BI_NAND_ANC1_IO<7>
B
PP0604
P2MM-NSM
ROOM=NAND
PP0605
P2MM-NSM
ROOM=NAND
1
C0624
220PF
2
X7R-CERM
01005
6
6
6
6
6
6
6
6
1
C0601
1.0UF
10%
10V
ROOM=NAND
AP_BI_NAND_ANC0_IO<0>
AP_BI_NAND_ANC0_IO<1>
AP_BI_NAND_ANC0_IO<2>
AP_BI_NAND_ANC0_IO<3>
AP_BI_NAND_ANC0_IO<4>
AP_BI_NAND_ANC0_IO<5>
AP_BI_NAND_ANC0_IO<6>
AP_BI_NAND_ANC0_IO<7>
SM
PP
SM
PP
20%
6.3V
2
X5R
0201-1
ROOM=NAND
NAND_TO_PP_TCKC
NAND_TO_PP_TMSC
1
C0615
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=NAND
1
C0622
220PF
10%
10V
2
X7R-CERM
01005
ROOM=NAND
G3
H2
J3
K2
L5
K6
J5
H6
G1
J1
L1
N3
N5
L7
J7
G7
OA0
OB0
VDDI
IO0-0
IO1-0
IO2-0
IO3-0
IO4-0
IO5-0
IO6-0
IO7-0
IO0-1
IO1-1
IO2-1
IO3-1
IO4-1
IO5-1
IO6-1
IO7-1
TCKC
TMSC
OB8
1
C0602
1UF
20%
4V
2
X6S
0204
ROOM=NAND
OC8
OE0
OF8
G0
OA8
OD8
VCCQ
DQS0*
R/B0*
DQS1*
R/B1*
NAND-1YNM-128GX8-TLC-PPN1.5-128G
VSSQ
G8
OF0
OC0
OE8
OD0
1
2
500MA
1
C0603
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=NAND
A5
CE0*
A3
CLE0
C1
ALE0
E3
WE0*
B4
RE0
NC
C7
RE0*
H4
DQS0
F4
NC
E5
C5
CE1*
C3
CLE1
D2
ALE1
E1
WE1*
D4
RE1
NC
D6
45_AP_TO_NAND_ANC1_RE_L
RE1*
M4
DQS1
K4
NC
E7
NC
G5
VREF
A1
ZQ
C0604
1UF
20%
4V
X6S
0204
ROOM=NAND
AP_TO_NAND_ANC0_CEN0_L
45_AP_TO_NAND_ANC0_RE_L
45_AP_BI_NAND_ANC0_DQS
AP_TO_NAND_ANC1_CEN0_L
AP_TO_NAND_ANC1_WE_L
45_AP_BI_NAND_ANC1_DQS
AP_TO_NAND_ANC_DQVREF
6
OMIT_TABLE
1
C0610
15UF
20%
6.3V
2
X5R
0402-1
ROOM=NAND
1
C0605
15UF
20%
6.3V
2
X5R
0402-1
ROOM=NAND
AP_TO_NAND_ANC0_CLE
AP_TO_NAND_ANC0_ALE
AP_TO_NAND_ANC0_WE_L
NAND_TO_PP_RB
AP_TO_NAND_ANC1_CLE
AP_TO_NAND_ANC1_ALE
45_NAND_PPN_ZQ
1
2
C0606
15UF
20%
6.3V
X5R
0402-1
ROOM=NAND
6
6
6
6
6
6
6
6
6
6
6
6
ROOM=NAND
1
R0609
243
1%
1/32W
MF
01005
2
OMIT_TABLE
1
C0611
15UF
20%
6.3V
2
X5R
0402-1
ROOM=NAND
1
2
PP0600
SM
PP
OMIT_TABLE
1
C0613
15UF
20%
6.3V
2
X5R
0402-1
ROOM=NAND
C0612
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=NAND
P2MM-NSM
1
C0616
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=NAND
1
C0640
1.0UF
20%
6.3V
2
X5R
0201-1
NOTE:C0640,C0641 ADDED FOR UF NEEDS
ROOM=NAND
1
C0607
0.01UF
10%
6.3V
2
X5R
01005
ROOM=SOC
1
C0608
0.01UF
10%
6.3V
2
X5R
01005
ROOM=SOC
OMIT_TABLEOMIT_TABLE
1
C0614
15UF
20%
6.3V
2
X5R
0402-1
ROOM=NAND
1
2
1
C0641
1.0UF
20%
6.3V
2
X5R
0201-1
C0617
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=NAND
1
2
1
R0603
50K
1%
1/32W
MF
01005
2
ROOM=SOC
1
R0604
50K
1%
1/32W
MF
01005
2
ROOM=SOC
1
C0633
15UF
20%
6.3V
2
X5R
0402-1
ROOM=NAND
C0620
100PF
5%
16V
NP0-C0G
01005
ROOM=NAND
PP1V8
1
2
1
C0621
220PF
10%
10V
2
X7R-CERM
01005
ROOM=NAND
2 3 5 6 7
24 25 26 27
PP3V0_NAND
OMIT_TABLE
C0634
15UF
20%
6.3V
X5R
0402-1
ROOM=NAND
PP1V8
10 11 12 13 15 20 23
12 26
2 3 5 6 7
24 25 26 27
10 11 12 13 15 20 23
D
C
B
PP0601
ROOM=SOC
PP0602
ROOM=SOC
PP0603
ROOM=SOC
P4MM
P4MM
P4MM
SM
1
PP
SM
1
PP
SM
1
PP
NOTE: IO<6> PREFERRED BY MATT BYOM (N51)
(IS A STATUS READY BIT)
AP_BI_NAND_ANC0_IO<6>
45_AP_TO_NAND_ANC0_RE_L
45_AP_BI_NAND_ANC0_DQS
6
6
6
A
63
NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE
SYNC_MASTER=N56_MLB
PAGE TITLE
SOC:NAND
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=08/29/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
6 OF 55
SHEET
6 OF 54
124578
SIZE
A
D
876543
FIJI: HIGH SPEED DIG (CAM,LCD,LPDP,PCIE)
12
20
22
22
16
24
13 22
20 24
24
29
29
D
C
B
D
PP0V95_FIXED_SOC
4
12 26
NOTE: NEED TO EVALUATE PI FOR PP1V0.
CONCERN OVER SHARING IT WITH MIPI AND
PCIE REFCLK WITHOUT A FILTER.
NOTE: IS A FERRITE NEEDED? THERE ARE DCR CONCERNS.
R0712
12
0.00
01005
ROOM=SOC
NOTE: PLACE NEAR THE PCIE PINS, NOT LPDP.
PP1V0
7
12 26
1
C0713
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=SOC
45_PCIE_RESREF
1
R0710
200
1%
1/32W
MF
01005
2
ROOM=SOC
1
2
AR30
NC
AP30
NC
AR26
NC
AP26
NC
AR27
NC
AP27
NC
AR28
NC
AP28
NC
AR29
NC
AP29
NC
AL28
NC
AK26
NC
B11
NC
A11
NC
B12
NC
A12
NC
A13
NC
B13
NC
AB2
NC
A10
B10
A9
B9
A14
B14
AB3
A8
C0708
0.1UF
20%
4V
X5R
01005
ROOM=SOC
LPDP_AUX_P
LPDP_AUX_N
LPDP_TX0P
LPDP_TX0N
LPDP_TX1P
LPDP_TX1N
LPDP_TX2P
LPDP_TX2N
LPDP_TX3P
LPDP_TX3N
LPDP_CAL_DRV_OUT
LPDP_CAL_VSS_EXT
PCIE_RX0_P
PCIE_RX0_M
PCIE_TX0_P
PCIE_TX0_M
PCIE_REF_CLK0_P
PCIE_REF_CLK0_M
PCIE_CLKREQ0_N
PCIE_RX1_P
PCIE_RX1_M
PCIE_TX1_P
PCIE_TX1_M
PCIE_REF_CLK1_P
PCIE_REF_CLK1_M
PCIE_CLKREQ1_N
PCIE_RESREF
26
PP0V95_FIXED_SOC_PCIE
1
C0712
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=SOC
1
C0711
0.1UF
20%
4V
2
X5R
01005
ROOM=SOC
PWRTERM2GND
PWRTERM2GND
PWRTERM2GND
AM27
AM25
AL26
AL24
PWRTERM2GND
POP-FIJI-1GB-DDR-B0
VDDA10_LPDP3
VDDA10_LPDP2
VDDA10_LPDP1
VDDA10_LPDP0
1.0V
24MA
BGA
SYM 6 OF 13
E13
D11
VDD095_VPTX0_PCIE
VDD095_VPTX1_PCIE
0.95V
U0201
RF TEAM: CONFIRMED PD NEEDED
F13
D14
E12
VDD18_VPH_PCIE
VDD095_VP_PCIE
VDDA10_REFCLK_PCIE
1.8V1.0V
PCIE_REF_PAD_CLK_P
PCIE_REF_PAD_CLK_M
GPIO39/PCIE_PERST0_N
GPIO43/PCIE_PERST1_N
R0719
PP1V8
ULPI_DATA0
ULPI_DATA1
ULPI_DATA2
ULPI_DATA3
ULPI_DATA4
ULPI_DATA5
ULPI_DATA6
ULPI_DATA7
ULPI_CLK
ULPI_DIR
ULPI_NXT
ULPI_STP
EDP_HPD
2 3 5 6 7
10 11 12 13 15 20 23
24 25 26 27
H4
AP_TO_OSCAR_SWDCLK_1V8
H3
AP_BI_OSCAR_SWDIO_1V8
G3
NC
G4
F2
NC
G2
NC
F3
NC
F4
G5
OSCAR_TO_PMU_HOST_WAKE
E3
LCM_TO_AP_HIFA_BSYNC
F1
AP_TO_TOUCH_RESET_L
E4
G29
AP_TO_STOCKHOLM_EN
C13
NC
C12
NC
AK5
NC
AL4
AP_TO_WLAN_PCIE1_RST_L
AP_TO_LEDDRV_EN
TOUCH_TO_AP_INT_L
AP_TO_LCM_RESET_L
1
R0719
100K
5%
1/32W
MF
01005
2
A
SYNC_MASTER=N56_MLB
PAGE TITLE
SOC:CAM,LCD,LPDP,PCIE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
63
SYNC_DATE=08/26/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
8 OF 55
SHEET
8 OF 54
124578
SIZE
A
D
876543
L67 AUDIO CODEC
12
D
AUDIO I/O
D
(ANALOG MIC IN, DIG MIC IN, HPOUT, LINEOUT, RECEIVER OUT, MIKEYBUS)
C0922
0.1UF
12
X5R20%
01005
4V
LOWERMIC1_TO_CODEC_P
9
VOICE MIC
CODEC_TO_HPHONE_HS4
18
9
C
HEADPHONE MIC
CODEC_TO_HPHONE_HS3
9
18
ANC REF MIC
18
LOWERMIC1_TO_CODEC_N
9
18
ROOM=CODEC
R0915
1.33K
12
1%
1/32W
MF
01005
NO_XNET_CONNECTION=TRUE
C0904
NO_XNET_CONNECTION=TRUE
ROOM=CODEC
R0950
1.33K
12
1%
1/32W
MF
01005
NO_XNET_CONNECTION=TRUE
REARMIC2_TO_CODEC_P
8 9
REARMIC2_TO_CODEC_N
8 9
ROOM=CODEC
220PF
X7R-CERM
01005
NOSTUFF
1
C0927
56PF
5%
16V
2
NP0-C0G
01005
ROOM=CODEC
1
10%
10V
2
NOSTUFF
1
C0942
56PF
5%
16V
2
NP0-C0G
01005
ROOM=CODEC
NOSTUFF
1
C0930
56PF
5%
16V
2
NP0-C0G
01005
ROOM=CODEC
NOSTUFF
1
C0943
56PF
5%
16V
2
NP0-C0G
01005
ROOM=CODEC
EXTMIC_TO_CODEC_P
EXTMIC_TO_CODEC_N
B
FRONTMIC3_TO_CODEC_P
9
ANC ERROR MIC
11
FRONTMIC3_TO_CODEC_N
9
11
1
2
NOSTUFF
C0946
56PF
5%
16V
NP0-C0G
01005
ROOM=CODEC
NOSTUFF
1
C0947
56PF
5%
16V
2
NP0-C0G
ROOM=CODEC
01005
ROOM=CODEC
C0923
0.1UF
12
X5R20%
01005
4V
ROOM=CODEC
C0920
0.1UF
12
20%
X5R
01005
4V
ROOM=CODEC
C0921
0.1UF
12
20%X5R
01005
4V
ROOM=CODEC
C0940
0.1UF
12
X5R
20%
01005
4V
ROOM=CODEC
C0941
0.1UF
12
20%X5R
01005
4V
ROOM=CODEC
C0944
0.1UF
12
20%
X5R
01005
4V
ROOM=CODEC
C0945
0.1UF
12
20%
X5R
01005
4V
ROOM=CODEC
LOWERMIC1_TO_AIN1_P
LOWERMIC1_TO_AIN1_N
EXTMIC_TO_AIN2_P
EXTMIC_TO_AIN2_N
REARMIC2_TO_AIN5_P
REARMIC2_TO_AIN5_N
FRONTMIC3_TO_AIN6_P
FRONTMIC3_TO_AIN6_N
LOWERMIC1_TO_DIN1_SD
LOWERMIC1_TO_DIN1_SCLK
MIC2MIC3_TO_DIN2_SD
MIC2MIC3_TO_DIN2_SCLK
ROOM=CODEC
U0900
WLCSP
G2
AIN1+
G1
AIN1-
F4
AIN2+
F3
AIN2-
F2
AIN3+
NC
F1
AIN3-
NC
E4
AIN4+
NC
E3
AIN4-
NC
E1
AIN5+
E2
AIN5-
D1
AIN6+
D2
AIN6-
D3
AIN7+
NC
D4
AIN7-
NC
C1
AIN8+
NC
C2
AIN8-
NC
A6
DMIC1_SD
B6
DMIC1_SCLK
A3
DMIC2_SD
A2
DMIC2_SCLK
PRIMARY
(VOICE) MIC
HEADPHONE
MIC
ANALOG
MIC IN
ANC
REF MIC2
ANC
REF MIC1
ANC
ERROR MIC
ANALOG
LINEIN
ANALOG
LINEIN
SYM 1 OF 3
CS42L67-CWZR-A1
AOUT1+
AOUT1-
AOUT2+
AOUT2-
LINEOUT_REF
LINEOUTA
LINEOUTB
HPOUTA
HPOUTB
HS3_REF
HS4_REF
HPDETECT
MBUS_REF
HS3
HS4
K7
L7
L5
K5
K8
J8
H8
J9
K9
K1
L2
L9
L8
G8
G10
DN
F10
DP
F11
CODEC_TO_RCVR_P
CODEC_TO_RCVR_N
CODEC_TO_HAC_P
CODEC_TO_HAC_N
NC
NC
CODEC_TO_HPHONE_HS3
CODEC_TO_HPHONE_HS4
CODEC_TO_HPHONE_HS3_REF
CODEC_TO_HPHONE_HS4_REF
HPHONE_TO_CODEC_DET
90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N
90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P
CODEC_MBUS_REF
11
11
11
11
CODEC_TO_HPHONE_L
56PF
5%
16V
01005
20.0
ROOM=CODEC
20.0
ROOM=CODEC
CODEC_TO_HPHONE_R
1
2
MF
01005
MF
01005
ROOM=CODEC
C0952
100PF
12
NP0-C0G
01005
ROOM=CODEC
1
C0953
100PF
5%
10V
2
NP0-C0G
01005
C0954
100PF
12
NP0-C0G
01005
ROOM=CODEC
9
18
18
9
18
18
18
18
NOSTUFF
C0950
56PF
NP0-C0G
ROOM=CODEC
01005
NOSTUFF
1
C0951
5%
16V
2
NP0-C0G
ROOM=CODEC
R0902
12
5%
1/32W
R0903
12
5%
1/32W
18
18
5%
10V
NOSTUFF
5%
10V
90_CODEC_BI_TRISTAR_MIKEYBUS_N
90_CODEC_BI_TRISTAR_MIKEYBUS_P
NO_XNET_CONNECTION=TRUE
17
17
C
B
ROOM=SOC
LOWERMIC1_TO_CODEC_P
9
18
LOWERMIC1_TO_CODEC_N
9
18
REARMIC2_TO_CODEC_P
8 9
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE
A
FRONTMIC3_TO_CODEC_P
9
11
REARMIC2_TO_CODEC_N
8 9
FRONTMIC3_TO_CODEC_N
9
11
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE
R0941
NOSTUFF
12
0.00
01005
R0942
ROOM=SOC
NOSTUFF
12
0.00
01005
ROOM=SOC
R0943
NOSTUFF
12
0.00
01005
R0944
ROOM=SOC
ROOM=SOC
ROOM=SOC
01005
01005
01005
NOSTUFF
NOSTUFF
NOSTUFF
12
0.00
R0945
12
0.00
R0946
12
0.00
63
SYNC_MASTER=N61_MLB
PAGE TITLE
AUDIO:L67 CODEC (1/2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=08/26/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
9 OF 55
SHEET
9 OF 54
124578
SIZE
A
D
876543
L67 AUDIO CODEC
12
D
C
KEEP THESE CAPS AT CODEC PINS
ROOM=CODEC
1
R1000
2.21K
1%
1/32W
MF
01005
2
ROOM=CODEC
1
C1037
1.0UF
20%
6.3V
2
X5R
0201-1
1
C1038
4.7UF
20%
6.3V
2
B
X5R-CERM1
402
ROOM=CODEC
ROOM=BUTTON_B2B
XW1002
SHORT-10L-0.1MM-SM
21
PCB NOTE:
PLACE NEAR J1111 GND PIN
NOTE: C1022 WAS REDUCED TO 2.2UF BECAUSE OF
ADDITIONAL NEARBY VCC MAIN CAPS
12 14 15 16 17 23 26 31 39 48
51 52
2 3 5 6 7
11 12 13 15 20 23
24 25 26 27
3 4
10 12 13 14 15 17 26 29
12 16 26
18 26
6.3V
20%
402
1
2
CODEC_AGND
1
2
PP_CODEC_TO_MIC1_BIAS
MIC1_BIASFILT_RET
18
ROOM=CODEC
C1020
1.0UF
20%
6.3V
X5R
0201-1
26
PP_EXTMIC_BIAS_IN
26
PP_EXTMIC_BIAS
26
PP_EXTMIC_BIAS_FILT_IN
26
PP_EXTMIC_BIAS_FILT
ROOM=CODEC
1
C1015
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=CODECROOM=CODEC
C1018
4.7UF
X5R-CERM1
FRONTMIC3_BIAS_FILT_GND
PP_VCC_MAIN
PP1V8
PP1V8_SDRAM
PP1V8_VA_L19_L67
10
ROOM=CODEC
1
C1000
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=CODEC
1
C1074
2.2UF
20%
6.3V
2
X5R
0201-1
CODEC_AGND
10
C1021
4.7UF
ROOM=CODEC
X5R-CERM1
11 26
PP_CODEC_TO_FRONTMIC3_BIAS
FRONTMIC3_TO_CODEC_RET_FILT
8
26
PP_CODEC_TO_REARMIC2_BIAS
REARMIC2_TO_CODEC_RET_FILT
1
C1019
4.7UF
2
20%
6.3V
X5R-CERM1
402
REARMIC2_BIAS_FILT_GND
20%
6.3V
402
12
1
C1022
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=CODEC
1
2
1
2
1
2
ROOM=CODEC
MIC1_BIAS_FILT
POWER, MICBIAS
1
2
PCB: C1021 AT U0921.L6
C1013
0.1UF
20%
4V
X5R
01005
ROOM=CODEC
C1014
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=CODEC
C1012
2.2UF
20%
6.3V
X5R
0201-1
J5
J6
L4
L3
K4
K3
H7
G6
H6
H5
ROOM=BUTTON_B2B
XW1004
SHORT-10L-0.1MM-SM
C1031
0.1UF
20%
6.3V
X5R-CERM
01005
ROOM=CODEC
1
C1016
0.1UF
20%
4V
2
X5R
01005
ROOM=CODEC
MIC1_BIAS
MIC1_BIAS_FILT
MIC2_BIAS_IN
MIC2_BIAS
MIC2_BIAS_FILT_IN
MIC2_BIAS_FILT
MIC3_BIAS
MIC3_BIAS_FILT
MIC4_BIAS
MIC4_BIAS_FILT
21
1
C1075
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=CODEC
J1
VA
G11
VCP
B10
A11
VD
U0900
WLCSP
SYM 2 OF 3
A10
H11B9L6
ROOM=CODEC
VP
VL
VPROG_CP
+VCP_FILT
-VCP_FILT
SPEAKER_VQ
CS42L67-CWZR-A1
GNDD
GNDHS0
GNDHS1
L1
K2
FLYP
FLYC
FLYN
GNDCP0
GNDCP1
GNDP
FILT+
FILT-
GNDA
J11
G9
H10
J10
26
H9
K11
K10
L11
L10
J7
K6
H1
26
H2
J2
26
PP_CODEC_VHP_FLYP
26
PP_CODEC_VHP_FLYC
PP_CODEC_VHP_FLYN
26
PP_CODEC_VCPFILT+
PGND_CODEC_GNDCP
26
PP_CODEC_VCPFILT-
26
PP_CODEC_SPKR_VQ
PP_CODEC_FILT+
C1024
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=CODEC
KEEP THESE CAPS AT CODEC PINS
ROOM=CODEC
1
C1032
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=CODEC
1
C1033
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=CODEC
1
C1034
4.7UF
20%
6.3V
2
X5R-CERM1
402
1
KEEP THIS CAP AT CODEC PINS
2
KEEP THIS CAP AT CODEC PINS
CODEC_AGND
2
ROOM=CODEC
XW1003
SHORT-10L-0.1MM-SM
1
KEEP THESE CAPS AT CODEC PINS
XW1048
SM
12
ROOM=CODEC
10
ROOM=CODEC
1
C1025
4.7UF
20%
6.3V
2
X5R-CERM1
402
1
C1029
4.7UF
20%
6.3V
2
X5R-CERM1
402
ROOM=CODEC
10 12 13 14 15 17 26 29
PP1V8_SDRAM
3 4
ROOM=CODEC
1
R1045
1.00K
5%
1/32W
MF
01005
2
DIGITAL SYSTEM I/O
45_AP_TO_CODEC_I2S0_MCLK
3
45_AP_TO_CODEC_ASP_I2S0_BCLK
3
AP_TO_CODEC_ASP_I2S0_LRCLK
3
AP_TO_CODEC_ASP_I2S0_DOUT
3
CODEC_TO_AP_ASP_I2S0_DIN
3
45_AP_TO_CODEC_VSP_I2S4_BCLK
3
AP_TO_CODEC_VSP_I2S4_LRCLK
3
AP_TO_CODEC_VSP_I2S4_DOUT
3
CODEC_TO_AP_VSP_I2S4_DIN
3
45_AP_TO_CODEC_XSP_I2S2_BCLK
3
16
AP_TO_CODEC_XSP_I2S2_LRCLK
3
16
AP_TO_CODEC_XSP_I2S2_DOUT
3
16
CODEC_TO_AP_XSP_I2S2_DIN
3
16
AP_TO_CODEC_SPI_CS_L
3
AP_TO_CODEC_SPI_CLK
3
AP_TO_CODEC_SPI_MOSI
3
CODEC_TO_AP_SPI_MISO
3
CODEC_TO_AP_INT_L
3
CODEC_TO_PMU_MIKEY_INT_L
13
CODEC_RESET_L
TSTO MUST BE NC
A9
MCLK
WEAK INT PD
C10
ASP_SCLK
B11
ASP_LRCK
C9
ASP_SDIN
A8
ASP_SDOUT
ALL ASP PINS:WEAK INT PD
E9
VSP_SCLK
E8E7
VSP_LRCK/FSYNC
D10F5
VSP_SDIN
D11
VSP_SDOUT
ALL VSP PINS:WEAK INT PD
B8
XSP_SCLK
B7
XSP_LRCK/FSYNC
C7
XSP_SDIN/DAC2B_MUTE
A7
XSP_SDOUT
ALL XSP PINS:WEAK INT PD
B5
CS*
B4
CCLK
B3
CDIN
A4
CDOUT
WEAK INT PD
L67 WEAK INT PD = 550K - 2450K
G4
INT*
G5
WAKE*
G3
RESET*
E10
NC
E11
NC
A5
NC
C6
TSTO
NC
C8
NC
D6
NC
U0900
WLCSP
SYM 3 OF 3
CS42L67-CWZR-A1
GND
TSTI
ROOM=CODEC
A1
C5
B1
F9
D5
D7
E5
E6
F6
F7
F8
G7
H3
H4
J3
J4
D8
D9
B2
C3
C4
C11
D
C
B
A
SYNC_MASTER=N61_MLB
PAGE TITLE
AUDIO:L67 CODEC (2/2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
C1271: WIFI MODULE
C1272: AP PMU MODULE
BB PMU MODULE:RF SIDE
QPOET MODULE:RF SIDE
1
2
1
2
1
2
1
2
C1220
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
C1251
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
C1285
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
C1271
100PF
NP0-C0G
01005
ROOM=WIFI
1
C1200
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=PMU
1
C1225
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=PMU
1
C1298
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=PMU
1
5%
16V
2
C1272
100PF
NP0-C0G
01005
ROOM=PMU
1
2
1
2
5%
16V
C1217
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
C1260
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
B
5%
1/32W
MF-LF
01005
ROOM=PMU
1
2
1
2
1
2
26
14 25
C1218
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
C1263
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
C1264
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=PMU
PP5V0_USB_TO_PMU
CHARGER_VBATT_SNS
C1250
2.2UF
20%
6.3V
X5R
0201-1
ROOM=PMU
1
C1267
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=PMU
1
C1266
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=PMU
2 4
12 23 26
PP1V2_SDRAM
1
C1278
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=PMU
NC
NC
NC
NC
NC
NC
NC
NC
NC
M20
M21
N20
N21
P20
P21
H20
H21
K10
VBAT
L16
ACT_DIO
L20
L21
J20
J21
K7
VCC_MAIN_S
A4
B4
C4
F1
F2
K1
K2
E20
E21
A17
B17
C17
N9
N8
A8
B8
C8
A13
B13
C13
N13
VDD_LDO6
P14
VDD_LDO2
H17
VDD_LDO1_3
J17
VDD_LDO4_13
N15
VDD_LDO5
L17
VDD_LDO7_8
L2
VDD_LDO10
N11
VDD_LDO9_11
P12
VDD_VIB
R12
VIB
N12
VIB_PWM_EN
C1
XTAL1
D1
XTAL2
G9
VSS_RTC
VCENTER
VBUS
IBAT
CHG_LX
VCC_MAIN
VDD_BUCK1
VDD_BUCK2
VDD_BUCK3
VDD_BUCK4
VDD_BUCK5
VDD_BUCK6
VDD_BYP_BUCK6
VDD_BUCK001
VDD_BUCK023
45_PMU_TO_XTAL_OSC32
ROOM=PMU
C1276
18PF
CERM
01005
32.768K-20PPM-12.5PF
2.0X1.2X0.60-SM1
1
5%
16V
2
ROOM=PMU
Y1200
21
45_XTAL_TO_PMU_OSC32
ROOM=PMU
1
C1283
18PF
5%
16V
2
CERM
01005
A
U1202
D2186AZE0FJAVAC
FCCSP-N56-N61
SYM 1 OF 3
BAT/USB
BUCK
BUCK INPUT
LDO INPUT
VIBE
XTAL
LDO
SPEC REQUIRES 10NF,
VPUMP RUNS AT 4.6V
ROOM=PMU
BUCK0_LX0
BUCK0_LX1
BUCK0_LX2
BUCK0_LX3
BUCK0_FB
BUCK1_LX0
BUCK1_LX1
BUCK1_FB
BUCK2_LX
BUCK2_FB
BUCK3_LX
BUCK3_FB
BUCK3_SW1
BUCK3_SW2
BUCK3_SW3
VBUCK3_SW
BUCK4_LX
BUCK4_FB
VBUCK4_SW
BUCK4_SW1
BUCK4_SW2
BUCK5_LX0
BUCK5_LX1
BUCK5_FB
BUCK6_LX
BUCK6_FB
BUCK6_BYP
(50MA)
(50MA)
(50MA)
(50MA)
(1000MA)
(150MA)
(250MA)
(250MA)
(250MA)
VLDO9_FB
(100MA)
(250MA)
(5MA)
(250MA)
VPUMP CAP:
30% DERATED.
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VLDO9
VLDO10
VLDO11
VLDO12
VLDO13
VPUMP
26
B7
C7
A9
26
B9
C9
A12
26
B12
C12
A14
26
B14
C14
E7
A3
26
B3
C3
A5
26
B5
C5
E4
G1
G2
F4
J1
J2
K6
P5
N5
P6
R6
P7
R7
N6
N7
F20
F21
E18
N3
N4
M2
N2
L5
A16
B16
C16
A18
B18
C18
C21
R9
NC
L11
NC
R8
NC
2.5-3.3V +/-77.5MV
F18
1.2-1.9V +/-42.5MV
R14
2.5-3.3V +/-75MV
G18
2.5-3.6V +/-75MV
H18
2.5-3.6V +/-75MV
R15
1.2-3.6V +/-82.5MV
R13
2.5-3.6V +/-75MV
K18
2.5-3.6V +/-70MV
L18
NC
2.5-3.6V +/-71.25MV
R10
P10
PP2V9_LDO9
0.6-1.4V +/-25MV
L1
2.5-3.6V +/-82.5MV
R11
FIXED 1.8V, +/-5%
L6
2.5-3.6V +/-71.25MV
J18
R5
45_PMU_VPUMP
PP_BUCK0_LX0
DIDT=TRUE
PP_BUCK0_LX1
DIDT=TRUE
PP_BUCK0_LX2
DIDT=TRUE
PP_BUCK0_LX3
DIDT=TRUE
45_BUCK0_FB
PP_BUCK1_LX0
DIDT=TRUE
PP_BUCK1_LX1
DIDT=TRUE
45_BUCK1_FB
PP_BUCK2_LX
26
DIDT=TRUE
45_BUCK2_FB
26
PP_BUCK3_LX
DIDT=TRUE
45_BUCK3_FB
PP1V8_GRAPE
PP1V8_OSCAR
PP_BUCK4_LX
26
DIDT=TRUE
45_BUCK4_FB
PP1V2_OSCAR
26
PP_BUCK5_LX0
DIDT=TRUE
26
PP_BUCK5_LX1
DIDT=TRUE
45_BUCK5_FB
1
C1208
0.1UF
20%
6.3V
2
X5R-CERM
01005
ROOM=PMU
0.47UH-20%-3.3A-0.065OHM
0.47UH-20%-3.3A-0.065OHM
4
4
5
PP1V8
2 3 5 6 7
25 26 27
24 26
19 22 26
PP1V2
2 4 5
22 26
4
1
C1270
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=PMU
12
12
MCMK2012TR47M-SM
1UH-3.0A-0.059OHM
12
L1212
12
MCMK2012TR47M-SM
SAME POLARITY
1UH-3.0A-0.059OHM
12
0.47UH-20%-3.3A-0.065OHM
12
MCMK2012TR47M-SM
1.0UH-20%-2.4A-0.075HM
12
PIFE20161T-SM
10 11 13 15 20 23 24
11 26
1
C1229
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=PMU
L1209
PIFA20161B
L1210
L1211
PIFA20161B
L1213
PIFA20161B
L1214
L1215
1
C1212
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
1
C1284
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=PMU
1
C1290
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1222
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1203
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
2
C1299
2.2UF
20%
6.3V
X5R
0201-1
ROOM=PMU
1
C1292
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1245
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
0V9/0V95
1
C1227
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
0V9/0V95
1
C1223
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1207
2
ROOM=PMU
2.2UF
20%
6.3V
X5R
0201-1
0V775/0V95/1V0
1
C1294
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1262
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1210
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1275
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1235
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
1
C1228
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
PP_GPU
1
C1226
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
PP_VAR_SOC
1
C1289
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
PP_CPU
4
26
4
26
5
26
1
2
7.6A MAX
3.45A MAX
1.8A MAX
C1242
1.0UF
20%
6.3V
X5R
0201-1
ROOM=PMU
1.0UH-20%-2.4A-0.075HM
H7 VDD_CPU
SHORT-10L-0.1MM-SM
H7 VDD_GPU
H7 VAR
PP1V8_VA_L19_L67
PP3V0_PROX_IRLED
1
C1232
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=PMU
L1216
12
PIFE20161T-SM
ROOM=PMU
XW1218
21
ROOM=PMU
1.0UH-20%-2.4A-0.075HM
ROOM=PMU
1.0UH-20%-2.4A-0.075HM
0.47UH-30%-2.7A-0.065OHM
PP3V3_USB
PP3V0_TRISTAR
PP3V0_IMU
PP3V0_NAND
PP3V3_ACC
PP3V0_PROX_ALS
PP1V0
PP1V8_ALWAYS
PP3V0_MESA
1
C1291
0.1UF
20%
4V
2
X5R
01005
ROOM=PMU
PCB:PLACE C1297 NEAR C1263
100PF
NP0-C0G
01005
ROOM=PMU
1
C1296C1297
100PF
5%
16V
2
ROOM=PMU
1
2
PCB:PLACE C1296 NEAR L1216
L1217
12
PIFE20161T-SM
XW1220
SHORT-10L-0.1MM-SM
ROOM=PMU
21
L1218
12
PIFE20161T-SM
L1219
12
MCKK2012-SM
2
26
10 16 26
15 17 26 29
19 26
6
26
17 26
11 26
SYNC_MASTER=N56_MLB
7
26
PAGE TITLE
11 26
3 5
14 26
21 26
1
2
NOTICE OF PROPRIETARY PROPERTY:
C1219
THE INFORMATION CONTAINED HEREIN IS THE
2.2UF
PROPRIETARY PROPERTY OF APPLE INC.
20%
6.3V
THE POSESSOR AGREES TO THE FOLLOWING:
X5R
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
0201-1
ROOM=PMU
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
1
C1214
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
ROOM=PMU
ROOM=PMU
SOC USB PHY (25 MA)
SPEAKER AMP, CODEC VA (2.5 MA L1419, 3MA L67)
TRISTAR VDH, WIFI_FLEX PAC (? MA)
GYRO, ACCEL, COMPASS (? MA)
NAND (? MA)
ACCESSORY POWER (? MA)
PROX/ALS VDD (PROX: 0.75/1.2 MA ALS: 0.175/0.25 MA [TYP/MAX])
REAR CAM AUTO FOCUS (120MA PEAK, PROBABLY CAP AT 80MA)
REAR/FRONT CAM AVDD (? MA)
SOC 1V0 MIPI, USB_DVDD, DP (71 MA TOTAL)
PROX LED (102 MA TYP)
ALWAYS ON 1V8 (? MA)
1
2
POWER:ADI(1/2)
R
1
C1293
15UF
5%
20%
16V
01005
1
C1216
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
6.3V
2
X5R
0402-1
ROOM=PMU
NP0-C0G
PCB:PLACE C1270 NEAR L1217
PP0V95_FIXED_SOC
1
C1240
15UF
20%
6.3V
X5R
0402-1
ROOM=PMU
C1202
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
TO DO: REVIEW ALL LDO ASSIGNMENTS
(CHECK VDD_LDO INPUT SOURCE,
CHECK CURRENT RATING FOR LDO OUT
VS. LOAD REQUIREMENT AT DESTINATION, ETC)
NOTE: 3V +/- 5% PER EUGENE
Apple Inc.
63
12
PP1V8_SDRAM
1
2
ROOM=PMU
PP1V2_SDRAM
1
2
1
2
3 4
26 29
C1243
15UF
20%
6.3V
X5R
0402-1
2 4
C1288
100PF
5%
16V
NP0-C0G
01005
ROOM=PMU
4 7
1
C1209
15UF
20%
6.3V
2
X5R
0402-1
ROOM=PMU
SYNC_DATE=08/29/2013
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
SHEET
124578
10 13 14 15 17
12 23 26
TOTAL=1.600A MAX
26
C1241
15UF
20%
6.3V
X5R
0402-1
ROOM=PMU
7.0.0
12 OF 55
12 OF 54
H7 VDD1(BUCK3)=0.045A MAX
BUCK3_SW1=0.500A MAX
+
BUCK3_SW2=0.?A MAX
BUCK3_SW3=0.?A MAX
TOTAL=0.545A MAX
D
+
BUCK4_SW2=0.100A MAX
BUCK4_SW1=1.000A MAX
(BUCK4)=0.500A MAX
H7 VDDCA,VDD2
C
VDD_SRAM_SOC
H7 VDD_SRAM,
3.3A MAX
B
A
SIZE
D
876543
ADI PMU
(AMUX, GPIO, BUTTONS, ADC, THERMISTORS, SYSTEM I/F, GND)
12
D
C
FOREHEAD NTC
NO_XNET_CONNECTION=TRUE
ROOM=PMU_
C1359
NO_XNET_CONNECTION=TRUE
C1367
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
B
NO_XNET_CONNECTION=TRUE
C1322
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
NO_XNET_CONNECTION=TRUE
C1368
A
1
100PF
5%
6.3V
2
CERM
01005
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
ROOM=PMU_
1
100PF
5%
6.3V
2
CERM
01005
ROOM=PMU_
1
100PF
5%
6.3V
2
CERM
01005
ROOM=PMU_
1
100PF
5%
6.3V
2
CERM
01005
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
NO_XNET_CONNECTION=TRUE
1
ROOM=PMU_
R1308
10KOHM-1%
01005
2
CAMERA NTC
NO_XNET_CONNECTION=TRUE
1
ROOM=PMU_
R1310
10KOHM-1%
01005
2
RADIO PA NTC
NO_XNET_CONNECTION=TRUE
1
ROOM=PMU_
R1390
10KOHM-1%
01005
2
H7P NTC
NO_XNET_CONNECTION=TRUE
1
ROOM=PMU_
R1357
10KOHM-1%
01005
2
FOREHEAD_NTC_P
FOREHEAD_NTC_N
CAM_NTC_P
CAM_NTC_N
PA_NTC_P
PA_NTC_N
SOC_NTC_P
SOC_NTC_N
PCB: MAKE XW1328, XW1329 ACCESSIBLE!
ROOM=PMU
PP1300
ROOM=PMU
PP1301
2 3 5 6 7
10 11 12 15 20 23 24
25 26 27
NO_XNET_CONNECTION=TRUE
XW1304
NO_XNET_CONNECTION=TRUE
XW1309
NO_XNET_CONNECTION=TRUE
XW1306
NO_XNET_CONNECTION=TRUE
XW1311
NO_XNET_CONNECTION=TRUE
XW1308
NO_XNET_CONNECTION=TRUE
XW1333
NO_XNET_CONNECTION=TRUE
XW1314
NO_XNET_CONNECTION=TRUE
XW1315
PLACE THESE XWS AT PMU
ROOM=PMU
21
SHORT-10L-0.1MM-SM
ROOM=PMU
21
SHORT-10L-0.1MM-SM
ROOM=PMU
21
SHORT-10L-0.1MM-SM
ROOM=PMU
21
SHORT-10L-0.1MM-SM
ROOM=PMU
21
SHORT-10L-0.1MM-SM
ROOM=PMU
21
SHORT-10L-0.1MM-SM
ROOM=PMU
21
SHORT-10L-0.1MM-SM
ROOM=PMU
21
SHORT-10L-0.1MM-SM
AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN
1.8V --->
1.8V --->
PP1V8
1.8V --->
1.8V --->
1.8V --->
3.33V --->
BASEBAND --->
1.8V --->
1.8V --->
BASEBAND --->
SM
P2MM-NSM
1
PP
P2MM-NSM
1
PP
SM
ROOM=PMU
R1301
100K
5%
1/32W
MF
01005
PMU_TO_PHOTON_ALIVE
20
1
2
C1365
ROOM=PMU
BUTTON_TO_AP_RINGER_A
3 8
13
BUTTON_TO_AP_VOL_UP_L
3 8
BUTTON_TO_AP_VOL_DOWN_L
3 8
LCM_TO_CHESTNUT_PWR_EN
15 20
TRISTAR_TO_PMU_USB_BRICKID_R
13
CHESTNUT_TO_PMU_ADCIN7
13 15
PMU_TO_TP_AMUX_AY
25
RADIO_TO_PMU_ADC_SMPS1
29
RADIO_TO_PMU_ADC_PP_LDO11_VDDIO
29
45_PMU_TO_WLAN_CLK32K
13 29
RADIO_TO_PMU_ADC_PP_LDO5_SIM
29
AP_TO_PMU_TEST_CLKOUT
2
RADIO_TO_PMU_ADC_SMPS4
29
PMU_TO_TP_AMUX_BY
25
AP_TO_I2C0_SCL
3
13 15 17
AP_BI_I2C0_SDA
3
15 17
3
15
45_AP_TO_PMU_AND_BL_DWI_CLK
3
15
45_AP_TO_PMU_AND_BL_DWI_DO
PMU_TO_AP_PRE_UVLO_L
3
AP_TO_PMU_RESET_IN
2
TRISTAR_TO_PMU_HOST_RESET
17
AP_TO_PMU_SOCHOT1_L
3
RESET_1V8_L
15 17 25
2 4
PMU_TO_AP_IRQ_L
3
FOREHEAD_TO_PMU_NTC
CAM_TO_PMU_NTC
PA_TO_PMU_NTC
SOC_TO_PMU_NTC
45_PMU_TCAL
1
100PF
5%
6.3V
2
CERM
01005
1
R1309
3.92K
0.1%
1/20W
MF
0201
2
ROOM=PMU
63
APN: 338S1251 (ADI AZ)
ROOM=PMU
U1202
D2186AZE0FJAVAC
A1
AMUX_A0
NC
B1
AMUX_A1
NC
D2
AMUX_A2
E2
AMUX_A3
E1
AMUX_A4
H6
AMUX_A5
H5
AMUX_A6
H4
AMUX_A7
G4
AMUX_AY
J5
AMUX_B0
J6
AMUX_B1
K5
AMUX_B2
NC
K8
AMUX_B3
NC
L8
AMUX_B4
K9
AMUX_B5
L9
AMUX_B6
L10
AMUX_B7
L4
AMUX_BY
J4
SCL
K4
SDA
K15
DWI_CK
J16
DWI_DI
K16
DWI_DO
NC
F8
PRE_UVLO
P3
RESET_IN1
R3
RESET_IN2
P4
RESET_IN3
R4
RESET*
P2
IRQ*
N1
SYS_ALIVE
L15
TDEV1
R17
TDEV2
P17
TDEV3
R19
TDEV4
P18
TCAL
P19
TBAT
NC
FCCSP-N56-N61
100-300K INT PD
100-300K INT PD
100-300K INT PD
100-300K INT PD
100-300K INT PU TO LDO12
NO INT PULL
NO INT PULL
SYM 2 OF 3
AP<->PMUAMUX
NTC
ADI OTP:
SEE RADAR 14032884
VDD_REF
VDD_RTC
FIXED 2.5V, +/-2%
BRICK_ID
ADC/REFS
ADC_IN7
ADC_REF
ACC_ID
TMPR_DET
ACC_DET
BUTTON1
100-300K INT PU
BUTTON2
100-300K INT PU
BUTTON3
100-300K INT PU
BUTTON4
100-300K INT PU
KEEPACT
NO INT PULL
BUTTONS/DETECT
OUT_32K
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
IREF
VREF
SHDN
F6
45_PMU_IREF
G5
26
PP_PMU_VREF
E5
26
PP_PMU_VDD_REF
F7
26
PP_PMU_VDD_RTC
N17
13
TRISTAR_TO_PMU_USB_BRICKID_R
N18
E6
NC
N19
NC
F5
NC
R18
D21
D20
B20
C20
L7
N10
E8
F17
F16
E15
F15
G17
E17
E16
E14
H16
G16
F14
F13
E13
E12
E11
F12
E10
E9
F11
F9
F10
BUTTON_TO_AP_MENU_KEY_L
BUTTON_TO_AP_HOLD_KEY_L
NC
NC
45_PMU_TO_WLAN_CLK32K
BB_TO_PMU_HOST_WAKE_L
STOCKHOLM_TO_PMU_HOST_WAKE
PMU_TO_OSCAR_RESET_CLK32K_L
WLAN_TO_PMU_HOST_WAKE
CODEC_TO_PMU_MIKEY_INT_L
BT_TO_PMU_HOST_WAKE
PMU_TO_WLAN_REG_ON
OSCAR_TO_PMU_HOST_WAKE
NC
NC
NC
NC
NC
WLAN_TO_PMU_PCIE_WAKE_L
ROOM=PMU
R1316
200K
12
1%
1/20W
ROOM=PMU
C1317
0.1UF
12
0201 6.3V
10%
CERM-X5R
ROOM=PMU
C1318
1.0UF
12
6.3V
ROOM=PMU
C1319
0.1UF
12
10%
6.3V
CERM-X5R
0201
AP_TO_PMU_KEEPACT
CHG_TO_PMU_INT_L
PMU_TO_BB_RST_R_L
TRISTAR_TO_AP_INT
PMU_TO_BT_REG_ON
AP_TO_I2C0_SCL
PMU_TO_BB_VBUS_DET
PMU_TO_ACC_SW_ON
X5R20%
0201-1
MF
201
3
21
3 8
13 29
14
29
3
17
29
22
29
10
29
29
29
3
13 15 17
7
22
29
29
17
ROOM=PMU
1
R1330
100K
5%
1/32W
MF
01005
2
1
C1326
0.01UF
10%
6.3V
2
X5R
01005
ROOM=PMU
1
C1323
1000PF
10%
6.3V
2
X5R-CERM
01005
ROOM=PMU
ROOM=PMU
R1312
1.00K
12
5%
1/32W
MF
01005
ROOM=PMU
R1331
6.34K
12
MF1%
PP1V8_SDRAM
PMU_TO_BB_RST_L
TRISTAR_TO_PMU_USB_BRICKID
1/32W01005
CHESTNUT_TO_PMU_ADCIN7
3 4
10 12 14 15 17 26 29
BUTTON_TO_AP_RINGER_A
ROOM=PMU
1
R1387
1.00M
5%
1/32W
MF
01005
29
2
D
17
ROOM=PMU
13 15
A15
B15
VSS_BUCK0_5
C15
A2
B2
VSS_BUCK1
C2
A6
B6
VSS_BUCK01
C6
G20
VSS_BUCK4
G21
A19
B19
VSS_BUCK5
3 8
13
3
SYNC_MASTER=N56_MLB
PAGE TITLE
C19
A10
A11
B10
B11
C10
C11
H15
G15
K20
K21
A20
A21
B21
G10
G11
G12
P9
H1
H2
G8
G6
H7
J7
P8
G7
VSS_BUCK6
VSS_BUCK012
VSS_BUCK23
VSSA_BUCK0
VSSA_BUCK1
VSSA_BUCK2
VSSA_BUCK3
VSSA_BUCK4
VSSA_BUCK5
VSSA_BUCK6
VSS_SW_CHG
VSS
POWER:ADI(2/2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
U1202
D2186AZE0FJAVAC
FCCSP-N56-N61
SYM 3 OF 3
G13
G14
H8
H9
H10
H11
H12
H13
H14
J8
J9
J10
J11
J12
J13
J14
J15
K11
K12
K13
K14
K17
VSS
L12
L13
L14
M1
N14
P1
P11
P13
P15
P16
R1
R2
R16
R20
R21
SYNC_DATE=08/29/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
13 OF 55
SHEET
13 OF 54
SIZE
C
B
A
D
124578
876543
TIGRIS CHARGER & VIBE DRIVER
12
D
C
PP1V8_ALWAYS
3 5
12 26
ROOM=CHARGER
R1403
CHG_TO_PMU_INT_L
13
100K
1/32W
01005
D
PP_VCC_MAIN
CHARGER CAPS
1
C1417
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=CHARGER
ROOM=CHARGER
1
C1416
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=CHARGER
1
C1410
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=CHARGER
C1402
0.033UF
12 25
3
25
26
12
16V
402
ROOM=CHARGER
1
C1412
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=CHARGER
1
C1415
2.2UF
20%
6.3V
2
X5R
0201-1
1
C1450
220PF
10%
10V
2
X7R-CERM
01005
ROOM=CHARGER
CHARGER DESENSE CAPS
PLACE BY L1401
10%
X5R
1.0UH-20%-3.2A-0.065OHM
C1451
1
100PF
5%
16V
NP0-C0G
2
01005
ROOM=CHARGER
L1401
12
PIFE25201T-SM
ROOM=CHARGER
1
C1411
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=CHARGER
CHARGER_LDO
ROOM=CHARGER
C1403
1
100PF
5%
16V
NP0-C0G
2
26
26
CHARGER_VBATT_SNS
CHG_ACT_DIO
AP_TO_TIGRIS_SWI
01005
CHG_BOOT
CHG_LX
BATTERY_SWI
A2B2D2
C2
PMID_CAP
26
1
1
C1407
4.2UF
10%
16V
2
X5R-CERM
0402-1
PP5V0_USB
12 17 18 25 26
1
C1408
4.2UF
10%
16V
2
1
1
C1440
220PF
5%
10%
10V
MF
2
X7R-CERM
01005
2
ROOM=CHARGER
X5R-CERM
0402-1
ROOM=CHARGER
USB_VBUS_DETECT
2
ROOM=CHARGER
C1470
100PF
5%
25V
NP0-C0G
01005
ROOM=CHARGER
10 12 13 15 17 26 29
1
C1409
4.2UF
10%
16V
2
X5R-CERM
0402-1
ROOM=CHARGER
NOSTUFF
C1471
100PF
5%
25V
NP0-C0G
01005
ROOM=CHARGER
PP1V8_SDRAM
3 4
R1454
68.1K
12
1/32W
01005
1%
MF
C1453
100PF
5%
25V
2
NP0-C0G
01005
ROOM=CHARGER
SM
XW1401
12
ROOM=CHARGER
TRISTAR_TO_PMU_OVP_SW_EN_L
17
PP_TIGRIS_VBUS_DET
26
1
2
AP_BI_I2C1_SDA
3
14 16 21
AP_TO_I2C1_SCL
3
14 16 21
SYS_ALIVE_TIGRIS
NOSTUFF
C1452
100PF
5%
25V
NP0-C0G
01005
ROOM=CHARGER
F5
PMID
A5
VBUS
B5
VBUS
D5
VBUS
C5
VBUS
E5
VBUS
G3
SDA
E4
SCL
E3
SYS_ALIVE
F4
VBUS_OVP_OFF
G2
INT
F1
VBUS_DET
F3
TEST
VDD_MAIN
VDD_MAIN
VDD_MAIN
U1401
SN2400B0YFF
WCSP
PGND
PGND
PGND
A3
VDD_MAIN
ACT_DIODE
HDQ_GAUGE
PGND
C3B3D3
BOOT
BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW
BAT_SNS
HDQ_HOST
LDO
BAT
BAT
BAT
BAT
G4
G5
A4
B4
D4
C4
A1
B1
D1
C1
E1
E2
G1
F2
ROOM=CHARGER
1
C1418
2.2UF
20%
6.3V
2
X5R
0201-1
NOSTUFF
ROOM=CHARGER
1
R1401
100K
5%
1/32W
MF
01005
2
C1480
1
100PF
16V
NP0-C0G
2
01005
ROOM=CHARGER
DESENSE CAP
PCB: PLACE CLOSE BY TIGRIS
B3B2B1A3A2
S
Q1403
A1
G
C1C2C3
5%
CSD68815W15
BGA
D
ROOM=CHARGER
PP_BATT_VCC
10 12 15 16 17 23 26 31 39 48
51 52
14 16 25 26 40 45 46
C
PP_BATT_VCC
1
A3
C3
A2
VIBE_C_VREG
C1433
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=VIBE_DRIVER
B
AP_BI_I2C1_SDA
14 16 21
3
AP_TO_I2C1_SCL
3
14 16 21
AP_TO_VIBE_EN
3
AP_TO_VIBE_TRIG
3
NOSTUFF
1
R1411
100K
5%
1/32W
MF
01005
2
ROOM=VIBE_DRIVER
ROOM=VIBE_DRIVER
B2
C1
A1
B1
1
R1412
100K
5%
1/32W
MF
01005
2
ROOM=VIBE_DRIVER
U1400
DRV2604YZF
SDA
SCL
EN
IN/TRIG
BGA
C2
VDD
OUT+
OUT-
VREG
GND
B3
A
63
ROOM=VIBE_DRIVER
1
C1401
2.2UF
20%
6.3V
2
X5R
0201-1
14 16 25 26 40 45 46
C1405
1
100PF
NP0-C0G
2
ROOM=VIBE_DRIVER
01005
B
VIBE_DRIVE_P
VIBE_DRIVE_N
C1406
1
2
ROOM=VIBE_DRIVER
100PF
NP0-C0G
01005
5%
16V
18 26
18 26
5%
16V
SIZE
A
D
PAGE TITLE
POWER:TIGRISR,VIBE DRIVER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
14 OF 55
SHEET
14 OF 54
124578
876543
CHESTNUT, BACKLIGHT DRIVER, MESA BOOST
12
D500 DISPLAY PMU (TI CHESTNUT, 338S1149)
D
PP_VCC_MAIN
10 12 14 15 16 17 23 26 31 39
48 51 52
1.5UH-20%-1.8A-0.118OHM
L1519
LQE2MRT1R5MG0-SM
ROOM=CHESTNUT
C
1
2
C1547
ROOM=CHESTNUT
PP_CHESTNUT_LXP
AP_TO_I2C0_SCL
3
13 15 17
AP_BI_I2C0_SDA
3
13 15 17
LCM_TO_CHESTNUT_PWR_EN
13 20
RESET_1V8_L
2 4
13 17 25
CHESTNUT_TO_PMU_ADCIN7
13
10UF
CERM-X5R
0402-9
6.3V
1
20%
2
D1
B2
A2
D3
D2
C3
C2
E1
U1501
TPS65730A0PYFF
BGA
ROOM=CHESTNUT
VIN
SW
SYNC
NO INT PULL
SCL
SDA
LCM_EN
200K INT PD
RESET*
NO INT PULL
ADCMUX
AGND
B1D4C1
LCMBST
VNEG(SUB)
HVLDO1
HVLDO2
HVLDO3
PGND1
PGND2
CPUMP
VNEG
CF1
CF2
C4
E4
26 26
B3
B4
E3
E2
A4
A3
A1
26
PP_CHESTNUT_CP
PP_CHESTNUT_CN
1
C1541
1UF
20%
6.3V
2
X5R
0201
ROOM=CHESTNUT
1
C1554
10UF
20%
10V
2
X5R-CERM
0402-8
ROOM=CHESTNUT
1
C1569
10UF
20%
10V
2
X5R-CERM
0402-8
ROOM=CHESTNUT
26
PP6V0_LCM_BOOST
1
C1577
10UF
20%
10V
2
X5R-CERM
0402-8
ROOM=CHESTNUT
PN5V7_SAGE_AVDDN
PP5V7_SAGE_AVDDH
PP5V7_LCM_AVDDH
PP5V1_GRAPE_VDDH
24 26
20 26
24 26
1
C1504
10UF
20%
10V
2
X5R-CERM
0402-8
ROOM=CHESTNUT
20 24 26
1
C1502
10UF
20%
10V
2
X5R-CERM
0402-8
ROOM=CHESTNUT
1
C1529
10UF
20%
10V
2
X5R-CERM
0402-8
ROOM=CHESTNUT
D
C
D500 BACKLIGHT DRIVER
15UH-20%-0.72A-0.9OHM
B
PP_VCC_MAIN
10 12 14 15 16 17 23 26 31 39
48 51 52
ROOM=BACKLIGHT
10UF
6.3V
CERM-X5R
0402-9
1
20%
2
L1503
12
PITA32251T-SM
ROOM=BACKLIGHT
1
C1597C1552
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=BACKLIGHT
13 15 17
13 15 17
10 11 12 13 20 23 24
10 12 13 14 17 26 29
AP_BI_I2C0_SDA
3
AP_TO_I2C0_SCL
3
PP1V8
2 3 5 6 7
25 26 27
PP1V8_SDRAM
3 4
NOTE: D1501 IS 30V DIODE FOR N61 AND 20V FOR N56.
26
PP_WLED_LX
A3
C3
A1
A2
C1
B1
NSR0530P2T5G
U1502
LM3534TMX-A1
BGA
SW
IN
SDA
SCL
VIO_SPI
HWEN
ROOM=BACKLIGHT
D1501
SOD-923-1
ROOM=BACKLIGHT
ILED1
ILED2
GND
B3
D1
OVP
PP_LCM_BL_CAT1
D3
D2
PP_LCM_BL_CAT2
B2
45_AP_TO_PMU_AND_BL_DWI_CLK
SCK
C2
45_AP_TO_PMU_AND_BL_DWI_DO
SDI
1
C1505
2.2UF
20%
25V25V
2
X5R-CERM
0402-1
ROOM=BACKLIGHT
20 26
20 26
1
C1530
2.2UF
20%
2
X5R-CERM
0402-1
ROOM=BACKLIGHT
ROOM=BACKLIGHT
1
C1513
100PF
5%
25V
2
NP0-C0G
01005
3
13
3
13
1AK
C1531
2.2UF
20%
25V
2
X5R-CERM
0402-1
ROOM=BACKLIGHT
PP_LCM_BL_ANODE
20 26
52
PP_VCC_MAIN
10 12 14 15 16 17
23 26 31 39 48 51
C1508
10UF
6.3V
CERM-X5R
0402-9
ROOM=MESA
ROOM=MESA
1.0UH-20%-0.4A-0.53OHM
1
20%
2
L1500
0403
PP3V0_TRISTAR
12 17 26 29
MESA_TO_BOOST_EN
21 25
21
PP18V0_MESA_SW
26
A
63
MESA BOOST A0
APN: 353S3978
ROOM=MESA
U1503
LM3638
SW
VIN
EN_M
EN_S
LDOIN
A1
BGA
PGND
B3
AGND
VOUT
PMID
C3
VOLTAGE=17.0V
C1
B1
A2
B2
A3
C2
26
P17V0_MOJAVE_LDOIN
SYNC_MASTER=N61_MLB
PAGE TITLE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PP16V5_MESA
1
C1500
2.2UF
20%
25V
2
X5R
0402-3
ROOM=MESA
1
C1501
2.2UF
20%
25V
2
X5R
0402-3
ROOM=MESA
ROOM=MESA
1
C1503
100PF
5%
25V
2
NP0-C0G
01005
SYNC_DATE=08/26/2013
DISPLAY:CHESTNUT,BACKLIGHT DRIVER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
15 OF 55
SHEET
15 OF 54
124578
21 25 26
7.0.0
SIZE
B
A
D
876543
12
SPEAKER AMP, LED DRIVER
SPEAKER AMP
D
1
C1635
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=SPKR_AMP
PCB: PLACE C1635, C1637 AT VP INPUT
26
PP_L19_VBOOST
1
PP_BATT_VCC
14 25 26 40 45 46
C
1
C1695
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=SPKR_AMP
AP_TO_SPKAMP_RESET_L
3
1
R1629
100K
5%
1/32W
MF
01005
2
ROOM=CHARGER
C1632
10UF
20%
6.3V
CERM-X5R
0402-9
ROOM=SPKR_AMP
(LEFT CONFIG)
C1603
10UF
20%
10V
2
X5R-CERM
0402-8
ROOM=SPKR_AMP
1.2UH-2.88A-0.082OHM
12
PIFE25201T-SM
1
ROOM=SPKR_AMP
2
45_AP_TO_SPKAMP_I2S2_MCLK
3
45_AP_TO_CODEC_XSP_I2S2_BCLK
3
10
AP_TO_CODEC_XSP_I2S2_LRCLK
10
3
AP_TO_CODEC_XSP_I2S2_DOUT
3
10
CODEC_TO_AP_XSP_I2S2_DIN
3
10
1
2
L1604
AP_BI_I2C1_SDA
3
14 21
AP_TO_I2C1_SCL
3
14 21
SPKAMP_TO_AP_INT_L
3
AP_TO_SPKAMP_BEE_GEES
3
C1648
22UF
20%
10V
X5R-CERM
0603-1
ROOM=SPKR_AMP
26
1
2
ROOM=SPKR_AMP
PP_SPKAMP_SW
C1642
0.1UF
10%
16V
X5R-CERM
0201
I2C ADDRESS: 1000000X
1
C1637
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=SPKR_AMP
B1
A1
D1D6A4
C1
A5
VP
VBST
U1601
CS35L19B-XWZR-C0
A2
B2
D5
A7
A6
D7
C7
E7
E6
F6
F7
E5
NO INT PULLS
NO INT PULLS
NO INT PULLS
1M INT PD
1M INT PD
1M INT PD
1M INT PD
1M INT PD
1M INT PD
SW
SDA
SCL
INT*
RESET*
ALIVE
ADO
MCLK
SCLK
LRCK/FSYNC
SDIN
SDOUT
B3
A3
B4
GNDP
WLCSP
VER1
B5
D4
C4
C3
D3
F5
ROOM=SPKR_AMP
VA
FILT+
LDO_FILT
VSENSEVSENSE+
ISENSE-
ISENSE+
IREF+
GNDA
B6
C6
E4
ROOM=SPKR_AMP
1
C1609
0.1UF
20%
6.3V
2
X5R-CERM
01005
26
26
OUT+
OUT-
F4
F3
F2
C5
E3
E2
F1
E1
D2
C2
B7
ROOM=SPKR_AMP
1
C1630
2.2UF
20%
6.3V
2
X5R
0201-1
PP_SPKAMP_FILT
PP_SPKAMP_LDO_FILT
SPKAMP_ISENSE_N
SPKAMP_ISENSE_P
SPKAMP_TO_SPEAKER_OUT_P
SPKAMP_IREF
1
R1635
44.2K
1%
1/32W
MF
01005
2
ROOM=SPKR_AMP
PP1V8_VA_L19_L67
V = 1.0V
1
2
10 12 26
V= VA PIN
C= 2.2UF MIN
C= 1UF MIN
C1629
2.2UF
20%
6.3V
X5R
0201-1
ROOM=SPKR_AMP
R1601
1/32W
12
39.2
1
C1601
NO_XNET_CONNECTION=TRUE
0.1UF
20%
ROOM=SPKR_AMP
6.3V
2
X5R-CERM
1/32W
01005
12
CKPLUS_WAIVE=MISS_N_DIFFPAIR
39.2
1
C1640
4.7UF
20%
6.3V
2
X5R-CERM1
402
ROOM=SPKR_AMP
NO_XNET_CONNECTION=TRUE
MF
01005
1%
R1602
MF
01005
1%
SPKAMP_VSENSE_N
SPKAMP_VSENSE_P
NO_XNET_CONNECTION=TRUE
R1603
0.100
12
1/4W
0402
C1660
1000PF
01005
ROOM=SPKR_AMP
1%
MF
10%
10V
X5R
NOSTUFF
FL1606
120OHM-25%-1.8A-0.06DCR
FL1609
120OHM-25%-1.8A-0.06DCR
1000PF
01005
1
10%
10V
2
X5R
1
C1663
2
ROOM=SPKR_AMP
0402
0402
NOSTUFF
1
2
ROOM=SPKR_AMP
21
ROOM=SPKR_AMP
21
NOSTUFF
C1604
220PF
10%
10V
X7R-CERM
01005
TBD: PROTO_MLB2 WILL NOSTUFF THIS, BUT RESERVE FOOTPRINT SPACE IN CASE
SPKAMP LOCATION RIGHT NEXT TO DOCKFLEX,EXPLORE NEED
ROOM=SPKR_AMP
XW1610
FERRITE_GND1
FERRITE_GND2
NOSTUFF
1
C1606
220PF
10%
10V
2
X7R-CERM
01005
NOSTUFF
1
C1605
220PF
10%
10V
2
X7R-CERM
01005
C1600
1000PF
ROOM=SPKR_AMP
ROOM=SPKR_AMP
R1604
12
0.00
ROOM=SPKR_AMP
R1605
12
0.00
1
10%
10V
2
X5R
01005
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
21
ROOM=SPKR_AMP
XW1611
21
SPEAKER_TO_SPKAMP_VSENSE_N
01005
SPEAKER_TO_SPKAMP_VSENSE_P
01005
SPKAMP_TO_SPEAKER_OUT_CONN_P
~700MA RMS @ 2.4W INTO 8OHM
SPKAMP_TO_SPEAKER_OUT_CONN_N
1
C1602
1000PF
10%
10V
2
X5R
01005
ROOM=SPKR_AMP
18
18
18
18
D
C
STROBE DRIVER
SIZE
B
A
D
B
TI: APN 353S3899
ROOM=STROBE
PP_VCC_MAIN
10 12 14 15 17 23 26 31 39 48
51 52
C1686
10UF
6.3V
CERM-X5R
0402-9
CERM-X5R
0402-9
ROOM=STROBEROOM=STROBE
10UF
6.3V
1
20%
1UH-3.0A-0.059OHM
2
L1605
12
PIFA20161B
ROOM=STROBE
23
26
AP_TO_LEDDRV_EN
7
RCAM_TO_LEDDRV_STROBE_EN
NOTE: TORCH N/C
BB_TO_LEDDRV_GSM_BLANK
29
AP_BI_RCAM_I2C_SDA
7
23
AP_TO_RCAM_I2C_SCL
7
23
PP_LED_DRV_LX
NC
1
20%
C1687
2
U1602
LM3564A1TMX
WLCSP
D1
IN
A2
SW
B2
D3
ENABLE
INT 200K PD AGND
E3
STROBE
INT 200K PD AGND
C2
TORCH
INT 200K PD AGND
E4
TX
INT 200K PD AGND
E2
SDA
D2
SCL
GND
B1
A1
OUT
LED1
LED2
TEMP
AGND
C1
A
63
A3
B3
C3
A4
B4
C4
D4
E1
26
PP_LED_BOOST_OUT
1
C1694
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=STROBE
C1608
100PF
5%
16V
NP0-C0G
01005
ROOM=STROBE
1
2
1
C1696
10UF
20%
6.3V
2
CERM-X5R
0402-9
ROOM=STROBE
C1673
100PF
NP0-C0G
01005
ROOM=STROBE
PP_STRB_DRIVER_TO_LED_COOL
PP_STRB_DRIVER_TO_LED_WARM
1
5%
16V
2
RCAM_TO_STROBE_NTC
8
26
8
26
8
SYNC_MASTER=N61_MLB
PAGE TITLE
AUDIO:SPKR AMP,STROBE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
RX IS WRT SOC (BB TX) -->
TX IS WRT SOC (BB RX) <--
BB DEBUG USB
BRICK_ID
SOC USB
ACCESSORY UART
DEBUG UART
90_CODEC_BI_TRISTAR_MIKEYBUS_P
9
90_CODEC_BI_TRISTAR_MIKEYBUS_N
9
29
29
13
29
29
PP1V8_SDRAM
3 4
10 12 13 14 15 26 29
90_TRISTAR_BI_BB_USB_P
90_TRISTAR_BI_BB_USB_N
TRISTAR_TO_PMU_USB_BRICKID
90_AP_BI_TRISTAR_USB0_P
2
90_AP_BI_TRISTAR_USB0_N
2
AP_TO_TRISTAR_ACC_UART6_TXD
3
TRISTAR_TO_AP_ACC_UART6_RXD
3
AP_TO_TRISTAR_DEBUG_UART0_TXD
3
TRISTAR_TO_AP_DEBUG_UART0_RXD
3
BB_TO_AP_UART2_RXD
3
AP_TO_BB_UART2_TXD
3
TRISTAR_TO_AP_JTAG_SWCLK
2
TRISTAR_BI_AP_JTAG_SWDIO
2
1
2
C1739
0.01UF
10%
6.3V
X5R
01005
ROOM=TRISTAR
CBTL1610A2UK
C3
DIG_DP
C4
DIG_DN
A1
USB1_DP
B1
USB1_DN
C2
BRICK_ID
A3
USB0_DP
B3
USB0_DN
E2
UART0_TX
E1
UART0_RX
F2
UART1_TX
F1
UART1_RX
D2
UART2_TX
D1
UART2_RX
A5
JTAG_CLK
B5
JTAG_DIO
F4
F3
VDD_3V0
VDD_1V8
U1700
WLCSP
CON_DET_L
POW_GATE_EN*
SWITCH_EN
HOST_RESET
DVSS
DVSS
F5C1A6
D5
ROOM=TRISTAR
ACC_PWR
P_IN
ACC1
ACC2
BYPASS
DVSS
A1
VCC
U1703
LM34904
USMD
ENABLE
ACC_DET*
ACC_PWR
GND
B1
18 25
18 25
18 25
18 25
18
TRISTAR_TO_PMU_OVP_SW_EN_L
TRISTAR_TO_PMU_HOST_RESET
A2
C1
POK*
PP_TRISTAR_PIN
1
C1704
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=TRISTAR
ROOM=TRISTAR
PP1722
SM
PP
17 26
PIN FOR HANDSHAKE
P2MM-NSM
HOST_RESET
ACTIVE HIGH
AMBER HAS 100K-300K INT PD
10 12 14 15 16 23 26 31 39 48
51 52
PP3V3_ACC
14
13
PP_TRISTAR_PIN
17 26
D
C
B
2
R1710
10K
12
1/32W
01005
REVERSE_GATE
5%
MF
A
63
S
D
3
0402
CSD68822F4
Q1701
PP5V0_USB
12 14 18 25 26
SYNC_MASTER=N61_MLB
PAGE TITLE
IO:TRISTAR2
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
VIBE_DRIVE_P_CONN
PP5V0_USB
12 14 17 18 25 26
BB_GPIO0_CONN
BB_GPIO2_CONN
BB_GPIO3_CONN
BB_GPIO4_CONN
18
SYNC_DATE=08/26/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
18 OF 55
SHEET
18 OF 54
16 18
18
18
18
18
18
18
18 25 26
17 25
17 25
17 25
17 25
18 25 26
D
C
18
18
18
B
A
SIZE
D
124578
876543
COMPASS - AKM COMPASS IN POR LOCATION
12
D
D
COMPASS CSP: 338S1014
C
PP3V0_IMU
12 26
NOSTUFF
C1903
100PF
5%
16V
NP0-C0G
01005
ROOM=COMPASS
12 19 22 26
PP1V8_OSCAR
ROOM=COMPASS
1
C1902
2.2UF
20%
6.3V
2
X5R
0201-1
B1
VDD
VID
U1901
AK8963C
D1
D2
C2
NC
B3B4
NC
C3
NC
D4
CSP
CAD0
CAD1
TST1
RSVSO
TRG
RST*
VSS
C1
C4
SCL/SK
SDA/SI
CSB*
DRDY
A3
A4
A2
A1
B
1
C1901
0.1UF
20%
4V
2
X5R
01005
ROOM=COMPASS
NOSTUFF
1
C1905
56PF
5%
16V
2
NP0-C0G
01005
ROOM=COMPASS
NOSTUFF
1
C1906
56PF
5%
16V
2
NP0-C0G
01005
ROOM=COMPASS
C1904
100PF
NOSTUFF
5%
16V
NP0-C0G
01005
ROOM=COMPASS
1
2
PP1V8_OSCAR
NOSTUFF
C1907
56PF
5%
16V
NP0-C0G
01005
ROOM=COMPASS
12 19 22 26
OSCAR_TO_IMU_SPI_SCLK
OSCAR_TO_IMU_SPI_MOSI
OSCAR_TO_COMPASS_SPI_CS_L
IMU_TO_OSCAR_SPI_MISO
COMPASS_TO_OSCAR_INT
NOSTUFF
1
C1908
56PF
5%
16V
2
NP0-C0G
01005
ROOM=COMPASS
22
22
22
22
22
C
B
A
63
SYNC_MASTER=N61_MLB
PAGE TITLE
SENSORS:COMPASS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=08/26/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
19 OF 55
SHEET
19 OF 54
124578
SIZE
A
D
876543
12
LCD B2B
Backlight
D
C
(N56 HAS A 2ND SET OF BL SIGNALS ON P. 19).
FL2024
15 26 20 25 26
15 26 20 25 26
15 26 20 25 26
PP_LCM_BL_ANODE
PP_LCM_BL_CAT1
PP_LCM_BL_CAT2
ROOM=LCM_B2B
FL2025
240-OHM-0.2A-0.8-OHM
ROOM=LCM_B2B
FL2026
240-OHM-0.2A-0.8-OHM
ROOM=LCM_B2B
240-OHM-0.2A-0.8-OHM
0201-2
0201-2
0201-2
21
1
C2017
2
ROOM=LCM_B2B
21
1
C2018
2
ROOM=LCM_B2B
21
1
C2019
2
ROOM=LCM_B2B
100PF
5%
25V
NP0-C0G
01005
100PF
5%
25V
NP0-C0G
01005
100PF
5%
25V
NP0-C0G
01005
PP_LCM_BL_ANODE_CONN
PP_LCM_BL_CAT1_CONN
PP_LCM_BL_CAT2_CONN
LCM Supplies
FL2027
PP1V8
2 3 5 6 7
10 11 12 13 15 23 24
25 26 27
ROOM=LCM_B2B
B
FL2061
70-OHM-300MA
80-OHM-0.2A-0.4-OHM
PN5V7_SAGE_AVDDN
15 24 26
PP5V7_LCM_AVDDH
C2070
2.2UF
6.3V
0201-1
ROOM=LCM_B2B
C2051
2.2UF
6.3V
0201-1
1
C2050
2
2.2UF
0201-1
ROOM=LCM_B2B
6.3V
20%
X5R
1
20%
2
X5R
ROOM=LCM_B2B
21
ROOM=LCM_B2B
ROOM=LCM_B2B
FL2037
80-OHM-0.2A-0.4-OHM
1
20%
2
X5R
0201-2
01005-1
0201-2
C2071
ROOM=LCM_B2B
2.2UF
6.3V
0201-1
20%
X5R
21
21
1
2
1
2
ROOM=LCM_B2B
1
2
C2039
0.1UF
10%
6.3V
CERM-X5R
0201
ROOM=LCM_B2B
C2044
100PF
NP0-C0G
01005
5%
16V
PP1V8_LCM_CONN
1
C2040
100PF
NP0-C0G
2
01005
ROOM=LCM_B2B
PN5V7_LCM_AVDDN_CONN
PP5V7_LCM_AVDDH_CONN
1
C2094
100PF
NP0-C0G
2
01005
ROOM=LCM_B2B
20 26
5%
16V
20 26
20 26 15 26
5%
16V
PP_LCM_BL_CAT2_CONN
20 25 26 20 25 26
90_AP_TO_LCM_MIPI_DATA2_CONN_N
20
90_AP_TO_LCM_MIPI_DATA2_CONN_P
20
90_AP_TO_LCM_MIPI_CLK_CONN_N
20
90_AP_TO_LCM_MIPI_CLK_CONN_P
20
90_AP_TO_LCM_MIPI_DATA1_CONN_N
20
90_AP_TO_LCM_MIPI_DATA1_CONN_P
20
90_AP_TO_LCM_MIPI_DATA0_CONN_N
20
90_AP_TO_LCM_MIPI_DATA0_CONN_P
20
PP1V8_LCM_CONN
20 26
Digital Interfaces
AP_BI_I2C2_SDA
3
11
AP_TO_I2C2_SCL
11
3
LCM_TO_CHESTNUT_PWR_EN
13 15
AP_TO_LCM_RESET_L
7
PMU_TO_PHOTON_ALIVE
THIS ONE ON MLB --->
24-5857-030-001-829
R2052
100K
1/32W
01005
ROOM=LCM_B2B
J2019
F-ST-SM
35
3132
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
33
36
FL2039
120-OHM-210MA
21
ROOM=LCM_B2B
FL2066
120-OHM-210MA
21
ROOM=LCM_B2B
FL2035
120-OHM-210MA
21
ROOM=LCM_B2B
FL2036
120-OHM-210MA
21
1
ROOM=LCM_B2B
1%
MF
2
FL2050
120-OHM-210MA
21
01005
ROOM=LCM_B2B
01005
01005
01005
01005
516S1164
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
34
PP_LCM_BL_ANODE_CONN
PP_LCM_BL_CAT1_CONN
NC
LCD_TO_AP_PIFA_CONN
PMU_TO_PHOTON_ALIVE_CONN
LCM_TO_AP_HIFA_BSYNC_CONN
AP_TO_LCM_RESET_CONN_L
LCM_TO_CHESTNUT_PWR_EN_CONN
AP_TO_I2C2_SCL_CONN
AP_BI_I2C2_SDA_CONN
SAGE_TO_TOUCH_VCPL_REF_CONN
SAGE_TO_TOUCH_VCPH_REF_CONN
PP5V7_LCM_AVDDH_CONN
PN5V7_LCM_AVDDN_CONN
TOUCH_TO_SAGE_VCM_IN_CONN
1
C2089
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
1
C2090
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
LCM_TO_CHESTNUT_PWR_EN_CONN
1
C2093
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
1
C2000
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
PMU_TO_PHOTON_ALIVE_CONN
1
C2095
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
AP_BI_I2C2_SDA_CONN
AP_TO_I2C2_SCL_CONN
AP_TO_LCM_RESET_CONN_L
20 25 26
20 25
20
20
20
20
20
20
20
20
20 26
20 26
20
MIPI Common Mode Chokes
(N56 HAS A 4TH MIPI LANE ON P. 19).
L2044
90-OHM-0.1A-0.7-3GHZ
TAM0605
SYM_VER-1
TAM0605
SYM_VER-1
TAM0605
SYM_VER-1
TAM0605
SYM_VER-1
4
90_AP_TO_LCM_MIPI_CLK_CONN_P
32
90_AP_TO_LCM_MIPI_CLK_CONN_N
4
90_AP_TO_LCM_MIPI_DATA0_CONN_P
32
90_AP_TO_LCM_MIPI_DATA0_CONN_N
4
90_AP_TO_LCM_MIPI_DATA1_CONN_P
32
90_AP_TO_LCM_MIPI_DATA1_CONN_N
4
90_AP_TO_LCM_MIPI_DATA2_CONN_P
32
90_AP_TO_LCM_MIPI_DATA2_CONN_N
20
D
20
20
20
20
20
20
20
90_AP_TO_LCM_MIPI_CLK_P
7
90_AP_TO_LCM_MIPI_CLK_N
7
90_AP_TO_LCM_MIPI_DATA0_P
7
90_AP_TO_LCM_MIPI_DATA0_N
7
90_AP_TO_LCM_MIPI_DATA1_P
7
90_AP_TO_LCM_MIPI_DATA1_N
7
90_AP_TO_LCM_MIPI_DATA2_P
7
90_AP_TO_LCM_MIPI_DATA2_N
7
1
ROOM=LCM_B2B
L2043
90-OHM-0.1A-0.7-3GHZ
1
ROOM=LCM_B2B
L2042
90-OHM-0.1A-0.7-3GHZ
1
ROOM=LCM_B2B
L2041
90-OHM-0.1A-0.7-3GHZ
1
ROOM=LCM_B2B
C
Sync/Reset/Debug
20
20
20
LCM_TO_AP_HIFA_BSYNC
7
24
Touch
TOUCH_TO_SAGE_VCM_IN
24 20
20
ROOM=LCM_B2B
SAGE_TO_TOUCH_VCPH_REF
24
SAGE_TO_TOUCH_VCPL_REF
24 20
20 13
C2087
2.2UF
6.3V
0201-1
1
C2088
2
2.2UF
6.3V
0201-1
ROOM=LCM_B2B
20%
X5R
120-OHM-210MA
1
20%
2
X5R
FL2034
21
01005
ROOM=LCM_B2B
FL2001
120-OHM-210MA
21
01005
ROOM=LCM_B2B
R2008
0.00
12
0%
1/32W
MF
01005
ROOM=LCM_B2B
R2009
0.00
12
0%
1/32W
MF
01005
ROOM=LCM_B2B
LCM_TO_AP_HIFA_BSYNC_CONN
1
C2001
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
TOUCH_TO_SAGE_VCM_IN_CONN
1
C2002
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
SAGE_TO_TOUCH_VCPH_REF_CONN
SAGE_TO_TOUCH_VCPL_REF_CONN
20
B
20
A
63
LCD_TO_AP_PIFA_CONN
1
C2058
56PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
20 25
SYNC_MASTER=N61_MLB
PAGE TITLE
DISPLAY:FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=08/26/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
20 OF 55
SHEET
20 OF 54
124578
SIZE
A
D
876543
12
MESA CONNECTOR
MLB: 516S1278
J2118
MESA_TO_BOOST_EN_CONN
21
AP_BI_I2C1_SDA_MESA_CONN
D
R2160
BUTTON_TO_AP_MENU_KEY_L
3
13
C
1
C2167
27PF
5%
16V
2
NP0-C0G
01005
ROOM=MAMBA_MESA_B2B
VOUT
MESA 1.8V LDO
RDAR://15792924
A2
26
1
2
C2181
2.2UF
20%
6.3V
X5R
0201-1
ROOM=MESA
U2100
LP5907UVX-1.8
DSBGA
PP3V0_MESAPP1V8_MESA
PP16V5_MESA
15 25 26
1
C2180
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=MESA
A1
VIN
B1
VEN
GND
ROOM=MESA
B2
B
MESA_TO_BOOST_EN
15 25 21
ROOM=MAMBA_MESA_B2B
NOTE: 0.45OHM DCR
FL2119
PP3V0_MESA
12 21 26
1
C2132
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=MAMBA_MESA_B2B
1
C2133
2.2UF
20%
6.3V
2
X5R
0201-1
70-OHM-300MA
21
1
C2134
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=MAMBA_MESA_B2BROOM=MAMBA_MESA_B2B
01005-1
ROOM=MAMBA_MESA_B2B
12
0.00
ROOM=MAMBA_MESA_B2B
FL2133
70-OHM-300MA
01005-1
FL2156
70-OHM-300MA
01005-1
R2166
681
12
1%
1/32W
MF
01005
1
C2105
0.1UF
20%
4V
2
X5R
01005
ROOM=MAMBA_MESA_B2B
01005
ROOM=MAMBA_MESA_B2B
21
ROOM=MAMBA_MESA_B2B
21
C2116
56PF
16V
01005
BUTTON_TO_AP_MENU_KEY_L_CONN
1
NOSTUFF
0201
5.5V-6.2PF
DZ2110
ROOM=MAMBA_MESA_B2B
2
PP1V8_MESA_CONN
1
C2184
100PF
5%
16V
NP0-C0G
2
01005
ROOM=MAMBA_MESA_B2B
PP16V5_MESA_CONN
1
C2110
100PF
5%
25V
2
NP0-C0G
01005
MESA_TO_BOOST_EN_CONN
1
ROOM=MAMBA_MESA_B2B
5%
2
PP3V0_MESA_CONN
C2119
100PF
5%
16V
NP0-C0G
01005
ROOM=MAMBA_MESA_B2B
21
21 26 12 21 26
21 26
MESA SENSOR:
21 26
21
BUTTON_TO_AP_MENU_KEY_L_CONN
21
MESA_TO_AP_INT_CONN
21
AP_TO_MESA_SPI_MOSI
3
AP_TO_MESA_SPI_CLK
3
MESA_TO_AP_SPI_MISO
3
AP_BI_I2C1_SDA
3
14 16
24-5857-016-201-829
0.00
F-ST-SM
21
17
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
19
20
22
ROOM=MAMBA_MESA_B2B
01005
FL2132
120-OHM-210MA
21
R2163
12
01005
120-OHM-210MA
21
01005
120-OHM-210MA
21
ROOM=MAMBA_MESA_B2B
01005
FL2150
FL2159
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
AP_TO_I2C1_SCL_MESA_CONN
1
C2103
56PF
5%
16V
2
01005
PP3V0_MESA_CONN
PP16V5_MESA_CONN
PP1V8_MESA_CONN
AP_TO_MESA_SPI_CLK_CONN
AP_TO_MESA_SPI_MOSI_CONN
MESA_TO_AP_SPI_MISO_CONN
AP_TO_MESA_SPI_MOSI_CONN
AP_TO_MESA_SPI_CLK_CONN
MESA_TO_AP_SPI_MISO_CONN
AP_BI_I2C1_SDA_MESA_CONN
1
C2100
56PF
5%
16V
2
01005
ROOM=MAMBA_MESA_B2B
21
21 26
21 26
21 26
21
21
21
1
C2126
56PF
5%
16V
2
01005
ROOM=MAMBA_MESA_B2B
21
21
21
21
1
C2198
56PF
5%
16V
2
01005
ROOM=MAMBA_MESA_B2B
D
C
B
R2167
MESA_TO_AP_INT
3
ROOM=MAMBA_MESA_B2B
A
3
14 16
AP_TO_I2C1_SCL
681
1%
1/32W
MF
01005
FL2179
120-OHM-210MA
01005
ROOM=MAMBA_MESA_B2B
C2149
56PF
NP0-C0G
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
01005
C2179
56PF
NP0-C0G
01005
1
5%
16V
2
AP_TO_I2C1_SCL_MESA_CONN
1
5%
16V
2
MESA_TO_AP_INT_CONN
21
21
63
PAGE TITLE
SENSORS:MESA FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
21 OF 55
SHEET
21 OF 54
124578
SIZE
A
D
876543
OSCAR + SENSORS
OSCAR VDDIO = 1.8V ALWAYS ON (NEED TO WAKE HOST & RUN PLL)
OSCAR CORE = 1.2V ALWAYS ON (NEED TO RUN IN S2RAM)
THIS IS OUTSIDE OF SHIELD IN
TO THE RIGHT OF THE NAND
15
13
12
PHOSPHORUS
PP1V8_OSCAR
1
1
C2250
1.0UF
20%
6.3V
X5R
0201-1
ROOM=PHOSPHORUS
B
OSCAR_TO_IMU_SPI_MOSI
19 22
OSCAR_TO_IMU_SPI_SCLK
19 22
OSCAR_TO_PHOSPHORUS_SPI_CS_L
22
NOSTUFF
1
C2256
56PF
5%
16V
2
01005
ROOM=PHOSPHORUS
NOSTUFF
1
C2241C2201
56PF
5%
16V
2
01005
ROOM=PHOSPHORUS
NOSTUFF
1
56PF
5%
16V
2
01005
ROOM=PHOSPHORUS
VDDIO
VDD
U2204
BMP282AC
3
SDI
4
SCK
2
CS*
5
LGA
SDO
GND
1876
A
C2251
0.1UF
20%
4V
2
2
X5R
01005
ROOM=PHOSPHORUS
1
C2255
56PF
5%
16V
2
01005
ROOM=PHOSPHORUS
NOSTUFF
SYNC_MASTER=N61_MLB
PAGE TITLE
IMU_TO_OSCAR_SPI_MISO
SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=08/26/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
23 OF 55
SHEET
23 OF 54
SIZE
A
D
124578
876543
PN5V7_SAGE_AVDDN
15 20 26
PP5V7_SAGE_AVDDH
15 24 26
C2438
0.33UF
TANT
0402
C2436
0.01UF
6.3V
01005
C2404
0.01UF
X5R-CERM
0201
20%
20V
10%
X5R
10%
25V
C2414
Touch (B2B, Driver ICs)
Cumulus
Turn on is later than PP1V8_GRAPE
Turn off is same time as PP1V8_GRAPE
PP5V1_GRAPE_VDDH
15 26
D
C2402
Follow Touch routing guidelines
Cumulus sense nets are sensitive
issue. Validate issue is resolved
with Meson and replace with
0402 ceramics.
I2C pull-ups
PP1V8_GRAPE
12 24 26
TOUCH_I2C_SDA
24
TOUCH_I2C_SCL
24
45_PROX_TO_CUMULUS_RX_IN
1
C2416
27PF
5%
16V
2
NP0-C0G
01005
1
R2420
1.8K
5%
1/32W
MF
01005
2
C2439
0.1UF
24
R2410
1
R2421
1.8K
5%
1/32W
MF
01005
2
24
24
3
3
7
24
24
24
24
24
20 24
3
24
20%
X5R
01005
220K
1/32W
01005
TOUCH_TO_SAGE_SENSE_IN<7>
24
TOUCH_TO_SAGE_SENSE_IN<9>
24
TOUCH_TO_SAGE_SENSE_IN<10>
24
TOUCH_TO_SAGE_SENSE_IN<8>
24
TOUCH_TO_SAGE_SENSE_IN<11>
24
TOUCH_TO_SAGE_SENSE_IN<2>
24
TOUCH_TO_SAGE_SENSE_IN<4>
24
TOUCH_TO_SAGE_SENSE_IN<3>
24
TOUCH_TO_SAGE_SENSE_IN<1>
24
TOUCH_TO_SAGE_SENSE_IN<0>
24
TOUCH_TO_SAGE_SENSE_IN<6>
24
TOUCH_TO_SAGE_SENSE_IN<5>
24
SAGE_TO_CUMULUS_IN<7>
24
SAGE_TO_CUMULUS_IN<9>
24
SAGE_TO_CUMULUS_IN<10>
24
SAGE_TO_CUMULUS_IN<8>
24
SAGE_TO_CUMULUS_IN<11>
24
SAGE_TO_CUMULUS_IN<2>
24
SAGE_TO_CUMULUS_IN<4>
24
SAGE_TO_CUMULUS_IN<3>
24
SAGE_TO_CUMULUS_IN<1>
24
SAGE_TO_CUMULUS_IN<0>
24
SAGE_TO_CUMULUS_IN<6>
24
SAGE_TO_CUMULUS_IN<5>
24
SAGE_VBIAS
1
4V
2
TOUCH_I2C_SDA
24
TOUCH_I2C_SCL
24
LCM_TO_AP_HIFA_BSYNC
7
20 24
CUMULUS_TO_SAGE_BOOST_CLK_EN
1
5%
MF
2
PP_SAGE_VBST_OUTH
24 26
PN_SAGE_VBST_OUTL
24 26
PP_SAGE_LX
24 26
PP_SAGE_LY
24 26
SAGE_TO_TOUCH_VCPH_REF
20 24
SAGE_TO_TOUCH_VCPL_REF
20 24
PN_SAGE_TO_TOUCH_VCPL_FILT
24 26
PP_SAGE_TO_TOUCH_VCPH
24 26
PN_SAGE_VCPL_F
24 26
Meson decoupling
PP_SAGE_VBST_OUTH
24 26
PP5V7_SAGE_AVDDH
15 24 26
PN_SAGE_VBST_OUTL
24 26
C2407
1UF-10OHM
20%
25V
TANT
0603-LLP2
SAGE_TO_TOUCH_VCPH_REF
20 24
SAGE_TO_TOUCH_VCPL_REF
20 24
PP_SAGE_TO_TOUCH_VCPH
24 26
PN_SAGE_VCPL_F
24 26
10UF
X5R-CERM
0402-8
1
2
2
1
1
2
1
2
1
20%
10V
2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
C2410
1000PF
X7R-CERM
0201
C2411
1000PF
X7R-CERM
0201
C2437
0.01UF
6.3V
01005
C2440
1.0UF
X5R-CERM
0201
C2409
B10
C10
D10
E10
10%
25V
10%
25V
10%
X5R
20%
16V
1
10UF
20%
10V
2
X5R-CERM
0402-8
E5
SNS_IN0
D5
SNS_IN1
C5
SNS_IN2
B5
SNS_IN3
A5
SNS_IN4
A7
SNS_IN5
A9
SNS_IN6
B7
SNS_IN7
C7
SNS_IN8
D7
SNS_IN9
E7
SNS_IN10
B9
SNS_IN11
C9
SNS_IN12
D9
SNS_IN13
E9
SNS_IN14
E6
SNS_OUT0
D6
SNS_OUT1
C6
SNS_OUT2
B6
SNS_OUT3
A4
SNS_OUT4
A6
SNS_OUT5
A8
SNS_OUT6
B8
SNS_OUT7
C8
SNS_OUT8
D8
SNS_OUT9
E8
SNS_OUT10
SNS_OUT11
SNS_OUT12
SNS_OUT13
SNS_OUT14
D3
VBIAS
J2
I2C_SDA
J3
I2C_SCL
G5
TEST_MUX0
H5
TEST_MUX1
L3
TEST_MUX2
M3
TESTMODE
M1
BSYNC/SCAN_RESET
M2
SCAN CLK
L2
SCANOUT
L1
STEP_CLK/SCAN_IN
K4
GCM
L4
BOOST_EN/SCAN_EN
A2
PLDO_SUP_IN
B1
VBST_OUTH
E1
VBST_OUTL
C1
LX
D1
LY
F1
NLDO_SUP_IN
B2
VCPH_REF_EN
F2
VCPL_REF_EN
G1
VCPL
A3
VCPH
E2
VCPL_F
K3
I2C_SLV_ADDR0
K2
I2C_SLV_ADDR1
AGND1
1
2
PN_SAGE_TO_TOUCH_VCPL_FILT
24 26
1
2
1
2
1
2
G3
AVDDH4
AVDDH5
AVDDL
J1
N3
VDDIO
VDDIO
D4
D2G2G6
F3
AVDDH2
AVDDH1
AVDDH3
K1
VDDIO_OSC
U2402
MESON-A1
CSP
AGND2
AGND2
AGND3
AGND3
AGND4
AGND4
AGND4
C2C4F7E3L5F9H6M6G4
10-OHM-750MA
1
2
SYNC_MASTER=N/A
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
AUX_PLDO_OUT
AUX_NLDO_OUT
AGND5
C2490
100PF
5%
25V
NP0-C0G
01005
PP1V8
2 3 5 6 7
10 11 12 13 15 20 23
1
C2415
0.1UF
20%
6.3V
2
X5R-CERM
01005
DRV_OUT0
DRV_OUT1
DRV_OUT2
DRV_OUT3
DRV_OUT4
DRV_OUT5
DRV_OUT6
DRV_OUT7
DRV_OUT8
DRV_OUT9
DRV_OUT10
DRV_OUT11
DRV_OUT12
DRV_OUT13
DRV_OUT14
DRV_OUT15
DRV_OUT16
DRV_OUT17
DRV_OUT18
DRV_OUT19
DRV_OUT20
DRV_OUT21
DRV_OUT22
DRV_OUT23
DRV_OUT24
DRV_OUT25
DRV_OUT26
DRV_OUT27
DRV_IN P
DRV_IN N
VCM_IN_0
VCM_IN_1
AUX_BUF_IN
AUX_BUF_OUT
DGND
DGND
J4
N2
FL2486
01005-1
25 26 27
MESON A1
APN: 343S0694
G7
SAGE_TO_TOUCH_VSTM_OUT<22>
H7
SAGE_TO_TOUCH_VSTM_OUT<16>
J6
SAGE_TO_TOUCH_VSTM_OUT<15>
J7
SAGE_TO_TOUCH_VSTM_OUT<17>
K7
SAGE_TO_TOUCH_VSTM_OUT<12>
L7
SAGE_TO_TOUCH_VSTM_OUT<14>
M7
SAGE_TO_TOUCH_VSTM_OUT<8>
N7
SAGE_TO_TOUCH_VSTM_OUT<2>
G8
SAGE_TO_TOUCH_VSTM_OUT<21>
H8
SAGE_TO_TOUCH_VSTM_OUT<0>
J8
SAGE_TO_TOUCH_VSTM_OUT<13>
K8
SAGE_TO_TOUCH_VSTM_OUT<1>
L8
SAGE_TO_TOUCH_VSTM_OUT<5>
M8
SAGE_TO_TOUCH_VSTM_OUT<4>
N8
SAGE_TO_TOUCH_VSTM_OUT<6>
K9
SAGE_TO_TOUCH_VSTM_OUT<10>
G9
SAGE_TO_TOUCH_VSTM_OUT<23>
H9
SAGE_TO_TOUCH_VSTM_OUT<18>
J9
SAGE_TO_TOUCH_VSTM_OUT<20>
G10
SAGE_TO_TOUCH_VSTM_OUT<19>
L9
SAGE_TO_TOUCH_VSTM_OUT<9>
M9
SAGE_TO_TOUCH_VSTM_OUT<7>
N9
SAGE_TO_TOUCH_VSTM_OUT<3>
K10
SAGE_TO_TOUCH_VSTM_OUT<11>
H10
NC
J10
NC
L10
NC
M10
NC
L6
CUMULUS_TO_MESON_VSTM_OUT_P
K6
CUMULUS_TO_MESON_VSTM_OUT_N
A1
PBKG
B4
PBKG
A10
PBKG
B3
PBKG
C3
PBKG
F6
PBKG
F10
PBKG
H1
PBKG
H2
PBKG
H3
PBKG
H4
PBKG
N10
PBKG
F4
PBKG
N1
PBKG
F5
PBKG
K5
PBKG
N6
PBKG
E4
J5
F8
GO
M4
M5
N5
N4
21
PP_SAGE_LXPP_SAGE_LY
24 26 24 26
R2434
TOUCH_TO_MESON_VCM_IN0
TOUCH_TO_MESON_VCM_IN1
NC
NC
NC
Meson VCPL rail:
Effective impedance of 3 Ohms,
at 115 kHz with 12 V bias.
1
C2405
2.2UF
20%
25V
2
X5R
0402-3
10UH-20%-0.23A-1.56OHM
21
TOUCH:CUMULUS,MESON
Apple Inc.
R
63
12
TOUCH_TO_SAGE_VCM_IN
121
0.00
1/32W
01005
R2435
0.00
0%
MF
2
0%
1/32W
MF
01005
MESON_TO_TOUCH_GUARD
PN_SAGE_TO_TOUCH_VCPL
1
C2408C2441
1UF
10%
16V
2
X6S-CERM
0402
1
2
L2401
PSB1614FE
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
24 OF 55
SHEET
24 OF 54
124578
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24 26
0.1UF
10%
16V
X5R-CERM
0201
SYNC_DATE=N/A
7.0.0
SIZE
D
C
20
B
A
D
876543
BATT CONN, TPS, STANDOFFS/SHIELDS/FIDUCIALS
12
POWER TP
TP2501
PP5V0_USB
12 14 17 18 26
D
C
B
PP_BATT_VCC
14 16 25 26 40 45 46
1
C2560
100PF
5%
16V
2
NP0-C0G
01005
ROOM=BATTERY_B2B
120-OHM-210MA
BATTERY_SWI
14
FIDUCIALS
1
C2549
15PF
5%
16V
2
NP0-C0G-CERM
01005
ROOM=BATTERY_B2B
FL2511
01005
ROOM=BATTERY_B2B
FD2501
FID
0P5SM1P0SQ-NSP
1
FD2502
FID
0P5SM1P0SQ-NSP
1
FD2503
FID
0P5SM1P0SQ-NSP
1
FD2504
FID
0P5SM1P0SQ-NSP
1
FD2505
FID
0P5SM1P0SQ-NSP
1
FD2506
FID
0P5SM1P0SQ-NSP
1
21
1
2
1
C2550
33PF
5%
16V
2
NP0-C0G-CERM
01005
ROOM=BATTERY_B2B
BATTERY_SWI_CONN
25
C2579
56PF
5%
16V
NP0-C0G
01005
ROOM=BATTERY_B2B
BATTERY CONN
THIS ONE ON MLB --->
ROOM=BATTERY_B2B
RCPT-BATT-2BLADES-0.90
J2523
F-SM-SM
11
1
3
5
6
9
14
12
7
2
4
8
10
13
516S1239 RCPT
SHIELDS
SH2501
SHLD-EMI-UPPER-FRONT-N61
SH2502
SHLD-EMI-LOWER-FRONT-N61
SH2503
SHLD-EMI-UPPER-EXT-N61
SH2504
SHLD-N61-EMI-LOWER-BACK-TALL
SH2506
SHLD-EMI-SA-N61
OMIT_TABLE
SM
806-8537
OMIT_TABLE
806-8538
SM
SM
806-00230
OMIT_TABLE
806-00424
SM
OMIT_TABLE
806-8541
SM
C2509
1
100PF
5%
16V
NP0-C0G
2
01005
ROOM=BATTERY_B2B
BATTERY_SWI_CONN
SH2505
SHLD-SNOUT-1-N61
CKPLUS_WAIVE=TERMSHORTED
806-7014
PCB: PLACE XW2512 AT BATT CONN, PIN 7
XW2512
SHORT-10L-0.25MM-SM
21
1
C2575
220PF
10%
10V
2
X7R-CERM
01005
ROOM=BATTERY_B2B
CHARGER_VBATT_SNS
25
ROOM=BATTERY_B2B
1
C2561
220PF
10%
10V
2
X7R-CERM
01005
ROOM=BATTERY_B2B
COWLING
RETENTION-COAX-N61
CL2501
SM
SM
1
NORTH_AC_GND_SCREW
2
CL2502
TH-NSP
SL-1.20X0.40-1.50X0.70-NSP
PP_BATT_VCC
806-8699
8
25 29
12 14
14 16 25 26 40 45 46
1
C2522
56PF
5%
16V
2
NP0-C0G
01005
ROOM=BATTERY_B2B
13 15 17
10 11 12 13 15
PP_BATT_VCC
14 16 25 26 40 45 46
SUPER TP
PMU_TO_TP_AMUX_AY
13
PMU_TO_TP_AMUX_BY
13
RESET
RESET_1V8_L
2 4
FORCE_DFU
3
PP1V8
2 3 5 6 7
20 23 24 26 27
1
TP-P6
TP2512
TP-P6
TP2539
TP-P55
TP2513
TP-P6
TP2545
TP-P55
TP2506
1
TP-P55
TP2507
1
TP-P55
TP2508
1
TP-P55
DFU
TP2509
1
TP-P55
PP2510
P4MM
SM
PP
A
VBUS
A
POWER GROUND
VBAT
A
A
A
A
ANALOG MUX A OUTPUT
A
ANALOG MUX B OUTPUT
A
H6P & BB RESET
A
FORCE DFU
TESTPOINTS
MOJAVE TP
MESA_TO_BOOST_EN
15 21
PP16V5_MESA
15 21 26
E75 - USB/UART/ID/POWER
90_TRISTAR_BI_E75_PAIR1_CONN_P
17 18
90_TRISTAR_BI_E75_PAIR1_CONN_N
17 18
90_TRISTAR_BI_E75_PAIR2_CONN_P
17 18
90_TRISTAR_BI_E75_PAIR2_CONN_N
17 18
PP_E75_TO_TRISTAR_ACC1_CONN
18 26
PP_E75_TO_TRISTAR_ACC2_CONN
18 26
E75_TO_TRISTAR_CON_DETECT_CONN
18
LCM BACKLIGHT
PP_LCM_BL_CAT1_CONN
20 26
PP_LCM_BL_CAT2_CONN
20 26
PP_LCM_BL_ANODE_CONN
20 26
LCD_TO_AP_PIFA_CONN
20
TP2569
TP2570
TP2521
TP2522
TP2523
TP2524
TP2526
TP2527
TP2535
TP2510
TP2518
1
TP-P55
TP2519
1
TP-P55
TP2520
1
TP-P55
TP2517
1
TP-P55
1
A
TP-P55
1
A
TP-P55
A
TP-P55
1
A
TP-P55
1
A
TP-P55
1
A
TP-P55
A
TP-P55
1
A
TP-P55
A
TP IS TO HELP WITH USB SI
TP-P55
IN THE FACTORY FIXTURE.
1
A
TP-P55
A
A
A
A
FOR DIAGS
LCD BACKLIGHT SINK1
LCD BACKLIGHT SINK2
LCD BACKLIGHT SOURCE
LCD PIFA TEST POINT
D
C
B
860-3948
STDOFF-MLB-UNPLATED-0.85-N61-SM
BS2503
A
860-3948
STDOFF-MLB-UNPLATED-0.85-N61-SM
BS2501
SCREW HOLES + STANDOFFS
860-7862
STDOFF-2.70OD1.84ID-0.88H-TH
STDOFF-MLB-UNPLATED-0.85-N61-SM
BS2512
860-3948
BS2502
50_AP_UAT_FEED
29
AP_TO_STOCKHOLM_ANT
29
STDOFF-2.55OD1.4ID-0.99H-SM
STDOFF-2.6OD0.5H-0.5-1.7-TH
BS2511
1
BS2504
NORTH_AC_GND_SCREW
8
25 29
1
C2501
4.7PF
+/-0.1PF
16V
2
NP0-C0G
01005
ROOM=ASSEMBLY
1
C2523
220PF
10%
10V
2
X7R-CERM
01005
ROOM=ASSEMBLY
860-8396
50_AP_WIFI_5G_CONN_ANT
29
STDOFF-2.2OD0.25H-0.50-1.70
STDOFF-2.70OD1.84ID-0.88H-TH
BS2510
BS2509
860-7846
860-7862860-7861
1
C2510
220PF
10%
10V
2
X7R-CERM
01005
ROOM=ASSEMBLY
1
C2511
56PF
5%
16V
2
NP0-C0G
01005
ROOM=ASSEMBLY
63
SYNC_MASTER=N61_MLB
PAGE TITLE
POWER:BATT CONN,TPS,PD FEATURES
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=08/26/2013
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
25 OF 55
SHEET
25 OF 54
124578
SIZE
A
D
876543
VOLTAGE PROPERTIES
12
I55
I56
D
C
B
A
I57
I58
I60
I59
I61
I64
I65
I67
I66
I68
I70
I69
I71
I72
I73
I77
I76
I75
I74
I78
I79
I80
I81
I82
I83
I87
I86
I85
I88
I89
I90
I91
I92
I96
I93
I97
I98
I99
I100
I101
I103
I140
I104
I106
I105
I107
I108
I109
I110
I111
I113
I112
I114
I116
I115
I117
I118
I120
I119
I121
I122
I126
I124
I125
I123
I127
I128
I129
I130
I131
I132
I133
I134
I136
I135
I137
I138
VOLTAGE=3.3V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=3.0V
VOLTAGE=3.0V
VOLTAGE=3.0V
VOLTAGE=3.0V
VOLTAGE=4.6V
VOLTAGE=1.0V
VOLTAGE=3.0V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=1.1V
VOLTAGE=1.1V
VOLTAGE=1.2V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.2V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.2V
VOLTAGE=5.0V
VOLTAGE=5.0V
VOLTAGE=22.0V
VOLTAGE=0.2V
VOLTAGE=0.2V
VOLTAGE=0.2V
VOLTAGE=0.2V
VOLTAGE=-5.7V
VOLTAGE=1.2V
VOLTAGE=3.0V
VOLTAGE=6V
VOLTAGE=5.0V
VOLTAGE=5.0V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=2.2V
VOLTAGE=2.5V
VOLTAGE=2.5V
VOLTAGE=2.5V
VOLTAGE=0.2V
VOLTAGE=2.5V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=1.2V
VOLTAGE=5.0V
VOLTAGE=5.0V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=4.6V
VOLTAGE=6.0V
VOLTAGE=6.0V
VOLTAGE=6.0V
VOLTAGE=5.7V
VOLTAGE=5.7V
VOLTAGE=5.1V
VOLTAGE=22.0V
VOLTAGE=18.0V
VOLTAGE=17.0V
VOLTAGE=16.5V
VOLTAGE=8.0V
VOLTAGE=8.0V
VOLTAGE=1.8V
VOLTAGE=1.8V
PP_E75_TO_TRISTAR_ACC1_CONN
PP_STRB_DRIVER_TO_LED_WARM
PP_STRB_DRIVER_TO_LED_COOL
PP_CODEC_TO_FRONTMIC3_BIAS
PP_CODEC_TO_REARMIC2_BIAS
PP_CODEC_TO_FRONTMIC3_BIAS_CONN
PP3V3_USB
PP1V8_VA_L19_L67
PP3V0_TRISTAR
PP3V0_IMU
PP3V0_NAND
PP3V3_ACC
PP3V0_PROX_ALS
PP_VCC_MAIN
PP1V0
PP3V0_PROX_IRLED
PP1V8_ALWAYS
PP3V0_MESA
PP_CPU
PP_GPU
PP1V2_SDRAM
PP1V8_SDRAM
PP1V8
PP1V8_GRAPE
PP1V8_OSCAR
PP1V2_NAND_VDDI
PP_EXTMIC_BIAS_FILT_IN
BOARD_ID2
PP1V2
PP_E75_TO_TRISTAR_ACC1
PP_LCM_BL_ANODE
PP_LCM_BL_CAT2
PP_LCM_BL_CAT1
PP_LCM_BL_CAT2_CONN
PP_LCM_BL_CAT1_CONN
PN5V7_SAGE_AVDDN
PP1V2_OSCAR
PP3V0_MESA_CONN
PP6V0_LCM_BOOST
PP_CODEC_TO_MIC1_BIAS
PP_EXTMIC_BIAS_IN
PP_EXTMIC_BIAS_FILT
PP_CODEC_FILT+
PP_CODEC_SPKR_VQ
PP_CODEC_VCPFILT-
PP_CODEC_VCPFILT+
PP_CODEC_VHP_FLYN
PP_CODEC_VHP_FLYC
PP_CODEC_VHP_FLYP
PP1V8_FCAM_CONN
PP2V85_FCAM_AVDD_CONN
PP3V0_ALS_CONN
PP1V2_FCAM_VDDIO_CONN
PP5V0_USB
PP5V0_USB_TO_PMU
PP_BUCK5_LX0
PP_BUCK3_LX
PP_BUCK4_LX
PP_BUCK2_LX
PP_BUCK1_LX1
PP_BUCK1_LX0
PP_BUCK0_LX3
PP_BUCK0_LX2
PP_BUCK0_LX1
PP_BUCK0_LX0
PP_CHESTNUT_LXP
PP_CHESTNUT_CP
PP_CHESTNUT_CN
PP5V7_SAGE_AVDDH
PP5V7_LCM_AVDDH
PP5V1_GRAPE_VDDH
PP_WLED_LX
PP18V0_MESA_SW
P17V0_MOJAVE_LDOIN
PP16V5_MESA
PP_SPKAMP_SW
PP_L19_VBOOST
PP_SPKAMP_FILT
PP_SPKAMP_LDO_FILT
2
12
10 12 16
12 15 17 29
12 19
6
12
12 17
11 12
10 12 14 15 16 17 23 31 39
48 51 52
7
12
11 12
3 5
12 14
12 21
4
12
4
12
2 4
12 23
3 4
10 12 13 14 15 17 29
10 11 12 13 15 20 23
2 3 5 6 7
24 25 27
12 24
12 19 22
6
10
3
27
2 4 5
11 12
18 25
17 18
15 20
15 20
15 20
20 25
20 25
15 20 24
12 22
21
15
8
16
8
16
10 18
10
10
10 11
8
10
10
10
10
10
10
10
10
11
11
11
11
11
12 14 17 18 25
12
12
12
12
12
12
12
12
12
12
12
15
15
15
15 24
15 20
15 24
15
15
15
15 21 25
16
16
16
16
I1
I2
I4
I5
I7
I8
I10
I11
I12
I13
I16
I17
I143
I20
I21
I23
I24
I25
I26
I27
I28
I30
I29
I33
I35
I34
I38
I37
I40
I41
I42
I43
I44
I46
I48
I47
I50
I51
I52
I53
I54
I141
I147
I148
I149
I150
I151
I152
I154
I153
I155
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
000 SPI0
001 SPI0 TEST MODE
010 NAND
011 NAND TEST MODE
100 NVME
101 NVME TEST MODE
111 FAST SPI
<--- SELECTED
<--- SELECTED
<--- SELECTED
3
3
BOARD_REV0
BOARD_REV2
3
BOARD_ID2
3
26
BOARD_ID1
3
3
BOOT_CONFIG1
R0374
01005
R0324
01005
R0325
01005
MF
MF
12
MF
I6
I13
NOSTUFF
ROOM=SOC
1.00K
12
1/32W
5%
ROOM=SOC
1.00K
12
1/32W
5%
ROOM=SOC
1.00K
1/32W
5%
I11
A
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
63
PP1V8
MAKE_BASE=TRUE
2 3 5 6 7
24 25 26
10 11 12 13 15 20 23
PAGE TITLE
SYSTEM:N61 SPECIFIC
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
27 OF 55
SHEET
27 OF 54
124578
SIZE
B
A
D
876543
12
D
C
D
C
SIZE
B
A
D
B
A
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
63
PAGE TITLE
BLANK
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
28 OF 55
SHEET
28 OF 54
124578
876543
RADIO_MLB HIERARCHICAL SYMBOL
12
D
CELLULAR HOUSE KEEPING
AP_TO_RADIO_ON_L
3
BB_TO_AP_RESET_DET_L
3
PMU_TO_BB_RST_L
AP_TO_BB_RST_L
3
AP_TO_BB_WAKE_MODEM
3
BB_TO_PMU_HOST_WAKE_L
13
BB_TO_AP_IPC_GPIO
3
BB_TO_LEDDRV_GSM_BLANK
16
BB_TO_AP_GPS_SYNC
3
50_AP_BI_BB_HSIC1_DATA
2
50_AP_BI_BB_HSIC1_STB
2
AP_TO_BB_HOST_RDY
3
BB_TO_AP_DEVICE_RDY
3
BB_TO_AP_IPC_GPIO1
C
3
AP_TO_BB_UART2_RTS_L
3
BB_TO_AP_UART2_CTS_L
3
AP_TO_BB_UART2_TXD
3
17
BB_TO_AP_UART2_RXD
3
17
45_AP_TO_BB_I2S3_BCLK
3
AP_TO_BB_I2S3_DOUT
3
BB_TO_AP_I2S3_DIN
3
AP_TO_BB_I2S3_LRCLK
3
OSCAR_TO_BB_UART_TXD
22
BB_TO_OSCAR_UART_RXD
22
POWER
VCC_MAIN, VBAT GOES TO RADIO_MLB DIRECTLY
CHECK ALL PAGES IN RF SIDE!
I325
MAKE_BASE=TRUE
I324
MAKE_BASE=TRUE
I326
MAKE_BASE=TRUE
I327
MAKE_BASE=TRUE
I329
MAKE_BASE=TRUE
I328
MAKE_BASE=TRUE
I331
MAKE_BASE=TRUE
I330
MAKE_BASE=TRUE
I332
MAKE_BASE=TRUE
HSIC IPC
UART IPC
AUDIO I2S
OSCAR UART
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I368
I369
I371
I370
I372
I373
I376
I374
I375
I377
I378
I379
I380
I382
I381
RADIO_ON_L
BB_RESET_DET_L
RF_PMIC_RESET_L
BB_RST_L
AP_WAKE_MODEM
BB_WAKE_HOST_L
BB_IPC_GPIO
GSM_TXBURST_IND
BB_GPS_SYNC
50_BB_HSIC_DATA
50_BB_HSIC_STROBE
BB_HOST_RDY
BB_DEVICE_RDY
BB_IPC_GPIO1
BB_UART_CTS_L
BB_UART_RTS_L
BB_UART_RXD
BB_UART_TXD
BB_I2S_CLK
BB_I2S_RXD
BB_I2S_TXD
BB_I2S_WS
BB_OTHER_RXD
BB_OTHER_TXD
30 32
30 35
30 32 13
30 32
35
30 35
35
35
30 35
30 34
30 34
30 35
30 35
35
30 35
30 35
30 35
30 35
35
30 35
30 35
30 35
30 35
30 35
BB DEBUG INTERFACES
AP_TO_BB_COREDUMP
3
PMU_TO_BB_VBUS_DET
13
B
90_TRISTAR_BI_BB_USB_N
17
90_TRISTAR_BI_BB_USB_P
17
RADIO ANTENNA CONTROL
PP_BB_VDD_2V7
18
BB_GPIO0
18
BB_GPIO2
18
BB_GPIO3
18
BB_GPIO4
18
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I384
I387
I386
I388
I389
I390
I391
I392
I394
BB_CORE_DUMP
BB_USB_VBUS
90_BB_USB_N
90_BB_USB_P
PP_LDO14_RFSW
BB_LAT_GPIO0
BB_LAT_GPIO2
BB_LAT_GPIO3
BB_LAT_GPIO4
30 35
30 34
30 34
30 34
31 41 42
35
35
35
35
PP1V8_SDRAM
3 4
10 12 13 14 15 17 26
WLAN/BT HOUSE KEEPING
45_PMU_TO_WLAN_CLK32K
13
PMU_TO_WLAN_REG_ON
13
WLAN_TO_PMU_HOST_WAKE
13
PMU_TO_BT_REG_ON
13
AP_TO_BT_WAKE
3
BT_TO_PMU_HOST_WAKE
13
AP_TO_WLAN_JTAG_SWCLK
3
AP_TO_WLAN_JTAG_SWDIO
3
WLAN_TO_PMU_PCIE_WAKE_L
13
AP_TO_WLAN_DEVICE_WAKE
3
90_WLAN_TO_AP_PCIE1_RXDP_P
7
90_WLAN_TO_AP_PCIE1_RXDP_N
7
90_AP_TO_WLAN_PCIE1_TXDP_P
7
90_AP_TO_WLAN_PCIE1_TXDP_N
7
90_AP_TO_WLAN_PCIE1_REFCLK1_P
7
90_AP_TO_WLAN_PCIE1_REFCLK1_N
7
WLAN_TO_AP_PCIE1_CLKREQ_L
7
AP_TO_WLAN_PCIE1_RST_L
7
WLAN HSIC IPC
WLAN_TO_AP_UART4_RXD
3
AP_TO_WLAN_UART4_TXD
3
WLAN_TO_AP_UART4_CTS_L
3
AP_TO_WLAN_UART4_RTS_L
3
AP_TO_BT_UART1_RTS_L
3
BT_TO_AP_UART1_CTS_L
3
AP_TO_BT_UART1_TXD
3
BT_TO_AP_UART1_RXD
3
45_AP_TO_BT_I2S1_BCLK
3
AP_TO_BT_I2S1_DOUT
3
BT_TO_AP_I2S1_DIN
3
AP_TO_BT_I2S1_LRCLK
3
OSCAR_TO_RADIO_CONTEXT_A
22
OSCAR_TO_RADIO_CONTEXT_B
22
BT UART IPC
BT AUDIO PCM
POWER
I314
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
OSCAR STATES
MAKE_BASE=TRUE
MAKE_BASE=TRUE
PP_WL_BT_VDDIO_AP
I315
PP_STOCKHOLM_1V8_S2R
I407
I316
I317
I318
HOST_WAKE_WLAN
I319
I320
I321
I333
I334
I335
I336
I337
I340
I338
I339
I342
I341
I344
I343
WLAN_JTAG_SWDCLK
WLAN_JTAG_SWDIO
WLAN_PCIE_WAKE_L
PCIE_DEV_WAKE
90_WLAN_PCIE_TDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_RDP
90_WLAN_PCIE_RDN
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_REFCLK_N
WLAN_PCIE_CLKREQ_L
WLAN_PCIE_PERST_L
I345
I348
I347
WLAN_UART_RTS_L
I346
WLAN_UART_CTS_L
I349
I352
I351
I350
I354
I353
I355
I356
I358
OSCAR_CONTEXT_A
I357
OSCAR_CONTEXT_B
RFFE_VIO_S2R
WLAN_REG_ON
HOST_WAKE_BT
WLAN_UART_TXD
WLAN_UART_RXD
BT_UART_CTS_L
BT_UART_RTS_L
CLK32K_AP
BT_REG_ON
WAKE_BT
BT_UART_RXD
BT_UART_TXD
BT_PCM_CLK
BT_PCM_IN
BT_PCM_OUT
BT_PCM_SYNC
51
52 54
53
30 51
30 51
30 51
30 51
30 51
51
30 51
30 51
30 51
30 51
51
51
30 51
30 51
51
51
51
51
51
51
30 51
30 51
30 51
30 51
30 51
30 51
30 51
30 51
51
51
30 51
30 51
D
C
B
RADIO_TO_PMU_ADC_SMPS1
13
RADIO_TO_PMU_ADC_PP_LDO11_VDDIO
13
RADIO_TO_PMU_ADC_PP_LDO5_SIM
13
RADIO_TO_PMU_ADC_SMPS4
13
UPPER RADIO ANTENNA CONTROL
50_AP_WIFI_5G_CONN_ANT
25
50_AP_UAT_FEED
FCT TESTING
A
25
UAT_ANT_GND
PP3V0_TRISTAR
12 15 17 26 29
NORTH_AC_GND_SCREW
8
25
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I395
I396
I398
I397
I410
50_WIFI_5G_CONN_ANT
I409
50_UPPER_ANT_FEED
I411
I404
I412
ADC_SMPS1
ADC_PP_LDO11
ADC_PP_LDO5
ADC_SMPS4
ANT_GND
PAC_VDD_3V0
NORTH_ANT_GND
STOCKHOLM_TO_AP_UART3_CTS_L
30
30
30
30
50
50
50
53
50
3
AP_TO_STOCKHOLM_UART3_RTS_L
3
STOCKHOLM_TO_AP_UART3_RXD
3
AP_TO_STOCKHOLM_UART3_TXD
3
AP_TO_STOCKHOLM_DWLD_REQ
7
STOCKHOLM_TO_PMU_HOST_WAKE
13
AP_TO_STOCKHOLM_EN
7
PP3V0_TRISTAR
12 15 17 26 29
AP_TO_STOCKHOLM_SIM_SEL
3
AP_TO_STOCKHOLM_ANT
25
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
63
STOCKHOLM
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I359
STOCKHOLM_RTS_L
I360
STOCKHOLM_CTS_L
I361
STOCKHOLM_UART_TXD
I363
STOCKHOLM_UART_RXD
I362
STOCKHOLM_FW_DWLD_REQ
I364
STOCKHOLM_HOST_WAKE
I365
STOCKHOLM_ENABLE
I366
STOCKHOLM_VDD_MUX_3V0
I367
STOCKHOLM_SIM_SEL
I406
STOCKHOLM_ANT
30 52
30 52
30 52
30 52
52
30 52
52
54
54
52
PAGE TITLE
CELL:ALIASES
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
30 OF 55
SHEET
29 OF 54
124578
SIZE
A
D
876543
AP INTERFACE & DEBUG CONNECTORS
PROBE POINTS
PP3105_RF
P2MM
SM
CLK32K_AP
D
C
B
PP3166_RF
P4MM
PP3167_RF
P4MM
PP3168_RF
P4MM-NSM
PP3169_RF
P4MM-NSM
PP
PP3113_RF
P4MM
SM
PP
PP3114_RF
P4MM
SM
PP
PP3119_RF
P2MM
SM
PP
PP3120_RF
P2MM-NSM
SM
PP
PP3152_RF
P2MM
SM
PP
PP3153_RF
P2MM
SM
PP
PP3154_RF
P4MM
SM
PP
PP3155_RF
P2MM
SM
PP
PP3156_RF
P2MM
SM
PP
PP3157_RF
P2MM
SM
PP
PP3158_RF
P2MM
SM
PP
PP3159_RF
P4MM
SM
PP
PP3160_RF
P2MM
SM
PP
PP3161_RF
P2MM
SM
PP
PP3162_RF
P2MM
SM
PP
PP3163_RF
P2MM
SM
PP
PP3190_RF
P2MM
SM
PP
PP3191_RF
P2MM
SM
PP
SM
90_WLAN_PCIE_RDN
1
PP
WIFI_BT
SM
90_WLAN_PCIE_RDP
1
PP
WIFI_BT
SM
90_WLAN_PCIE_TDN
1
PP
WIFI_BT
SM
90_WLAN_PCIE_TDP
1
PP
WIFI_BT
1
WIFI_BT
BB_COEX_UART_RXD
1
WIFI_BT
BB_COEX_UART_TXD
1
WIFI_BT
BT_UART_TXD
1
WIFI_BT
BT_UART_RXD
1
WIFI_BT
WAKE_BT
1
WIFI_BT
WLAN_REG_ON
1
WIFI_BT
BT_REG_ON
1
WIFI_BT
HOST_WAKE_WLAN
1
WIFI_BT
WLAN_PCIE_WAKE_L
1
WIFI_BT
WLAN_PCIE_PERST_L
1
WIFI_BT
WLAN_PCIE_CLKREQ_L
1
WIFI_BT
PCIE_DEV_WAKE
1
WIFI_BT
WLAN_UART_RTS_L
1
WIFI_BT
WLAN_UART_CTS_L
1
WIFI_BT
WLAN_UART_RXD
1
WIFI_BT
WLAN_UART_TXD
1
WIFI_BT
WLAN_JTAG_SWDCLK
1
WIFI_BT
WLAN_JTAG_SWDIO
1
WIFI_BT
29 51
35 51
35 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
29 51
PP3121_RF
P2MM-NSM
SM
PP
PP3122_RF
P4MM
SM
PP
PP3123_RF
P2MM-NSM
SM
PP
PP3124_RF
P2MM
SM
PP
PP3125_RF
P2MM-NSM
SM
PP
PP3126_RF
P2MM-NSM
SM
PP
PP3128_RF
P2MM
SM
PP
PP3174_RF
P4MM
SM
PP
PP3129_RF
P4MM
SM
PP
PP3165_RF
P4MM
SM
PP
PP3183_RF
P4MM
SM
PP
PP3184_RF
P4MM
SM
PP
PP3186_RF
P4MM
SM
PP
PP3187_RF
P4MM
SM
PP
PP3188_RF
P4MM
SM
PP
PP3189_RF
P4MM
SM
PP
PP_3178_RF
P2MM-NSM
SM
PP
PP_3179_RF
P2MM-NSM
SM
PP
PP_3180_RF
P2MM-NSM
SM
PP
PP_3183_RF
P2MM-NSM
SM
PP
PP_3184_RF
P2MM-NSM
SM
PP
1
RADIO_STOCKHOLM
1
SIM_DEBUG
1
RADIO_STOCKHOLM
1
RADIO_STOCKHOLM
1
RADIO_STOCKHOLM
1
RADIO_STOCKHOLM
1
RADIO_STOCKHOLM
1
SIM_DEBUG
1
SIM_DEBUG
1
SIM_DEBUG
1
SIM_DEBUG
1
SIM_DEBUG
1
SIM_DEBUG
1
SIM_DEBUG
1
SIM_DEBUG
1
SIM_DEBUG
1
1
1
1
1
STOCKHOLM_HOST_WAKE
BB_REQUEST_XO_CLK
STOCKHOLM_UART_RXD
STOCKHOLM_UART_TXD
STOCKHOLM_CTS_L
STOCKHOLM_RTS_L
PP_PN65_VCC_SIM
STOCKHOLM_SIM_SWP
REF_CLK_FROM_BB
DSDS_SIM_CLK
DSDS_SIM_RESET
DSDS_SIM_DATA
DSDS_SIM_DETECT
PP_LDO6
DSDS_SIM_SWP
DSDS_SIM_DATA_R
BB_SIM_RESET
BB_SIM_CLK
BB_SIM_DATA
BB_SIM_DETECT
PP_LDO5
SIM CARD CONNECTOR
30 31 33 54
29 52
32 52
29 52
29 52
29 52
29 52
52
52 54
32 52
34 54
34 54
34 54
34
31 33 54
54
54
30 35
30 35
30 35
30 35
30 31 33 54
PP_LDO5
DIFF-PAIR PROBE POINTS LOCATED OPPOSITE DC-BLOCKS
A
XW3101_RF
VREG_SMPS1_0V90
31 33
PP_LDO11
30 31 33 34 35 37 38
39
PP_LDO5
30 31 33 54
VREG_SMPS4_2V075
31
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
21
XW3102_RF
21
XW3103_RF
21
XW3104_RF
21
ADC_SMPS1
ADC_PP_LDO11
ADC_PP_LDO5
ADC_SMPS4
29
OUT
29
OUT
29
OUT
29
OUT
30 35
30 35
IN
IN
BB_SIM_RESET
BB_SIM_CLK
SIMCARD-RCPT-N61
2
RST
3
CLK
63
J3101_RF
F-ST-SM
8
9
PP3115_RF
P4MM-NSM
SM
50_BB_HSIC_STROBE
1
PP
SIM_DEBUG
PP3116_RF
P4MM-NSM
SM
50_BB_HSIC_DATA
1
PP
SIM_DEBUG
PP3101_RF
P4MM
SM
1
BB_DEBUG_ERROR
PP
SIM_DEBUG
PP3102_RF
P4MM
SM
RF_PMIC_RESET_L
1
PP
SIM_DEBUG
PP3103_RF
P4MM
SM
1
PS_HOLD_PMIC
PP
SIM_DEBUG
PP3127_RF
P4MM
SM
1
PMIC_RESOUT_L
PP
SIM_DEBUG
PP3104_RF
P4MM
SM
MDM_CLK
11
PPPP
SIM_DEBUG
PP3109_RF
P4MM
SM
PP_LDO11
1
PP
SIM_DEBUG
PP3110_RF
P4MM
SM
RADIO_ON_L
1
PP
SIM_DEBUG
PP3111_RF
P4MM
SM
SPMI_DATA
1
PP
SIM_DEBUG
PP3112_RF
P4MM
SM
SPMI_CLK
1
PP
SIM_DEBUG
PART NUMBER
197S0565
138S0945
138S1103
339S0242
1
R3101_RF
1
VCC
GND
101113
5
I/O
DETECT
SWP
7
12
6
15.00K
2
29 34 34
35
29 32
32
32 34
32 34
30 31 33 34 35 37 38
39
29 32
32 34
1%
1/32W
MF
01005
BB_SIM_DATA
BB_SIM_DETECT
4FF_SIM_SWP
PP3130_RF
P4MM
SM
BB_JTAG_RST_L
1
PP
SIM_DEBUG
PP3131_RF
P4MM
SM
BB_JTAG_TCK
1
PP
SIM_DEBUG
PP3132_RF
P4MM
SM
1
BB_JTAG_TMS
PP
SIM_DEBUG
PP3133_RF
P4MM
SM
BB_JTAG_TDO
1
PP
SIM_DEBUG
PP3134_RF
P4MM
SM
1
BB_JTAG_TDI
PP
SIM_DEBUG
PP3135_RF
P4MM
SM
1
BB_JTAG_TRST_L
PP
SIM_DEBUG
PP3136_RF
P4MM
SM
BB_DEBUG_STATUS
1
PP
SIM_DEBUG
PP3137_RF
P4MM
SM
BB_CORE_DUMP
1
PP
SIM_DEBUG
PP3138_RF
P4MM
SM
BB_USB_VBUS
1
PP
SIM_DEBUG
PP3139_RF
P4MM
SM
90_BB_USB_N
1
PP
SIM_DEBUG
PP3140_RF
P4MM
SM
90_BB_USB_P
1
PP
SIM_DEBUG
ALTERNATE FOR
PART NUMBER
197S0593AVX 19.2MHZ XTAL
138S0706138S0739C4207_RF
138S0706C4207_RF
138S0719C4007_RF
339S0228339S0231
339S0228
155S0950
1
C3101_RF
2.2UF
20%
6.3V
2
X5R
0201-1
BOM OPTION
ALTERNATE
ALTERNATE
ALTERNATE138S00003138S00005
ALTERNATE
ALTERNATE
ALTERNATE
ALTERNATE
ALTERNATE
ALTERNATE155S00024
BI
OUT
BI
30 35
30 35
30 54
REF DES
Y3301_RF197S0598
C3216_RF
U5201_RF
U5201_RF
F_TRI_RF
COMMENTS:
KDS 19.2MHZ XTALY3301_RF197S0593
15UF CAPACITOR
1.0UF CAPACITOR
1.0UF CAPACITOR
4.7UF CAPACITOR
CORONA MODULE USI
CORONA MODULE TDK
TRIPLEXER BIN2
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
34 29 34
34
34
34
34
35
29 35
29 34
29 34 32 34
29 34
PP3141_RF
P4MM
SM
PP
PP3142_RF
P4MM
SM
PP
PP3143_RF
P4MM
SM
PP
PP3144_RF
P4MM
SM
PP
PP3145_RF
P4MM
SM
PP
PP3146_RF
P4MM
SM
PP
PP3147_RF
P4MM
SM
PP3148_RF
P4MM
SM
PP
PP3149_RF
P4MM
SM
PP
PP3150_RF
P4MM
SM
PP
PP3151_RF
P4MM
SM
PP
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
30 35
PP_LDO5
1
DZ3101_RF
12V-33PF
01005-1
2
PP3170_RF
P4MM
BB_UART_TXD
1
SIM_DEBUG
BB_UART_RXD
1
SIM_DEBUG
1
BB_UART_RTS_L
SIM_DEBUG
BB_UART_CTS_L
1
SIM_DEBUG
1
BB_HOST_RDY
SIM_DEBUG
1
BB_DEVICE_RDY
SIM_DEBUG
BB_GPS_SYNC
SIM_DEBUG
BB_WAKE_HOST_L
1
SIM_DEBUG
BB_RESET_DET_L
1
SIM_DEBUG
BB_RST_L
1
SIM_DEBUG
BOOT_HSIC
1
SIM_DEBUG
29 35 35 39 40 41 42 43 44
29 35
29 35
29 35
29 35
29 35
29 35
29 35
29 35
29 32
30 35
SM
PP
PP3171_RF
P4MM
SM
PP
PP3172_RF
P4MM
SM
PP
PP3173_RF
P4MM
SM
PP
PP3175_RF
P4MM
SM
PP
PP3176_RF
P4MM
SM
PP
PP3177_RF
P4MM
SM
PP
PP3178_RF
P4MM
SM
PP
PP3179_RF
P4MM
SM
PP
1
RF_DEBUG
1
RF_DEBUG
1
RF_DEBUG
1
RF_DEBUG
1
RF_DEBUG
1
RF_DEBUG
1
RF_DEBUG
1
RF_DEBUG
1
RF_DEBUG
BB_I2S_RXD
BB_I2S_TXD
BB_OTHER_TXD
BB_OTHER_RXD
SIM CARD ESD PROTECTION
DZ3102_RF
30 31 33 54
5.5V-6.2PF
0201
BB_SIM_DATA
30 35
BB_SIM_RESET
30 35
21
VR3101_RF
ESDAVLC5-4BU4
SM
1
GND
5
BB_SIM_DETECT
RFFE1_CLK
RFFE1_DATA
RFFE2_CLK
RFFE2_DATA
BB_I2S_WS
PP_LDO11
30 31 33 34 35 37 38 39
RADIO_BB
R3102_RF
BOOT_HSIC
30 35
BOOT_HSIC_USB
35
WATCHDOG_DISABLE
35
4
4FF_SIM_SWP
32
BB_SIM_CLK
12
35 39 40 41 42 43 44
35 45 46 48
35 45 46 48
29 35
29 35
29 35
29 35
29 35
RADIO_BB
1
10K
1/32W
01005
R3103_RF
1%
MF
SYNC_MASTER=N/A
PAGE TITLE
1/32W
01005
2
30 54
30 35
AP INTERFACE & DEBUG CONNECTORS
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
RADIO_BB
1
10K
1%
MF
2
Apple Inc.
R
R3104_RF
10K
1/32W
01005
1
1%
MF
2
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
SHEET
124578
SYNC_DATE=N/A
7.0.0
31 OF 55
30 OF 54
SIZE
D
C
B
A
D
876543
BASEBAND PMU (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
VREG_SMPS1_0V90VREG_SMPS2_1V25
SWITCHERS OUTPUT CAPS
30 31 33 31
RADIO_PMIC
1
C3239_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3241_RF
2.2UF
20%
6.3V
2
X5R
0201-1
L3201_RF
L3203_RF
L3204_RF
L3202_RF
RADIO_PMIC
1
C3208_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
RADIO_PMIC
RADIO_PMIC
RADIO_PMIC
RADIO_PMIC
PP_VSW_S1
PP_VSW_S2
PP_VSW_S3
PP_VSW_S4
RADIO_PMIC
1
C3206_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
RADIO_PMIC
1
C3237_RF
20UF
20%
6.3V
2
CERM-X5R
0402
RADIO_PMIC
1
C3240_RF
2.2UF
20%
6.3V
2
X5R
0201-1
2.2UH-20%-1.5A-0.160OHM
2.2UH-20%-1.5A-0.160OHM
2.2UH-20%-1.5A-0.160OHM
2.2UH-20%-1.2A-0.15OHM
RADIO_PMIC
1
C3207_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
RADIO_PMIC
1
C3228_RF
2
RADIO_PMIC
C3201_RF
1.0UF
20%
10V
X5R-CERM
0201-1
RADIO_PMIC
1
C3251_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3252_RF
2.2UF
20%
6.3V
2
X5R
0201-1
1.0UF
20%
10V
X5R-CERM
0201-1
RADIO_PMIC
1
C3202_RF
10UF
20%
6.3V
2
CERM-X5R
0402-9
RADIO_PMIC
1
C3203_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
RADIO_PMIC
1
C3259_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3257_RF
2.2UF
20%
6.3V
2
X5R
0201-1
1
2
31
RADIO_PMIC
C3204_RF
1.0UF
20%
10V
X5R-CERM
0201-1
RADIO_PMIC
1
C3260_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3238_RF
20UF
20%
6.3V
2
CERM-X5R
0402
VOLTAGE=4.50V
VOLTAGE=4.50V
VOLTAGE=4.50V
VOLTAGE=4.50V
RADIO_PMIC
1
C3205_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
D
10 12 14 15 16 17 23
26 31 39 48 51 52
RADIO_PMIC
1
C3270_RF
100PF
5%
16V
2
NP0-C0G
01005
RADIO_PMIC
1
C3224_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3223_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3222_RF
2.2UF
20%
6.3V
2
X5R
0201-1
PP_VCC_MAIN
RADIO_PMIC
1
C3216_RF
15UF
20%
6.3V
2
X5R
0402-1
RADIO_PMIC
1
C3221_RF
15UF
20%
6.3V
2
X5R
0402-1
RADIO_PMIC
1
C3229_RF
20UF
20%
6.3V
2
CERM-X5R
0402
RADIO_PMIC
1
C3230_RF
20UF
20%
6.3V
2
CERM-X5R
0402
RADIO_PMIC
1
C3231_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3232_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3233_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3234_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3235_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3236_RF
2.2UF
20%
6.3V
2
X5R
0201-1
C
RADIO_PMIC
1
C3249_RF
2.2UF
20%
6.3V
2
X5R
0201-1
VREG_SMPS3_0V95
RADIO_PMIC
1
C3250_RF
2.2UF
20%
6.3V
2
X5R
0201-1
VREG_RF_CLK_BYP
AVDD_BYP
SWITCHERS BULK CAPS
RADIO_PMIC
1
C3226_RF
52
PP_VCC_MAIN
10 12 14 15 16 17
IN
23 26 31 39 48 51
52
10 12 14 15 16 17
IN
23 26 31 39 48 51
52
10 12 14 15 16 17
IN
B
23 26 31 39 48 51
52
10 12 14 15 16 17
IN
23 26 31 39 48 51
MAKE_BASE=TRUE
VBATT_S1
RADIO_PMIC
1
C3217_RF
15UF
20%
6.3V
2
X5R
0402-1
PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S2
RADIO_PMIC
1
C3218_RF
15UF
20%
6.3V
2
X5R
0402-1
PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S3
RADIO_PMIC
1
C3219_RF
15UF
20%
6.3V
2
X5R
0402-1
PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S4
RADIO_PMIC
1
C3220_RF
15UF
20%
6.3V
2
X5R
0402-1
VBATT_S1
VBATT_S2
VBATT_S3
VBATT_S4
31
31
31
31
31
31
31
31
VBATT_S1
31
VBATT_S2
31
VBATT_S3
31
VBATT_S4
31
VREG_SMPS2_1V25
31
VREG_SMPS4_2V075
30 31
VREG_SMPS4_2V075
30 31
VREG_SMPS3_0V95
31
VREG_SMPS4_2V075
30 31
MDM_VREF_LPDDR2
34
OUT
52
31 39
16 17
PP_VCC_MAIN
10 12
IN
14 15
23 26
48 51
2
1.0UF
20%
10V
X5R-CERM
0201-1
REF_BYP
RADIO_PMIC
1
C3227_RF
0.1UF
20%
4V
2
X5R
01005
26
21
15
22
88
94
47
1
92
2
4
77
72
38
85
49
52
43
54
VDD_INT_BYP
REF_BYP
GND_REF
VDD_S1
VDD_S2
VDD_S2
VDD_S3
VDD_S4
VDD_L1
VDD_L2_3
VDD_L7_8_11
VDD_L9
VDD_L10
VDD_L12
VDD_XO_RFC
GND
VREF_DDR2
VIN_VPH1
VIN_VPH2
U_PMICRF
PM8019
BGA
SYM 5 OF 5
REG
VREG_RFCLK
VREG_XO
VREG_S1
VSW_S1_1
VSW_S1_2
VREG_S2
VSW_S2
VREG_S3
VSW_S3_1
VSW_S3_2
VREG_S4
VSW_S4_1
VSW_S4_2
VREG_L1
VREG_L2
VREG_L3
VREG_L4
VREG_L5
VREG_L6
VREG_L7
VREG_L8
VREG_L9
VREG_L10
VREG_L11
VREG_L12
VREG_L13
VREG_L14
91
74
VREG_XO_PMIC
27
11
16
82
93
62
53
58
23
6
12
86
7
8
68
59
48
10
3
71
83
9
33
34
28
1
2
1
2
1
2
21
MAKK2016-SM
21
MAKK2016-SM
21
MAKK2016-SM
21
0806
RADIO_PMIC
1
C3209_RF
10UF
20%
6.3V
2
CERM-X5R
0402-9
RADIO_PMIC
C3242_RF
2.2UF
20%
6.3V
X5R
0201-1
RADIO_PMIC
C3243_RF
2.2UF
20%
6.3V
X5R
0201-1
RADIO_PMIC
1
2
RADIO_PMIC
1
C3244_RF
2.2UF
20%
6.3V
2
X5R
0201-1
VREG_SMPS4_2V075
RADIO_PMIC
1
C3254_RF
2.2UF
20%
6.3V
2
X5R
0201-1
VREG_RX
VREG_SIM
VREG_TX
VREG_IO
RADIO_PMIC
1
C3210_RF
C3211_RF
10UF
10UF
20%
20%
6.3V
6.3V
2
CERM-X5R
CERM-X5R
0402-9
0402-9
RADIO_PMIC
1
C3253_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_PMIC
1
C3256_RF
2.2UF
20%
6.3V
2
X5R
0201-1
1235MA
1100MA
1350MA
550MA
VOLTAGE=1.225V
VOLTAGE=1.80V
VOLTAGE=1.80V
VOLTAGE=3.075V
VOLTAGE=1.80V
VOLTAGE=1.80V
VOLTAGE=1.90V
VOLTAGE=2.05V
VOLTAGE=1.20V
VOLTAGE=0.90V
VOLTAGE=1.80V
VOLTAGE=0.95V
VOLTAGE=2.95V
VOLTAGE=5.0V
RADIO_PMIC
1
C3212_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
RADIO_PMIC
1
C3255_RF
2.2UF
20%
6.3V
2
X5R
0201-1
30 31
VREG_SMPS1_0V90
VREG_SMPS2_1V25
VREG_SMPS3_0V95
VREG_SMPS4_2V075
PP_LDO14_RFSW
20%
6.3V
CERM-X5R
0402-9
RADIO_PMIC
1
C3214_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
RADIO_PMIC
1
C3213_RF
10UF
2
RADIO_PMIC
1
C3258_RF
2.2UF
20%
6.3V
2
X5R
0201-1
PP_LDO1
PP_LDO2
PP_LDO3
PP_LDO4
PP_LDO5
PP_LDO6
PP_LDO7
PP_LDO8
PP_LDO9
PP_LDO10
PP_LDO11
PP_LDO12
PP_LDO13
RADIO_PMIC
1
C3215_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
RADIO_PMIC
1
C3261_RF
2.2UF
20%
6.3V
2
X5R
0201-1
30 31 33
OUT
31
OUT
31
OUT
30 31
OUT
33 37 38
OUT
33
OUT
32 33
OUT
33
OUT
30 33 54
OUT
30 33 54
OUT
33 35
OUT
37 38
OUT
33
OUT
33
OUT
30 33 34 35 37 38 39
OUT
33
OUT
33 50
OUT
29 41 42
OUT
RADIO_PMIC
1
C3262_RF
2.2UF
20%
6.3V
2
X5R
0201-1
D
C
B
A
63
PAGE TITLE
BASEBAND PMU (1 0F 2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
32 OF 55
SHEET
31 OF 54
124578
SIZE
A
D
876543
BASEBAND PMU (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
33 OF 55
SHEET
32 OF 54
124578
5
87
U_PMICRF
RADIO_PMIC
R3301_RF
1.00K
BB_RST_L
29 30
IN
PS_HOLD
34
IN
12
MF1%
010051/32W
RADIO_PMIC
R3307_RF
20.0K
12
MF5%
1/32W01005
RADIO_ON_L
29
IN
30
PMIC_RESOUT_L
30 34
OUT
30
PS_HOLD_PMIC
RF_PMIC_RESET_L
29 30
IN
SPMI_CLK
30 34
BI
SPMI_DATA
30 34
BI
70
31
75
65
20
81
76
CBL_PWR*
PON_TRIG
PON_RST*
PS_HOLD
RESIN*
SPMI_CLK
SPMI_DATA
PM8019
BGA
SYM 1 OF 5
CONTROL
OPT
GND
GND
GND
66
NC
89
56
45
63
17
63
876543
BASEBAND (1 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
34 OF 55
SHEET
33 OF 54
124578
SIZE
A
D
876543
BASEBAND (2 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C600
R606
L600
U602
D
PP_LDO11
30 31 33 34 35 37 38 39
VP
BB_SWD_ENABLE
34 35
90_BB_USB_P
29 30 34
BB_JTAG_TCKBB_JTAG_TMS
30 34 30 34
RADIO_BB
C
B
R3509_RF
10K
1/32W
01005
NOSTUFF
1
1%
MF
2
30 32
30
32
30 34
30
30 34
30
30 32 34
32
29 30
DSDS_SIM_DETECT
PMIC_RESOUT_L
IN
BB_JTAG_RST_L
IN
SLEEP_CLK_32K
IN
BB_JTAG_TCK
IN
BB_JTAG_TDI
IN
BB_JTAG_TMS
IN
BB_JTAG_TRST_L
IN
MDM_CLK
IN
XO_OUT_D0_EN
OUT
DSDS_SIM_DETECT
30 34
BB_USB_VBUS
IN
MDM_CLK
30 32 34
PP_LDO11
30 31 33 34 35 37 38 39
30 34
W14
RESIN*
N2
SRST*
W17
SLEEP_CLK
R2
TCK
P3
TDI
P2
TMS
T4
TRST*
R11
MODE_0
NC
R9
MODE_1
NC
W19
CXO
V18
CXO_EN
N19
UIM1_DETECT
B19
SDC1_CMD
NC
C19
SDC1_CLK
NC
U12
USB_HS_VBUS
V12
USB_HS_ID
NC
W13
USB_HS_SYSCLK
B2
IN1
U_JTAGRF
TS5A2066
B1
COM1
A1
NO1
GND
ASIC-MDM9625M-333P
U_BB_RF
BGA
SYM 1 OF 6
DIGITAL
IN2
BGA
COM2
NO2
RADIO_SIMCARD
D1A2
RADIO_BB
C1
C2
D2
RESOUT*
PS_HOLD
PMIC_SPMI_DATA
PMIC_SPMI_CLK
HSIC_CAL
HSIC_DATA
HSIC_STROBE
UIM1_RESET
UIM1_CLK
UIM1_DATA
SDC1_DATA_3
SDC1_DATA_2
SDC1_DATA_1
SDC1_DATA_0
USB_HS_DP
USB_HS_DM
USB_HS_REXT
BB_SWD_ENABLE
90_BB_USB_N
V17
NC
W18
P5
TDO
W15
V15
U9
U10
50_BB_HSIC_DATA
R10
50_BB_HSIC_STROBE
M19
DSDS_SIM_RESET
N18
DSDS_SIM_CLK
P19
DSDS_SIM_DATA
B18
NC
A18
NC
D20
NC
D19
NC
V11
W11
W10
34 35
29 30 34
PS_HOLD
BB_JTAG_TDO
SPMI_DATA
SPMI_CLK
BB_HSIC_CAL
90_BB_USB_P
90_BB_USB_N
BB_USB_TRXTUNE
32
OUT
30
OUT
30 32
BI
30 32
BI
29 30
BI
29 30
BI
30 54
OUT
30 54
OUT
30 54
BI
29 30 34
BI
29 30 34
BI
RADIO_BB
1
R3502_RF
240
1%
1/32W
MF
01005
2
RADIO_BB
R3505_RF
240
12
1%
MF
1/32W01005
RADIO_BB
R3506_RF
240
12
MF1%
010051/32W
EBI1_CAL
BDM_ZQ
ASIC-MDM9625M-333P
R1
EBI1_CAL
G1
EBI1_ZQ
F18
EBI2_CS*
NC
F16
EBI2_CLE*
NC
G20
EBI2_ALE*
NC
G19
EBI2_WE*
NC
G18
EBI2_OE*
NC
G16
EBI2_BUSY*
NC
RADIO_BB
U_BB_RF
BGA
SYM 2 OF 6
EBI1_EBI2
EBI1_VREF
EBI1_VREF
EBI1_VREF
EBI2_AD_7
EBI2_AD_6
EBI2_AD_5
EBI2_AD_4
EBI2_AD_3
EBI2_AD_2
EBI2_AD_1
EBI2_AD_0
N20
M5
R16
H20
H19
H18
H16
J18
K18
J16
K16
NC
NC
NC
NC
NC
NC
NC
NC
MDM_VREF_LPDDR2
31 34
IN
D
C
B
RADIO_BB
1
R3501_RF
200
1%
1/32W
MF
01005
2
PP_LDO11
VCC
U_EEP_RF
CAT24C08C4A
WLCSP
34 35
BB_EEPROM_SCL
B1B2
SCLSDA
VSS
A2A1
A
30 31 33 34 35 37 38 39
BB_EEPROM_SDA
BB_EEPROM_SCL
34 35
BB_EEPROM_SDA
34 35
34 35
1
R3507_RF
10K
1%
1/32W
MF
01005
2
1
R3508_RF
10K
1%
1/32W
MF
01005
2
PP_LDO11
30 31 33 34 35 37 38 39
63
MDM_VREF_LPDDR2
1
C3501_RF
1.0UF
20%
6.3V
2
X5R
0201-1
31 34
PAGE TITLE
BASEBAND (1 OF 2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
35 OF 55
SHEET
34 OF 54
124578
SIZE
A
D
876543
BASEBAND (3 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
36 OF 55
SHEET
35 OF 54
SIZE
D
124578
A
PP_LDO11
A1
SCLK
A3
VIO
B3
SCLK_A
R3602_RF
0.00
12
1/20W
1%
MF
0201
30 35 45 46 48
53
RFFE2_CLK
RFFE_VIO
35 40 41 43 44 45 46 48
RFFE2_CLK_BUFFER
30 31 33 34 35 37 38 39
A
RFFE2_DATA
1
C3602_RF
22PF
5%
16V
2
CERM
01005
63
876543
WTR TRANSCEIVER (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
RF_CLK IS SHARED BETWEEN WTR AND WFR. LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE < 5MM.
63
NP0-C0G
01005
NOSTUFF
PAGE TITLE
RF TRANSCEIVER (1 0F 3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
37 OF 55
SHEET
36 OF 54
124578
SIZE
A
D
876543
WTR TRANSCEIVER (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
PP_LDO8
31 38
MAKE_BASE=TRUE
PP_LDO1
31 33
38
MAKE_BASE=TRUE
VREG_2V
D
C
VREG_2V
VREG_1P3V
MAKE_BASE=TRUE
37 38
37 38
RADIO_WTR
1
C3801_RF
10UF
20%
6.3V
2
CERM-X5R
0402
RADIO_WTR
RADIO_WTR
RADIO_WTR
MAKE_BASE=TRUE
R3801_RF
0.00
12
1%
1/20W
MF
0201
R3802_RF
0.00
12
1%
1/20W
MF
0201
VDD_DRX_BB_2V
VDD_TX_DA_2V
VDD_PRX_BB_2V
VDD_TX_BBF_2V
VDD_PRX_VCO_2V
VDD_SHDR_VCO_2V
WTR DECOUPLING CAPS
L3801_RF
37 37 38
RADIO_WTR
1
C3812_RF
100PF
5%
10V
2
NP0-C0G
01005
NOSTUFF
37
RADIO_WTR
1
C3813_RF
100PF
5%
10V
2
NP0-C0G
01005
37
37
RADIO_WTR
1
C3814_RF
100PF
5%
10V
2
NP0-C0G
01005
NOSTUFF
37
RADIO_WTR
1
C3815_RF
0.1UF
20%
4V
2
X5R
01005
37
RADIO_WTR
1
C3816_RF
0.1UF
20%
4V
2
X5R
01005
VREG_1P3V
37 38
WTR DECOUPLING SHARED WITH C3808_RF
MAKE_BASE=TRUE
22NH-3%-0.25A
0201
RADIO_WTR
VDD_SHDR_PLL_1P3V
VDD_PRX_HBMB_1P3V
VDD_PRX_VCO_1P3V
DELETED C3805 PR REVIEW FEEDBACK
21
VDD_PRX_PLL_1P3V
37
VREG_1P3V
RADIO_WTR
1
C3820_RF
0.1UF
20%
4V
2
X5R
01005
NOSTUFF
37
RADIO_WTR
1
C3821_RF
0.1UF
20%
4V
2
X5R
01005
37
VDD_SHDR_VCO_1P3V
RADIO_WTR
1
C3823_RF
0.1UF
20%
4V
2
X5R
01005
37
MAKE_BASE=TRUE
1
2
RADIO_WTR
C3808_RF
10UF
20%
6.3V
CERM-X5R
0402
VDD_PRX_LO_HB_1P3V
VDD_DRX_LB_1P3V
VDD_PRX_LB_1P3V
VDD_DRX_LO2_1P3V
VDD_DRX_LO1_1P3V
37
RADIO_WTR
1
C3830_RF
0.1UF
20%
4V
2
X5R
01005
37
37
37
RADIO_WTR
1
C3833_RF
0.1UF
20%
4V
2
X5R
01005
37
RADIO_WTR
1
C3809_RF
0.1UF
20%
4V
2
X5R
01005
12
C934
R926
L3802_RF
U902
U_WTR_RF
VDD_PRX_VCO_1P3V
37
VDD_PRX_VCO_2V
37
VDD_PRX_LO_HB_1P3V
37
VDD_PRX_LB_1P3V
37
VDD_PRX_HBMB_1P3V
37
VDD_PRX_LO_HBMB_1P3V
37
VDD_PRX_PLL_1P3V
37
VDD_PRX_BB_2V
37
VDD_PRX_2V
37
VDD_DRX_LO1_1P3V
37
VDD_DRX_LO2_1P3V
37
VDD_DRX_LB_1P3V
37
VDD_DRX_HB_1P3V
37 37
VDD_DRX_MB_1P3V
37
VDD_DRX_BB_2V
VDD_SHDR_VCO_1P3V
37
VDD_SHDR_VCO_2V
37
VDD_SHDR_PLL_1P3V
37
90
VDD_RF1_P_VCO
80
VDD_RF2_P_VCO
25
VDD_RF1_P_HB_LO
72
VDD_RF1_P_LB
34
VDD_RF1_P_HMB
57
VDD_RF1_P_HMB_LO
79
VDD_RF1_P_PLL
98
VDD_RF2_P_BB
100
VDD_RF2_P_RX
14
VDD_RF1_D_LB_LO
38
VDD_RF1_D_LOM
31
VDD_RF1_D_LB
22
VDD_RF1_D_HB
11
VDD_RF1_D_MB
54
VDD_RF2_D_BB
48
VDD_RF1_S_VCO
62
VDD_RF2_S_VCO
78
VDD_RF1_S_PLL
WTR1625
BGA
SYM 4 OF 5
VDD_RF2_T_DA
VDD_RF1_T_DA
VDD_RF1_T_UPC
VDD_RF1_T_LO
VDD_RF2_T_BB
VDD_RF2_FBRX
VDD_RF2_T_VCO
VDD_RF1_T_VCO
VDD_RF1_T_SYN
VDD_RF2_T_PLL
VDD_RF1_G_LNA
VDD_RF1_G_VCO
VDD_RF1_G_PLL
VDD_RF1_G_BB
VDD_RF2_XO
VDD_DIO
GND
129
VDD_TX_DA_2V
137
VDD_TX_DA_1P3V
136
VDD_TX_UPC_1P3V
135
VDD_TX_LO_1P3V
126
VDD_TX_BBF_2V
116
VDD_FBRX_2V
157
VDD_TX_VCO_2V
149
VDD_TX_VCO_1P3V
115
VDD_TX_SYNTH_1P3V
114
VDD_TX_PLL_2V
52
VDD_GPS_LNA_1P3V
74
VDD_GPS_VCO_1P3V
93
VDD_GPS_PLL_1P3V
59
VDD_GPS_BB_1P3V
113
147
VDD_XO_2V
103
VDD_MSM_1P8V
D
37
37
37
37
37
37
37
37
37
37
37
37
C
37
37
R3803_RF
0.00
12
B
R3808_RF
I175
30 31 33 34 35 38
39
PP_LDO11
MAKE_BASE=TRUE
A
1%
1/20W
MF
0201
0.00
12
0%
1/32W
MF
01005
VDD_PRX_2V
VDD_TX_VCO_2V
VDD_TX_PLL_2V
VDD_XO_2V
VDD_FBRX_2V
37
VDD_MSM_1P8V
RADIO_WTR
1
C3811_RF
1.0UF
10%
6.3V
2
X5R-CERM
0201-1
37
RADIO_WTR
1
C3817_RF
0.1UF
20%
4V
2
X5R
01005
37
RADIO_WTR
1
C3802_RF
0.1UF
20%
4V
2
X5R
01005
NOSTUFF
RADIO_WTR
1
C3803_RF
0.1UF
10%
10V
2
X5R-CERM
0201
37
RADIO_WTR
1
C3818_RF
0.1UF
20%
4V
2
X5R
01005
37
RADIO_WTR
1
C3819_RF
0.1UF
20%
4V
2
X5R
01005
NOSTUFF
37
R3806_RF
L3802_RF
8.2NH-3%-0.19A-1.6OHM
VDD_PRX_LO_HBMB_1P3V
VDD_TX_SYNTH_1P3V
VDD_TX_LO_1P3V
VDD_TX_UPC_1P3V
0.00
12
1%
1/20W
MF
0201
21
01005
RADIO_WTR
1
C3806_RF
0.1UF
20%
4V
2
X5R
01005
37
RADIO_WTR
1
C3824_RF
0.1UF
20%
4V
2
X5R
01005
37
RADIO_WTR
1
C3825_RF
0.1UF
20%
4V
2
X5R
01005
37
RADIO_WTR
1
C3826_RF
100PF
5%
10V
2
NP0-C0G
01005
VDD_TX_VCO_1P3V
RADIO_WTR
1
C3807_RF
0.1UF
20%
4V
2
X5R
01005
VDD_TX_DA_1P3V
RADIO_WTR
1
C3827_RF
100PF
5%
10V
2
NP0-C0G
01005
NOSTUFF
37
VDD_DRX_MB_1P3V
VDD_DRX_HB_1P3V
RADIO_WTR
1
R3807_RF
0.00
1%
1/20W
MF
0201
2
VDD_GPS_LNA_1P3V
MAKE_BASE=TRUE
VDD_GPS
MAKE_BASE=TRUE
RADIO_WTR
1
C3828_RF
0.1UF
20%
4V
2
X5R
01005
VDD_GPS_BB_1P3V
VDD_GPS_PLL_1P3V
RADIO_WTR
1
C3829_RF
0.1UF
20%
RADIO_WTR
4V
2
X5R
01005
37
MAKE_BASE=TRUE
VDD_GPS_VCO_1P3V
37
37
37
37
37
37
37
63
89
GND
56
GND
83
GND
82
GND
58
GND
35
GND
8
GND
26
GND
64
GND
42
GND
41
GND
81
GND
21
GND
6
GND
24
GND
39
GND
10
GND
3
GND
23
GND
46
GND
49
GND
69
GND
88
GND
70
GND
63
GND
40
GND
47
GND
87
GND
77
GND
96
GND
U_WTR_RF
WTR1625
BGA
SYM 5 OF 5
PAGE TITLE
RF TRANSCEIVER (2 OF 3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
111
101
110
145
144
143
128
120
119
106
150
134
159
142
125
124
148
158
133
112
132
45
66
84
75
164
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
38 OF 55
SHEET
37 OF 54
7.0.0
SIZE
B
A
D
124578
876543
WFR TRANSCEIVER
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
46
35
42
53
20
51
41
45
50
18
9
11
21
32
4
38
55
40
60
48
58
26
8
12
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
39 OF 55
SHEET
38 OF 54
7.0.0
SIZE
C
B
A
D
124578
876543
QFE DCDC
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C1110
R1102
L1104
U1101
D
XW4001_RF
PP_VCC_MAIN
10 12 14 15 16 17 23 26 31 39
48 51 52
SHORT-10L-0.25MM-SM
SHOULD BE PLACED
MAX 0.25MM AWAY
FROM QPOET
SHORT-10L-0.25MM-SM
C
PP_VCC_MAIN
RADIO_QPOET
1
C4010_RF
470PF
X5R
10%
01005
10V
2
MITIGATE RX1 DESENSE
IN VLB (B13)
31 39 48 51
10 12 14 15
16 17 23 26
52
21
NOSTUFF
XW4002_RF
21
NOSTUFF
BOTH XW’S
> 1.0MM
TO CREATE
INDUCTANCE
VBATT_SW
RADIO_QPOET
1
C4001_RF
10UF
20%
6.3V
2
CERM-X5R
0402
SW_GROUND
39
31 39 48
10 12 14
15 16 17 23 26
51 52
39
10 12 14 15 16 17 23 26 31 39
48 51 52
PP_VCC_MAIN
VPA_ET
39 41 42 43 44
VBATT_SW
39
SW_GROUND
39
ET_DAC_P
35
IN
ET_DAC_N
35
IN
RFFE1_DATA
30 35 40 41 42 43 44
BI
RFFE1_CLK
30 35 40 41 42 43 44
BI
PA_CTL_QFE
32
PP_VCC_MAIN
2.2UH-20%-0.7A-0.23OHM
RADIO_QPOET
L4001_RF
L4002_RF
22-OHM-25%-1800MA
0201
0805
21
BST_L
21
QPOET_BATT
10
BYP_LOAD
28
VDD_BUCK
27
GND_BUCK
7
AMP_INP
2
AMP_INM
26
SDATA
21
SCLK
13
MPP1
20
VSW_BOOST
19
USID_LSB
22
GND
24
GND_BOOST
U_QPOET
QFE1100
BGA
(USID)
VOUT_BOOST_GND
39
VDD_BATTBYP_BATT
VDD_BATT
VDD_AMP
VDD_1P8
VSW_BUCK
AMP_OUT
C_BUCK
C_BUCK
C_SW_BUCK
C_SW_BUCK
C_GSM
PA_VBAT
VOUT_BOOST
GND_AMP
GND
1514
16
5
17
QPOET_VSW
23
12
L4003_RF
4
11
12
8
9
6
18
25
1
3
PP_VCC_MAIN
APT_VINPUT
PP_LDO11
1.5UH-1.95A-0.111OHM
RADIO_QPOET
VPA_APT
GSM_CAP
VPA_BATT
VOUT_BOOST
PSB25201T-SM
39
40 44
39
10 12 14 15 16 17 23 26 31 39
48 51 52
39
30 31 33 34 35 37 38 39
GSM_CAP
41 42 43
44
RADIO_QPOET
1
39
2
VPA_ET
C4005_RF
20UF
20%
6.3V
CERM-X5R
0402
VPA_APT
RADIO_QPOET
39 41 42
43 44
39 41 42 43 44
RADIO_QPOET
1
C4007_RF
4.7UF
20%
10V
2
X5R-CERM
0402
CRITICAL TO STAY
@ 4.7UF TO MEET
QPOET TIMING
(CAN BE CHANGED TO 20UF)
VPA_ET
RADIO_QPOET
1
C4008_RF
470PF
10%
10V
2
VPA_ET_FILTER
RADIO_QPOET
1
R4001_RF
2.2
5%
1/32W
MF
01005
2
X5R
01005
D
C
SIZE
B
A
D
B
I/O @ 1.8V
PP_LDO11
30 31 33 34
35 37 38 39
RADIO_QPOET
1
C4002_RF
10UF
20%
6.3V
2
CERM-X5R
0402
39
A
63
BOOST FILTER
L4004_RF
22-OHM-25%-1800MA
VOUT_BOOSTAPT_VINPUT
RADIO_QPOET
1
C4003_RF
10UF
20%
6.3V
2
CERM-X5R
0402
VOUT_BOOST_GND
39
2
XW4004_RF
SHORT-10L-0.25MM-SM
NOSTUFF
1
0201
21
RADIO_QPOET
1
C4006_RF
10UF
20%
6.3V
2
CERM-X5R
0402
39
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
QFE DCDC
Apple Inc.
R
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
40 OF 55
SHEET
39 OF 54
124578
876543
2G PA
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C1208
R1200
L1204
U1201
D
14 16 25 26 45 46
RADIO_2G
1
C4107_RF
56PF
5%
16V
2
NP0-C0G
01005
50_HB_2G_WTR_TX_OUT
36
RADIO_2G
C4103_RF
100PF
12
5%
16V
NP0-C0G
01005
C
RADIO_2G
C4104_RF
100PF
50_LB_2G_WTR_TX_OUT
36
12
5%
16V
NP0-C0G
01005
PP_BATT_VCC
50_HB_2G_PA_IN
50_LB_2G_PA_IN
5
HB_RF_IN
6
LB_RF_IN
4
10
VBATT
V2G
U_2GPARF
SKY77356-11
LGA
HB_RF_OUT
LB_RF_OUT
THRM
GND
9
8
11
PAD
13
VIO
SCLK
SDATA
RADIO_2G
1
C4108_RF
2.2UF
20%
6.3V
2
X5R
0201-1
12
7
3
1
2
RADIO_2G
1
C4109_RF
2.2UF
20%
6.3V
2
X5R
0201-1
VPA_APT
1
2
50_HB_2G_PA_OUT
50_LB_2G_PA_OUT
RFFE_VIO
RFFE1_CLK
RFFE1_DATA
C4112_RF
100PF
5%
16V
NP0-C0G
01005
1
C4119_RF
220PF
2%
50V
2
C0G
0201
NOSTUFF
39 44
35 41 43 44 45
46 48
30 35 39 41 42
43 44
30 35 39 41 42
43 44
L4102_RF
3.0NH+/-0.1NH-0.6A
RADIO_2G
1
C4113_RF
0.8PF
+/-0.05PF
25V
2
C0G
0201
L4101_RF
6.2NH-3%-0.4A
0201
0201
21
21
RADIO_2G
1
C4117_RF
12PF
5%
25V
2
NP0-C0G-CERM
0201-2
NOSTUFF
RADIO_2G
1
C4118_RF
1.2PF
+/-0.1PF
25V
2
C0G-CERM
0201
50_HB_2G_ASM_IN
50_LB_2G_ASM_IN
45
45
D
C
SIZE
B
A
D
B
A
63
PAGE TITLE
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2G PA
Apple Inc.
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
41 OF 55
SHEET
40 OF 54
124578
876543
VERY LOW BAND PAD (B13, B17, B28)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
45
B
36
A
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
42 OF 55
SHEET
41 OF 54
SIZE
D
124578
876543
LOW BAND PAD (B8, B26, B20)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C4318_RF
R1400
L4322_RF
U1402
RADIO_WTR
C4309_RF
100PF
12
D
NP0-C0G
C4310_RF
VPA_ET
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON
VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING
GND
VPA_BATT
5
36
VBATT
VCC1
U_LBPAD
SKY77803-12
LGA
32
302926242321191816
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON
VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING
6
VCC2
25
B20RX
20
B26RX
10
B8RX
22
B20ANT
17
B26ANT
14
B8ANT
3
VIO
1
SCLK
2
SDATA
THRM
PAD
47
373940
38
35
41
48
4645444342
RADIO_LB_PAD
C4304_RF
100PF
50_B20_WTR_TX_OUT
42
C
50_B26_WTR_TX_OUT
42
1
RADIO_LB_PAD
L4322_RF
22NH-5%-0.1A
01005
NOSTUFF
2
50_B8_WTR_TX_OUT
42
B
12
10V
NP0-C0G
01005
C4303_RF
100PF
12
5%
10V
NP0-C0G
01005
RADIO_LB_PAD
C4302_RF
100PF
12
5%
10V
NP0-C0G
01005
5%
RADIO_LB_PAD
1
RADIO_LB_PAD
L4303_RF
22NH-5%-0.1A
01005
NOSTUFF
2
1
RADIO_LB_PAD
L4304_RF
22NH-5%-0.1A
01005
NOSTUFF
2
42
42
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON
VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING
CTRL_LB_BAND_SELECT_1
CTRL_LB_BAND_SELECT_2
50_B20_PAD_IN
50_B26_PAD_IN
50_B8_PAD_IN
1
RADIO_LB_PAD
L4305_RF
22NH-5%-0.1A
01005
NOSTUFF
2
28
SW1
27
SW2
34
B20IN
33
B26IN
31
B8IN
7
4
39 41 43 44
8
9
151312
11
39 41 43 44
50_B20_PAD_RX
50_B26_PAD_RX
50_B8_PAD_RX
50_B20_PAD_ANT
50_B26_PAD_ANT
50_B8_PAD_ANT
LB_VLB_VIO
RFFE1_CLK
RFFE1_DATA
41
30 35 39 40 41 43 44
30 35 39 40 41 43 44
NP0-C0G
5%
16V
01005
RADIO_WTR
100PF
12
50_B26_MATCH_2
5%
16V
01005
C4311_RF
100PF
12
5%
16V
NP0-C0G
01005
50_B20_MATCH_1
RADIO_WTR
1
C4312_RF
0.8PF
+/-0.05PF
16V
2
C0G-CERM
01005
NOSTUFF
8.2NH-3%-0.19A-1.6OHM
RADIO_WTR
50_B8_MATCH_1
1
2
PLACE INDUCTOR CLOSE TO PA
PLACE INDUCTOR CLOSE TO PA
L4314_RF
18NH+/-3%-0.250A
0201
L4312_RF
7.5NH+/-3%-0.2A
01005
L4313_RF
21
01005
L4315_RF
15NH-3%-0.140A
01005
C4313_RF
0.9PF
+/-0.05PF
16V
CERM
01005
1
2
21
50_B20_PRX_WTR_IN
21
50_B26_PRX_WTR_IN
50_B26_MATCH_1
C4318_RF
21
0.6PF
+/-0.05PF
16V
CERM
01005
1
2
RADIO_WTR
1
C4314_RF
47PF
5%
16V
2
CERM
01005
50_B8_PRX_WTR_IN
RADIO_LB_PAD
L4308_RF
18NH-3%-140MA
01005
NOSTUFF
L4320_RF
4.3NH-3%-0.270A
36
L4316_RF
4.3NH-3%-0.270A
01005
21
01005
36
D
C
36
21
50_B20_ASM_TRX
1
C4317_RF
1.0PF
+/-0.1PF
16V
2
NP0-C0G
01005
45
B
50_B26_ASM_TRX
45
50_B8_B26_B20_WTR_TX_OUT
A
36
WTR OUTPUT HAS DC
FIRST SHUNT MUST
BE A CAPACITOR.
RADIO_LB_PAD
C4301_RF
100PF
12
5%
10V
NP0-C0G
01005
CTRL_LB_BAND_SELECT_1
42
CTRL_LB_BAND_SELECT_2
42
R4301_RF
0.00
50_LB_SW_T_MCH
12
1/32W
01005
1
C4320_RF
0.5PF
+/-0.05PF
16V
2
C0G-CERM
01005
NOSTUFF
50_LB_SW_MCH_IN
0%
MF
CXA2973GC
3
V1
2
V2
42
RADIO_LB_PAD
1
VDD
U_LB_SW
BGA
GND
8
9
PP_LDO14_RFSW
DECOUPLING SHARED W C4201_RF
RF1
RF2
RF3
RF4
29 31 41
50_LB_SW_MCH_IN
6
5
50_B8_WTR_TX_OUT
7
50_B20_WTR_TX_OUT
4
50_B26_WTR_TX_OUT
42
V2
42
42
42
0
63
BANDV1
11B8
B20
0
B26
11
PLACE INDUCTOR CLOSE TO PA
1
L4306_RF
18NH-3%-140MA
01005
RADIO_LB_PAD
NOSTUFF
2
L4321_RF
3.6NH+/-0.1NH-0.280A
01005
21
50_B8_ASM_TRX
RADIO_LB_PAD
1
C4307_RF
10PF
5%
16V
2
CERM
01005
NOSTUFF
PAGE TITLE
LOW BAND PAD
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
45
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
43 OF 55
SHEET
42 OF 54
124578
SIZE
A
D
876543
MID BAND PAD (B1, B25, B3, B4, B34, B39)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
EPAD
EPAD
NOSTUFF
39 41 42 44
RADIO_MB_PAD
1
C4409_RF
47PF
5%
16V
2
CERM
01005
MB_ET_RC_FILT
B1/4RX
B25RX
B1/3/4ANT
B25ANT
B34/39TX
SDATA
EPAD
EPAD
EPAD
454647
44
RADIO_MB_PAD
1
R4401_RF
0.00
0%
1/32W
MF
01005
2
NOSTUFF
12
50_B3_PAD_RX
B3RX
10
50_B1_B4_PAD_RX
5
50_B25_PAD_RX
16
50_B1_B3_B4_PAD_ANT
8
50_B25_PAD_ANT
24
50_B34_B39_PAD_ANT
1
RFFE_VIO
VIO
2
RFFE1_CLK
SCLK
3
RFFE1_DATA
EPAD
EPAD
48
45 46 48
35 40 41
42 44
30 35 39
40 41
44
30 35 39
40 41 42
0.9NH+/-0.1NH-0.32A-0.6OHM
44
1
2
27
36
VCC1
VBATT
RADIO_MB_PAD
U_MBPAD
LGA
VPA_ET
26
VCC2
RADIO_MB_PAD
1
C4408_RF
47PF
5%
16V
2
CERM
01005
39 41 42 44
C
36
50_B3_B4_WTR_TX_OUT
1
2
RADIO_MB_PAD
C4401_RF
18PF
2%
16V
CERM
01005
NOSTUFF
RADIO_MB_PAD
C4403_RF
100PF
12
5%
16V
NP0-C0G
01005
RADIO_MB_PAD
1
C4406_RF
18PF
2%
16V
2
CERM
01005
NOSTUFF
50_B3_B4_PAD_IN
50_B1_B25_B34_B39_PAD_IN
35
B3/4IN
34
B1/25/34/39IN
VPA_BATT
RADIO_MB_PAD
1
C4407_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
AFEM-8020-AP1
RADIO_MB_PAD
C4404_RF
100PF
50_B1_B25_B34_B39_WTR_TX_OUT
36
12
5%
16V
NP0-C0G
01005
GND
4
GND
GND
GND
GND
GND
GND
GND
GND
6119
7
GND
141315171819202123222528293130
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
EPAD
EPAD
EPAD
EPAD
37
383940
EPAD
414243
GND
GND
32
33
B
L4421_RF
12
50_B34_B39_LPF_IN
01005
NOSTUFF
C4410_RF
0.6PF
+/-0.05PF
16V
CERM
01005
RADIO_MB_PAD
RADIO_WFR
C4420_RF
100PF
12
50_B3_MATCH_1
5%
16V
NP0-C0G
01005
RADIO_WFR
C4422_RF
100PF
12
5%
16V
NP0-C0G
01005
RADIO_MB_PAD
FL_B39LP
BAND34-39
LFL151G95TCSD734
0402
42
IN OUT
GND
3
1
L4407_RF
1.0NH+/-0.1NH-0.580A
3.6NH+/-0.1NH-0.280A
1.5NH+/-0.1NH-220MA
50_B25_MATCH_1
1
L4402_RF
3.5NH+/-0.1NH-0.280A
01005
2
50_B25_MATCH_2
50_B34_B39_LPF_OUT
TDD-LTE
21
01005
C4426_RF
R1500
L4409_RF
U1501
L4404_RF
2.2NH+/-0.1NH-0.380A
L4403_RF
01005
L4405_RF
01005
L4406_RF
2.7NH+/-0.1NH-0.370A
01005
RADIO_WFR
L4409_RF
2.0NH+/-0.1NH-0.380A
C4423_RF
33PF
12
5%
16V
NP0-C0G-CERM
01005
1
C4414_RF
12PF
5%
16V
2
CERM
01005
NOSTUFF
RADIO_MB_PAD
21
01005
21
50_B3_MATCH_1_MATCH
21
21
01005
RADIO_WFR
R4402_RF
0.00
12
0%
1/32W
MF
01005
1
C4418_RF
0.2PF
+/-0.1PF
16V
2
NP0-C0G
01005
NOSTUFF
12
50_B3_PRX_WFR_IN
RADIO_WFR
C4425_RF
33PF
12
5%
16V
NP0-C0G-CERM
01005
50_B1_B4_PRX_WFR_IN
21
50_B25_PRX_WFR_IN
RADIO_MB_PAD
50_B34_B39_HB_SWITCH_IN
50_B1_B3_B4_ASM_TRX
38
D
38
38
C
46
45
B
L4408_RF
3.8NH-+/-0.1NH-0.27A
1
C4413_RF
1.2PF
+/-0.05PF
16V
2
NP0-C0G-CERM
01005
A
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
63
01005
21
50_B25_ASM_TRX
1
C4419_RF
1.5PF
+/-0.05PF
16V
2
NP0-C0G-CERM
01005
MID BAND PAD
Apple Inc.
R
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
44 OF 55
SHEET
43 OF 54
124578
45
A
SIZE
D
876543
HIGH BAND PAD (B7, B38, B40, B41, XGP)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C4533_RF
R1600
L1616
U1601
D
1
C4507_RF
68PF
5%
16V
2
NP0-C0G
01005
RADIO_HB_PAD
R4506_RF
0.00
50_B7_WTR_TX_OUT
36
C
50_B40_B38_B41_WTR_TX_OUT
36
12
0%
1/32W
MF
01005
RADIO_HB_PAD
RADIO_HB_PAD
C4533_RF
100PF
12
5%
16V
NP0-C0G
01005
50_B7_PAD_MTCH
RADIO_HB_PAD
1
C4502_RF
1PF
+/-0.1PF
16V
2
NP0-C0G
01005
RADIO_HB_PAD
1
C4503_RF
1.0PF
+/-0.1PF
16V
2
NP0-C0G
01005
C4531_RF
50_B40A_TX_HB_SWITCH_MCH
1
L4506_RF
7.5NH+/-3%-0.2A
01005
FT40A41A
B
44
50_B40A_B41A_FILTER_IN
1
L4501_RF
1.0NH+/-0.1NH-0.22A-0.9OHM
01005
NOSTUFF
RADIO_HB_PAD
2
LTE-BAND-40A-41A-TX
LGA
BAND_40A
6
ANT
BAND_41A
GND
294
GND
GND
578
GND
GND
GND
3
1
50_B41A_TX_HB_SWITCH_MCH
TDD-LTE
2
1
L4507_RF
3.9NH+/-0.1NH-0.270A
01005
2
C4501_RF
18PF
12
2%
16V
CERM
01005
50_B38_B40_B41_PAD_IN
15PF
12
50_B40A_TX_HB_SWITCH_IN
5%
16V
NP0-C0G-CERM
01005
C4528_RF
3.0PF
50_B41A_TX_HB_SWITCH_IN
+/-0.1PF
16V
NP0-C0G
01005
50_B7_PAD_IN
46
25
26
39 41 42 43
B7IN
B38/40/41IN
GND
GND
GND
6
8104
2
GND
RADIO_HB_PAD
1
C4505_RF
1.0UF
20%
10V
2
X5R-CERM
0201-1
GND
GND
GND
VPA_BATT
242120
VCC1
VCC2
VBATT
RADIO_HB_PAD
U_HBPAD
AFEM-8010-AP1
LGA
GND
GND
GND
GND
GND
GND
23
22
18
17
16
141312
EPAD
29
19
VAPT
EPAD
EPAD
323031
VPA_ET
1
C4506_RF
100PF
5%
16V
2
NP0-C0G
01005
EPAD
EPAD
33
B7RX
B7ANT
B41B
B40/B41
B41C
B40A/B41A
SCLK
SDATA
EPAD
EPAD
EPAD
363537
34
39 41 42 43
VPA_APT
1
C4532_RF
68PF
5%
25V
2
NP0-C0G-CERM
01005
11
50_B7_RX_PAD
15
50_B7_ANT_PAD
7
50_B41B_TX_PAD
3
50_B40_B41_TX_PAD
5
50_B41C_TX_PAD
9
50_B40A_B41A_TX_PAD
27
RFFE_VIO
VIO
28
RFFE1_CLK
1
RFFE1_DATA
EPAD
39 40
46 48
35 40 41
43 45
43
30 35 39
40 41 42
30 35 39
40 41 42
43
C4521_RF
100PF
12
5%
16V
NP0-C0G
01005
RADIO_WTR
1
2
L4512_RF
3.3NH+/-0.1NH-290MA
50_B7_MATCH_1
L4509_RF
2.1NH+/-0.1NH-0.6A
RADIO_HB_PAD
1
C4512_RF
0.2PF
+/-0.1PF
16V
2
NP0-C0G
01005
NOSTUFF
C4526_RF
100PF
RADIO_HB_PAD
1
C4510_RF
1.0PF
+/-0.1PF
16V
2
NP0-C0G
01005
NOSTUFF
1
L4527_RF
9.1NH-3%-0.17A-1.7OHM
01005
2
2.2NH+/-0.1NH-0.380A
L4528_RF
22NH-3%-0.12A-3.2OHM
01005
L4524_RF
1.8NH+/-0.1%-0.380A
12
5%
16V
NP0-C0G
01005
L4520_RF
1.3NH+/-0.1NH-0.400A
01005
L4515_RF
21
01005
1.2NH+/-0.1NH-0.550A
21
50_B41B_TX_HB_SWITCH_IN
01005
01005
0201
21
1
2
L4516_RF
01005
21
21
50_B7_PRX_WTR_IN
RADIO_WTR
C4522_RF
1.8PF
12
+/-0.1PF
16V
NP0-C0G
01005
50_B7_ASM_TRX
50_B41B_TX_OUT
1
C4520_RF
0.7PF
+/-0.1PF
16V
2
NP0-C0G
01005
50_B40_TX_FILTER_IN
50_B41C_FILTER_IN
L4521_RF
6.8NH-3%-140MA
01005
RADIO_HB_PAD
NOSTUFF
2112
50_B40A_B41A_FILTER_IN
36
45
44
FT_B40
TX-BAND40-LTE
SAFFU2G35MA0F57
GND
44
LGA
GND
UNBAL_PRT4UNBAL_PRT1
GND
532
50_B40_TX_FILTER_OUT
TDD-LTE
L4526_RF
2.2NH+/-0.1NH-0.380A
41
1
L4523_RF
9.1NH-3%-0.17A-1.7OHM
01005
2
01005
21
50_B40_TX_HB_SWITCH_IN
D
C
B
L4522_RF
50_B41C_FILTER_IN
44
A
1
L4504_RF
3.0NH+/-0.1NH-200MA
2
44
NOSTUFF
RADIO_HB_PAD
01005
50_B41B_TX_OUT
2.7NH+/-0.1NH-0.370A
21
44
01005
50_B41B_FILTER_IN
1
2
NOSTUFF
RADIO_HB_PAD
L4508_RF
2.4NH+/-0.1NH-200MA
01005
50_B41B_FILTER_IN
SAW-BAND-41B-41C-TDD-TX
44
50_B41C_FILTER_IN
44
RADIO_HB_PAD
FT_41BC
SAWEN2G58QA0F57
B41BIN
RF3/
LGA
4
B41CIN
GND
GND
GND
2
3
GND
RF2/RF1/
91
50_B41B_TX_HB_SWITCH_MCH
B41BOUT
RF4/
6
50_B41C_TX_HB_SWITCH_MCH
B41COUT
GND
GND
TDD-LTE
875
10
63
L4525_RF
1.2NH+/-0.1NH-0.550A
01005
21
50_B41C_TX_HB_SWITCH_IN
PAGE TITLE
HIGH BAND PAD
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
45 OF 55
SHEET
44 OF 54
124578
SIZE
A
D
876543
ANTENNA SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C1702
R1700
L4608_RF
U1702
D
L4608_RF
VCC_ASM_FILTERED
22-OHM-25%-0.2A-0.9DCR
RADIO_ASM
1
C4602_RF
47PF
5%
16V
2
CERM
01005
ASM NEEDS TO BE UPDATED WITH A NEW PINOUT VERSION
C
50_HB_SWITCH_RX
1
RADIO_ASM
2
46
TO DIVERSITY MODULE
TO DIVERSITY MODULE
1
RADIO_ASM
L4604_RF
1.0NH+/-0.1NH-0.22A-0.9OHM
01005
NOSTUFF
2
FRX34B39
BAND34-39
L4601_RF
50_B34_B39_PRX_WTR_IN
36
2.4NH+/-0.1NH-200MA
01005
21
50_B34_B39_FILT_RX
1
L4602_RF
3.3NH+/-0.1NH-180MA
01005
RADIO_ASM
2
B
SAWFD1G90LC0F57
19
INPUTOUT_FIL1
LGA
OUT_FIL2
GND
78543
2
1.0NH+/-0.1NH-0.22A-0.9OHM
RADIO_ASM
10
TDD-LTE
L4603_RF
NOSTUFF
RADIO_ASMRADIO_ASM
6
01005
R4608_RF
50_HB_SWITCH_TX
46
0.00
12
50_HB_SW_RX_ASM_MCH
0%
1/32W
MF
01005
50_B7_ASM_TRX
44
50_B39_RX_ASM_OUT
50_B34_RX_ASM_OUT
50_B1_B3_B4_ASM_TRX
43
50_B25_ASM_TRX
43
50_HB_2G_ASM_IN
40
50_HB_DIVERSITY_ASM
48
50_B17_ASM_TRX
41
50_B8_ASM_TRX
42
50_B28A_ASM_TRX
41
50_B28B_ASM_TRX
41
50_B26_ASM_TRX
42
50_B13_ASM_TRX
41
50_B20_ASM_TRX
42
50_B29_ASM_TRX
41
50_LB_2G_ASM_IN
50_LB_DIVERSITY_ASM
48
RADIO_ASM
1
RF1
2
RF3
3
RF7
4
RX1
22
TRX6
23
TRX7
24
TRX8
12
HBTX
20
HBRF2
8
TRX2
18
TRX3
9
TRX0
10
TRX1
16
TRX4
17
TRX5
11
TRX11
7
RX2
14
LBTX
19
LBRF2
29
VDD
U_ASM_RF
RF5159
LGA
GND
1315253031633
FWD/REV
SCLK
SDATA
A2
A1
VIO
01005
32
21
5
26
28
27
21
RFFE_VIO
RFFE2_CLK
RFFE2_DATA
PP_BATT_VCC
50_ASM_ANT1_OUT
35 40 41 43 44 46 48
30 35 46 48
30 35 46 48
1
C4606_RF
22PF
5%
16V
2
CERM
01005
14 16 25 26 40 46
50_FWD_REV_CPL_OUT
50_ANT2_CONN
R4609_RF
0.00
12
1%
1/20W
MF
0201
50_ANT1_CONN
1
R4601_RF
105
1%
1/32W
MF
01005
2
RADIO_ASM
NOSTUFF
50
50
R4603_RF
0.00
12
0%
1/32W
MF
01005
RADIO_ASM
50_FWD_OR_REV_RF
1
R4602_RF
105
1%
1/32W
MF
01005
2
RADIO_ASM
NOSTUFF
36
D
C
B
A
63
PAGE TITLE
ANTENNA SWITCH
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
46 OF 55
SHEET
45 OF 54
124578
SIZE
A
D
876543
HIGH BAND SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
D
R4703_RF
0.00
50_B40A_PRX_WTR_IN
36
C
50_B41A_PRX_WTR_IN
36
50_B40B_B38X_PRX_WTR_IN
36
B
12
0%
1/32W
MF
01005
C4720_RF
6.0PF
12
+/-0.1PF
NP0-C0G
01005
C4701_RF
100PF
12
5%
10V
NP0-C0G
01005
50_B41A_PRX_MATCH1
16V
2.7NH+/-0.1NH-0.370A
50_B40B_B38X_PRX_MATCH2
1
L4704_RF
3.7NH-+/-0.1NH-0.27A
01005
2
1
L4705_RF
2.0NH+/-0.1NH-0.380A
01005
2
C4704_RF
1
NP0-C0G
L4706_RF
1.0NH+/-0.1NH-0.580A
01005
2
50_B41A_PRX_MATCH2
RADIO_HBSWITCH
1
C4702_RF
15PF
5%
16V
2
NP0-C0G-CERM
01005
L4713_RF
01005
50_B40A_PRX_FILTER
RADIO_HBSWITCH
100PF
1 2
50_B41A_PRX_FILTER
5%
16V
01005
21
50_B40B_B38X_PRX_FILTER
1
L4712_RF
2.7NH+/-0.1NH-0.370A
01005
2
RADIO_HBSWITCH
FR40A41A
SAW-BAND-40A-41A-TDD-RX
885055
9
RX_B40A
LGA
GND
GND
GND
5
8107
885056
RF3/RX_B40B
LGA
RF2/RX_B38X
GND
GND
GND
GND
GND
ANT
GND
314
GND
6
RX_B41A
GND
RADIO_HBSWITCH
FR38X40B
SAW-BAND-40B-38X-TDD-RX
2
RF1/ANT
GND
GND
31458107
RADIO_HBSWITCH
2
50_B40A_B41A_RX_MATCH
GND
TDD-LTE
50_B40B_RX_MATCH
9
6
50_B38X_RX_MATCH
TDD-LTE
RADIO_HBSWITCH
C4709_RF
12
CERM
01005
R4708_RF
0.00
12
0%
1/32W
MF
01005
R4707_RF
0.00
12
0%
1/32W
MF
01005
18PF
2%
16V
1
L4709_RF
3.3NH+/-0.1NH-290MA
01005
2
1
L4710_RF
12NH-3%-0.140A
01005
RADIO_HBSWITCH
2
1
L4708_RF
2.9NH-+/-0.1NH-0.36A
01005
2
50_B40A_TX_HB_SWITCH_IN
44
50_B41A_TX_HB_SWITCH_IN
44
50_B40_TX_HB_SWITCH_IN
44
50_B41B_TX_HB_SWITCH_IN
44
50_B41C_TX_HB_SWITCH_IN
44
50_B34_B39_HB_SWITCH_IN
43
50_B40A_B41A_RX
50_B40B_RX
50_B38X_RX
RFFE_VIO
35 40 41 43 44 45 48
RFFE2_CLK
30 35 45 48
RFFE2_DATA
30 35 45
48
11
TX1
12
TX2
7
TX3
8
TX4
9
TX5
10
TX6
14
RX1
13
RX2
15
RX3
4
VIO
3
SCLK
2
SDATA
1
VBATT
U_HBS_RF
CXM3652UR
UQFN
THRM
GND
PAD
6
17
TX RF1
RX RF1
TDD-LTE
PP_BATT_VCC
RADIO_HBSWITCH
1
C4710_RF
47PF
5%
16V
2
CERM
01005
5
50_HB_SWITCH_TX_OUT
16
50_HB_SWITCH_RX
14 16 25 26 40 45
C4721_RF
100PF
12
50_HB_SWITCH_TX
5%
25V
C0G
0201
45
45
D
C
B
A
63
PAGE TITLE
HIGH BAND SWITCH
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
47 OF 55
SHEET
46 OF 54
124578
SIZE
A
D
876543
RX DIVERSITY (1)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
MIDBAND
D
50_B1_B4_DRX_WFR_IN
38
MIDBAND DIVERSITY - WFR
L4806_RF
1.8NH+/-0.1%-0.380A
L4803_RF
3.6NH+/-0.1NH-0.280A
01005
01005
21
21
50_B1_B4_DRX_DSM
48
50_B7_DRX_WTR_IN
36
RADIO_WTR
C4809_RF
1.1PF
+/-0.1PF
NP0-C0G
HIGHBAND DIVERSITY - WTR
C4813_RF
100PF
12
5%
16V
NP0-C0G
RADIO_WTR
01005
12
16V
01005
L4813_RF
3.3NH+/-0.1NH-290MA
50_B7_DRX_MATCH
21
01005
RADIO_WTR
R4811_RF
0.00
12
0%
1/32W
MF
01005
50_B7_DRX_WTR_MCH
50_B7_DRX_DSM
50_B8_B28B_DRX_WTR_IN
48
LOWBAND DIVERSITY - WTR
L4825_RF
18NH-3%-0.140A
01005-1
21
50_B8_B28B_DRX_WTR_MCH
1
C4820_RF
0.3PF
+/-0.05PF
16V
2
C0G-CERM
01005
RADIO_WTR
C4823_RF
100PF
12
5%
16V
NP0-C0G
01005
50_B8_B28B_DRX_DSM
12
C4826_RF
R1800
L1829
U1801
D
48
L4805_RF
50_B3_DRX_WFR_IN
1.8NH+/-0.1%-0.380A
38
C4824_RF
33PF
12
C
50_B25_DRX_WFR_IN
5%
16V
NP0-C0G-CERM
01005
RADIO_WFR
C4802_RF
33PF
12
16V
NP0-C0G-CERM
01005
L4801_RF
2.4NH+/-0.1NH-0.370A
01005
50_B3_DRX_WFR_MCH_MATCH
L4804_RF
1.6NH+/-0.1NH-0.390A
L4802_RF
2.3NH+/-0.1NH-0.370A
5%
50_B25_DRX_MATCH
01005
50_B3_DRX_WFR_MCH
21
21
01005
01005
21
50_B25_DRX_WFR_MCH
21
MIDBAND DIVERSITY - WTR
B
50_B34_DRX_WTR_IN
36
50_B39_DRX_WTR_IN
36
2.0NH+/-0.1NH-0.380A
2.0NH+/-0.1NH-0.380A
RADIO_WTR
C4806_RF
33PF
12
5%
16V
NP0-C0G-CERM
01005
RADIO_WTR
L4807_RF
21
01005
RADIO_WTR
L4808_RF
3.6NH+/-0.1NH-180MA
L4809_RF
L4810_RF
2.2NH+/-0.1NH-0.380A
50_B39_DRX_WTR_MCH2
01005
NOSTUFF
RADIO_WTR
01005
01005
21
21
21
50_B39_DRX_WTR_MCH1
RADIO_WFR
C4805_RF
100PF
12
16V
5%
NP0-C0G
RADIO_WFR
C4804_RF
100PF
12
01005
5%
16V
NP0-C0G
C4808_RF
5%
50_B3_DRX_DSM
01005
50_B25_DRX_DSM
50_B34_DRX_DSM
RADIO_WTR
100PF
12
50_B39_DRX_DSM
01005
16V
NP0-C0G
48
50_B38X_DRX_WTR_IN
36
L4814_RF
1.8NH+/-0.1%-0.380A
0.4NH+/-0.1NH-0.990A
50_B40_DRX_WTR_IN
48 38
48
48
36
50_B41A_DRX_WTR_IN
36
C4830_RF
NP0-C0G-CERM
L4812_RF
2.4NH+/-0.1NH-0.370A
RADIO_WTR
15PF
12
5%
50_B41A_DRX_WTR_MCH_MATCH
16V
01005
50_PCS_WTR_IN
36
RADIO_WTR
C4811_RF
47PF
12
50-PCS_DRX_WTR_MCH2
5%
16V
CERM
01005
A
50_DCS_WTR_IN
36 48
RADIO_WTR
C4812_RF
47PF
12
50_DCS_DRX_WTR_MCH2
5%
16V
CERM
01005
RADIO_WTR
R4818_RF
0.00
12
0%
1/32W
MF
01005
21
01005
RADIO_WTR
L4830_RF
21
01005
21
01005
RADIO_WTR
R4817_RF
0.00
12
0%
1/32W
MF
01005
L4815_RF
1.3NH+/-0.1NH-0.400A
2.2NH+/-0.1NH-0.380A
2.7NH+/-0.1NH-0.370A
2.2NH+/-0.1NH-0.380A
5.6NH-3%-0.23A-1.3OHM
21
01005
L4819_RF
01005
L4820_RF
L4822_RF
01005
L4821_RF
01005
C4816_RF
50_B41A_DRX_WTR_MCH
RADIO_WTR
5%
NP0-C0G
C4817_RF
21
50_PCS_WTR_RX_MCH
5%
21
01005
21
50_DCS_WTR_RX_MCH
5%
21
50_B38X_DRX_DSM
RADIO_WTR
100PF
12
50_B41A_DRX_FILTER
16V
01005
RADIO_WTR
100PF
12
01005
16V
NP0-C0G
RADIO_WTR
C4818_RF
100PF
12
16V
01005
NP0-C0G
50_B40_DRX_FILTER
50_PCS_DSM_OUT
50_DCS_DSM_OUT
48
48
36
50_B13_B17_DRX_WTR_IN
48 36
50_B20_B29_DRX_WTR_IN
36
48
50_B26_B28A_DRX_WTR_IN
RADIO_WTR
L4826_RF
22NH-5%-0.1A
01005
RADIO_WTR
L4823_RF
22NH-5%-0.1A
01005
2112
50_B13_B17_DRX_WTR_MCH
1
C4831_RF
0.8PF
+/-0.05PF
16V
2
C0G-CERM
01005
21
50_B20_B29_DRX_WTR_MCH
1
C4832_RF
0.8PF
+/-0.05PF
16V
2
C0G-CERM
01005
RADIO_WTR
C4826_RF
100PF
12
50_B26_B28A_DRX_WTR_MCH
5%
16V
NP0-C0G
01005
L4829_RF
8.2NH-3%-0.19A-1.6OHM
63
RADIO_WTR
C4825_RF
C4827_RF
01005
100PF
5%
10V
NP0-C0G
01005
RADIO_WTR
100PF
12
5%
10V
NP0-C0G
01005
21
PAGE TITLE
50_B13_B17_DRX_DSM
50_B20_B29_DRX_DSM
50_B26_B28A_DRX_DSM
1
L4827_RF
13NH-+/-0.3%-0.14A
01005
2
RX DIVERSITY
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
48
48
48
DRAWING NUMBER
051-9903
REVISION
BRANCH
PAGE
48 OF 55
SHEET
47 OF 54
124578
7.0.0
SIZE
C
B
A
D
876543
RX DIVERSITY (2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C1900
R1900
L1900
U1901
D
L4905_RF
C
50_B1_B4_DRX_DSM
47
50_B3_DRX_DSM
47
50_B7_DRX_DSM
47
50_B8_B28B_DRX_DSM
47
50_B13_B17_DRX_DSM
47
50_B25_DRX_DSM
47
50_B26_B28A_DRX_DSM
47
50_B20_B29_DRX_DSM
47
50_B34_DRX_DSM
FD40B41A
SAW-2-1-BAND-40-41A-DRX
B39252B9920P810
50_B40_DRX_FILTER
47
50_B41A_DRX_FILTER
47
1
B
L4901_RF
9.1NH-3%-0.17A-1.7OHM
01005
RADIO_DSM
2
1
L4902_RF
5.6NH-3%-0.23A-1.3OHM
01005
RADIO_DSM
2
6
B40OUT
91
LGA
B41AOUT
GND
GND
GND
875
10
GND
B40IN
B41AIN
GND
3
4
GND
1
2
L4903_RF
8.2NH-3%-0.19A-1.6OHM
01005
RADIO_DSM
2
47
50_B39_DRX_DSM
47
50_B38X_DRX_DSM
47
50_B40_DRX_DSM
50_B41A_DRX_DSM
1
L4904_RF
5.1NH-3%-0.250A
01005
RADIO_DSM
2
32
33
16
19
25
34
21
23
12
13
17
14
15
B1/B4
B3
B7
B8/B28B
B13/B17
B25
B26/B28A
B20/B29
B34
B39
B38X
B40
B41A
GND
GND
6
HFQSWBXUA-221
GND
GND
GND
8101
U_DSM_RF
GND
GND
GND
22-OHM-25%-0.2A-0.9DCR
VCC_DSM
1
C4901_RF
15PF
5%
16V
2
NP0-C0G-CERM
01005
2
VBATT
LGA
GND
GND
GND
GND
GND
26272422201118
35
31
28
ANT LB
ANT HB
THRM
PAD
38
373639
01005
VIO
SDATA
SCLK
PCS
DCS
21
3
RFFE_VIO
4
RFFE2_DATA
5
RFFE2_CLK
7
50_LB_DIVERSITY_ASM
9
50_HB_DIVERSITY_ASM
29
50_PCS_DSM_OUT
30
50_DCS_DSM_OUT
40
PP_VCC_MAIN
10 12 14 15 16 17
23 26 31 39 51 52
35 40 41 43 44 45 46
30 35 45 46
30 35 45 46
45
45
47
47
D
C
B
A
63
PAGE TITLE
GPS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
49 OF 55
SHEET
48 OF 54
124578
SIZE
A
D
876543
GPS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C1900
R1900
L1900
U1901
D
C
100_GPS_DSM_P_OUT
100_GPS_DSM_M_OUT
50
50_GPS_DSM_IN
1
UNBAL_PORT
FL_GPSRF
LNA-GNSS-BAL
B8821
LGA
GND
GND
2
5
BAL_PORT
BAL_PORT
3
4
L5002_RF
10NH-3%-0.170A
RADIO_GPS
1
C5001_RF
1.0PF
+/-0.1PF
16V
2
NP0-C0G
01005
L5003_RF
10NH-3%-0.170A
01005
01005
21
100_GPS_WTR_IN_P
21
100_GPS_WTR_IN_N
36
36
D
C
SIZE
B
A
D
B
A
63
PAGE TITLE
GPS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
50 OF 55
SHEET
49 OF 54
124578
876543
ANTENNA FEED’S
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
TEST & COAX CONNECTOR FOR LOWER SECTION OF MLB
12
RADIO_LOW_ANT
D
50_ANT2_CONN
45
LOW_COAX
MM6829-2700B
F-ST-SM
1
3
2
MM6829-2700B
RADIO_UP_ANT
UAT_SPLT
F-ST-SM
3
2
50_CELL_WIFI_GPS_TRIPLEX_ANT
1
1
L5126_RF
10NH-3%-0.3A
0201
NOSTUFF
2
R5131_RF
0.00
12
C
TP_SHORT_PIN
P2MM-NSM
SM
1
NORTH_ANT_GND
PP
29
RADIO_UP_ANT
UP_COAX
MM6829-2700B
F-ST-SM
3
2
1%
1/20W
MF
RADIO_UP_ANT
0201
1
50_ANT2_UPPER_COAX_CONN
50_TRIPLEX_ANT_MCH
1
L5125_RF
18NH-3%-0.140A
01005
RADIO_UP_ANT
NOSTUFF
2
50_WIFI_2G_NOTCHPLEXER_IN
51
6
R5130_RF
RADIO_UP_ANT
ANT
EPAD
1715161312
0.00
12
1%
1/20W
MF
0201
F_TRI_RF
ACFM-W012-AP1
11
1
L5124_RF
18NH-3%-0.140A
01005
RADIO_UP_ANT
NOSTUFF
2
LGA
GND
7
810542
CELL
GPS/GNSS
WIFI
3
50_TRIPLEX_CELL
1
9
14
50_TRIPLEX_GPS
L5127_RF
3.9NH+/-0.1NH-0.270A
1
L5123_RF
18NH-3%-0.140A
01005
RADIO_UP_ANT
NOSTUFF
2
01005
21
50_GPS_LNA_IN
3
VOLTAGE=2.95V
PP_LDO13_GPS
SKY65746-14
U_GPSLNA
RF_IN
GND
245
33-OHM-25%-1500MA
1
C5129_RF
22PF
5%
16V
2
CERM
01005
RADIO_UP_ANT
1
VDD
RF_OUT
LGA
EPAD
7
L5128_RF
0201
6
21
1
C5130_RF
2.2UF
20%
6.3V
2
X5R
0201-1
RADIO_UP_ANT
50_GPS_DSM_IN
PP_LDO13
D
31 33
49
C
RADIO_UP_ANT
UAT_METR
MM6829-2700B
F-ST-SM
1
3
2
TO 5GHZ WIFI ANTENNA FEED
TP_WIFI_5G_GND
P2MM-NSM
SM
1
PP
50_ANT1_CONN
45
TP_WIFI_5G
29 50
ANT_GND
P2MM-NSM
SM
29
PP
1
50_WIFI_5G_CONN_ANT
1
C5132_RF
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
NOSTUFF
L5129_RF
1.4NH+/-0.1NH-1.1A
1
C5128_RF
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
RADIO_LOW_ANT
R5132_RF
0.00
12
1%
1/20W
MF
RADIO_UP_ANT
0201
21
0201
WIFI_BT
WI5G_ANT
MM6829-2700B
F-ST-SM
50_WIFI_5G_CONN_MCH
1
3
MM5829-2700
50_ANT1_SW
2
LOW_ANT
F-ST-SM
1
423
FROM 5GHZ WIFI
WIFI_BT
WI5G_CN
MM6829-2700B
F-ST-SM
1
3
2
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
50_WIFI_5G_IN_OUT
51
BI
ANTENNA FEEDS
Apple Inc.
R
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
51 OF 55
SHEET
50 OF 54
124578
SIZE
B
A
D
29 50
ANT_GND
C5122_RF
12PF
12
5%
25V
CERM
0201
50_UPPER_ANT_MCH
1
L5112_RF
12NH-310MA
03015
NOSTUFF
2
29 50
TP_UAT
P2MM-NSM
SM
11
PPPP
29
50_UPPER_ANT_FEED
L5122_RF
12NH-310MA
03015
50_UAT_MATCH
1
2
1
C5112_RF
15PF
5%
25V
2
NPO
0201
1
C5111_RF
0.7PF
+/-0.05PF
25V
2
C0G-CERM
0201
TP_UAT_GND
P2MM-NSM
SM
ANT_GND
B
A
63
876543
WLAN/BT
D
32K INTERFACE TO AP
WIFI_BT
29 30
IN
WIFI_BT
C5201_RF
7.5UF
20%
4V
CERM
0402
C
143
2
DC BLOCKS LOCATED ON AP SIDE
SWIZZLE DATA LANE ON TOP-LEVEL
B
WIFI_BT
L5201_RF
2.2UH-20%-0.3A-0.38OHM
WLAN_SR_LC
29 30
OUT
29 30
OUT
29 30 51
IN
29 30
BI
29
IN
29
IN
29 30
IN
29 30
IN
29 30
OUT
29 30
OUT
0603
HOST_WAKE_WLAN
WLAN_PCIE_WAKE_L
WLAN_PCIE_PERST_L
WLAN_PCIE_CLKREQ_L
90_WLAN_PCIE_REFCLK_N
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDN
90_WLAN_PCIE_RDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_TDP
29 30
IN
29 30
BI
29
IN
29
IN
WLAN_PCIE_PERST_L
29 30 51
29 30
29 30
21
JTAG_SEL
51
WLAN_JTAG_SWDCLK
WLAN_JTAG_SWDIO
OSCAR_CONTEXT_A
OSCAR_CONTEXT_B
1
2
IN
IN
C5215_RF
100PF
5%
16V
NP0-C0G
01005
WIFI_BT
10 12 14 15 16 17 23 26 31 39
IN
48 52
29
IN
CLK32K_AP
WLAN_VIN_1P35
WLAN_SR_VLX
WLAN_REG_ON
BT_REG_ON
PP_VCC_MAIN
PP_WL_BT_VDDIO_AP
36
CLK32K
26
VIN_LDO
28
SR_VLX
9
WL_REG_ON
10
BT_REG_ON
30
GPIO_0
12
PCIE_WAKE*
14
PCIE_PRST*
13
PCIE_CLKREQ*
16
PCIE_REFCLK_N
17
PCIE_REFCLK_P
20
PCIE_RDN
21
PCIE_RDP
18
PCIE_TDN
19
PCIE_TDP
11
JTAG_SEL
31
JTAG_TCK(GPIO_2)
34
JTAG_TMS(GPIO_3)
32
JTAG_TDI(GPIO_4)
35
JTAG_TDO(GPIO_5)
NC
33
JTAG_TRST(GPIO_6)
1
1527253729
WIFI_BT
1
C5202_RF
10UF
20%
6.3V
2
CERM-X5R
0402-1
WIFI_BT
R5208_RF
0.00
12
0%
1/32W
MF
01005
GND
4451465352
WIFI_BT
1
C5203_RF
27PF
5%
16V
2
NP0-C0G
01005
51
PP_WLAN_VDDIO_1V8
VOLTAGE=1.80V
WIFI_BT
1
C5204_RF
0.01UF
10%
6.3V
2
X5R
01005
57
1
2
5960616263646566676870
WIFI_BT
C5205_RF
27PF
5%
16V
NP0-C0G
01005
2223245455
VBATT
VBATT
VDDIO_1P8V
U5201_RF
LBEE5U8ZKC-646
WIFI_BT
69
LGA
71
72
VBATT_RF_VCC
73
VBATT_RF_VCC
THRM_PAD
7475767778798081828384
85
86938788899091
2G_ANT
5G_ANT
GPIO_1
BT_HOST_WAKE
BT_DEV_WAKE
BT_UART_CTS*
BT_UART_RTS*
BT_UART_RXD
BT_UART_TXD
BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_IN
BT_PCM_OUT
UART_RTS(GPIO_7)
UART_CTS(GPIO_8)
UART_RX(GPIO_9)
UART_TX(GPIO_10)
SECI_TX(GPIO_13)
SECI_RX(GPIO_14)
RF_SW_CTRL_8
949697
92
95
45
58
8
43
42
38
39
41
40
49
50
48
47
56
4
3
2
6
5
7
98
50_WLAN_G_ANT
50_WLAN_A_ANT
PCIE_DEV_WAKE
HOST_WAKE_BT
WAKE_BT
BT_UART_CTS_L
BT_UART_RTS_L
BT_UART_RXD
BT_UART_TXD
BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_IN
BT_PCM_OUT
WLAN_UART_RTS_L
WLAN_UART_CTS_L
WLAN_UART_RXD
WLAN_UART_TXD
WLAN_COEX_TXD
WLAN_COEX_RXD
NC
WIFI_BT
C5208_RF
0.2PF
+/-0.1PF
16V
NP0-C0G
01005
NOSTUFF
29 30
IN
29
OUT
29
IN
29
OUT
29 30
IN
29 30
OUT
29
BI
29
BI
29
IN
29
OUT
29 30
OUT
29 30
IN
29 30
IN
29 30
OUT
IN
WIFI_BT
1
R5210_RF
100K
5%
1/32W
MF
01005
2
WIFI_BT
R5215_RF
0
5%
1/20W
MF
201
29 30
WIFI_BT
R5206_RF
0.00
12
0%
1/32W
MF
01005
WIFI_BT
R5205_RF
0.00
12
0%
1/32W
MF
01005
50_WIFI_5G_BPF_RADIO
WIFI_BT
C5212_RF
0.2PF
+/-0.1PF
16V
NP0-C0G
01005
NOSTUFF
BB_COEX_UART_RXD
BB_COEX_UART_TXD
WIFI_BT
FL5201_RF
5.15-5.92GHZ
LFB185G53CGCD878
13
2
30 35
30 35
50_WIFI_5G_BPF_MATCH
WIFI_BT
C5216_RF
0.2PF
+/-0.1PF
16V
NP0-C0G
01005
NOSTUFF
WIFI_BT
C5213_RF
0.2PF
+/-0.1PF
16V
NP0-C0G
01005
NOSTUFF
WIFI_BT
R5216_RF
0
1212
5%
1/20W
MF
201
WIFI_BT
R5214_RF
0
12
5%
1/20W
MF
201
50_WIFI_2G_NOTCHPLEXER_IN
WIFI_BT
1
C5211_RF
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
NOSTUFF
50_WIFI_5G_IN_OUT
WIFI_BT
C5217_RF
0.2PF
+/-0.1PF
16V
NP0-C0G
01005
NOSTUFF
12
D
50
BI
50
BI
C
B
PP_WLAN_VDDIO_1V8
WIFI_BT
1
R5201_RF
10K
5%
1/32W
MF
01005
2
NOSTUFF
A
WIFI_BT
1
R5202_RF
10K
5%
1/32W
MF
01005
2
JTAG_SEL
51
51
MODULE BOOT-STRAPPED TO PCIE INTERNALLY
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
63
SYNC_MASTER=N/A
PAGE TITLE
WIFI/BT: MODULE AND FRONT END
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=N/A
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
52 OF 55
SHEET
51 OF 54
124578
SIZE
A
D
876543
STOCKHOLM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
C2101
R2100
L2102
U2100
D
REMOVING BULK CAP 4.7UF 0402 -->
BECAUSE OF OTHER BULK CAPS IN LAYOUT
52
23 26 31
PP_VCC_MAIN
10 12 14
IN
15 16 17
39 48 51
51 52
14
10
12
15 16 17 23 26 31 39 48
RADIO_STOCKHOLM
C5306_RF
0.22UF
A2
A4
RF_DATA_IO
A5
RF_CLK_RX
B2
RF_CLK_TX
A1
TIO
A3
GP_IO
NC
B1
NRES
IN
1
20%
6.3V
2
X5R
0201
C5
VDD_RF
VDD
U5302_RF
AS3923-B0-BWLT
WLCSP
RF_IF_VDD
VSS
VSS_RF
D2D4B5
D5
RADIO_STOCKHOLM
1
C5307_RF
0.22UF
20%
6.3V
2
X5R
0201
CDMP1
CDMP2
RFO1
RFO2
RFI1
RFI2
VSP_RF
VSP
VSS_DMP
B3
B4
STOCKHOLM_CDMP2
C4
STOCKHOLM_RFO1
STOCKHOLM_RF02
C3
STOCKHOLM_RFI1
D1
STOCKHOLM_RFI2
C1
STOCKHOLM_VSP_RF
D3
STOCKHOLM_VSP
C2
1
C5308_RF
1UF
20%
6.3V
2
X5R
0201
RADIO_STOCKHOLM
L5301_RF
78NH-5%-0.97A-0.13OHM
L5302_RF
78NH-5%-0.97A-0.13OHM
1
C5309_RF
0.022UF
10%
6.3V
2
X5R-CERM
0201
RADIO_STOCKHOLM
0402
0402
21
21
1
C5310_RF
560PF
10%
50V
2
X7R-CERM
0201
RADIO_STOCKHOLM
1
C5311_RF
560PF
10%
50V
2
X7R-CERM
0201
RADIO_STOCKHOLM
STOCKHOLM_ANT_MATCH
3
4
BAL1
UNBAL
0805
T5301_RF
GND
BAL0
ATB201206E-20011
1
2
C5312_RF
220PF
12
2%
50V
NPO-COG
0402
C5313_RF
33PF
12
2%
25V
NPO-COG
0201
1
C5314_RF
390PF
2%
50V
2
C0G
0402
1
C5315_RF
220PF
2%
50V
2
NPO-COG
0402
TP5303_RF
1
A
TP-P55
TP5304_RF
A
TP-P55
1
STOCKHOLM_ANT
1
2
C5316_RF
330PF
2%
25V
NPO-COG
0201
29
20%
6.3V
X5R-CERM
01005
PP_PN65_VCC_SIM
PP_PN65_SIM_PMU
R5318_RF
0.00
12
1/32W
01005
PP_STOCKHOLM_VDD
RADIO_STOCKHOLM
1
C5304_RF
1UF
20%
10V
2
X5R
0201
R5319_RF
30 54
BI
OUT
IN
R5316_RF
0.00
12
0%
MF
TP5301_RF
STOCKHOLM_RF_CLK_RX_ASM3923
0%
1/32W
29 52
MF
01005
R5317_RF
0.00
12
0%
1/32W
MF
01005
STOCKHOLM_RF_DATA_IO_ASM3923
1
A
TP-P55
TP5302_RF
1
A
TP-P55
RADIO_STOCKHOLM
1
C5305_RF
0.1UF
20%
6.3V
2
X5R-CERM
01005
1.00K
12
RADIO_STOCKHOLM
5%
1/32W
MF
01005
54
1
R5303
10K
5%
1/32W
MF
01005
2
STOCKHOLM_ENABLE
STOCKHOLM_RF_CLK_TX_ASM3923
STOCKHOLM_TIO
PP_STOCKHOLM_1V8_S2R
29 52 54
IN
C
STOCKHOLM_HOST_WAKE
29 30
OUT
ALWAYS ON PULL-UP -->
STOCKHOLM_FW_DWLD_REQ
29 52
IN
BB_REQUEST_XO_CLK
30 32
OUT
REF_CLK_FROM_BB
30 32
IN
STOCKHOLM_UART_RXD
29 30
IN
STOCKHOLM_UART_TXD
29 30
OUT
STOCKHOLM_CTS_L
29 30
IN
STOCKHOLM_RTS_L
29 30
OUT
STOCKHOLM_ENABLE
29 52
IN
B
RADIO_STOCKHOLM
1
C5302_RF
1UF
20%
10V
2
X5R
0201
D1
B3
NC
A1
A2
A3
C1
D2
B1
B2
E1
E3
E4
NC
F4
NC
E6
NC
A7
NC
A6
NC
C3
NC
IRQ
SVDD_REQ
DWL
CLK_REQ
CLK_XTAL1
RX
TX
CTS
RTS
VEN
SMX_RST*
SMX_CLK
ESE_IO1
ESE_IO2
ESE_IO3
ESE_IO4
XTAL2
C6
C7
VBAT
VDD/RF_IF_VDD
GND
VSS
E2
NC
D3
D7
PVDD
VDHF
U5301_RF
PN65V
UFLGA
GND
GND
NC
E7
G2
G1
VUP
TVDD
SVDD_IN
SIM_SWIO
SIM_PMU_VCC
TX_PWR_REQ
ESE_DWPM_DBG
ESE_DWPS_DBG
RXP/RF_CLK_RX
RXN/RF_CLK_RX
RF_CLK_TX
RF_DATA_IO
TVSS
GND
GND
F3D6D4C4B6
G4
PP_STOCKHOLM_ESE
VOLTAGE=1.80V
B7
C5
SVDD
ESE_VDD
A4
A5
SIM_VCC
B5
F2
D5
E5
G7
ANT1
F6
G3
TX1
G5
TX2
F5
G6
ANT2
VMID
F1
PVSS
C2
F7
B4
52
VOLTAGE=1.80V
RADIO_STOCKHOLM
1
C5303_RF
0.1UF
2
STOCKHOLM_RF_DATA_IO
52
VOLTAGE=1.80V
STOCKHOLM_SIM_SWP
NC
NC
NC
NC
STOCKHOLM_RF_CLK_RX
NC
NC
NC
STOCKHOLM_RF_CLK_TX
STOCKHOLM_RF_DATA_IO
STOCKHOLM_VMID
RADIO_STOCKHOLM
1
C5317_RF
0.1UF
20%
6.3V
2
X5R-CERM
01005
PP_VCC_MAIN
D
C
B
PP_STOCKHOLM_1V8_S2R
29 52 54
STOCKHOLM_ENABLE
29 52
IN
STOCKHOLM_FW_DWLD_REQ
29 52
IN
A
NOSTUFF
RADIO_STOCKHOLM
1
R5301_RF
100K
5%
1/32W
MF
01005
2
RADIO_STOCKHOLM
1
R5302_RF
100K
5%
1/32W
MF
01005
2
63
SYNC_MASTER=N/A
PAGE TITLE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=N/A
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
53 OF 55
SHEET
52 OF 54
124578
SIZE
A
D
876543
ON-BOARD JUMPER FLEX
12
D
D
UAT JUMPER
L5408_RF
PAC2_VDD_3V0_FILTER
120NH-5%-40MA
0201
1
C5403_RF
0.01UF
10%
25V
2
X5R-CERM
0201
21
RFFE_VIO_S2R
1
C5405_RF
33PF
5%
16V
2
NP0-C0G
01005
6
C
R5401_RF
RFFE2_CLK_BUFFER
0
12
MF5%
2011/20W
1
C5401_RF
33PF
5%
16V
2
NP0-C0G
01005
SCLK_FILT
SDAT_FILT
5
4
1
10
9
8
VDD
U5411_RF
RF1331
WLCSP
SCLK
SDAT
RF1A
RF1B
RF2A
RF2B
GNDA
RFGND1
2
11
VIO
RFGND2
7
3
VIO_FILT
1
C5408_RF
0.01UF
10%
25V
2
X5R-CERM
0201
120NH-5%-40MA
1
C5404_RF
33PF
5%
16V
2
NP0-C0G
01005
L5407_RF
0201
21
PAC_VDD_3V0
29 35
29
C
R5402_RF
RFFE2_DATA_BUFFER
35
B
A
0
12
5%MF
1/20W
201
1
C5402_RF
33PF
5%
16V
2
NP0-C0G
01005
L_1B
L_1A
L_2AB
1
C5409_RF
0.5PF
0.05PF
25V
2
NP0-C0G
0201
L5403_RF
13NH-280MA
03015
L5402_RF
13NH-280MA
03015
L5401_RF
27NH
03015
C5407_RF
21
21
21
UAT_MID
1
L5400_RF
13NH-280MA
03015
2
12PF
12
2%
25V
C0G-CERM
0201
UAT
TP3
P2MM-NSM
1
63
SM
PP
B
SIZE
A
D
PAGE TITLE
JUMPER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
54 OF 55
SHEET
53 OF 54
124578
876543
DSDS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
12
D
PP_LDO6
30 31 33 54
1
1
C5501_RF
2.2UF
20%
6.3V
2
X5R
0201-1
NOSTUFF
DSDS_SIM_CLK
30 34
DSDS_SIM_RESET
NOSTUFF
30 34
DSDS_SIM_DATA_R
30
R5503_RF
C
30 34
DSDS_SIM_DATA
0.00
12
0%
1/32W
MF
01005
R5501_RF
15.00K
1%
1/32W
MF
01005
2
NOSTUFF
5
CLK
6
RST
4
IO0
8
VCC
U5501_RF
ST33F1MFE
UFDFPN
GND
EPAD
9
1
SWIO
IO1
NC1
NOSTUFF
2
3
NC
7
NC
DSDS_SIM_SWP
30 54
D
C
PP_STOCKHOLM_1V8_S2R
29 52
STOCKHOLM_VDD_MUX_3V0
29
1
C5502_RF
2.2UF
20%
6.3V
2
X5R
B
R5504_RF
PP_LDO5
30 31 33 54 52 54
4FF_SIM_SWP
0.00
12
0%
1/32W
MF
01005
R5505_RF
0.00
12
0%
1/32W
MF
01005
PP_PN65_SIM_PMU
STOCKHOLM_SIM_SWP
29 54 30 54
INBI
30 31 33 54
30 31 33 54
30 52 54 30 54
52 54
OUT
0201-1
NOSTUFF
STOCKHOLM_SIM_SEL
PP_LDO5
PP_LDO6
PP_PN65_SIM_PMU
VOLTAGE=3.00V
A1
D3
B3
C3
A
63
D2
A2
V+
VIO
U5502_RF
TS3DS26227YZT
WCSP
IN1
NC2
NO2
COM2
GND
NOSTUFF
B2
C2
COM1
NC1
NO1
IN2
4FF_SIM_SWP
D1
DSDS_SIM_SWP
B1
STOCKHOLM_SIM_SWP
C1
STOCKHOLM_SIM_SEL
A3
R5502_RF
10K
1/32W
01005
RADIO_BB
1
1%
MF
2
30 54
BI
30 52 54
BI
29 54
NOSTUFF
DEFAULT LOW = 4FF
PAGE TITLE
JUMPER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
PAGE
55 OF 55
SHEET
54 OF 54
124578
SIZE
B
A
D
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.