Apple ipad-mini Schematics

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Diesel57Diesel57
J2960
DZ2960
DZ2961
DZ2962
DZ2963
DZ31002_RF
R31004_RF
C34016_RF
R35001
DZ31001
C34012_RF
C34011_RF
R34002_RF
C34004_RF
U35001_RF
C34025_RF
R34001_RF
C34022_RF
C34006_RF
R33008_RF
C34021
Y33001_RF
C32031_RF
C33006
R33007
C32014_RF
R33001R33003
U32001_RF
C32003_RF
L32008_RF
C32007_RF
C32004_RF
SL9302
C32015
C32023
C32006
L32007_RF
R31101_RF
R31102_RF
R31103_RF
R31104_RF
R31005
C32016
C32017
C32018
C32036_RF
C32035_RF
R33019
R34005
R33018
C32020_RF
C34018
C34017
C32033_RF
C32009_RF
L32009_RF
R33004_RF
C32019
R33017
R33002_RF
C32002C32001
L32010_RF
C32010_RF
C2971
C2904
C41008_RF
C41009_RF
C41003_RF
L41007_RF
L41008_RF
L41006_RF
L42006_RF
R42011_RF
C42013_RF
C39013_RF
R39002_RF
L39005_RF
C46030
L46016
L46017
C46013_RF
C41004_RF
C41022_RF
C41012_RF
C41010_RF
L41004_RF
R42009_RFR42008_RF
U42001_RF
L39012
C39012
L39013
C46023_RF
L46018_RF
L46019
C46027
C46022
U46001_RF
C46021_RF
L46010_RF
L41005_RF
C41016_RF
C41011_RF
C41017_RF
L41003_RF
C41007_RF
U41002_RF
C41005_RF
C41006_RF
R41002_RF
R42006_RF
C42006_RF
C42005_RF
R42010_RF
C42010_RF
C42009_RF
C42008_RF
C42007_RF
L43023_RF
C43027_RF
L43022
R46005_RF
L46028_RF
C46020_RF
L45013_RF
C45015_RF
R45010_RF
U45001_RF
R45003_RF
L44011_RF
C44014_RF
L44009_RF
C44005_RF
FL44001_RF
L43024
L43009_RF
C43016
C39022_RF
C43026_RF
FL43002_RF
C43011_RF
L44008
C44003_RF
L43017_RF
L43008_RF
C45002_RF
C45003_RFC45004_RFC45005_RF
U44001_RF
L44002
FL39002_RF
C45001_RF
R45007_RF
R45006_RF
R45004_RF
L45004
L45009
R42005
R45008
R45009
L45008
R42001
L45005
R42007
R42003
R42002
FL42001
L42002_RF
C44007
C44008
L44005
L44007
C44009
L44006
C44010_RF
RT33001
C44011
C44012
C44013_RF
C43017_RF
C43028_RF
L43002_RF
L2901
C2905
C2903
C2802
L46004_RF
L46024_RF
L46003_RF
J2950
C2801
C2806
C2807
U2800
L2802
L2801
FL46001_RF
C46029_RF
L46027_RF
L46023_RF
C46026_RF
L46022_RF
C2901
C2900
C2902
L2900
C2970
C2906
C2972
C2907
L2902
C2911 C2908
C2909
C2910
L2903
C2973
L2800
C2800
R2801
C2804
C2805
C2803
L2804
L46021_RF
L2803
L46020_RF
R46008_RF
L2912L2911 L2910
L2950
L2808
J2800
L38026_RF
C40001
C40002
C38025
L40009
C38043
U36001_RF
C43023
C43024
L43005
C37002
L43014
L43012
L37006
C39019
L39009
C39018
U39001_RFU43001_RF
C39020_RF
L39010_RF
L38018_RF
L38025
R36003
L38019_RF
C38021
L38006
C38034_RF
C38079_RF
L38011_RF
R36004
C38027
C38003
L38001
C37001
U37001
C39007_RF
L38004_RF
R36005
C38023
C36004
C38022_RF
C38016_RF
L38022
L38003
C38010
C38038_RF
L38014_RF
C38040_RF
C36003
C38042_RF
C36001
C38017_RF
C36005
C38036_RF
L38021
L38010
C38032_RF
C38039_RF
L38013
C38013_RF
L38024_RF
C38018_RF
C38020_RF
L38016_RF
C38037_RF
L38017_RF
C36002_RF
L38023_RF
C38015
C38090
L46007
L40008
R40005
L37003
L37002
L40007
L40012_RF
L40006
R40004
L46006
L46009
L37005
L37004
C37006
L46013
FL46002_RF
C37005
C37004
L39002_RF
C39008_RF
C39003_RF
U40002_RF
C37003
C39014
L39007
C46007_RF
C39016
L40010_RF
R40003_RF
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C40011_RF
L40003_RF
C40008_RF
C39024_RF
C39021_RF
L40004_RF
C40007_RF
R34004_RF
C35008_RF
C35009_RF
C34023_RF C34026_RFC34001_RF C34005_RFC34008_RFC34007_RF
R34006_RF R34007_RF
C34028_RF
FL42002_RF
L40011_RF
C40017_RF
L40005
L36001_RF
C43005_RF
C34013_RF
FL40001
C40010
C40005_RF
C40003_RF
R35002_RF
C34015_RF
C34003_RF
C34002_RF
C43006_RF
U34001_RF
C34020_RF
C34019_RF
C34027_RF
C34014_RF
C37007_RF
U37002_RF
C41021_RF
C41020_RF
C40009_RF
U41001_RF
C40018_RF
R40001_RF
C41015
C40004_RF
C41002
L41001_RF
L40002_RF
R35005_RF
R35004_RF
C35007_RF
C35006_RF
C35001_RF
C34024
C33008
R34008
C34009
C32022_RF
C41019_RF
C32021_RF
C32011_RF
C41001_RF
C41018_RF
C32029_RF
C32013
C32037_RF
C32040_RF
L32011_RF
C32012_RF
C32034_RF
R33010_RF
C32030_RF
C32026_RF
C32008_RF
L38020_RF
L39001_RF
L39011_RF
C38041_RF
C39001_RF
C38024_RF
C39004
L39006
C39005_RF
L43007_RF
C43009_RF
C43010
C44001_RF
L44010
R45005
C43001_RF
C44015
C43002
L43001
C38029
L45010
L38008
L38009
C38044_RF
C38031_RF
L38015
C38019
L42001
C42001_RF
L42004
C42002_RF
L42005
L45006
C45013
L45007_RFL45003_RF
C45014
L45012
L45002
L45011
R36001
C43022
L43013
C43021
L43016
C43015
R43004_RF
L43020
C43020
L43003
R43006
R43005
FL43001_RF
C39009C39011
FL39001_RF
L43021_RF
C39006_RF
L39003_RF
L2960
C2960
R2900
R2901
C2961
L2961
R2902
L2962
C2962
R2903
C2963
L2963
C2702
SL9304
U2720
C2721
C2726
C7310
L2702
C1400
C1411
C1493
C7320
C1491
C1406
U2700
R2724
R2950
C2725
C2723
C1451
C1492
L2700
C2701
C2700
R1954
XW1900
R1953
C1990
R1952
C1991
XW1902
XW1903
C1917
C1916
C1913
U1900
C1901
C1914
R1912
C1910
C1903
C1951
C1950
R1950
R1951
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C1912
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C1911
C1930
R1930
C1932
R1931
C1931
R1914
L1920
C1920
R1920
C1908
C1907
R1455
C1905
C1906
C1450
C1410
U1400
R1461R1460
C1460
C1494
C1490
C1404
R1454
C1414
C2711
U2710
L2701
C2710
R1910
R1913
R1911
C7380
R7301
R7300
C1915
C1902
R1940
U7300
C1918
C1909
C7350
C1412
C1405
C1401
C1402
C7323
C7321
C1461
C1413
C7311
C7315
C7319
C1009
R0932
C1149
C1148
C7308
R1000
C1004
C7314
R0831
C0610
C0611
R1051
C1052
R0832
R1052
C7301
C0627
C0642
C0643
R0642
C0640
C1147
C7322
C0630
C7312
DZ0600
R0651
C0907
C0641
C1028
R0704
R0705
C1039
C1151
C7317
C1027
C7309
R1210
C1015
R0645
R0646
R0689
R0647
C0618
R0688
R1211
R0617
R2800
R8218
C7300
C7302
C0963
FL0911
C1042
C0930
R0720
C0962
R1204
C0920
C0961
R0941
C0902
U0652
C0680
C1056
C0681
C0684
C0651
R1056
C0648
C0652
R0625
C0682
R0620
C0646
R0621
C7303
R0622
C1112
C7327
C1110
C1127
C1113
C1128
C1129
R0721
C1130
R1005
C0908
R1006
R1206
C0903
C1002
C1007
R0640
R1055
C0613 C0607
C0683
C0608
R0624
R1260
R0655
Y0602
C0701
R0750
R0736
C1111
C1125
C1001
U0701
R47012_WIFI
U47002_WIFI
C47010_WIFI
C1107
C1104
C1105
C1121
C1123
R1001
C1005
R0940
C7307
C1030
C7324
C7326
C1109
C1108
C1115
C1118
C1114
C1117
C1119
C1122
C1120
C1124
C1126
C1116
R0703
R0933
R0931
C1031
C1041
R0701
R0700
C1029
C1038
C1000
C1024
C7305
C7304
C8107
C8108
L8107
L8110
C8178
C7325
C7330
C7316
C1040
C1034
C1006
R0702
R1200
C1043
R0738
R0930
R1201
R1205
C1144
R1054
C1054
R1053
R1202
C1035
R1208
R1209
C1137
R1207
C1026
C1139
C1146
R1203
R1213
C1032
C1036
R0771
C7331
R0765
C7306
R0770
C1037
C7318
C1019
C8177
C8180C8179
C8164
C1132
C1131
C1142
C1141
C1143
C1136
C1138
C8163
C8120
C8119
C8157
R8202
L8128
C8159
C8160
C8161
C8147
R0737 R0735
C8149
C8209
C1133
R1270
C8135
C1145
C8169
C1140
C8167
R8203
C8204
C1135
C7329
C8143
C8142
C1134
Y8138
R0739
C8299
C8166
C8226
C8122
C1106
C8196
C8175
L8101
C8174
C8173
L8121
C8189
C8103
L8100
C8137
C8138
C8172
C8158
C8131
C8171
L8105
C8176
C8102
C8195
C8198
C8197
U8100
C8212
C8144
C8150
C8239
C8145
C8130
C8153
C8168
C8238
C8214
C8146
C8237
C8152
C7313
C8162
C8151
C8136
C8148
C8288
C8129
L8225
R8292
C8117
C8121
R2042
L8119
C8188
L8115
C7328
C8132
C8140
L8229
D8230
C8236
R2043
C2060
C8118
C2047
C2048
C2046
C8124
C8139
C8141
C8126
R8290
R8291
C8208
C8210
C8207
R8299
C8206
XW8203
C8223
C8217
C8215
C8221
C8156
C8201
C8220
C8155
R8219
R8222
C8154
C8235
C8234
C8232
C8233
C8231
C8295
D8228
C2080
R2040
C2091
C8199
R2052
R2050
C2057
C2092
C2045
U2040
L2040
C2056
C2041
R2041
C2043
C2044
D8100
C8125
R2053
C2094
L8112
Q8104
DZ5701
R5702
C8100
R8100
DZ5710
C8101
U2050
C2058
C8190
C8191
C1310
C2090
R2051
Q5701
Q5700
R1311
C2055
C2093
C2095
R1780
R1751
L2050
C2051
C1751
C2052
C1750
C2054
U1700
C2053
C1752
C1753
C2242
C2241
R2205
R1321
U1310
U1350
R1320
U1300
U2200
C2240
C2202
L2201
C2203
C2230
R2260
R5760
R1750
C5750
R5704
R5701
R5703
R1322
Q1300
C1362
R1350
C1350
Q1301
C1322
R5705
R5706
C1302
C1303
C1300
C1321
C1361
C1301
C1320
C1360
R1370
R1310
SL9305
STD9302
J31001_RF
C7526
C7525
C7523
FL7500
C7524
J7500
C7522
U47004_WIFI
L47014
C47020
R47017
U47006
C47013_WIFI
R47015
R47009
C47004_WIFI
C47003_WIFI
R47008_WIFI
R47016
R47013
R47005
L47015_WIFI
C47012
C47014
R47007_WIFI
C2081
FL2050
C2084
C2086 C2083 C2066C2063
C2088
R2054
R2055
C2087 C2068
J47002_WIFI
L47013
C47018
C47016
U47005
C47015
C47007_WIFI
U47001_WIFI
C2061
FL2040
FL2041
FL2051
L47011_WIFI
C2064
C47009_WIFI
C2049
C2040
C2070
C2071
C5702
C2067
R2045
R2044
C5703
R5700
J47001_WIFI
C47017
L47012_WIFI
R47011_WIFI
C47002_WIFI
L5700
STD9300
C1761
C1708
R1753
C1707
R1752
C1706
L1702
J2201
C1760
L1760
R1790
J1700
L1701
L2202L2212
L1750
C1704
C1705
C1703
C1700
L2222
C1702
L1700
L2232
C1701
L2233
C2250
C2220
C2233
R8240
R8239
R8227
R8231
R8232
R8235
C2206
C2232
R8216
STD9301
C47001_WIFI
L5702
C5707
DZ5704
L5703
C5701
DZ5700
C5705
L5701
DZ5703
L5704
C2072
C2059
J5700
DZ5702
C5704
D5700
C5700
D5701
C2050
C2073
J46002_RF
L2602
C2606
C2608
L2660
C2600
C2602
C2605
C2603
U2600
C2607
L2611
L2610
R2601
U2601
L2600
C2601
C2604
L2601
L1903
L1905
L1904
L1902
L1901
L1900
J46003_RF
L46002_RF
L46026_RF
R46007
J1800J2601
C46028_RF
C46025_RF
J46004_RF
R1850
C1850
C1800
L1800
C1821 C1820
C1801
C1802
C1822
Diesel57Diesel57
www.witesomtesla.comwww.witesomtesla.com
8
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
7
65
43
21
CK
REV ECN
0001520462
13
DESCRIPTION OF REVISION
ENGINEERING RELEASED
APPD
DATE
2012-07-02
MAIN LOGIC BOARD
DVT
X123
LAST_MODIFIED=Wed Jun 27 16:39:53 2012
D
SCH AND BOARD PART NUMBERS
QTY
PART#
CSAPDF
TABLE_TABLEOFCONTENTS_HEAD
1
TABLE_TABLEOFCONTENTS_ITEM
2
TABLE_TABLEOFCONTENTS_ITEM
3
TABLE_TABLEOFCONTENTS_ITEM
C
B
4
TABLE_TABLEOFCONTENTS_ITEM
5
TABLE_TABLEOFCONTENTS_ITEM
6
TABLE_TABLEOFCONTENTS_ITEM
7
TABLE_TABLEOFCONTENTS_ITEM
8
TABLE_TABLEOFCONTENTS_ITEM
9
TABLE_TABLEOFCONTENTS_ITEM
10
TABLE_TABLEOFCONTENTS_ITEM
11
TABLE_TABLEOFCONTENTS_ITEM
12
TABLE_TABLEOFCONTENTS_ITEM
13
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
15
TABLE_TABLEOFCONTENTS_ITEM
16
TABLE_TABLEOFCONTENTS_ITEM
17
TABLE_TABLEOFCONTENTS_ITEM
18
TABLE_TABLEOFCONTENTS_ITEM
19
TABLE_TABLEOFCONTENTS_ITEM
20
TABLE_TABLEOFCONTENTS_ITEM
CONTENTS
TABLE OF CONTENTS
1
BLOCK DIAGRAM: SYSTEM
2
6
AP: MAIN
7
AP: I/Os
8
AP: FLASH MEMORY INTERFACE
AP: TV/DP/MIPI/CAMERA
9
10
AP: PWR
11
AP: PWR
12
AP: MISC & ALIASES
13
E75 SUPPORT
NAND STORAGE
14
17
TOUCH: FLEX CONNECTOR
18
AUDIO JACK FLEX CONN
19
AUDIO: L81 CODEC
AUDIO: CS35L19A AMPS
20
22
VIDEO: MIPI CONNECTOR
FF CAM & MIC CONNECTORS
26
27
INERTIAL SENSORS
PROX SENSOR
28
29
BUTTON & REAR CAMERA CONN
SYNC MASTER
DESCRIPTION
1
SCH,MLB,X123
1
PCB,MLB,X123
DATE
N/A
N/A
N/A
N/A
N/A
MLB
N/A
N/A
N/A
N/A
MLB
N/A
N/A
KAVITHA1401/18/2012
KAVITHA
N/A
N/A
N/A
N/A
N/A
N/A
N/A
04/18/2011
05/05/2011
04/18/2011
05/04/2012
04/18/2011
04/18/2011
04/11/2011
N/A
05/04/2012
06/21/2010
03/31/2011
01/18/2012
N/A
N/A
N/A
N/A
N/A
REFERENCE DESIGNATOR(S)
SCH1051-9374
PCB1820-3243
BOM OPTION
CSAPDF
TABLE_TABLEOFCONTENTS_HEAD
21
TABLE_TABLEOFCONTENTS_ITEM
22
TABLE_TABLEOFCONTENTS_ITEM
23
TABLE_TABLEOFCONTENTS_ITEM
24
TABLE_TABLEOFCONTENTS_ITEM
25
TABLE_TABLEOFCONTENTS_ITEM
26
TABLE_TABLEOFCONTENTS_ITEM
27
TABLE_TABLEOFCONTENTS_ITEM
28
TABLE_TABLEOFCONTENTS_ITEM
29
TABLE_TABLEOFCONTENTS_ITEM
30
TABLE_TABLEOFCONTENTS_ITEM
31
TABLE_TABLEOFCONTENTS_ITEM
32
TABLE_TABLEOFCONTENTS_ITEM
33
TABLE_TABLEOFCONTENTS_ITEM
34
TABLE_TABLEOFCONTENTS_ITEM
35
TABLE_TABLEOFCONTENTS_ITEM
36 GPS
TABLE_TABLEOFCONTENTS_ITEM
37
TABLE_TABLEOFCONTENTS_ITEM
38
TABLE_TABLEOFCONTENTS_ITEM
39
TABLE_TABLEOFCONTENTS_ITEM
40
TABLE_TABLEOFCONTENTS_ITEM
41
TABLE_TABLEOFCONTENTS_ITEM
42
TABLE_TABLEOFCONTENTS_ITEM
43
TABLE_TABLEOFCONTENTS_ITEM
44
TABLE_TABLEOFCONTENTS_ITEM
45
TABLE_TABLEOFCONTENTS_ITEM
46
TABLE_TABLEOFCONTENTS_ITEM
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
57
73
75
81
82
93
100
101
102
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
CONTENTS SYSTEM & DEBUG CONNECTORS BASEBAND PMU (1 0F 2) BASEBAND PMU (2 OF 2) BASEBAND (1 OF 2) MOBILE DATA MODEM (2 OF 2) RF TRANSCEIVER (1 0F 3) RF TRANSCEIVER (2 OF 3) RF TRANSCEIVER (3 OF 3) BAND 5/8 PAD BAND 13 PA 2G PA, DCDC CONVERTER DCS RX, ASM BAND 1/4 PAD BAND2 PAD RX DIVERSITY
WIFI/BT IO FLEX: DOCK COMPONENTS Power: Aliases POWER: BATTERY CONNECTOR Power: PMU POWER: PMU MECHANCIAL PARTS CONSTRAINTS: ASSIGNMENTS CONSTRAINTS: ASSIGNMENTS CONSTRAINTS: MLB RULES
SYNC MASTER
N/A
N/A
DATE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
06/27/2012JORGE
04/18/2011
N/AN/A
N/AN/A
N/AN/A
05/09/2011
N/AN/A
N/AN/A
N/AN/A
N/AN/A
D
C
B
A
DRAWING
3
DRAWING TITLE
SCH,MLB,X123
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
1 OF 102
SHEET
1 OF 46
1245678
SIZE
A
D
87
6 5 4
3
12
ISP_I2C1
CUMULUS
MASTER
CABERNET BRD
SPI1
H4A
MIPI1C
ISP_I2C0
MIPI0C
D
CUMULUS
SLAVE
CABERNET BRD
DUAL-CORE ARM
CORTEX-A9 W/ SMP
1GHZ
LPDDR2
HSIC1
UART4
FF CAMERA
CANADA FLEX
REAR CAMERA
SENSOR PANEL
RF/GPS
D
RF ANT
2X32-BIT
400MHZ/800MB/S
DISPLAY/
TOUCH PANEL
C
LVDS
MLC
(POR)
CSA 21
MIPI0D
DUAL-CORE IMG
GPU
SGX543-MP
AUDIO
AE2
ARM A5 CPU
HSIC2
UART3
UART1
I2S3
BT_I2S
CSA 32-46
WIFI/BT
CSA 47
WIFI/BT ANT
C
BACKLIGHT
UART5_RTXD
NAND FLASH
PMU
BATTERY
FMI0
ALISON
FMI1
CSA 75
DWI I2C0
CSA 81-82
B
AUDIO CODEC
SPI
ASP
XSP
E75
IO FLEX
TRISTAR
CSA 13
MIKEY
BB USB
UART4
JTAG
USB2.0 UART0
UART2
I2C2
I2C1
SPI2
I2S0
I2S2
I2S1
CSA 14
B
L81
HS JACK
AUDIO JACK FLEX
CSA 19
A
GYRO
AP3GDL20 (NEW) (SAME AS K93A)
CSA 27
ACCELEROMETER
AP3DSH (NEW)
CSA 27
ALS
(SAME AS K93A)
VGA FLEX
PROX
(SAME AS J2)
CSA 28
COMPASS
CSA 27
AMP
CSA 20
AMP
CSA 20
SPEAKER
CSA 20
SYNC_MASTER=N/A
PAGE TITLE
BLOCK DIAGRAM: SYSTEM
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
6 3
SYNC_DATE=N/A
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
2 OF 102
SHEET
2 OF 46
124578
SIZE
A
D
87
R0620
0.00
=PP1V0_PLL_H4
39
D
12
0%
1/32W
MF
01005
R0621
0.00
12
0%
1/32W
MF
01005
R0622
0.00
12
0%
1/32W
MF
01005
R0624
0.00
12
0%
1/32W
MF
01005
1
C0651
0.01UF
10%
6.3V
2
X5R 01005
1
C0648
0.01UF
10%
6.3V
2
X5R 01005
1
C0646
0.01UF
10%
6.3V
2
X5R 01005
1
C0608
0.01UF
10%
6.3V
2
X5R 01005
1
2
1
2
1
2
1
2
6 5 4
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP1V0_PLL4_F
C0680
27PF
5% 16V NP0-C0G 01005
PP1V0_PLL3_F
C0681
27PF
5% 16V NP0-C0G 01005
PP1V0_PLL2_F
C0682
27PF
5% 16V NP0-C0G 01005
PP1V0_PLL01_F
C0683
27PF
5% 16V NP0-C0G 01005
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
39
=PP1V0_USB_H4
3
1
C0643
0.22UF
20%
6.3V
2
X5R 0201
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP1V0_PLL_USB_F
3
R0625
0.00
12
0%
1
2
C0640
1UF
20%
6.3V X5R 0201
1/32W
01005
MF
1
2
C0684
27PF
5% 16V NP0-C0G 01005
1
C0652
0.01UF
10%
6.3V
2
X5R 01005
1
C0627
0.01UF
10%
6.3V
2
X5R 01005
1
C0630
0.01UF
10%
6.3V
2
X5R 01005
=PP1V0_USB_H4
=PP3V3_USB_H4
12
D
3
39
8
39
=PP1V2_HSIC_H4
C
HSIC1_BB_DATA
21 44
BI
HSIC1_BB_STB
21 44
BI
HSIC2_WLAN_DATA
21 44
BI
HSIC2_WLAN_STB
21 44
=PP1V8_H4
3 4 6 9
39
1
R0647
100K
1% 1/32W MF 01005
NOSTUFF
C0618
1000PF
10%
6.3V X5R 01005
2
COMMON339S0179
JTAG_SOC_TDI
44
1% 1/32W MF 01005
IN
JTAG_SOC_TMS
10 44
OUT
JTAG_SOC_TCK
10 44
OUT
CRITICAL BOM OPTION
CRITICAL
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
1
2
ELPIDA
HYNIX
=PP1V8_H4
3 4 6 9
39
1
R0617
B
RST_SYSTEM_L
10 21 42
IN
A
PART#
PART NUMBER
339S0187
339S0188 339S0179
DESCRIPTION
QTY
1
H4A B0,35NM,1.15MM HEIGHT
ALTERNATE FOR PART NUMBER
339S0179
BOM OPTION
REF DES
U0652
U0652
10K
2
REFERENCE DESIGNATOR(S)
U0652
COMMENTS:
1
R0646
100K
1% 1/32W MF 01005
2
R0688
100K
1/32W
01005
R0689
221K
1/32W
01005
TABLE_5_HEAD
TABLE_5_ITEM
1%
MF
1%
MF
1
2
1
2
SAMSUNG
1
R0645
100K
1% 1/32W MF 01005
2
BI
9
IN
9
44
OUT
9
44
OUT
SOC_DDR_CKEIN
SOC_TST_STPCLK
9
SOC_TESTMODE
9
SOC_FAST_SCAN_CLK
9
SOC_HOLD_RESET
9
39
JTAG_SOC_SEL
JTAG_SOC_TRST_L JTAG_SOC_TDO
1
2
NC_JTAG_SOC_TRTCK
TP_SOC_TST_CLKOUT
C0642
0.22UF
20%
6.3V X5R 0201
25MA
W30
HSIC1_DATA
W31
HSIC1_STB
R31
HSIC2_DATA
U31
HSIC2_STB
A25
JTAG_SEL
E26
JTAG_TRTCK
E25
JTAG_TRST*
D26
JTAG_TDO
D25
JTAG_TDI
B25
JTAG_TMS
C26
JTAG_TCK
G23
RESET*
J23
CFSB
K12
DDR0_CKEIN
T9
DDR1_CKEIN
A29
TST_CLKOUT
A26
TST_STPCLK
G20
TESTMODE
H26
FUSE1_FSRC
F22
FAST_SCAN_CLK
H23
HOLD_RESET
V27
V25
W26
HSIC_VDD122
HSIC_VDD121
25MA
10MA
HSIC_VSS122
HSIC_VSS121
W29
V26
W28
V24
E18
E17
E16
4MA
4MA
HSIC2_DVDD102
HSIC1_DVDD101
10MA
4MA
4MA
OMIT
U0652
H4A
BGA
(1 OF 12)
POP-512MB-DDR
CRITICAL
PLL2_AVSS11 PLL2_AVDD11
PLL1_AVSS11 PLL1_AVDD11
PLL0_AVSS11 PLL0_AVDD11
HSIC2_DVSS
HSIC1_DVSS
D18
D17
D16
W25
R25
E21
E20
E19
USB_DVDD
10MA
4MA
4MA
USB_ANALOGTEST
USB_BRICKID
USB_BRICKID_DM_MON
2MA
PVDDP_CFSB
17MA
PVDDP_FMI0
6MA
PVDDP_TESTS
4MA
PVDDP_UART4
VSEL30_FMI
VSEL30_TST
VSEL30_UART4
PLL4_AVSS11 PLL4_AVDD11
PLL3_AVSS11 PLL3_AVDD11
PLL_USB_AVSS11 PLL_USB_AVDD11
R26
D21
D20
D19
T27
P27
USB_VDD330
35MA
USB_ASW_VDD18
1MA
WDOG
XI0
XO0
USB11_DP
USB11_DM
USB_DP USB_DM
USB_VBUS
USB_ID
USB_REXT
USB_VSSA0
USB_ASW_VSS18
R27
P28
C27
A15
A16
T29 U29
M31
N31
U26
N28
M28
U27
T26
T25
J18 AC27
F27
AH25
G21
J21
H21
45
XTAL_SOC_24M_I
XTAL_SOC_24M_O
45
NC_USB_FS_D_P
NC_USB_FS_D_N
NC_USB_ANALOGTEST
USB_SOC_VBUS
NC_USB_ID
NC_USB_BRICKID_DP_MON
NC_USB_BRICKID_DM_MON
USB_REXT
SOC_WDOG
1.00M
1%
01005
12
9
9
SOC_USB_D_P SOC_USB_D_N
1
C0610
0.01UF
10%
6.3V
2
X5R 01005
R0655
MF
1/32W
1
2
R0642
43.2
1% 1/20W MF 201
1
C0611
0.01UF
10%
6.3V
2
X5R 01005
BI
BI
10
OUT
10 44
10 44
GDZT2R5.1B
=PP1V8_PVDDP_H4
1
2
R0640
1.00K
12
1%
1/32W
MF
01005
NOSTUFF
DZ0600
GDZ-0201
NOTE FOR VSEL... 0 - 1.8V IO
1.8V - 3V IO
=PP1V8_USB_H4
C0641
0.01UF
10%
6.3V X5R 01005
XTAL_SOC_24M_O_R
1
2
R0651
68.1K
12
K
A
39
24.000MHZ-16PF-60PPM
C0613
15PF
5% 16V NP0-C0G-CERM 01005
1%
1/32W
MF
01005
6 3
39
CRITICAL
Y0602
SM-2
31
24
PPVBUS_USB
SYNC_MASTER=N/A
PAGE TITLE
1
C0607
15PF
5% 16V
2
NP0-C0G-CERM 01005
41
AP: MAIN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
SYNC_DATE=04/18/2011
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
6 OF 102
SHEET
3 OF 46
124578
SIZE
C
B
A
D
87
6 5 4
3
12
H4A I/OS
R0720
33.2
1%
1/32W
MF
01005
I2S0_CODEC_ASP_MCK
14 44
OUT
D
I2S1_SPKAMP_MCK
15 44
OUT
C
12
R0721
33.2
1%
1/32W
MF
01005
12
44
42
44
I2S0_CODEC_ASP_MCK_R
44
I2S0_CODEC_ASP_BCLK
14 44
OUT
I2S0_CODEC_ASP_LRCK
14 44
OUT
I2S0_CODEC_ASP_DIN
14 44
IN
I2S0_CODEC_ASP_DOUT
14 44
OUT
I2S1_SPKAMP_MCK_R
44
I2S1_SPKAMP_BCLK
15 44
OUT
I2S1_SPKAMP_LRCK
15
OUT
I2S1_SPKAMP_DIN
15 44
IN
I2S1_SPKAMP_DOUT
15 44
OUT
PMU_GPIO_TRISTAR_IRQ
10
IN
I2S2_CODEC_XSP_BCLK
14 44
OUT
I2S2_CODEC_XSP_LRCK
14 44
OUT
I2S2_CODEC_XSP_DIN
14 44
IN
I2S2_CODEC_XSP_DOUT
14 44
OUT
GPIO_ACC_SW_POK_L
10
IN
I2S3_BT_BCLK
21 44
OUT
I2S3_BT_LRCK
21 44
OUT
I2S3_BT_DIN
21 44
IN
I2S3_BT_DOUT
21 44
OUT
GPIO_BOARD_ID2
9
IN
GPIO_BOARD_ID1
9
IN
GPIO_BOARD_ID0
9
IN
SPI1_GRAPE_MISO
12 44
IN
SPI1_GRAPE_MOSI
12
OUT
SPI1_GRAPE_SCLK
12 44
OUT
SPI1_GRAPE_CS_L
12 44
OUT
SPI2_CODEC_MISO
14 44
IN
SPI2_CODEC_MOSI
14 44
OUT
SPI2_CODEC_SCLK
14 44
OUT
SPI2_CODEC_CS_L
14 44
OUT
NC_SPI0_SSIN
AM18
AM19 AP14
AP17
AM22
AM13
AK3
AP8
AL14 AM20
AM9
AM16
AK2
AN17
AM2
AM1 AL16
AN20
AH1
AK5
AP21
AB1 AM15
AM4
AP23
AM3 AP13
AH4
AN13 AM12
AN22
AM21
I2S0_MCK I2S0_BCLK
I2S0_LRCK
I2S0_DIN I2S0_DOUT
I2S1_MCK
I2S1_BCLK
I2S1_LRCK I2S1_DIN
I2S1_DOUT
I2S2_MCK I2S2_BCLK
I2S2_LRCK
I2S2_DIN I2S2_DOUT
I2S3_MCK
I2S3_BCLK
I2S3_LRCK I2S3_DIN
I2S3_DOUT
SPI0_MISO SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
SPI1_MISO SPI1_MOSI
SPI1_SCLK SPI1_SSIN
SPI2_MISO
SPI2_MOSI
SPI2_SCLK SPI2_SSIN
OMIT
U0652
H4A
BGA
POP-512MB-DDR
(3 OF 12)
I2C0_SCL I2C0_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL I2C2_SDA
SWI_DATA
DWI_DI
DWI_DO
DWI_CLK
SDIO0_CLK SDIO0_CMD
SDIO0_DATA0
SDIO0_DATA1 SDIO0_DATA2
SDIO0_DATA3
AL4 AM6
AM7
AG3
D29 E29
AN6
U1
AN18 AM11
AH28 AJ24
AK25 AH24
AJ27
AK24
I2C0_SCL I2C0_SDA
I2C1_SCL I2C1_SDA
I2C2_SCL I2C2_SDA
NC_SWI_AP
DWI_DI DWI_DO DWI_CLK
BB_JTAG_TCK
BB_JTAG_TMS
BB_JTAG_TDI
BB_JTAG_TDO
BB_JTAG_TRST_L
GPIO_ACC_SW_EN
AB5
AB4
AD5
AC4
AA3
AE5 AD3
AF5
AF4
AB3
AE4
AH3
K4
GPIO0
H1
GPIO1
F2
GPIO2
G4
GPIO3
G3
GPIO4
G2
GPIO5
K3
GPIO6
L4
GPIO7
G1
GPIO8
H2
GPIO9
N3
GPIO10
J2
GPIO11
J3
GPIO12
J1
GPIO13
W3
GPIO14
W4
GPIO15
M3
GPIO16
GPIO17
N2
GPIO18 GPIO19
Y4
GPIO20 GPIO21
H4
GPIO22
L2
GPIO23 GPIO24
V3
GPIO25
GPIO26 GPIO27
GPIO28
GPIO29
T2
GPIO30
GPIO31 GPIO32
GPIO33
P2
GPIO34
R3
GPIO35
GPIO36
GPIO_BTN_HOME_L
4
12 42
IN
GPIO_BTN_POWER_L
4
20 42
IN
GPIO_BTN_VOL_UP_L
20
IN
GPIO_BTN_VOL_DOWN_L
20
IN
4
10 15 42 44
BI
4
10 15 42 44
OUT
4
18 19 44
BI
4
18 19 44
OUT
4
17 18 44
BI
4
17 18 44
OUT
42 44
IN
42 44
OUT
42 44
OUT
21 24 44
OUT
21 24 44
OUT
21 24 44
OUT
21 24 44
IN
21 24 44
OUT
10
OUT
GPIO_BTN_SRL_L
4
20 42
IN
GPIO_SPKAMP_RST_L
4
15
OUT
GPIO_SPKAMP_KEEPALIVE
15
OUT
GPIO_SPKAMP_RIGHT_IRQ_L
15
IN
GPIO_CODEC_IRQ_L
14
IN
GPIO_BT_WAKE
21
OUT
GPIO_BB_RST_L
21
OUT
GPIO_BB_GSM_TXBURST
21
IN
GPIO_BB_IPC_GPIO
21
IN
GPIO_BB_DIAGS_RDY
21
IN
GPIO_BB_GPS_SYNC
21
IN
GPIO_BB_RST_DET_L
21
IN
GPIO_BOARD_ID3
9
IN
GPIO_BB_HSIC_HOST_RDY
21
OUT
GPIO_BOOT_CONFIG0
9
IN
GPIO_PMU_IRQ_L
42
IN
GPIO_PMU_KEEPACT
4
42
OUT
GPIO_GRAPE_RST_L
12
OUT
GPIO_GRAPE_IRQ_L
12
IN
GPIO_BB_RADIO_ON_L
21
IN
GPIO_BB_HSIC_DEV_RDY
21
OUT
GPIO_BOOT_CONFIG1
9
IN
GPIO_FORCE_DFU
4 9
IN
GPIO_DFU_STATUS
4
IN
GPIO_BOOT_CONFIG2
9
IN
GPIO_BOOT_CONFIG3
9
IN
GPIO_PROX_IRQ_L
19
IN
NC_GPIO31
GPIO_ACCEL_IRQ2_L
18
IN
GPIO_GYRO_IRQ1
18
IN
GPIO_WLAN_HSIC_RESUME
21
IN
GPIO_MLC_PWR_EN
16
OUT
GPIO_MLC_RST_1V8_L
4
OUT
VSS
B1
A31
A30
A27
A14
A13
A12
A11
A17
A24
OMIT
U0652
H4A
BGA
POP-512MB-DDR
(2 OF 12)
VSS
EHCI_PORT_PWR0
EHCI_PORT_PWR1 EHCI_PORT_PWR2
TMR32_PWM0
TMR32_PWM1 TMR32_PWM2
UART0_RXD UART0_TXD
UART1_CTSN
UART1_RTSN
UART1_RXD UART1_TXD
UART2_CTSN
UART2_RTSN
UART2_RXD
UART2_TXD
UART3_CTSN
UART3_RTSN
UART3_RXD
UART3_TXD
UART4_CTSN UART4_RTSN
UART4_RXD
UART4_TXD
UART5_RTXD
T3 V2
U2
AP5
AP4 AN5
B29 C29
AG5
AH5 AL1
AK1
N1
T1 M1
R1
AF2 AG2
AE1
AF1
AJ26 AJ25
AK26
AK27
D28
GPIO_BOARD_REV0 GPIO_BOARD_REV1 GPIO_BOARD_REV2
GPIO_GYRO_IRQ2 GPIO_ACCEL_IRQ1_L
AP_CLK_32K_CUMULUS
UART0_DEBUG_RXD UART0_DEBUG_TXD
UART1_BT_CTS_L UART1_BT_RTS_L UART1_BT_RXD UART1_BT_TXD
GPIO_ALS_IRQ_L
GPIO_SPKAMP_LEFT_IRQ_L
UART2_ACC_RXD UART2_ACC_TXD
GPIO_WLAN_HSIC_DEV_RDY GPIO_WLAN_HSIC_HOST_RDY UART3_WLAN_RXD UART3_WLAN_TXD
UART4_BB_CTS_L UART4_BB_RTS_L UART4_BB_RXD UART4_BB_TXD
UART5_BATT_RTXD
9
IN
9
IN
9
IN
18
IN
18
IN
12 44
OUT
10 44
IN
10 44
OUT
21
44
IN
21 44
OUT
21
44
IN
21 44
OUT
17
OUT
15
OUT
10 44
IN
10 44
OUT
21
IN
21
OUT
21 44
IN
21
44
OUT
21 44
IN
21 44
OUT
10 21 44
IN
10 21 44
OUT
40 42 44
BI
D
C
A9
A8
A5A4A3A2A1
A6
A7
A10
=PP1V8_IO_H4
6 8
39
=PP1V8_S2R_MISC
4 9
10 15 42 44
10 15 42 44
18 19 44
18 19 44
17 18 44
17 18 44
39
I2C0_SDA
4
I2C0_SCL
4
I2C1_SDA
4
I2C1_SCL
4
I2C2_SDA
4
I2C2_SCL
4
10 39
10 39
=PP1V8_ALWAYS
39
=PP1V8_S2R_MISC
4 9
=PP1V8_H4
3 6 9
1
R0700
2.2K
5% 1/32W MF 01005
2
R0771
220K
12
5%
1/32W
MF
01005
R0770
220K
12
5%
1/32W
MF
01005
R0765
220K
12
5%
1/32W
MF
01005
1
R0701
2.2K
5% 1/32W MF 01005
2
GPIO_BTN_HOME_L
GPIO_BTN_POWER_L
GPIO_BTN_SRL_L
(SCREEN ROTATION LOCK)
1
2
R0702
1.8K
5% 1/32W MF 01005
1
R0703
1.8K
5% 1/32W MF 01005
2
4
12 42
GPIO_MLC_RST_1V8_L
4
IN
4
20 42
4
20 42
1
R0704
2.2K
5% 1/32W MF 01005
2
1
R0705
2.2K
5% 1/32W MF 01005
2
1
R0739
100K
1% 1/32W MF 01005
2
1
R0735
100K
1% 1/32W MF 01005
2
1
R0736
100K
1% 1/32W MF 01005
2
1
R0737
100K
1% 1/32W MF 01005
2
1
R0738
100K
1% 1/32W MF 01005
2
GPIO_SPKAMP_RST_L GPIO_PMU_KEEPACT GPIO_MLC_RST_1V8_L GPIO_FORCE_DFU GPIO_DFU_STATUS
B
A
A1
VCCA
SN74LVC1T45YZPR
A
C1
B2
DIR
A2
VCCB
U0701
BGA
NOSTUFF
GND
B1
R0750
0.00
12
0%
1/32W
MF
01005
4
15
4
42
4
4 9
4
B
6 3
=PP3V0_MLC_RST_LEVELSHIFTER
NOSTUFF
1
C0701
0.1UF
20%
6.3V
2
X5R-CERM 01005
C2
GPIO_MLC_RST_L
SYNC_MASTER=N/A
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
OUT
AP: I/Os
Apple Inc.
R
39
B
16
SIZE
A
D
SYNC_DATE=05/05/2011
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
7 OF 102
SHEET
4 OF 46
124578
87
39
D
6 5 4
=PP1V8_NAND_H4
5 8
R0831
1
100K
1% 1/32W MF 01005
2
FMI0_CE0_L
11 44
OUT
NC_FMI0_CEN1 NC_FMI0_CEN2 NC_FMI0_CEN3
AF28
AE26
AF25 AF26
FMI0_CEN0
FMI0_CEN1 FMI0_CEN2
FMI0_CEN3
OMIT
U0652
H4A
BGA
POP-512MB-DDR
(4 OF 12)
3
12
D
FMI0_AD<0>
11 44
BI
FMI0_AD<1>
11 44
BI
FMI0_AD<2>
11 44
BI
FMI0_AD<3>
11 44
BI
FMI0_AD<4>
11 44
BI
FMI0_AD<5>
11 44
BI
FMI0_AD<6>
11 44
=PP1V8_NAND_H4
5 8
39
C
FMI1_CE0_L
11 44
OUT
R0832
1
100K
1% 1/32W MF 01005
2
BI
FMI0_AD<7>
11 44
BI
FMI0_ALE
11 44
OUT
FMI0_CLE
11 44
OUT
FMI0_WE_L
11 44
OUT
FMI0_RE_N
11 44
OUT
FMI1_AD<0>
11 44
BI
FMI1_AD<1>
11 44
BI
FMI1_AD<2>
11 44
BI
FMI1_AD<3>
11 44
BI
FMI1_AD<4>
11 44
BI
FMI1_AD<5>
11 44
BI
FMI1_AD<6>
11 44
BI
FMI1_AD<7>
11 44
BI
FMI1_ALE
11 44
OUT
FMI1_CLE
11 44
OUT
FMI1_WE_L
11 44
OUT
FMI1_RE_N
11 44
OUT
FMI0_DQS_P
11 44
NC_FMI1_CEN1 NC_FMI1_CEN2 NC_FMI1_CEN3
FMI1_DQS_P
11 44
B
AC28 AC26
AD29
AD26 AE25
AG28
AG26 AG27
AD25
AE28
AC25 AD28
AE27
AB30 AB26
AA25
AB25
W27
Y28
Y26
AA31
AA28 AB28
AA29
AB29
AB31 AA26
Y25
Y29
AA27
FMI0_IO0
FMI0_IO1
FMI0_IO2 FMI0_IO3
FMI0_IO4
FMI0_IO5 FMI0_IO6
FMI0_IO7
FMI0_ALE FMI0_CLE
FMI0_WEN
FMI0_REN FMI0_DQS
FMI1_CEN0
FMI1_CEN1
FMI1_CEN2 FMI1_CEN3
FMI1_IO0 FMI1_IO1
FMI1_IO2
FMI1_IO3 FMI1_IO4
FMI1_IO5
FMI1_IO6 FMI1_IO7
FMI1_ALE
FMI1_CLE FMI1_WEN
FMI1_REN
FMI1_DQS
B2
C
VSS
B6B5B3
B9
B8
B11
B12
B13
B15
B16
B17
B
A
SYNC_MASTER=N/A
PAGE TITLE
AP: FLASH MEMORY INTERFACE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
6 3
SYNC_DATE=04/18/2011
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
8 OF 102
SHEET
5 OF 46
124578
SIZE
A
D
87
6 5 4
3
12
PART NUMBER
VOLTAGE=0.4V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
D
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP_AP_MIPI0D_0P4V
TV/DISPLAYPORT
VOLTAGE=0.4V
MIN_NECK_MIDTH SHOULD BE 0.2MM
MIPI
=PP1V8_MIPI_H4
=PP1V8_DPORT_H4
=PP1V8_IO_H4
4 8
39
=PP1V0_DPORT_H4
C
NC_DAC_COMP
NC_DAC_VREF
NC_DAC_IREF
NC_DP_PAD_DC_TP
NC_DP_PAD_R_BIAS
C23
DAC_COMP
H24
DAC_VREF
C24
DAC_IREF
P24
DP_PAD_DC_TP
N27
DP_PAD_R_BIAS
B
E23
E22
DAC_AVDD18A
DAC_AVDD18D
12MA
8MA
DAC_AVSS18A
DAC_AVSS18D
D23
D22
M27
L24
K26
DP_PAD_AVDD0
DP_PAD_AVDD1
77MA 77MA
OMIT
DP_PAD_AVDD_AUX
U0652
H4A
BGA
POP-512MB-DDR
(6 OF 12)
DP_PAD_AVSS0
DP_PAD_AVSS1
DP_PAD_AVSS_AUX
N24
M24
L25
M25
N25
DP_PAD_AVDDX
15MA
DP_PAD_AVDDP0
11MA
5MA
DAC_OUT3
DAC_OUT2 DAC_OUT1
DP_HPD
DP_PAD_AUXP
DP_PAD_AUXN
DP_PAD_TX0P
DP_PAD_TX0N
DP_PAD_TX1P DP_PAD_TX1N
DP_PAD_AVSSX
DP_PAD_AVSSP0
M26
N26
P26
P25
DP_PAD_DVDD
A21
A22
A23
E27
K31 J31
G31
F31
D31
C31
DP_PAD_DVSS
NC_DAC_OUT3
NC_DAC_OUT2 NC_DAC_OUT1
NC_DP_HPD
NC_DP_PAD_AUXP NC_DP_PAD_AUXN
NC_DP_PAD_TX0P
NC_DP_PAD_TX0N
NC_DP_PAD_TX1P NC_DP_PAD_TX1N
39
39
39
39
12
OUT
20 45
IN
20 45
IN
20 45
IN
20 45
IN
20
45
OUT
20 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
16 45
OUT
1
C0907
0.1UF
20%
6.3V
2
X5R-CERM 01005
=PP1V0_MIPI_H4
1
C0930
1UF
20%
6.3V
2
X5R 0201
DISPLAY_SYNC
MIPI0C_CAM_REAR_DATA_P<0> MIPI0C_CAM_REAR_DATA_N<0>
MIPI0C_CAM_REAR_DATA_P<1> MIPI0C_CAM_REAR_DATA_N<1>
NC_MIPI0C_CAM_REAR_DATA_P<2>
9
NC_MIPI0C_CAM_REAR_DATA_N<2>
9
NC_MIPI0C_CAM_REAR_DATA_P<3>
9
NC_MIPI0C_CAM_REAR_DATA_N<3>
9
MIPI0C_CAM_REAR_CLK_P MIPI0C_CAM_REAR_CLK_N
MIPI0D_DATA_P<0> MIPI0D_DATA_N<0>
MIPI0D_DATA_P<1> MIPI0D_DATA_N<1>
MIPI0D_DATA_P<2> MIPI0D_DATA_N<2>
MIPI0D_DATA_P<3> MIPI0D_DATA_N<3>
MIPI0D_CLK_P MIPI0D_CLK_N
1
2
C0908
0.1UF
20%
6.3V X5R-CERM 01005
1
C0903
0.1UF
20%
6.3V
2
X5R-CERM 01005
AM10
AM30
AM31
AL30
AL31
AJ30
AJ31
AH30
AH31
AK30
AK31
AN25
AP25
AN26
AP26
AN28
AP28
AN29
AP29
AN27 AP27
MIPI_VSYNC
MIPI0C_DPDATA0
MIPI0C_DNDATA0
MIPI0C_DPDATA1 MIPI0C_DNDATA1
MIPI0C_DPDATA2
MIPI0C_DNDATA2
MIPI0C_DPDATA3
MIPI0C_DNDATA3
MIPI0C_DPCLK
MIPI0C_DNCLK
MIPI0D_DPDATA0
MIPI0D_DNDATA0
MIPI0D_DPDATA1 MIPI0D_DNDATA1
MIPI0D_DPDATA2
MIPI0D_DNDATA2
MIPI0D_DPDATA3 MIPI0D_DNDATA3
MIPI0D_DPCLK
MIPI0D_DNCLK
AG17
AG18
AG19
AG20
45MA
POP-512MB-DDR
AG21
AG22
AG23
MIPI_VDD10
OMIT
U0652
H4A
BGA
(5 OF 12)
MIPI_VSS
AJ19
AJ23
MIPI0D_VDD
4MA
AJ18
ISP0_PRE_FLASH
ISP1_PRE_FLASH
MIPI1C_DPDATA0
MIPI1C_DNDATA0
MIPI1C_DPDATA1 MIPI1C_DNDATA1
MIPI1D_DPDATA0 MIPI1D_DNDATA0
MIPI1D_DPDATA1
MIPI1D_DNDATA1
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP_AP_MIPI1D_0P4V
VOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP1V0_MIPID_PLL_F
AJ22
AJ17
AJ21
MIPI0D_VDD10_PLL
MIPI0D_VREG_0P4V
MIPI1D_VDD10_PLL
MIPI1D_VREG_0P4V
6.6MA
ISP0_SDA
ISP0_SCL
ISP1_SDA
ISP1_SCL
ISP0_FLASH
SENSOR0_CLK
SENSOR0_RST
ISP1_FLASH
SENSOR1_CLK
SENSOR1_RST
MIPI1C_DPCLK
MIPI1C_DNCLK
MIPI1D_DPCLK
MIPI1D_DNCLK
1
2
AC1
AP7
AL20
AN3
AL17
AL13
AP19
AN8
AL19
AL10
AP11
AP18
AG30
AG31
AE30
AE31
AF30
AF31
AL28
AL29
AJ28 AJ29
AK28
AK29
C0961
27PF
5% 16V NP0-C0G 01005
44
80-OHM-0.2A-0.4-OHM
R0931
2.2K
5% 1/32W MF 01005
1
2
1
R0932
2.2K
5% 1/32W MF 01005
2
1
C0962
0.1UF
20%
6.3V
2
X5R-CERM 01005
1
1
R0930
2.2K
5% 1/32W MF 01005
2
2
NC_ISP0_FLASH
NC_ISP0_PRE_FLASH
ISP0_CAM_REAR_CLK_R
44
NC_ISP1_FLASH
NC_ISP1_PRE_FLASH
ISP1_CAM_FRONT_CLK_R
NC_MIPI1C_CAM_FRONT_DATA_P<1>
NC_MIPI1C_CAM_FRONT_DATA_N<1>
NC_MIPI1D_AP_DATA_P<0>
NC_MIPI1D_AP_DATA_N<0>
NC_MIPI1D_AP_DATA_P<1>
NC_MIPI1D_AP_DATA_N<1>
NC_MIPI1D_AP_CLK_P
NC_MIPI1D_AP_CLK_N
C0963
1UF
20%
6.3V X5R 0201
49.9
100
01005
01005
FL0911
0201-1
1
R0933
2.2K
5% 1/32W MF 01005
2
ALTERNATE FOR PART NUMBER
155S0359155S0725
1
C0902
2.2NF
10% 10V
2
X5R-CERM 0201
1
C0920
2.2NF
10% 10V
2
X5R-CERM 0201
21
12
12
R0941
R0940
9
9
9
9
9
9
9
9
BOM OPTION
REF DES
FL0911
=PP1V0_MIPI_PLL_H4
=PP1V8_H4
ISP0_CAM_REAR_SDA ISP0_CAM_REAR_SCL
ISP1_CAM_FRONT_SDA ISP1_CAM_FRONT_SCL
ISP0_CAM_REAR_CLK
ISP0_CAM_REAR_SHUTDOWN
ISP1_CAM_FRONT_CLK
ISP1_CAM_FRONT_SHUTDOWN
MIPI1C_CAM_FRONT_DATA_P<0> MIPI1C_CAM_FRONT_DATA_N<0>
MIPI1C_CAM_FRONT_CLK_P MIPI1C_CAM_FRONT_CLK_N
COMMENTS:
RADAR: 11363497
39
3 4 9
39
BI
OUT
BI
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
20 44
20 44
17 44
17 44
20 44
20
17
17
17 45
17 45
17 45
17 45
44
TABLE_ALT_HEAD
TABLE_ALT_ITEM
D
C
B
AH22
AH23
AH21
AH20
AH19
AH18
AH17
A
6 3
SYNC_MASTER=MLB
PAGE TITLE
AP: TV/DP/MIPI/CAMERA
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
SYNC_DATE=05/04/2012
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
9 OF 102
SHEET
6 OF 46
124578
SIZE
A
D
87
=PP1V2_S2R_H4
7
39
1
R1005
2.21K
1% 1/32W MF 01005
2
PPVREF_DDR0_CA
1
R1006
2.21K
1%
D
=PP1V2_VDDQ_H4
7
39
1/32W MF 01005
2
1
R1053
1.00K
1% 1/32W MF 01005
2
1
R1054
1.00K
1% 1/32W MF 01005
2
NOSTUFF
1
C1002
0.01UF
10%
6.3V
2
X5R
01005
PPVREF_DDR0_DQ
NOSTUFF
1
C1054
0.01UF
10%
6.3V
2
X5R
01005
7
44
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
7
44
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
=PP1V2_S2R_H4
7
39
CRITICAL
0.22UF
C
=PP1V2_S2R_H4
7
39
1
R1051
2.21K
1% 1/32W MF 01005
2
PPVREF_DDR1_CA
1
R1052
2.21K
1% 1/32W MF 01005
2
=PP1V2_VDDQ_H4
7
39
1
R1055
1.00K
1% 1/32W MF 01005
B
2
1
R1056
1.00K
1% 1/32W MF 01005
2
NOSTUFF
1
C1052
0.01UF
10%
6.3V
2
X5R
01005
PPVREF_DDR1_DQ
NOSTUFF
1
C1056
0.01UF
10%
6.3V
2
X5R
01005
7
44
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
7
44
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
CRITICAL
C1027
0.22UF
6.3V
0201
=PP1V2_VDDQ_H4
7
39
6.3V
0201
CRITICAL
1
C1029
0.22UF
20%
2
X5R
CRITICAL
1
C1028
0.22UF
20%
2
X5R
6 5 4
=PP1V2_S2R_H4
7
39
C1001
0.01UF
6.3V
01005
1
10%
2
X5R
L12
T10
AP15
Y31
B19
AP10 AD31
P30
Y30
AC30 AN12
AN16
AN21
A18 A19
A28
L30
AA30
AD30
AJ1 AN14
AN23
AP9
A20
B28
M30
AA2 AE29
AJ2 AN10
AN24
B10
B14
B18
B20
B24
B27
C30
F30
J30
AE2
AH2
AL2
AN4
AN7
Y2
C2
W1
Y1
C1
B4 B7
E2
K2
M2
R2 W2
DDR0_VDDQ_CKE DDR1_VDDQ_CKE
DDR0_VREF_CA
DDR1_VREF_CA
DDR0_VREF_DQ DDR1_VREF_DQ
DDR0_ZQ
DDR1_ZQ
VDDCA
80MA
VDD2
320MA (DRAM CORE)
20MA
VDD1
(DRAM CORE - CHARGE PUMP)
VDDQ
500MA
OMIT
<1MA
U0652
<1MA
H4A
BGA
POP-512MB-DDR
(7 OF 12)
VSS
B21
B22
B23 B26
B30
B31
C3 C4
C5
C6
C7 C8
C9
C10
C11 C12
C13 C14
C15
C16 C17
C18
C19 C20
C21
C22 C25
C28
D1 D2
D3
D4 D5
D6
D7 D8
D9
D10 D11
D12
D13 D14
D15
D24 D27
D30
E1 E3
E4 E5
E6
E7 E8
E9
E10 E11
E12
E13 E14
E15 E24
E28
E30 E31
F1
F3
C1004
6.3V
0201
20%
6.3V X5R
0201
20%
X5R
1
2
CRITICAL
1
0.22UF
2
CRITICAL
C1030
0.22UF
C1005
20%
6.3V X5R
0201
20%
6.3V X5R
0201
39
CRITICAL
X5R-CERM1
1
2
R1001
240
12
12
240
R1000
CRITICAL
1
C1006
0.22UF
20%
6.3V
2
X5R
0201
=PP1V8_S2R_H4
CRITICAL
C1015
4.7UF
20%
6.3V
X5R-CERM1
402
1
C1024
4.7UF
20%
6.3V 2
402
CRITICAL
C1031
0.22UF
20%
6.3V X5R
0201
C1000
0.01UF
44
44
44
44
1%
1/20W
201
MF
MF
1/20W1%201
(DDR IMPEDANCE CONTROL)
CRITICAL
1
C1007
0.22UF
20%
6.3V
2
X5R
0201
CRITICAL
C1009
4.7UF
20%
6.3V
X5R-CERM1
402
CRITICAL
1
C1019
0.22UF
20%
6.3V
2
X5R
0201
1
C1026
0.01UF
10%
6.3V 2
X5R
01005
CRITICAL
C1032
0.22UF
6.3V
0201
1
20%
2
X5R
1
2
1
10%
6.3V 2
X5R
01005
PPVREF_DDR0_CA
7
PPVREF_DDR1_CA
7
PPVREF_DDR1_DQ
7
PPVREF_DDR0_DQ
7
DDR0_ZQ DDR1_ZQ
1
2
1
2
1
2
=PP1V2_VDDIOD_H4
39
=PP1V8_VDDIO18_H4
39
3
CRITICAL
C1039
0.22UF
6.3V
0201
CRITICAL
C1036
0.22UF
6.3V
0201
CRITICAL
C1042
4.7UF
6.3V
X5R-CERM1
20%
X5R
20%
X5R
20%
402
CRITICAL
C1034
4.7UF
X5R-CERM1
1
0.22UF
2
1
2
1
2
1
20%
6.3V 2
402
CRITICAL
C1040
20%
6.3V X5R
0201
CRITICAL
C1037
0.22UF
6.3V
0201
CRITICAL
C1043
0.22UF
6.3V
0201
C1035
0.01UF
10%
6.3V X5R
01005
CRITICAL
1
C1041
0.22UF
20%
6.3V
2
20%
X5R
20%
X5R
1
2
1
2
CRITICAL
C1038
0.22UF
6.3V
0201
0201
20%
X5R
X5R
12
G7 G9
AE16
AE15
AE14
AE13
AE12
AE11
AE10
G11
G13 G15
H10
H12 H14
H16
J10 J11
J12
J13 J14
J15 J16
AA7
AA8
AB9
AC9
AD9
AE9
H20
H19
H6
H8
J7 J8
J9
K6
K8 L7
L8
M6 M8
N7
N8 P6
P8 R7
R8
T6 T8
U7
U8 V6
V8
W7 W8
Y6 Y8
VDDIOD
VDDIO18_GRP1
VDDIO18_GRP2
VDDIO18_GRP3
1
2
1
2
1
2
OMIT
U0652
H4A
BGA
POP-512MB-DDR
(9 OF 12)
500MA
(VDDQ = VDDIOD)
(DON’T DOUBLE COUNT)
75MA
GPIO EHCI (UNUSED) UART[1-3] (1-2 UNUSED) I2C[0-1] ISP[0-1] DWI SENSOR[0-1] ISP FLASH (UNUSED) I2S[0-3] (1 UNUSED) SPI[0-2] (0,2 UNUSED)
11MA - VSEL30_X,CFSB,TEST
2MA - XI/0
VSS
K7 K9
K10
K11 K13
K15
K17 K19
K21 K23
K24
K27 K28
K29
K30 L1
L3
L5 L6
L10 L14
L16
L18 L20
L22
L26 L27
L28
L29 L31
M4 M5
M7
M9 M11
M13
M15 M17
M19
M21 M23
M29 N4
N5
N6 N10
N12
N14 N16
N18
N20 N22
N29 N30
P1
P3
P4 P5
P7
P9 P11
P13
P15 P17
P19 P21
P23
P29 P31
R4
R5 R6
D
C
B
A
SYNC_MASTER=N/A
PAGE TITLE
AP: PWR
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
6 3
SYNC_DATE=04/18/2011
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
10 OF 102
SHEET
7 OF 46
124578
SIZE
A
D
87
=PPVDD_SOC_H4
X5R-CERM1
CRITICAL
C1110
0.22UF
6.3V
0201
CRITICAL
C1116
0.22UF
6.3V
0201
CRITICAL
C1122
0.22UF
6.3V
0201
39
CRITICAL
C1104
4.7UF
6.3V
20%
X5R
20%
X5R
20%
X5R
20%
402
1
2
1
2
1
2
1
2
X5R-CERM1
CRITICAL
C1111
0.22UF
CRITICAL
C1117
0.22UF
CRITICAL
C1123
0.22UF
CRITICAL
C1105
4.7UF
20%
6.3V
402
20%
6.3V X5R
0201
20%
6.3V X5R
0201
20%
6.3V X5R
0201
1
2
1
2
1
2
AJ3
AJ4 AJ5
AJ6
AJ7 AJ8
AJ9 AJ10
AJ11
AJ12 AJ13
AJ14
AJ15 AJ16
AJ20
AK4
AK6
AK7
AK8
AK9 AK10
AK11
AK12 AK13
AK14
AK15 AK16
AK17 AK18
AK19
AK20 AK21
AK22
AK23
T31
AL5
AL6
AL7
AL8
1
2
0.22UF
0.22UF
0.22UF
K1
CRITICAL
C1106
10UF
CRITICAL
C1112
20%
6.3V X5R
0201
CRITICAL
C1118
20%
6.3V X5R
0201
CRITICAL
C1124
20%
6.3V X5R
0201
1
20%
6.3V 2
X5R 603
1
2
1
2
1
2
POP-512MB-DDR
R10
R12 R14
R16 R18
R20
R22
D
C
B
A
R24
R28
R29 R30
T11 T13
T15
T17 T19
T21
T23 T28
G19
T30
U10 U12
U14
U16 U18
U20
U22 U24
U28 H17
U30
J17
V11 V13
V15 V17
V19
V21 V23
V28
V29
W10 W12
W14 W16
W18
W20 W22
W24
Y11
Y13 Y15
Y17
Y19 Y21
Y23
Y27 AA1
AA4
AA5 AA6
AA10 AA12
AA14
AA16 AA18
AA20
AA22
AB2
AB6
AB7 AB8
AB11
T4
T5 T7
U3
U4 U5
U6
V1
V4
V5 V7
V9
W5
W6
Y3 Y5
Y7
Y9
OMIT
U0652
H4A
BGA
POP-512MB-DDR
(11 OF 12)
AB13
AB15 AB17
AB19 AB21
AB23
AB27 AC2
AC3
AC5 AC6
AC7
AC8 AC10
AC12 AC14
AC16
AC18 AC20
AC22
AC29 AC31
AD1
AD2 AD4
AD6 AD7
AD8
AD11 AD13
AD15
AD17 AD19
AD21
AD23 AD27
AE3 AE6
AE7
AE8 AE18
AE20
AE22
VSSVSS
AF3
J22
AF6 AF7
AF8 AF9
AF10
AF11 AF12
AF13
AF14 AF15
AF16
AF17 AF19
AF21 AF23
AF24
AF27 AF29
AG1
AG4 AG6
AG7
AG8 AG9
AG10 AG11
AG12
AG13 AG14
AG15
AG16 AG24
AG25
AG29 AH6
AH7 AH8
AH9
AH10 AH11
AH12
AH13 AH14
AH15
AH16 AH26
AH29
6 5 4
CRITICAL
C1107
4.7UF
20%
6.3V
X5R-CERM1
402
CRITICAL
C1113
0.22UF
20%
6.3V X5R
0201
CRITICAL
C1119
0.22UF
20%
6.3V X5R
0201
CRITICAL
C1125
0.22UF
20%
6.3V X5R
0201
C1128
0.01UF
10%
6.3V X5R
01005
OMIT
U0652
H4A
BGA
(12 OF 12)
1
2
1
2
1
2
1
2
1
2
CRITICAL
C1108
4.7UF
X5R-CERM1
CRITICAL
C1114
0.22UF
CRITICAL
C1120
0.22UF
CRITICAL
0.22UF
C1129
0.01UF
20%
6.3V
402
6.3V
0201
6.3V
0201
C1126
6.3V
0201
10%
6.3V X5R
01005
VSSVSS
20%
X5R
20%
X5R
20%
X5R
1
2
1
2
CRITICAL
C1109
4.7UF
X5R-CERM1
1
2
1
2
1
2
0.01UF
AL9
AL11 AL12
AL15
AL18 AL21
AL22 AL23
AL24
AL25 AL26
AL27
AM5 AM8
V30
AM14 AM17
V31 AM23
AM24
AM25 AM26
AM27
AM28 AM29
AN1
AN2 AN9
AN15 AN30
AN31
AP1 AP2
AP3
AP6 AP12
AP16
AP22 AP24
AP30
AP31
20%
6.3V
402
CRITICAL
C1115
0.22UF
6.3V
0201
CRITICAL
C1121
0.22UF
6.3V
0201
CRITICAL
C1127
0.22UF
6.3V
0201
C1130
10%
6.3V X5R
01005
K14
K16 K18
K20 K22
L17
1
2
1
20%
2
X5R
1
20%
2
X5R
1
20%
2
X5R
1
2
L19 L21
L23
M18 M20
M22
N17 N19
N21 N23
P18
P20 P22
R17
R19 R21
R23
T18 T20
T22 T24
U17
U19 U21
U23
V18 V20
V22
W11
W13 W15
W17
W19 W21
W23
Y10
VDD
W9
OMIT
U0652
H4A
BGA
POP-512MB-DDR
(10 OF 12)
4.2A
GRAPHICS LOWPERF APPLE MC HPERF NRT HPERF RT CDIO DISP_OUT AUDIO COMPLEX AUDIENCE DSP USB PMGR
VDD
Y12
Y14 Y16
Y18 Y20
Y22
AA9 AA11
AA13
AA15 AA17
AA19
AA21 AA23
AB10 AB12
AB14
AB16 AB18
AB20
AB22 AC11
AC13
AC15 AC17
AC19 AC21
AC23
AD10 AD12
AD14
AD16 AD18
AD20
AD22 AE17
AE19 AE21
AE23
AF18 AF20
AF22
CRITICAL
C1136
0.22UF
6.3V
0201
20%
X5R
1
2
39
CRITICAL
C1137
0.22UF
6.3V
0201
=PPVDD_CPU_H4
CRITICAL
1
C1138
0.22UF
20%
2
X5R
6.3V
0201
20%
X5R
6 3
3
6.3V
0201
6.3V
0201
6.3V
20%
X5R
20%
X5R
CRITICAL
C1132
4.7UF
20%
6.3V
X5R-CERM1
402
CRITICAL
1
C1134
4.7UF
20%
6.3V 2
402
CRITICAL
C1140
0.22UF
20%
6.3V X5R
0201
CRITICAL
C1143
0.22UF
20%
6.3V X5R
0201
C1145
0.01UF
10%
6.3V X5R
01005
=PP3V3_USB_H4
3
1
2
X5R-CERM1X5R-CERM1
1
2
1
2
1
2
1
20%
2
402
1
2
1
2
39
0.01UF
=PP1V8_IO_H4
4 6
39
0.01UF
=PP1V8_NAND_H4
5
39
CRITICAL
C1149
4.7UF
X5R-CERM1
=PP1V8_VDDIOD3_H4
39
CRITICAL
C1151
4.7UF
X5R-CERM1
CRITICAL
C1131
4.7UF
X5R-CERM1
CRITICAL
1
C1139
0.22UF
2
CRITICAL
C1142
0.22UF
CRITICAL
C1133
4.7UF
X5R-CERM1
CRITICAL
C1135
4.7UF
6.3V
CRITICAL
0.22UF
0.22UF
0.01UF
C1147
6.3V
01005
C1148
6.3V
01005
20%
6.3V
402
20%
6.3V
402
20%
6.3V
402
20%
402
C1141
6.3V
0201
CRITICAL
C1144
6.3V
0201
C1146
6.3V
01005
1
10%
2
X5R
1
10%
2
X5R
1
2
1
2
12
OMIT
L9
1
2
1
2
1
20%
2
X5R
1
20%
2
X5R
1
10%
2
X5R
L11
L13 L15
M10
M12 M14
M16
N9 N11
N13
N15 P10
P12 P14
VDD_CPU
P16
R9 R11
R13
R15 T12
T14
T16
U9
U11 U13
U15
V10 V12
V14
V16
U25
VDDIO30_USB11_DM
AH27
VDDIOD1
AA24
AB24
AC24 AD24
VDDIOD2
AE24
Y24 J25
K25
VDDIOD3
SYNC_MASTER=N/A
PAGE TITLE
U0652
H4A
BGA
POP-512MB-DDR
(8 OF 12)
2.4A
A9 CORES L2 CACHE BIU
UNUSED
(UART4 <= GPIOS)
10MA
(SDIO <= WIFI)
35MA (NAND)
VDDIOD3
35MA
I2C2 UART0 UART5_RTXD DP_HPD TST_CLKOUT TST_STPCLK WDOG JTAG
5MA
AP: PWR
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
F4 F5
F6 F7
F8
F9 F10
F11
F12 F13
F14
F15 F16
F17 F18
F21
F23 F24
F25
F26 F28
F29
G5 G6
G8 G10
G12
G14 G16
G18
AL3 G22
AN11
G24
VSS
G25
G26 G27
G28
G29 G30
H3
H5 H7
H9
H11 H13
H15 H18
AN19
AP20
H22
F19
H25
H27
H28
H29
H30
H31
J4 J5
J6
J19 J20
F20
G17
J24 J26
J27
J28
J29
K5
SYNC_DATE=04/18/2011
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
11 OF 102
SHEET
8 OF 46
SIZE
D
C
B
A
D
124578
87
6 5 4
3
12
BOOT CONFIG ID
D
BOARD ID
C
BOARD REVISION
B
BOOT_CONFIG[3] (GPIO29)
BOOT_CONFIG[2] (GPIO28)
BOOT_CONFIG[1] (GPIO25)
BOOT_CONFIG[0] (GPIO18)
CURRENT SETTING ->
39
BOARD_ID[3]
BOARD_ID[2]
BOARD_ID[1]
BOARD_ID[0]
X123A
X123B
GPIO_BOARD_REV2
4
GPIO_BOARD_REV1
4
GPIO_BOARD_REV0
4
BRD_REV[2-0]
PROTO 0
000
PROTO 1
001
PROTO 2
010
EVT
011
DVT
100
39
FOR REFERENCE
BOOT_CONFIG[3:0]
0000 SPI0 0001 SPI3 0010 SPI0 W/TEST 0011 SPI3 W/TEST 0100 FMI0 2CS 0101 FMI0 4CS 0110 FMI0 4CS W/TEST 0111 RESERVED 1000 FMI1 2 CS 1001 FMI1 4 CS 1010 FMI1 4CS W/TEST
1011 RESERVED 1100 FMI0/1 2/2 CS 1101 FMI0/1 4/4 CS
1110 FMI0/1 4/4 CS W/TEST
1111 RESERVED
=PP1V8_H4
3 4 6 9
GPIO_BOARD_ID3
4
GPIO_BOARD_ID2
4
GPIO_BOARD_ID1
4
GPIO_BOARD_ID0
4
ID[3-0] SYSTEM
1010 P105 AP 1011 P105 DEV
1100 P106 AP 1101 P106 DEV
1110 P107 AP 1111 P107 DEV
NOSTUFF
1
R1207
2.2K
5% 1/32W MF 01005
2
S/W READ FLOW
1. SET GPIO AS INPUT
2. ENABLE PU AND DISABLE PD
3. READ
=PP1V8_H4
3 4 6 9
GPIO_BOOT_CONFIG3
4
GPIO_BOOT_CONFIG2
4
GPIO_BOOT_CONFIG1
4
GPIO_BOOT_CONFIG0
4
1
R1213
2.2K
5% 1/32W MF 01005
2
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
3. READ
NOSTUFF
1
R1208
2.2K
5% 1/32W MF 01005
2
BOOT_CONFIG[3-0]
1100
FMI0/1 2/2 CS
BOARD_ID_P106_P107
1
R1204
2.2K
5% 1/32W MF 01005
2
S/W READ FLOW
1
R1209
2.2K
5% 1/32W MF 01005
2
1
R1200
2.2K
5% 1/32W MF 01005
2
1
R1201
2.2K
5% 1/32W MF 01005
2
BOARD_ID_P105_P107
1
R1205
2.2K
5% 1/32W MF 01005
2
FMI_4CS_TEST
1
R1202
2.2K
5% 1/32W MF 01005
2
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
3. READ
FMI_4CS_NOTEST
1
R1203
2.2K
5% 1/32W MF 01005
2
S/W READ FLOW
BOARD_ID_DEV
1
R1206
2.2K
5% 1/32W MF 01005
2
=PP1V8_S2R_MISC
4
10 39
GPIO_FORCE_DFU
4
NOTE: PADS USED FOR DEBUG
NOSTUFF
1
R1270
1K
5% 1/20W MF 201
2
JTAG
XW0601
XW0602
XW0603
JTAG_SOC_TRST_L
1
R1211
100
5% 1/32W MF 01005
2
JTAG_SOC_SEL
1
R1210
100
5% 1/32W MF 01005
2
R1260
100
12
1/32W
01005
SHORT-01005
12
SHORT-01005
12
SHORT-01005
12
3
44
OUT
D
3
OUT
5%
MF
SOC_TESTMODE
SOC_TST_STPCLK
SOC_FAST_SCAN_CLK
SOC_HOLD_RESET
3
3
3
3
NC_AP_MIPI0C_DPDATA2
NC_AP_MIPI0C_DNDATA2
NC_AP_MIPI0C_DPDATA3
NC_AP_MIPI0C_DNDATA3
NC_AP_MIPI1D_DPDATA1
NC_AP_MIPI1D_DNDATA1
NC_AP_MIPI1C_DPDATA1
NC_AP_MIPI1C_DNDATA1
SINGLE-PIN NETS
NC_FMI0_DQS_NEG
NC_FMI0_RE_POS
NC_FMI1_DQS_NEG
NC_FMI1_RE_POS
NC_PMU_SHDWN
NC_JTAG_SOC_TDO
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FMI0_DQS_N
FMI0_RE_P
FMI1_DQS_N
FMI1_RE_P
PMU_SHDWN
JTAG_SOC_TDO
NC_MIPI0C_CAM_REAR_DATA_P<2>
NC_MIPI0C_CAM_REAR_DATA_N<2>
NC_MIPI0C_CAM_REAR_DATA_P<3>
NC_MIPI0C_CAM_REAR_DATA_N<3>
NC_MIPI1D_AP_CLK_PNC_AP_MIPI1D_DPCLK
NC_MIPI1D_AP_CLK_NNC_AP_MIPI1D_DNCLK
NC_MIPI1D_AP_DATA_P<0>NC_AP_MIPI1D_DPDATA0
NC_MIPI1D_AP_DATA_N<0>NC_AP_MIPI1D_DNDATA0
NC_MIPI1D_AP_DATA_P<1>
NC_MIPI1D_AP_DATA_N<1>
NC_MIPI1C_CAM_FRONT_DATA_P<1>
NC_MIPI1C_CAM_FRONT_DATA_N<1>
NC_USB_FS_D_PNC_AP_USB11_DPD
NC_USB_FS_D_NNC_AP_USB11_DND
C
11
11
11
11
42
3
44
6
6
6
6
6
6
6
6
6
6
6
6
3
3
B
A
SYNC_MASTER=N/A
PAGE TITLE
AP: MISC & ALIASES
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
6 3
SYNC_DATE=04/11/2011
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
12 OF 102
SHEET
9 OF 46
124578
SIZE
A
D
87
CRITICAL BOM OPTION
CRITICAL
TABLE_ALT_HEAD
TABLE_ALT_ITEM
COMMON
NXP
TI
PART#
343S0614
PART NUMBER
343S0620
DESCRIPTION
QTY
1
IC,ASIC,TRISTAR,CBTL1608,A1,WLCSP36
ALTERNATE FOR PART NUMBER
BOM OPTION
COMMON343S0614
REFERENCE DESIGNATOR(S)
U1300
REF DES
COMMENTS:
IC,ASIC,TRISTAR,THS7383,A1,WLCSP36
U1300
D
=PP3V0_S2R_TRISTAR
39
C
TO USB BB MUX
AP USB
ACCESSORY UART
AP DEBUG UART
BB DEBUG UART
(T’S OFF TO H4A UART4)
1
C1320
8.2PF
+/-0.5PF 16V
2
NP0-C0G-CERM 01005
=PP1V8_S2R_TRISTAR
10 39
MIKEY_TS_P
14 45
MIKEY_TS_N
45
14
USB_BB_D_P
21 44
USB_BB_D_N
21 44
USB_BRICKID
42
SOC_USB_D_P
3
44
SOC_USB_D_N
3
44
UART2_ACC_TXD
4
44
UART2_ACC_RXD
4
44
UART0_DEBUG_TXD
4
44
UART0_DEBUG_RXD
4
44
UART4_BB_RXD
4
21 44
UART4_BB_TXD
4
21 44
JTAG_SOC_TCK
3
44
JTAG_SOC_TMS
3
44
CRITICAL
1
2
1
C1321
8.2PF
+/-0.5PF 16V
2
NP0-C0G-CERM 01005
C1300
0.1UF
20%
6.3V X5R-CERM 01005
6 5 4
TABLE_5_HEAD
TABLE_5_ITEM
=PPVCC_MAIN_ACC_SW
39
TRISTAR
=PP1V8_S2R_MISC
4 9
CRITICAL
1
C1360
1.0UF
20% 10V
2
X5R-CERM 0201-1
CRITICAL
1
C1301
0.1UF
20%
6.3V
2
X5R-CERM 01005
THS7383IYKAR
C3
DIG_DP
C4
DIG_DN
A1
USB1_DP
B1
USB1_DN
C2
BRICK_ID
A3
USB0_DP
B3
USB0_DN
E2
UART0_TX
E1
UART0_RX
F2
UART1_TX
F1
UART1_RX
D2
UART2_TX
D1
UART2_RX
A5
JTAG_CLK
B5
JTAG_DIO
F3F4D5
VDD_1V8
VDD_3V0
U1300
WCSP
CON_DET_L
OVP_SW_EN*
SWITCH_EN
HOST_RESET
DVSS
DVSS
CRITICAL
OMIT
ACC_PWR
BYPASS
DVSS
A6C1F5
P_IN ACC1
ACC2
DP1 DN1
DP2
DN2
SDA SCL
INT
CRITICAL
1
C1302
4.7UF
10% 25V
2
X5R-CERM 0603
F6
C5
TS_ACC1
E5
TS_ACC2
A2
TS_E75_DPAIR1_P
B2
TS_E75_DPAIR1_N
A4
TS_E75_DPAIR2_P
B4
TS_E75_DPAIR2_N
E3
TS_CON_DET_L
D6
OVP_SW_EN_L
E4
RST_SYSTEM_L
B6
TS_HOST_RESET
D3
I2C0_SDA
D4
I2C0_SCL
C6
PMU_GPIO_TRISTAR_IRQ
E6
TRISTAR_ADD0
CRITICAL
1
C1303
1.0UF
20% 10V
2
X5R-CERM 0201-1
1
C1322
8.2PF
+/-0.5PF 16V
2
NP0-C0G-CERM 01005
38
38
38 44
38
38 44
38 44
10 38
OUT
OUT
4
4
VOLTAGE=3V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=0.5MM
TRISTAR BYPASS FOR 3V LDO
10
PP3V3_ACC_FET
44
38
3
21 42
IN
10
15 42 44
15 42 44
OUT
4
42
PPVBUS_PROT
39
GPIO_ACC_SW_POK_L
4
10
OUT
38
CRITICAL
1
C1361
1UF
10%
25V
2
X5R 402
=PP3V3_ACC
1
R1321
100K
1% 1/32W MF 01005
2
LAYOUT NOTE: ADD THERMAL GND VIAS TO U1350
A2
C1
CRITICAL
1
C1350
0.1UF
10%
6.3V
2
X5R 201
ACC_PWR
POK*
U1350
LM34904
3
A1
CRITICAL
VCC
USMD
GND
CSD68803W15
C1
B2 B1
A2
ENABLE
ACC_DET*
B1
NOSTUFF
R1350
0.00
12
1%
1/20W
MF
0201
Q1301
BGA
D
G
A1
B2
C2
CRITICAL
S
C3
C2 B3
A3
CRITICAL
1
R1322
220K
5% 1/32W MF 01005
2
GPIO_ACC_SW_EN
TS_CON_DET_L
1
R1320
1.00M
1% 1/32W MF 01005
2
PP3V3_ACC_FET
VOLTAGE=3.3V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
12
D
4
IN
10 38
IN
C
10 39
GPIO_ACC_SW_POK
B
L81_MBUS_REF
14
OUT
R1370
0.00
12
0%
1/32W
MF
01005
GPIO_ACC_SW_POK_L
4
10
1
2
C1362
470PF
10% 10V X5R 01005
3
D
CRITICAL
G
1
Q1300
DMN26D0UFB4
S
DFN
SYM_VER_1
2
B
EITHER TRISTAR OR AP CAN RESET PMU
=PP1V8_S2R_TRISTAR
10 39
1
C1310
0.1UF
20%
6.3V
2
X5R-CERM 01005
5% 1/32W MF 01005
2
1
SOC_WDOG
3
A
IN
10
IN
TS_HOST_RESET
1
R1310
220K
5% 1/32W MF 01005
2
1
R1311
220K
2
6 3
6
U1310
NC
CRITICAL
74LVC1G32
SOT891
4
35
NC_U1310_5
PMU_RESET_IN
SIZE
A
D
42
OUT
SYNC_MASTER=N/A
PAGE TITLE
E75 SUPPORT
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
SYNC_DATE=N/A
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
13 OF 102
SHEET
10 OF 46
124578
87
6 5 4
3
12
FLASH CONFIGURATIONS
QTY
PART NUMBER
335S0889
335S0871
335S0872
335S0873
D
=PP3V3_NAND
39
1
2
C1490
27PF
5% 16V NP0-C0G 01005
1
2
C1491
27PF
5% 16V NP0-C0G 01005
1
C1405
0.22UF
20%
6.3V
2
X5R 0201
C
1
2
1
2
C1406
0.22UF
20%
6.3V X5R 0201
C1492
27PF
5% 16V NP0-C0G 01005
1
2
CRITICAL
1
C1451
1UF
20%
6.3V
2
X5R 0201
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
CRITICAL
C1400
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
10UF
20%
6.3V CERM-X5R 0402-2
CRITICAL
1
C1450
1UF
20%
6.3V
2
X5R 0201
FMI0_AD<0> FMI0_AD<1> FMI0_AD<2> FMI0_AD<3> FMI0_AD<4> FMI0_AD<5> FMI0_AD<6> FMI0_AD<7>
FMI1_AD<0> FMI1_AD<1> FMI1_AD<2> FMI1_AD<3> FMI1_AD<4> FMI1_AD<5> FMI1_AD<6> FMI1_AD<7>
CRITICAL
1
2
PPVDDI_NAND_U1400
B
TP_TCKC_U1400 TP_TMSC_U1400
C1401
10UF
20%
6.3V CERM-X5R 0402-2
CRITICAL
1
C1402
10UF
20%
6.3V
2
CERM-X5R 0402-2
VOLTAGE=1.2V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM
OA0
OB0
1
C1404
0.1UF
20%
6.3V
2
X5R-CERM 01005
G3 H2
J3
K2 L5
K6
J5 H6
G1 J1
L1 N3
N5
L7 J7
G7
IO0-0 IO1-0
IO2-0 IO3-0
IO4-0
IO5-0 IO6-0
IO7-0
IO0-1
IO1-1
IO2-1 IO3-1
IO4-1 IO5-1
IO6-1
IO7-1
TCKC TMSC
VDDI
OB8
F2M6B6
VCC
VSS
1
C1410
0.1UF
20%
6.3V
2
X5R-CERM 01005
OA8
OF8G0OE0
OD8
OC8
N7
N1
VCCQ
CRITICAL
OMIT
U1400
LGA-12X17
XXNM-XGBX8-MLC-PPN1.5-ODP
CE0*
CLE0 ALE0
WE0*
RE0
RE0*
DQS0
DQS0*
R/B0*
CE1*
CLE1 ALE1
WE1*
RE1
RE1*
DQS1
DQS1*
R/B1*
VREF
A5
A3 C1
E3
B4
C7
H4
F4
E5
C5
C3
D2 E1
D4
D6
M4
K4
E7
G5
A1
ZQ
VSSQ
A7M2L3F6B2
OC0
OD0
OE8
OF0
G8
CRITICAL
1
C1411
10UF
20%
6.3V
2
CERM-X5R 0402-1
FMI0_CE0_L FMI0_CLE FMI0_ALE FMI0_WE_L
FMI0_RE_P FMI0_RE_N
FMI0_DQS_P FMI0_DQS_N
FMI1_CE0_L FMI1_CLE FMI1_ALE FMI1_WE_L
FMI1_RE_P FMI1_RE_N
FMI1_DQS_P FMI1_DQS_N
FMI_ZQ_U1400
CRITICAL
1
C1412
10UF
20%
6.3V
2
CERM-X5R 0402-2
1
2
IN
IN
IN
IN
9
IN
IN
9
IN
IN
IN
IN
9
IN
IN
9
R1454
243
1% 1/20W MF 201
CRITICAL
1
C1413
0.22UF
20%
6.3V
2
X5R 0201
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
5
44
VREF_NAND_U1400
335S0900
335S0883
CRITICAL
1
C1414
0.22UF
20%
6.3V
2
X5R 0201
ALTERNATE FOR PART NUMBER
335S0890
335S0878 16GB
335S0879 32GB
335S0880 64GB
335S0880
335S0880
335S0880
335S0880
C1493
27PF
5% 16V NP0-C0G 01005
1
2
C1494
27PF
5% 16V NP0-C0G 01005
1
2
NAND_RDYBSY_L
BOM OPTION
8GB
16GB
16GB335S0881
32GB335S0882
64GB
=PP1V8_NAND
R1455
1
100K
1% 1/32W MF 01005
2
REF DES
U1400
U1400
U1400
U1400
U1400
U1400
U1400
U1400
11 39
1
R1460
50K
1% 1/32W MF 01005
2
1
R1461
50K
1% 1/32W MF 01005
2
COMMENTS:
HYNIX 20NM PPN1.5 8GB
HYNIX 20NM PPN1.5 16GB
HYNIX 20NM PPN1.5 32GB
HYNIX 20NM PPN1.5 64GB
SANDISK 19NM PPN1.5 16GB
SAMSUNG 21NM PPN1.5 16GB
SAMSUNG 21NM PPN1.5 32GB
SAMSUNG 21NM PPN1.5 64GB
=PP1V8_NAND
1
C1460
0.01UF
10%
6.3V
2
X5R 01005
1
C1461
0.01UF
10%
6.3V
2
X5R 01005
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
11 39
PART#
335S0890
335S0878
335S0879
335S0880
DESCRIPTION
1
TOSHIBA 19NM PPN1.5 8GB
1
TOSHIBA 19NM PPN1.5 16GB
1
TOSHIBA 19NM PPN1.5 32GB
1
TOSHIBA 19NM PPN1.5 64GB
REFERENCE DESIGNATOR(S)
U1400
U1400
U1400
U1400
BOM OPTION
8GB
16GB
32GB
64GB
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
D
C
B
A
6 3
SYNC_MASTER=MLB
PAGE TITLE
NAND STORAGE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
SYNC_DATE=05/04/2012
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
14 OF 102
SHEET
11 OF 46
124578
SIZE
A
D
87
6 5 4
3
12
TOUCH SUBSYSTEM
L1700
=PP5V25_GRAPE
D
=PPVCC_MAIN_GRAPE
39
NOSTUFF
R1750
=PP5V25_GRAPE
12 39
C
=PP1V8_GRAPE
12 39
169K
12
1%
1/20W
MF
201
R1780
0.00
12
0%
1/32W
MF
01005
MAIN2GRAPE_ON
1
R1751
100K
1% 1/32W MF 01005
2
240OHM-350MA
CRITICAL
1
C1750
0.1UF
10% 16V
2
X5R-CERM 0201
VCC_MAIN_GRAPE_RAMP
CRITICAL
1
C1751
4700PF
10% 10V
2
X7R 201
21
0201
LAYOUT NOTE: PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION
1
C1700
27PF
5% 16V
2
NP0-C0G 01005
1
C1701
1UF
10% 10V
2
X5R
402
=PP1V8_S2R_GRAPE
39
18
VDD
U1700
SLG5AP302
TDFN
7
CAP
25
ON S
GND
CRITICAL
D
1
C1702
1000PF
10% 16V
2
X7R 201
3
PP5V25_GRAPE_FILT
VOLTAGE=5.25V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
CRITICAL
1
C1752
1UF
20%
6.3V
2
X5R 0201
CRITICAL
1
C1753
10UF
20% 10V
2
X5R-CERM 0402-2
12 12 39
PP1V8_S2R2GRAPE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
SPI1_GRAPE_SCLK
4
44
DISPLAY_SYNC
6
12
R1753
0.00
1/32W
01005
D
RCPT - MLB 998-4526 -> 516S1054
(PLUG - FLEX 998-4527)
CRITICAL
J1700
503304-2010
F-ST-SM-1
R1752
0.00
0%
1/32W
MF
01005
12
0%
MF
NOSTUFF
1
C1761
27PF
5% 16V
2
NP0-C0G 01005
PP3V0_S2R_HALL_FILT
12
44
SPI1_GRAPE_SCLK_R SPI1_GRAPE_MISO
4
44
SPI1_GRAPE_MOSI
4
44
SPI1_GRAPE_CS_L
4
44
AP_CLK_32K_CUMULUS
44
4
GPIO_GRAPE_IRQ_L
4
GPIO_GRAPE_RST_L
4
PP1V8_GRAPE_FILT
12
DISPLAY_SYNC_R
22
21
1
2
3
4
5
6
8
7
9
10
11
12
14
13
15
16
18
17
19
20
23
24
GPIO_BTN_HOME_FILT_L
PMU_GPIO_HALL_IRQ_4 PMU_GPIO_HALL_IRQ_3 PMU_GPIO_HALL_IRQ_2
PMU_GPIO_HALL_IRQ_1
PP5V25_GRAPE_FILT
12
42
42
42
42
12
C
L1760
GPIO_BTN_HOME_L
4
42
L1701
240OHM-350MA
=PP1V8_GRAPE
B
12 39
=PP3V0_S2R_HALL
240-OHM-0.2A-0.8-OHM
240-OHM-0.2A-0.8-OHM
A
0201
NOSTUFF
L1750
0201
L1702
0201
21
21
1
C1703
27PF
5% 16V
2
NP0-C0G 01005
21
1
C1706
27PF
5% 16V
2
NP0-C0G 01005
1
C1704
2
1
C1707
1UF
20%
6.3V
2
X5R 0201
1UF
20%
6.3V X5R 0201
1
2
1
C1708
1000PF
10% 16V
2
X7R 201
C1705
1000PF
10% 16V X7R 201
PP1V8_GRAPE_FILT
VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PP3V0_S2R_HALL_FILT
VOLTAGE=3.0V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
12
12 39
150OHM-25%-200MA-0.7DCR
01005
21
GPIO_BTN_HOME_R_L
1
C1760
27PF
5% 16V
2
NP0-C0G 01005
6 3
R1790
1.00K
12
1%
1/32W
MF
01005
SYNC_MASTER=N/A
PAGE TITLE
GPIO_BTN_HOME_FILT_L
TOUCH: FLEX CONNECTOR
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
12
SYNC_DATE=06/21/2010
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
PAGE
17 OF 102
SHEET
12 OF 46
124578
SIZE
B
A
D
87
6 5 4
3
12
D
R1850
0.00
DMIC1_FF_SCLK
14 45
L1800
=PP1V8_DMIC
39
0201
240-OHM-0.2A-0.8-OHM
21
1
2
C1800
27PF
5% 16V NP0-C0G 01005
PP1V8_DMIC_CONN
VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
C
12
0%
1/32W
MF
01005
DMIC1_FF_SD
14 45
ANT_PORTB_3
21 25
ANT_PORTB_2
21 25
PP_LDO14_2P65
21 22 27 32 35
ANT_PORTB_1
21 25
DMIC1_FF_SCLK_CONN
45
NOSTUFF
1
C1850
27PF
5% 16V
2
NP0-C0G 01005
1
C1820
56PF
5% 16V
2
NP0-C0G
1
C1821
56PF
5% 16V
2
NP0-C0G 0100501005
1
C1822
56PF
5% 16V
2
NP0-C0G 01005
VOLTAGE=2.65V
MIN_NECK_WIDTH=0.06 MM
1
C1801
0.1UF
10%
6.3V
2
X5R 201
1
C1802
27PF
5% 16V
2
NP0-C0G 01005
P/N 510S0760 - MLB
(P/N 510S0761 - FLEX)
CRITICAL
J1800
AA07-S016VA1
F-ST-SM-COMBO
18
17
1
2
4
3
6
5
7
8
9
10
11
12
13
14
15
16
19
20
CONN_HP_HS4_FILT CONN_HP_HS4_REF_FILT CONN_HP_HS3_REF_FILT
CONN_HP_HS3_FILT
CONN_HP_RIGHT_FILT
CONN_HP_LEFT_FILT
CONN_HP_HEADSET_DET
14
14
14
14
14
14
14
AUDIO_JACK_FLEX RET2 AUDIO_JACK_FLEX MIC1
AUDIO_JACK_FLEX MIC2
AUDIO_JACK_FLEX RET1
PER DAVE BREECE
D
C
SIZE
B
A
D
B
A
6 3
SYNC_MASTER=N/A
PAGE TITLE
AUDIO JACK FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
SYNC_DATE=03/31/2011
DRAWING NUMBER
051-9374
REVISION
13.0.0
BRANCH
13 OF 46
PAGE
18 OF 102
SHEET
124578
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