Apple ipad 5 Schematics
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
124578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
HOME BUTTON
BUTTON FLEX
IO FLEX
IO FLEX
HB FLEX
CSA 19
AMP
I2C2
CSA 17
CSA 19
AMP
AMP
CSA 20
SPEAKER
LEFT
SPEAKER
AOUT1
AOUT2
MBUS
RIGHT
AMP
CSA 20
COMPASS
SIM CARD
LPDDR3
CUMULUS
CSA 81-84
FRONT CAMERA
UART3
I2S2
USB2.0
CAM
ALS
I2S4
WIFI/BT ANT
WIFI/BT ANT
CSA 58
CSA 60
TRISTAR
REAR CAMERA
BT_I2S
MIPI1C
MIPI0C
ISP1_I2C
ISP0_I2C
HSIC1
UART2
UART6
SPI
I2S1
SPI3
HP
FMI1
NAND FLASH
FMI0
CSA 16
UART4
DWI
I2C0
UART5
EDP
CSA 14
BATTERY
OSCAR
CSA 75
SPI1
I2C1
CUMULUS
SPI BUS
GYRO
CSA 24
ACCELEROMETER
CSA 24
HALL EFF 1
CSA 24
CSA 25
PROX SENSOR
SIO_UART1
PRIMARY CELLULAR ANT
NOT ON
CELLULAR/
IPC
HSIC2
JTAG
SIO_UART0
GRAPE
GPS
DIVERSITY CELLULAR ANT
HSIC1
WIFI-ONLY CONFIG
WIFI/BT
UART1
GPS ANT
USART
I2S0
ALCATRAZ
SPI2
CSA 31-46
MIMO
MIC1 MIC2
L81
CODEC
AUDIO
USB
I2S0
UART0
CSA 29
CSA 56
BACKLIGHT
ASP
XSP
ANYA
DISPLAY/
TOUCH PANEL
HALL EFF 2
PMU
NC
NC
I2C3
IN
OUT
IN
BI
BI
BI
BI
BI
BI
(1 OF 14)
XO0
XI0
WDOG
VDD_ANA_PLL_CCC
VDD_ANA_PLL
USB_VDD330
USB_VBUS
USB_REXT
USB_ID
USB_DVDD
USB_DP
USB_DM
USB_ANALOGTEST
TST_CLKOUT
JTAG_TRST*
JTAG_TDO
JTAG_TDI
HSIC2_STB
HSIC2_DATA
HSIC1_STB
HSIC1_DATA
HSIC_VDD122
HSIC_VDD121
HSIC_VDD120
HOLD_RESET
FAST_SCAN_CLK
DISP_VSYNC
DDR1_CKEIN
DDR0_CKEIN
CFSB
ANALOGMUXOUT
HSIC0_DATA
HSIC0_STB
JTAG_SEL
JTAG_TRTCK
JTAG_TMS
JTAG_TCK
TESTMODE
FUSE1_FSRC
USB_VSSA0
HSIC_VSS120
HSIC_VSS122
HSIC_VSS121
RESET*
IN
OUT
OUT
OUT
IN
TP
OUT
IN
IN
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
PULLUP ON CSA 15
3X13MA
6X1MA
5.4MA
25MA
1MA
NOTE: NEW VALUE FOR H6 IS 200 OHM
CKEIN IS 1.2V, 1.8V TOL
13 25 47 57 60 61 67
0201
X5R-CERM
10%
10V
0.01UF
01005
16V
CRITICAL
CERM
5%
12PF
1.60X1.20MM-SM
CRITICAL
24.000MHZ-30PPM-9.5PF-60OHM
01005
CRITICAL
5%
CERM
16V
12PF
1.33K
1/32W
MF
01005
1%
1.00M
01005
MF
1%
1/32W
68.1K
01005
MF
1%
1/32W
PLACE_NEAR=U0600.E24:5MM
01005
MF
1%
200
1/32W
10%
01005
0.01UF
6.3V
X5R
0201
0.22UF
20%
6.3V
X5R
01005
0.01UF
X5R
10%
6.3V
PLACE_NEAR=U0600.R18:10MM
01005
0%
1/32W
0.00
MF
01005
6.3V
0.22UF
20%
X5R
01005
6.3V
20%
0.22UF
X5R
01005
6.3V
0.01UF
X5R
10%
01005
0.01UF
6.3V
10%
X5R
13
13
25 28 61 64
25 28 61 64
46 61 64
46 61 64
47 60 64
47 60 64
8.2PF
+/-0.5PF
01005
NP0-C0G-CERM
16V
01005
20%
6.3V
X5R
0.22UF
01005
20%
6.3V
X5R
0.22UF
OMIT_TABLE
ALCATRAZ
DISCRETE
FBGA
55 67
01005
0.22UF
6.3V
20%
X5R
01005
20%
6.3V
X5R
0.22UF
01005
X5R
10%
6.3V
0.01UF
100K
1/32W
MF
01005
5%
1/32W
100K
MF
01005
5%
100K
1/32W
MF
01005
5%
47 60 64
47 60 64
52 60 61
13 60
TP-P55
+/-0.5PF
8.2PF
01005
NP0-C0G-CERM
16V
+/-0.5PF
8.2PF
01005
NP0-C0G-CERM
16V
8.2PF
+/-0.5PF
01005
NP0-C0G-CERM
16V
13 67
13 60
13 60 64
SOC_24M_O
XTAL_SOC_24M_O
HSIC1_WLAN_STB
USB_REXT0
NO_TEST=TRUE
NC_USB_ID
DISPLAY_SYNC
=PP1V8_SOC
JTAG_SOC_SEL
NC_HSIC0_DATA
NO_TEST=TRUE
=PP1V2_HSIC_SOC
PP1V8_PLL_SOC_F
WDOG_SOC
=PP3V3_USB_SOC
NO_TEST=TRUE
NC_HSIC0_STB
HSIC1_WLAN_DATA
HSIC2_BB_DATA
HSIC2_BB_STB
USB_VBUS_DETECT_R
NC_USB_ANALOGTEST
NO_TEST=TRUE
SOC_TESTMODE
USB_SOC_N
USB_SOC_P
USB_VBUS_DETECT
TP_ANALOGMUXOUT
SOC_TST_CLKOUT
SOC_HOLD_RESET
SOC_FAST_SCAN_CLK
JTAG_SOC_TMS
JTAG_SOC_TDI
JTAG_SOC_TCK
=PP1V0_USB_SOC
=PP1V8_PLL_SOC
RESET_SOC_L
XTAL_SOC_24M_I
TP_JTAG_SOC_TDO
JTAG_SOC_TRST_L
NO_TEST=TRUE
NC_JTAG_SOC_TRTCK
C0660
1
2
C0651
1
2
Y0600
24
13
C0650
1
2
R0641
12
R0640
1
2
R0650
12
R0660
1
2
C0615
1
2
C0610
1
2
C0605
1
2
R0600
12
C0631
1
2
C0645
1
2
C0640
1
2
C0630
1
2
C0620
1
2
C0601
1
2
C0600
1
2
U0600
E26
E28
AN23
R33
AR11
AC4
G17
D29
A26
B26
A27
B27
AJ35
AJ36
F23
F24
AJ30
G23
G24
AJ31
E27
D28
C27
C28
D27
C29
D26
D30
AC2
AC1
E23
A29
B29
F25
D24
E24
D23
E25
G25
R18
AD22
AC3
A30
B30
C0611
1
2
C0612
1
2
C0606
1
2
R0611
1
2
R0612
1
2
R0610
1
2
TP0600
1
C0607
1
2
C0641
1
2
C0632
1
2
65
65
63
5 7
13 58 62
64
62
67
62
64
67
61
60 64
62
62
65
60 64
64
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
IN
IN
IN
OUT
BI
OUT
BI
OUT
OUT
IN
IN
OUT
IN
OUT
IN
IN
IN
IN
IN
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
(2 OF 14)
GPIO0
GPIO1
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO2
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
TMR32_PWM0
TMR32_PWM1
TMR32_PWM2
UART0_RXD
UART0_TXD
UART1_CTSN
UART1_RTSN
UART1_RXD
UART1_TXD
UART2_CTSN
UART2_RTSN
UART2_RXD
UART2_TXD
UART3_CTSN
UART3_RTSN
UART3_RXD
UART3_TXD
UART4_CTSN
UART4_RTSN
UART4_RXD
UART4_TXD
UART5_RTXD
UART6_RXD
UART6_TXD
(3 OF 14)
DWI_CLK
DWI_DI
DWI_DO
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
I2C3_SCL
I2C3_SDA
I2S0_BCLK
I2S0_DIN
I2S0_DOUT
I2S0_LRCK
I2S0_MCK
I2S1_BCLK
I2S1_DIN
I2S1_DOUT
I2S1_LRCK
I2S1_MCK
I2S2_BCLK
I2S2_DIN
I2S2_DOUT
I2S2_LRCK
I2S2_MCK
I2S3_BCLK
I2S3_DIN
I2S3_DOUT
I2S3_LRCK
I2S3_MCK
I2S4_BCLK
I2S4_DIN
I2S4_DOUT
I2S4_LRCK
I2S4_MCK
SEP_7816UART0_RST
SEP_7816UART0_SCL
SEP_7816UART0_SDA
SEP_7816UART1_RST
SEP_7816UART1_SCL
SEP_7816UART1_SDA
SIO_7816UART0_RST
SIO_7816UART0_SCL
SIO_7816UART0_SDA
SIO_7816UART1_RST
SIO_7816UART1_SCL
SIO_7816UART1_SDA
SOCHOT0
SOCHOT1
SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
OUT
IN
IN
IN
IN
IN
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
OUT
BI
OUT
BI
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
IN
OUT
OUT
IN
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
A
SCL SDA
VSS
VCC
OUT
OUT
OUT
BI
124578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
TO:
ANYA PMU 0111100X
AD7149 PROX 0101101X
FF CAM CT817 ALS 0111001X
TO:
NOTE: I2C1 IS ASSUMED TO USE
PUSH-PULL INSTEAD OF OPEN-DRAIN
SEP EEPROM
I2C PULL-UPS
1.8V
TRISTAR 0011010X
1.8V
UNPROGRAMMED P/N: 335S0894
I2S0 AND I2S2 ARE OPTIMIZED FOR LOW MCK JITTER
UNUSED
L81 CODEC ASP
TO BT UART
BCM4330
ACCESSORY
WIFI DEBUG
UART 1.8V
1.8V
SOC DEBUG
BT
1.8V
L81 CODEC XSP
TO BB UART
MDM9600
TO OSCAR
TO:
OSCAR SWD
BUTTON PULLUPS
1.8V
TO:
01005
100K
5%
1/32W
MF
100K
MF
1/32W
5%
0100501005
MF
5%
1/32W
100K
5%
MF
100K
1/32W
01005
NOSTUFF
201
MF
1/20W
5%
100K
5%
MF
100K
1/32W
01005
13
13
13
5
57 60 64
5
57 60 64
5
47 64
5
47 64
57 64
57 64
22
25 29 67
5
25 27 60
29
5
57
13
5
59 60
13
13
47 64
47 64
25 27 60 67
54 57 64
21
57
1/32W
MF
01005
5%
2.2K
1/32W
5%
01005
MF
2.2K
MF
01005
1/32W
5%
2.2K2.2K
MF
01005
5%
1/32W
15
5
50 57 60
5
21 57
13
13
100K
01005
1/32W
MF
5%
19
47 57
FBGA
ALCATRAZ
DISCRETE
OMIT_TABLE
ALCATRAZ
FBGA
DISCRETE
OMIT_TABLE
47 60 64
47 60 64
46 61 64
46 61 64
29 64
25 29 64
5
46 64
25 29 64
5
57
13
13
13
13
13
21
52 60 61 67
52 60 61
5
21 57
53
52 60 61 64
100K
01005
1/32W
MF
5%5%
MF
1/32W
01005
100K
29
46 61
29
2.2K
MF
01005
5%
1/32W
2.2K
MF
01005
5%
1/32W
19
5
64
5
64
5
19 64
5
19 64
100K
1/32W
01005
5%
MF
NOSTUFF
01005
2.2K
MF
5%
1/32W
NOSTUFF
01005
5%
1/32W
2.2K
MF
NOSTUFF
25 29 64
25 29 64
25 29 47 64
25 29 47 64
19 57
19 60 67
19 64
19 64
46 64
46 64
46 64
46 64
46 64
46 64
15 64
15 64
15 64
15 64
52 60 61 64
52 60 61 64
52 60 61 64
52 60 61 64
25 28 61 64
25 28 61 64
25 28 61 64
25 28 61 64
25 28 61 64
1/32W
01005
1%
MF
33.2
15 64
15 64
15 64
15 64
15 64
15 64
15 64
15 64
46 64
46 64
15 64
46 64
46 64
TP-P55
01005
20%
0.22UF
6.3V
X5R
CAT24C08C4A
WLCSP
CRITICAL
16
16
5
13 22 61 64
5
13 22 61 64
1/32W
5%
MF
2.2K
01005
1/32W
5%
MF
2.2K
01005
NO_TEST=TRUE
NC_SEP_7816UART1_SCL
NO_TEST=TRUE
NC_GPIO7
NO_TEST=TRUE
NC_GPIO32
NO_TEST=TRUE
NC_SEP_7816UART0_RST
GPIO_BTN_ONOFF_L
I2C2_SDA_1V8
SEP_I2C0_SCL
SEP_I2C0_SDA
I2C1_SOC2OSCAR_SWDIO_1V8
I2C1_SOC2OSCAR_SWDCLK_1V8
=PP1V8_ALWAYS
NO_TEST=TRUE
NC_GPIO11
NO_TEST=TRUE
NC_SEP_7816UART1_RST
GPIO_SOC2PMU_KEEPACT
SEP_I2C0_SDASEP_I2C0_SCL
=PP1V8_EEPROM
I2C0_SDA_1V8
I2C0_SCL_1V8
I2C2_SCL_1V8
=PP1V8_S2R_MISC
=PP1V8_SOC
SOCHOT0_L
SOCHOT1_L
HSIC1_SOC2WLAN_HOST_RDY
NO_TEST=TRUE
NC_GPIO14
NO_TEST=TRUE
NC_I2S2_MCK
I2S0_CODEC_ASP_MCK
NO_TEST=TRUE
NC_I2S4_MCK
NO_TEST=TRUE
NC_TMR32_PWM1
GPIO_FORCE_DFU
NO_TEST=TRUE
NC_GPIO_UART2_CTSN
SOC_TST_CPUSWITCH_OUT
TP_GPIO_DFU_STATUS
GPIO_BTN_SRL_L
=PP1V8_S2R_MISC
GPIO_BTN_HOME_L
NO_TEST=TRUE
NC_I2S1_MCK
NO_TEST=TRUE
NC_SEP_7816UART1_SDA
NO_TEST=TRUE
NC_GPIO_UART2_RTSN
SOCHOT0_L
NO_TEST=TRUE
NC_I2S2_DOUT
NO_TEST=TRUE
NC_I2S2_LRCK
NO_TEST=TRUE
NC_I2S2_DIN
NO_TEST=TRUE
NC_I2S2_BCLK
GPIO_SOC2BB_RADIO_ON_L
NC_SPI1_SSIN
NO_TEST=TRUE
NO_TEST=TRUE
NC_SPI1_MOSI
NO_TEST=TRUE
NC_SPI1_MISO
NO_TEST=TRUE
NC_SPI0_SSIN
SPI2_GRAPE_SCLK
GPIO_BOARD_ID_2
I2C3_SDA_1V8
I2C3_SCL_1V8
GPIO_HS4_SHUNT_EN
GPIO_HS3_SHUNT_EN
I2S4_SOC2BT_DATA
I2S4_BT2SOC_DATA
I2S0_CODEC_ASP_MCK_R
I2S4_SOC2BT_LRCK
I2S4_SOC2BT_BCLK
I2S1_CODEC_XSP_DIN
I2S1_CODEC_XSP_DOUT
I2S1_CODEC_XSP_LRCK
I2S1_CODEC_XSP_BCLK
I2S0_CODEC_ASP_DOUT
I2S0_CODEC_ASP_DIN
I2S0_CODEC_ASP_BCLK
I2S0_CODEC_ASP_LRCK
BB_JTAG_TMS
BB_JTAG_TDO
BB_JTAG_TCK
BB_JTAG_TDI
BB_JTAG_TRST_L
SPI2_GRAPE_CS_L
SPI2_GRAPE_MOSI
SPI2_GRAPE_MISO
SPI3_CODEC_MOSI
SPI3_CODEC_SCLK
SPI3_CODEC_MISO
UART2_SOC2WLAN_TX
UART2_WLAN2SOC_TX
UART1_SOC2BT_TX
UART1_SOC2BT_RTS_L
UART1_BT2SOC_TX
UART1_BT2SOC_RTS_L
UART4_SOC2OSCAR_TXD
UART4_OSCAR2SOC_RXD
GPIO_OSCAR_RESET_L
PMU_GPIO_OSCAR2PMU_HOST_WAKE
UART3_SOC2BB_TX
UART3_BB2SOC_TX
UART3_SOC2BB_RTS_L
UART3_BB2SOC_RTS_L
I2C1_SOC2OSCAR_SWDIO_1V8
I2C1_SOC2OSCAR_SWDCLK_1V8
SEP_I2C0_SDA
SEP_I2C0_SCL
GPIO_SOC2OSCAR_DBGEN
GPIO_SOC2BB_WAKE_MODEM
GPIO_BT_WAKE
GPIO_BB2SOC_GPS_SYNC
CLK_32K_SOC2CUMULUS
GPIO_SOC2LCD_PWREN
GPIO_BTN_SRL_L
GPIO_GRAPE2SOC_IRQ_L
GPIO_SOC2GRAPE_RESET_L
GPIO_BTN_VOL_DOWN_L
GPIO_BRD_REV0
GPIO_BRD_REV1
GPIO_BRD_REV2
GPIO_BRD_REV3
GPIO_BOARD_ID_3
SOCHOT1_L
HSIC2_SOC2BB_HOST_RDY
HSIC1_SOC2WLAN_HOST_RDY
HSIC2_BB2SOC_DEVICE_RDY
HSIC2_BB2SOC_REMOTE_WAKE
HSIC1_WLAN2SOC_REMOTE_WAKE
HSIC1_WLAN2SOC_DEVICE_RDY
UART0_SOC_RXD
UART0_SOC_TXD
GPIO_TS2SOC2PMU_INT
OSCAR_TIME_SYNC_HOST_INT
GPIO_BOOT_CONFIG_0
GPIO_PROX2SOC_IRQ_L
GPIO_BTN_ONOFF_L
GPIO_BTN_HOME_L
GPIO_CODEC2SOC_IRQ_L
GPIO_PMU2SOC_IRQ_L
GPIO_BTN_VOL_UP_L
UART5_BATT_TRXD
GPIO_SOC2BB_RST_L
UART6_TS_ACC_TXD
UART6_TS_ACC_RXD
GPIO_BOOT_CONFIG_3
GPIO_BOOT_CONFIG_2
GPIO_FORCE_DFU
GPIO_BOOT_CONFIG_1
GPIO_SOC2PMU_KEEPACT
GPIO_BB2SOC_GSM_TXBURST
GPIO_SOC2BB_RADIO_ON_L
GPIO_BB2SOC_RESET_DET_L
GPIO_CAM_ALS2SOC_IRQ_L
DWI_AP_DO
DWI_AP_CLK
I2C2_SDA_1V8
I2C2_SCL_1V8
I2C0_SDA_1V8
I2C0_SCL_1V8
GPIO_BOARD_ID_1
GPIO_BOARD_ID_0
NC_SPI1_SCLK
NO_TEST=TRUE
SPI3_CODEC_CS_L
=PP1V8_SOC
I2C3_SCL_1V8
I2C3_SDA_1V8
R0720
1
2
R0721
1
2
R0722
1
2
R0733
1
2
R0731
1
2
R0730
1
2
R0755
1
2
R0754
1
2
R0751
1
2
R0750
1
2
R0734
1
2
U0600
AB6
AD1
AF1
AF2
AE4
AF3
AE5
AE6
AG1
AF4
AG3
AF5
AB5
AH1
AG4
AR10
AN14
AR9
AP13
AT14
AT8
AM17
AT9
AC5
AP14
AN16
AT11
AT10
AP11
AN17
AR13
AP16
AT13
AC6
AD3
AD4
AE1
AE2
AD5
AD35
AC34
AD36
AR17
AP17
AH4
AH2
AG6
AG5
AJ3
AH5
AJ2
AJ1
AK1
AJ6
AJ5
AJ4
AM3
AM2
AL5
AL6
AK4
AB36
AB35
U0600
AT17
AT16
AR16
AN6
AP4
AP5
AR3
AR14
AT7
AA35
AA36
AJ32
AG32
AJ33
AH32
F28
AH34
AG34
AF32
AH33
AG33
AG35
AE33
AF34
AE32
F26
AF36
AC32
AD33
AG36
AD32
AE36
AB32
AC33
AE35
AD34
AL1
AK5
AK3
AM1
AL4
AL2
Y32
AB33
AA32
AA34
AC36
AA33
AM20
AM19
AN4
AP2
AN3
AM9
AN1
AM4
AM5
AM7
AN8
AN7
AN5
AN9
AN13
AT6
AR7
AP10
R0761
1
2
R0760
1
2
R0756
1
2
R0757
1
2
R0723
1
2
R0758
1
2
R0759
1
2
R0700
12
TP0700
1
C9000
1
2
U9000
B1 B2
A1A2
R0752
1
2
R0753
1
2
5
21 57
5
47 64
5
64
5
64
5
19 64
5
19 64
62
5
57
5
64
5
64
62
5
57 60 64
5
57 60 64
5
47 64
5
59 62
4 5 7
13 58 62
5
58
5
57
5
46 64
64
64
64
5
59 60
61
5
21 57
5
59 62
5
50 57 60
64
5
58
64
64
64
64
5
25 27 60
4 5 7
13 58 62
5
13 22 61 64
5
13 22 61 64
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
OUT
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
BI
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
OUT
BI
(4 OF 14)
PPN0_ALE
PPN0_CEN0
PPN0_CEN1
PPN0_IO7
PPN0_CLE
PPN0_DQS
PPN0_IO0
PPN0_IO1
PPN0_IO2
PPN0_IO3
PPN0_IO4
PPN0_IO5
PPN0_IO6
PPN0_REN
PPN0_VREF
PPN0_WEN
PPN0_ZQ
PPN1_ALE
PPN1_CEN0
PPN1_CEN1
PPN1_CLE
PPN1_DQS
PPN1_IO0
PPN1_IO1
PPN1_IO2
PPN1_IO3
PPN1_IO4
PPN1_IO5
PPN1_IO6
PPN1_IO7
PPN1_REN
PPN1_VREF
PPN1_WEN
PPN1_ZQ
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
14 60 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 61 66
14 66
14 66
14 66
14 66
14 66
14 66
14 66
14 61 66
100K
MF
01005
5%
1/32W
14 61 66
14 61 66
14 61 66
14 61 66
MF
01005
1%
1/32W
51.1K
51.1K
1/32W
1%
01005
MF
01005
X5R
6.3V
0.01UF
10%
X5R
01005
6.3V
0.01UF
10%
OMIT_TABLE
FBGA
ALCATRAZ
DISCRETE
240
01005
1/32W
MF
1%
240
01005
1/32W
1%
MF
5%
1/32W
MF
100K
01005
FMI0_ZQ
FMI0_DQS
FMI1_ZQ
PPVREF_FMI_SOC
FMI1_RE_L
FMI1_WE_L
FMI1_CLE
FMI1_ALE
FMI1_AD<7>
FMI1_AD<6>
FMI0_AD<2>
FMI0_ALE
FMI1_CE0_L
FMI0_RE_L
FMI1_AD<2>
FMI1_AD<0>
NO_TEST=TRUE
NC_FMI1_CE1_L
FMI0_WE_L
FMI0_CLE
FMI0_CE0_L
FMI0_AD<1>
FMI1_AD<3>
FMI0_AD<0>
FMI0_AD<3>
FMI1_AD<1>
FMI1_AD<4>
FMI1_AD<5>
NO_TEST=TRUE
NC_FMI0_CE1_L
=PP1V8_NAND_SOC
FMI1_DQS
FMI0_AD<7>
FMI0_AD<6>
FMI0_AD<5>
FMI0_AD<4>
=PP1V8_NAND_SOC
R0801
1
2
R0800
1
2
R0830
1
2
R0831
1
2
C0830
1
2
C0831
1
2
U0600
C31
E34
C35
B31
B34
A32
A33
B33
E32
C32
E33
D34
D36
C34
E31
A31
C33
H36
J36
J34
J35
F36
H34
G35
G34
J32
G33
E36
E35
G32
G36
H32
J33
F34
R0840
1
2
R0841
1
2
61 66
6
62
6
62
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
IN
OUT
OUT
BI
BI
BI
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
SENSOR1_RST
SENSOR1_CLK
SENSOR0_RST
SENSOR0_ISTRB
SENSOR0_CLK
MIPI1D_VREG_0P4V
MIPI1D_VDD18
MIPI1C_DPDATA1
MIPI1C_DPDATA0
MIPI1C_DPCLK
MIPI1C_DNDATA1
MIPI1C_DNDATA0
MIPI0D_VREG_0P4V
MIPI0D_VDD18
MIPI0D_DPDATA3
MIPI0D_DPDATA2
MIPI0D_DPDATA1
MIPI0D_DPDATA0
MIPI0D_DPCLK
MIPI0D_DNDATA3
MIPI0D_DNDATA2
MIPI0D_DNDATA1
MIPI0D_DNDATA0
MIPI0D_DNCLK
MIPI0C_DPDATA3
MIPI0C_DPDATA2
MIPI0C_DPDATA1
MIPI0C_DPCLK
MIPI0C_DNDATA3
MIPI0C_DNDATA2
MIPI0C_DNDATA1
MIPI0C_DNDATA0
MIPI0C_DNCLK
MIPI_VSS
ISP1_SDA
ISP1_SCL
ISP0_SDA
ISP0_SCL
SENSOR0_XSHUTDOWN
SENSOR1_ISTRB
SENSOR1_XSHUTDOWN
MIPI0C_DPDATA0
MIPI_VDD10
MIPI1C_DNCLK
(5 OF 14)
(6 OF 14)
DP_PAD_AUXN
DP_PAD_AUXP
DP_PAD_AVDD_AUX
DP_PAD_AVDD0
DP_PAD_AVDD1
DP_PAD_AVDD2
DP_PAD_AVDD3
DP_PAD_AVDDP0
DP_PAD_AVDDX
DP_PAD_AVSS_AUX
DP_PAD_AVSS0
DP_PAD_AVSS1
DP_PAD_AVSS2
DP_PAD_AVSS3
DP_PAD_AVSSP0
DP_PAD_AVSSX
DP_PAD_DC_TP
DP_PAD_DVDD
DP_PAD_DVSS
DP_PAD_R_BIAS
DP_PAD_TX0N
DP_PAD_TX0P
DP_PAD_TX1N
DP_PAD_TX1P
DP_PAD_TX2N
DP_PAD_TX2P
DP_PAD_TX3N
DP_PAD_TX3P
EDP_HPD
BI
OUT
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
(1MA)
(50MA)
(50MA)
(50MA)
(50MA)
(10MA)
(14MA)
(14MA)
(55MA)
(2X2MA)
56PF
5%
16V
NP0-C0G
01005
0
1/20W
201
5%
MF
5%
56PF
16V
NP0-C0G
01005
0.22UF
X5R
20%
6.3V
01005
6.3V
20%
X5R
1.0UF
0201-1
20%
1.0UF
X5R
6.3V
0201-1
20%
X5R
6.3V
0201-1
1.0UF
53 65
2.2K
MF
5%
1/32W
01005
2.2K
MF
5%
1/32W
01005
22 64
23 64
23 64
22 64
2.2K
MF
5%
1/32W
01005
2.2K
1/32W
5%
MF
01005
22
01005
0201-1
20%
X5R
6.3V
1.0UF
X5R
6.3V
20%
0.22UF
01005
X5R
6.3V
20%
0.22UF
01005
6.3V
1.0UF
0201-1
X5R
20%
PLACE_NEAR=U0600.E19:3MM
1/32W
1%
MF
4.99K
01005
53 65
53 65
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
53 61 65
X5R
6.3V
10%
0.01UF
01005
NOSTUFF
23 64
23 67
22 64
22 67
22 61 65
22 61 65
22 61 65
22 61 65
23 61 65
23 61 65
23 61 65
23 61 65
23 61 65
23 61 65
16V
NP0-C0G-CERM
01005
8.2PF
+/-0.5PF
16V
NP0-C0G-CERM
01005
8.2PF
+/-0.5PF
16V
NP0-C0G-CERM
01005
8.2PF
+/-0.5PF
DISCRETE
ALCATRAZ
FBGA
OMIT_TABLE
22
01005
FBGA
DISCRETE
ALCATRAZ
OMIT_TABLE
29
17 18
PP1V8_EDP_AVDD_AUX
=PP1V0_MIPI_SOC
TP_PP0V4_MIPI1D
NC_MIPI1C_CAM_FRONT_DATA_P<1>
NO_TEST=TRUE
NO_TEST=TRUE
NC_MIPI1C_CAM_FRONT_DATA_N<1>
NC_MIPI0D_DNDATA3
NO_TEST=TRUE
NC_MIPI0D_DNDATA1
NO_TEST=TRUE
NC_MIPI0D_DPCLK
NO_TEST=TRUE
NC_MIPI0D_DPDATA1
NO_TEST=TRUE
NC_MIPI0D_DPDATA2
NO_TEST=TRUE
NC_MIPI0D_DNDATA2
NO_TEST=TRUE
NC_MIPI0D_DPDATA3
NO_TEST=TRUE
NC_MIPI0D_DNCLK
NO_TEST=TRUE
NC_SENSOR0_XSHUTDOWN
NO_TEST=TRUE
NC_SENSOR1_ISTRB
NO_TEST=TRUE
NC_MIPI0C_CAM_REAR_DATA_P<2>
NO_TEST=TRUE
NO_TEST=TRUE
NC_MIPI0C_CAM_REAR_DATA_P<3>
NO_TEST=TRUE
NC_MIPI0C_CAM_REAR_DATA_N<3>
NC_MIPI0D_DNDATA0
NO_TEST=TRUE
NC_MIPI0D_DPDATA0
NO_TEST=TRUE
BB_IPC_GPIO
ISP1_CAM_FRONT_SHUTDOWN_L
ISP1_CAM_FRONT_CLK
EDP_HPD
=PP1V0_EDP_PAD_DVDD_SOC
=PP1V8_EDP_SOC
TP_EDP_PAD_DC_TP
AP_EDP_R_BIAS
TP_PP0V4_MIPI0D
=PP1V8_SOC
=PP1V8_MIPI_SOC
ISP1_CAM_FRONT_CLK_R
MIPI0C_CAM_REAR_CLK_P
MIPI0C_CAM_REAR_DATA_P<0>
MIPI0C_CAM_REAR_DATA_N<0>
MIPI0C_CAM_REAR_CLK_N
MIPI0C_CAM_REAR_DATA_N<1>
MIPI1C_CAM_FRONT_DATA_P<0>
MIPI1C_CAM_FRONT_DATA_N<0>
MIPI1C_CAM_FRONT_CLK_N
MIPI1C_CAM_FRONT_CLK_P
ISP0_CAM_REAR_SHUTDOWN_L
ISP0_CAM_REAR_CLK
EDP_DATA_N<3>
EDP_DATA_P<3>
EDP_DATA_N<2>
EDP_DATA_P<2>
EDP_DATA_N<1>
EDP_DATA_P<1>
EDP_DATA_N<0>
EDP_DATA_P<0>
EDP_AUX_N
EDP_AUX_P
ISP1_CAM_FRONT_SDA
ISP0_CAM_REAR_SDA
ISP0_CAM_REAR_SCL
ISP1_CAM_FRONT_SCL
MIPI0C_CAM_REAR_DATA_P<1>
ISP0_CAM_REAR_CLK_R
NO_TEST=TRUE
NC_MIPI0C_CAM_REAR_DATA_N<2>
AUD_SPKRAMP_MUTE_L
C0941
1
2
R0940
12
C0940
1
2
C0950
1
2
C0951
1
2
C0952
1
2
C0955
1
2
R0903
1
2
R0902
1
2
R0901
1
2
R0900
1
2
R0910
12
C0915
1
2
C0906
1
2
C0905
1
2
C0900
1
2
R0960
1
2
C0960
1
2
C0946
1
2
C0945
1
2
C0910
1
2
U0600
AP7
AM10
AR4
AN10
AT31
AT33
AT32
AT30
AT29
AR31
AR33
AR32
AR30
AR29
AP31
AP33
AP32
AP30
AP29
AN31
AN33
AN32
AN30
AN29
AN26
AN27
AM36
AN36
AL36
AM35
AN35
AL35
AM31
AN28
AL26
AL27
AL28
AL29
AL30AM26
AM27
AM28
AM29
AM30
AT4
AN11
AP8
AR6
AT5
AP9
AM13
AM11
R0911
12
U0600
A20
B20
G21
F20
F21
F22
G19
G20
F19
E20
D21
E21
E22
G18
D20
H18
D19
F18
F17
E19
A21
B21
A22
B22
A23
B23
A24
B24
E29
67
62
67
65
65
65
65
65
65
65
65
65
65
65
65
65
65
65
62
62
67
4 5
13 58 62
62
64
64
65
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
OUT
DDR0_CA7
DDR1_CSN0
DDR1_CSN1
DDR1_DM0
DDR1_DM1
DDR1_DM2
DDR1_DM3
DDR1_DQ0
DDR1_DQ1
DDR1_DQ3
DDR1_DQ4
DDR1_DQ5
DDR1_DQ7
DDR1_DQ8
DDR1_DQ9
DDR0_DM0
DDR0_CSN1
DDR0_CA1
DDR0_CA2
DDR0_CA3
DDR0_CA4
DDR0_CA5
DDR0_CA6
DDR0_CA8
DDR0_CA9
DDR0_CK
DDR0_CKB
DDR0_CKE0
DDR0_CKE1
DDR0_CSN0
DDR0_DM1
DDR0_DM2
DDR0_DM3
DDR0_DQ0
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR0_DQ16
DDR0_DQ17
DDR0_DQ18
DDR0_DQ19
DDR0_DQ20
DDR0_DQ21
DDR0_DQ22
DDR0_DQ23
DDR0_DQ24
DDR0_DQ25
DDR0_DQ26
DDR0_DQ27
DDR0_DQ28
DDR0_DQ29
DDR0_DQ31
DDR0_DQ4
DDR0_DQ5
DDR0_DQ6
DDR0_DQ7
DDR0_DQ8
DDR0_DQ9
DDR0_NDQS0
DDR0_NDQS1
DDR0_NDQS2
DDR0_NDQS3
DDR0_PDQS0
DDR0_PDQS1
DDR0_PDQS2
DDR0_PDQS3
DDR0_RREF_CA
DDR0_RREF_DQ
DDR0_VDD_CKE
DDR0_VREF_CA
DDR0_VREF_DQ
DDR1_CA0
DDR1_CA1
DDR1_CA2
DDR1_CA3
DDR1_CA4
DDR1_CA5
DDR1_CA6
DDR1_CA7
DDR1_CA8
DDR1_CA9
DDR1_CK
DDR1_CKB
DDR1_CKE0
DDR1_CKE1
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR1_DQ16
DDR1_DQ17
DDR1_DQ18
DDR1_DQ19
DDR1_DQ2
DDR1_DQ20
DDR1_DQ21
DDR1_DQ22
DDR1_DQ23
DDR1_DQ24
DDR1_DQ25
DDR1_DQ26
DDR1_DQ27
DDR1_DQ28
DDR1_DQ29
DDR1_DQ31
DDR1_DQ6
DDR1_NDQS0
DDR1_NDQS1
DDR1_NDQS2
DDR1_NDQS3
DDR1_PDQS0
DDR1_PDQS1
DDR1_PDQS2
DDR1_PDQS3
DDR1_RREF_CA
DDR1_RREF_DQ
DDR1_VDD_CKE
DDR1_VREF_CA
DDR1_VREF_DQ
DDR0_DQ30 DDR1_DQ30
DDR0_DQ1
DDR0_DQ2
DDR0_DQ3
DDR0_CA0
(14 OF 14)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
(DDR IMPEDANCE CONTROL)
(<1MA EACH)
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
OMIT_TABLE
FBGA
ALCATRAZ
DISCRETE
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
0.22UF
6.3V
20%
X5R
01005
10K
01005
1%
MF
1/32W
20%
0.1UF
X5R-CERM
01005
6.3V
01005
1/32W
10K
MF
1%
20%
0.1UF
X5R-CERM
6.3V
01005
4.7K
1%
1/32W
MF
01005
20%
0.1UF
X5R-CERM
6.3V
01005
240
1%
1/32W
MF
01005
240
1%
1/32W
MF
01005
10K
1/32W
1%
MF
01005
20%
0.1UF
X5R-CERM
6.3V
01005
01005
1%
1/32W
MF
10K
20%
0.1UF
X5R-CERM
01005
6.3V
MF
1/32W
01005
4.7K
1%
20%
0.1UF
X5R-CERM
01005
6.3V
01005
MF
1/32W
1%
4.7K
20%
0.1UF
X5R-CERM
01005
6.3V
01005
MF
1/32W
1%
4.7K
20%
0.1UF
X5R-CERM
01005
6.3V
12 61 66
12 61 66
12 61 66
12 61 66
MF
1%
240
1/32W
01005 01005
MF
1/32W
240
1%
X5R
20%
6.3V
0.22UF
01005
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61 66
12 61
PPVREF_DDR1_DQ_SOC
=PP1V2_S2R_DDR_SOC
PPVREF_DDR0_DQ_SOC
DDR0_CK_N
PPVREF_DDR0_CA_SOC
PPVREF_DDR1_CA_SOC
DDR0_DQ<25>
DDR0_DQ<26>
DDR0_DQ<27>
DDR0_DQ<28>
DDR0_DQ<29>
DDR0_DQ<30>
DDR0_DQ<31>
DDR0_CA<0>
DDR0_CA<1>
DDR0_CA<2>
DDR0_CA<3>
DDR0_CA<4>
DDR0_CA<5>
DDR0_CA<6>
DDR0_CA<7>
DDR0_CA<8>
DDR0_CA<9>
DDR0_DM<0>
DDR0_DM<1>
DDR0_DM<2>
DDR0_DM<3>
DDR0_DQS_P<0>
DDR0_DQS_N<0>
DDR0_DQS_P<1>
DDR0_DQS_P<2>
DDR0_DQS_N<1>
DDR0_DQS_N<2>
DDR0_DQS_P<3>
DDR0_CK_P
DDR0_CKE<0>
DDR0_CSN<0>
DDR1_CA<0>
DDR1_CA<1>
DDR1_CA<2>
DDR1_CA<3>
DDR1_CA<4>
DDR1_CA<5>
DDR1_CA<6>
DDR1_CA<7>
DDR1_CA<8>
DDR1_CA<9>
DDR1_CKE<0>
DDR1_CSN<0>
DDR1_DM<0>
DDR1_DM<1>
DDR1_DM<2>
DDR1_DM<3>
DDR1_DQ<0>
DDR1_DQ<1>
DDR1_DQ<2>
DDR1_DQ<3>
DDR1_DQ<4>
DDR1_DQ<5>
DDR1_DQ<6>
DDR1_DQ<7>
DDR1_DQ<8>
DDR1_DQ<9>
DDR1_DQ<10>
DDR1_DQ<11>
DDR1_DQ<12>
DDR1_DQ<13>
DDR1_DQ<15>
DDR1_DQ<14>
DDR1_DQ<16>
DDR1_DQ<17>
DDR1_DQ<18>
DDR1_DQ<19>
DDR1_DQ<20>
DDR1_DQ<21>
DDR1_DQ<22>
DDR1_DQ<23>
DDR1_DQ<24>
DDR1_DQ<25>
DDR1_DQ<26>
DDR1_DQ<27>
DDR1_DQ<28>
DDR1_DQ<29>
DDR1_DQ<30>
DDR1_DQ<31>
DDR1_DQS_P<0>
DDR1_DQS_P<1>
DDR1_DQS_P<2>
DDR1_DQS_P<3>
DDR1_DQS_N<0>
DDR1_DQS_N<1>
DDR1_DQS_N<2>
DDR1_DQS_N<3>
DDR1_CK_P
DDR1_CK_N
DDR0_CKE<1>
DDR0_CSN<1>
DDR1_CKE<1>
DDR1_CSN<1>
DDR0_DQ<0>
DDR0_DQ<1>
DDR0_DQ<2>
DDR0_DQ<4>
DDR0_DQ<3>
DDR0_DQ<5>
DDR0_DQ<6>
DDR0_DQ<7>
DDR0_DQ<8>
DDR0_DQ<9>
DDR0_DQ<10>
DDR0_DQ<11>
DDR0_DQ<12>
DDR0_DQ<13>
DDR0_DQ<14>
DDR0_DQ<15>
DDR0_DQ<16>
DDR0_DQ<17>
DDR0_DQ<18>
DDR0_DQ<19>
DDR0_DQ<20>
DDR0_DQ<21>
DDR0_DQ<22>
DDR0_DQ<23>
DDR0_DQ<24>
PPVREF_DDR0_CA_SOC
PPVREF_DDR1_CA_SOC
PPVREF_DDR0_DQ_SOC
DDR0_DQS_N<3>
=PP1V2_VDDIOD_SOC
DDR1_DQ_ZQ_SOC
DDR0_DQ_ZQ_SOC
DDR1_CA_ZQ_SOC
DDR0_CA_ZQ_SOC
=PP1V2_S2R_DDR_SOC
PPVREF_DDR1_DQ_SOC
U0600
AP27
AR27
AT27
AR26
AT26
AR20
AT20
AT19
AR19
AP19
AT22
AR22
AR24
AT24
AR25
AT25
D11
D9
C15
D7
B15
D14
D10
B10
B9
D8
C8
B8
D18
B18
D17
B17
B14
D16
C16
B16
D15
C7
B7
D6
B6
D5
B5
D13
D4
B4
B13
D12
C12
B12
C11
B11
A13
A10
A17
A6
A14
A9
A18
A5
AN22
F12
AP23
AP22
F13
L34
L35
L36
M35
M36
V35
V36
W36
W35
W34
T36
T35
P35
P36
N35
N36
P4
T4
K3
V4
K2
L4
R4
R2
T2
U4
U3
U2
G4
G2
H4
H2
L2
J4
J3
J2
K4
V3
V2
W4
W2
Y4
Y2
M4
AA4
AA2
M2
N4
N3
N2
P3
P2
M1
R1
H1
W1
L1
T1
G1
Y1
T33
R6
R34
T34
P6
C1000
1
2
R1092
1
2
C1092
1
2
R1093
1
2
C1093
1
2
R1096
1
2
C1096
1
2
R1000
1
2
R1001
1
2
R1090
1
2
C1090
1
2
R1091
1
2
C1091
1
2
R1094
1
2
C1094
1
2
R1097
1
2
C1097
1
2
R1095
1
2
C1095
1
2
R1002
1
2
R1003
1
2
C1001
1
2
8
66
8
62
8
66
8
66
8
66
8
66
8
66
8
66
9
62
66
66
66
66
8
62
8
66
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
VSS
(7 OF 14)
VDDIO18_GRP2
VSS
VDDIOD_DDRDQ
VDDIOD_DDR0CA
VDDIO18_GRP4
VDDIO18_GRP3
VDDIOD_DDR1CA
VDDIO18_GRP1
(9 OF 14)
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
(2MA) XTAL I/O
(31MA)
PPN, GPIO, JTAG
(20MA)
(1000MA)
GPIO, UART, SPI,
(65MA)
I2C, SENSOR,
SHARED WITH DRAM VDDQ
DDR0_CA0 CAPS
DDR1_CA1 CAPS
POR CAPS 4/13/2012
SOCHOT, PMU
I2S, TMR, SIO,
GPIO, UART
POR CAPS 4/13/2012
DISCRETE
ALCATRAZ
FBGA
OMIT_TABLE
4V
20%
201
0.47UF
CERM-X5R-1
CERM-X5R-1
4V
20%
201
0.47UF
6.3V
X5R
20%
1.0UF
0201-1
1.0UF
6.3V
20%
X5R
0201-1
1.0UF
X5R
20%
6.3V
0201-1
1.0UF
20%
X5R
6.3V
0201-1
1.0UF
X5R
20%
6.3V
0201-1
1.0UF
X5R
6.3V
20%
0201-1
0.47UF
4V
201
20%
CERM-X5R-1
201
4V
0.47UF
20%
CERM-X5R-1
1.0UF
6.3V
20%
X5R
0201-1
1.0UF
X5R
6.3V
20%
0201-1
X5R-CERM
4.3UF
0610
4V
20%
CRITICAL
15UF
0402
4V
X5R
20%
4V
20%
201
CERM-X5R-1
0.47UF
ALCATRAZ
DISCRETE
FBGA
OMIT_TABLE
1.0UF
6.3V
20%
X5R
0201-1
1.0UF
X5R
20%
6.3V
0201-1
CERM-X5R-1
4V
0.47UF
20%
201
16V
NP0-C0G-CERM
01005
8.2PF
+/-0.5PF
16V
01005
+/-0.5PF
NP0-C0G-CERM
8.2PF
1.0UF
X5R
6.3V
20%
0201-1
20%
4V
0610
X5R-CERM
4.3UF
CRITICAL
1.0UF
20%
6.3V
X5R
0201-1
201
CERM-X5R-1
20%
4V
0.47UF 0.47UF
CERM-X5R-1
201
20%
4V
0201-1
1.0UF
X5R
20%
6.3V
01005
20%
6.3V
X5R
0.22UF
0.22UF
X5R
6.3V
20%
01005
01005
120-OHM-25%-250MA-0.5DCR
PLACE_NEAR=U0600.F27:2MM
6.3V
20%
X5R
0.22UF
01005
=PP1V8_VDDIO18_SOC
PP1V8_XTAL
=PP1V2_VDDIOD_SOC
=PP1V2_VDDIOD_SOC
=PP1V2_VDDIOD_SOC
=PP1V8_VDDIO18_SOC
U0600
M5
M6
M8
M10
M12
M14
M16
M18
M20
M22
M24
M26
M28
AT12
M32
M33
M34
N1
N5
N9
N11
N13
N15
N17
N19
N21
N23
N25
N27
N29
N32
N33
N34
P1
P5
P8
P10
P12
P14
P16
P18
P20
P22
P24
P26
P28
P31
P32
P33
P34
C1115
1
2
C1105
1
2
C1100
1
2
C1110
1
2
C1101
1
2
C1111
1
2
C1112
1
2
C1102
1
2
C1106
1
2
C1116
1
2
C1162
1
2
C1161
1
2
C1155
1
2
C1150
1
2
C1165
1
2
U0600
AB7
AC7
AL8
AL9
AL10
AL11
AL13
AL14
AL16
AL17
AD7
AL19
AL20
AE7
AF7
AG7
AH7
AJ7
AK7
AL7
AA30
AB31
AC30
AD31
AE30
AF31
AG30
W30
Y31
G29
G30
H31
J30
K31
L30
M31
F27
AL21
AL22
AL23
AL24
AL25
AM21
AM23
AM25
N30
P30
R30
T30
U30
N31
R31
U31
G7
G8
H7
J7
K7
L7
M7
N7
P7
R7
T7
U7
G9
V7
W7
Y7
F7
F9
F11
F14
F16
G6
J6
G10
L6
N6
T6
V6
Y6
G11
G12
G13
G14
G15
G16
Y14
Y16
Y18
Y20
Y24
Y26
Y28
K30
Y33
Y34
Y35
Y36
M30
V30
Y30
C1160
1
2
C1163
1
2
C1166
1
2
C1170
1
2
C1145
1
2
C1126
1
2
C1120
1
2
C1125
1
2
C1130
1
2
C1131
1
2
C1135
1
2
C1140
1
2
C1141
1
2
L1190
12
C1190
1
2
9
10 62
67
8 9
62
8 9
62
8 9
62
9
10 62
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
VDD
VDD
VDD_SENSE
(10 OF 14)
VDD_SRAM_CPU
VDD_ANA_TMPSADC0
VDD_ANA_TMPSADC1
VDD_ANA_TMPSADC2
VDD_ANA_TMPSADC3
VDD_SRAM_SOC
VSS
(8 OF 14)
124578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
(PLANE SENSE)
POR CAPS 4/13/2012
(1500MA)
POR CAPS 4/13/2012
(VDD_SOC 1900MA)
(DIE SENSE)
(4 * 2.5MA)
20%
6.3V
X5R
0.22UF
01005
OMIT_TABLE
ALCATRAZ
DISCRETE
FBGA
OMIT_TABLE
DISCRETE
FBGA
ALCATRAZ
CRITICAL
4V
20%
X5R-CERM
4.3UF
0610
CRITICAL
X5R-CERM
4.3UF
0610
20%
4V
CRITICAL
4V
20%
X5R-CERM
4.3UF
0610
CRITICAL
4.3UF
X5R-CERM
4V
20%
0610
CRITICAL
1UF
20%
4V
X6S
0204
CRITICAL
0204
X6S
4V
20%
1UF
CRITICAL
0204
X6S
4V
20%
1UF
CRITICAL
20%
1UF
4V
0204
X6S
CRITICAL
20%
1UF
4V
0204
X6S
CRITICAL
1UF
20%
4V
X6S
0204
0.47UF
20%
0204
X7S
4V
CRITICAL
0.47UF
20%
0204
X7S
4V
CRITICAL
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
6.3V
20%
01005
20%
4.3UF
4V
X5R-CERM
0610
CRITICAL
20%
0610
4V
X5R-CERM
4.3UF
CRITICAL
CRITICAL
1UF
20%
X6S
0204
4V
1UF
20%
0204
4V
X6S
CRITICAL
15UF
20%
4V
0402
X5R
CRITICAL
X6S
0204
4V
20%
1UF
CRITICAL
0.47UF
20%
4V
X7S
0204
CRITICAL
0.47UF
4V
X7S
0204
20%
CRITICAL
16V
NP0-C0G-CERM
01005
8.2PF
+/-0.5PF
+/-0.5PF
8.2PF
01005
NP0-C0G-CERM
16V
0.22UF
20%
6.3V
X5R
01005
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
20%
6.3V
01005
0204
20%
X6S
4V
1UF
CRITICAL
PLACE_NEAR=U0600.N22:10MM
SHORT-10L-0.25MM-SM
0%
0.00
1/32W
MF
01005
PP1V8_VDD_ANA_TMPSADC
PPVDD_SOC_SOC_SENSE
=PP1V8_VDDIO18_SOC
PPVDD_SOC_RAIL_SENSE
=PPVDD_SRAM_CPU
=PPVDD_SRAM_SOC
=PPVDD_SOC
C1280
1
2
U0600
AB21
AD21
H15
U8
U18
U20
V15
V17
V19
V21
W8
W14
W16
H17
W18
W20
Y17
Y19
Y21
AA16
T8
U29
V8
H19
H21
H23
H25
H27
H29
J8
J10
AF21
J12
J14
J16
J18
J20
J22
J24
J26
J28
K9
AH21
K11
K13
K15
K17
K19
K21
K23
K25
K27
K29
AK21
L8
L10
L12
L14
L16
L18
L20
L22
L24
L26
G26
L28
M9
M11
M13
M15
M17
M19
M21
M23
M25
G28
M27
M29
N8
N10
N12
N14
N16
N18
N20
N22
H9
N24
N26
N28
P9
P11
P13
P15
P17
P19
P21
H11
P23
P25
P27
P29
R8
R14
R16
R20
R22
R24
H13
R26
R28
T15
T17
T19
T21
T23
T25
T27
T29
V31
U0600
AH22
Y22
AA6
G22
AC25
AC27
V26
AC29
AD24
AD26
AD28
AE25
AE27
AE29
AK26
R10
R12
V11
V13
W10
W12
Y9
Y11
Y13
Y15
T9
T11
T13
U10
U12
U14
U16
V9
R3
R5
R9
R11
R13
R15
R17
R19
R21
R23
R25
R27
R29
R32
R35
R36
T3
T5
T10
T12
T14
T16
T18
T20
T22
T24
T26
T28
T31
T32
U1
U5
U6
U9
U11
U13
U15
U17
U19
U21
U23
U25
U27
U32
U33
U34
U35
U36
V1
V5
V10
V12
V14
V16
V18
V20
V22
V24
V28
H30
V32
V33
V34
W3
W5
W6
W9
W11
W13
W15
W17
W19
W21
W23
W25
W27
W29
W31
W32
W33
Y3
Y5
Y8
Y10
Y12
C1208
1
2
C1207
1
2
C1206
1
2
C1205
1
2
C1225
1
2
C1224
1
2
C1223
1
2
C1222
1
2
C1221
1
2
C1220
1
2
C1231
1
2
C1230
1
2
C1241
1
2
C1240
1
2
C1256
1
2
C1255
1
2
C1263
1
2
C1262
1
2
C1250
1
2
C1261
1
2
C1271
1
2
C1270
1
2
C1245
1
2
C1275
1
2
C1281
1
2
C1282
1
2
C1283
1
2
C1260
1
2
XW1200
12
R1200
12
67
57 61
67
9
62
57 67
62
62
62
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
(13 OF 14)
VDD_GPU
VDD_GPU_SENSE
VDD_CPU_SENSE
VDD_CPU
VSS
VSS
(11 OF 14)
VSS VSS
(12 OF 14)
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
(PLANE SENSE)
(PLANE SENSE)
(6800MA)
(10100MA)
(DIE SENSE)
(DIE SENSE)
POR CAPS 4/13/2012
POR CAPS 4/13/2012
OMIT_TABLE
DISCRETE
ALCATRAZ
FBGA
OMIT_TABLE
ALCATRAZ
FBGA
DISCRETE
OMIT_TABLE
ALCATRAZ
DISCRETE
FBGA
15UF
0402
4V
X5R
20%
X5R-CERM
0610
20%
4V
4.3UF
CRITICAL
20%
4.3UF
0610
X5R-CERM
4V
CRITICAL
4.3UF
X5R-CERM
0610
20%
4V
CRITICAL
4.3UF
0610
X5R-CERM
20%
4V
CRITICAL
0610
4.3UF
X5R-CERM
20%
4V
CRITICAL
0610
4.3UF
X5R-CERM
20%
4V
CRITICAL
20%
1UF
4V
0204
X6S
CRITICAL
20%
1UF
4V
X6S
0204
CRITICAL
1UF
20%
4V
X6S
0204
CRITICAL
20%
1UF
4V
0204
X6S
CRITICAL
1UF
20%
4V
0204
X6S
CRITICAL
20%
1UF
4V
0204
X6S
CRITICAL
20%
1UF
4V
X6S
0204
CRITICAL
20%
1UF
4V
X6S
0204
CRITICAL
1UF
20%
4V
X6S
0204
CRITICAL
1UF
20%
4V
X6S
0204
CRITICAL
X7S
20%
0.47UF
0204
4V
CRITICAL
0.47UF
4V
X7S
0204
20%
CRITICAL
0.47UF
0204
X7S
20%
4V
CRITICAL
4V
X7S
0204
0.47UF
20%
CRITICAL
0.47UF
4V
20%
X7S
0204
CRITICAL
0.47UF
20%
0204
X7S
4V
CRITICAL
0204
X7S
20%
4V
0.47UF
CRITICAL
4V
X7S
0204
0.47UF
20%
CRITICAL
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
6.3V
20%
01005
15UF
0402
4V
X5R
20%
15UF
0402
4V
20%
X5R
0610
4V
20%
X5R-CERM
CRITICAL
4.3UF
4V
X5R-CERM
4.3UF
0610
20%
CRITICAL
20%
X5R-CERM
4.3UF
0610
4V
CRITICAL
4.3UF
0610
4V
20%
X5R-CERM
CRITICAL
X6S
20%
1UF
4V
0204
CRITICAL
0204
X6S
20%
1UF
4V
CRITICAL
0.47UF
0204
4V
X7S
20%
CRITICAL
0.47UF
20%
X7S
4V
CRITICAL
0204
4V
20%
4.3UF
0610
X5R-CERM
CRITICAL
X5R-CERM
4V
20%
4.3UF
0610
CRITICAL
15UF
0402
4V
X5R
20%
20%
1UF
4V
0204
X6S
CRITICAL
20%
0204
1UF
4V
X6S
CRITICAL
0204
0.47UF
20%
4V
X7S
CRITICAL
X7S
0.47UF
0204
4V
20%
CRITICAL
20%
1UF
4V
X6S
0204
CRITICAL
0204
1UF
20%
4V
X6S
CRITICAL
4V
X7S
0204
20%
0.47UF
CRITICAL
0.47UF
4V
X7S
0204
20%
CRITICAL
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
6.3V
20%
01005
0.22UF
X5R
6.3V
20%
01005
16V
NP0-C0G-CERM
01005
8.2PF
+/-0.5PF
16V
NP0-C0G-CERM
01005
+/-0.5PF
8.2PF
SHORT-10L-0.25MM-SM
PLACE_NEAR=U0600.AA8:11MM
SHORT-10L-0.25MM-SM
PLACE_NEAR=U0600.AA22:10MM
PPVDD_CPU_RAIL_SENSE
PPVDD_GPU_RAIL_SENSE
PPVDD_GPU_SOC_SENSE
PPVDD_CPU_SOC_SENSE
=PPVDD_GPU
=PPVDD_CPU
U0600
AA22
AA24
AC26
AC28
AD23
AE22
AE24
AE26
AE28
AF23
AF25
AF27
AA26
AF29
AG22
AG24
AG26
AG28
AH23
AH25
AH27
AH29
AJ22
AA28
AJ24
AJ26
AJ28
AK23
AK25
AK27
AK29
U22
U24
U26
AB23
U28
V23
V25
V27
V29
W22
W24
W26
W28
Y23
AB25
Y25
Y27
Y29
AB27
AB29
AC22
AC24
AL31
AA8
AA10
AB17
AB19
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AD9
AA12
AD11
AD13
AD15
AD17
AD19
AE8
AE10
AE12
AE14
AE16
AA14
AE18
AE20
AF9
AF11
AF13
AF15
AF17
AF19
AG8
AG10
AA18
AG12
AG14
AG16
AG18
AG20
AH9
AH11
AH13
AH15
AH17
AA20
AH19
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AK9
AK11
AB9
AK13
AK15
AK17
AK19
AB11
AB13
AB15
AA7
U0600
A1
A2
A19
AG13
AG15
AG17
AG19
AG21
AG23
AG25
AG27
AG29
AG31
A25
AH3
AH6
AH8
AH10
AH12
AH14
AH16
AH18
AH20
AH24
A28
AH26
AH28
AH30
AH31
AH35
AH36
AJ9
AJ11
AJ13
AJ15
A34
AJ17
AJ19
AJ21
AJ23
AJ25
AJ27
AJ29
AK2
AK6
AK8
A35
AK10
AK12
AK14
AK16
AK18
AK20
AK22
AK24
AK28
AF33
A36
AK31
AK32
AK33
AK34
AK35
AK36
AL3
AK30
AL32
AL33
AA1
AL34
AM6
AM8
AL12
AM12
AM14
AM16
AM18
AJ34
AM22
C4
AM24
AM32
AM33
AM34
AN2
AN18
AN19
AN20
AN21
AN24
AA5
AN25
AN34
AP1
AP3
AA3
A3
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA25
AA27
A4
AA29
AA31
AB1
AB2
AB3
AB4
AB8
AB10
AB12
AB14
A7
AB16
AB18
AB20
AB22
AB24
AB26
AB28
AB30
AB34
AC9
A8
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AC31
AC35
AD2
A11
AD6
AD8
AD10
AD12
AD14
AD16
AD18
AD20
AD25
AD27
A12
AD29
AD30
AE3
AE9
AE11
AE13
AE15
AE17
AE19
AE21
A15
AE23
AE31
AE34
AF6
AF8
AF10
AF12
AF14
AF16
AF18
A16
AF20
AF22
AF24
AF26
AF28
AF30
AF35
AG2
AG9
AG11
U0600
AP6
AL15
AP12
AP15
AP18
AP20
AP21
AP24
AP25
AP26
AP28
AP34
AP35
AP36
AR1
AR2
AR5
AR8
AL18
AM15
AR15
AR18
AR21
AR23
AR28
AR34
AR35
AR36
AT1
AT2
AT3
AN12
AT15
AT18
AT21
AT23
AT28
AT34
AT35
AT36
B1
B2
B3
B19
B25
B28
B32
B35
B36
C1
C2
C3
C5
C6
C9
C10
C13
C14
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C30
C36
D1
D2
D3
D22
D25
D31
D32
D33
D35
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E30
F1
F2
F3
F4
F5
F6
F8
F10
F15
F29
F30
F31
F32
F33
F35
G3
G5
G27
G31
H3
H5
H6
H8
H10
H12
H14
H16
H20
H22
H24
H26
H28
AN15
H33
H35
J1
J5
J9
J11
J13
J15
J17
J19
J21
J23
J25
J27
J29
J31
K1
K5
K6
K8
K10
K12
K14
K16
K18
K20
K22
K24
K26
K28
AR12
K32
K33
K34
K35
K36
L3
L5
L9
L11
L13
L15
L17
L19
L21
L23
L25
L27
L29
L31
L32
L33
M3
C1300
1
2
C1305
1
2
C1306
1
2
C1307
1
2
C1308
1
2
C1309
1
2
C1310
1
2
C1320
1
2
C1321
1
2
C1322
1
2
C1323
1
2
C1324
1
2
C1325
1
2
C1326
1
2
C1327
1
2
C1328
1
2
C1329
1
2
C1333
1
2
C1331
1
2
C1332
1
2
C1330
1
2
C1337
1
2
C1335
1
2
C1336
1
2
C1334
1
2
C1340
1
2
C1341
1
2
C1342
1
2
C1343
1
2
C1301
1
2
C1350
1
2
C1360
1
2
C1359
1
2
C1358
1
2
C1357
1
2
C1375
1
2
C1374
1
2
C1385
1
2
C1384
1
2
C1356
1
2
C1355
1
2
C1351
1
2
C1373
1
2
C1372
1
2
C1383
1
2
C1382
1
2
C1371
1
2
C1370
1
2
C1381
1
2
C1380
1
2
C1393
1
2
C1392
1
2
C1391
1
2
C1390
1
2
C1345
1
2
C1395
1
2
XW1300
12
XW1310
12
57 67
57 67
57 61 67
57 61 67
62
62
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
DDR0
DDR1
(1 OF 3)
DDR0_CA0
DDR0_CA1
DDR0_CA2
DDR1_CA8
DDR0_CA6
DDR0_CA8
DDR1_CS1
DDR0_CA9
DDR0_CK*
DDR0_CKE1
DDR1_CKE0
DDR1_CK*
DDR0_CK
DDR0_CS0
DDR1_CKE1
DDR1_PDQS1
DDR1_NDQS0DDR0_NDQS0
DDR0_PDQS1
DDR0_NDQS1 DDR1_NDQS1
DDR1_DQ15
DDR1_DQ13
DDR1_DQ12
DDR0_DQ1
DDR0_DQ31
DDR0_ZQ
DDR1_DQ23
DDR0_DQ9
DDR0_DQ10
DDR0_DQ8
DDR0_DQ7
DDR0_DQ6
DDR1_DQ17
DDR1_DQ18
DDR0_DQ20
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR0_DQ17
DDR0_DQ18
DDR1_DQ19
DDR0_CA4
DDR0_CA5
DDR1_CA9
DDR1_DQ11
DDR1_CA7
DDR1_ZQ
DDR1_VREF_DQ
DDR1_VREF_CA
DDR1_PDQS3
DDR1_NDQS2
DDR1_PDQS0
DDR1_DQ31
DDR1_DQ30
DDR1_DQ29
DDR1_DQ28
DDR1_DQ27
DDR1_DQ26
DDR1_DQ21
DDR1_DQ20
DDR1_DQ16
DDR1_DQ14
DDR1_DQ10
DDR1_DQ9
DDR1_DQ8
DDR1_DQ7
DDR1_DQ6
DDR1_DQ4
DDR1_DQ3
DDR1_DQ2
DDR1_DQ1
DDR1_DM3
DDR1_DM2
DDR1_DM1
DDR1_DM0
DDR1_CS0
DDR1_CK
DDR1_CA6
DDR1_CA3
DDR1_CA2
DDR1_CA1
DDR1_CA0
DDR0_VREF_DQ
DDR0_VREF_CA
DDR0_NDQS3
DDR0_PDQS3
DDR0_NDQS2
DDR0_PDQS2
DDR0_PDQS0
DDR0_DQ30
DDR0_DQ29
DDR0_DQ28
DDR0_DQ26
DDR0_DQ25
DDR0_DQ23
DDR0_DQ22
DDR0_DQ21
DDR0_DQ19
DDR0_DQ12
DDR0_DQ11
DDR0_DQ5
DDR0_DQ4
DDR0_DQ3
DDR0_DQ2
DDR0_DQ0
DDR0_DM3
DDR0_DM2
DDR0_DM1
DDR0_DM0
DDR0_CS1
DDR0_CA7
DDR0_CA3
DDR1_DQ0
DDR1_DQ5
DDR1_DQ22
DDR0_DQ24
DDR1_DQ25
DDR1_DQ24
DDR1_PDQS2
DDR1_NDQS3
DDR0_DQ16
DDR0_DQ27
DDR0_CKE0
DDR1_CA4
DDR1_CA5
VSS
VSS
(3 OF 3)
(2 OF 3)
VDDQ
VDDCA
VDD2
VDD1
IN IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
CERM
6.3V
10%
1UF
402
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
10%
1UF
6.3V
CERM
402
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
20%
X5R
4V
0402
15UF
CRITICAL
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
128MX32X2
H9CCNNN8KTMLER-NTM
OMIT_TABLE
BGA
128MX32X2
H9CCNNN8KTMLER-NTM
BGA
OMIT_TABLE
128MX32X2
H9CCNNN8KTMLER-NTM
BGA
OMIT_TABLE
8
61 66
8
61 66
8
61 66
8
61 66
5%
56PF
16V
NP0-C0G
01005
6.3V
CERM
1UF
10%
402
10%
1UF
6.3V
CERM
402
4V
20%
0610
4.3UF
X5R-CERM
CRITICAL
X5R
20%
4V
0402
15UF
CRITICAL
6.3V
X5R
20%
1.0UF
0201-1
6.3V
X5R
20%
1.0UF
0201-1
15UF
20%
X5R
4V
0402
CRITICAL
20%
6.3V
01005
0.1UF
X5R-CERM
56PF
01005
5%
16V
NP0-C0G
20%
6.3V
X5R
0201-1
1.0UF
1.0UF
20%
6.3V
0201-1
X5R
6.3V
20%
1.0UF
X5R
0201-1
4V
20%
X5R
0402
15UF
CRITICAL
0610
4V
20%
X5R-CERM
4.3UF
CRITICAL
01005
X5R-CERM
0.1UF
20%
6.3V
201
4V
CERM-X5R-1
0.47UF
20%
201
20%
4V
CERM-X5R-1
0.47UF
01005
0.1UF
20%
6.3V
X5R-CERM
01005
6.3V
20%
X5R-CERM
0.1UF
4V
20%
4.3UF
X5R-CERM
CRITICAL
0610
20%
X5R
0201-1
6.3V
1.0UF
01005
6.3V
20%
X5R-CERM
0.1UF
01005
6.3V
20%
0.1UF
X5R-CERM
01005
20%
6.3V
0.1UF
X5R-CERM
01005
X5R-CERM
0.1UF
20%
6.3V
0201-1
20%
X5R
6.3V
1.0UF
20%
X5R
6.3V
1.0UF
0201-10610
X5R-CERM
4.3UF
4V
20%
CRITICAL
10%
1UF
CERM
402
6.3V
5%
NP0-C0G
56PF
01005
16V
10%
1UF
402
CERM
6.3V
56PF
NP0-C0G
5%
01005
16V
1.0UF
20%
0201-1
X5R
6.3V
20%
1.0UF
6.3V
X5R
0201-1
20%
X5R
4V
0402
15UF
CRITICAL
240
1%
MF
1/32W
01005
6.3V
01005
X5R-CERM
0.1UF
20%
20%
0.1UF
X5R-CERM
6.3V
01005
1%
1/32W
MF
01005
10K
10K
1%
01005
MF
1/32W
MF
1%
240
1/32W
01005
20%
0.1UF
X5R-CERM
01005
6.3V
0.1UF
X5R-CERM
01005
6.3V
20%
1/32W
01005
1%
MF
10K
1/32W
10K
1%
MF
01005
20%
6.3V
X5R-CERM
0.1UF
01005
20%
0.1UF
X5R-CERM
6.3V
01005
X5R-CERM
0.1UF
20%
6.3V
01005
01005
MF
1/32W
1%
4.7K
1%
4.7K
1/32W
MF
01005
01005
1/32W
4.7K
MF
1%
0.1UF
20%
X5R-CERM
6.3V
01005
4.7K
1/32W
1%
MF
01005
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
8
61 66
DDR1_CK_N
DDR1_DQ<24>
DDR1_DQ<19>
DDR1_CA<6>
DDR1_CA<4>
DDR1_CA<5>
DDR1_CA<7>
DDR1_CA<8>
DDR1_CSN<1>
DDR1_CSN<0>
DDR1_CA<1>
DDR1_CA<3>
DDR1_DQ<8>
DDR1_DM<3>
DDR0_DQ<2>
DDR0_DQ<4>
=PP1V2_S2R_DDR
PPVREF_DDR1_DQ_DRAM
PPVREF_DDR1_CA_DRAM
PPVREF_DDR0_DQ_DRAM
PPVREF_DDR0_CA_DRAM
DDR1_ZQ_DRAM
DDR1_DQS_P<3>
DDR0_DQS_N<3>
DDR0_DQ<0>
DDR0_DQ<1>
DDR0_DQ<3>
DDR0_CSN<1>
DDR0_CSN<0>
DDR0_CK_N
DDR0_CKE<0>
DDR0_DQ<27>
DDR0_DQ<16>
DDR1_DQS_N<3>
DDR1_DQS_P<2>
DDR1_DQ<25>
DDR0_DQ<24>
DDR1_DQ<22>
DDR1_DQ<5>
DDR1_DQ<0>
DDR0_DM<0>
DDR0_DM<1>
DDR0_DM<2>
DDR0_DM<3>
DDR0_DQ<19>
DDR0_DQ<21>
DDR0_DQ<22>
DDR0_DQ<23>
DDR0_DQ<25>
DDR0_DQ<26>
DDR0_DQ<28>
DDR0_DQ<29>
DDR0_DQ<30>
DDR1_CA<0>
DDR1_CA<2>
DDR1_CK_P
DDR1_DM<1>
DDR1_DM<2>
DDR1_DQ<1>
DDR1_DQ<2>
DDR1_DQ<3>
DDR1_DQ<4>
DDR1_DQ<6>
DDR1_DQ<7>
DDR1_DQ<9>
DDR1_DQ<10>
DDR1_DQ<14>
DDR1_DQ<16>
DDR1_DQ<20>
DDR1_DQ<21>
DDR1_DQ<26>
DDR1_DQ<27>
DDR1_DQ<28>
DDR1_DQ<29>
DDR1_DQ<30>
DDR1_DQ<31>
DDR1_DQS_P<0>
DDR1_DQS_N<2>
DDR1_DQ<11>
DDR1_CA<9>
DDR0_CA<5>
DDR0_CA<4>
DDR0_DQ<18>
DDR0_DQ<17>
DDR0_DQ<15>
DDR0_DQ<14>
DDR0_DQ<13>
DDR0_DQ<20>
DDR1_DQ<18>
DDR1_DQ<17>
DDR0_DQ<6>
DDR0_DQ<7>
DDR0_DQ<10>
DDR0_DQ<9>
DDR1_DQ<23>
DDR0_DQ<31>
DDR1_DQ<12>
DDR1_DQ<13>
DDR1_DQ<15>
DDR0_DQS_N<1>
DDR1_DQS_N<0>
DDR1_DQS_P<1>
DDR1_CKE<1>
DDR0_CK_P
DDR1_CKE<0>
DDR0_CA<9>
DDR0_CA<8>
DDR0_CA<2>
DDR0_CA<3>
DDR0_CA<0>
=PP1V2_S2R_DDR
=PP1V2_VDDQ_DDR=PP1V2_VDDQ_DDR
DDR0_DQS_N<2>
DDR0_DQS_P<2>
DDR0_DQS_P<3>
DDR0_DQS_P<1>
DDR0_DQS_N<0>
DDR0_DQS_P<0>
DDR1_DQS_N<1>
DDR0_ZQ_DRAM
=PP1V2_VDDQ_DDR
=PP1V8_S2R_DDR
=PP1V2_S2R_DDR
PPVREF_DDR1_DQ_DRAM PPVREF_DDR0_DQ_DRAM
PPVREF_DDR1_CA_DRAM
PPVREF_DDR0_CA_DRAM
DDR1_DM<0>
=PP1V2_S2R_DDR
DDR0_DQ<12>
DDR0_DQ<11>
DDR0_DQ<8>
DDR0_CKE<1>
DDR0_CA<7>
DDR0_CA<6>
DDR0_CA<1>
DDR0_DQ<5>
C1439
1
2
C1426
1
2
C1425
1
2
C1420
1
2
C1407
1
2
C1406
1
2
C1405
1
2
C1403
1
2
C1466
1
2
C1465
1
2
C1479
1
2
C1469
1
2
C1468
1
2
C1460
1
2
R1499
1
2
C1496
1
2
C1497
1
2
R1496
1
2
R1497
1
2
R1498
1
2
C1494
1
2
C1495
1
2
R1494
1
2
R1495
1
2
C1492
1
2
C1493
1
2
C1490
1
2
R1492
1
2
R1493
1
2
R1490
1
2
C1491
1
2
R1491
1
2
U1400
AE21
AF20
AE20
AE19
AF18
AF12
AE11
AF11
AF10
AE9
AF15
AF14
AF16
AE17
AF17
AE18
D15
D13
D20
D8
B19
C19
C11
B11
C10
B10
C9
B9
B24
C24
B23
C23
B18
B22
C22
B21
C21
C7
B7
C6
B6
C5
B5
C18
C4
B4
B17
C17
B16
C16
C12
B12
C15
C13
C20
C8
B15
B13
B20
B8
AF13
B14
AF9
J25
K26
K25
L25
M26
V26
W25
W26
Y26
AA25
R26
T26
P26
N25
N26
M25
N4
R4
H4
Y4
J2
J3
U3
U2
V3
V2
W3
W2
D2
D3
E2
E3
K2
F2
F3
G2
G3
AA3
AA2
AB3
AB2
AC3
AC2
K3
AD3
AD2
L2
L3
M2
M3
T3
T2
N3
R3
H3
Y3
N2
R2
H2
Y2
U26
P2
AA26
U1400
A1
A2
A26
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
A27
E20
E21
E22
E23
E24
E25
E27
F5
F24
F25
AA5
G5
G24
G25
H1
H5
H24
H25
J5
J24
V24
AA24
K5
K24
L1
L5
L24
M5
M24
N1
N5
N24
T25
V5
P4
P5
P24
R1
R5
R24
T5
T24
U1
AF22
U5
U24
AB5
AB24
AB25
AC1
A5
AC5
AC24
AC25
AC27
AD4
AD5
AD6
AD7
AD8
AD9
A8
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
A11
AD20
AD21
AD22
AD23
AD24
AD25
AD27
AE4
AE5
AE6
A13
AE7
AE8
H26
AE14
AE15
R25
Y5
Y24
AE22
AE23
A15
AE24
AE25
Y1
AE27
AF1
AF2
AF3
AF4
W5
W24
A17
AF26
AF27
AG1
AG2
AG3
AG4
AG5
AG23
AG24
AG25
A20
AG26
AG27
B1
B2
B26
B27
C26
C27
D4
D14
A23
D24
D25
D26
D27
E1
E5
E6
E7
E8
E9
U1400
AF24
AE2
AF6
AD26
B3
B25
C2
F26
A3
A9
AF19
AE12
C1
C14
E26
G26
J1
P3
L26
W1
A19
AE26
AF25
A25
V25
AC26
AE1
AF5
AF7
AF23
AE13
AF8
AE10
AE16
J26
U25
AB26
P25
Y25
AF21
A4
A7
AD1
AE3
C3
C25
D1
D5
D6
D7
D9
D10
A12
D11
D12
D16
D17
D18
D19
D21
D22
D23
E4
A16
F4
G1
G4
J4
K4
L4
M1
M4
T1
T4
A21
U4
V4
W4
A24
AA1
AA4
AB4
AC4
C1459
1
2
C1446
1
2
C1445
1
2
C1442
1
2
C1440
1
2
C1428
1
2
C1429
1
2
C1400
1
2
C1416
1
2
C1419
1
2
C1408
1
2
C1449
1
2
C1448
1
2
C1401
1
2
C1402
1
2
C1415
1
2
C1411
1
2
C1410
1
2
C1456
1
2
C1455
1
2
C1443
1
2
C1476
1
2
C1475
1
2
C1436
1
2
C1435
1
2
12 62
12 66
12 66
12 66
12 66
66
12 62
12 62 12 62
66
12 62
62
12 62
12 66 12 66
12 66
12 66
12 62
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
IN
BI
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
0011 NAND W/TEST
0010 NAND <-- CURRENT SETTING
PROTO 2 + T2 + B0
0101
BOARD REVISION
MLB_C DEV
PROTO 1 + T1
SHORTING RESET TO TRST HERE SO THEY CAN BE SEPARATED ON DEV BOARD
NOTE: WHEN USING A0 SOC
STUFF R1535
NOSTUFF R1536
ALIASED NETS TO ALLOW BREAKING ON DEV BOARD
1. SET GPIO AS INPUT
0010
CHANGE R0620 TO 4.7K
0000 SPI
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
MLB_A DEV
BOARD_ID[0]
MLB_B AP
MLB_C AP
S/W READ FLOW
BOARD_ID[3]
BOARD_ID[2]
BOARD_ID[1]
0100
0101
0011
0001
3. READ
S/W READ FLOW
3. READ
JTAG
BOARD_ID[3-0]
MLB_A AP0000
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
3. READ
BOOT CONFIG ID
0001 SPI W/TEST
BOOT_CONFIG[3:0] MODE
BOOT_CONFIG[1]
BOOT_CONFIG[0]
BOOT_CONFIG[2]
2. ENABLE PU AND DISABLE PD
PROTO 1 + T2
PROTO 0 + T2
PROTO 0
BRD_REV[3-0]
0000
0001
0010
0011
0100
PROTO 1 + T1 + B0
MLB_B DEV
BOARD ID
BOOT_CONFIG[3]
S/W READ FLOW
0110
EVT + T2 + B0
DVT + T2 + B1
CURRENT SETTING --->
0111
10K
MF
01005
5%
1/32W
MLB_B
4
60
10K
MF
01005
5%
1/32W
NOSTUFFNOSTUFF
10K
MF
01005
5%
1/32W
NOSTUFF
10K
MF
01005
5%
1/32W
10K
MF
01005
5%
1/32W
DEV
10K
MF
01005
5%
1/32W
MLB_C
01005
1%
240
1/32W
MF
5
5
5
5
5
5
5
5
5
5
4
60
4
4
10K
MF
01005
5%
1/32W
NOSTUFF
5
5
10K
MF
01005
5%
1/32W
57 67
0.00
MF
01005
0%
1/32W
4
67
4
25 47 57 60 61 67
4
60 64
0.00
MF
01005
0%
1/32W
NOSTUFF
240
MF
01005
1%
1/32W
NOSTUFF
10K
MF
01005
5%
1/32W
5
5
22 61 64
5
22 61 64
10K
MF
01005
5%
1/32W
1/32W
1%
01005
MF
240
NOSTUFF
10K
MF
01005
5%
1/32W
NOSTUFF
10K
MF
01005
5%
1/32W
10K
MF
01005
5%
1/32W
NOSTUFF
=PP1V8_SOC
=GPIO_ADUX1049_PROX2SOC_IRQ_L
=PP1V8_SOC
=PP1V8_SOC
=I2C3_PROX_ADUX1049_SCL_1V8
=I2C3_PROX_AD7149_SCL_1V8
=GPIO_AD7149_PROX2SOC_IRQ_L
=I2C3_PROX_AD7149_SDA_1V8
=I2C3_PROX_ADUX1049_SDA_1V8
MAKE_BASE=TRUE
I2C3_SDA_1V8
MAKE_BASE=TRUE
I2C3_SCL_1V8
GPIO_PROX2SOC_IRQ_L
MAKE_BASE=TRUE
JTAG_SOC_TRST_L
RESET_SOC_L
WDOG_SOC
WDOG_SOC2PMU_RESET_IN
GPIO_BRD_REV3
GPIO_BOARD_ID_3
SOC_HOLD_RESET
SOC_FAST_SCAN_CLK
SOC_TESTMODE
GPIO_BRD_REV0
GPIO_BRD_REV1
GPIO_BOARD_ID_0
GPIO_BOARD_ID_1
GPIO_BOARD_ID_2
GPIO_BOOT_CONFIG_1
GPIO_BOOT_CONFIG_2
GPIO_BOOT_CONFIG_3
JTAG_SOC_SEL
GPIO_BOOT_CONFIG_0
GPIO_BRD_REV2
MAKE_BASE=TRUE
R1506
1
2
R1502
1
2
R1510
12
R1520
1
2
R1521
1
2
R1522
1
2
R1501
1
2
R1500
1
2
R1503
1
2
R1507
1
2
R1505
1
2
R1560
12
R1504
1
2
R1523
1
2
R1530
12
R1535
12
R1536
1
2
R0620
1
2
4 5 7
13 58 62
4 5 7
13 58 62
4 5 7
13 58 62
45
45
45
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
IN
IN
IN
IN
IN
IN
IN
TMSC
TCKC
IO7-1
IO6-1
IO4-1
IO5-1
IO0-1
IO3-1
IO1-1
IO2-1
IO7-0
IO5-0
IO6-0
IO4-0
IO3-0
IO2-0
IO1-0
IO0-0
VSS
VSSQ
ZQ
VREF
RE1
RE1*
DQS1
DQS1*
WE1*
ALE1
CLE1
CE1*
DQS0
DQS0*
RE0*
RE0
WE0*
ALE0
CE0*
CLE0
RY/BY0*
RY/BY1*
VDDI
VCC
VCCQ
IN
IN
IN
IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
NC
NC
NC
NC
124578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
5%
NP0-C0G
27PF
16V
01005
NP0-C0G
5%
27PF
16V
01005
6.3V
CERM-X5R
0402-2
10UF
20%
1.0UF
X5R
0201-1
6.3V
20%
6.3V
CERM-X5R
0402-2
10UF
20%
1.0UF
X5R
0201-1
6.3V
20%
6.3V
CERM-X5R
0402-2
10UF
20%
1.0UF
X5R
0201-1
6.3V
20%
1.0UF
X5R
0201-1
6.3V
20%
01005
NP0-C0G
27PF
5%
16V
NOSTUFF
01005
MF
1/32W
5%
100K
6.3V
0402-2
20%
CERM-X5R
10UF
6.3V
CERM-X5R
0402-2
10UF
20%
6.3V
CERM-X5R
0402-2
10UF
20%
01005
MF
1/32W
5%
100K
NOSTUFF
6
60 61 66
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
OMIT_TABLE
NAND-19NM-128GX8-MLC-PPN1.5-64G
THGBX2T0BBJLA03
LGA
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
MF
1/32W
01005
1%
243
6.3V
CERM-X5R
0402-2
10UF
20%
X5R
1.0UF
0201-1
6.3V
20%
6.3V
CERM-X5R
0402-2
10UF
20%
6.3V
CERM-X5R
0402-2
10UF
20%
X5R
1.0UF
0201-1
6.3V
20%
0201-1
1.0UF
X5R
6.3V
20%
6.3V
1.0UF
X5R
0201-1
20%
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
6
61 66
6
66
6
66
6
66
6
66
6
66
6
66
6
66
10%
0.01UF
01005
X5R
6.3V
10%
0.01UF
6.3V
X5R
01005
51.1K
MF
01005
1%
1/32W
51.1K
MF
01005
1%
1/32W
16V
5%
27PF
NP0-C0G
01005
27PF
5%
NP0-C0G
16V
01005
6.3V
CERM-X5R
0402-2
10UF
20%
1.0UF
X5R
0201-1
6.3V
20%
6.3V
CERM-X5R
0402-2
10UF
20%
6.3V
CERM-X5R
0402-2
10UF
20%
1.0UF
X5R
0201-1
6.3V
20%
1.0UF
X5R
0201-1
6.3V
20%
TP_FMI_TMSC_NAND
TP_FMI_TCKC_NAND
FMI1_AD<7>
FMI1_AD<6>
FMI1_AD<4>
FMI1_AD<5>
FMI1_AD<0>
FMI1_AD<3>
FMI1_AD<1>
FMI1_AD<2>
FMI0_AD<7>
FMI0_AD<5>
FMI0_AD<6>
FMI0_AD<4>
FMI0_AD<3>
FMI0_AD<2>
FMI0_AD<1>
FMI0_AD<0>
FMI_ZQ_NAND
PPVREF_FMI_NAND
FMI1_RE_L
FMI1_DQS
FMI1_WE_L
FMI1_ALE
FMI1_CLE
FMI1_CE0_L
FMI0_DQS
FMI0_RE_L
FMI0_WE_L
FMI0_ALE
FMI0_CE0_L
FMI0_CLE
NAND_SLOT0_RDYBSY_L
NAND_SLOT1_RDYBSY_L
PPVDDI_NAND
=PP3V3_NAND
=PP1V8_NAND
=PP1V8_NAND
=PP1V8_NAND
R1655
1
2
U1600
C1
D2
A5
C5
A3
C3
H4
F4
M4
K4
G3
G1
H2
J1
J3
L1
K2
N3
L5
N5
K6
L7
J5
J7
H6
G7
B4
C7
D4
D6
E5
E7
OA0
OB0
B6F2M6N1N7
OC8
OD8
OE0
OF8G0OA8
OB8
G5
B2F6L3A7M2
OC0
OD0
OE8
OF0
G8
E3
E1
A1
R1654
1
2
C1602
1
2
C1650
1
2
C1601
1
2
C1600
1
2
C1651
1
2
C1606
1
2
C1605
1
2
C1690
1
2
C1691
1
2
R1690
1
2
R1691
1
2
C1607
1
2
C1608
1
2
C1612
1
2
C1622
1
2
C1611
1
2
C1610
1
2
C1621
1
2
C1620
1
2
C1631
1
2
C1630
1
2
C1615
1
2
C1625
1
2
C1614
1
2
C1624
1
2
C1613
1
2
C1623
1
2
C1604
1
2
C1652
1
2
R1656
1
2
C1640
1
2
C1641
1
2
C1642
1
2
61
61
61 66
67
62 14 57 61 62
14 57 61 62
14 57 61 62
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
IN-
IN+
OUT+
OUT-
GAINSHDN*
PVDD
NC
PGND
NC
IN-
IN+
OUT+
OUT-
GAINSHDN*
PVDD
NC
PGND
NC
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
124578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
GND
75HZ +/- XXX%
GAIN:6DB
TURN ON DELAY: ?MS
TURN ON TIME: 3.5MS
APN:353S3445
100K
NC
NC
NC
SHORT
NC
GAIN
100K
NC
12DB
NC
0DB
6DB
VDD
9DB
3DB
SHORT
GAIN:6DB
SPEAKER AMPLIFIER
EXTRA BULK
EXTRA BULK
AUD_SPKRAMP_MUTE_L
MAX983X4_L1_GAIN
=PPBATT_AUDIO
MAX983X4_L2_GAIN
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
SPKRAMP_L1_OUT_P
LEFT_CH_OUT_N
LEFT_CH_OUT_P
LEFT_CH_OUT_P
AUD_SPKRAMP_MUTE_L
LEFT_CH_OUT_N
MAX98304_L2_IN_P
MAX98304_L2_IN_N
MAX98304_L1_IN_N
MAX98304_L1_IN_P
SPKRAMP_L2_OUT_P
MIN_NECK_WIDTH=0.20MM
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
MIN_LINE_WIDTH=0.50MM
SPKRAMP_L2_OUT_N
MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM
SPKRAMP_L1_OUT_N
=PPBATT_AUDIO
01005
5%
16V
15PF
NP0-C0G-CERM
NOSTUFF
01005
5%
16V
NP0-C0G-CERM
15PF
NOSTUFF
603
6.3V
20%
X5R-CERM-1
22UF
603
22UF
X5R-CERM-1
20%
6.3V
01005
NP0-C0G-CERM
8.2PF
+/-0.5PF
16V
01005
NP0-C0G-CERM
8.2PF
+/-0.5PF
16V
NOSTUFF
NP0-C0G-CERM
15PF
16V
5%
01005
65 60 49
65 60 49
65 60 49
65 60 49
10V
X5R-CERM
10UF
20%
0402-4
65 60 18 15
65 60 18 15
65 60 18 15
18 17
7
65 60 18 15
NOSTUFF
15PF
01005
5%
16V
NP0-C0G-CERM
CRITICAL
0.015UF
0201
6.3V
X5R
10%
CRITICAL
0.015UF
0201
6.3V
X5R
10%
0201
CRITICAL
0.015UF
6.3V
X5R
10%
CRITICAL
0201
0.015UF
6.3V
X5R
10%
CRITICAL
MAX98304D
WLP
6.3V
CERM-X5R
0201
0.1UF
10%
CRITICAL
MAX98304D
WLP
6.3V
CERM-X5R
0201
0.1UF
10%
0.00
1/32W
0%
01005
MF
10UF
20%
10V
X5R-CERM
0402-4
01005
0.00
MF
0%
1/32W
10UF
20%
10V
X5R-CERM
0402-4
C2000
1
2
C2001
1
2
C2002
1
2
C2003
1
2
C2012
1
2
R2020
1
2
C2052
1
2
R2040
1
2
C2015
1
2
U2020
B3
C2
C3
A1
A2
B1
A3
C1
C2055
1
2
U2040
B3
C2
C3
A1
A2
B1
A3
C1
C2026
12
C2025
12
C2046
12
C2045
12
C2010
1
2
C2019
1
2
C2059
1
2
C2051
1
2
C2050
1
2
B2
B2
62 18 17
18 17
7
65
61
65 61
65
61
65 61
62 18 17
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
INT2
DEN
INT1
GND
CS
SDO/SA0
SDA/SDI/SDO
SCL/SPC
VDD_IO
DRDY/
RES2
RES1
RES0
VDD
RES/VDD
CAP
GND
OUT
OUT
OUT
IN
IN
IN
INT2
INT1
RES
RES
RES
CS
RES
RES
SDO/SA0
SCL/SPC
SDA/SDI/SDO
VDD
VDD_IO
GND
VSS
VSS
RESET*
P0_10
P0_9
P0_8
P0_7
P0_4
P0_5
P0_3
P0_2
P0_1
P0_0
DBGEN
P0_20
P0_21
P0_22
P0_18
P0_19
P0_15
P0_17
P0_16
P0_14
P0_12
P0_11
VDDC
VDDIO
VDDC
P0_13
P0_6
OUT
IN
IN
BI
IN
IN
OUT
OUT
OUT
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
IN
IN
OUT
OUT
IN
IN
IN
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
OSCAR CORE = 1.2V HIBERNATE (NEED TO RUN IN S2R)
CHARGE PUMP
OSCAR
NOTE: I2C1 IS ASSUMED TO USE PUSH-PULL INSTEAD OF OPEN-DRAIN
APN 337S4416 (A1)
GYRO
OSCAR VDDIO = 1.8V HIBERNATE (NEED TO WAKE HOST)
ACCELEROMETER
6.3V
20%
X5R
0.22UF
01005
0.01UF
25V
OMIT_TABLE
0201
10%
X5R-CERM
OMIT_TABLE
AP3GDL20HAB18TR
LGA
29 46
29 46
19 24 64
19 24 64
MF
5%
15.0
01005
1/32W
01005
15.0
5%
1/32W
MF
01005
0%
0.00
MF
1/32W
MF
1/32W
01005
0.00
0%
MF
0.00
01005
1/32W
0%
NOSTUFF
01005
0.00
0%
1/32W
MF
19 24 64
0.00
0%
1/32W
MF
01005
MF
1/32W
0.00
0%
01005
5
01005
20%
6.3V
X5R
0.22UF
20%
6.3V
X5R
01005
0.22UF
LGA
AP2DHAA24
OMIT_TABLE
1.0UF
X5R
6.3V
20%
0201-1
WLCSP
LPC18A1UK-CPA1
CRITICAL
20%
6.3V
X5R
01005
0.22UF
0201-1
6.3V
X5R
20%
1.0UF
6.3V
1.0UF
20%
0201-1
X5R
0201-1
6.3V
X5R
1.0UF
20%
01005
120-OHM-25%-250MA-0.5DCR
120-OHM-25%-250MA-0.5DCR
01005
5%
100K
MF
1/32W
01005
5
64
5
64
5
64
5
64
57 60 64
5
60 67
5
57
5
24 64
24
19
19
19
19
19 64
19 64
19
19
19 64
19 24 64
19 24 64
19
19
19 64
19 24 64
19 24 64
GPIO_OSCAR_RESET_L
ACCEL2OSCAR_INT1
SPI_OSCAR2COMPASS_CS_L
ACCEL2OSCAR_INT2
OSCAR_TIME_SYNC_HOST_INT
GYRO_DEN
GYRO2OSCAR_INT1
SPI_OSCAR2GYRO_CS_L
SPI_OSCAR_MISO_GYRO
SPI_OSCAR_MOSI
SPI_OSCAR_SCLK
=PP1V8_S2R_GYRO
GYRO2OSCAR_INT2
PP3V0_GYRO
GYRO_RES_VDD
GYRO_PUMP
OSCAR2RADIO_CONTEXT_A
SPI_OSCAR_SCLK
SPI_OSCAR_MOSI
SPI_OSCAR_MISO
GPIO_SOC2OSCAR_DBGEN
UART4_OSCAR2SOC_RXD
UART4_SOC2OSCAR_TXD
I2C1_SOC2OSCAR_SWDCLK_1V8
I2C1_SOC2OSCAR_SWDIO_1V8
PMU_GPIO_CLK_32K_OSCAR
PMU_GPIO_OSCAR2PMU_HOST_WAKE
COMPASS2OSCAR_INT
GYRO2OSCAR_INT1
GYRO2OSCAR_INT2
SPI_OSCAR2ACCEL_CS_L
ACCEL2OSCAR_INT2
ACCEL2OSCAR_INT1
SPI_OSCAR2ACCEL_CS_L
SPI_OSCAR_MOSI
SPI_OSCAR_SCLK
OSCAR2RADIO_CONTEXT_B
SPI_OSCAR2GYRO_CS_L
NC_OSCAR_DEBUG_SCL
NO_TEST=TRUE
TP_OSCAR_P0_22
PP3V0_ACCEL
=PP3V0_S2R_ACCEL
SPI_OSCAR_MISO_ACCEL
SPI_OSCAR_MISO
SPI_OSCAR_MISO
SPI_OSCAR_MOSI_R
SPI_OSCAR_SCLK_R
=PP1V8_S2R_OSCAR=PP1V2_S2R_OSCAR
=PP3V0_S2R_GYRO
=PP1V8_S2R_OSCAR
GPIO_SOC2OSCAR_DBGEN_R
NC_OSCAR_DEBUG_SDA
NO_TEST=TRUE
=PP1V8_S2R_ACCEL
C2421
1
2
C2425
1
2
C2420
1
2
C2422
1
2
C2455
1
2
U2450
4
9
6
5
10
11
12
13
14
1
2
3
8
7
U2400
D2
E3
E5
A2
A1
B2
A4
B3
B4
A5
B5
C3
C4
E6
B6
D1
A6
C5
D5
E2
D3
D4
E1
A3
E4
C1C6C2
B1
D6
C2400
1
2
C2401
1
2
C2450
1
2
FL2420
12
FL2450
12
R2400
1
2
U2420
14
5
8
6
13
12
79
10
11
15
2
3
4
16
1
R2405
12
R2406
12
R2457
12
R2427
12
R2425
1
2
R2426
1
2
R2428
1
2
R2407
12
C2457
1
2
64
62
60 67
60 67
62
64
19 24 64
19 24 64
64
64
19 62 62
62
19 62
60
62
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
OUT
VDD
GND
OUT
4578
B
D
87 6 5 4 3
C
B
12
D
A
C
6 3
(B-PANEL HALL EFFECT SENSOR ON HB)
C-PANEL HALL EFFECT SENSOR
BIPOLAR ONE OUTPUT APN 353S3687
HALL EFFECT
57 60
CRITICAL
UCSP
BU52054GWZ
0.22UF
20%
X5R
6.3V
01005
PLACE_NEAR=U2560.B1:10MM
PMU_GPIO_MB_HALL1_IRQ
PP3V0_S2R_HALL_FILT
U2560
A1
A2
B2
B1
C2560
1
2
50 60 67
Edited by Foxit Reader ActiveX For Evaluation Only.
Copyright(C) 2006-2009 Foxit Corporation
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