ANALOG DEVICES CN-0278 Technical data

Circuit Note
CN-0278
AD5700,
Low Power HART Modem
AD5422
16-Bit Current and Voltage Output DAC
Rev. 0
Lab™ circuits from Analog Devices have been designed and built by Analog Devices
engineers. Standard engineering practices have been employed in the design and construction of
room temperature. However, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices
whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)
Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved.
I
OUT
LATCH
AD5422
AD5700
SCLK SDIN SDO
GND
CLEAR
FAULT
REFOUT
REFIN
4mA TO 20mA
CURRENT LOOP
0.1µF
0.1µF
10µF
DIGITAL
INTERFACE
UART
INTERFACE
10.8V TO 26.4V
2.7V TO
5.5V
HART_OUT
DGND
TXD RXD
RTS CD
V
CC
ADC_IP
REF
150pF
0.1µF
1µF
18
10k
1.2MΩ
1.2MΩ
300pF
150kΩ
C1
4.7nF
*C2
*NC
R
SET
DV
CC
AV
DD
CAP2 CAP1
R
L
15kΩ
R
H
27kΩ
C
H
8.2nF
C
L
4.7nF
AGND
0.1µF
10µF
V
OUT
+V
SENSE
–V
SENSE
*OP184
0.1µF
10µF
0V TO –26.4V
AV
SS
500
*OP184 WAS USED F OR THESE MEASUREM E NTS BUT AN ALTERNATIVES SUCH AS THE O P 1177 COULD ALSO BE US E D FOR THIS PURPOSE.
10k
D1
D2
D3
D4
AV
SS
10803-001
Circuits from the Lab™ reference circuits are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0278.
Complete 4 mA to 20 mA HART Solution with Additional Voltage Output Capability

EVALUATION AND DESIGN SUPPORT

Circuit Evaluation Boards
AD5422 Circuit Evaluation Board (EVAL-AD5422EBZ,
LFCSP version)
AD5700-1/AD5700 Evaluation Board (EVAL-AD5700-1EBZ)
Design and Integration Files
Schematics, Layout Files, Bill of Materials

CIRCUIT FUNCTION AND BENEFITS

The circuit shown in Figure 1 uses the AD5700, the industry’s lowest power and smallest footprint HART modem, and the AD5422, a 16-bit current output and voltage output DAC, to form a complete HART-compatible 4 mA to 20 mA solution. The use of the OP184 in the circuit allows the I
OUT
number of screw connections required in programmable logic control (PLC) module applications. For additional space savings, the AD5700-1 offers a 0.5% precision internal oscillator.
Devices Connected/Referenced
AD5700-1
and V
pins to be shorted together, thus reducing the
OUT
®
1
-compliant IC
Figure 1. AD5422 HART-Enabled Circuit Simplified Schematic
1
HART is a registered trademark of the HART Communication Foundation
Circuits from the
each circuit, and their function and performance have been tested and verified in a lab environment at
be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700
www.analog.com
CN-0278 Circuit Note
STOP
START
8-BIT DATA + PARITY
TXD
HART_OUT
"1" = MARK
1.2kHz
"0" = SPACE
2.2kHz
10803-002
Application Note AN-1065 describes a manner in which the AD5420 I
DAC can be configured for HART communication
OUT
compliance. AN-1065 outlines how the AD5700 HART modem output can be attenuated and ac coupled into the AD5420 via the CAP2 pin. The same is true of the AD5422. However, if the application involves a particularly harsh environment, an alternative circuit configuration can be used which offers better power supply rejection characteristics. This alternative circuit requires the use of the external R the HART signal into the R
resistor and involves coupling
SET
pin of the AD5420 or AD5422.
SET
The CN-0270 describes this solution for the AD5420, typical of line-powered transmitter applications. The current circuit note is relevant to the AD5422, which, unlike the AD5420, offers both a voltage and a current output pin, and so is particularly useful in PLC/distributed control system (DCS) applications. The AD5422 is available in both 40-lead LFCSP and 24-lead TSSOP packages and the relevance of this, to the circuit characteristics, is examined in the Circuit Description section.
This circuit adheres to the HART physical layer specifications as defined by the HART Communication Foundation, for example, the output noise during silence and the analog rate of change specifications.
For many years, 4 mA to 20 mA communication has been used in process control instrumentation. This communication method is reliable and robust, and offers high immunity to environmental interference over long communication distances. A limitation, however, is that only 1-way communication of one process variable at a time is possible.
The development of the highway addressable remote transducer (HART) standard provided highly capable 2-way digital communication, simultaneously with the 4 mA to 20 mA analog signaling used by traditional instrumentation equipment. This allows for features such as remote calibration, fault interrogation, and transmission of additional process variables. Put simply, HART is a digital two-way communication in which a 1 mA peak-to-peak, frequency-shift-keyed (FSK) signal is modulated on top of the 4 mA to 20 mA analog current signal.

CIRCUIT DESCRIPTION

Figure 1 shows the manner in which the AD5422 can be combined with the AD5700 HART modem and a UART interface to construct a HART-capable 4 mA to 20 mA current output, typical of PLC and DCS systems. The buffer connected to the +V pin is not necessary if the application does not require the I and V
AD5700 is attenuated and ac-coupled into the R AD5422. If the external R
alternative method of connecting the AD5422 and the AD5700 via previously described. This method is only relevant to the 40-lead LFCSP package option of the AD5422 because the lower pin­count 24-lead TSSOP package does not contain a CAP2 pin.
While the method described in the current circuit note requires the use of the external R power supply rejection performance than the alternative application note solution. The use of either solution results in the AD5700 HART modem output modulating the 4 mA to 20 mA analog current (as shown in Figure 2) without affecting the dc level of the current. The diode protection circuitry (D1 to D4) is discussed in more detail in the Transient Voltage Protection section.
pins to be shorted. The HART_OUT signal from the
OUT
pin of the
SET
resistor is not being used, an
SET
the CAP2 pin can be found in Application Note AN-1065, as
resistor, in return, it provides better
SET
Figure 2. AD5700/AD5700-1 Sample Modulator Waveform
SENSE
OUT
Rev. 0 | Page 2 of 10
Circuit Note CN-0278
CAP1
AD5422
OP184
C1
CAP2
BOOST
AV
DD
I
OUT
FAULT
R
SET
R
L
R
SET
AV
SS
C
COMP
R
SET
+V
SENSE
–V
SENSE
–V
OUT
C
H
C
L
R3
R2
12-/16-BIT
DAC
10564-003
R
H
V
HART
RANGE
SCALING
GND
–50 –55 –60 –65 –70 –75 –80 –85 –90
–95 –100 –105 –110
1
10 100 1k 10k 100k
I (I
OUT
) /HART (V) (dB)
FREQUENCY ( Hz )
10803-004
↓ ↓ ↓ ↓
↓ ↑ ↓ ↓
CH1 200mV CH2 2.00V M 500µs CH2 1.76V
<10Hz
2
1
CH1 MAX
280mV
CH1 MIN
–288mV
CH1
p-p
568mV
CH2 MAX
NONE
CH2 MIN
NONE
MEASURE
10803-005

Determining the Values of the External Components

Capacitors, C1 and C2, can be used in conjunction with the digital slew rate control functionality of the part to control the slew rate of the I
signal of the AD5422. In determining the absolute
OUT
values of the capacitors, ensure that the FSK output from the modem is passed undistorted. Thus, the bandwidth presented to the modem output signal must pass the 1200 Hz and 2200 Hz frequencies. Figure 3 shows a circuit that achieves this requirement. In this case, C2 (shown in Figure 1) is left open-circuit.
Table 1. Effect on Frequency Response of Individual Component Value Increase
Component C1 CH CL RH
fL (Hz) fH (kHz) G (dB)
No change No change No change
The output of the modem is an FSK signal consisting of 1200 Hz and 2200 Hz shift frequencies. This signal must translate to a 1 mA p-p current signal. To achieve this, the signal amplitude at the R
pin must be attenuated. This is due to the internal current
SET
gain configuration in the AD5422 design. Assuming that the modem output amplitude is 500 mV p-p, its output must be attenuated by 500/150 = 3.33. This attenuation is achieved by means of R
and CL.
H
The measurements in this circuit note were completed using the following component values:
C1 = 4.7 nF
R
= 27 kΩ
H
C
= 4.7 nF
L
C
= 8.2 nF
H
Figure 5 shows the individual 1200 Hz and 2200 Hz shift frequencies measured across a 500 Ω load resistor. Channel 1 shows the modulated HART signal coupled into the AD5422 output (set to output 4 mA), while Channel 2 shows the AD5700 TXD signal.
Figure 3. AD5422 and AD5700 HART Modem Connection
The low-pass and high-pass filter circuitry is formed through the interaction of R
, CL, CH, and C1, along with some internal
H
circuitry in the AD5422. In calculating the values of these components, the low-pass and high-pass frequency cutoff point targets were >10 kHz and <500 Hz, respectively. Figure 4 shows a plot of the simulated frequency response, while Tab l e 1 shows the effect on the frequency response of increasing each component while the remaining component values are kept constant.
Figure 4. Simulated Frequency Response
Figure 5. FSK Waveforms Measured Across a 500 Ω Load

HART Compliance

For the circuit in Figure 1 to be HART-compliant, it must meet the HART physical layer specifications. There are numerous physical layer specifications included in the HART specification documents. The two that are most important in this case are the output noise during silence and the analog rate of change.
Rev. 0 | Page 3 of 10
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