ANALOG DEVICES CN-0251 Service Manual

Circuit Note

CN-0251

Rev. 0

Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices

each circuit, and their function and performance have been tested and verified in a lab environment at
room temperature. However, you are solely responsible for testing the circuit and determining its

nd application. Accordingly, in no event shall Analog Devices
be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause
whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)

Fax: [phone] ©2012 Analog Devices, Inc. All rights reserved.

D3V3

DGND

DGND AGND

–IN

IA

R

G

RG*

*OMIT R

G

FOR G = 1

R

G

+IN

+V

S

V

OUT

REF

–V

S

AD8226

ADP1720

–OUT

VN

VP

+OUT

NC

+IN 0.4x

–IN 0.8x

+IN 0.8x

–IN 0.4x

–V

S

+V

S

1kΩ

1.25kΩ

100Ω

100kΩ

100Ω

1.25kΩ

1kΩ

AD8475

1.25kΩ

1.25kΩ

MCLK1NCMCLK2

P0/REFIN2(–)

P1/REFIN2(+)

DVDDDGND

REFIN1(+)

REFIN1(–)

AIN2
AIN1
AIN3
AIN4
AINCOM

BPDSW

AGND

AD7192

TEMP

SENSOR

AV

DD

AGND

DOUT/RDY
DIN
SCLK
CS
SYNC

P3
P2

AV

DD

AGND

Σ-Δ

ADC

MUX

DOUT
DIN
SCLK
CS
SYNC

P3

P2

ADG1409

S1A

S4B

DA

1nF

IN OUT

GND

1nF

10nF

4.02kΩ

4.02kΩ

DB

S4A

S1B

VS1A

VS4B

VS4A

VS1B

1-OF-4

DECODER

A0

GND

A1

V

DD

+15VA

EN

V

SS

–15VA

–15VA

+5VA

330µH @ 100MHz

A4V096

+5VA

+15VA

0.1µF

10nF

10nF

1µF

0.1µF

0.1µF

10µF

0.1µF

+15VA

+5VA

VOCM

VOCM

ADR444

AD8475

VINV

OUT

GND

+15VA

A4V096

PGA

D3V3

D3V3

DGND

1µF

0.1µF

0.1µF

SERIAL

INTERFACE

AND

CONTROL

LOGIC

CLOCK

CIRCUITRY

10351-001

2

1

1
2

7
6

4

5

8

3

4

10

12

18

19 15 16

23
24

3
4

5
6

17

9 1 2 7 8

25

21

20

11
13
14
10

9

8

3

7

5

6

Devices Connected/Referenced

, 4-/8-Channel ±15 V/+12 V/±5 V

4 Ω R

ADG1409

AD8226

Circuits from the Lab™ reference circuits are engineered and
tested for quick and easy system integration to help solve today’s

AD8475

analog, mixed-signal, and RF design challenges. For more
information and/or support, visit www.analog.com/CN0251.

AD7192

ADP1720-5

ADR444

A Flexible 4-Channel Analog Front End for Wide Dynamic Range Signal Conditioning

EVALUATION AND DESIGN SUPPORT

Circuit Evaluation Boards

CN-0251 Circuit Evaluation Board (EVAL-CN0251-SDPZ)
System Demonstration Platform (EVAL-SDP-CB1Z)

Design and Integration Files

Schematics, Layout Files, Bill of Materials

CIRCUIT FUNCTION AND BENEFITS

The circuit shown in Figure 1 is a flexible signal conditioning
circuit for processing signals of wide dynamic range, varying
from several mV p-p to 20 V p-p. The circuit provides the
necessary conditioning and level shifting and achieves the
dynamic range using the internal programmable gain amplifier
(PGA) of the high resolution analog-to-digital converter (ADC).

A ±10 V full-scale signal is very typical in process control and
industrial automation applications; howe v er, in some situations,
the signal can be as small as several mV. Attenuation and level
shifting is necessary to process a ±10 V signal with modern low
voltage ADCs. However, amplification is needed for small signals
to make use of the dynamic range of the ADC. Therefore, a
circuit with a programmable gain function is desirable when the
input signal varies over a wide range.

In addition, small signals may have large common-mode voltage
swings; therefore, high common-mode rejection (CMR) is required.
In some applications, where the source impedance is large, high
impedance is also necessary for the analog front-end input circuit.

ON

iCMOS Multiplexer

Low Cost, Wide Supply Range, Rail-to-Rail
Output, Instrumentation Amplifier

Precision, Selectable Gain, Fully
Differential Funnel Amplifier

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta
ADC with PGA

50 mA, High Voltage, Micropower Linear
5 V Regulator

Ultralow Noise, LDO XFET Voltage
Reference with Current Sink and Source

Figure 1. Flexible Analog Front-End Circuit for Wide Industrial Range Signal Conditioning

engineers. Standard engineering practices have been employed in the design and construction of

suitability and applicability for your use a

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]

www.analog.com

CN-0251 Circuit Note

The circuit shown in Figure 1 solves all of these challenges
and provides programmable gain, high CMR, and high input

impedance. The input signal passes through the 4-channel

ADG1409 multiplexer into the AD8226 low cost, wide input

range instrumentation amplifier. The AD8226 offers high CMR
up to 80 dB and very high input impedance (800 MΩ differential
mode and 400 MΩ common mode). A wide input range and
rail-to-rail output allow the AD8226 to make full use of the
supply rails.

The AD8475 is a fully differential, attenuating amplifier with
integrated precision gain resistors. It provides precision attenuation
(G = 0.4 or G = 0.8), common-mode level shifting, and single­ended-to-differential conversion. The AD8475 is an easy to use,
fully integrated precision gain block, designed to process signal
levels up to ±10 V on a single supply. Therefore, the AD8475 is
suitable for attenuating signals from the AD8226 up to 20 V p-p,
while maintaining high CMR and offering a differential output to
drive the differential input ADC.

The AD7192 is a 24-bit sigma-delta (Σ-Δ) ADC with an internal
PGA. The on-chip, low noise gain stage (G = 1, 8, 16, 32, 64, or

128) means that signals of large and small amplitude can be
interfaced directly to the ADC.

With the combination of the previous parts, the circuit offers
very good performance and easy configuration for signals
with varying amplitudes. The circuit can be used in industrial
automation, process control, instrumentation, and medical
equipment applications.

CIRCUIT DESCRIPTION

The circuit comprises of an ADG1409 multiplexer, an AD8226
instrumentation amplifier, an AD8475 difference amplifier, and an

AD7192 Σ-Δ ADC with an ADR444 reference, and the ADP1720

regulator. Only a few external components are used for protection,
filtering, and decoupling, making this circuit highly integrated, and

it requires a small circuit board (printed circuit board [PCB]) area.

Regulator and Reference Selection

The ADP1720-5 was chosen as the 5 V regulator for this circuit.
It is a high voltage micropower, low dropout linear regulator
suitable for industrial applications.

The 4.096 V ADR444 reference was chosen as the reference for

this circuit. It is an ultralow noise, high accuracy, low dropout

Table 1. Gain Configurations for the AD8475 and the AD7192 Internal PGA for Various Input Ranges

Input Range (VSxA − VSxB) Gain of AD8475 Gain of AD7192 PGA Output Range, Bipolar Mode (V)

±10 V 0.4 1 ±4
±5 V 0.8 1 ±4
±1 V 0.4 8 ±3.2
±500 mV 0.8 8 ±3.2
±250 mV 0.8 16 ±3.2
± 125 mV 0.8 32 ±3.2
±62.5 mV 0.8 64 ±3.2
±31.25 mV 0.8 128 ±3.2

device that is particularly suitable for high resolution, Σ-Δ ADCs
and precision data acquisition systems.

Input Switch and Protection

The ADG1409 multiplexer has 2-bit binary address lines that
are used to select one of four possible input channels. The design
also includes external protection such as standard diodes and
transient voltage suppressors to enhance the robustness of the
circuit. These are not shown in Figure 1; however, they are shown
in the detailed schematics and other documentation in the

CN0251 Design Support Package.

The ADG1409 multiplexer is configured to accept four
differential input signals: (VS1A − VS1B), (VS2A − VS2B),
(VS3A − VS3B), and (VS4A − VS4B). The outputs of the
multiplexer, DA and DB, are applied to the inputs of the

AD8226 in-amp.

AD8226 Input Instrumentation Amplifier

The external RG resistor sets the gain of the AD8226. For this
circuit, R

is omitted, and the gain of the in-amp stage is 1. The

G

output of the AD8226 is therefore VSxA − VSxB, where x is the
input channel number.

The differential input of the AD8226 is filtered by two 4.02 kΩ
resistors and a 10 nF capacitor, which form a single-pole RC filter
with a cutoff frequency of 2.0 kHz. The two 1 nF capacitors add
common-mode filtering with a cutoff frequency of 40 kHz.

AD7192 ADC PGA Gain Configuration

The AD7192 is configured to accept differential analog inputs
to match the differential output signals from the AD8475. The
full-scale input range of the AD7192 is ±V
±V

= REFINx(+) − REFINx(−).

REF

/gain, where

REF

When the buffer in the AD7192 is enabled, the input channel
drives the high impedance input stage of the buffer amplifier, and
the absolute input voltage range in this mode is restricted to a
range of AGND + 250 mV and AV

− 250 mV. When the gain

DD

stage is enabled, the output from the buffer is applied to the input
of the PGA, and the analog input range must be limited to
±(AV

− 1.25 V)/gain because the PGA requires additional

DD

headroom. Therefore, with a 4.096 V reference and a 5 V power
supply, and to make the maximum use of the dynamic range of the
ADC, the signal can be attenuated or amplified as shown in Table 1.

Rev. 0 | Page 2 of 6