Analog Devices AD8310 Datasheet

Fast, Voltage-Out DC-440 MHz
+ –
VPOS
INHI
INLO
COMM
3
8mA
1.0kV
BANDGAP REFERENCE
AND BIASING
SIX 14.3dB 900MHz
AMPLIFIER STAGES
NINE DETECTOR CELLS
SPACED 14.3dB
INPUT-OFFSET
COMPENSATION LOOP
2
2mA
/dB
MIRROR
3kV
3kV
1kV
COMM
COMM
COMM
ENBL
BFIN
VOUT
OFLT
ENABLE
BUFFER INPUT
OUTPUT
OFFSET FILTER
AD8310
SUPPLY
+INPUT –INPUT
COMMON
33pF
a
FEATURES Multistage Demodulating Logarithmic Amplifier Voltage Output, Rise-Time <15 ns High-Current Capacity: 25 mA into Grounded R 95 dB Dynamic Range: –91 dBV to +4 dBV Single Supply of 2.7 V Min at 8 mA Typ DC-440 MHz Operation, 0.4 dB Linearity Slope of 24 mV/dB, Intercept of –108 dBV Highly Stable Scaling over Temperature Fully Differential DC-Coupled Signal Path 100 ns Power-Up Time, 1 A Sleep Current
APPLICATIONS Conversion of Signal Level to Decibel Form Transmitter Antenna Power Measurement Receiver Signal Strength Indication (RSSI) Low-Cost Radar and Sonar Signal-Processing Network and Spectrum Analyzers Signal-Level Determination Down to 20 Hz True-Decibel AC Mode for Multimeters
95 dB Logarithmic Amplifier
AD8310
FUNCTIONAL BLOCK DIAGRAM
L
PRODUCT DESCRIPTION
The AD8310 is a complete, dc-440 MHz demodulating logarithmic amplifier (log amp) with a very fast voltage-mode output capable of driving up to 25 mA into a grounded load in under 15 ns. It uses the progressive compression (successive detection) technique to provide a dynamic range of up to 95 dB
to ±3 dB law-conformance, or 90 dB to a ±1 dB error bound up
to 100 MHz. It is extremely stable and easy to use, requiring no significant external components. A single supply voltage of 2.7 V to 5.5 V at 8 mA is needed, corresponding to a power consump­tion of only 24 mW at 3 V. A fast-acting CMOS-compatible enable pin is provided.
Each of the six cascaded amplifier/limiter cells has a small-signal gain of 14.3 dB, with a –3 dB bandwidth of 900 MHz. A total of nine detector cells are used, to provide a dynamic range that extends from –91 dBV (where 0 dBV is defined as the ampli­tude of a 1 V rms sine wave) that is, an amplitude of about
±40 µV, up to +4 dBV (or ±2.2 V). The demodulated output
is accurately scaled, with a log slope of 24 mV/dB and an intercept of –108 dBV; the scaling parameters are supply- and temperature­independent. The fully-differential input offers a moderately
high impedance (1 k in parallel with about 1 pF). A simple network can match the input to 50 and provide a power
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
sensitivity of to –78 dBm to +17 dBm. The logarithmic linearity
is typically within ±0.4 dB up to 100 MHz over the central
portion of the range, but is somewhat greater at 440 MHz. There is no minimum frequency limit; the AD8310 may be used down to low audio frequencies. Special filtering features are provided to support this wide range.
The output voltage runs from a noise-limited lower boundary of 400 mV to an upper limit within 200 mV of the supply voltage for light loads. The slope and intercept can be readily altered using external resistors. The output is tolerant of a wide variety of load conditions and is stable with capacitive loads of 100 pF.
The AD8310 provides a unique combination of low cost, small size, small power consumption, high accuracy and stability, high dynamic range, a frequency range encompassing audio to UHF, fast response time and good load-driving capabilities, making this product useful in numerous applications requiring the reduction of a signal to its decibel equivalent.
The AD8310 is available in the industrial temperature range of
–40°C to +85°C, in an 8-lead Mini_SO package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999
AD8310–SPECIFICATIONS
(@ TA = 25C, VS = 5 V, unless otherwise noted)
Parameter Conditions Min Typ Max Unit
INPUT STAGE (Inputs INHI, INLO)
Maximum Input
1
Single-Ended, p-p ±2.0 ±2.2 V
4 dBV
Equivalent Power in 50 Termination Resistor of 52.3 17 dBm
Differential Drive, p-p 20 dBm
Noise Floor Terminated 50 Source 1.28 nV/Hz
Equivalent Power in 50 440 MHz Bandwidth –78 dBm
Input Resistance From INHI to INLO 800 1000 1200
Input Capacitance From INHI to INLO 1.4 pF DC Bias Voltage Either Input 3.2 V
LOGARITHMIC AMPLIFIER (Output VOUT)
±3 dB Error Dynamic Range From Noise Floor to Maximum Input 95 dB Transfer Slope 10 MHz ≤ f ≤ 200 MHz 22 24 26 mV/dB
< +85°C 20 26 mV/dB
A
Intercept (Log Offset)
2
Over Temperature –40°C < T 10 MHz f 200 MHz –115 –108 –99 dBV Equivalent dBm (re 50 Ω) –102 –95 –86 dBm Over Temperature –40°C ≤ T
+85°C –120 –96 dBV
A
Equivalent dBm (re 50 Ω) –107 –83 dBm Temperature Sensitivity –0.04 dB/°C
Linearity Error (Ripple) Input from –88 dBV (–75 dBm) to +2 dBV (+15 dBm) ±0.4 dB
Output Voltage Input = –91 dBV (–78 dBm) 0.4 V
Input = 9 dBV (22 dBm) 2.6 V
Minimum Load Resistance, R
L
100
Maximum Sink Current 0.5 mA
Output Resistance 0.05
Video Bandwidth 25 MHz Rise Time (10%–90%) Input Level = –43 dBV (–30 dBm),
␣ 402 , CL ␣ 68 pF 15 ns
R
L
Input Level = –3 dBV (+10 dBm),
␣ 402 , CL ␣ 68 pF 20 ns
R
L
Fall Time (90%–10%) Input Level = –43 dBV (–30 dBm),
␣ 402 , CL ␣ 68 pF 30 ns
R
L
Input Level = –3 dBV (+10 dBm),
␣ 402 , CL ␣ 68 pF 40 ns
R
L
Output Settling Time to 1% Input Level = –13 dBV (0 dBm),
R
␣ 402 , CL ␣ 68 pF 40 ns
L
POWER INTERFACES
Supply Voltage, V
POS
2.7 5.5 V
Quiescent Current Zero-Signal 6.5 8.0 9.5 mA
Over Temperature –40°C < T
< +85°C 5.5 8.5 10 mA
A
Disable Current 0.05 µA Logic Level to Enable Power HI Condition, –40°C < T
< +85°C 2.3 V
A
Input Current when HI 3 V at ENBL 35 µA Logic Level to Disable Power LO Condition, –40°C < TA < +85°C 0.8 V
NOTES
1
The input level is specified in “dBV” since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of
1 V rms. A power level of 0 dBm (1 mW) in a 50 termination corresponds to an input of 0.2236 V rms. Hence, the relationship between dBV and dBm is a fixed offset of 13 dBm in the special case of a 50 termination.
2
Guaranteed but not tested; limits are specified at six sigma levels.
Specifications subject to change without notice.
–2–
REV. A
AD8310
WARNING!
ESD SENSITIVE DEVICE
INHI ENBL BFIN VPOS
COMM
OFLT VOUT
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
INLO
AD8310
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5 V
Input Power (re 50 ), Single-Ended . . . . . . . . . . . . . 18 dBm
Differential Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 dBm
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . 200 mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200°C/W
θ
JA
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may effect device reliability.
Model Description Option
AD8310ARM* RM-8 Tube RM-8 AD8310ARM-REEL RM-8 13" Tape and Reel RM-8 AD8310ARM-REEL7 RM-8 7" Tape and Reel RM-8 AD8310-EVAL Evaluation Board
*Device branded as J6A.
ORDERING GUIDE
Package Package
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8310 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
Pin Name Function
1 INLO One of two balanced inputs, biased roughly to
VPOS/2. 2 COMM Common Pin (usually grounded). 3 OFLT Offset filter access, nominally at about 1.75 V. 4 VOUT Low impedance output voltage, 25 mA max
load. 5 VPOS Positive Supply, 2.7 V – 5.5 V at 8 mA quies-
cent current. 6 BFIN Buffer input; used to lower post-detection
bandwidth. 7 ENBL CMOS-compatible chip enable (active when
‘HI’). 8 INHI Second of two balanced inputs.
REV. A
–3–
AD8310
100ns PER HORIZONTAL DIVISION
GND REFERENCE
INPUT
500mV PER VERTICAL DIVISION
V
OUT
CURVES OVERLAP
500mV PER VERTICAL DIVISION
100
10
1
0.1
–Typical Performance Characteristics
= +858C
T
A
V
OUT
500mV PER VERTICAL DIVISION
100ns PER HORIZONTAL DIVISION
0.01 T
= +258C
0.001
SUPPLY CURRENT – mA
0.0001
0.00001
0.5 2.50.7
A
T
= –408C
A
0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 ENABLE VOLTAGE – V
Figure 1. Supply Current vs. Enable Voltage @ T
= –40°C, +25°C and +85°C
A
V
OUT
500mV PER VERTICAL DIVISION
5V PER VERTICAL DIVISION
200ns PER HORIZONTAL DIVISION
–3dBV
–23dBV
–43dBV
–63dBV
–83dBV
ENABLE
GND REFERENCE
INPUT
–3dBV INPUT
LEVEL SHOWN
HERE
500mV PER VERTICAL DIVISION
Figure 4. RSSI Pulse Response with RL = 402Ω and CL = 68 pF, for Inputs Stepped from Zero to –33 dBV, –23 dBV, –13 dBV, and –3 dBV
Figure 2. Power On/Off Response Time with RF Input of –83 dBV to –3 dBV
V
OUT
500mV PER VERTICAL DIVISION
GND REFERENCE
INPUT
500mV PER VERTICAL DIVISION
100V
154V
200V
100ns PER HORIZONTAL DIVISION
Figure 3. Large Signal RSSI Pulse Response with C
= 100 pF and RL = 100Ω, 154 Ω, and 200
L
Figure 5. Large Signal RSSI Pulse Response with R
= 100Ω and CL = 33 pF, 68 pF and 100 pF
L
V
OUT
200mV PER VERTICAL DIVISION
GND REFERENCE
INPUT
Figure 6. Small Signal RSSI Pulse Response with RL = 50
and Back Termination of 50Ω (Total Load = 100 Ω)
100ns PER HORIZONTAL DIVISION
20mV PER VERTICAL DIVISION
–4–
REV. A
AD8310
INPUT LEVEL – dBV
3.0
–120 –100
(–87dBm)
RSSI OUTPUT – V
–80 –60 –40 –20 0
(+13dBm)
20
2.5
2.0
1.5
1.0
0.5
0
10MHz
50MHz
100MHz
INPUT LEVEL – dBV
3.0
0 –120 20–100
(–87dBm)
RSSI OUTPUT – V
–80 –60 –40 –20 0
(+13dBm)
2.5
2.0
1.5
1.0
0.5
200MHz
300MHz
440MHz
INPUT LEVEL – dBV
5
–5
–120 20–100
(–87dBm)
ERROR – dB
–80 –60 –40 –20 0
(+13dBm)
4
–1
–2
–3
–4
2
0
3
1
TA = +858C
T
A
= +258C
T
A
= –408C
100pF
3300pF
V
OUT
0.01mF
GROUND REFERENCE
500mV PER VERTICAL DIVISION
50ms PER HORIZONTAL DIVISION
Figure 7. Small Signal AC Response of RSSI Output with External BFIN Capacitance of 100 pF, 3300 pF and 0.01
V
500mV PER VERTICAL DIVISION
OUT
25ns PER HORIZONTAL DIVISION
µ
Figure 10. RSSI Output vs. Input Level at TA = 25°C for
F
Frequencies of 10 MHz, 50 MHz, and 100 MHz
10mV PER VERTICAL DIVISION
INPUT
GROUND REFERENCE
Figure 8. Small Signal RSSI Pulse Response with R
= 402Ω and CL = 68 pF
L
3.0
2.5
2.0
1.5
= –408C
T
RSSI OUTPUT – V
1.0
0.5
Figure 9. RSSI Output vs. Input Level, 100 MHz Sine Input at T
= –40°C, +25°C and +85°C, Single-Ended Input
A
A
TA = +258C
0
–120 20–100
(–87dBm)
T
= +858C
A
–80 –60 –40 –20 0
INPUT LEVEL – dBV
(+13dBm)
REV. A
Figure 11. RSSI Output vs. Input Level at TA = 25°C for Frequencies of 200 MHz, 300 MHz, and 440 MHz
Figure 12. Log Linearity of RSSI Output vs. Input Level, 100 MHz Sine Input at T
= –40°C, +25°C and +85°C
A
–5–
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