Analog Devices AD8139 a Datasheet
Low Noise Rail-to-Rail
FEATURES
Fully differential
Low noise
2.25 nV/√Hz
2.1 pA/√Hz
Low harmonic distortion
98 dBc SFDR @ 1 MHz
85 dBc SFDR @ 5 MHz
72 dBc SFDR @ 20 MHz
High speed
410 MHz, 3 dB BW (G = 1)
800 V/µs slew rate
45 ns settling time to 0.01%
69 dB output balance @ 1 MHz
80 dB dc CMRR
Low offset: ±0.5 mV max
Low input offset current: 0.5 µA max
Differential input and output
Differential-to-differential or single-ended-to-differential
operation
Rail-to-rail output
Adjustable output common-mode voltage
Wide supply voltage range: 5 V to 12 V
Available in small SOIC package
GENERAL DESCRIPTION
The AD8139 is an ultralow noise, high performance differential
amplifier with rail-to-rail output. With its low noise, high SFDR,
and wide bandwidth, it is an ideal choice for driving ADCs with
resolutions to 18 bits. The AD8139 is easy to apply, and its internal common-mode feedback architecture allows its output
common-mode voltage to be controlled by the voltage applied
to one pin. The internal feedback loop also provides outstanding output balance as well as suppression of even-order
harmonic distortion products. Fully differential and singleended-to-differential gain configurations are easily realized by
the AD8139. Simple external feedback networks consisting of a
total of four resistors determine the amplifier’s closed-loop gain.
The AD8139 is manufactured on ADI’s proprietary second generation XFCB process, enabling it to achieve low levels of distortion with input voltage noise of only 1.85 nV/√Hz.
Differential ADC Driver
AD8139
APPLICATIONS
ADC drivers to 18 bits
Single-ended-to-differential converters
Differential filters
Level shifters
Differential PCB board drivers
Differential cable drivers
FUNCTIONAL BLOCK DIAGRAM
AD8139
–IN 1
2
V
OCM
V+ 3
+OUT 4
NC = NO CONNECT
Figure 1.
The AD8139 is available in an 8-lead SOIC package with an
exposed paddle (EP) on the underside of its body and a 3 mm ×
3 mm LFCSP. It is rated to operate over the temperature range
of −40°C to +125°C.
100
10
INPUT VOLTAGE NOISE (nV/ Hz)
1
10 100 1k 10k 100k 1M 10M 1G100M
Figure 2. Input Voltage Noise vs. Frequency
FREQUENCY (Hz)
+IN8
NC7
V–6
–OUT5
04679-0-001
04679-0-078
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
AD8139
TABLE OF CONTENTS
VS = ±5 V, V
= 0 V Specifications.............................................. 3
OCM
Typical Connection and Definition of Terms ........................ 18
VS = 5 V, V
= 2.5 V Specifications............................................. 5
OCM
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ......................................................................7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics............................................. 9
Theory of Operation ...................................................................... 18
REVISION HISTORY
8/04—Data Sheet Changed from a Rev. 0 to Rev. A.
Added 8-Lead LFCSP.........................................................Universal
Changes to General Description .................................................... 1
Changes to Figure 2.......................................................................... 1
Changes to V
Changes to V
= ±5 V, V
S
= 5 V, V
S
= 0 V Specifications......................... 3
OCM
= 2.5 V Specifications......................... 5
OCM
Changes to Table 4............................................................................ 7
Changes to Maximum Power Dissipation Section....................... 7
Changes to Figure 26 and Figure 29............................................. 12
Inserted Figure 39 and Figure 42.................................................. 14
Changes to Figure 45 to Figure 47................................................ 15
Inserted Figure 48........................................................................... 15
Changes to Figure 52 and Figure 53............................................. 16
Changes to Figure 55 and Figure 56............................................. 17
Changes to Table 6.......................................................................... 19
Changes to Voltage Gain Section.................................................. 19
Changes to Driving a Capacitive Load Section ..........................22
Changes to Ordering Guide.......................................................... 24
Updated Outline Dimensions....................................................... 24
Applications..................................................................................... 19
Estimating Noise, Gain, and Bandwidth with Matched
Feedback Networks
.................................................................... 19
Outline Dimensions....................................................................... 24
Ordering Guide .......................................................................... 24
5/04—Revision 0: Initial Version
Rev. A | Page 2 of 24
AD8139
VS = ±5 V, V
@ 25°C, Diff. Gain = 1, R
= 0 V SPECIFICATIONS
OCM
= 1 kΩ, RF = RG = 200 Ω, unless otherwise noted. T
L, dm
MIN
to T
= −40°C to +125°C.
MAX
Table 1.
Parameter Conditions Min Typ Max Unit
DIFFERENTIAL INPUT PERFORMANCE
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth V
−3 dB Large Signal Bandwidth V
Bandwidth for 0.1 dB Flatness V
Slew Rate V
Settling Time to 0.01% V
Overdrive Recovery Time G = 2, V
= 0.1 V p-p 340 410 MHz
O, dm
= 2 V p-p 210 240 MHz
O, dm
= 0.1 V p-p 45 MHz
O, dm
= 2 V Step 800 V/µs
O, dm
= 2 V Step, CF = 2 pF 45 ns
O, dm
= 12 V p-p Triangle Wave 30 ns
IN, dm
NOISE/HARMONIC PERFORMANCE
SFDR V
V
V
Third-Order IMD V
= 2 V p-p, fC = 1 MHz 98 dB
O, dm
= 2V p-p, fC = 5 MHz 85 dB
O, dm
= 2 V p-p, fC = 20 MHz 72 dB
O, dm
= 2 V p-p, fC = 10.05 MHz ± 0.05 MHz −90 dBc
O, dm
Input Voltage Noise f = 100 KHz 2.25 nV/√Hz
Input Current Noise f = 100 KHz 2.1 pA/√Hz
DC PERFORMANCE
Input Offset Voltage VIP = VIN = V
Input Offset Voltage Drift T
Input Bias Current T
MIN
MIN
to T
to T
MAX
MAX
OCM
= 0 V
−500 ±150 +500 µV
1.25 µV/ºC
2.25 8.0 µA
Input Offset Current 0.12 0.5 µA
Open-Loop Gain 114 dB
INPUT CHARACTERISTICS
Input Common-Mode Voltage Range −4 +4 V
Input Resistance Differential 600 kΩ
Common Mode 1.5 MΩ
Input Capacitance Common Mode 1.2 pF
CMRR V
= ±1 V dc, RF = RG = 10 kΩ 80 84 dB
ICM
OUTPUT CHARACTERISTICS
Output Voltage Swing Each Single-Ended Output, RF = RG = 10 kΩ −VS + 0.20 +VS – 0.20 V
Each Single-Ended Output,
= Open Circuit, RF = RG = 10 kΩ
R
L, dm
+ 0.15 +VS – 0.15 V
−V
S
Output Current Each Single-Ended Output 100 mA
Output Balance Error f = 1 MHz −69 dB
V
to V
OCM
V
OCM
−3 dB Bandwidth V
Slew Rate V
PERFORMANCE
O, cm
DYNAMIC PERFORMANCE
= 0.1 V p-p 515 MHz
O, cm
= 2 V p-p 250 V/µs
O, cm
Gain 0.999 1.000 1.001 V/V
V
INPUT CHARACTERISTICS
OCM
Input Voltage Range −3.8 +3.8 V
Input Resistance 3.5 MΩ
Input Offset Voltage V
OS, cm
= V
O, cm
− V
; VIP = VIN = V
OCM
= 0 V −900 ±300 +900 µV
OCM
Input Voltage Noise f = 100 kHz 3.5 nV/√Hz
Input Bias Current 1.3 4.5 µA
CMRR V
/V
, V
OCM
O, dm
= ±1 V 74 88 dB
OCM
Rev. A | Page 3 of 24
AD8139
Parameter Conditions Min Typ Max Unit
POWER SUPPLY
Operating Range 4.5 ±6 V
Quiescent Current 24.5 25.5 mA
+PSRR Change in +VS = ±1V 95 112 dB
−PSRR Change in −VS = ±1V 95 109 dB
OPERATING TEMPERATURE RANGE −40 +125 °C
Rev. A | Page 4 of 24
AD8139
VS = 5 V, V
@ 25°C, Diff. Gain = 1, R
= 2.5 V SPECIFICATIONS
OCM
= 1 kΩ, RF = RG = 200 Ω, unless otherwise noted. T
L, dm
MIN
to T
= −40°C to +125°C.
MAX
Table 2.
Parameter Conditions Min Typ Max Unit
DIFFERENTIAL INPUT PERFORMANCE
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth V
−3 dB Large Signal Bandwidth V
Bandwidth for 0.1 dB Flatness V
Slew Rate V
Settling Time to 0.01% V
Overdrive Recovery Time G = 2, V
= 0.1 V p-p 330 385 MHz
O, dm
= 2 V p-p 135 165 MHz
O, dm
= 0.1 V p-p 34 MHz
O, dm
= 2 V Step 540 V/s
O, dm
= 2 V Step 55 ns
O, dm
= 7 V p-p Triangle Wave 35 ns
IN, dm
NOISE/HARMONIC PERFORMANCE
SFDR V
V
V
Third-Order IMD V
= 2 V p-p, fC = 1 MHz 99 dB
O, dm
= 2 V p-p, fC = 5 MHz, (RL = 800 Ω) 87 dB
O, dm
= 2 V p-p, fC = 20 MHz, (RL = 800 Ω) 75 dB
O, dm
= 2 V p-p, fC = 10.05 MHz ± 0.05 MHz −87 dBc
O, dm
Input Voltage Noise f = 100 kHz 2.25 nV/√Hz
Input Current Noise f = 100 kHz 2.1 pA/√Hz
DC PERFORMANCE
Input Offset Voltage VIP = VIN = V
Input Offset Voltage Drift T
Input Bias Current T
MIN
MIN
to T
to T
MAX
MAX
OCM
=0 V
−500 ±150 +500 µV
1.25 µV/ºC
2.2 7.5 A
Input Offset Current 0.13 0.5 µA
Open-Loop Gain 112 dB
INPUT CHARACTERISTICS
Input Common-Mode Voltage Range 1 4 V
Input Resistance Differential 600 KΩ
Common-Mode 1.5 MΩ
Input Capacitance Common-Mode 1.2 pF
CMRR ∆V
= ±1 V dc, RF = RG = 10 kΩ 75 79 dB
ICM
OUTPUT CHARACTERISTICS
Output Voltage Swing Each Single-Ended Output, RF = RG = 10 kΩ −VS + 0.15 +VS − 0.15 V
Each Single-Ended Output,
= Open Circuit, RF = RG = 10 kΩ
R
L, dm
+ 0.10 +VS − 0.10 V
−V
S
Output Current Each Single-Ended Output 80 mA
Output Balance Error f = 1 MHz −70 dB
V
to V
OCM
V
OCM
−3 dB Bandwidth V
Slew Rate V
PERFORMANCE
O, cm
DYNAMIC PERFORMANCE
= 0.1 V p-p 440 MHz
O, cm
= 2 V p-p 150 V/s
O, cm
Gain 0.999 1.000 1.001 V/V
V
INPUT CHARACTERISTICS
OCM
Input Voltage Range 1.0 3.8 V
Input Resistance 3.5 MΩ
Input Offset Voltage V
OS, cm
= V
O, cm
− V
; VIP = VIN = V
OCM
= 2.5 V −1.0 ±0.45 +1.0 mV
OCM
Input Voltage Noise f = 100 KHz 3.5 nV/√Hz
Input Bias Current 1.3 4.2 A
CMRR ∆V
/∆VO(dm), ∆V
OCM
= ±1 V 67 79 dB
OCM
Rev. A | Page 5 of 24
AD8139
Parameter Conditions Min Typ Max Unit
POWER SUPPLY
Operating Range +4.5 ±6 V
Quiescent Current 21.5 22.5 mA
+PSRR Change in +VS = ±1 V 86 97 dB
−PSRR Change in −VS = ±1 V 92 105 dB
OPERATING TEMPERATURE RANGE −40 +125 °C
Rev. A | Page 6 of 24
AD8139
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 12 V
V
OCM
±V
S
Power Dissipation See Figure 3
Input Common-Mode Voltage ±V
S
Storage Temperature –65°C to +125°C
Operating Temperature Range –40°C to +125°C
Lead Temperature Range
300°C
(Soldering 10 sec)
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any
other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, i.e., θJA is specified
for device soldered in circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type θ
JA
SOIC-8 with EP/4-Layer 70 °C/W
LFCSP/4-Layer 70 °C/W
Maximum Power Dissipation
The maximum safe power dissipation in the AD8139 package is
limited by the associated rise in junction temperature (T
die. At approximately 150°C, which is the glass transition temperature, the plastic will change its properties. Even temporarily
exceeding this temperature limit may change the stresses that the
package exerts on the die, permanently shifting the parametric
Unit
) on the
J
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
and common-mode currents flowing to the load, as well as
currents flowing through the external feedback networks and
the internal common-mode feedback loop. The internal resistor
tap used in the common-mode feedback loop places a 1 kΩ
differential load on the output. RMS output voltages should be
considered when dealing with ac signals.
Airflow reduces θ
the package leads from metal traces, through holes, ground, and
power planes will reduce the θ
Figure 3 shows the maximum safe power dissipation in the
package versus the ambient temperature for the exposed paddle
(EP) SOIC-8 (θ
70°C/W) on a JEDEC standard 4-layer board. θ
approximations.
4.0
3.5
3.0
2.5
2.0
1.5
1.0
MAXIMUM POWER DISSIPATION (W)
0.5
0
–40 –20 0 20 40 60 80 100 120
performance of the AD8139. Exceeding a junction temperature of
175°C for an extended period of time can result in changes in the
silicon devices potentially causing failure.
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
). The load current consists of differential
S
. Also, more metal directly in contact with
JA
.
JA
= 70°C/W) package and LFCSP (θJA =
JA
SOIC
AND LFCSP
AMBIENT TEMPERATURE (°C)
) is the sum of the
D
) times the
S
values are
JA
04679-0-055
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
Rev. A | Page 7 of 24
AD8139
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD8139
–IN
1
2
V
OCM
V+
3
+OUT
4
NC = NO CONNECT
Figure 4. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 −IN Inverting Input.
2 V
OCM
An internal feedback loop drives the output common-mode voltage to be equal to the
voltage applied to the V
pin, provided the amplifier’s operation remains linear.
OCM
3 V+ Positive Power Supply Voltage.
4 +OUT Positive Side of the Differential Output.
5 −OUT Negative Side of the Differential Output.
6 V− Negative Power Supply Voltage.
7 NC No Internal Connection.
8 +IN Noninverting Input.
8
7
6
5
+IN
NC
V–
–OUT
R
F
04679-0-003
TEST
SIGNAL
SOURCE
V
TEST
SIGNAL
SOURCE
TEST
V
TEST
50Ω
60.4Ω
60.4Ω
50Ω
V
OCM
RG= 200Ω
RG= 200Ω
Figure 5. Basic Test Circuit
50Ω
60.4Ω
60.4Ω
50Ω
V
RG= 200Ω
OCM
RG= 200Ω
Figure 6. Capacitive Load Test Circuit, G = +1
AD8139
= 200Ω
R
F
AD8139
RF= 200Ω
C
F
R
L, dm
C
F
R
F
R
S
C
R
S
–
V
= 1kΩ
O, dm
+
L, dmRL, dm
04679-0-072
–
V
O, dm
+
04679-0-075
Rev. A | Page 8 of 24
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