ANALOG DEVICES AD7988-5 Service Manual

PulSAR ADCs in MSOP/LFCSP (QFN)

AD7988-1/AD7988-5

Rev. B

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REF

GND

VDD

IN+
IN–

VIO

SDI
SCK
SDO
CNV

1.8V TO 5.5V

3- OR 4-WI RE INTERFACE
(SPI, DAISY CHAIN, CS)

2.5V TO 5V 2.5V

0V TO V

REF

10231-001

AD7988-1/
AD7988-5

Data Sheet

FEATURES

Low power dissipation

AD7988-5: 3.5 mW @ 500 kSPS

AD7988-1: 700 µW @ 100 kSPS

16-bit resolution with no missing codes
Throughput: 100 kSPS/500 kSPS options
INL: ±0.6 LSB typical, ±1.25 LSB maximum
SINAD: 91.5 dB @ 10 kHz
THD: −114 dB @ 10 kHz
Pseudo differential analog input range

0 V to V

Any input range and easy to drive with the ADA4841-1
No pipeline delay
Single-supply 2.5 V operation with 1.8 V/2.5 V/3 V/5 V

logic interface
SPI-/QSPI-/MICROWIRE™-/DSP-compatible serial interface
Daisy-chain multiple ADCs
10-lead MSOP and 10-lead, 3 mm × 3 mm LFCSP (QFN),

same space as SOT-23
Wide operating temperature range: −40°C to +125°C

APPLICATIONS

Battery-powered equipment
Low power data acquisition systems
Portable medical instruments
ATE equipment
Data acquisitions
Communications

with V

REF

from 2.5 V to 5.5 V

REF

16-Bit Lower Power

GENERAL DESCRIPTION

The AD7988-1/AD7988-5 are 16-bit, successive approximation,
analog-to-digital converters (ADC) that operate from a single
power supply, VDD. The AD7988-1 offers a 100 kSPS throughput,
and the AD7988-5 offers a 500 kSPS throughput. They are low
power, 16-bit sampling ADCs with a versatile serial interface
port. On the CNV rising edge, they sample an analog input,
IN+, between 0 V to V
The reference voltage, REF, is applied externally and can be set
independent of the supply voltage, VDD.

The SPI-compatible serial interface also features the ability to
daisy-chain several ADCs on a single 3-wire bus using the SDI
input. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic using
the separate supply, VIO.

The AD7988-1/AD7988-5 generics are housed in a 10-lead
MSOP or a 10-lead LFCSP (QFN) with operation specified
from −40°C to +125°C.

Table 1. MSOP, LFCSP (QFN) 14-/16-/18-Bit PulSAR® ADCs

Bits 100 kSPS 250 kSPS

181 AD76912 AD76902 AD79822

161 AD7684 AD76872 AD76882

163 AD7680

AD7683
AD7988-1

143 AD7940 AD79422 AD79462 ADA4841-1

1

True differential.

2

Pin-for-pin compatible.

3

Pseudo differential.

2

with respect to a ground sense, IN−.

REF

AD7685
AD7694

2

400 kSPS to
500 kSPS

AD7693
AD76862
AD7988-5

≥1000
kSPS

AD7984

ADA4941-1

2

AD7980

2

ADC Driver

ADA4941-1

2

ADA4841-1

ADA4841-1

2

ADA4841-1

ADA4841-1
ADA4841-1

TYPICAL APPLICATION DIAGRAM

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Figure 1.

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Tel: [phone] www.analog.com

AD7988-1/AD7988-5 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Typical Application Diagram .......................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Timing Specifications .................................................................. 5

Absolute Maximum Ratings ............................................................ 7

ESD Caution .................................................................................. 7

Pin Configurations and Function Descriptions ........................... 8

Terminology ...................................................................................... 9

Typical Performance Characteristics ........................................... 10

Theory of Operation ...................................................................... 14

Circuit Information .................................................................... 14

Converter Operation .................................................................. 14

Typical Connection Diagram ................................................... 15

Analog Inputs ............................................................................. 16

Driver Amplifier Choice ........................................................... 16

Voltage Reference Input ............................................................ 17

Power Supply ............................................................................... 17

Digital Interface .......................................................................... 17

CS

Mode, 3-Wire ........................................................................ 18

CS

Mode 4-Wire ......................................................................... 19

Chain Mode ................................................................................ 20

Applications Information .............................................................. 21

Interfacing to Blackfin® DSP ..................................................... 21

Layout .......................................................................................... 21

Evaluating the Performance of the AD7988-x ........................ 21

Outline Dimensions ....................................................................... 22

Ordering Guide .......................................................................... 23

REVISION HISTORY

5/12—Rev. A to Rev. B

Changes to Table 3 ............................................................................. 4

Updated Outline Dimensions ........................................................ 22

2/12—Rev. 0 to R e v. A

Added LFCSP Thermal Impedance Values ................................... 7

Updated Outline Dimensions ....................................................... 23

Changes to Ordering Guide .......................................................... 23

2/12—Revision 0: Initial Ve rs i on

Rev. B | Page 2 of 24

Data Sheet AD7988-1/AD7988-5

Absolute Input Voltage

IN+

−0.1 V

+ 0.1

V

Integral Linearity Error

V

= 5 V

−1.25

±0.6

+1.25

LSB1

Gain Error Temperature Drift

±0.35

ppm/°C

Transient Response

Full-scale step

500

ns

fIN = 10 kHz, V

= 2.5 V

87.0 dB3

SPECIFICATIONS

VDD = 2.5 V, VIO = 2.3 V to 5.5 V, V

Table 2.

Parameter Test Conditions/Comments Min Typ Max Unit

RESOLUTION 16 Bits
ANALOG INPUT

Voltage Range IN+ − IN− 0 V

IN− −0.1 +0.1 V
Analog Input CMRR fIN = 1 kHz 60 dB
Leakage Current at 25°C Acquisition phase 1 nA
Input Impedance See the Analog Inputs section

ACCURACY

No Missing Codes 16 Bits
Differential Linearity Error V
V

V
Transition Noise V
V
Gain Error, T

MIN

2

to T

±2 LSB1

MAX

= 5 V, TA = –40°C to +125°C, unless otherwise noted.

REF

REF

REF

= 5 V −0.9 ±0.4 +0.9 LSB1

REF

= 2.5 V ±0.55 LSB1

REF

REF

= 2.5 V ±0.65 LSB1

REF

= 5 V 0.6 LSB1

REF

= 2.5 V 1.0 LSB1

REF

V

Zero Error, T

MIN

2

to T

−0.5 ±0.08 +0.5 mV

MAX

Zero Temperature Drift 0.54 ppm/°C
Power Supply Sensitivity

VDD = 2.5 V ± 5%

±0.1 LSB1

THROUGHPUT

AD7988-1

Conversion Rate

VIO ≥ 2.3 V up to 85°C, VIO ≥ 3.3 V above 85°C up to

0 100 kSPS

125°C

AD7988-5

Conversion Rate

VIO ≥ 2.3 V up to 85°C, VIO ≥ 3.3 V above 85°C up to

0 500 kSPS

125°C

Transient Response Full-scale step 400 ns

AC ACCURACY

Dynamic Range V
V

= 5 V 92 dB3

REF

= 2.5 V 87 dB3

REF

Oversampled Dynamic Range fO = 10 kSPS 111 dB3
Signal-to-Noise Ratio, SNR fIN = 10 kHz, V
fIN = 10 kHz, V

= 5 V 90 91 dB3

REF

= 2.5 V 86.5 dB3

REF

Spurious-Free Dynamic Range, SFDR fIN = 10 kHz −110 dB3
Total Harmonic Distortion, THD fIN = 10 kHz −114 dB3
Signal-to-(Noise + Distortion), SINAD fIN = 10 kHz, V

1

LSB means least significant bit. With the 5 V input range, 1 LSB is 76.3 µV.

2

See the Terminology section. These specifications include full temperature range variation, but not the error contribution from the external reference.

3

All specifications in dB are referred to a full-scale input FSR. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified.

= 5 V 91.5 dB3

REF

REF

Rev. B | Page 3 of 24

AD7988-1/AD7988-5 Data Sheet

POWER SUPPLIES

AD7988-1 Power Dissipation

10 kSPS throughput

70 µW

VDD = 2.5 V, VIO = 2.3 V to 5.5 V, V

Table 3.

Parameter Test Conditions/Comments Min Typ Max Unit

REFERENCE

Voltage Range 2.4 5.1 V

Load Current V
SAMPLING DYNAMICS

−3 dB Input Bandwidth 10 MHz

Aperture Delay VDD = 2.5 V 2.0 ns
DIGITAL INPUTS

Logic Levels

VIL VIO > 3 V –0.3 0.3 × VIO V
VIH VIO > 3 V 0.7 × VIO VIO + 0.3 V
VIL VIO ≤ 3 V –0.3 0.1 × VIO V
VIH VIO ≤ 3 V 0.9 × VIO VIO + 0.3 V
IIL −1 +1 µA
IIH −1 +1 µA

DIGITAL OUTPUTS

Data Format Serial 16 bits straight binary

Pipeline Delay

VOL I
VOH I

= 5 V, TA = –40°C to +125°C, unless otherwise noted.

REF

= 5 V 250 µA

REF

Conversion results available immediately

after completed conversion

= 500 µA 0.4 V

SINK

= −500 µA VIO − 0.3 V

SOURCE

VDD 2.375 2.5 2.625 V

VIO Specified performance 2.3 5.5 V

VIO Range 1.8 5.5 V

Standby Current

1, 2

VDD and VIO = 2.5 V, 25°C 0.35 nA

100 kSPS throughput 700 µW

1 mW

AD7988-5 Power Dissipation 500 kSPS throughput 3.5 5 mW

Energy per Conversion 7.0 nJ/sample
TEMPERATURE RANGE

Specified Performance T

1

With all digital inputs forced to VIO or GND as required.

2

During the acquisition phase.

MIN

to T

−40 +125 °C

MAX

Rev. B | Page 4 of 24

Data Sheet AD7988-1/AD7988-5

AD7988-5

SCK Period (Chain Mode)

t

SCK High Time

t

4.5

ns

SDI Valid Setup Time from CNV Rising Edge

t

5

ns

TIMING SPECIFICATIONS

VDD = 2.37 V to 2.63 V, VIO = 3.3 V to 5.5 V, −40°C to +125°C unless otherwise stated. See Figure 2 and Figure 3 for load conditions.

Table 4.

Parameter Symbol Min Typ Max Unit

AD7988-1

Throughput Rate 100 kHz
Conversion Time: CNV Rising Edge to Data Available t
Acquisition Time t
Time Between Conversions t

Throughput Rate 500 kHz
Conversion Time: CNV Rising Edge to Data Available t
Acquisition Time t

Time Between Conversions t
CNV Pulse Width (CS Mode)
SCK Period (CS Mode)

VIO Above 4.5 V 10.5 ns
VIO Above 3 V 12 ns
VIO Above 2.7 V 13 ns
VIO Above 2.3 V 15 ns

VIO Above 4.5 V 11.5 ns
VIO Above 3 V 13 ns
VIO Above 2.7 V 14 ns
VIO Above 2.3 V 16 ns

SCK Low Time t

SCK Falling Edge to Data Remains Valid t
SCK Falling Edge to Data Valid Delay t

VIO Above 4.5 V 9.5 ns
VIO Above 3 V 11 ns
VIO Above 2.7 V 12 ns
VIO Above 2.3 V 14 ns

CNV or SDI Low to SDO D15 MSB Valid (CS Mode)

VIO Above 3 V 10 ns
VIO Above 2.3V 15 ns

CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)

SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (Chain Mode) t
SCK Valid Setup Time from CNV Rising Edge (Chain Mode) t
SCK Valid Hold Time from CNV Rising Edge (Chain Mode) t
SDI Valid Setup Time from SCK Falling Edge (Chain Mode) t
SDI Valid Hold Time from SCK Falling Edge (Chain Mode) t

9.5 μs

CONV

500 ns

ACQ

10 μs

CYC

1.6 μs

CONV

400 ns

ACQ

2 μs

CYC

t

500 ns

CNVH

t

SCK

SCK

4.5 ns

SCKL

SCKH

3 ns

HSDO

DSDO

t

EN

t

20 ns

DIS

SSDICNV

t

2 ns

HSDICNV

0 ns

HSDICNV

5 ns

SSCKCNV

5 ns

HSCKCNV

2 ns

SSDISCK

3 ns

HSDISCK

Rev. B | Page 5 of 24

AD7988-1/AD7988-5 Data Sheet

500µA I

OL

500µA I

OH

1.4V

TO SDO

C

L

20pF

10231-002

X% VIO

1

Y% VIO

1

V

IH

2

V

IL

2

V

IL

2

V

IH

2

t

DELAY

t

DELAY

1

FOR VIO ≤ 3.0V, X = 90 AND Y = 10; FOR VIO > 3.0V X = 70, AND Y = 30.

2

MINIMUM V

IH

AND MAXIMUM VIL USED. SEE DIGITAL INPUTS

SPECIFICATIONS IN TABLE 3.

10231-003

Figure 2. Load Circuit for Digital Interface Timing

Figure 3. Voltage Levels for Timing

Rev. B | Page 6 of 24

Data Sheet AD7988-1/AD7988-5

IN+,1 IN−1 to GND

−0.3 V to V

+ 0.3 V or ±130 mA

Digital Outputs to GND

−0.3 V to VIO + 0.3 V

θJC Thermal Impedance

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter Rating

Analog Inputs

REF

Supply Voltage

REF, VIO to GND −0.3 V to +6 V
VDD to GND −0.3 V to +3 V
VDD to VIO +3 V to −6 V

Digital Inputs to GND −0.3 V to VIO + 0.3 V

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Storage Temperature Range −65°C to +125°C
Junction Temperature 150°C
θJA Thermal Impedance

10-Lead MSOP 200°C/W
10-Lead LFCSP 80°C/W

10-Lead MSOP 44°C/W
10-Lead LFCSP 15°C/W

Reflow Soldering JEDEC Standard (J-STD-020)

1

See the Analog Inputs section.

ESD CAUTION

Rev. B | Page 7 of 24

AD7988-1/AD7988-5 Data Sheet

REF

1

VDD

2

IN+

3

IN–

4

GND

5

VIO

10

SDI

9

SCK

8

SDO

7

CNV

6

10231-004

AD7988-1/
AD7988-5

TOP VIEW

(Not to Scale)

NOTES

1. THE EXPOSED P

AD CAN BE CONNECTED TO GND.

1REF
2VDD
3IN+
4IN–
5GND

10 VIO
9 SDI
8 SCK
7 SDO
6 CNV

10231-005

AD7988-1/
AD7988-5

TO

P VI

EW

(Not to Scale)

6

CNV

DI

9

SDI

DI

Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Figure 4. 10-Lead MSOP Pin Configuration

Figure 5. 10-Lead LFCSP (QFN) Pin Configuration

Table 6. Pin Function Descriptions

Pin No. Mnemonic Type1 Description

1 REF AI

Reference Input Voltage. The V

range is from 2.4 V to 5.1 V. It is referred to the GND pin. The GND pin

REF

should be decoupled closely to the REF pin with a 10 µF capacitor.
2 VDD P Power Supply.
3 IN+ AI

Analog Input. It is referred to IN−. The voltage range, for example, the difference between IN+ and IN−, is

REF

.

0 V to V
4 IN− AI Analog Input Ground Sense. Connect to the analog ground plane or to a remote sense ground.
5 GND P Power Supply Ground.

Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions and

selects the interface mode of the part: chain mode or

CS mode. In CS mode, the SDO pin is enabled when

CNV is low. In chain mode, the data should be read when CNV is high.
7 SDO DO Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
8 SCK DI Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this clock.

follows:

Chain mode is selected if this pin is low during the CNV rising edge. In this mode, SDI is used as a data

input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data

level on SDI is output on SDO with a delay of 16 SCK cycles.

CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can enable

the serial output signals when low.
10 VIO P

Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V, 3 V,

or 5 V).
EP Exposed Pad. The exposed pad can be connected to GND.

1

AI = analog input, DI = digital input, DO = digital output, and P = power.

Rev. B | Page 8 of 24