Analog Devices AD7741 42 Datasheet

Single and Multichannel, Synchronous

X1

VOLTAGE-TO-

FREQUENCY
MODULATOR

CLOCK

GENERATION

CLKIN CLKOUT

GND

V

IN

POWER-DOWN

LOGIC

PDREFIN/OUT

V

DD

f

OUT

AD7741

+2.5V

REFERENCE

a

Voltage-to-Frequency Converters

FEATURES
AD7741: One Single-Ended Input Channel
AD7742: Two Differential or Three Pseudo-Differential

Input Channels

Integral Nonlinearity of 0.012% at f

(AD7742) and at f

(Max) = 1.35 MHz (AD7741)

OUT

(Max) = 2.75 MHz

OUT

Single +5 V Supply Operation
Buffered Inputs
Programmable Gain Analog Front-End
On-Chip +2.5 V Reference
Internal/External Reference Option
Power Down to 35 ␮A Max
Minimal External Components Required
8-Lead and 16-Lead DIP and SOIC Packages

APPLICATIONS
Low Cost Analog-to-Digital Conversion
Signal Isolation

GENERAL DESCRIPTION

The AD7741/AD7742 are a new generation of synchronous
voltage-to-frequency converters (VFCs). The AD7741 is a
single-channel version in an 8-lead package (SOIC/DIP) and the
AD7742 is a multichannel version in a 16-lead package (SOIC/
DIP). No user trimming is required to achieve the specified
performance.

The AD7741 has a single buffered input whereas the AD7742
has four buffered inputs that may be configured as two fully­differential inputs or three pseudo-differential inputs. Both parts
include an on-chip +2.5 V bandgap reference that provides the
user with the option of using this internal reference or an exter­nal reference.

AD7741/AD7742

FUNCTIONAL BLOCK DIAGRAMS

V

DD

GAIN

V

IN

V

IN

V

IN

V

IN

1

2

INPUT

3

4

A1
A0

MUX

GND

X1/X2

CLOCK

GENERATION

CLKIN CLKOUT

AD7742

VOLTAGE-TO-

FREQUENCY
MODULATOR

REFIN

The AD7741 has a single-ended voltage input range from 0 V
to REFIN. The AD7742 has a differential voltage input range
from –V

REF

to +V

. Both parts operate from a single +5 V

REF

supply consuming typically 6 mA, and also contain a power­down feature that reduces the current consumption to less than

35 µA.

PDUNI/BIP

POWER-DOWN

LOGIC

REFOUT

+2.5V

REFERENCE

f

OUT

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1999

AD7741–SPECIFICATIONS

B and Y Version

Min Typ Max Units Conditions/Comments

Parameter

2

(VDD = +4.75 V to +5.25 V; V
T

unless otherwise noted.)

MAX

1

= +2.5 V; f

REF

= 6.144 MHz; all specifications T

CLKIN

DC PERFORMANCE

Integral Nonlinearity

= 200 kHz

f

CLKIN

f

= 3 MHz

CLKIN

f

= 6.144 MHz ±0.024 % of Span V

CLKIN

3

3

±0.012 % of Span
±0.012 % of Span

4

> 4.8 V

DD

Offset Error ±40 mV

Gain Error 0 +0.8 +1.6 % of Span
Offset Error Drift
Gain Error Drift
Power Supply Rejection Ratio

ANALOG INPUT

3

3

3

5

±30 µV/°C
±16 ppm of Span/°C

–63 dB ∆VDD = ±5%

Input Current ±50 ±100 nA

Input Voltage Range 0 V

REF

V

+2.5 V REFERENCE (REFIN/OUT)

REFIN

Nominal Input Voltage 2.5 V
Input Impedance

6

N/A

REFOUT

Output Voltage 2.38 2.50 2.60 V

Output Impedance
Reference Drift
Line Rejection –60 dB
Reference Noise (0.1 Hz to 10 Hz)

3

3

3

1kΩ
±50 ppm/°C

100 µV p-p

LOGIC OUTPUT

Output High Voltage, V
Output Low Voltage, V

OH

OL

Minimum Output Frequency 0.05 f
Maximum Output Frequency 0.45 f

4.0 V Output Sourcing 800 µA

0.4 V Output Sinking 1.6 mA

CLKIN

CLKIN

Hz VIN = 0 V
Hz VIN = V

REF

LOGIC INPUT

PD ONLY

Input High Voltage, V

Input Low Voltage, V

IL

IH

2.4 V

0.8 V

Input Current ±100 nA

Pin Capacitance 6 10 pF
CLKIN ONLY

Input High Voltage, V

Input Low Voltage, V

IL

IH

3.5 V

0.8 V

Input Current ±2 µA

Pin Capacitance 6 10 pF

CLOCK FREQUENCY

Input Frequency 6.144 MHz For Specified Performance

POWER REQUIREMENTS

V

DD

I

(Normal Mode) 8 mA Output Unloaded

DD

I

(Power-Down) 15 35 µA

DD

Power-Up Time

3

4.75 5.25 V

30 µs Coming Out of Power-Down Mode

to

MIN

7

7

NOTES

1

Temperature ranges: B Version –40°C to +85°C: Y Version: –40°C to +105°C.

2

See Terminology.

3

Guaranteed by design and characterization, not production tested.

4

Span = Maximum Output Frequency–Minimum Output Frequency.

5

The absolute voltage on the input pin must not go more positive than VDD – 2.25 V or more negative than GND.

6

Because this pin is bidirectional, any external reference must be capable of sinking/sourcing 400 µA in order to overdrive the internal reference.

7

These logic levels apply to CLKOUT only when it is loaded with one CMOS load.

Specifications subject to change without notice.

–2–

REV. 0

AD7741/AD7742

(VDD = +4.75 V to +5.25 V; V

AD7742–SPECIFICATIONS

Parameter

3

DC PERFORMANCE

Integral Nonlinearity

f

= 200 kHz

CLKIN

f

= 3 MHz

CLKIN

f

= 6.144 MHz ±0.0122 ±0.015 % of Span

CLKIN

Offset Error ±40 ±40 mV Unipolar Mode

4

4

Gain Error +0.2 +1.2 +2.2 +0.2 +1.2 +2.2 % of Span Unipolar Mode

Offset Error Drift

Gain Error Drift

Power Supply Rejection Ratio
Channel-to-Channel Isolation

4

4

4

4

Common-Mode Rejection –60 –78 –58 –78 dB

ANALOG INPUTS (VIN1–VIN4)

6

Input Current ±50 ±100 ±50 ±100 nA

Common-Mode Input Range +0.5 VDD– 1.75 +0.5 VDD– 1.75 V
Differential Input Range –V

VOLTAGE REFERENCE

REFIN

Nominal Input Voltage 2.5 2.5 V
Input Impedance

f

= 3 MHz 70 70 kΩ

CLKIN

f

= 6.144 MHz 35 35 kΩ

CLKIN

REFOUT

Output Voltage 2.38 2.50 2.60 2.38 2.50 2.60 V
Output Impedance

Reference Drift

4

4

4

Line Rejection –70 –70 dB
Reference Noise

(0.1 Hz to 10 Hz)

4

LOGIC OUTPUT

Output High Voltage, V
Output Low Voltage, V
Minimum Output Frequency 0.05 f

OH

OL

Maximum Output Frequency 0.45 f

LOGIC INPUT

ALL EXCEPT CLKIN

Input High Voltage, V
Input Low Voltage, V

Input Current ±100 ±100 nA

IH

IL

Pin Capacitance 6 10 6 10 pF

CLKIN ONLY

Input High Voltage, V
Input Low Voltage, V

Input Current ±2 ±2 µA

IH

IL

Pin Capacitance 6 10 6 10 pF

CLOCK FREQUENCY

Input Frequency 6.144 6.144 MHz For Specified Performance

POWER REQUIREMENTS

V

DD

IDD (Normal Mode) 6 8 6 8 mA Output Unloaded
I

(Power-Down) 25 35 25 35 µA

DD

Power-Up Time

N

OTES

1

Temperature range: B Version: –40°C to +85°C.

2

Temperature range: Y Version: –40°C to +105°C.

3

See Terminology.

4

Guaranteed by design and characterization, not production tested.

5

Span = Maximum Output Frequency–Minimum Output Frequency.

6

The absolute voltage on the input pins must not go more positive than VDD– 1.75 V or more negative than +0.5 V.

7

These logic levels apply to CLKOUT only when it is loaded with one CMOS load.

4

Specifications subject to change without notice

B Version

Min Typ Max Min Typ Max Units Conditions/Comments

+0.2 +1.2 +2.2 +0.2 +1.2 +2.2 % of Span Bipolar Mode

±12 ±12 µV/°C Unipolar Mode
±12 ±12 µV/°C Bipolar Mode
±2 ±2 ppm of Span/°C Unipolar Mode
±4 ±4 ppm of Span/°C Bipolar Mode

–70 –70 dB ∆VDD = ±5%

–75 –75 dB

/Gain +V

REF

0+V

11kΩ
±50 ±50 ppm/°C

100 100 µV p-p

4.0 4.0 V Output Sourcing 800 µA

2.4 2.4 V

3.5 3.5 V

4.75 5.25 4.75 5.25 V

30 30 µs Coming Out of Power-

.

T

unless otherwise noted.)

MAX

1

Y Version

±0.0122 ±0.015 % of Span
±0.0122 ±0.015 % of Span

±40 ±40 mV Bipolar Mode

/Gain –V

REF

/Gain 0 +V

REF

/Gain +V

REF

0.4 0.4 V Output Sinking 1.6 mA

CLKIN

CLKIN

0.05 f

0.45 f

0.8 0.8 V

0.8 0.8 V

= +2.5 V; f

REF

2

CLKIN

CLKIN

= 6.144 MHz; all specifications T

CLKIN

5

/Gain V Bipolar Mode

REF

/Gain V Unipolar Mode

REF

Hz VIN = 0 V (Unipolar), VIN =

–V

/Gain (Bipolar)

Hz VIN = V

REF

REF

and Bipolar)

Down Mode

/Gain (Unipolar

MIN

to

7

7

REV. 0 –3–

AD7741/AD7742

WARNING!

ESD SENSITIVE DEVICE

TIMING CHARACTERISTICS

1, 2, 3

(VDD = +4.75 V to +5.25 V; V

= +2.5 V. All specifications T

REF

MIN

to T

unless otherwise noted.)

MAX

Limit at T

MIN

, T

MAX

Parameter (B and Y Version) Units Conditions/Comments

f

CLKIN

t

HIGH/tLOW

6.144 MHz max
55/45 max Input Clock Mark/Space Ratio
45/55 min

t

1

t

2

t

3

t

4

NOTES

1

Guaranteed by design and characterization, not production tested.

2

All input signals are specified with tr = tf = 5 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.

3

See Figure 1.

Specifications subject to change without notice.

9 ns typ f
4 ns typ f
4 ns typ f
t

± 5 ns typ f

HIGH

ABSOLUTE MAXIMUM RATINGS

t

CLKIN

f

OUT

HIGH

t

4

t

1

t

2

t

3

Figure 1. Timing Diagram

(T

= +25°C unless otherwise noted)

A

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3␣ V to +7 V

Analog Input Voltage to GND . . . . . . . . –5␣ V to V

Digital Input Voltage to GND . . . . . . . –0.3␣ V to V

Reference Input Voltage to GND . . . . –0.3 V to V

f

to GND . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V

OUT

Operating Temperature Range

Automotive (Y Version) . . . . . . . . . . . . . . –40°C to +105°C

Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C

Rising Edge to f

CLOCK

Rise Time

OUT

Fall Time

OUT

Pulsewidth

OUT

OUT

1, 2

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

ORDERING GUIDE

Temperature Package Package

Models Ranges Descriptions Options

AD7741BN –40°C to +85°C Plastic DIP N-8
AD7741BR –40°C to +85°C Small Outline R-8
AD7741YR –40°C to +105°C Small Outline R-8
AD7742BN –40°C to +85°C Plastic DIP N-16
AD7742BR –40°C to +85°C Small Outline R-16A
AD7742YR –40°C to +105°C Small Outline R-16A

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C

Plastic DIP Package

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW

Thermal Impedance (8 Lead) . . . . . . . . . . . . . 125°C/W

θ

JA

θ

Thermal Impedance (16 Lead) . . . . . . . . . . . . 117°C/W

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

SOIC Package

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW

Thermal Impedance (8 Lead) . . . . . . . . . . . . . 157°C/W

θ

JA

Thermal Impedance (16 Lead) . . . . . . . . . . . . 125°C/W

θ

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

2

Transient currents of up to 100 mA will not cause SCR latch-up.

Rising Edge

+ 0.3 V

DD

+ 0.3 V

DD

+ 0.3 V

DD

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7741/AD7742 features proprietary ESD protection circuitry, permanent dam­age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.

–4–

REV. 0