Analog Devices AD7547UQ, AD7547UE, AD7547TQ, AD7547TE, AD7547SQ Datasheet
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LC2MOS
a
FEATURES
Two 12-Bit DACs in One Package
DAC Ladder Resistance Matching: 0.5%
Space Saving Skinny DIP and Surface
Mount Packages
4-Quadrant Multiplication
Low Gain Error (1 LSB max Over Temperature)
Fast Interface Timing
APPLICATIONS
Automatic Test Equipment
Programmable Filters
Audio Applications
Synchro Applications
Process Control
GENERAL DESCRIPTION
The AD7547 contains two 12-bit current output DACs on one
monolithic chip. Also on-chip are the level shifters, data registers and control logic for easy microprocessor interfacing. There
are 12 data inputs.
loading. Data is latched into the DAC registers on the rising
edge of
processors and accepts TTL, 74HC and 5 V CMOS logic level
inputs.
The D/A converters provide 4-quadrant multiplication capabilities with separate reference inputs and feedback resistors.
Monolithic construction ensures that thermal and gain error
tracking is excellent. 12-bit monotonicity is guaranteed for both
DACs over the full temperature range.
The AD7547 is manufactured using the Linear Compatible
CMOS (LC
precision linear circuitry to be fabricated on the same die.
WR. The device is speed compatible with most micro-
CSA, CSB, WR control DAC selection and
2
MOS) process. This allows fast digital logic and
Parallel Loading Dual 12-Bit DAC
AD7547
FUNCTIONAL BLOCK DIAGRAM
PRODUCT HIGHLIGHTS
1. DAC to DAC Matching
Since both DACs are fabricated on the same chip, precise
matching and tracking is inherent. Many applications which
are not practical using two discrete DACs are now possible.
Typical matching: 0.5%.
2. Small Package Size
The AD7547 is available in 0.3" wide 24-pin DIPs and
SOICs and in 28-terminal surface mount packages.
3. Wide Power Supply Tolerance
The device operates on a +12 V to +15 V V
tolerance on this nominal figure. All specifications are guaranteed over this range.
, with ±10%
DD
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
AD7547–SPECIFICA TIONS
(VDD = +12 V to +15 V, 610%, V
1
O V. All specifications T
MIN
to T
= V
REFA
unless otherwise noted.)
MAX
= 10 V; I
REFB
OUTA
= I
= AGND =
OUTB
Parameter J, A Versions K, B Versions L, C Versions S Version T Version U Version Units Test Conditions/Comments
ACCURACY
Resolution 12 12 12 12 12 12 Bits
Relative Accuracy ±1 ± 1/2 ± 1/2 ± 1 ± 1/2 ±1/2 LSB max
Differential Nonlinearity ± 1 ±1 ±1 ±1 ±1 ± 1 LSB max All grades guaranteed
monotonic over temperature.
Gain Error ±6 ± 3 ± l ±6 ±3 ±2 LSB max Both DAC registers loaded
with all 1s.
Gain Temperature Coefficient2;
∆Gain/∆Temperature ±5 ± 5 ±5 ± 5 ±5 ± 5 ppm/°C max Typical value is 1 ppm/°C
Output Leakage Current
I
OUTA
+25°C 10 10 10 10 10 10 nA max DAC A Register loaded
T
to T
MIN
MIN
to T
MAX
MAX
I
OUTB
+25°C 10 10 10 10 10 10 nA max DAC B Register loaded
T
150 150 150 250 250 250 nA max with all 0s.
150 150 150 250 250 250 nA max with all 0s.
REFERENCE INPUT
Input Resistance 9 9 9 999kΩ min Typical Input Resistance = 14 kΩ
20 20 20 20 20 20 k Ω max
V
, V
REFA
REFB
Input Resistance Match ±3 ± 3 ± 1 ±3 ±3 ±1 % max Typically ±0.5%
DIGITAL INPUTS
VIH (Input High Voltage) 2.4 2.4 2.4 2.4 2.4 2.4 V min
VIL (lnput Low Voltage) 0.8 0.8 0.8 0.8 0.8 0.8 V max
IIN (Input Current)
+25°C ±1 ± 1 ±1 ± 1 ±1 ± 1 µA max VIN = V
T
to T
MIN
CIN (Input Capacitance)
POWER SUPPLY
V
DD
I
DD
MAX
3
±10 ±10 ±10 ±10 ±10 ±10 µA max
2
10 10 10 10 10 10 pF max
10.8/16.5 10.8/16.5 10.8/16.5 10.8/16.5 10.8/16.5 10.8/16.5 V min/V max
2 2 2 2 2 2 mA max
DD
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for Design Guidance only and are not subject to test.
(VDD = +12 V to +15 V; V
Parameter TA = +258CT
Output Current Settling Time 1.5 µs max To 0.01 % of full-scale range. I
Digital-to-Analog Glitch Impulse 7 nV-s typ Measured with V
to I
to I
to I
to I
4
OUTA
OUTB
DD
OUTB
OUTA
AC Feedthrough
V
REFA
V
REFB
Power Supply Rejection
∆Gain/∆V
Output Capacitance
C
OUTA
C
OUTB
C
OUTA
C
OUTB
Channel-to-Channel Isolation
V
REFA
V
REFB
Digital Crosstalk 7 nV-s typ Measured for a Code Transition of all 0s to all 1s.
Output Noise Voltage Density 25 nV/√Hz typ Measured between R
(10 Hz–100 kHz) Frequency of measurement is 10 Hz–100 kHz.
Total Harmonic Distortion –82 dB typ VIN = 6 V rms, 1 kHz. Both DACs loaded with all 1s.
NOTES
1
Temperature range as follows: J, K, L Versions, –40°C to +85°C; A, B, C Versions, –40°C to +85°C; S, T, U Versions, –55 °C to +125°C.
2
Sample tested at +25°C to ensure compliance.
3
Functional at VDD = 5 V with degraded specifications.
4
Pin 12 (DGND) on ceramic DIPs is connected to lid.
Specifications subject to change without notice.
REFA
= V
= +10 V, I
REFB
OUTA
= I
= AGND = 0 V. Output Amplifiers are AD644 except where noted.)
OUTB
= T
A
MIN
, T
MAX
Units Test Conditions/Comments
DAC output measured from rising edge of WR.
Typical Value of Settling Time is 0.8 µs.
= V
load = 100 Ω, C
loaded with all 0s and all 1s.
–70 –65 dB max V
–70 –65 dB max registers loaded with all 0s.
REFA
, V
REFA
= 13 pF. DAC registers alternately
EXT
= 20 V p-p, 10 kHz sine wave. DAC
REFB
±0.01 ±0.02 % per % max ∆VDD = VDD max – VDD min
70 70 pF max DAC A, DAC B loaded with all 0s.
70 70 pF max
140 140 pF max DAC A, DAC B loaded with all 1s.
140 140 pF max
–84 dB typ V
–84 dB typ V
= 20 V p-p 10 kHz sine wave, V
REFA
Both DACs loaded with all 1s.
= 20 V p-p 10 kHz sine wave, V
REFB
Both DACs loaded with all 1s.
I
, I
OUTA
Load = 100 Ω, C
OUTB
FBA
–2–
REFB
and I
load = 100 Ω, C
OUT
= 0 V. I
OUTA
REFB
REFA
= 13 pF
EXT
or R
OUTA
FBB
, I
OUTB
= 0 V.
= 0 V.
and I
OUTB
EXT
.
= 13 pF.
REV. A
AD7547
WARNING!
ESD SENSITIVE DEVICE
TIMING CHARACTERISTICS
(VDD = 10.8 V to 16.5 V, V
REFA
= V
= +10 V, I
REFB
OUTA
= I
OUTB
= AGND = 0 V)
Limit at Limit at
Limit at T
= –408CT
A
= –558C
A
Parameter TA = +258C to +858C to +1258C Units Test Conditions/Comments
t
1
t
2
t
3
t
4
t
5
Specifications subject to change without notice.
60 80 80 ns min Data Setup Time
25 25 25 ns min Data Hold Time
80 80 100 ns min Chip Select to Write Setup Time
0 0 0 ns min Chip Select to Write Hold Time
80 80 100 ns min Write Pulse Width
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +17 V
V
, V
REFA
V
RFBA
Digital Input Voltage to DGND . . . . . . . –0.3 V, V
I
OUTA
AGND to DGND . . . . . . . . . . . . . . . . . . –0.3 V, V
to AGND . . . . . . . . . . . . . . . . . . . . . . . . .±25 V
REFB
, V
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
RFBB
, I
to DGND . . . . . . . . . . . . . . –0.3 V, VDD +0.3 V
OUTB
+0.3 V
DD
+0.3 V
DD
Power Dissipation (Any Package)
To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Derates above +75°C . . . . . . . . . . . . . . . . . . . . . . 6 mW/°C
Operating Temperature Range
Commercial Plastic (J, K, L Versions) . . . . –40°C to +85°C
Industrial Hermetic (A, B, C Versions) . . . –40°C to +85°C
Extended Hermetic (S, T, U Versions) . . . –55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table I. AD7547 Truth Table
CSA CSB WR FUNCTION
X X 1 No Data Transfer
1 1 X No Data Transfer
gg0 A Rising Edge on
CSA or CSB Loads
Data to the Respective DAC from the Data Bus
01gDAC A Register Loaded from Data Bus
10gDAC B Register Loaded from Data Bus
00gDAC A and DAC B Registers Loaded
from Data Bus
NOTES
1. X = Don’t care.
2. g means rising edge triggered.
2
Model
AD7547JN –40°C to +85°C ±1 LSB ±6 LSB N-24
AD7547KN –40°C to +85°C ±1/2 LSB ±3 LSB N-24
AD7547LN –40°C to +85°C ±1/2 LSB ±1 LSB N-24
AD7547JP –40°C to +85°C ±1 LSB ±6 LSB P-28A
AD7547KP –40°C to +85°C ±1/2 LSB ±3 LSB P-28A
AD7547LP –40°C to +85°C ±1/2 LSB ±1 LSB P-28A
AD7547JR –40°C to +85°C ±1 LSB ±6 LSB R-24
AD7547KR –40°C to +85°C ±1/2 LSB ±3 LSB R-24
AD7547LR –40°C to +85°C ±1/2 LSB ±1 LSB R-24
AD7547AQ –40°C to +85°C ±1 LSB ±6 LSB Q-24
AD7547BQ –40°C to +85°C ±1/2 LSB ±3 LSB Q-24
AD7547CQ –40°C to +85° C ±1/2 LSB ±1 LSB Q-24
AD7547SQ –55°C to +125°C ±1 LSB ±6 LSB Q-24
AD7547TQ –55°C to +125°C ±1/2 LSB ±3 LSB Q-24
AD7547UQ –55°C to +125°C ±1/2 LSB ±2 LSB Q-24
AD7547SE –55°C to +125°C ±1 LSB ±6 LSB E-28A
AD7547TE –55°C to +125°C ±1/2 LSB ±3 LSB E-28A
AD7547UE –55°C to +125°C ±1/2 LSB ±2 LSB E-28A
NOTES
1
Analog Devices reserves the right to ship ceramic packages (D-24A) in lieu of
cerdip packages (Q-24).
2
To order MIL-STD-883, Class B processed parts, add /883B to part number.
Contact your local sales office for military data sheets.
3
E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip; R = SOIC.
Figure 1. Timing Diagram
ORDERING GUIDE
1
Temperature Relative Gain Package
Range Accuracy Error Option
3
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7547 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. A
–3–
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