Analog Devices AD587 f Datasheet

High Precision

10 V Reference

AD587

FEATURES
Laser Trimmed to High Accuracy:

10.000 V  5 mV (L and U Grades)
Trimmed Temperature Coefficient:
5 ppm/C Max (L and U Grades)
Noise Reduction Capability
Low Quiescent Current: 4 mA Max
Output Trim Capability
MIL-STD-883 Compliant Versions Available

GENERAL DESCRIPTION

The AD587 represents a major advance in state-of-the-art
monolithic voltage references. Using a proprietary ion-implanted
buried Zener diode and laser wafer trimming of high stability
thin-film resistors, the AD587 provides outstanding performance
at low cost.

The AD587 offers much higher performance than most other
10 V references. Because the AD587 uses an industry-standard
pinout, many systems can be upgraded instantly with the AD587.
The buried Zener approach to reference design provides lower
noise and drift than band gap voltage references. The AD587
offers a noise reduction pin that can be used to further reduce
the noise level generated by the buried Zener.

The AD587 is recommended for use as a reference for 8-, 10-, 12-,
14-, or 16-bit DACs that require an external precision reference.
The device is also ideal for successive approximation or integrat­ing ADCs with up to 14 bits of accuracy and, in general, can
offer better performance than the standard on-chip references.

The AD587J, AD587K, and AD587L are specified for operation
from 0°C to 70°C, and the AD587U is specified for –55°C to
+125°C operation. All grades are available in 8-lead CERDIP.
The J and K versions are also available in an 8-lead SOIC package
for surface-mount applications, while the J, K, and L grades also
come in an 8-lead PDIP.

FUNCTIONAL BLOCK DIAGRAM

IN

NOISE

REDUCTION

82

R

S

R

I

4

GND

A1

R

R

T

AD587

V

6

OUT

F

TRIM

5

+V

NOTE
PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS.
NO CONNECTIONS TO THESE POINTS.

PRODUCT HIGHLIGHTS

1. Laser trimming of both initial accuracy and temperature
coefficients results in very low errors over temperature without
the use of external components. The AD587L has a maximum
deviation from 10.000 V of ±8.5 mV between 0°C and 70°C,
and the AD587U guarantees ±14 mV maximum total error
between –55°C and +125°C.

2. For applications requiring higher precision, an optional fine
trim connection is provided.

3. Any system using an industry-standard pinout 10 V reference
can be upgraded instantly with the AD587.

4. Output noise of the AD587 is very low, typically 4 µV p-p.
A noise reduction pin is provided for additional noise filtering
using an external capacitor.

5. The AD587 is available in versions compliant with
MIL-STD-883. Refer to the Analog Devices Military Products
Databook or the current AD587/883B Data Sheet for detailed
specifications.

REV. F

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

AD587–SPECIFICATIONS

(TA = 25C, VIN = 15 V, unless otherwise noted.)

AD587J AD587K AD587L/AD587U

Parameter Min Typ Max Min Typ Max Min Typ Max Unit

OUTPUT VOLTAGE 9.990 10.010 9.995 10.005 9.995 10.005 V

OUTPUT VOLTAGE DRIFT

1

0°C to 70°C20105ppm/°C
–55°C to +125°C20105

GAIN ADJUSTMENT +3 +3 +3 %

–1 –1 –1

LINE REGULATION

1

13.5 V ≤ +VIN ≤ 36 V

T

to T

MIN

MAX

LOAD REGULATION

Sourcing 0 mA < I

T

to T

MIN

Sourcing –10 mA < I

T

to T

MIN

OUT

MAX

OUT

MAX

1

< 10 mA

< 0 mA

2

±100 ±100 ±100 µV/V

±100 ±100 ±100 µV/mA

±100 ±100 ±100

QUIESCENT CURRENT 2 4 2 4 2 4 mA

POWER DISSIPATION 30 30 30 mW

OUTPUT NOISE

0.1 Hz to 10 Hz 4 4 4 µV p-p
Spectral Density, 100 Hz 100 100 100 nV/√Hz

LONG-TERM STABILITY ±15 ±15 ±15 ppm/1000 hr.

SHORT-CIRCUIT

CURRENT-TO-GROUND 30 70 30 70 30 70 mA

SHORT-CIRCUIT

CURRENT-TO-V

IN

30 70 30 70 30 70 mA

TEMPERATURE RANGE

Specified Performance (J, K, L) 0 +70 0 +70 0 +70 °C
Operating Performance (J, K, L)3–40 +85 –40 +85 –40 +85
Specified Performance (U) –55 +125 –55 +125 –55 +125
Operating Performance (U)

NOTES

1

Specification is guaranteed for all packages and grades. CERDIP packaged parts are 100% production tested.

2

Load regulation (sinking) specification for SOIC (R) package is ±200 µV/mA.

3

The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.

Specifications subject to change without notice.

3

–55 +125 –55 +125 –55 +125

REV. F–2–

AD587

1

2

3

4

8

7

6

5

AD587

TOP VIEW

(Not to Scale)

TP

*

TRIM

V

OUT

TP

*

NOISE
REDUCTION

+V

IN

TP

*

GND

*

TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.

ABSOLUTE MAXIMUM RATINGS*

PIN CONFIGURATION

+VIN to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V

Power Dissipation (25°C) . . . . . . . . . . . . . . . . . . . . . 500 mW

Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C

Package Thermal Resistance

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22°C/W

␪

JC

␪

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W

JA

Output Protection: Output safe for indefinite short to ground
and momentary short to +V

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

.

IN

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD587 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.

ORDERING GUIDE

Initial Temperature Temperature Package

Model Error Coefficient Range Option

1

AD587JQ 10 mV 20 ppm/°C0°C to 70°C Q-8
AD587JR 10 mV 20 ppm/°C0°C to 70°CR-8
AD587JR-REEL 10 mV 20 ppm/°C0°C to 70°CR-8
AD587JR-REEL7 10 mV 20 ppm/°C0°C to 70°CR-8
AD587JRZ
AD587JRZ-REEL
AD587JRZ-REEL7
AD587JN 10 mV 20 ppm/°C0°C to 70°C N-8
AD587JNZ

2

2

10 mV 20 ppm/°C0°C to 70°CR-8

2

10 mV 20 ppm/°C0°C to 70°CR-8

2

10 mV 20 ppm/°C0°C to 70°CR-8

10 mV 20 ppm/°C0°C to 70°C N-8
AD587KQ 5 mV 10 ppm/°C0°C to 70°C Q-8
AD587KR 5 mV 10 ppm/°C0°C to 70°CR-8
AD587KR-REEL 5 mV 10 ppm/°C0°C to 70°CR-8
AD587KR-REEL7 5 mV 10 ppm/°C0°C to 70°CR-8
AD587KRZ
AD587KRZ-REEL
AD587KRZ-REEL7

2

5 mV 10 ppm/°C0°C to 70°CR-8

2

5 mV 10 ppm/°C0°C to 70°CR-8

2

5 mV 10 ppm/°C0°C to 70°CR-8
AD587KN 5 mV 10 ppm/°C0°C to 70°C N-8
AD587LQ 5 mV 5 ppm/°C0°C to 70°C Q-8
AD587LN 5 mV 5 ppm/°C0°C to 70°C N-8
AD587UQ 5 mV 5 ppm/°C –55°C to +125°C Q-8

NOTES

1

N = PDIP; Q = CERDIP; R = SOIC.

2

Z = Pb-free part.

REV. F

–3–

AD587

THEORY OF OPERATION

The AD587 consists of a proprietary buried Zener diode refer­ence, an amplifier to buffer the output, and several high stability
thin-film resistors as shown in the block diagram in Figure 1.
This design results in a high precision monolithic 10 V output
reference with initial offset of 5 mV or less. The temperature
compensation circuitry provides the device with a temperature
coefficient of under 5 ppm/°C.

IN

2

NOISE

REDUCTION

8

R

S

R

I

4

GND

A1

R

R

T

AD587

V

6

OUT

F

5

TRIM

+V

NOTE
PINS 1, 3 AND 7 ARE INTERNAL TEST POINTS.
NO CONNECTIONS TO THESE POINTS.

Figure 1. Functional Block Diagram

A capacitor can be added at the NOISE REDUCTION pin
(Pin 8) to form a low-pass filter with R

to reduce the noise

S

contribution of the Zener to the circuit.

APPLYING THE AD587

The AD587 is simple to use in virtually all precision reference
applications. When power is applied to Pin 2, and Pin 4 is
grounded, Pin 6 provides a 10 V output. No external components
are required; the degree of desired absolute accuracy is achieved
simply by selecting the required device grade. The AD587 requires
less than 4 mA quiescent current from an operating supply of 15 V.

Fine trimming may be desired to set the output level to exactly

10.000 V (calibrated to a main system reference). System calibra­tion may also require a reference voltage that is slightly different
from 10.000 V, for example, 10.24 V for binary applications. In
either case, the optional trim circuit shown in Figure 2 can offset
the output by as much as 300 mV with minimal effect on other
device characteristics.

NOISE PERFORMANCE AND REDUCTION

The noise generated by the AD587 is typically less than 4 µV p-p
over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is
approximately 200 µV p-p. The dominant source of this noise is
the buried Zener, which contributes approximately 100 nV/√Hz.
In comparison, the op amp’s contribution is negligible. Figure 3
shows the 0.1 Hz to 10 Hz noise of a typical AD587. The noise
measurement is made with a band-pass filter made of a 1-pole
high-pass filter with a corner frequency at 0.1 Hz and a 2-pole
low-pass filter with a corner frequency at 12.6 Hz to create a
filter with a 9.922 Hz bandwidth.

Figure 3. 0.1 Hz to 10 Hz Noise

If further noise reduction is desired, an external capacitor may
be added between the NOISE REDUCTION pin and ground,
as shown in Figure 2. This capacitor, combined with the
4kΩ R

and the Zener resistances, forms a low-pass filter on the

S

output of the Zener cell. A 1 µF capacitor will have a 3 dB point
at 40 Hz, and will reduce the high frequency (to 1 MHz) noise
to about 160 µV p-p. Figure 4 shows the 1 MHz noise of a typi-
cal AD587 both with and without a 1 µF capacitor.

+V

IN

2

V

OPTIONAL

NOISE
REDUCTION
CAPACITOR

C

1F

8

N

IN

NOISE
REDUCTION

AD587

GND

4

TRIM

V

6

O

5

OUTPUT

10k

Figure 2. Optional Fine Trim Configuration

Figure 4. Effect of 1 µF Noise Reduction Capacitor
on Broadband Noise

TURN-ON TIME

Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. Figure 5 shows the turn-on characteristics of the AD587.
It shows the settling to be about 60 µs to 0.01%. Note the absence
of any thermal tails when the horizontal scale is expanded to
1ms/cm in Figure 5b.

REV. F–4–