5.000 V ±2.0 mV (M grade)
Trimmed temperature coefficient
2 ppm/°C max, 0°C to 70°C (M grade)
5 ppm/°C max, −40°C to +85°C (B and L grades)
10 ppm/°C max, −55°C to +125°C (T grade)
Low noise, 100 nV/√Hz
Noise reduction capability
Output trim capability
MIL-STD-883-compliant versions available
Industrial temperature range SOICs available
Output capable of sourcing or sinking 10 mA
GENERAL DESCRIPTION
The AD586 represents a major advance in state-of-the-art
monolithic voltage references. Using a proprietary ion-implanted
buried Zener diode and laser wafer trimming of high stability
thin-film resistors, the AD586 provides outstanding performance at low cost.
5 V Reference
AD586
The AD586J, AD586K, AD586L, and AD586M are available in
an 8-lead PDIP; the AD586J, AD586K, AD586L, AD586A, and
AD586B are available in an 8-lead SOIC package; and the
AD586J, AD586K, AD586L, AD586S, and AD586T are
available in an 8-lead CERDIP package.
V
IN
NOISE REDUCTION
82
AD586
R
Z1
R
S
6
V
OUT
R
T
5
TRIM
00529-001
4
GND
Figure 1.
A1
R
F
R
I
R
Z2
NOTES
1. PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS.
MAKE NO CONNECTIONS TO THESE POINTS.
The AD586 offers much higher performance than most other
5 V references. Because the AD586 uses an industry-standard
pinout, many systems can be upgraded instantly with the
AD586.
The buried Zener approach to reference design provides lower
noise and drift than band gap voltage references. The AD586
offers a noise reduction pin that can be used to further reduce
the noise level generated by the buried Zener.
The AD586 is recommended for use as a reference for 8-, 10-,
12-, 14-, or 16-bit DACs that require an external precision
reference. The device is also ideal for successive approximation
or integrating ADCs with up to 14 bits of accuracy and, in
general, can offer better performance than the standard on-chip
references.
The AD586J, AD586K, AD586L, and AD586M are specified for
operation from 0°C to 70°C; the AD586A and AD586B are
specified for −40°C to +85°C operation; and the AD586S and
AD586T are specified for −55°C to +125°C operation.
PRODUCT HIGHLIGHTS
1. Laser trimming of both initial accuracy and temperature
coefficients results in very low errors over temperature
without the use of external components. The AD586M has
a maximum deviation from 5.000 V of ±2.45 mV between
0°C and 70°C, and the AD586T guarantees ±7.5 mV
maximum total error between −55°C and +125°C.
2. For applications requiring higher precision, an optional
fine-trim connection is provided.
3. Any system using an industry-standard pinout reference
can be upgraded instantly with the AD586.
4. Output noise of the AD586 is very low, typically 4 µV p-p.
A noise reduction pin is provided for additional noise
filtering using an external capacitor.
5. The AD586 is available in versions compliant with
MIL-STD-883. Refer to the Analog Devices Military
Products Databook or the current AD586/883B data sheet
for detailed specifications.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
(Maximum Output Change in mV)............................................... 6
11/95—Revision 0: Initial Version
Rev. G | Page 2 of 16
AD586
SPECIFICATIONS
AD586J, AD586K/AD586A, AD586L/AD586B
@ TA = 25°C, VIN = 15 V, unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results
from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed, although only
those shown in boldface are tested on all production units, unless otherwise specified.
Table 1.
AD586J AD586K/AD586A AD586L/AD586B
Parameter Min Typ Max Min Typ Max Min Typ Max Unit
OUTPUT VOLTAGE 4.980 5.020 4.995 5.005 4.9975 5.0025 V
OUTPUT VOLTAGE
1
DRIFT
0°C to 70°C 25 15 5 ppm/°C
−55°C to +125°C ppm/°C
GAIN ADJUSTMENT
−2 −2 −2 %
LINE REGULATION1
10.8 V < + V
T
MIN
11.4 V < +V
T
MIN
< 36 V
IN
to T
MAX
< 36 V
IN
to T
µV/V
MAX
LOAD REGULATION1
Sourcing 0 mA < I
< 10 mA
OUT
25°C
T
to T
MIN
Sinking −10 mA < I
MAX
< 0 mA
OUT
25°C
QUIESCENT CURRENT 2
POWER CONSUMPTION 30 30 30 mW
OUTPUT NOISE
Maximum output voltage drift is guaranteed for all packages and grades. CERDIP packaged parts are also 100°C production tested.
2
Lower row shows specified performance for A and B grades.
3
The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.
+6
±100
100
100
400
3
+6
2
45
60
−40
±100
100
100
400
3
45
(K grade)
(A grade)
60
70
+85
+6
%
2
45
0
−40
(L grade)
(B grade)
±100
100
100
400
3
60
70
+85
µV/V
µV/mA
µV/mA
µV/mA
mA
mA
°C
°C
Rev. G | Page 3 of 16
AD586
AD586M, AD586S, AD586T
@ TA = 25°C, VIN = 15 V, unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results
from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed, although only
those shown in boldface are tested on all production units, unless otherwise specified.
Table 2.
AD586M AD586S AD586T
Parameter Min Typ Max Min Typ Max Min Typ Max Unit
OUTPUT VOLTAGE 4.998 5.002 4.990 5.010 4.9975 5.0025 V
OUTPUT VOLTAGE
1
DRIFT
0°C to 70°C 2 ppm/°C
−55°C to +125°C 20 10 ppm/°C
GAIN ADJUSTMENT
−2 −2 −2 %
LINE REGULATION1
10.8 V < +VIN < 36 V
T
to T
MIN
MAX
11.4 V < +VIN < 36 V
T
to T
MIN
MAX
LOAD REGULATION1
Sourcing 0 mA < I
< 10 mA
OUT
25°C
T
to T
MIN
Sinking −10 mA < I
MAX
< 0 mA
OUT
25°C
QUIESCENT CURRENT 2
POWER CONSUMPTION 30 30 30 mW
OUTPUT NOISE
Operating Performance3 −40 +85 −55 +125 −55 +125 °C
1
Maximum output voltage drift is guaranteed for all packages and grades. CERDIP packaged parts are also 100°C production tested.
2
Lower row shows specified performance for A and B grades.
3
The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.
+6
±100
100
100
+6
µV/V
±150
150
150
+6
%
±150
150
150
µV/V
µV/mA
µV/mA
400 400 400 µV/mA
3
2
3
2
3
mA
100 100 100 nV/√Hz
45
60
45
60
45
60
mA
Rev. G | Page 4 of 16
AD586
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
VIN to Ground 36 V
Power Dissipation (25°C) 500 mW
Storage Temperature −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Package Thermal Resistance
θJC 22°C/W
θJA 110°C/W
Output Protection
Output safe for indefinite
short to ground or V
.
IN
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. G | Page 5 of 16
AD586
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
TP
1
2
IN
1
3
4
AD586
TOP VIEW
(Not to Scale)
V
TP
GND
1
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
SHOULD BE MADE TO THESE POINTS.
NOISE
8
REDUCTION
1
7
TP
V
6
OUT
TRIM
5
Figure 2. Pin Configuration (N-8)
00529-002
1
TP
1
AD586
2
V
IN
TOP VIEW
1
TP
3
(Not to Scale)
GND
4
1
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
SHOULD BE MADE TO THESE POINTS.
Figure 3. Pin Configuration (Q-8)
NOISE
8
REDUCTION
1
TP
7
6
V
OUT
TRIM
5
00529-003
TP
TP
GND
1
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS, EXCEPT DUMMY PCB PAD,
SHOULD BE MADE TO THESE POINTS.
Figure 4. Pin Configuration (R-8)
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 TP1 Factory Trim Pad (No Connect).
2 VIN Input Voltage.
3 TP1 Factory Trim Pad (No Connect).
4 GND Ground.
5 TRIM Optional External Fine Trim. See the Applying the AD586 section.
6 V
Output Voltage.
OUT
7 TP1 Factory Trim Pad (No Connect).
8 NOICE REDUCTION Optional Noise Reduction Filter with External 1µF Capacitor to Ground.
1
V
IN
1
1
AD586
2
3
TOP VIEW
(Not to Scale)
4
NOISE
8
REDUCTION
1
7
TP
6
V
OUT
5
TRIM
00529-004
Rev. G | Page 6 of 16
AD586
THEORY OF OPERATION
V
The AD586 consists of a proprietary buried Zener diode reference, an amplifier to buffer the output, and several high stability
thin-film resistors, as shown in the block diagram in Figure 5.
This design results in a high precision monolithic 5 V output
reference with initial offset of 2.0 mV or less. The temperature
compensation circuitry provides the device with a temperature
coefficient of under 2 ppm/°C.
OPTIONAL
NOISE
REDUCTION
CAPACITOR
C
1µF
N
NOISE
8
REDUCTION
IN
2
V
IN
AD586
GND
4
TRIM
6
V
O
5
OUTPUT
10kΩ
Using the bias compensation resistor between the Zener output
and the noninverting input to the amplifier, a capacitor can be
added at the noise reduction pin (Pin 8) to form a low-pass
filter and reduce the noise contribution of the Zener to the
circuit.
V
IN
NOISE REDUCTION
82
AD586
R
Z1
R
S
6
V
OUT
R
T
5
TRIM
00529-001
4
GND
A1
R
F
R
I
R
Z2
NOTES
1. PINS 1, 3, AND 7 ARE INTERNAL TEST POINTS.
MAKE NO CONNECTIONS TO THESE POINTS.
Figure 5. Functional Block Diagram
APPLYING THE AD586
The AD586 is simple to use in virtually all precision reference
applications. When power is applied to Pin 2 and Pin 4 is
grounded, Pin 6 provides a 5 V output. No external components
are required; the degree of desired absolute accuracy is achieved
simply by selecting the required device grade. The AD586
requires less than 3 mA quiescent current from an operating
supply of 12 V or 15 V.
Figure 6. Optional Fin e-Trim Configuration
NOISE PERFORMANCE AND REDUCTION
The noise generated by the AD586 is typically less than 4 µV p-p
over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is
approximately 200 µV p-p. The dominant source of this noise is
the buried Zener, which contributes approximately 100 nV/√Hz.
By comparison, contribution by the op amp is negligible. Figure 7
shows the 0.1 Hz to 10 Hz noise of a typical AD586. The noise
measurement is made with a band-pass filter made of a 1-pole
high-pass filter with a corner frequency at 0.1 Hz, and a 2-pole
low-pass filter with a corner frequency at 12.6 Hz, to create a
filter with a 9.922 Hz bandwidth.
If further noise reduction is desired, an external capacitor can
be added between the noise reduction pin and ground, as
shown in Figure 6. This capacitor, combined with the 4 kΩ R
and the Zener resistances, forms a low-pass filter on the output
of the Zener cell. A 1 µF capacitor will have a 3 dB point at
12 Hz, and will reduce the high frequency (to 1 MHz) noise to
about 160 µV p-p. Figure 8 shows the 1 MHz noise of a typical
AD586, both with and without a 1 µF capacitor.
5s1µF
1µF
S
00529-005
An external fine trim may be desired to set the output level to
exactly 5.000 V (calibrated to a main system reference). System
calibration may also require a reference voltage that is slightly
different from 5.000 V, for example, 5.12 V for binary applications. In either case, the optional trim circuit shown in Figure 6
can offset the output by as much as 300 mV with minimal effect
on other device characteristics.
Rev. G | Page 7 of 16
Figure 7. 0.1 Hz to 10 Hz Noise
00529-006
AD586
CN = 1µF
NO C
200µV
N
50µS
00529-007
Figure 8. Effect of 1 µF Noise Reduction Capacitor on Broadband Noise
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two components normally associated with this are the time for the active
circuits to settle, and the time for the thermal gradients on the
chip to stabilize. Figure 9, Figure 10, and Figure 11 show the
turn-on characteristics of the AD586. It shows the settling to be
about 60 µs to 0.01%. Note the absence of any thermal tails
when the horizontal scale is expanded to l ms/cm in Figure 10.
10V5V
V
IN
V
OUT
1mS
00529-009
Figure 10. Extended Time Scale
10V
V
IN
V
OUT
1mV100mS
Output turn-on time is modified when an external noise reduction capacitor is used. When present, this capacitor acts as an
additional load to the current source of the internal Zener
diode, resulting in a somewhat longer turn-on time. In the case
of a 1 µF capacitor, the initial turn-on time is approximately
400 ms to 0.01% (see Figure 11).
10V
V
IN
V
OUT
1mV
Figure 9. Electrical Turn-On
20µS
00529-008
00529-010
Figure 11. Turn-On with 1µF C
Characteristics
N
DYNAMIC PERFORMANCE
The output buffer amplifier is designed to provide the AD586
with static and dynamic load regulation superior to less complete references.
Many ADCs and DACs present transient current loads to the
reference, and poor reference response can degrade the performance of the converter.
Figure 12, Figure 13, and Figure 14 display the characteristics of
the AD586 output amplifier driving a 0 mA to 10 mA load.
V
3.5V
AD586
Figure 12. Transient Load Test Circuit
V
L
500Ω
5V
0V
OUT
00529-011
Rev. G | Page 8 of 16
AD586
5V
V
L
V
OUT
50mV
1µS
00529-012
Figure 13. Large-Scale Transient Response
5V
V
L
V
OUT
1mV
2µS
00529-013
Figure 14. Fine-Scale Setting for Transient Load
In some applications, a varying load may be both resistive and
capacitive in nature, or the load may be connected to the AD586
by a long capacitive cable.
Figure 15 and Figure 16 display the output amplifier
characteristics driving a 1000 pF, 0 mA to 10 mA load.
V
3.5V
AD586
C
L
1000pF
500Ω
V
L
OUT
5V
0V
00529-014
Figure 15. Capacitive Load Transient Response Test Circuit
= 1000pF
C
L
CL= 0
5V
200mV
1µS
00529-015
Figure 16. Output Response with Capacitive Load
LOAD REGULATION
The AD586 has excellent load regulation characteristics. Figure 17
shows that varying the load several mA changes the output by a
few µV. The AD586 has somewhat better load regulation performance sourcing current than sinking current.
The AD586 is designed for precision reference applications
where temperature performance is critical. Extensive temperature testing ensures that the device maintains a high level of
performance over the operating temperature range.
Some confusion exists with defining and specifying reference
voltage error over temperature. Historically, references have
been characterized using a maximum deviation per degree
Celsius, that is, ppm/°C. However, because of nonlinearities in
temperature characteristics that originated in standard Zener
references (such as “S” type characteristics), most manufacturers
have begun to use a maximum limit error band approach to
specify devices. This technique involves measuring the output at
three or more different temperatures to specify an output voltage error band.
Rev. G | Page 9 of 16
AD586
5
Figure 18 shows the typical output voltage drift for the AD586L
and illustrates the test methodology. The box in Figure 18 is
bounded on the sides by the operating temperature extremes
and on the top and the bottom by the maximum and minimum
output voltages measured over the operating temperature
range. The slope of the diagonal drawn from the lower left to
the upper right corner of the box determines the performance
grade of the device.
V
SLOPE = T.C. =
T
MAX
.003
5.000
T
MIN
–20020406080
TEMPERATURE (°C)
Figure 18. Typical AD586L Temperature Drift
Each AD586J, AD586K, and AD586L grade unit is tested at 0°C,
25°C, and 70°C. Each AD586SQ and AD586TQ grade unit is
tested at −55°C, +25°C, and +125°C. This approach ensures that
the variations of output voltage that occur as the temperature
changes within the specified range will be contained within a
box whose diagonal has a slope equal to the maximum specified
drift. The position of the box on the vertical scale will change
from device to device as initial error and the shape of the curve
vary. The maximum height of the box for the appropriate temperature range and device grade is shown in Table 5. Duplication of these results requires a combination of high accuracy
and stable temperature control in a test system. Evaluation of
the AD586 will produce a curve similar to that in Figure 18, but
output readings could vary depending on the test methods and
equipment used.
The AD586 can be used to provide a precision −5.000 V output,
as shown in Figure 19. The V
pin is tied to at least a 6 V supply,
IN
the output pin is grounded, and the AD586 ground pin is connected through a resistor, R
is now taken from the ground pin (Pin 4) instead of V
essential to arrange the output load and the supply resistor, R
, to a −15 V supply. The −5 V output
S
. It is
OUT
S,
so that the net current through the AD586 is between 2.5 mA
and 10.0 mA. The temperature characteristics and long-term
stability of the device will be essentially the same as that of a
unit used in the standard +5 V output configuration.
+6V → +30V
2
V
IN
6
GND
–15V
V
OUT
4
R
S
AD586
Figure 19. AD586 as a Negative 5 V Reference
10V
2.5mA <–IL< 10mA
R
S
I
L
–5V
00529-018
USING THE AD586 WITH CONVERTERS
The AD586 is an ideal reference for a wide variety of 8-, 12-, 14-,
and 16-bit ADCs and DACs. Several representative examples are
explained in the following sections.
Rev. G | Page 10 of 16
AD586
5 V REFERENCE WITH MULTIPLYING
CMOS DACs OR ADCs
The AD586 is ideal for applications with 10- and 12-bit
multiplying CMOS DACs. In the standard hookup, as shown
in Figure 20, the AD586 is paired with the AD7545 12-bit
multiplying DAC and the AD711 high speed BiFET op amp.
The amplifier DAC configuration produces a unipolar 0 V to
−5 V output range. Bipolar output applications and other
operating details can be found in the individual product data
sheets.
2018
R
FB
OUT 1
AGND
DGND
3
R2
68Ω
C1
33pF
12
2
+15V
AD711K
3
–15V
7
4
0.1µF
0.1µF
6
0V TO–5V
V
OUT
+15V
2
V
IN
AD586
V
OUT
TRIM
GND
4
+15V
V
DD
196
V
REF
10kΩ
5
AD7545K
DB11TODB0
Figure 20. Low Power 12-Bit CMOS DAC Application
The AD586 can also be used as a precision reference for multiple DACs. Figure 21 shows the AD586, the AD7628 dual DAC,
and the AD712 dual op amp hooked up for single-supply operation to produce 0 V to −5 V outputs. Because both DACs are on
the same die and share a common reference and output op
amps, the DAC outputs will exhibit similar gain TCs.
+15V
2
V
IN
V
OUT
AD586
GND
4
V
64
DATA
INPUTS
V
Figure 21. AD586 as a 5 V Reference for a CMOS
REF
REF
+15V
317
DB0
DB7
RFB A
DAC A
AD7628
DAC B
DGND
5
OUT A
AGND
RFB B
OUT B
2
V
A=
OUT
AD712
0TO–5V
B=
V
OUT
0TO–5V
1
19
20
A
14
7
4
B
STACKED PRECISION REFERENCES FOR
MULTIPLE VOLTAGES
Often, a design requires several reference voltages. Three
AD586s can be stacked, as shown in Figure 22, to produce
5.000 V, 10.000 V, and 15.000 V outputs. This scheme can be
extended to any number of AD586s, provided the maximum
load current is not exceeded. This design provides the additional advantage of improved line regulation on the 5.0 V
output. Changes in V
that are below the noise level of the references.
of 18 V to 50 V produce output changes
IN
00529-019
00529-020
22V TO 46V
2
V
IN
AD586
GND
6
V
OUT
5
TRIM
4
2
V
IN
6
V
GND
4
TRIM
10kΩ
OUT
5
AD586
GND
AD586
2
V
IN
6
V
OUT
5
TRIM
4
10kΩ
10kΩ
15V
10V
5V
00529-021
Figure 22. Multiple AD586s Stacked for Precision 5 V, 10 V, and 15 V Outputs
PRECISION CURRENT SOURCE
The design of the AD586 allows it to be easily configured as a
current source. By choosing the control resistor R
in Figure 23,
C
the user can vary the load current from the quiescent current
(typically, 2 mA) to approximately 10 mA. The compliance voltage of this circuit varies from about 5 V to 21 V, depending on
the value of V
.
IN
+V
IN
2
V
IN
6
AD586
GND
V
OUT
4
R
C
(500Ω MIN)
Figure 23. Precision Current Source
5V
IL = + I
R
C
BIAS
00529-022
PRECISION HIGH CURRENT SUPPLY
For higher currents, the AD586 can easily be connected to a
power PNP or power Darlington PNP device. The circuit in
Figure 24 and Figure 25 can deliver up to 4 amps to the load.
The 0.1 µF capacitor is required only if the load has a significant
capacitive component. If the load is purely resistive, improved
high frequency supply rejection results can be obtained by
removing the capacitor.
Rev. G | Page 11 of 16
AD586
15V
220Ω
AD586
V
GND
0.1µF
2
IN
4
6
V
OUT
2N6285
R
C
Figure 24. Precision High Current Current Source
5V
IL = + I
R
C
BIAS
00529-023
15V
220Ω
AD586
V
GND
0.1µF
2
IN
4
6
V
OUT
2N6285
V
OUT
5V @ 4 AMPS
Figure 25. Precision High Current Voltage Source
00529-024
Rev. G | Page 12 of 16
AD586
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
0.280 (7.11)
4
0.250 (6.35)
0.240 (6.10)
0.015
(0.38)
MIN
SEATING
PLANE
0.005 (0.13)
MIN
(N-8)
0.060 (1.52)
MAX
0.015 (0.38)
GAUGE
PLANE
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
8°
1.27 (0.0500)
0°
0.40 (0.0157)
× 45°
Figure 28. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
1
PIN 1
0.100 (2.54)
0.210
(5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or the current