Analog Devices AD1861, AD1851 Datasheet
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LATCH
DAC
SERIAL
INPUT
REGISTER
CONTROL
LOGIC
AD1851/
AD1861
DGND
NC
CLK
LE
DATA
NC = NO CONNECT
TRIM
MSB ADJ
I
OUT
AGND
SJ
R
F
V
OUT
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11
12
13
14
15
16
NC
+V
S
–V
S
+V
L
I
OUT
a
16-Bit/18-Bit, 16 3 F
PCM Audio DACs
AD1851/AD1861
S
FEATURES
FUNCTIONAL BLOCK DIAGRAM
110 dB SNR
Fast Settling Permits 163 Oversampling
63 V Output
Optional Trim Allows Super-Linear Performance
65 V Operation
16-Pin Plastic DIP and SOIC Packages
Pin-Compatible with AD1856 & AD1860 Audio DACs
2s Complement, Serial Input
APPLICATIONS
High-End Compact Disc Players
Digital Audio Amplifiers
DAT Recorders and Players
Synthesizers and Keyboards
PRODUCT DESCRIPTION
The AD1851/AD1861 is a monolithic PCM audio DAC. The
AD1851 is a 16-bit device, while the AD1861 is an 18-bit device. Each device provides a voltage output amplifier, DAC,
serial-to-parallel register and voltage reference. The digital portion of the AD1851/AD1861 is fabricated with CMOS logic
elements that are provided by Analog Devices’ 2 µm ABCMOS
process. The analog portion of the AD1851/AD1861 is fabricated with bipolar and MOS devices as well as thin-film
resistors.
This combination of circuit elements, as well as careful design
and layout techniques, results in high performance audio playback. Laser-trimming of the linearity error affords low total harmonic distortion. An optional linearity trim pin is provided to
allow residual differential linearity error at midscale to be eliminated. This feature is particularly valuable for low distortion
reproductions of low amplitude signals. Output glitch is also
small, contributing to the overall high level of performance. The
output amplifier achieves fast settling and high slew rates, providing a full ±3 V signal at load currents up to 8 mA. When
used in current output mode, the AD1851/AD1861 provides a
±1 mA output signal. The output amplifier is short circuit
protected and can withstand indefinite shorts to ground.
The serial input interface consists of the clock, data and latch
enable pins. The serial 2s complement data word is clocked into
the DAC, MSB first, by the external clock. The latch enable
signal transfers the input word from the internal serial input
register to the parallel DAC input register. The AD1851 input
clock can support a 12.5 MHz data rate, while the AD1861 input clock can support a 13.5 MHz data rate. This serial input
port is compatible with second generation digital filter chips
used in consumer audio products. These filters operate at oversampling rates of 23, 43, 83 and 163 sampling frequencies.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
The critical specifications of THD+N and signal-to-noise ratio
are 100% tested for all devices.
The AD1851/AD1861 operates with ± 5 V power supplies, making it suitable for home use markets. The digital supply, V
be separated from the analog supplies, V
and –VS, for reduced
S
, can
L
digital crosstalk. Separate analog and digital ground pins are
also provided. Power dissipation is 100 mW typical.
The AD1851/AD1861 is available in either a 16-pin plastic DIP
or a 16-pin plastic SOIC package. Both packages incorporate
the industry standard pinout found on the AD1856 and
AD1860 PCM audio DACs. As a result, the AD1851/AD1861
is a drop-in replacement for designs where ± 5 V supplies have
been used with the AD1856/AD1860. Operation is guaranteed
over the temperature range of –25°C to +70°C and over the
voltage supply range of ±4.75 V to ±5.25 V.
PRODUCT HIGHLIGHTS
l. AD1851 16-bit resolution provides 96 dB dynamic range.
AD1861 18-bit resolution provides 108 dB dynamic range.
2. No external components are required.
3. Operates with ±5 V supplies.
4. Space saving 16-pin SOIC and plastic DIP packages.
5. 100 mW power dissipation.
6. High input clock data rates and 1.5 µs settling time permits
23, 43, 83 and 163 oversampling.
7. ±3 V or ±1 mA output capability.
8. THD + Noise and SNR are 100% tested.
9. Pin-compatible with AD1856 & AD1860 PCM audio DACs.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
AD1851/AD1861–SPECIFICATIONS
NC = NO CONNECT
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16-BIT
LATCH
16-BIT
DAC
SERIAL
INPUT
REGISTER
CONTROL
LOGIC
AD1851
DGND
NC
CLK
LE
DATA
TRIM
MSB ADJ
AGND
SJ
NC
–V
S
+V
L
+V
S
I
OUT
R
F
V
OUT
I
OUT
(TA @ +258C and 65 V supplies, unless otherwise noted)
Min Typ Max Units
DIGITAL INPUTS
V
IH
V
IL
I
, VIH = V
IH
L
2.0 +V
0.8 V
1.0 µA
L
V
IIL, VIL = 0.4 –10 µA
ACCURACY
Gain Error ±1%
Midscale Output Voltage ±10 mV
DRIFT (0°C to +70°C)
Total Drift ± 25 ppm of FSR/°C
Bipolar Zero Drift ±4 ppm of FSR/°C
SETTLING TIME (To ±0.0015% of FSR)
Voltage Output
6 V Step 1.5 µs
1 LSB Step 1.0 µs
Slew Rate 9 V/µs
Current Output
1 mA Step 10 Ω to 100 Ω Load 350 ns
1 kΩ Load 350 ns
OUTPUT
Voltage Output Configuration
Bipolar Range 62.88 ±3.0 63.12 V
Output Current ±8mA
Output Impedance 0.1 Ω
Short Circuit Duration Indefinite to Common
Current Output Configuration
Bipolar Range (±30%) ±1.0 mA
Output Impedance (± 30%) 1.7 kΩ
POWER SUPPLY
Voltage
+V
–V
and +V
L
S
S
4.75 5.25 V
–5.25 –4.75 V
TEMPERATURE RANGE
Specification 0 +25 +70 °C
Operation –25 +70 °C
Storage –60 +100 °C
WARM-UP TIME 1 min
Specifications subject to change without notice.
–V
1
S
DGND
2
+V
L
3
NC
4
CLK
5
LE
6
DATA
7
NC
8 9
NC = NO CONNECT
AD1851 Functional Block Diagram
AD1851
16-BIT
LATCH
SERIAL
INPUT
REGISTER
CONTROL
LOGIC
16-BIT
DAC
+V
16
S
TRIM
15
MSB ADJ
14
I
OUT
I
13
OUT
AGND
12
SJ
11
R
10
F
V
OUT
AD1861 Functional Block Diagram
–2–
REV. A
AD1851
AD1851/AD1861
Min Typ Max Units
RESOLUTION 16 Bits
TOTAL HARMONIC DISTORTION + NOISE
0 dB, 990.5 Hz
AD1851N-J, R-J 0.003 0.004 %
AD1851N, R 0.004 0.008 %
–20 dB, 990.5 Hz
AD1851N-J, R-J 0.009 0.016 %
AD1851N, R 0.009 0.040 %
–60 dB, 990.5 Hz
AD1851N-J, R-J 0.9 1.6 %
AD1851N, R 0.9 4.0 %
D-RANGE* (With A-Weight Filter)
–60 dB, 990.5 Hz AD1851N, R 88 dB
AD1851N-J, R-J 96 dB
SIGNAL-TO-NOISE RATIO 107 110 dB
MAXIMUM CLOCK INPUT FREQUENCY 12.5 MHz
ACCURACY
Differential Linearity Error ±0.001 % of FSR
MONOTONICITY 14 Bits
POWER SUPPLY
Current
+I 10.0 13.0 mA
–I –10.0 –15.0 mA
Power Dissipation 100 mW
AD1861
Min Typ Max Units
RESOLUTION 18 Bits
TOTAL HARMONIC DISTORTION + NOISE
0 dB, 990.5 Hz
AD1861N-J, R-J 0.003 0.004 %
AD1861N, R 0.004 0.008 %
–20 dB, 990.5 Hz
AD1861N-J, R-J 0.009 0.016 %
AD1861N, R 0.009 0.040 %
–60 dB, 990.5 Hz
AD1861N-J, R-J 0.9 1.6 %
AD1861N, R 0.9 4.0 %
D-RANGE* (With A-Weight Filter)
–60 dB, 990.5 Hz AD1861N, R 88 dB
AD1861N-J, R-J 96 dB
SIGNAL-TO-NOISE RATIO 107 110 dB
MAXIMUM CLOCK INPUT FREQUENCY 13.5 MHz
ACCURACY
Differential Linearity Error ±0.001 % of FSR
MONOTONICITY 15 Bits
POWER SUPPLY
Current
+I 10.0 13.0 mA
–I –10.0 –15.0 mA
Power Dissipation 100 mW
*Tested in accordance with EIAJ Test Standard CP-307.
Specifications subject to change without notice.
REV. A
–3–
AD1851/AD1861
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS*
VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6.50 V
V
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6.50 V
S
–V
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –6.50 V to 0 V
S
Digital Inputs to DGND . . . . . . . . . . . . . . . . . . . –0.3 V to V
L
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V
Short Circuit . . . . . . . . . . . . . . . . .Indefinite Short to Ground
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+300°C, 10 sec
Storage Temperature . . . . . . . . . . . . . . . . . . –60°C to +100°C
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Package
Model Resolution THD + N Option*
AD1851N 16 Bits 0.008% N-16
AD1851N-J 16 Bits 0.004% N-16
AD1851R 16 Bits 0.008% R-16
AD1851R-J 16 Bits 0.004% R-16
AD1861N 18 Bits 0.008% N-16
AD1861N-J 18 Bits 0.004% N-16
AD1861R 18 Bits 0.008% R-16
AD1861R-J 18 Bits 0.004% R-16
*N = Plastic DIP Package; R = Small Outline (SOIC) Package.
PIN DESCRIPTIONS
1–V
S
Analog Negative Power Supply
2 DGND Logic Ground
3V
L
Logic Positive Power Supply
4 NC No Connection
5 CLK Clock Input
6 LE Latch Enable Input
7 DATA Serial Data Input
8 NC No Internal Connection*
9V
10 R
OUT
F
Voltage Output
Feedback Resistor
11 SJ Summing Junction
12 AGND Analog Ground
13 I
OUT
Current Output
14 MSB ADJ MSB Adjustment Terminal
15 TRIM MSB Trimming Potentiometer Terminal
16 V
*Pin 8 has no internal connection; -VL from AD1856 or AD1860 socket can be
safely applied.
S
Analog Positive Power Supply
CAUTION
ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protected;
however, permanent damage may occur on unconnected devices subject to high energy electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective foam
should be discharged to the destination socket before devices are inserted.
Typical Performance
10
175
150
125
100
PD – mW
75
50
25
2 4 6 8 10 12 14
CLOCK FREQUENCY – MHz
1
0.1
THD+N – %
0.01
0.001
–30 –20 –10 0 10 20 30 40 50 60 70 80 90
TEMPERATURE – °C
–60dB
–20dB
0dB
Power Dissipation vs. Clock Frequency
–4–
THD vs. Temperature
REV. A
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