ANALOG DEVICES AD1833 Service Manual

查询AD1833供应商

Multichannel,

a

FEATURES
5 V Stereo Audio System with 3.3 V Tolerant Digital

Interface

Supports 96 kHz Sample Rates on Six Channels and

192 kHz on 2 Channels
Supports 16-/20-/24-Bit Word Lengths
Multibit Sigma-Delta Modulators with

“Perfect Differential Linearity Restoration” for

Reduced Idle Tones and Noise Floor
Data Directed Scrambling DACs—Least Sensitive to

Jitter
Differential Output for Optimum Performance
DACs Signal-to-Noise and Dynamic Range: 110 dB
–94 dB THD + N—6-Channel Mode
–95 dB THD + N—2-Channel Mode
On-Chip Volume Control Per Channel with 1024-Step

Linear Scale
Software Controllable Clickless Mute
Digital De-Emphasis Processing
Supports 256 ⴛ f

Clock Modes
Power-Down Mode Plus Soft Power-Down Mode
Flexible Serial Data Port with Right-Justified, Left-

Justified, I2S-Compatible and DSP Serial Port Modes
Supports Packed Data Mode (TDM) for DACs
48-Lead LQFP Plastic Package

APPLICATIONS
DVD Video and Audio Players
Home Theatre Systems
Automotive Audio Systems
Set-Top Boxes
Digital Audio Effects Processors

GENERAL DESCRIPTION

The AD1833 is a complete, high-performance, single-chip, multi­channel, digital audio playback system. It features six audio
playback channels each comprising a high-performance digital
interpolation filter, a multibit sigma-delta modulator featuring
Analog Devices patented technology and a continuous-time
voltage-out analog DAC section. Other features include an on-chip
clickless attenuator and mute capability, per channel, programmed
through an SPI-compatible serial control port.

, 512ⴛ fS, and 768ⴛ fS Master

S

24-Bit, 192 kHz, ⌺-⌬ DAC

AD1833

FUNCTIONAL BLOCK DIAGRAM

ZERO FLAGS

FILTER

ENGINE

AD1833

INTERPOLATOR

INTERPOLATOR

INTERPOLATOR

INTERPOLATOR

INTERPOLATOR

INTERPOLATOR

FILTR FILTD

CDATA

CLATCH

CCLK

MCLK

RESET

L/RCLK

BCLK

SDIN1

SDIN2

SDIN3

SOUT

DVDD1 DVDD2

SPI

PORT

DATA
PORT

DGND

The AD1833 is fully compatible with all known DVD formats,
catering for up to 24-bit word lengths at sample rates of 48 kHz
and 96 kHz on all six channels while supporting a 192 kHz
sample rate on two channels. It also provides the “Redbook”
standard 50 µs/15 µs digital de-emphasis filters at sample rates
of 32 kHz, 44.1 kHz, and 48 kHz.

The AD1833 has a very flexible serial data input port that allows
for glueless interconnection to a variety of ADCs, DSP chips,
AES/EBU receivers, and sample rate converters. The AD1833
can be configured in left-justified, I
serial port compatible modes. The AD1833 accepts serial audio
data in MSB first, two’s complement format. While the AD1833
can be operated from a single 5 V power supply, it also features
a separate supply pin for its digital interface which allows the
device to be interfaced to devices using 3.3 V power supplies.

It is fabricated on a single monolithic integrated circuit and is
housed in a 48-lead LQFP package for operation over the tem­perature range –40°C to +85°C.

AVDD

DAC

DAC

DAC

DAC

DAC

DAC

AGND

2

S, right-justified, or DSP

OUTLP1
OUTLN1

OUTLP2
OUTLN2

OUTLP3
OUTLN3

OUTRP3
OUTRN3

OUTRP2
OUTRN2

OUTRP1
OUTRN1

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

AD1833–SPECIFICATIONS

TEST CONDITIONS UNLESS OTHERWISE NOTED

Supply Voltages (AVDD, DVDD) 5.0 V
Ambient Temperature 25°C
Input Clock 12.288 MHz, (256 × f
Input Signal Nominally 1 kHz, 0 dBFS (Full Scale)
Input Sample Rate 48 kHz
Measurement Bandwidth 20 Hz to 20 kHz
Word Width 24 Bits
Load Capacitance 500 pF
Load Impedance 10 kΩ

NOTES
Performance of all channels are identical (exclusive of the Interchannel Gain Mismatch and Interchannel Phase Deviation specifications).
Specifications subject to change without notice.

Parameter Min Typ Max Unit Test Conditions

ANALOG PERFORMANCE
DIGITAL-TO-ANALOG CONVERTERS

Dynamic Range (20 Hz to 20 kHz, –60 dBFS Input)

With A-Weighted Filter 106.5 110 dB

Total Harmonic Distortion + Noise –95 –89 dB Two Channels Active

SNR 110 dB
Interchannel Isolation 108 dB
DC Accuracy

Gain Error ± 3.0 %
Interchannel Gain Mismatch 0.2 %

Gain Drift 80 ppm/°C
Interchannel Crosstalk (EIAJ Method) –120 dB
Interchannel Phase Deviation ± 0.1 Degrees
Volume Control Step Size (1023 Linear Steps) 0.098 %
Volume Control Range (Max Attenuation) 63.5 dB
Mute Attenuation –120 dB
De-Emphasis Gain Error ± 0.1 dB
Full-Scale Output Voltage at Each Pin (Single-Ended) 1.0 (2.8) V rms (V p-p)
Output Resistance Measured Differentially 150 Ω
Common-Mode Output Volts 2.2 V

DAC INTERPOLATION FILTER—48 kHz

Pass Band 20 kHz
Pass Band Ripple ± 0.01 dB
Stop Band 24 kHz
Stop Band Attenuation 70 dB
Group Delay 510 µs

DAC INTERPOLATION FILTER—96 kHz

Pass Band 37.7 kHz
Pass Band Ripple ± 0.03 dB
Stop Band 55.034 kHz
Stop Band Attenuation 70 dB
Group Delay 160 µs

DAC INTERPOLATION FILTER—192 kHz

Pass Band 89.954 kHz
Pass Band Ripple ± 1dB
Stop Band 104.85 kHz
Stop Band Attenuation 70 dB
Group Delay 140 µs

Mode)

S

110.5 dB f

–94 dB Six Channels Active
–95 dB 96 kHz, Two Channels Active
–94 dB 96 kHz, Six Channels Active

= 96 kHz

S

–2–

REV. 0

AD1833

WARNING!

ESD SENSITIVE DEVICE

Parameter Min Typ Max Unit Test Conditions

DIGITAL I/O

Input Voltage HI 3.0 V
Input Voltage LO 0.8 V
Output Voltage HI DV
Output Voltage LO 0.4 V

POWER SUPPLIES

Supply Voltage (AV
Supply Voltage (DV
Supply Current I
Supply Current I

and DV

DD

) 3.3 DV

DD2

ANALOG

DIGITAL

) 4.5 5.0 5.5 V

DD1

Power Supply Rejection Ratio

1 kHz 300 mV p-p Signal at Analog Supply Pins –60 dB
20 kHz 300 mV p-p Signal at Analog Supply Pins –50 dB

Specifications subject to change without notice.

– 0.4 V

DD2

38.5 42 mA
42 45.5 mA Active
2 mA Power-Down

DD1

V

ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C unless otherwise noted)

AVDD, DV

to AGND, DGND . . . . . . . . –0.3 V to +6.5 V

DDx

AGND to DGND . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V

Digital I/O Voltage to DGND . . . . . –0.3 V to DV

Analog I/O Voltage to AGND . . . . . . –0.3 V to AV

+ 0.3 V

DD2

+ 0.3 V

DD

Operating Temperature Range

Industrial (A Version) . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

LQFP, θJA Thermal Impedance . . . . . . . . . . . . . . . . . 91°C/W

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.

Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C

ORDERING GUIDE

Model Temperature Range Package Description Package Option

AD1833AST –40°C to +85°C Thin Plastic Quad Flatpack ST-48
EVAL-AD1833EB Evaluation Board

PIN CONFIGURATION

OUTLN2

OUTLP2

OUTLN3

OUTLP3

AVDD

FILTD

FILTR

AGND

OUTRP3

OUTRN3

OUTRP2

OUTRN2

36

35

34

33

32

31

30

29

28

27

26

25

OUTRP1

OUTRN1

AVDD

AVDD

AGND

AGND

AGND

DGND

DVDD2

RESET

ZERO1L

ZERO1R

OUTLP1

OUTLN1

AVDD

AVDD

AGND

AGND

AGND

DGND

DVDD1

ZEROA

ZERO3R

ZERO3L

48 47 46 45 44 39 38 3743 42 41 40

1

PIN 1

2

IDENTIFIER

3

4

5

6

7

8

9

10

11

12

13 14 15 16 17 18 19 20 21 22 23 24

AD1833

TOP VIEW

(Not to Scale)

CCLK

ZERO2R

CLATCH

CDATA

L/RCLK

BCLK

MCLK

SDIN1

SDIN2

SDIN3

SOUT

ZERO2L

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD1833 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

REV. 0

–3–

AD1833

DIGITAL TIMING (Guaranteed over –40ⴗC to +85ⴗC, AVDD = DVDD = 5.0 V ⴞ 10%)

t

DML

t

DMH

t

DBH

t

DBL

t

DLS

t

DLH

t

DDS

t

DDH

t

PDRP

t

CCH

t

CCL

t

CSU

t

CHD

t

CLH

Specifications subject to change without notice.

MCLK LO Pulsewidth (All Modes) 15 ns
MCLK HI Pulsewidth (All Modes) 15 ns
BCLK HI Pulsewidth 15 ns
BCLK LO Pulsewidth 15 ns
LRCLK Setup 5 ns
LRCLK Hold (DSP Serial Port Mode Only) 10 ns
SDATA Setup 5 ns
SDATA Hold 15 ns
PD/RST LO Pulsewidth 10 ns
CCLK HI Pulsewidth 10 ns
CCLK LO Pulsewidth 10 ns
CDATA Setup Time 5 ns
CDATA Hold Time 10 ns
CLATCH HI Pulsewidth 10 ns

t

DMH

MCLK INPUT

Min Unit

RESET INPUT

BCLK

L/RCLK

SDATA

LEFT-JUSTIFIED

MODE

SDATA

2

I

S-JUSTIFIED

MODE

RIGHT-JUSTIFIED

SDATA

MODE

t

DML

t

PDRP

Figure 1. MCLK and

t

DBH

t

DBL

t

DLS

t

DDS

MSB

t

DDH

8-BIT CLOCKS

(24-BIT DATA)

12-BIT CLOCKS

(20-BIT DATA)

16-BIT CLOCKS

(16-BIT DATA)

t

DDS

MSB-1

MSB

t

DDH

RESET

t

DDS

Timing

MSB

t

DDH

t

DDS

LSB

t

DDH

Figure 2. Serial Data Port Timing

–4–

REV. 0

AD1833

t

CHD

CDATA

CCLK

CLATCH

Pin Mnemonic IN/OUT Description

1 OUTLP1 O DAC 1 Left Channel Positive Output.
2 OUTLN1 O DAC 1 Left Channel Negative Output.
3, 4, 33, 34, 44 AVDD Analog Supply.
5, 6, 7, 30, 31, 32, 41 AGND Analog Ground.
8, 29 DGND Digital Ground.
9 DVDD1 Digital Supply to Core Logic.
10 ZEROA O Flag to Indicate Zero Input on All Channels.
11 ZERO3R O Flag to Indicate Zero Input on Channel 3 Right.
12 ZERO3L O Flag to Indicate Zero Input on Channel 3 Left.
13 ZERO2R O Flag to Indicate Zero Input on Channel 2 Right.
14 CLATCH I Latch Input for Control Data (SPI Port).
15 CDATA I Serial Control Data Input (SPI Port).
16 CCLK I Clock Input for Control Data (SPI Port).
17 L/RCLK I/O Left/Right Clock for DAC Data Input (FSTDM Output in TDM Mode).
18 BCLK I/O Bit Clock for DAC Data Input (BCLKTDM Output in TDM Mode).
19 MCLK I Master Clock Input.
20 SDIN1 I Data Input for Channel 1 Left/Right (Data Stream Input in TDM

21 SDIN2 I/O Data Input for Channel 2 Left/Right (L/RCLK Output to Auxiliary

22 SDIN3 I/O Data Input for Channel 3 Left/Right (BCLK Output to Auxiliary

23 SOUT O Auxiliary I
24 ZERO2L O Flag to Indicate Zero Input on Channel 2 Left.
25 ZERO1R O Flag to Indicate Zero Input on Channel 1 Right.
26 ZERO1L O Flag to Indicate Zero Input on Channel 1 Left.
27 RESET I Power-Down and Reset Control.
28 DVDD2 Power Supply to External Interface Logic.
35 OUTRN1 O DAC 1 Right Channel Negative Output.
36 OUTRP1 O DAC 1 Right Channel Positive Output.
37 OUTRN2 O DAC 2 Right Channel Negative Output.
38 OUTRP2 O DAC 2 Right Channel Positive Output.
39 OUTRN3 O DAC 3 Right Channel Negative Output.
40 OUTRP3 O DAC 3 Right Channel Positive Output.
42 FILTR Reference/Filter Capacitor Connection. Recommend 10 µF/100 µF

43 FILTD Filter Capacitor Connection. Recommend 10 µF/100 µF Decouple to

45 OUTLP3 O DAC 3 Left Channel Positive Output.
46 OUTLN3 O DAC 3 Left Channel Negative Output.
47 OUTLP2 O DAC 2 Left Channel Positive Output.
48 OUTLN2 O DAC 2 Left Channel Negative Output.

D15

t

CCH

t

CCL

D14

t

CSU

D0

t

CLH

Figure 3. SPI Timing

PIN FUNCTION DESCRIPTIONS

and Packed Modes).

DAC in TDM Mode).

DAC in TDM Mode).

2

S Output (Available in TDM Mode).

Decouple to Analog Ground.

Analog Ground.

REV. 0

–5–

AD1833–Typical Performance Characteristics

0.01

0.008

0.006

0.004

0.002

0

dB

–0.002

–0.004

–0.006

–0.008

–0.01

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

Hz ⴛ10

TPC 1. Pass Band Response, 8× Mode

10

0

–10

–20

–30

–40

dB

–50

–60

–70

–80

–90

–100

2.00 2.05 2.10 2.15 2.20 2.25 2.30 2.35 2.40 2.45 2.50

Hz ⴛ10

TPC 2. Transition Band Response, 8× Mode

0.1

0.08

0.06

0.04

0.02

0

dB

–0.02

–0.04

–0.06

–0.08

–0.1

4

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Hz ⴛ10

4

TPC 4. Pass Band Response, 4× Mode

0.5

0.4

0.3

0.2

0.1

0

dB

–0.1

–0.2

–0.3

–0.4

–0.5

4

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

Hz ⴛ10

4

TPC 5. 40 kHz Pass Band Response, 4× Mode

0

–20

–40

–60

dB

–80

–100

–120

–140

–160

0 0.5 1.5 2.0 2.5 3.0

1.0

Hz ⴛ10

TPC 3. Complete Response, 8× Mode

10

0

–10

–20

–30

–40

dB

–50

–60

–70

–80

–90

–100

5

4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.0

Hz ⴛ10

4

TPC 6. Transition Band Response, 4× Mode

–6–

REV. 0